Coverage Report

Created: 2025-10-12 06:32

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/Xtensa/XtensaGenAsmWriter.inc
Line
Count
Source
1
/* Capstone Disassembly Engine, https://www.capstone-engine.org */
2
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
3
/*    Rot127 <unisono@quyllur.org> 2022-2024 */
4
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
5
6
/* LLVM-commit: <commit> */
7
/* LLVM-tag: <tag> */
8
9
/* Do not edit. */
10
11
/* Capstone's LLVM TableGen Backends: */
12
/* https://github.com/capstone-engine/llvm-capstone */
13
14
#include <capstone/platform.h>
15
#include "../../cs_priv.h"
16
17
/// getMnemonic - This method is automatically generated by tablegen
18
/// from the instruction set description.
19
60.7k
static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
20
60.7k
#ifndef CAPSTONE_DIET
21
60.7k
  static const char AsmStrs[] = {
22
60.7k
  /* 0 */ "wur.fcr \t\0"
23
60.7k
  /* 10 */ "call0\t\0"
24
60.7k
  /* 17 */ "callx0\t\0"
25
60.7k
  /* 25 */ "call12\t\0"
26
60.7k
  /* 33 */ "callx12\t\0"
27
60.7k
  /* 42 */ "subx2\t\0"
28
60.7k
  /* 49 */ "addx2\t\0"
29
60.7k
  /* 56 */ "call4\t\0"
30
60.7k
  /* 63 */ "subx4\t\0"
31
60.7k
  /* 70 */ "addx4\t\0"
32
60.7k
  /* 77 */ "callx4\t\0"
33
60.7k
  /* 85 */ "any4\t\0"
34
60.7k
  /* 91 */ "call8\t\0"
35
60.7k
  /* 98 */ "subx8\t\0"
36
60.7k
  /* 105 */ "addx8\t\0"
37
60.7k
  /* 112 */ "callx8\t\0"
38
60.7k
  /* 120 */ "any8\t\0"
39
60.7k
  /* 126 */ "sra\t\0"
40
60.7k
  /* 131 */ "nsa\t\0"
41
60.7k
  /* 136 */ "andb\t\0"
42
60.7k
  /* 142 */ "wdtlb\t\0"
43
60.7k
  /* 149 */ "witlb\t\0"
44
60.7k
  /* 156 */ "xorb\t\0"
45
60.7k
  /* 162 */ "sub\t\0"
46
60.7k
  /* 167 */ "bbc\t\0"
47
60.7k
  /* 172 */ "andbc\t\0"
48
60.7k
  /* 179 */ "orbc\t\0"
49
60.7k
  /* 185 */ "ee.zero.qacc\t\0"
50
60.7k
  /* 199 */ "src\t\0"
51
60.7k
  /* 204 */ "add\t\0"
52
60.7k
  /* 209 */ "and\t\0"
53
60.7k
  /* 214 */ "l32e\t\0"
54
60.7k
  /* 220 */ "s32e\t\0"
55
60.7k
  /* 226 */ "bge\t\0"
56
60.7k
  /* 231 */ "bne\t\0"
57
60.7k
  /* 236 */ "bnone\t\0"
58
60.7k
  /* 243 */ "bf\t\0"
59
60.7k
  /* 247 */ "movf\t\0"
60
60.7k
  /* 253 */ "neg\t\0"
61
60.7k
  /* 258 */ "mula.aa.hh\t\0"
62
60.7k
  /* 270 */ "umul.aa.hh\t\0"
63
60.7k
  /* 282 */ "muls.aa.hh\t\0"
64
60.7k
  /* 294 */ "mula.da.hh\t\0"
65
60.7k
  /* 306 */ "mul.da.hh\t\0"
66
60.7k
  /* 317 */ "muls.da.hh\t\0"
67
60.7k
  /* 329 */ "mula.ad.hh\t\0"
68
60.7k
  /* 341 */ "mul.ad.hh\t\0"
69
60.7k
  /* 352 */ "muls.ad.hh\t\0"
70
60.7k
  /* 364 */ "mula.dd.hh\t\0"
71
60.7k
  /* 376 */ "mul.dd.hh\t\0"
72
60.7k
  /* 387 */ "muls.dd.hh\t\0"
73
60.7k
  /* 399 */ "mula.aa.lh\t\0"
74
60.7k
  /* 411 */ "umul.aa.lh\t\0"
75
60.7k
  /* 423 */ "muls.aa.lh\t\0"
76
60.7k
  /* 435 */ "mula.da.lh\t\0"
77
60.7k
  /* 447 */ "mul.da.lh\t\0"
78
60.7k
  /* 458 */ "muls.da.lh\t\0"
79
60.7k
  /* 470 */ "mula.ad.lh\t\0"
80
60.7k
  /* 482 */ "mul.ad.lh\t\0"
81
60.7k
  /* 493 */ "muls.ad.lh\t\0"
82
60.7k
  /* 505 */ "mula.dd.lh\t\0"
83
60.7k
  /* 517 */ "mul.dd.lh\t\0"
84
60.7k
  /* 528 */ "muls.dd.lh\t\0"
85
60.7k
  /* 540 */ "mulsh\t\0"
86
60.7k
  /* 547 */ "muluh\t\0"
87
60.7k
  /* 554 */ "s32c1i\t\0"
88
60.7k
  /* 562 */ "_l32i\t\0"
89
60.7k
  /* 569 */ "_s32i\t\0"
90
60.7k
  /* 576 */ "s16i\t\0"
91
60.7k
  /* 582 */ "s8i\t\0"
92
60.7k
  /* 587 */ "srai\t\0"
93
60.7k
  /* 593 */ "ssai\t\0"
94
60.7k
  /* 599 */ "bbci\t\0"
95
60.7k
  /* 605 */ "addi\t\0"
96
60.7k
  /* 611 */ "bgei\t\0"
97
60.7k
  /* 617 */ "bnei\t\0"
98
60.7k
  /* 623 */ "rfi\t\0"
99
60.7k
  /* 628 */ "_slli\t\0"
100
60.7k
  /* 635 */ "_srli\t\0"
101
60.7k
  /* 642 */ "addmi\t\0"
102
60.7k
  /* 649 */ "beqi\t\0"
103
60.7k
  /* 655 */ "l16si\t\0"
104
60.7k
  /* 662 */ "bbsi\t\0"
105
60.7k
  /* 668 */ "lsi\t\0"
106
60.7k
  /* 673 */ "ssi\t\0"
107
60.7k
  /* 678 */ "waiti\t\0"
108
60.7k
  /* 685 */ "blti\t\0"
109
60.7k
  /* 691 */ "l16ui\t\0"
110
60.7k
  /* 698 */ "l8ui\t\0"
111
60.7k
  /* 704 */ "bgeui\t\0"
112
60.7k
  /* 711 */ "bltui\t\0"
113
60.7k
  /* 718 */ "extui\t\0"
114
60.7k
  /* 725 */ "_movi\t\0"
115
60.7k
  /* 732 */ "j\t\0"
116
60.7k
  /* 735 */ "break\t\0"
117
60.7k
  /* 742 */ "ssa8l\t\0"
118
60.7k
  /* 749 */ "mula.aa.hl\t\0"
119
60.7k
  /* 761 */ "umul.aa.hl\t\0"
120
60.7k
  /* 773 */ "muls.aa.hl\t\0"
121
60.7k
  /* 785 */ "mula.da.hl\t\0"
122
60.7k
  /* 797 */ "mul.da.hl\t\0"
123
60.7k
  /* 808 */ "muls.da.hl\t\0"
124
60.7k
  /* 820 */ "mula.ad.hl\t\0"
125
60.7k
  /* 832 */ "mul.ad.hl\t\0"
126
60.7k
  /* 843 */ "muls.ad.hl\t\0"
127
60.7k
  /* 855 */ "mula.dd.hl\t\0"
128
60.7k
  /* 867 */ "mul.dd.hl\t\0"
129
60.7k
  /* 878 */ "muls.dd.hl\t\0"
130
60.7k
  /* 890 */ "rsil\t\0"
131
60.7k
  /* 896 */ "mula.aa.ll\t\0"
132
60.7k
  /* 908 */ "umul.aa.ll\t\0"
133
60.7k
  /* 920 */ "muls.aa.ll\t\0"
134
60.7k
  /* 932 */ "mula.da.ll\t\0"
135
60.7k
  /* 944 */ "mul.da.ll\t\0"
136
60.7k
  /* 955 */ "muls.da.ll\t\0"
137
60.7k
  /* 967 */ "mula.ad.ll\t\0"
138
60.7k
  /* 979 */ "mul.ad.ll\t\0"
139
60.7k
  /* 990 */ "muls.ad.ll\t\0"
140
60.7k
  /* 1002 */ "mula.dd.ll\t\0"
141
60.7k
  /* 1014 */ "mul.dd.ll\t\0"
142
60.7k
  /* 1025 */ "muls.dd.ll\t\0"
143
60.7k
  /* 1037 */ "ball\t\0"
144
60.7k
  /* 1043 */ "bnall\t\0"
145
60.7k
  /* 1050 */ "sll\t\0"
146
60.7k
  /* 1055 */ "mull\t\0"
147
60.7k
  /* 1061 */ "srl\t\0"
148
60.7k
  /* 1066 */ "ssl\t\0"
149
60.7k
  /* 1071 */ "add.n\t\0"
150
60.7k
  /* 1078 */ "_l32i.n\t\0"
151
60.7k
  /* 1087 */ "_s32i.n\t\0"
152
60.7k
  /* 1096 */ "addi.n\t\0"
153
60.7k
  /* 1104 */ "movi.n\t\0"
154
60.7k
  /* 1112 */ "break.n\t\0"
155
60.7k
  /* 1121 */ "mov.n\t\0"
156
60.7k
  /* 1128 */ "ee.get_gpio_in\t\0"
157
60.7k
  /* 1144 */ "min\t\0"
158
60.7k
  /* 1149 */ "lsip\t\0"
159
60.7k
  /* 1155 */ "ssip\t\0"
160
60.7k
  /* 1161 */ "loop\t\0"
161
60.7k
  /* 1167 */ "movsp\t\0"
162
60.7k
  /* 1174 */ "lsxp\t\0"
163
60.7k
  /* 1180 */ "ssxp\t\0"
164
60.7k
  /* 1186 */ "beq\t\0"
165
60.7k
  /* 1191 */ "l32r\t\0"
166
60.7k
  /* 1197 */ "rer\t\0"
167
60.7k
  /* 1202 */ "wer\t\0"
168
60.7k
  /* 1207 */ "rfr\t\0"
169
60.7k
  /* 1212 */ "wfr\t\0"
170
60.7k
  /* 1217 */ "xor\t\0"
171
60.7k
  /* 1222 */ "rsr\t\0"
172
60.7k
  /* 1227 */ "ssr\t\0"
173
60.7k
  /* 1232 */ "wsr\t\0"
174
60.7k
  /* 1237 */ "xsr\t\0"
175
60.7k
  /* 1242 */ "rur\t\0"
176
60.7k
  /* 1247 */ "wur\t\0"
177
60.7k
  /* 1252 */ "recip0.s\t\0"
178
60.7k
  /* 1262 */ "rsqrt0.s\t\0"
179
60.7k
  /* 1272 */ "div0.s\t\0"
180
60.7k
  /* 1280 */ "nexp01.s\t\0"
181
60.7k
  /* 1290 */ "msub.s\t\0"
182
60.7k
  /* 1298 */ "utrunc.s\t\0"
183
60.7k
  /* 1308 */ "madd.s\t\0"
184
60.7k
  /* 1316 */ "round.s\t\0"
185
60.7k
  /* 1325 */ "ole.s\t\0"
186
60.7k
  /* 1332 */ "ule.s\t\0"
187
60.7k
  /* 1339 */ "movf.s\t\0"
188
60.7k
  /* 1347 */ "neg.s\t\0"
189
60.7k
  /* 1354 */ "mkdadj.s\t\0"
190
60.7k
  /* 1364 */ "mksadj.s\t\0"
191
60.7k
  /* 1374 */ "ceil.s\t\0"
192
60.7k
  /* 1382 */ "mul.s\t\0"
193
60.7k
  /* 1389 */ "addexpm.s\t\0"
194
60.7k
  /* 1400 */ "maddn.s\t\0"
195
60.7k
  /* 1409 */ "un.s\t\0"
196
60.7k
  /* 1415 */ "divn.s\t\0"
197
60.7k
  /* 1423 */ "addexp.s\t\0"
198
60.7k
  /* 1433 */ "oeq.s\t\0"
199
60.7k
  /* 1440 */ "ueq.s\t\0"
200
60.7k
  /* 1447 */ "floor.s\t\0"
201
60.7k
  /* 1456 */ "abs.s\t\0"
202
60.7k
  /* 1463 */ "ufloat.s\t\0"
203
60.7k
  /* 1473 */ "olt.s\t\0"
204
60.7k
  /* 1480 */ "ult.s\t\0"
205
60.7k
  /* 1487 */ "const.s\t\0"
206
60.7k
  /* 1496 */ "movt.s\t\0"
207
60.7k
  /* 1504 */ "mov.s\t\0"
208
60.7k
  /* 1511 */ "movgez.s\t\0"
209
60.7k
  /* 1521 */ "movnez.s\t\0"
210
60.7k
  /* 1531 */ "moveqz.s\t\0"
211
60.7k
  /* 1541 */ "movltz.s\t\0"
212
60.7k
  /* 1551 */ "mul16s\t\0"
213
60.7k
  /* 1559 */ "abs\t\0"
214
60.7k
  /* 1564 */ "bbs\t\0"
215
60.7k
  /* 1569 */ "rems\t\0"
216
60.7k
  /* 1575 */ "quos\t\0"
217
60.7k
  /* 1581 */ "clamps\t\0"
218
60.7k
  /* 1589 */ "bt\t\0"
219
60.7k
  /* 1593 */ "blt\t\0"
220
60.7k
  /* 1598 */ "ee.wr_mask_gpio_out\t\0"
221
60.7k
  /* 1619 */ "ee.clr_bit_gpio_out\t\0"
222
60.7k
  /* 1640 */ "ee.set_bit_gpio_out\t\0"
223
60.7k
  /* 1661 */ "movt\t\0"
224
60.7k
  /* 1667 */ "sext\t\0"
225
60.7k
  /* 1673 */ "mul16u\t\0"
226
60.7k
  /* 1681 */ "nsau\t\0"
227
60.7k
  /* 1687 */ "bgeu\t\0"
228
60.7k
  /* 1693 */ "remu\t\0"
229
60.7k
  /* 1699 */ "minu\t\0"
230
60.7k
  /* 1705 */ "quou\t\0"
231
60.7k
  /* 1711 */ "bltu\t\0"
232
60.7k
  /* 1717 */ "maxu\t\0"
233
60.7k
  /* 1723 */ "rotw\t\0"
234
60.7k
  /* 1729 */ "max\t\0"
235
60.7k
  /* 1734 */ "ee.zero.accx\t\0"
236
60.7k
  /* 1748 */ "jx\t\0"
237
60.7k
  /* 1752 */ "lsx\t\0"
238
60.7k
  /* 1757 */ "ssx\t\0"
239
60.7k
  /* 1762 */ "bany\t\0"
240
60.7k
  /* 1768 */ "entry\t\0"
241
60.7k
  /* 1775 */ "bgez\t\0"
242
60.7k
  /* 1781 */ "movgez\t\0"
243
60.7k
  /* 1789 */ "bnez\t\0"
244
60.7k
  /* 1795 */ "loopnez\t\0"
245
60.7k
  /* 1804 */ "movnez\t\0"
246
60.7k
  /* 1812 */ "beqz\t\0"
247
60.7k
  /* 1818 */ "moveqz\t\0"
248
60.7k
  /* 1826 */ "loopgtz\t\0"
249
60.7k
  /* 1835 */ "bltz\t\0"
250
60.7k
  /* 1841 */ "movltz\t\0"
251
60.7k
  /* 1849 */ "rur.ua_state_0\t \0"
252
60.7k
  /* 1866 */ "wur.ua_state_0\t \0"
253
60.7k
  /* 1883 */ "rur.qacc_h_0\t \0"
254
60.7k
  /* 1898 */ "wur.qacc_h_0\t \0"
255
60.7k
  /* 1913 */ "rur.qacc_l_0\t \0"
256
60.7k
  /* 1928 */ "wur.qacc_l_0\t \0"
257
60.7k
  /* 1943 */ "rur.accx_0\t \0"
258
60.7k
  /* 1956 */ "wur.accx_0\t \0"
259
60.7k
  /* 1969 */ "rur.ua_state_1\t \0"
260
60.7k
  /* 1986 */ "wur.ua_state_1\t \0"
261
60.7k
  /* 2003 */ "rur.qacc_h_1\t \0"
262
60.7k
  /* 2018 */ "wur.qacc_h_1\t \0"
263
60.7k
  /* 2033 */ "rur.qacc_l_1\t \0"
264
60.7k
  /* 2048 */ "wur.qacc_l_1\t \0"
265
60.7k
  /* 2063 */ "rur.accx_1\t \0"
266
60.7k
  /* 2076 */ "wur.accx_1\t \0"
267
60.7k
  /* 2089 */ "ee.vldbc.32\t \0"
268
60.7k
  /* 2103 */ "ee.vsl.32\t \0"
269
60.7k
  /* 2115 */ "ee.vunzip.32\t \0"
270
60.7k
  /* 2130 */ "ee.vzip.32\t \0"
271
60.7k
  /* 2143 */ "ee.ldxq.32\t \0"
272
60.7k
  /* 2156 */ "ee.stxq.32\t \0"
273
60.7k
  /* 2169 */ "ee.vsr.32\t \0"
274
60.7k
  /* 2181 */ "ee.vmin.s32\t \0"
275
60.7k
  /* 2195 */ "ee.vcmp.eq.s32\t \0"
276
60.7k
  /* 2212 */ "ee.vsubs.s32\t \0"
277
60.7k
  /* 2227 */ "ee.vadds.s32\t \0"
278
60.7k
  /* 2242 */ "ee.vcmp.gt.s32\t \0"
279
60.7k
  /* 2259 */ "ee.vcmp.lt.s32\t \0"
280
60.7k
  /* 2276 */ "ee.vmax.s32\t \0"
281
60.7k
  /* 2290 */ "rur.ua_state_2\t \0"
282
60.7k
  /* 2307 */ "wur.ua_state_2\t \0"
283
60.7k
  /* 2324 */ "rur.qacc_h_2\t \0"
284
60.7k
  /* 2339 */ "wur.qacc_h_2\t \0"
285
60.7k
  /* 2354 */ "rur.qacc_l_2\t \0"
286
60.7k
  /* 2369 */ "wur.qacc_l_2\t \0"
287
60.7k
  /* 2384 */ "rur.ua_state_3\t \0"
288
60.7k
  /* 2401 */ "wur.ua_state_3\t \0"
289
60.7k
  /* 2418 */ "rur.qacc_h_3\t \0"
290
60.7k
  /* 2433 */ "wur.qacc_h_3\t \0"
291
60.7k
  /* 2448 */ "rur.qacc_l_3\t \0"
292
60.7k
  /* 2463 */ "wur.qacc_l_3\t \0"
293
60.7k
  /* 2478 */ "rur.qacc_h_4\t \0"
294
60.7k
  /* 2493 */ "wur.qacc_h_4\t \0"
295
60.7k
  /* 2508 */ "rur.qacc_l_4\t \0"
296
60.7k
  /* 2523 */ "wur.qacc_l_4\t \0"
297
60.7k
  /* 2538 */ "ee.vldbc.16\t \0"
298
60.7k
  /* 2552 */ "ee.vunzip.16\t \0"
299
60.7k
  /* 2567 */ "ee.vzip.16\t \0"
300
60.7k
  /* 2580 */ "ee.fft.r2bf.s16\t \0"
301
60.7k
  /* 2598 */ "ee.cmul.s16\t \0"
302
60.7k
  /* 2612 */ "ee.vmul.s16\t \0"
303
60.7k
  /* 2626 */ "ee.vmin.s16\t \0"
304
60.7k
  /* 2640 */ "ee.vcmp.eq.s16\t \0"
305
60.7k
  /* 2657 */ "ee.vsubs.s16\t \0"
306
60.7k
  /* 2672 */ "ee.vadds.s16\t \0"
307
60.7k
  /* 2687 */ "ee.vcmp.gt.s16\t \0"
308
60.7k
  /* 2704 */ "ee.vcmp.lt.s16\t \0"
309
60.7k
  /* 2721 */ "ee.vprelu.s16\t \0"
310
60.7k
  /* 2737 */ "ee.vrelu.s16\t \0"
311
60.7k
  /* 2752 */ "ee.vmax.s16\t \0"
312
60.7k
  /* 2766 */ "ee.vmul.u16\t \0"
313
60.7k
  /* 2780 */ "ee.vldbc.8\t \0"
314
60.7k
  /* 2793 */ "ee.vunzip.8\t \0"
315
60.7k
  /* 2807 */ "ee.vzip.8\t \0"
316
60.7k
  /* 2819 */ "ee.vmul.s8\t \0"
317
60.7k
  /* 2832 */ "ee.vmin.s8\t \0"
318
60.7k
  /* 2845 */ "ee.vcmp.eq.s8\t \0"
319
60.7k
  /* 2861 */ "ee.vsubs.s8\t \0"
320
60.7k
  /* 2875 */ "ee.vadds.s8\t \0"
321
60.7k
  /* 2889 */ "ee.vcmp.gt.s8\t \0"
322
60.7k
  /* 2905 */ "ee.vcmp.lt.s8\t \0"
323
60.7k
  /* 2921 */ "ee.vprelu.s8\t \0"
324
60.7k
  /* 2936 */ "ee.vrelu.s8\t \0"
325
60.7k
  /* 2950 */ "ee.vmax.s8\t \0"
326
60.7k
  /* 2963 */ "ee.vmul.u8\t \0"
327
60.7k
  /* 2976 */ "ee.movi.32.a\t \0"
328
60.7k
  /* 2991 */ "ee.srcmb.s16.qacc\t \0"
329
60.7k
  /* 3011 */ "ee.vsmulas.s16.qacc\t \0"
330
60.7k
  /* 3033 */ "ee.vmulas.s16.qacc\t \0"
331
60.7k
  /* 3054 */ "ee.mov.s16.qacc\t \0"
332
60.7k
  /* 3072 */ "ee.vmulas.u16.qacc\t \0"
333
60.7k
  /* 3093 */ "ee.mov.u16.qacc\t \0"
334
60.7k
  /* 3111 */ "ee.srcmb.s8.qacc\t \0"
335
60.7k
  /* 3130 */ "ee.vsmulas.s8.qacc\t \0"
336
60.7k
  /* 3151 */ "ee.vmulas.s8.qacc\t \0"
337
60.7k
  /* 3171 */ "ee.mov.s8.qacc\t \0"
338
60.7k
  /* 3188 */ "ee.vmulas.u8.qacc\t \0"
339
60.7k
  /* 3208 */ "ee.mov.u8.qacc\t \0"
340
60.7k
  /* 3225 */ "mula.da.hh.lddec\t \0"
341
60.7k
  /* 3244 */ "mula.dd.hh.lddec\t \0"
342
60.7k
  /* 3263 */ "mula.da.lh.lddec\t \0"
343
60.7k
  /* 3282 */ "mula.dd.lh.lddec\t \0"
344
60.7k
  /* 3301 */ "mula.da.hl.lddec\t \0"
345
60.7k
  /* 3320 */ "mula.dd.hl.lddec\t \0"
346
60.7k
  /* 3339 */ "mula.da.ll.lddec\t \0"
347
60.7k
  /* 3358 */ "mula.dd.ll.lddec\t \0"
348
60.7k
  /* 3377 */ "mula.da.hh.ldinc\t \0"
349
60.7k
  /* 3396 */ "mula.dd.hh.ldinc\t \0"
350
60.7k
  /* 3415 */ "mula.da.lh.ldinc\t \0"
351
60.7k
  /* 3434 */ "mula.dd.lh.ldinc\t \0"
352
60.7k
  /* 3453 */ "mula.da.hl.ldinc\t \0"
353
60.7k
  /* 3472 */ "mula.dd.hl.ldinc\t \0"
354
60.7k
  /* 3491 */ "mula.da.ll.ldinc\t \0"
355
60.7k
  /* 3510 */ "mula.dd.ll.ldinc\t \0"
356
60.7k
  /* 3529 */ "rur.sar_byte\t \0"
357
60.7k
  /* 3544 */ "wur.sar_byte\t \0"
358
60.7k
  /* 3559 */ "rur.fft_bit_width\t \0"
359
60.7k
  /* 3579 */ "wur.fft_bit_width\t \0"
360
60.7k
  /* 3599 */ "ee.fft.ams.s16.ld.r32.decp\t \0"
361
60.7k
  /* 3628 */ "ee.fft.vst.r32.decp\t \0"
362
60.7k
  /* 3650 */ "ee.vldhbc.16.incp\t \0"
363
60.7k
  /* 3670 */ "ee.vmulas.s16.qacc.ldbc.incp\t \0"
364
60.7k
  /* 3701 */ "ee.vmulas.u16.qacc.ldbc.incp\t \0"
365
60.7k
  /* 3732 */ "ee.vmulas.s8.qacc.ldbc.incp\t \0"
366
60.7k
  /* 3762 */ "ee.vmulas.u8.qacc.ldbc.incp\t \0"
367
60.7k
  /* 3792 */ "ee.vmin.s32.ld.incp\t \0"
368
60.7k
  /* 3814 */ "ee.vsubs.s32.ld.incp\t \0"
369
60.7k
  /* 3837 */ "ee.vadds.s32.ld.incp\t \0"
370
60.7k
  /* 3860 */ "ee.vmax.s32.ld.incp\t \0"
371
60.7k
  /* 3882 */ "ee.cmul.s16.ld.incp\t \0"
372
60.7k
  /* 3904 */ "ee.vmul.s16.ld.incp\t \0"
373
60.7k
  /* 3926 */ "ee.vmin.s16.ld.incp\t \0"
374
60.7k
  /* 3948 */ "ee.vsubs.s16.ld.incp\t \0"
375
60.7k
  /* 3971 */ "ee.vadds.s16.ld.incp\t \0"
376
60.7k
  /* 3994 */ "ee.fft.ams.s16.ld.incp\t \0"
377
60.7k
  /* 4019 */ "ee.vmax.s16.ld.incp\t \0"
378
60.7k
  /* 4041 */ "ee.vmul.u16.ld.incp\t \0"
379
60.7k
  /* 4063 */ "ee.vmul.s8.ld.incp\t \0"
380
60.7k
  /* 4084 */ "ee.vmin.s8.ld.incp\t \0"
381
60.7k
  /* 4105 */ "ee.vsubs.s8.ld.incp\t \0"
382
60.7k
  /* 4127 */ "ee.vadds.s8.ld.incp\t \0"
383
60.7k
  /* 4149 */ "ee.vmax.s8.ld.incp\t \0"
384
60.7k
  /* 4170 */ "ee.vmul.u8.ld.incp\t \0"
385
60.7k
  /* 4191 */ "ee.vsmulas.s16.qacc.ld.incp\t \0"
386
60.7k
  /* 4221 */ "ee.vsmulas.s8.qacc.ld.incp\t \0"
387
60.7k
  /* 4250 */ "ee.vmin.s32.st.incp\t \0"
388
60.7k
  /* 4272 */ "ee.vsubs.s32.st.incp\t \0"
389
60.7k
  /* 4295 */ "ee.vadds.s32.st.incp\t \0"
390
60.7k
  /* 4318 */ "ee.vmax.s32.st.incp\t \0"
391
60.7k
  /* 4340 */ "ee.fft.r2bf.s16.st.incp\t \0"
392
60.7k
  /* 4366 */ "ee.cmul.s16.st.incp\t \0"
393
60.7k
  /* 4388 */ "ee.vmul.s16.st.incp\t \0"
394
60.7k
  /* 4410 */ "ee.vmin.s16.st.incp\t \0"
395
60.7k
  /* 4432 */ "ee.vsubs.s16.st.incp\t \0"
396
60.7k
  /* 4455 */ "ee.vadds.s16.st.incp\t \0"
397
60.7k
  /* 4478 */ "ee.fft.ams.s16.st.incp\t \0"
398
60.7k
  /* 4503 */ "ee.vmax.s16.st.incp\t \0"
399
60.7k
  /* 4525 */ "ee.vmul.u16.st.incp\t \0"
400
60.7k
  /* 4547 */ "ee.srcq.128.st.incp\t \0"
401
60.7k
  /* 4569 */ "ee.vmul.s8.st.incp\t \0"
402
60.7k
  /* 4590 */ "ee.vmin.s8.st.incp\t \0"
403
60.7k
  /* 4611 */ "ee.vsubs.s8.st.incp\t \0"
404
60.7k
  /* 4633 */ "ee.vadds.s8.st.incp\t \0"
405
60.7k
  /* 4655 */ "ee.vmax.s8.st.incp\t \0"
406
60.7k
  /* 4676 */ "ee.vmul.u8.st.incp\t \0"
407
60.7k
  /* 4697 */ "ee.vldbc.32.ip\t \0"
408
60.7k
  /* 4714 */ "ee.ld.qacc_h.h.32.ip\t \0"
409
60.7k
  /* 4737 */ "ee.st.qacc_h.h.32.ip\t \0"
410
60.7k
  /* 4760 */ "ee.ld.qacc_l.h.32.ip\t \0"
411
60.7k
  /* 4783 */ "ee.st.qacc_l.h.32.ip\t \0"
412
60.7k
  /* 4806 */ "ee.ldf.64.ip\t \0"
413
60.7k
  /* 4821 */ "ee.stf.64.ip\t \0"
414
60.7k
  /* 4836 */ "ee.vld.h.64.ip\t \0"
415
60.7k
  /* 4853 */ "ee.vst.h.64.ip\t \0"
416
60.7k
  /* 4870 */ "ee.vld.l.64.ip\t \0"
417
60.7k
  /* 4887 */ "ee.vst.l.64.ip\t \0"
418
60.7k
  /* 4904 */ "ee.vldbc.16.ip\t \0"
419
60.7k
  /* 4921 */ "ee.vldbc.8.ip\t \0"
420
60.7k
  /* 4937 */ "ee.ldqa.s16.128.ip\t \0"
421
60.7k
  /* 4958 */ "ee.ldqa.u16.128.ip\t \0"
422
60.7k
  /* 4979 */ "ee.ldqa.s8.128.ip\t \0"
423
60.7k
  /* 4999 */ "ee.ldqa.u8.128.ip\t \0"
424
60.7k
  /* 5019 */ "ee.vld.128.ip\t \0"
425
60.7k
  /* 5035 */ "ee.ldf.128.ip\t \0"
426
60.7k
  /* 5051 */ "ee.stf.128.ip\t \0"
427
60.7k
  /* 5067 */ "ee.ld.qacc_h.l.128.ip\t \0"
428
60.7k
  /* 5091 */ "ee.st.qacc_h.l.128.ip\t \0"
429
60.7k
  /* 5115 */ "ee.ld.qacc_l.l.128.ip\t \0"
430
60.7k
  /* 5139 */ "ee.st.qacc_l.l.128.ip\t \0"
431
60.7k
  /* 5163 */ "ee.vst.128.ip\t \0"
432
60.7k
  /* 5179 */ "ee.vmulas.s16.qacc.ld.ip\t \0"
433
60.7k
  /* 5206 */ "ee.vmulas.u16.qacc.ld.ip\t \0"
434
60.7k
  /* 5233 */ "ee.vmulas.s8.qacc.ld.ip\t \0"
435
60.7k
  /* 5259 */ "ee.vmulas.u8.qacc.ld.ip\t \0"
436
60.7k
  /* 5285 */ "ee.src.q.ld.ip\t \0"
437
60.7k
  /* 5302 */ "ee.vmulas.s16.accx.ld.ip\t \0"
438
60.7k
  /* 5329 */ "ee.vmulas.u16.accx.ld.ip\t \0"
439
60.7k
  /* 5356 */ "ee.vmulas.s8.accx.ld.ip\t \0"
440
60.7k
  /* 5382 */ "ee.vmulas.u8.accx.ld.ip\t \0"
441
60.7k
  /* 5408 */ "ee.ld.ua_state.ip\t \0"
442
60.7k
  /* 5428 */ "ee.st.ua_state.ip\t \0"
443
60.7k
  /* 5448 */ "ee.ld.128.usar.ip\t \0"
444
60.7k
  /* 5468 */ "ee.ld.accx.ip\t \0"
445
60.7k
  /* 5484 */ "ee.st.accx.ip\t \0"
446
60.7k
  /* 5500 */ "ee.fft.ams.s16.ld.incp.uaup\t \0"
447
60.7k
  /* 5530 */ "ee.vmulas.s16.qacc.ldbc.incp.qup\t \0"
448
60.7k
  /* 5565 */ "ee.vmulas.u16.qacc.ldbc.incp.qup\t \0"
449
60.7k
  /* 5600 */ "ee.vmulas.s8.qacc.ldbc.incp.qup\t \0"
450
60.7k
  /* 5634 */ "ee.vmulas.u8.qacc.ldbc.incp.qup\t \0"
451
60.7k
  /* 5668 */ "ee.vmulas.s16.qacc.ld.ip.qup\t \0"
452
60.7k
  /* 5699 */ "ee.vmulas.u16.qacc.ld.ip.qup\t \0"
453
60.7k
  /* 5730 */ "ee.vmulas.s8.qacc.ld.ip.qup\t \0"
454
60.7k
  /* 5760 */ "ee.vmulas.u8.qacc.ld.ip.qup\t \0"
455
60.7k
  /* 5790 */ "ee.vmulas.s16.accx.ld.ip.qup\t \0"
456
60.7k
  /* 5821 */ "ee.vmulas.u16.accx.ld.ip.qup\t \0"
457
60.7k
  /* 5852 */ "ee.vmulas.s8.accx.ld.ip.qup\t \0"
458
60.7k
  /* 5882 */ "ee.vmulas.u8.accx.ld.ip.qup\t \0"
459
60.7k
  /* 5912 */ "ee.vmulas.s16.qacc.ld.xp.qup\t \0"
460
60.7k
  /* 5943 */ "ee.vmulas.u16.qacc.ld.xp.qup\t \0"
461
60.7k
  /* 5974 */ "ee.vmulas.s8.qacc.ld.xp.qup\t \0"
462
60.7k
  /* 6004 */ "ee.vmulas.u8.qacc.ld.xp.qup\t \0"
463
60.7k
  /* 6034 */ "ee.vmulas.s16.accx.ld.xp.qup\t \0"
464
60.7k
  /* 6065 */ "ee.vmulas.u16.accx.ld.xp.qup\t \0"
465
60.7k
  /* 6096 */ "ee.vmulas.s8.accx.ld.xp.qup\t \0"
466
60.7k
  /* 6126 */ "ee.vmulas.u8.accx.ld.xp.qup\t \0"
467
60.7k
  /* 6156 */ "ee.src.q.qup\t \0"
468
60.7k
  /* 6171 */ "ee.vldbc.32.xp\t \0"
469
60.7k
  /* 6188 */ "ee.ldf.64.xp\t \0"
470
60.7k
  /* 6203 */ "ee.stf.64.xp\t \0"
471
60.7k
  /* 6218 */ "ee.vld.h.64.xp\t \0"
472
60.7k
  /* 6235 */ "ee.vst.h.64.xp\t \0"
473
60.7k
  /* 6252 */ "ee.vld.l.64.xp\t \0"
474
60.7k
  /* 6269 */ "ee.vst.l.64.xp\t \0"
475
60.7k
  /* 6286 */ "ee.vldbc.16.xp\t \0"
476
60.7k
  /* 6303 */ "ee.vldbc.8.xp\t \0"
477
60.7k
  /* 6319 */ "ee.ldqa.s16.128.xp\t \0"
478
60.7k
  /* 6340 */ "ee.ldqa.u16.128.xp\t \0"
479
60.7k
  /* 6361 */ "ee.ldqa.s8.128.xp\t \0"
480
60.7k
  /* 6381 */ "ee.ldqa.u8.128.xp\t \0"
481
60.7k
  /* 6401 */ "ee.vld.128.xp\t \0"
482
60.7k
  /* 6417 */ "ee.ldf.128.xp\t \0"
483
60.7k
  /* 6433 */ "ee.stf.128.xp\t \0"
484
60.7k
  /* 6449 */ "ee.vst.128.xp\t \0"
485
60.7k
  /* 6465 */ "ee.fft.cmul.s16.ld.xp\t \0"
486
60.7k
  /* 6489 */ "ee.vmulas.s16.qacc.ld.xp\t \0"
487
60.7k
  /* 6516 */ "ee.vmulas.u16.qacc.ld.xp\t \0"
488
60.7k
  /* 6543 */ "ee.vmulas.s8.qacc.ld.xp\t \0"
489
60.7k
  /* 6569 */ "ee.vmulas.u8.qacc.ld.xp\t \0"
490
60.7k
  /* 6595 */ "ee.src.q.ld.xp\t \0"
491
60.7k
  /* 6612 */ "ee.vmulas.s16.accx.ld.xp\t \0"
492
60.7k
  /* 6639 */ "ee.vmulas.u16.accx.ld.xp\t \0"
493
60.7k
  /* 6666 */ "ee.vmulas.s8.accx.ld.xp\t \0"
494
60.7k
  /* 6692 */ "ee.vmulas.u8.accx.ld.xp\t \0"
495
60.7k
  /* 6718 */ "ee.ld.128.usar.xp\t \0"
496
60.7k
  /* 6738 */ "ee.fft.cmul.s16.st.xp\t \0"
497
60.7k
  /* 6762 */ "ee.movi.32.q\t \0"
498
60.7k
  /* 6777 */ "ee.src.q\t \0"
499
60.7k
  /* 6788 */ "ee.zero.q\t \0"
500
60.7k
  /* 6800 */ "ee.slci.2q\t \0"
501
60.7k
  /* 6813 */ "ee.srci.2q\t \0"
502
60.7k
  /* 6826 */ "ee.slcxxp.2q\t \0"
503
60.7k
  /* 6841 */ "ee.srcxxp.2q\t \0"
504
60.7k
  /* 6856 */ "ee.andq\t \0"
505
60.7k
  /* 6866 */ "ee.orq\t \0"
506
60.7k
  /* 6875 */ "ee.xorq\t \0"
507
60.7k
  /* 6885 */ "ee.notq\t \0"
508
60.7k
  /* 6895 */ "mv.qr\t \0"
509
60.7k
  /* 6903 */ "wur.fsr\t \0"
510
60.7k
  /* 6913 */ "rur.gpio_out\t \0"
511
60.7k
  /* 6928 */ "wur.gpio_out\t \0"
512
60.7k
  /* 6943 */ "ee.bitrev\t \0"
513
60.7k
  /* 6955 */ "ee.vmulas.s16.accx\t \0"
514
60.7k
  /* 6976 */ "ee.vmulas.u16.accx\t \0"
515
60.7k
  /* 6997 */ "ee.vmulas.s8.accx\t \0"
516
60.7k
  /* 7017 */ "ee.vmulas.u8.accx\t \0"
517
60.7k
  /* 7037 */ "ee.srs.accx\t \0"
518
60.7k
  /* 7051 */ "!xtensa_wsr_m0_p, \0"
519
60.7k
  /* 7070 */ "!xtensa_xsr_m0_p, \0"
520
60.7k
  /* 7089 */ "!xtensa_wsr_m1_p, \0"
521
60.7k
  /* 7108 */ "!xtensa_xsr_m1_p, \0"
522
60.7k
  /* 7127 */ "!atomic_load_sub_32_p, \0"
523
60.7k
  /* 7151 */ "!xtensa_ee_vldbc_32_p, \0"
524
60.7k
  /* 7175 */ "!atomic_load_add_32_p, \0"
525
60.7k
  /* 7199 */ "!atomic_load_and_32_p, \0"
526
60.7k
  /* 7223 */ "!atomic_load_nand_32_p, \0"
527
60.7k
  /* 7248 */ "!xtensa_ee_vsl_32_p, \0"
528
60.7k
  /* 7270 */ "!atomic_load_min_32_p, \0"
529
60.7k
  /* 7294 */ "!atomic_load_umin_32_p, \0"
530
60.7k
  /* 7319 */ "!atomic_swap_32_p, \0"
531
60.7k
  /* 7339 */ "!atomic_cmp_swap_32_p, \0"
532
60.7k
  /* 7363 */ "!xtensa_ee_vunzip_32_p, \0"
533
60.7k
  /* 7388 */ "!xtensa_ee_vzip_32_p, \0"
534
60.7k
  /* 7411 */ "!xtensa_ee_ldxq_32_p, \0"
535
60.7k
  /* 7434 */ "!xtensa_ee_stxq_32_p, \0"
536
60.7k
  /* 7457 */ "!atomic_load_or_32_p, \0"
537
60.7k
  /* 7480 */ "!atomic_load_xor_32_p, \0"
538
60.7k
  /* 7504 */ "!xtensa_ee_vsr_32_p, \0"
539
60.7k
  /* 7526 */ "!atomic_load_max_32_p, \0"
540
60.7k
  /* 7550 */ "!atomic_load_umax_32_p, \0"
541
60.7k
  /* 7575 */ "!xtensa_ee_vmin_s32_p, \0"
542
60.7k
  /* 7599 */ "!xtensa_ee_vcmp_eq_s32_p, \0"
543
60.7k
  /* 7626 */ "!xtensa_ee_vsubs_s32_p, \0"
544
60.7k
  /* 7651 */ "!xtensa_ee_vadds_s32_p, \0"
545
60.7k
  /* 7676 */ "!xtensa_ee_vcmp_gt_s32_p, \0"
546
60.7k
  /* 7703 */ "!xtensa_ee_vcmp_lt_s32_p, \0"
547
60.7k
  /* 7730 */ "!xtensa_ee_vmax_s32_p, \0"
548
60.7k
  /* 7754 */ "!xtensa_wsr_m2_p, \0"
549
60.7k
  /* 7773 */ "!xtensa_xsr_m2_p, \0"
550
60.7k
  /* 7792 */ "!xtensa_wsr_m3_p, \0"
551
60.7k
  /* 7811 */ "!xtensa_xsr_m3_p, \0"
552
60.7k
  /* 7830 */ "!atomic_load_sub_16_p, \0"
553
60.7k
  /* 7854 */ "!xtensa_ee_vldbc_16_p, \0"
554
60.7k
  /* 7878 */ "!atomic_load_add_16_p, \0"
555
60.7k
  /* 7902 */ "!atomic_load_and_16_p, \0"
556
60.7k
  /* 7926 */ "!atomic_load_nand_16_p, \0"
557
60.7k
  /* 7951 */ "!atomic_load_min_16_p, \0"
558
60.7k
  /* 7975 */ "!atomic_load_umin_16_p, \0"
559
60.7k
  /* 8000 */ "!atomic_swap_16_p, \0"
560
60.7k
  /* 8020 */ "!atomic_cmp_swap_16_p, \0"
561
60.7k
  /* 8044 */ "!xtensa_ee_vunzip_16_p, \0"
562
60.7k
  /* 8069 */ "!xtensa_ee_vzip_16_p, \0"
563
60.7k
  /* 8092 */ "!atomic_load_or_16_p, \0"
564
60.7k
  /* 8115 */ "!atomic_load_xor_16_p, \0"
565
60.7k
  /* 8139 */ "!atomic_load_max_16_p, \0"
566
60.7k
  /* 8163 */ "!atomic_load_umax_16_p, \0"
567
60.7k
  /* 8188 */ "!xtensa_ee_fft_r2bf_s16_p, \0"
568
60.7k
  /* 8216 */ "!xtensa_ee_cmul_s16_p, \0"
569
60.7k
  /* 8240 */ "!xtensa_ee_vmul_s16_p, \0"
570
60.7k
  /* 8264 */ "!xtensa_ee_vmin_s16_p, \0"
571
60.7k
  /* 8288 */ "!xtensa_ee_vcmp_eq_s16_p, \0"
572
60.7k
  /* 8315 */ "!xtensa_ee_vsubs_s16_p, \0"
573
60.7k
  /* 8340 */ "!xtensa_ee_vadds_s16_p, \0"
574
60.7k
  /* 8365 */ "!xtensa_ee_vcmp_gt_s16_p, \0"
575
60.7k
  /* 8392 */ "!xtensa_ee_vcmp_lt_s16_p, \0"
576
60.7k
  /* 8419 */ "!xtensa_ee_vprelu_s16_p, \0"
577
60.7k
  /* 8445 */ "!xtensa_ee_vrelu_s16_p, \0"
578
60.7k
  /* 8470 */ "!xtensa_ee_vmax_s16_p, \0"
579
60.7k
  /* 8494 */ "!xtensa_ee_vmul_u16_p, \0"
580
60.7k
  /* 8518 */ "!atomic_load_sub_8_p, \0"
581
60.7k
  /* 8541 */ "!xtensa_ee_vldbc_8_p, \0"
582
60.7k
  /* 8564 */ "!atomic_load_add_8_p, \0"
583
60.7k
  /* 8587 */ "!atomic_load_and_8_p, \0"
584
60.7k
  /* 8610 */ "!atomic_load_nand_8_p, \0"
585
60.7k
  /* 8634 */ "!atomic_load_min_8_p, \0"
586
60.7k
  /* 8657 */ "!atomic_load_umin_8_p, \0"
587
60.7k
  /* 8681 */ "!atomic_swap_8_p, \0"
588
60.7k
  /* 8700 */ "!atomic_cmp_swap_8_p, \0"
589
60.7k
  /* 8723 */ "!xtensa_ee_vunzip_8_p, \0"
590
60.7k
  /* 8747 */ "!xtensa_ee_vzip_8_p, \0"
591
60.7k
  /* 8769 */ "!atomic_load_or_8_p, \0"
592
60.7k
  /* 8791 */ "!atomic_load_xor_8_p, \0"
593
60.7k
  /* 8814 */ "!atomic_load_max_8_p, \0"
594
60.7k
  /* 8837 */ "!atomic_load_umax_8_p, \0"
595
60.7k
  /* 8861 */ "!xtensa_ee_vmul_s8_p, \0"
596
60.7k
  /* 8884 */ "!xtensa_ee_vmin_s8_p, \0"
597
60.7k
  /* 8907 */ "!xtensa_ee_vcmp_eq_s8_p, \0"
598
60.7k
  /* 8933 */ "!xtensa_ee_vsubs_s8_p, \0"
599
60.7k
  /* 8957 */ "!xtensa_ee_vadds_s8_p, \0"
600
60.7k
  /* 8981 */ "!xtensa_ee_vcmp_gt_s8_p, \0"
601
60.7k
  /* 9007 */ "!xtensa_ee_vcmp_lt_s8_p, \0"
602
60.7k
  /* 9033 */ "!xtensa_ee_vprelu_s8_p, \0"
603
60.7k
  /* 9058 */ "!xtensa_ee_vrelu_s8_p, \0"
604
60.7k
  /* 9082 */ "!xtensa_ee_vmax_s8_p, \0"
605
60.7k
  /* 9105 */ "!xtensa_ee_vmul_u8_p, \0"
606
60.7k
  /* 9128 */ "!xtensa_ee_movi_32_a_p, \0"
607
60.7k
  /* 9153 */ "!xtensa_ee_srcmb_s16_qacc_p, \0"
608
60.7k
  /* 9183 */ "!xtensa_ee_vsmulas_s16_qacc_p, \0"
609
60.7k
  /* 9215 */ "!xtensa_ee_vmulas_s16_qacc_p, \0"
610
60.7k
  /* 9246 */ "!xtensa_ee_mov_s16_qacc_p, \0"
611
60.7k
  /* 9274 */ "!xtensa_ee_vmulas_u16_qacc_p, \0"
612
60.7k
  /* 9305 */ "!xtensa_ee_mov_u16_qacc_p, \0"
613
60.7k
  /* 9333 */ "!xtensa_ee_srcmb_s8_qacc_p, \0"
614
60.7k
  /* 9362 */ "!xtensa_ee_vsmulas_s8_qacc_p, \0"
615
60.7k
  /* 9393 */ "!xtensa_ee_vmulas_s8_qacc_p, \0"
616
60.7k
  /* 9423 */ "!xtensa_ee_mov_s8_qacc_p, \0"
617
60.7k
  /* 9450 */ "!xtensa_ee_vmulas_u8_qacc_p, \0"
618
60.7k
  /* 9480 */ "!xtensa_ee_mov_u8_qacc_p, \0"
619
60.7k
  /* 9507 */ "!xtensa_lddec_p, \0"
620
60.7k
  /* 9525 */ "!xtensa_mula_da_hh_lddec_p, \0"
621
60.7k
  /* 9554 */ "!xtensa_mula_dd_hh_lddec_p, \0"
622
60.7k
  /* 9583 */ "!xtensa_mula_da_lh_lddec_p, \0"
623
60.7k
  /* 9612 */ "!xtensa_mula_dd_lh_lddec_p, \0"
624
60.7k
  /* 9641 */ "!xtensa_mula_da_hl_lddec_p, \0"
625
60.7k
  /* 9670 */ "!xtensa_mula_dd_hl_lddec_p, \0"
626
60.7k
  /* 9699 */ "!xtensa_mula_da_ll_lddec_p, \0"
627
60.7k
  /* 9728 */ "!xtensa_mula_dd_ll_lddec_p, \0"
628
60.7k
  /* 9757 */ "!xtensa_ldinc_p, \0"
629
60.7k
  /* 9775 */ "!xtensa_mula_da_hh_ldinc_p, \0"
630
60.7k
  /* 9804 */ "!xtensa_mula_dd_hh_ldinc_p, \0"
631
60.7k
  /* 9833 */ "!xtensa_mula_da_lh_ldinc_p, \0"
632
60.7k
  /* 9862 */ "!xtensa_mula_dd_lh_ldinc_p, \0"
633
60.7k
  /* 9891 */ "!xtensa_mula_da_hl_ldinc_p, \0"
634
60.7k
  /* 9920 */ "!xtensa_mula_dd_hl_ldinc_p, \0"
635
60.7k
  /* 9949 */ "!xtensa_mula_da_ll_ldinc_p, \0"
636
60.7k
  /* 9978 */ "!xtensa_mula_dd_ll_ldinc_p, \0"
637
60.7k
  /* 10007 */ "!xtensa_wsr_acchi_p, \0"
638
60.7k
  /* 10029 */ "!xtensa_xsr_acchi_p, \0"
639
60.7k
  /* 10051 */ "!xtensa_wsr_acclo_p, \0"
640
60.7k
  /* 10073 */ "!xtensa_xsr_acclo_p, \0"
641
60.7k
  /* 10095 */ "!xtensa_ee_fft_ams_s16_ld_r32_decp_p, \0"
642
60.7k
  /* 10134 */ "!xtensa_ee_fft_vst_r32_decp_p, \0"
643
60.7k
  /* 10166 */ "!xtensa_ee_vldhbc_16_incp_p, \0"
644
60.7k
  /* 10196 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_p, \0"
645
60.7k
  /* 10237 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_p, \0"
646
60.7k
  /* 10278 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_p, \0"
647
60.7k
  /* 10318 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_p, \0"
648
60.7k
  /* 10358 */ "!xtensa_ee_vmin_s32_ld_incp_p, \0"
649
60.7k
  /* 10390 */ "!xtensa_ee_vsubs_s32_ld_incp_p, \0"
650
60.7k
  /* 10423 */ "!xtensa_ee_vadds_s32_ld_incp_p, \0"
651
60.7k
  /* 10456 */ "!xtensa_ee_vmax_s32_ld_incp_p, \0"
652
60.7k
  /* 10488 */ "!xtensa_ee_cmul_s16_ld_incp_p, \0"
653
60.7k
  /* 10520 */ "!xtensa_ee_vmul_s16_ld_incp_p, \0"
654
60.7k
  /* 10552 */ "!xtensa_ee_vmin_s16_ld_incp_p, \0"
655
60.7k
  /* 10584 */ "!xtensa_ee_vsubs_s16_ld_incp_p, \0"
656
60.7k
  /* 10617 */ "!xtensa_ee_vadds_s16_ld_incp_p, \0"
657
60.7k
  /* 10650 */ "!xtensa_ee_fft_ams_s16_ld_incp_p, \0"
658
60.7k
  /* 10685 */ "!xtensa_ee_vmax_s16_ld_incp_p, \0"
659
60.7k
  /* 10717 */ "!xtensa_ee_vmul_u16_ld_incp_p, \0"
660
60.7k
  /* 10749 */ "!xtensa_ee_vmul_s8_ld_incp_p, \0"
661
60.7k
  /* 10780 */ "!xtensa_ee_vmin_s8_ld_incp_p, \0"
662
60.7k
  /* 10811 */ "!xtensa_ee_vsubs_s8_ld_incp_p, \0"
663
60.7k
  /* 10843 */ "!xtensa_ee_vadds_s8_ld_incp_p, \0"
664
60.7k
  /* 10875 */ "!xtensa_ee_vmax_s8_ld_incp_p, \0"
665
60.7k
  /* 10906 */ "!xtensa_ee_vmul_u8_ld_incp_p, \0"
666
60.7k
  /* 10937 */ "!xtensa_ee_vsmulas_s16_qacc_ld_incp_p, \0"
667
60.7k
  /* 10977 */ "!xtensa_ee_vsmulas_s8_qacc_ld_incp_p, \0"
668
60.7k
  /* 11016 */ "!xtensa_ee_vmin_s32_st_incp_p, \0"
669
60.7k
  /* 11048 */ "!xtensa_ee_vsubs_s32_st_incp_p, \0"
670
60.7k
  /* 11081 */ "!xtensa_ee_vadds_s32_st_incp_p, \0"
671
60.7k
  /* 11114 */ "!xtensa_ee_vmax_s32_st_incp_p, \0"
672
60.7k
  /* 11146 */ "!xtensa_ee_fft_r2bf_s16_st_incp_p, \0"
673
60.7k
  /* 11182 */ "!xtensa_ee_cmul_s16_st_incp_p, \0"
674
60.7k
  /* 11214 */ "!xtensa_ee_vmul_s16_st_incp_p, \0"
675
60.7k
  /* 11246 */ "!xtensa_ee_vmin_s16_st_incp_p, \0"
676
60.7k
  /* 11278 */ "!xtensa_ee_vsubs_s16_st_incp_p, \0"
677
60.7k
  /* 11311 */ "!xtensa_ee_vadds_s16_st_incp_p, \0"
678
60.7k
  /* 11344 */ "!xtensa_ee_fft_ams_s16_st_incp_p, \0"
679
60.7k
  /* 11379 */ "!xtensa_ee_vmax_s16_st_incp_p, \0"
680
60.7k
  /* 11411 */ "!xtensa_ee_vmul_u16_st_incp_p, \0"
681
60.7k
  /* 11443 */ "!xtensa_ee_srcq_128_st_incp_p, \0"
682
60.7k
  /* 11475 */ "!xtensa_ee_vmul_s8_st_incp_p, \0"
683
60.7k
  /* 11506 */ "!xtensa_ee_vmin_s8_st_incp_p, \0"
684
60.7k
  /* 11537 */ "!xtensa_ee_vsubs_s8_st_incp_p, \0"
685
60.7k
  /* 11569 */ "!xtensa_ee_vadds_s8_st_incp_p, \0"
686
60.7k
  /* 11601 */ "!xtensa_ee_vmax_s8_st_incp_p, \0"
687
60.7k
  /* 11632 */ "!xtensa_ee_vmul_u8_st_incp_p, \0"
688
60.7k
  /* 11663 */ "!xtensa_ee_vldbc_32_ip_p, \0"
689
60.7k
  /* 11690 */ "!xtensa_ee_ld_qacc_h_h_32_ip_p, \0"
690
60.7k
  /* 11723 */ "!xtensa_ee_st_qacc_h_h_32_ip_p, \0"
691
60.7k
  /* 11756 */ "!xtensa_ee_ld_qacc_l_h_32_ip_p, \0"
692
60.7k
  /* 11789 */ "!xtensa_ee_st_qacc_l_h_32_ip_p, \0"
693
60.7k
  /* 11822 */ "!xtensa_ee_ldf_64_ip_p, \0"
694
60.7k
  /* 11847 */ "!xtensa_ee_stf_64_ip_p, \0"
695
60.7k
  /* 11872 */ "!xtensa_ee_vld_h_64_ip_p, \0"
696
60.7k
  /* 11899 */ "!xtensa_ee_vst_h_64_ip_p, \0"
697
60.7k
  /* 11926 */ "!xtensa_ee_vld_l_64_ip_p, \0"
698
60.7k
  /* 11953 */ "!xtensa_ee_vst_l_64_ip_p, \0"
699
60.7k
  /* 11980 */ "!xtensa_ee_vldbc_16_ip_p, \0"
700
60.7k
  /* 12007 */ "!xtensa_ee_ldqa_s16_128_ip_p, \0"
701
60.7k
  /* 12038 */ "!xtensa_ee_ldqa_u16_128_ip_p, \0"
702
60.7k
  /* 12069 */ "!xtensa_ee_ldqa_s8_128_ip_p, \0"
703
60.7k
  /* 12099 */ "!xtensa_ee_ldqa_u8_128_ip_p, \0"
704
60.7k
  /* 12129 */ "!xtensa_ee_vld_128_ip_p, \0"
705
60.7k
  /* 12155 */ "!xtensa_ee_ldf_128_ip_p, \0"
706
60.7k
  /* 12181 */ "!xtensa_ee_stf_128_ip_p, \0"
707
60.7k
  /* 12207 */ "!xtensa_ee_ld_qacc_h_l_128_ip_p, \0"
708
60.7k
  /* 12241 */ "!xtensa_ee_st_qacc_h_l_128_ip_p, \0"
709
60.7k
  /* 12275 */ "!xtensa_ee_ld_qacc_l_l_128_ip_p, \0"
710
60.7k
  /* 12309 */ "!xtensa_ee_st_qacc_l_l_128_ip_p, \0"
711
60.7k
  /* 12343 */ "!xtensa_ee_vst_128_ip_p, \0"
712
60.7k
  /* 12369 */ "!xtensa_ee_vldbc_8_ip_p, \0"
713
60.7k
  /* 12395 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_p, \0"
714
60.7k
  /* 12432 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_p, \0"
715
60.7k
  /* 12469 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_p, \0"
716
60.7k
  /* 12505 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_p, \0"
717
60.7k
  /* 12541 */ "!xtensa_ee_src_q_ld_ip_p, \0"
718
60.7k
  /* 12568 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_p, \0"
719
60.7k
  /* 12605 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_p, \0"
720
60.7k
  /* 12642 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_p, \0"
721
60.7k
  /* 12678 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_p, \0"
722
60.7k
  /* 12714 */ "!xtensa_ee_ld_ua_state_ip_p, \0"
723
60.7k
  /* 12744 */ "!xtensa_ee_st_ua_state_ip_p, \0"
724
60.7k
  /* 12774 */ "!xtensa_ee_ld_128_usar_ip_p, \0"
725
60.7k
  /* 12804 */ "!xtensa_ee_ld_accx_ip_p, \0"
726
60.7k
  /* 12830 */ "!xtensa_ee_st_accx_ip_p, \0"
727
60.7k
  /* 12856 */ "!xtensa_ee_fft_ams_s16_ld_incp_uaup_p, \0"
728
60.7k
  /* 12896 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_qup_p, \0"
729
60.7k
  /* 12941 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_qup_p, \0"
730
60.7k
  /* 12986 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_qup_p, \0"
731
60.7k
  /* 13030 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_qup_p, \0"
732
60.7k
  /* 13074 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_qup_p, \0"
733
60.7k
  /* 13115 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_qup_p, \0"
734
60.7k
  /* 13156 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_qup_p, \0"
735
60.7k
  /* 13196 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_qup_p, \0"
736
60.7k
  /* 13236 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_qup_p, \0"
737
60.7k
  /* 13277 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_qup_p, \0"
738
60.7k
  /* 13318 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_qup_p, \0"
739
60.7k
  /* 13358 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_qup_p, \0"
740
60.7k
  /* 13398 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_qup_p, \0"
741
60.7k
  /* 13439 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_qup_p, \0"
742
60.7k
  /* 13480 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_qup_p, \0"
743
60.7k
  /* 13520 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_qup_p, \0"
744
60.7k
  /* 13560 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_qup_p, \0"
745
60.7k
  /* 13601 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_qup_p, \0"
746
60.7k
  /* 13642 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_qup_p, \0"
747
60.7k
  /* 13682 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_qup_p, \0"
748
60.7k
  /* 13722 */ "!xtensa_ee_src_q_qup_p, \0"
749
60.7k
  /* 13747 */ "!xtensa_ee_vldbc_32_xp_p, \0"
750
60.7k
  /* 13774 */ "!xtensa_ee_ldf_64_xp_p, \0"
751
60.7k
  /* 13799 */ "!xtensa_ee_stf_64_xp_p, \0"
752
60.7k
  /* 13824 */ "!xtensa_ee_vld_h_64_xp_p, \0"
753
60.7k
  /* 13851 */ "!xtensa_ee_vst_h_64_xp_p, \0"
754
60.7k
  /* 13878 */ "!xtensa_ee_vld_l_64_xp_p, \0"
755
60.7k
  /* 13905 */ "!xtensa_ee_vst_l_64_xp_p, \0"
756
60.7k
  /* 13932 */ "!xtensa_ee_vldbc_16_xp_p, \0"
757
60.7k
  /* 13959 */ "!xtensa_ee_ldqa_s16_128_xp_p, \0"
758
60.7k
  /* 13990 */ "!xtensa_ee_ldqa_u16_128_xp_p, \0"
759
60.7k
  /* 14021 */ "!xtensa_ee_ldqa_s8_128_xp_p, \0"
760
60.7k
  /* 14051 */ "!xtensa_ee_ldqa_u8_128_xp_p, \0"
761
60.7k
  /* 14081 */ "!xtensa_ee_vld_128_xp_p, \0"
762
60.7k
  /* 14107 */ "!xtensa_ee_ldf_128_xp_p, \0"
763
60.7k
  /* 14133 */ "!xtensa_ee_stf_128_xp_p, \0"
764
60.7k
  /* 14159 */ "!xtensa_ee_vst_128_xp_p, \0"
765
60.7k
  /* 14185 */ "!xtensa_ee_vldbc_8_xp_p, \0"
766
60.7k
  /* 14211 */ "!xtensa_ee_fft_cmul_s16_ld_xp_p, \0"
767
60.7k
  /* 14245 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_p, \0"
768
60.7k
  /* 14282 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_p, \0"
769
60.7k
  /* 14319 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_p, \0"
770
60.7k
  /* 14355 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_p, \0"
771
60.7k
  /* 14391 */ "!xtensa_ee_src_q_ld_xp_p, \0"
772
60.7k
  /* 14418 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_p, \0"
773
60.7k
  /* 14455 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_p, \0"
774
60.7k
  /* 14492 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_p, \0"
775
60.7k
  /* 14528 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_p, \0"
776
60.7k
  /* 14564 */ "!xtensa_ee_ld_128_usar_xp_p, \0"
777
60.7k
  /* 14594 */ "!xtensa_ee_fft_cmul_s16_st_xp_p, \0"
778
60.7k
  /* 14628 */ "!xtensa_ee_slci_2q_p, \0"
779
60.7k
  /* 14651 */ "!xtensa_ee_srci_2q_p, \0"
780
60.7k
  /* 14674 */ "!xtensa_ee_slcxxp_2q_p, \0"
781
60.7k
  /* 14699 */ "!xtensa_ee_srcxxp_2q_p, \0"
782
60.7k
  /* 14724 */ "!xtensa_ee_movi_32_q_p, \0"
783
60.7k
  /* 14749 */ "!xtensa_ee_src_q_p, \0"
784
60.7k
  /* 14770 */ "!xtensa_ee_zero_q_p, \0"
785
60.7k
  /* 14792 */ "!xtensa_ee_andq_p, \0"
786
60.7k
  /* 14812 */ "!xtensa_ee_orq_p, \0"
787
60.7k
  /* 14831 */ "!xtensa_ee_xorq_p, \0"
788
60.7k
  /* 14851 */ "!xtensa_ee_notq_p, \0"
789
60.7k
  /* 14871 */ "!xtensa_mv_qr_p, \0"
790
60.7k
  /* 14889 */ "!br_jt_p, \0"
791
60.7k
  /* 14900 */ "!xtensa_ee_bitrev_p, \0"
792
60.7k
  /* 14922 */ "!xtensa_ee_vmulas_s16_accx_p, \0"
793
60.7k
  /* 14953 */ "!xtensa_ee_vmulas_u16_accx_p, \0"
794
60.7k
  /* 14984 */ "!xtensa_ee_vmulas_s8_accx_p, \0"
795
60.7k
  /* 15014 */ "!xtensa_ee_vmulas_u8_accx_p, \0"
796
60.7k
  /* 15044 */ "!xtensa_ee_srs_accx_p, \0"
797
60.7k
  /* 15068 */ "ae_movad16.0 \0"
798
60.7k
  /* 15082 */ "ae_nsaz16.0 \0"
799
60.7k
  /* 15095 */ "ae_mulaf16ss.00 \0"
800
60.7k
  /* 15112 */ "ae_mulf16ss.00 \0"
801
60.7k
  /* 15128 */ "ae_mulsf16ss.00 \0"
802
60.7k
  /* 15145 */ "ae_mulaafd16ss.11_00 \0"
803
60.7k
  /* 15167 */ "ae_mulzaafd16ss.11_00 \0"
804
60.7k
  /* 15190 */ "ae_mulssfd16ss.11_00 \0"
805
60.7k
  /* 15212 */ "ae_mulzssfd16ss.11_00 \0"
806
60.7k
  /* 15235 */ "ae_sext32x2d16.10 \0"
807
60.7k
  /* 15254 */ "ae_cvt32x2f16.10 \0"
808
60.7k
  /* 15272 */ "ae_mulaf16ss.10 \0"
809
60.7k
  /* 15289 */ "ae_mulf16ss.10 \0"
810
60.7k
  /* 15305 */ "ae_mulsf16ss.10 \0"
811
60.7k
  /* 15322 */ "ae_mulaf16ss.20 \0"
812
60.7k
  /* 15339 */ "ae_mulf16ss.20 \0"
813
60.7k
  /* 15355 */ "ae_mulsf16ss.20 \0"
814
60.7k
  /* 15372 */ "ae_mulaf16ss.30 \0"
815
60.7k
  /* 15389 */ "ae_mulf16ss.30 \0"
816
60.7k
  /* 15405 */ "ae_mulsf16ss.30 \0"
817
60.7k
  /* 15422 */ "rur.ae_cend0 \0"
818
60.7k
  /* 15436 */ "wur.ae_cend0 \0"
819
60.7k
  /* 15450 */ "ae_mula32x16.h0 \0"
820
60.7k
  /* 15467 */ "ae_mulaf32x16.h0 \0"
821
60.7k
  /* 15485 */ "ae_mulf32x16.h0 \0"
822
60.7k
  /* 15502 */ "ae_mulsf32x16.h0 \0"
823
60.7k
  /* 15520 */ "ae_mul32x16.h0 \0"
824
60.7k
  /* 15536 */ "ae_muls32x16.h0 \0"
825
60.7k
  /* 15553 */ "ae_mulaad32x16.h1.l0 \0"
826
60.7k
  /* 15575 */ "ae_mulzaad32x16.h1.l0 \0"
827
60.7k
  /* 15598 */ "ae_mulsad32x16.h1.l0 \0"
828
60.7k
  /* 15620 */ "ae_mulzsad32x16.h1.l0 \0"
829
60.7k
  /* 15643 */ "ae_mulaafd32x16.h1.l0 \0"
830
60.7k
  /* 15666 */ "ae_mulzaafd32x16.h1.l0 \0"
831
60.7k
  /* 15690 */ "ae_mulsafd32x16.h1.l0 \0"
832
60.7k
  /* 15713 */ "ae_mulzsafd32x16.h1.l0 \0"
833
60.7k
  /* 15737 */ "ae_mulasfd32x16.h1.l0 \0"
834
60.7k
  /* 15760 */ "ae_mulzasfd32x16.h1.l0 \0"
835
60.7k
  /* 15784 */ "ae_mulssfd32x16.h1.l0 \0"
836
60.7k
  /* 15807 */ "ae_mulzssfd32x16.h1.l0 \0"
837
60.7k
  /* 15831 */ "ae_mulasd32x16.h1.l0 \0"
838
60.7k
  /* 15853 */ "ae_mulzasd32x16.h1.l0 \0"
839
60.7k
  /* 15876 */ "ae_mulssd32x16.h1.l0 \0"
840
60.7k
  /* 15898 */ "ae_mulzssd32x16.h1.l0 \0"
841
60.7k
  /* 15921 */ "ae_mula32x16.l0 \0"
842
60.7k
  /* 15938 */ "ae_mulaf32x16.l0 \0"
843
60.7k
  /* 15956 */ "ae_mulf32x16.l0 \0"
844
60.7k
  /* 15973 */ "ae_mulsf32x16.l0 \0"
845
60.7k
  /* 15991 */ "ae_mul32x16.l0 \0"
846
60.7k
  /* 16007 */ "ae_muls32x16.l0 \0"
847
60.7k
  /* 16024 */ "rur.ae_cbegin0 \0"
848
60.7k
  /* 16040 */ "wur.ae_cbegin0 \0"
849
60.7k
  /* 16056 */ "ae_movad16.1 \0"
850
60.7k
  /* 16070 */ "ae_mulaf16ss.11 \0"
851
60.7k
  /* 16087 */ "ae_mulf16ss.11 \0"
852
60.7k
  /* 16103 */ "ae_mulsf16ss.11 \0"
853
60.7k
  /* 16120 */ "ae_mulaf16ss.21 \0"
854
60.7k
  /* 16137 */ "ae_mulf16ss.21 \0"
855
60.7k
  /* 16153 */ "ae_mulsf16ss.21 \0"
856
60.7k
  /* 16170 */ "ae_mulaf16ss.31 \0"
857
60.7k
  /* 16187 */ "ae_mulf16ss.31 \0"
858
60.7k
  /* 16203 */ "ae_mulsf16ss.31 \0"
859
60.7k
  /* 16220 */ "ae_mula32x16.h1 \0"
860
60.7k
  /* 16237 */ "ae_mulaf32x16.h1 \0"
861
60.7k
  /* 16255 */ "ae_mulf32x16.h1 \0"
862
60.7k
  /* 16272 */ "ae_mulsf32x16.h1 \0"
863
60.7k
  /* 16290 */ "ae_mul32x16.h1 \0"
864
60.7k
  /* 16306 */ "ae_muls32x16.h1 \0"
865
60.7k
  /* 16323 */ "ae_mulaad32x16.h0.l1 \0"
866
60.7k
  /* 16345 */ "ae_mulzaad32x16.h0.l1 \0"
867
60.7k
  /* 16368 */ "ae_mulaafd32x16.h0.l1 \0"
868
60.7k
  /* 16391 */ "ae_mulzaafd32x16.h0.l1 \0"
869
60.7k
  /* 16415 */ "ae_mula32x16.l1 \0"
870
60.7k
  /* 16432 */ "ae_mulaf32x16.l1 \0"
871
60.7k
  /* 16450 */ "ae_mulf32x16.l1 \0"
872
60.7k
  /* 16467 */ "ae_mulsf32x16.l1 \0"
873
60.7k
  /* 16485 */ "ae_mul32x16.l1 \0"
874
60.7k
  /* 16501 */ "ae_muls32x16.l1 \0"
875
60.7k
  /* 16518 */ "ae_movad16.2 \0"
876
60.7k
  /* 16532 */ "ae_mulaafd16ss.13_02 \0"
877
60.7k
  /* 16554 */ "ae_mulzaafd16ss.13_02 \0"
878
60.7k
  /* 16577 */ "ae_mulssfd16ss.13_02 \0"
879
60.7k
  /* 16599 */ "ae_mulzssfd16ss.13_02 \0"
880
60.7k
  /* 16622 */ "ae_mulaf16ss.22 \0"
881
60.7k
  /* 16639 */ "ae_mulf16ss.22 \0"
882
60.7k
  /* 16655 */ "ae_mulsf16ss.22 \0"
883
60.7k
  /* 16672 */ "ae_mulaafd16ss.33_22 \0"
884
60.7k
  /* 16694 */ "ae_mulzaafd16ss.33_22 \0"
885
60.7k
  /* 16717 */ "ae_mulssfd16ss.33_22 \0"
886
60.7k
  /* 16739 */ "ae_mulzssfd16ss.33_22 \0"
887
60.7k
  /* 16762 */ "ae_sext32x2d16.32 \0"
888
60.7k
  /* 16781 */ "ae_cvt32x2f16.32 \0"
889
60.7k
  /* 16799 */ "ae_mulaf16ss.32 \0"
890
60.7k
  /* 16816 */ "ae_mulf16ss.32 \0"
891
60.7k
  /* 16832 */ "ae_mulsf16ss.32 \0"
892
60.7k
  /* 16849 */ "ae_sra64_32 \0"
893
60.7k
  /* 16862 */ "ae_cvt64a32 \0"
894
60.7k
  /* 16875 */ "ae_cvt48a32 \0"
895
60.7k
  /* 16888 */ "ae_slaa32 \0"
896
60.7k
  /* 16899 */ "ae_sraa32 \0"
897
60.7k
  /* 16910 */ "ae_addbrba32 \0"
898
60.7k
  /* 16924 */ "ae_movda32 \0"
899
60.7k
  /* 16936 */ "ae_sha32 \0"
900
60.7k
  /* 16946 */ "ae_srla32 \0"
901
60.7k
  /* 16957 */ "ae_sub32 \0"
902
60.7k
  /* 16967 */ "ae_addsub32 \0"
903
60.7k
  /* 16980 */ "ae_add32 \0"
904
60.7k
  /* 16990 */ "ae_subadd32 \0"
905
60.7k
  /* 17003 */ "ae_le32 \0"
906
60.7k
  /* 17012 */ "ae_neg32 \0"
907
60.7k
  /* 17022 */ "ae_slai32 \0"
908
60.7k
  /* 17033 */ "ae_srai32 \0"
909
60.7k
  /* 17044 */ "ae_srli32 \0"
910
60.7k
  /* 17055 */ "ae_min32 \0"
911
60.7k
  /* 17065 */ "ae_eq32 \0"
912
60.7k
  /* 17074 */ "ae_pksr32 \0"
913
60.7k
  /* 17085 */ "ae_slas32 \0"
914
60.7k
  /* 17096 */ "ae_sras32 \0"
915
60.7k
  /* 17107 */ "ae_abs32 \0"
916
60.7k
  /* 17117 */ "ae_srls32 \0"
917
60.7k
  /* 17128 */ "ae_lt32 \0"
918
60.7k
  /* 17137 */ "ae_sext32 \0"
919
60.7k
  /* 17148 */ "ae_max32 \0"
920
60.7k
  /* 17158 */ "!movba2 \0"
921
60.7k
  /* 17167 */ "ae_mula32x16.h2 \0"
922
60.7k
  /* 17184 */ "ae_mulaf32x16.h2 \0"
923
60.7k
  /* 17202 */ "ae_mulf32x16.h2 \0"
924
60.7k
  /* 17219 */ "ae_mulsf32x16.h2 \0"
925
60.7k
  /* 17237 */ "ae_mul32x16.h2 \0"
926
60.7k
  /* 17253 */ "ae_muls32x16.h2 \0"
927
60.7k
  /* 17270 */ "ae_mulaad32x16.h3.l2 \0"
928
60.7k
  /* 17292 */ "ae_mulzaad32x16.h3.l2 \0"
929
60.7k
  /* 17315 */ "ae_mulsad32x16.h3.l2 \0"
930
60.7k
  /* 17337 */ "ae_mulzsad32x16.h3.l2 \0"
931
60.7k
  /* 17360 */ "ae_mulaafd32x16.h3.l2 \0"
932
60.7k
  /* 17383 */ "ae_mulzaafd32x16.h3.l2 \0"
933
60.7k
  /* 17407 */ "ae_mulsafd32x16.h3.l2 \0"
934
60.7k
  /* 17430 */ "ae_mulzsafd32x16.h3.l2 \0"
935
60.7k
  /* 17454 */ "ae_mulasfd32x16.h3.l2 \0"
936
60.7k
  /* 17477 */ "ae_mulzasfd32x16.h3.l2 \0"
937
60.7k
  /* 17501 */ "ae_mulssfd32x16.h3.l2 \0"
938
60.7k
  /* 17524 */ "ae_mulzssfd32x16.h3.l2 \0"
939
60.7k
  /* 17548 */ "ae_mulasd32x16.h3.l2 \0"
940
60.7k
  /* 17570 */ "ae_mulzasd32x16.h3.l2 \0"
941
60.7k
  /* 17593 */ "ae_mulssd32x16.h3.l2 \0"
942
60.7k
  /* 17615 */ "ae_mulzssd32x16.h3.l2 \0"
943
60.7k
  /* 17638 */ "ae_mula32x16.l2 \0"
944
60.7k
  /* 17655 */ "ae_mulaf32x16.l2 \0"
945
60.7k
  /* 17673 */ "ae_mulf32x16.l2 \0"
946
60.7k
  /* 17690 */ "ae_mulsf32x16.l2 \0"
947
60.7k
  /* 17708 */ "ae_mul32x16.l2 \0"
948
60.7k
  /* 17724 */ "ae_muls32x16.l2 \0"
949
60.7k
  /* 17741 */ "!extui_br2 \0"
950
60.7k
  /* 17753 */ "ae_mulaf16ss.00_s2 \0"
951
60.7k
  /* 17773 */ "ae_mulf16ss.00_s2 \0"
952
60.7k
  /* 17792 */ "ae_mulsf16ss.00_s2 \0"
953
60.7k
  /* 17812 */ "ae_mulaafd16ss.11_00_s2 \0"
954
60.7k
  /* 17837 */ "ae_mulzaafd16ss.11_00_s2 \0"
955
60.7k
  /* 17863 */ "ae_mulssfd16ss.11_00_s2 \0"
956
60.7k
  /* 17888 */ "ae_mulzssfd16ss.11_00_s2 \0"
957
60.7k
  /* 17914 */ "ae_mula32x16.h0_s2 \0"
958
60.7k
  /* 17934 */ "ae_mulaf32x16.h0_s2 \0"
959
60.7k
  /* 17955 */ "ae_mulf32x16.h0_s2 \0"
960
60.7k
  /* 17975 */ "ae_mulsf32x16.h0_s2 \0"
961
60.7k
  /* 17996 */ "ae_mul32x16.h0_s2 \0"
962
60.7k
  /* 18015 */ "ae_muls32x16.h0_s2 \0"
963
60.7k
  /* 18035 */ "ae_mulaad32x16.h1.l0_s2 \0"
964
60.7k
  /* 18060 */ "ae_mulzaad32x16.h1.l0_s2 \0"
965
60.7k
  /* 18086 */ "ae_mulsad32x16.h1.l0_s2 \0"
966
60.7k
  /* 18111 */ "ae_mulzsad32x16.h1.l0_s2 \0"
967
60.7k
  /* 18137 */ "ae_mulaafd32x16.h1.l0_s2 \0"
968
60.7k
  /* 18163 */ "ae_mulzaafd32x16.h1.l0_s2 \0"
969
60.7k
  /* 18190 */ "ae_mulsafd32x16.h1.l0_s2 \0"
970
60.7k
  /* 18216 */ "ae_mulzsafd32x16.h1.l0_s2 \0"
971
60.7k
  /* 18243 */ "ae_mulasfd32x16.h1.l0_s2 \0"
972
60.7k
  /* 18269 */ "ae_mulzasfd32x16.h1.l0_s2 \0"
973
60.7k
  /* 18296 */ "ae_mulssfd32x16.h1.l0_s2 \0"
974
60.7k
  /* 18322 */ "ae_mulzssfd32x16.h1.l0_s2 \0"
975
60.7k
  /* 18349 */ "ae_mulasd32x16.h1.l0_s2 \0"
976
60.7k
  /* 18374 */ "ae_mulzasd32x16.h1.l0_s2 \0"
977
60.7k
  /* 18400 */ "ae_mulssd32x16.h1.l0_s2 \0"
978
60.7k
  /* 18425 */ "ae_mulzssd32x16.h1.l0_s2 \0"
979
60.7k
  /* 18451 */ "ae_mula32x16.l0_s2 \0"
980
60.7k
  /* 18471 */ "ae_mulaf32x16.l0_s2 \0"
981
60.7k
  /* 18492 */ "ae_mulf32x16.l0_s2 \0"
982
60.7k
  /* 18512 */ "ae_mulsf32x16.l0_s2 \0"
983
60.7k
  /* 18533 */ "ae_mul32x16.l0_s2 \0"
984
60.7k
  /* 18552 */ "ae_muls32x16.l0_s2 \0"
985
60.7k
  /* 18572 */ "ae_mula32x16.h1_s2 \0"
986
60.7k
  /* 18592 */ "ae_mulaf32x16.h1_s2 \0"
987
60.7k
  /* 18613 */ "ae_mulf32x16.h1_s2 \0"
988
60.7k
  /* 18633 */ "ae_mulsf32x16.h1_s2 \0"
989
60.7k
  /* 18654 */ "ae_mul32x16.h1_s2 \0"
990
60.7k
  /* 18673 */ "ae_muls32x16.h1_s2 \0"
991
60.7k
  /* 18693 */ "ae_mulaad32x16.h0.l1_s2 \0"
992
60.7k
  /* 18718 */ "ae_mulzaad32x16.h0.l1_s2 \0"
993
60.7k
  /* 18744 */ "ae_mulaafd32x16.h0.l1_s2 \0"
994
60.7k
  /* 18770 */ "ae_mulzaafd32x16.h0.l1_s2 \0"
995
60.7k
  /* 18797 */ "ae_mula32x16.l1_s2 \0"
996
60.7k
  /* 18817 */ "ae_mulaf32x16.l1_s2 \0"
997
60.7k
  /* 18838 */ "ae_mulf32x16.l1_s2 \0"
998
60.7k
  /* 18858 */ "ae_mulsf32x16.l1_s2 \0"
999
60.7k
  /* 18879 */ "ae_mul32x16.l1_s2 \0"
1000
60.7k
  /* 18898 */ "ae_muls32x16.l1_s2 \0"
1001
60.7k
  /* 18918 */ "ae_mulaafd16ss.13_02_s2 \0"
1002
60.7k
  /* 18943 */ "ae_mulzaafd16ss.13_02_s2 \0"
1003
60.7k
  /* 18969 */ "ae_mulssfd16ss.13_02_s2 \0"
1004
60.7k
  /* 18994 */ "ae_mulzssfd16ss.13_02_s2 \0"
1005
60.7k
  /* 19020 */ "ae_mulaafd16ss.33_22_s2 \0"
1006
60.7k
  /* 19045 */ "ae_mulzaafd16ss.33_22_s2 \0"
1007
60.7k
  /* 19071 */ "ae_mulssfd16ss.33_22_s2 \0"
1008
60.7k
  /* 19096 */ "ae_mulzssfd16ss.33_22_s2 \0"
1009
60.7k
  /* 19122 */ "ae_mula32x16.h2_s2 \0"
1010
60.7k
  /* 19142 */ "ae_mulaf32x16.h2_s2 \0"
1011
60.7k
  /* 19163 */ "ae_mulf32x16.h2_s2 \0"
1012
60.7k
  /* 19183 */ "ae_mulsf32x16.h2_s2 \0"
1013
60.7k
  /* 19204 */ "ae_mul32x16.h2_s2 \0"
1014
60.7k
  /* 19223 */ "ae_muls32x16.h2_s2 \0"
1015
60.7k
  /* 19243 */ "ae_mulaad32x16.h3.l2_s2 \0"
1016
60.7k
  /* 19268 */ "ae_mulzaad32x16.h3.l2_s2 \0"
1017
60.7k
  /* 19294 */ "ae_mulsad32x16.h3.l2_s2 \0"
1018
60.7k
  /* 19319 */ "ae_mulzsad32x16.h3.l2_s2 \0"
1019
60.7k
  /* 19345 */ "ae_mulaafd32x16.h3.l2_s2 \0"
1020
60.7k
  /* 19371 */ "ae_mulzaafd32x16.h3.l2_s2 \0"
1021
60.7k
  /* 19398 */ "ae_mulsafd32x16.h3.l2_s2 \0"
1022
60.7k
  /* 19424 */ "ae_mulzsafd32x16.h3.l2_s2 \0"
1023
60.7k
  /* 19451 */ "ae_mulasfd32x16.h3.l2_s2 \0"
1024
60.7k
  /* 19477 */ "ae_mulzasfd32x16.h3.l2_s2 \0"
1025
60.7k
  /* 19504 */ "ae_mulssfd32x16.h3.l2_s2 \0"
1026
60.7k
  /* 19530 */ "ae_mulzssfd32x16.h3.l2_s2 \0"
1027
60.7k
  /* 19557 */ "ae_mulasd32x16.h3.l2_s2 \0"
1028
60.7k
  /* 19582 */ "ae_mulzasd32x16.h3.l2_s2 \0"
1029
60.7k
  /* 19608 */ "ae_mulssd32x16.h3.l2_s2 \0"
1030
60.7k
  /* 19633 */ "ae_mulzssd32x16.h3.l2_s2 \0"
1031
60.7k
  /* 19659 */ "ae_mula32x16.l2_s2 \0"
1032
60.7k
  /* 19679 */ "ae_mulaf32x16.l2_s2 \0"
1033
60.7k
  /* 19700 */ "ae_mulf32x16.l2_s2 \0"
1034
60.7k
  /* 19720 */ "ae_mulsf32x16.l2_s2 \0"
1035
60.7k
  /* 19741 */ "ae_mul32x16.l2_s2 \0"
1036
60.7k
  /* 19760 */ "ae_muls32x16.l2_s2 \0"
1037
60.7k
  /* 19780 */ "ae_mulap24x2_s2 \0"
1038
60.7k
  /* 19797 */ "ae_mulp24x2_s2 \0"
1039
60.7k
  /* 19813 */ "ae_mulsp24x2_s2 \0"
1040
60.7k
  /* 19830 */ "ae_mula32x16.h3_s2 \0"
1041
60.7k
  /* 19850 */ "ae_mulaf32x16.h3_s2 \0"
1042
60.7k
  /* 19871 */ "ae_mulf32x16.h3_s2 \0"
1043
60.7k
  /* 19891 */ "ae_mulsf32x16.h3_s2 \0"
1044
60.7k
  /* 19912 */ "ae_mul32x16.h3_s2 \0"
1045
60.7k
  /* 19931 */ "ae_muls32x16.h3_s2 \0"
1046
60.7k
  /* 19951 */ "ae_mulaad32x16.h2.l3_s2 \0"
1047
60.7k
  /* 19976 */ "ae_mulzaad32x16.h2.l3_s2 \0"
1048
60.7k
  /* 20002 */ "ae_mulaafd32x16.h2.l3_s2 \0"
1049
60.7k
  /* 20028 */ "ae_mulzaafd32x16.h2.l3_s2 \0"
1050
60.7k
  /* 20055 */ "ae_mula32x16.l3_s2 \0"
1051
60.7k
  /* 20075 */ "ae_mulaf32x16.l3_s2 \0"
1052
60.7k
  /* 20096 */ "ae_mulf32x16.l3_s2 \0"
1053
60.7k
  /* 20116 */ "ae_mulsf32x16.l3_s2 \0"
1054
60.7k
  /* 20137 */ "ae_mul32x16.l3_s2 \0"
1055
60.7k
  /* 20156 */ "ae_muls32x16.l3_s2 \0"
1056
60.7k
  /* 20176 */ "ae_mulafp24x2ra_s2 \0"
1057
60.7k
  /* 20196 */ "ae_mulfp24x2ra_s2 \0"
1058
60.7k
  /* 20215 */ "ae_mulsfp24x2ra_s2 \0"
1059
60.7k
  /* 20235 */ "ae_mulafq32sp24s.h_s2 \0"
1060
60.7k
  /* 20258 */ "ae_mulfq32sp24s.h_s2 \0"
1061
60.7k
  /* 20280 */ "ae_mularfq32sp24s.h_s2 \0"
1062
60.7k
  /* 20304 */ "ae_mulrfq32sp24s.h_s2 \0"
1063
60.7k
  /* 20327 */ "ae_mulsrfq32sp24s.h_s2 \0"
1064
60.7k
  /* 20351 */ "ae_mulsfq32sp24s.h_s2 \0"
1065
60.7k
  /* 20374 */ "ae_mulafp32x16x2ras.h_s2 \0"
1066
60.7k
  /* 20400 */ "ae_mulfp32x16x2ras.h_s2 \0"
1067
60.7k
  /* 20425 */ "ae_mulsfp32x16x2ras.h_s2 \0"
1068
60.7k
  /* 20451 */ "ae_mulafp32x16x2rs.h_s2 \0"
1069
60.7k
  /* 20476 */ "ae_mulfp32x16x2rs.h_s2 \0"
1070
60.7k
  /* 20500 */ "ae_mulsfp32x16x2rs.h_s2 \0"
1071
60.7k
  /* 20525 */ "ae_mulas32f48p16s.hh_s2 \0"
1072
60.7k
  /* 20550 */ "ae_muls32f48p16s.hh_s2 \0"
1073
60.7k
  /* 20574 */ "ae_mulss32f48p16s.hh_s2 \0"
1074
60.7k
  /* 20599 */ "ae_mulaad24.hl.lh_s2 \0"
1075
60.7k
  /* 20621 */ "ae_mulzaad24.hl.lh_s2 \0"
1076
60.7k
  /* 20644 */ "ae_mulaafd24.hl.lh_s2 \0"
1077
60.7k
  /* 20667 */ "ae_mulzaafd24.hl.lh_s2 \0"
1078
60.7k
  /* 20691 */ "ae_mulasfd24.hl.lh_s2 \0"
1079
60.7k
  /* 20714 */ "ae_mulzasfd24.hl.lh_s2 \0"
1080
60.7k
  /* 20738 */ "ae_mulssfd24.hl.lh_s2 \0"
1081
60.7k
  /* 20761 */ "ae_mulzssfd24.hl.lh_s2 \0"
1082
60.7k
  /* 20785 */ "ae_mulasd24.hl.lh_s2 \0"
1083
60.7k
  /* 20807 */ "ae_mulzasd24.hl.lh_s2 \0"
1084
60.7k
  /* 20830 */ "ae_mulssd24.hl.lh_s2 \0"
1085
60.7k
  /* 20852 */ "ae_mulzssd24.hl.lh_s2 \0"
1086
60.7k
  /* 20875 */ "ae_mulas32f48p16s.lh_s2 \0"
1087
60.7k
  /* 20900 */ "ae_muls32f48p16s.lh_s2 \0"
1088
60.7k
  /* 20924 */ "ae_mulss32f48p16s.lh_s2 \0"
1089
60.7k
  /* 20949 */ "ae_mulafq32sp24s.l_s2 \0"
1090
60.7k
  /* 20972 */ "ae_mulfq32sp24s.l_s2 \0"
1091
60.7k
  /* 20994 */ "ae_mularfq32sp24s.l_s2 \0"
1092
60.7k
  /* 21018 */ "ae_mulrfq32sp24s.l_s2 \0"
1093
60.7k
  /* 21041 */ "ae_mulsrfq32sp24s.l_s2 \0"
1094
60.7k
  /* 21065 */ "ae_mulsfq32sp24s.l_s2 \0"
1095
60.7k
  /* 21088 */ "ae_mulaf48q32sp16s.l_s2 \0"
1096
60.7k
  /* 21113 */ "ae_mulf48q32sp16s.l_s2 \0"
1097
60.7k
  /* 21137 */ "ae_mulsf48q32sp16s.l_s2 \0"
1098
60.7k
  /* 21162 */ "ae_mulaq32sp16s.l_s2 \0"
1099
60.7k
  /* 21184 */ "ae_mulq32sp16s.l_s2 \0"
1100
60.7k
  /* 21205 */ "ae_mulsq32sp16s.l_s2 \0"
1101
60.7k
  /* 21227 */ "ae_mulafp32x16x2ras.l_s2 \0"
1102
60.7k
  /* 21253 */ "ae_mulfp32x16x2ras.l_s2 \0"
1103
60.7k
  /* 21278 */ "ae_mulsfp32x16x2ras.l_s2 \0"
1104
60.7k
  /* 21304 */ "ae_mulafp32x16x2rs.l_s2 \0"
1105
60.7k
  /* 21329 */ "ae_mulfp32x16x2rs.l_s2 \0"
1106
60.7k
  /* 21353 */ "ae_mulsfp32x16x2rs.l_s2 \0"
1107
60.7k
  /* 21378 */ "ae_mulaf48q32sp16u.l_s2 \0"
1108
60.7k
  /* 21403 */ "ae_mulf48q32sp16u.l_s2 \0"
1109
60.7k
  /* 21427 */ "ae_mulsf48q32sp16u.l_s2 \0"
1110
60.7k
  /* 21452 */ "ae_mulaq32sp16u.l_s2 \0"
1111
60.7k
  /* 21474 */ "ae_mulq32sp16u.l_s2 \0"
1112
60.7k
  /* 21495 */ "ae_mulsq32sp16u.l_s2 \0"
1113
60.7k
  /* 21517 */ "ae_mula32.ll_s2 \0"
1114
60.7k
  /* 21534 */ "ae_mul32.ll_s2 \0"
1115
60.7k
  /* 21550 */ "ae_mulaad24.hh.ll_s2 \0"
1116
60.7k
  /* 21572 */ "ae_mulzaad24.hh.ll_s2 \0"
1117
60.7k
  /* 21595 */ "ae_mulsad24.hh.ll_s2 \0"
1118
60.7k
  /* 21617 */ "ae_mulzsad24.hh.ll_s2 \0"
1119
60.7k
  /* 21640 */ "ae_mulaafd24.hh.ll_s2 \0"
1120
60.7k
  /* 21663 */ "ae_mulzaafd24.hh.ll_s2 \0"
1121
60.7k
  /* 21687 */ "ae_mulsafd24.hh.ll_s2 \0"
1122
60.7k
  /* 21710 */ "ae_mulzsafd24.hh.ll_s2 \0"
1123
60.7k
  /* 21734 */ "ae_mulasfd24.hh.ll_s2 \0"
1124
60.7k
  /* 21757 */ "ae_mulzasfd24.hh.ll_s2 \0"
1125
60.7k
  /* 21781 */ "ae_mulssfd24.hh.ll_s2 \0"
1126
60.7k
  /* 21804 */ "ae_mulzssfd24.hh.ll_s2 \0"
1127
60.7k
  /* 21828 */ "ae_mulasd24.hh.ll_s2 \0"
1128
60.7k
  /* 21850 */ "ae_mulzasd24.hh.ll_s2 \0"
1129
60.7k
  /* 21873 */ "ae_mulssd24.hh.ll_s2 \0"
1130
60.7k
  /* 21895 */ "ae_mulzssd24.hh.ll_s2 \0"
1131
60.7k
  /* 21918 */ "ae_mulaf32r.ll_s2 \0"
1132
60.7k
  /* 21937 */ "ae_mulf32r.ll_s2 \0"
1133
60.7k
  /* 21955 */ "ae_mulsf32r.ll_s2 \0"
1134
60.7k
  /* 21974 */ "ae_mulaf32s.ll_s2 \0"
1135
60.7k
  /* 21993 */ "ae_mulf32s.ll_s2 \0"
1136
60.7k
  /* 22011 */ "ae_mulas32f48p16s.ll_s2 \0"
1137
60.7k
  /* 22036 */ "ae_muls32f48p16s.ll_s2 \0"
1138
60.7k
  /* 22060 */ "ae_mulss32f48p16s.ll_s2 \0"
1139
60.7k
  /* 22085 */ "ae_mulafp24x2r_s2 \0"
1140
60.7k
  /* 22104 */ "ae_mulfp24x2r_s2 \0"
1141
60.7k
  /* 22122 */ "ae_mulsfp24x2r_s2 \0"
1142
60.7k
  /* 22141 */ "ae_movda32x2 \0"
1143
60.7k
  /* 22155 */ "ae_movf32x2 \0"
1144
60.7k
  /* 22168 */ "ae_mulap32x2 \0"
1145
60.7k
  /* 22182 */ "ae_mulp32x2 \0"
1146
60.7k
  /* 22195 */ "ae_mulsp32x2 \0"
1147
60.7k
  /* 22209 */ "ae_movt32x2 \0"
1148
60.7k
  /* 22222 */ "ae_mulap24x2 \0"
1149
60.7k
  /* 22236 */ "ae_mulp24x2 \0"
1150
60.7k
  /* 22249 */ "ae_mulsp24x2 \0"
1151
60.7k
  /* 22263 */ "ae_movda16x2 \0"
1152
60.7k
  /* 22277 */ "ae_movad16.3 \0"
1153
60.7k
  /* 22291 */ "ae_mulaf16ss.33 \0"
1154
60.7k
  /* 22308 */ "ae_mulf16ss.33 \0"
1155
60.7k
  /* 22324 */ "ae_mulsf16ss.33 \0"
1156
60.7k
  /* 22341 */ "ae_mula32x16.h3 \0"
1157
60.7k
  /* 22358 */ "ae_mulaf32x16.h3 \0"
1158
60.7k
  /* 22376 */ "ae_mulf32x16.h3 \0"
1159
60.7k
  /* 22393 */ "ae_mulsf32x16.h3 \0"
1160
60.7k
  /* 22411 */ "ae_mul32x16.h3 \0"
1161
60.7k
  /* 22427 */ "ae_muls32x16.h3 \0"
1162
60.7k
  /* 22444 */ "ae_mulaad32x16.h2.l3 \0"
1163
60.7k
  /* 22466 */ "ae_mulzaad32x16.h2.l3 \0"
1164
60.7k
  /* 22489 */ "ae_mulaafd32x16.h2.l3 \0"
1165
60.7k
  /* 22512 */ "ae_mulzaafd32x16.h2.l3 \0"
1166
60.7k
  /* 22536 */ "ae_mula32x16.l3 \0"
1167
60.7k
  /* 22553 */ "ae_mulaf32x16.l3 \0"
1168
60.7k
  /* 22571 */ "ae_mulf32x16.l3 \0"
1169
60.7k
  /* 22588 */ "ae_mulsf32x16.l3 \0"
1170
60.7k
  /* 22606 */ "ae_mul32x16.l3 \0"
1171
60.7k
  /* 22622 */ "ae_muls32x16.l3 \0"
1172
60.7k
  /* 22639 */ "ae_mulac24 \0"
1173
60.7k
  /* 22651 */ "ae_mulc24 \0"
1174
60.7k
  /* 22662 */ "ae_slai24 \0"
1175
60.7k
  /* 22673 */ "ae_srai24 \0"
1176
60.7k
  /* 22684 */ "ae_srli24 \0"
1177
60.7k
  /* 22695 */ "ae_pksr24 \0"
1178
60.7k
  /* 22706 */ "ae_slas24 \0"
1179
60.7k
  /* 22717 */ "ae_sras24 \0"
1180
60.7k
  /* 22728 */ "ae_srls24 \0"
1181
60.7k
  /* 22739 */ "ae_slaa64 \0"
1182
60.7k
  /* 22750 */ "ae_sraa64 \0"
1183
60.7k
  /* 22761 */ "ae_srla64 \0"
1184
60.7k
  /* 22772 */ "ae_nsa64 \0"
1185
60.7k
  /* 22782 */ "ae_sub64 \0"
1186
60.7k
  /* 22792 */ "ae_add64 \0"
1187
60.7k
  /* 22802 */ "ae_le64 \0"
1188
60.7k
  /* 22811 */ "ae_movf64 \0"
1189
60.7k
  /* 22822 */ "ae_neg64 \0"
1190
60.7k
  /* 22832 */ "ae_slai64 \0"
1191
60.7k
  /* 22843 */ "ae_srai64 \0"
1192
60.7k
  /* 22854 */ "ae_srli64 \0"
1193
60.7k
  /* 22865 */ "ae_zalign64 \0"
1194
60.7k
  /* 22878 */ "ae_min64 \0"
1195
60.7k
  /* 22888 */ "ae_eq64 \0"
1196
60.7k
  /* 22897 */ "ae_slas64 \0"
1197
60.7k
  /* 22908 */ "ae_sras64 \0"
1198
60.7k
  /* 22919 */ "ae_abs64 \0"
1199
60.7k
  /* 22929 */ "ae_srls64 \0"
1200
60.7k
  /* 22940 */ "ae_lt64 \0"
1201
60.7k
  /* 22949 */ "ae_movt64 \0"
1202
60.7k
  /* 22960 */ "ae_max64 \0"
1203
60.7k
  /* 22970 */ "!movba4 \0"
1204
60.7k
  /* 22979 */ "!extui_br4 \0"
1205
60.7k
  /* 22991 */ "ae_mula16x4 \0"
1206
60.7k
  /* 23004 */ "ae_movf16x4 \0"
1207
60.7k
  /* 23017 */ "ae_mul16x4 \0"
1208
60.7k
  /* 23029 */ "ae_muls16x4 \0"
1209
60.7k
  /* 23042 */ "ae_sat16x4 \0"
1210
60.7k
  /* 23054 */ "ae_movt16x4 \0"
1211
60.7k
  /* 23067 */ "ae_movda16 \0"
1212
60.7k
  /* 23079 */ "ae_sub16 \0"
1213
60.7k
  /* 23089 */ "ae_add16 \0"
1214
60.7k
  /* 23099 */ "ae_le16 \0"
1215
60.7k
  /* 23108 */ "ae_srai16 \0"
1216
60.7k
  /* 23119 */ "ae_eq16 \0"
1217
60.7k
  /* 23128 */ "ae_lt16 \0"
1218
60.7k
  /* 23137 */ "ae_slaaq56 \0"
1219
60.7k
  /* 23149 */ "ae_slasq56 \0"
1220
60.7k
  /* 23161 */ "# SRA_P \0"
1221
60.7k
  /* 23170 */ "!L8I_P \0"
1222
60.7k
  /* 23178 */ "# SLL_P \0"
1223
60.7k
  /* 23187 */ "# SRL_P \0"
1224
60.7k
  /* 23196 */ "!movba \0"
1225
60.7k
  /* 23204 */ "ae_mulafp24x2ra \0"
1226
60.7k
  /* 23221 */ "ae_mulfp24x2ra \0"
1227
60.7k
  /* 23237 */ "ae_mulsfp24x2ra \0"
1228
60.7k
  /* 23254 */ "ae_mulafc24ra \0"
1229
60.7k
  /* 23269 */ "ae_mulfc24ra \0"
1230
60.7k
  /* 23283 */ "ae_db \0"
1231
60.7k
  /* 23290 */ "ae_lb \0"
1232
60.7k
  /* 23297 */ "ae_sb \0"
1233
60.7k
  /* 23304 */ "ae_vldl16c \0"
1234
60.7k
  /* 23316 */ "ae_vles16c \0"
1235
60.7k
  /* 23328 */ "!loopdec \0"
1236
60.7k
  /* 23338 */ "ae_la32x2.ic \0"
1237
60.7k
  /* 23352 */ "ae_sa32x2.ic \0"
1238
60.7k
  /* 23366 */ "ae_la24x2.ic \0"
1239
60.7k
  /* 23380 */ "ae_sa24x2.ic \0"
1240
60.7k
  /* 23394 */ "ae_la24.ic \0"
1241
60.7k
  /* 23406 */ "ae_la32x2f24.ic \0"
1242
60.7k
  /* 23423 */ "ae_sa32x2f24.ic \0"
1243
60.7k
  /* 23440 */ "ae_la16x4.ic \0"
1244
60.7k
  /* 23454 */ "ae_sa16x4.ic \0"
1245
60.7k
  /* 23468 */ "ae_db.ic \0"
1246
60.7k
  /* 23478 */ "ae_sb.ic \0"
1247
60.7k
  /* 23488 */ "ae_vldl16c.ic \0"
1248
60.7k
  /* 23503 */ "ae_vles16c.ic \0"
1249
60.7k
  /* 23518 */ "ae_sbf.ic \0"
1250
60.7k
  /* 23529 */ "ae_dbi.ic \0"
1251
60.7k
  /* 23540 */ "ae_sbi.ic \0"
1252
60.7k
  /* 23551 */ "ae_sa24.l.ic \0"
1253
60.7k
  /* 23565 */ "ae_la32x2.ric \0"
1254
60.7k
  /* 23580 */ "ae_sa32x2.ric \0"
1255
60.7k
  /* 23595 */ "ae_l32x2.ric \0"
1256
60.7k
  /* 23609 */ "ae_s32x2.ric \0"
1257
60.7k
  /* 23623 */ "ae_la24x2.ric \0"
1258
60.7k
  /* 23638 */ "ae_sa24x2.ric \0"
1259
60.7k
  /* 23653 */ "ae_la24.ric \0"
1260
60.7k
  /* 23666 */ "ae_la32x2f24.ric \0"
1261
60.7k
  /* 23684 */ "ae_sa32x2f24.ric \0"
1262
60.7k
  /* 23702 */ "ae_l32x2f24.ric \0"
1263
60.7k
  /* 23719 */ "ae_s32x2f24.ric \0"
1264
60.7k
  /* 23736 */ "ae_la16x4.ric \0"
1265
60.7k
  /* 23751 */ "ae_sa16x4.ric \0"
1266
60.7k
  /* 23766 */ "ae_l16x4.ric \0"
1267
60.7k
  /* 23780 */ "ae_s16x4.ric \0"
1268
60.7k
  /* 23794 */ "ae_sa24.l.ric \0"
1269
60.7k
  /* 23809 */ "ae_la32x2neg.pc \0"
1270
60.7k
  /* 23826 */ "ae_la24x2neg.pc \0"
1271
60.7k
  /* 23843 */ "ae_la24neg.pc \0"
1272
60.7k
  /* 23858 */ "ae_la16x4neg.pc \0"
1273
60.7k
  /* 23875 */ "ae_la32x2pos.pc \0"
1274
60.7k
  /* 23892 */ "ae_la24x2pos.pc \0"
1275
60.7k
  /* 23909 */ "ae_la24pos.pc \0"
1276
60.7k
  /* 23924 */ "ae_la16x4pos.pc \0"
1277
60.7k
  /* 23941 */ "ae_s16.0.xc \0"
1278
60.7k
  /* 23954 */ "ae_l32.xc \0"
1279
60.7k
  /* 23965 */ "ae_l32x2.xc \0"
1280
60.7k
  /* 23978 */ "ae_s32x2.xc \0"
1281
60.7k
  /* 23991 */ "ae_l32f24.xc \0"
1282
60.7k
  /* 24005 */ "ae_l32x2f24.xc \0"
1283
60.7k
  /* 24021 */ "ae_s32x2f24.xc \0"
1284
60.7k
  /* 24037 */ "ae_l64.xc \0"
1285
60.7k
  /* 24048 */ "ae_s64.xc \0"
1286
60.7k
  /* 24059 */ "ae_l16x4.xc \0"
1287
60.7k
  /* 24072 */ "ae_s16x4.xc \0"
1288
60.7k
  /* 24085 */ "ae_l16.xc \0"
1289
60.7k
  /* 24096 */ "ae_s32.l.xc \0"
1290
60.7k
  /* 24109 */ "ae_s32f24.l.xc \0"
1291
60.7k
  /* 24125 */ "ae_s16m.l.xc \0"
1292
60.7k
  /* 24139 */ "ae_l32m.xc \0"
1293
60.7k
  /* 24151 */ "ae_s32m.xc \0"
1294
60.7k
  /* 24163 */ "ae_l16x2m.xc \0"
1295
60.7k
  /* 24177 */ "ae_s16x2m.xc \0"
1296
60.7k
  /* 24191 */ "ae_l16m.xc \0"
1297
60.7k
  /* 24203 */ "ae_s32ra64s.xc \0"
1298
60.7k
  /* 24219 */ "ae_s24ra64s.xc \0"
1299
60.7k
  /* 24235 */ "rur.ae_bithead \0"
1300
60.7k
  /* 24251 */ "wur.ae_bithead \0"
1301
60.7k
  /* 24267 */ "rur.ae_bitsused \0"
1302
60.7k
  /* 24284 */ "wur.ae_bitsused \0"
1303
60.7k
  /* 24301 */ "ae_and \0"
1304
60.7k
  /* 24309 */ "ae_nand \0"
1305
60.7k
  /* 24318 */ "!loopend \0"
1306
60.7k
  /* 24328 */ "rur.ae_searchdone \0"
1307
60.7k
  /* 24347 */ "wur.ae_searchdone \0"
1308
60.7k
  /* 24366 */ "rur.ae_tablesize \0"
1309
60.7k
  /* 24384 */ "wur.ae_tablesize \0"
1310
60.7k
  /* 24402 */ "ae_sbf \0"
1311
60.7k
  /* 24410 */ "ae_div64d32.h \0"
1312
60.7k
  /* 24425 */ "ae_movad32.h \0"
1313
60.7k
  /* 24439 */ "ae_cvt64f32.h \0"
1314
60.7k
  /* 24454 */ "ae_mulap32x16x2.h \0"
1315
60.7k
  /* 24473 */ "ae_mulp32x16x2.h \0"
1316
60.7k
  /* 24491 */ "ae_mulsp32x16x2.h \0"
1317
60.7k
  /* 24510 */ "ae_mulac32x16.h \0"
1318
60.7k
  /* 24527 */ "ae_mulc32x16.h \0"
1319
60.7k
  /* 24543 */ "ae_mulafd24x2.fir.h \0"
1320
60.7k
  /* 24564 */ "ae_mulfd24x2.fir.h \0"
1321
60.7k
  /* 24584 */ "ae_cvtq56p32s.h \0"
1322
60.7k
  /* 24601 */ "ae_cvta32f24s.h \0"
1323
60.7k
  /* 24618 */ "ae_mulafp32x16x2ras.h \0"
1324
60.7k
  /* 24641 */ "ae_mulfp32x16x2ras.h \0"
1325
60.7k
  /* 24663 */ "ae_mulsfp32x16x2ras.h \0"
1326
60.7k
  /* 24686 */ "ae_mulafc32x16ras.h \0"
1327
60.7k
  /* 24707 */ "ae_mulfc32x16ras.h \0"
1328
60.7k
  /* 24727 */ "ae_mulafp32x16x2rs.h \0"
1329
60.7k
  /* 24749 */ "ae_mulfp32x16x2rs.h \0"
1330
60.7k
  /* 24770 */ "ae_mulsfp32x16x2rs.h \0"
1331
60.7k
  /* 24792 */ "ae_mula32.hh \0"
1332
60.7k
  /* 24806 */ "ae_mul32.hh \0"
1333
60.7k
  /* 24819 */ "ae_muls32.hh \0"
1334
60.7k
  /* 24833 */ "ae_mulaf32r.hh \0"
1335
60.7k
  /* 24849 */ "ae_mulf32r.hh \0"
1336
60.7k
  /* 24864 */ "ae_mulsf32r.hh \0"
1337
60.7k
  /* 24880 */ "ae_mulafd32x16x2.fir.hh \0"
1338
60.7k
  /* 24905 */ "ae_mulfd32x16x2.fir.hh \0"
1339
60.7k
  /* 24929 */ "ae_mulaf32s.hh \0"
1340
60.7k
  /* 24945 */ "ae_mulf32s.hh \0"
1341
60.7k
  /* 24960 */ "ae_mulsf32s.hh \0"
1342
60.7k
  /* 24976 */ "ae_mulas32f48p16s.hh \0"
1343
60.7k
  /* 24998 */ "ae_muls32f48p16s.hh \0"
1344
60.7k
  /* 25019 */ "ae_mulss32f48p16s.hh \0"
1345
60.7k
  /* 25041 */ "ae_mula32.lh \0"
1346
60.7k
  /* 25055 */ "ae_mul32.lh \0"
1347
60.7k
  /* 25068 */ "ae_muls32.lh \0"
1348
60.7k
  /* 25082 */ "ae_mulaad24.hl.lh \0"
1349
60.7k
  /* 25101 */ "ae_mulzaad24.hl.lh \0"
1350
60.7k
  /* 25121 */ "ae_mulaafd24.hl.lh \0"
1351
60.7k
  /* 25141 */ "ae_mulzaafd24.hl.lh \0"
1352
60.7k
  /* 25162 */ "ae_mulasfd24.hl.lh \0"
1353
60.7k
  /* 25182 */ "ae_mulzasfd24.hl.lh \0"
1354
60.7k
  /* 25203 */ "ae_mulssfd24.hl.lh \0"
1355
60.7k
  /* 25223 */ "ae_mulzssfd24.hl.lh \0"
1356
60.7k
  /* 25244 */ "ae_mulasd24.hl.lh \0"
1357
60.7k
  /* 25263 */ "ae_mulzasd24.hl.lh \0"
1358
60.7k
  /* 25283 */ "ae_mulssd24.hl.lh \0"
1359
60.7k
  /* 25302 */ "ae_mulzssd24.hl.lh \0"
1360
60.7k
  /* 25322 */ "ae_mulaf32r.lh \0"
1361
60.7k
  /* 25338 */ "ae_mulf32r.lh \0"
1362
60.7k
  /* 25353 */ "ae_mulsf32r.lh \0"
1363
60.7k
  /* 25369 */ "ae_mulafd32x16x2.fir.lh \0"
1364
60.7k
  /* 25394 */ "ae_mulfd32x16x2.fir.lh \0"
1365
60.7k
  /* 25418 */ "ae_mulaf32s.lh \0"
1366
60.7k
  /* 25434 */ "ae_mulf32s.lh \0"
1367
60.7k
  /* 25449 */ "ae_mulsf32s.lh \0"
1368
60.7k
  /* 25465 */ "ae_mulas32f48p16s.lh \0"
1369
60.7k
  /* 25487 */ "ae_muls32f48p16s.lh \0"
1370
60.7k
  /* 25508 */ "ae_mulss32f48p16s.lh \0"
1371
60.7k
  /* 25530 */ "ae_add32_hl_lh \0"
1372
60.7k
  /* 25546 */ "ae_s16.0.i \0"
1373
60.7k
  /* 25558 */ "ae_l32.i \0"
1374
60.7k
  /* 25568 */ "ae_l32x2.i \0"
1375
60.7k
  /* 25580 */ "ae_s32x2.i \0"
1376
60.7k
  /* 25592 */ "ae_l32f24.i \0"
1377
60.7k
  /* 25605 */ "ae_l32x2f24.i \0"
1378
60.7k
  /* 25620 */ "ae_s32x2f24.i \0"
1379
60.7k
  /* 25635 */ "ae_l64.i \0"
1380
60.7k
  /* 25645 */ "ae_lalign64.i \0"
1381
60.7k
  /* 25660 */ "ae_salign64.i \0"
1382
60.7k
  /* 25675 */ "ae_s64.i \0"
1383
60.7k
  /* 25685 */ "ae_l16x4.i \0"
1384
60.7k
  /* 25697 */ "ae_s16x4.i \0"
1385
60.7k
  /* 25709 */ "ae_l16.i \0"
1386
60.7k
  /* 25719 */ "ae_s32.l.i \0"
1387
60.7k
  /* 25731 */ "ae_s32f24.l.i \0"
1388
60.7k
  /* 25746 */ "ae_s16m.l.i \0"
1389
60.7k
  /* 25759 */ "ae_l32m.i \0"
1390
60.7k
  /* 25770 */ "ae_s32m.i \0"
1391
60.7k
  /* 25781 */ "ae_l16x2m.i \0"
1392
60.7k
  /* 25794 */ "ae_s16x2m.i \0"
1393
60.7k
  /* 25807 */ "ae_l16m.i \0"
1394
60.7k
  /* 25818 */ "ae_s32ra64s.i \0"
1395
60.7k
  /* 25833 */ "ae_s24ra64s.i \0"
1396
60.7k
  /* 25848 */ "ae_sel16i \0"
1397
60.7k
  /* 25859 */ "ae_dbi \0"
1398
60.7k
  /* 25867 */ "ae_lbi \0"
1399
60.7k
  /* 25875 */ "ae_sbi \0"
1400
60.7k
  /* 25883 */ "ae_lbki \0"
1401
60.7k
  /* 25892 */ "ae_lbsi \0"
1402
60.7k
  /* 25901 */ "ae_movi \0"
1403
60.7k
  /* 25910 */ "ae_lbk \0"
1404
60.7k
  /* 25918 */ "ae_div64d32.l \0"
1405
60.7k
  /* 25933 */ "ae_movad32.l \0"
1406
60.7k
  /* 25947 */ "ae_nsaz32.l \0"
1407
60.7k
  /* 25960 */ "ae_mulap32x16x2.l \0"
1408
60.7k
  /* 25979 */ "ae_mulp32x16x2.l \0"
1409
60.7k
  /* 25997 */ "ae_mulsp32x16x2.l \0"
1410
60.7k
  /* 26016 */ "ae_mulac32x16.l \0"
1411
60.7k
  /* 26033 */ "ae_mulc32x16.l \0"
1412
60.7k
  /* 26049 */ "ae_mulafd24x2.fir.l \0"
1413
60.7k
  /* 26070 */ "ae_mulfd24x2.fir.l \0"
1414
60.7k
  /* 26090 */ "ae_cvtq56p32s.l \0"
1415
60.7k
  /* 26107 */ "ae_cvta32f24s.l \0"
1416
60.7k
  /* 26124 */ "ae_trunca32f64s.l \0"
1417
60.7k
  /* 26143 */ "ae_trunci32f64s.l \0"
1418
60.7k
  /* 26162 */ "ae_mulaf48q32sp16s.l \0"
1419
60.7k
  /* 26184 */ "ae_mulf48q32sp16s.l \0"
1420
60.7k
  /* 26205 */ "ae_mulsf48q32sp16s.l \0"
1421
60.7k
  /* 26227 */ "ae_mulafp32x16x2ras.l \0"
1422
60.7k
  /* 26250 */ "ae_mulfp32x16x2ras.l \0"
1423
60.7k
  /* 26272 */ "ae_mulsfp32x16x2ras.l \0"
1424
60.7k
  /* 26295 */ "ae_mulafc32x16ras.l \0"
1425
60.7k
  /* 26316 */ "ae_mulfc32x16ras.l \0"
1426
60.7k
  /* 26336 */ "ae_mulafp32x16x2rs.l \0"
1427
60.7k
  /* 26358 */ "ae_mulfp32x16x2rs.l \0"
1428
60.7k
  /* 26379 */ "ae_mulsfp32x16x2rs.l \0"
1429
60.7k
  /* 26401 */ "ae_mulaf48q32sp16u.l \0"
1430
60.7k
  /* 26423 */ "ae_mulf48q32sp16u.l \0"
1431
60.7k
  /* 26444 */ "ae_mulsf48q32sp16u.l \0"
1432
60.7k
  /* 26466 */ "ae_mulafd32x16x2.fir.hl \0"
1433
60.7k
  /* 26491 */ "ae_mulfd32x16x2.fir.hl \0"
1434
60.7k
  /* 26515 */ "ae_mula32.ll \0"
1435
60.7k
  /* 26529 */ "ae_mul32.ll \0"
1436
60.7k
  /* 26542 */ "ae_muls32.ll \0"
1437
60.7k
  /* 26556 */ "ae_mulaad24.hh.ll \0"
1438
60.7k
  /* 26575 */ "ae_mulzaad24.hh.ll \0"
1439
60.7k
  /* 26595 */ "ae_mulsad24.hh.ll \0"
1440
60.7k
  /* 26614 */ "ae_mulzsad24.hh.ll \0"
1441
60.7k
  /* 26634 */ "ae_mulaafd24.hh.ll \0"
1442
60.7k
  /* 26654 */ "ae_mulzaafd24.hh.ll \0"
1443
60.7k
  /* 26675 */ "ae_mulsafd24.hh.ll \0"
1444
60.7k
  /* 26695 */ "ae_mulzsafd24.hh.ll \0"
1445
60.7k
  /* 26716 */ "ae_mulasfd24.hh.ll \0"
1446
60.7k
  /* 26736 */ "ae_mulzasfd24.hh.ll \0"
1447
60.7k
  /* 26757 */ "ae_mulssfd24.hh.ll \0"
1448
60.7k
  /* 26777 */ "ae_mulzssfd24.hh.ll \0"
1449
60.7k
  /* 26798 */ "ae_mulasd24.hh.ll \0"
1450
60.7k
  /* 26817 */ "ae_mulzasd24.hh.ll \0"
1451
60.7k
  /* 26837 */ "ae_mulssd24.hh.ll \0"
1452
60.7k
  /* 26856 */ "ae_mulzssd24.hh.ll \0"
1453
60.7k
  /* 26876 */ "ae_mulaf32r.ll \0"
1454
60.7k
  /* 26892 */ "ae_mulf32r.ll \0"
1455
60.7k
  /* 26907 */ "ae_mulsf32r.ll \0"
1456
60.7k
  /* 26923 */ "ae_mulafd32x16x2.fir.ll \0"
1457
60.7k
  /* 26948 */ "ae_mulfd32x16x2.fir.ll \0"
1458
60.7k
  /* 26972 */ "ae_mulaf32s.ll \0"
1459
60.7k
  /* 26988 */ "ae_mulf32s.ll \0"
1460
60.7k
  /* 27003 */ "ae_mulsf32s.ll \0"
1461
60.7k
  /* 27019 */ "ae_mulas32f48p16s.ll \0"
1462
60.7k
  /* 27041 */ "ae_muls32f48p16s.ll \0"
1463
60.7k
  /* 27062 */ "ae_mulss32f48p16s.ll \0"
1464
60.7k
  /* 27084 */ "ae_mula32u.ll \0"
1465
60.7k
  /* 27099 */ "ae_mul32u.ll \0"
1466
60.7k
  /* 27113 */ "ae_muls32u.ll \0"
1467
60.7k
  /* 27128 */ "!restore_bool \0"
1468
60.7k
  /* 27143 */ "!spill_bool \0"
1469
60.7k
  /* 27156 */ "ae_roundsp16q48x2sym \0"
1470
60.7k
  /* 27178 */ "ae_roundsp16f24sym \0"
1471
60.7k
  /* 27198 */ "ae_roundsq32f48sym \0"
1472
60.7k
  /* 27218 */ "ae_roundsp16q48x2asym \0"
1473
60.7k
  /* 27241 */ "ae_roundsp16f24asym \0"
1474
60.7k
  /* 27262 */ "ae_roundsq32f48asym \0"
1475
60.7k
  /* 27283 */ "ae_round16x4f32sasym \0"
1476
60.7k
  /* 27305 */ "ae_round32x2f64sasym \0"
1477
60.7k
  /* 27327 */ "ae_round32x2f48sasym \0"
1478
60.7k
  /* 27349 */ "ae_round24x2f48sasym \0"
1479
60.7k
  /* 27371 */ "ae_round16x4f32ssym \0"
1480
60.7k
  /* 27392 */ "ae_round32x2f64ssym \0"
1481
60.7k
  /* 27413 */ "ae_round32x2f48ssym \0"
1482
60.7k
  /* 27434 */ "ae_round24x2f48ssym \0"
1483
60.7k
  /* 27455 */ "ae_sel16i.n \0"
1484
60.7k
  /* 27468 */ "ae_movalign \0"
1485
60.7k
  /* 27481 */ "rur.ae_cw_sd_no \0"
1486
60.7k
  /* 27498 */ "wur.ae_cw_sd_no \0"
1487
60.7k
  /* 27515 */ "rur.ae_cwrap \0"
1488
60.7k
  /* 27529 */ "wur.ae_cwrap \0"
1489
60.7k
  /* 27543 */ "ae_shortswap \0"
1490
60.7k
  /* 27557 */ "rur.ae_ts_fts_bu_bp \0"
1491
60.7k
  /* 27578 */ "wur.ae_ts_fts_bu_bp \0"
1492
60.7k
  /* 27599 */ "ae_sa64neg.fp \0"
1493
60.7k
  /* 27614 */ "ae_sa64pos.fp \0"
1494
60.7k
  /* 27629 */ "!brcc_fp \0"
1495
60.7k
  /* 27639 */ "!select_cc_fp_fp \0"
1496
60.7k
  /* 27657 */ "!select_cc_int_fp \0"
1497
60.7k
  /* 27676 */ "ae_s16.0.ip \0"
1498
60.7k
  /* 27689 */ "ae_l32.ip \0"
1499
60.7k
  /* 27700 */ "ae_la32x2.ip \0"
1500
60.7k
  /* 27714 */ "ae_sa32x2.ip \0"
1501
60.7k
  /* 27728 */ "ae_l32x2.ip \0"
1502
60.7k
  /* 27741 */ "ae_s32x2.ip \0"
1503
60.7k
  /* 27754 */ "ae_la24x2.ip \0"
1504
60.7k
  /* 27768 */ "ae_sa24x2.ip \0"
1505
60.7k
  /* 27782 */ "ae_la24.ip \0"
1506
60.7k
  /* 27794 */ "ae_l32f24.ip \0"
1507
60.7k
  /* 27808 */ "ae_la32x2f24.ip \0"
1508
60.7k
  /* 27825 */ "ae_sa32x2f24.ip \0"
1509
60.7k
  /* 27842 */ "ae_l32x2f24.ip \0"
1510
60.7k
  /* 27858 */ "ae_s32x2f24.ip \0"
1511
60.7k
  /* 27874 */ "ae_l64.ip \0"
1512
60.7k
  /* 27885 */ "ae_s64.ip \0"
1513
60.7k
  /* 27896 */ "ae_la16x4.ip \0"
1514
60.7k
  /* 27910 */ "ae_sa16x4.ip \0"
1515
60.7k
  /* 27924 */ "ae_l16x4.ip \0"
1516
60.7k
  /* 27937 */ "ae_s16x4.ip \0"
1517
60.7k
  /* 27950 */ "ae_l16.ip \0"
1518
60.7k
  /* 27961 */ "ae_db.ip \0"
1519
60.7k
  /* 27971 */ "ae_sb.ip \0"
1520
60.7k
  /* 27981 */ "ae_vldl16c.ip \0"
1521
60.7k
  /* 27996 */ "ae_vles16c.ip \0"
1522
60.7k
  /* 28011 */ "ae_sbf.ip \0"
1523
60.7k
  /* 28022 */ "ae_dbi.ip \0"
1524
60.7k
  /* 28033 */ "ae_sbi.ip \0"
1525
60.7k
  /* 28044 */ "ae_s32.l.ip \0"
1526
60.7k
  /* 28057 */ "ae_sa24.l.ip \0"
1527
60.7k
  /* 28071 */ "ae_s32f24.l.ip \0"
1528
60.7k
  /* 28087 */ "ae_s32ra64s.ip \0"
1529
60.7k
  /* 28103 */ "ae_s32x2ra64s.ip \0"
1530
60.7k
  /* 28121 */ "ae_s24x2ra64s.ip \0"
1531
60.7k
  /* 28139 */ "ae_s24ra64s.ip \0"
1532
60.7k
  /* 28155 */ "ae_la32x2.rip \0"
1533
60.7k
  /* 28170 */ "ae_sa32x2.rip \0"
1534
60.7k
  /* 28185 */ "ae_l32x2.rip \0"
1535
60.7k
  /* 28199 */ "ae_s32x2.rip \0"
1536
60.7k
  /* 28213 */ "ae_la24x2.rip \0"
1537
60.7k
  /* 28228 */ "ae_sa24x2.rip \0"
1538
60.7k
  /* 28243 */ "ae_la24.rip \0"
1539
60.7k
  /* 28256 */ "ae_la32x2f24.rip \0"
1540
60.7k
  /* 28274 */ "ae_sa32x2f24.rip \0"
1541
60.7k
  /* 28292 */ "ae_l32x2f24.rip \0"
1542
60.7k
  /* 28309 */ "ae_s32x2f24.rip \0"
1543
60.7k
  /* 28326 */ "ae_la16x4.rip \0"
1544
60.7k
  /* 28341 */ "ae_sa16x4.rip \0"
1545
60.7k
  /* 28356 */ "ae_l16x4.rip \0"
1546
60.7k
  /* 28370 */ "ae_s16x4.rip \0"
1547
60.7k
  /* 28384 */ "ae_sa24.l.rip \0"
1548
60.7k
  /* 28399 */ "ae_la64.pp \0"
1549
60.7k
  /* 28411 */ "ae_s16.0.xp \0"
1550
60.7k
  /* 28424 */ "ae_l32.xp \0"
1551
60.7k
  /* 28435 */ "ae_l32x2.xp \0"
1552
60.7k
  /* 28448 */ "ae_s32x2.xp \0"
1553
60.7k
  /* 28461 */ "ae_l32f24.xp \0"
1554
60.7k
  /* 28475 */ "ae_l32x2f24.xp \0"
1555
60.7k
  /* 28491 */ "ae_s32x2f24.xp \0"
1556
60.7k
  /* 28507 */ "ae_l64.xp \0"
1557
60.7k
  /* 28518 */ "ae_s64.xp \0"
1558
60.7k
  /* 28529 */ "ae_l16x4.xp \0"
1559
60.7k
  /* 28542 */ "ae_s16x4.xp \0"
1560
60.7k
  /* 28555 */ "ae_l16.xp \0"
1561
60.7k
  /* 28566 */ "ae_s32.l.xp \0"
1562
60.7k
  /* 28579 */ "ae_s32f24.l.xp \0"
1563
60.7k
  /* 28595 */ "ae_s32ra64s.xp \0"
1564
60.7k
  /* 28611 */ "ae_s24ra64s.xp \0"
1565
60.7k
  /* 28627 */ "ae_srai32r \0"
1566
60.7k
  /* 28639 */ "ae_mulafp24x2r \0"
1567
60.7k
  /* 28655 */ "ae_mulfp24x2r \0"
1568
60.7k
  /* 28670 */ "ae_mulsfp24x2r \0"
1569
60.7k
  /* 28686 */ "ae_srai16r \0"
1570
60.7k
  /* 28698 */ "rur.ae_sar \0"
1571
60.7k
  /* 28710 */ "wur.ae_sar \0"
1572
60.7k
  /* 28722 */ "rur.ae_ovf_sar \0"
1573
60.7k
  /* 28738 */ "wur.ae_ovf_sar \0"
1574
60.7k
  /* 28754 */ "!slli_br \0"
1575
60.7k
  /* 28764 */ "!extui_br \0"
1576
60.7k
  /* 28775 */ "!loopbr \0"
1577
60.7k
  /* 28784 */ "ae_or \0"
1578
60.7k
  /* 28791 */ "ae_xor \0"
1579
60.7k
  /* 28799 */ "rur.ae_bitptr \0"
1580
60.7k
  /* 28814 */ "wur.ae_bitptr \0"
1581
60.7k
  /* 28829 */ "ae_cvtq56a32s \0"
1582
60.7k
  /* 28844 */ "ae_slaa32s \0"
1583
60.7k
  /* 28856 */ "ae_sraa32s \0"
1584
60.7k
  /* 28868 */ "ae_sub32s \0"
1585
60.7k
  /* 28879 */ "ae_addsub32s \0"
1586
60.7k
  /* 28893 */ "ae_add32s \0"
1587
60.7k
  /* 28904 */ "ae_subadd32s \0"
1588
60.7k
  /* 28918 */ "ae_neg32s \0"
1589
60.7k
  /* 28929 */ "ae_slai32s \0"
1590
60.7k
  /* 28941 */ "ae_slas32s \0"
1591
60.7k
  /* 28953 */ "ae_abs32s \0"
1592
60.7k
  /* 28964 */ "ae_minabs32s \0"
1593
60.7k
  /* 28978 */ "ae_maxabs32s \0"
1594
60.7k
  /* 28992 */ "ae_sub24s \0"
1595
60.7k
  /* 29003 */ "ae_add24s \0"
1596
60.7k
  /* 29014 */ "ae_neg24s \0"
1597
60.7k
  /* 29025 */ "ae_slai24s \0"
1598
60.7k
  /* 29037 */ "ae_slas24s \0"
1599
60.7k
  /* 29049 */ "ae_abs24s \0"
1600
60.7k
  /* 29060 */ "ae_sat24s \0"
1601
60.7k
  /* 29071 */ "ae_slaa64s \0"
1602
60.7k
  /* 29083 */ "ae_sub64s \0"
1603
60.7k
  /* 29094 */ "ae_add64s \0"
1604
60.7k
  /* 29105 */ "ae_trunca32x2f64s \0"
1605
60.7k
  /* 29124 */ "ae_trunci32x2f64s \0"
1606
60.7k
  /* 29143 */ "ae_neg64s \0"
1607
60.7k
  /* 29154 */ "ae_slai64s \0"
1608
60.7k
  /* 29166 */ "ae_slas64s \0"
1609
60.7k
  /* 29178 */ "ae_abs64s \0"
1610
60.7k
  /* 29189 */ "ae_minabs64s \0"
1611
60.7k
  /* 29203 */ "ae_maxabs64s \0"
1612
60.7k
  /* 29217 */ "ae_mulfp16x4s \0"
1613
60.7k
  /* 29232 */ "ae_slaa16s \0"
1614
60.7k
  /* 29244 */ "ae_sraa16s \0"
1615
60.7k
  /* 29256 */ "ae_sub16s \0"
1616
60.7k
  /* 29267 */ "ae_add16s \0"
1617
60.7k
  /* 29278 */ "ae_neg16s \0"
1618
60.7k
  /* 29289 */ "ae_slai16s \0"
1619
60.7k
  /* 29301 */ "ae_abs16s \0"
1620
60.7k
  /* 29312 */ "ae_slaisq56s \0"
1621
60.7k
  /* 29326 */ "ae_slassq56s \0"
1622
60.7k
  /* 29340 */ "ae_satq56s \0"
1623
60.7k
  /* 29352 */ "ae_sat48s \0"
1624
60.7k
  /* 29363 */ "ae_mulafp32x2ras \0"
1625
60.7k
  /* 29381 */ "ae_mulfp32x2ras \0"
1626
60.7k
  /* 29398 */ "ae_mulsfp32x2ras \0"
1627
60.7k
  /* 29416 */ "ae_mulfp16x4ras \0"
1628
60.7k
  /* 29433 */ "ae_lbs \0"
1629
60.7k
  /* 29441 */ "ae_sraa32rs \0"
1630
60.7k
  /* 29454 */ "ae_mulafp32x2rs \0"
1631
60.7k
  /* 29471 */ "ae_mulfp32x2rs \0"
1632
60.7k
  /* 29487 */ "ae_mulsfp32x2rs \0"
1633
60.7k
  /* 29504 */ "ae_sraa16rs \0"
1634
60.7k
  /* 29517 */ "ae_mulaf16x4ss \0"
1635
60.7k
  /* 29533 */ "ae_mulf16x4ss \0"
1636
60.7k
  /* 29548 */ "ae_mulsf16x4ss \0"
1637
60.7k
  /* 29564 */ "rur.ae_first_ts \0"
1638
60.7k
  /* 29581 */ "wur.ae_first_ts \0"
1639
60.7k
  /* 29598 */ "ae_vldl32t \0"
1640
60.7k
  /* 29610 */ "ae_vlel32t \0"
1641
60.7k
  /* 29622 */ "ae_vldl16t \0"
1642
60.7k
  /* 29634 */ "ae_vlel16t \0"
1643
60.7k
  /* 29646 */ "!select \0"
1644
60.7k
  /* 29655 */ "rur.ae_nextoffset \0"
1645
60.7k
  /* 29674 */ "wur.ae_nextoffset \0"
1646
60.7k
  /* 29693 */ "ae_vldsht \0"
1647
60.7k
  /* 29704 */ "!loopinit \0"
1648
60.7k
  /* 29715 */ "!select_cc_fp_int \0"
1649
60.7k
  /* 29734 */ "!loopstart \0"
1650
60.7k
  /* 29746 */ "ae_s16m.l.iu \0"
1651
60.7k
  /* 29760 */ "ae_l32m.iu \0"
1652
60.7k
  /* 29772 */ "ae_s32m.iu \0"
1653
60.7k
  /* 29784 */ "ae_l16x2m.iu \0"
1654
60.7k
  /* 29798 */ "ae_s16x2m.iu \0"
1655
60.7k
  /* 29812 */ "ae_l16m.iu \0"
1656
60.7k
  /* 29824 */ "ae_s16m.l.xu \0"
1657
60.7k
  /* 29838 */ "ae_l32m.xu \0"
1658
60.7k
  /* 29850 */ "ae_s32m.xu \0"
1659
60.7k
  /* 29862 */ "ae_l16x2m.xu \0"
1660
60.7k
  /* 29876 */ "ae_s16x2m.xu \0"
1661
60.7k
  /* 29890 */ "ae_l16m.xu \0"
1662
60.7k
  /* 29902 */ "ae_mov \0"
1663
60.7k
  /* 29910 */ "rur.ae_overflow \0"
1664
60.7k
  /* 29927 */ "wur.ae_overflow \0"
1665
60.7k
  /* 29944 */ "ae_s16.0.x \0"
1666
60.7k
  /* 29956 */ "ae_l32.x \0"
1667
60.7k
  /* 29966 */ "ae_l32x2.x \0"
1668
60.7k
  /* 29978 */ "ae_s32x2.x \0"
1669
60.7k
  /* 29990 */ "ae_l32f24.x \0"
1670
60.7k
  /* 30003 */ "ae_l32x2f24.x \0"
1671
60.7k
  /* 30018 */ "ae_s32x2f24.x \0"
1672
60.7k
  /* 30033 */ "ae_l64.x \0"
1673
60.7k
  /* 30043 */ "ae_s64.x \0"
1674
60.7k
  /* 30053 */ "ae_l16x4.x \0"
1675
60.7k
  /* 30065 */ "ae_s16x4.x \0"
1676
60.7k
  /* 30077 */ "ae_l16.x \0"
1677
60.7k
  /* 30087 */ "ae_s32.l.x \0"
1678
60.7k
  /* 30099 */ "ae_s32f24.l.x \0"
1679
60.7k
  /* 30114 */ "ae_s16m.l.x \0"
1680
60.7k
  /* 30127 */ "ae_l32m.x \0"
1681
60.7k
  /* 30138 */ "ae_s32m.x \0"
1682
60.7k
  /* 30149 */ "ae_l16x2m.x \0"
1683
60.7k
  /* 30162 */ "ae_s16x2m.x \0"
1684
60.7k
  /* 30175 */ "ae_l16m.x \0"
1685
60.7k
  /* 30186 */ "ae_s32ra64s.x \0"
1686
60.7k
  /* 30201 */ "ae_s24ra64s.x \0"
1687
60.7k
  /* 30216 */ "# XRay Function Patchable RET.\0"
1688
60.7k
  /* 30247 */ "# XRay Typed Event Log.\0"
1689
60.7k
  /* 30271 */ "# XRay Custom Event Log.\0"
1690
60.7k
  /* 30296 */ "# XRay Function Enter.\0"
1691
60.7k
  /* 30319 */ "# XRay Tail Call Exit.\0"
1692
60.7k
  /* 30342 */ "# XRay Function Exit.\0"
1693
60.7k
  /* 30364 */ "LIFETIME_END\0"
1694
60.7k
  /* 30377 */ "PSEUDO_PROBE\0"
1695
60.7k
  /* 30390 */ "BUNDLE\0"
1696
60.7k
  /* 30397 */ "DBG_VALUE\0"
1697
60.7k
  /* 30407 */ "DBG_INSTR_REF\0"
1698
60.7k
  /* 30421 */ "DBG_PHI\0"
1699
60.7k
  /* 30429 */ "DBG_LABEL\0"
1700
60.7k
  /* 30439 */ "#ADJCALLSTACKDOWN\0"
1701
60.7k
  /* 30457 */ "#ADJCALLSTACKUP\0"
1702
60.7k
  /* 30473 */ "LIFETIME_START\0"
1703
60.7k
  /* 30488 */ "DBG_VALUE_LIST\0"
1704
60.7k
  /* 30503 */ "dsync\0"
1705
60.7k
  /* 30509 */ "esync\0"
1706
60.7k
  /* 30515 */ "isync\0"
1707
60.7k
  /* 30521 */ "rsync\0"
1708
60.7k
  /* 30527 */ "rfde\0"
1709
60.7k
  /* 30532 */ "rfe\0"
1710
60.7k
  /* 30536 */ "# FEntry call\0"
1711
60.7k
  /* 30550 */ "simcall\0"
1712
60.7k
  /* 30558 */ "syscall\0"
1713
60.7k
  /* 30566 */ "ill\0"
1714
60.7k
  /* 30570 */ "ill.n\0"
1715
60.7k
  /* 30576 */ "ret.n\0"
1716
60.7k
  /* 30582 */ "retw.n\0"
1717
60.7k
  /* 30589 */ "foo\0"
1718
60.7k
  /* 30593 */ "rfwo\0"
1719
60.7k
  /* 30598 */ "!xtensa_ee_zero_qacc_p\0"
1720
60.7k
  /* 30621 */ "!xtensa_ee_zero_accx_p\0"
1721
60.7k
  /* 30644 */ "nop\0"
1722
60.7k
  /* 30648 */ "ret\0"
1723
60.7k
  /* 30652 */ "rfwu\0"
1724
60.7k
  /* 30657 */ "excw\0"
1725
60.7k
  /* 30662 */ "memw\0"
1726
60.7k
  /* 30667 */ "retw\0"
1727
60.7k
  /* 30672 */ "extw\0"
1728
60.7k
};
1729
60.7k
#endif // CAPSTONE_DIET
1730
1731
60.7k
  static const uint32_t OpInfo0[] = {
1732
60.7k
    0U, // PHI
1733
60.7k
    0U, // INLINEASM
1734
60.7k
    0U, // INLINEASM_BR
1735
60.7k
    0U, // CFI_INSTRUCTION
1736
60.7k
    0U, // EH_LABEL
1737
60.7k
    0U, // GC_LABEL
1738
60.7k
    0U, // ANNOTATION_LABEL
1739
60.7k
    0U, // KILL
1740
60.7k
    0U, // EXTRACT_SUBREG
1741
60.7k
    0U, // INSERT_SUBREG
1742
60.7k
    0U, // IMPLICIT_DEF
1743
60.7k
    0U, // SUBREG_TO_REG
1744
60.7k
    0U, // COPY_TO_REGCLASS
1745
60.7k
    30398U, // DBG_VALUE
1746
60.7k
    30489U, // DBG_VALUE_LIST
1747
60.7k
    30408U, // DBG_INSTR_REF
1748
60.7k
    30422U, // DBG_PHI
1749
60.7k
    30430U, // DBG_LABEL
1750
60.7k
    0U, // REG_SEQUENCE
1751
60.7k
    0U, // COPY
1752
60.7k
    30391U, // BUNDLE
1753
60.7k
    30474U, // LIFETIME_START
1754
60.7k
    30365U, // LIFETIME_END
1755
60.7k
    30378U, // PSEUDO_PROBE
1756
60.7k
    0U, // ARITH_FENCE
1757
60.7k
    0U, // STACKMAP
1758
60.7k
    30537U, // FENTRY_CALL
1759
60.7k
    0U, // PATCHPOINT
1760
60.7k
    0U, // LOAD_STACK_GUARD
1761
60.7k
    0U, // PREALLOCATED_SETUP
1762
60.7k
    0U, // PREALLOCATED_ARG
1763
60.7k
    0U, // STATEPOINT
1764
60.7k
    0U, // LOCAL_ESCAPE
1765
60.7k
    0U, // FAULTING_OP
1766
60.7k
    0U, // PATCHABLE_OP
1767
60.7k
    30297U, // PATCHABLE_FUNCTION_ENTER
1768
60.7k
    30217U, // PATCHABLE_RET
1769
60.7k
    30343U, // PATCHABLE_FUNCTION_EXIT
1770
60.7k
    30320U, // PATCHABLE_TAIL_CALL
1771
60.7k
    30272U, // PATCHABLE_EVENT_CALL
1772
60.7k
    30248U, // PATCHABLE_TYPED_EVENT_CALL
1773
60.7k
    0U, // ICALL_BRANCH_FUNNEL
1774
60.7k
    0U, // MEMBARRIER
1775
60.7k
    0U, // JUMP_TABLE_DEBUG_INFO
1776
60.7k
    0U, // G_ASSERT_SEXT
1777
60.7k
    0U, // G_ASSERT_ZEXT
1778
60.7k
    0U, // G_ASSERT_ALIGN
1779
60.7k
    0U, // G_ADD
1780
60.7k
    0U, // G_SUB
1781
60.7k
    0U, // G_MUL
1782
60.7k
    0U, // G_SDIV
1783
60.7k
    0U, // G_UDIV
1784
60.7k
    0U, // G_SREM
1785
60.7k
    0U, // G_UREM
1786
60.7k
    0U, // G_SDIVREM
1787
60.7k
    0U, // G_UDIVREM
1788
60.7k
    0U, // G_AND
1789
60.7k
    0U, // G_OR
1790
60.7k
    0U, // G_XOR
1791
60.7k
    0U, // G_IMPLICIT_DEF
1792
60.7k
    0U, // G_PHI
1793
60.7k
    0U, // G_FRAME_INDEX
1794
60.7k
    0U, // G_GLOBAL_VALUE
1795
60.7k
    0U, // G_CONSTANT_POOL
1796
60.7k
    0U, // G_EXTRACT
1797
60.7k
    0U, // G_UNMERGE_VALUES
1798
60.7k
    0U, // G_INSERT
1799
60.7k
    0U, // G_MERGE_VALUES
1800
60.7k
    0U, // G_BUILD_VECTOR
1801
60.7k
    0U, // G_BUILD_VECTOR_TRUNC
1802
60.7k
    0U, // G_CONCAT_VECTORS
1803
60.7k
    0U, // G_PTRTOINT
1804
60.7k
    0U, // G_INTTOPTR
1805
60.7k
    0U, // G_BITCAST
1806
60.7k
    0U, // G_FREEZE
1807
60.7k
    0U, // G_CONSTANT_FOLD_BARRIER
1808
60.7k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
1809
60.7k
    0U, // G_INTRINSIC_TRUNC
1810
60.7k
    0U, // G_INTRINSIC_ROUND
1811
60.7k
    0U, // G_INTRINSIC_LRINT
1812
60.7k
    0U, // G_INTRINSIC_ROUNDEVEN
1813
60.7k
    0U, // G_READCYCLECOUNTER
1814
60.7k
    0U, // G_LOAD
1815
60.7k
    0U, // G_SEXTLOAD
1816
60.7k
    0U, // G_ZEXTLOAD
1817
60.7k
    0U, // G_INDEXED_LOAD
1818
60.7k
    0U, // G_INDEXED_SEXTLOAD
1819
60.7k
    0U, // G_INDEXED_ZEXTLOAD
1820
60.7k
    0U, // G_STORE
1821
60.7k
    0U, // G_INDEXED_STORE
1822
60.7k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1823
60.7k
    0U, // G_ATOMIC_CMPXCHG
1824
60.7k
    0U, // G_ATOMICRMW_XCHG
1825
60.7k
    0U, // G_ATOMICRMW_ADD
1826
60.7k
    0U, // G_ATOMICRMW_SUB
1827
60.7k
    0U, // G_ATOMICRMW_AND
1828
60.7k
    0U, // G_ATOMICRMW_NAND
1829
60.7k
    0U, // G_ATOMICRMW_OR
1830
60.7k
    0U, // G_ATOMICRMW_XOR
1831
60.7k
    0U, // G_ATOMICRMW_MAX
1832
60.7k
    0U, // G_ATOMICRMW_MIN
1833
60.7k
    0U, // G_ATOMICRMW_UMAX
1834
60.7k
    0U, // G_ATOMICRMW_UMIN
1835
60.7k
    0U, // G_ATOMICRMW_FADD
1836
60.7k
    0U, // G_ATOMICRMW_FSUB
1837
60.7k
    0U, // G_ATOMICRMW_FMAX
1838
60.7k
    0U, // G_ATOMICRMW_FMIN
1839
60.7k
    0U, // G_ATOMICRMW_UINC_WRAP
1840
60.7k
    0U, // G_ATOMICRMW_UDEC_WRAP
1841
60.7k
    0U, // G_FENCE
1842
60.7k
    0U, // G_PREFETCH
1843
60.7k
    0U, // G_BRCOND
1844
60.7k
    0U, // G_BRINDIRECT
1845
60.7k
    0U, // G_INVOKE_REGION_START
1846
60.7k
    0U, // G_INTRINSIC
1847
60.7k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
1848
60.7k
    0U, // G_INTRINSIC_CONVERGENT
1849
60.7k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1850
60.7k
    0U, // G_ANYEXT
1851
60.7k
    0U, // G_TRUNC
1852
60.7k
    0U, // G_CONSTANT
1853
60.7k
    0U, // G_FCONSTANT
1854
60.7k
    0U, // G_VASTART
1855
60.7k
    0U, // G_VAARG
1856
60.7k
    0U, // G_SEXT
1857
60.7k
    0U, // G_SEXT_INREG
1858
60.7k
    0U, // G_ZEXT
1859
60.7k
    0U, // G_SHL
1860
60.7k
    0U, // G_LSHR
1861
60.7k
    0U, // G_ASHR
1862
60.7k
    0U, // G_FSHL
1863
60.7k
    0U, // G_FSHR
1864
60.7k
    0U, // G_ROTR
1865
60.7k
    0U, // G_ROTL
1866
60.7k
    0U, // G_ICMP
1867
60.7k
    0U, // G_FCMP
1868
60.7k
    0U, // G_SELECT
1869
60.7k
    0U, // G_UADDO
1870
60.7k
    0U, // G_UADDE
1871
60.7k
    0U, // G_USUBO
1872
60.7k
    0U, // G_USUBE
1873
60.7k
    0U, // G_SADDO
1874
60.7k
    0U, // G_SADDE
1875
60.7k
    0U, // G_SSUBO
1876
60.7k
    0U, // G_SSUBE
1877
60.7k
    0U, // G_UMULO
1878
60.7k
    0U, // G_SMULO
1879
60.7k
    0U, // G_UMULH
1880
60.7k
    0U, // G_SMULH
1881
60.7k
    0U, // G_UADDSAT
1882
60.7k
    0U, // G_SADDSAT
1883
60.7k
    0U, // G_USUBSAT
1884
60.7k
    0U, // G_SSUBSAT
1885
60.7k
    0U, // G_USHLSAT
1886
60.7k
    0U, // G_SSHLSAT
1887
60.7k
    0U, // G_SMULFIX
1888
60.7k
    0U, // G_UMULFIX
1889
60.7k
    0U, // G_SMULFIXSAT
1890
60.7k
    0U, // G_UMULFIXSAT
1891
60.7k
    0U, // G_SDIVFIX
1892
60.7k
    0U, // G_UDIVFIX
1893
60.7k
    0U, // G_SDIVFIXSAT
1894
60.7k
    0U, // G_UDIVFIXSAT
1895
60.7k
    0U, // G_FADD
1896
60.7k
    0U, // G_FSUB
1897
60.7k
    0U, // G_FMUL
1898
60.7k
    0U, // G_FMA
1899
60.7k
    0U, // G_FMAD
1900
60.7k
    0U, // G_FDIV
1901
60.7k
    0U, // G_FREM
1902
60.7k
    0U, // G_FPOW
1903
60.7k
    0U, // G_FPOWI
1904
60.7k
    0U, // G_FEXP
1905
60.7k
    0U, // G_FEXP2
1906
60.7k
    0U, // G_FEXP10
1907
60.7k
    0U, // G_FLOG
1908
60.7k
    0U, // G_FLOG2
1909
60.7k
    0U, // G_FLOG10
1910
60.7k
    0U, // G_FLDEXP
1911
60.7k
    0U, // G_FFREXP
1912
60.7k
    0U, // G_FNEG
1913
60.7k
    0U, // G_FPEXT
1914
60.7k
    0U, // G_FPTRUNC
1915
60.7k
    0U, // G_FPTOSI
1916
60.7k
    0U, // G_FPTOUI
1917
60.7k
    0U, // G_SITOFP
1918
60.7k
    0U, // G_UITOFP
1919
60.7k
    0U, // G_FABS
1920
60.7k
    0U, // G_FCOPYSIGN
1921
60.7k
    0U, // G_IS_FPCLASS
1922
60.7k
    0U, // G_FCANONICALIZE
1923
60.7k
    0U, // G_FMINNUM
1924
60.7k
    0U, // G_FMAXNUM
1925
60.7k
    0U, // G_FMINNUM_IEEE
1926
60.7k
    0U, // G_FMAXNUM_IEEE
1927
60.7k
    0U, // G_FMINIMUM
1928
60.7k
    0U, // G_FMAXIMUM
1929
60.7k
    0U, // G_GET_FPENV
1930
60.7k
    0U, // G_SET_FPENV
1931
60.7k
    0U, // G_RESET_FPENV
1932
60.7k
    0U, // G_GET_FPMODE
1933
60.7k
    0U, // G_SET_FPMODE
1934
60.7k
    0U, // G_RESET_FPMODE
1935
60.7k
    0U, // G_PTR_ADD
1936
60.7k
    0U, // G_PTRMASK
1937
60.7k
    0U, // G_SMIN
1938
60.7k
    0U, // G_SMAX
1939
60.7k
    0U, // G_UMIN
1940
60.7k
    0U, // G_UMAX
1941
60.7k
    0U, // G_ABS
1942
60.7k
    0U, // G_LROUND
1943
60.7k
    0U, // G_LLROUND
1944
60.7k
    0U, // G_BR
1945
60.7k
    0U, // G_BRJT
1946
60.7k
    0U, // G_INSERT_VECTOR_ELT
1947
60.7k
    0U, // G_EXTRACT_VECTOR_ELT
1948
60.7k
    0U, // G_SHUFFLE_VECTOR
1949
60.7k
    0U, // G_CTTZ
1950
60.7k
    0U, // G_CTTZ_ZERO_UNDEF
1951
60.7k
    0U, // G_CTLZ
1952
60.7k
    0U, // G_CTLZ_ZERO_UNDEF
1953
60.7k
    0U, // G_CTPOP
1954
60.7k
    0U, // G_BSWAP
1955
60.7k
    0U, // G_BITREVERSE
1956
60.7k
    0U, // G_FCEIL
1957
60.7k
    0U, // G_FCOS
1958
60.7k
    0U, // G_FSIN
1959
60.7k
    0U, // G_FSQRT
1960
60.7k
    0U, // G_FFLOOR
1961
60.7k
    0U, // G_FRINT
1962
60.7k
    0U, // G_FNEARBYINT
1963
60.7k
    0U, // G_ADDRSPACE_CAST
1964
60.7k
    0U, // G_BLOCK_ADDR
1965
60.7k
    0U, // G_JUMP_TABLE
1966
60.7k
    0U, // G_DYN_STACKALLOC
1967
60.7k
    0U, // G_STACKSAVE
1968
60.7k
    0U, // G_STACKRESTORE
1969
60.7k
    0U, // G_STRICT_FADD
1970
60.7k
    0U, // G_STRICT_FSUB
1971
60.7k
    0U, // G_STRICT_FMUL
1972
60.7k
    0U, // G_STRICT_FDIV
1973
60.7k
    0U, // G_STRICT_FREM
1974
60.7k
    0U, // G_STRICT_FMA
1975
60.7k
    0U, // G_STRICT_FSQRT
1976
60.7k
    0U, // G_STRICT_FLDEXP
1977
60.7k
    0U, // G_READ_REGISTER
1978
60.7k
    0U, // G_WRITE_REGISTER
1979
60.7k
    0U, // G_MEMCPY
1980
60.7k
    0U, // G_MEMCPY_INLINE
1981
60.7k
    0U, // G_MEMMOVE
1982
60.7k
    0U, // G_MEMSET
1983
60.7k
    0U, // G_BZERO
1984
60.7k
    0U, // G_VECREDUCE_SEQ_FADD
1985
60.7k
    0U, // G_VECREDUCE_SEQ_FMUL
1986
60.7k
    0U, // G_VECREDUCE_FADD
1987
60.7k
    0U, // G_VECREDUCE_FMUL
1988
60.7k
    0U, // G_VECREDUCE_FMAX
1989
60.7k
    0U, // G_VECREDUCE_FMIN
1990
60.7k
    0U, // G_VECREDUCE_FMAXIMUM
1991
60.7k
    0U, // G_VECREDUCE_FMINIMUM
1992
60.7k
    0U, // G_VECREDUCE_ADD
1993
60.7k
    0U, // G_VECREDUCE_MUL
1994
60.7k
    0U, // G_VECREDUCE_AND
1995
60.7k
    0U, // G_VECREDUCE_OR
1996
60.7k
    0U, // G_VECREDUCE_XOR
1997
60.7k
    0U, // G_VECREDUCE_SMAX
1998
60.7k
    0U, // G_VECREDUCE_SMIN
1999
60.7k
    0U, // G_VECREDUCE_UMAX
2000
60.7k
    0U, // G_VECREDUCE_UMIN
2001
60.7k
    0U, // G_SBFX
2002
60.7k
    0U, // G_UBFX
2003
60.7k
    30440U, // ADJCALLSTACKDOWN
2004
60.7k
    30458U, // ADJCALLSTACKUP
2005
60.7k
    40789U, // ATOMIC_CMP_SWAP_16_P
2006
60.7k
    40108U, // ATOMIC_CMP_SWAP_32_P
2007
60.7k
    41469U, // ATOMIC_CMP_SWAP_8_P
2008
60.7k
    40647U, // ATOMIC_LOAD_ADD_16_P
2009
60.7k
    39944U, // ATOMIC_LOAD_ADD_32_P
2010
60.7k
    41333U, // ATOMIC_LOAD_ADD_8_P
2011
60.7k
    40671U, // ATOMIC_LOAD_AND_16_P
2012
60.7k
    39968U, // ATOMIC_LOAD_AND_32_P
2013
60.7k
    41356U, // ATOMIC_LOAD_AND_8_P
2014
60.7k
    40908U, // ATOMIC_LOAD_MAX_16_P
2015
60.7k
    40295U, // ATOMIC_LOAD_MAX_32_P
2016
60.7k
    41583U, // ATOMIC_LOAD_MAX_8_P
2017
60.7k
    40720U, // ATOMIC_LOAD_MIN_16_P
2018
60.7k
    40039U, // ATOMIC_LOAD_MIN_32_P
2019
60.7k
    41403U, // ATOMIC_LOAD_MIN_8_P
2020
60.7k
    40695U, // ATOMIC_LOAD_NAND_16_P
2021
60.7k
    39992U, // ATOMIC_LOAD_NAND_32_P
2022
60.7k
    41379U, // ATOMIC_LOAD_NAND_8_P
2023
60.7k
    40861U, // ATOMIC_LOAD_OR_16_P
2024
60.7k
    40226U, // ATOMIC_LOAD_OR_32_P
2025
60.7k
    41538U, // ATOMIC_LOAD_OR_8_P
2026
60.7k
    40599U, // ATOMIC_LOAD_SUB_16_P
2027
60.7k
    39896U, // ATOMIC_LOAD_SUB_32_P
2028
60.7k
    41287U, // ATOMIC_LOAD_SUB_8_P
2029
60.7k
    40932U, // ATOMIC_LOAD_UMAX_16_P
2030
60.7k
    40319U, // ATOMIC_LOAD_UMAX_32_P
2031
60.7k
    41606U, // ATOMIC_LOAD_UMAX_8_P
2032
60.7k
    40744U, // ATOMIC_LOAD_UMIN_16_P
2033
60.7k
    40063U, // ATOMIC_LOAD_UMIN_32_P
2034
60.7k
    41426U, // ATOMIC_LOAD_UMIN_8_P
2035
60.7k
    40884U, // ATOMIC_LOAD_XOR_16_P
2036
60.7k
    40249U, // ATOMIC_LOAD_XOR_32_P
2037
60.7k
    41560U, // ATOMIC_LOAD_XOR_8_P
2038
60.7k
    40769U, // ATOMIC_SWAP_16_P
2039
60.7k
    40088U, // ATOMIC_SWAP_32_P
2040
60.7k
    41450U, // ATOMIC_SWAP_8_P
2041
60.7k
    60398U, // BRCC_FP
2042
60.7k
    67156522U,  // BR_JT
2043
60.7k
    30590U, // CONSTPOOL_ENTRY
2044
60.7k
    539048393U, // EE_ANDQ_P
2045
60.7k
    67189301U,  // EE_BITREV_P
2046
60.7k
    536946937U, // EE_CMUL_S16_LD_INCP_P
2047
60.7k
    539041817U, // EE_CMUL_S16_P
2048
60.7k
    536947631U, // EE_CMUL_S16_ST_INCP_P
2049
60.7k
    536947099U, // EE_FFT_AMS_S16_LD_INCP_P
2050
60.7k
    536949305U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P
2051
60.7k
    536946544U, // EE_FFT_AMS_S16_LD_R32_DECP_P
2052
60.7k
    2174033U, // EE_FFT_AMS_S16_ST_INCP_P
2053
60.7k
    79748U, // EE_FFT_CMUL_S16_LD_XP_P
2054
60.7k
    539048195U, // EE_FFT_CMUL_S16_ST_XP_P
2055
60.7k
    539041789U, // EE_FFT_R2BF_S16_P
2056
60.7k
    539044747U, // EE_FFT_R2BF_S16_ST_INCP_P
2057
60.7k
    1073817495U,  // EE_FFT_VST_R32_DECP_P
2058
60.7k
    44924U, // EE_LDF_128_IP_P
2059
60.7k
    46876U, // EE_LDF_128_XP_P
2060
60.7k
    44591U, // EE_LDF_64_IP_P
2061
60.7k
    46543U, // EE_LDF_64_XP_P
2062
60.7k
    4239080U, // EE_LDQA_S16_128_IP_P
2063
60.7k
    67155592U,  // EE_LDQA_S16_128_XP_P
2064
60.7k
    4239142U, // EE_LDQA_S8_128_IP_P
2065
60.7k
    67155654U,  // EE_LDQA_S8_128_XP_P
2066
60.7k
    4239111U, // EE_LDQA_U16_128_IP_P
2067
60.7k
    67155623U,  // EE_LDQA_U16_128_XP_P
2068
60.7k
    4239172U, // EE_LDQA_U8_128_IP_P
2069
60.7k
    67155684U,  // EE_LDQA_U8_128_XP_P
2070
60.7k
    2170100U, // EE_LDXQ_32_P
2071
60.7k
    1610691047U,  // EE_LD_128_USAR_IP_P
2072
60.7k
    80101U, // EE_LD_128_USAR_XP_P
2073
60.7k
    6337029U, // EE_LD_ACCX_IP_P
2074
60.7k
    8433067U, // EE_LD_QACC_H_H_32_IP_P
2075
60.7k
    4239280U, // EE_LD_QACC_H_L_128_IP_P
2076
60.7k
    8433133U, // EE_LD_QACC_L_H_32_IP_P
2077
60.7k
    4239348U, // EE_LD_QACC_L_L_128_IP_P
2078
60.7k
    4239787U, // EE_LD_UA_STATE_IP_P
2079
60.7k
    2147558313U,  // EE_MOVI_32_A_P
2080
60.7k
    2147563909U,  // EE_MOVI_32_Q_P
2081
60.7k
    599071U,  // EE_MOV_S16_QACC_P
2082
60.7k
    599248U,  // EE_MOV_S8_QACC_P
2083
60.7k
    599130U,  // EE_MOV_U16_QACC_P
2084
60.7k
    599305U,  // EE_MOV_U8_QACC_P
2085
60.7k
    69286404U,  // EE_NOTQ_P
2086
60.7k
    539048413U, // EE_ORQ_P
2087
60.7k
    2686531877U,  // EE_SLCI_2Q_P
2088
60.7k
    2177363U, // EE_SLCXXP_2Q_P
2089
60.7k
    2686531900U,  // EE_SRCI_2Q_P
2090
60.7k
    1073816514U,  // EE_SRCMB_S16_QACC_P
2091
60.7k
    1073816694U,  // EE_SRCMB_S8_QACC_P
2092
60.7k
    2174132U, // EE_SRCQ_128_ST_INCP_P
2093
60.7k
    2177388U, // EE_SRCXXP_2Q_P
2094
60.7k
    1610690814U,  // EE_SRC_Q_LD_IP_P
2095
60.7k
    79928U, // EE_SRC_Q_LD_XP_P
2096
60.7k
    539048350U, // EE_SRC_Q_P
2097
60.7k
    539047323U, // EE_SRC_Q_QUP_P
2098
60.7k
    1073789637U,  // EE_SRS_ACCX_P
2099
60.7k
    44950U, // EE_STF_128_IP_P
2100
60.7k
    46902U, // EE_STF_128_XP_P
2101
60.7k
    44616U, // EE_STF_64_IP_P
2102
60.7k
    46568U, // EE_STF_64_XP_P
2103
60.7k
    2170123U, // EE_STXQ_32_P
2104
60.7k
    6337055U, // EE_ST_ACCX_IP_P
2105
60.7k
    8433100U, // EE_ST_QACC_H_H_32_IP_P
2106
60.7k
    4239314U, // EE_ST_QACC_H_L_128_IP_P
2107
60.7k
    8433166U, // EE_ST_QACC_L_H_32_IP_P
2108
60.7k
    4239382U, // EE_ST_QACC_L_L_128_IP_P
2109
60.7k
    4239817U, // EE_ST_UA_STATE_IP_P
2110
60.7k
    536947066U, // EE_VADDS_S16_LD_INCP_P
2111
60.7k
    539041941U, // EE_VADDS_S16_P
2112
60.7k
    536947760U, // EE_VADDS_S16_ST_INCP_P
2113
60.7k
    536946872U, // EE_VADDS_S32_LD_INCP_P
2114
60.7k
    539041252U, // EE_VADDS_S32_P
2115
60.7k
    536947530U, // EE_VADDS_S32_ST_INCP_P
2116
60.7k
    536947292U, // EE_VADDS_S8_LD_INCP_P
2117
60.7k
    539042558U, // EE_VADDS_S8_P
2118
60.7k
    536948018U, // EE_VADDS_S8_ST_INCP_P
2119
60.7k
    539041889U, // EE_VCMP_EQ_S16_P
2120
60.7k
    539041200U, // EE_VCMP_EQ_S32_P
2121
60.7k
    539042508U, // EE_VCMP_EQ_S8_P
2122
60.7k
    539041966U, // EE_VCMP_GT_S16_P
2123
60.7k
    539041277U, // EE_VCMP_GT_S32_P
2124
60.7k
    539042582U, // EE_VCMP_GT_S8_P
2125
60.7k
    539041993U, // EE_VCMP_LT_S16_P
2126
60.7k
    539041304U, // EE_VCMP_LT_S32_P
2127
60.7k
    539042608U, // EE_VCMP_LT_S8_P
2128
60.7k
    3221302989U,  // EE_VLDBC_16_IP_P
2129
60.7k
    67182255U,  // EE_VLDBC_16_P
2130
60.7k
    79469U, // EE_VLDBC_16_XP_P
2131
60.7k
    3758173584U,  // EE_VLDBC_32_IP_P
2132
60.7k
    67181552U,  // EE_VLDBC_32_P
2133
60.7k
    79284U, // EE_VLDBC_32_XP_P
2134
60.7k
    77906U, // EE_VLDBC_8_IP_P
2135
60.7k
    67182942U,  // EE_VLDBC_8_P
2136
60.7k
    79722U, // EE_VLDBC_8_XP_P
2137
60.7k
    2172855U, // EE_VLDHBC_16_INCP_P
2138
60.7k
    1610690402U,  // EE_VLD_128_IP_P
2139
60.7k
    79618U, // EE_VLD_128_XP_P
2140
60.7k
    536948321U, // EE_VLD_H_64_IP_P
2141
60.7k
    79361U, // EE_VLD_H_64_XP_P
2142
60.7k
    536948375U, // EE_VLD_L_64_IP_P
2143
60.7k
    79415U, // EE_VLD_L_64_XP_P
2144
60.7k
    536947134U, // EE_VMAX_S16_LD_INCP_P
2145
60.7k
    539042071U, // EE_VMAX_S16_P
2146
60.7k
    536947828U, // EE_VMAX_S16_ST_INCP_P
2147
60.7k
    536946905U, // EE_VMAX_S32_LD_INCP_P
2148
60.7k
    539041331U, // EE_VMAX_S32_P
2149
60.7k
    536947563U, // EE_VMAX_S32_ST_INCP_P
2150
60.7k
    536947324U, // EE_VMAX_S8_LD_INCP_P
2151
60.7k
    539042683U, // EE_VMAX_S8_P
2152
60.7k
    536948050U, // EE_VMAX_S8_ST_INCP_P
2153
60.7k
    536947001U, // EE_VMIN_S16_LD_INCP_P
2154
60.7k
    539041865U, // EE_VMIN_S16_P
2155
60.7k
    536947695U, // EE_VMIN_S16_ST_INCP_P
2156
60.7k
    536946807U, // EE_VMIN_S32_LD_INCP_P
2157
60.7k
    539041176U, // EE_VMIN_S32_P
2158
60.7k
    536947465U, // EE_VMIN_S32_ST_INCP_P
2159
60.7k
    536947229U, // EE_VMIN_S8_LD_INCP_P
2160
60.7k
    539042485U, // EE_VMIN_S8_P
2161
60.7k
    536947955U, // EE_VMIN_S8_ST_INCP_P
2162
60.7k
    1073819929U,  // EE_VMULAS_S16_ACCX_LD_IP_P
2163
60.7k
    1073820597U,  // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
2164
60.7k
    79955U, // EE_VMULAS_S16_ACCX_LD_XP_P
2165
60.7k
    79097U, // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
2166
60.7k
    69286475U,  // EE_VMULAS_S16_ACCX_P
2167
60.7k
    536946645U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
2168
60.7k
    536949345U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
2169
60.7k
    1073819756U,  // EE_VMULAS_S16_QACC_LD_IP_P
2170
60.7k
    1073820435U,  // EE_VMULAS_S16_QACC_LD_IP_QUP_P
2171
60.7k
    79782U, // EE_VMULAS_S16_QACC_LD_XP_P
2172
60.7k
    78935U, // EE_VMULAS_S16_QACC_LD_XP_QUP_P
2173
60.7k
    69280768U,  // EE_VMULAS_S16_QACC_P
2174
60.7k
    1073820003U,  // EE_VMULAS_S8_ACCX_LD_IP_P
2175
60.7k
    1073820679U,  // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
2176
60.7k
    80029U, // EE_VMULAS_S8_ACCX_LD_XP_P
2177
60.7k
    79179U, // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
2178
60.7k
    69286537U,  // EE_VMULAS_S8_ACCX_P
2179
60.7k
    536946727U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
2180
60.7k
    536949435U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
2181
60.7k
    1073819830U,  // EE_VMULAS_S8_QACC_LD_IP_P
2182
60.7k
    1073820517U,  // EE_VMULAS_S8_QACC_LD_IP_QUP_P
2183
60.7k
    79856U, // EE_VMULAS_S8_QACC_LD_XP_P
2184
60.7k
    79017U, // EE_VMULAS_S8_QACC_LD_XP_QUP_P
2185
60.7k
    69280946U,  // EE_VMULAS_S8_QACC_P
2186
60.7k
    1073819966U,  // EE_VMULAS_U16_ACCX_LD_IP_P
2187
60.7k
    1073820638U,  // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
2188
60.7k
    79992U, // EE_VMULAS_U16_ACCX_LD_XP_P
2189
60.7k
    79138U, // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
2190
60.7k
    69286506U,  // EE_VMULAS_U16_ACCX_P
2191
60.7k
    536946686U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
2192
60.7k
    536949390U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
2193
60.7k
    1073819793U,  // EE_VMULAS_U16_QACC_LD_IP_P
2194
60.7k
    1073820476U,  // EE_VMULAS_U16_QACC_LD_IP_QUP_P
2195
60.7k
    79819U, // EE_VMULAS_U16_QACC_LD_XP_P
2196
60.7k
    78976U, // EE_VMULAS_U16_QACC_LD_XP_QUP_P
2197
60.7k
    69280827U,  // EE_VMULAS_U16_QACC_P
2198
60.7k
    1073820039U,  // EE_VMULAS_U8_ACCX_LD_IP_P
2199
60.7k
    1073820719U,  // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
2200
60.7k
    80065U, // EE_VMULAS_U8_ACCX_LD_XP_P
2201
60.7k
    79219U, // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
2202
60.7k
    69286567U,  // EE_VMULAS_U8_ACCX_P
2203
60.7k
    536946767U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
2204
60.7k
    536949479U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
2205
60.7k
    1073819866U,  // EE_VMULAS_U8_QACC_LD_IP_P
2206
60.7k
    1073820557U,  // EE_VMULAS_U8_QACC_LD_IP_QUP_P
2207
60.7k
    79892U, // EE_VMULAS_U8_QACC_LD_XP_P
2208
60.7k
    79057U, // EE_VMULAS_U8_QACC_LD_XP_QUP_P
2209
60.7k
    69281003U,  // EE_VMULAS_U8_QACC_P
2210
60.7k
    536946969U, // EE_VMUL_S16_LD_INCP_P
2211
60.7k
    539041841U, // EE_VMUL_S16_P
2212
60.7k
    536947663U, // EE_VMUL_S16_ST_INCP_P
2213
60.7k
    536947198U, // EE_VMUL_S8_LD_INCP_P
2214
60.7k
    539042462U, // EE_VMUL_S8_P
2215
60.7k
    536947924U, // EE_VMUL_S8_ST_INCP_P
2216
60.7k
    536947166U, // EE_VMUL_U16_LD_INCP_P
2217
60.7k
    539042095U, // EE_VMUL_U16_P
2218
60.7k
    536947860U, // EE_VMUL_U16_ST_INCP_P
2219
60.7k
    536947355U, // EE_VMUL_U8_LD_INCP_P
2220
60.7k
    539042706U, // EE_VMUL_U8_P
2221
60.7k
    536948081U, // EE_VMUL_U8_ST_INCP_P
2222
60.7k
    539042020U, // EE_VPRELU_S16_P
2223
60.7k
    539042634U, // EE_VPRELU_S8_P
2224
60.7k
    73982U, // EE_VRELU_S16_P
2225
60.7k
    74595U, // EE_VRELU_S8_P
2226
60.7k
    69278801U,  // EE_VSL_32_P
2227
60.7k
    536947386U, // EE_VSMULAS_S16_QACC_LD_INCP_P
2228
60.7k
    1612784608U,  // EE_VSMULAS_S16_QACC_P
2229
60.7k
    536947426U, // EE_VSMULAS_S8_QACC_LD_INCP_P
2230
60.7k
    2686526611U,  // EE_VSMULAS_S8_QACC_P
2231
60.7k
    69279057U,  // EE_VSR_32_P
2232
60.7k
    1610690616U,  // EE_VST_128_IP_P
2233
60.7k
    79696U, // EE_VST_128_XP_P
2234
60.7k
    536948348U, // EE_VST_H_64_IP_P
2235
60.7k
    79388U, // EE_VST_H_64_XP_P
2236
60.7k
    536948402U, // EE_VST_L_64_IP_P
2237
60.7k
    79442U, // EE_VST_L_64_XP_P
2238
60.7k
    536947033U, // EE_VSUBS_S16_LD_INCP_P
2239
60.7k
    539041916U, // EE_VSUBS_S16_P
2240
60.7k
    536947727U, // EE_VSUBS_S16_ST_INCP_P
2241
60.7k
    536946839U, // EE_VSUBS_S32_LD_INCP_P
2242
60.7k
    539041227U, // EE_VSUBS_S32_P
2243
60.7k
    536947497U, // EE_VSUBS_S32_ST_INCP_P
2244
60.7k
    536947260U, // EE_VSUBS_S8_LD_INCP_P
2245
60.7k
    539042534U, // EE_VSUBS_S8_P
2246
60.7k
    536947986U, // EE_VSUBS_S8_ST_INCP_P
2247
60.7k
    69279597U,  // EE_VUNZIP_16_P
2248
60.7k
    69278916U,  // EE_VUNZIP_32_P
2249
60.7k
    69280276U,  // EE_VUNZIP_8_P
2250
60.7k
    69279622U,  // EE_VZIP_16_P
2251
60.7k
    69278941U,  // EE_VZIP_32_P
2252
60.7k
    69280300U,  // EE_VZIP_8_P
2253
60.7k
    539048432U, // EE_XORQ_P
2254
60.7k
    30622U, // EE_ZERO_ACCX_P
2255
60.7k
    30599U, // EE_ZERO_QACC_P
2256
60.7k
    604595U,  // EE_ZERO_Q_P
2257
60.7k
    50510U, // EXTUI_BR2_P
2258
60.7k
    55748U, // EXTUI_BR4_P
2259
60.7k
    61533U, // EXTUI_BR_P
2260
60.7k
    10541699U,  // L8I_P
2261
60.7k
    67183908U,  // LDDEC_P
2262
60.7k
    67184158U,  // LDINC_P
2263
60.7k
    12644456U,  // LOOPBR
2264
60.7k
    67164961U,  // LOOPDEC
2265
60.7k
    122623U,  // LOOPEND
2266
60.7k
    67171337U,  // LOOPINIT
2267
60.7k
    12645415U,  // LOOPSTART
2268
60.7k
    67158791U,  // MOVBA2_P
2269
60.7k
    55965U, // MOVBA2_P2
2270
60.7k
    67164603U,  // MOVBA4_P
2271
60.7k
    55739U, // MOVBA4_P2
2272
60.7k
    67164829U,  // MOVBA_P
2273
60.7k
    55965U, // MOVBA_P2
2274
60.7k
    536945974U, // MULA_DA_HH_LDDEC_P
2275
60.7k
    536946224U, // MULA_DA_HH_LDINC_P
2276
60.7k
    536946090U, // MULA_DA_HL_LDDEC_P
2277
60.7k
    536946340U, // MULA_DA_HL_LDINC_P
2278
60.7k
    536946032U, // MULA_DA_LH_LDDEC_P
2279
60.7k
    536946282U, // MULA_DA_LH_LDINC_P
2280
60.7k
    536946148U, // MULA_DA_LL_LDDEC_P
2281
60.7k
    536946398U, // MULA_DA_LL_LDINC_P
2282
60.7k
    536946003U, // MULA_DD_HH_LDDEC_P
2283
60.7k
    536946253U, // MULA_DD_HH_LDINC_P
2284
60.7k
    536946119U, // MULA_DD_HL_LDDEC_P
2285
60.7k
    536946369U, // MULA_DD_HL_LDINC_P
2286
60.7k
    536946061U, // MULA_DD_LH_LDDEC_P
2287
60.7k
    536946311U, // MULA_DD_LH_LDINC_P
2288
60.7k
    536946177U, // MULA_DD_LL_LDDEC_P
2289
60.7k
    536946427U, // MULA_DD_LL_LDINC_P
2290
60.7k
    10545657U,  // RESTORE_BOOL
2291
60.7k
    62415U, // SELECT
2292
60.7k
    60408U, // SELECT_CC_FP_FP
2293
60.7k
    62484U, // SELECT_CC_FP_INT
2294
60.7k
    60426U, // SELECT_CC_INT_FP
2295
60.7k
    61523U, // SLLI_BR_P
2296
60.7k
    55947U, // SLL_P
2297
60.7k
    10545672U,  // SPILL_BOOL
2298
60.7k
    55930U, // SRA_P
2299
60.7k
    55956U, // SRL_P
2300
60.7k
    567064U,  // WSR_ACCHI_P
2301
60.7k
    567108U,  // WSR_ACCLO_P
2302
60.7k
    564108U,  // WSR_M0_P
2303
60.7k
    564146U,  // WSR_M1_P
2304
60.7k
    564811U,  // WSR_M2_P
2305
60.7k
    564849U,  // WSR_M3_P
2306
60.7k
    567086U,  // XSR_ACCHI_P
2307
60.7k
    567130U,  // XSR_ACCLO_P
2308
60.7k
    564127U,  // XSR_M0_P
2309
60.7k
    564165U,  // XSR_M1_P
2310
60.7k
    564830U,  // XSR_M2_P
2311
60.7k
    564868U,  // XSR_M3_P
2312
60.7k
    69286424U,  // mv_QR_P
2313
60.7k
    67143192U,  // ABS
2314
60.7k
    67143089U,  // ABS_S
2315
60.7k
    32973U, // ADD
2316
60.7k
    81921390U,  // ADDEXPM_S
2317
60.7k
    81921424U,  // ADDEXP_S
2318
60.7k
    536904286U, // ADDI
2319
60.7k
    2147517513U,  // ADDI_N
2320
60.7k
    2684387971U,  // ADDMI
2321
60.7k
    32818U, // ADDX2
2322
60.7k
    32839U, // ADDX4
2323
60.7k
    32874U, // ADDX8
2324
60.7k
    33840U, // ADD_N
2325
60.7k
    34078U, // ADD_S
2326
60.7k
    67170934U,  // AE_ABS16S
2327
60.7k
    67170682U,  // AE_ABS24S
2328
60.7k
    67158740U,  // AE_ABS32
2329
60.7k
    67170586U,  // AE_ABS32S
2330
60.7k
    67164552U,  // AE_ABS64
2331
60.7k
    67170811U,  // AE_ABS64S
2332
60.7k
    55858U, // AE_ADD16
2333
60.7k
    62036U, // AE_ADD16S
2334
60.7k
    61772U, // AE_ADD24S
2335
60.7k
    49749U, // AE_ADD32
2336
60.7k
    61662U, // AE_ADD32S
2337
60.7k
    58299U, // AE_ADD32_HL_LH
2338
60.7k
    55561U, // AE_ADD64
2339
60.7k
    61863U, // AE_ADD64S
2340
60.7k
    49679U, // AE_ADDBRBA32
2341
60.7k
    49736U, // AE_ADDSUB32
2342
60.7k
    61648U, // AE_ADDSUB32S
2343
60.7k
    57070U, // AE_AND
2344
60.7k
    67156887U,  // AE_CVT32X2F16_10
2345
60.7k
    67158414U,  // AE_CVT32X2F16_32
2346
60.7k
    67158508U,  // AE_CVT48A32
2347
60.7k
    67158495U,  // AE_CVT64A32
2348
60.7k
    67166072U,  // AE_CVT64F32_H
2349
60.7k
    67166234U,  // AE_CVTA32F24S_H
2350
60.7k
    67167740U,  // AE_CVTA32F24S_L
2351
60.7k
    67170462U,  // AE_CVTQ56A32S
2352
60.7k
    67166217U,  // AE_CVTQ56P32S_H
2353
60.7k
    67167723U,  // AE_CVTQ56P32S_L
2354
60.7k
    81943284U,  // AE_DB
2355
60.7k
    16934148U,  // AE_DBI
2356
60.7k
    16931818U,  // AE_DBI_IC
2357
60.7k
    16936311U,  // AE_DBI_IP
2358
60.7k
    81943469U,  // AE_DB_IC
2359
60.7k
    81947962U,  // AE_DB_IP
2360
60.7k
    81944411U,  // AE_DIV64D32_H
2361
60.7k
    81945919U,  // AE_DIV64D32_L
2362
60.7k
    55888U, // AE_EQ16
2363
60.7k
    49834U, // AE_EQ32
2364
60.7k
    55657U, // AE_EQ64
2365
60.7k
    3221284048U,  // AE_L16M_I
2366
60.7k
    3772839029U,  // AE_L16M_IU
2367
60.7k
    62944U, // AE_L16M_X
2368
60.7k
    14737024U,  // AE_L16M_XC
2369
60.7k
    14742723U,  // AE_L16M_XU
2370
60.7k
    536929462U, // AE_L16X2M_I
2371
60.7k
    1088484441U,  // AE_L16X2M_IU
2372
60.7k
    62918U, // AE_L16X2M_X
2373
60.7k
    14736996U,  // AE_L16X2M_XC
2374
60.7k
    14742695U,  // AE_L16X2M_XU
2375
60.7k
    1610671190U,  // AE_L16X4_I
2376
60.7k
    2162224405U,  // AE_L16X4_IP
2377
60.7k
    81845463U,  // AE_L16X4_RIC
2378
60.7k
    81850053U,  // AE_L16X4_RIP
2379
60.7k
    62822U, // AE_L16X4_X
2380
60.7k
    14736892U,  // AE_L16X4_XC
2381
60.7k
    14741362U,  // AE_L16X4_XP
2382
60.7k
    3221283950U,  // AE_L16_I
2383
60.7k
    3772837167U,  // AE_L16_IP
2384
60.7k
    62846U, // AE_L16_X
2385
60.7k
    14736918U,  // AE_L16_XC
2386
60.7k
    14741388U,  // AE_L16_XP
2387
60.7k
    536929273U, // AE_L32F24_I
2388
60.7k
    1088482451U,  // AE_L32F24_IP
2389
60.7k
    62759U, // AE_L32F24_X
2390
60.7k
    14736824U,  // AE_L32F24_XC
2391
60.7k
    14741294U,  // AE_L32F24_XP
2392
60.7k
    536929440U, // AE_L32M_I
2393
60.7k
    1088484417U,  // AE_L32M_IU
2394
60.7k
    62896U, // AE_L32M_X
2395
60.7k
    14736972U,  // AE_L32M_XC
2396
60.7k
    14742671U,  // AE_L32M_XU
2397
60.7k
    1610671110U,  // AE_L32X2F24_I
2398
60.7k
    2162224323U,  // AE_L32X2F24_IP
2399
60.7k
    81845399U,  // AE_L32X2F24_RIC
2400
60.7k
    81849989U,  // AE_L32X2F24_RIP
2401
60.7k
    62772U, // AE_L32X2F24_X
2402
60.7k
    14736838U,  // AE_L32X2F24_XC
2403
60.7k
    14741308U,  // AE_L32X2F24_XP
2404
60.7k
    1610671073U,  // AE_L32X2_I
2405
60.7k
    2162224209U,  // AE_L32X2_IP
2406
60.7k
    81845292U,  // AE_L32X2_RIC
2407
60.7k
    81849882U,  // AE_L32X2_RIP
2408
60.7k
    62735U, // AE_L32X2_X
2409
60.7k
    14736798U,  // AE_L32X2_XC
2410
60.7k
    14741268U,  // AE_L32X2_XP
2411
60.7k
    536929239U, // AE_L32_I
2412
60.7k
    1088482346U,  // AE_L32_IP
2413
60.7k
    62725U, // AE_L32_X
2414
60.7k
    14736787U,  // AE_L32_XC
2415
60.7k
    14741257U,  // AE_L32_XP
2416
60.7k
    1610671140U,  // AE_L64_I
2417
60.7k
    2699095267U,  // AE_L64_IP
2418
60.7k
    62802U, // AE_L64_X
2419
60.7k
    14736870U,  // AE_L64_XC
2420
60.7k
    14741340U,  // AE_L64_XP
2421
60.7k
    81845555U,  // AE_LA16X4NEG_PC
2422
60.7k
    81845621U,  // AE_LA16X4POS_PC
2423
60.7k
    3374373777U,  // AE_LA16X4_IC
2424
60.7k
    3374378233U,  // AE_LA16X4_IP
2425
60.7k
    3374374073U,  // AE_LA16X4_RIC
2426
60.7k
    3374378663U,  // AE_LA16X4_RIP
2427
60.7k
    81845540U,  // AE_LA24NEG_PC
2428
60.7k
    81845606U,  // AE_LA24POS_PC
2429
60.7k
    81845523U,  // AE_LA24X2NEG_PC
2430
60.7k
    81845589U,  // AE_LA24X2POS_PC
2431
60.7k
    3374373703U,  // AE_LA24X2_IC
2432
60.7k
    3374378091U,  // AE_LA24X2_IP
2433
60.7k
    3374373960U,  // AE_LA24X2_RIC
2434
60.7k
    3374378550U,  // AE_LA24X2_RIP
2435
60.7k
    3374373731U,  // AE_LA24_IC
2436
60.7k
    3374378119U,  // AE_LA24_IP
2437
60.7k
    3374373990U,  // AE_LA24_RIC
2438
60.7k
    3374378580U,  // AE_LA24_RIP
2439
60.7k
    3374373743U,  // AE_LA32X2F24_IC
2440
60.7k
    3374378145U,  // AE_LA32X2F24_IP
2441
60.7k
    3374374003U,  // AE_LA32X2F24_RIC
2442
60.7k
    3374378593U,  // AE_LA32X2F24_RIP
2443
60.7k
    81845506U,  // AE_LA32X2NEG_PC
2444
60.7k
    81845572U,  // AE_LA32X2POS_PC
2445
60.7k
    3374373675U,  // AE_LA32X2_IC
2446
60.7k
    3374378037U,  // AE_LA32X2_IP
2447
60.7k
    3374373902U,  // AE_LA32X2_RIC
2448
60.7k
    3374378492U,  // AE_LA32X2_RIP
2449
60.7k
    67170032U,  // AE_LA64_PP
2450
60.7k
    1610671150U,  // AE_LALIGN64_I
2451
60.7k
    67164923U,  // AE_LB
2452
60.7k
    21030156U,  // AE_LBI
2453
60.7k
    58679U, // AE_LBK
2454
60.7k
    3758155036U,  // AE_LBKI
2455
60.7k
    67171066U,  // AE_LBS
2456
60.7k
    21030181U,  // AE_LBSI
2457
60.7k
    55868U, // AE_LE16
2458
60.7k
    49772U, // AE_LE32
2459
60.7k
    55571U, // AE_LE64
2460
60.7k
    55897U, // AE_LT16
2461
60.7k
    49897U, // AE_LT32
2462
60.7k
    55709U, // AE_LT64
2463
60.7k
    49917U, // AE_MAX32
2464
60.7k
    55729U, // AE_MAX64
2465
60.7k
    61747U, // AE_MAXABS32S
2466
60.7k
    61972U, // AE_MAXABS64S
2467
60.7k
    49824U, // AE_MIN32
2468
60.7k
    55647U, // AE_MIN64
2469
60.7k
    61733U, // AE_MINABS32S
2470
60.7k
    61958U, // AE_MINABS64S
2471
60.7k
    67171535U,  // AE_MOV
2472
60.7k
    67156701U,  // AE_MOVAD16_0
2473
60.7k
    67157689U,  // AE_MOVAD16_1
2474
60.7k
    67158151U,  // AE_MOVAD16_2
2475
60.7k
    67163910U,  // AE_MOVAD16_3
2476
60.7k
    67166058U,  // AE_MOVAD32_H
2477
60.7k
    67167566U,  // AE_MOVAD32_L
2478
60.7k
    67169101U,  // AE_MOVALIGN
2479
60.7k
    67164700U,  // AE_MOVDA16
2480
60.7k
    55032U, // AE_MOVDA16X2
2481
60.7k
    67158557U,  // AE_MOVDA32
2482
60.7k
    54910U, // AE_MOVDA32X2
2483
60.7k
    14834141U,  // AE_MOVF16X4
2484
60.7k
    14833292U,  // AE_MOVF32X2
2485
60.7k
    14833948U,  // AE_MOVF64
2486
60.7k
    23127342U,  // AE_MOVI
2487
60.7k
    14834191U,  // AE_MOVT16X4
2488
60.7k
    14833346U,  // AE_MOVT32X2
2489
60.7k
    14834086U,  // AE_MOVT64
2490
60.7k
    55786U, // AE_MUL16X4
2491
60.7k
    59868U, // AE_MUL32U_LL
2492
60.7k
    48289U, // AE_MUL32X16_H0
2493
60.7k
    50765U, // AE_MUL32X16_H0_S2
2494
60.7k
    49059U, // AE_MUL32X16_H1
2495
60.7k
    51423U, // AE_MUL32X16_H1_S2
2496
60.7k
    50006U, // AE_MUL32X16_H2
2497
60.7k
    51973U, // AE_MUL32X16_H2_S2
2498
60.7k
    55180U, // AE_MUL32X16_H3
2499
60.7k
    52681U, // AE_MUL32X16_H3_S2
2500
60.7k
    48760U, // AE_MUL32X16_L0
2501
60.7k
    51302U, // AE_MUL32X16_L0_S2
2502
60.7k
    49254U, // AE_MUL32X16_L1
2503
60.7k
    51648U, // AE_MUL32X16_L1_S2
2504
60.7k
    50477U, // AE_MUL32X16_L2
2505
60.7k
    52510U, // AE_MUL32X16_L2_S2
2506
60.7k
    55375U, // AE_MUL32X16_L3
2507
60.7k
    52906U, // AE_MUL32X16_L3_S2
2508
60.7k
    57575U, // AE_MUL32_HH
2509
60.7k
    57824U, // AE_MUL32_LH
2510
60.7k
    59298U, // AE_MUL32_LL
2511
60.7k
    54303U, // AE_MUL32_LL_S2
2512
60.7k
    25352656U,  // AE_MULA16X4
2513
60.7k
    14838221U,  // AE_MULA32U_LL
2514
60.7k
    14826587U,  // AE_MULA32X16_H0
2515
60.7k
    14829051U,  // AE_MULA32X16_H0_S2
2516
60.7k
    14827357U,  // AE_MULA32X16_H1
2517
60.7k
    14829709U,  // AE_MULA32X16_H1_S2
2518
60.7k
    14828304U,  // AE_MULA32X16_H2
2519
60.7k
    14830259U,  // AE_MULA32X16_H2_S2
2520
60.7k
    14833478U,  // AE_MULA32X16_H3
2521
60.7k
    14830967U,  // AE_MULA32X16_H3_S2
2522
60.7k
    14827058U,  // AE_MULA32X16_L0
2523
60.7k
    14829588U,  // AE_MULA32X16_L0_S2
2524
60.7k
    14827552U,  // AE_MULA32X16_L1
2525
60.7k
    14829934U,  // AE_MULA32X16_L1_S2
2526
60.7k
    14828775U,  // AE_MULA32X16_L2
2527
60.7k
    14830796U,  // AE_MULA32X16_L2_S2
2528
60.7k
    14833673U,  // AE_MULA32X16_L3
2529
60.7k
    14831192U,  // AE_MULA32X16_L3_S2
2530
60.7k
    14835929U,  // AE_MULA32_HH
2531
60.7k
    14836178U,  // AE_MULA32_LH
2532
60.7k
    14837652U,  // AE_MULA32_LL
2533
60.7k
    14832654U,  // AE_MULA32_LL_S2
2534
60.7k
    14837693U,  // AE_MULAAD24_HH_LL
2535
60.7k
    14832687U,  // AE_MULAAD24_HH_LL_S2
2536
60.7k
    14836219U,  // AE_MULAAD24_HL_LH
2537
60.7k
    14831736U,  // AE_MULAAD24_HL_LH_S2
2538
60.7k
    14827460U,  // AE_MULAAD32X16_H0_L1
2539
60.7k
    14829830U,  // AE_MULAAD32X16_H0_L1_S2
2540
60.7k
    14826690U,  // AE_MULAAD32X16_H1_L0
2541
60.7k
    14829172U,  // AE_MULAAD32X16_H1_L0_S2
2542
60.7k
    14833581U,  // AE_MULAAD32X16_H2_L3
2543
60.7k
    14831088U,  // AE_MULAAD32X16_H2_L3_S2
2544
60.7k
    14828407U,  // AE_MULAAD32X16_H3_L2
2545
60.7k
    14830380U,  // AE_MULAAD32X16_H3_L2_S2
2546
60.7k
    14826282U,  // AE_MULAAFD16SS_11_00
2547
60.7k
    14828949U,  // AE_MULAAFD16SS_11_00_S2
2548
60.7k
    14827669U,  // AE_MULAAFD16SS_13_02
2549
60.7k
    14830055U,  // AE_MULAAFD16SS_13_02_S2
2550
60.7k
    14827809U,  // AE_MULAAFD16SS_33_22
2551
60.7k
    14830157U,  // AE_MULAAFD16SS_33_22_S2
2552
60.7k
    14837771U,  // AE_MULAAFD24_HH_LL
2553
60.7k
    14832777U,  // AE_MULAAFD24_HH_LL_S2
2554
60.7k
    14836258U,  // AE_MULAAFD24_HL_LH
2555
60.7k
    14831781U,  // AE_MULAAFD24_HL_LH_S2
2556
60.7k
    14827505U,  // AE_MULAAFD32X16_H0_L1
2557
60.7k
    14829881U,  // AE_MULAAFD32X16_H0_L1_S2
2558
60.7k
    14826780U,  // AE_MULAAFD32X16_H1_L0
2559
60.7k
    14829274U,  // AE_MULAAFD32X16_H1_L0_S2
2560
60.7k
    14833626U,  // AE_MULAAFD32X16_H2_L3
2561
60.7k
    14831139U,  // AE_MULAAFD32X16_H2_L3_S2
2562
60.7k
    14828497U,  // AE_MULAAFD32X16_H3_L2
2563
60.7k
    14830482U,  // AE_MULAAFD32X16_H3_L2_S2
2564
60.7k
    14833776U,  // AE_MULAC24
2565
60.7k
    14835647U,  // AE_MULAC32X16_H
2566
60.7k
    14837153U,  // AE_MULAC32X16_L
2567
60.7k
    14826232U,  // AE_MULAF16SS_00
2568
60.7k
    14828890U,  // AE_MULAF16SS_00_S2
2569
60.7k
    14826409U,  // AE_MULAF16SS_10
2570
60.7k
    14827207U,  // AE_MULAF16SS_11
2571
60.7k
    14826459U,  // AE_MULAF16SS_20
2572
60.7k
    14827257U,  // AE_MULAF16SS_21
2573
60.7k
    14827759U,  // AE_MULAF16SS_22
2574
60.7k
    14826509U,  // AE_MULAF16SS_30
2575
60.7k
    14827307U,  // AE_MULAF16SS_31
2576
60.7k
    14827936U,  // AE_MULAF16SS_32
2577
60.7k
    14833428U,  // AE_MULAF16SS_33
2578
60.7k
    25359182U,  // AE_MULAF16X4SS
2579
60.7k
    14835970U,  // AE_MULAF32R_HH
2580
60.7k
    14836459U,  // AE_MULAF32R_LH
2581
60.7k
    14838013U,  // AE_MULAF32R_LL
2582
60.7k
    14833055U,  // AE_MULAF32R_LL_S2
2583
60.7k
    14836066U,  // AE_MULAF32S_HH
2584
60.7k
    14836555U,  // AE_MULAF32S_LH
2585
60.7k
    14838109U,  // AE_MULAF32S_LL
2586
60.7k
    14833111U,  // AE_MULAF32S_LL_S2
2587
60.7k
    14826604U,  // AE_MULAF32X16_H0
2588
60.7k
    14829071U,  // AE_MULAF32X16_H0_S2
2589
60.7k
    14827374U,  // AE_MULAF32X16_H1
2590
60.7k
    14829729U,  // AE_MULAF32X16_H1_S2
2591
60.7k
    14828321U,  // AE_MULAF32X16_H2
2592
60.7k
    14830279U,  // AE_MULAF32X16_H2_S2
2593
60.7k
    14833495U,  // AE_MULAF32X16_H3
2594
60.7k
    14830987U,  // AE_MULAF32X16_H3_S2
2595
60.7k
    14827075U,  // AE_MULAF32X16_L0
2596
60.7k
    14829608U,  // AE_MULAF32X16_L0_S2
2597
60.7k
    14827569U,  // AE_MULAF32X16_L1
2598
60.7k
    14829954U,  // AE_MULAF32X16_L1_S2
2599
60.7k
    14828792U,  // AE_MULAF32X16_L2
2600
60.7k
    14830816U,  // AE_MULAF32X16_L2_S2
2601
60.7k
    14833690U,  // AE_MULAF32X16_L3
2602
60.7k
    14831212U,  // AE_MULAF32X16_L3_S2
2603
60.7k
    14837299U,  // AE_MULAF48Q32SP16S_L
2604
60.7k
    14832225U,  // AE_MULAF48Q32SP16S_L_S2
2605
60.7k
    14837538U,  // AE_MULAF48Q32SP16U_L
2606
60.7k
    14832515U,  // AE_MULAF48Q32SP16U_L_S2
2607
60.7k
    14834391U,  // AE_MULAFC24RA
2608
60.7k
    14835823U,  // AE_MULAFC32X16RAS_H
2609
60.7k
    14837432U,  // AE_MULAFC32X16RAS_L
2610
60.7k
    25354208U,  // AE_MULAFD24X2_FIR_H
2611
60.7k
    25355714U,  // AE_MULAFD24X2_FIR_L
2612
60.7k
    25354545U,  // AE_MULAFD32X16X2_FIR_HH
2613
60.7k
    25356131U,  // AE_MULAFD32X16X2_FIR_HL
2614
60.7k
    25355034U,  // AE_MULAFD32X16X2_FIR_LH
2615
60.7k
    25356588U,  // AE_MULAFD32X16X2_FIR_LL
2616
60.7k
    14839776U,  // AE_MULAFP24X2R
2617
60.7k
    14834341U,  // AE_MULAFP24X2RA
2618
60.7k
    14831313U,  // AE_MULAFP24X2RA_S2
2619
60.7k
    14833222U,  // AE_MULAFP24X2R_S2
2620
60.7k
    14835755U,  // AE_MULAFP32X16X2RAS_H
2621
60.7k
    14831511U,  // AE_MULAFP32X16X2RAS_H_S2
2622
60.7k
    14837364U,  // AE_MULAFP32X16X2RAS_L
2623
60.7k
    14832364U,  // AE_MULAFP32X16X2RAS_L_S2
2624
60.7k
    14835864U,  // AE_MULAFP32X16X2RS_H
2625
60.7k
    14831588U,  // AE_MULAFP32X16X2RS_H_S2
2626
60.7k
    14837473U,  // AE_MULAFP32X16X2RS_L
2627
60.7k
    14832441U,  // AE_MULAFP32X16X2RS_L_S2
2628
60.7k
    14840500U,  // AE_MULAFP32X2RAS
2629
60.7k
    14840591U,  // AE_MULAFP32X2RS
2630
60.7k
    14831372U,  // AE_MULAFQ32SP24S_H_S2
2631
60.7k
    14832086U,  // AE_MULAFQ32SP24S_L_S2
2632
60.7k
    14833359U,  // AE_MULAP24X2
2633
60.7k
    14830917U,  // AE_MULAP24X2_S2
2634
60.7k
    14835591U,  // AE_MULAP32X16X2_H
2635
60.7k
    14837097U,  // AE_MULAP32X16X2_L
2636
60.7k
    14833305U,  // AE_MULAP32X2
2637
60.7k
    14832299U,  // AE_MULAQ32SP16S_L_S2
2638
60.7k
    14832589U,  // AE_MULAQ32SP16U_L_S2
2639
60.7k
    14831417U,  // AE_MULARFQ32SP24S_H_S2
2640
60.7k
    14832131U,  // AE_MULARFQ32SP24S_L_S2
2641
60.7k
    14836113U,  // AE_MULAS32F48P16S_HH
2642
60.7k
    14831662U,  // AE_MULAS32F48P16S_HH_S2
2643
60.7k
    14836602U,  // AE_MULAS32F48P16S_LH
2644
60.7k
    14832012U,  // AE_MULAS32F48P16S_LH_S2
2645
60.7k
    14838156U,  // AE_MULAS32F48P16S_LL
2646
60.7k
    14833148U,  // AE_MULAS32F48P16S_LL_S2
2647
60.7k
    14837935U,  // AE_MULASD24_HH_LL
2648
60.7k
    14832965U,  // AE_MULASD24_HH_LL_S2
2649
60.7k
    14836381U,  // AE_MULASD24_HL_LH
2650
60.7k
    14831922U,  // AE_MULASD24_HL_LH_S2
2651
60.7k
    14826968U,  // AE_MULASD32X16_H1_L0
2652
60.7k
    14829486U,  // AE_MULASD32X16_H1_L0_S2
2653
60.7k
    14828685U,  // AE_MULASD32X16_H3_L2
2654
60.7k
    14830694U,  // AE_MULASD32X16_H3_L2_S2
2655
60.7k
    14837853U,  // AE_MULASFD24_HH_LL
2656
60.7k
    14832871U,  // AE_MULASFD24_HH_LL_S2
2657
60.7k
    14836299U,  // AE_MULASFD24_HL_LH
2658
60.7k
    14831828U,  // AE_MULASFD24_HL_LH_S2
2659
60.7k
    14826874U,  // AE_MULASFD32X16_H1_L0
2660
60.7k
    14829380U,  // AE_MULASFD32X16_H1_L0_S2
2661
60.7k
    14828591U,  // AE_MULASFD32X16_H3_L2
2662
60.7k
    14830588U,  // AE_MULASFD32X16_H3_L2_S2
2663
60.7k
    55420U, // AE_MULC24
2664
60.7k
    57296U, // AE_MULC32X16_H
2665
60.7k
    58802U, // AE_MULC32X16_L
2666
60.7k
    47881U, // AE_MULF16SS_00
2667
60.7k
    50542U, // AE_MULF16SS_00_S2
2668
60.7k
    48058U, // AE_MULF16SS_10
2669
60.7k
    48856U, // AE_MULF16SS_11
2670
60.7k
    48108U, // AE_MULF16SS_20
2671
60.7k
    48906U, // AE_MULF16SS_21
2672
60.7k
    49408U, // AE_MULF16SS_22
2673
60.7k
    48158U, // AE_MULF16SS_30
2674
60.7k
    48956U, // AE_MULF16SS_31
2675
60.7k
    49585U, // AE_MULF16SS_32
2676
60.7k
    55077U, // AE_MULF16SS_33
2677
60.7k
    62302U, // AE_MULF16X4SS
2678
60.7k
    57618U, // AE_MULF32R_HH
2679
60.7k
    58107U, // AE_MULF32R_LH
2680
60.7k
    59661U, // AE_MULF32R_LL
2681
60.7k
    54706U, // AE_MULF32R_LL_S2
2682
60.7k
    57714U, // AE_MULF32S_HH
2683
60.7k
    58203U, // AE_MULF32S_LH
2684
60.7k
    59757U, // AE_MULF32S_LL
2685
60.7k
    54762U, // AE_MULF32S_LL_S2
2686
60.7k
    48254U, // AE_MULF32X16_H0
2687
60.7k
    50724U, // AE_MULF32X16_H0_S2
2688
60.7k
    49024U, // AE_MULF32X16_H1
2689
60.7k
    51382U, // AE_MULF32X16_H1_S2
2690
60.7k
    49971U, // AE_MULF32X16_H2
2691
60.7k
    51932U, // AE_MULF32X16_H2_S2
2692
60.7k
    55145U, // AE_MULF32X16_H3
2693
60.7k
    52640U, // AE_MULF32X16_H3_S2
2694
60.7k
    48725U, // AE_MULF32X16_L0
2695
60.7k
    51261U, // AE_MULF32X16_L0_S2
2696
60.7k
    49219U, // AE_MULF32X16_L1
2697
60.7k
    51607U, // AE_MULF32X16_L1_S2
2698
60.7k
    50442U, // AE_MULF32X16_L2
2699
60.7k
    52469U, // AE_MULF32X16_L2_S2
2700
60.7k
    55340U, // AE_MULF32X16_L3
2701
60.7k
    52865U, // AE_MULF32X16_L3_S2
2702
60.7k
    58953U, // AE_MULF48Q32SP16S_L
2703
60.7k
    53882U, // AE_MULF48Q32SP16S_L_S2
2704
60.7k
    59192U, // AE_MULF48Q32SP16U_L
2705
60.7k
    54172U, // AE_MULF48Q32SP16U_L_S2
2706
60.7k
    56038U, // AE_MULFC24RA
2707
60.7k
    57476U, // AE_MULFC32X16RAS_H
2708
60.7k
    59085U, // AE_MULFC32X16RAS_L
2709
60.7k
    57333U, // AE_MULFD24X2_FIR_H
2710
60.7k
    58839U, // AE_MULFD24X2_FIR_L
2711
60.7k
    57674U, // AE_MULFD32X16X2_FIR_HH
2712
60.7k
    59260U, // AE_MULFD32X16X2_FIR_HL
2713
60.7k
    58163U, // AE_MULFD32X16X2_FIR_LH
2714
60.7k
    59717U, // AE_MULFD32X16X2_FIR_LL
2715
60.7k
    62185U, // AE_MULFP16X4RAS
2716
60.7k
    61986U, // AE_MULFP16X4S
2717
60.7k
    61424U, // AE_MULFP24X2R
2718
60.7k
    55990U, // AE_MULFP24X2RA
2719
60.7k
    52965U, // AE_MULFP24X2RA_S2
2720
60.7k
    54873U, // AE_MULFP24X2R_S2
2721
60.7k
    57410U, // AE_MULFP32X16X2RAS_H
2722
60.7k
    53169U, // AE_MULFP32X16X2RAS_H_S2
2723
60.7k
    59019U, // AE_MULFP32X16X2RAS_L
2724
60.7k
    54022U, // AE_MULFP32X16X2RAS_L_S2
2725
60.7k
    57518U, // AE_MULFP32X16X2RS_H
2726
60.7k
    53245U, // AE_MULFP32X16X2RS_H_S2
2727
60.7k
    59127U, // AE_MULFP32X16X2RS_L
2728
60.7k
    54098U, // AE_MULFP32X16X2RS_L_S2
2729
60.7k
    62150U, // AE_MULFP32X2RAS
2730
60.7k
    62240U, // AE_MULFP32X2RS
2731
60.7k
    53027U, // AE_MULFQ32SP24S_H_S2
2732
60.7k
    53741U, // AE_MULFQ32SP24S_L_S2
2733
60.7k
    55005U, // AE_MULP24X2
2734
60.7k
    52566U, // AE_MULP24X2_S2
2735
60.7k
    57242U, // AE_MULP32X16X2_H
2736
60.7k
    58748U, // AE_MULP32X16X2_L
2737
60.7k
    54951U, // AE_MULP32X2
2738
60.7k
    53953U, // AE_MULQ32SP16S_L_S2
2739
60.7k
    54243U, // AE_MULQ32SP16U_L_S2
2740
60.7k
    53073U, // AE_MULRFQ32SP24S_H_S2
2741
60.7k
    53787U, // AE_MULRFQ32SP24S_L_S2
2742
60.7k
    25352694U,  // AE_MULS16X4
2743
60.7k
    57767U, // AE_MULS32F48P16S_HH
2744
60.7k
    53319U, // AE_MULS32F48P16S_HH_S2
2745
60.7k
    58256U, // AE_MULS32F48P16S_LH
2746
60.7k
    53669U, // AE_MULS32F48P16S_LH_S2
2747
60.7k
    59810U, // AE_MULS32F48P16S_LL
2748
60.7k
    54805U, // AE_MULS32F48P16S_LL_S2
2749
60.7k
    14838250U,  // AE_MULS32U_LL
2750
60.7k
    14826673U,  // AE_MULS32X16_H0
2751
60.7k
    14829152U,  // AE_MULS32X16_H0_S2
2752
60.7k
    14827443U,  // AE_MULS32X16_H1
2753
60.7k
    14829810U,  // AE_MULS32X16_H1_S2
2754
60.7k
    14828390U,  // AE_MULS32X16_H2
2755
60.7k
    14830360U,  // AE_MULS32X16_H2_S2
2756
60.7k
    14833564U,  // AE_MULS32X16_H3
2757
60.7k
    14831068U,  // AE_MULS32X16_H3_S2
2758
60.7k
    14827144U,  // AE_MULS32X16_L0
2759
60.7k
    14829689U,  // AE_MULS32X16_L0_S2
2760
60.7k
    14827638U,  // AE_MULS32X16_L1
2761
60.7k
    14830035U,  // AE_MULS32X16_L1_S2
2762
60.7k
    14828861U,  // AE_MULS32X16_L2
2763
60.7k
    14830897U,  // AE_MULS32X16_L2_S2
2764
60.7k
    14833759U,  // AE_MULS32X16_L3
2765
60.7k
    14831293U,  // AE_MULS32X16_L3_S2
2766
60.7k
    14835956U,  // AE_MULS32_HH
2767
60.7k
    14836205U,  // AE_MULS32_LH
2768
60.7k
    14837679U,  // AE_MULS32_LL
2769
60.7k
    14837732U,  // AE_MULSAD24_HH_LL
2770
60.7k
    14832732U,  // AE_MULSAD24_HH_LL_S2
2771
60.7k
    14826735U,  // AE_MULSAD32X16_H1_L0
2772
60.7k
    14829223U,  // AE_MULSAD32X16_H1_L0_S2
2773
60.7k
    14828452U,  // AE_MULSAD32X16_H3_L2
2774
60.7k
    14830431U,  // AE_MULSAD32X16_H3_L2_S2
2775
60.7k
    14837812U,  // AE_MULSAFD24_HH_LL
2776
60.7k
    14832824U,  // AE_MULSAFD24_HH_LL_S2
2777
60.7k
    14826827U,  // AE_MULSAFD32X16_H1_L0
2778
60.7k
    14829327U,  // AE_MULSAFD32X16_H1_L0_S2
2779
60.7k
    14828544U,  // AE_MULSAFD32X16_H3_L2
2780
60.7k
    14830535U,  // AE_MULSAFD32X16_H3_L2_S2
2781
60.7k
    14826265U,  // AE_MULSF16SS_00
2782
60.7k
    14828929U,  // AE_MULSF16SS_00_S2
2783
60.7k
    14826442U,  // AE_MULSF16SS_10
2784
60.7k
    14827240U,  // AE_MULSF16SS_11
2785
60.7k
    14826492U,  // AE_MULSF16SS_20
2786
60.7k
    14827290U,  // AE_MULSF16SS_21
2787
60.7k
    14827792U,  // AE_MULSF16SS_22
2788
60.7k
    14826542U,  // AE_MULSF16SS_30
2789
60.7k
    14827340U,  // AE_MULSF16SS_31
2790
60.7k
    14827969U,  // AE_MULSF16SS_32
2791
60.7k
    14833461U,  // AE_MULSF16SS_33
2792
60.7k
    25359213U,  // AE_MULSF16X4SS
2793
60.7k
    14836001U,  // AE_MULSF32R_HH
2794
60.7k
    14836490U,  // AE_MULSF32R_LH
2795
60.7k
    14838044U,  // AE_MULSF32R_LL
2796
60.7k
    14833092U,  // AE_MULSF32R_LL_S2
2797
60.7k
    14836097U,  // AE_MULSF32S_HH
2798
60.7k
    14836586U,  // AE_MULSF32S_LH
2799
60.7k
    14838140U,  // AE_MULSF32S_LL
2800
60.7k
    14826639U,  // AE_MULSF32X16_H0
2801
60.7k
    14829112U,  // AE_MULSF32X16_H0_S2
2802
60.7k
    14827409U,  // AE_MULSF32X16_H1
2803
60.7k
    14829770U,  // AE_MULSF32X16_H1_S2
2804
60.7k
    14828356U,  // AE_MULSF32X16_H2
2805
60.7k
    14830320U,  // AE_MULSF32X16_H2_S2
2806
60.7k
    14833530U,  // AE_MULSF32X16_H3
2807
60.7k
    14831028U,  // AE_MULSF32X16_H3_S2
2808
60.7k
    14827110U,  // AE_MULSF32X16_L0
2809
60.7k
    14829649U,  // AE_MULSF32X16_L0_S2
2810
60.7k
    14827604U,  // AE_MULSF32X16_L1
2811
60.7k
    14829995U,  // AE_MULSF32X16_L1_S2
2812
60.7k
    14828827U,  // AE_MULSF32X16_L2
2813
60.7k
    14830857U,  // AE_MULSF32X16_L2_S2
2814
60.7k
    14833725U,  // AE_MULSF32X16_L3
2815
60.7k
    14831253U,  // AE_MULSF32X16_L3_S2
2816
60.7k
    14837342U,  // AE_MULSF48Q32SP16S_L
2817
60.7k
    14832274U,  // AE_MULSF48Q32SP16S_L_S2
2818
60.7k
    14837581U,  // AE_MULSF48Q32SP16U_L
2819
60.7k
    14832564U,  // AE_MULSF48Q32SP16U_L_S2
2820
60.7k
    14839807U,  // AE_MULSFP24X2R
2821
60.7k
    14834374U,  // AE_MULSFP24X2RA
2822
60.7k
    14831352U,  // AE_MULSFP24X2RA_S2
2823
60.7k
    14833259U,  // AE_MULSFP24X2R_S2
2824
60.7k
    14835800U,  // AE_MULSFP32X16X2RAS_H
2825
60.7k
    14831562U,  // AE_MULSFP32X16X2RAS_H_S2
2826
60.7k
    14837409U,  // AE_MULSFP32X16X2RAS_L
2827
60.7k
    14832415U,  // AE_MULSFP32X16X2RAS_L_S2
2828
60.7k
    14835907U,  // AE_MULSFP32X16X2RS_H
2829
60.7k
    14831637U,  // AE_MULSFP32X16X2RS_H_S2
2830
60.7k
    14837516U,  // AE_MULSFP32X16X2RS_L
2831
60.7k
    14832490U,  // AE_MULSFP32X16X2RS_L_S2
2832
60.7k
    14840535U,  // AE_MULSFP32X2RAS
2833
60.7k
    14840624U,  // AE_MULSFP32X2RS
2834
60.7k
    14831488U,  // AE_MULSFQ32SP24S_H_S2
2835
60.7k
    14832202U,  // AE_MULSFQ32SP24S_L_S2
2836
60.7k
    14833386U,  // AE_MULSP24X2
2837
60.7k
    14830950U,  // AE_MULSP24X2_S2
2838
60.7k
    14835628U,  // AE_MULSP32X16X2_H
2839
60.7k
    14837134U,  // AE_MULSP32X16X2_L
2840
60.7k
    14833332U,  // AE_MULSP32X2
2841
60.7k
    14832342U,  // AE_MULSQ32SP16S_L_S2
2842
60.7k
    14832632U,  // AE_MULSQ32SP16U_L_S2
2843
60.7k
    14831464U,  // AE_MULSRFQ32SP24S_H_S2
2844
60.7k
    14832178U,  // AE_MULSRFQ32SP24S_L_S2
2845
60.7k
    14836156U,  // AE_MULSS32F48P16S_HH
2846
60.7k
    14831711U,  // AE_MULSS32F48P16S_HH_S2
2847
60.7k
    14836645U,  // AE_MULSS32F48P16S_LH
2848
60.7k
    14832061U,  // AE_MULSS32F48P16S_LH_S2
2849
60.7k
    14838199U,  // AE_MULSS32F48P16S_LL
2850
60.7k
    14833197U,  // AE_MULSS32F48P16S_LL_S2
2851
60.7k
    14837974U,  // AE_MULSSD24_HH_LL
2852
60.7k
    14833010U,  // AE_MULSSD24_HH_LL_S2
2853
60.7k
    14836420U,  // AE_MULSSD24_HL_LH
2854
60.7k
    14831967U,  // AE_MULSSD24_HL_LH_S2
2855
60.7k
    14827013U,  // AE_MULSSD32X16_H1_L0
2856
60.7k
    14829537U,  // AE_MULSSD32X16_H1_L0_S2
2857
60.7k
    14828730U,  // AE_MULSSD32X16_H3_L2
2858
60.7k
    14830745U,  // AE_MULSSD32X16_H3_L2_S2
2859
60.7k
    14826327U,  // AE_MULSSFD16SS_11_00
2860
60.7k
    14829000U,  // AE_MULSSFD16SS_11_00_S2
2861
60.7k
    14827714U,  // AE_MULSSFD16SS_13_02
2862
60.7k
    14830106U,  // AE_MULSSFD16SS_13_02_S2
2863
60.7k
    14827854U,  // AE_MULSSFD16SS_33_22
2864
60.7k
    14830208U,  // AE_MULSSFD16SS_33_22_S2
2865
60.7k
    14837894U,  // AE_MULSSFD24_HH_LL
2866
60.7k
    14832918U,  // AE_MULSSFD24_HH_LL_S2
2867
60.7k
    14836340U,  // AE_MULSSFD24_HL_LH
2868
60.7k
    14831875U,  // AE_MULSSFD24_HL_LH_S2
2869
60.7k
    14826921U,  // AE_MULSSFD32X16_H1_L0
2870
60.7k
    14829433U,  // AE_MULSSFD32X16_H1_L0_S2
2871
60.7k
    14828638U,  // AE_MULSSFD32X16_H3_L2
2872
60.7k
    14830641U,  // AE_MULSSFD32X16_H3_L2_S2
2873
60.7k
    59344U, // AE_MULZAAD24_HH_LL
2874
60.7k
    54341U, // AE_MULZAAD24_HH_LL_S2
2875
60.7k
    57870U, // AE_MULZAAD24_HL_LH
2876
60.7k
    53390U, // AE_MULZAAD24_HL_LH_S2
2877
60.7k
    49114U, // AE_MULZAAD32X16_H0_L1
2878
60.7k
    51487U, // AE_MULZAAD32X16_H0_L1_S2
2879
60.7k
    48344U, // AE_MULZAAD32X16_H1_L0
2880
60.7k
    50829U, // AE_MULZAAD32X16_H1_L0_S2
2881
60.7k
    55235U, // AE_MULZAAD32X16_H2_L3
2882
60.7k
    52745U, // AE_MULZAAD32X16_H2_L3_S2
2883
60.7k
    50061U, // AE_MULZAAD32X16_H3_L2
2884
60.7k
    52037U, // AE_MULZAAD32X16_H3_L2_S2
2885
60.7k
    47936U, // AE_MULZAAFD16SS_11_00
2886
60.7k
    50606U, // AE_MULZAAFD16SS_11_00_S2
2887
60.7k
    49323U, // AE_MULZAAFD16SS_13_02
2888
60.7k
    51712U, // AE_MULZAAFD16SS_13_02_S2
2889
60.7k
    49463U, // AE_MULZAAFD16SS_33_22
2890
60.7k
    51814U, // AE_MULZAAFD16SS_33_22_S2
2891
60.7k
    59423U, // AE_MULZAAFD24_HH_LL
2892
60.7k
    54432U, // AE_MULZAAFD24_HH_LL_S2
2893
60.7k
    57910U, // AE_MULZAAFD24_HL_LH
2894
60.7k
    53436U, // AE_MULZAAFD24_HL_LH_S2
2895
60.7k
    49160U, // AE_MULZAAFD32X16_H0_L1
2896
60.7k
    51539U, // AE_MULZAAFD32X16_H0_L1_S2
2897
60.7k
    48435U, // AE_MULZAAFD32X16_H1_L0
2898
60.7k
    50932U, // AE_MULZAAFD32X16_H1_L0_S2
2899
60.7k
    55281U, // AE_MULZAAFD32X16_H2_L3
2900
60.7k
    52797U, // AE_MULZAAFD32X16_H2_L3_S2
2901
60.7k
    50152U, // AE_MULZAAFD32X16_H3_L2
2902
60.7k
    52140U, // AE_MULZAAFD32X16_H3_L2_S2
2903
60.7k
    59586U, // AE_MULZASD24_HH_LL
2904
60.7k
    54619U, // AE_MULZASD24_HH_LL_S2
2905
60.7k
    58032U, // AE_MULZASD24_HL_LH
2906
60.7k
    53576U, // AE_MULZASD24_HL_LH_S2
2907
60.7k
    48622U, // AE_MULZASD32X16_H1_L0
2908
60.7k
    51143U, // AE_MULZASD32X16_H1_L0_S2
2909
60.7k
    50339U, // AE_MULZASD32X16_H3_L2
2910
60.7k
    52351U, // AE_MULZASD32X16_H3_L2_S2
2911
60.7k
    59505U, // AE_MULZASFD24_HH_LL
2912
60.7k
    54526U, // AE_MULZASFD24_HH_LL_S2
2913
60.7k
    57951U, // AE_MULZASFD24_HL_LH
2914
60.7k
    53483U, // AE_MULZASFD24_HL_LH_S2
2915
60.7k
    48529U, // AE_MULZASFD32X16_H1_L0
2916
60.7k
    51038U, // AE_MULZASFD32X16_H1_L0_S2
2917
60.7k
    50246U, // AE_MULZASFD32X16_H3_L2
2918
60.7k
    52246U, // AE_MULZASFD32X16_H3_L2_S2
2919
60.7k
    59383U, // AE_MULZSAD24_HH_LL
2920
60.7k
    54386U, // AE_MULZSAD24_HH_LL_S2
2921
60.7k
    48389U, // AE_MULZSAD32X16_H1_L0
2922
60.7k
    50880U, // AE_MULZSAD32X16_H1_L0_S2
2923
60.7k
    50106U, // AE_MULZSAD32X16_H3_L2
2924
60.7k
    52088U, // AE_MULZSAD32X16_H3_L2_S2
2925
60.7k
    59464U, // AE_MULZSAFD24_HH_LL
2926
60.7k
    54479U, // AE_MULZSAFD24_HH_LL_S2
2927
60.7k
    48482U, // AE_MULZSAFD32X16_H1_L0
2928
60.7k
    50985U, // AE_MULZSAFD32X16_H1_L0_S2
2929
60.7k
    50199U, // AE_MULZSAFD32X16_H3_L2
2930
60.7k
    52193U, // AE_MULZSAFD32X16_H3_L2_S2
2931
60.7k
    59625U, // AE_MULZSSD24_HH_LL
2932
60.7k
    54664U, // AE_MULZSSD24_HH_LL_S2
2933
60.7k
    58071U, // AE_MULZSSD24_HL_LH
2934
60.7k
    53621U, // AE_MULZSSD24_HL_LH_S2
2935
60.7k
    48667U, // AE_MULZSSD32X16_H1_L0
2936
60.7k
    51194U, // AE_MULZSSD32X16_H1_L0_S2
2937
60.7k
    50384U, // AE_MULZSSD32X16_H3_L2
2938
60.7k
    52402U, // AE_MULZSSD32X16_H3_L2_S2
2939
60.7k
    47981U, // AE_MULZSSFD16SS_11_00
2940
60.7k
    50657U, // AE_MULZSSFD16SS_11_00_S2
2941
60.7k
    49368U, // AE_MULZSSFD16SS_13_02
2942
60.7k
    51763U, // AE_MULZSSFD16SS_13_02_S2
2943
60.7k
    49508U, // AE_MULZSSFD16SS_33_22
2944
60.7k
    51865U, // AE_MULZSSFD16SS_33_22_S2
2945
60.7k
    59546U, // AE_MULZSSFD24_HH_LL
2946
60.7k
    54573U, // AE_MULZSSFD24_HH_LL_S2
2947
60.7k
    57992U, // AE_MULZSSFD24_HL_LH
2948
60.7k
    53530U, // AE_MULZSSFD24_HL_LH_S2
2949
60.7k
    48576U, // AE_MULZSSFD32X16_H1_L0
2950
60.7k
    51091U, // AE_MULZSSFD32X16_H1_L0_S2
2951
60.7k
    50293U, // AE_MULZSSFD32X16_H3_L2
2952
60.7k
    52299U, // AE_MULZSSFD32X16_H3_L2_S2
2953
60.7k
    57078U, // AE_NAND
2954
60.7k
    67170911U,  // AE_NEG16S
2955
60.7k
    67170647U,  // AE_NEG24S
2956
60.7k
    67158645U,  // AE_NEG32
2957
60.7k
    67170551U,  // AE_NEG32S
2958
60.7k
    67164455U,  // AE_NEG64
2959
60.7k
    67170776U,  // AE_NEG64S
2960
60.7k
    67164405U,  // AE_NSA64
2961
60.7k
    67156715U,  // AE_NSAZ16_0
2962
60.7k
    67167580U,  // AE_NSAZ32_L
2963
60.7k
    61553U, // AE_OR
2964
60.7k
    551704744U, // AE_PKSR24
2965
60.7k
    551699123U, // AE_PKSR32
2966
60.7k
    60052U, // AE_ROUND16X4F32SASYM
2967
60.7k
    60140U, // AE_ROUND16X4F32SSYM
2968
60.7k
    60118U, // AE_ROUND24X2F48SASYM
2969
60.7k
    60203U, // AE_ROUND24X2F48SSYM
2970
60.7k
    60096U, // AE_ROUND32X2F48SASYM
2971
60.7k
    60182U, // AE_ROUND32X2F48SSYM
2972
60.7k
    60074U, // AE_ROUND32X2F64SASYM
2973
60.7k
    60161U, // AE_ROUND32X2F64SSYM
2974
60.7k
    67168874U,  // AE_ROUNDSP16F24ASYM
2975
60.7k
    67168811U,  // AE_ROUNDSP16F24SYM
2976
60.7k
    59987U, // AE_ROUNDSP16Q48X2ASYM
2977
60.7k
    59925U, // AE_ROUNDSP16Q48X2SYM
2978
60.7k
    67168895U,  // AE_ROUNDSQ32F48ASYM
2979
60.7k
    67168831U,  // AE_ROUNDSQ32F48SYM
2980
60.7k
    3221283987U,  // AE_S16M_L_I
2981
60.7k
    3772937267U,  // AE_S16M_L_IU
2982
60.7k
    62883U, // AE_S16M_L_X
2983
60.7k
    14835262U,  // AE_S16M_L_XC
2984
60.7k
    14840961U,  // AE_S16M_L_XU
2985
60.7k
    536929475U, // AE_S16X2M_I
2986
60.7k
    1088582759U,  // AE_S16X2M_IU
2987
60.7k
    62931U, // AE_S16X2M_X
2988
60.7k
    14835314U,  // AE_S16X2M_XC
2989
60.7k
    14841013U,  // AE_S16X2M_XU
2990
60.7k
    1610671202U,  // AE_S16X4_I
2991
60.7k
    2162322722U,  // AE_S16X4_IP
2992
60.7k
    81943781U,  // AE_S16X4_RIC
2993
60.7k
    81948371U,  // AE_S16X4_RIP
2994
60.7k
    62834U, // AE_S16X4_X
2995
60.7k
    14835209U,  // AE_S16X4_XC
2996
60.7k
    14839679U,  // AE_S16X4_XP
2997
60.7k
    3221283787U,  // AE_S16_0_I
2998
60.7k
    3772935197U,  // AE_S16_0_IP
2999
60.7k
    62713U, // AE_S16_0_X
3000
60.7k
    14835078U,  // AE_S16_0_XC
3001
60.7k
    14839548U,  // AE_S16_0_XP
3002
60.7k
    536929514U, // AE_S24RA64S_I
3003
60.7k
    1088581100U,  // AE_S24RA64S_IP
3004
60.7k
    62970U, // AE_S24RA64S_X
3005
60.7k
    14835356U,  // AE_S24RA64S_XC
3006
60.7k
    14839748U,  // AE_S24RA64S_XP
3007
60.7k
    14839258U,  // AE_S24X2RA64S_IP
3008
60.7k
    536929412U, // AE_S32F24_L_I
3009
60.7k
    1088581032U,  // AE_S32F24_L_IP
3010
60.7k
    62868U, // AE_S32F24_L_X
3011
60.7k
    14835246U,  // AE_S32F24_L_XC
3012
60.7k
    14839716U,  // AE_S32F24_L_XP
3013
60.7k
    536929451U, // AE_S32M_I
3014
60.7k
    1088582733U,  // AE_S32M_IU
3015
60.7k
    62907U, // AE_S32M_X
3016
60.7k
    14835288U,  // AE_S32M_XC
3017
60.7k
    14840987U,  // AE_S32M_XU
3018
60.7k
    536929499U, // AE_S32RA64S_I
3019
60.7k
    1088581048U,  // AE_S32RA64S_IP
3020
60.7k
    62955U, // AE_S32RA64S_X
3021
60.7k
    14835340U,  // AE_S32RA64S_XC
3022
60.7k
    14839732U,  // AE_S32RA64S_XP
3023
60.7k
    1610671125U,  // AE_S32X2F24_I
3024
60.7k
    2162322643U,  // AE_S32X2F24_IP
3025
60.7k
    81943720U,  // AE_S32X2F24_RIC
3026
60.7k
    81948310U,  // AE_S32X2F24_RIP
3027
60.7k
    62787U, // AE_S32X2F24_X
3028
60.7k
    14835158U,  // AE_S32X2F24_XC
3029
60.7k
    14839628U,  // AE_S32X2F24_XP
3030
60.7k
    14839240U,  // AE_S32X2RA64S_IP
3031
60.7k
    1610671085U,  // AE_S32X2_I
3032
60.7k
    2162322526U,  // AE_S32X2_IP
3033
60.7k
    81943610U,  // AE_S32X2_RIC
3034
60.7k
    81948200U,  // AE_S32X2_RIP
3035
60.7k
    62747U, // AE_S32X2_X
3036
60.7k
    14835115U,  // AE_S32X2_XC
3037
60.7k
    14839585U,  // AE_S32X2_XP
3038
60.7k
    536929400U, // AE_S32_L_I
3039
60.7k
    1088581005U,  // AE_S32_L_IP
3040
60.7k
    62856U, // AE_S32_L_X
3041
60.7k
    14835233U,  // AE_S32_L_XC
3042
60.7k
    14839703U,  // AE_S32_L_XP
3043
60.7k
    1610671180U,  // AE_S64_I
3044
60.7k
    2699193582U,  // AE_S64_IP
3045
60.7k
    62812U, // AE_S64_X
3046
60.7k
    14835185U,  // AE_S64_XC
3047
60.7k
    14839655U,  // AE_S64_XP
3048
60.7k
    92461983U,  // AE_SA16X4_IC
3049
60.7k
    92466439U,  // AE_SA16X4_IP
3050
60.7k
    92462280U,  // AE_SA16X4_RIC
3051
60.7k
    92466870U,  // AE_SA16X4_RIP
3052
60.7k
    92461909U,  // AE_SA24X2_IC
3053
60.7k
    92466297U,  // AE_SA24X2_IP
3054
60.7k
    92462167U,  // AE_SA24X2_RIC
3055
60.7k
    92466757U,  // AE_SA24X2_RIP
3056
60.7k
    92462080U,  // AE_SA24_L_IC
3057
60.7k
    92466586U,  // AE_SA24_L_IP
3058
60.7k
    92462323U,  // AE_SA24_L_RIC
3059
60.7k
    92466913U,  // AE_SA24_L_RIP
3060
60.7k
    92461952U,  // AE_SA32X2F24_IC
3061
60.7k
    92466354U,  // AE_SA32X2F24_IP
3062
60.7k
    92462213U,  // AE_SA32X2F24_RIC
3063
60.7k
    92466803U,  // AE_SA32X2F24_RIP
3064
60.7k
    92461881U,  // AE_SA32X2_IC
3065
60.7k
    92466243U,  // AE_SA32X2_IP
3066
60.7k
    92462109U,  // AE_SA32X2_RIC
3067
60.7k
    92466699U,  // AE_SA32X2_RIP
3068
60.7k
    81947600U,  // AE_SA64NEG_FP
3069
60.7k
    81947615U,  // AE_SA64POS_FP
3070
60.7k
    1610671165U,  // AE_SALIGN64_I
3071
60.7k
    55811U, // AE_SAT16X4
3072
60.7k
    67170693U,  // AE_SAT24S
3073
60.7k
    67170985U,  // AE_SAT48S
3074
60.7k
    67170973U,  // AE_SATQ56S
3075
60.7k
    81943298U,  // AE_SB
3076
60.7k
    679763U,  // AE_SBF
3077
60.7k
    678879U,  // AE_SBF_IC
3078
60.7k
    683372U,  // AE_SBF_IP
3079
60.7k
    1088578836U,  // AE_SBI
3080
60.7k
    1088576501U,  // AE_SBI_IC
3081
60.7k
    1088580994U,  // AE_SBI_IP
3082
60.7k
    81943479U,  // AE_SB_IC
3083
60.7k
    81947972U,  // AE_SB_IP
3084
60.7k
    58617U, // AE_SEL16I
3085
60.7k
    60224U, // AE_SEL16I_N
3086
60.7k
    1610662642U,  // AE_SEXT32
3087
60.7k
    67156868U,  // AE_SEXT32X2D16_10
3088
60.7k
    67158395U,  // AE_SEXT32X2D16_32
3089
60.7k
    67158569U,  // AE_SHA32
3090
60.7k
    67169176U,  // AE_SHORTSWAP
3091
60.7k
    62001U, // AE_SLAA16S
3092
60.7k
    49657U, // AE_SLAA32
3093
60.7k
    61613U, // AE_SLAA32S
3094
60.7k
    55508U, // AE_SLAA64
3095
60.7k
    61840U, // AE_SLAA64S
3096
60.7k
    55906U, // AE_SLAAQ56
3097
60.7k
    2147545706U,  // AE_SLAI16S
3098
60.7k
    2684409991U,  // AE_SLAI24
3099
60.7k
    2684416354U,  // AE_SLAI24S
3100
60.7k
    2684404351U,  // AE_SLAI32
3101
60.7k
    2684416258U,  // AE_SLAI32S
3102
60.7k
    3221281073U,  // AE_SLAI64
3103
60.7k
    3221287395U,  // AE_SLAI64S
3104
60.7k
    3221287553U,  // AE_SLAISQ56S
3105
60.7k
    67164339U,  // AE_SLAS24
3106
60.7k
    67170670U,  // AE_SLAS24S
3107
60.7k
    67158718U,  // AE_SLAS32
3108
60.7k
    67170574U,  // AE_SLAS32S
3109
60.7k
    67164530U,  // AE_SLAS64
3110
60.7k
    67170799U,  // AE_SLAS64S
3111
60.7k
    67164782U,  // AE_SLASQ56
3112
60.7k
    67170959U,  // AE_SLASSQ56S
3113
60.7k
    49618U, // AE_SRA64_32
3114
60.7k
    62273U, // AE_SRAA16RS
3115
60.7k
    62013U, // AE_SRAA16S
3116
60.7k
    49668U, // AE_SRAA32
3117
60.7k
    62210U, // AE_SRAA32RS
3118
60.7k
    61625U, // AE_SRAA32S
3119
60.7k
    55519U, // AE_SRAA64
3120
60.7k
    2147539525U,  // AE_SRAI16
3121
60.7k
    2147545103U,  // AE_SRAI16R
3122
60.7k
    2684410002U,  // AE_SRAI24
3123
60.7k
    2684404362U,  // AE_SRAI32
3124
60.7k
    2684415956U,  // AE_SRAI32R
3125
60.7k
    3221281084U,  // AE_SRAI64
3126
60.7k
    67164350U,  // AE_SRAS24
3127
60.7k
    67158729U,  // AE_SRAS32
3128
60.7k
    67164541U,  // AE_SRAS64
3129
60.7k
    49715U, // AE_SRLA32
3130
60.7k
    55530U, // AE_SRLA64
3131
60.7k
    2684410013U,  // AE_SRLI24
3132
60.7k
    2684404373U,  // AE_SRLI32
3133
60.7k
    3221281095U,  // AE_SRLI64
3134
60.7k
    67164361U,  // AE_SRLS24
3135
60.7k
    67158750U,  // AE_SRLS32
3136
60.7k
    67164562U,  // AE_SRLS64
3137
60.7k
    55848U, // AE_SUB16
3138
60.7k
    62025U, // AE_SUB16S
3139
60.7k
    61761U, // AE_SUB24S
3140
60.7k
    49726U, // AE_SUB32
3141
60.7k
    61637U, // AE_SUB32S
3142
60.7k
    55551U, // AE_SUB64
3143
60.7k
    61852U, // AE_SUB64S
3144
60.7k
    49759U, // AE_SUBADD32
3145
60.7k
    61673U, // AE_SUBADD32S
3146
60.7k
    58893U, // AE_TRUNCA32F64S_L
3147
60.7k
    61874U, // AE_TRUNCA32X2F64S
3148
60.7k
    58912U, // AE_TRUNCI32F64S_L
3149
60.7k
    61893U, // AE_TRUNCI32X2F64S
3150
60.7k
    678665U,  // AE_VLDL16C
3151
60.7k
    678849U,  // AE_VLDL16C_IC
3152
60.7k
    683342U,  // AE_VLDL16C_IP
3153
60.7k
    62391U, // AE_VLDL16T
3154
60.7k
    62367U, // AE_VLDL32T
3155
60.7k
    586750U,  // AE_VLDSHT
3156
60.7k
    14742467U,  // AE_VLEL16T
3157
60.7k
    14742443U,  // AE_VLEL32T
3158
60.7k
    678677U,  // AE_VLES16C
3159
60.7k
    678864U,  // AE_VLES16C_IC
3160
60.7k
    683357U,  // AE_VLES16C_IP
3161
60.7k
    61560U, // AE_XOR
3162
60.7k
    579922U,  // AE_ZALIGN64
3163
60.7k
    67141690U,  // ALL4
3164
60.7k
    67141725U,  // ALL8
3165
60.7k
    32978U, // AND
3166
60.7k
    32905U, // ANDB
3167
60.7k
    32941U, // ANDBC
3168
60.7k
    67141718U,  // ANY4
3169
60.7k
    67141753U,  // ANY8
3170
60.7k
    3758130190U,  // BALL
3171
60.7k
    3758130915U,  // BANY
3172
60.7k
    3758129320U,  // BBC
3173
60.7k
    27296344U,  // BBCI
3174
60.7k
    3758130717U,  // BBS
3175
60.7k
    27296407U,  // BBSI
3176
60.7k
    3758130339U,  // BEQ
3177
60.7k
    29393546U,  // BEQI
3178
60.7k
    12617493U,  // BEQZ
3179
60.7k
    12615924U,  // BF
3180
60.7k
    3758129379U,  // BGE
3181
60.7k
    29393508U,  // BGEI
3182
60.7k
    3758130840U,  // BGEU
3183
60.7k
    31490753U,  // BGEUI
3184
60.7k
    12617456U,  // BGEZ
3185
60.7k
    3758130746U,  // BLT
3186
60.7k
    29393582U,  // BLTI
3187
60.7k
    3758130864U,  // BLTU
3188
60.7k
    31490760U,  // BLTUI
3189
60.7k
    12617516U,  // BLTZ
3190
60.7k
    3758130196U,  // BNALL
3191
60.7k
    3758129384U,  // BNE
3192
60.7k
    29393514U,  // BNEI
3193
60.7k
    12617470U,  // BNEZ
3194
60.7k
    3758129389U,  // BNONE
3195
60.7k
    33751776U,  // BREAK
3196
60.7k
    722009U,  // BREAK_N
3197
60.7k
    12617270U,  // BT
3198
60.7k
    229387U,  // CALL0
3199
60.7k
    229402U,  // CALL12
3200
60.7k
    229433U,  // CALL4
3201
60.7k
    229468U,  // CALL8
3202
60.7k
    557074U,  // CALLX0
3203
60.7k
    557090U,  // CALLX12
3204
60.7k
    557134U,  // CALLX4
3205
60.7k
    557169U,  // CALLX8
3206
60.7k
    2147517791U,  // CEIL_S
3207
60.7k
    1610647086U,  // CLAMPS
3208
60.7k
    263767U,  // CLR_BIT_GPIO_OUT
3209
60.7k
    33588688U,  // CONST_S
3210
60.7k
    67142905U,  // DIV0_S
3211
60.7k
    14812552U,  // DIVN_S
3212
60.7k
    30504U, // DSYNC
3213
60.7k
    39625U, // EE_ANDQ
3214
60.7k
    81828640U,  // EE_BITREV
3215
60.7k
    263764U,  // EE_CLR_BIT_GPIO_OUT
3216
60.7k
    35367U, // EE_CMUL_S16
3217
60.7k
    220237611U, // EE_CMUL_S16_LD_INCP
3218
60.7k
    537039119U, // EE_CMUL_S16_ST_INCP
3219
60.7k
    25202587U,  // EE_FFT_AMS_S16_LD_INCP
3220
60.7k
    25204093U,  // EE_FFT_AMS_S16_LD_INCP_UAUP
3221
60.7k
    25202192U,  // EE_FFT_AMS_S16_LD_R32_DECP
3222
60.7k
    1347967U, // EE_FFT_AMS_S16_ST_INCP
3223
60.7k
    153131330U, // EE_FFT_CMUL_S16_LD_XP
3224
60.7k
    14817875U,  // EE_FFT_CMUL_S16_ST_XP
3225
60.7k
    35349U, // EE_FFT_R2BF_S16
3226
60.7k
    14717173U,  // EE_FFT_R2BF_S16_ST_INCP
3227
60.7k
    1088556589U,  // EE_FFT_VST_R32_DECP
3228
60.7k
    558185U,  // EE_GET_GPIO_IN
3229
60.7k
    37804U, // EE_LDF_128_IP
3230
60.7k
    39186U, // EE_LDF_128_XP
3231
60.7k
    37575U, // EE_LDF_64_IP
3232
60.7k
    38957U, // EE_LDF_64_XP
3233
60.7k
    35787594U,  // EE_LDQA_S16_128_IP
3234
60.7k
    81926320U,  // EE_LDQA_S16_128_XP
3235
60.7k
    35787636U,  // EE_LDQA_S8_128_IP
3236
60.7k
    81926362U,  // EE_LDQA_S8_128_XP
3237
60.7k
    35787615U,  // EE_LDQA_U16_128_IP
3238
60.7k
    81926341U,  // EE_LDQA_U16_128_XP
3239
60.7k
    35787656U,  // EE_LDQA_U8_128_IP
3240
60.7k
    81926382U,  // EE_LDQA_U8_128_XP
3241
60.7k
    34912U, // EE_LDXQ_32
3242
60.7k
    1625331017U,  // EE_LD_128_USAR_IP
3243
60.7k
    14719551U,  // EE_LD_128_USAR_XP
3244
60.7k
    37885277U,  // EE_LD_ACCX_IP
3245
60.7k
    39981675U,  // EE_LD_QACC_H_H_32_IP
3246
60.7k
    35787724U,  // EE_LD_QACC_H_L_128_IP
3247
60.7k
    39981721U,  // EE_LD_QACC_L_H_32_IP
3248
60.7k
    35787772U,  // EE_LD_QACC_L_L_128_IP
3249
60.7k
    35788065U,  // EE_LD_UA_STATE_IP
3250
60.7k
    2189560737U,  // EE_MOVI_32_A
3251
60.7k
    2147523179U,  // EE_MOVI_32_Q
3252
60.7k
    560111U,  // EE_MOV_S16_QACC
3253
60.7k
    560228U,  // EE_MOV_S8_QACC
3254
60.7k
    560150U,  // EE_MOV_U16_QACC
3255
60.7k
    560265U,  // EE_MOV_U8_QACC
3256
60.7k
    67148518U,  // EE_NOTQ
3257
60.7k
    39635U, // EE_ORQ
3258
60.7k
    263785U,  // EE_SET_BIT_GPIO_OUT
3259
60.7k
    44210833U,  // EE_SLCI_2Q
3260
60.7k
    1874603U, // EE_SLCXXP_2Q
3261
60.7k
    44210846U,  // EE_SRCI_2Q
3262
60.7k
    1073777584U,  // EE_SRCMB_S16_QACC
3263
60.7k
    1073777704U,  // EE_SRCMB_S8_QACC
3264
60.7k
    14815684U,  // EE_SRCQ_128_ST_INCP
3265
60.7k
    1874618U, // EE_SRCXXP_2Q
3266
60.7k
    39546U, // EE_SRC_Q
3267
60.7k
    287347878U, // EE_SRC_Q_LD_IP
3268
60.7k
    153131460U, // EE_SRC_Q_LD_XP
3269
60.7k
    14718989U,  // EE_SRC_Q_QUP
3270
60.7k
    1073781630U,  // EE_SRS_ACCX
3271
60.7k
    14816188U,  // EE_STF_128_IP
3272
60.7k
    14817570U,  // EE_STF_128_XP
3273
60.7k
    14815958U,  // EE_STF_64_IP
3274
60.7k
    14817340U,  // EE_STF_64_XP
3275
60.7k
    34925U, // EE_STXQ_32
3276
60.7k
    37885293U,  // EE_ST_ACCX_IP
3277
60.7k
    39981698U,  // EE_ST_QACC_H_H_32_IP
3278
60.7k
    35787748U,  // EE_ST_QACC_H_L_128_IP
3279
60.7k
    39981744U,  // EE_ST_QACC_L_H_32_IP
3280
60.7k
    35787796U,  // EE_ST_QACC_L_L_128_IP
3281
60.7k
    35788085U,  // EE_ST_UA_STATE_IP
3282
60.7k
    35441U, // EE_VADDS_S16
3283
60.7k
    3441463172U,  // EE_VADDS_S16_LD_INCP
3284
60.7k
    537039208U, // EE_VADDS_S16_ST_INCP
3285
60.7k
    34996U, // EE_VADDS_S32
3286
60.7k
    3441463038U,  // EE_VADDS_S32_LD_INCP
3287
60.7k
    537039048U, // EE_VADDS_S32_ST_INCP
3288
60.7k
    35644U, // EE_VADDS_S8
3289
60.7k
    3441463328U,  // EE_VADDS_S8_LD_INCP
3290
60.7k
    537039386U, // EE_VADDS_S8_ST_INCP
3291
60.7k
    35409U, // EE_VCMP_EQ_S16
3292
60.7k
    34964U, // EE_VCMP_EQ_S32
3293
60.7k
    35614U, // EE_VCMP_EQ_S8
3294
60.7k
    35456U, // EE_VCMP_GT_S16
3295
60.7k
    35011U, // EE_VCMP_GT_S32
3296
60.7k
    35658U, // EE_VCMP_GT_S8
3297
60.7k
    35473U, // EE_VCMP_LT_S16
3298
60.7k
    35028U, // EE_VCMP_LT_S32
3299
60.7k
    35674U, // EE_VCMP_LT_S8
3300
60.7k
    67144171U,  // EE_VLDBC_16
3301
60.7k
    2162201385U,  // EE_VLDBC_16_IP
3302
60.7k
    14719119U,  // EE_VLDBC_16_XP
3303
60.7k
    67143722U,  // EE_VLDBC_32
3304
60.7k
    2699072090U,  // EE_VLDBC_32_IP
3305
60.7k
    14719004U,  // EE_VLDBC_32_XP
3306
60.7k
    67144413U,  // EE_VLDBC_8
3307
60.7k
    3235943226U,  // EE_VLDBC_8_IP
3308
60.7k
    14719136U,  // EE_VLDBC_8_XP
3309
60.7k
    36419U, // EE_VLDHBC_16_INCP
3310
60.7k
    1625330588U,  // EE_VLD_128_IP
3311
60.7k
    14719234U,  // EE_VLD_128_XP
3312
60.7k
    3772814053U,  // EE_VLD_H_64_IP
3313
60.7k
    14719051U,  // EE_VLD_H_64_XP
3314
60.7k
    3772814087U,  // EE_VLD_L_64_IP
3315
60.7k
    14719085U,  // EE_VLD_L_64_XP
3316
60.7k
    35521U, // EE_VMAX_S16
3317
60.7k
    3441463220U,  // EE_VMAX_S16_LD_INCP
3318
60.7k
    537039256U, // EE_VMAX_S16_ST_INCP
3319
60.7k
    35045U, // EE_VMAX_S32
3320
60.7k
    3441463061U,  // EE_VMAX_S32_LD_INCP
3321
60.7k
    537039071U, // EE_VMAX_S32_ST_INCP
3322
60.7k
    35719U, // EE_VMAX_S8
3323
60.7k
    3441463350U,  // EE_VMAX_S8_LD_INCP
3324
60.7k
    537039408U, // EE_VMAX_S8_ST_INCP
3325
60.7k
    35395U, // EE_VMIN_S16
3326
60.7k
    3441463127U,  // EE_VMIN_S16_LD_INCP
3327
60.7k
    537039163U, // EE_VMIN_S16_ST_INCP
3328
60.7k
    34950U, // EE_VMIN_S32
3329
60.7k
    3441462993U,  // EE_VMIN_S32_LD_INCP
3330
60.7k
    537039003U, // EE_VMIN_S32_ST_INCP
3331
60.7k
    35601U, // EE_VMIN_S8
3332
60.7k
    3441463285U,  // EE_VMIN_S8_LD_INCP
3333
60.7k
    537039343U, // EE_VMIN_S8_ST_INCP
3334
60.7k
    67148588U,  // EE_VMULAS_S16_ACCX
3335
60.7k
    14718135U,  // EE_VMULAS_S16_ACCX_LD_IP
3336
60.7k
    354457247U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
3337
60.7k
    14719445U,  // EE_VMULAS_S16_ACCX_LD_XP
3338
60.7k
    153130899U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
3339
60.7k
    67144666U,  // EE_VMULAS_S16_QACC
3340
60.7k
    14716503U,  // EE_VMULAS_S16_QACC_LDBC_INCP
3341
60.7k
    153130395U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
3342
60.7k
    14718012U,  // EE_VMULAS_S16_QACC_LD_IP
3343
60.7k
    354457125U, // EE_VMULAS_S16_QACC_LD_IP_QUP
3344
60.7k
    14719322U,  // EE_VMULAS_S16_QACC_LD_XP
3345
60.7k
    153130777U, // EE_VMULAS_S16_QACC_LD_XP_QUP
3346
60.7k
    67148630U,  // EE_VMULAS_S8_ACCX
3347
60.7k
    14718189U,  // EE_VMULAS_S8_ACCX_LD_IP
3348
60.7k
    354457309U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
3349
60.7k
    14719499U,  // EE_VMULAS_S8_ACCX_LD_XP
3350
60.7k
    153130961U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
3351
60.7k
    67144784U,  // EE_VMULAS_S8_QACC
3352
60.7k
    14716565U,  // EE_VMULAS_S8_QACC_LDBC_INCP
3353
60.7k
    153130465U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
3354
60.7k
    14718066U,  // EE_VMULAS_S8_QACC_LD_IP
3355
60.7k
    354457187U, // EE_VMULAS_S8_QACC_LD_IP_QUP
3356
60.7k
    14719376U,  // EE_VMULAS_S8_QACC_LD_XP
3357
60.7k
    153130839U, // EE_VMULAS_S8_QACC_LD_XP_QUP
3358
60.7k
    67148609U,  // EE_VMULAS_U16_ACCX
3359
60.7k
    14718162U,  // EE_VMULAS_U16_ACCX_LD_IP
3360
60.7k
    354457278U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
3361
60.7k
    14719472U,  // EE_VMULAS_U16_ACCX_LD_XP
3362
60.7k
    153130930U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
3363
60.7k
    67144705U,  // EE_VMULAS_U16_QACC
3364
60.7k
    14716534U,  // EE_VMULAS_U16_QACC_LDBC_INCP
3365
60.7k
    153130430U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
3366
60.7k
    14718039U,  // EE_VMULAS_U16_QACC_LD_IP
3367
60.7k
    354457156U, // EE_VMULAS_U16_QACC_LD_IP_QUP
3368
60.7k
    14719349U,  // EE_VMULAS_U16_QACC_LD_XP
3369
60.7k
    153130808U, // EE_VMULAS_U16_QACC_LD_XP_QUP
3370
60.7k
    67148650U,  // EE_VMULAS_U8_ACCX
3371
60.7k
    14718215U,  // EE_VMULAS_U8_ACCX_LD_IP
3372
60.7k
    354457339U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
3373
60.7k
    14719525U,  // EE_VMULAS_U8_ACCX_LD_XP
3374
60.7k
    153130991U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
3375
60.7k
    67144821U,  // EE_VMULAS_U8_QACC
3376
60.7k
    14716595U,  // EE_VMULAS_U8_QACC_LDBC_INCP
3377
60.7k
    153130499U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
3378
60.7k
    14718092U,  // EE_VMULAS_U8_QACC_LD_IP
3379
60.7k
    354457217U, // EE_VMULAS_U8_QACC_LD_IP_QUP
3380
60.7k
    14719402U,  // EE_VMULAS_U8_QACC_LD_XP
3381
60.7k
    153130869U, // EE_VMULAS_U8_QACC_LD_XP_QUP
3382
60.7k
    35381U, // EE_VMUL_S16
3383
60.7k
    3441463105U,  // EE_VMUL_S16_LD_INCP
3384
60.7k
    537039141U, // EE_VMUL_S16_ST_INCP
3385
60.7k
    35588U, // EE_VMUL_S8
3386
60.7k
    3441463264U,  // EE_VMUL_S8_LD_INCP
3387
60.7k
    537039322U, // EE_VMUL_S8_ST_INCP
3388
60.7k
    35535U, // EE_VMUL_U16
3389
60.7k
    3441463242U,  // EE_VMUL_U16_LD_INCP
3390
60.7k
    537039278U, // EE_VMUL_U16_ST_INCP
3391
60.7k
    35732U, // EE_VMUL_U8
3392
60.7k
    3441463371U,  // EE_VMUL_U8_LD_INCP
3393
60.7k
    537039429U, // EE_VMUL_U8_ST_INCP
3394
60.7k
    35490U, // EE_VPRELU_S16
3395
60.7k
    35690U, // EE_VPRELU_S8
3396
60.7k
    14813874U,  // EE_VRELU_S16
3397
60.7k
    14814073U,  // EE_VRELU_S8
3398
60.7k
    67143736U,  // EE_VSL_32
3399
60.7k
    1610648516U,  // EE_VSMULAS_S16_QACC
3400
60.7k
    14717024U,  // EE_VSMULAS_S16_QACC_LD_INCP
3401
60.7k
    2684390459U,  // EE_VSMULAS_S8_QACC
3402
60.7k
    14717054U,  // EE_VSMULAS_S8_QACC_LD_INCP
3403
60.7k
    67143802U,  // EE_VSR_32
3404
60.7k
    1625429036U,  // EE_VST_128_IP
3405
60.7k
    14817586U,  // EE_VST_128_XP
3406
60.7k
    3772912374U,  // EE_VST_H_64_IP
3407
60.7k
    14817372U,  // EE_VST_H_64_XP
3408
60.7k
    3772912408U,  // EE_VST_L_64_IP
3409
60.7k
    14817406U,  // EE_VST_L_64_XP
3410
60.7k
    35426U, // EE_VSUBS_S16
3411
60.7k
    3441463149U,  // EE_VSUBS_S16_LD_INCP
3412
60.7k
    537039185U, // EE_VSUBS_S16_ST_INCP
3413
60.7k
    34981U, // EE_VSUBS_S32
3414
60.7k
    3441463015U,  // EE_VSUBS_S32_LD_INCP
3415
60.7k
    537039025U, // EE_VSUBS_S32_ST_INCP
3416
60.7k
    35630U, // EE_VSUBS_S8
3417
60.7k
    3441463306U,  // EE_VSUBS_S8_LD_INCP
3418
60.7k
    537039364U, // EE_VSUBS_S8_ST_INCP
3419
60.7k
    690681U,  // EE_VUNZIP_16
3420
60.7k
    690244U,  // EE_VUNZIP_32
3421
60.7k
    690922U,  // EE_VUNZIP_8
3422
60.7k
    690696U,  // EE_VZIP_16
3423
60.7k
    690259U,  // EE_VZIP_32
3424
60.7k
    690936U,  // EE_VZIP_8
3425
60.7k
    67143231U,  // EE_WR_MASK_GPIO_OUT
3426
60.7k
    39644U, // EE_XORQ
3427
60.7k
    1735U,  // EE_ZERO_ACCX
3428
60.7k
    563845U,  // EE_ZERO_Q
3429
60.7k
    186U, // EE_ZERO_QACC
3430
60.7k
    46171881U,  // ENTRY
3431
60.7k
    30510U, // ESYNC
3432
60.7k
    30658U, // EXCW
3433
60.7k
    2684388047U,  // EXTUI
3434
60.7k
    30673U, // EXTW
3435
60.7k
    2147517881U,  // FLOAT_S
3436
60.7k
    2147517864U,  // FLOOR_S
3437
60.7k
    558188U,  // GET_GPIO_IN
3438
60.7k
    30567U, // ILL
3439
60.7k
    30571U, // ILL_N
3440
60.7k
    30516U, // ISYNC
3441
60.7k
    328413U,  // J
3442
60.7k
    558805U,  // JX
3443
60.7k
    10519184U,  // L16SI
3444
60.7k
    10519220U,  // L16UI
3445
60.7k
    536903895U, // L32E
3446
60.7k
    10519092U,  // L32I
3447
60.7k
    10519608U,  // L32I_N
3448
60.7k
    48268456U,  // L32R
3449
60.7k
    10519227U,  // L8UI
3450
60.7k
    81824933U,  // LDDEC
3451
60.7k
    81825085U,  // LDINC
3452
60.7k
    10519134U,  // LEA_ADD
3453
60.7k
    50365578U,  // LOOP
3454
60.7k
    50366243U,  // LOOPGTZ
3455
60.7k
    50366212U,  // LOOPNEZ
3456
60.7k
    10519197U,  // LSI
3457
60.7k
    1088455806U,  // LSIP
3458
60.7k
    34521U, // LSX
3459
60.7k
    14714007U,  // LSXP
3460
60.7k
    14714233U,  // MADDN_S
3461
60.7k
    14714141U,  // MADD_S
3462
60.7k
    34498U, // MAX
3463
60.7k
    34486U, // MAXU
3464
60.7k
    30663U, // MEMW
3465
60.7k
    33913U, // MIN
3466
60.7k
    34468U, // MINU
3467
60.7k
    81921355U,  // MKDADJ_S
3468
60.7k
    67142997U,  // MKSADJ_S
3469
60.7k
    34587U, // MOVEQZ
3470
60.7k
    14812668U,  // MOVEQZ_S
3471
60.7k
    14811384U,  // MOVF
3472
60.7k
    14812476U,  // MOVF_S
3473
60.7k
    34550U, // MOVGEZ
3474
60.7k
    14812648U,  // MOVGEZ_S
3475
60.7k
    52462295U,  // MOVI
3476
60.7k
    54559825U,  // MOVI_N
3477
60.7k
    34610U, // MOVLTZ
3478
60.7k
    14812678U,  // MOVLTZ_S
3479
60.7k
    34573U, // MOVNEZ
3480
60.7k
    14812658U,  // MOVNEZ_S
3481
60.7k
    67142800U,  // MOVSP
3482
60.7k
    14812798U,  // MOVT
3483
60.7k
    14812633U,  // MOVT_S
3484
60.7k
    67142754U,  // MOV_N
3485
60.7k
    67143137U,  // MOV_S
3486
60.7k
    14714123U,  // MSUB_S
3487
60.7k
    34320U, // MUL16S
3488
60.7k
    34442U, // MUL16U
3489
60.7k
    67141891U,  // MULA_AA_HH
3490
60.7k
    67142382U,  // MULA_AA_HL
3491
60.7k
    67142032U,  // MULA_AA_LH
3492
60.7k
    67142529U,  // MULA_AA_LL
3493
60.7k
    67141962U,  // MULA_AD_HH
3494
60.7k
    67142453U,  // MULA_AD_HL
3495
60.7k
    67142103U,  // MULA_AD_LH
3496
60.7k
    67142600U,  // MULA_AD_LL
3497
60.7k
    67141927U,  // MULA_DA_HH
3498
60.7k
    14716058U,  // MULA_DA_HH_LDDEC
3499
60.7k
    14716210U,  // MULA_DA_HH_LDINC
3500
60.7k
    67142418U,  // MULA_DA_HL
3501
60.7k
    14716134U,  // MULA_DA_HL_LDDEC
3502
60.7k
    14716286U,  // MULA_DA_HL_LDINC
3503
60.7k
    67142068U,  // MULA_DA_LH
3504
60.7k
    14716096U,  // MULA_DA_LH_LDDEC
3505
60.7k
    14716248U,  // MULA_DA_LH_LDINC
3506
60.7k
    67142565U,  // MULA_DA_LL
3507
60.7k
    14716172U,  // MULA_DA_LL_LDDEC
3508
60.7k
    14716324U,  // MULA_DA_LL_LDINC
3509
60.7k
    67141997U,  // MULA_DD_HH
3510
60.7k
    14716077U,  // MULA_DD_HH_LDDEC
3511
60.7k
    14716229U,  // MULA_DD_HH_LDINC
3512
60.7k
    67142488U,  // MULA_DD_HL
3513
60.7k
    14716153U,  // MULA_DD_HL_LDDEC
3514
60.7k
    14716305U,  // MULA_DD_HL_LDINC
3515
60.7k
    67142138U,  // MULA_DD_LH
3516
60.7k
    14716115U,  // MULA_DD_LH_LDDEC
3517
60.7k
    14716267U,  // MULA_DD_LH_LDINC
3518
60.7k
    67142635U,  // MULA_DD_LL
3519
60.7k
    14716191U,  // MULA_DD_LL_LDDEC
3520
60.7k
    14716343U,  // MULA_DD_LL_LDINC
3521
60.7k
    33824U, // MULL
3522
60.7k
    33309U, // MULSH
3523
60.7k
    67141915U,  // MULS_AA_HH
3524
60.7k
    67142406U,  // MULS_AA_HL
3525
60.7k
    67142056U,  // MULS_AA_LH
3526
60.7k
    67142553U,  // MULS_AA_LL
3527
60.7k
    67141985U,  // MULS_AD_HH
3528
60.7k
    67142476U,  // MULS_AD_HL
3529
60.7k
    67142126U,  // MULS_AD_LH
3530
60.7k
    67142623U,  // MULS_AD_LL
3531
60.7k
    67141950U,  // MULS_DA_HH
3532
60.7k
    67142441U,  // MULS_DA_HL
3533
60.7k
    67142091U,  // MULS_DA_LH
3534
60.7k
    67142588U,  // MULS_DA_LL
3535
60.7k
    67142020U,  // MULS_DD_HH
3536
60.7k
    67142511U,  // MULS_DD_HL
3537
60.7k
    67142161U,  // MULS_DD_LH
3538
60.7k
    67142658U,  // MULS_DD_LL
3539
60.7k
    33316U, // MULUH
3540
60.7k
    67141904U,  // MUL_AA_HH
3541
60.7k
    67142395U,  // MUL_AA_HL
3542
60.7k
    67142045U,  // MUL_AA_LH
3543
60.7k
    67142542U,  // MUL_AA_LL
3544
60.7k
    67141974U,  // MUL_AD_HH
3545
60.7k
    67142465U,  // MUL_AD_HL
3546
60.7k
    67142115U,  // MUL_AD_LH
3547
60.7k
    67142612U,  // MUL_AD_LL
3548
60.7k
    67141939U,  // MUL_DA_HH
3549
60.7k
    67142430U,  // MUL_DA_HL
3550
60.7k
    67142080U,  // MUL_DA_LH
3551
60.7k
    67142577U,  // MUL_DA_LL
3552
60.7k
    67142009U,  // MUL_DD_HH
3553
60.7k
    67142500U,  // MUL_DD_HL
3554
60.7k
    67142150U,  // MUL_DD_LH
3555
60.7k
    67142647U,  // MUL_DD_LL
3556
60.7k
    34151U, // MUL_S
3557
60.7k
    67141886U,  // NEG
3558
60.7k
    67142980U,  // NEG_S
3559
60.7k
    67142913U,  // NEXP01_S
3560
60.7k
    30645U, // NOP
3561
60.7k
    67141764U,  // NSA
3562
60.7k
    67143314U,  // NSAU
3563
60.7k
    34202U, // OEQ_S
3564
60.7k
    34094U, // OLE_S
3565
60.7k
    34242U, // OLT_S
3566
60.7k
    33987U, // OR
3567
60.7k
    32926U, // ORB
3568
60.7k
    32948U, // ORBC
3569
60.7k
    34344U, // QUOS
3570
60.7k
    34474U, // QUOU
3571
60.7k
    67142885U,  // RECIP0_S
3572
60.7k
    34338U, // REMS
3573
60.7k
    34462U, // REMU
3574
60.7k
    67142830U,  // RER
3575
60.7k
    30649U, // RET
3576
60.7k
    30668U, // RETW
3577
60.7k
    30583U, // RETW_N
3578
60.7k
    30577U, // RET_N
3579
60.7k
    30528U, // RFDE
3580
60.7k
    30533U, // RFE
3581
60.7k
    721520U,  // RFI
3582
60.7k
    67142840U,  // RFR
3583
60.7k
    30594U, // RFWO
3584
60.7k
    30653U, // RFWU
3585
60.7k
    362172U,  // ROTW
3586
60.7k
    2147517733U,  // ROUND_S
3587
60.7k
    33588091U,  // RSIL
3588
60.7k
    67142895U,  // RSQRT0_S
3589
60.7k
    67142855U,  // RSR
3590
60.7k
    30522U, // RSYNC
3591
60.7k
    67142875U,  // RUR
3592
60.7k
    559000U,  // RUR_ACCX_0
3593
60.7k
    559120U,  // RUR_ACCX_1
3594
60.7k
    581292U,  // RUR_AE_BITHEAD
3595
60.7k
    585856U,  // RUR_AE_BITPTR
3596
60.7k
    581324U,  // RUR_AE_BITSUSED
3597
60.7k
    573081U,  // RUR_AE_CBEGIN0
3598
60.7k
    572479U,  // RUR_AE_CEND0
3599
60.7k
    584572U,  // RUR_AE_CWRAP
3600
60.7k
    584538U,  // RUR_AE_CW_SD_NO
3601
60.7k
    586621U,  // RUR_AE_FIRST_TS
3602
60.7k
    586712U,  // RUR_AE_NEXTOFFSET
3603
60.7k
    586967U,  // RUR_AE_OVERFLOW
3604
60.7k
    585779U,  // RUR_AE_OVF_SAR
3605
60.7k
    585755U,  // RUR_AE_SAR
3606
60.7k
    581385U,  // RUR_AE_SEARCHDONE
3607
60.7k
    581423U,  // RUR_AE_TABLESIZE
3608
60.7k
    584614U,  // RUR_AE_TS_FTS_BU_BP
3609
60.7k
    560616U,  // RUR_FFT_BIT_WIDTH
3610
60.7k
    563970U,  // RUR_GPIO_OUT
3611
60.7k
    558940U,  // RUR_QACC_H_0
3612
60.7k
    559060U,  // RUR_QACC_H_1
3613
60.7k
    559381U,  // RUR_QACC_H_2
3614
60.7k
    559475U,  // RUR_QACC_H_3
3615
60.7k
    559535U,  // RUR_QACC_H_4
3616
60.7k
    558970U,  // RUR_QACC_L_0
3617
60.7k
    559090U,  // RUR_QACC_L_1
3618
60.7k
    559411U,  // RUR_QACC_L_2
3619
60.7k
    559505U,  // RUR_QACC_L_3
3620
60.7k
    559565U,  // RUR_QACC_L_4
3621
60.7k
    560586U,  // RUR_SAR_BYTE
3622
60.7k
    558906U,  // RUR_UA_STATE_0
3623
60.7k
    559026U,  // RUR_UA_STATE_1
3624
60.7k
    559347U,  // RUR_UA_STATE_2
3625
60.7k
    559441U,  // RUR_UA_STATE_3
3626
60.7k
    10519105U,  // S16I
3627
60.7k
    56754731U,  // S32C1I
3628
60.7k
    536903901U, // S32E
3629
60.7k
    10519099U,  // S32I
3630
60.7k
    10519617U,  // S32I_N
3631
60.7k
    10519111U,  // S8I
3632
60.7k
    263788U,  // SET_BIT_GPIO_OUT
3633
60.7k
    1610647172U,  // SEXT
3634
60.7k
    30551U, // SIMCALL
3635
60.7k
    67142683U,  // SLL
3636
60.7k
    1610646134U,  // SLLI
3637
60.7k
    67142896U,  // SQRT0_S
3638
60.7k
    67141759U,  // SRA
3639
60.7k
    2684387916U,  // SRAI
3640
60.7k
    32968U, // SRC
3641
60.7k
    67142694U,  // SRL
3642
60.7k
    2684387965U,  // SRLI
3643
60.7k
    557799U,  // SSA8L
3644
60.7k
    393810U,  // SSAI
3645
60.7k
    10519202U,  // SSI
3646
60.7k
    1088554116U,  // SSIP
3647
60.7k
    558123U,  // SSL
3648
60.7k
    558284U,  // SSR
3649
60.7k
    34526U, // SSX
3650
60.7k
    14812317U,  // SSXP
3651
60.7k
    32931U, // SUB
3652
60.7k
    32811U, // SUBX2
3653
60.7k
    32832U, // SUBX4
3654
60.7k
    32867U, // SUBX8
3655
60.7k
    34060U, // SUB_S
3656
60.7k
    30559U, // SYSCALL
3657
60.7k
    2147517716U,  // TRUNC_S
3658
60.7k
    34209U, // UEQ_S
3659
60.7k
    2147517880U,  // UFLOAT_S
3660
60.7k
    34101U, // ULE_S
3661
60.7k
    34249U, // ULT_S
3662
60.7k
    67141903U,  // UMUL_AA_HH
3663
60.7k
    67142394U,  // UMUL_AA_HL
3664
60.7k
    67142044U,  // UMUL_AA_LH
3665
60.7k
    67142541U,  // UMUL_AA_LL
3666
60.7k
    34178U, // UN_S
3667
60.7k
    2147517715U,  // UTRUNC_S
3668
60.7k
    721575U,  // WAITI
3669
60.7k
    67141775U,  // WDTLB
3670
60.7k
    67142835U,  // WER
3671
60.7k
    67142845U,  // WFR
3672
60.7k
    67141782U,  // WITLB
3673
60.7k
    67143234U,  // WR_MASK_GPIO_OUT
3674
60.7k
    109184209U, // WSR
3675
60.7k
    109184224U, // WUR
3676
60.7k
    559013U,  // WUR_ACCX_0
3677
60.7k
    559133U,  // WUR_ACCX_1
3678
60.7k
    581308U,  // WUR_AE_BITHEAD
3679
60.7k
    585871U,  // WUR_AE_BITPTR
3680
60.7k
    581341U,  // WUR_AE_BITSUSED
3681
60.7k
    573097U,  // WUR_AE_CBEGIN0
3682
60.7k
    572493U,  // WUR_AE_CEND0
3683
60.7k
    584586U,  // WUR_AE_CWRAP
3684
60.7k
    584555U,  // WUR_AE_CW_SD_NO
3685
60.7k
    586638U,  // WUR_AE_FIRST_TS
3686
60.7k
    586731U,  // WUR_AE_NEXTOFFSET
3687
60.7k
    586984U,  // WUR_AE_OVERFLOW
3688
60.7k
    585795U,  // WUR_AE_OVF_SAR
3689
60.7k
    585767U,  // WUR_AE_SAR
3690
60.7k
    581404U,  // WUR_AE_SEARCHDONE
3691
60.7k
    581441U,  // WUR_AE_TABLESIZE
3692
60.7k
    584635U,  // WUR_AE_TS_FTS_BU_BP
3693
60.7k
    557057U,  // WUR_FCR
3694
60.7k
    560636U,  // WUR_FFT_BIT_WIDTH
3695
60.7k
    563960U,  // WUR_FSR
3696
60.7k
    563985U,  // WUR_GPIO_OUT
3697
60.7k
    558955U,  // WUR_QACC_H_0
3698
60.7k
    559075U,  // WUR_QACC_H_1
3699
60.7k
    559396U,  // WUR_QACC_H_2
3700
60.7k
    559490U,  // WUR_QACC_H_3
3701
60.7k
    559550U,  // WUR_QACC_H_4
3702
60.7k
    558985U,  // WUR_QACC_L_0
3703
60.7k
    559105U,  // WUR_QACC_L_1
3704
60.7k
    559426U,  // WUR_QACC_L_2
3705
60.7k
    559520U,  // WUR_QACC_L_3
3706
60.7k
    559580U,  // WUR_QACC_L_4
3707
60.7k
    560601U,  // WUR_SAR_BYTE
3708
60.7k
    558923U,  // WUR_UA_STATE_0
3709
60.7k
    559043U,  // WUR_UA_STATE_1
3710
60.7k
    559364U,  // WUR_UA_STATE_2
3711
60.7k
    559458U,  // WUR_UA_STATE_3
3712
60.7k
    33986U, // XOR
3713
60.7k
    32925U, // XORB
3714
60.7k
    689366U,  // XSR
3715
60.7k
    10519091U,  // _L32I
3716
60.7k
    10519607U,  // _L32I_N
3717
60.7k
    58753750U,  // _MOVI
3718
60.7k
    10519098U,  // _S32I
3719
60.7k
    10519616U,  // _S32I_N
3720
60.7k
    2147517045U,  // _SLLI
3721
60.7k
    2147517052U,  // _SRLI
3722
60.7k
    67148528U,  // mv_QR
3723
60.7k
  };
3724
3725
60.7k
  static const uint16_t OpInfo1[] = {
3726
60.7k
    0U, // PHI
3727
60.7k
    0U, // INLINEASM
3728
60.7k
    0U, // INLINEASM_BR
3729
60.7k
    0U, // CFI_INSTRUCTION
3730
60.7k
    0U, // EH_LABEL
3731
60.7k
    0U, // GC_LABEL
3732
60.7k
    0U, // ANNOTATION_LABEL
3733
60.7k
    0U, // KILL
3734
60.7k
    0U, // EXTRACT_SUBREG
3735
60.7k
    0U, // INSERT_SUBREG
3736
60.7k
    0U, // IMPLICIT_DEF
3737
60.7k
    0U, // SUBREG_TO_REG
3738
60.7k
    0U, // COPY_TO_REGCLASS
3739
60.7k
    0U, // DBG_VALUE
3740
60.7k
    0U, // DBG_VALUE_LIST
3741
60.7k
    0U, // DBG_INSTR_REF
3742
60.7k
    0U, // DBG_PHI
3743
60.7k
    0U, // DBG_LABEL
3744
60.7k
    0U, // REG_SEQUENCE
3745
60.7k
    0U, // COPY
3746
60.7k
    0U, // BUNDLE
3747
60.7k
    0U, // LIFETIME_START
3748
60.7k
    0U, // LIFETIME_END
3749
60.7k
    0U, // PSEUDO_PROBE
3750
60.7k
    0U, // ARITH_FENCE
3751
60.7k
    0U, // STACKMAP
3752
60.7k
    0U, // FENTRY_CALL
3753
60.7k
    0U, // PATCHPOINT
3754
60.7k
    0U, // LOAD_STACK_GUARD
3755
60.7k
    0U, // PREALLOCATED_SETUP
3756
60.7k
    0U, // PREALLOCATED_ARG
3757
60.7k
    0U, // STATEPOINT
3758
60.7k
    0U, // LOCAL_ESCAPE
3759
60.7k
    0U, // FAULTING_OP
3760
60.7k
    0U, // PATCHABLE_OP
3761
60.7k
    0U, // PATCHABLE_FUNCTION_ENTER
3762
60.7k
    0U, // PATCHABLE_RET
3763
60.7k
    0U, // PATCHABLE_FUNCTION_EXIT
3764
60.7k
    0U, // PATCHABLE_TAIL_CALL
3765
60.7k
    0U, // PATCHABLE_EVENT_CALL
3766
60.7k
    0U, // PATCHABLE_TYPED_EVENT_CALL
3767
60.7k
    0U, // ICALL_BRANCH_FUNNEL
3768
60.7k
    0U, // MEMBARRIER
3769
60.7k
    0U, // JUMP_TABLE_DEBUG_INFO
3770
60.7k
    0U, // G_ASSERT_SEXT
3771
60.7k
    0U, // G_ASSERT_ZEXT
3772
60.7k
    0U, // G_ASSERT_ALIGN
3773
60.7k
    0U, // G_ADD
3774
60.7k
    0U, // G_SUB
3775
60.7k
    0U, // G_MUL
3776
60.7k
    0U, // G_SDIV
3777
60.7k
    0U, // G_UDIV
3778
60.7k
    0U, // G_SREM
3779
60.7k
    0U, // G_UREM
3780
60.7k
    0U, // G_SDIVREM
3781
60.7k
    0U, // G_UDIVREM
3782
60.7k
    0U, // G_AND
3783
60.7k
    0U, // G_OR
3784
60.7k
    0U, // G_XOR
3785
60.7k
    0U, // G_IMPLICIT_DEF
3786
60.7k
    0U, // G_PHI
3787
60.7k
    0U, // G_FRAME_INDEX
3788
60.7k
    0U, // G_GLOBAL_VALUE
3789
60.7k
    0U, // G_CONSTANT_POOL
3790
60.7k
    0U, // G_EXTRACT
3791
60.7k
    0U, // G_UNMERGE_VALUES
3792
60.7k
    0U, // G_INSERT
3793
60.7k
    0U, // G_MERGE_VALUES
3794
60.7k
    0U, // G_BUILD_VECTOR
3795
60.7k
    0U, // G_BUILD_VECTOR_TRUNC
3796
60.7k
    0U, // G_CONCAT_VECTORS
3797
60.7k
    0U, // G_PTRTOINT
3798
60.7k
    0U, // G_INTTOPTR
3799
60.7k
    0U, // G_BITCAST
3800
60.7k
    0U, // G_FREEZE
3801
60.7k
    0U, // G_CONSTANT_FOLD_BARRIER
3802
60.7k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
3803
60.7k
    0U, // G_INTRINSIC_TRUNC
3804
60.7k
    0U, // G_INTRINSIC_ROUND
3805
60.7k
    0U, // G_INTRINSIC_LRINT
3806
60.7k
    0U, // G_INTRINSIC_ROUNDEVEN
3807
60.7k
    0U, // G_READCYCLECOUNTER
3808
60.7k
    0U, // G_LOAD
3809
60.7k
    0U, // G_SEXTLOAD
3810
60.7k
    0U, // G_ZEXTLOAD
3811
60.7k
    0U, // G_INDEXED_LOAD
3812
60.7k
    0U, // G_INDEXED_SEXTLOAD
3813
60.7k
    0U, // G_INDEXED_ZEXTLOAD
3814
60.7k
    0U, // G_STORE
3815
60.7k
    0U, // G_INDEXED_STORE
3816
60.7k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3817
60.7k
    0U, // G_ATOMIC_CMPXCHG
3818
60.7k
    0U, // G_ATOMICRMW_XCHG
3819
60.7k
    0U, // G_ATOMICRMW_ADD
3820
60.7k
    0U, // G_ATOMICRMW_SUB
3821
60.7k
    0U, // G_ATOMICRMW_AND
3822
60.7k
    0U, // G_ATOMICRMW_NAND
3823
60.7k
    0U, // G_ATOMICRMW_OR
3824
60.7k
    0U, // G_ATOMICRMW_XOR
3825
60.7k
    0U, // G_ATOMICRMW_MAX
3826
60.7k
    0U, // G_ATOMICRMW_MIN
3827
60.7k
    0U, // G_ATOMICRMW_UMAX
3828
60.7k
    0U, // G_ATOMICRMW_UMIN
3829
60.7k
    0U, // G_ATOMICRMW_FADD
3830
60.7k
    0U, // G_ATOMICRMW_FSUB
3831
60.7k
    0U, // G_ATOMICRMW_FMAX
3832
60.7k
    0U, // G_ATOMICRMW_FMIN
3833
60.7k
    0U, // G_ATOMICRMW_UINC_WRAP
3834
60.7k
    0U, // G_ATOMICRMW_UDEC_WRAP
3835
60.7k
    0U, // G_FENCE
3836
60.7k
    0U, // G_PREFETCH
3837
60.7k
    0U, // G_BRCOND
3838
60.7k
    0U, // G_BRINDIRECT
3839
60.7k
    0U, // G_INVOKE_REGION_START
3840
60.7k
    0U, // G_INTRINSIC
3841
60.7k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
3842
60.7k
    0U, // G_INTRINSIC_CONVERGENT
3843
60.7k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3844
60.7k
    0U, // G_ANYEXT
3845
60.7k
    0U, // G_TRUNC
3846
60.7k
    0U, // G_CONSTANT
3847
60.7k
    0U, // G_FCONSTANT
3848
60.7k
    0U, // G_VASTART
3849
60.7k
    0U, // G_VAARG
3850
60.7k
    0U, // G_SEXT
3851
60.7k
    0U, // G_SEXT_INREG
3852
60.7k
    0U, // G_ZEXT
3853
60.7k
    0U, // G_SHL
3854
60.7k
    0U, // G_LSHR
3855
60.7k
    0U, // G_ASHR
3856
60.7k
    0U, // G_FSHL
3857
60.7k
    0U, // G_FSHR
3858
60.7k
    0U, // G_ROTR
3859
60.7k
    0U, // G_ROTL
3860
60.7k
    0U, // G_ICMP
3861
60.7k
    0U, // G_FCMP
3862
60.7k
    0U, // G_SELECT
3863
60.7k
    0U, // G_UADDO
3864
60.7k
    0U, // G_UADDE
3865
60.7k
    0U, // G_USUBO
3866
60.7k
    0U, // G_USUBE
3867
60.7k
    0U, // G_SADDO
3868
60.7k
    0U, // G_SADDE
3869
60.7k
    0U, // G_SSUBO
3870
60.7k
    0U, // G_SSUBE
3871
60.7k
    0U, // G_UMULO
3872
60.7k
    0U, // G_SMULO
3873
60.7k
    0U, // G_UMULH
3874
60.7k
    0U, // G_SMULH
3875
60.7k
    0U, // G_UADDSAT
3876
60.7k
    0U, // G_SADDSAT
3877
60.7k
    0U, // G_USUBSAT
3878
60.7k
    0U, // G_SSUBSAT
3879
60.7k
    0U, // G_USHLSAT
3880
60.7k
    0U, // G_SSHLSAT
3881
60.7k
    0U, // G_SMULFIX
3882
60.7k
    0U, // G_UMULFIX
3883
60.7k
    0U, // G_SMULFIXSAT
3884
60.7k
    0U, // G_UMULFIXSAT
3885
60.7k
    0U, // G_SDIVFIX
3886
60.7k
    0U, // G_UDIVFIX
3887
60.7k
    0U, // G_SDIVFIXSAT
3888
60.7k
    0U, // G_UDIVFIXSAT
3889
60.7k
    0U, // G_FADD
3890
60.7k
    0U, // G_FSUB
3891
60.7k
    0U, // G_FMUL
3892
60.7k
    0U, // G_FMA
3893
60.7k
    0U, // G_FMAD
3894
60.7k
    0U, // G_FDIV
3895
60.7k
    0U, // G_FREM
3896
60.7k
    0U, // G_FPOW
3897
60.7k
    0U, // G_FPOWI
3898
60.7k
    0U, // G_FEXP
3899
60.7k
    0U, // G_FEXP2
3900
60.7k
    0U, // G_FEXP10
3901
60.7k
    0U, // G_FLOG
3902
60.7k
    0U, // G_FLOG2
3903
60.7k
    0U, // G_FLOG10
3904
60.7k
    0U, // G_FLDEXP
3905
60.7k
    0U, // G_FFREXP
3906
60.7k
    0U, // G_FNEG
3907
60.7k
    0U, // G_FPEXT
3908
60.7k
    0U, // G_FPTRUNC
3909
60.7k
    0U, // G_FPTOSI
3910
60.7k
    0U, // G_FPTOUI
3911
60.7k
    0U, // G_SITOFP
3912
60.7k
    0U, // G_UITOFP
3913
60.7k
    0U, // G_FABS
3914
60.7k
    0U, // G_FCOPYSIGN
3915
60.7k
    0U, // G_IS_FPCLASS
3916
60.7k
    0U, // G_FCANONICALIZE
3917
60.7k
    0U, // G_FMINNUM
3918
60.7k
    0U, // G_FMAXNUM
3919
60.7k
    0U, // G_FMINNUM_IEEE
3920
60.7k
    0U, // G_FMAXNUM_IEEE
3921
60.7k
    0U, // G_FMINIMUM
3922
60.7k
    0U, // G_FMAXIMUM
3923
60.7k
    0U, // G_GET_FPENV
3924
60.7k
    0U, // G_SET_FPENV
3925
60.7k
    0U, // G_RESET_FPENV
3926
60.7k
    0U, // G_GET_FPMODE
3927
60.7k
    0U, // G_SET_FPMODE
3928
60.7k
    0U, // G_RESET_FPMODE
3929
60.7k
    0U, // G_PTR_ADD
3930
60.7k
    0U, // G_PTRMASK
3931
60.7k
    0U, // G_SMIN
3932
60.7k
    0U, // G_SMAX
3933
60.7k
    0U, // G_UMIN
3934
60.7k
    0U, // G_UMAX
3935
60.7k
    0U, // G_ABS
3936
60.7k
    0U, // G_LROUND
3937
60.7k
    0U, // G_LLROUND
3938
60.7k
    0U, // G_BR
3939
60.7k
    0U, // G_BRJT
3940
60.7k
    0U, // G_INSERT_VECTOR_ELT
3941
60.7k
    0U, // G_EXTRACT_VECTOR_ELT
3942
60.7k
    0U, // G_SHUFFLE_VECTOR
3943
60.7k
    0U, // G_CTTZ
3944
60.7k
    0U, // G_CTTZ_ZERO_UNDEF
3945
60.7k
    0U, // G_CTLZ
3946
60.7k
    0U, // G_CTLZ_ZERO_UNDEF
3947
60.7k
    0U, // G_CTPOP
3948
60.7k
    0U, // G_BSWAP
3949
60.7k
    0U, // G_BITREVERSE
3950
60.7k
    0U, // G_FCEIL
3951
60.7k
    0U, // G_FCOS
3952
60.7k
    0U, // G_FSIN
3953
60.7k
    0U, // G_FSQRT
3954
60.7k
    0U, // G_FFLOOR
3955
60.7k
    0U, // G_FRINT
3956
60.7k
    0U, // G_FNEARBYINT
3957
60.7k
    0U, // G_ADDRSPACE_CAST
3958
60.7k
    0U, // G_BLOCK_ADDR
3959
60.7k
    0U, // G_JUMP_TABLE
3960
60.7k
    0U, // G_DYN_STACKALLOC
3961
60.7k
    0U, // G_STACKSAVE
3962
60.7k
    0U, // G_STACKRESTORE
3963
60.7k
    0U, // G_STRICT_FADD
3964
60.7k
    0U, // G_STRICT_FSUB
3965
60.7k
    0U, // G_STRICT_FMUL
3966
60.7k
    0U, // G_STRICT_FDIV
3967
60.7k
    0U, // G_STRICT_FREM
3968
60.7k
    0U, // G_STRICT_FMA
3969
60.7k
    0U, // G_STRICT_FSQRT
3970
60.7k
    0U, // G_STRICT_FLDEXP
3971
60.7k
    0U, // G_READ_REGISTER
3972
60.7k
    0U, // G_WRITE_REGISTER
3973
60.7k
    0U, // G_MEMCPY
3974
60.7k
    0U, // G_MEMCPY_INLINE
3975
60.7k
    0U, // G_MEMMOVE
3976
60.7k
    0U, // G_MEMSET
3977
60.7k
    0U, // G_BZERO
3978
60.7k
    0U, // G_VECREDUCE_SEQ_FADD
3979
60.7k
    0U, // G_VECREDUCE_SEQ_FMUL
3980
60.7k
    0U, // G_VECREDUCE_FADD
3981
60.7k
    0U, // G_VECREDUCE_FMUL
3982
60.7k
    0U, // G_VECREDUCE_FMAX
3983
60.7k
    0U, // G_VECREDUCE_FMIN
3984
60.7k
    0U, // G_VECREDUCE_FMAXIMUM
3985
60.7k
    0U, // G_VECREDUCE_FMINIMUM
3986
60.7k
    0U, // G_VECREDUCE_ADD
3987
60.7k
    0U, // G_VECREDUCE_MUL
3988
60.7k
    0U, // G_VECREDUCE_AND
3989
60.7k
    0U, // G_VECREDUCE_OR
3990
60.7k
    0U, // G_VECREDUCE_XOR
3991
60.7k
    0U, // G_VECREDUCE_SMAX
3992
60.7k
    0U, // G_VECREDUCE_SMIN
3993
60.7k
    0U, // G_VECREDUCE_UMAX
3994
60.7k
    0U, // G_VECREDUCE_UMIN
3995
60.7k
    0U, // G_SBFX
3996
60.7k
    0U, // G_UBFX
3997
60.7k
    0U, // ADJCALLSTACKDOWN
3998
60.7k
    0U, // ADJCALLSTACKUP
3999
60.7k
    0U, // ATOMIC_CMP_SWAP_16_P
4000
60.7k
    0U, // ATOMIC_CMP_SWAP_32_P
4001
60.7k
    0U, // ATOMIC_CMP_SWAP_8_P
4002
60.7k
    8U, // ATOMIC_LOAD_ADD_16_P
4003
60.7k
    8U, // ATOMIC_LOAD_ADD_32_P
4004
60.7k
    8U, // ATOMIC_LOAD_ADD_8_P
4005
60.7k
    8U, // ATOMIC_LOAD_AND_16_P
4006
60.7k
    8U, // ATOMIC_LOAD_AND_32_P
4007
60.7k
    8U, // ATOMIC_LOAD_AND_8_P
4008
60.7k
    8U, // ATOMIC_LOAD_MAX_16_P
4009
60.7k
    8U, // ATOMIC_LOAD_MAX_32_P
4010
60.7k
    8U, // ATOMIC_LOAD_MAX_8_P
4011
60.7k
    8U, // ATOMIC_LOAD_MIN_16_P
4012
60.7k
    8U, // ATOMIC_LOAD_MIN_32_P
4013
60.7k
    8U, // ATOMIC_LOAD_MIN_8_P
4014
60.7k
    8U, // ATOMIC_LOAD_NAND_16_P
4015
60.7k
    8U, // ATOMIC_LOAD_NAND_32_P
4016
60.7k
    8U, // ATOMIC_LOAD_NAND_8_P
4017
60.7k
    8U, // ATOMIC_LOAD_OR_16_P
4018
60.7k
    8U, // ATOMIC_LOAD_OR_32_P
4019
60.7k
    8U, // ATOMIC_LOAD_OR_8_P
4020
60.7k
    8U, // ATOMIC_LOAD_SUB_16_P
4021
60.7k
    8U, // ATOMIC_LOAD_SUB_32_P
4022
60.7k
    8U, // ATOMIC_LOAD_SUB_8_P
4023
60.7k
    8U, // ATOMIC_LOAD_UMAX_16_P
4024
60.7k
    8U, // ATOMIC_LOAD_UMAX_32_P
4025
60.7k
    8U, // ATOMIC_LOAD_UMAX_8_P
4026
60.7k
    8U, // ATOMIC_LOAD_UMIN_16_P
4027
60.7k
    8U, // ATOMIC_LOAD_UMIN_32_P
4028
60.7k
    8U, // ATOMIC_LOAD_UMIN_8_P
4029
60.7k
    8U, // ATOMIC_LOAD_XOR_16_P
4030
60.7k
    8U, // ATOMIC_LOAD_XOR_32_P
4031
60.7k
    8U, // ATOMIC_LOAD_XOR_8_P
4032
60.7k
    8U, // ATOMIC_SWAP_16_P
4033
60.7k
    8U, // ATOMIC_SWAP_32_P
4034
60.7k
    8U, // ATOMIC_SWAP_8_P
4035
60.7k
    64U,  // BRCC_FP
4036
60.7k
    0U, // BR_JT
4037
60.7k
    0U, // CONSTPOOL_ENTRY
4038
60.7k
    8U, // EE_ANDQ_P
4039
60.7k
    0U, // EE_BITREV_P
4040
60.7k
    1152U,  // EE_CMUL_S16_LD_INCP_P
4041
60.7k
    192U, // EE_CMUL_S16_P
4042
60.7k
    1152U,  // EE_CMUL_S16_ST_INCP_P
4043
60.7k
    1152U,  // EE_FFT_AMS_S16_LD_INCP_P
4044
60.7k
    1152U,  // EE_FFT_AMS_S16_LD_INCP_UAUP_P
4045
60.7k
    1152U,  // EE_FFT_AMS_S16_LD_R32_DECP_P
4046
60.7k
    1024U,  // EE_FFT_AMS_S16_ST_INCP_P
4047
60.7k
    1152U,  // EE_FFT_CMUL_S16_LD_XP_P
4048
60.7k
    3072U,  // EE_FFT_CMUL_S16_ST_XP_P
4049
60.7k
    5248U,  // EE_FFT_R2BF_S16_P
4050
60.7k
    7168U,  // EE_FFT_R2BF_S16_ST_INCP_P
4051
60.7k
    0U, // EE_FFT_VST_R32_DECP_P
4052
60.7k
    3072U,  // EE_LDF_128_IP_P
4053
60.7k
    3072U,  // EE_LDF_128_XP_P
4054
60.7k
    256U, // EE_LDF_64_IP_P
4055
60.7k
    0U, // EE_LDF_64_XP_P
4056
60.7k
    0U, // EE_LDQA_S16_128_IP_P
4057
60.7k
    0U, // EE_LDQA_S16_128_XP_P
4058
60.7k
    0U, // EE_LDQA_S8_128_IP_P
4059
60.7k
    0U, // EE_LDQA_S8_128_XP_P
4060
60.7k
    0U, // EE_LDQA_U16_128_IP_P
4061
60.7k
    0U, // EE_LDQA_U16_128_XP_P
4062
60.7k
    0U, // EE_LDQA_U8_128_IP_P
4063
60.7k
    0U, // EE_LDQA_U8_128_XP_P
4064
60.7k
    9408U,  // EE_LDXQ_32_P
4065
60.7k
    8U, // EE_LD_128_USAR_IP_P
4066
60.7k
    8U, // EE_LD_128_USAR_XP_P
4067
60.7k
    0U, // EE_LD_ACCX_IP_P
4068
60.7k
    0U, // EE_LD_QACC_H_H_32_IP_P
4069
60.7k
    0U, // EE_LD_QACC_H_L_128_IP_P
4070
60.7k
    0U, // EE_LD_QACC_L_H_32_IP_P
4071
60.7k
    0U, // EE_LD_QACC_L_L_128_IP_P
4072
60.7k
    0U, // EE_LD_UA_STATE_IP_P
4073
60.7k
    0U, // EE_MOVI_32_A_P
4074
60.7k
    0U, // EE_MOVI_32_Q_P
4075
60.7k
    0U, // EE_MOV_S16_QACC_P
4076
60.7k
    0U, // EE_MOV_S8_QACC_P
4077
60.7k
    0U, // EE_MOV_U16_QACC_P
4078
60.7k
    0U, // EE_MOV_U8_QACC_P
4079
60.7k
    0U, // EE_NOTQ_P
4080
60.7k
    8U, // EE_ORQ_P
4081
60.7k
    0U, // EE_SLCI_2Q_P
4082
60.7k
    0U, // EE_SLCXXP_2Q_P
4083
60.7k
    0U, // EE_SRCI_2Q_P
4084
60.7k
    0U, // EE_SRCMB_S16_QACC_P
4085
60.7k
    0U, // EE_SRCMB_S8_QACC_P
4086
60.7k
    8U, // EE_SRCQ_128_ST_INCP_P
4087
60.7k
    0U, // EE_SRCXXP_2Q_P
4088
60.7k
    33920U, // EE_SRC_Q_LD_IP_P
4089
60.7k
    33920U, // EE_SRC_Q_LD_XP_P
4090
60.7k
    8U, // EE_SRC_Q_P
4091
60.7k
    8U, // EE_SRC_Q_QUP_P
4092
60.7k
    0U, // EE_SRS_ACCX_P
4093
60.7k
    3072U,  // EE_STF_128_IP_P
4094
60.7k
    3072U,  // EE_STF_128_XP_P
4095
60.7k
    256U, // EE_STF_64_IP_P
4096
60.7k
    0U, // EE_STF_64_XP_P
4097
60.7k
    9408U,  // EE_STXQ_32_P
4098
60.7k
    0U, // EE_ST_ACCX_IP_P
4099
60.7k
    0U, // EE_ST_QACC_H_H_32_IP_P
4100
60.7k
    0U, // EE_ST_QACC_H_L_128_IP_P
4101
60.7k
    0U, // EE_ST_QACC_L_H_32_IP_P
4102
60.7k
    0U, // EE_ST_QACC_L_L_128_IP_P
4103
60.7k
    0U, // EE_ST_UA_STATE_IP_P
4104
60.7k
    33920U, // EE_VADDS_S16_LD_INCP_P
4105
60.7k
    8U, // EE_VADDS_S16_P
4106
60.7k
    33920U, // EE_VADDS_S16_ST_INCP_P
4107
60.7k
    33920U, // EE_VADDS_S32_LD_INCP_P
4108
60.7k
    8U, // EE_VADDS_S32_P
4109
60.7k
    33920U, // EE_VADDS_S32_ST_INCP_P
4110
60.7k
    33920U, // EE_VADDS_S8_LD_INCP_P
4111
60.7k
    8U, // EE_VADDS_S8_P
4112
60.7k
    33920U, // EE_VADDS_S8_ST_INCP_P
4113
60.7k
    8U, // EE_VCMP_EQ_S16_P
4114
60.7k
    8U, // EE_VCMP_EQ_S32_P
4115
60.7k
    8U, // EE_VCMP_EQ_S8_P
4116
60.7k
    8U, // EE_VCMP_GT_S16_P
4117
60.7k
    8U, // EE_VCMP_GT_S32_P
4118
60.7k
    8U, // EE_VCMP_GT_S8_P
4119
60.7k
    8U, // EE_VCMP_LT_S16_P
4120
60.7k
    8U, // EE_VCMP_LT_S32_P
4121
60.7k
    8U, // EE_VCMP_LT_S8_P
4122
60.7k
    0U, // EE_VLDBC_16_IP_P
4123
60.7k
    0U, // EE_VLDBC_16_P
4124
60.7k
    8U, // EE_VLDBC_16_XP_P
4125
60.7k
    0U, // EE_VLDBC_32_IP_P
4126
60.7k
    0U, // EE_VLDBC_32_P
4127
60.7k
    8U, // EE_VLDBC_32_XP_P
4128
60.7k
    1U, // EE_VLDBC_8_IP_P
4129
60.7k
    0U, // EE_VLDBC_8_P
4130
60.7k
    8U, // EE_VLDBC_8_XP_P
4131
60.7k
    8U, // EE_VLDHBC_16_INCP_P
4132
60.7k
    8U, // EE_VLD_128_IP_P
4133
60.7k
    8U, // EE_VLD_128_XP_P
4134
60.7k
    1U, // EE_VLD_H_64_IP_P
4135
60.7k
    8U, // EE_VLD_H_64_XP_P
4136
60.7k
    1U, // EE_VLD_L_64_IP_P
4137
60.7k
    8U, // EE_VLD_L_64_XP_P
4138
60.7k
    33920U, // EE_VMAX_S16_LD_INCP_P
4139
60.7k
    8U, // EE_VMAX_S16_P
4140
60.7k
    33920U, // EE_VMAX_S16_ST_INCP_P
4141
60.7k
    33920U, // EE_VMAX_S32_LD_INCP_P
4142
60.7k
    8U, // EE_VMAX_S32_P
4143
60.7k
    33920U, // EE_VMAX_S32_ST_INCP_P
4144
60.7k
    33920U, // EE_VMAX_S8_LD_INCP_P
4145
60.7k
    8U, // EE_VMAX_S8_P
4146
60.7k
    33920U, // EE_VMAX_S8_ST_INCP_P
4147
60.7k
    33920U, // EE_VMIN_S16_LD_INCP_P
4148
60.7k
    8U, // EE_VMIN_S16_P
4149
60.7k
    33920U, // EE_VMIN_S16_ST_INCP_P
4150
60.7k
    33920U, // EE_VMIN_S32_LD_INCP_P
4151
60.7k
    8U, // EE_VMIN_S32_P
4152
60.7k
    33920U, // EE_VMIN_S32_ST_INCP_P
4153
60.7k
    33920U, // EE_VMIN_S8_LD_INCP_P
4154
60.7k
    8U, // EE_VMIN_S8_P
4155
60.7k
    33920U, // EE_VMIN_S8_ST_INCP_P
4156
60.7k
    9U, // EE_VMULAS_S16_ACCX_LD_IP_P
4157
60.7k
    321U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
4158
60.7k
    33920U, // EE_VMULAS_S16_ACCX_LD_XP_P
4159
60.7k
    1152U,  // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
4160
60.7k
    0U, // EE_VMULAS_S16_ACCX_P
4161
60.7k
    128U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
4162
60.7k
    1152U,  // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
4163
60.7k
    9U, // EE_VMULAS_S16_QACC_LD_IP_P
4164
60.7k
    321U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P
4165
60.7k
    33920U, // EE_VMULAS_S16_QACC_LD_XP_P
4166
60.7k
    1152U,  // EE_VMULAS_S16_QACC_LD_XP_QUP_P
4167
60.7k
    0U, // EE_VMULAS_S16_QACC_P
4168
60.7k
    9U, // EE_VMULAS_S8_ACCX_LD_IP_P
4169
60.7k
    321U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
4170
60.7k
    33920U, // EE_VMULAS_S8_ACCX_LD_XP_P
4171
60.7k
    1152U,  // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
4172
60.7k
    0U, // EE_VMULAS_S8_ACCX_P
4173
60.7k
    128U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
4174
60.7k
    1152U,  // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
4175
60.7k
    9U, // EE_VMULAS_S8_QACC_LD_IP_P
4176
60.7k
    321U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P
4177
60.7k
    33920U, // EE_VMULAS_S8_QACC_LD_XP_P
4178
60.7k
    1152U,  // EE_VMULAS_S8_QACC_LD_XP_QUP_P
4179
60.7k
    0U, // EE_VMULAS_S8_QACC_P
4180
60.7k
    9U, // EE_VMULAS_U16_ACCX_LD_IP_P
4181
60.7k
    321U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
4182
60.7k
    33920U, // EE_VMULAS_U16_ACCX_LD_XP_P
4183
60.7k
    1152U,  // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
4184
60.7k
    0U, // EE_VMULAS_U16_ACCX_P
4185
60.7k
    128U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
4186
60.7k
    1152U,  // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
4187
60.7k
    9U, // EE_VMULAS_U16_QACC_LD_IP_P
4188
60.7k
    321U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P
4189
60.7k
    33920U, // EE_VMULAS_U16_QACC_LD_XP_P
4190
60.7k
    1152U,  // EE_VMULAS_U16_QACC_LD_XP_QUP_P
4191
60.7k
    0U, // EE_VMULAS_U16_QACC_P
4192
60.7k
    9U, // EE_VMULAS_U8_ACCX_LD_IP_P
4193
60.7k
    321U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
4194
60.7k
    33920U, // EE_VMULAS_U8_ACCX_LD_XP_P
4195
60.7k
    1152U,  // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
4196
60.7k
    0U, // EE_VMULAS_U8_ACCX_P
4197
60.7k
    128U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
4198
60.7k
    1152U,  // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
4199
60.7k
    9U, // EE_VMULAS_U8_QACC_LD_IP_P
4200
60.7k
    321U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P
4201
60.7k
    33920U, // EE_VMULAS_U8_QACC_LD_XP_P
4202
60.7k
    1152U,  // EE_VMULAS_U8_QACC_LD_XP_QUP_P
4203
60.7k
    0U, // EE_VMULAS_U8_QACC_P
4204
60.7k
    33920U, // EE_VMUL_S16_LD_INCP_P
4205
60.7k
    8U, // EE_VMUL_S16_P
4206
60.7k
    33920U, // EE_VMUL_S16_ST_INCP_P
4207
60.7k
    33920U, // EE_VMUL_S8_LD_INCP_P
4208
60.7k
    8U, // EE_VMUL_S8_P
4209
60.7k
    33920U, // EE_VMUL_S8_ST_INCP_P
4210
60.7k
    33920U, // EE_VMUL_U16_LD_INCP_P
4211
60.7k
    8U, // EE_VMUL_U16_P
4212
60.7k
    33920U, // EE_VMUL_U16_ST_INCP_P
4213
60.7k
    33920U, // EE_VMUL_U8_LD_INCP_P
4214
60.7k
    8U, // EE_VMUL_U8_P
4215
60.7k
    33920U, // EE_VMUL_U8_ST_INCP_P
4216
60.7k
    0U, // EE_VPRELU_S16_P
4217
60.7k
    0U, // EE_VPRELU_S8_P
4218
60.7k
    8U, // EE_VRELU_S16_P
4219
60.7k
    8U, // EE_VRELU_S8_P
4220
60.7k
    0U, // EE_VSL_32_P
4221
60.7k
    9344U,  // EE_VSMULAS_S16_QACC_LD_INCP_P
4222
60.7k
    1U, // EE_VSMULAS_S16_QACC_P
4223
60.7k
    11392U, // EE_VSMULAS_S8_QACC_LD_INCP_P
4224
60.7k
    0U, // EE_VSMULAS_S8_QACC_P
4225
60.7k
    0U, // EE_VSR_32_P
4226
60.7k
    8U, // EE_VST_128_IP_P
4227
60.7k
    8U, // EE_VST_128_XP_P
4228
60.7k
    1U, // EE_VST_H_64_IP_P
4229
60.7k
    8U, // EE_VST_H_64_XP_P
4230
60.7k
    1U, // EE_VST_L_64_IP_P
4231
60.7k
    8U, // EE_VST_L_64_XP_P
4232
60.7k
    33920U, // EE_VSUBS_S16_LD_INCP_P
4233
60.7k
    8U, // EE_VSUBS_S16_P
4234
60.7k
    33920U, // EE_VSUBS_S16_ST_INCP_P
4235
60.7k
    33920U, // EE_VSUBS_S32_LD_INCP_P
4236
60.7k
    8U, // EE_VSUBS_S32_P
4237
60.7k
    33920U, // EE_VSUBS_S32_ST_INCP_P
4238
60.7k
    33920U, // EE_VSUBS_S8_LD_INCP_P
4239
60.7k
    8U, // EE_VSUBS_S8_P
4240
60.7k
    33920U, // EE_VSUBS_S8_ST_INCP_P
4241
60.7k
    0U, // EE_VUNZIP_16_P
4242
60.7k
    0U, // EE_VUNZIP_32_P
4243
60.7k
    0U, // EE_VUNZIP_8_P
4244
60.7k
    0U, // EE_VZIP_16_P
4245
60.7k
    0U, // EE_VZIP_32_P
4246
60.7k
    0U, // EE_VZIP_8_P
4247
60.7k
    8U, // EE_XORQ_P
4248
60.7k
    0U, // EE_ZERO_ACCX_P
4249
60.7k
    0U, // EE_ZERO_QACC_P
4250
60.7k
    0U, // EE_ZERO_Q_P
4251
60.7k
    8U, // EXTUI_BR2_P
4252
60.7k
    8U, // EXTUI_BR4_P
4253
60.7k
    8U, // EXTUI_BR_P
4254
60.7k
    0U, // L8I_P
4255
60.7k
    0U, // LDDEC_P
4256
60.7k
    0U, // LDINC_P
4257
60.7k
    0U, // LOOPBR
4258
60.7k
    0U, // LOOPDEC
4259
60.7k
    0U, // LOOPEND
4260
60.7k
    0U, // LOOPINIT
4261
60.7k
    0U, // LOOPSTART
4262
60.7k
    0U, // MOVBA2_P
4263
60.7k
    0U, // MOVBA2_P2
4264
60.7k
    0U, // MOVBA4_P
4265
60.7k
    0U, // MOVBA4_P2
4266
60.7k
    0U, // MOVBA_P
4267
60.7k
    0U, // MOVBA_P2
4268
60.7k
    0U, // MULA_DA_HH_LDDEC_P
4269
60.7k
    0U, // MULA_DA_HH_LDINC_P
4270
60.7k
    0U, // MULA_DA_HL_LDDEC_P
4271
60.7k
    0U, // MULA_DA_HL_LDINC_P
4272
60.7k
    0U, // MULA_DA_LH_LDDEC_P
4273
60.7k
    0U, // MULA_DA_LH_LDINC_P
4274
60.7k
    0U, // MULA_DA_LL_LDDEC_P
4275
60.7k
    0U, // MULA_DA_LL_LDINC_P
4276
60.7k
    128U, // MULA_DD_HH_LDDEC_P
4277
60.7k
    128U, // MULA_DD_HH_LDINC_P
4278
60.7k
    128U, // MULA_DD_HL_LDDEC_P
4279
60.7k
    128U, // MULA_DD_HL_LDINC_P
4280
60.7k
    128U, // MULA_DD_LH_LDDEC_P
4281
60.7k
    128U, // MULA_DD_LH_LDINC_P
4282
60.7k
    128U, // MULA_DD_LL_LDDEC_P
4283
60.7k
    128U, // MULA_DD_LL_LDINC_P
4284
60.7k
    0U, // RESTORE_BOOL
4285
60.7k
    3072U,  // SELECT
4286
60.7k
    3072U,  // SELECT_CC_FP_FP
4287
60.7k
    3072U,  // SELECT_CC_FP_INT
4288
60.7k
    3072U,  // SELECT_CC_INT_FP
4289
60.7k
    8U, // SLLI_BR_P
4290
60.7k
    8U, // SLL_P
4291
60.7k
    0U, // SPILL_BOOL
4292
60.7k
    8U, // SRA_P
4293
60.7k
    8U, // SRL_P
4294
60.7k
    0U, // WSR_ACCHI_P
4295
60.7k
    0U, // WSR_ACCLO_P
4296
60.7k
    0U, // WSR_M0_P
4297
60.7k
    0U, // WSR_M1_P
4298
60.7k
    0U, // WSR_M2_P
4299
60.7k
    0U, // WSR_M3_P
4300
60.7k
    0U, // XSR_ACCHI_P
4301
60.7k
    0U, // XSR_ACCLO_P
4302
60.7k
    0U, // XSR_M0_P
4303
60.7k
    0U, // XSR_M1_P
4304
60.7k
    0U, // XSR_M2_P
4305
60.7k
    0U, // XSR_M3_P
4306
60.7k
    0U, // mv_QR_P
4307
60.7k
    0U, // ABS
4308
60.7k
    0U, // ABS_S
4309
60.7k
    8U, // ADD
4310
60.7k
    0U, // ADDEXPM_S
4311
60.7k
    0U, // ADDEXP_S
4312
60.7k
    8U, // ADDI
4313
60.7k
    1U, // ADDI_N
4314
60.7k
    1U, // ADDMI
4315
60.7k
    8U, // ADDX2
4316
60.7k
    8U, // ADDX4
4317
60.7k
    8U, // ADDX8
4318
60.7k
    8U, // ADD_N
4319
60.7k
    8U, // ADD_S
4320
60.7k
    0U, // AE_ABS16S
4321
60.7k
    0U, // AE_ABS24S
4322
60.7k
    0U, // AE_ABS32
4323
60.7k
    0U, // AE_ABS32S
4324
60.7k
    0U, // AE_ABS64
4325
60.7k
    0U, // AE_ABS64S
4326
60.7k
    8U, // AE_ADD16
4327
60.7k
    8U, // AE_ADD16S
4328
60.7k
    8U, // AE_ADD24S
4329
60.7k
    8U, // AE_ADD32
4330
60.7k
    8U, // AE_ADD32S
4331
60.7k
    8U, // AE_ADD32_HL_LH
4332
60.7k
    8U, // AE_ADD64
4333
60.7k
    8U, // AE_ADD64S
4334
60.7k
    8U, // AE_ADDBRBA32
4335
60.7k
    8U, // AE_ADDSUB32
4336
60.7k
    8U, // AE_ADDSUB32S
4337
60.7k
    8U, // AE_AND
4338
60.7k
    0U, // AE_CVT32X2F16_10
4339
60.7k
    0U, // AE_CVT32X2F16_32
4340
60.7k
    0U, // AE_CVT48A32
4341
60.7k
    0U, // AE_CVT64A32
4342
60.7k
    0U, // AE_CVT64F32_H
4343
60.7k
    0U, // AE_CVTA32F24S_H
4344
60.7k
    0U, // AE_CVTA32F24S_L
4345
60.7k
    0U, // AE_CVTQ56A32S
4346
60.7k
    0U, // AE_CVTQ56P32S_H
4347
60.7k
    0U, // AE_CVTQ56P32S_L
4348
60.7k
    0U, // AE_DB
4349
60.7k
    0U, // AE_DBI
4350
60.7k
    0U, // AE_DBI_IC
4351
60.7k
    0U, // AE_DBI_IP
4352
60.7k
    0U, // AE_DB_IC
4353
60.7k
    0U, // AE_DB_IP
4354
60.7k
    0U, // AE_DIV64D32_H
4355
60.7k
    0U, // AE_DIV64D32_L
4356
60.7k
    8U, // AE_EQ16
4357
60.7k
    8U, // AE_EQ32
4358
60.7k
    8U, // AE_EQ64
4359
60.7k
    1U, // AE_L16M_I
4360
60.7k
    1U, // AE_L16M_IU
4361
60.7k
    8U, // AE_L16M_X
4362
60.7k
    10U,  // AE_L16M_XC
4363
60.7k
    10U,  // AE_L16M_XU
4364
60.7k
    2U, // AE_L16X2M_I
4365
60.7k
    2U, // AE_L16X2M_IU
4366
60.7k
    8U, // AE_L16X2M_X
4367
60.7k
    10U,  // AE_L16X2M_XC
4368
60.7k
    10U,  // AE_L16X2M_XU
4369
60.7k
    2U, // AE_L16X4_I
4370
60.7k
    2U, // AE_L16X4_IP
4371
60.7k
    0U, // AE_L16X4_RIC
4372
60.7k
    0U, // AE_L16X4_RIP
4373
60.7k
    8U, // AE_L16X4_X
4374
60.7k
    10U,  // AE_L16X4_XC
4375
60.7k
    10U,  // AE_L16X4_XP
4376
60.7k
    1U, // AE_L16_I
4377
60.7k
    1U, // AE_L16_IP
4378
60.7k
    8U, // AE_L16_X
4379
60.7k
    10U,  // AE_L16_XC
4380
60.7k
    10U,  // AE_L16_XP
4381
60.7k
    2U, // AE_L32F24_I
4382
60.7k
    2U, // AE_L32F24_IP
4383
60.7k
    8U, // AE_L32F24_X
4384
60.7k
    10U,  // AE_L32F24_XC
4385
60.7k
    10U,  // AE_L32F24_XP
4386
60.7k
    2U, // AE_L32M_I
4387
60.7k
    2U, // AE_L32M_IU
4388
60.7k
    8U, // AE_L32M_X
4389
60.7k
    10U,  // AE_L32M_XC
4390
60.7k
    10U,  // AE_L32M_XU
4391
60.7k
    2U, // AE_L32X2F24_I
4392
60.7k
    2U, // AE_L32X2F24_IP
4393
60.7k
    0U, // AE_L32X2F24_RIC
4394
60.7k
    0U, // AE_L32X2F24_RIP
4395
60.7k
    8U, // AE_L32X2F24_X
4396
60.7k
    10U,  // AE_L32X2F24_XC
4397
60.7k
    10U,  // AE_L32X2F24_XP
4398
60.7k
    2U, // AE_L32X2_I
4399
60.7k
    2U, // AE_L32X2_IP
4400
60.7k
    0U, // AE_L32X2_RIC
4401
60.7k
    0U, // AE_L32X2_RIP
4402
60.7k
    8U, // AE_L32X2_X
4403
60.7k
    10U,  // AE_L32X2_XC
4404
60.7k
    10U,  // AE_L32X2_XP
4405
60.7k
    2U, // AE_L32_I
4406
60.7k
    2U, // AE_L32_IP
4407
60.7k
    8U, // AE_L32_X
4408
60.7k
    10U,  // AE_L32_XC
4409
60.7k
    10U,  // AE_L32_XP
4410
60.7k
    2U, // AE_L64_I
4411
60.7k
    2U, // AE_L64_IP
4412
60.7k
    8U, // AE_L64_X
4413
60.7k
    10U,  // AE_L64_XC
4414
60.7k
    10U,  // AE_L64_XP
4415
60.7k
    0U, // AE_LA16X4NEG_PC
4416
60.7k
    0U, // AE_LA16X4POS_PC
4417
60.7k
    2U, // AE_LA16X4_IC
4418
60.7k
    2U, // AE_LA16X4_IP
4419
60.7k
    2U, // AE_LA16X4_RIC
4420
60.7k
    2U, // AE_LA16X4_RIP
4421
60.7k
    0U, // AE_LA24NEG_PC
4422
60.7k
    0U, // AE_LA24POS_PC
4423
60.7k
    0U, // AE_LA24X2NEG_PC
4424
60.7k
    0U, // AE_LA24X2POS_PC
4425
60.7k
    2U, // AE_LA24X2_IC
4426
60.7k
    2U, // AE_LA24X2_IP
4427
60.7k
    2U, // AE_LA24X2_RIC
4428
60.7k
    2U, // AE_LA24X2_RIP
4429
60.7k
    2U, // AE_LA24_IC
4430
60.7k
    2U, // AE_LA24_IP
4431
60.7k
    2U, // AE_LA24_RIC
4432
60.7k
    2U, // AE_LA24_RIP
4433
60.7k
    2U, // AE_LA32X2F24_IC
4434
60.7k
    2U, // AE_LA32X2F24_IP
4435
60.7k
    2U, // AE_LA32X2F24_RIC
4436
60.7k
    2U, // AE_LA32X2F24_RIP
4437
60.7k
    0U, // AE_LA32X2NEG_PC
4438
60.7k
    0U, // AE_LA32X2POS_PC
4439
60.7k
    2U, // AE_LA32X2_IC
4440
60.7k
    2U, // AE_LA32X2_IP
4441
60.7k
    2U, // AE_LA32X2_RIC
4442
60.7k
    2U, // AE_LA32X2_RIP
4443
60.7k
    0U, // AE_LA64_PP
4444
60.7k
    2U, // AE_LALIGN64_I
4445
60.7k
    0U, // AE_LB
4446
60.7k
    0U, // AE_LBI
4447
60.7k
    8U, // AE_LBK
4448
60.7k
    2U, // AE_LBKI
4449
60.7k
    0U, // AE_LBS
4450
60.7k
    0U, // AE_LBSI
4451
60.7k
    8U, // AE_LE16
4452
60.7k
    8U, // AE_LE32
4453
60.7k
    8U, // AE_LE64
4454
60.7k
    8U, // AE_LT16
4455
60.7k
    8U, // AE_LT32
4456
60.7k
    8U, // AE_LT64
4457
60.7k
    8U, // AE_MAX32
4458
60.7k
    8U, // AE_MAX64
4459
60.7k
    8U, // AE_MAXABS32S
4460
60.7k
    8U, // AE_MAXABS64S
4461
60.7k
    8U, // AE_MIN32
4462
60.7k
    8U, // AE_MIN64
4463
60.7k
    8U, // AE_MINABS32S
4464
60.7k
    8U, // AE_MINABS64S
4465
60.7k
    0U, // AE_MOV
4466
60.7k
    0U, // AE_MOVAD16_0
4467
60.7k
    0U, // AE_MOVAD16_1
4468
60.7k
    0U, // AE_MOVAD16_2
4469
60.7k
    0U, // AE_MOVAD16_3
4470
60.7k
    0U, // AE_MOVAD32_H
4471
60.7k
    0U, // AE_MOVAD32_L
4472
60.7k
    0U, // AE_MOVALIGN
4473
60.7k
    0U, // AE_MOVDA16
4474
60.7k
    8U, // AE_MOVDA16X2
4475
60.7k
    0U, // AE_MOVDA32
4476
60.7k
    8U, // AE_MOVDA32X2
4477
60.7k
    10U,  // AE_MOVF16X4
4478
60.7k
    10U,  // AE_MOVF32X2
4479
60.7k
    10U,  // AE_MOVF64
4480
60.7k
    0U, // AE_MOVI
4481
60.7k
    10U,  // AE_MOVT16X4
4482
60.7k
    10U,  // AE_MOVT32X2
4483
60.7k
    10U,  // AE_MOVT64
4484
60.7k
    0U, // AE_MUL16X4
4485
60.7k
    8U, // AE_MUL32U_LL
4486
60.7k
    8U, // AE_MUL32X16_H0
4487
60.7k
    8U, // AE_MUL32X16_H0_S2
4488
60.7k
    8U, // AE_MUL32X16_H1
4489
60.7k
    8U, // AE_MUL32X16_H1_S2
4490
60.7k
    8U, // AE_MUL32X16_H2
4491
60.7k
    8U, // AE_MUL32X16_H2_S2
4492
60.7k
    8U, // AE_MUL32X16_H3
4493
60.7k
    8U, // AE_MUL32X16_H3_S2
4494
60.7k
    8U, // AE_MUL32X16_L0
4495
60.7k
    8U, // AE_MUL32X16_L0_S2
4496
60.7k
    8U, // AE_MUL32X16_L1
4497
60.7k
    8U, // AE_MUL32X16_L1_S2
4498
60.7k
    8U, // AE_MUL32X16_L2
4499
60.7k
    8U, // AE_MUL32X16_L2_S2
4500
60.7k
    8U, // AE_MUL32X16_L3
4501
60.7k
    8U, // AE_MUL32X16_L3_S2
4502
60.7k
    8U, // AE_MUL32_HH
4503
60.7k
    8U, // AE_MUL32_LH
4504
60.7k
    8U, // AE_MUL32_LL
4505
60.7k
    8U, // AE_MUL32_LL_S2
4506
60.7k
    11U,  // AE_MULA16X4
4507
60.7k
    10U,  // AE_MULA32U_LL
4508
60.7k
    10U,  // AE_MULA32X16_H0
4509
60.7k
    10U,  // AE_MULA32X16_H0_S2
4510
60.7k
    10U,  // AE_MULA32X16_H1
4511
60.7k
    10U,  // AE_MULA32X16_H1_S2
4512
60.7k
    10U,  // AE_MULA32X16_H2
4513
60.7k
    10U,  // AE_MULA32X16_H2_S2
4514
60.7k
    10U,  // AE_MULA32X16_H3
4515
60.7k
    10U,  // AE_MULA32X16_H3_S2
4516
60.7k
    10U,  // AE_MULA32X16_L0
4517
60.7k
    10U,  // AE_MULA32X16_L0_S2
4518
60.7k
    10U,  // AE_MULA32X16_L1
4519
60.7k
    10U,  // AE_MULA32X16_L1_S2
4520
60.7k
    10U,  // AE_MULA32X16_L2
4521
60.7k
    10U,  // AE_MULA32X16_L2_S2
4522
60.7k
    10U,  // AE_MULA32X16_L3
4523
60.7k
    10U,  // AE_MULA32X16_L3_S2
4524
60.7k
    10U,  // AE_MULA32_HH
4525
60.7k
    10U,  // AE_MULA32_LH
4526
60.7k
    10U,  // AE_MULA32_LL
4527
60.7k
    10U,  // AE_MULA32_LL_S2
4528
60.7k
    10U,  // AE_MULAAD24_HH_LL
4529
60.7k
    10U,  // AE_MULAAD24_HH_LL_S2
4530
60.7k
    10U,  // AE_MULAAD24_HL_LH
4531
60.7k
    10U,  // AE_MULAAD24_HL_LH_S2
4532
60.7k
    10U,  // AE_MULAAD32X16_H0_L1
4533
60.7k
    10U,  // AE_MULAAD32X16_H0_L1_S2
4534
60.7k
    10U,  // AE_MULAAD32X16_H1_L0
4535
60.7k
    10U,  // AE_MULAAD32X16_H1_L0_S2
4536
60.7k
    10U,  // AE_MULAAD32X16_H2_L3
4537
60.7k
    10U,  // AE_MULAAD32X16_H2_L3_S2
4538
60.7k
    10U,  // AE_MULAAD32X16_H3_L2
4539
60.7k
    10U,  // AE_MULAAD32X16_H3_L2_S2
4540
60.7k
    10U,  // AE_MULAAFD16SS_11_00
4541
60.7k
    10U,  // AE_MULAAFD16SS_11_00_S2
4542
60.7k
    10U,  // AE_MULAAFD16SS_13_02
4543
60.7k
    10U,  // AE_MULAAFD16SS_13_02_S2
4544
60.7k
    10U,  // AE_MULAAFD16SS_33_22
4545
60.7k
    10U,  // AE_MULAAFD16SS_33_22_S2
4546
60.7k
    10U,  // AE_MULAAFD24_HH_LL
4547
60.7k
    10U,  // AE_MULAAFD24_HH_LL_S2
4548
60.7k
    10U,  // AE_MULAAFD24_HL_LH
4549
60.7k
    10U,  // AE_MULAAFD24_HL_LH_S2
4550
60.7k
    10U,  // AE_MULAAFD32X16_H0_L1
4551
60.7k
    10U,  // AE_MULAAFD32X16_H0_L1_S2
4552
60.7k
    10U,  // AE_MULAAFD32X16_H1_L0
4553
60.7k
    10U,  // AE_MULAAFD32X16_H1_L0_S2
4554
60.7k
    10U,  // AE_MULAAFD32X16_H2_L3
4555
60.7k
    10U,  // AE_MULAAFD32X16_H2_L3_S2
4556
60.7k
    10U,  // AE_MULAAFD32X16_H3_L2
4557
60.7k
    10U,  // AE_MULAAFD32X16_H3_L2_S2
4558
60.7k
    10U,  // AE_MULAC24
4559
60.7k
    10U,  // AE_MULAC32X16_H
4560
60.7k
    10U,  // AE_MULAC32X16_L
4561
60.7k
    10U,  // AE_MULAF16SS_00
4562
60.7k
    10U,  // AE_MULAF16SS_00_S2
4563
60.7k
    10U,  // AE_MULAF16SS_10
4564
60.7k
    10U,  // AE_MULAF16SS_11
4565
60.7k
    10U,  // AE_MULAF16SS_20
4566
60.7k
    10U,  // AE_MULAF16SS_21
4567
60.7k
    10U,  // AE_MULAF16SS_22
4568
60.7k
    10U,  // AE_MULAF16SS_30
4569
60.7k
    10U,  // AE_MULAF16SS_31
4570
60.7k
    10U,  // AE_MULAF16SS_32
4571
60.7k
    10U,  // AE_MULAF16SS_33
4572
60.7k
    11U,  // AE_MULAF16X4SS
4573
60.7k
    10U,  // AE_MULAF32R_HH
4574
60.7k
    10U,  // AE_MULAF32R_LH
4575
60.7k
    10U,  // AE_MULAF32R_LL
4576
60.7k
    10U,  // AE_MULAF32R_LL_S2
4577
60.7k
    10U,  // AE_MULAF32S_HH
4578
60.7k
    10U,  // AE_MULAF32S_LH
4579
60.7k
    10U,  // AE_MULAF32S_LL
4580
60.7k
    10U,  // AE_MULAF32S_LL_S2
4581
60.7k
    10U,  // AE_MULAF32X16_H0
4582
60.7k
    10U,  // AE_MULAF32X16_H0_S2
4583
60.7k
    10U,  // AE_MULAF32X16_H1
4584
60.7k
    10U,  // AE_MULAF32X16_H1_S2
4585
60.7k
    10U,  // AE_MULAF32X16_H2
4586
60.7k
    10U,  // AE_MULAF32X16_H2_S2
4587
60.7k
    10U,  // AE_MULAF32X16_H3
4588
60.7k
    10U,  // AE_MULAF32X16_H3_S2
4589
60.7k
    10U,  // AE_MULAF32X16_L0
4590
60.7k
    10U,  // AE_MULAF32X16_L0_S2
4591
60.7k
    10U,  // AE_MULAF32X16_L1
4592
60.7k
    10U,  // AE_MULAF32X16_L1_S2
4593
60.7k
    10U,  // AE_MULAF32X16_L2
4594
60.7k
    10U,  // AE_MULAF32X16_L2_S2
4595
60.7k
    10U,  // AE_MULAF32X16_L3
4596
60.7k
    10U,  // AE_MULAF32X16_L3_S2
4597
60.7k
    10U,  // AE_MULAF48Q32SP16S_L
4598
60.7k
    10U,  // AE_MULAF48Q32SP16S_L_S2
4599
60.7k
    10U,  // AE_MULAF48Q32SP16U_L
4600
60.7k
    10U,  // AE_MULAF48Q32SP16U_L_S2
4601
60.7k
    10U,  // AE_MULAFC24RA
4602
60.7k
    10U,  // AE_MULAFC32X16RAS_H
4603
60.7k
    10U,  // AE_MULAFC32X16RAS_L
4604
60.7k
    387U, // AE_MULAFD24X2_FIR_H
4605
60.7k
    387U, // AE_MULAFD24X2_FIR_L
4606
60.7k
    387U, // AE_MULAFD32X16X2_FIR_HH
4607
60.7k
    387U, // AE_MULAFD32X16X2_FIR_HL
4608
60.7k
    387U, // AE_MULAFD32X16X2_FIR_LH
4609
60.7k
    387U, // AE_MULAFD32X16X2_FIR_LL
4610
60.7k
    10U,  // AE_MULAFP24X2R
4611
60.7k
    10U,  // AE_MULAFP24X2RA
4612
60.7k
    10U,  // AE_MULAFP24X2RA_S2
4613
60.7k
    10U,  // AE_MULAFP24X2R_S2
4614
60.7k
    10U,  // AE_MULAFP32X16X2RAS_H
4615
60.7k
    10U,  // AE_MULAFP32X16X2RAS_H_S2
4616
60.7k
    10U,  // AE_MULAFP32X16X2RAS_L
4617
60.7k
    10U,  // AE_MULAFP32X16X2RAS_L_S2
4618
60.7k
    10U,  // AE_MULAFP32X16X2RS_H
4619
60.7k
    10U,  // AE_MULAFP32X16X2RS_H_S2
4620
60.7k
    10U,  // AE_MULAFP32X16X2RS_L
4621
60.7k
    10U,  // AE_MULAFP32X16X2RS_L_S2
4622
60.7k
    10U,  // AE_MULAFP32X2RAS
4623
60.7k
    10U,  // AE_MULAFP32X2RS
4624
60.7k
    10U,  // AE_MULAFQ32SP24S_H_S2
4625
60.7k
    10U,  // AE_MULAFQ32SP24S_L_S2
4626
60.7k
    10U,  // AE_MULAP24X2
4627
60.7k
    10U,  // AE_MULAP24X2_S2
4628
60.7k
    10U,  // AE_MULAP32X16X2_H
4629
60.7k
    10U,  // AE_MULAP32X16X2_L
4630
60.7k
    10U,  // AE_MULAP32X2
4631
60.7k
    10U,  // AE_MULAQ32SP16S_L_S2
4632
60.7k
    10U,  // AE_MULAQ32SP16U_L_S2
4633
60.7k
    10U,  // AE_MULARFQ32SP24S_H_S2
4634
60.7k
    10U,  // AE_MULARFQ32SP24S_L_S2
4635
60.7k
    10U,  // AE_MULAS32F48P16S_HH
4636
60.7k
    10U,  // AE_MULAS32F48P16S_HH_S2
4637
60.7k
    10U,  // AE_MULAS32F48P16S_LH
4638
60.7k
    10U,  // AE_MULAS32F48P16S_LH_S2
4639
60.7k
    10U,  // AE_MULAS32F48P16S_LL
4640
60.7k
    10U,  // AE_MULAS32F48P16S_LL_S2
4641
60.7k
    10U,  // AE_MULASD24_HH_LL
4642
60.7k
    10U,  // AE_MULASD24_HH_LL_S2
4643
60.7k
    10U,  // AE_MULASD24_HL_LH
4644
60.7k
    10U,  // AE_MULASD24_HL_LH_S2
4645
60.7k
    10U,  // AE_MULASD32X16_H1_L0
4646
60.7k
    10U,  // AE_MULASD32X16_H1_L0_S2
4647
60.7k
    10U,  // AE_MULASD32X16_H3_L2
4648
60.7k
    10U,  // AE_MULASD32X16_H3_L2_S2
4649
60.7k
    10U,  // AE_MULASFD24_HH_LL
4650
60.7k
    10U,  // AE_MULASFD24_HH_LL_S2
4651
60.7k
    10U,  // AE_MULASFD24_HL_LH
4652
60.7k
    10U,  // AE_MULASFD24_HL_LH_S2
4653
60.7k
    10U,  // AE_MULASFD32X16_H1_L0
4654
60.7k
    10U,  // AE_MULASFD32X16_H1_L0_S2
4655
60.7k
    10U,  // AE_MULASFD32X16_H3_L2
4656
60.7k
    10U,  // AE_MULASFD32X16_H3_L2_S2
4657
60.7k
    8U, // AE_MULC24
4658
60.7k
    8U, // AE_MULC32X16_H
4659
60.7k
    8U, // AE_MULC32X16_L
4660
60.7k
    8U, // AE_MULF16SS_00
4661
60.7k
    8U, // AE_MULF16SS_00_S2
4662
60.7k
    8U, // AE_MULF16SS_10
4663
60.7k
    8U, // AE_MULF16SS_11
4664
60.7k
    8U, // AE_MULF16SS_20
4665
60.7k
    8U, // AE_MULF16SS_21
4666
60.7k
    8U, // AE_MULF16SS_22
4667
60.7k
    8U, // AE_MULF16SS_30
4668
60.7k
    8U, // AE_MULF16SS_31
4669
60.7k
    8U, // AE_MULF16SS_32
4670
60.7k
    8U, // AE_MULF16SS_33
4671
60.7k
    0U, // AE_MULF16X4SS
4672
60.7k
    8U, // AE_MULF32R_HH
4673
60.7k
    8U, // AE_MULF32R_LH
4674
60.7k
    8U, // AE_MULF32R_LL
4675
60.7k
    8U, // AE_MULF32R_LL_S2
4676
60.7k
    8U, // AE_MULF32S_HH
4677
60.7k
    8U, // AE_MULF32S_LH
4678
60.7k
    8U, // AE_MULF32S_LL
4679
60.7k
    8U, // AE_MULF32S_LL_S2
4680
60.7k
    8U, // AE_MULF32X16_H0
4681
60.7k
    8U, // AE_MULF32X16_H0_S2
4682
60.7k
    8U, // AE_MULF32X16_H1
4683
60.7k
    8U, // AE_MULF32X16_H1_S2
4684
60.7k
    8U, // AE_MULF32X16_H2
4685
60.7k
    8U, // AE_MULF32X16_H2_S2
4686
60.7k
    8U, // AE_MULF32X16_H3
4687
60.7k
    8U, // AE_MULF32X16_H3_S2
4688
60.7k
    8U, // AE_MULF32X16_L0
4689
60.7k
    8U, // AE_MULF32X16_L0_S2
4690
60.7k
    8U, // AE_MULF32X16_L1
4691
60.7k
    8U, // AE_MULF32X16_L1_S2
4692
60.7k
    8U, // AE_MULF32X16_L2
4693
60.7k
    8U, // AE_MULF32X16_L2_S2
4694
60.7k
    8U, // AE_MULF32X16_L3
4695
60.7k
    8U, // AE_MULF32X16_L3_S2
4696
60.7k
    8U, // AE_MULF48Q32SP16S_L
4697
60.7k
    8U, // AE_MULF48Q32SP16S_L_S2
4698
60.7k
    8U, // AE_MULF48Q32SP16U_L
4699
60.7k
    8U, // AE_MULF48Q32SP16U_L_S2
4700
60.7k
    8U, // AE_MULFC24RA
4701
60.7k
    8U, // AE_MULFC32X16RAS_H
4702
60.7k
    8U, // AE_MULFC32X16RAS_L
4703
60.7k
    35840U, // AE_MULFD24X2_FIR_H
4704
60.7k
    35840U, // AE_MULFD24X2_FIR_L
4705
60.7k
    35840U, // AE_MULFD32X16X2_FIR_HH
4706
60.7k
    35840U, // AE_MULFD32X16X2_FIR_HL
4707
60.7k
    35840U, // AE_MULFD32X16X2_FIR_LH
4708
60.7k
    35840U, // AE_MULFD32X16X2_FIR_LL
4709
60.7k
    8U, // AE_MULFP16X4RAS
4710
60.7k
    8U, // AE_MULFP16X4S
4711
60.7k
    8U, // AE_MULFP24X2R
4712
60.7k
    8U, // AE_MULFP24X2RA
4713
60.7k
    8U, // AE_MULFP24X2RA_S2
4714
60.7k
    8U, // AE_MULFP24X2R_S2
4715
60.7k
    8U, // AE_MULFP32X16X2RAS_H
4716
60.7k
    8U, // AE_MULFP32X16X2RAS_H_S2
4717
60.7k
    8U, // AE_MULFP32X16X2RAS_L
4718
60.7k
    8U, // AE_MULFP32X16X2RAS_L_S2
4719
60.7k
    8U, // AE_MULFP32X16X2RS_H
4720
60.7k
    8U, // AE_MULFP32X16X2RS_H_S2
4721
60.7k
    8U, // AE_MULFP32X16X2RS_L
4722
60.7k
    8U, // AE_MULFP32X16X2RS_L_S2
4723
60.7k
    8U, // AE_MULFP32X2RAS
4724
60.7k
    8U, // AE_MULFP32X2RS
4725
60.7k
    8U, // AE_MULFQ32SP24S_H_S2
4726
60.7k
    8U, // AE_MULFQ32SP24S_L_S2
4727
60.7k
    8U, // AE_MULP24X2
4728
60.7k
    8U, // AE_MULP24X2_S2
4729
60.7k
    8U, // AE_MULP32X16X2_H
4730
60.7k
    8U, // AE_MULP32X16X2_L
4731
60.7k
    8U, // AE_MULP32X2
4732
60.7k
    8U, // AE_MULQ32SP16S_L_S2
4733
60.7k
    8U, // AE_MULQ32SP16U_L_S2
4734
60.7k
    8U, // AE_MULRFQ32SP24S_H_S2
4735
60.7k
    8U, // AE_MULRFQ32SP24S_L_S2
4736
60.7k
    11U,  // AE_MULS16X4
4737
60.7k
    8U, // AE_MULS32F48P16S_HH
4738
60.7k
    8U, // AE_MULS32F48P16S_HH_S2
4739
60.7k
    8U, // AE_MULS32F48P16S_LH
4740
60.7k
    8U, // AE_MULS32F48P16S_LH_S2
4741
60.7k
    8U, // AE_MULS32F48P16S_LL
4742
60.7k
    8U, // AE_MULS32F48P16S_LL_S2
4743
60.7k
    10U,  // AE_MULS32U_LL
4744
60.7k
    10U,  // AE_MULS32X16_H0
4745
60.7k
    10U,  // AE_MULS32X16_H0_S2
4746
60.7k
    10U,  // AE_MULS32X16_H1
4747
60.7k
    10U,  // AE_MULS32X16_H1_S2
4748
60.7k
    10U,  // AE_MULS32X16_H2
4749
60.7k
    10U,  // AE_MULS32X16_H2_S2
4750
60.7k
    10U,  // AE_MULS32X16_H3
4751
60.7k
    10U,  // AE_MULS32X16_H3_S2
4752
60.7k
    10U,  // AE_MULS32X16_L0
4753
60.7k
    10U,  // AE_MULS32X16_L0_S2
4754
60.7k
    10U,  // AE_MULS32X16_L1
4755
60.7k
    10U,  // AE_MULS32X16_L1_S2
4756
60.7k
    10U,  // AE_MULS32X16_L2
4757
60.7k
    10U,  // AE_MULS32X16_L2_S2
4758
60.7k
    10U,  // AE_MULS32X16_L3
4759
60.7k
    10U,  // AE_MULS32X16_L3_S2
4760
60.7k
    10U,  // AE_MULS32_HH
4761
60.7k
    10U,  // AE_MULS32_LH
4762
60.7k
    10U,  // AE_MULS32_LL
4763
60.7k
    10U,  // AE_MULSAD24_HH_LL
4764
60.7k
    10U,  // AE_MULSAD24_HH_LL_S2
4765
60.7k
    10U,  // AE_MULSAD32X16_H1_L0
4766
60.7k
    10U,  // AE_MULSAD32X16_H1_L0_S2
4767
60.7k
    10U,  // AE_MULSAD32X16_H3_L2
4768
60.7k
    10U,  // AE_MULSAD32X16_H3_L2_S2
4769
60.7k
    10U,  // AE_MULSAFD24_HH_LL
4770
60.7k
    10U,  // AE_MULSAFD24_HH_LL_S2
4771
60.7k
    10U,  // AE_MULSAFD32X16_H1_L0
4772
60.7k
    10U,  // AE_MULSAFD32X16_H1_L0_S2
4773
60.7k
    10U,  // AE_MULSAFD32X16_H3_L2
4774
60.7k
    10U,  // AE_MULSAFD32X16_H3_L2_S2
4775
60.7k
    10U,  // AE_MULSF16SS_00
4776
60.7k
    10U,  // AE_MULSF16SS_00_S2
4777
60.7k
    10U,  // AE_MULSF16SS_10
4778
60.7k
    10U,  // AE_MULSF16SS_11
4779
60.7k
    10U,  // AE_MULSF16SS_20
4780
60.7k
    10U,  // AE_MULSF16SS_21
4781
60.7k
    10U,  // AE_MULSF16SS_22
4782
60.7k
    10U,  // AE_MULSF16SS_30
4783
60.7k
    10U,  // AE_MULSF16SS_31
4784
60.7k
    10U,  // AE_MULSF16SS_32
4785
60.7k
    10U,  // AE_MULSF16SS_33
4786
60.7k
    11U,  // AE_MULSF16X4SS
4787
60.7k
    10U,  // AE_MULSF32R_HH
4788
60.7k
    10U,  // AE_MULSF32R_LH
4789
60.7k
    10U,  // AE_MULSF32R_LL
4790
60.7k
    10U,  // AE_MULSF32R_LL_S2
4791
60.7k
    10U,  // AE_MULSF32S_HH
4792
60.7k
    10U,  // AE_MULSF32S_LH
4793
60.7k
    10U,  // AE_MULSF32S_LL
4794
60.7k
    10U,  // AE_MULSF32X16_H0
4795
60.7k
    10U,  // AE_MULSF32X16_H0_S2
4796
60.7k
    10U,  // AE_MULSF32X16_H1
4797
60.7k
    10U,  // AE_MULSF32X16_H1_S2
4798
60.7k
    10U,  // AE_MULSF32X16_H2
4799
60.7k
    10U,  // AE_MULSF32X16_H2_S2
4800
60.7k
    10U,  // AE_MULSF32X16_H3
4801
60.7k
    10U,  // AE_MULSF32X16_H3_S2
4802
60.7k
    10U,  // AE_MULSF32X16_L0
4803
60.7k
    10U,  // AE_MULSF32X16_L0_S2
4804
60.7k
    10U,  // AE_MULSF32X16_L1
4805
60.7k
    10U,  // AE_MULSF32X16_L1_S2
4806
60.7k
    10U,  // AE_MULSF32X16_L2
4807
60.7k
    10U,  // AE_MULSF32X16_L2_S2
4808
60.7k
    10U,  // AE_MULSF32X16_L3
4809
60.7k
    10U,  // AE_MULSF32X16_L3_S2
4810
60.7k
    10U,  // AE_MULSF48Q32SP16S_L
4811
60.7k
    10U,  // AE_MULSF48Q32SP16S_L_S2
4812
60.7k
    10U,  // AE_MULSF48Q32SP16U_L
4813
60.7k
    10U,  // AE_MULSF48Q32SP16U_L_S2
4814
60.7k
    10U,  // AE_MULSFP24X2R
4815
60.7k
    10U,  // AE_MULSFP24X2RA
4816
60.7k
    10U,  // AE_MULSFP24X2RA_S2
4817
60.7k
    10U,  // AE_MULSFP24X2R_S2
4818
60.7k
    10U,  // AE_MULSFP32X16X2RAS_H
4819
60.7k
    10U,  // AE_MULSFP32X16X2RAS_H_S2
4820
60.7k
    10U,  // AE_MULSFP32X16X2RAS_L
4821
60.7k
    10U,  // AE_MULSFP32X16X2RAS_L_S2
4822
60.7k
    10U,  // AE_MULSFP32X16X2RS_H
4823
60.7k
    10U,  // AE_MULSFP32X16X2RS_H_S2
4824
60.7k
    10U,  // AE_MULSFP32X16X2RS_L
4825
60.7k
    10U,  // AE_MULSFP32X16X2RS_L_S2
4826
60.7k
    10U,  // AE_MULSFP32X2RAS
4827
60.7k
    10U,  // AE_MULSFP32X2RS
4828
60.7k
    10U,  // AE_MULSFQ32SP24S_H_S2
4829
60.7k
    10U,  // AE_MULSFQ32SP24S_L_S2
4830
60.7k
    10U,  // AE_MULSP24X2
4831
60.7k
    10U,  // AE_MULSP24X2_S2
4832
60.7k
    10U,  // AE_MULSP32X16X2_H
4833
60.7k
    10U,  // AE_MULSP32X16X2_L
4834
60.7k
    10U,  // AE_MULSP32X2
4835
60.7k
    10U,  // AE_MULSQ32SP16S_L_S2
4836
60.7k
    10U,  // AE_MULSQ32SP16U_L_S2
4837
60.7k
    10U,  // AE_MULSRFQ32SP24S_H_S2
4838
60.7k
    10U,  // AE_MULSRFQ32SP24S_L_S2
4839
60.7k
    10U,  // AE_MULSS32F48P16S_HH
4840
60.7k
    10U,  // AE_MULSS32F48P16S_HH_S2
4841
60.7k
    10U,  // AE_MULSS32F48P16S_LH
4842
60.7k
    10U,  // AE_MULSS32F48P16S_LH_S2
4843
60.7k
    10U,  // AE_MULSS32F48P16S_LL
4844
60.7k
    10U,  // AE_MULSS32F48P16S_LL_S2
4845
60.7k
    10U,  // AE_MULSSD24_HH_LL
4846
60.7k
    10U,  // AE_MULSSD24_HH_LL_S2
4847
60.7k
    10U,  // AE_MULSSD24_HL_LH
4848
60.7k
    10U,  // AE_MULSSD24_HL_LH_S2
4849
60.7k
    10U,  // AE_MULSSD32X16_H1_L0
4850
60.7k
    10U,  // AE_MULSSD32X16_H1_L0_S2
4851
60.7k
    10U,  // AE_MULSSD32X16_H3_L2
4852
60.7k
    10U,  // AE_MULSSD32X16_H3_L2_S2
4853
60.7k
    10U,  // AE_MULSSFD16SS_11_00
4854
60.7k
    10U,  // AE_MULSSFD16SS_11_00_S2
4855
60.7k
    10U,  // AE_MULSSFD16SS_13_02
4856
60.7k
    10U,  // AE_MULSSFD16SS_13_02_S2
4857
60.7k
    10U,  // AE_MULSSFD16SS_33_22
4858
60.7k
    10U,  // AE_MULSSFD16SS_33_22_S2
4859
60.7k
    10U,  // AE_MULSSFD24_HH_LL
4860
60.7k
    10U,  // AE_MULSSFD24_HH_LL_S2
4861
60.7k
    10U,  // AE_MULSSFD24_HL_LH
4862
60.7k
    10U,  // AE_MULSSFD24_HL_LH_S2
4863
60.7k
    10U,  // AE_MULSSFD32X16_H1_L0
4864
60.7k
    10U,  // AE_MULSSFD32X16_H1_L0_S2
4865
60.7k
    10U,  // AE_MULSSFD32X16_H3_L2
4866
60.7k
    10U,  // AE_MULSSFD32X16_H3_L2_S2
4867
60.7k
    8U, // AE_MULZAAD24_HH_LL
4868
60.7k
    8U, // AE_MULZAAD24_HH_LL_S2
4869
60.7k
    8U, // AE_MULZAAD24_HL_LH
4870
60.7k
    8U, // AE_MULZAAD24_HL_LH_S2
4871
60.7k
    8U, // AE_MULZAAD32X16_H0_L1
4872
60.7k
    8U, // AE_MULZAAD32X16_H0_L1_S2
4873
60.7k
    8U, // AE_MULZAAD32X16_H1_L0
4874
60.7k
    8U, // AE_MULZAAD32X16_H1_L0_S2
4875
60.7k
    8U, // AE_MULZAAD32X16_H2_L3
4876
60.7k
    8U, // AE_MULZAAD32X16_H2_L3_S2
4877
60.7k
    8U, // AE_MULZAAD32X16_H3_L2
4878
60.7k
    8U, // AE_MULZAAD32X16_H3_L2_S2
4879
60.7k
    8U, // AE_MULZAAFD16SS_11_00
4880
60.7k
    8U, // AE_MULZAAFD16SS_11_00_S2
4881
60.7k
    8U, // AE_MULZAAFD16SS_13_02
4882
60.7k
    8U, // AE_MULZAAFD16SS_13_02_S2
4883
60.7k
    8U, // AE_MULZAAFD16SS_33_22
4884
60.7k
    8U, // AE_MULZAAFD16SS_33_22_S2
4885
60.7k
    8U, // AE_MULZAAFD24_HH_LL
4886
60.7k
    8U, // AE_MULZAAFD24_HH_LL_S2
4887
60.7k
    8U, // AE_MULZAAFD24_HL_LH
4888
60.7k
    8U, // AE_MULZAAFD24_HL_LH_S2
4889
60.7k
    8U, // AE_MULZAAFD32X16_H0_L1
4890
60.7k
    8U, // AE_MULZAAFD32X16_H0_L1_S2
4891
60.7k
    8U, // AE_MULZAAFD32X16_H1_L0
4892
60.7k
    8U, // AE_MULZAAFD32X16_H1_L0_S2
4893
60.7k
    8U, // AE_MULZAAFD32X16_H2_L3
4894
60.7k
    8U, // AE_MULZAAFD32X16_H2_L3_S2
4895
60.7k
    8U, // AE_MULZAAFD32X16_H3_L2
4896
60.7k
    8U, // AE_MULZAAFD32X16_H3_L2_S2
4897
60.7k
    8U, // AE_MULZASD24_HH_LL
4898
60.7k
    8U, // AE_MULZASD24_HH_LL_S2
4899
60.7k
    8U, // AE_MULZASD24_HL_LH
4900
60.7k
    8U, // AE_MULZASD24_HL_LH_S2
4901
60.7k
    8U, // AE_MULZASD32X16_H1_L0
4902
60.7k
    8U, // AE_MULZASD32X16_H1_L0_S2
4903
60.7k
    8U, // AE_MULZASD32X16_H3_L2
4904
60.7k
    8U, // AE_MULZASD32X16_H3_L2_S2
4905
60.7k
    8U, // AE_MULZASFD24_HH_LL
4906
60.7k
    8U, // AE_MULZASFD24_HH_LL_S2
4907
60.7k
    8U, // AE_MULZASFD24_HL_LH
4908
60.7k
    8U, // AE_MULZASFD24_HL_LH_S2
4909
60.7k
    8U, // AE_MULZASFD32X16_H1_L0
4910
60.7k
    8U, // AE_MULZASFD32X16_H1_L0_S2
4911
60.7k
    8U, // AE_MULZASFD32X16_H3_L2
4912
60.7k
    8U, // AE_MULZASFD32X16_H3_L2_S2
4913
60.7k
    8U, // AE_MULZSAD24_HH_LL
4914
60.7k
    8U, // AE_MULZSAD24_HH_LL_S2
4915
60.7k
    8U, // AE_MULZSAD32X16_H1_L0
4916
60.7k
    8U, // AE_MULZSAD32X16_H1_L0_S2
4917
60.7k
    8U, // AE_MULZSAD32X16_H3_L2
4918
60.7k
    8U, // AE_MULZSAD32X16_H3_L2_S2
4919
60.7k
    8U, // AE_MULZSAFD24_HH_LL
4920
60.7k
    8U, // AE_MULZSAFD24_HH_LL_S2
4921
60.7k
    8U, // AE_MULZSAFD32X16_H1_L0
4922
60.7k
    8U, // AE_MULZSAFD32X16_H1_L0_S2
4923
60.7k
    8U, // AE_MULZSAFD32X16_H3_L2
4924
60.7k
    8U, // AE_MULZSAFD32X16_H3_L2_S2
4925
60.7k
    8U, // AE_MULZSSD24_HH_LL
4926
60.7k
    8U, // AE_MULZSSD24_HH_LL_S2
4927
60.7k
    8U, // AE_MULZSSD24_HL_LH
4928
60.7k
    8U, // AE_MULZSSD24_HL_LH_S2
4929
60.7k
    8U, // AE_MULZSSD32X16_H1_L0
4930
60.7k
    8U, // AE_MULZSSD32X16_H1_L0_S2
4931
60.7k
    8U, // AE_MULZSSD32X16_H3_L2
4932
60.7k
    8U, // AE_MULZSSD32X16_H3_L2_S2
4933
60.7k
    8U, // AE_MULZSSFD16SS_11_00
4934
60.7k
    8U, // AE_MULZSSFD16SS_11_00_S2
4935
60.7k
    8U, // AE_MULZSSFD16SS_13_02
4936
60.7k
    8U, // AE_MULZSSFD16SS_13_02_S2
4937
60.7k
    8U, // AE_MULZSSFD16SS_33_22
4938
60.7k
    8U, // AE_MULZSSFD16SS_33_22_S2
4939
60.7k
    8U, // AE_MULZSSFD24_HH_LL
4940
60.7k
    8U, // AE_MULZSSFD24_HH_LL_S2
4941
60.7k
    8U, // AE_MULZSSFD24_HL_LH
4942
60.7k
    8U, // AE_MULZSSFD24_HL_LH_S2
4943
60.7k
    8U, // AE_MULZSSFD32X16_H1_L0
4944
60.7k
    8U, // AE_MULZSSFD32X16_H1_L0_S2
4945
60.7k
    8U, // AE_MULZSSFD32X16_H3_L2
4946
60.7k
    8U, // AE_MULZSSFD32X16_H3_L2_S2
4947
60.7k
    8U, // AE_NAND
4948
60.7k
    0U, // AE_NEG16S
4949
60.7k
    0U, // AE_NEG24S
4950
60.7k
    0U, // AE_NEG32
4951
60.7k
    0U, // AE_NEG32S
4952
60.7k
    0U, // AE_NEG64
4953
60.7k
    0U, // AE_NEG64S
4954
60.7k
    0U, // AE_NSA64
4955
60.7k
    0U, // AE_NSAZ16_0
4956
60.7k
    0U, // AE_NSAZ32_L
4957
60.7k
    8U, // AE_OR
4958
60.7k
    3U, // AE_PKSR24
4959
60.7k
    3U, // AE_PKSR32
4960
60.7k
    8U, // AE_ROUND16X4F32SASYM
4961
60.7k
    8U, // AE_ROUND16X4F32SSYM
4962
60.7k
    8U, // AE_ROUND24X2F48SASYM
4963
60.7k
    8U, // AE_ROUND24X2F48SSYM
4964
60.7k
    8U, // AE_ROUND32X2F48SASYM
4965
60.7k
    8U, // AE_ROUND32X2F48SSYM
4966
60.7k
    8U, // AE_ROUND32X2F64SASYM
4967
60.7k
    8U, // AE_ROUND32X2F64SSYM
4968
60.7k
    0U, // AE_ROUNDSP16F24ASYM
4969
60.7k
    0U, // AE_ROUNDSP16F24SYM
4970
60.7k
    8U, // AE_ROUNDSP16Q48X2ASYM
4971
60.7k
    8U, // AE_ROUNDSP16Q48X2SYM
4972
60.7k
    0U, // AE_ROUNDSQ32F48ASYM
4973
60.7k
    0U, // AE_ROUNDSQ32F48SYM
4974
60.7k
    1U, // AE_S16M_L_I
4975
60.7k
    1U, // AE_S16M_L_IU
4976
60.7k
    8U, // AE_S16M_L_X
4977
60.7k
    10U,  // AE_S16M_L_XC
4978
60.7k
    10U,  // AE_S16M_L_XU
4979
60.7k
    2U, // AE_S16X2M_I
4980
60.7k
    2U, // AE_S16X2M_IU
4981
60.7k
    8U, // AE_S16X2M_X
4982
60.7k
    10U,  // AE_S16X2M_XC
4983
60.7k
    10U,  // AE_S16X2M_XU
4984
60.7k
    2U, // AE_S16X4_I
4985
60.7k
    2U, // AE_S16X4_IP
4986
60.7k
    0U, // AE_S16X4_RIC
4987
60.7k
    0U, // AE_S16X4_RIP
4988
60.7k
    8U, // AE_S16X4_X
4989
60.7k
    10U,  // AE_S16X4_XC
4990
60.7k
    10U,  // AE_S16X4_XP
4991
60.7k
    1U, // AE_S16_0_I
4992
60.7k
    1U, // AE_S16_0_IP
4993
60.7k
    8U, // AE_S16_0_X
4994
60.7k
    10U,  // AE_S16_0_XC
4995
60.7k
    10U,  // AE_S16_0_XP
4996
60.7k
    2U, // AE_S24RA64S_I
4997
60.7k
    2U, // AE_S24RA64S_IP
4998
60.7k
    8U, // AE_S24RA64S_X
4999
60.7k
    10U,  // AE_S24RA64S_XC
5000
60.7k
    10U,  // AE_S24RA64S_XP
5001
60.7k
    10U,  // AE_S24X2RA64S_IP
5002
60.7k
    2U, // AE_S32F24_L_I
5003
60.7k
    2U, // AE_S32F24_L_IP
5004
60.7k
    8U, // AE_S32F24_L_X
5005
60.7k
    10U,  // AE_S32F24_L_XC
5006
60.7k
    10U,  // AE_S32F24_L_XP
5007
60.7k
    2U, // AE_S32M_I
5008
60.7k
    2U, // AE_S32M_IU
5009
60.7k
    8U, // AE_S32M_X
5010
60.7k
    10U,  // AE_S32M_XC
5011
60.7k
    10U,  // AE_S32M_XU
5012
60.7k
    2U, // AE_S32RA64S_I
5013
60.7k
    2U, // AE_S32RA64S_IP
5014
60.7k
    8U, // AE_S32RA64S_X
5015
60.7k
    10U,  // AE_S32RA64S_XC
5016
60.7k
    10U,  // AE_S32RA64S_XP
5017
60.7k
    2U, // AE_S32X2F24_I
5018
60.7k
    2U, // AE_S32X2F24_IP
5019
60.7k
    0U, // AE_S32X2F24_RIC
5020
60.7k
    0U, // AE_S32X2F24_RIP
5021
60.7k
    8U, // AE_S32X2F24_X
5022
60.7k
    10U,  // AE_S32X2F24_XC
5023
60.7k
    10U,  // AE_S32X2F24_XP
5024
60.7k
    10U,  // AE_S32X2RA64S_IP
5025
60.7k
    2U, // AE_S32X2_I
5026
60.7k
    2U, // AE_S32X2_IP
5027
60.7k
    0U, // AE_S32X2_RIC
5028
60.7k
    0U, // AE_S32X2_RIP
5029
60.7k
    8U, // AE_S32X2_X
5030
60.7k
    10U,  // AE_S32X2_XC
5031
60.7k
    10U,  // AE_S32X2_XP
5032
60.7k
    2U, // AE_S32_L_I
5033
60.7k
    2U, // AE_S32_L_IP
5034
60.7k
    8U, // AE_S32_L_X
5035
60.7k
    10U,  // AE_S32_L_XC
5036
60.7k
    10U,  // AE_S32_L_XP
5037
60.7k
    2U, // AE_S64_I
5038
60.7k
    2U, // AE_S64_IP
5039
60.7k
    8U, // AE_S64_X
5040
60.7k
    10U,  // AE_S64_XC
5041
60.7k
    10U,  // AE_S64_XP
5042
60.7k
    0U, // AE_SA16X4_IC
5043
60.7k
    0U, // AE_SA16X4_IP
5044
60.7k
    0U, // AE_SA16X4_RIC
5045
60.7k
    0U, // AE_SA16X4_RIP
5046
60.7k
    0U, // AE_SA24X2_IC
5047
60.7k
    0U, // AE_SA24X2_IP
5048
60.7k
    0U, // AE_SA24X2_RIC
5049
60.7k
    0U, // AE_SA24X2_RIP
5050
60.7k
    0U, // AE_SA24_L_IC
5051
60.7k
    0U, // AE_SA24_L_IP
5052
60.7k
    0U, // AE_SA24_L_RIC
5053
60.7k
    0U, // AE_SA24_L_RIP
5054
60.7k
    0U, // AE_SA32X2F24_IC
5055
60.7k
    0U, // AE_SA32X2F24_IP
5056
60.7k
    0U, // AE_SA32X2F24_RIC
5057
60.7k
    0U, // AE_SA32X2F24_RIP
5058
60.7k
    0U, // AE_SA32X2_IC
5059
60.7k
    0U, // AE_SA32X2_IP
5060
60.7k
    0U, // AE_SA32X2_RIC
5061
60.7k
    0U, // AE_SA32X2_RIP
5062
60.7k
    0U, // AE_SA64NEG_FP
5063
60.7k
    0U, // AE_SA64POS_FP
5064
60.7k
    2U, // AE_SALIGN64_I
5065
60.7k
    8U, // AE_SAT16X4
5066
60.7k
    0U, // AE_SAT24S
5067
60.7k
    0U, // AE_SAT48S
5068
60.7k
    0U, // AE_SATQ56S
5069
60.7k
    0U, // AE_SB
5070
60.7k
    0U, // AE_SBF
5071
60.7k
    0U, // AE_SBF_IC
5072
60.7k
    0U, // AE_SBF_IP
5073
60.7k
    3U, // AE_SBI
5074
60.7k
    3U, // AE_SBI_IC
5075
60.7k
    3U, // AE_SBI_IP
5076
60.7k
    0U, // AE_SB_IC
5077
60.7k
    0U, // AE_SB_IP
5078
60.7k
    448U, // AE_SEL16I
5079
60.7k
    512U, // AE_SEL16I_N
5080
60.7k
    3U, // AE_SEXT32
5081
60.7k
    0U, // AE_SEXT32X2D16_10
5082
60.7k
    0U, // AE_SEXT32X2D16_32
5083
60.7k
    0U, // AE_SHA32
5084
60.7k
    0U, // AE_SHORTSWAP
5085
60.7k
    8U, // AE_SLAA16S
5086
60.7k
    8U, // AE_SLAA32
5087
60.7k
    8U, // AE_SLAA32S
5088
60.7k
    8U, // AE_SLAA64
5089
60.7k
    8U, // AE_SLAA64S
5090
60.7k
    8U, // AE_SLAAQ56
5091
60.7k
    3U, // AE_SLAI16S
5092
60.7k
    11U,  // AE_SLAI24
5093
60.7k
    11U,  // AE_SLAI24S
5094
60.7k
    11U,  // AE_SLAI32
5095
60.7k
    11U,  // AE_SLAI32S
5096
60.7k
    3U, // AE_SLAI64
5097
60.7k
    3U, // AE_SLAI64S
5098
60.7k
    3U, // AE_SLAISQ56S
5099
60.7k
    0U, // AE_SLAS24
5100
60.7k
    0U, // AE_SLAS24S
5101
60.7k
    0U, // AE_SLAS32
5102
60.7k
    0U, // AE_SLAS32S
5103
60.7k
    0U, // AE_SLAS64
5104
60.7k
    0U, // AE_SLAS64S
5105
60.7k
    0U, // AE_SLASQ56
5106
60.7k
    0U, // AE_SLASSQ56S
5107
60.7k
    8U, // AE_SRA64_32
5108
60.7k
    8U, // AE_SRAA16RS
5109
60.7k
    8U, // AE_SRAA16S
5110
60.7k
    8U, // AE_SRAA32
5111
60.7k
    8U, // AE_SRAA32RS
5112
60.7k
    8U, // AE_SRAA32S
5113
60.7k
    8U, // AE_SRAA64
5114
60.7k
    3U, // AE_SRAI16
5115
60.7k
    3U, // AE_SRAI16R
5116
60.7k
    11U,  // AE_SRAI24
5117
60.7k
    11U,  // AE_SRAI32
5118
60.7k
    11U,  // AE_SRAI32R
5119
60.7k
    3U, // AE_SRAI64
5120
60.7k
    0U, // AE_SRAS24
5121
60.7k
    0U, // AE_SRAS32
5122
60.7k
    0U, // AE_SRAS64
5123
60.7k
    8U, // AE_SRLA32
5124
60.7k
    8U, // AE_SRLA64
5125
60.7k
    11U,  // AE_SRLI24
5126
60.7k
    11U,  // AE_SRLI32
5127
60.7k
    3U, // AE_SRLI64
5128
60.7k
    0U, // AE_SRLS24
5129
60.7k
    0U, // AE_SRLS32
5130
60.7k
    0U, // AE_SRLS64
5131
60.7k
    8U, // AE_SUB16
5132
60.7k
    8U, // AE_SUB16S
5133
60.7k
    8U, // AE_SUB24S
5134
60.7k
    8U, // AE_SUB32
5135
60.7k
    8U, // AE_SUB32S
5136
60.7k
    8U, // AE_SUB64
5137
60.7k
    8U, // AE_SUB64S
5138
60.7k
    8U, // AE_SUBADD32
5139
60.7k
    8U, // AE_SUBADD32S
5140
60.7k
    0U, // AE_TRUNCA32F64S_L
5141
60.7k
    0U, // AE_TRUNCA32X2F64S
5142
60.7k
    448U, // AE_TRUNCI32F64S_L
5143
60.7k
    448U, // AE_TRUNCI32X2F64S
5144
60.7k
    0U, // AE_VLDL16C
5145
60.7k
    0U, // AE_VLDL16C_IC
5146
60.7k
    0U, // AE_VLDL16C_IP
5147
60.7k
    8U, // AE_VLDL16T
5148
60.7k
    8U, // AE_VLDL32T
5149
60.7k
    0U, // AE_VLDSHT
5150
60.7k
    10U,  // AE_VLEL16T
5151
60.7k
    10U,  // AE_VLEL32T
5152
60.7k
    0U, // AE_VLES16C
5153
60.7k
    0U, // AE_VLES16C_IC
5154
60.7k
    0U, // AE_VLES16C_IP
5155
60.7k
    8U, // AE_XOR
5156
60.7k
    0U, // AE_ZALIGN64
5157
60.7k
    0U, // ALL4
5158
60.7k
    0U, // ALL8
5159
60.7k
    8U, // AND
5160
60.7k
    8U, // ANDB
5161
60.7k
    8U, // ANDBC
5162
60.7k
    0U, // ANY4
5163
60.7k
    0U, // ANY8
5164
60.7k
    3U, // BALL
5165
60.7k
    3U, // BANY
5166
60.7k
    3U, // BBC
5167
60.7k
    0U, // BBCI
5168
60.7k
    3U, // BBS
5169
60.7k
    0U, // BBSI
5170
60.7k
    3U, // BEQ
5171
60.7k
    0U, // BEQI
5172
60.7k
    0U, // BEQZ
5173
60.7k
    0U, // BF
5174
60.7k
    3U, // BGE
5175
60.7k
    0U, // BGEI
5176
60.7k
    3U, // BGEU
5177
60.7k
    0U, // BGEUI
5178
60.7k
    0U, // BGEZ
5179
60.7k
    3U, // BLT
5180
60.7k
    0U, // BLTI
5181
60.7k
    3U, // BLTU
5182
60.7k
    0U, // BLTUI
5183
60.7k
    0U, // BLTZ
5184
60.7k
    3U, // BNALL
5185
60.7k
    3U, // BNE
5186
60.7k
    0U, // BNEI
5187
60.7k
    0U, // BNEZ
5188
60.7k
    3U, // BNONE
5189
60.7k
    0U, // BREAK
5190
60.7k
    0U, // BREAK_N
5191
60.7k
    0U, // BT
5192
60.7k
    0U, // CALL0
5193
60.7k
    0U, // CALL12
5194
60.7k
    0U, // CALL4
5195
60.7k
    0U, // CALL8
5196
60.7k
    0U, // CALLX0
5197
60.7k
    0U, // CALLX12
5198
60.7k
    0U, // CALLX4
5199
60.7k
    0U, // CALLX8
5200
60.7k
    3U, // CEIL_S
5201
60.7k
    3U, // CLAMPS
5202
60.7k
    0U, // CLR_BIT_GPIO_OUT
5203
60.7k
    0U, // CONST_S
5204
60.7k
    0U, // DIV0_S
5205
60.7k
    10U,  // DIVN_S
5206
60.7k
    0U, // DSYNC
5207
60.7k
    8U, // EE_ANDQ
5208
60.7k
    0U, // EE_BITREV
5209
60.7k
    0U, // EE_CLR_BIT_GPIO_OUT
5210
60.7k
    192U, // EE_CMUL_S16
5211
60.7k
    20U,  // EE_CMUL_S16_LD_INCP
5212
60.7k
    580U, // EE_CMUL_S16_ST_INCP
5213
60.7k
    13312U, // EE_FFT_AMS_S16_LD_INCP
5214
60.7k
    13312U, // EE_FFT_AMS_S16_LD_INCP_UAUP
5215
60.7k
    13312U, // EE_FFT_AMS_S16_LD_R32_DECP
5216
60.7k
    0U, // EE_FFT_AMS_S16_ST_INCP
5217
60.7k
    28U,  // EE_FFT_CMUL_S16_LD_XP
5218
60.7k
    13954U, // EE_FFT_CMUL_S16_ST_XP
5219
60.7k
    5120U,  // EE_FFT_R2BF_S16
5220
60.7k
    16002U, // EE_FFT_R2BF_S16_ST_INCP
5221
60.7k
    4U, // EE_FFT_VST_R32_DECP
5222
60.7k
    0U, // EE_GET_GPIO_IN
5223
60.7k
    13312U, // EE_LDF_128_IP
5224
60.7k
    13312U, // EE_LDF_128_XP
5225
60.7k
    706U, // EE_LDF_64_IP
5226
60.7k
    642U, // EE_LDF_64_XP
5227
60.7k
    0U, // EE_LDQA_S16_128_IP
5228
60.7k
    0U, // EE_LDQA_S16_128_XP
5229
60.7k
    0U, // EE_LDQA_S8_128_IP
5230
60.7k
    0U, // EE_LDQA_S8_128_XP
5231
60.7k
    0U, // EE_LDQA_U16_128_IP
5232
60.7k
    0U, // EE_LDQA_U16_128_XP
5233
60.7k
    0U, // EE_LDQA_U8_128_IP
5234
60.7k
    0U, // EE_LDQA_U8_128_XP
5235
60.7k
    9408U,  // EE_LDXQ_32
5236
60.7k
    4U, // EE_LD_128_USAR_IP
5237
60.7k
    10U,  // EE_LD_128_USAR_XP
5238
60.7k
    0U, // EE_LD_ACCX_IP
5239
60.7k
    0U, // EE_LD_QACC_H_H_32_IP
5240
60.7k
    0U, // EE_LD_QACC_H_L_128_IP
5241
60.7k
    0U, // EE_LD_QACC_L_H_32_IP
5242
60.7k
    0U, // EE_LD_QACC_L_L_128_IP
5243
60.7k
    0U, // EE_LD_UA_STATE_IP
5244
60.7k
    0U, // EE_MOVI_32_A
5245
60.7k
    0U, // EE_MOVI_32_Q
5246
60.7k
    0U, // EE_MOV_S16_QACC
5247
60.7k
    0U, // EE_MOV_S8_QACC
5248
60.7k
    0U, // EE_MOV_U16_QACC
5249
60.7k
    0U, // EE_MOV_U8_QACC
5250
60.7k
    0U, // EE_NOTQ
5251
60.7k
    8U, // EE_ORQ
5252
60.7k
    0U, // EE_SET_BIT_GPIO_OUT
5253
60.7k
    0U, // EE_SLCI_2Q
5254
60.7k
    0U, // EE_SLCXXP_2Q
5255
60.7k
    0U, // EE_SRCI_2Q
5256
60.7k
    0U, // EE_SRCMB_S16_QACC
5257
60.7k
    0U, // EE_SRCMB_S8_QACC
5258
60.7k
    10U,  // EE_SRCQ_128_ST_INCP
5259
60.7k
    0U, // EE_SRCXXP_2Q
5260
60.7k
    8U, // EE_SRC_Q
5261
60.7k
    0U, // EE_SRC_Q_LD_IP
5262
60.7k
    804U, // EE_SRC_Q_LD_XP
5263
60.7k
    10U,  // EE_SRC_Q_QUP
5264
60.7k
    0U, // EE_SRS_ACCX
5265
60.7k
    13954U, // EE_STF_128_IP
5266
60.7k
    13954U, // EE_STF_128_XP
5267
60.7k
    706U, // EE_STF_64_IP
5268
60.7k
    642U, // EE_STF_64_XP
5269
60.7k
    9408U,  // EE_STXQ_32
5270
60.7k
    0U, // EE_ST_ACCX_IP
5271
60.7k
    0U, // EE_ST_QACC_H_H_32_IP
5272
60.7k
    0U, // EE_ST_QACC_H_L_128_IP
5273
60.7k
    0U, // EE_ST_QACC_L_H_32_IP
5274
60.7k
    0U, // EE_ST_QACC_L_L_128_IP
5275
60.7k
    0U, // EE_ST_UA_STATE_IP
5276
60.7k
    8U, // EE_VADDS_S16
5277
60.7k
    2U, // EE_VADDS_S16_LD_INCP
5278
60.7k
    12U,  // EE_VADDS_S16_ST_INCP
5279
60.7k
    8U, // EE_VADDS_S32
5280
60.7k
    2U, // EE_VADDS_S32_LD_INCP
5281
60.7k
    12U,  // EE_VADDS_S32_ST_INCP
5282
60.7k
    8U, // EE_VADDS_S8
5283
60.7k
    2U, // EE_VADDS_S8_LD_INCP
5284
60.7k
    12U,  // EE_VADDS_S8_ST_INCP
5285
60.7k
    8U, // EE_VCMP_EQ_S16
5286
60.7k
    8U, // EE_VCMP_EQ_S32
5287
60.7k
    8U, // EE_VCMP_EQ_S8
5288
60.7k
    8U, // EE_VCMP_GT_S16
5289
60.7k
    8U, // EE_VCMP_GT_S32
5290
60.7k
    8U, // EE_VCMP_GT_S8
5291
60.7k
    8U, // EE_VCMP_LT_S16
5292
60.7k
    8U, // EE_VCMP_LT_S32
5293
60.7k
    8U, // EE_VCMP_LT_S8
5294
60.7k
    0U, // EE_VLDBC_16
5295
60.7k
    4U, // EE_VLDBC_16_IP
5296
60.7k
    10U,  // EE_VLDBC_16_XP
5297
60.7k
    0U, // EE_VLDBC_32
5298
60.7k
    4U, // EE_VLDBC_32_IP
5299
60.7k
    10U,  // EE_VLDBC_32_XP
5300
60.7k
    0U, // EE_VLDBC_8
5301
60.7k
    4U, // EE_VLDBC_8_IP
5302
60.7k
    10U,  // EE_VLDBC_8_XP
5303
60.7k
    10U,  // EE_VLDHBC_16_INCP
5304
60.7k
    4U, // EE_VLD_128_IP
5305
60.7k
    10U,  // EE_VLD_128_XP
5306
60.7k
    4U, // EE_VLD_H_64_IP
5307
60.7k
    10U,  // EE_VLD_H_64_XP
5308
60.7k
    4U, // EE_VLD_L_64_IP
5309
60.7k
    10U,  // EE_VLD_L_64_XP
5310
60.7k
    8U, // EE_VMAX_S16
5311
60.7k
    2U, // EE_VMAX_S16_LD_INCP
5312
60.7k
    12U,  // EE_VMAX_S16_ST_INCP
5313
60.7k
    8U, // EE_VMAX_S32
5314
60.7k
    2U, // EE_VMAX_S32_LD_INCP
5315
60.7k
    12U,  // EE_VMAX_S32_ST_INCP
5316
60.7k
    8U, // EE_VMAX_S8
5317
60.7k
    2U, // EE_VMAX_S8_LD_INCP
5318
60.7k
    12U,  // EE_VMAX_S8_ST_INCP
5319
60.7k
    8U, // EE_VMIN_S16
5320
60.7k
    2U, // EE_VMIN_S16_LD_INCP
5321
60.7k
    12U,  // EE_VMIN_S16_ST_INCP
5322
60.7k
    8U, // EE_VMIN_S32
5323
60.7k
    2U, // EE_VMIN_S32_LD_INCP
5324
60.7k
    12U,  // EE_VMIN_S32_ST_INCP
5325
60.7k
    8U, // EE_VMIN_S8
5326
60.7k
    2U, // EE_VMIN_S8_LD_INCP
5327
60.7k
    12U,  // EE_VMIN_S8_ST_INCP
5328
60.7k
    0U, // EE_VMULAS_S16_ACCX
5329
60.7k
    5U, // EE_VMULAS_S16_ACCX_LD_IP
5330
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
5331
60.7k
    46722U, // EE_VMULAS_S16_ACCX_LD_XP
5332
60.7k
    18276U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
5333
60.7k
    0U, // EE_VMULAS_S16_QACC
5334
60.7k
    642U, // EE_VMULAS_S16_QACC_LDBC_INCP
5335
60.7k
    868U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
5336
60.7k
    5U, // EE_VMULAS_S16_QACC_LD_IP
5337
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP
5338
60.7k
    46722U, // EE_VMULAS_S16_QACC_LD_XP
5339
60.7k
    18276U, // EE_VMULAS_S16_QACC_LD_XP_QUP
5340
60.7k
    0U, // EE_VMULAS_S8_ACCX
5341
60.7k
    5U, // EE_VMULAS_S8_ACCX_LD_IP
5342
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
5343
60.7k
    46722U, // EE_VMULAS_S8_ACCX_LD_XP
5344
60.7k
    18276U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
5345
60.7k
    0U, // EE_VMULAS_S8_QACC
5346
60.7k
    642U, // EE_VMULAS_S8_QACC_LDBC_INCP
5347
60.7k
    868U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
5348
60.7k
    5U, // EE_VMULAS_S8_QACC_LD_IP
5349
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP
5350
60.7k
    46722U, // EE_VMULAS_S8_QACC_LD_XP
5351
60.7k
    18276U, // EE_VMULAS_S8_QACC_LD_XP_QUP
5352
60.7k
    0U, // EE_VMULAS_U16_ACCX
5353
60.7k
    5U, // EE_VMULAS_U16_ACCX_LD_IP
5354
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
5355
60.7k
    46722U, // EE_VMULAS_U16_ACCX_LD_XP
5356
60.7k
    18276U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
5357
60.7k
    0U, // EE_VMULAS_U16_QACC
5358
60.7k
    642U, // EE_VMULAS_U16_QACC_LDBC_INCP
5359
60.7k
    868U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
5360
60.7k
    5U, // EE_VMULAS_U16_QACC_LD_IP
5361
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP
5362
60.7k
    46722U, // EE_VMULAS_U16_QACC_LD_XP
5363
60.7k
    18276U, // EE_VMULAS_U16_QACC_LD_XP_QUP
5364
60.7k
    0U, // EE_VMULAS_U8_ACCX
5365
60.7k
    5U, // EE_VMULAS_U8_ACCX_LD_IP
5366
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
5367
60.7k
    46722U, // EE_VMULAS_U8_ACCX_LD_XP
5368
60.7k
    18276U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
5369
60.7k
    0U, // EE_VMULAS_U8_QACC
5370
60.7k
    642U, // EE_VMULAS_U8_QACC_LDBC_INCP
5371
60.7k
    868U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
5372
60.7k
    5U, // EE_VMULAS_U8_QACC_LD_IP
5373
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP
5374
60.7k
    46722U, // EE_VMULAS_U8_QACC_LD_XP
5375
60.7k
    18276U, // EE_VMULAS_U8_QACC_LD_XP_QUP
5376
60.7k
    8U, // EE_VMUL_S16
5377
60.7k
    2U, // EE_VMUL_S16_LD_INCP
5378
60.7k
    12U,  // EE_VMUL_S16_ST_INCP
5379
60.7k
    8U, // EE_VMUL_S8
5380
60.7k
    2U, // EE_VMUL_S8_LD_INCP
5381
60.7k
    12U,  // EE_VMUL_S8_ST_INCP
5382
60.7k
    8U, // EE_VMUL_U16
5383
60.7k
    2U, // EE_VMUL_U16_LD_INCP
5384
60.7k
    12U,  // EE_VMUL_U16_ST_INCP
5385
60.7k
    8U, // EE_VMUL_U8
5386
60.7k
    2U, // EE_VMUL_U8_LD_INCP
5387
60.7k
    12U,  // EE_VMUL_U8_ST_INCP
5388
60.7k
    0U, // EE_VPRELU_S16
5389
60.7k
    0U, // EE_VPRELU_S8
5390
60.7k
    10U,  // EE_VRELU_S16
5391
60.7k
    10U,  // EE_VRELU_S8
5392
60.7k
    0U, // EE_VSL_32
5393
60.7k
    1U, // EE_VSMULAS_S16_QACC
5394
60.7k
    20098U, // EE_VSMULAS_S16_QACC_LD_INCP
5395
60.7k
    0U, // EE_VSMULAS_S8_QACC
5396
60.7k
    22146U, // EE_VSMULAS_S8_QACC_LD_INCP
5397
60.7k
    0U, // EE_VSR_32
5398
60.7k
    4U, // EE_VST_128_IP
5399
60.7k
    10U,  // EE_VST_128_XP
5400
60.7k
    4U, // EE_VST_H_64_IP
5401
60.7k
    10U,  // EE_VST_H_64_XP
5402
60.7k
    4U, // EE_VST_L_64_IP
5403
60.7k
    10U,  // EE_VST_L_64_XP
5404
60.7k
    8U, // EE_VSUBS_S16
5405
60.7k
    2U, // EE_VSUBS_S16_LD_INCP
5406
60.7k
    12U,  // EE_VSUBS_S16_ST_INCP
5407
60.7k
    8U, // EE_VSUBS_S32
5408
60.7k
    2U, // EE_VSUBS_S32_LD_INCP
5409
60.7k
    12U,  // EE_VSUBS_S32_ST_INCP
5410
60.7k
    8U, // EE_VSUBS_S8
5411
60.7k
    2U, // EE_VSUBS_S8_LD_INCP
5412
60.7k
    12U,  // EE_VSUBS_S8_ST_INCP
5413
60.7k
    0U, // EE_VUNZIP_16
5414
60.7k
    0U, // EE_VUNZIP_32
5415
60.7k
    0U, // EE_VUNZIP_8
5416
60.7k
    0U, // EE_VZIP_16
5417
60.7k
    0U, // EE_VZIP_32
5418
60.7k
    0U, // EE_VZIP_8
5419
60.7k
    0U, // EE_WR_MASK_GPIO_OUT
5420
60.7k
    8U, // EE_XORQ
5421
60.7k
    0U, // EE_ZERO_ACCX
5422
60.7k
    0U, // EE_ZERO_Q
5423
60.7k
    0U, // EE_ZERO_QACC
5424
60.7k
    0U, // ENTRY
5425
60.7k
    0U, // ESYNC
5426
60.7k
    0U, // EXCW
5427
60.7k
    899U, // EXTUI
5428
60.7k
    0U, // EXTW
5429
60.7k
    3U, // FLOAT_S
5430
60.7k
    3U, // FLOOR_S
5431
60.7k
    0U, // GET_GPIO_IN
5432
60.7k
    0U, // ILL
5433
60.7k
    0U, // ILL_N
5434
60.7k
    0U, // ISYNC
5435
60.7k
    0U, // J
5436
60.7k
    0U, // JX
5437
60.7k
    0U, // L16SI
5438
60.7k
    0U, // L16UI
5439
60.7k
    5U, // L32E
5440
60.7k
    0U, // L32I
5441
60.7k
    0U, // L32I_N
5442
60.7k
    0U, // L32R
5443
60.7k
    0U, // L8UI
5444
60.7k
    0U, // LDDEC
5445
60.7k
    0U, // LDINC
5446
60.7k
    0U, // LEA_ADD
5447
60.7k
    0U, // LOOP
5448
60.7k
    0U, // LOOPGTZ
5449
60.7k
    0U, // LOOPNEZ
5450
60.7k
    0U, // LSI
5451
60.7k
    5U, // LSIP
5452
60.7k
    8U, // LSX
5453
60.7k
    10U,  // LSXP
5454
60.7k
    10U,  // MADDN_S
5455
60.7k
    10U,  // MADD_S
5456
60.7k
    8U, // MAX
5457
60.7k
    8U, // MAXU
5458
60.7k
    0U, // MEMW
5459
60.7k
    8U, // MIN
5460
60.7k
    8U, // MINU
5461
60.7k
    0U, // MKDADJ_S
5462
60.7k
    0U, // MKSADJ_S
5463
60.7k
    8U, // MOVEQZ
5464
60.7k
    10U,  // MOVEQZ_S
5465
60.7k
    10U,  // MOVF
5466
60.7k
    10U,  // MOVF_S
5467
60.7k
    8U, // MOVGEZ
5468
60.7k
    10U,  // MOVGEZ_S
5469
60.7k
    0U, // MOVI
5470
60.7k
    0U, // MOVI_N
5471
60.7k
    8U, // MOVLTZ
5472
60.7k
    10U,  // MOVLTZ_S
5473
60.7k
    8U, // MOVNEZ
5474
60.7k
    10U,  // MOVNEZ_S
5475
60.7k
    0U, // MOVSP
5476
60.7k
    10U,  // MOVT
5477
60.7k
    10U,  // MOVT_S
5478
60.7k
    0U, // MOV_N
5479
60.7k
    0U, // MOV_S
5480
60.7k
    10U,  // MSUB_S
5481
60.7k
    8U, // MUL16S
5482
60.7k
    8U, // MUL16U
5483
60.7k
    0U, // MULA_AA_HH
5484
60.7k
    0U, // MULA_AA_HL
5485
60.7k
    0U, // MULA_AA_LH
5486
60.7k
    0U, // MULA_AA_LL
5487
60.7k
    0U, // MULA_AD_HH
5488
60.7k
    0U, // MULA_AD_HL
5489
60.7k
    0U, // MULA_AD_LH
5490
60.7k
    0U, // MULA_AD_LL
5491
60.7k
    0U, // MULA_DA_HH
5492
60.7k
    642U, // MULA_DA_HH_LDDEC
5493
60.7k
    642U, // MULA_DA_HH_LDINC
5494
60.7k
    0U, // MULA_DA_HL
5495
60.7k
    642U, // MULA_DA_HL_LDDEC
5496
60.7k
    642U, // MULA_DA_HL_LDINC
5497
60.7k
    0U, // MULA_DA_LH
5498
60.7k
    642U, // MULA_DA_LH_LDDEC
5499
60.7k
    642U, // MULA_DA_LH_LDINC
5500
60.7k
    0U, // MULA_DA_LL
5501
60.7k
    642U, // MULA_DA_LL_LDDEC
5502
60.7k
    642U, // MULA_DA_LL_LDINC
5503
60.7k
    0U, // MULA_DD_HH
5504
60.7k
    642U, // MULA_DD_HH_LDDEC
5505
60.7k
    642U, // MULA_DD_HH_LDINC
5506
60.7k
    0U, // MULA_DD_HL
5507
60.7k
    642U, // MULA_DD_HL_LDDEC
5508
60.7k
    642U, // MULA_DD_HL_LDINC
5509
60.7k
    0U, // MULA_DD_LH
5510
60.7k
    642U, // MULA_DD_LH_LDDEC
5511
60.7k
    642U, // MULA_DD_LH_LDINC
5512
60.7k
    0U, // MULA_DD_LL
5513
60.7k
    642U, // MULA_DD_LL_LDDEC
5514
60.7k
    642U, // MULA_DD_LL_LDINC
5515
60.7k
    8U, // MULL
5516
60.7k
    8U, // MULSH
5517
60.7k
    0U, // MULS_AA_HH
5518
60.7k
    0U, // MULS_AA_HL
5519
60.7k
    0U, // MULS_AA_LH
5520
60.7k
    0U, // MULS_AA_LL
5521
60.7k
    0U, // MULS_AD_HH
5522
60.7k
    0U, // MULS_AD_HL
5523
60.7k
    0U, // MULS_AD_LH
5524
60.7k
    0U, // MULS_AD_LL
5525
60.7k
    0U, // MULS_DA_HH
5526
60.7k
    0U, // MULS_DA_HL
5527
60.7k
    0U, // MULS_DA_LH
5528
60.7k
    0U, // MULS_DA_LL
5529
60.7k
    0U, // MULS_DD_HH
5530
60.7k
    0U, // MULS_DD_HL
5531
60.7k
    0U, // MULS_DD_LH
5532
60.7k
    0U, // MULS_DD_LL
5533
60.7k
    8U, // MULUH
5534
60.7k
    0U, // MUL_AA_HH
5535
60.7k
    0U, // MUL_AA_HL
5536
60.7k
    0U, // MUL_AA_LH
5537
60.7k
    0U, // MUL_AA_LL
5538
60.7k
    0U, // MUL_AD_HH
5539
60.7k
    0U, // MUL_AD_HL
5540
60.7k
    0U, // MUL_AD_LH
5541
60.7k
    0U, // MUL_AD_LL
5542
60.7k
    0U, // MUL_DA_HH
5543
60.7k
    0U, // MUL_DA_HL
5544
60.7k
    0U, // MUL_DA_LH
5545
60.7k
    0U, // MUL_DA_LL
5546
60.7k
    0U, // MUL_DD_HH
5547
60.7k
    0U, // MUL_DD_HL
5548
60.7k
    0U, // MUL_DD_LH
5549
60.7k
    0U, // MUL_DD_LL
5550
60.7k
    8U, // MUL_S
5551
60.7k
    0U, // NEG
5552
60.7k
    0U, // NEG_S
5553
60.7k
    0U, // NEXP01_S
5554
60.7k
    0U, // NOP
5555
60.7k
    0U, // NSA
5556
60.7k
    0U, // NSAU
5557
60.7k
    8U, // OEQ_S
5558
60.7k
    8U, // OLE_S
5559
60.7k
    8U, // OLT_S
5560
60.7k
    8U, // OR
5561
60.7k
    8U, // ORB
5562
60.7k
    8U, // ORBC
5563
60.7k
    8U, // QUOS
5564
60.7k
    8U, // QUOU
5565
60.7k
    0U, // RECIP0_S
5566
60.7k
    8U, // REMS
5567
60.7k
    8U, // REMU
5568
60.7k
    0U, // RER
5569
60.7k
    0U, // RET
5570
60.7k
    0U, // RETW
5571
60.7k
    0U, // RETW_N
5572
60.7k
    0U, // RET_N
5573
60.7k
    0U, // RFDE
5574
60.7k
    0U, // RFE
5575
60.7k
    0U, // RFI
5576
60.7k
    0U, // RFR
5577
60.7k
    0U, // RFWO
5578
60.7k
    0U, // RFWU
5579
60.7k
    0U, // ROTW
5580
60.7k
    3U, // ROUND_S
5581
60.7k
    0U, // RSIL
5582
60.7k
    0U, // RSQRT0_S
5583
60.7k
    0U, // RSR
5584
60.7k
    0U, // RSYNC
5585
60.7k
    0U, // RUR
5586
60.7k
    0U, // RUR_ACCX_0
5587
60.7k
    0U, // RUR_ACCX_1
5588
60.7k
    0U, // RUR_AE_BITHEAD
5589
60.7k
    0U, // RUR_AE_BITPTR
5590
60.7k
    0U, // RUR_AE_BITSUSED
5591
60.7k
    0U, // RUR_AE_CBEGIN0
5592
60.7k
    0U, // RUR_AE_CEND0
5593
60.7k
    0U, // RUR_AE_CWRAP
5594
60.7k
    0U, // RUR_AE_CW_SD_NO
5595
60.7k
    0U, // RUR_AE_FIRST_TS
5596
60.7k
    0U, // RUR_AE_NEXTOFFSET
5597
60.7k
    0U, // RUR_AE_OVERFLOW
5598
60.7k
    0U, // RUR_AE_OVF_SAR
5599
60.7k
    0U, // RUR_AE_SAR
5600
60.7k
    0U, // RUR_AE_SEARCHDONE
5601
60.7k
    0U, // RUR_AE_TABLESIZE
5602
60.7k
    0U, // RUR_AE_TS_FTS_BU_BP
5603
60.7k
    0U, // RUR_FFT_BIT_WIDTH
5604
60.7k
    0U, // RUR_GPIO_OUT
5605
60.7k
    0U, // RUR_QACC_H_0
5606
60.7k
    0U, // RUR_QACC_H_1
5607
60.7k
    0U, // RUR_QACC_H_2
5608
60.7k
    0U, // RUR_QACC_H_3
5609
60.7k
    0U, // RUR_QACC_H_4
5610
60.7k
    0U, // RUR_QACC_L_0
5611
60.7k
    0U, // RUR_QACC_L_1
5612
60.7k
    0U, // RUR_QACC_L_2
5613
60.7k
    0U, // RUR_QACC_L_3
5614
60.7k
    0U, // RUR_QACC_L_4
5615
60.7k
    0U, // RUR_SAR_BYTE
5616
60.7k
    0U, // RUR_UA_STATE_0
5617
60.7k
    0U, // RUR_UA_STATE_1
5618
60.7k
    0U, // RUR_UA_STATE_2
5619
60.7k
    0U, // RUR_UA_STATE_3
5620
60.7k
    0U, // S16I
5621
60.7k
    0U, // S32C1I
5622
60.7k
    5U, // S32E
5623
60.7k
    0U, // S32I
5624
60.7k
    0U, // S32I_N
5625
60.7k
    0U, // S8I
5626
60.7k
    0U, // SET_BIT_GPIO_OUT
5627
60.7k
    3U, // SEXT
5628
60.7k
    0U, // SIMCALL
5629
60.7k
    0U, // SLL
5630
60.7k
    5U, // SLLI
5631
60.7k
    0U, // SQRT0_S
5632
60.7k
    0U, // SRA
5633
60.7k
    11U,  // SRAI
5634
60.7k
    8U, // SRC
5635
60.7k
    0U, // SRL
5636
60.7k
    11U,  // SRLI
5637
60.7k
    0U, // SSA8L
5638
60.7k
    0U, // SSAI
5639
60.7k
    0U, // SSI
5640
60.7k
    5U, // SSIP
5641
60.7k
    0U, // SSL
5642
60.7k
    0U, // SSR
5643
60.7k
    8U, // SSX
5644
60.7k
    10U,  // SSXP
5645
60.7k
    8U, // SUB
5646
60.7k
    8U, // SUBX2
5647
60.7k
    8U, // SUBX4
5648
60.7k
    8U, // SUBX8
5649
60.7k
    8U, // SUB_S
5650
60.7k
    0U, // SYSCALL
5651
60.7k
    3U, // TRUNC_S
5652
60.7k
    8U, // UEQ_S
5653
60.7k
    3U, // UFLOAT_S
5654
60.7k
    8U, // ULE_S
5655
60.7k
    8U, // ULT_S
5656
60.7k
    0U, // UMUL_AA_HH
5657
60.7k
    0U, // UMUL_AA_HL
5658
60.7k
    0U, // UMUL_AA_LH
5659
60.7k
    0U, // UMUL_AA_LL
5660
60.7k
    8U, // UN_S
5661
60.7k
    3U, // UTRUNC_S
5662
60.7k
    0U, // WAITI
5663
60.7k
    0U, // WDTLB
5664
60.7k
    0U, // WER
5665
60.7k
    0U, // WFR
5666
60.7k
    0U, // WITLB
5667
60.7k
    0U, // WR_MASK_GPIO_OUT
5668
60.7k
    0U, // WSR
5669
60.7k
    0U, // WUR
5670
60.7k
    0U, // WUR_ACCX_0
5671
60.7k
    0U, // WUR_ACCX_1
5672
60.7k
    0U, // WUR_AE_BITHEAD
5673
60.7k
    0U, // WUR_AE_BITPTR
5674
60.7k
    0U, // WUR_AE_BITSUSED
5675
60.7k
    0U, // WUR_AE_CBEGIN0
5676
60.7k
    0U, // WUR_AE_CEND0
5677
60.7k
    0U, // WUR_AE_CWRAP
5678
60.7k
    0U, // WUR_AE_CW_SD_NO
5679
60.7k
    0U, // WUR_AE_FIRST_TS
5680
60.7k
    0U, // WUR_AE_NEXTOFFSET
5681
60.7k
    0U, // WUR_AE_OVERFLOW
5682
60.7k
    0U, // WUR_AE_OVF_SAR
5683
60.7k
    0U, // WUR_AE_SAR
5684
60.7k
    0U, // WUR_AE_SEARCHDONE
5685
60.7k
    0U, // WUR_AE_TABLESIZE
5686
60.7k
    0U, // WUR_AE_TS_FTS_BU_BP
5687
60.7k
    0U, // WUR_FCR
5688
60.7k
    0U, // WUR_FFT_BIT_WIDTH
5689
60.7k
    0U, // WUR_FSR
5690
60.7k
    0U, // WUR_GPIO_OUT
5691
60.7k
    0U, // WUR_QACC_H_0
5692
60.7k
    0U, // WUR_QACC_H_1
5693
60.7k
    0U, // WUR_QACC_H_2
5694
60.7k
    0U, // WUR_QACC_H_3
5695
60.7k
    0U, // WUR_QACC_H_4
5696
60.7k
    0U, // WUR_QACC_L_0
5697
60.7k
    0U, // WUR_QACC_L_1
5698
60.7k
    0U, // WUR_QACC_L_2
5699
60.7k
    0U, // WUR_QACC_L_3
5700
60.7k
    0U, // WUR_QACC_L_4
5701
60.7k
    0U, // WUR_SAR_BYTE
5702
60.7k
    0U, // WUR_UA_STATE_0
5703
60.7k
    0U, // WUR_UA_STATE_1
5704
60.7k
    0U, // WUR_UA_STATE_2
5705
60.7k
    0U, // WUR_UA_STATE_3
5706
60.7k
    8U, // XOR
5707
60.7k
    8U, // XORB
5708
60.7k
    0U, // XSR
5709
60.7k
    0U, // _L32I
5710
60.7k
    0U, // _L32I_N
5711
60.7k
    0U, // _MOVI
5712
60.7k
    0U, // _S32I
5713
60.7k
    0U, // _S32I_N
5714
60.7k
    5U, // _SLLI
5715
60.7k
    3U, // _SRLI
5716
60.7k
    0U, // mv_QR
5717
60.7k
  };
5718
5719
60.7k
  static const uint8_t OpInfo2[] = {
5720
60.7k
    0U, // PHI
5721
60.7k
    0U, // INLINEASM
5722
60.7k
    0U, // INLINEASM_BR
5723
60.7k
    0U, // CFI_INSTRUCTION
5724
60.7k
    0U, // EH_LABEL
5725
60.7k
    0U, // GC_LABEL
5726
60.7k
    0U, // ANNOTATION_LABEL
5727
60.7k
    0U, // KILL
5728
60.7k
    0U, // EXTRACT_SUBREG
5729
60.7k
    0U, // INSERT_SUBREG
5730
60.7k
    0U, // IMPLICIT_DEF
5731
60.7k
    0U, // SUBREG_TO_REG
5732
60.7k
    0U, // COPY_TO_REGCLASS
5733
60.7k
    0U, // DBG_VALUE
5734
60.7k
    0U, // DBG_VALUE_LIST
5735
60.7k
    0U, // DBG_INSTR_REF
5736
60.7k
    0U, // DBG_PHI
5737
60.7k
    0U, // DBG_LABEL
5738
60.7k
    0U, // REG_SEQUENCE
5739
60.7k
    0U, // COPY
5740
60.7k
    0U, // BUNDLE
5741
60.7k
    0U, // LIFETIME_START
5742
60.7k
    0U, // LIFETIME_END
5743
60.7k
    0U, // PSEUDO_PROBE
5744
60.7k
    0U, // ARITH_FENCE
5745
60.7k
    0U, // STACKMAP
5746
60.7k
    0U, // FENTRY_CALL
5747
60.7k
    0U, // PATCHPOINT
5748
60.7k
    0U, // LOAD_STACK_GUARD
5749
60.7k
    0U, // PREALLOCATED_SETUP
5750
60.7k
    0U, // PREALLOCATED_ARG
5751
60.7k
    0U, // STATEPOINT
5752
60.7k
    0U, // LOCAL_ESCAPE
5753
60.7k
    0U, // FAULTING_OP
5754
60.7k
    0U, // PATCHABLE_OP
5755
60.7k
    0U, // PATCHABLE_FUNCTION_ENTER
5756
60.7k
    0U, // PATCHABLE_RET
5757
60.7k
    0U, // PATCHABLE_FUNCTION_EXIT
5758
60.7k
    0U, // PATCHABLE_TAIL_CALL
5759
60.7k
    0U, // PATCHABLE_EVENT_CALL
5760
60.7k
    0U, // PATCHABLE_TYPED_EVENT_CALL
5761
60.7k
    0U, // ICALL_BRANCH_FUNNEL
5762
60.7k
    0U, // MEMBARRIER
5763
60.7k
    0U, // JUMP_TABLE_DEBUG_INFO
5764
60.7k
    0U, // G_ASSERT_SEXT
5765
60.7k
    0U, // G_ASSERT_ZEXT
5766
60.7k
    0U, // G_ASSERT_ALIGN
5767
60.7k
    0U, // G_ADD
5768
60.7k
    0U, // G_SUB
5769
60.7k
    0U, // G_MUL
5770
60.7k
    0U, // G_SDIV
5771
60.7k
    0U, // G_UDIV
5772
60.7k
    0U, // G_SREM
5773
60.7k
    0U, // G_UREM
5774
60.7k
    0U, // G_SDIVREM
5775
60.7k
    0U, // G_UDIVREM
5776
60.7k
    0U, // G_AND
5777
60.7k
    0U, // G_OR
5778
60.7k
    0U, // G_XOR
5779
60.7k
    0U, // G_IMPLICIT_DEF
5780
60.7k
    0U, // G_PHI
5781
60.7k
    0U, // G_FRAME_INDEX
5782
60.7k
    0U, // G_GLOBAL_VALUE
5783
60.7k
    0U, // G_CONSTANT_POOL
5784
60.7k
    0U, // G_EXTRACT
5785
60.7k
    0U, // G_UNMERGE_VALUES
5786
60.7k
    0U, // G_INSERT
5787
60.7k
    0U, // G_MERGE_VALUES
5788
60.7k
    0U, // G_BUILD_VECTOR
5789
60.7k
    0U, // G_BUILD_VECTOR_TRUNC
5790
60.7k
    0U, // G_CONCAT_VECTORS
5791
60.7k
    0U, // G_PTRTOINT
5792
60.7k
    0U, // G_INTTOPTR
5793
60.7k
    0U, // G_BITCAST
5794
60.7k
    0U, // G_FREEZE
5795
60.7k
    0U, // G_CONSTANT_FOLD_BARRIER
5796
60.7k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
5797
60.7k
    0U, // G_INTRINSIC_TRUNC
5798
60.7k
    0U, // G_INTRINSIC_ROUND
5799
60.7k
    0U, // G_INTRINSIC_LRINT
5800
60.7k
    0U, // G_INTRINSIC_ROUNDEVEN
5801
60.7k
    0U, // G_READCYCLECOUNTER
5802
60.7k
    0U, // G_LOAD
5803
60.7k
    0U, // G_SEXTLOAD
5804
60.7k
    0U, // G_ZEXTLOAD
5805
60.7k
    0U, // G_INDEXED_LOAD
5806
60.7k
    0U, // G_INDEXED_SEXTLOAD
5807
60.7k
    0U, // G_INDEXED_ZEXTLOAD
5808
60.7k
    0U, // G_STORE
5809
60.7k
    0U, // G_INDEXED_STORE
5810
60.7k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
5811
60.7k
    0U, // G_ATOMIC_CMPXCHG
5812
60.7k
    0U, // G_ATOMICRMW_XCHG
5813
60.7k
    0U, // G_ATOMICRMW_ADD
5814
60.7k
    0U, // G_ATOMICRMW_SUB
5815
60.7k
    0U, // G_ATOMICRMW_AND
5816
60.7k
    0U, // G_ATOMICRMW_NAND
5817
60.7k
    0U, // G_ATOMICRMW_OR
5818
60.7k
    0U, // G_ATOMICRMW_XOR
5819
60.7k
    0U, // G_ATOMICRMW_MAX
5820
60.7k
    0U, // G_ATOMICRMW_MIN
5821
60.7k
    0U, // G_ATOMICRMW_UMAX
5822
60.7k
    0U, // G_ATOMICRMW_UMIN
5823
60.7k
    0U, // G_ATOMICRMW_FADD
5824
60.7k
    0U, // G_ATOMICRMW_FSUB
5825
60.7k
    0U, // G_ATOMICRMW_FMAX
5826
60.7k
    0U, // G_ATOMICRMW_FMIN
5827
60.7k
    0U, // G_ATOMICRMW_UINC_WRAP
5828
60.7k
    0U, // G_ATOMICRMW_UDEC_WRAP
5829
60.7k
    0U, // G_FENCE
5830
60.7k
    0U, // G_PREFETCH
5831
60.7k
    0U, // G_BRCOND
5832
60.7k
    0U, // G_BRINDIRECT
5833
60.7k
    0U, // G_INVOKE_REGION_START
5834
60.7k
    0U, // G_INTRINSIC
5835
60.7k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
5836
60.7k
    0U, // G_INTRINSIC_CONVERGENT
5837
60.7k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
5838
60.7k
    0U, // G_ANYEXT
5839
60.7k
    0U, // G_TRUNC
5840
60.7k
    0U, // G_CONSTANT
5841
60.7k
    0U, // G_FCONSTANT
5842
60.7k
    0U, // G_VASTART
5843
60.7k
    0U, // G_VAARG
5844
60.7k
    0U, // G_SEXT
5845
60.7k
    0U, // G_SEXT_INREG
5846
60.7k
    0U, // G_ZEXT
5847
60.7k
    0U, // G_SHL
5848
60.7k
    0U, // G_LSHR
5849
60.7k
    0U, // G_ASHR
5850
60.7k
    0U, // G_FSHL
5851
60.7k
    0U, // G_FSHR
5852
60.7k
    0U, // G_ROTR
5853
60.7k
    0U, // G_ROTL
5854
60.7k
    0U, // G_ICMP
5855
60.7k
    0U, // G_FCMP
5856
60.7k
    0U, // G_SELECT
5857
60.7k
    0U, // G_UADDO
5858
60.7k
    0U, // G_UADDE
5859
60.7k
    0U, // G_USUBO
5860
60.7k
    0U, // G_USUBE
5861
60.7k
    0U, // G_SADDO
5862
60.7k
    0U, // G_SADDE
5863
60.7k
    0U, // G_SSUBO
5864
60.7k
    0U, // G_SSUBE
5865
60.7k
    0U, // G_UMULO
5866
60.7k
    0U, // G_SMULO
5867
60.7k
    0U, // G_UMULH
5868
60.7k
    0U, // G_SMULH
5869
60.7k
    0U, // G_UADDSAT
5870
60.7k
    0U, // G_SADDSAT
5871
60.7k
    0U, // G_USUBSAT
5872
60.7k
    0U, // G_SSUBSAT
5873
60.7k
    0U, // G_USHLSAT
5874
60.7k
    0U, // G_SSHLSAT
5875
60.7k
    0U, // G_SMULFIX
5876
60.7k
    0U, // G_UMULFIX
5877
60.7k
    0U, // G_SMULFIXSAT
5878
60.7k
    0U, // G_UMULFIXSAT
5879
60.7k
    0U, // G_SDIVFIX
5880
60.7k
    0U, // G_UDIVFIX
5881
60.7k
    0U, // G_SDIVFIXSAT
5882
60.7k
    0U, // G_UDIVFIXSAT
5883
60.7k
    0U, // G_FADD
5884
60.7k
    0U, // G_FSUB
5885
60.7k
    0U, // G_FMUL
5886
60.7k
    0U, // G_FMA
5887
60.7k
    0U, // G_FMAD
5888
60.7k
    0U, // G_FDIV
5889
60.7k
    0U, // G_FREM
5890
60.7k
    0U, // G_FPOW
5891
60.7k
    0U, // G_FPOWI
5892
60.7k
    0U, // G_FEXP
5893
60.7k
    0U, // G_FEXP2
5894
60.7k
    0U, // G_FEXP10
5895
60.7k
    0U, // G_FLOG
5896
60.7k
    0U, // G_FLOG2
5897
60.7k
    0U, // G_FLOG10
5898
60.7k
    0U, // G_FLDEXP
5899
60.7k
    0U, // G_FFREXP
5900
60.7k
    0U, // G_FNEG
5901
60.7k
    0U, // G_FPEXT
5902
60.7k
    0U, // G_FPTRUNC
5903
60.7k
    0U, // G_FPTOSI
5904
60.7k
    0U, // G_FPTOUI
5905
60.7k
    0U, // G_SITOFP
5906
60.7k
    0U, // G_UITOFP
5907
60.7k
    0U, // G_FABS
5908
60.7k
    0U, // G_FCOPYSIGN
5909
60.7k
    0U, // G_IS_FPCLASS
5910
60.7k
    0U, // G_FCANONICALIZE
5911
60.7k
    0U, // G_FMINNUM
5912
60.7k
    0U, // G_FMAXNUM
5913
60.7k
    0U, // G_FMINNUM_IEEE
5914
60.7k
    0U, // G_FMAXNUM_IEEE
5915
60.7k
    0U, // G_FMINIMUM
5916
60.7k
    0U, // G_FMAXIMUM
5917
60.7k
    0U, // G_GET_FPENV
5918
60.7k
    0U, // G_SET_FPENV
5919
60.7k
    0U, // G_RESET_FPENV
5920
60.7k
    0U, // G_GET_FPMODE
5921
60.7k
    0U, // G_SET_FPMODE
5922
60.7k
    0U, // G_RESET_FPMODE
5923
60.7k
    0U, // G_PTR_ADD
5924
60.7k
    0U, // G_PTRMASK
5925
60.7k
    0U, // G_SMIN
5926
60.7k
    0U, // G_SMAX
5927
60.7k
    0U, // G_UMIN
5928
60.7k
    0U, // G_UMAX
5929
60.7k
    0U, // G_ABS
5930
60.7k
    0U, // G_LROUND
5931
60.7k
    0U, // G_LLROUND
5932
60.7k
    0U, // G_BR
5933
60.7k
    0U, // G_BRJT
5934
60.7k
    0U, // G_INSERT_VECTOR_ELT
5935
60.7k
    0U, // G_EXTRACT_VECTOR_ELT
5936
60.7k
    0U, // G_SHUFFLE_VECTOR
5937
60.7k
    0U, // G_CTTZ
5938
60.7k
    0U, // G_CTTZ_ZERO_UNDEF
5939
60.7k
    0U, // G_CTLZ
5940
60.7k
    0U, // G_CTLZ_ZERO_UNDEF
5941
60.7k
    0U, // G_CTPOP
5942
60.7k
    0U, // G_BSWAP
5943
60.7k
    0U, // G_BITREVERSE
5944
60.7k
    0U, // G_FCEIL
5945
60.7k
    0U, // G_FCOS
5946
60.7k
    0U, // G_FSIN
5947
60.7k
    0U, // G_FSQRT
5948
60.7k
    0U, // G_FFLOOR
5949
60.7k
    0U, // G_FRINT
5950
60.7k
    0U, // G_FNEARBYINT
5951
60.7k
    0U, // G_ADDRSPACE_CAST
5952
60.7k
    0U, // G_BLOCK_ADDR
5953
60.7k
    0U, // G_JUMP_TABLE
5954
60.7k
    0U, // G_DYN_STACKALLOC
5955
60.7k
    0U, // G_STACKSAVE
5956
60.7k
    0U, // G_STACKRESTORE
5957
60.7k
    0U, // G_STRICT_FADD
5958
60.7k
    0U, // G_STRICT_FSUB
5959
60.7k
    0U, // G_STRICT_FMUL
5960
60.7k
    0U, // G_STRICT_FDIV
5961
60.7k
    0U, // G_STRICT_FREM
5962
60.7k
    0U, // G_STRICT_FMA
5963
60.7k
    0U, // G_STRICT_FSQRT
5964
60.7k
    0U, // G_STRICT_FLDEXP
5965
60.7k
    0U, // G_READ_REGISTER
5966
60.7k
    0U, // G_WRITE_REGISTER
5967
60.7k
    0U, // G_MEMCPY
5968
60.7k
    0U, // G_MEMCPY_INLINE
5969
60.7k
    0U, // G_MEMMOVE
5970
60.7k
    0U, // G_MEMSET
5971
60.7k
    0U, // G_BZERO
5972
60.7k
    0U, // G_VECREDUCE_SEQ_FADD
5973
60.7k
    0U, // G_VECREDUCE_SEQ_FMUL
5974
60.7k
    0U, // G_VECREDUCE_FADD
5975
60.7k
    0U, // G_VECREDUCE_FMUL
5976
60.7k
    0U, // G_VECREDUCE_FMAX
5977
60.7k
    0U, // G_VECREDUCE_FMIN
5978
60.7k
    0U, // G_VECREDUCE_FMAXIMUM
5979
60.7k
    0U, // G_VECREDUCE_FMINIMUM
5980
60.7k
    0U, // G_VECREDUCE_ADD
5981
60.7k
    0U, // G_VECREDUCE_MUL
5982
60.7k
    0U, // G_VECREDUCE_AND
5983
60.7k
    0U, // G_VECREDUCE_OR
5984
60.7k
    0U, // G_VECREDUCE_XOR
5985
60.7k
    0U, // G_VECREDUCE_SMAX
5986
60.7k
    0U, // G_VECREDUCE_SMIN
5987
60.7k
    0U, // G_VECREDUCE_UMAX
5988
60.7k
    0U, // G_VECREDUCE_UMIN
5989
60.7k
    0U, // G_SBFX
5990
60.7k
    0U, // G_UBFX
5991
60.7k
    0U, // ADJCALLSTACKDOWN
5992
60.7k
    0U, // ADJCALLSTACKUP
5993
60.7k
    0U, // ATOMIC_CMP_SWAP_16_P
5994
60.7k
    0U, // ATOMIC_CMP_SWAP_32_P
5995
60.7k
    0U, // ATOMIC_CMP_SWAP_8_P
5996
60.7k
    0U, // ATOMIC_LOAD_ADD_16_P
5997
60.7k
    0U, // ATOMIC_LOAD_ADD_32_P
5998
60.7k
    0U, // ATOMIC_LOAD_ADD_8_P
5999
60.7k
    0U, // ATOMIC_LOAD_AND_16_P
6000
60.7k
    0U, // ATOMIC_LOAD_AND_32_P
6001
60.7k
    0U, // ATOMIC_LOAD_AND_8_P
6002
60.7k
    0U, // ATOMIC_LOAD_MAX_16_P
6003
60.7k
    0U, // ATOMIC_LOAD_MAX_32_P
6004
60.7k
    0U, // ATOMIC_LOAD_MAX_8_P
6005
60.7k
    0U, // ATOMIC_LOAD_MIN_16_P
6006
60.7k
    0U, // ATOMIC_LOAD_MIN_32_P
6007
60.7k
    0U, // ATOMIC_LOAD_MIN_8_P
6008
60.7k
    0U, // ATOMIC_LOAD_NAND_16_P
6009
60.7k
    0U, // ATOMIC_LOAD_NAND_32_P
6010
60.7k
    0U, // ATOMIC_LOAD_NAND_8_P
6011
60.7k
    0U, // ATOMIC_LOAD_OR_16_P
6012
60.7k
    0U, // ATOMIC_LOAD_OR_32_P
6013
60.7k
    0U, // ATOMIC_LOAD_OR_8_P
6014
60.7k
    0U, // ATOMIC_LOAD_SUB_16_P
6015
60.7k
    0U, // ATOMIC_LOAD_SUB_32_P
6016
60.7k
    0U, // ATOMIC_LOAD_SUB_8_P
6017
60.7k
    0U, // ATOMIC_LOAD_UMAX_16_P
6018
60.7k
    0U, // ATOMIC_LOAD_UMAX_32_P
6019
60.7k
    0U, // ATOMIC_LOAD_UMAX_8_P
6020
60.7k
    0U, // ATOMIC_LOAD_UMIN_16_P
6021
60.7k
    0U, // ATOMIC_LOAD_UMIN_32_P
6022
60.7k
    0U, // ATOMIC_LOAD_UMIN_8_P
6023
60.7k
    0U, // ATOMIC_LOAD_XOR_16_P
6024
60.7k
    0U, // ATOMIC_LOAD_XOR_32_P
6025
60.7k
    0U, // ATOMIC_LOAD_XOR_8_P
6026
60.7k
    0U, // ATOMIC_SWAP_16_P
6027
60.7k
    0U, // ATOMIC_SWAP_32_P
6028
60.7k
    0U, // ATOMIC_SWAP_8_P
6029
60.7k
    0U, // BRCC_FP
6030
60.7k
    0U, // BR_JT
6031
60.7k
    0U, // CONSTPOOL_ENTRY
6032
60.7k
    0U, // EE_ANDQ_P
6033
60.7k
    0U, // EE_BITREV_P
6034
60.7k
    0U, // EE_CMUL_S16_LD_INCP_P
6035
60.7k
    0U, // EE_CMUL_S16_P
6036
60.7k
    0U, // EE_CMUL_S16_ST_INCP_P
6037
60.7k
    1U, // EE_FFT_AMS_S16_LD_INCP_P
6038
60.7k
    1U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P
6039
60.7k
    1U, // EE_FFT_AMS_S16_LD_R32_DECP_P
6040
60.7k
    1U, // EE_FFT_AMS_S16_ST_INCP_P
6041
60.7k
    17U,  // EE_FFT_CMUL_S16_LD_XP_P
6042
60.7k
    2U, // EE_FFT_CMUL_S16_ST_XP_P
6043
60.7k
    0U, // EE_FFT_R2BF_S16_P
6044
60.7k
    0U, // EE_FFT_R2BF_S16_ST_INCP_P
6045
60.7k
    0U, // EE_FFT_VST_R32_DECP_P
6046
60.7k
    3U, // EE_LDF_128_IP_P
6047
60.7k
    4U, // EE_LDF_128_XP_P
6048
60.7k
    0U, // EE_LDF_64_IP_P
6049
60.7k
    0U, // EE_LDF_64_XP_P
6050
60.7k
    0U, // EE_LDQA_S16_128_IP_P
6051
60.7k
    0U, // EE_LDQA_S16_128_XP_P
6052
60.7k
    0U, // EE_LDQA_S8_128_IP_P
6053
60.7k
    0U, // EE_LDQA_S8_128_XP_P
6054
60.7k
    0U, // EE_LDQA_U16_128_IP_P
6055
60.7k
    0U, // EE_LDQA_U16_128_XP_P
6056
60.7k
    0U, // EE_LDQA_U8_128_IP_P
6057
60.7k
    0U, // EE_LDQA_U8_128_XP_P
6058
60.7k
    0U, // EE_LDXQ_32_P
6059
60.7k
    0U, // EE_LD_128_USAR_IP_P
6060
60.7k
    0U, // EE_LD_128_USAR_XP_P
6061
60.7k
    0U, // EE_LD_ACCX_IP_P
6062
60.7k
    0U, // EE_LD_QACC_H_H_32_IP_P
6063
60.7k
    0U, // EE_LD_QACC_H_L_128_IP_P
6064
60.7k
    0U, // EE_LD_QACC_L_H_32_IP_P
6065
60.7k
    0U, // EE_LD_QACC_L_L_128_IP_P
6066
60.7k
    0U, // EE_LD_UA_STATE_IP_P
6067
60.7k
    0U, // EE_MOVI_32_A_P
6068
60.7k
    0U, // EE_MOVI_32_Q_P
6069
60.7k
    0U, // EE_MOV_S16_QACC_P
6070
60.7k
    0U, // EE_MOV_S8_QACC_P
6071
60.7k
    0U, // EE_MOV_U16_QACC_P
6072
60.7k
    0U, // EE_MOV_U8_QACC_P
6073
60.7k
    0U, // EE_NOTQ_P
6074
60.7k
    0U, // EE_ORQ_P
6075
60.7k
    0U, // EE_SLCI_2Q_P
6076
60.7k
    0U, // EE_SLCXXP_2Q_P
6077
60.7k
    0U, // EE_SRCI_2Q_P
6078
60.7k
    0U, // EE_SRCMB_S16_QACC_P
6079
60.7k
    0U, // EE_SRCMB_S8_QACC_P
6080
60.7k
    0U, // EE_SRCQ_128_ST_INCP_P
6081
60.7k
    0U, // EE_SRCXXP_2Q_P
6082
60.7k
    0U, // EE_SRC_Q_LD_IP_P
6083
60.7k
    0U, // EE_SRC_Q_LD_XP_P
6084
60.7k
    0U, // EE_SRC_Q_P
6085
60.7k
    0U, // EE_SRC_Q_QUP_P
6086
60.7k
    0U, // EE_SRS_ACCX_P
6087
60.7k
    3U, // EE_STF_128_IP_P
6088
60.7k
    4U, // EE_STF_128_XP_P
6089
60.7k
    0U, // EE_STF_64_IP_P
6090
60.7k
    0U, // EE_STF_64_XP_P
6091
60.7k
    0U, // EE_STXQ_32_P
6092
60.7k
    0U, // EE_ST_ACCX_IP_P
6093
60.7k
    0U, // EE_ST_QACC_H_H_32_IP_P
6094
60.7k
    0U, // EE_ST_QACC_H_L_128_IP_P
6095
60.7k
    0U, // EE_ST_QACC_L_H_32_IP_P
6096
60.7k
    0U, // EE_ST_QACC_L_L_128_IP_P
6097
60.7k
    0U, // EE_ST_UA_STATE_IP_P
6098
60.7k
    0U, // EE_VADDS_S16_LD_INCP_P
6099
60.7k
    0U, // EE_VADDS_S16_P
6100
60.7k
    0U, // EE_VADDS_S16_ST_INCP_P
6101
60.7k
    0U, // EE_VADDS_S32_LD_INCP_P
6102
60.7k
    0U, // EE_VADDS_S32_P
6103
60.7k
    0U, // EE_VADDS_S32_ST_INCP_P
6104
60.7k
    0U, // EE_VADDS_S8_LD_INCP_P
6105
60.7k
    0U, // EE_VADDS_S8_P
6106
60.7k
    0U, // EE_VADDS_S8_ST_INCP_P
6107
60.7k
    0U, // EE_VCMP_EQ_S16_P
6108
60.7k
    0U, // EE_VCMP_EQ_S32_P
6109
60.7k
    0U, // EE_VCMP_EQ_S8_P
6110
60.7k
    0U, // EE_VCMP_GT_S16_P
6111
60.7k
    0U, // EE_VCMP_GT_S32_P
6112
60.7k
    0U, // EE_VCMP_GT_S8_P
6113
60.7k
    0U, // EE_VCMP_LT_S16_P
6114
60.7k
    0U, // EE_VCMP_LT_S32_P
6115
60.7k
    0U, // EE_VCMP_LT_S8_P
6116
60.7k
    0U, // EE_VLDBC_16_IP_P
6117
60.7k
    0U, // EE_VLDBC_16_P
6118
60.7k
    0U, // EE_VLDBC_16_XP_P
6119
60.7k
    0U, // EE_VLDBC_32_IP_P
6120
60.7k
    0U, // EE_VLDBC_32_P
6121
60.7k
    0U, // EE_VLDBC_32_XP_P
6122
60.7k
    0U, // EE_VLDBC_8_IP_P
6123
60.7k
    0U, // EE_VLDBC_8_P
6124
60.7k
    0U, // EE_VLDBC_8_XP_P
6125
60.7k
    0U, // EE_VLDHBC_16_INCP_P
6126
60.7k
    0U, // EE_VLD_128_IP_P
6127
60.7k
    0U, // EE_VLD_128_XP_P
6128
60.7k
    0U, // EE_VLD_H_64_IP_P
6129
60.7k
    0U, // EE_VLD_H_64_XP_P
6130
60.7k
    0U, // EE_VLD_L_64_IP_P
6131
60.7k
    0U, // EE_VLD_L_64_XP_P
6132
60.7k
    0U, // EE_VMAX_S16_LD_INCP_P
6133
60.7k
    0U, // EE_VMAX_S16_P
6134
60.7k
    0U, // EE_VMAX_S16_ST_INCP_P
6135
60.7k
    0U, // EE_VMAX_S32_LD_INCP_P
6136
60.7k
    0U, // EE_VMAX_S32_P
6137
60.7k
    0U, // EE_VMAX_S32_ST_INCP_P
6138
60.7k
    0U, // EE_VMAX_S8_LD_INCP_P
6139
60.7k
    0U, // EE_VMAX_S8_P
6140
60.7k
    0U, // EE_VMAX_S8_ST_INCP_P
6141
60.7k
    0U, // EE_VMIN_S16_LD_INCP_P
6142
60.7k
    0U, // EE_VMIN_S16_P
6143
60.7k
    0U, // EE_VMIN_S16_ST_INCP_P
6144
60.7k
    0U, // EE_VMIN_S32_LD_INCP_P
6145
60.7k
    0U, // EE_VMIN_S32_P
6146
60.7k
    0U, // EE_VMIN_S32_ST_INCP_P
6147
60.7k
    0U, // EE_VMIN_S8_LD_INCP_P
6148
60.7k
    0U, // EE_VMIN_S8_P
6149
60.7k
    0U, // EE_VMIN_S8_ST_INCP_P
6150
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_P
6151
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
6152
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_XP_P
6153
60.7k
    65U,  // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
6154
60.7k
    0U, // EE_VMULAS_S16_ACCX_P
6155
60.7k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
6156
60.7k
    9U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
6157
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_IP_P
6158
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P
6159
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_XP_P
6160
60.7k
    65U,  // EE_VMULAS_S16_QACC_LD_XP_QUP_P
6161
60.7k
    0U, // EE_VMULAS_S16_QACC_P
6162
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_P
6163
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
6164
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_XP_P
6165
60.7k
    65U,  // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
6166
60.7k
    0U, // EE_VMULAS_S8_ACCX_P
6167
60.7k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
6168
60.7k
    9U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
6169
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_IP_P
6170
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P
6171
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_XP_P
6172
60.7k
    65U,  // EE_VMULAS_S8_QACC_LD_XP_QUP_P
6173
60.7k
    0U, // EE_VMULAS_S8_QACC_P
6174
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_P
6175
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
6176
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_XP_P
6177
60.7k
    65U,  // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
6178
60.7k
    0U, // EE_VMULAS_U16_ACCX_P
6179
60.7k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
6180
60.7k
    9U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
6181
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_IP_P
6182
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P
6183
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_XP_P
6184
60.7k
    65U,  // EE_VMULAS_U16_QACC_LD_XP_QUP_P
6185
60.7k
    0U, // EE_VMULAS_U16_QACC_P
6186
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_P
6187
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
6188
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_XP_P
6189
60.7k
    65U,  // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
6190
60.7k
    0U, // EE_VMULAS_U8_ACCX_P
6191
60.7k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
6192
60.7k
    9U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
6193
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_IP_P
6194
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P
6195
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_XP_P
6196
60.7k
    65U,  // EE_VMULAS_U8_QACC_LD_XP_QUP_P
6197
60.7k
    0U, // EE_VMULAS_U8_QACC_P
6198
60.7k
    0U, // EE_VMUL_S16_LD_INCP_P
6199
60.7k
    0U, // EE_VMUL_S16_P
6200
60.7k
    0U, // EE_VMUL_S16_ST_INCP_P
6201
60.7k
    0U, // EE_VMUL_S8_LD_INCP_P
6202
60.7k
    0U, // EE_VMUL_S8_P
6203
60.7k
    0U, // EE_VMUL_S8_ST_INCP_P
6204
60.7k
    0U, // EE_VMUL_U16_LD_INCP_P
6205
60.7k
    0U, // EE_VMUL_U16_P
6206
60.7k
    0U, // EE_VMUL_U16_ST_INCP_P
6207
60.7k
    0U, // EE_VMUL_U8_LD_INCP_P
6208
60.7k
    0U, // EE_VMUL_U8_P
6209
60.7k
    0U, // EE_VMUL_U8_ST_INCP_P
6210
60.7k
    0U, // EE_VPRELU_S16_P
6211
60.7k
    0U, // EE_VPRELU_S8_P
6212
60.7k
    0U, // EE_VRELU_S16_P
6213
60.7k
    0U, // EE_VRELU_S8_P
6214
60.7k
    0U, // EE_VSL_32_P
6215
60.7k
    0U, // EE_VSMULAS_S16_QACC_LD_INCP_P
6216
60.7k
    0U, // EE_VSMULAS_S16_QACC_P
6217
60.7k
    0U, // EE_VSMULAS_S8_QACC_LD_INCP_P
6218
60.7k
    0U, // EE_VSMULAS_S8_QACC_P
6219
60.7k
    0U, // EE_VSR_32_P
6220
60.7k
    0U, // EE_VST_128_IP_P
6221
60.7k
    0U, // EE_VST_128_XP_P
6222
60.7k
    0U, // EE_VST_H_64_IP_P
6223
60.7k
    0U, // EE_VST_H_64_XP_P
6224
60.7k
    0U, // EE_VST_L_64_IP_P
6225
60.7k
    0U, // EE_VST_L_64_XP_P
6226
60.7k
    0U, // EE_VSUBS_S16_LD_INCP_P
6227
60.7k
    0U, // EE_VSUBS_S16_P
6228
60.7k
    0U, // EE_VSUBS_S16_ST_INCP_P
6229
60.7k
    0U, // EE_VSUBS_S32_LD_INCP_P
6230
60.7k
    0U, // EE_VSUBS_S32_P
6231
60.7k
    0U, // EE_VSUBS_S32_ST_INCP_P
6232
60.7k
    0U, // EE_VSUBS_S8_LD_INCP_P
6233
60.7k
    0U, // EE_VSUBS_S8_P
6234
60.7k
    0U, // EE_VSUBS_S8_ST_INCP_P
6235
60.7k
    0U, // EE_VUNZIP_16_P
6236
60.7k
    0U, // EE_VUNZIP_32_P
6237
60.7k
    0U, // EE_VUNZIP_8_P
6238
60.7k
    0U, // EE_VZIP_16_P
6239
60.7k
    0U, // EE_VZIP_32_P
6240
60.7k
    0U, // EE_VZIP_8_P
6241
60.7k
    0U, // EE_XORQ_P
6242
60.7k
    0U, // EE_ZERO_ACCX_P
6243
60.7k
    0U, // EE_ZERO_QACC_P
6244
60.7k
    0U, // EE_ZERO_Q_P
6245
60.7k
    0U, // EXTUI_BR2_P
6246
60.7k
    0U, // EXTUI_BR4_P
6247
60.7k
    0U, // EXTUI_BR_P
6248
60.7k
    0U, // L8I_P
6249
60.7k
    0U, // LDDEC_P
6250
60.7k
    0U, // LDINC_P
6251
60.7k
    0U, // LOOPBR
6252
60.7k
    0U, // LOOPDEC
6253
60.7k
    0U, // LOOPEND
6254
60.7k
    0U, // LOOPINIT
6255
60.7k
    0U, // LOOPSTART
6256
60.7k
    0U, // MOVBA2_P
6257
60.7k
    0U, // MOVBA2_P2
6258
60.7k
    0U, // MOVBA4_P
6259
60.7k
    0U, // MOVBA4_P2
6260
60.7k
    0U, // MOVBA_P
6261
60.7k
    0U, // MOVBA_P2
6262
60.7k
    0U, // MULA_DA_HH_LDDEC_P
6263
60.7k
    0U, // MULA_DA_HH_LDINC_P
6264
60.7k
    0U, // MULA_DA_HL_LDDEC_P
6265
60.7k
    0U, // MULA_DA_HL_LDINC_P
6266
60.7k
    0U, // MULA_DA_LH_LDDEC_P
6267
60.7k
    0U, // MULA_DA_LH_LDINC_P
6268
60.7k
    0U, // MULA_DA_LL_LDDEC_P
6269
60.7k
    0U, // MULA_DA_LL_LDINC_P
6270
60.7k
    0U, // MULA_DD_HH_LDDEC_P
6271
60.7k
    0U, // MULA_DD_HH_LDINC_P
6272
60.7k
    0U, // MULA_DD_HL_LDDEC_P
6273
60.7k
    0U, // MULA_DD_HL_LDINC_P
6274
60.7k
    0U, // MULA_DD_LH_LDDEC_P
6275
60.7k
    0U, // MULA_DD_LH_LDINC_P
6276
60.7k
    0U, // MULA_DD_LL_LDDEC_P
6277
60.7k
    0U, // MULA_DD_LL_LDINC_P
6278
60.7k
    0U, // RESTORE_BOOL
6279
60.7k
    4U, // SELECT
6280
60.7k
    4U, // SELECT_CC_FP_FP
6281
60.7k
    4U, // SELECT_CC_FP_INT
6282
60.7k
    4U, // SELECT_CC_INT_FP
6283
60.7k
    0U, // SLLI_BR_P
6284
60.7k
    0U, // SLL_P
6285
60.7k
    0U, // SPILL_BOOL
6286
60.7k
    0U, // SRA_P
6287
60.7k
    0U, // SRL_P
6288
60.7k
    0U, // WSR_ACCHI_P
6289
60.7k
    0U, // WSR_ACCLO_P
6290
60.7k
    0U, // WSR_M0_P
6291
60.7k
    0U, // WSR_M1_P
6292
60.7k
    0U, // WSR_M2_P
6293
60.7k
    0U, // WSR_M3_P
6294
60.7k
    0U, // XSR_ACCHI_P
6295
60.7k
    0U, // XSR_ACCLO_P
6296
60.7k
    0U, // XSR_M0_P
6297
60.7k
    0U, // XSR_M1_P
6298
60.7k
    0U, // XSR_M2_P
6299
60.7k
    0U, // XSR_M3_P
6300
60.7k
    0U, // mv_QR_P
6301
60.7k
    0U, // ABS
6302
60.7k
    0U, // ABS_S
6303
60.7k
    0U, // ADD
6304
60.7k
    0U, // ADDEXPM_S
6305
60.7k
    0U, // ADDEXP_S
6306
60.7k
    0U, // ADDI
6307
60.7k
    0U, // ADDI_N
6308
60.7k
    0U, // ADDMI
6309
60.7k
    0U, // ADDX2
6310
60.7k
    0U, // ADDX4
6311
60.7k
    0U, // ADDX8
6312
60.7k
    0U, // ADD_N
6313
60.7k
    0U, // ADD_S
6314
60.7k
    0U, // AE_ABS16S
6315
60.7k
    0U, // AE_ABS24S
6316
60.7k
    0U, // AE_ABS32
6317
60.7k
    0U, // AE_ABS32S
6318
60.7k
    0U, // AE_ABS64
6319
60.7k
    0U, // AE_ABS64S
6320
60.7k
    0U, // AE_ADD16
6321
60.7k
    0U, // AE_ADD16S
6322
60.7k
    0U, // AE_ADD24S
6323
60.7k
    0U, // AE_ADD32
6324
60.7k
    0U, // AE_ADD32S
6325
60.7k
    0U, // AE_ADD32_HL_LH
6326
60.7k
    0U, // AE_ADD64
6327
60.7k
    0U, // AE_ADD64S
6328
60.7k
    0U, // AE_ADDBRBA32
6329
60.7k
    0U, // AE_ADDSUB32
6330
60.7k
    0U, // AE_ADDSUB32S
6331
60.7k
    0U, // AE_AND
6332
60.7k
    0U, // AE_CVT32X2F16_10
6333
60.7k
    0U, // AE_CVT32X2F16_32
6334
60.7k
    0U, // AE_CVT48A32
6335
60.7k
    0U, // AE_CVT64A32
6336
60.7k
    0U, // AE_CVT64F32_H
6337
60.7k
    0U, // AE_CVTA32F24S_H
6338
60.7k
    0U, // AE_CVTA32F24S_L
6339
60.7k
    0U, // AE_CVTQ56A32S
6340
60.7k
    0U, // AE_CVTQ56P32S_H
6341
60.7k
    0U, // AE_CVTQ56P32S_L
6342
60.7k
    0U, // AE_DB
6343
60.7k
    0U, // AE_DBI
6344
60.7k
    0U, // AE_DBI_IC
6345
60.7k
    0U, // AE_DBI_IP
6346
60.7k
    0U, // AE_DB_IC
6347
60.7k
    0U, // AE_DB_IP
6348
60.7k
    0U, // AE_DIV64D32_H
6349
60.7k
    0U, // AE_DIV64D32_L
6350
60.7k
    0U, // AE_EQ16
6351
60.7k
    0U, // AE_EQ32
6352
60.7k
    0U, // AE_EQ64
6353
60.7k
    0U, // AE_L16M_I
6354
60.7k
    0U, // AE_L16M_IU
6355
60.7k
    0U, // AE_L16M_X
6356
60.7k
    0U, // AE_L16M_XC
6357
60.7k
    0U, // AE_L16M_XU
6358
60.7k
    0U, // AE_L16X2M_I
6359
60.7k
    0U, // AE_L16X2M_IU
6360
60.7k
    0U, // AE_L16X2M_X
6361
60.7k
    0U, // AE_L16X2M_XC
6362
60.7k
    0U, // AE_L16X2M_XU
6363
60.7k
    0U, // AE_L16X4_I
6364
60.7k
    0U, // AE_L16X4_IP
6365
60.7k
    0U, // AE_L16X4_RIC
6366
60.7k
    0U, // AE_L16X4_RIP
6367
60.7k
    0U, // AE_L16X4_X
6368
60.7k
    0U, // AE_L16X4_XC
6369
60.7k
    0U, // AE_L16X4_XP
6370
60.7k
    0U, // AE_L16_I
6371
60.7k
    0U, // AE_L16_IP
6372
60.7k
    0U, // AE_L16_X
6373
60.7k
    0U, // AE_L16_XC
6374
60.7k
    0U, // AE_L16_XP
6375
60.7k
    0U, // AE_L32F24_I
6376
60.7k
    0U, // AE_L32F24_IP
6377
60.7k
    0U, // AE_L32F24_X
6378
60.7k
    0U, // AE_L32F24_XC
6379
60.7k
    0U, // AE_L32F24_XP
6380
60.7k
    0U, // AE_L32M_I
6381
60.7k
    0U, // AE_L32M_IU
6382
60.7k
    0U, // AE_L32M_X
6383
60.7k
    0U, // AE_L32M_XC
6384
60.7k
    0U, // AE_L32M_XU
6385
60.7k
    0U, // AE_L32X2F24_I
6386
60.7k
    0U, // AE_L32X2F24_IP
6387
60.7k
    0U, // AE_L32X2F24_RIC
6388
60.7k
    0U, // AE_L32X2F24_RIP
6389
60.7k
    0U, // AE_L32X2F24_X
6390
60.7k
    0U, // AE_L32X2F24_XC
6391
60.7k
    0U, // AE_L32X2F24_XP
6392
60.7k
    0U, // AE_L32X2_I
6393
60.7k
    0U, // AE_L32X2_IP
6394
60.7k
    0U, // AE_L32X2_RIC
6395
60.7k
    0U, // AE_L32X2_RIP
6396
60.7k
    0U, // AE_L32X2_X
6397
60.7k
    0U, // AE_L32X2_XC
6398
60.7k
    0U, // AE_L32X2_XP
6399
60.7k
    0U, // AE_L32_I
6400
60.7k
    0U, // AE_L32_IP
6401
60.7k
    0U, // AE_L32_X
6402
60.7k
    0U, // AE_L32_XC
6403
60.7k
    0U, // AE_L32_XP
6404
60.7k
    0U, // AE_L64_I
6405
60.7k
    0U, // AE_L64_IP
6406
60.7k
    0U, // AE_L64_X
6407
60.7k
    0U, // AE_L64_XC
6408
60.7k
    0U, // AE_L64_XP
6409
60.7k
    0U, // AE_LA16X4NEG_PC
6410
60.7k
    0U, // AE_LA16X4POS_PC
6411
60.7k
    0U, // AE_LA16X4_IC
6412
60.7k
    0U, // AE_LA16X4_IP
6413
60.7k
    0U, // AE_LA16X4_RIC
6414
60.7k
    0U, // AE_LA16X4_RIP
6415
60.7k
    0U, // AE_LA24NEG_PC
6416
60.7k
    0U, // AE_LA24POS_PC
6417
60.7k
    0U, // AE_LA24X2NEG_PC
6418
60.7k
    0U, // AE_LA24X2POS_PC
6419
60.7k
    0U, // AE_LA24X2_IC
6420
60.7k
    0U, // AE_LA24X2_IP
6421
60.7k
    0U, // AE_LA24X2_RIC
6422
60.7k
    0U, // AE_LA24X2_RIP
6423
60.7k
    0U, // AE_LA24_IC
6424
60.7k
    0U, // AE_LA24_IP
6425
60.7k
    0U, // AE_LA24_RIC
6426
60.7k
    0U, // AE_LA24_RIP
6427
60.7k
    0U, // AE_LA32X2F24_IC
6428
60.7k
    0U, // AE_LA32X2F24_IP
6429
60.7k
    0U, // AE_LA32X2F24_RIC
6430
60.7k
    0U, // AE_LA32X2F24_RIP
6431
60.7k
    0U, // AE_LA32X2NEG_PC
6432
60.7k
    0U, // AE_LA32X2POS_PC
6433
60.7k
    0U, // AE_LA32X2_IC
6434
60.7k
    0U, // AE_LA32X2_IP
6435
60.7k
    0U, // AE_LA32X2_RIC
6436
60.7k
    0U, // AE_LA32X2_RIP
6437
60.7k
    0U, // AE_LA64_PP
6438
60.7k
    0U, // AE_LALIGN64_I
6439
60.7k
    0U, // AE_LB
6440
60.7k
    0U, // AE_LBI
6441
60.7k
    0U, // AE_LBK
6442
60.7k
    0U, // AE_LBKI
6443
60.7k
    0U, // AE_LBS
6444
60.7k
    0U, // AE_LBSI
6445
60.7k
    0U, // AE_LE16
6446
60.7k
    0U, // AE_LE32
6447
60.7k
    0U, // AE_LE64
6448
60.7k
    0U, // AE_LT16
6449
60.7k
    0U, // AE_LT32
6450
60.7k
    0U, // AE_LT64
6451
60.7k
    0U, // AE_MAX32
6452
60.7k
    0U, // AE_MAX64
6453
60.7k
    0U, // AE_MAXABS32S
6454
60.7k
    0U, // AE_MAXABS64S
6455
60.7k
    0U, // AE_MIN32
6456
60.7k
    0U, // AE_MIN64
6457
60.7k
    0U, // AE_MINABS32S
6458
60.7k
    0U, // AE_MINABS64S
6459
60.7k
    0U, // AE_MOV
6460
60.7k
    0U, // AE_MOVAD16_0
6461
60.7k
    0U, // AE_MOVAD16_1
6462
60.7k
    0U, // AE_MOVAD16_2
6463
60.7k
    0U, // AE_MOVAD16_3
6464
60.7k
    0U, // AE_MOVAD32_H
6465
60.7k
    0U, // AE_MOVAD32_L
6466
60.7k
    0U, // AE_MOVALIGN
6467
60.7k
    0U, // AE_MOVDA16
6468
60.7k
    0U, // AE_MOVDA16X2
6469
60.7k
    0U, // AE_MOVDA32
6470
60.7k
    0U, // AE_MOVDA32X2
6471
60.7k
    0U, // AE_MOVF16X4
6472
60.7k
    0U, // AE_MOVF32X2
6473
60.7k
    0U, // AE_MOVF64
6474
60.7k
    0U, // AE_MOVI
6475
60.7k
    0U, // AE_MOVT16X4
6476
60.7k
    0U, // AE_MOVT32X2
6477
60.7k
    0U, // AE_MOVT64
6478
60.7k
    0U, // AE_MUL16X4
6479
60.7k
    0U, // AE_MUL32U_LL
6480
60.7k
    0U, // AE_MUL32X16_H0
6481
60.7k
    0U, // AE_MUL32X16_H0_S2
6482
60.7k
    0U, // AE_MUL32X16_H1
6483
60.7k
    0U, // AE_MUL32X16_H1_S2
6484
60.7k
    0U, // AE_MUL32X16_H2
6485
60.7k
    0U, // AE_MUL32X16_H2_S2
6486
60.7k
    0U, // AE_MUL32X16_H3
6487
60.7k
    0U, // AE_MUL32X16_H3_S2
6488
60.7k
    0U, // AE_MUL32X16_L0
6489
60.7k
    0U, // AE_MUL32X16_L0_S2
6490
60.7k
    0U, // AE_MUL32X16_L1
6491
60.7k
    0U, // AE_MUL32X16_L1_S2
6492
60.7k
    0U, // AE_MUL32X16_L2
6493
60.7k
    0U, // AE_MUL32X16_L2_S2
6494
60.7k
    0U, // AE_MUL32X16_L3
6495
60.7k
    0U, // AE_MUL32X16_L3_S2
6496
60.7k
    0U, // AE_MUL32_HH
6497
60.7k
    0U, // AE_MUL32_LH
6498
60.7k
    0U, // AE_MUL32_LL
6499
60.7k
    0U, // AE_MUL32_LL_S2
6500
60.7k
    0U, // AE_MULA16X4
6501
60.7k
    0U, // AE_MULA32U_LL
6502
60.7k
    0U, // AE_MULA32X16_H0
6503
60.7k
    0U, // AE_MULA32X16_H0_S2
6504
60.7k
    0U, // AE_MULA32X16_H1
6505
60.7k
    0U, // AE_MULA32X16_H1_S2
6506
60.7k
    0U, // AE_MULA32X16_H2
6507
60.7k
    0U, // AE_MULA32X16_H2_S2
6508
60.7k
    0U, // AE_MULA32X16_H3
6509
60.7k
    0U, // AE_MULA32X16_H3_S2
6510
60.7k
    0U, // AE_MULA32X16_L0
6511
60.7k
    0U, // AE_MULA32X16_L0_S2
6512
60.7k
    0U, // AE_MULA32X16_L1
6513
60.7k
    0U, // AE_MULA32X16_L1_S2
6514
60.7k
    0U, // AE_MULA32X16_L2
6515
60.7k
    0U, // AE_MULA32X16_L2_S2
6516
60.7k
    0U, // AE_MULA32X16_L3
6517
60.7k
    0U, // AE_MULA32X16_L3_S2
6518
60.7k
    0U, // AE_MULA32_HH
6519
60.7k
    0U, // AE_MULA32_LH
6520
60.7k
    0U, // AE_MULA32_LL
6521
60.7k
    0U, // AE_MULA32_LL_S2
6522
60.7k
    0U, // AE_MULAAD24_HH_LL
6523
60.7k
    0U, // AE_MULAAD24_HH_LL_S2
6524
60.7k
    0U, // AE_MULAAD24_HL_LH
6525
60.7k
    0U, // AE_MULAAD24_HL_LH_S2
6526
60.7k
    0U, // AE_MULAAD32X16_H0_L1
6527
60.7k
    0U, // AE_MULAAD32X16_H0_L1_S2
6528
60.7k
    0U, // AE_MULAAD32X16_H1_L0
6529
60.7k
    0U, // AE_MULAAD32X16_H1_L0_S2
6530
60.7k
    0U, // AE_MULAAD32X16_H2_L3
6531
60.7k
    0U, // AE_MULAAD32X16_H2_L3_S2
6532
60.7k
    0U, // AE_MULAAD32X16_H3_L2
6533
60.7k
    0U, // AE_MULAAD32X16_H3_L2_S2
6534
60.7k
    0U, // AE_MULAAFD16SS_11_00
6535
60.7k
    0U, // AE_MULAAFD16SS_11_00_S2
6536
60.7k
    0U, // AE_MULAAFD16SS_13_02
6537
60.7k
    0U, // AE_MULAAFD16SS_13_02_S2
6538
60.7k
    0U, // AE_MULAAFD16SS_33_22
6539
60.7k
    0U, // AE_MULAAFD16SS_33_22_S2
6540
60.7k
    0U, // AE_MULAAFD24_HH_LL
6541
60.7k
    0U, // AE_MULAAFD24_HH_LL_S2
6542
60.7k
    0U, // AE_MULAAFD24_HL_LH
6543
60.7k
    0U, // AE_MULAAFD24_HL_LH_S2
6544
60.7k
    0U, // AE_MULAAFD32X16_H0_L1
6545
60.7k
    0U, // AE_MULAAFD32X16_H0_L1_S2
6546
60.7k
    0U, // AE_MULAAFD32X16_H1_L0
6547
60.7k
    0U, // AE_MULAAFD32X16_H1_L0_S2
6548
60.7k
    0U, // AE_MULAAFD32X16_H2_L3
6549
60.7k
    0U, // AE_MULAAFD32X16_H2_L3_S2
6550
60.7k
    0U, // AE_MULAAFD32X16_H3_L2
6551
60.7k
    0U, // AE_MULAAFD32X16_H3_L2_S2
6552
60.7k
    0U, // AE_MULAC24
6553
60.7k
    0U, // AE_MULAC32X16_H
6554
60.7k
    0U, // AE_MULAC32X16_L
6555
60.7k
    0U, // AE_MULAF16SS_00
6556
60.7k
    0U, // AE_MULAF16SS_00_S2
6557
60.7k
    0U, // AE_MULAF16SS_10
6558
60.7k
    0U, // AE_MULAF16SS_11
6559
60.7k
    0U, // AE_MULAF16SS_20
6560
60.7k
    0U, // AE_MULAF16SS_21
6561
60.7k
    0U, // AE_MULAF16SS_22
6562
60.7k
    0U, // AE_MULAF16SS_30
6563
60.7k
    0U, // AE_MULAF16SS_31
6564
60.7k
    0U, // AE_MULAF16SS_32
6565
60.7k
    0U, // AE_MULAF16SS_33
6566
60.7k
    0U, // AE_MULAF16X4SS
6567
60.7k
    0U, // AE_MULAF32R_HH
6568
60.7k
    0U, // AE_MULAF32R_LH
6569
60.7k
    0U, // AE_MULAF32R_LL
6570
60.7k
    0U, // AE_MULAF32R_LL_S2
6571
60.7k
    0U, // AE_MULAF32S_HH
6572
60.7k
    0U, // AE_MULAF32S_LH
6573
60.7k
    0U, // AE_MULAF32S_LL
6574
60.7k
    0U, // AE_MULAF32S_LL_S2
6575
60.7k
    0U, // AE_MULAF32X16_H0
6576
60.7k
    0U, // AE_MULAF32X16_H0_S2
6577
60.7k
    0U, // AE_MULAF32X16_H1
6578
60.7k
    0U, // AE_MULAF32X16_H1_S2
6579
60.7k
    0U, // AE_MULAF32X16_H2
6580
60.7k
    0U, // AE_MULAF32X16_H2_S2
6581
60.7k
    0U, // AE_MULAF32X16_H3
6582
60.7k
    0U, // AE_MULAF32X16_H3_S2
6583
60.7k
    0U, // AE_MULAF32X16_L0
6584
60.7k
    0U, // AE_MULAF32X16_L0_S2
6585
60.7k
    0U, // AE_MULAF32X16_L1
6586
60.7k
    0U, // AE_MULAF32X16_L1_S2
6587
60.7k
    0U, // AE_MULAF32X16_L2
6588
60.7k
    0U, // AE_MULAF32X16_L2_S2
6589
60.7k
    0U, // AE_MULAF32X16_L3
6590
60.7k
    0U, // AE_MULAF32X16_L3_S2
6591
60.7k
    0U, // AE_MULAF48Q32SP16S_L
6592
60.7k
    0U, // AE_MULAF48Q32SP16S_L_S2
6593
60.7k
    0U, // AE_MULAF48Q32SP16U_L
6594
60.7k
    0U, // AE_MULAF48Q32SP16U_L_S2
6595
60.7k
    0U, // AE_MULAFC24RA
6596
60.7k
    0U, // AE_MULAFC32X16RAS_H
6597
60.7k
    0U, // AE_MULAFC32X16RAS_L
6598
60.7k
    0U, // AE_MULAFD24X2_FIR_H
6599
60.7k
    0U, // AE_MULAFD24X2_FIR_L
6600
60.7k
    0U, // AE_MULAFD32X16X2_FIR_HH
6601
60.7k
    0U, // AE_MULAFD32X16X2_FIR_HL
6602
60.7k
    0U, // AE_MULAFD32X16X2_FIR_LH
6603
60.7k
    0U, // AE_MULAFD32X16X2_FIR_LL
6604
60.7k
    0U, // AE_MULAFP24X2R
6605
60.7k
    0U, // AE_MULAFP24X2RA
6606
60.7k
    0U, // AE_MULAFP24X2RA_S2
6607
60.7k
    0U, // AE_MULAFP24X2R_S2
6608
60.7k
    0U, // AE_MULAFP32X16X2RAS_H
6609
60.7k
    0U, // AE_MULAFP32X16X2RAS_H_S2
6610
60.7k
    0U, // AE_MULAFP32X16X2RAS_L
6611
60.7k
    0U, // AE_MULAFP32X16X2RAS_L_S2
6612
60.7k
    0U, // AE_MULAFP32X16X2RS_H
6613
60.7k
    0U, // AE_MULAFP32X16X2RS_H_S2
6614
60.7k
    0U, // AE_MULAFP32X16X2RS_L
6615
60.7k
    0U, // AE_MULAFP32X16X2RS_L_S2
6616
60.7k
    0U, // AE_MULAFP32X2RAS
6617
60.7k
    0U, // AE_MULAFP32X2RS
6618
60.7k
    0U, // AE_MULAFQ32SP24S_H_S2
6619
60.7k
    0U, // AE_MULAFQ32SP24S_L_S2
6620
60.7k
    0U, // AE_MULAP24X2
6621
60.7k
    0U, // AE_MULAP24X2_S2
6622
60.7k
    0U, // AE_MULAP32X16X2_H
6623
60.7k
    0U, // AE_MULAP32X16X2_L
6624
60.7k
    0U, // AE_MULAP32X2
6625
60.7k
    0U, // AE_MULAQ32SP16S_L_S2
6626
60.7k
    0U, // AE_MULAQ32SP16U_L_S2
6627
60.7k
    0U, // AE_MULARFQ32SP24S_H_S2
6628
60.7k
    0U, // AE_MULARFQ32SP24S_L_S2
6629
60.7k
    0U, // AE_MULAS32F48P16S_HH
6630
60.7k
    0U, // AE_MULAS32F48P16S_HH_S2
6631
60.7k
    0U, // AE_MULAS32F48P16S_LH
6632
60.7k
    0U, // AE_MULAS32F48P16S_LH_S2
6633
60.7k
    0U, // AE_MULAS32F48P16S_LL
6634
60.7k
    0U, // AE_MULAS32F48P16S_LL_S2
6635
60.7k
    0U, // AE_MULASD24_HH_LL
6636
60.7k
    0U, // AE_MULASD24_HH_LL_S2
6637
60.7k
    0U, // AE_MULASD24_HL_LH
6638
60.7k
    0U, // AE_MULASD24_HL_LH_S2
6639
60.7k
    0U, // AE_MULASD32X16_H1_L0
6640
60.7k
    0U, // AE_MULASD32X16_H1_L0_S2
6641
60.7k
    0U, // AE_MULASD32X16_H3_L2
6642
60.7k
    0U, // AE_MULASD32X16_H3_L2_S2
6643
60.7k
    0U, // AE_MULASFD24_HH_LL
6644
60.7k
    0U, // AE_MULASFD24_HH_LL_S2
6645
60.7k
    0U, // AE_MULASFD24_HL_LH
6646
60.7k
    0U, // AE_MULASFD24_HL_LH_S2
6647
60.7k
    0U, // AE_MULASFD32X16_H1_L0
6648
60.7k
    0U, // AE_MULASFD32X16_H1_L0_S2
6649
60.7k
    0U, // AE_MULASFD32X16_H3_L2
6650
60.7k
    0U, // AE_MULASFD32X16_H3_L2_S2
6651
60.7k
    0U, // AE_MULC24
6652
60.7k
    0U, // AE_MULC32X16_H
6653
60.7k
    0U, // AE_MULC32X16_L
6654
60.7k
    0U, // AE_MULF16SS_00
6655
60.7k
    0U, // AE_MULF16SS_00_S2
6656
60.7k
    0U, // AE_MULF16SS_10
6657
60.7k
    0U, // AE_MULF16SS_11
6658
60.7k
    0U, // AE_MULF16SS_20
6659
60.7k
    0U, // AE_MULF16SS_21
6660
60.7k
    0U, // AE_MULF16SS_22
6661
60.7k
    0U, // AE_MULF16SS_30
6662
60.7k
    0U, // AE_MULF16SS_31
6663
60.7k
    0U, // AE_MULF16SS_32
6664
60.7k
    0U, // AE_MULF16SS_33
6665
60.7k
    0U, // AE_MULF16X4SS
6666
60.7k
    0U, // AE_MULF32R_HH
6667
60.7k
    0U, // AE_MULF32R_LH
6668
60.7k
    0U, // AE_MULF32R_LL
6669
60.7k
    0U, // AE_MULF32R_LL_S2
6670
60.7k
    0U, // AE_MULF32S_HH
6671
60.7k
    0U, // AE_MULF32S_LH
6672
60.7k
    0U, // AE_MULF32S_LL
6673
60.7k
    0U, // AE_MULF32S_LL_S2
6674
60.7k
    0U, // AE_MULF32X16_H0
6675
60.7k
    0U, // AE_MULF32X16_H0_S2
6676
60.7k
    0U, // AE_MULF32X16_H1
6677
60.7k
    0U, // AE_MULF32X16_H1_S2
6678
60.7k
    0U, // AE_MULF32X16_H2
6679
60.7k
    0U, // AE_MULF32X16_H2_S2
6680
60.7k
    0U, // AE_MULF32X16_H3
6681
60.7k
    0U, // AE_MULF32X16_H3_S2
6682
60.7k
    0U, // AE_MULF32X16_L0
6683
60.7k
    0U, // AE_MULF32X16_L0_S2
6684
60.7k
    0U, // AE_MULF32X16_L1
6685
60.7k
    0U, // AE_MULF32X16_L1_S2
6686
60.7k
    0U, // AE_MULF32X16_L2
6687
60.7k
    0U, // AE_MULF32X16_L2_S2
6688
60.7k
    0U, // AE_MULF32X16_L3
6689
60.7k
    0U, // AE_MULF32X16_L3_S2
6690
60.7k
    0U, // AE_MULF48Q32SP16S_L
6691
60.7k
    0U, // AE_MULF48Q32SP16S_L_S2
6692
60.7k
    0U, // AE_MULF48Q32SP16U_L
6693
60.7k
    0U, // AE_MULF48Q32SP16U_L_S2
6694
60.7k
    0U, // AE_MULFC24RA
6695
60.7k
    0U, // AE_MULFC32X16RAS_H
6696
60.7k
    0U, // AE_MULFC32X16RAS_L
6697
60.7k
    0U, // AE_MULFD24X2_FIR_H
6698
60.7k
    0U, // AE_MULFD24X2_FIR_L
6699
60.7k
    0U, // AE_MULFD32X16X2_FIR_HH
6700
60.7k
    0U, // AE_MULFD32X16X2_FIR_HL
6701
60.7k
    0U, // AE_MULFD32X16X2_FIR_LH
6702
60.7k
    0U, // AE_MULFD32X16X2_FIR_LL
6703
60.7k
    0U, // AE_MULFP16X4RAS
6704
60.7k
    0U, // AE_MULFP16X4S
6705
60.7k
    0U, // AE_MULFP24X2R
6706
60.7k
    0U, // AE_MULFP24X2RA
6707
60.7k
    0U, // AE_MULFP24X2RA_S2
6708
60.7k
    0U, // AE_MULFP24X2R_S2
6709
60.7k
    0U, // AE_MULFP32X16X2RAS_H
6710
60.7k
    0U, // AE_MULFP32X16X2RAS_H_S2
6711
60.7k
    0U, // AE_MULFP32X16X2RAS_L
6712
60.7k
    0U, // AE_MULFP32X16X2RAS_L_S2
6713
60.7k
    0U, // AE_MULFP32X16X2RS_H
6714
60.7k
    0U, // AE_MULFP32X16X2RS_H_S2
6715
60.7k
    0U, // AE_MULFP32X16X2RS_L
6716
60.7k
    0U, // AE_MULFP32X16X2RS_L_S2
6717
60.7k
    0U, // AE_MULFP32X2RAS
6718
60.7k
    0U, // AE_MULFP32X2RS
6719
60.7k
    0U, // AE_MULFQ32SP24S_H_S2
6720
60.7k
    0U, // AE_MULFQ32SP24S_L_S2
6721
60.7k
    0U, // AE_MULP24X2
6722
60.7k
    0U, // AE_MULP24X2_S2
6723
60.7k
    0U, // AE_MULP32X16X2_H
6724
60.7k
    0U, // AE_MULP32X16X2_L
6725
60.7k
    0U, // AE_MULP32X2
6726
60.7k
    0U, // AE_MULQ32SP16S_L_S2
6727
60.7k
    0U, // AE_MULQ32SP16U_L_S2
6728
60.7k
    0U, // AE_MULRFQ32SP24S_H_S2
6729
60.7k
    0U, // AE_MULRFQ32SP24S_L_S2
6730
60.7k
    0U, // AE_MULS16X4
6731
60.7k
    0U, // AE_MULS32F48P16S_HH
6732
60.7k
    0U, // AE_MULS32F48P16S_HH_S2
6733
60.7k
    0U, // AE_MULS32F48P16S_LH
6734
60.7k
    0U, // AE_MULS32F48P16S_LH_S2
6735
60.7k
    0U, // AE_MULS32F48P16S_LL
6736
60.7k
    0U, // AE_MULS32F48P16S_LL_S2
6737
60.7k
    0U, // AE_MULS32U_LL
6738
60.7k
    0U, // AE_MULS32X16_H0
6739
60.7k
    0U, // AE_MULS32X16_H0_S2
6740
60.7k
    0U, // AE_MULS32X16_H1
6741
60.7k
    0U, // AE_MULS32X16_H1_S2
6742
60.7k
    0U, // AE_MULS32X16_H2
6743
60.7k
    0U, // AE_MULS32X16_H2_S2
6744
60.7k
    0U, // AE_MULS32X16_H3
6745
60.7k
    0U, // AE_MULS32X16_H3_S2
6746
60.7k
    0U, // AE_MULS32X16_L0
6747
60.7k
    0U, // AE_MULS32X16_L0_S2
6748
60.7k
    0U, // AE_MULS32X16_L1
6749
60.7k
    0U, // AE_MULS32X16_L1_S2
6750
60.7k
    0U, // AE_MULS32X16_L2
6751
60.7k
    0U, // AE_MULS32X16_L2_S2
6752
60.7k
    0U, // AE_MULS32X16_L3
6753
60.7k
    0U, // AE_MULS32X16_L3_S2
6754
60.7k
    0U, // AE_MULS32_HH
6755
60.7k
    0U, // AE_MULS32_LH
6756
60.7k
    0U, // AE_MULS32_LL
6757
60.7k
    0U, // AE_MULSAD24_HH_LL
6758
60.7k
    0U, // AE_MULSAD24_HH_LL_S2
6759
60.7k
    0U, // AE_MULSAD32X16_H1_L0
6760
60.7k
    0U, // AE_MULSAD32X16_H1_L0_S2
6761
60.7k
    0U, // AE_MULSAD32X16_H3_L2
6762
60.7k
    0U, // AE_MULSAD32X16_H3_L2_S2
6763
60.7k
    0U, // AE_MULSAFD24_HH_LL
6764
60.7k
    0U, // AE_MULSAFD24_HH_LL_S2
6765
60.7k
    0U, // AE_MULSAFD32X16_H1_L0
6766
60.7k
    0U, // AE_MULSAFD32X16_H1_L0_S2
6767
60.7k
    0U, // AE_MULSAFD32X16_H3_L2
6768
60.7k
    0U, // AE_MULSAFD32X16_H3_L2_S2
6769
60.7k
    0U, // AE_MULSF16SS_00
6770
60.7k
    0U, // AE_MULSF16SS_00_S2
6771
60.7k
    0U, // AE_MULSF16SS_10
6772
60.7k
    0U, // AE_MULSF16SS_11
6773
60.7k
    0U, // AE_MULSF16SS_20
6774
60.7k
    0U, // AE_MULSF16SS_21
6775
60.7k
    0U, // AE_MULSF16SS_22
6776
60.7k
    0U, // AE_MULSF16SS_30
6777
60.7k
    0U, // AE_MULSF16SS_31
6778
60.7k
    0U, // AE_MULSF16SS_32
6779
60.7k
    0U, // AE_MULSF16SS_33
6780
60.7k
    0U, // AE_MULSF16X4SS
6781
60.7k
    0U, // AE_MULSF32R_HH
6782
60.7k
    0U, // AE_MULSF32R_LH
6783
60.7k
    0U, // AE_MULSF32R_LL
6784
60.7k
    0U, // AE_MULSF32R_LL_S2
6785
60.7k
    0U, // AE_MULSF32S_HH
6786
60.7k
    0U, // AE_MULSF32S_LH
6787
60.7k
    0U, // AE_MULSF32S_LL
6788
60.7k
    0U, // AE_MULSF32X16_H0
6789
60.7k
    0U, // AE_MULSF32X16_H0_S2
6790
60.7k
    0U, // AE_MULSF32X16_H1
6791
60.7k
    0U, // AE_MULSF32X16_H1_S2
6792
60.7k
    0U, // AE_MULSF32X16_H2
6793
60.7k
    0U, // AE_MULSF32X16_H2_S2
6794
60.7k
    0U, // AE_MULSF32X16_H3
6795
60.7k
    0U, // AE_MULSF32X16_H3_S2
6796
60.7k
    0U, // AE_MULSF32X16_L0
6797
60.7k
    0U, // AE_MULSF32X16_L0_S2
6798
60.7k
    0U, // AE_MULSF32X16_L1
6799
60.7k
    0U, // AE_MULSF32X16_L1_S2
6800
60.7k
    0U, // AE_MULSF32X16_L2
6801
60.7k
    0U, // AE_MULSF32X16_L2_S2
6802
60.7k
    0U, // AE_MULSF32X16_L3
6803
60.7k
    0U, // AE_MULSF32X16_L3_S2
6804
60.7k
    0U, // AE_MULSF48Q32SP16S_L
6805
60.7k
    0U, // AE_MULSF48Q32SP16S_L_S2
6806
60.7k
    0U, // AE_MULSF48Q32SP16U_L
6807
60.7k
    0U, // AE_MULSF48Q32SP16U_L_S2
6808
60.7k
    0U, // AE_MULSFP24X2R
6809
60.7k
    0U, // AE_MULSFP24X2RA
6810
60.7k
    0U, // AE_MULSFP24X2RA_S2
6811
60.7k
    0U, // AE_MULSFP24X2R_S2
6812
60.7k
    0U, // AE_MULSFP32X16X2RAS_H
6813
60.7k
    0U, // AE_MULSFP32X16X2RAS_H_S2
6814
60.7k
    0U, // AE_MULSFP32X16X2RAS_L
6815
60.7k
    0U, // AE_MULSFP32X16X2RAS_L_S2
6816
60.7k
    0U, // AE_MULSFP32X16X2RS_H
6817
60.7k
    0U, // AE_MULSFP32X16X2RS_H_S2
6818
60.7k
    0U, // AE_MULSFP32X16X2RS_L
6819
60.7k
    0U, // AE_MULSFP32X16X2RS_L_S2
6820
60.7k
    0U, // AE_MULSFP32X2RAS
6821
60.7k
    0U, // AE_MULSFP32X2RS
6822
60.7k
    0U, // AE_MULSFQ32SP24S_H_S2
6823
60.7k
    0U, // AE_MULSFQ32SP24S_L_S2
6824
60.7k
    0U, // AE_MULSP24X2
6825
60.7k
    0U, // AE_MULSP24X2_S2
6826
60.7k
    0U, // AE_MULSP32X16X2_H
6827
60.7k
    0U, // AE_MULSP32X16X2_L
6828
60.7k
    0U, // AE_MULSP32X2
6829
60.7k
    0U, // AE_MULSQ32SP16S_L_S2
6830
60.7k
    0U, // AE_MULSQ32SP16U_L_S2
6831
60.7k
    0U, // AE_MULSRFQ32SP24S_H_S2
6832
60.7k
    0U, // AE_MULSRFQ32SP24S_L_S2
6833
60.7k
    0U, // AE_MULSS32F48P16S_HH
6834
60.7k
    0U, // AE_MULSS32F48P16S_HH_S2
6835
60.7k
    0U, // AE_MULSS32F48P16S_LH
6836
60.7k
    0U, // AE_MULSS32F48P16S_LH_S2
6837
60.7k
    0U, // AE_MULSS32F48P16S_LL
6838
60.7k
    0U, // AE_MULSS32F48P16S_LL_S2
6839
60.7k
    0U, // AE_MULSSD24_HH_LL
6840
60.7k
    0U, // AE_MULSSD24_HH_LL_S2
6841
60.7k
    0U, // AE_MULSSD24_HL_LH
6842
60.7k
    0U, // AE_MULSSD24_HL_LH_S2
6843
60.7k
    0U, // AE_MULSSD32X16_H1_L0
6844
60.7k
    0U, // AE_MULSSD32X16_H1_L0_S2
6845
60.7k
    0U, // AE_MULSSD32X16_H3_L2
6846
60.7k
    0U, // AE_MULSSD32X16_H3_L2_S2
6847
60.7k
    0U, // AE_MULSSFD16SS_11_00
6848
60.7k
    0U, // AE_MULSSFD16SS_11_00_S2
6849
60.7k
    0U, // AE_MULSSFD16SS_13_02
6850
60.7k
    0U, // AE_MULSSFD16SS_13_02_S2
6851
60.7k
    0U, // AE_MULSSFD16SS_33_22
6852
60.7k
    0U, // AE_MULSSFD16SS_33_22_S2
6853
60.7k
    0U, // AE_MULSSFD24_HH_LL
6854
60.7k
    0U, // AE_MULSSFD24_HH_LL_S2
6855
60.7k
    0U, // AE_MULSSFD24_HL_LH
6856
60.7k
    0U, // AE_MULSSFD24_HL_LH_S2
6857
60.7k
    0U, // AE_MULSSFD32X16_H1_L0
6858
60.7k
    0U, // AE_MULSSFD32X16_H1_L0_S2
6859
60.7k
    0U, // AE_MULSSFD32X16_H3_L2
6860
60.7k
    0U, // AE_MULSSFD32X16_H3_L2_S2
6861
60.7k
    0U, // AE_MULZAAD24_HH_LL
6862
60.7k
    0U, // AE_MULZAAD24_HH_LL_S2
6863
60.7k
    0U, // AE_MULZAAD24_HL_LH
6864
60.7k
    0U, // AE_MULZAAD24_HL_LH_S2
6865
60.7k
    0U, // AE_MULZAAD32X16_H0_L1
6866
60.7k
    0U, // AE_MULZAAD32X16_H0_L1_S2
6867
60.7k
    0U, // AE_MULZAAD32X16_H1_L0
6868
60.7k
    0U, // AE_MULZAAD32X16_H1_L0_S2
6869
60.7k
    0U, // AE_MULZAAD32X16_H2_L3
6870
60.7k
    0U, // AE_MULZAAD32X16_H2_L3_S2
6871
60.7k
    0U, // AE_MULZAAD32X16_H3_L2
6872
60.7k
    0U, // AE_MULZAAD32X16_H3_L2_S2
6873
60.7k
    0U, // AE_MULZAAFD16SS_11_00
6874
60.7k
    0U, // AE_MULZAAFD16SS_11_00_S2
6875
60.7k
    0U, // AE_MULZAAFD16SS_13_02
6876
60.7k
    0U, // AE_MULZAAFD16SS_13_02_S2
6877
60.7k
    0U, // AE_MULZAAFD16SS_33_22
6878
60.7k
    0U, // AE_MULZAAFD16SS_33_22_S2
6879
60.7k
    0U, // AE_MULZAAFD24_HH_LL
6880
60.7k
    0U, // AE_MULZAAFD24_HH_LL_S2
6881
60.7k
    0U, // AE_MULZAAFD24_HL_LH
6882
60.7k
    0U, // AE_MULZAAFD24_HL_LH_S2
6883
60.7k
    0U, // AE_MULZAAFD32X16_H0_L1
6884
60.7k
    0U, // AE_MULZAAFD32X16_H0_L1_S2
6885
60.7k
    0U, // AE_MULZAAFD32X16_H1_L0
6886
60.7k
    0U, // AE_MULZAAFD32X16_H1_L0_S2
6887
60.7k
    0U, // AE_MULZAAFD32X16_H2_L3
6888
60.7k
    0U, // AE_MULZAAFD32X16_H2_L3_S2
6889
60.7k
    0U, // AE_MULZAAFD32X16_H3_L2
6890
60.7k
    0U, // AE_MULZAAFD32X16_H3_L2_S2
6891
60.7k
    0U, // AE_MULZASD24_HH_LL
6892
60.7k
    0U, // AE_MULZASD24_HH_LL_S2
6893
60.7k
    0U, // AE_MULZASD24_HL_LH
6894
60.7k
    0U, // AE_MULZASD24_HL_LH_S2
6895
60.7k
    0U, // AE_MULZASD32X16_H1_L0
6896
60.7k
    0U, // AE_MULZASD32X16_H1_L0_S2
6897
60.7k
    0U, // AE_MULZASD32X16_H3_L2
6898
60.7k
    0U, // AE_MULZASD32X16_H3_L2_S2
6899
60.7k
    0U, // AE_MULZASFD24_HH_LL
6900
60.7k
    0U, // AE_MULZASFD24_HH_LL_S2
6901
60.7k
    0U, // AE_MULZASFD24_HL_LH
6902
60.7k
    0U, // AE_MULZASFD24_HL_LH_S2
6903
60.7k
    0U, // AE_MULZASFD32X16_H1_L0
6904
60.7k
    0U, // AE_MULZASFD32X16_H1_L0_S2
6905
60.7k
    0U, // AE_MULZASFD32X16_H3_L2
6906
60.7k
    0U, // AE_MULZASFD32X16_H3_L2_S2
6907
60.7k
    0U, // AE_MULZSAD24_HH_LL
6908
60.7k
    0U, // AE_MULZSAD24_HH_LL_S2
6909
60.7k
    0U, // AE_MULZSAD32X16_H1_L0
6910
60.7k
    0U, // AE_MULZSAD32X16_H1_L0_S2
6911
60.7k
    0U, // AE_MULZSAD32X16_H3_L2
6912
60.7k
    0U, // AE_MULZSAD32X16_H3_L2_S2
6913
60.7k
    0U, // AE_MULZSAFD24_HH_LL
6914
60.7k
    0U, // AE_MULZSAFD24_HH_LL_S2
6915
60.7k
    0U, // AE_MULZSAFD32X16_H1_L0
6916
60.7k
    0U, // AE_MULZSAFD32X16_H1_L0_S2
6917
60.7k
    0U, // AE_MULZSAFD32X16_H3_L2
6918
60.7k
    0U, // AE_MULZSAFD32X16_H3_L2_S2
6919
60.7k
    0U, // AE_MULZSSD24_HH_LL
6920
60.7k
    0U, // AE_MULZSSD24_HH_LL_S2
6921
60.7k
    0U, // AE_MULZSSD24_HL_LH
6922
60.7k
    0U, // AE_MULZSSD24_HL_LH_S2
6923
60.7k
    0U, // AE_MULZSSD32X16_H1_L0
6924
60.7k
    0U, // AE_MULZSSD32X16_H1_L0_S2
6925
60.7k
    0U, // AE_MULZSSD32X16_H3_L2
6926
60.7k
    0U, // AE_MULZSSD32X16_H3_L2_S2
6927
60.7k
    0U, // AE_MULZSSFD16SS_11_00
6928
60.7k
    0U, // AE_MULZSSFD16SS_11_00_S2
6929
60.7k
    0U, // AE_MULZSSFD16SS_13_02
6930
60.7k
    0U, // AE_MULZSSFD16SS_13_02_S2
6931
60.7k
    0U, // AE_MULZSSFD16SS_33_22
6932
60.7k
    0U, // AE_MULZSSFD16SS_33_22_S2
6933
60.7k
    0U, // AE_MULZSSFD24_HH_LL
6934
60.7k
    0U, // AE_MULZSSFD24_HH_LL_S2
6935
60.7k
    0U, // AE_MULZSSFD24_HL_LH
6936
60.7k
    0U, // AE_MULZSSFD24_HL_LH_S2
6937
60.7k
    0U, // AE_MULZSSFD32X16_H1_L0
6938
60.7k
    0U, // AE_MULZSSFD32X16_H1_L0_S2
6939
60.7k
    0U, // AE_MULZSSFD32X16_H3_L2
6940
60.7k
    0U, // AE_MULZSSFD32X16_H3_L2_S2
6941
60.7k
    0U, // AE_NAND
6942
60.7k
    0U, // AE_NEG16S
6943
60.7k
    0U, // AE_NEG24S
6944
60.7k
    0U, // AE_NEG32
6945
60.7k
    0U, // AE_NEG32S
6946
60.7k
    0U, // AE_NEG64
6947
60.7k
    0U, // AE_NEG64S
6948
60.7k
    0U, // AE_NSA64
6949
60.7k
    0U, // AE_NSAZ16_0
6950
60.7k
    0U, // AE_NSAZ32_L
6951
60.7k
    0U, // AE_OR
6952
60.7k
    0U, // AE_PKSR24
6953
60.7k
    0U, // AE_PKSR32
6954
60.7k
    0U, // AE_ROUND16X4F32SASYM
6955
60.7k
    0U, // AE_ROUND16X4F32SSYM
6956
60.7k
    0U, // AE_ROUND24X2F48SASYM
6957
60.7k
    0U, // AE_ROUND24X2F48SSYM
6958
60.7k
    0U, // AE_ROUND32X2F48SASYM
6959
60.7k
    0U, // AE_ROUND32X2F48SSYM
6960
60.7k
    0U, // AE_ROUND32X2F64SASYM
6961
60.7k
    0U, // AE_ROUND32X2F64SSYM
6962
60.7k
    0U, // AE_ROUNDSP16F24ASYM
6963
60.7k
    0U, // AE_ROUNDSP16F24SYM
6964
60.7k
    0U, // AE_ROUNDSP16Q48X2ASYM
6965
60.7k
    0U, // AE_ROUNDSP16Q48X2SYM
6966
60.7k
    0U, // AE_ROUNDSQ32F48ASYM
6967
60.7k
    0U, // AE_ROUNDSQ32F48SYM
6968
60.7k
    0U, // AE_S16M_L_I
6969
60.7k
    0U, // AE_S16M_L_IU
6970
60.7k
    0U, // AE_S16M_L_X
6971
60.7k
    0U, // AE_S16M_L_XC
6972
60.7k
    0U, // AE_S16M_L_XU
6973
60.7k
    0U, // AE_S16X2M_I
6974
60.7k
    0U, // AE_S16X2M_IU
6975
60.7k
    0U, // AE_S16X2M_X
6976
60.7k
    0U, // AE_S16X2M_XC
6977
60.7k
    0U, // AE_S16X2M_XU
6978
60.7k
    0U, // AE_S16X4_I
6979
60.7k
    0U, // AE_S16X4_IP
6980
60.7k
    0U, // AE_S16X4_RIC
6981
60.7k
    0U, // AE_S16X4_RIP
6982
60.7k
    0U, // AE_S16X4_X
6983
60.7k
    0U, // AE_S16X4_XC
6984
60.7k
    0U, // AE_S16X4_XP
6985
60.7k
    0U, // AE_S16_0_I
6986
60.7k
    0U, // AE_S16_0_IP
6987
60.7k
    0U, // AE_S16_0_X
6988
60.7k
    0U, // AE_S16_0_XC
6989
60.7k
    0U, // AE_S16_0_XP
6990
60.7k
    0U, // AE_S24RA64S_I
6991
60.7k
    0U, // AE_S24RA64S_IP
6992
60.7k
    0U, // AE_S24RA64S_X
6993
60.7k
    0U, // AE_S24RA64S_XC
6994
60.7k
    0U, // AE_S24RA64S_XP
6995
60.7k
    0U, // AE_S24X2RA64S_IP
6996
60.7k
    0U, // AE_S32F24_L_I
6997
60.7k
    0U, // AE_S32F24_L_IP
6998
60.7k
    0U, // AE_S32F24_L_X
6999
60.7k
    0U, // AE_S32F24_L_XC
7000
60.7k
    0U, // AE_S32F24_L_XP
7001
60.7k
    0U, // AE_S32M_I
7002
60.7k
    0U, // AE_S32M_IU
7003
60.7k
    0U, // AE_S32M_X
7004
60.7k
    0U, // AE_S32M_XC
7005
60.7k
    0U, // AE_S32M_XU
7006
60.7k
    0U, // AE_S32RA64S_I
7007
60.7k
    0U, // AE_S32RA64S_IP
7008
60.7k
    0U, // AE_S32RA64S_X
7009
60.7k
    0U, // AE_S32RA64S_XC
7010
60.7k
    0U, // AE_S32RA64S_XP
7011
60.7k
    0U, // AE_S32X2F24_I
7012
60.7k
    0U, // AE_S32X2F24_IP
7013
60.7k
    0U, // AE_S32X2F24_RIC
7014
60.7k
    0U, // AE_S32X2F24_RIP
7015
60.7k
    0U, // AE_S32X2F24_X
7016
60.7k
    0U, // AE_S32X2F24_XC
7017
60.7k
    0U, // AE_S32X2F24_XP
7018
60.7k
    0U, // AE_S32X2RA64S_IP
7019
60.7k
    0U, // AE_S32X2_I
7020
60.7k
    0U, // AE_S32X2_IP
7021
60.7k
    0U, // AE_S32X2_RIC
7022
60.7k
    0U, // AE_S32X2_RIP
7023
60.7k
    0U, // AE_S32X2_X
7024
60.7k
    0U, // AE_S32X2_XC
7025
60.7k
    0U, // AE_S32X2_XP
7026
60.7k
    0U, // AE_S32_L_I
7027
60.7k
    0U, // AE_S32_L_IP
7028
60.7k
    0U, // AE_S32_L_X
7029
60.7k
    0U, // AE_S32_L_XC
7030
60.7k
    0U, // AE_S32_L_XP
7031
60.7k
    0U, // AE_S64_I
7032
60.7k
    0U, // AE_S64_IP
7033
60.7k
    0U, // AE_S64_X
7034
60.7k
    0U, // AE_S64_XC
7035
60.7k
    0U, // AE_S64_XP
7036
60.7k
    0U, // AE_SA16X4_IC
7037
60.7k
    0U, // AE_SA16X4_IP
7038
60.7k
    0U, // AE_SA16X4_RIC
7039
60.7k
    0U, // AE_SA16X4_RIP
7040
60.7k
    0U, // AE_SA24X2_IC
7041
60.7k
    0U, // AE_SA24X2_IP
7042
60.7k
    0U, // AE_SA24X2_RIC
7043
60.7k
    0U, // AE_SA24X2_RIP
7044
60.7k
    0U, // AE_SA24_L_IC
7045
60.7k
    0U, // AE_SA24_L_IP
7046
60.7k
    0U, // AE_SA24_L_RIC
7047
60.7k
    0U, // AE_SA24_L_RIP
7048
60.7k
    0U, // AE_SA32X2F24_IC
7049
60.7k
    0U, // AE_SA32X2F24_IP
7050
60.7k
    0U, // AE_SA32X2F24_RIC
7051
60.7k
    0U, // AE_SA32X2F24_RIP
7052
60.7k
    0U, // AE_SA32X2_IC
7053
60.7k
    0U, // AE_SA32X2_IP
7054
60.7k
    0U, // AE_SA32X2_RIC
7055
60.7k
    0U, // AE_SA32X2_RIP
7056
60.7k
    0U, // AE_SA64NEG_FP
7057
60.7k
    0U, // AE_SA64POS_FP
7058
60.7k
    0U, // AE_SALIGN64_I
7059
60.7k
    0U, // AE_SAT16X4
7060
60.7k
    0U, // AE_SAT24S
7061
60.7k
    0U, // AE_SAT48S
7062
60.7k
    0U, // AE_SATQ56S
7063
60.7k
    0U, // AE_SB
7064
60.7k
    0U, // AE_SBF
7065
60.7k
    0U, // AE_SBF_IC
7066
60.7k
    0U, // AE_SBF_IP
7067
60.7k
    0U, // AE_SBI
7068
60.7k
    0U, // AE_SBI_IC
7069
60.7k
    0U, // AE_SBI_IP
7070
60.7k
    0U, // AE_SB_IC
7071
60.7k
    0U, // AE_SB_IP
7072
60.7k
    0U, // AE_SEL16I
7073
60.7k
    0U, // AE_SEL16I_N
7074
60.7k
    0U, // AE_SEXT32
7075
60.7k
    0U, // AE_SEXT32X2D16_10
7076
60.7k
    0U, // AE_SEXT32X2D16_32
7077
60.7k
    0U, // AE_SHA32
7078
60.7k
    0U, // AE_SHORTSWAP
7079
60.7k
    0U, // AE_SLAA16S
7080
60.7k
    0U, // AE_SLAA32
7081
60.7k
    0U, // AE_SLAA32S
7082
60.7k
    0U, // AE_SLAA64
7083
60.7k
    0U, // AE_SLAA64S
7084
60.7k
    0U, // AE_SLAAQ56
7085
60.7k
    0U, // AE_SLAI16S
7086
60.7k
    0U, // AE_SLAI24
7087
60.7k
    0U, // AE_SLAI24S
7088
60.7k
    0U, // AE_SLAI32
7089
60.7k
    0U, // AE_SLAI32S
7090
60.7k
    0U, // AE_SLAI64
7091
60.7k
    0U, // AE_SLAI64S
7092
60.7k
    0U, // AE_SLAISQ56S
7093
60.7k
    0U, // AE_SLAS24
7094
60.7k
    0U, // AE_SLAS24S
7095
60.7k
    0U, // AE_SLAS32
7096
60.7k
    0U, // AE_SLAS32S
7097
60.7k
    0U, // AE_SLAS64
7098
60.7k
    0U, // AE_SLAS64S
7099
60.7k
    0U, // AE_SLASQ56
7100
60.7k
    0U, // AE_SLASSQ56S
7101
60.7k
    0U, // AE_SRA64_32
7102
60.7k
    0U, // AE_SRAA16RS
7103
60.7k
    0U, // AE_SRAA16S
7104
60.7k
    0U, // AE_SRAA32
7105
60.7k
    0U, // AE_SRAA32RS
7106
60.7k
    0U, // AE_SRAA32S
7107
60.7k
    0U, // AE_SRAA64
7108
60.7k
    0U, // AE_SRAI16
7109
60.7k
    0U, // AE_SRAI16R
7110
60.7k
    0U, // AE_SRAI24
7111
60.7k
    0U, // AE_SRAI32
7112
60.7k
    0U, // AE_SRAI32R
7113
60.7k
    0U, // AE_SRAI64
7114
60.7k
    0U, // AE_SRAS24
7115
60.7k
    0U, // AE_SRAS32
7116
60.7k
    0U, // AE_SRAS64
7117
60.7k
    0U, // AE_SRLA32
7118
60.7k
    0U, // AE_SRLA64
7119
60.7k
    0U, // AE_SRLI24
7120
60.7k
    0U, // AE_SRLI32
7121
60.7k
    0U, // AE_SRLI64
7122
60.7k
    0U, // AE_SRLS24
7123
60.7k
    0U, // AE_SRLS32
7124
60.7k
    0U, // AE_SRLS64
7125
60.7k
    0U, // AE_SUB16
7126
60.7k
    0U, // AE_SUB16S
7127
60.7k
    0U, // AE_SUB24S
7128
60.7k
    0U, // AE_SUB32
7129
60.7k
    0U, // AE_SUB32S
7130
60.7k
    0U, // AE_SUB64
7131
60.7k
    0U, // AE_SUB64S
7132
60.7k
    0U, // AE_SUBADD32
7133
60.7k
    0U, // AE_SUBADD32S
7134
60.7k
    0U, // AE_TRUNCA32F64S_L
7135
60.7k
    0U, // AE_TRUNCA32X2F64S
7136
60.7k
    0U, // AE_TRUNCI32F64S_L
7137
60.7k
    0U, // AE_TRUNCI32X2F64S
7138
60.7k
    0U, // AE_VLDL16C
7139
60.7k
    0U, // AE_VLDL16C_IC
7140
60.7k
    0U, // AE_VLDL16C_IP
7141
60.7k
    0U, // AE_VLDL16T
7142
60.7k
    0U, // AE_VLDL32T
7143
60.7k
    0U, // AE_VLDSHT
7144
60.7k
    0U, // AE_VLEL16T
7145
60.7k
    0U, // AE_VLEL32T
7146
60.7k
    0U, // AE_VLES16C
7147
60.7k
    0U, // AE_VLES16C_IC
7148
60.7k
    0U, // AE_VLES16C_IP
7149
60.7k
    0U, // AE_XOR
7150
60.7k
    0U, // AE_ZALIGN64
7151
60.7k
    0U, // ALL4
7152
60.7k
    0U, // ALL8
7153
60.7k
    0U, // AND
7154
60.7k
    0U, // ANDB
7155
60.7k
    0U, // ANDBC
7156
60.7k
    0U, // ANY4
7157
60.7k
    0U, // ANY8
7158
60.7k
    0U, // BALL
7159
60.7k
    0U, // BANY
7160
60.7k
    0U, // BBC
7161
60.7k
    0U, // BBCI
7162
60.7k
    0U, // BBS
7163
60.7k
    0U, // BBSI
7164
60.7k
    0U, // BEQ
7165
60.7k
    0U, // BEQI
7166
60.7k
    0U, // BEQZ
7167
60.7k
    0U, // BF
7168
60.7k
    0U, // BGE
7169
60.7k
    0U, // BGEI
7170
60.7k
    0U, // BGEU
7171
60.7k
    0U, // BGEUI
7172
60.7k
    0U, // BGEZ
7173
60.7k
    0U, // BLT
7174
60.7k
    0U, // BLTI
7175
60.7k
    0U, // BLTU
7176
60.7k
    0U, // BLTUI
7177
60.7k
    0U, // BLTZ
7178
60.7k
    0U, // BNALL
7179
60.7k
    0U, // BNE
7180
60.7k
    0U, // BNEI
7181
60.7k
    0U, // BNEZ
7182
60.7k
    0U, // BNONE
7183
60.7k
    0U, // BREAK
7184
60.7k
    0U, // BREAK_N
7185
60.7k
    0U, // BT
7186
60.7k
    0U, // CALL0
7187
60.7k
    0U, // CALL12
7188
60.7k
    0U, // CALL4
7189
60.7k
    0U, // CALL8
7190
60.7k
    0U, // CALLX0
7191
60.7k
    0U, // CALLX12
7192
60.7k
    0U, // CALLX4
7193
60.7k
    0U, // CALLX8
7194
60.7k
    0U, // CEIL_S
7195
60.7k
    0U, // CLAMPS
7196
60.7k
    0U, // CLR_BIT_GPIO_OUT
7197
60.7k
    0U, // CONST_S
7198
60.7k
    0U, // DIV0_S
7199
60.7k
    0U, // DIVN_S
7200
60.7k
    0U, // DSYNC
7201
60.7k
    0U, // EE_ANDQ
7202
60.7k
    0U, // EE_BITREV
7203
60.7k
    0U, // EE_CLR_BIT_GPIO_OUT
7204
60.7k
    0U, // EE_CMUL_S16
7205
60.7k
    0U, // EE_CMUL_S16_LD_INCP
7206
60.7k
    0U, // EE_CMUL_S16_ST_INCP
7207
60.7k
    37U,  // EE_FFT_AMS_S16_LD_INCP
7208
60.7k
    37U,  // EE_FFT_AMS_S16_LD_INCP_UAUP
7209
60.7k
    37U,  // EE_FFT_AMS_S16_LD_R32_DECP
7210
60.7k
    0U, // EE_FFT_AMS_S16_ST_INCP
7211
60.7k
    0U, // EE_FFT_CMUL_S16_LD_XP
7212
60.7k
    6U, // EE_FFT_CMUL_S16_ST_XP
7213
60.7k
    0U, // EE_FFT_R2BF_S16
7214
60.7k
    0U, // EE_FFT_R2BF_S16_ST_INCP
7215
60.7k
    0U, // EE_FFT_VST_R32_DECP
7216
60.7k
    0U, // EE_GET_GPIO_IN
7217
60.7k
    7U, // EE_LDF_128_IP
7218
60.7k
    13U,  // EE_LDF_128_XP
7219
60.7k
    0U, // EE_LDF_64_IP
7220
60.7k
    0U, // EE_LDF_64_XP
7221
60.7k
    0U, // EE_LDQA_S16_128_IP
7222
60.7k
    0U, // EE_LDQA_S16_128_XP
7223
60.7k
    0U, // EE_LDQA_S8_128_IP
7224
60.7k
    0U, // EE_LDQA_S8_128_XP
7225
60.7k
    0U, // EE_LDQA_U16_128_IP
7226
60.7k
    0U, // EE_LDQA_U16_128_XP
7227
60.7k
    0U, // EE_LDQA_U8_128_IP
7228
60.7k
    0U, // EE_LDQA_U8_128_XP
7229
60.7k
    0U, // EE_LDXQ_32
7230
60.7k
    0U, // EE_LD_128_USAR_IP
7231
60.7k
    0U, // EE_LD_128_USAR_XP
7232
60.7k
    0U, // EE_LD_ACCX_IP
7233
60.7k
    0U, // EE_LD_QACC_H_H_32_IP
7234
60.7k
    0U, // EE_LD_QACC_H_L_128_IP
7235
60.7k
    0U, // EE_LD_QACC_L_H_32_IP
7236
60.7k
    0U, // EE_LD_QACC_L_L_128_IP
7237
60.7k
    0U, // EE_LD_UA_STATE_IP
7238
60.7k
    0U, // EE_MOVI_32_A
7239
60.7k
    0U, // EE_MOVI_32_Q
7240
60.7k
    0U, // EE_MOV_S16_QACC
7241
60.7k
    0U, // EE_MOV_S8_QACC
7242
60.7k
    0U, // EE_MOV_U16_QACC
7243
60.7k
    0U, // EE_MOV_U8_QACC
7244
60.7k
    0U, // EE_NOTQ
7245
60.7k
    0U, // EE_ORQ
7246
60.7k
    0U, // EE_SET_BIT_GPIO_OUT
7247
60.7k
    0U, // EE_SLCI_2Q
7248
60.7k
    0U, // EE_SLCXXP_2Q
7249
60.7k
    0U, // EE_SRCI_2Q
7250
60.7k
    0U, // EE_SRCMB_S16_QACC
7251
60.7k
    0U, // EE_SRCMB_S8_QACC
7252
60.7k
    0U, // EE_SRCQ_128_ST_INCP
7253
60.7k
    0U, // EE_SRCXXP_2Q
7254
60.7k
    0U, // EE_SRC_Q
7255
60.7k
    0U, // EE_SRC_Q_LD_IP
7256
60.7k
    0U, // EE_SRC_Q_LD_XP
7257
60.7k
    0U, // EE_SRC_Q_QUP
7258
60.7k
    0U, // EE_SRS_ACCX
7259
60.7k
    7U, // EE_STF_128_IP
7260
60.7k
    13U,  // EE_STF_128_XP
7261
60.7k
    0U, // EE_STF_64_IP
7262
60.7k
    0U, // EE_STF_64_XP
7263
60.7k
    0U, // EE_STXQ_32
7264
60.7k
    0U, // EE_ST_ACCX_IP
7265
60.7k
    0U, // EE_ST_QACC_H_H_32_IP
7266
60.7k
    0U, // EE_ST_QACC_H_L_128_IP
7267
60.7k
    0U, // EE_ST_QACC_L_H_32_IP
7268
60.7k
    0U, // EE_ST_QACC_L_L_128_IP
7269
60.7k
    0U, // EE_ST_UA_STATE_IP
7270
60.7k
    0U, // EE_VADDS_S16
7271
60.7k
    0U, // EE_VADDS_S16_LD_INCP
7272
60.7k
    0U, // EE_VADDS_S16_ST_INCP
7273
60.7k
    0U, // EE_VADDS_S32
7274
60.7k
    0U, // EE_VADDS_S32_LD_INCP
7275
60.7k
    0U, // EE_VADDS_S32_ST_INCP
7276
60.7k
    0U, // EE_VADDS_S8
7277
60.7k
    0U, // EE_VADDS_S8_LD_INCP
7278
60.7k
    0U, // EE_VADDS_S8_ST_INCP
7279
60.7k
    0U, // EE_VCMP_EQ_S16
7280
60.7k
    0U, // EE_VCMP_EQ_S32
7281
60.7k
    0U, // EE_VCMP_EQ_S8
7282
60.7k
    0U, // EE_VCMP_GT_S16
7283
60.7k
    0U, // EE_VCMP_GT_S32
7284
60.7k
    0U, // EE_VCMP_GT_S8
7285
60.7k
    0U, // EE_VCMP_LT_S16
7286
60.7k
    0U, // EE_VCMP_LT_S32
7287
60.7k
    0U, // EE_VCMP_LT_S8
7288
60.7k
    0U, // EE_VLDBC_16
7289
60.7k
    0U, // EE_VLDBC_16_IP
7290
60.7k
    0U, // EE_VLDBC_16_XP
7291
60.7k
    0U, // EE_VLDBC_32
7292
60.7k
    0U, // EE_VLDBC_32_IP
7293
60.7k
    0U, // EE_VLDBC_32_XP
7294
60.7k
    0U, // EE_VLDBC_8
7295
60.7k
    0U, // EE_VLDBC_8_IP
7296
60.7k
    0U, // EE_VLDBC_8_XP
7297
60.7k
    0U, // EE_VLDHBC_16_INCP
7298
60.7k
    0U, // EE_VLD_128_IP
7299
60.7k
    0U, // EE_VLD_128_XP
7300
60.7k
    0U, // EE_VLD_H_64_IP
7301
60.7k
    0U, // EE_VLD_H_64_XP
7302
60.7k
    0U, // EE_VLD_L_64_IP
7303
60.7k
    0U, // EE_VLD_L_64_XP
7304
60.7k
    0U, // EE_VMAX_S16
7305
60.7k
    0U, // EE_VMAX_S16_LD_INCP
7306
60.7k
    0U, // EE_VMAX_S16_ST_INCP
7307
60.7k
    0U, // EE_VMAX_S32
7308
60.7k
    0U, // EE_VMAX_S32_LD_INCP
7309
60.7k
    0U, // EE_VMAX_S32_ST_INCP
7310
60.7k
    0U, // EE_VMAX_S8
7311
60.7k
    0U, // EE_VMAX_S8_LD_INCP
7312
60.7k
    0U, // EE_VMAX_S8_ST_INCP
7313
60.7k
    0U, // EE_VMIN_S16
7314
60.7k
    0U, // EE_VMIN_S16_LD_INCP
7315
60.7k
    0U, // EE_VMIN_S16_ST_INCP
7316
60.7k
    0U, // EE_VMIN_S32
7317
60.7k
    0U, // EE_VMIN_S32_LD_INCP
7318
60.7k
    0U, // EE_VMIN_S32_ST_INCP
7319
60.7k
    0U, // EE_VMIN_S8
7320
60.7k
    0U, // EE_VMIN_S8_LD_INCP
7321
60.7k
    0U, // EE_VMIN_S8_ST_INCP
7322
60.7k
    0U, // EE_VMULAS_S16_ACCX
7323
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_IP
7324
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
7325
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_XP
7326
60.7k
    0U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
7327
60.7k
    0U, // EE_VMULAS_S16_QACC
7328
60.7k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP
7329
60.7k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
7330
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_IP
7331
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP
7332
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_XP
7333
60.7k
    0U, // EE_VMULAS_S16_QACC_LD_XP_QUP
7334
60.7k
    0U, // EE_VMULAS_S8_ACCX
7335
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_IP
7336
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
7337
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_XP
7338
60.7k
    0U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
7339
60.7k
    0U, // EE_VMULAS_S8_QACC
7340
60.7k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP
7341
60.7k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
7342
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_IP
7343
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP
7344
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_XP
7345
60.7k
    0U, // EE_VMULAS_S8_QACC_LD_XP_QUP
7346
60.7k
    0U, // EE_VMULAS_U16_ACCX
7347
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_IP
7348
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
7349
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_XP
7350
60.7k
    0U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
7351
60.7k
    0U, // EE_VMULAS_U16_QACC
7352
60.7k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP
7353
60.7k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
7354
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_IP
7355
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP
7356
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_XP
7357
60.7k
    0U, // EE_VMULAS_U16_QACC_LD_XP_QUP
7358
60.7k
    0U, // EE_VMULAS_U8_ACCX
7359
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_IP
7360
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
7361
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_XP
7362
60.7k
    0U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
7363
60.7k
    0U, // EE_VMULAS_U8_QACC
7364
60.7k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP
7365
60.7k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
7366
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_IP
7367
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP
7368
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_XP
7369
60.7k
    0U, // EE_VMULAS_U8_QACC_LD_XP_QUP
7370
60.7k
    0U, // EE_VMUL_S16
7371
60.7k
    0U, // EE_VMUL_S16_LD_INCP
7372
60.7k
    0U, // EE_VMUL_S16_ST_INCP
7373
60.7k
    0U, // EE_VMUL_S8
7374
60.7k
    0U, // EE_VMUL_S8_LD_INCP
7375
60.7k
    0U, // EE_VMUL_S8_ST_INCP
7376
60.7k
    0U, // EE_VMUL_U16
7377
60.7k
    0U, // EE_VMUL_U16_LD_INCP
7378
60.7k
    0U, // EE_VMUL_U16_ST_INCP
7379
60.7k
    0U, // EE_VMUL_U8
7380
60.7k
    0U, // EE_VMUL_U8_LD_INCP
7381
60.7k
    0U, // EE_VMUL_U8_ST_INCP
7382
60.7k
    0U, // EE_VPRELU_S16
7383
60.7k
    0U, // EE_VPRELU_S8
7384
60.7k
    0U, // EE_VRELU_S16
7385
60.7k
    0U, // EE_VRELU_S8
7386
60.7k
    0U, // EE_VSL_32
7387
60.7k
    0U, // EE_VSMULAS_S16_QACC
7388
60.7k
    0U, // EE_VSMULAS_S16_QACC_LD_INCP
7389
60.7k
    0U, // EE_VSMULAS_S8_QACC
7390
60.7k
    0U, // EE_VSMULAS_S8_QACC_LD_INCP
7391
60.7k
    0U, // EE_VSR_32
7392
60.7k
    0U, // EE_VST_128_IP
7393
60.7k
    0U, // EE_VST_128_XP
7394
60.7k
    0U, // EE_VST_H_64_IP
7395
60.7k
    0U, // EE_VST_H_64_XP
7396
60.7k
    0U, // EE_VST_L_64_IP
7397
60.7k
    0U, // EE_VST_L_64_XP
7398
60.7k
    0U, // EE_VSUBS_S16
7399
60.7k
    0U, // EE_VSUBS_S16_LD_INCP
7400
60.7k
    0U, // EE_VSUBS_S16_ST_INCP
7401
60.7k
    0U, // EE_VSUBS_S32
7402
60.7k
    0U, // EE_VSUBS_S32_LD_INCP
7403
60.7k
    0U, // EE_VSUBS_S32_ST_INCP
7404
60.7k
    0U, // EE_VSUBS_S8
7405
60.7k
    0U, // EE_VSUBS_S8_LD_INCP
7406
60.7k
    0U, // EE_VSUBS_S8_ST_INCP
7407
60.7k
    0U, // EE_VUNZIP_16
7408
60.7k
    0U, // EE_VUNZIP_32
7409
60.7k
    0U, // EE_VUNZIP_8
7410
60.7k
    0U, // EE_VZIP_16
7411
60.7k
    0U, // EE_VZIP_32
7412
60.7k
    0U, // EE_VZIP_8
7413
60.7k
    0U, // EE_WR_MASK_GPIO_OUT
7414
60.7k
    0U, // EE_XORQ
7415
60.7k
    0U, // EE_ZERO_ACCX
7416
60.7k
    0U, // EE_ZERO_Q
7417
60.7k
    0U, // EE_ZERO_QACC
7418
60.7k
    0U, // ENTRY
7419
60.7k
    0U, // ESYNC
7420
60.7k
    0U, // EXCW
7421
60.7k
    0U, // EXTUI
7422
60.7k
    0U, // EXTW
7423
60.7k
    0U, // FLOAT_S
7424
60.7k
    0U, // FLOOR_S
7425
60.7k
    0U, // GET_GPIO_IN
7426
60.7k
    0U, // ILL
7427
60.7k
    0U, // ILL_N
7428
60.7k
    0U, // ISYNC
7429
60.7k
    0U, // J
7430
60.7k
    0U, // JX
7431
60.7k
    0U, // L16SI
7432
60.7k
    0U, // L16UI
7433
60.7k
    0U, // L32E
7434
60.7k
    0U, // L32I
7435
60.7k
    0U, // L32I_N
7436
60.7k
    0U, // L32R
7437
60.7k
    0U, // L8UI
7438
60.7k
    0U, // LDDEC
7439
60.7k
    0U, // LDINC
7440
60.7k
    0U, // LEA_ADD
7441
60.7k
    0U, // LOOP
7442
60.7k
    0U, // LOOPGTZ
7443
60.7k
    0U, // LOOPNEZ
7444
60.7k
    0U, // LSI
7445
60.7k
    0U, // LSIP
7446
60.7k
    0U, // LSX
7447
60.7k
    0U, // LSXP
7448
60.7k
    0U, // MADDN_S
7449
60.7k
    0U, // MADD_S
7450
60.7k
    0U, // MAX
7451
60.7k
    0U, // MAXU
7452
60.7k
    0U, // MEMW
7453
60.7k
    0U, // MIN
7454
60.7k
    0U, // MINU
7455
60.7k
    0U, // MKDADJ_S
7456
60.7k
    0U, // MKSADJ_S
7457
60.7k
    0U, // MOVEQZ
7458
60.7k
    0U, // MOVEQZ_S
7459
60.7k
    0U, // MOVF
7460
60.7k
    0U, // MOVF_S
7461
60.7k
    0U, // MOVGEZ
7462
60.7k
    0U, // MOVGEZ_S
7463
60.7k
    0U, // MOVI
7464
60.7k
    0U, // MOVI_N
7465
60.7k
    0U, // MOVLTZ
7466
60.7k
    0U, // MOVLTZ_S
7467
60.7k
    0U, // MOVNEZ
7468
60.7k
    0U, // MOVNEZ_S
7469
60.7k
    0U, // MOVSP
7470
60.7k
    0U, // MOVT
7471
60.7k
    0U, // MOVT_S
7472
60.7k
    0U, // MOV_N
7473
60.7k
    0U, // MOV_S
7474
60.7k
    0U, // MSUB_S
7475
60.7k
    0U, // MUL16S
7476
60.7k
    0U, // MUL16U
7477
60.7k
    0U, // MULA_AA_HH
7478
60.7k
    0U, // MULA_AA_HL
7479
60.7k
    0U, // MULA_AA_LH
7480
60.7k
    0U, // MULA_AA_LL
7481
60.7k
    0U, // MULA_AD_HH
7482
60.7k
    0U, // MULA_AD_HL
7483
60.7k
    0U, // MULA_AD_LH
7484
60.7k
    0U, // MULA_AD_LL
7485
60.7k
    0U, // MULA_DA_HH
7486
60.7k
    0U, // MULA_DA_HH_LDDEC
7487
60.7k
    0U, // MULA_DA_HH_LDINC
7488
60.7k
    0U, // MULA_DA_HL
7489
60.7k
    0U, // MULA_DA_HL_LDDEC
7490
60.7k
    0U, // MULA_DA_HL_LDINC
7491
60.7k
    0U, // MULA_DA_LH
7492
60.7k
    0U, // MULA_DA_LH_LDDEC
7493
60.7k
    0U, // MULA_DA_LH_LDINC
7494
60.7k
    0U, // MULA_DA_LL
7495
60.7k
    0U, // MULA_DA_LL_LDDEC
7496
60.7k
    0U, // MULA_DA_LL_LDINC
7497
60.7k
    0U, // MULA_DD_HH
7498
60.7k
    0U, // MULA_DD_HH_LDDEC
7499
60.7k
    0U, // MULA_DD_HH_LDINC
7500
60.7k
    0U, // MULA_DD_HL
7501
60.7k
    0U, // MULA_DD_HL_LDDEC
7502
60.7k
    0U, // MULA_DD_HL_LDINC
7503
60.7k
    0U, // MULA_DD_LH
7504
60.7k
    0U, // MULA_DD_LH_LDDEC
7505
60.7k
    0U, // MULA_DD_LH_LDINC
7506
60.7k
    0U, // MULA_DD_LL
7507
60.7k
    0U, // MULA_DD_LL_LDDEC
7508
60.7k
    0U, // MULA_DD_LL_LDINC
7509
60.7k
    0U, // MULL
7510
60.7k
    0U, // MULSH
7511
60.7k
    0U, // MULS_AA_HH
7512
60.7k
    0U, // MULS_AA_HL
7513
60.7k
    0U, // MULS_AA_LH
7514
60.7k
    0U, // MULS_AA_LL
7515
60.7k
    0U, // MULS_AD_HH
7516
60.7k
    0U, // MULS_AD_HL
7517
60.7k
    0U, // MULS_AD_LH
7518
60.7k
    0U, // MULS_AD_LL
7519
60.7k
    0U, // MULS_DA_HH
7520
60.7k
    0U, // MULS_DA_HL
7521
60.7k
    0U, // MULS_DA_LH
7522
60.7k
    0U, // MULS_DA_LL
7523
60.7k
    0U, // MULS_DD_HH
7524
60.7k
    0U, // MULS_DD_HL
7525
60.7k
    0U, // MULS_DD_LH
7526
60.7k
    0U, // MULS_DD_LL
7527
60.7k
    0U, // MULUH
7528
60.7k
    0U, // MUL_AA_HH
7529
60.7k
    0U, // MUL_AA_HL
7530
60.7k
    0U, // MUL_AA_LH
7531
60.7k
    0U, // MUL_AA_LL
7532
60.7k
    0U, // MUL_AD_HH
7533
60.7k
    0U, // MUL_AD_HL
7534
60.7k
    0U, // MUL_AD_LH
7535
60.7k
    0U, // MUL_AD_LL
7536
60.7k
    0U, // MUL_DA_HH
7537
60.7k
    0U, // MUL_DA_HL
7538
60.7k
    0U, // MUL_DA_LH
7539
60.7k
    0U, // MUL_DA_LL
7540
60.7k
    0U, // MUL_DD_HH
7541
60.7k
    0U, // MUL_DD_HL
7542
60.7k
    0U, // MUL_DD_LH
7543
60.7k
    0U, // MUL_DD_LL
7544
60.7k
    0U, // MUL_S
7545
60.7k
    0U, // NEG
7546
60.7k
    0U, // NEG_S
7547
60.7k
    0U, // NEXP01_S
7548
60.7k
    0U, // NOP
7549
60.7k
    0U, // NSA
7550
60.7k
    0U, // NSAU
7551
60.7k
    0U, // OEQ_S
7552
60.7k
    0U, // OLE_S
7553
60.7k
    0U, // OLT_S
7554
60.7k
    0U, // OR
7555
60.7k
    0U, // ORB
7556
60.7k
    0U, // ORBC
7557
60.7k
    0U, // QUOS
7558
60.7k
    0U, // QUOU
7559
60.7k
    0U, // RECIP0_S
7560
60.7k
    0U, // REMS
7561
60.7k
    0U, // REMU
7562
60.7k
    0U, // RER
7563
60.7k
    0U, // RET
7564
60.7k
    0U, // RETW
7565
60.7k
    0U, // RETW_N
7566
60.7k
    0U, // RET_N
7567
60.7k
    0U, // RFDE
7568
60.7k
    0U, // RFE
7569
60.7k
    0U, // RFI
7570
60.7k
    0U, // RFR
7571
60.7k
    0U, // RFWO
7572
60.7k
    0U, // RFWU
7573
60.7k
    0U, // ROTW
7574
60.7k
    0U, // ROUND_S
7575
60.7k
    0U, // RSIL
7576
60.7k
    0U, // RSQRT0_S
7577
60.7k
    0U, // RSR
7578
60.7k
    0U, // RSYNC
7579
60.7k
    0U, // RUR
7580
60.7k
    0U, // RUR_ACCX_0
7581
60.7k
    0U, // RUR_ACCX_1
7582
60.7k
    0U, // RUR_AE_BITHEAD
7583
60.7k
    0U, // RUR_AE_BITPTR
7584
60.7k
    0U, // RUR_AE_BITSUSED
7585
60.7k
    0U, // RUR_AE_CBEGIN0
7586
60.7k
    0U, // RUR_AE_CEND0
7587
60.7k
    0U, // RUR_AE_CWRAP
7588
60.7k
    0U, // RUR_AE_CW_SD_NO
7589
60.7k
    0U, // RUR_AE_FIRST_TS
7590
60.7k
    0U, // RUR_AE_NEXTOFFSET
7591
60.7k
    0U, // RUR_AE_OVERFLOW
7592
60.7k
    0U, // RUR_AE_OVF_SAR
7593
60.7k
    0U, // RUR_AE_SAR
7594
60.7k
    0U, // RUR_AE_SEARCHDONE
7595
60.7k
    0U, // RUR_AE_TABLESIZE
7596
60.7k
    0U, // RUR_AE_TS_FTS_BU_BP
7597
60.7k
    0U, // RUR_FFT_BIT_WIDTH
7598
60.7k
    0U, // RUR_GPIO_OUT
7599
60.7k
    0U, // RUR_QACC_H_0
7600
60.7k
    0U, // RUR_QACC_H_1
7601
60.7k
    0U, // RUR_QACC_H_2
7602
60.7k
    0U, // RUR_QACC_H_3
7603
60.7k
    0U, // RUR_QACC_H_4
7604
60.7k
    0U, // RUR_QACC_L_0
7605
60.7k
    0U, // RUR_QACC_L_1
7606
60.7k
    0U, // RUR_QACC_L_2
7607
60.7k
    0U, // RUR_QACC_L_3
7608
60.7k
    0U, // RUR_QACC_L_4
7609
60.7k
    0U, // RUR_SAR_BYTE
7610
60.7k
    0U, // RUR_UA_STATE_0
7611
60.7k
    0U, // RUR_UA_STATE_1
7612
60.7k
    0U, // RUR_UA_STATE_2
7613
60.7k
    0U, // RUR_UA_STATE_3
7614
60.7k
    0U, // S16I
7615
60.7k
    0U, // S32C1I
7616
60.7k
    0U, // S32E
7617
60.7k
    0U, // S32I
7618
60.7k
    0U, // S32I_N
7619
60.7k
    0U, // S8I
7620
60.7k
    0U, // SET_BIT_GPIO_OUT
7621
60.7k
    0U, // SEXT
7622
60.7k
    0U, // SIMCALL
7623
60.7k
    0U, // SLL
7624
60.7k
    0U, // SLLI
7625
60.7k
    0U, // SQRT0_S
7626
60.7k
    0U, // SRA
7627
60.7k
    0U, // SRAI
7628
60.7k
    0U, // SRC
7629
60.7k
    0U, // SRL
7630
60.7k
    0U, // SRLI
7631
60.7k
    0U, // SSA8L
7632
60.7k
    0U, // SSAI
7633
60.7k
    0U, // SSI
7634
60.7k
    0U, // SSIP
7635
60.7k
    0U, // SSL
7636
60.7k
    0U, // SSR
7637
60.7k
    0U, // SSX
7638
60.7k
    0U, // SSXP
7639
60.7k
    0U, // SUB
7640
60.7k
    0U, // SUBX2
7641
60.7k
    0U, // SUBX4
7642
60.7k
    0U, // SUBX8
7643
60.7k
    0U, // SUB_S
7644
60.7k
    0U, // SYSCALL
7645
60.7k
    0U, // TRUNC_S
7646
60.7k
    0U, // UEQ_S
7647
60.7k
    0U, // UFLOAT_S
7648
60.7k
    0U, // ULE_S
7649
60.7k
    0U, // ULT_S
7650
60.7k
    0U, // UMUL_AA_HH
7651
60.7k
    0U, // UMUL_AA_HL
7652
60.7k
    0U, // UMUL_AA_LH
7653
60.7k
    0U, // UMUL_AA_LL
7654
60.7k
    0U, // UN_S
7655
60.7k
    0U, // UTRUNC_S
7656
60.7k
    0U, // WAITI
7657
60.7k
    0U, // WDTLB
7658
60.7k
    0U, // WER
7659
60.7k
    0U, // WFR
7660
60.7k
    0U, // WITLB
7661
60.7k
    0U, // WR_MASK_GPIO_OUT
7662
60.7k
    0U, // WSR
7663
60.7k
    0U, // WUR
7664
60.7k
    0U, // WUR_ACCX_0
7665
60.7k
    0U, // WUR_ACCX_1
7666
60.7k
    0U, // WUR_AE_BITHEAD
7667
60.7k
    0U, // WUR_AE_BITPTR
7668
60.7k
    0U, // WUR_AE_BITSUSED
7669
60.7k
    0U, // WUR_AE_CBEGIN0
7670
60.7k
    0U, // WUR_AE_CEND0
7671
60.7k
    0U, // WUR_AE_CWRAP
7672
60.7k
    0U, // WUR_AE_CW_SD_NO
7673
60.7k
    0U, // WUR_AE_FIRST_TS
7674
60.7k
    0U, // WUR_AE_NEXTOFFSET
7675
60.7k
    0U, // WUR_AE_OVERFLOW
7676
60.7k
    0U, // WUR_AE_OVF_SAR
7677
60.7k
    0U, // WUR_AE_SAR
7678
60.7k
    0U, // WUR_AE_SEARCHDONE
7679
60.7k
    0U, // WUR_AE_TABLESIZE
7680
60.7k
    0U, // WUR_AE_TS_FTS_BU_BP
7681
60.7k
    0U, // WUR_FCR
7682
60.7k
    0U, // WUR_FFT_BIT_WIDTH
7683
60.7k
    0U, // WUR_FSR
7684
60.7k
    0U, // WUR_GPIO_OUT
7685
60.7k
    0U, // WUR_QACC_H_0
7686
60.7k
    0U, // WUR_QACC_H_1
7687
60.7k
    0U, // WUR_QACC_H_2
7688
60.7k
    0U, // WUR_QACC_H_3
7689
60.7k
    0U, // WUR_QACC_H_4
7690
60.7k
    0U, // WUR_QACC_L_0
7691
60.7k
    0U, // WUR_QACC_L_1
7692
60.7k
    0U, // WUR_QACC_L_2
7693
60.7k
    0U, // WUR_QACC_L_3
7694
60.7k
    0U, // WUR_QACC_L_4
7695
60.7k
    0U, // WUR_SAR_BYTE
7696
60.7k
    0U, // WUR_UA_STATE_0
7697
60.7k
    0U, // WUR_UA_STATE_1
7698
60.7k
    0U, // WUR_UA_STATE_2
7699
60.7k
    0U, // WUR_UA_STATE_3
7700
60.7k
    0U, // XOR
7701
60.7k
    0U, // XORB
7702
60.7k
    0U, // XSR
7703
60.7k
    0U, // _L32I
7704
60.7k
    0U, // _L32I_N
7705
60.7k
    0U, // _MOVI
7706
60.7k
    0U, // _S32I
7707
60.7k
    0U, // _S32I_N
7708
60.7k
    0U, // _SLLI
7709
60.7k
    0U, // _SRLI
7710
60.7k
    0U, // mv_QR
7711
60.7k
  };
7712
7713
  // Emit the opcode for the instruction.
7714
60.7k
  uint64_t Bits = 0;
7715
60.7k
  Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0;
7716
60.7k
  Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32;
7717
60.7k
  Bits |= (uint64_t)OpInfo2[MCInst_getOpcode(MI)] << 48;
7718
60.7k
  MnemonicBitsInfo MBI = {
7719
60.7k
#ifndef CAPSTONE_DIET
7720
60.7k
    AsmStrs+(Bits & 32767)-1,
7721
#else
7722
    NULL,
7723
#endif // CAPSTONE_DIET
7724
60.7k
    Bits
7725
60.7k
  };
7726
60.7k
  return MBI;
7727
60.7k
}
7728
7729
/// printInstruction - This method is automatically generated by tablegen
7730
/// from the instruction set description.
7731
60.7k
static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
7732
60.7k
  SStream_concat0(O, "");
7733
60.7k
  MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O);
7734
7735
60.7k
  SStream_concat0(O, MnemonicInfo.first);
7736
7737
60.7k
  uint64_t Bits = MnemonicInfo.second;
7738
60.7k
  CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction.");
7739
7740
  // Fragment 0 encoded into 4 bits for 13 unique commands.
7741
60.7k
  switch ((Bits >> 15) & 15) {
7742
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7743
3.00k
  case 0:
7744
    // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
7745
3.00k
    return;
7746
0
    break;
7747
44.8k
  case 1:
7748
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7749
44.8k
    printOperand(MI, 0, O);
7750
44.8k
    break;
7751
0
  case 2:
7752
    // EE_ANDQ_P, EE_BITREV_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_...
7753
0
    printImm8_AsmOperand(MI, 0, O);
7754
0
    break;
7755
0
  case 3:
7756
    // LOOPEND
7757
0
    printBranchTarget(MI, 0, O);
7758
0
    return;
7759
0
    break;
7760
5.89k
  case 4:
7761
    // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DBI, AE_DBI_IC, AE_DBI_IP, AE_DB_IC, AE...
7762
5.89k
    printOperand(MI, 1, O);
7763
5.89k
    break;
7764
1.35k
  case 5:
7765
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
7766
1.35k
    printOperand(MI, 2, O);
7767
1.35k
    SStream_concat0(O, ", ");
7768
1.35k
    printOperand(MI, 3, O);
7769
1.35k
    break;
7770
403
  case 6:
7771
    // BREAK, BREAK_N, RFI, WAITI
7772
403
    printUimm4_AsmOperand(MI, 0, O);
7773
403
    break;
7774
2.90k
  case 7:
7775
    // CALL0, CALL12, CALL4, CALL8
7776
2.90k
    printCallOperand(MI, 0, O);
7777
2.90k
    return;
7778
0
    break;
7779
327
  case 8:
7780
    // CLR_BIT_GPIO_OUT, EE_CLR_BIT_GPIO_OUT, EE_SET_BIT_GPIO_OUT, SET_BIT_GP...
7781
327
    printSelect_256_AsmOperand(MI, 0, O);
7782
327
    return;
7783
0
    break;
7784
124
  case 9:
7785
    // EE_FFT_AMS_S16_ST_INCP, EE_SLCXXP_2Q, EE_SRCXXP_2Q
7786
124
    printOperand(MI, 3, O);
7787
124
    SStream_concat0(O, ", ");
7788
124
    break;
7789
1.30k
  case 10:
7790
    // J
7791
1.30k
    printJumpTarget(MI, 0, O);
7792
1.30k
    return;
7793
0
    break;
7794
175
  case 11:
7795
    // ROTW
7796
175
    printImm8n_7_AsmOperand(MI, 0, O);
7797
175
    return;
7798
0
    break;
7799
453
  case 12:
7800
    // SSAI
7801
453
    printUimm5_AsmOperand(MI, 0, O);
7802
453
    return;
7803
0
    break;
7804
60.7k
  }
7805
7806
7807
  // Fragment 1 encoded into 2 bits for 4 unique commands.
7808
52.5k
  switch ((Bits >> 19) & 3) {
7809
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7810
51.1k
  case 0:
7811
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7812
51.1k
    SStream_concat0(O, ", ");
7813
51.1k
    break;
7814
1.34k
  case 1:
7815
    // EE_MOV_S16_QACC_P, EE_MOV_S8_QACC_P, EE_MOV_U16_QACC_P, EE_MOV_U8_QACC...
7816
1.34k
    return;
7817
0
    break;
7818
97
  case 2:
7819
    // EE_FFT_AMS_S16_ST_INCP
7820
97
    printOperand(MI, 0, O);
7821
97
    SStream_concat0(O, ", ");
7822
97
    printOperand(MI, 4, O);
7823
97
    SStream_concat0(O, ", ");
7824
97
    printOperand(MI, 5, O);
7825
97
    SStream_concat0(O, ", ");
7826
97
    printOperand(MI, 6, O);
7827
97
    SStream_concat0(O, ", ");
7828
97
    printOperand(MI, 7, O);
7829
97
    SStream_concat0(O, ", ");
7830
97
    printOperand(MI, 8, O);
7831
97
    SStream_concat0(O, ", ");
7832
97
    printSelect_2_AsmOperand(MI, 9, O);
7833
97
    return;
7834
0
    break;
7835
27
  case 3:
7836
    // EE_SLCXXP_2Q, EE_SRCXXP_2Q
7837
27
    printOperand(MI, 4, O);
7838
27
    SStream_concat0(O, ", ");
7839
27
    printOperand(MI, 5, O);
7840
27
    SStream_concat0(O, ", ");
7841
27
    printOperand(MI, 6, O);
7842
27
    return;
7843
0
    break;
7844
52.5k
  }
7845
7846
7847
  // Fragment 2 encoded into 5 bits for 29 unique commands.
7848
51.1k
  switch ((Bits >> 21) & 31) {
7849
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7850
18.9k
  case 0:
7851
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7852
18.9k
    printOperand(MI, 1, O);
7853
18.9k
    break;
7854
0
  case 1:
7855
    // EE_ANDQ_P, EE_CMUL_S16_P, EE_FFT_AMS_S16_ST_INCP_P, EE_FFT_CMUL_S16_ST...
7856
0
    printImm8_AsmOperand(MI, 1, O);
7857
0
    break;
7858
0
  case 2:
7859
    // EE_LDQA_S16_128_IP_P, EE_LDQA_S8_128_IP_P, EE_LDQA_U16_128_IP_P, EE_LD...
7860
0
    printOffset_256_16_AsmOperand(MI, 1, O);
7861
0
    return;
7862
0
    break;
7863
0
  case 3:
7864
    // EE_LD_ACCX_IP_P, EE_ST_ACCX_IP_P
7865
0
    printOffset_256_8_AsmOperand(MI, 1, O);
7866
0
    return;
7867
0
    break;
7868
0
  case 4:
7869
    // EE_LD_QACC_H_H_32_IP_P, EE_LD_QACC_L_H_32_IP_P, EE_ST_QACC_H_H_32_IP_P...
7870
0
    printOffset_256_4_AsmOperand(MI, 1, O);
7871
0
    return;
7872
0
    break;
7873
8.62k
  case 5:
7874
    // L8I_P, RESTORE_BOOL, SPILL_BOOL, L16SI, L16UI, L32I, L32I_N, L8UI, LEA...
7875
8.62k
    printMemOperand(MI, 1, O);
7876
8.62k
    return;
7877
0
    break;
7878
1.47k
  case 6:
7879
    // LOOPBR, LOOPSTART, BEQZ, BF, BGEZ, BLTZ, BNEZ, BT
7880
1.47k
    printBranchTarget(MI, 1, O);
7881
1.47k
    return;
7882
0
    break;
7883
7.89k
  case 7:
7884
    // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DB_IC, AE_DB_IP, AE_DIV64D32_H, AE_DIV6...
7885
7.89k
    printOperand(MI, 2, O);
7886
7.89k
    break;
7887
0
  case 8:
7888
    // AE_DBI, AE_DBI_IC, AE_DBI_IP
7889
0
    printImm1_16_AsmOperand(MI, 2, O);
7890
0
    return;
7891
0
    break;
7892
3.81k
  case 9:
7893
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
7894
3.81k
    printOperand(MI, 3, O);
7895
3.81k
    SStream_concat0(O, ", ");
7896
3.81k
    break;
7897
0
  case 10:
7898
    // AE_LBI, AE_LBSI
7899
0
    printImm1_16_AsmOperand(MI, 1, O);
7900
0
    return;
7901
0
    break;
7902
0
  case 11:
7903
    // AE_MOVI
7904
0
    printImmOperand_minus16_47_1(MI, 1, O);
7905
0
    return;
7906
0
    break;
7907
111
  case 12:
7908
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
7909
111
    printOperand(MI, 4, O);
7910
111
    break;
7911
525
  case 13:
7912
    // BBCI, BBSI
7913
525
    printUimm5_AsmOperand(MI, 1, O);
7914
525
    SStream_concat0(O, ", ");
7915
525
    printBranchTarget(MI, 2, O);
7916
525
    return;
7917
0
    break;
7918
1.04k
  case 14:
7919
    // BEQI, BGEI, BLTI, BNEI
7920
1.04k
    printB4const_AsmOperand(MI, 1, O);
7921
1.04k
    SStream_concat0(O, ", ");
7922
1.04k
    printBranchTarget(MI, 2, O);
7923
1.04k
    return;
7924
0
    break;
7925
345
  case 15:
7926
    // BGEUI, BLTUI
7927
345
    printB4constu_AsmOperand(MI, 1, O);
7928
345
    SStream_concat0(O, ", ");
7929
345
    printBranchTarget(MI, 2, O);
7930
345
    return;
7931
0
    break;
7932
299
  case 16:
7933
    // BREAK, CONST_S, RSIL
7934
299
    printUimm4_AsmOperand(MI, 1, O);
7935
299
    return;
7936
0
    break;
7937
252
  case 17:
7938
    // EE_LDQA_S16_128_IP, EE_LDQA_S8_128_IP, EE_LDQA_U16_128_IP, EE_LDQA_U8_...
7939
252
    printOffset_256_16_AsmOperand(MI, 2, O);
7940
252
    return;
7941
0
    break;
7942
46
  case 18:
7943
    // EE_LD_ACCX_IP, EE_ST_ACCX_IP
7944
46
    printOffset_256_8_AsmOperand(MI, 2, O);
7945
46
    return;
7946
0
    break;
7947
61
  case 19:
7948
    // EE_LD_QACC_H_H_32_IP, EE_LD_QACC_L_H_32_IP, EE_ST_QACC_H_H_32_IP, EE_S...
7949
61
    printOffset_256_4_AsmOperand(MI, 2, O);
7950
61
    return;
7951
0
    break;
7952
1.02k
  case 20:
7953
    // EE_MOVI_32_A, WSR, WUR
7954
1.02k
    printOperand(MI, 0, O);
7955
1.02k
    break;
7956
477
  case 21:
7957
    // EE_SLCI_2Q, EE_SRCI_2Q
7958
477
    printSelect_16_AsmOperand(MI, 4, O);
7959
477
    return;
7960
0
    break;
7961
372
  case 22:
7962
    // ENTRY
7963
372
    printEntry_Imm12_AsmOperand(MI, 1, O);
7964
372
    return;
7965
0
    break;
7966
3.53k
  case 23:
7967
    // L32R
7968
3.53k
    printL32RTarget(MI, 1, O);
7969
3.53k
    return;
7970
0
    break;
7971
220
  case 24:
7972
    // LOOP, LOOPGTZ, LOOPNEZ
7973
220
    printLoopTarget(MI, 1, O);
7974
220
    return;
7975
0
    break;
7976
566
  case 25:
7977
    // MOVI
7978
566
    printImm12m_AsmOperand(MI, 1, O);
7979
566
    return;
7980
0
    break;
7981
1.21k
  case 26:
7982
    // MOVI_N
7983
1.21k
    printImm32n_95_AsmOperand(MI, 1, O);
7984
1.21k
    return;
7985
0
    break;
7986
311
  case 27:
7987
    // S32C1I
7988
311
    printMemOperand(MI, 2, O);
7989
311
    return;
7990
0
    break;
7991
0
  case 28:
7992
    // _MOVI
7993
0
    printImm12_AsmOperand(MI, 1, O);
7994
0
    return;
7995
0
    break;
7996
51.1k
  }
7997
7998
7999
  // Fragment 3 encoded into 3 bits for 6 unique commands.
8000
31.7k
  switch ((Bits >> 26) & 7) {
8001
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8002
23.9k
  case 0:
8003
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
8004
23.9k
    SStream_concat0(O, ", ");
8005
23.9k
    break;
8006
4.00k
  case 1:
8007
    // BR_JT, EE_BITREV_P, EE_LDQA_S16_128_XP_P, EE_LDQA_S8_128_XP_P, EE_LDQA...
8008
4.00k
    return;
8009
0
    break;
8010
1.11k
  case 2:
8011
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
8012
1.11k
    printOperand(MI, 4, O);
8013
1.11k
    break;
8014
231
  case 3:
8015
    // EE_CMUL_S16_LD_INCP, EE_VADDS_S16_LD_INCP, EE_VADDS_S32_LD_INCP, EE_VA...
8016
231
    printOperand(MI, 2, O);
8017
231
    SStream_concat0(O, ", ");
8018
231
    printOperand(MI, 4, O);
8019
231
    SStream_concat0(O, ", ");
8020
231
    printOperand(MI, 5, O);
8021
231
    break;
8022
85
  case 4:
8023
    // EE_SRC_Q_LD_IP
8024
85
    printOffset_256_16_AsmOperand(MI, 4, O);
8025
85
    SStream_concat0(O, ", ");
8026
85
    printOperand(MI, 5, O);
8027
85
    SStream_concat0(O, ", ");
8028
85
    printOperand(MI, 6, O);
8029
85
    return;
8030
0
    break;
8031
2.38k
  case 5:
8032
    // EE_VMULAS_S16_ACCX_LD_IP_QUP, EE_VMULAS_S16_QACC_LD_IP_QUP, EE_VMULAS_...
8033
2.38k
    printOffset_64_16_AsmOperand(MI, 4, O);
8034
2.38k
    SStream_concat0(O, ", ");
8035
2.38k
    printOperand(MI, 5, O);
8036
2.38k
    SStream_concat0(O, ", ");
8037
2.38k
    printOperand(MI, 6, O);
8038
2.38k
    SStream_concat0(O, ", ");
8039
2.38k
    printOperand(MI, 7, O);
8040
2.38k
    SStream_concat0(O, ", ");
8041
2.38k
    printOperand(MI, 8, O);
8042
2.38k
    return;
8043
0
    break;
8044
31.7k
  }
8045
8046
8047
  // Fragment 4 encoded into 6 bits for 45 unique commands.
8048
25.2k
  switch ((Bits >> 29) & 63) {
8049
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8050
6.83k
  case 0:
8051
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
8052
6.83k
    printOperand(MI, 2, O);
8053
6.83k
    break;
8054
322
  case 1:
8055
    // EE_ANDQ_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_S16_ST_INCP_P...
8056
322
    printImm8_AsmOperand(MI, 2, O);
8057
322
    break;
8058
394
  case 2:
8059
    // EE_FFT_VST_R32_DECP_P, EE_SRCMB_S16_QACC_P, EE_SRCMB_S8_QACC_P, EE_SRS...
8060
394
    printSelect_2_AsmOperand(MI, 2, O);
8061
394
    return;
8062
0
    break;
8063
0
  case 3:
8064
    // EE_LD_128_USAR_IP_P, EE_SRC_Q_LD_IP_P, EE_VLD_128_IP_P, EE_VST_128_IP_...
8065
0
    printOffset_256_16_AsmOperand(MI, 2, O);
8066
0
    break;
8067
235
  case 4:
8068
    // EE_MOVI_32_A_P, EE_MOVI_32_Q_P, EE_MOVI_32_A, EE_MOVI_32_Q
8069
235
    printSelect_4_AsmOperand(MI, 2, O);
8070
235
    return;
8071
0
    break;
8072
38
  case 5:
8073
    // EE_SLCI_2Q_P, EE_SRCI_2Q_P, EE_VSMULAS_S8_QACC_P, EE_VSMULAS_S8_QACC
8074
38
    printSelect_16_AsmOperand(MI, 2, O);
8075
38
    return;
8076
0
    break;
8077
0
  case 6:
8078
    // EE_VLDBC_16_IP_P
8079
0
    printOffset_128_2_AsmOperand(MI, 2, O);
8080
0
    return;
8081
0
    break;
8082
0
  case 7:
8083
    // EE_VLDBC_32_IP_P
8084
0
    printOffset_256_4_AsmOperand(MI, 2, O);
8085
0
    return;
8086
0
    break;
8087
0
  case 8:
8088
    // EE_VLDBC_8_IP_P
8089
0
    printOffset_128_1_AsmOperand(MI, 2, O);
8090
0
    return;
8091
0
    break;
8092
0
  case 9:
8093
    // EE_VLD_H_64_IP_P, EE_VLD_L_64_IP_P, EE_VST_H_64_IP_P, EE_VST_L_64_IP_P
8094
0
    printOffset_256_8_AsmOperand(MI, 2, O);
8095
0
    return;
8096
0
    break;
8097
0
  case 10:
8098
    // EE_VMULAS_S16_ACCX_LD_IP_P, EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_...
8099
0
    printOffset_64_16_AsmOperand(MI, 2, O);
8100
0
    SStream_concat0(O, ", ");
8101
0
    printImm8_AsmOperand(MI, 3, O);
8102
0
    SStream_concat0(O, ", ");
8103
0
    printImm8_AsmOperand(MI, 4, O);
8104
0
    break;
8105
186
  case 11:
8106
    // EE_VSMULAS_S16_QACC_P, EE_VSMULAS_S16_QACC
8107
186
    printSelect_8_AsmOperand(MI, 2, O);
8108
186
    return;
8109
0
    break;
8110
3.72k
  case 12:
8111
    // ADDI_N
8112
3.72k
    printImm1n_15_AsmOperand(MI, 2, O);
8113
3.72k
    return;
8114
0
    break;
8115
250
  case 13:
8116
    // ADDMI
8117
250
    printImm8_sh8_AsmOperand(MI, 2, O);
8118
250
    return;
8119
0
    break;
8120
0
  case 14:
8121
    // AE_L16M_I, AE_L16_I, AE_S16M_L_I, AE_S16_0_I
8122
0
    printImmOperand_minus16_14_2(MI, 2, O);
8123
0
    return;
8124
0
    break;
8125
0
  case 15:
8126
    // AE_L16M_IU, AE_L16_IP, AE_S16M_L_IU, AE_S16_0_IP
8127
0
    printImmOperand_minus16_14_2(MI, 3, O);
8128
0
    return;
8129
0
    break;
8130
5.28k
  case 16:
8131
    // AE_L16M_XC, AE_L16M_XU, AE_L16X2M_XC, AE_L16X2M_XU, AE_L16X4_XC, AE_L1...
8132
5.28k
    printOperand(MI, 3, O);
8133
5.28k
    break;
8134
3
  case 17:
8135
    // AE_L16X2M_I, AE_L32F24_I, AE_L32M_I, AE_L32_I, AE_S16X2M_I, AE_S24RA64...
8136
3
    printImmOperand_minus32_28_4(MI, 2, O);
8137
3
    return;
8138
0
    break;
8139
9
  case 18:
8140
    // AE_L16X2M_IU, AE_L32F24_IP, AE_L32M_IU, AE_L32_IP, AE_S16X2M_IU, AE_S2...
8141
9
    printImmOperand_minus32_28_4(MI, 3, O);
8142
9
    return;
8143
0
    break;
8144
4
  case 19:
8145
    // AE_L16X4_I, AE_L32X2F24_I, AE_L32X2_I, AE_L64_I, AE_LALIGN64_I, AE_S16...
8146
4
    printImmOperand_minus64_56_8(MI, 2, O);
8147
4
    return;
8148
0
    break;
8149
0
  case 20:
8150
    // AE_L16X4_IP, AE_L32X2F24_IP, AE_L32X2_IP, AE_S16X4_IP, AE_S32X2F24_IP,...
8151
0
    printImmOperand_0_56_8(MI, 3, O);
8152
0
    return;
8153
0
    break;
8154
0
  case 21:
8155
    // AE_L64_IP, AE_S64_IP
8156
0
    printImmOperand_minus64_56_8(MI, 3, O);
8157
0
    return;
8158
0
    break;
8159
65
  case 22:
8160
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
8161
65
    return;
8162
0
    break;
8163
0
  case 23:
8164
    // AE_LBKI
8165
0
    printImm1_16_AsmOperand(MI, 2, O);
8166
0
    return;
8167
0
    break;
8168
0
  case 24:
8169
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
8170
0
    printOperand(MI, 5, O);
8171
0
    break;
8172
0
  case 25:
8173
    // AE_PKSR24, AE_PKSR32
8174
0
    printImmOperand_0_3_1(MI, 3, O);
8175
0
    return;
8176
0
    break;
8177
0
  case 26:
8178
    // AE_SBI, AE_SBI_IC, AE_SBI_IP
8179
0
    printImm1_16_AsmOperand(MI, 3, O);
8180
0
    return;
8181
0
    break;
8182
80
  case 27:
8183
    // AE_SEXT32, CLAMPS, SEXT
8184
80
    printImm7_22_AsmOperand(MI, 2, O);
8185
80
    return;
8186
0
    break;
8187
414
  case 28:
8188
    // AE_SLAI16S, AE_SRAI16, AE_SRAI16R, CEIL_S, FLOAT_S, FLOOR_S, ROUND_S, ...
8189
414
    printUimm4_AsmOperand(MI, 2, O);
8190
414
    return;
8191
0
    break;
8192
1.46k
  case 29:
8193
    // AE_SLAI24, AE_SLAI24S, AE_SLAI32, AE_SLAI32S, AE_SRAI24, AE_SRAI32, AE...
8194
1.46k
    printUimm5_AsmOperand(MI, 2, O);
8195
1.46k
    break;
8196
0
  case 30:
8197
    // AE_SLAI64, AE_SLAI64S, AE_SLAISQ56S, AE_SRAI64, AE_SRLI64
8198
0
    printImmOperand_0_63_1(MI, 2, O);
8199
0
    return;
8200
0
    break;
8201
1.12k
  case 31:
8202
    // BALL, BANY, BBC, BBS, BEQ, BGE, BGEU, BLT, BLTU, BNALL, BNE, BNONE
8203
1.12k
    printBranchTarget(MI, 2, O);
8204
1.12k
    return;
8205
0
    break;
8206
1.28k
  case 32:
8207
    // EE_CMUL_S16_LD_INCP, EE_FFT_CMUL_S16_LD_XP, EE_SRC_Q_LD_XP, EE_VMULAS_...
8208
1.28k
    SStream_concat0(O, ", ");
8209
1.28k
    break;
8210
74
  case 33:
8211
    // EE_CMUL_S16_ST_INCP, EE_VADDS_S16_ST_INCP, EE_VADDS_S32_ST_INCP, EE_VA...
8212
74
    printOperand(MI, 4, O);
8213
74
    SStream_concat0(O, ", ");
8214
74
    printOperand(MI, 5, O);
8215
74
    break;
8216
3
  case 34:
8217
    // EE_FFT_VST_R32_DECP
8218
3
    printSelect_2_AsmOperand(MI, 3, O);
8219
3
    return;
8220
0
    break;
8221
529
  case 35:
8222
    // EE_LD_128_USAR_IP, EE_VLD_128_IP, EE_VST_128_IP
8223
529
    printOffset_256_16_AsmOperand(MI, 3, O);
8224
529
    return;
8225
0
    break;
8226
110
  case 36:
8227
    // EE_VLDBC_16_IP
8228
110
    printOffset_128_2_AsmOperand(MI, 3, O);
8229
110
    return;
8230
0
    break;
8231
89
  case 37:
8232
    // EE_VLDBC_32_IP
8233
89
    printOffset_256_4_AsmOperand(MI, 3, O);
8234
89
    return;
8235
0
    break;
8236
142
  case 38:
8237
    // EE_VLDBC_8_IP
8238
142
    printOffset_128_1_AsmOperand(MI, 3, O);
8239
142
    return;
8240
0
    break;
8241
812
  case 39:
8242
    // EE_VLD_H_64_IP, EE_VLD_L_64_IP, EE_VST_H_64_IP, EE_VST_L_64_IP
8243
812
    printOffset_256_8_AsmOperand(MI, 3, O);
8244
812
    return;
8245
0
    break;
8246
122
  case 40:
8247
    // EE_VMULAS_S16_ACCX_LD_IP, EE_VMULAS_S16_QACC_LD_IP, EE_VMULAS_S8_ACCX_...
8248
122
    printOffset_64_16_AsmOperand(MI, 3, O);
8249
122
    SStream_concat0(O, ", ");
8250
122
    printOperand(MI, 4, O);
8251
122
    SStream_concat0(O, ", ");
8252
122
    printOperand(MI, 5, O);
8253
122
    return;
8254
0
    break;
8255
179
  case 41:
8256
    // L32E, S32E
8257
179
    printImm64n_4n_AsmOperand(MI, 2, O);
8258
179
    return;
8259
0
    break;
8260
760
  case 42:
8261
    // LSIP, SSIP
8262
760
    printOffset8m32_AsmOperand(MI, 3, O);
8263
760
    return;
8264
0
    break;
8265
747
  case 43:
8266
    // SLLI
8267
747
    printShimm0_31_AsmOperand(MI, 2, O);
8268
747
    return;
8269
0
    break;
8270
0
  case 44:
8271
    // _SLLI
8272
0
    printShimm1_31_AsmOperand(MI, 2, O);
8273
0
    return;
8274
0
    break;
8275
25.2k
  }
8276
8277
8278
  // Fragment 5 encoded into 3 bits for 5 unique commands.
8279
15.2k
  switch ((Bits >> 35) & 7) {
8280
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8281
5.26k
  case 0:
8282
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, BRCC_...
8283
5.26k
    SStream_concat0(O, ", ");
8284
5.26k
    break;
8285
8.71k
  case 1:
8286
    // ATOMIC_LOAD_ADD_16_P, ATOMIC_LOAD_ADD_32_P, ATOMIC_LOAD_ADD_8_P, ATOMI...
8287
8.71k
    return;
8288
0
    break;
8289
176
  case 2:
8290
    // EE_CMUL_S16_LD_INCP
8291
176
    printSelect_4_AsmOperand(MI, 6, O);
8292
176
    return;
8293
0
    break;
8294
244
  case 3:
8295
    // EE_FFT_CMUL_S16_LD_XP
8296
244
    printOperand(MI, 2, O);
8297
244
    SStream_concat0(O, ", ");
8298
244
    printOperand(MI, 5, O);
8299
244
    SStream_concat0(O, ", ");
8300
244
    printOperand(MI, 6, O);
8301
244
    SStream_concat0(O, ", ");
8302
244
    printSelect_8_AsmOperand(MI, 7, O);
8303
244
    return;
8304
0
    break;
8305
862
  case 4:
8306
    // EE_SRC_Q_LD_XP, EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_...
8307
862
    printOperand(MI, 5, O);
8308
862
    SStream_concat0(O, ", ");
8309
862
    printOperand(MI, 6, O);
8310
862
    break;
8311
15.2k
  }
8312
8313
8314
  // Fragment 6 encoded into 4 bits for 15 unique commands.
8315
6.12k
  switch ((Bits >> 38) & 15) {
8316
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8317
782
  case 0:
8318
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_FF...
8319
782
    printOperand(MI, 3, O);
8320
782
    break;
8321
0
  case 1:
8322
    // BRCC_FP
8323
0
    printBranchTarget(MI, 3, O);
8324
0
    return;
8325
0
    break;
8326
0
  case 2:
8327
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8328
0
    printImm8_AsmOperand(MI, 3, O);
8329
0
    break;
8330
227
  case 3:
8331
    // EE_CMUL_S16_P, EE_LDXQ_32_P, EE_STXQ_32_P, EE_CMUL_S16, EE_LDXQ_32, EE...
8332
227
    printSelect_4_AsmOperand(MI, 3, O);
8333
227
    break;
8334
0
  case 4:
8335
    // EE_LDF_64_IP_P, EE_STF_64_IP_P
8336
0
    printOffset_256_8_AsmOperand(MI, 3, O);
8337
0
    return;
8338
0
    break;
8339
0
  case 5:
8340
    // EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_S16_QACC_LD_IP_QUP_P, EE_VMU...
8341
0
    printImm8_AsmOperand(MI, 5, O);
8342
0
    SStream_concat0(O, ", ");
8343
0
    printImm8_AsmOperand(MI, 6, O);
8344
0
    return;
8345
0
    break;
8346
0
  case 6:
8347
    // AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L, AE_MULAFD32X16X2_FIR_HH, AE_...
8348
0
    printOperand(MI, 6, O);
8349
0
    return;
8350
0
    break;
8351
0
  case 7:
8352
    // AE_SEL16I, AE_TRUNCI32F64S_L, AE_TRUNCI32X2F64S
8353
0
    printUimm4_AsmOperand(MI, 3, O);
8354
0
    return;
8355
0
    break;
8356
0
  case 8:
8357
    // AE_SEL16I_N
8358
0
    printImmOperand_0_3_1(MI, 3, O);
8359
0
    return;
8360
0
    break;
8361
56
  case 9:
8362
    // EE_CMUL_S16_ST_INCP
8363
56
    printSelect_4_AsmOperand(MI, 6, O);
8364
56
    return;
8365
0
    break;
8366
3.13k
  case 10:
8367
    // EE_FFT_CMUL_S16_ST_XP, EE_FFT_R2BF_S16_ST_INCP, EE_LDF_64_XP, EE_STF_1...
8368
3.13k
    printOperand(MI, 4, O);
8369
3.13k
    break;
8370
314
  case 11:
8371
    // EE_LDF_64_IP, EE_STF_64_IP
8372
314
    printOffset_256_8_AsmOperand(MI, 4, O);
8373
314
    return;
8374
0
    break;
8375
7
  case 12:
8376
    // EE_SRC_Q_LD_XP
8377
7
    return;
8378
0
    break;
8379
855
  case 13:
8380
    // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_INCP_QUP, EE_VMU...
8381
855
    SStream_concat0(O, ", ");
8382
855
    printOperand(MI, 7, O);
8383
855
    break;
8384
752
  case 14:
8385
    // EXTUI
8386
752
    printImm1_16_AsmOperand(MI, 3, O);
8387
752
    return;
8388
0
    break;
8389
6.12k
  }
8390
8391
8392
  // Fragment 7 encoded into 1 bits for 2 unique commands.
8393
5.00k
  if ((Bits >> 42) & 1) {
8394
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8395
2.72k
    SStream_concat0(O, ", ");
8396
2.72k
  } else {
8397
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_CM...
8398
2.27k
    return;
8399
2.27k
  }
8400
8401
8402
  // Fragment 8 encoded into 4 bits for 11 unique commands.
8403
2.72k
  switch ((Bits >> 43) & 15) {
8404
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8405
0
  case 0:
8406
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8407
0
    printImm8_AsmOperand(MI, 4, O);
8408
0
    break;
8409
0
  case 1:
8410
    // EE_FFT_CMUL_S16_ST_XP_P, EE_LDF_128_IP_P, EE_LDF_128_XP_P, EE_STF_128_...
8411
0
    printOperand(MI, 4, O);
8412
0
    break;
8413
174
  case 2:
8414
    // EE_FFT_R2BF_S16_P, EE_FFT_R2BF_S16
8415
174
    printSelect_2_AsmOperand(MI, 4, O);
8416
174
    return;
8417
0
    break;
8418
0
  case 3:
8419
    // EE_FFT_R2BF_S16_ST_INCP_P
8420
0
    printSelect_4_AsmOperand(MI, 4, O);
8421
0
    return;
8422
0
    break;
8423
31
  case 4:
8424
    // EE_LDXQ_32_P, EE_STXQ_32_P, EE_VSMULAS_S16_QACC_LD_INCP_P, EE_LDXQ_32,...
8425
31
    printSelect_8_AsmOperand(MI, 4, O);
8426
31
    return;
8427
0
    break;
8428
0
  case 5:
8429
    // EE_VSMULAS_S8_QACC_LD_INCP_P
8430
0
    printSelect_16_AsmOperand(MI, 4, O);
8431
0
    return;
8432
0
    break;
8433
1.48k
  case 6:
8434
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8435
1.48k
    printOperand(MI, 5, O);
8436
1.48k
    break;
8437
182
  case 7:
8438
    // EE_FFT_R2BF_S16_ST_INCP
8439
182
    printSelect_4_AsmOperand(MI, 5, O);
8440
182
    return;
8441
0
    break;
8442
749
  case 8:
8443
    // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LD_XP_QUP, EE_VMULAS_...
8444
749
    printOperand(MI, 8, O);
8445
749
    return;
8446
0
    break;
8447
47
  case 9:
8448
    // EE_VSMULAS_S16_QACC_LD_INCP
8449
47
    printSelect_8_AsmOperand(MI, 5, O);
8450
47
    return;
8451
0
    break;
8452
53
  case 10:
8453
    // EE_VSMULAS_S8_QACC_LD_INCP
8454
53
    printSelect_16_AsmOperand(MI, 5, O);
8455
53
    return;
8456
0
    break;
8457
2.72k
  }
8458
8459
8460
  // Fragment 9 encoded into 1 bits for 2 unique commands.
8461
1.48k
  if ((Bits >> 47) & 1) {
8462
    // EE_SRC_Q_LD_IP_P, EE_SRC_Q_LD_XP_P, EE_VADDS_S16_LD_INCP_P, EE_VADDS_S...
8463
47
    return;
8464
1.43k
  } else {
8465
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8466
1.43k
    SStream_concat0(O, ", ");
8467
1.43k
  }
8468
8469
8470
  // Fragment 10 encoded into 3 bits for 8 unique commands.
8471
1.43k
  switch ((Bits >> 48) & 7) {
8472
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8473
0
  case 0:
8474
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P
8475
0
    printSelect_4_AsmOperand(MI, 5, O);
8476
0
    return;
8477
0
    break;
8478
0
  case 1:
8479
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8480
0
    printImm8_AsmOperand(MI, 5, O);
8481
0
    break;
8482
0
  case 2:
8483
    // EE_FFT_CMUL_S16_ST_XP_P
8484
0
    printSelect_8_AsmOperand(MI, 5, O);
8485
0
    SStream_concat0(O, ", ");
8486
0
    printSelect_4_AsmOperand(MI, 6, O);
8487
0
    SStream_concat0(O, ", ");
8488
0
    printSelect_4_AsmOperand(MI, 7, O);
8489
0
    return;
8490
0
    break;
8491
0
  case 3:
8492
    // EE_LDF_128_IP_P, EE_STF_128_IP_P
8493
0
    printOffset_16_16_AsmOperand(MI, 5, O);
8494
0
    return;
8495
0
    break;
8496
0
  case 4:
8497
    // EE_LDF_128_XP_P, EE_STF_128_XP_P, SELECT, SELECT_CC_FP_FP, SELECT_CC_F...
8498
0
    printOperand(MI, 5, O);
8499
0
    return;
8500
0
    break;
8501
574
  case 5:
8502
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8503
574
    printOperand(MI, 6, O);
8504
574
    break;
8505
499
  case 6:
8506
    // EE_FFT_CMUL_S16_ST_XP
8507
499
    printSelect_8_AsmOperand(MI, 6, O);
8508
499
    SStream_concat0(O, ", ");
8509
499
    printSelect_4_AsmOperand(MI, 7, O);
8510
499
    SStream_concat0(O, ", ");
8511
499
    printSelect_4_AsmOperand(MI, 8, O);
8512
499
    return;
8513
0
    break;
8514
366
  case 7:
8515
    // EE_LDF_128_IP, EE_STF_128_IP
8516
366
    printOffset_16_16_AsmOperand(MI, 6, O);
8517
366
    return;
8518
0
    break;
8519
1.43k
  }
8520
8521
8522
  // Fragment 11 encoded into 1 bits for 2 unique commands.
8523
574
  if ((Bits >> 51) & 1) {
8524
    // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P, EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P,...
8525
499
    return;
8526
499
  } else {
8527
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8528
75
    SStream_concat0(O, ", ");
8529
75
  }
8530
8531
8532
  // Fragment 12 encoded into 2 bits for 3 unique commands.
8533
75
  switch ((Bits >> 52) & 3) {
8534
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8535
0
  case 0:
8536
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8537
0
    printImm8_AsmOperand(MI, 6, O);
8538
0
    break;
8539
0
  case 1:
8540
    // EE_FFT_CMUL_S16_LD_XP_P
8541
0
    printSelect_8_AsmOperand(MI, 6, O);
8542
0
    return;
8543
0
    break;
8544
75
  case 2:
8545
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8546
75
    printOperand(MI, 7, O);
8547
75
    SStream_concat0(O, ", ");
8548
75
    printSelect_2_AsmOperand(MI, 8, O);
8549
75
    return;
8550
0
    break;
8551
75
  }
8552
8553
8554
  // Fragment 13 encoded into 1 bits for 2 unique commands.
8555
0
  if ((Bits >> 54) & 1) {
8556
    // EE_VMULAS_S16_ACCX_LD_XP_QUP_P, EE_VMULAS_S16_QACC_LD_XP_QUP_P, EE_VMU...
8557
0
    return;
8558
0
  } else {
8559
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8560
0
    SStream_concat0(O, ", ");
8561
0
    printSelect_2_AsmOperand(MI, 7, O);
8562
0
    return;
8563
0
  }
8564
8565
0
}
8566
8567
8568
/// getRegisterName - This method is automatically generated by tblgen
8569
/// from the register set description.  This returns the assembler name
8570
/// for the specified register.
8571
140k
static const char *getRegisterName(unsigned RegNo) {
8572
140k
#ifndef CAPSTONE_DIET
8573
140k
  CS_ASSERT_RET_VAL(RegNo && RegNo < 170 && "Invalid register number!", NULL);
8574
8575
140k
  static const char AsmStrs[] = {
8576
140k
  /* 0 */ "a10\0"
8577
140k
  /* 4 */ "b10\0"
8578
140k
  /* 8 */ "aed10\0"
8579
140k
  /* 14 */ "f10\0"
8580
140k
  /* 18 */ "dbreaka0\0"
8581
140k
  /* 27 */ "ibreaka0\0"
8582
140k
  /* 36 */ "b0\0"
8583
140k
  /* 39 */ "dbreakc0\0"
8584
140k
  /* 48 */ "misc0\0"
8585
140k
  /* 54 */ "aed0\0"
8586
140k
  /* 59 */ "configid0\0"
8587
140k
  /* 69 */ "ccompare0\0"
8588
140k
  /* 79 */ "f0\0"
8589
140k
  /* 82 */ "m0\0"
8590
140k
  /* 85 */ "q0\0"
8591
140k
  /* 88 */ "u0\0"
8592
140k
  /* 91 */ "B8_B9_B10_B11\0"
8593
140k
  /* 105 */ "a11\0"
8594
140k
  /* 109 */ "b11\0"
8595
140k
  /* 113 */ "aed11\0"
8596
140k
  /* 119 */ "f11\0"
8597
140k
  /* 123 */ "B0_B1\0"
8598
140k
  /* 129 */ "dbreaka1\0"
8599
140k
  /* 138 */ "ibreaka1\0"
8600
140k
  /* 147 */ "b1\0"
8601
140k
  /* 150 */ "dbreakc1\0"
8602
140k
  /* 159 */ "epc1\0"
8603
140k
  /* 164 */ "misc1\0"
8604
140k
  /* 170 */ "aed1\0"
8605
140k
  /* 175 */ "configid1\0"
8606
140k
  /* 185 */ "ccompare1\0"
8607
140k
  /* 195 */ "scompare1\0"
8608
140k
  /* 205 */ "excsave1\0"
8609
140k
  /* 214 */ "f1\0"
8610
140k
  /* 217 */ "m1\0"
8611
140k
  /* 220 */ "q1\0"
8612
140k
  /* 223 */ "u1\0"
8613
140k
  /* 226 */ "a12\0"
8614
140k
  /* 230 */ "b12\0"
8615
140k
  /* 234 */ "aed12\0"
8616
140k
  /* 240 */ "f12\0"
8617
140k
  /* 244 */ "a2\0"
8618
140k
  /* 247 */ "b2\0"
8619
140k
  /* 250 */ "epc2\0"
8620
140k
  /* 255 */ "misc2\0"
8621
140k
  /* 261 */ "aed2\0"
8622
140k
  /* 266 */ "ccompare2\0"
8623
140k
  /* 276 */ "excsave2\0"
8624
140k
  /* 285 */ "f2\0"
8625
140k
  /* 288 */ "m2\0"
8626
140k
  /* 291 */ "q2\0"
8627
140k
  /* 294 */ "eps2\0"
8628
140k
  /* 299 */ "u2\0"
8629
140k
  /* 302 */ "B12_B13\0"
8630
140k
  /* 310 */ "a13\0"
8631
140k
  /* 314 */ "b13\0"
8632
140k
  /* 318 */ "aed13\0"
8633
140k
  /* 324 */ "f13\0"
8634
140k
  /* 328 */ "B0_B1_B2_B3\0"
8635
140k
  /* 340 */ "a3\0"
8636
140k
  /* 343 */ "b3\0"
8637
140k
  /* 346 */ "epc3\0"
8638
140k
  /* 351 */ "misc3\0"
8639
140k
  /* 357 */ "aed3\0"
8640
140k
  /* 362 */ "excsave3\0"
8641
140k
  /* 371 */ "f3\0"
8642
140k
  /* 374 */ "m3\0"
8643
140k
  /* 377 */ "q3\0"
8644
140k
  /* 380 */ "eps3\0"
8645
140k
  /* 385 */ "u3\0"
8646
140k
  /* 388 */ "a14\0"
8647
140k
  /* 392 */ "b14\0"
8648
140k
  /* 396 */ "aed14\0"
8649
140k
  /* 402 */ "f14\0"
8650
140k
  /* 406 */ "a4\0"
8651
140k
  /* 409 */ "b4\0"
8652
140k
  /* 412 */ "epc4\0"
8653
140k
  /* 417 */ "aed4\0"
8654
140k
  /* 422 */ "excsave4\0"
8655
140k
  /* 431 */ "f4\0"
8656
140k
  /* 434 */ "q4\0"
8657
140k
  /* 437 */ "eps4\0"
8658
140k
  /* 442 */ "B12_B13_B14_B15\0"
8659
140k
  /* 458 */ "a15\0"
8660
140k
  /* 462 */ "b15\0"
8661
140k
  /* 466 */ "aed15\0"
8662
140k
  /* 472 */ "f15\0"
8663
140k
  /* 476 */ "B4_B5\0"
8664
140k
  /* 482 */ "a5\0"
8665
140k
  /* 485 */ "b5\0"
8666
140k
  /* 488 */ "epc5\0"
8667
140k
  /* 493 */ "aed5\0"
8668
140k
  /* 498 */ "excsave5\0"
8669
140k
  /* 507 */ "f5\0"
8670
140k
  /* 510 */ "q5\0"
8671
140k
  /* 513 */ "eps5\0"
8672
140k
  /* 518 */ "a6\0"
8673
140k
  /* 521 */ "b6\0"
8674
140k
  /* 524 */ "epc6\0"
8675
140k
  /* 529 */ "aed6\0"
8676
140k
  /* 534 */ "excsave6\0"
8677
140k
  /* 543 */ "f6\0"
8678
140k
  /* 546 */ "q6\0"
8679
140k
  /* 549 */ "eps6\0"
8680
140k
  /* 554 */ "B4_B5_B6_B7\0"
8681
140k
  /* 566 */ "a7\0"
8682
140k
  /* 569 */ "b7\0"
8683
140k
  /* 572 */ "epc7\0"
8684
140k
  /* 577 */ "aed7\0"
8685
140k
  /* 582 */ "excsave7\0"
8686
140k
  /* 591 */ "f7\0"
8687
140k
  /* 594 */ "q7\0"
8688
140k
  /* 597 */ "eps7\0"
8689
140k
  /* 602 */ "a8\0"
8690
140k
  /* 605 */ "b8\0"
8691
140k
  /* 608 */ "aed8\0"
8692
140k
  /* 613 */ "f8\0"
8693
140k
  /* 616 */ "B8_B9\0"
8694
140k
  /* 622 */ "a9\0"
8695
140k
  /* 625 */ "b9\0"
8696
140k
  /* 628 */ "aed9\0"
8697
140k
  /* 633 */ "f9\0"
8698
140k
  /* 636 */ "qacc\0"
8699
140k
  /* 641 */ "depc\0"
8700
140k
  /* 646 */ "prid\0"
8701
140k
  /* 651 */ "lend\0"
8702
140k
  /* 656 */ "ibreakenable\0"
8703
140k
  /* 669 */ "cpenable\0"
8704
140k
  /* 678 */ "intenable\0"
8705
140k
  /* 688 */ "vecbase\0"
8706
140k
  /* 696 */ "litbase\0"
8707
140k
  /* 704 */ "windowbase\0"
8708
140k
  /* 715 */ "exccause\0"
8709
140k
  /* 724 */ "debugcause\0"
8710
140k
  /* 735 */ "ua_state\0"
8711
140k
  /* 744 */ "expstate\0"
8712
140k
  /* 753 */ "sar_byte\0"
8713
140k
  /* 762 */ "lbeg\0"
8714
140k
  /* 767 */ "fft_bit_width\0"
8715
140k
  /* 781 */ "f64r_hi\0"
8716
140k
  /* 789 */ "acchi\0"
8717
140k
  /* 795 */ "icountlevel\0"
8718
140k
  /* 807 */ "memctl\0"
8719
140k
  /* 814 */ "atomctl\0"
8720
140k
  /* 822 */ "f64r_lo\0"
8721
140k
  /* 830 */ "acclo\0"
8722
140k
  /* 836 */ "intclear\0"
8723
140k
  /* 845 */ "sar\0"
8724
140k
  /* 849 */ "br\0"
8725
140k
  /* 852 */ "fcr\0"
8726
140k
  /* 856 */ "excvaddr\0"
8727
140k
  /* 865 */ "fsr\0"
8728
140k
  /* 869 */ "threadptr\0"
8729
140k
  /* 879 */ "f64s\0"
8730
140k
  /* 884 */ "ps\0"
8731
140k
  /* 887 */ "ccount\0"
8732
140k
  /* 894 */ "icount\0"
8733
140k
  /* 901 */ "lcount\0"
8734
140k
  /* 908 */ "interrupt\0"
8735
140k
  /* 918 */ "windowstart\0"
8736
140k
  /* 930 */ "gpio_out\0"
8737
140k
  /* 939 */ "accx\0"
8738
140k
};
8739
140k
  static const uint16_t RegAsmOffset[] = {
8740
140k
    789, 830, 939, 814, 849, 887, 669, 861, 724, 641, 715, 856, 744, 852, 
8741
140k
    767, 865, 930, 656, 894, 795, 836, 678, 908, 762, 901, 651, 696, 807, 
8742
140k
    646, 884, 636, 845, 753, 135, 869, 735, 688, 704, 918, 24, 244, 340, 
8743
140k
    406, 482, 518, 566, 602, 622, 0, 105, 226, 310, 388, 458, 54, 170, 
8744
140k
    261, 357, 417, 493, 529, 577, 608, 628, 8, 113, 234, 318, 396, 466, 
8745
140k
    36, 147, 247, 343, 409, 485, 521, 569, 605, 625, 4, 109, 230, 314, 
8746
140k
    392, 462, 69, 185, 266, 59, 175, 18, 129, 39, 150, 159, 250, 346, 
8747
140k
    412, 488, 524, 572, 294, 380, 437, 513, 549, 597, 205, 276, 362, 422, 
8748
140k
    498, 534, 582, 79, 214, 285, 371, 431, 507, 543, 591, 613, 633, 14, 
8749
140k
    119, 240, 324, 402, 472, 27, 138, 82, 217, 288, 374, 48, 164, 255, 
8750
140k
    351, 85, 220, 291, 377, 434, 510, 546, 594, 195, 88, 223, 299, 385, 
8751
140k
    781, 822, 879, 123, 334, 476, 560, 616, 97, 302, 450, 328, 554, 91, 
8752
140k
    442, 
8753
140k
  };
8754
8755
140k
  CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) &&
8756
140k
          "Invalid alt name index for register!", NULL);
8757
140k
  return AsmStrs+RegAsmOffset[RegNo-1];
8758
#else
8759
  return NULL;
8760
#endif // CAPSTONE_DIET
8761
140k
}
8762
#ifdef PRINT_ALIAS_INSTR
8763
#undef PRINT_ALIAS_INSTR
8764
8765
static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) {
8766
#ifndef CAPSTONE_DIET
8767
  static const PatternsForOpcode OpToPatterns[] = {
8768
    {Xtensa_ADD, 0, 1 },
8769
    {Xtensa_ADDI, 1, 1 },
8770
    {Xtensa_ADDI_N, 2, 1 },
8771
    {Xtensa_ADD_N, 3, 1 },
8772
    {Xtensa_BALL, 4, 1 },
8773
    {Xtensa_BANY, 5, 1 },
8774
    {Xtensa_BBC, 6, 1 },
8775
    {Xtensa_BBS, 7, 1 },
8776
    {Xtensa_BEQ, 8, 1 },
8777
    {Xtensa_BEQI, 9, 1 },
8778
    {Xtensa_BEQZ, 10, 1 },
8779
    {Xtensa_BF, 11, 1 },
8780
    {Xtensa_BGE, 12, 1 },
8781
    {Xtensa_BGEI, 13, 1 },
8782
    {Xtensa_BGEU, 14, 1 },
8783
    {Xtensa_BGEUI, 15, 1 },
8784
    {Xtensa_BGEZ, 16, 1 },
8785
    {Xtensa_BLT, 17, 1 },
8786
    {Xtensa_BLTI, 18, 1 },
8787
    {Xtensa_BLTU, 19, 1 },
8788
    {Xtensa_BLTUI, 20, 1 },
8789
    {Xtensa_BLTZ, 21, 1 },
8790
    {Xtensa_BNALL, 22, 1 },
8791
    {Xtensa_BNE, 23, 1 },
8792
    {Xtensa_BNEI, 24, 1 },
8793
    {Xtensa_BNEZ, 25, 1 },
8794
    {Xtensa_BNONE, 26, 1 },
8795
    {Xtensa_BREAK_N, 27, 1 },
8796
    {Xtensa_BT, 28, 1 },
8797
    {Xtensa_LOOP, 29, 1 },
8798
    {Xtensa_LOOPGTZ, 30, 1 },
8799
    {Xtensa_LOOPNEZ, 31, 1 },
8800
    {Xtensa_MOVI_N, 32, 1 },
8801
    {Xtensa_NOP, 33, 1 },
8802
    {Xtensa_OR, 34, 1 },
8803
    {Xtensa_RET, 35, 1 },
8804
    {Xtensa_RETW, 36, 1 },
8805
    {Xtensa_RETW_N, 37, 1 },
8806
    {Xtensa_RET_N, 38, 1 },
8807
  {0},  };
8808
8809
  static const AliasPattern Patterns[] = {
8810
    // Xtensa_ADD - 0
8811
    {0, 0, 3, 3 },
8812
    // Xtensa_ADDI - 1
8813
    {16, 3, 3, 2 },
8814
    // Xtensa_ADDI_N - 2
8815
    {35, 5, 3, 2 },
8816
    // Xtensa_ADD_N - 3
8817
    {56, 7, 3, 3 },
8818
    // Xtensa_BALL - 4
8819
    {74, 10, 3, 2 },
8820
    // Xtensa_BANY - 5
8821
    {93, 12, 3, 2 },
8822
    // Xtensa_BBC - 6
8823
    {112, 14, 3, 2 },
8824
    // Xtensa_BBS - 7
8825
    {130, 16, 3, 2 },
8826
    // Xtensa_BEQ - 8
8827
    {148, 18, 3, 2 },
8828
    // Xtensa_BEQI - 9
8829
    {166, 20, 3, 2 },
8830
    // Xtensa_BEQZ - 10
8831
    {187, 22, 2, 1 },
8832
    // Xtensa_BF - 11
8833
    {202, 23, 2, 1 },
8834
    // Xtensa_BGE - 12
8835
    {215, 24, 3, 2 },
8836
    // Xtensa_BGEI - 13
8837
    {233, 26, 3, 2 },
8838
    // Xtensa_BGEU - 14
8839
    {254, 28, 3, 2 },
8840
    // Xtensa_BGEUI - 15
8841
    {273, 30, 3, 2 },
8842
    // Xtensa_BGEZ - 16
8843
    {295, 32, 2, 1 },
8844
    // Xtensa_BLT - 17
8845
    {310, 33, 3, 2 },
8846
    // Xtensa_BLTI - 18
8847
    {328, 35, 3, 2 },
8848
    // Xtensa_BLTU - 19
8849
    {349, 37, 3, 2 },
8850
    // Xtensa_BLTUI - 20
8851
    {368, 39, 3, 2 },
8852
    // Xtensa_BLTZ - 21
8853
    {390, 41, 2, 1 },
8854
    // Xtensa_BNALL - 22
8855
    {405, 42, 3, 2 },
8856
    // Xtensa_BNE - 23
8857
    {425, 44, 3, 2 },
8858
    // Xtensa_BNEI - 24
8859
    {443, 46, 3, 2 },
8860
    // Xtensa_BNEZ - 25
8861
    {464, 48, 2, 1 },
8862
    // Xtensa_BNONE - 26
8863
    {479, 49, 3, 2 },
8864
    // Xtensa_BREAK_N - 27
8865
    {499, 51, 1, 0 },
8866
    // Xtensa_BT - 28
8867
    {513, 51, 2, 1 },
8868
    // Xtensa_LOOP - 29
8869
    {526, 52, 2, 1 },
8870
    // Xtensa_LOOPGTZ - 30
8871
    {541, 53, 2, 1 },
8872
    // Xtensa_LOOPNEZ - 31
8873
    {559, 54, 2, 1 },
8874
    // Xtensa_MOVI_N - 32
8875
    {577, 55, 2, 1 },
8876
    // Xtensa_NOP - 33
8877
    {594, 56, 0, 0 },
8878
    // Xtensa_OR - 34
8879
    {599, 56, 3, 3 },
8880
    // Xtensa_RET - 35
8881
    {611, 59, 0, 0 },
8882
    // Xtensa_RETW - 36
8883
    {616, 59, 0, 0 },
8884
    // Xtensa_RETW_N - 37
8885
    {622, 59, 0, 0 },
8886
    // Xtensa_RET_N - 38
8887
    {630, 59, 0, 0 },
8888
  {0},  };
8889
8890
  static const AliasPatternCond Conds[] = {
8891
    // (ADD AR:$r, AR:$s, AR:$t) - 0
8892
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8893
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8894
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8895
    // (ADDI AR:$r, AR:$s, imm8:$imm8) - 3
8896
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8897
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8898
    // (ADDI_N AR:$r, AR:$s, imm1n_15:$imm) - 5
8899
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8900
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8901
    // (ADD_N AR:$r, AR:$s, AR:$t) - 7
8902
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8903
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8904
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8905
    // (BALL AR:$s, AR:$t, brtarget:$target) - 10
8906
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8907
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8908
    // (BANY AR:$s, AR:$t, brtarget:$target) - 12
8909
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8910
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8911
    // (BBC AR:$s, AR:$t, brtarget:$target) - 14
8912
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8913
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8914
    // (BBS AR:$s, AR:$t, brtarget:$target) - 16
8915
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8916
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8917
    // (BEQ AR:$s, AR:$t, brtarget:$target) - 18
8918
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8919
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8920
    // (BEQI AR:$s, b4const:$imm, brtarget:$target) - 20
8921
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8922
    {AliasPatternCond_K_Ignore, 0},
8923
    // (BEQZ AR:$s, brtarget:$target) - 22
8924
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8925
    // (BF BR:$b, brtarget:$target) - 23
8926
    {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID},
8927
    // (BGE AR:$s, AR:$t, brtarget:$target) - 24
8928
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8929
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8930
    // (BGEI AR:$s, b4const:$imm, brtarget:$target) - 26
8931
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8932
    {AliasPatternCond_K_Ignore, 0},
8933
    // (BGEU AR:$s, AR:$t, brtarget:$target) - 28
8934
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8935
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8936
    // (BGEUI AR:$s, b4constu:$imm, brtarget:$target) - 30
8937
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8938
    {AliasPatternCond_K_Ignore, 0},
8939
    // (BGEZ AR:$s, brtarget:$target) - 32
8940
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8941
    // (BLT AR:$s, AR:$t, brtarget:$target) - 33
8942
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8943
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8944
    // (BLTI AR:$s, b4const:$imm, brtarget:$target) - 35
8945
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8946
    {AliasPatternCond_K_Ignore, 0},
8947
    // (BLTU AR:$s, AR:$t, brtarget:$target) - 37
8948
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8949
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8950
    // (BLTUI AR:$s, b4constu:$imm, brtarget:$target) - 39
8951
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8952
    {AliasPatternCond_K_Ignore, 0},
8953
    // (BLTZ AR:$s, brtarget:$target) - 41
8954
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8955
    // (BNALL AR:$s, AR:$t, brtarget:$target) - 42
8956
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8957
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8958
    // (BNE AR:$s, AR:$t, brtarget:$target) - 44
8959
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8960
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8961
    // (BNEI AR:$s, b4const:$imm, brtarget:$target) - 46
8962
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8963
    {AliasPatternCond_K_Ignore, 0},
8964
    // (BNEZ AR:$s, brtarget:$target) - 48
8965
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8966
    // (BNONE AR:$s, AR:$t, brtarget:$target) - 49
8967
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8968
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8969
    // (BREAK_N uimm4:$imm) - 51
8970
    // (BT BR:$b, brtarget:$target) - 51
8971
    {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID},
8972
    // (LOOP AR:$s, ltarget:$target) - 52
8973
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8974
    // (LOOPGTZ AR:$s, ltarget:$target) - 53
8975
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8976
    // (LOOPNEZ AR:$s, ltarget:$target) - 54
8977
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8978
    // (MOVI_N AR:$s, imm32n_95:$imm7) - 55
8979
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8980
    // (NOP) - 56
8981
    // (OR AR:$t, AR:$s, AR:$s) - 56
8982
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8983
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8984
    {AliasPatternCond_K_TiedReg, 1},
8985
    // (RET) - 59
8986
    // (RETW) - 59
8987
    // (RETW_N) - 59
8988
    // (RET_N) - 59
8989
  {0},  };
8990
8991
  static const char AsmStrings[] =
8992
    /* 0 */ "_add $\x01, $\x02, $\x03\0"
8993
    /* 16 */ "_addi $\x01, $\x02, $\xFF\x03\x01\0"
8994
    /* 35 */ "_addi.n $\x01, $\x02, $\xFF\x03\x02\0"
8995
    /* 56 */ "_add.n  $\x01, $\x02, $\x03\0"
8996
    /* 74 */ "_ball $\x01, $\x02, $\xFF\x03\x03\0"
8997
    /* 93 */ "_bany $\x01, $\x02, $\xFF\x03\x03\0"
8998
    /* 112 */ "_bbc $\x01, $\x02, $\xFF\x03\x03\0"
8999
    /* 130 */ "_bbs $\x01, $\x02, $\xFF\x03\x03\0"
9000
    /* 148 */ "_beq $\x01, $\x02, $\xFF\x03\x03\0"
9001
    /* 166 */ "_beqi  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9002
    /* 187 */ "_beqz  $\x01, $\xFF\x02\x03\0"
9003
    /* 202 */ "_BF  $\x01, $\xFF\x02\x03\0"
9004
    /* 215 */ "_bge $\x01, $\x02, $\xFF\x03\x03\0"
9005
    /* 233 */ "_bgei  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9006
    /* 254 */ "_bgeu  $\x01, $\x02, $\xFF\x03\x03\0"
9007
    /* 273 */ "_bgeui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0"
9008
    /* 295 */ "_bgez  $\x01, $\xFF\x02\x03\0"
9009
    /* 310 */ "_blt $\x01, $\x02, $\xFF\x03\x03\0"
9010
    /* 328 */ "_blti  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9011
    /* 349 */ "_bltu  $\x01, $\x02, $\xFF\x03\x03\0"
9012
    /* 368 */ "_bltui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0"
9013
    /* 390 */ "_bltz  $\x01, $\xFF\x02\x03\0"
9014
    /* 405 */ "_bnall $\x01, $\x02, $\xFF\x03\x03\0"
9015
    /* 425 */ "_bne $\x01, $\x02, $\xFF\x03\x03\0"
9016
    /* 443 */ "_bnei  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9017
    /* 464 */ "_bnez  $\x01, $\xFF\x02\x03\0"
9018
    /* 479 */ "_bnone $\x01, $\x02, $\xFF\x03\x03\0"
9019
    /* 499 */ "_break.n $\xFF\x01\x07\0"
9020
    /* 513 */ "_BT  $\x01, $\xFF\x02\x03\0"
9021
    /* 526 */ "_loop  $\x01, $\xFF\x02\x08\0"
9022
    /* 541 */ "_loopgtz $\x01, $\xFF\x02\x08\0"
9023
    /* 559 */ "_loopnez $\x01, $\xFF\x02\x08\0"
9024
    /* 577 */ "_movi.n  $\x01, $\xFF\x02\x09\0"
9025
    /* 594 */ "_nop\0"
9026
    /* 599 */ "mov   $\x01, $\x02\0"
9027
    /* 611 */ "_ret\0"
9028
    /* 616 */ "_retw\0"
9029
    /* 622 */ "_retw.n\0"
9030
    /* 630 */ "_ret.n\0"
9031
  ;
9032
9033
#ifndef NDEBUG
9034
  //static struct SortCheck {
9035
  //  SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
9036
  //    assert(std::is_sorted(
9037
  //               OpToPatterns.begin(), OpToPatterns.end(),
9038
  //               [](const PatternsForOpcode &L, const //PatternsForOpcode &R) {
9039
  //                 return L.Opcode < R.Opcode;
9040
  //               }) &&
9041
  //           "tablegen failed to sort opcode patterns");
9042
  //  }
9043
  //} sortCheckVar(OpToPatterns);
9044
#endif
9045
9046
  AliasMatchingData M = {
9047
    OpToPatterns,
9048
    Patterns,
9049
    Conds,
9050
    AsmStrings,
9051
    NULL,
9052
  };
9053
  const char *AsmString = matchAliasPatterns(MI, &M);
9054
  if (!AsmString) return false;
9055
9056
  unsigned I = 0;
9057
  while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
9058
         AsmString[I] != '$' && AsmString[I] != '\0')
9059
    ++I;
9060
  SStream_concat1(OS, '\t');
9061
  char *substr = malloc(I+1);
9062
  memcpy(substr, AsmString, I);
9063
  substr[I] = '\0';
9064
  SStream_concat0(OS, substr);
9065
  free(substr);
9066
  if (AsmString[I] != '\0') {
9067
    if (AsmString[I] == ' ' || AsmString[I] == '\t') {
9068
      SStream_concat1(OS, '\t');
9069
      ++I;
9070
    }
9071
    do {
9072
      if (AsmString[I] == '$') {
9073
        ++I;
9074
        if (AsmString[I] == (char)0xff) {
9075
          ++I;
9076
          int OpIdx = AsmString[I++] - 1;
9077
          int PrintMethodIdx = AsmString[I++] - 1;
9078
          printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS);
9079
        } else
9080
          printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS);
9081
      } else {
9082
        SStream_concat1(OS, AsmString[I++]);
9083
      }
9084
    } while (AsmString[I] != '\0');
9085
  }
9086
9087
  return true;
9088
#else
9089
  return false;
9090
#endif // CAPSTONE_DIET
9091
}
9092
9093
static void printCustomAliasOperand(
9094
         MCInst *MI, uint64_t Address, unsigned OpIdx,
9095
         unsigned PrintMethodIdx,
9096
         SStream *OS) {
9097
#ifndef CAPSTONE_DIET
9098
  switch (PrintMethodIdx) {
9099
  default:
9100
    CS_ASSERT_RET(0 && "Unknown PrintMethod kind");
9101
    break;
9102
  case 0:
9103
    printImm8_AsmOperand(MI, OpIdx, OS);
9104
    break;
9105
  case 1:
9106
    printImm1n_15_AsmOperand(MI, OpIdx, OS);
9107
    break;
9108
  case 2:
9109
    printBranchTarget(MI, OpIdx, OS);
9110
    break;
9111
  case 3:
9112
    printUimm5_AsmOperand(MI, OpIdx, OS);
9113
    break;
9114
  case 4:
9115
    printB4const_AsmOperand(MI, OpIdx, OS);
9116
    break;
9117
  case 5:
9118
    printB4constu_AsmOperand(MI, OpIdx, OS);
9119
    break;
9120
  case 6:
9121
    printUimm4_AsmOperand(MI, OpIdx, OS);
9122
    break;
9123
  case 7:
9124
    printLoopTarget(MI, OpIdx, OS);
9125
    break;
9126
  case 8:
9127
    printImm32n_95_AsmOperand(MI, OpIdx, OS);
9128
    break;
9129
  }
9130
#endif // CAPSTONE_DIET
9131
}
9132
9133
#endif // PRINT_ALIAS_INSTR