Coverage Report

Created: 2025-10-14 06:42

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
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// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
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#endif
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38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
13.4k
{
50
13.4k
  uint8_t Imm =
51
13.4k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
13.4k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
6.04k
  case 0:
56
6.04k
    SStream_concat0(O, "eq");
57
6.04k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
6.04k
    break;
59
1.69k
  case 1:
60
1.69k
    SStream_concat0(O, "lt");
61
1.69k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.69k
    break;
63
271
  case 2:
64
271
    SStream_concat0(O, "le");
65
271
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
271
    break;
67
257
  case 3:
68
257
    SStream_concat0(O, "unord");
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257
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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257
    break;
71
98
  case 4:
72
98
    SStream_concat0(O, "neq");
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98
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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98
    break;
75
79
  case 5:
76
79
    SStream_concat0(O, "nlt");
77
79
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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79
    break;
79
126
  case 6:
80
126
    SStream_concat0(O, "nle");
81
126
    op_addAvxCC(MI, X86_AVX_CC_NLE);
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126
    break;
83
73
  case 7:
84
73
    SStream_concat0(O, "ord");
85
73
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
73
    break;
87
153
  case 8:
88
153
    SStream_concat0(O, "eq_uq");
89
153
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
153
    break;
91
94
  case 9:
92
94
    SStream_concat0(O, "nge");
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94
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
94
    break;
95
101
  case 0xa:
96
101
    SStream_concat0(O, "ngt");
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101
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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101
    break;
99
322
  case 0xb:
100
322
    SStream_concat0(O, "false");
101
322
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
322
    break;
103
121
  case 0xc:
104
121
    SStream_concat0(O, "neq_oq");
105
121
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
121
    break;
107
25
  case 0xd:
108
25
    SStream_concat0(O, "ge");
109
25
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
25
    break;
111
96
  case 0xe:
112
96
    SStream_concat0(O, "gt");
113
96
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
96
    break;
115
59
  case 0xf:
116
59
    SStream_concat0(O, "true");
117
59
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
59
    break;
119
248
  case 0x10:
120
248
    SStream_concat0(O, "eq_os");
121
248
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
248
    break;
123
93
  case 0x11:
124
93
    SStream_concat0(O, "lt_oq");
125
93
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
93
    break;
127
213
  case 0x12:
128
213
    SStream_concat0(O, "le_oq");
129
213
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
213
    break;
131
299
  case 0x13:
132
299
    SStream_concat0(O, "unord_s");
133
299
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
299
    break;
135
148
  case 0x14:
136
148
    SStream_concat0(O, "neq_us");
137
148
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
148
    break;
139
628
  case 0x15:
140
628
    SStream_concat0(O, "nlt_uq");
141
628
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
628
    break;
143
305
  case 0x16:
144
305
    SStream_concat0(O, "nle_uq");
145
305
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
305
    break;
147
303
  case 0x17:
148
303
    SStream_concat0(O, "ord_s");
149
303
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
303
    break;
151
313
  case 0x18:
152
313
    SStream_concat0(O, "eq_us");
153
313
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
313
    break;
155
34
  case 0x19:
156
34
    SStream_concat0(O, "nge_uq");
157
34
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
34
    break;
159
133
  case 0x1a:
160
133
    SStream_concat0(O, "ngt_uq");
161
133
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
133
    break;
163
501
  case 0x1b:
164
501
    SStream_concat0(O, "false_os");
165
501
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
501
    break;
167
420
  case 0x1c:
168
420
    SStream_concat0(O, "neq_os");
169
420
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
420
    break;
171
128
  case 0x1d:
172
128
    SStream_concat0(O, "ge_oq");
173
128
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
128
    break;
175
33
  case 0x1e:
176
33
    SStream_concat0(O, "gt_oq");
177
33
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
33
    break;
179
44
  case 0x1f:
180
44
    SStream_concat0(O, "true_us");
181
44
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
44
    break;
183
13.4k
  }
184
185
13.4k
  MI->popcode_adjust = Imm + 1;
186
13.4k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.14k
{
190
2.14k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.14k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
665
  case 0:
195
665
    SStream_concat0(O, "lt");
196
665
    op_addXopCC(MI, X86_XOP_CC_LT);
197
665
    break;
198
147
  case 1:
199
147
    SStream_concat0(O, "le");
200
147
    op_addXopCC(MI, X86_XOP_CC_LE);
201
147
    break;
202
454
  case 2:
203
454
    SStream_concat0(O, "gt");
204
454
    op_addXopCC(MI, X86_XOP_CC_GT);
205
454
    break;
206
170
  case 3:
207
170
    SStream_concat0(O, "ge");
208
170
    op_addXopCC(MI, X86_XOP_CC_GE);
209
170
    break;
210
205
  case 4:
211
205
    SStream_concat0(O, "eq");
212
205
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
205
    break;
214
150
  case 5:
215
150
    SStream_concat0(O, "neq");
216
150
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
150
    break;
218
118
  case 6:
219
118
    SStream_concat0(O, "false");
220
118
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
118
    break;
222
235
  case 7:
223
235
    SStream_concat0(O, "true");
224
235
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
235
    break;
226
2.14k
  }
227
2.14k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.03k
{
231
2.03k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.03k
  switch (Imm) {
233
1.41k
  case 0:
234
1.41k
    SStream_concat0(O, "{rn-sae}");
235
1.41k
    op_addAvxSae(MI);
236
1.41k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.41k
    break;
238
342
  case 1:
239
342
    SStream_concat0(O, "{rd-sae}");
240
342
    op_addAvxSae(MI);
241
342
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
342
    break;
243
170
  case 2:
244
170
    SStream_concat0(O, "{ru-sae}");
245
170
    op_addAvxSae(MI);
246
170
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
170
    break;
248
114
  case 3:
249
114
    SStream_concat0(O, "{rz-sae}");
250
114
    op_addAvxSae(MI);
251
114
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
114
    break;
253
0
  default:
254
0
    break; // never reach
255
2.03k
  }
256
2.03k
}
257
#endif