/src/capstonenext/arch/Alpha/AlphaInstPrinter.c
Line  | Count  | Source  | 
1  |  | /* Capstone Disassembly Engine */  | 
2  |  | /* By Dmitry Sibirtsev <sibirtsevdl@gmail.com>, 2023 */  | 
3  |  |  | 
4  |  | #ifdef CAPSTONE_HAS_ALPHA  | 
5  |  |  | 
6  |  | #include <platform.h>  | 
7  |  | #include <stdio.h>  | 
8  |  | #include <stdlib.h>  | 
9  |  | #include <string.h>  | 
10  |  |  | 
11  |  | #include "../../utils.h"  | 
12  |  | #include "../../Mapping.h"  | 
13  |  | #include "../../MCInstPrinter.h"  | 
14  |  |  | 
15  |  | #include "AlphaLinkage.h"  | 
16  |  | #include "AlphaMapping.h"  | 
17  |  |  | 
18  |  | static const char *getRegisterName(unsigned RegNo);  | 
19  |  |  | 
20  |  | static void printInstruction(MCInst *, uint64_t, SStream *);  | 
21  |  | static void printOperand(MCInst *MI, int OpNum, SStream *O);  | 
22  |  | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum,  | 
23  |  |            SStream *O);  | 
24  |  |  | 
25  |  | #define GET_INSTRINFO_ENUM  | 
26  |  |  | 
27  |  | #include "AlphaGenInstrInfo.inc"  | 
28  |  |  | 
29  |  | #define GET_REGINFO_ENUM  | 
30  |  |  | 
31  |  | #include "AlphaGenRegisterInfo.inc"  | 
32  |  |  | 
33  |  | static void printOperand(MCInst *MI, int OpNum, SStream *O)  | 
34  | 0  | { | 
35  | 0  |   if (OpNum >= MI->size)  | 
36  | 0  |     return;  | 
37  |  |  | 
38  | 0  |   Alpha_add_cs_detail(MI, OpNum);  | 
39  |  | 
  | 
40  | 0  |   MCOperand *Op;  | 
41  | 0  |   Op = MCInst_getOperand(MI, OpNum);  | 
42  | 0  |   if (MCOperand_isReg(Op)) { | 
43  | 0  |     unsigned reg = MCOperand_getReg(Op);  | 
44  | 0  |     SStream_concat(O, "%s", getRegisterName(reg));  | 
45  | 0  |   } else if (MCOperand_isImm(Op)) { | 
46  | 0  |     int64_t Imm = MCOperand_getImm(Op);  | 
47  | 0  |     if (Imm >= 0) { | 
48  | 0  |       if (Imm > HEX_THRESHOLD)  | 
49  | 0  |         SStream_concat(O, "0x%" PRIx64, Imm);  | 
50  | 0  |       else  | 
51  | 0  |         SStream_concat(O, "%" PRIu64, Imm);  | 
52  | 0  |     } else { | 
53  | 0  |       if (Imm < -HEX_THRESHOLD)  | 
54  | 0  |         SStream_concat(O, "-0x%" PRIx64, -Imm);  | 
55  | 0  |       else  | 
56  | 0  |         SStream_concat(O, "-%" PRIu64, -Imm);  | 
57  | 0  |     }  | 
58  | 0  |   }  | 
59  | 0  | }  | 
60  |  |  | 
61  |  | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum,  | 
62  |  |            SStream *O)  | 
63  | 0  | { | 
64  | 0  |   MCOperand *Op = MCInst_getOperand(MI, (OpNum));  | 
65  |  | 
  | 
66  | 0  |   uint64_t Imm = MCOperand_getImm(Op);  | 
67  | 0  |   uint64_t Target = Address + 4 + (int16_t)(Imm << 2);  | 
68  |  | 
  | 
69  | 0  |   Alpha_set_detail_op_imm(MI, OpNum, ALPHA_OP_IMM, Target);  | 
70  | 0  |   printUInt64(O, Target);  | 
71  | 0  | }  | 
72  |  |  | 
73  |  | #define PRINT_ALIAS_INSTR  | 
74  |  |  | 
75  |  | #include "AlphaGenAsmWriter.inc"  | 
76  |  |  | 
77  |  | const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id)  | 
78  | 0  | { | 
79  | 0  | #ifndef CAPSTONE_DIET  | 
80  | 0  |   return getRegisterName(id);  | 
81  |  | #else  | 
82  |  |   return NULL;  | 
83  |  | #endif  | 
84  | 0  | }  | 
85  |  |  | 
86  |  | void Alpha_LLVM_printInstruction(MCInst *MI, SStream *O, void *Info)  | 
87  | 0  | { | 
88  | 0  |   printAliasInstr(MI, MI->address, O);  | 
89  | 0  |   printInstruction(MI, MI->address, O);  | 
90  | 0  | }  | 
91  |  |  | 
92  |  | #endif  |