Coverage Report

Created: 2025-10-28 07:02

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonev5/arch/ARM/ARMGenDisassemblerTables.inc
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/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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/* Automatically generated file, do not edit! */
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5
#include "../../MCInst.h"
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#include "../../LEB128.h"
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// Helper function for extracting fields from encoded instructions.
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//#if defined(_MSC_VER) && !defined(__clang__)
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//__declspec(noinline)
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//#endif
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#define FieldFromInstruction(fname, InsnType) \
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9.09M
static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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9.09M
{ \
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9.09M
  InsnType fieldMask; \
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9.09M
  if (numBits == sizeof(InsnType) * 8) \
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9.09M
    fieldMask = (InsnType)(-1LL); \
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9.09M
  else \
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9.09M
    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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9.09M
  return (insn & fieldMask) >> startBit; \
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9.09M
}
ARMDisassembler.c:fieldFromInstruction_2
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16
2.37M
static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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2.37M
{ \
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2.37M
  InsnType fieldMask; \
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2.37M
  if (numBits == sizeof(InsnType) * 8) \
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2.37M
    fieldMask = (InsnType)(-1LL); \
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2.37M
  else \
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2.37M
    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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2.37M
  return (insn & fieldMask) >> startBit; \
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2.37M
}
ARMDisassembler.c:fieldFromInstruction_4
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16
6.71M
static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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6.71M
{ \
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6.71M
  InsnType fieldMask; \
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6.71M
  if (numBits == sizeof(InsnType) * 8) \
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6.71M
    fieldMask = (InsnType)(-1LL); \
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6.71M
  else \
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6.71M
    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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6.71M
  return (insn & fieldMask) >> startBit; \
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6.71M
}
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static const uint8_t DecoderTableARM32[] = {
27
/* 0 */       MCD_OPC_ExtractField, 25, 3,  // Inst{27-25} ...
28
/* 3 */       MCD_OPC_FilterValue, 0, 47, 14, 0, // Skip to: 3639
29
/* 8 */       MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
30
/* 11 */      MCD_OPC_FilterValue, 0, 110, 7, 0, // Skip to: 1918
31
/* 16 */      MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
32
/* 19 */      MCD_OPC_FilterValue, 0, 139, 1, 0, // Skip to: 419
33
/* 24 */      MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
34
/* 27 */      MCD_OPC_FilterValue, 0, 123, 0, 0, // Skip to: 155
35
/* 32 */      MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
36
/* 35 */      MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 65
37
/* 40 */      MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 56
38
/* 45 */      MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 56
39
/* 52 */      MCD_OPC_Decode, 159, 4, 0, // Opcode: ANDrr
40
/* 56 */      MCD_OPC_CheckPredicate, 0, 92, 32, 0, // Skip to: 8345
41
/* 61 */      MCD_OPC_Decode, 160, 4, 1, // Opcode: ANDrsi
42
/* 65 */      MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 95
43
/* 70 */      MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 86
44
/* 75 */      MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 86
45
/* 82 */      MCD_OPC_Decode, 245, 6, 0, // Opcode: SUBrr
46
/* 86 */      MCD_OPC_CheckPredicate, 0, 62, 32, 0, // Skip to: 8345
47
/* 91 */      MCD_OPC_Decode, 246, 6, 1, // Opcode: SUBrsi
48
/* 95 */      MCD_OPC_FilterValue, 2, 25, 0, 0, // Skip to: 125
49
/* 100 */     MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 116
50
/* 105 */     MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 116
51
/* 112 */     MCD_OPC_Decode, 150, 4, 0, // Opcode: ADDrr
52
/* 116 */     MCD_OPC_CheckPredicate, 0, 32, 32, 0, // Skip to: 8345
53
/* 121 */     MCD_OPC_Decode, 151, 4, 1, // Opcode: ADDrsi
54
/* 125 */     MCD_OPC_FilterValue, 3, 23, 32, 0, // Skip to: 8345
55
/* 130 */     MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 146
56
/* 135 */     MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 146
57
/* 142 */     MCD_OPC_Decode, 239, 5, 0, // Opcode: SBCrr
58
/* 146 */     MCD_OPC_CheckPredicate, 0, 2, 32, 0, // Skip to: 8345
59
/* 151 */     MCD_OPC_Decode, 240, 5, 1, // Opcode: SBCrsi
60
/* 155 */     MCD_OPC_FilterValue, 1, 249, 31, 0, // Skip to: 8345
61
/* 160 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
62
/* 163 */     MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 227
63
/* 168 */     MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
64
/* 171 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 185
65
/* 176 */     MCD_OPC_CheckPredicate, 0, 228, 31, 0, // Skip to: 8345
66
/* 181 */     MCD_OPC_Decode, 161, 4, 2, // Opcode: ANDrsr
67
/* 185 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 199
68
/* 190 */     MCD_OPC_CheckPredicate, 0, 214, 31, 0, // Skip to: 8345
69
/* 195 */     MCD_OPC_Decode, 247, 6, 2, // Opcode: SUBrsr
70
/* 199 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 213
71
/* 204 */     MCD_OPC_CheckPredicate, 0, 200, 31, 0, // Skip to: 8345
72
/* 209 */     MCD_OPC_Decode, 152, 4, 2, // Opcode: ADDrsr
73
/* 213 */     MCD_OPC_FilterValue, 3, 191, 31, 0, // Skip to: 8345
74
/* 218 */     MCD_OPC_CheckPredicate, 0, 186, 31, 0, // Skip to: 8345
75
/* 223 */     MCD_OPC_Decode, 241, 5, 3, // Opcode: SBCrsr
76
/* 227 */     MCD_OPC_FilterValue, 1, 177, 31, 0, // Skip to: 8345
77
/* 232 */     MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
78
/* 235 */     MCD_OPC_FilterValue, 0, 71, 0, 0, // Skip to: 311
79
/* 240 */     MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
80
/* 243 */     MCD_OPC_FilterValue, 0, 14, 0, 0, // Skip to: 262
81
/* 248 */     MCD_OPC_CheckPredicate, 1, 156, 31, 0, // Skip to: 8345
82
/* 253 */     MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
83
/* 258 */     MCD_OPC_Decode, 188, 5, 4, // Opcode: MUL
84
/* 262 */     MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 283
85
/* 267 */     MCD_OPC_CheckPredicate, 1, 137, 31, 0, // Skip to: 8345
86
/* 272 */     MCD_OPC_CheckField, 20, 1, 0, 130, 31, 0, // Skip to: 8345
87
/* 279 */     MCD_OPC_Decode, 152, 7, 5, // Opcode: UMAAL
88
/* 283 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 297
89
/* 288 */     MCD_OPC_CheckPredicate, 1, 116, 31, 0, // Skip to: 8345
90
/* 293 */     MCD_OPC_Decode, 154, 7, 6, // Opcode: UMULL
91
/* 297 */     MCD_OPC_FilterValue, 3, 107, 31, 0, // Skip to: 8345
92
/* 302 */     MCD_OPC_CheckPredicate, 1, 102, 31, 0, // Skip to: 8345
93
/* 307 */     MCD_OPC_Decode, 165, 6, 6, // Opcode: SMULL
94
/* 311 */     MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 347
95
/* 316 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
96
/* 319 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 333
97
/* 324 */     MCD_OPC_CheckPredicate, 0, 80, 31, 0, // Skip to: 8345
98
/* 329 */     MCD_OPC_Decode, 234, 6, 7, // Opcode: STRH_POST
99
/* 333 */     MCD_OPC_FilterValue, 1, 71, 31, 0, // Skip to: 8345
100
/* 338 */     MCD_OPC_CheckPredicate, 0, 66, 31, 0, // Skip to: 8345
101
/* 343 */     MCD_OPC_Decode, 143, 5, 7, // Opcode: LDRH_POST
102
/* 347 */     MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 383
103
/* 352 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
104
/* 355 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 369
105
/* 360 */     MCD_OPC_CheckPredicate, 0, 44, 31, 0, // Skip to: 8345
106
/* 365 */     MCD_OPC_Decode, 134, 5, 7, // Opcode: LDRD_POST
107
/* 369 */     MCD_OPC_FilterValue, 1, 35, 31, 0, // Skip to: 8345
108
/* 374 */     MCD_OPC_CheckPredicate, 0, 30, 31, 0, // Skip to: 8345
109
/* 379 */     MCD_OPC_Decode, 148, 5, 7, // Opcode: LDRSB_POST
110
/* 383 */     MCD_OPC_FilterValue, 3, 21, 31, 0, // Skip to: 8345
111
/* 388 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
112
/* 391 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 405
113
/* 396 */     MCD_OPC_CheckPredicate, 0, 8, 31, 0, // Skip to: 8345
114
/* 401 */     MCD_OPC_Decode, 225, 6, 7, // Opcode: STRD_POST
115
/* 405 */     MCD_OPC_FilterValue, 1, 255, 30, 0, // Skip to: 8345
116
/* 410 */     MCD_OPC_CheckPredicate, 0, 250, 30, 0, // Skip to: 8345
117
/* 415 */     MCD_OPC_Decode, 153, 5, 7, // Opcode: LDRSH_POST
118
/* 419 */     MCD_OPC_FilterValue, 1, 241, 30, 0, // Skip to: 8345
119
/* 424 */     MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
120
/* 427 */     MCD_OPC_FilterValue, 0, 6, 2, 0, // Skip to: 950
121
/* 432 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
122
/* 435 */     MCD_OPC_FilterValue, 0, 152, 1, 0, // Skip to: 848
123
/* 440 */     MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
124
/* 443 */     MCD_OPC_FilterValue, 0, 66, 1, 0, // Skip to: 770
125
/* 448 */     MCD_OPC_ExtractField, 28, 4,  // Inst{31-28} ...
126
/* 451 */     MCD_OPC_FilterValue, 14, 67, 0, 0, // Skip to: 523
127
/* 456 */     MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
128
/* 459 */     MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 491
129
/* 464 */     MCD_OPC_CheckPredicate, 2, 171, 0, 0, // Skip to: 640
130
/* 469 */     MCD_OPC_CheckField, 6, 2, 1, 164, 0, 0, // Skip to: 640
131
/* 476 */     MCD_OPC_CheckField, 4, 1, 0, 157, 0, 0, // Skip to: 640
132
/* 483 */     MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
133
/* 487 */     MCD_OPC_Decode, 194, 4, 8, // Opcode: CRC32B
134
/* 491 */     MCD_OPC_FilterValue, 1, 144, 0, 0, // Skip to: 640
135
/* 496 */     MCD_OPC_CheckPredicate, 2, 139, 0, 0, // Skip to: 640
136
/* 501 */     MCD_OPC_CheckField, 6, 2, 1, 132, 0, 0, // Skip to: 640
137
/* 508 */     MCD_OPC_CheckField, 4, 1, 0, 125, 0, 0, // Skip to: 640
138
/* 515 */     MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
139
/* 519 */     MCD_OPC_Decode, 195, 4, 8, // Opcode: CRC32CB
140
/* 523 */     MCD_OPC_FilterValue, 15, 112, 0, 0, // Skip to: 640
141
/* 528 */     MCD_OPC_ExtractField, 10, 8,  // Inst{17-10} ...
142
/* 531 */     MCD_OPC_FilterValue, 0, 23, 0, 0, // Skip to: 559
143
/* 536 */     MCD_OPC_CheckPredicate, 0, 99, 0, 0, // Skip to: 640
144
/* 541 */     MCD_OPC_CheckField, 9, 1, 0, 92, 0, 0, // Skip to: 640
145
/* 548 */     MCD_OPC_CheckField, 0, 5, 0, 85, 0, 0, // Skip to: 640
146
/* 555 */     MCD_OPC_Decode, 192, 4, 9, // Opcode: CPS2p
147
/* 559 */     MCD_OPC_FilterValue, 64, 30, 0, 0, // Skip to: 594
148
/* 564 */     MCD_OPC_CheckPredicate, 0, 71, 0, 0, // Skip to: 640
149
/* 569 */     MCD_OPC_CheckField, 18, 2, 0, 64, 0, 0, // Skip to: 640
150
/* 576 */     MCD_OPC_CheckField, 6, 3, 0, 57, 0, 0, // Skip to: 640
151
/* 583 */     MCD_OPC_CheckField, 0, 5, 0, 50, 0, 0, // Skip to: 640
152
/* 590 */     MCD_OPC_Decode, 245, 5, 10, // Opcode: SETEND
153
/* 594 */     MCD_OPC_FilterValue, 128, 1, 40, 0, 0, // Skip to: 640
154
/* 600 */     MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
155
/* 603 */     MCD_OPC_FilterValue, 0, 32, 0, 0, // Skip to: 640
156
/* 608 */     MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 631
157
/* 613 */     MCD_OPC_CheckField, 18, 2, 0, 11, 0, 0, // Skip to: 631
158
/* 620 */     MCD_OPC_CheckField, 6, 3, 0, 4, 0, 0, // Skip to: 631
159
/* 627 */     MCD_OPC_Decode, 191, 4, 9, // Opcode: CPS1p
160
/* 631 */     MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 640
161
/* 636 */     MCD_OPC_Decode, 193, 4, 9, // Opcode: CPS3p
162
/* 640 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
163
/* 643 */     MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 684
164
/* 648 */     MCD_OPC_CheckPredicate, 0, 88, 4, 0, // Skip to: 1765
165
/* 653 */     MCD_OPC_CheckField, 16, 1, 1, 81, 4, 0, // Skip to: 1765
166
/* 660 */     MCD_OPC_CheckField, 9, 1, 0, 74, 4, 0, // Skip to: 1765
167
/* 667 */     MCD_OPC_CheckField, 4, 1, 0, 67, 4, 0, // Skip to: 1765
168
/* 674 */     MCD_OPC_SoftFail, 143, 26 /* 0xd0f */, 128, 128, 56 /* 0xe0000 */,
169
/* 680 */     MCD_OPC_Decode, 182, 5, 11, // Opcode: MRS
170
/* 684 */     MCD_OPC_FilterValue, 1, 20, 0, 0, // Skip to: 709
171
/* 689 */     MCD_OPC_CheckPredicate, 0, 47, 4, 0, // Skip to: 1765
172
/* 694 */     MCD_OPC_CheckField, 4, 1, 1, 40, 4, 0, // Skip to: 1765
173
/* 701 */     MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
174
/* 705 */     MCD_OPC_Decode, 205, 5, 12, // Opcode: QADD
175
/* 709 */     MCD_OPC_FilterValue, 2, 35, 0, 0, // Skip to: 749
176
/* 714 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
177
/* 717 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 731
178
/* 722 */     MCD_OPC_CheckPredicate, 3, 14, 4, 0, // Skip to: 1765
179
/* 727 */     MCD_OPC_Decode, 136, 6, 13, // Opcode: SMLABB
180
/* 731 */     MCD_OPC_FilterValue, 1, 5, 4, 0, // Skip to: 1765
181
/* 736 */     MCD_OPC_CheckPredicate, 4, 0, 4, 0, // Skip to: 1765
182
/* 741 */     MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
183
/* 745 */     MCD_OPC_Decode, 249, 6, 14, // Opcode: SWP
184
/* 749 */     MCD_OPC_FilterValue, 3, 243, 3, 0, // Skip to: 1765
185
/* 754 */     MCD_OPC_CheckPredicate, 3, 238, 3, 0, // Skip to: 1765
186
/* 759 */     MCD_OPC_CheckField, 4, 1, 0, 231, 3, 0, // Skip to: 1765
187
/* 766 */     MCD_OPC_Decode, 137, 6, 13, // Opcode: SMLABT
188
/* 770 */     MCD_OPC_FilterValue, 1, 222, 3, 0, // Skip to: 1765
189
/* 775 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
190
/* 778 */     MCD_OPC_FilterValue, 1, 23, 0, 0, // Skip to: 806
191
/* 783 */     MCD_OPC_CheckPredicate, 5, 209, 3, 0, // Skip to: 1765
192
/* 788 */     MCD_OPC_CheckField, 28, 4, 14, 202, 3, 0, // Skip to: 1765
193
/* 795 */     MCD_OPC_CheckField, 4, 1, 1, 195, 3, 0, // Skip to: 1765
194
/* 802 */     MCD_OPC_Decode, 219, 4, 15, // Opcode: HLT
195
/* 806 */     MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 827
196
/* 811 */     MCD_OPC_CheckPredicate, 3, 181, 3, 0, // Skip to: 1765
197
/* 816 */     MCD_OPC_CheckField, 4, 1, 0, 174, 3, 0, // Skip to: 1765
198
/* 823 */     MCD_OPC_Decode, 147, 6, 13, // Opcode: SMLATB
199
/* 827 */     MCD_OPC_FilterValue, 3, 165, 3, 0, // Skip to: 1765
200
/* 832 */     MCD_OPC_CheckPredicate, 3, 160, 3, 0, // Skip to: 1765
201
/* 837 */     MCD_OPC_CheckField, 4, 1, 0, 153, 3, 0, // Skip to: 1765
202
/* 844 */     MCD_OPC_Decode, 148, 6, 13, // Opcode: SMLATT
203
/* 848 */     MCD_OPC_FilterValue, 1, 144, 3, 0, // Skip to: 1765
204
/* 853 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
205
/* 856 */     MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 924
206
/* 861 */     MCD_OPC_CheckPredicate, 0, 16, 0, 0, // Skip to: 882
207
/* 866 */     MCD_OPC_CheckField, 5, 7, 0, 9, 0, 0, // Skip to: 882
208
/* 873 */     MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
209
/* 878 */     MCD_OPC_Decode, 137, 7, 16, // Opcode: TSTrr
210
/* 882 */     MCD_OPC_CheckPredicate, 6, 23, 0, 0, // Skip to: 910
211
/* 887 */     MCD_OPC_CheckField, 28, 4, 15, 16, 0, 0, // Skip to: 910
212
/* 894 */     MCD_OPC_CheckField, 5, 3, 0, 9, 0, 0, // Skip to: 910
213
/* 901 */     MCD_OPC_SoftFail, 143, 250, 63 /* 0xffd0f */, 0,
214
/* 906 */     MCD_OPC_Decode, 246, 5, 10, // Opcode: SETPAN
215
/* 910 */     MCD_OPC_CheckPredicate, 0, 82, 3, 0, // Skip to: 1765
216
/* 915 */     MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
217
/* 920 */     MCD_OPC_Decode, 138, 7, 17, // Opcode: TSTrsi
218
/* 924 */     MCD_OPC_FilterValue, 1, 68, 3, 0, // Skip to: 1765
219
/* 929 */     MCD_OPC_CheckPredicate, 0, 63, 3, 0, // Skip to: 1765
220
/* 934 */     MCD_OPC_CheckField, 7, 1, 0, 56, 3, 0, // Skip to: 1765
221
/* 941 */     MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
222
/* 946 */     MCD_OPC_Decode, 139, 7, 18, // Opcode: TSTrsr
223
/* 950 */     MCD_OPC_FilterValue, 1, 62, 1, 0, // Skip to: 1273
224
/* 955 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
225
/* 958 */     MCD_OPC_FilterValue, 0, 192, 0, 0, // Skip to: 1155
226
/* 963 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
227
/* 966 */     MCD_OPC_FilterValue, 0, 144, 0, 0, // Skip to: 1115
228
/* 971 */     MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
229
/* 974 */     MCD_OPC_FilterValue, 0, 22, 0, 0, // Skip to: 1001
230
/* 979 */     MCD_OPC_CheckPredicate, 0, 13, 3, 0, // Skip to: 1765
231
/* 984 */     MCD_OPC_CheckField, 9, 1, 0, 6, 3, 0, // Skip to: 1765
232
/* 991 */     MCD_OPC_SoftFail, 143, 26 /* 0xd0f */, 128, 128, 60 /* 0xf0000 */,
233
/* 997 */     MCD_OPC_Decode, 184, 5, 11, // Opcode: MRSsys
234
/* 1001 */    MCD_OPC_FilterValue, 2, 53, 0, 0, // Skip to: 1059
235
/* 1006 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
236
/* 1009 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 1034
237
/* 1014 */    MCD_OPC_CheckPredicate, 2, 234, 2, 0, // Skip to: 1765
238
/* 1019 */    MCD_OPC_CheckField, 28, 4, 14, 227, 2, 0, // Skip to: 1765
239
/* 1026 */    MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
240
/* 1030 */    MCD_OPC_Decode, 199, 4, 8, // Opcode: CRC32W
241
/* 1034 */    MCD_OPC_FilterValue, 1, 214, 2, 0, // Skip to: 1765
242
/* 1039 */    MCD_OPC_CheckPredicate, 2, 209, 2, 0, // Skip to: 1765
243
/* 1044 */    MCD_OPC_CheckField, 28, 4, 14, 202, 2, 0, // Skip to: 1765
244
/* 1051 */    MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
245
/* 1055 */    MCD_OPC_Decode, 197, 4, 8, // Opcode: CRC32CW
246
/* 1059 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 1073
247
/* 1064 */    MCD_OPC_CheckPredicate, 3, 184, 2, 0, // Skip to: 1765
248
/* 1069 */    MCD_OPC_Decode, 141, 6, 19, // Opcode: SMLALBB
249
/* 1073 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 1087
250
/* 1078 */    MCD_OPC_CheckPredicate, 3, 170, 2, 0, // Skip to: 1765
251
/* 1083 */    MCD_OPC_Decode, 145, 6, 19, // Opcode: SMLALTB
252
/* 1087 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1101
253
/* 1092 */    MCD_OPC_CheckPredicate, 3, 156, 2, 0, // Skip to: 1765
254
/* 1097 */    MCD_OPC_Decode, 142, 6, 19, // Opcode: SMLALBT
255
/* 1101 */    MCD_OPC_FilterValue, 7, 147, 2, 0, // Skip to: 1765
256
/* 1106 */    MCD_OPC_CheckPredicate, 3, 142, 2, 0, // Skip to: 1765
257
/* 1111 */    MCD_OPC_Decode, 146, 6, 19, // Opcode: SMLALTT
258
/* 1115 */    MCD_OPC_FilterValue, 1, 133, 2, 0, // Skip to: 1765
259
/* 1120 */    MCD_OPC_CheckPredicate, 0, 16, 0, 0, // Skip to: 1141
260
/* 1125 */    MCD_OPC_CheckField, 5, 7, 0, 9, 0, 0, // Skip to: 1141
261
/* 1132 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
262
/* 1137 */    MCD_OPC_Decode, 188, 4, 20, // Opcode: CMPrr
263
/* 1141 */    MCD_OPC_CheckPredicate, 0, 107, 2, 0, // Skip to: 1765
264
/* 1146 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
265
/* 1151 */    MCD_OPC_Decode, 189, 4, 17, // Opcode: CMPrsi
266
/* 1155 */    MCD_OPC_FilterValue, 1, 93, 2, 0, // Skip to: 1765
267
/* 1160 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
268
/* 1163 */    MCD_OPC_FilterValue, 0, 73, 0, 0, // Skip to: 1241
269
/* 1168 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
270
/* 1171 */    MCD_OPC_FilterValue, 0, 46, 0, 0, // Skip to: 1222
271
/* 1176 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
272
/* 1179 */    MCD_OPC_FilterValue, 2, 13, 0, 0, // Skip to: 1197
273
/* 1184 */    MCD_OPC_CheckPredicate, 0, 64, 2, 0, // Skip to: 1765
274
/* 1189 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
275
/* 1193 */    MCD_OPC_Decode, 209, 5, 21, // Opcode: QDADD
276
/* 1197 */    MCD_OPC_FilterValue, 3, 51, 2, 0, // Skip to: 1765
277
/* 1202 */    MCD_OPC_CheckPredicate, 7, 46, 2, 0, // Skip to: 1765
278
/* 1207 */    MCD_OPC_SoftFail, 128, 128, 128, 128, 1 /* 0x10000000 */, 128, 128, 128, 128, 14 /* 0xffffffffe0000000 */,
279
/* 1218 */    MCD_OPC_Decode, 220, 4, 15, // Opcode: HVC
280
/* 1222 */    MCD_OPC_FilterValue, 1, 26, 2, 0, // Skip to: 1765
281
/* 1227 */    MCD_OPC_CheckPredicate, 0, 21, 2, 0, // Skip to: 1765
282
/* 1232 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
283
/* 1237 */    MCD_OPC_Decode, 190, 4, 18, // Opcode: CMPrsr
284
/* 1241 */    MCD_OPC_FilterValue, 1, 7, 2, 0, // Skip to: 1765
285
/* 1246 */    MCD_OPC_CheckPredicate, 4, 2, 2, 0, // Skip to: 1765
286
/* 1251 */    MCD_OPC_CheckField, 20, 1, 0, 251, 1, 0, // Skip to: 1765
287
/* 1258 */    MCD_OPC_CheckField, 5, 2, 0, 244, 1, 0, // Skip to: 1765
288
/* 1265 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
289
/* 1269 */    MCD_OPC_Decode, 250, 6, 14, // Opcode: SWPB
290
/* 1273 */    MCD_OPC_FilterValue, 2, 241, 0, 0, // Skip to: 1519
291
/* 1278 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
292
/* 1281 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1311
293
/* 1286 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 1302
294
/* 1291 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 1302
295
/* 1298 */    MCD_OPC_Decode, 194, 5, 0, // Opcode: ORRrr
296
/* 1302 */    MCD_OPC_CheckPredicate, 0, 202, 1, 0, // Skip to: 1765
297
/* 1307 */    MCD_OPC_Decode, 195, 5, 1, // Opcode: ORRrsi
298
/* 1311 */    MCD_OPC_FilterValue, 1, 193, 1, 0, // Skip to: 1765
299
/* 1316 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
300
/* 1319 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1333
301
/* 1324 */    MCD_OPC_CheckPredicate, 0, 180, 1, 0, // Skip to: 1765
302
/* 1329 */    MCD_OPC_Decode, 196, 5, 2, // Opcode: ORRrsr
303
/* 1333 */    MCD_OPC_FilterValue, 1, 171, 1, 0, // Skip to: 1765
304
/* 1338 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
305
/* 1341 */    MCD_OPC_FilterValue, 12, 59, 0, 0, // Skip to: 1405
306
/* 1346 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
307
/* 1349 */    MCD_OPC_FilterValue, 0, 23, 0, 0, // Skip to: 1377
308
/* 1354 */    MCD_OPC_CheckPredicate, 8, 150, 1, 0, // Skip to: 1765
309
/* 1359 */    MCD_OPC_CheckField, 12, 4, 15, 143, 1, 0, // Skip to: 1765
310
/* 1366 */    MCD_OPC_CheckField, 5, 2, 0, 136, 1, 0, // Skip to: 1765
311
/* 1373 */    MCD_OPC_Decode, 201, 6, 22, // Opcode: STL
312
/* 1377 */    MCD_OPC_FilterValue, 1, 127, 1, 0, // Skip to: 1765
313
/* 1382 */    MCD_OPC_CheckPredicate, 8, 122, 1, 0, // Skip to: 1765
314
/* 1387 */    MCD_OPC_CheckField, 5, 2, 0, 115, 1, 0, // Skip to: 1765
315
/* 1394 */    MCD_OPC_CheckField, 0, 4, 15, 108, 1, 0, // Skip to: 1765
316
/* 1401 */    MCD_OPC_Decode, 222, 4, 23, // Opcode: LDA
317
/* 1405 */    MCD_OPC_FilterValue, 14, 52, 0, 0, // Skip to: 1462
318
/* 1410 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
319
/* 1413 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1434
320
/* 1418 */    MCD_OPC_CheckPredicate, 9, 86, 1, 0, // Skip to: 1765
321
/* 1423 */    MCD_OPC_CheckField, 5, 2, 0, 79, 1, 0, // Skip to: 1765
322
/* 1430 */    MCD_OPC_Decode, 203, 6, 24, // Opcode: STLEX
323
/* 1434 */    MCD_OPC_FilterValue, 1, 70, 1, 0, // Skip to: 1765
324
/* 1439 */    MCD_OPC_CheckPredicate, 9, 65, 1, 0, // Skip to: 1765
325
/* 1444 */    MCD_OPC_CheckField, 5, 2, 0, 58, 1, 0, // Skip to: 1765
326
/* 1451 */    MCD_OPC_CheckField, 0, 4, 15, 51, 1, 0, // Skip to: 1765
327
/* 1458 */    MCD_OPC_Decode, 224, 4, 23, // Opcode: LDAEX
328
/* 1462 */    MCD_OPC_FilterValue, 15, 42, 1, 0, // Skip to: 1765
329
/* 1467 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
330
/* 1470 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1491
331
/* 1475 */    MCD_OPC_CheckPredicate, 0, 29, 1, 0, // Skip to: 1765
332
/* 1480 */    MCD_OPC_CheckField, 5, 2, 0, 22, 1, 0, // Skip to: 1765
333
/* 1487 */    MCD_OPC_Decode, 227, 6, 24, // Opcode: STREX
334
/* 1491 */    MCD_OPC_FilterValue, 1, 13, 1, 0, // Skip to: 1765
335
/* 1496 */    MCD_OPC_CheckPredicate, 0, 8, 1, 0, // Skip to: 1765
336
/* 1501 */    MCD_OPC_CheckField, 5, 2, 0, 1, 1, 0, // Skip to: 1765
337
/* 1508 */    MCD_OPC_CheckField, 0, 4, 15, 250, 0, 0, // Skip to: 1765
338
/* 1515 */    MCD_OPC_Decode, 136, 5, 23, // Opcode: LDREX
339
/* 1519 */    MCD_OPC_FilterValue, 3, 241, 0, 0, // Skip to: 1765
340
/* 1524 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
341
/* 1527 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1557
342
/* 1532 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 1548
343
/* 1537 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 1548
344
/* 1544 */    MCD_OPC_Decode, 165, 4, 0, // Opcode: BICrr
345
/* 1548 */    MCD_OPC_CheckPredicate, 0, 212, 0, 0, // Skip to: 1765
346
/* 1553 */    MCD_OPC_Decode, 166, 4, 1, // Opcode: BICrsi
347
/* 1557 */    MCD_OPC_FilterValue, 1, 203, 0, 0, // Skip to: 1765
348
/* 1562 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
349
/* 1565 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1579
350
/* 1570 */    MCD_OPC_CheckPredicate, 0, 190, 0, 0, // Skip to: 1765
351
/* 1575 */    MCD_OPC_Decode, 167, 4, 2, // Opcode: BICrsr
352
/* 1579 */    MCD_OPC_FilterValue, 1, 181, 0, 0, // Skip to: 1765
353
/* 1584 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
354
/* 1587 */    MCD_OPC_FilterValue, 12, 59, 0, 0, // Skip to: 1651
355
/* 1592 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
356
/* 1595 */    MCD_OPC_FilterValue, 0, 23, 0, 0, // Skip to: 1623
357
/* 1600 */    MCD_OPC_CheckPredicate, 8, 160, 0, 0, // Skip to: 1765
358
/* 1605 */    MCD_OPC_CheckField, 12, 4, 15, 153, 0, 0, // Skip to: 1765
359
/* 1612 */    MCD_OPC_CheckField, 5, 2, 0, 146, 0, 0, // Skip to: 1765
360
/* 1619 */    MCD_OPC_Decode, 202, 6, 22, // Opcode: STLB
361
/* 1623 */    MCD_OPC_FilterValue, 1, 137, 0, 0, // Skip to: 1765
362
/* 1628 */    MCD_OPC_CheckPredicate, 8, 132, 0, 0, // Skip to: 1765
363
/* 1633 */    MCD_OPC_CheckField, 5, 2, 0, 125, 0, 0, // Skip to: 1765
364
/* 1640 */    MCD_OPC_CheckField, 0, 4, 15, 118, 0, 0, // Skip to: 1765
365
/* 1647 */    MCD_OPC_Decode, 223, 4, 23, // Opcode: LDAB
366
/* 1651 */    MCD_OPC_FilterValue, 14, 52, 0, 0, // Skip to: 1708
367
/* 1656 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
368
/* 1659 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1680
369
/* 1664 */    MCD_OPC_CheckPredicate, 9, 96, 0, 0, // Skip to: 1765
370
/* 1669 */    MCD_OPC_CheckField, 5, 2, 0, 89, 0, 0, // Skip to: 1765
371
/* 1676 */    MCD_OPC_Decode, 204, 6, 24, // Opcode: STLEXB
372
/* 1680 */    MCD_OPC_FilterValue, 1, 80, 0, 0, // Skip to: 1765
373
/* 1685 */    MCD_OPC_CheckPredicate, 9, 75, 0, 0, // Skip to: 1765
374
/* 1690 */    MCD_OPC_CheckField, 5, 2, 0, 68, 0, 0, // Skip to: 1765
375
/* 1697 */    MCD_OPC_CheckField, 0, 4, 15, 61, 0, 0, // Skip to: 1765
376
/* 1704 */    MCD_OPC_Decode, 225, 4, 23, // Opcode: LDAEXB
377
/* 1708 */    MCD_OPC_FilterValue, 15, 52, 0, 0, // Skip to: 1765
378
/* 1713 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
379
/* 1716 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1737
380
/* 1721 */    MCD_OPC_CheckPredicate, 0, 39, 0, 0, // Skip to: 1765
381
/* 1726 */    MCD_OPC_CheckField, 5, 2, 0, 32, 0, 0, // Skip to: 1765
382
/* 1733 */    MCD_OPC_Decode, 228, 6, 24, // Opcode: STREXB
383
/* 1737 */    MCD_OPC_FilterValue, 1, 23, 0, 0, // Skip to: 1765
384
/* 1742 */    MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 1765
385
/* 1747 */    MCD_OPC_CheckField, 5, 2, 0, 11, 0, 0, // Skip to: 1765
386
/* 1754 */    MCD_OPC_CheckField, 0, 4, 15, 4, 0, 0, // Skip to: 1765
387
/* 1761 */    MCD_OPC_Decode, 137, 5, 23, // Opcode: LDREXB
388
/* 1765 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
389
/* 1768 */    MCD_OPC_FilterValue, 0, 37, 0, 0, // Skip to: 1810
390
/* 1773 */    MCD_OPC_CheckPredicate, 7, 167, 25, 0, // Skip to: 8345
391
/* 1778 */    MCD_OPC_CheckField, 23, 1, 0, 160, 25, 0, // Skip to: 8345
392
/* 1785 */    MCD_OPC_CheckField, 20, 1, 0, 153, 25, 0, // Skip to: 8345
393
/* 1792 */    MCD_OPC_CheckField, 9, 3, 1, 146, 25, 0, // Skip to: 8345
394
/* 1799 */    MCD_OPC_CheckField, 0, 4, 0, 139, 25, 0, // Skip to: 8345
395
/* 1806 */    MCD_OPC_Decode, 183, 5, 25, // Opcode: MRSbanked
396
/* 1810 */    MCD_OPC_FilterValue, 11, 31, 0, 0, // Skip to: 1846
397
/* 1815 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
398
/* 1818 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1832
399
/* 1823 */    MCD_OPC_CheckPredicate, 0, 117, 25, 0, // Skip to: 8345
400
/* 1828 */    MCD_OPC_Decode, 231, 6, 7, // Opcode: STRH
401
/* 1832 */    MCD_OPC_FilterValue, 1, 108, 25, 0, // Skip to: 8345
402
/* 1837 */    MCD_OPC_CheckPredicate, 0, 103, 25, 0, // Skip to: 8345
403
/* 1842 */    MCD_OPC_Decode, 140, 5, 7, // Opcode: LDRH
404
/* 1846 */    MCD_OPC_FilterValue, 13, 31, 0, 0, // Skip to: 1882
405
/* 1851 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
406
/* 1854 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1868
407
/* 1859 */    MCD_OPC_CheckPredicate, 3, 81, 25, 0, // Skip to: 8345
408
/* 1864 */    MCD_OPC_Decode, 133, 5, 7, // Opcode: LDRD
409
/* 1868 */    MCD_OPC_FilterValue, 1, 72, 25, 0, // Skip to: 8345
410
/* 1873 */    MCD_OPC_CheckPredicate, 0, 67, 25, 0, // Skip to: 8345
411
/* 1878 */    MCD_OPC_Decode, 145, 5, 7, // Opcode: LDRSB
412
/* 1882 */    MCD_OPC_FilterValue, 15, 58, 25, 0, // Skip to: 8345
413
/* 1887 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
414
/* 1890 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1904
415
/* 1895 */    MCD_OPC_CheckPredicate, 3, 45, 25, 0, // Skip to: 8345
416
/* 1900 */    MCD_OPC_Decode, 224, 6, 7, // Opcode: STRD
417
/* 1904 */    MCD_OPC_FilterValue, 1, 36, 25, 0, // Skip to: 8345
418
/* 1909 */    MCD_OPC_CheckPredicate, 0, 31, 25, 0, // Skip to: 8345
419
/* 1914 */    MCD_OPC_Decode, 150, 5, 7, // Opcode: LDRSH
420
/* 1918 */    MCD_OPC_FilterValue, 1, 22, 25, 0, // Skip to: 8345
421
/* 1923 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
422
/* 1926 */    MCD_OPC_FilterValue, 0, 180, 2, 0, // Skip to: 2623
423
/* 1931 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
424
/* 1934 */    MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 2002
425
/* 1939 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
426
/* 1942 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1972
427
/* 1947 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 1963
428
/* 1952 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 1963
429
/* 1959 */    MCD_OPC_Decode, 204, 4, 0, // Opcode: EORrr
430
/* 1963 */    MCD_OPC_CheckPredicate, 0, 233, 24, 0, // Skip to: 8345
431
/* 1968 */    MCD_OPC_Decode, 205, 4, 1, // Opcode: EORrsi
432
/* 1972 */    MCD_OPC_FilterValue, 1, 224, 24, 0, // Skip to: 8345
433
/* 1977 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 1993
434
/* 1982 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 1993
435
/* 1989 */    MCD_OPC_Decode, 228, 5, 0, // Opcode: RSBrr
436
/* 1993 */    MCD_OPC_CheckPredicate, 0, 203, 24, 0, // Skip to: 8345
437
/* 1998 */    MCD_OPC_Decode, 229, 5, 1, // Opcode: RSBrsi
438
/* 2002 */    MCD_OPC_FilterValue, 1, 63, 0, 0, // Skip to: 2070
439
/* 2007 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
440
/* 2010 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2040
441
/* 2015 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 2031
442
/* 2020 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 2031
443
/* 2027 */    MCD_OPC_Decode, 146, 4, 0, // Opcode: ADCrr
444
/* 2031 */    MCD_OPC_CheckPredicate, 0, 165, 24, 0, // Skip to: 8345
445
/* 2036 */    MCD_OPC_Decode, 147, 4, 1, // Opcode: ADCrsi
446
/* 2040 */    MCD_OPC_FilterValue, 1, 156, 24, 0, // Skip to: 8345
447
/* 2045 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 2061
448
/* 2050 */    MCD_OPC_CheckField, 5, 7, 0, 4, 0, 0, // Skip to: 2061
449
/* 2057 */    MCD_OPC_Decode, 232, 5, 0, // Opcode: RSCrr
450
/* 2061 */    MCD_OPC_CheckPredicate, 0, 135, 24, 0, // Skip to: 8345
451
/* 2066 */    MCD_OPC_Decode, 233, 5, 1, // Opcode: RSCrsi
452
/* 2070 */    MCD_OPC_FilterValue, 2, 166, 1, 0, // Skip to: 2497
453
/* 2075 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
454
/* 2078 */    MCD_OPC_FilterValue, 0, 70, 1, 0, // Skip to: 2409
455
/* 2083 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
456
/* 2086 */    MCD_OPC_FilterValue, 0, 38, 0, 0, // Skip to: 2129
457
/* 2091 */    MCD_OPC_ExtractField, 9, 7,  // Inst{15-9} ...
458
/* 2094 */    MCD_OPC_FilterValue, 120, 16, 0, 0, // Skip to: 2115
459
/* 2099 */    MCD_OPC_CheckPredicate, 0, 97, 24, 0, // Skip to: 8345
460
/* 2104 */    MCD_OPC_CheckField, 8, 1, 0, 90, 24, 0, // Skip to: 8345
461
/* 2111 */    MCD_OPC_Decode, 185, 5, 26, // Opcode: MSR
462
/* 2115 */    MCD_OPC_FilterValue, 121, 81, 24, 0, // Skip to: 8345
463
/* 2120 */    MCD_OPC_CheckPredicate, 7, 76, 24, 0, // Skip to: 8345
464
/* 2125 */    MCD_OPC_Decode, 186, 5, 27, // Opcode: MSRbanked
465
/* 2129 */    MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 2158
466
/* 2134 */    MCD_OPC_CheckPredicate, 0, 62, 24, 0, // Skip to: 8345
467
/* 2139 */    MCD_OPC_CheckField, 22, 1, 0, 55, 24, 0, // Skip to: 8345
468
/* 2146 */    MCD_OPC_CheckField, 8, 12, 255, 31, 47, 24, 0, // Skip to: 8345
469
/* 2154 */    MCD_OPC_Decode, 175, 4, 28, // Opcode: BXJ
470
/* 2158 */    MCD_OPC_FilterValue, 2, 67, 0, 0, // Skip to: 2230
471
/* 2163 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
472
/* 2166 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 2198
473
/* 2171 */    MCD_OPC_CheckPredicate, 2, 25, 24, 0, // Skip to: 8345
474
/* 2176 */    MCD_OPC_CheckField, 28, 4, 14, 18, 24, 0, // Skip to: 8345
475
/* 2183 */    MCD_OPC_CheckField, 22, 1, 0, 11, 24, 0, // Skip to: 8345
476
/* 2190 */    MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
477
/* 2194 */    MCD_OPC_Decode, 198, 4, 8, // Opcode: CRC32H
478
/* 2198 */    MCD_OPC_FilterValue, 1, 254, 23, 0, // Skip to: 8345
479
/* 2203 */    MCD_OPC_CheckPredicate, 2, 249, 23, 0, // Skip to: 8345
480
/* 2208 */    MCD_OPC_CheckField, 28, 4, 14, 242, 23, 0, // Skip to: 8345
481
/* 2215 */    MCD_OPC_CheckField, 22, 1, 0, 235, 23, 0, // Skip to: 8345
482
/* 2222 */    MCD_OPC_SoftFail, 128, 26 /* 0xd00 */, 0,
483
/* 2226 */    MCD_OPC_Decode, 196, 4, 8, // Opcode: CRC32CH
484
/* 2230 */    MCD_OPC_FilterValue, 3, 30, 0, 0, // Skip to: 2265
485
/* 2235 */    MCD_OPC_CheckPredicate, 7, 217, 23, 0, // Skip to: 8345
486
/* 2240 */    MCD_OPC_CheckField, 22, 1, 1, 210, 23, 0, // Skip to: 8345
487
/* 2247 */    MCD_OPC_CheckField, 8, 12, 0, 203, 23, 0, // Skip to: 8345
488
/* 2254 */    MCD_OPC_CheckField, 0, 4, 14, 196, 23, 0, // Skip to: 8345
489
/* 2261 */    MCD_OPC_Decode, 207, 4, 29, // Opcode: ERET
490
/* 2265 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 2301
491
/* 2270 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
492
/* 2273 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2287
493
/* 2278 */    MCD_OPC_CheckPredicate, 3, 174, 23, 0, // Skip to: 8345
494
/* 2283 */    MCD_OPC_Decode, 149, 6, 13, // Opcode: SMLAWB
495
/* 2287 */    MCD_OPC_FilterValue, 1, 165, 23, 0, // Skip to: 8345
496
/* 2292 */    MCD_OPC_CheckPredicate, 3, 160, 23, 0, // Skip to: 8345
497
/* 2297 */    MCD_OPC_Decode, 163, 6, 30, // Opcode: SMULBB
498
/* 2301 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 2337
499
/* 2306 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
500
/* 2309 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2323
501
/* 2314 */    MCD_OPC_CheckPredicate, 3, 138, 23, 0, // Skip to: 8345
502
/* 2319 */    MCD_OPC_Decode, 168, 6, 30, // Opcode: SMULWB
503
/* 2323 */    MCD_OPC_FilterValue, 1, 129, 23, 0, // Skip to: 8345
504
/* 2328 */    MCD_OPC_CheckPredicate, 3, 124, 23, 0, // Skip to: 8345
505
/* 2333 */    MCD_OPC_Decode, 166, 6, 30, // Opcode: SMULTB
506
/* 2337 */    MCD_OPC_FilterValue, 6, 31, 0, 0, // Skip to: 2373
507
/* 2342 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
508
/* 2345 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2359
509
/* 2350 */    MCD_OPC_CheckPredicate, 3, 102, 23, 0, // Skip to: 8345
510
/* 2355 */    MCD_OPC_Decode, 150, 6, 13, // Opcode: SMLAWT
511
/* 2359 */    MCD_OPC_FilterValue, 1, 93, 23, 0, // Skip to: 8345
512
/* 2364 */    MCD_OPC_CheckPredicate, 3, 88, 23, 0, // Skip to: 8345
513
/* 2369 */    MCD_OPC_Decode, 164, 6, 30, // Opcode: SMULBT
514
/* 2373 */    MCD_OPC_FilterValue, 7, 79, 23, 0, // Skip to: 8345
515
/* 2378 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
516
/* 2381 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2395
517
/* 2386 */    MCD_OPC_CheckPredicate, 3, 66, 23, 0, // Skip to: 8345
518
/* 2391 */    MCD_OPC_Decode, 169, 6, 30, // Opcode: SMULWT
519
/* 2395 */    MCD_OPC_FilterValue, 1, 57, 23, 0, // Skip to: 8345
520
/* 2400 */    MCD_OPC_CheckPredicate, 3, 52, 23, 0, // Skip to: 8345
521
/* 2405 */    MCD_OPC_Decode, 167, 6, 30, // Opcode: SMULTT
522
/* 2409 */    MCD_OPC_FilterValue, 1, 43, 23, 0, // Skip to: 8345
523
/* 2414 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
524
/* 2417 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 2457
525
/* 2422 */    MCD_OPC_CheckPredicate, 0, 16, 0, 0, // Skip to: 2443
526
/* 2427 */    MCD_OPC_CheckField, 5, 7, 0, 9, 0, 0, // Skip to: 2443
527
/* 2434 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
528
/* 2439 */    MCD_OPC_Decode, 130, 7, 20, // Opcode: TEQrr
529
/* 2443 */    MCD_OPC_CheckPredicate, 0, 9, 23, 0, // Skip to: 8345
530
/* 2448 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
531
/* 2453 */    MCD_OPC_Decode, 131, 7, 17, // Opcode: TEQrsi
532
/* 2457 */    MCD_OPC_FilterValue, 1, 251, 22, 0, // Skip to: 8345
533
/* 2462 */    MCD_OPC_CheckPredicate, 0, 16, 0, 0, // Skip to: 2483
534
/* 2467 */    MCD_OPC_CheckField, 5, 7, 0, 9, 0, 0, // Skip to: 2483
535
/* 2474 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
536
/* 2479 */    MCD_OPC_Decode, 184, 4, 20, // Opcode: CMNzrr
537
/* 2483 */    MCD_OPC_CheckPredicate, 0, 225, 22, 0, // Skip to: 8345
538
/* 2488 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
539
/* 2493 */    MCD_OPC_Decode, 185, 4, 17, // Opcode: CMNzrsi
540
/* 2497 */    MCD_OPC_FilterValue, 3, 211, 22, 0, // Skip to: 8345
541
/* 2502 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
542
/* 2505 */    MCD_OPC_FilterValue, 0, 73, 0, 0, // Skip to: 2583
543
/* 2510 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 2534
544
/* 2515 */    MCD_OPC_CheckField, 5, 16, 128, 15, 11, 0, 0, // Skip to: 2534
545
/* 2523 */    MCD_OPC_CheckField, 0, 4, 14, 4, 0, 0, // Skip to: 2534
546
/* 2530 */    MCD_OPC_Decode, 170, 5, 29, // Opcode: MOVPCLR
547
/* 2534 */    MCD_OPC_ExtractField, 5, 7,  // Inst{11-5} ...
548
/* 2537 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2567
549
/* 2542 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 2558
550
/* 2547 */    MCD_OPC_CheckField, 16, 4, 0, 4, 0, 0, // Skip to: 2558
551
/* 2554 */    MCD_OPC_Decode, 174, 5, 31, // Opcode: MOVr
552
/* 2558 */    MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 2567
553
/* 2563 */    MCD_OPC_Decode, 175, 5, 32, // Opcode: MOVr_TC
554
/* 2567 */    MCD_OPC_CheckPredicate, 0, 141, 22, 0, // Skip to: 8345
555
/* 2572 */    MCD_OPC_CheckField, 16, 4, 0, 134, 22, 0, // Skip to: 8345
556
/* 2579 */    MCD_OPC_Decode, 176, 5, 33, // Opcode: MOVsi
557
/* 2583 */    MCD_OPC_FilterValue, 1, 125, 22, 0, // Skip to: 8345
558
/* 2588 */    MCD_OPC_CheckPredicate, 0, 16, 0, 0, // Skip to: 2609
559
/* 2593 */    MCD_OPC_CheckField, 5, 7, 0, 9, 0, 0, // Skip to: 2609
560
/* 2600 */    MCD_OPC_SoftFail, 128, 128, 60 /* 0xf0000 */, 0,
561
/* 2605 */    MCD_OPC_Decode, 190, 5, 31, // Opcode: MVNr
562
/* 2609 */    MCD_OPC_CheckPredicate, 0, 99, 22, 0, // Skip to: 8345
563
/* 2614 */    MCD_OPC_SoftFail, 128, 128, 60 /* 0xf0000 */, 0,
564
/* 2619 */    MCD_OPC_Decode, 191, 5, 33, // Opcode: MVNsi
565
/* 2623 */    MCD_OPC_FilterValue, 1, 85, 22, 0, // Skip to: 8345
566
/* 2628 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
567
/* 2631 */    MCD_OPC_FilterValue, 0, 113, 1, 0, // Skip to: 3005
568
/* 2636 */    MCD_OPC_ExtractField, 22, 3,  // Inst{24-22} ...
569
/* 2639 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2653
570
/* 2644 */    MCD_OPC_CheckPredicate, 0, 64, 22, 0, // Skip to: 8345
571
/* 2649 */    MCD_OPC_Decode, 206, 4, 2, // Opcode: EORrsr
572
/* 2653 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2667
573
/* 2658 */    MCD_OPC_CheckPredicate, 0, 50, 22, 0, // Skip to: 8345
574
/* 2663 */    MCD_OPC_Decode, 230, 5, 2, // Opcode: RSBrsr
575
/* 2667 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2681
576
/* 2672 */    MCD_OPC_CheckPredicate, 0, 36, 22, 0, // Skip to: 8345
577
/* 2677 */    MCD_OPC_Decode, 148, 4, 3, // Opcode: ADCrsr
578
/* 2681 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 2695
579
/* 2686 */    MCD_OPC_CheckPredicate, 0, 22, 22, 0, // Skip to: 8345
580
/* 2691 */    MCD_OPC_Decode, 234, 5, 2, // Opcode: RSCrsr
581
/* 2695 */    MCD_OPC_FilterValue, 4, 163, 0, 0, // Skip to: 2863
582
/* 2700 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
583
/* 2703 */    MCD_OPC_FilterValue, 0, 136, 0, 0, // Skip to: 2844
584
/* 2708 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
585
/* 2711 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 2766
586
/* 2716 */    MCD_OPC_ExtractField, 8, 12,  // Inst{19-8} ...
587
/* 2719 */    MCD_OPC_FilterValue, 255, 31, 244, 21, 0, // Skip to: 8345
588
/* 2725 */    MCD_OPC_CheckPredicate, 10, 11, 0, 0, // Skip to: 2741
589
/* 2730 */    MCD_OPC_CheckField, 0, 4, 14, 4, 0, 0, // Skip to: 2741
590
/* 2737 */    MCD_OPC_Decode, 176, 4, 29, // Opcode: BX_RET
591
/* 2741 */    MCD_OPC_CheckPredicate, 10, 11, 0, 0, // Skip to: 2757
592
/* 2746 */    MCD_OPC_CheckField, 28, 4, 14, 4, 0, 0, // Skip to: 2757
593
/* 2753 */    MCD_OPC_Decode, 174, 4, 34, // Opcode: BX
594
/* 2757 */    MCD_OPC_CheckPredicate, 10, 207, 21, 0, // Skip to: 8345
595
/* 2762 */    MCD_OPC_Decode, 177, 4, 28, // Opcode: BX_pred
596
/* 2766 */    MCD_OPC_FilterValue, 1, 34, 0, 0, // Skip to: 2805
597
/* 2771 */    MCD_OPC_ExtractField, 8, 12,  // Inst{19-8} ...
598
/* 2774 */    MCD_OPC_FilterValue, 255, 31, 189, 21, 0, // Skip to: 8345
599
/* 2780 */    MCD_OPC_CheckPredicate, 11, 11, 0, 0, // Skip to: 2796
600
/* 2785 */    MCD_OPC_CheckField, 28, 4, 14, 4, 0, 0, // Skip to: 2796
601
/* 2792 */    MCD_OPC_Decode, 170, 4, 34, // Opcode: BLX
602
/* 2796 */    MCD_OPC_CheckPredicate, 11, 168, 21, 0, // Skip to: 8345
603
/* 2801 */    MCD_OPC_Decode, 171, 4, 28, // Opcode: BLX_pred
604
/* 2805 */    MCD_OPC_FilterValue, 2, 13, 0, 0, // Skip to: 2823
605
/* 2810 */    MCD_OPC_CheckPredicate, 0, 154, 21, 0, // Skip to: 8345
606
/* 2815 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
607
/* 2819 */    MCD_OPC_Decode, 212, 5, 21, // Opcode: QSUB
608
/* 2823 */    MCD_OPC_FilterValue, 3, 141, 21, 0, // Skip to: 8345
609
/* 2828 */    MCD_OPC_CheckPredicate, 0, 136, 21, 0, // Skip to: 8345
610
/* 2833 */    MCD_OPC_CheckField, 28, 4, 14, 129, 21, 0, // Skip to: 8345
611
/* 2840 */    MCD_OPC_Decode, 168, 4, 15, // Opcode: BKPT
612
/* 2844 */    MCD_OPC_FilterValue, 1, 120, 21, 0, // Skip to: 8345
613
/* 2849 */    MCD_OPC_CheckPredicate, 0, 115, 21, 0, // Skip to: 8345
614
/* 2854 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
615
/* 2859 */    MCD_OPC_Decode, 132, 7, 18, // Opcode: TEQrsr
616
/* 2863 */    MCD_OPC_FilterValue, 5, 97, 0, 0, // Skip to: 2965
617
/* 2868 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
618
/* 2871 */    MCD_OPC_FilterValue, 0, 70, 0, 0, // Skip to: 2946
619
/* 2876 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
620
/* 2879 */    MCD_OPC_FilterValue, 0, 23, 0, 0, // Skip to: 2907
621
/* 2884 */    MCD_OPC_CheckPredicate, 11, 80, 21, 0, // Skip to: 8345
622
/* 2889 */    MCD_OPC_CheckField, 16, 4, 15, 73, 21, 0, // Skip to: 8345
623
/* 2896 */    MCD_OPC_CheckField, 8, 4, 15, 66, 21, 0, // Skip to: 8345
624
/* 2903 */    MCD_OPC_Decode, 182, 4, 35, // Opcode: CLZ
625
/* 2907 */    MCD_OPC_FilterValue, 2, 13, 0, 0, // Skip to: 2925
626
/* 2912 */    MCD_OPC_CheckPredicate, 0, 52, 21, 0, // Skip to: 8345
627
/* 2917 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
628
/* 2921 */    MCD_OPC_Decode, 210, 5, 21, // Opcode: QDSUB
629
/* 2925 */    MCD_OPC_FilterValue, 3, 39, 21, 0, // Skip to: 8345
630
/* 2930 */    MCD_OPC_CheckPredicate, 12, 34, 21, 0, // Skip to: 8345
631
/* 2935 */    MCD_OPC_CheckField, 8, 12, 0, 27, 21, 0, // Skip to: 8345
632
/* 2942 */    MCD_OPC_Decode, 135, 6, 36, // Opcode: SMC
633
/* 2946 */    MCD_OPC_FilterValue, 1, 18, 21, 0, // Skip to: 8345
634
/* 2951 */    MCD_OPC_CheckPredicate, 0, 13, 21, 0, // Skip to: 8345
635
/* 2956 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
636
/* 2961 */    MCD_OPC_Decode, 186, 4, 18, // Opcode: CMNzrsr
637
/* 2965 */    MCD_OPC_FilterValue, 6, 16, 0, 0, // Skip to: 2986
638
/* 2970 */    MCD_OPC_CheckPredicate, 0, 250, 20, 0, // Skip to: 8345
639
/* 2975 */    MCD_OPC_CheckField, 16, 4, 0, 243, 20, 0, // Skip to: 8345
640
/* 2982 */    MCD_OPC_Decode, 177, 5, 37, // Opcode: MOVsr
641
/* 2986 */    MCD_OPC_FilterValue, 7, 234, 20, 0, // Skip to: 8345
642
/* 2991 */    MCD_OPC_CheckPredicate, 0, 229, 20, 0, // Skip to: 8345
643
/* 2996 */    MCD_OPC_SoftFail, 128, 128, 60 /* 0xf0000 */, 0,
644
/* 3001 */    MCD_OPC_Decode, 192, 5, 37, // Opcode: MVNsr
645
/* 3005 */    MCD_OPC_FilterValue, 1, 215, 20, 0, // Skip to: 8345
646
/* 3010 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
647
/* 3013 */    MCD_OPC_FilterValue, 0, 48, 1, 0, // Skip to: 3322
648
/* 3018 */    MCD_OPC_ExtractField, 22, 3,  // Inst{24-22} ...
649
/* 3021 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3035
650
/* 3026 */    MCD_OPC_CheckPredicate, 1, 194, 20, 0, // Skip to: 8345
651
/* 3031 */    MCD_OPC_Decode, 168, 5, 38, // Opcode: MLA
652
/* 3035 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 3056
653
/* 3040 */    MCD_OPC_CheckPredicate, 13, 180, 20, 0, // Skip to: 8345
654
/* 3045 */    MCD_OPC_CheckField, 20, 1, 0, 173, 20, 0, // Skip to: 8345
655
/* 3052 */    MCD_OPC_Decode, 169, 5, 39, // Opcode: MLS
656
/* 3056 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3070
657
/* 3061 */    MCD_OPC_CheckPredicate, 1, 159, 20, 0, // Skip to: 8345
658
/* 3066 */    MCD_OPC_Decode, 153, 7, 40, // Opcode: UMLAL
659
/* 3070 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 3084
660
/* 3075 */    MCD_OPC_CheckPredicate, 1, 145, 20, 0, // Skip to: 8345
661
/* 3080 */    MCD_OPC_Decode, 140, 6, 40, // Opcode: SMLAL
662
/* 3084 */    MCD_OPC_FilterValue, 6, 89, 0, 0, // Skip to: 3178
663
/* 3089 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
664
/* 3092 */    MCD_OPC_FilterValue, 14, 38, 0, 0, // Skip to: 3135
665
/* 3097 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
666
/* 3100 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3114
667
/* 3105 */    MCD_OPC_CheckPredicate, 9, 115, 20, 0, // Skip to: 8345
668
/* 3110 */    MCD_OPC_Decode, 205, 6, 41, // Opcode: STLEXD
669
/* 3114 */    MCD_OPC_FilterValue, 1, 106, 20, 0, // Skip to: 8345
670
/* 3119 */    MCD_OPC_CheckPredicate, 9, 101, 20, 0, // Skip to: 8345
671
/* 3124 */    MCD_OPC_CheckField, 0, 4, 15, 94, 20, 0, // Skip to: 8345
672
/* 3131 */    MCD_OPC_Decode, 226, 4, 42, // Opcode: LDAEXD
673
/* 3135 */    MCD_OPC_FilterValue, 15, 85, 20, 0, // Skip to: 8345
674
/* 3140 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
675
/* 3143 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3157
676
/* 3148 */    MCD_OPC_CheckPredicate, 0, 72, 20, 0, // Skip to: 8345
677
/* 3153 */    MCD_OPC_Decode, 229, 6, 41, // Opcode: STREXD
678
/* 3157 */    MCD_OPC_FilterValue, 1, 63, 20, 0, // Skip to: 8345
679
/* 3162 */    MCD_OPC_CheckPredicate, 0, 58, 20, 0, // Skip to: 8345
680
/* 3167 */    MCD_OPC_CheckField, 0, 4, 15, 51, 20, 0, // Skip to: 8345
681
/* 3174 */    MCD_OPC_Decode, 138, 5, 42, // Opcode: LDREXD
682
/* 3178 */    MCD_OPC_FilterValue, 7, 42, 20, 0, // Skip to: 8345
683
/* 3183 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
684
/* 3186 */    MCD_OPC_FilterValue, 12, 45, 0, 0, // Skip to: 3236
685
/* 3191 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
686
/* 3194 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3215
687
/* 3199 */    MCD_OPC_CheckPredicate, 8, 21, 20, 0, // Skip to: 8345
688
/* 3204 */    MCD_OPC_CheckField, 12, 4, 15, 14, 20, 0, // Skip to: 8345
689
/* 3211 */    MCD_OPC_Decode, 207, 6, 22, // Opcode: STLH
690
/* 3215 */    MCD_OPC_FilterValue, 1, 5, 20, 0, // Skip to: 8345
691
/* 3220 */    MCD_OPC_CheckPredicate, 8, 0, 20, 0, // Skip to: 8345
692
/* 3225 */    MCD_OPC_CheckField, 0, 4, 15, 249, 19, 0, // Skip to: 8345
693
/* 3232 */    MCD_OPC_Decode, 228, 4, 23, // Opcode: LDAH
694
/* 3236 */    MCD_OPC_FilterValue, 14, 38, 0, 0, // Skip to: 3279
695
/* 3241 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
696
/* 3244 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3258
697
/* 3249 */    MCD_OPC_CheckPredicate, 9, 227, 19, 0, // Skip to: 8345
698
/* 3254 */    MCD_OPC_Decode, 206, 6, 24, // Opcode: STLEXH
699
/* 3258 */    MCD_OPC_FilterValue, 1, 218, 19, 0, // Skip to: 8345
700
/* 3263 */    MCD_OPC_CheckPredicate, 9, 213, 19, 0, // Skip to: 8345
701
/* 3268 */    MCD_OPC_CheckField, 0, 4, 15, 206, 19, 0, // Skip to: 8345
702
/* 3275 */    MCD_OPC_Decode, 227, 4, 23, // Opcode: LDAEXH
703
/* 3279 */    MCD_OPC_FilterValue, 15, 197, 19, 0, // Skip to: 8345
704
/* 3284 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
705
/* 3287 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3301
706
/* 3292 */    MCD_OPC_CheckPredicate, 0, 184, 19, 0, // Skip to: 8345
707
/* 3297 */    MCD_OPC_Decode, 230, 6, 24, // Opcode: STREXH
708
/* 3301 */    MCD_OPC_FilterValue, 1, 175, 19, 0, // Skip to: 8345
709
/* 3306 */    MCD_OPC_CheckPredicate, 0, 170, 19, 0, // Skip to: 8345
710
/* 3311 */    MCD_OPC_CheckField, 0, 4, 15, 163, 19, 0, // Skip to: 8345
711
/* 3318 */    MCD_OPC_Decode, 139, 5, 23, // Opcode: LDREXH
712
/* 3322 */    MCD_OPC_FilterValue, 1, 130, 0, 0, // Skip to: 3457
713
/* 3327 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
714
/* 3330 */    MCD_OPC_FilterValue, 0, 60, 0, 0, // Skip to: 3395
715
/* 3335 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
716
/* 3338 */    MCD_OPC_FilterValue, 0, 38, 0, 0, // Skip to: 3381
717
/* 3343 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
718
/* 3346 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3367
719
/* 3351 */    MCD_OPC_CheckPredicate, 0, 125, 19, 0, // Skip to: 8345
720
/* 3356 */    MCD_OPC_CheckField, 8, 4, 0, 118, 19, 0, // Skip to: 8345
721
/* 3363 */    MCD_OPC_Decode, 233, 6, 43, // Opcode: STRHTr
722
/* 3367 */    MCD_OPC_FilterValue, 1, 109, 19, 0, // Skip to: 8345
723
/* 3372 */    MCD_OPC_CheckPredicate, 0, 104, 19, 0, // Skip to: 8345
724
/* 3377 */    MCD_OPC_Decode, 232, 6, 44, // Opcode: STRHTi
725
/* 3381 */    MCD_OPC_FilterValue, 1, 95, 19, 0, // Skip to: 8345
726
/* 3386 */    MCD_OPC_CheckPredicate, 0, 90, 19, 0, // Skip to: 8345
727
/* 3391 */    MCD_OPC_Decode, 235, 6, 7, // Opcode: STRH_PRE
728
/* 3395 */    MCD_OPC_FilterValue, 1, 81, 19, 0, // Skip to: 8345
729
/* 3400 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
730
/* 3403 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 3443
731
/* 3408 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
732
/* 3411 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 3429
733
/* 3416 */    MCD_OPC_CheckPredicate, 0, 60, 19, 0, // Skip to: 8345
734
/* 3421 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
735
/* 3425 */    MCD_OPC_Decode, 142, 5, 45, // Opcode: LDRHTr
736
/* 3429 */    MCD_OPC_FilterValue, 1, 47, 19, 0, // Skip to: 8345
737
/* 3434 */    MCD_OPC_CheckPredicate, 0, 42, 19, 0, // Skip to: 8345
738
/* 3439 */    MCD_OPC_Decode, 141, 5, 46, // Opcode: LDRHTi
739
/* 3443 */    MCD_OPC_FilterValue, 1, 33, 19, 0, // Skip to: 8345
740
/* 3448 */    MCD_OPC_CheckPredicate, 0, 28, 19, 0, // Skip to: 8345
741
/* 3453 */    MCD_OPC_Decode, 144, 5, 7, // Opcode: LDRH_PRE
742
/* 3457 */    MCD_OPC_FilterValue, 2, 86, 0, 0, // Skip to: 3548
743
/* 3462 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
744
/* 3465 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3486
745
/* 3470 */    MCD_OPC_CheckPredicate, 0, 6, 19, 0, // Skip to: 8345
746
/* 3475 */    MCD_OPC_CheckField, 24, 1, 1, 255, 18, 0, // Skip to: 8345
747
/* 3482 */    MCD_OPC_Decode, 135, 5, 7, // Opcode: LDRD_PRE
748
/* 3486 */    MCD_OPC_FilterValue, 1, 246, 18, 0, // Skip to: 8345
749
/* 3491 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
750
/* 3494 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 3534
751
/* 3499 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
752
/* 3502 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 3520
753
/* 3507 */    MCD_OPC_CheckPredicate, 0, 225, 18, 0, // Skip to: 8345
754
/* 3512 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
755
/* 3516 */    MCD_OPC_Decode, 147, 5, 45, // Opcode: LDRSBTr
756
/* 3520 */    MCD_OPC_FilterValue, 1, 212, 18, 0, // Skip to: 8345
757
/* 3525 */    MCD_OPC_CheckPredicate, 0, 207, 18, 0, // Skip to: 8345
758
/* 3530 */    MCD_OPC_Decode, 146, 5, 46, // Opcode: LDRSBTi
759
/* 3534 */    MCD_OPC_FilterValue, 1, 198, 18, 0, // Skip to: 8345
760
/* 3539 */    MCD_OPC_CheckPredicate, 0, 193, 18, 0, // Skip to: 8345
761
/* 3544 */    MCD_OPC_Decode, 149, 5, 7, // Opcode: LDRSB_PRE
762
/* 3548 */    MCD_OPC_FilterValue, 3, 184, 18, 0, // Skip to: 8345
763
/* 3553 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
764
/* 3556 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 3577
765
/* 3561 */    MCD_OPC_CheckPredicate, 0, 171, 18, 0, // Skip to: 8345
766
/* 3566 */    MCD_OPC_CheckField, 24, 1, 1, 164, 18, 0, // Skip to: 8345
767
/* 3573 */    MCD_OPC_Decode, 226, 6, 7, // Opcode: STRD_PRE
768
/* 3577 */    MCD_OPC_FilterValue, 1, 155, 18, 0, // Skip to: 8345
769
/* 3582 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
770
/* 3585 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 3625
771
/* 3590 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
772
/* 3593 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 3611
773
/* 3598 */    MCD_OPC_CheckPredicate, 0, 134, 18, 0, // Skip to: 8345
774
/* 3603 */    MCD_OPC_SoftFail, 128, 30 /* 0xf00 */, 0,
775
/* 3607 */    MCD_OPC_Decode, 152, 5, 45, // Opcode: LDRSHTr
776
/* 3611 */    MCD_OPC_FilterValue, 1, 121, 18, 0, // Skip to: 8345
777
/* 3616 */    MCD_OPC_CheckPredicate, 0, 116, 18, 0, // Skip to: 8345
778
/* 3621 */    MCD_OPC_Decode, 151, 5, 46, // Opcode: LDRSHTi
779
/* 3625 */    MCD_OPC_FilterValue, 1, 107, 18, 0, // Skip to: 8345
780
/* 3630 */    MCD_OPC_CheckPredicate, 0, 102, 18, 0, // Skip to: 8345
781
/* 3635 */    MCD_OPC_Decode, 154, 5, 7, // Opcode: LDRSH_PRE
782
/* 3639 */    MCD_OPC_FilterValue, 1, 0, 2, 0, // Skip to: 4156
783
/* 3644 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
784
/* 3647 */    MCD_OPC_FilterValue, 0, 201, 0, 0, // Skip to: 3853
785
/* 3652 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
786
/* 3655 */    MCD_OPC_FilterValue, 0, 75, 0, 0, // Skip to: 3735
787
/* 3660 */    MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
788
/* 3663 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3677
789
/* 3668 */    MCD_OPC_CheckPredicate, 0, 46, 0, 0, // Skip to: 3719
790
/* 3673 */    MCD_OPC_Decode, 158, 4, 47, // Opcode: ANDri
791
/* 3677 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3691
792
/* 3682 */    MCD_OPC_CheckPredicate, 0, 32, 0, 0, // Skip to: 3719
793
/* 3687 */    MCD_OPC_Decode, 244, 6, 47, // Opcode: SUBri
794
/* 3691 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3705
795
/* 3696 */    MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 3719
796
/* 3701 */    MCD_OPC_Decode, 149, 4, 47, // Opcode: ADDri
797
/* 3705 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 3719
798
/* 3710 */    MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 3719
799
/* 3715 */    MCD_OPC_Decode, 238, 5, 47, // Opcode: SBCri
800
/* 3719 */    MCD_OPC_CheckPredicate, 0, 13, 18, 0, // Skip to: 8345
801
/* 3724 */    MCD_OPC_CheckField, 16, 5, 15, 6, 18, 0, // Skip to: 8345
802
/* 3731 */    MCD_OPC_Decode, 153, 4, 48, // Opcode: ADR
803
/* 3735 */    MCD_OPC_FilterValue, 1, 253, 17, 0, // Skip to: 8345
804
/* 3740 */    MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
805
/* 3743 */    MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 3784
806
/* 3748 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
807
/* 3751 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3765
808
/* 3756 */    MCD_OPC_CheckPredicate, 13, 232, 17, 0, // Skip to: 8345
809
/* 3761 */    MCD_OPC_Decode, 173, 5, 49, // Opcode: MOVi16
810
/* 3765 */    MCD_OPC_FilterValue, 1, 223, 17, 0, // Skip to: 8345
811
/* 3770 */    MCD_OPC_CheckPredicate, 0, 218, 17, 0, // Skip to: 8345
812
/* 3775 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
813
/* 3780 */    MCD_OPC_Decode, 136, 7, 50, // Opcode: TSTri
814
/* 3784 */    MCD_OPC_FilterValue, 1, 36, 0, 0, // Skip to: 3825
815
/* 3789 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
816
/* 3792 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3806
817
/* 3797 */    MCD_OPC_CheckPredicate, 13, 191, 17, 0, // Skip to: 8345
818
/* 3802 */    MCD_OPC_Decode, 171, 5, 49, // Opcode: MOVTi16
819
/* 3806 */    MCD_OPC_FilterValue, 1, 182, 17, 0, // Skip to: 8345
820
/* 3811 */    MCD_OPC_CheckPredicate, 0, 177, 17, 0, // Skip to: 8345
821
/* 3816 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
822
/* 3821 */    MCD_OPC_Decode, 187, 4, 50, // Opcode: CMPri
823
/* 3825 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3839
824
/* 3830 */    MCD_OPC_CheckPredicate, 0, 158, 17, 0, // Skip to: 8345
825
/* 3835 */    MCD_OPC_Decode, 193, 5, 47, // Opcode: ORRri
826
/* 3839 */    MCD_OPC_FilterValue, 3, 149, 17, 0, // Skip to: 8345
827
/* 3844 */    MCD_OPC_CheckPredicate, 0, 144, 17, 0, // Skip to: 8345
828
/* 3849 */    MCD_OPC_Decode, 164, 4, 47, // Opcode: BICri
829
/* 3853 */    MCD_OPC_FilterValue, 1, 135, 17, 0, // Skip to: 8345
830
/* 3858 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
831
/* 3861 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 3897
832
/* 3866 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
833
/* 3869 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3883
834
/* 3874 */    MCD_OPC_CheckPredicate, 0, 114, 17, 0, // Skip to: 8345
835
/* 3879 */    MCD_OPC_Decode, 203, 4, 47, // Opcode: EORri
836
/* 3883 */    MCD_OPC_FilterValue, 1, 105, 17, 0, // Skip to: 8345
837
/* 3888 */    MCD_OPC_CheckPredicate, 0, 100, 17, 0, // Skip to: 8345
838
/* 3893 */    MCD_OPC_Decode, 227, 5, 47, // Opcode: RSBri
839
/* 3897 */    MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 3933
840
/* 3902 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
841
/* 3905 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3919
842
/* 3910 */    MCD_OPC_CheckPredicate, 0, 78, 17, 0, // Skip to: 8345
843
/* 3915 */    MCD_OPC_Decode, 145, 4, 47, // Opcode: ADCri
844
/* 3919 */    MCD_OPC_FilterValue, 1, 69, 17, 0, // Skip to: 8345
845
/* 3924 */    MCD_OPC_CheckPredicate, 0, 64, 17, 0, // Skip to: 8345
846
/* 3929 */    MCD_OPC_Decode, 231, 5, 47, // Opcode: RSCri
847
/* 3933 */    MCD_OPC_FilterValue, 2, 168, 0, 0, // Skip to: 4106
848
/* 3938 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
849
/* 3941 */    MCD_OPC_FilterValue, 0, 114, 0, 0, // Skip to: 4060
850
/* 3946 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
851
/* 3949 */    MCD_OPC_FilterValue, 15, 39, 17, 0, // Skip to: 8345
852
/* 3954 */    MCD_OPC_CheckPredicate, 14, 32, 0, 0, // Skip to: 3991
853
/* 3959 */    MCD_OPC_CheckField, 28, 4, 14, 25, 0, 0, // Skip to: 3991
854
/* 3966 */    MCD_OPC_CheckField, 22, 1, 0, 18, 0, 0, // Skip to: 3991
855
/* 3973 */    MCD_OPC_CheckField, 16, 4, 0, 11, 0, 0, // Skip to: 3991
856
/* 3980 */    MCD_OPC_CheckField, 0, 12, 18, 4, 0, 0, // Skip to: 3991
857
/* 3987 */    MCD_OPC_Decode, 135, 7, 51, // Opcode: TSB
858
/* 3991 */    MCD_OPC_CheckPredicate, 15, 25, 0, 0, // Skip to: 4021
859
/* 3996 */    MCD_OPC_CheckField, 22, 1, 0, 18, 0, 0, // Skip to: 4021
860
/* 4003 */    MCD_OPC_CheckField, 16, 4, 0, 11, 0, 0, // Skip to: 4021
861
/* 4010 */    MCD_OPC_CheckField, 4, 8, 15, 4, 0, 0, // Skip to: 4021
862
/* 4017 */    MCD_OPC_Decode, 200, 4, 36, // Opcode: DBG
863
/* 4021 */    MCD_OPC_CheckPredicate, 1, 25, 0, 0, // Skip to: 4051
864
/* 4026 */    MCD_OPC_CheckField, 22, 1, 0, 18, 0, 0, // Skip to: 4051
865
/* 4033 */    MCD_OPC_CheckField, 16, 4, 0, 11, 0, 0, // Skip to: 4051
866
/* 4040 */    MCD_OPC_CheckField, 8, 4, 0, 4, 0, 0, // Skip to: 4051
867
/* 4047 */    MCD_OPC_Decode, 218, 4, 52, // Opcode: HINT
868
/* 4051 */    MCD_OPC_CheckPredicate, 0, 193, 16, 0, // Skip to: 8345
869
/* 4056 */    MCD_OPC_Decode, 187, 5, 53, // Opcode: MSRi
870
/* 4060 */    MCD_OPC_FilterValue, 1, 184, 16, 0, // Skip to: 8345
871
/* 4065 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
872
/* 4068 */    MCD_OPC_FilterValue, 0, 14, 0, 0, // Skip to: 4087
873
/* 4073 */    MCD_OPC_CheckPredicate, 0, 171, 16, 0, // Skip to: 8345
874
/* 4078 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
875
/* 4083 */    MCD_OPC_Decode, 129, 7, 50, // Opcode: TEQri
876
/* 4087 */    MCD_OPC_FilterValue, 1, 157, 16, 0, // Skip to: 8345
877
/* 4092 */    MCD_OPC_CheckPredicate, 0, 152, 16, 0, // Skip to: 8345
878
/* 4097 */    MCD_OPC_SoftFail, 128, 224, 3 /* 0xf000 */, 0,
879
/* 4102 */    MCD_OPC_Decode, 183, 4, 50, // Opcode: CMNri
880
/* 4106 */    MCD_OPC_FilterValue, 3, 138, 16, 0, // Skip to: 8345
881
/* 4111 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
882
/* 4114 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 4135
883
/* 4119 */    MCD_OPC_CheckPredicate, 0, 125, 16, 0, // Skip to: 8345
884
/* 4124 */    MCD_OPC_CheckField, 16, 4, 0, 118, 16, 0, // Skip to: 8345
885
/* 4131 */    MCD_OPC_Decode, 172, 5, 54, // Opcode: MOVi
886
/* 4135 */    MCD_OPC_FilterValue, 1, 109, 16, 0, // Skip to: 8345
887
/* 4140 */    MCD_OPC_CheckPredicate, 0, 104, 16, 0, // Skip to: 8345
888
/* 4145 */    MCD_OPC_CheckField, 16, 4, 0, 97, 16, 0, // Skip to: 8345
889
/* 4152 */    MCD_OPC_Decode, 189, 5, 54, // Opcode: MVNi
890
/* 4156 */    MCD_OPC_FilterValue, 2, 229, 1, 0, // Skip to: 4646
891
/* 4161 */    MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
892
/* 4164 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 4200
893
/* 4169 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
894
/* 4172 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4186
895
/* 4177 */    MCD_OPC_CheckPredicate, 0, 67, 16, 0, // Skip to: 8345
896
/* 4182 */    MCD_OPC_Decode, 238, 6, 55, // Opcode: STR_POST_IMM
897
/* 4186 */    MCD_OPC_FilterValue, 1, 58, 16, 0, // Skip to: 8345
898
/* 4191 */    MCD_OPC_CheckPredicate, 0, 53, 16, 0, // Skip to: 8345
899
/* 4196 */    MCD_OPC_Decode, 242, 6, 56, // Opcode: STRi12
900
/* 4200 */    MCD_OPC_FilterValue, 1, 54, 0, 0, // Skip to: 4259
901
/* 4205 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
902
/* 4208 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4222
903
/* 4213 */    MCD_OPC_CheckPredicate, 0, 31, 16, 0, // Skip to: 8345
904
/* 4218 */    MCD_OPC_Decode, 157, 5, 55, // Opcode: LDR_POST_IMM
905
/* 4222 */    MCD_OPC_FilterValue, 1, 22, 16, 0, // Skip to: 8345
906
/* 4227 */    MCD_OPC_CheckPredicate, 16, 18, 0, 0, // Skip to: 4250
907
/* 4232 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 4250
908
/* 4239 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4250
909
/* 4246 */    MCD_OPC_Decode, 199, 5, 57, // Opcode: PLDWi12
910
/* 4250 */    MCD_OPC_CheckPredicate, 0, 250, 15, 0, // Skip to: 8345
911
/* 4255 */    MCD_OPC_Decode, 162, 5, 56, // Opcode: LDRi12
912
/* 4259 */    MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 4295
913
/* 4264 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
914
/* 4267 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4281
915
/* 4272 */    MCD_OPC_CheckPredicate, 0, 228, 15, 0, // Skip to: 8345
916
/* 4277 */    MCD_OPC_Decode, 236, 6, 55, // Opcode: STRT_POST_IMM
917
/* 4281 */    MCD_OPC_FilterValue, 1, 219, 15, 0, // Skip to: 8345
918
/* 4286 */    MCD_OPC_CheckPredicate, 0, 214, 15, 0, // Skip to: 8345
919
/* 4291 */    MCD_OPC_Decode, 240, 6, 58, // Opcode: STR_PRE_IMM
920
/* 4295 */    MCD_OPC_FilterValue, 3, 31, 0, 0, // Skip to: 4331
921
/* 4300 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
922
/* 4303 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4317
923
/* 4308 */    MCD_OPC_CheckPredicate, 0, 192, 15, 0, // Skip to: 8345
924
/* 4313 */    MCD_OPC_Decode, 155, 5, 55, // Opcode: LDRT_POST_IMM
925
/* 4317 */    MCD_OPC_FilterValue, 1, 183, 15, 0, // Skip to: 8345
926
/* 4322 */    MCD_OPC_CheckPredicate, 0, 178, 15, 0, // Skip to: 8345
927
/* 4327 */    MCD_OPC_Decode, 159, 5, 59, // Opcode: LDR_PRE_IMM
928
/* 4331 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 4367
929
/* 4336 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
930
/* 4339 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4353
931
/* 4344 */    MCD_OPC_CheckPredicate, 0, 156, 15, 0, // Skip to: 8345
932
/* 4349 */    MCD_OPC_Decode, 218, 6, 55, // Opcode: STRB_POST_IMM
933
/* 4353 */    MCD_OPC_FilterValue, 1, 147, 15, 0, // Skip to: 8345
934
/* 4358 */    MCD_OPC_CheckPredicate, 0, 142, 15, 0, // Skip to: 8345
935
/* 4363 */    MCD_OPC_Decode, 222, 6, 60, // Opcode: STRBi12
936
/* 4367 */    MCD_OPC_FilterValue, 5, 77, 0, 0, // Skip to: 4449
937
/* 4372 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
938
/* 4375 */    MCD_OPC_FilterValue, 0, 32, 0, 0, // Skip to: 4412
939
/* 4380 */    MCD_OPC_CheckPredicate, 15, 18, 0, 0, // Skip to: 4403
940
/* 4385 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 4403
941
/* 4392 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4403
942
/* 4399 */    MCD_OPC_Decode, 203, 5, 57, // Opcode: PLIi12
943
/* 4403 */    MCD_OPC_CheckPredicate, 0, 97, 15, 0, // Skip to: 8345
944
/* 4408 */    MCD_OPC_Decode, 255, 4, 55, // Opcode: LDRB_POST_IMM
945
/* 4412 */    MCD_OPC_FilterValue, 1, 88, 15, 0, // Skip to: 8345
946
/* 4417 */    MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 4440
947
/* 4422 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 4440
948
/* 4429 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4440
949
/* 4436 */    MCD_OPC_Decode, 201, 5, 57, // Opcode: PLDi12
950
/* 4440 */    MCD_OPC_CheckPredicate, 0, 60, 15, 0, // Skip to: 8345
951
/* 4445 */    MCD_OPC_Decode, 131, 5, 60, // Opcode: LDRBi12
952
/* 4449 */    MCD_OPC_FilterValue, 6, 31, 0, 0, // Skip to: 4485
953
/* 4454 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
954
/* 4457 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4471
955
/* 4462 */    MCD_OPC_CheckPredicate, 0, 38, 15, 0, // Skip to: 8345
956
/* 4467 */    MCD_OPC_Decode, 216, 6, 55, // Opcode: STRBT_POST_IMM
957
/* 4471 */    MCD_OPC_FilterValue, 1, 29, 15, 0, // Skip to: 8345
958
/* 4476 */    MCD_OPC_CheckPredicate, 0, 24, 15, 0, // Skip to: 8345
959
/* 4481 */    MCD_OPC_Decode, 220, 6, 58, // Opcode: STRB_PRE_IMM
960
/* 4485 */    MCD_OPC_FilterValue, 7, 15, 15, 0, // Skip to: 8345
961
/* 4490 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
962
/* 4493 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4507
963
/* 4498 */    MCD_OPC_CheckPredicate, 0, 2, 15, 0, // Skip to: 8345
964
/* 4503 */    MCD_OPC_Decode, 253, 4, 55, // Opcode: LDRBT_POST_IMM
965
/* 4507 */    MCD_OPC_FilterValue, 1, 249, 14, 0, // Skip to: 8345
966
/* 4512 */    MCD_OPC_CheckPredicate, 17, 27, 0, 0, // Skip to: 4544
967
/* 4517 */    MCD_OPC_CheckField, 28, 4, 15, 20, 0, 0, // Skip to: 4544
968
/* 4524 */    MCD_OPC_CheckField, 23, 1, 0, 13, 0, 0, // Skip to: 4544
969
/* 4531 */    MCD_OPC_CheckField, 0, 20, 159, 224, 63, 4, 0, 0, // Skip to: 4544
970
/* 4540 */    MCD_OPC_Decode, 181, 4, 51, // Opcode: CLREX
971
/* 4544 */    MCD_OPC_ExtractField, 4, 16,  // Inst{19-4} ...
972
/* 4547 */    MCD_OPC_FilterValue, 132, 254, 3, 23, 0, 0, // Skip to: 4577
973
/* 4554 */    MCD_OPC_CheckPredicate, 18, 78, 0, 0, // Skip to: 4637
974
/* 4559 */    MCD_OPC_CheckField, 28, 4, 15, 71, 0, 0, // Skip to: 4637
975
/* 4566 */    MCD_OPC_CheckField, 23, 1, 0, 64, 0, 0, // Skip to: 4637
976
/* 4573 */    MCD_OPC_Decode, 202, 4, 61, // Opcode: DSB
977
/* 4577 */    MCD_OPC_FilterValue, 133, 254, 3, 23, 0, 0, // Skip to: 4607
978
/* 4584 */    MCD_OPC_CheckPredicate, 18, 48, 0, 0, // Skip to: 4637
979
/* 4589 */    MCD_OPC_CheckField, 28, 4, 15, 41, 0, 0, // Skip to: 4637
980
/* 4596 */    MCD_OPC_CheckField, 23, 1, 0, 34, 0, 0, // Skip to: 4637
981
/* 4603 */    MCD_OPC_Decode, 201, 4, 61, // Opcode: DMB
982
/* 4607 */    MCD_OPC_FilterValue, 134, 254, 3, 23, 0, 0, // Skip to: 4637
983
/* 4614 */    MCD_OPC_CheckPredicate, 18, 18, 0, 0, // Skip to: 4637
984
/* 4619 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 4637
985
/* 4626 */    MCD_OPC_CheckField, 23, 1, 0, 4, 0, 0, // Skip to: 4637
986
/* 4633 */    MCD_OPC_Decode, 221, 4, 62, // Opcode: ISB
987
/* 4637 */    MCD_OPC_CheckPredicate, 0, 119, 14, 0, // Skip to: 8345
988
/* 4642 */    MCD_OPC_Decode, 129, 5, 59, // Opcode: LDRB_PRE_IMM
989
/* 4646 */    MCD_OPC_FilterValue, 3, 129, 10, 0, // Skip to: 7340
990
/* 4651 */    MCD_OPC_ExtractField, 21, 2,  // Inst{22-21} ...
991
/* 4654 */    MCD_OPC_FilterValue, 0, 200, 2, 0, // Skip to: 5371
992
/* 4659 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
993
/* 4662 */    MCD_OPC_FilterValue, 0, 98, 0, 0, // Skip to: 4765
994
/* 4667 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
995
/* 4670 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 4706
996
/* 4675 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
997
/* 4678 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4692
998
/* 4683 */    MCD_OPC_CheckPredicate, 0, 73, 14, 0, // Skip to: 8345
999
/* 4688 */    MCD_OPC_Decode, 239, 6, 55, // Opcode: STR_POST_REG
1000
/* 4692 */    MCD_OPC_FilterValue, 1, 64, 14, 0, // Skip to: 8345
1001
/* 4697 */    MCD_OPC_CheckPredicate, 0, 59, 14, 0, // Skip to: 8345
1002
/* 4702 */    MCD_OPC_Decode, 243, 6, 63, // Opcode: STRrs
1003
/* 4706 */    MCD_OPC_FilterValue, 1, 50, 14, 0, // Skip to: 8345
1004
/* 4711 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1005
/* 4714 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4728
1006
/* 4719 */    MCD_OPC_CheckPredicate, 0, 37, 14, 0, // Skip to: 8345
1007
/* 4724 */    MCD_OPC_Decode, 158, 5, 55, // Opcode: LDR_POST_REG
1008
/* 4728 */    MCD_OPC_FilterValue, 1, 28, 14, 0, // Skip to: 8345
1009
/* 4733 */    MCD_OPC_CheckPredicate, 16, 18, 0, 0, // Skip to: 4756
1010
/* 4738 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 4756
1011
/* 4745 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4756
1012
/* 4752 */    MCD_OPC_Decode, 200, 5, 64, // Opcode: PLDWrs
1013
/* 4756 */    MCD_OPC_CheckPredicate, 0, 0, 14, 0, // Skip to: 8345
1014
/* 4761 */    MCD_OPC_Decode, 163, 5, 63, // Opcode: LDRrs
1015
/* 4765 */    MCD_OPC_FilterValue, 1, 247, 13, 0, // Skip to: 8345
1016
/* 4770 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
1017
/* 4773 */    MCD_OPC_FilterValue, 0, 202, 0, 0, // Skip to: 4980
1018
/* 4778 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1019
/* 4781 */    MCD_OPC_FilterValue, 0, 53, 0, 0, // Skip to: 4839
1020
/* 4786 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1021
/* 4789 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 4814
1022
/* 4794 */    MCD_OPC_CheckPredicate, 0, 218, 13, 0, // Skip to: 8345
1023
/* 4799 */    MCD_OPC_CheckField, 20, 1, 1, 211, 13, 0, // Skip to: 8345
1024
/* 4806 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1025
/* 4810 */    MCD_OPC_Decode, 235, 5, 65, // Opcode: SADD16
1026
/* 4814 */    MCD_OPC_FilterValue, 1, 198, 13, 0, // Skip to: 8345
1027
/* 4819 */    MCD_OPC_CheckPredicate, 0, 193, 13, 0, // Skip to: 8345
1028
/* 4824 */    MCD_OPC_CheckField, 20, 1, 1, 186, 13, 0, // Skip to: 8345
1029
/* 4831 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1030
/* 4835 */    MCD_OPC_Decode, 236, 5, 65, // Opcode: SADD8
1031
/* 4839 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 4860
1032
/* 4844 */    MCD_OPC_CheckPredicate, 1, 168, 13, 0, // Skip to: 8345
1033
/* 4849 */    MCD_OPC_CheckField, 20, 1, 0, 161, 13, 0, // Skip to: 8345
1034
/* 4856 */    MCD_OPC_Decode, 197, 5, 66, // Opcode: PKHBT
1035
/* 4860 */    MCD_OPC_FilterValue, 2, 69, 0, 0, // Skip to: 4934
1036
/* 4865 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1037
/* 4868 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 4906
1038
/* 4873 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1039
/* 4876 */    MCD_OPC_FilterValue, 0, 136, 13, 0, // Skip to: 8345
1040
/* 4881 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 4897
1041
/* 4886 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4897
1042
/* 4893 */    MCD_OPC_Decode, 161, 6, 67, // Opcode: SMUAD
1043
/* 4897 */    MCD_OPC_CheckPredicate, 1, 115, 13, 0, // Skip to: 8345
1044
/* 4902 */    MCD_OPC_Decode, 138, 6, 68, // Opcode: SMLAD
1045
/* 4906 */    MCD_OPC_FilterValue, 1, 106, 13, 0, // Skip to: 8345
1046
/* 4911 */    MCD_OPC_CheckPredicate, 19, 101, 13, 0, // Skip to: 8345
1047
/* 4916 */    MCD_OPC_CheckField, 12, 4, 15, 94, 13, 0, // Skip to: 8345
1048
/* 4923 */    MCD_OPC_CheckField, 7, 1, 0, 87, 13, 0, // Skip to: 8345
1049
/* 4930 */    MCD_OPC_Decode, 243, 5, 30, // Opcode: SDIV
1050
/* 4934 */    MCD_OPC_FilterValue, 3, 78, 13, 0, // Skip to: 8345
1051
/* 4939 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1052
/* 4942 */    MCD_OPC_FilterValue, 0, 70, 13, 0, // Skip to: 8345
1053
/* 4947 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1054
/* 4950 */    MCD_OPC_FilterValue, 0, 62, 13, 0, // Skip to: 8345
1055
/* 4955 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 4971
1056
/* 4960 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 4971
1057
/* 4967 */    MCD_OPC_Decode, 161, 7, 30, // Opcode: USAD8
1058
/* 4971 */    MCD_OPC_CheckPredicate, 1, 41, 13, 0, // Skip to: 8345
1059
/* 4976 */    MCD_OPC_Decode, 162, 7, 39, // Opcode: USADA8
1060
/* 4980 */    MCD_OPC_FilterValue, 1, 113, 0, 0, // Skip to: 5098
1061
/* 4985 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1062
/* 4988 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 5020
1063
/* 4993 */    MCD_OPC_CheckPredicate, 0, 19, 13, 0, // Skip to: 8345
1064
/* 4998 */    MCD_OPC_CheckField, 20, 1, 1, 12, 13, 0, // Skip to: 8345
1065
/* 5005 */    MCD_OPC_CheckField, 7, 1, 0, 5, 13, 0, // Skip to: 8345
1066
/* 5012 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1067
/* 5016 */    MCD_OPC_Decode, 237, 5, 65, // Opcode: SASX
1068
/* 5020 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 5052
1069
/* 5025 */    MCD_OPC_CheckPredicate, 1, 243, 12, 0, // Skip to: 8345
1070
/* 5030 */    MCD_OPC_CheckField, 20, 1, 0, 236, 12, 0, // Skip to: 8345
1071
/* 5037 */    MCD_OPC_CheckField, 7, 1, 1, 229, 12, 0, // Skip to: 8345
1072
/* 5044 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1073
/* 5048 */    MCD_OPC_Decode, 244, 5, 69, // Opcode: SEL
1074
/* 5052 */    MCD_OPC_FilterValue, 2, 216, 12, 0, // Skip to: 8345
1075
/* 5057 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1076
/* 5060 */    MCD_OPC_FilterValue, 0, 208, 12, 0, // Skip to: 8345
1077
/* 5065 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1078
/* 5068 */    MCD_OPC_FilterValue, 0, 200, 12, 0, // Skip to: 8345
1079
/* 5073 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 5089
1080
/* 5078 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 5089
1081
/* 5085 */    MCD_OPC_Decode, 162, 6, 67, // Opcode: SMUADX
1082
/* 5089 */    MCD_OPC_CheckPredicate, 1, 179, 12, 0, // Skip to: 8345
1083
/* 5094 */    MCD_OPC_Decode, 139, 6, 68, // Opcode: SMLADX
1084
/* 5098 */    MCD_OPC_FilterValue, 2, 102, 0, 0, // Skip to: 5205
1085
/* 5103 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1086
/* 5106 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 5138
1087
/* 5111 */    MCD_OPC_CheckPredicate, 0, 157, 12, 0, // Skip to: 8345
1088
/* 5116 */    MCD_OPC_CheckField, 20, 1, 1, 150, 12, 0, // Skip to: 8345
1089
/* 5123 */    MCD_OPC_CheckField, 7, 1, 0, 143, 12, 0, // Skip to: 8345
1090
/* 5130 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1091
/* 5134 */    MCD_OPC_Decode, 182, 6, 65, // Opcode: SSAX
1092
/* 5138 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 5159
1093
/* 5143 */    MCD_OPC_CheckPredicate, 1, 125, 12, 0, // Skip to: 8345
1094
/* 5148 */    MCD_OPC_CheckField, 20, 1, 0, 118, 12, 0, // Skip to: 8345
1095
/* 5155 */    MCD_OPC_Decode, 198, 5, 66, // Opcode: PKHTB
1096
/* 5159 */    MCD_OPC_FilterValue, 2, 109, 12, 0, // Skip to: 8345
1097
/* 5164 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1098
/* 5167 */    MCD_OPC_FilterValue, 0, 101, 12, 0, // Skip to: 8345
1099
/* 5172 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1100
/* 5175 */    MCD_OPC_FilterValue, 0, 93, 12, 0, // Skip to: 8345
1101
/* 5180 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 5196
1102
/* 5185 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 5196
1103
/* 5192 */    MCD_OPC_Decode, 170, 6, 67, // Opcode: SMUSD
1104
/* 5196 */    MCD_OPC_CheckPredicate, 1, 72, 12, 0, // Skip to: 8345
1105
/* 5201 */    MCD_OPC_Decode, 151, 6, 68, // Opcode: SMLSD
1106
/* 5205 */    MCD_OPC_FilterValue, 3, 63, 12, 0, // Skip to: 8345
1107
/* 5210 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1108
/* 5213 */    MCD_OPC_FilterValue, 0, 53, 0, 0, // Skip to: 5271
1109
/* 5218 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1110
/* 5221 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 5246
1111
/* 5226 */    MCD_OPC_CheckPredicate, 0, 42, 12, 0, // Skip to: 8345
1112
/* 5231 */    MCD_OPC_CheckField, 20, 1, 1, 35, 12, 0, // Skip to: 8345
1113
/* 5238 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1114
/* 5242 */    MCD_OPC_Decode, 183, 6, 65, // Opcode: SSUB16
1115
/* 5246 */    MCD_OPC_FilterValue, 1, 22, 12, 0, // Skip to: 8345
1116
/* 5251 */    MCD_OPC_CheckPredicate, 0, 17, 12, 0, // Skip to: 8345
1117
/* 5256 */    MCD_OPC_CheckField, 20, 1, 1, 10, 12, 0, // Skip to: 8345
1118
/* 5263 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1119
/* 5267 */    MCD_OPC_Decode, 184, 6, 65, // Opcode: SSUB8
1120
/* 5271 */    MCD_OPC_FilterValue, 1, 49, 0, 0, // Skip to: 5325
1121
/* 5276 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1122
/* 5279 */    MCD_OPC_FilterValue, 0, 245, 11, 0, // Skip to: 8345
1123
/* 5284 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1124
/* 5287 */    MCD_OPC_FilterValue, 0, 237, 11, 0, // Skip to: 8345
1125
/* 5292 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 5312
1126
/* 5297 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 5312
1127
/* 5304 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1128
/* 5308 */    MCD_OPC_Decode, 255, 6, 70, // Opcode: SXTB16
1129
/* 5312 */    MCD_OPC_CheckPredicate, 1, 212, 11, 0, // Skip to: 8345
1130
/* 5317 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1131
/* 5321 */    MCD_OPC_Decode, 252, 6, 71, // Opcode: SXTAB16
1132
/* 5325 */    MCD_OPC_FilterValue, 2, 199, 11, 0, // Skip to: 8345
1133
/* 5330 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1134
/* 5333 */    MCD_OPC_FilterValue, 0, 191, 11, 0, // Skip to: 8345
1135
/* 5338 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1136
/* 5341 */    MCD_OPC_FilterValue, 0, 183, 11, 0, // Skip to: 8345
1137
/* 5346 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 5362
1138
/* 5351 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 5362
1139
/* 5358 */    MCD_OPC_Decode, 171, 6, 67, // Opcode: SMUSDX
1140
/* 5362 */    MCD_OPC_CheckPredicate, 1, 162, 11, 0, // Skip to: 8345
1141
/* 5367 */    MCD_OPC_Decode, 152, 6, 68, // Opcode: SMLSDX
1142
/* 5371 */    MCD_OPC_FilterValue, 1, 106, 2, 0, // Skip to: 5994
1143
/* 5376 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
1144
/* 5379 */    MCD_OPC_FilterValue, 0, 75, 0, 0, // Skip to: 5459
1145
/* 5384 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1146
/* 5387 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 5423
1147
/* 5392 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1148
/* 5395 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5409
1149
/* 5400 */    MCD_OPC_CheckPredicate, 0, 124, 11, 0, // Skip to: 8345
1150
/* 5405 */    MCD_OPC_Decode, 237, 6, 55, // Opcode: STRT_POST_REG
1151
/* 5409 */    MCD_OPC_FilterValue, 1, 115, 11, 0, // Skip to: 8345
1152
/* 5414 */    MCD_OPC_CheckPredicate, 0, 110, 11, 0, // Skip to: 8345
1153
/* 5419 */    MCD_OPC_Decode, 241, 6, 72, // Opcode: STR_PRE_REG
1154
/* 5423 */    MCD_OPC_FilterValue, 1, 101, 11, 0, // Skip to: 8345
1155
/* 5428 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1156
/* 5431 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5445
1157
/* 5436 */    MCD_OPC_CheckPredicate, 0, 88, 11, 0, // Skip to: 8345
1158
/* 5441 */    MCD_OPC_Decode, 156, 5, 55, // Opcode: LDRT_POST_REG
1159
/* 5445 */    MCD_OPC_FilterValue, 1, 79, 11, 0, // Skip to: 8345
1160
/* 5450 */    MCD_OPC_CheckPredicate, 0, 74, 11, 0, // Skip to: 8345
1161
/* 5455 */    MCD_OPC_Decode, 160, 5, 73, // Opcode: LDR_PRE_REG
1162
/* 5459 */    MCD_OPC_FilterValue, 1, 65, 11, 0, // Skip to: 8345
1163
/* 5464 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1164
/* 5467 */    MCD_OPC_FilterValue, 0, 11, 1, 0, // Skip to: 5739
1165
/* 5472 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
1166
/* 5475 */    MCD_OPC_FilterValue, 0, 39, 0, 0, // Skip to: 5519
1167
/* 5480 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1168
/* 5483 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5501
1169
/* 5488 */    MCD_OPC_CheckPredicate, 0, 36, 11, 0, // Skip to: 8345
1170
/* 5493 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1171
/* 5497 */    MCD_OPC_Decode, 206, 5, 65, // Opcode: QADD16
1172
/* 5501 */    MCD_OPC_FilterValue, 1, 23, 11, 0, // Skip to: 8345
1173
/* 5506 */    MCD_OPC_CheckPredicate, 0, 18, 11, 0, // Skip to: 8345
1174
/* 5511 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1175
/* 5515 */    MCD_OPC_Decode, 129, 6, 65, // Opcode: SHADD16
1176
/* 5519 */    MCD_OPC_FilterValue, 1, 39, 0, 0, // Skip to: 5563
1177
/* 5524 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1178
/* 5527 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5545
1179
/* 5532 */    MCD_OPC_CheckPredicate, 0, 248, 10, 0, // Skip to: 8345
1180
/* 5537 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1181
/* 5541 */    MCD_OPC_Decode, 208, 5, 65, // Opcode: QASX
1182
/* 5545 */    MCD_OPC_FilterValue, 1, 235, 10, 0, // Skip to: 8345
1183
/* 5550 */    MCD_OPC_CheckPredicate, 0, 230, 10, 0, // Skip to: 8345
1184
/* 5555 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1185
/* 5559 */    MCD_OPC_Decode, 131, 6, 65, // Opcode: SHASX
1186
/* 5563 */    MCD_OPC_FilterValue, 2, 39, 0, 0, // Skip to: 5607
1187
/* 5568 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1188
/* 5571 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5589
1189
/* 5576 */    MCD_OPC_CheckPredicate, 0, 204, 10, 0, // Skip to: 8345
1190
/* 5581 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1191
/* 5585 */    MCD_OPC_Decode, 211, 5, 65, // Opcode: QSAX
1192
/* 5589 */    MCD_OPC_FilterValue, 1, 191, 10, 0, // Skip to: 8345
1193
/* 5594 */    MCD_OPC_CheckPredicate, 0, 186, 10, 0, // Skip to: 8345
1194
/* 5599 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1195
/* 5603 */    MCD_OPC_Decode, 132, 6, 65, // Opcode: SHSAX
1196
/* 5607 */    MCD_OPC_FilterValue, 3, 39, 0, 0, // Skip to: 5651
1197
/* 5612 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1198
/* 5615 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5633
1199
/* 5620 */    MCD_OPC_CheckPredicate, 0, 160, 10, 0, // Skip to: 8345
1200
/* 5625 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1201
/* 5629 */    MCD_OPC_Decode, 213, 5, 65, // Opcode: QSUB16
1202
/* 5633 */    MCD_OPC_FilterValue, 1, 147, 10, 0, // Skip to: 8345
1203
/* 5638 */    MCD_OPC_CheckPredicate, 0, 142, 10, 0, // Skip to: 8345
1204
/* 5643 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1205
/* 5647 */    MCD_OPC_Decode, 133, 6, 65, // Opcode: SHSUB16
1206
/* 5651 */    MCD_OPC_FilterValue, 4, 39, 0, 0, // Skip to: 5695
1207
/* 5656 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1208
/* 5659 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5677
1209
/* 5664 */    MCD_OPC_CheckPredicate, 0, 116, 10, 0, // Skip to: 8345
1210
/* 5669 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1211
/* 5673 */    MCD_OPC_Decode, 207, 5, 65, // Opcode: QADD8
1212
/* 5677 */    MCD_OPC_FilterValue, 1, 103, 10, 0, // Skip to: 8345
1213
/* 5682 */    MCD_OPC_CheckPredicate, 0, 98, 10, 0, // Skip to: 8345
1214
/* 5687 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1215
/* 5691 */    MCD_OPC_Decode, 130, 6, 65, // Opcode: SHADD8
1216
/* 5695 */    MCD_OPC_FilterValue, 7, 85, 10, 0, // Skip to: 8345
1217
/* 5700 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1218
/* 5703 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 5721
1219
/* 5708 */    MCD_OPC_CheckPredicate, 0, 72, 10, 0, // Skip to: 8345
1220
/* 5713 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1221
/* 5717 */    MCD_OPC_Decode, 214, 5, 65, // Opcode: QSUB8
1222
/* 5721 */    MCD_OPC_FilterValue, 1, 59, 10, 0, // Skip to: 8345
1223
/* 5726 */    MCD_OPC_CheckPredicate, 0, 54, 10, 0, // Skip to: 8345
1224
/* 5731 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1225
/* 5735 */    MCD_OPC_Decode, 134, 6, 65, // Opcode: SHSUB8
1226
/* 5739 */    MCD_OPC_FilterValue, 1, 194, 0, 0, // Skip to: 5938
1227
/* 5744 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
1228
/* 5747 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5761
1229
/* 5752 */    MCD_OPC_CheckPredicate, 1, 28, 10, 0, // Skip to: 8345
1230
/* 5757 */    MCD_OPC_Decode, 180, 6, 74, // Opcode: SSAT
1231
/* 5761 */    MCD_OPC_FilterValue, 1, 19, 10, 0, // Skip to: 8345
1232
/* 5766 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
1233
/* 5769 */    MCD_OPC_FilterValue, 0, 52, 0, 0, // Skip to: 5826
1234
/* 5774 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1235
/* 5777 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 5798
1236
/* 5782 */    MCD_OPC_CheckPredicate, 1, 254, 9, 0, // Skip to: 8345
1237
/* 5787 */    MCD_OPC_CheckField, 8, 4, 15, 247, 9, 0, // Skip to: 8345
1238
/* 5794 */    MCD_OPC_Decode, 181, 6, 75, // Opcode: SSAT16
1239
/* 5798 */    MCD_OPC_FilterValue, 1, 238, 9, 0, // Skip to: 8345
1240
/* 5803 */    MCD_OPC_CheckPredicate, 1, 233, 9, 0, // Skip to: 8345
1241
/* 5808 */    MCD_OPC_CheckField, 16, 4, 15, 226, 9, 0, // Skip to: 8345
1242
/* 5815 */    MCD_OPC_CheckField, 8, 4, 15, 219, 9, 0, // Skip to: 8345
1243
/* 5822 */    MCD_OPC_Decode, 216, 5, 35, // Opcode: REV
1244
/* 5826 */    MCD_OPC_FilterValue, 1, 79, 0, 0, // Skip to: 5910
1245
/* 5831 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1246
/* 5834 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 5872
1247
/* 5839 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 5859
1248
/* 5844 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 5859
1249
/* 5851 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1250
/* 5855 */    MCD_OPC_Decode, 254, 6, 70, // Opcode: SXTB
1251
/* 5859 */    MCD_OPC_CheckPredicate, 1, 177, 9, 0, // Skip to: 8345
1252
/* 5864 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1253
/* 5868 */    MCD_OPC_Decode, 251, 6, 71, // Opcode: SXTAB
1254
/* 5872 */    MCD_OPC_FilterValue, 1, 164, 9, 0, // Skip to: 8345
1255
/* 5877 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 5897
1256
/* 5882 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 5897
1257
/* 5889 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1258
/* 5893 */    MCD_OPC_Decode, 128, 7, 70, // Opcode: SXTH
1259
/* 5897 */    MCD_OPC_CheckPredicate, 1, 139, 9, 0, // Skip to: 8345
1260
/* 5902 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1261
/* 5906 */    MCD_OPC_Decode, 253, 6, 71, // Opcode: SXTAH
1262
/* 5910 */    MCD_OPC_FilterValue, 2, 126, 9, 0, // Skip to: 8345
1263
/* 5915 */    MCD_OPC_CheckPredicate, 1, 121, 9, 0, // Skip to: 8345
1264
/* 5920 */    MCD_OPC_CheckField, 16, 5, 31, 114, 9, 0, // Skip to: 8345
1265
/* 5927 */    MCD_OPC_CheckField, 8, 4, 15, 107, 9, 0, // Skip to: 8345
1266
/* 5934 */    MCD_OPC_Decode, 217, 5, 35, // Opcode: REV16
1267
/* 5938 */    MCD_OPC_FilterValue, 2, 30, 0, 0, // Skip to: 5973
1268
/* 5943 */    MCD_OPC_CheckPredicate, 19, 93, 9, 0, // Skip to: 8345
1269
/* 5948 */    MCD_OPC_CheckField, 20, 1, 1, 86, 9, 0, // Skip to: 8345
1270
/* 5955 */    MCD_OPC_CheckField, 12, 4, 15, 79, 9, 0, // Skip to: 8345
1271
/* 5962 */    MCD_OPC_CheckField, 5, 3, 0, 72, 9, 0, // Skip to: 8345
1272
/* 5969 */    MCD_OPC_Decode, 145, 7, 30, // Opcode: UDIV
1273
/* 5973 */    MCD_OPC_FilterValue, 3, 63, 9, 0, // Skip to: 8345
1274
/* 5978 */    MCD_OPC_CheckPredicate, 13, 58, 9, 0, // Skip to: 8345
1275
/* 5983 */    MCD_OPC_CheckField, 5, 2, 2, 51, 9, 0, // Skip to: 8345
1276
/* 5990 */    MCD_OPC_Decode, 242, 5, 76, // Opcode: SBFX
1277
/* 5994 */    MCD_OPC_FilterValue, 2, 155, 2, 0, // Skip to: 6666
1278
/* 5999 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
1279
/* 6002 */    MCD_OPC_FilterValue, 0, 121, 0, 0, // Skip to: 6128
1280
/* 6007 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1281
/* 6010 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 6046
1282
/* 6015 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1283
/* 6018 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6032
1284
/* 6023 */    MCD_OPC_CheckPredicate, 0, 13, 9, 0, // Skip to: 8345
1285
/* 6028 */    MCD_OPC_Decode, 219, 6, 55, // Opcode: STRB_POST_REG
1286
/* 6032 */    MCD_OPC_FilterValue, 1, 4, 9, 0, // Skip to: 8345
1287
/* 6037 */    MCD_OPC_CheckPredicate, 0, 255, 8, 0, // Skip to: 8345
1288
/* 6042 */    MCD_OPC_Decode, 223, 6, 77, // Opcode: STRBrs
1289
/* 6046 */    MCD_OPC_FilterValue, 1, 246, 8, 0, // Skip to: 8345
1290
/* 6051 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1291
/* 6054 */    MCD_OPC_FilterValue, 0, 32, 0, 0, // Skip to: 6091
1292
/* 6059 */    MCD_OPC_CheckPredicate, 15, 18, 0, 0, // Skip to: 6082
1293
/* 6064 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 6082
1294
/* 6071 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 6082
1295
/* 6078 */    MCD_OPC_Decode, 204, 5, 64, // Opcode: PLIrs
1296
/* 6082 */    MCD_OPC_CheckPredicate, 0, 210, 8, 0, // Skip to: 8345
1297
/* 6087 */    MCD_OPC_Decode, 128, 5, 55, // Opcode: LDRB_POST_REG
1298
/* 6091 */    MCD_OPC_FilterValue, 1, 201, 8, 0, // Skip to: 8345
1299
/* 6096 */    MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 6119
1300
/* 6101 */    MCD_OPC_CheckField, 28, 4, 15, 11, 0, 0, // Skip to: 6119
1301
/* 6108 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 6119
1302
/* 6115 */    MCD_OPC_Decode, 202, 5, 64, // Opcode: PLDrs
1303
/* 6119 */    MCD_OPC_CheckPredicate, 0, 173, 8, 0, // Skip to: 8345
1304
/* 6124 */    MCD_OPC_Decode, 132, 5, 77, // Opcode: LDRBrs
1305
/* 6128 */    MCD_OPC_FilterValue, 1, 164, 8, 0, // Skip to: 8345
1306
/* 6133 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
1307
/* 6136 */    MCD_OPC_FilterValue, 0, 158, 0, 0, // Skip to: 6299
1308
/* 6141 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1309
/* 6144 */    MCD_OPC_FilterValue, 0, 53, 0, 0, // Skip to: 6202
1310
/* 6149 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1311
/* 6152 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 6177
1312
/* 6157 */    MCD_OPC_CheckPredicate, 0, 135, 8, 0, // Skip to: 8345
1313
/* 6162 */    MCD_OPC_CheckField, 20, 1, 1, 128, 8, 0, // Skip to: 8345
1314
/* 6169 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1315
/* 6173 */    MCD_OPC_Decode, 140, 7, 65, // Opcode: UADD16
1316
/* 6177 */    MCD_OPC_FilterValue, 1, 115, 8, 0, // Skip to: 8345
1317
/* 6182 */    MCD_OPC_CheckPredicate, 0, 110, 8, 0, // Skip to: 8345
1318
/* 6187 */    MCD_OPC_CheckField, 20, 1, 1, 103, 8, 0, // Skip to: 8345
1319
/* 6194 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1320
/* 6198 */    MCD_OPC_Decode, 141, 7, 65, // Opcode: UADD8
1321
/* 6202 */    MCD_OPC_FilterValue, 2, 62, 0, 0, // Skip to: 6269
1322
/* 6207 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1323
/* 6210 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 6231
1324
/* 6215 */    MCD_OPC_CheckPredicate, 1, 77, 8, 0, // Skip to: 8345
1325
/* 6220 */    MCD_OPC_CheckField, 7, 1, 0, 70, 8, 0, // Skip to: 8345
1326
/* 6227 */    MCD_OPC_Decode, 143, 6, 19, // Opcode: SMLALD
1327
/* 6231 */    MCD_OPC_FilterValue, 1, 61, 8, 0, // Skip to: 8345
1328
/* 6236 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1329
/* 6239 */    MCD_OPC_FilterValue, 0, 53, 8, 0, // Skip to: 8345
1330
/* 6244 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 6260
1331
/* 6249 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 6260
1332
/* 6256 */    MCD_OPC_Decode, 159, 6, 30, // Opcode: SMMUL
1333
/* 6260 */    MCD_OPC_CheckPredicate, 1, 32, 8, 0, // Skip to: 8345
1334
/* 6265 */    MCD_OPC_Decode, 155, 6, 39, // Opcode: SMMLA
1335
/* 6269 */    MCD_OPC_FilterValue, 3, 23, 8, 0, // Skip to: 8345
1336
/* 6274 */    MCD_OPC_CheckPredicate, 13, 11, 0, 0, // Skip to: 6290
1337
/* 6279 */    MCD_OPC_CheckField, 0, 4, 15, 4, 0, 0, // Skip to: 6290
1338
/* 6286 */    MCD_OPC_Decode, 162, 4, 78, // Opcode: BFC
1339
/* 6290 */    MCD_OPC_CheckPredicate, 13, 2, 8, 0, // Skip to: 8345
1340
/* 6295 */    MCD_OPC_Decode, 163, 4, 79, // Opcode: BFI
1341
/* 6299 */    MCD_OPC_FilterValue, 1, 102, 0, 0, // Skip to: 6406
1342
/* 6304 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1343
/* 6307 */    MCD_OPC_FilterValue, 0, 23, 0, 0, // Skip to: 6335
1344
/* 6312 */    MCD_OPC_CheckPredicate, 1, 236, 7, 0, // Skip to: 8345
1345
/* 6317 */    MCD_OPC_CheckField, 23, 2, 2, 229, 7, 0, // Skip to: 8345
1346
/* 6324 */    MCD_OPC_CheckField, 7, 1, 0, 222, 7, 0, // Skip to: 8345
1347
/* 6331 */    MCD_OPC_Decode, 144, 6, 19, // Opcode: SMLALDX
1348
/* 6335 */    MCD_OPC_FilterValue, 1, 213, 7, 0, // Skip to: 8345
1349
/* 6340 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1350
/* 6343 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 6368
1351
/* 6348 */    MCD_OPC_CheckPredicate, 0, 200, 7, 0, // Skip to: 8345
1352
/* 6353 */    MCD_OPC_CheckField, 7, 1, 0, 193, 7, 0, // Skip to: 8345
1353
/* 6360 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1354
/* 6364 */    MCD_OPC_Decode, 142, 7, 65, // Opcode: UASX
1355
/* 6368 */    MCD_OPC_FilterValue, 2, 180, 7, 0, // Skip to: 8345
1356
/* 6373 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1357
/* 6376 */    MCD_OPC_FilterValue, 0, 172, 7, 0, // Skip to: 8345
1358
/* 6381 */    MCD_OPC_CheckPredicate, 1, 11, 0, 0, // Skip to: 6397
1359
/* 6386 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 6397
1360
/* 6393 */    MCD_OPC_Decode, 160, 6, 30, // Opcode: SMMULR
1361
/* 6397 */    MCD_OPC_CheckPredicate, 1, 151, 7, 0, // Skip to: 8345
1362
/* 6402 */    MCD_OPC_Decode, 156, 6, 39, // Opcode: SMMLAR
1363
/* 6406 */    MCD_OPC_FilterValue, 2, 85, 0, 0, // Skip to: 6496
1364
/* 6411 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1365
/* 6414 */    MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 6468
1366
/* 6419 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1367
/* 6422 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 6443
1368
/* 6427 */    MCD_OPC_CheckPredicate, 1, 121, 7, 0, // Skip to: 8345
1369
/* 6432 */    MCD_OPC_CheckField, 23, 2, 2, 114, 7, 0, // Skip to: 8345
1370
/* 6439 */    MCD_OPC_Decode, 153, 6, 19, // Opcode: SMLSLD
1371
/* 6443 */    MCD_OPC_FilterValue, 1, 105, 7, 0, // Skip to: 8345
1372
/* 6448 */    MCD_OPC_CheckPredicate, 0, 100, 7, 0, // Skip to: 8345
1373
/* 6453 */    MCD_OPC_CheckField, 23, 2, 0, 93, 7, 0, // Skip to: 8345
1374
/* 6460 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1375
/* 6464 */    MCD_OPC_Decode, 165, 7, 65, // Opcode: USAX
1376
/* 6468 */    MCD_OPC_FilterValue, 1, 80, 7, 0, // Skip to: 8345
1377
/* 6473 */    MCD_OPC_CheckPredicate, 1, 75, 7, 0, // Skip to: 8345
1378
/* 6478 */    MCD_OPC_CheckField, 23, 2, 2, 68, 7, 0, // Skip to: 8345
1379
/* 6485 */    MCD_OPC_CheckField, 20, 1, 1, 61, 7, 0, // Skip to: 8345
1380
/* 6492 */    MCD_OPC_Decode, 157, 6, 39, // Opcode: SMMLS
1381
/* 6496 */    MCD_OPC_FilterValue, 3, 52, 7, 0, // Skip to: 8345
1382
/* 6501 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1383
/* 6504 */    MCD_OPC_FilterValue, 0, 53, 0, 0, // Skip to: 6562
1384
/* 6509 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1385
/* 6512 */    MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 6537
1386
/* 6517 */    MCD_OPC_CheckPredicate, 0, 31, 7, 0, // Skip to: 8345
1387
/* 6522 */    MCD_OPC_CheckField, 20, 1, 1, 24, 7, 0, // Skip to: 8345
1388
/* 6529 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1389
/* 6533 */    MCD_OPC_Decode, 166, 7, 65, // Opcode: USUB16
1390
/* 6537 */    MCD_OPC_FilterValue, 1, 11, 7, 0, // Skip to: 8345
1391
/* 6542 */    MCD_OPC_CheckPredicate, 0, 6, 7, 0, // Skip to: 8345
1392
/* 6547 */    MCD_OPC_CheckField, 20, 1, 1, 255, 6, 0, // Skip to: 8345
1393
/* 6554 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1394
/* 6558 */    MCD_OPC_Decode, 167, 7, 65, // Opcode: USUB8
1395
/* 6562 */    MCD_OPC_FilterValue, 1, 49, 0, 0, // Skip to: 6616
1396
/* 6567 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1397
/* 6570 */    MCD_OPC_FilterValue, 0, 234, 6, 0, // Skip to: 8345
1398
/* 6575 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1399
/* 6578 */    MCD_OPC_FilterValue, 0, 226, 6, 0, // Skip to: 8345
1400
/* 6583 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 6603
1401
/* 6588 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 6603
1402
/* 6595 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1403
/* 6599 */    MCD_OPC_Decode, 172, 7, 70, // Opcode: UXTB16
1404
/* 6603 */    MCD_OPC_CheckPredicate, 1, 201, 6, 0, // Skip to: 8345
1405
/* 6608 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1406
/* 6612 */    MCD_OPC_Decode, 169, 7, 71, // Opcode: UXTAB16
1407
/* 6616 */    MCD_OPC_FilterValue, 2, 188, 6, 0, // Skip to: 8345
1408
/* 6621 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1409
/* 6624 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 6645
1410
/* 6629 */    MCD_OPC_CheckPredicate, 1, 175, 6, 0, // Skip to: 8345
1411
/* 6634 */    MCD_OPC_CheckField, 20, 1, 0, 168, 6, 0, // Skip to: 8345
1412
/* 6641 */    MCD_OPC_Decode, 154, 6, 19, // Opcode: SMLSLDX
1413
/* 6645 */    MCD_OPC_FilterValue, 1, 159, 6, 0, // Skip to: 8345
1414
/* 6650 */    MCD_OPC_CheckPredicate, 1, 154, 6, 0, // Skip to: 8345
1415
/* 6655 */    MCD_OPC_CheckField, 20, 1, 1, 147, 6, 0, // Skip to: 8345
1416
/* 6662 */    MCD_OPC_Decode, 158, 6, 39, // Opcode: SMMLSR
1417
/* 6666 */    MCD_OPC_FilterValue, 3, 138, 6, 0, // Skip to: 8345
1418
/* 6671 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
1419
/* 6674 */    MCD_OPC_FilterValue, 0, 75, 0, 0, // Skip to: 6754
1420
/* 6679 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1421
/* 6682 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 6718
1422
/* 6687 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1423
/* 6690 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6704
1424
/* 6695 */    MCD_OPC_CheckPredicate, 0, 109, 6, 0, // Skip to: 8345
1425
/* 6700 */    MCD_OPC_Decode, 217, 6, 55, // Opcode: STRBT_POST_REG
1426
/* 6704 */    MCD_OPC_FilterValue, 1, 100, 6, 0, // Skip to: 8345
1427
/* 6709 */    MCD_OPC_CheckPredicate, 0, 95, 6, 0, // Skip to: 8345
1428
/* 6714 */    MCD_OPC_Decode, 221, 6, 72, // Opcode: STRB_PRE_REG
1429
/* 6718 */    MCD_OPC_FilterValue, 1, 86, 6, 0, // Skip to: 8345
1430
/* 6723 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1431
/* 6726 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6740
1432
/* 6731 */    MCD_OPC_CheckPredicate, 0, 73, 6, 0, // Skip to: 8345
1433
/* 6736 */    MCD_OPC_Decode, 254, 4, 55, // Opcode: LDRBT_POST_REG
1434
/* 6740 */    MCD_OPC_FilterValue, 1, 64, 6, 0, // Skip to: 8345
1435
/* 6745 */    MCD_OPC_CheckPredicate, 0, 59, 6, 0, // Skip to: 8345
1436
/* 6750 */    MCD_OPC_Decode, 130, 5, 73, // Opcode: LDRB_PRE_REG
1437
/* 6754 */    MCD_OPC_FilterValue, 1, 50, 6, 0, // Skip to: 8345
1438
/* 6759 */    MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
1439
/* 6762 */    MCD_OPC_FilterValue, 0, 11, 1, 0, // Skip to: 7034
1440
/* 6767 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
1441
/* 6770 */    MCD_OPC_FilterValue, 0, 39, 0, 0, // Skip to: 6814
1442
/* 6775 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1443
/* 6778 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 6796
1444
/* 6783 */    MCD_OPC_CheckPredicate, 0, 21, 6, 0, // Skip to: 8345
1445
/* 6788 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1446
/* 6792 */    MCD_OPC_Decode, 155, 7, 65, // Opcode: UQADD16
1447
/* 6796 */    MCD_OPC_FilterValue, 1, 8, 6, 0, // Skip to: 8345
1448
/* 6801 */    MCD_OPC_CheckPredicate, 0, 3, 6, 0, // Skip to: 8345
1449
/* 6806 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1450
/* 6810 */    MCD_OPC_Decode, 146, 7, 65, // Opcode: UHADD16
1451
/* 6814 */    MCD_OPC_FilterValue, 1, 39, 0, 0, // Skip to: 6858
1452
/* 6819 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1453
/* 6822 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 6840
1454
/* 6827 */    MCD_OPC_CheckPredicate, 0, 233, 5, 0, // Skip to: 8345
1455
/* 6832 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1456
/* 6836 */    MCD_OPC_Decode, 157, 7, 65, // Opcode: UQASX
1457
/* 6840 */    MCD_OPC_FilterValue, 1, 220, 5, 0, // Skip to: 8345
1458
/* 6845 */    MCD_OPC_CheckPredicate, 0, 215, 5, 0, // Skip to: 8345
1459
/* 6850 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1460
/* 6854 */    MCD_OPC_Decode, 148, 7, 65, // Opcode: UHASX
1461
/* 6858 */    MCD_OPC_FilterValue, 2, 39, 0, 0, // Skip to: 6902
1462
/* 6863 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1463
/* 6866 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 6884
1464
/* 6871 */    MCD_OPC_CheckPredicate, 0, 189, 5, 0, // Skip to: 8345
1465
/* 6876 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1466
/* 6880 */    MCD_OPC_Decode, 158, 7, 65, // Opcode: UQSAX
1467
/* 6884 */    MCD_OPC_FilterValue, 1, 176, 5, 0, // Skip to: 8345
1468
/* 6889 */    MCD_OPC_CheckPredicate, 0, 171, 5, 0, // Skip to: 8345
1469
/* 6894 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1470
/* 6898 */    MCD_OPC_Decode, 149, 7, 65, // Opcode: UHSAX
1471
/* 6902 */    MCD_OPC_FilterValue, 3, 39, 0, 0, // Skip to: 6946
1472
/* 6907 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1473
/* 6910 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 6928
1474
/* 6915 */    MCD_OPC_CheckPredicate, 0, 145, 5, 0, // Skip to: 8345
1475
/* 6920 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1476
/* 6924 */    MCD_OPC_Decode, 159, 7, 65, // Opcode: UQSUB16
1477
/* 6928 */    MCD_OPC_FilterValue, 1, 132, 5, 0, // Skip to: 8345
1478
/* 6933 */    MCD_OPC_CheckPredicate, 0, 127, 5, 0, // Skip to: 8345
1479
/* 6938 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1480
/* 6942 */    MCD_OPC_Decode, 150, 7, 65, // Opcode: UHSUB16
1481
/* 6946 */    MCD_OPC_FilterValue, 4, 39, 0, 0, // Skip to: 6990
1482
/* 6951 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1483
/* 6954 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 6972
1484
/* 6959 */    MCD_OPC_CheckPredicate, 0, 101, 5, 0, // Skip to: 8345
1485
/* 6964 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1486
/* 6968 */    MCD_OPC_Decode, 156, 7, 65, // Opcode: UQADD8
1487
/* 6972 */    MCD_OPC_FilterValue, 1, 88, 5, 0, // Skip to: 8345
1488
/* 6977 */    MCD_OPC_CheckPredicate, 0, 83, 5, 0, // Skip to: 8345
1489
/* 6982 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1490
/* 6986 */    MCD_OPC_Decode, 147, 7, 65, // Opcode: UHADD8
1491
/* 6990 */    MCD_OPC_FilterValue, 7, 70, 5, 0, // Skip to: 8345
1492
/* 6995 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1493
/* 6998 */    MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 7016
1494
/* 7003 */    MCD_OPC_CheckPredicate, 0, 57, 5, 0, // Skip to: 8345
1495
/* 7008 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1496
/* 7012 */    MCD_OPC_Decode, 160, 7, 65, // Opcode: UQSUB8
1497
/* 7016 */    MCD_OPC_FilterValue, 1, 44, 5, 0, // Skip to: 8345
1498
/* 7021 */    MCD_OPC_CheckPredicate, 0, 39, 5, 0, // Skip to: 8345
1499
/* 7026 */    MCD_OPC_SoftFail, 0, 128, 30 /* 0xf00 */,
1500
/* 7030 */    MCD_OPC_Decode, 151, 7, 65, // Opcode: UHSUB8
1501
/* 7034 */    MCD_OPC_FilterValue, 1, 194, 0, 0, // Skip to: 7233
1502
/* 7039 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
1503
/* 7042 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7056
1504
/* 7047 */    MCD_OPC_CheckPredicate, 1, 13, 5, 0, // Skip to: 8345
1505
/* 7052 */    MCD_OPC_Decode, 163, 7, 74, // Opcode: USAT
1506
/* 7056 */    MCD_OPC_FilterValue, 1, 4, 5, 0, // Skip to: 8345
1507
/* 7061 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
1508
/* 7064 */    MCD_OPC_FilterValue, 0, 52, 0, 0, // Skip to: 7121
1509
/* 7069 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1510
/* 7072 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 7093
1511
/* 7077 */    MCD_OPC_CheckPredicate, 1, 239, 4, 0, // Skip to: 8345
1512
/* 7082 */    MCD_OPC_CheckField, 8, 4, 15, 232, 4, 0, // Skip to: 8345
1513
/* 7089 */    MCD_OPC_Decode, 164, 7, 75, // Opcode: USAT16
1514
/* 7093 */    MCD_OPC_FilterValue, 1, 223, 4, 0, // Skip to: 8345
1515
/* 7098 */    MCD_OPC_CheckPredicate, 13, 218, 4, 0, // Skip to: 8345
1516
/* 7103 */    MCD_OPC_CheckField, 16, 4, 15, 211, 4, 0, // Skip to: 8345
1517
/* 7110 */    MCD_OPC_CheckField, 8, 4, 15, 204, 4, 0, // Skip to: 8345
1518
/* 7117 */    MCD_OPC_Decode, 215, 5, 35, // Opcode: RBIT
1519
/* 7121 */    MCD_OPC_FilterValue, 1, 79, 0, 0, // Skip to: 7205
1520
/* 7126 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1521
/* 7129 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 7167
1522
/* 7134 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 7154
1523
/* 7139 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 7154
1524
/* 7146 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1525
/* 7150 */    MCD_OPC_Decode, 171, 7, 70, // Opcode: UXTB
1526
/* 7154 */    MCD_OPC_CheckPredicate, 1, 162, 4, 0, // Skip to: 8345
1527
/* 7159 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1528
/* 7163 */    MCD_OPC_Decode, 168, 7, 71, // Opcode: UXTAB
1529
/* 7167 */    MCD_OPC_FilterValue, 1, 149, 4, 0, // Skip to: 8345
1530
/* 7172 */    MCD_OPC_CheckPredicate, 1, 15, 0, 0, // Skip to: 7192
1531
/* 7177 */    MCD_OPC_CheckField, 16, 4, 15, 8, 0, 0, // Skip to: 7192
1532
/* 7184 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1533
/* 7188 */    MCD_OPC_Decode, 173, 7, 70, // Opcode: UXTH
1534
/* 7192 */    MCD_OPC_CheckPredicate, 1, 124, 4, 0, // Skip to: 8345
1535
/* 7197 */    MCD_OPC_SoftFail, 128, 6 /* 0x300 */, 0,
1536
/* 7201 */    MCD_OPC_Decode, 170, 7, 71, // Opcode: UXTAH
1537
/* 7205 */    MCD_OPC_FilterValue, 2, 111, 4, 0, // Skip to: 8345
1538
/* 7210 */    MCD_OPC_CheckPredicate, 1, 106, 4, 0, // Skip to: 8345
1539
/* 7215 */    MCD_OPC_CheckField, 16, 5, 31, 99, 4, 0, // Skip to: 8345
1540
/* 7222 */    MCD_OPC_CheckField, 8, 4, 15, 92, 4, 0, // Skip to: 8345
1541
/* 7229 */    MCD_OPC_Decode, 218, 5, 35, // Opcode: REVSH
1542
/* 7233 */    MCD_OPC_FilterValue, 3, 83, 4, 0, // Skip to: 8345
1543
/* 7238 */    MCD_OPC_ExtractField, 5, 2,  // Inst{6-5} ...
1544
/* 7241 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7255
1545
/* 7246 */    MCD_OPC_CheckPredicate, 13, 70, 4, 0, // Skip to: 8345
1546
/* 7251 */    MCD_OPC_Decode, 143, 7, 76, // Opcode: UBFX
1547
/* 7255 */    MCD_OPC_FilterValue, 3, 61, 4, 0, // Skip to: 8345
1548
/* 7260 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
1549
/* 7263 */    MCD_OPC_FilterValue, 1, 53, 4, 0, // Skip to: 8345
1550
/* 7268 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1551
/* 7271 */    MCD_OPC_FilterValue, 1, 45, 4, 0, // Skip to: 8345
1552
/* 7276 */    MCD_OPC_ExtractField, 28, 4,  // Inst{31-28} ...
1553
/* 7279 */    MCD_OPC_FilterValue, 14, 37, 4, 0, // Skip to: 8345
1554
/* 7284 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
1555
/* 7287 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 7309
1556
/* 7292 */    MCD_OPC_CheckPredicate, 20, 34, 0, 0, // Skip to: 7331
1557
/* 7297 */    MCD_OPC_CheckField, 8, 12, 222, 29, 26, 0, 0, // Skip to: 7331
1558
/* 7305 */    MCD_OPC_Decode, 134, 7, 51, // Opcode: TRAPNaCl
1559
/* 7309 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 7331
1560
/* 7314 */    MCD_OPC_CheckPredicate, 0, 12, 0, 0, // Skip to: 7331
1561
/* 7319 */    MCD_OPC_CheckField, 8, 12, 222, 31, 4, 0, 0, // Skip to: 7331
1562
/* 7327 */    MCD_OPC_Decode, 133, 7, 51, // Opcode: TRAP
1563
/* 7331 */    MCD_OPC_CheckPredicate, 0, 241, 3, 0, // Skip to: 8345
1564
/* 7336 */    MCD_OPC_Decode, 144, 7, 15, // Opcode: UDF
1565
/* 7340 */    MCD_OPC_FilterValue, 4, 75, 3, 0, // Skip to: 8188
1566
/* 7345 */    MCD_OPC_ExtractField, 20, 5,  // Inst{24-20} ...
1567
/* 7348 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7362
1568
/* 7353 */    MCD_OPC_CheckPredicate, 0, 219, 3, 0, // Skip to: 8345
1569
/* 7358 */    MCD_OPC_Decode, 208, 6, 80, // Opcode: STMDA
1570
/* 7362 */    MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 7400
1571
/* 7367 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7391
1572
/* 7372 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7391
1573
/* 7379 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7391
1574
/* 7387 */    MCD_OPC_Decode, 219, 5, 81, // Opcode: RFEDA
1575
/* 7391 */    MCD_OPC_CheckPredicate, 0, 181, 3, 0, // Skip to: 8345
1576
/* 7396 */    MCD_OPC_Decode, 245, 4, 80, // Opcode: LDMDA
1577
/* 7400 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7414
1578
/* 7405 */    MCD_OPC_CheckPredicate, 0, 167, 3, 0, // Skip to: 8345
1579
/* 7410 */    MCD_OPC_Decode, 209, 6, 82, // Opcode: STMDA_UPD
1580
/* 7414 */    MCD_OPC_FilterValue, 3, 33, 0, 0, // Skip to: 7452
1581
/* 7419 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7443
1582
/* 7424 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7443
1583
/* 7431 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7443
1584
/* 7439 */    MCD_OPC_Decode, 220, 5, 81, // Opcode: RFEDA_UPD
1585
/* 7443 */    MCD_OPC_CheckPredicate, 0, 129, 3, 0, // Skip to: 8345
1586
/* 7448 */    MCD_OPC_Decode, 246, 4, 82, // Opcode: LDMDA_UPD
1587
/* 7452 */    MCD_OPC_FilterValue, 4, 34, 0, 0, // Skip to: 7491
1588
/* 7457 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7482
1589
/* 7462 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7482
1590
/* 7469 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7482
1591
/* 7478 */    MCD_OPC_Decode, 172, 6, 83, // Opcode: SRSDA
1592
/* 7482 */    MCD_OPC_CheckPredicate, 0, 90, 3, 0, // Skip to: 8345
1593
/* 7487 */    MCD_OPC_Decode, 190, 21, 80, // Opcode: sysSTMDA
1594
/* 7491 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 7505
1595
/* 7496 */    MCD_OPC_CheckPredicate, 0, 76, 3, 0, // Skip to: 8345
1596
/* 7501 */    MCD_OPC_Decode, 182, 21, 80, // Opcode: sysLDMDA
1597
/* 7505 */    MCD_OPC_FilterValue, 6, 34, 0, 0, // Skip to: 7544
1598
/* 7510 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7535
1599
/* 7515 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7535
1600
/* 7522 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7535
1601
/* 7531 */    MCD_OPC_Decode, 173, 6, 83, // Opcode: SRSDA_UPD
1602
/* 7535 */    MCD_OPC_CheckPredicate, 0, 37, 3, 0, // Skip to: 8345
1603
/* 7540 */    MCD_OPC_Decode, 191, 21, 82, // Opcode: sysSTMDA_UPD
1604
/* 7544 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 7558
1605
/* 7549 */    MCD_OPC_CheckPredicate, 0, 23, 3, 0, // Skip to: 8345
1606
/* 7554 */    MCD_OPC_Decode, 183, 21, 82, // Opcode: sysLDMDA_UPD
1607
/* 7558 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 7572
1608
/* 7563 */    MCD_OPC_CheckPredicate, 0, 9, 3, 0, // Skip to: 8345
1609
/* 7568 */    MCD_OPC_Decode, 212, 6, 80, // Opcode: STMIA
1610
/* 7572 */    MCD_OPC_FilterValue, 9, 33, 0, 0, // Skip to: 7610
1611
/* 7577 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7601
1612
/* 7582 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7601
1613
/* 7589 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7601
1614
/* 7597 */    MCD_OPC_Decode, 223, 5, 81, // Opcode: RFEIA
1615
/* 7601 */    MCD_OPC_CheckPredicate, 0, 227, 2, 0, // Skip to: 8345
1616
/* 7606 */    MCD_OPC_Decode, 249, 4, 80, // Opcode: LDMIA
1617
/* 7610 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 7624
1618
/* 7615 */    MCD_OPC_CheckPredicate, 0, 213, 2, 0, // Skip to: 8345
1619
/* 7620 */    MCD_OPC_Decode, 213, 6, 82, // Opcode: STMIA_UPD
1620
/* 7624 */    MCD_OPC_FilterValue, 11, 33, 0, 0, // Skip to: 7662
1621
/* 7629 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7653
1622
/* 7634 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7653
1623
/* 7641 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7653
1624
/* 7649 */    MCD_OPC_Decode, 224, 5, 81, // Opcode: RFEIA_UPD
1625
/* 7653 */    MCD_OPC_CheckPredicate, 0, 175, 2, 0, // Skip to: 8345
1626
/* 7658 */    MCD_OPC_Decode, 250, 4, 82, // Opcode: LDMIA_UPD
1627
/* 7662 */    MCD_OPC_FilterValue, 12, 34, 0, 0, // Skip to: 7701
1628
/* 7667 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7692
1629
/* 7672 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7692
1630
/* 7679 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7692
1631
/* 7688 */    MCD_OPC_Decode, 176, 6, 83, // Opcode: SRSIA
1632
/* 7692 */    MCD_OPC_CheckPredicate, 0, 136, 2, 0, // Skip to: 8345
1633
/* 7697 */    MCD_OPC_Decode, 194, 21, 80, // Opcode: sysSTMIA
1634
/* 7701 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 7715
1635
/* 7706 */    MCD_OPC_CheckPredicate, 0, 122, 2, 0, // Skip to: 8345
1636
/* 7711 */    MCD_OPC_Decode, 186, 21, 80, // Opcode: sysLDMIA
1637
/* 7715 */    MCD_OPC_FilterValue, 14, 34, 0, 0, // Skip to: 7754
1638
/* 7720 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7745
1639
/* 7725 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7745
1640
/* 7732 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7745
1641
/* 7741 */    MCD_OPC_Decode, 177, 6, 83, // Opcode: SRSIA_UPD
1642
/* 7745 */    MCD_OPC_CheckPredicate, 0, 83, 2, 0, // Skip to: 8345
1643
/* 7750 */    MCD_OPC_Decode, 195, 21, 82, // Opcode: sysSTMIA_UPD
1644
/* 7754 */    MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 7768
1645
/* 7759 */    MCD_OPC_CheckPredicate, 0, 69, 2, 0, // Skip to: 8345
1646
/* 7764 */    MCD_OPC_Decode, 187, 21, 82, // Opcode: sysLDMIA_UPD
1647
/* 7768 */    MCD_OPC_FilterValue, 16, 9, 0, 0, // Skip to: 7782
1648
/* 7773 */    MCD_OPC_CheckPredicate, 0, 55, 2, 0, // Skip to: 8345
1649
/* 7778 */    MCD_OPC_Decode, 210, 6, 80, // Opcode: STMDB
1650
/* 7782 */    MCD_OPC_FilterValue, 17, 33, 0, 0, // Skip to: 7820
1651
/* 7787 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7811
1652
/* 7792 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7811
1653
/* 7799 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7811
1654
/* 7807 */    MCD_OPC_Decode, 221, 5, 81, // Opcode: RFEDB
1655
/* 7811 */    MCD_OPC_CheckPredicate, 0, 17, 2, 0, // Skip to: 8345
1656
/* 7816 */    MCD_OPC_Decode, 247, 4, 80, // Opcode: LDMDB
1657
/* 7820 */    MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 7834
1658
/* 7825 */    MCD_OPC_CheckPredicate, 0, 3, 2, 0, // Skip to: 8345
1659
/* 7830 */    MCD_OPC_Decode, 211, 6, 82, // Opcode: STMDB_UPD
1660
/* 7834 */    MCD_OPC_FilterValue, 19, 33, 0, 0, // Skip to: 7872
1661
/* 7839 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 7863
1662
/* 7844 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 7863
1663
/* 7851 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 7863
1664
/* 7859 */    MCD_OPC_Decode, 222, 5, 81, // Opcode: RFEDB_UPD
1665
/* 7863 */    MCD_OPC_CheckPredicate, 0, 221, 1, 0, // Skip to: 8345
1666
/* 7868 */    MCD_OPC_Decode, 248, 4, 82, // Opcode: LDMDB_UPD
1667
/* 7872 */    MCD_OPC_FilterValue, 20, 34, 0, 0, // Skip to: 7911
1668
/* 7877 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7902
1669
/* 7882 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7902
1670
/* 7889 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7902
1671
/* 7898 */    MCD_OPC_Decode, 174, 6, 83, // Opcode: SRSDB
1672
/* 7902 */    MCD_OPC_CheckPredicate, 0, 182, 1, 0, // Skip to: 8345
1673
/* 7907 */    MCD_OPC_Decode, 192, 21, 80, // Opcode: sysSTMDB
1674
/* 7911 */    MCD_OPC_FilterValue, 21, 9, 0, 0, // Skip to: 7925
1675
/* 7916 */    MCD_OPC_CheckPredicate, 0, 168, 1, 0, // Skip to: 8345
1676
/* 7921 */    MCD_OPC_Decode, 184, 21, 80, // Opcode: sysLDMDB
1677
/* 7925 */    MCD_OPC_FilterValue, 22, 34, 0, 0, // Skip to: 7964
1678
/* 7930 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 7955
1679
/* 7935 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 7955
1680
/* 7942 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 7955
1681
/* 7951 */    MCD_OPC_Decode, 175, 6, 83, // Opcode: SRSDB_UPD
1682
/* 7955 */    MCD_OPC_CheckPredicate, 0, 129, 1, 0, // Skip to: 8345
1683
/* 7960 */    MCD_OPC_Decode, 193, 21, 82, // Opcode: sysSTMDB_UPD
1684
/* 7964 */    MCD_OPC_FilterValue, 23, 9, 0, 0, // Skip to: 7978
1685
/* 7969 */    MCD_OPC_CheckPredicate, 0, 115, 1, 0, // Skip to: 8345
1686
/* 7974 */    MCD_OPC_Decode, 185, 21, 82, // Opcode: sysLDMDB_UPD
1687
/* 7978 */    MCD_OPC_FilterValue, 24, 9, 0, 0, // Skip to: 7992
1688
/* 7983 */    MCD_OPC_CheckPredicate, 0, 101, 1, 0, // Skip to: 8345
1689
/* 7988 */    MCD_OPC_Decode, 214, 6, 80, // Opcode: STMIB
1690
/* 7992 */    MCD_OPC_FilterValue, 25, 33, 0, 0, // Skip to: 8030
1691
/* 7997 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 8021
1692
/* 8002 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 8021
1693
/* 8009 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 8021
1694
/* 8017 */    MCD_OPC_Decode, 225, 5, 81, // Opcode: RFEIB
1695
/* 8021 */    MCD_OPC_CheckPredicate, 0, 63, 1, 0, // Skip to: 8345
1696
/* 8026 */    MCD_OPC_Decode, 251, 4, 80, // Opcode: LDMIB
1697
/* 8030 */    MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 8044
1698
/* 8035 */    MCD_OPC_CheckPredicate, 0, 49, 1, 0, // Skip to: 8345
1699
/* 8040 */    MCD_OPC_Decode, 215, 6, 82, // Opcode: STMIB_UPD
1700
/* 8044 */    MCD_OPC_FilterValue, 27, 33, 0, 0, // Skip to: 8082
1701
/* 8049 */    MCD_OPC_CheckPredicate, 0, 19, 0, 0, // Skip to: 8073
1702
/* 8054 */    MCD_OPC_CheckField, 28, 4, 15, 12, 0, 0, // Skip to: 8073
1703
/* 8061 */    MCD_OPC_CheckField, 0, 16, 128, 20, 4, 0, 0, // Skip to: 8073
1704
/* 8069 */    MCD_OPC_Decode, 226, 5, 81, // Opcode: RFEIB_UPD
1705
/* 8073 */    MCD_OPC_CheckPredicate, 0, 11, 1, 0, // Skip to: 8345
1706
/* 8078 */    MCD_OPC_Decode, 252, 4, 82, // Opcode: LDMIB_UPD
1707
/* 8082 */    MCD_OPC_FilterValue, 28, 34, 0, 0, // Skip to: 8121
1708
/* 8087 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 8112
1709
/* 8092 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 8112
1710
/* 8099 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 8112
1711
/* 8108 */    MCD_OPC_Decode, 178, 6, 83, // Opcode: SRSIB
1712
/* 8112 */    MCD_OPC_CheckPredicate, 0, 228, 0, 0, // Skip to: 8345
1713
/* 8117 */    MCD_OPC_Decode, 196, 21, 80, // Opcode: sysSTMIB
1714
/* 8121 */    MCD_OPC_FilterValue, 29, 9, 0, 0, // Skip to: 8135
1715
/* 8126 */    MCD_OPC_CheckPredicate, 0, 214, 0, 0, // Skip to: 8345
1716
/* 8131 */    MCD_OPC_Decode, 188, 21, 80, // Opcode: sysLDMIB
1717
/* 8135 */    MCD_OPC_FilterValue, 30, 34, 0, 0, // Skip to: 8174
1718
/* 8140 */    MCD_OPC_CheckPredicate, 0, 20, 0, 0, // Skip to: 8165
1719
/* 8145 */    MCD_OPC_CheckField, 28, 4, 15, 13, 0, 0, // Skip to: 8165
1720
/* 8152 */    MCD_OPC_CheckField, 5, 15, 168, 208, 1, 4, 0, 0, // Skip to: 8165
1721
/* 8161 */    MCD_OPC_Decode, 179, 6, 83, // Opcode: SRSIB_UPD
1722
/* 8165 */    MCD_OPC_CheckPredicate, 0, 175, 0, 0, // Skip to: 8345
1723
/* 8170 */    MCD_OPC_Decode, 197, 21, 82, // Opcode: sysSTMIB_UPD
1724
/* 8174 */    MCD_OPC_FilterValue, 31, 166, 0, 0, // Skip to: 8345
1725
/* 8179 */    MCD_OPC_CheckPredicate, 0, 161, 0, 0, // Skip to: 8345
1726
/* 8184 */    MCD_OPC_Decode, 189, 21, 82, // Opcode: sysLDMIB_UPD
1727
/* 8188 */    MCD_OPC_FilterValue, 5, 63, 0, 0, // Skip to: 8256
1728
/* 8193 */    MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
1729
/* 8196 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8210
1730
/* 8201 */    MCD_OPC_CheckPredicate, 0, 34, 0, 0, // Skip to: 8240
1731
/* 8206 */    MCD_OPC_Decode, 178, 4, 84, // Opcode: Bcc
1732
/* 8210 */    MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 8240
1733
/* 8215 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 8231
1734
/* 8220 */    MCD_OPC_CheckField, 28, 4, 14, 4, 0, 0, // Skip to: 8231
1735
/* 8227 */    MCD_OPC_Decode, 169, 4, 84, // Opcode: BL
1736
/* 8231 */    MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 8240
1737
/* 8236 */    MCD_OPC_Decode, 173, 4, 84, // Opcode: BL_pred
1738
/* 8240 */    MCD_OPC_CheckPredicate, 11, 100, 0, 0, // Skip to: 8345
1739
/* 8245 */    MCD_OPC_CheckField, 28, 4, 15, 93, 0, 0, // Skip to: 8345
1740
/* 8252 */    MCD_OPC_Decode, 172, 4, 85, // Opcode: BLXi
1741
/* 8256 */    MCD_OPC_FilterValue, 6, 63, 0, 0, // Skip to: 8324
1742
/* 8261 */    MCD_OPC_ExtractField, 20, 5,  // Inst{24-20} ...
1743
/* 8264 */    MCD_OPC_FilterValue, 4, 25, 0, 0, // Skip to: 8294
1744
/* 8269 */    MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 8285
1745
/* 8274 */    MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 8285
1746
/* 8281 */    MCD_OPC_Decode, 167, 5, 86, // Opcode: MCRR2
1747
/* 8285 */    MCD_OPC_CheckPredicate, 0, 55, 0, 0, // Skip to: 8345
1748
/* 8290 */    MCD_OPC_Decode, 166, 5, 87, // Opcode: MCRR
1749
/* 8294 */    MCD_OPC_FilterValue, 5, 46, 0, 0, // Skip to: 8345
1750
/* 8299 */    MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 8315
1751
/* 8304 */    MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 8315
1752
/* 8311 */    MCD_OPC_Decode, 181, 5, 86, // Opcode: MRRC2
1753
/* 8315 */    MCD_OPC_CheckPredicate, 0, 25, 0, 0, // Skip to: 8345
1754
/* 8320 */    MCD_OPC_Decode, 180, 5, 88, // Opcode: MRRC
1755
/* 8324 */    MCD_OPC_FilterValue, 7, 16, 0, 0, // Skip to: 8345
1756
/* 8329 */    MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 8345
1757
/* 8334 */    MCD_OPC_CheckField, 24, 1, 1, 4, 0, 0, // Skip to: 8345
1758
/* 8341 */    MCD_OPC_Decode, 248, 6, 89, // Opcode: SVC
1759
/* 8345 */    MCD_OPC_Fail,
1760
  0
1761
};
1762
1763
static const uint8_t DecoderTableCoProc32[] = {
1764
/* 0 */       MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
1765
/* 3 */       MCD_OPC_FilterValue, 12, 19, 1, 0, // Skip to: 283
1766
/* 8 */       MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
1767
/* 11 */      MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 49
1768
/* 16 */      MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
1769
/* 19 */      MCD_OPC_FilterValue, 1, 101, 2, 0, // Skip to: 637
1770
/* 24 */      MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 40
1771
/* 29 */      MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 40
1772
/* 36 */      MCD_OPC_Decode, 190, 6, 90, // Opcode: STC2_OPTION
1773
/* 40 */      MCD_OPC_CheckPredicate, 0, 80, 2, 0, // Skip to: 637
1774
/* 45 */      MCD_OPC_Decode, 198, 6, 90, // Opcode: STC_OPTION
1775
/* 49 */      MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 87
1776
/* 54 */      MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
1777
/* 57 */      MCD_OPC_FilterValue, 1, 63, 2, 0, // Skip to: 637
1778
/* 62 */      MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 78
1779
/* 67 */      MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 78
1780
/* 74 */      MCD_OPC_Decode, 234, 4, 90, // Opcode: LDC2_OPTION
1781
/* 78 */      MCD_OPC_CheckPredicate, 0, 42, 2, 0, // Skip to: 637
1782
/* 83 */      MCD_OPC_Decode, 242, 4, 90, // Opcode: LDC_OPTION
1783
/* 87 */      MCD_OPC_FilterValue, 2, 25, 0, 0, // Skip to: 117
1784
/* 92 */      MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 108
1785
/* 97 */      MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 108
1786
/* 104 */     MCD_OPC_Decode, 191, 6, 90, // Opcode: STC2_POST
1787
/* 108 */     MCD_OPC_CheckPredicate, 0, 12, 2, 0, // Skip to: 637
1788
/* 113 */     MCD_OPC_Decode, 199, 6, 90, // Opcode: STC_POST
1789
/* 117 */     MCD_OPC_FilterValue, 3, 25, 0, 0, // Skip to: 147
1790
/* 122 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 138
1791
/* 127 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 138
1792
/* 134 */     MCD_OPC_Decode, 235, 4, 90, // Opcode: LDC2_POST
1793
/* 138 */     MCD_OPC_CheckPredicate, 0, 238, 1, 0, // Skip to: 637
1794
/* 143 */     MCD_OPC_Decode, 243, 4, 90, // Opcode: LDC_POST
1795
/* 147 */     MCD_OPC_FilterValue, 4, 33, 0, 0, // Skip to: 185
1796
/* 152 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
1797
/* 155 */     MCD_OPC_FilterValue, 1, 221, 1, 0, // Skip to: 637
1798
/* 160 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 176
1799
/* 165 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 176
1800
/* 172 */     MCD_OPC_Decode, 186, 6, 90, // Opcode: STC2L_OPTION
1801
/* 176 */     MCD_OPC_CheckPredicate, 0, 200, 1, 0, // Skip to: 637
1802
/* 181 */     MCD_OPC_Decode, 194, 6, 90, // Opcode: STCL_OPTION
1803
/* 185 */     MCD_OPC_FilterValue, 5, 33, 0, 0, // Skip to: 223
1804
/* 190 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
1805
/* 193 */     MCD_OPC_FilterValue, 1, 183, 1, 0, // Skip to: 637
1806
/* 198 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 214
1807
/* 203 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 214
1808
/* 210 */     MCD_OPC_Decode, 230, 4, 90, // Opcode: LDC2L_OPTION
1809
/* 214 */     MCD_OPC_CheckPredicate, 0, 162, 1, 0, // Skip to: 637
1810
/* 219 */     MCD_OPC_Decode, 238, 4, 90, // Opcode: LDCL_OPTION
1811
/* 223 */     MCD_OPC_FilterValue, 6, 25, 0, 0, // Skip to: 253
1812
/* 228 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 244
1813
/* 233 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 244
1814
/* 240 */     MCD_OPC_Decode, 187, 6, 90, // Opcode: STC2L_POST
1815
/* 244 */     MCD_OPC_CheckPredicate, 0, 132, 1, 0, // Skip to: 637
1816
/* 249 */     MCD_OPC_Decode, 195, 6, 90, // Opcode: STCL_POST
1817
/* 253 */     MCD_OPC_FilterValue, 7, 123, 1, 0, // Skip to: 637
1818
/* 258 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 274
1819
/* 263 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 274
1820
/* 270 */     MCD_OPC_Decode, 231, 4, 90, // Opcode: LDC2L_POST
1821
/* 274 */     MCD_OPC_CheckPredicate, 0, 102, 1, 0, // Skip to: 637
1822
/* 279 */     MCD_OPC_Decode, 239, 4, 90, // Opcode: LDCL_POST
1823
/* 283 */     MCD_OPC_FilterValue, 13, 243, 0, 0, // Skip to: 531
1824
/* 288 */     MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
1825
/* 291 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 321
1826
/* 296 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 312
1827
/* 301 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 312
1828
/* 308 */     MCD_OPC_Decode, 189, 6, 90, // Opcode: STC2_OFFSET
1829
/* 312 */     MCD_OPC_CheckPredicate, 0, 64, 1, 0, // Skip to: 637
1830
/* 317 */     MCD_OPC_Decode, 197, 6, 90, // Opcode: STC_OFFSET
1831
/* 321 */     MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 351
1832
/* 326 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 342
1833
/* 331 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 342
1834
/* 338 */     MCD_OPC_Decode, 233, 4, 90, // Opcode: LDC2_OFFSET
1835
/* 342 */     MCD_OPC_CheckPredicate, 0, 34, 1, 0, // Skip to: 637
1836
/* 347 */     MCD_OPC_Decode, 241, 4, 90, // Opcode: LDC_OFFSET
1837
/* 351 */     MCD_OPC_FilterValue, 2, 25, 0, 0, // Skip to: 381
1838
/* 356 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 372
1839
/* 361 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 372
1840
/* 368 */     MCD_OPC_Decode, 192, 6, 90, // Opcode: STC2_PRE
1841
/* 372 */     MCD_OPC_CheckPredicate, 0, 4, 1, 0, // Skip to: 637
1842
/* 377 */     MCD_OPC_Decode, 200, 6, 90, // Opcode: STC_PRE
1843
/* 381 */     MCD_OPC_FilterValue, 3, 25, 0, 0, // Skip to: 411
1844
/* 386 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 402
1845
/* 391 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 402
1846
/* 398 */     MCD_OPC_Decode, 236, 4, 90, // Opcode: LDC2_PRE
1847
/* 402 */     MCD_OPC_CheckPredicate, 0, 230, 0, 0, // Skip to: 637
1848
/* 407 */     MCD_OPC_Decode, 244, 4, 90, // Opcode: LDC_PRE
1849
/* 411 */     MCD_OPC_FilterValue, 4, 25, 0, 0, // Skip to: 441
1850
/* 416 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 432
1851
/* 421 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 432
1852
/* 428 */     MCD_OPC_Decode, 185, 6, 90, // Opcode: STC2L_OFFSET
1853
/* 432 */     MCD_OPC_CheckPredicate, 0, 200, 0, 0, // Skip to: 637
1854
/* 437 */     MCD_OPC_Decode, 193, 6, 90, // Opcode: STCL_OFFSET
1855
/* 441 */     MCD_OPC_FilterValue, 5, 25, 0, 0, // Skip to: 471
1856
/* 446 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 462
1857
/* 451 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 462
1858
/* 458 */     MCD_OPC_Decode, 229, 4, 90, // Opcode: LDC2L_OFFSET
1859
/* 462 */     MCD_OPC_CheckPredicate, 0, 170, 0, 0, // Skip to: 637
1860
/* 467 */     MCD_OPC_Decode, 237, 4, 90, // Opcode: LDCL_OFFSET
1861
/* 471 */     MCD_OPC_FilterValue, 6, 25, 0, 0, // Skip to: 501
1862
/* 476 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 492
1863
/* 481 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 492
1864
/* 488 */     MCD_OPC_Decode, 188, 6, 90, // Opcode: STC2L_PRE
1865
/* 492 */     MCD_OPC_CheckPredicate, 0, 140, 0, 0, // Skip to: 637
1866
/* 497 */     MCD_OPC_Decode, 196, 6, 90, // Opcode: STCL_PRE
1867
/* 501 */     MCD_OPC_FilterValue, 7, 131, 0, 0, // Skip to: 637
1868
/* 506 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 522
1869
/* 511 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 522
1870
/* 518 */     MCD_OPC_Decode, 232, 4, 90, // Opcode: LDC2L_PRE
1871
/* 522 */     MCD_OPC_CheckPredicate, 0, 110, 0, 0, // Skip to: 637
1872
/* 527 */     MCD_OPC_Decode, 240, 4, 90, // Opcode: LDCL_PRE
1873
/* 531 */     MCD_OPC_FilterValue, 14, 101, 0, 0, // Skip to: 637
1874
/* 536 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
1875
/* 539 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 569
1876
/* 544 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 560
1877
/* 549 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 560
1878
/* 556 */     MCD_OPC_Decode, 180, 4, 91, // Opcode: CDP2
1879
/* 560 */     MCD_OPC_CheckPredicate, 4, 72, 0, 0, // Skip to: 637
1880
/* 565 */     MCD_OPC_Decode, 179, 4, 92, // Opcode: CDP
1881
/* 569 */     MCD_OPC_FilterValue, 1, 63, 0, 0, // Skip to: 637
1882
/* 574 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
1883
/* 577 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 607
1884
/* 582 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 598
1885
/* 587 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 598
1886
/* 594 */     MCD_OPC_Decode, 165, 5, 93, // Opcode: MCR2
1887
/* 598 */     MCD_OPC_CheckPredicate, 0, 34, 0, 0, // Skip to: 637
1888
/* 603 */     MCD_OPC_Decode, 164, 5, 94, // Opcode: MCR
1889
/* 607 */     MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 637
1890
/* 612 */     MCD_OPC_CheckPredicate, 4, 11, 0, 0, // Skip to: 628
1891
/* 617 */     MCD_OPC_CheckField, 28, 4, 15, 4, 0, 0, // Skip to: 628
1892
/* 624 */     MCD_OPC_Decode, 179, 5, 95, // Opcode: MRC2
1893
/* 628 */     MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 637
1894
/* 633 */     MCD_OPC_Decode, 178, 5, 96, // Opcode: MRC
1895
/* 637 */     MCD_OPC_Fail,
1896
  0
1897
};
1898
1899
static const uint8_t DecoderTableNEONData32[] = {
1900
/* 0 */       MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
1901
/* 3 */       MCD_OPC_FilterValue, 0, 221, 39, 0, // Skip to: 10213
1902
/* 8 */       MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
1903
/* 11 */      MCD_OPC_FilterValue, 0, 73, 6, 0, // Skip to: 1625
1904
/* 16 */      MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
1905
/* 19 */      MCD_OPC_FilterValue, 0, 121, 0, 0, // Skip to: 145
1906
/* 24 */      MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
1907
/* 27 */      MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 64
1908
/* 33 */      MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1909
/* 36 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 50
1910
/* 41 */      MCD_OPC_CheckPredicate, 21, 75, 72, 0, // Skip to: 18553
1911
/* 46 */      MCD_OPC_Decode, 179, 10, 97, // Opcode: VHADDsv8i8
1912
/* 50 */      MCD_OPC_FilterValue, 1, 66, 72, 0, // Skip to: 18553
1913
/* 55 */      MCD_OPC_CheckPredicate, 21, 61, 72, 0, // Skip to: 18553
1914
/* 60 */      MCD_OPC_Decode, 174, 10, 98, // Opcode: VHADDsv16i8
1915
/* 64 */      MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 86
1916
/* 70 */      MCD_OPC_CheckPredicate, 21, 46, 72, 0, // Skip to: 18553
1917
/* 75 */      MCD_OPC_CheckField, 6, 1, 0, 39, 72, 0, // Skip to: 18553
1918
/* 82 */      MCD_OPC_Decode, 242, 7, 99, // Opcode: VADDLsv8i16
1919
/* 86 */      MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 123
1920
/* 92 */      MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1921
/* 95 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 109
1922
/* 100 */     MCD_OPC_CheckPredicate, 21, 16, 72, 0, // Skip to: 18553
1923
/* 105 */     MCD_OPC_Decode, 185, 10, 97, // Opcode: VHADDuv8i8
1924
/* 109 */     MCD_OPC_FilterValue, 1, 7, 72, 0, // Skip to: 18553
1925
/* 114 */     MCD_OPC_CheckPredicate, 21, 2, 72, 0, // Skip to: 18553
1926
/* 119 */     MCD_OPC_Decode, 180, 10, 98, // Opcode: VHADDuv16i8
1927
/* 123 */     MCD_OPC_FilterValue, 231, 3, 248, 71, 0, // Skip to: 18553
1928
/* 129 */     MCD_OPC_CheckPredicate, 21, 243, 71, 0, // Skip to: 18553
1929
/* 134 */     MCD_OPC_CheckField, 6, 1, 0, 236, 71, 0, // Skip to: 18553
1930
/* 141 */     MCD_OPC_Decode, 245, 7, 99, // Opcode: VADDLuv8i16
1931
/* 145 */     MCD_OPC_FilterValue, 1, 121, 0, 0, // Skip to: 271
1932
/* 150 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
1933
/* 153 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 190
1934
/* 159 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1935
/* 162 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 176
1936
/* 167 */     MCD_OPC_CheckPredicate, 21, 205, 71, 0, // Skip to: 18553
1937
/* 172 */     MCD_OPC_Decode, 240, 16, 97, // Opcode: VRHADDsv8i8
1938
/* 176 */     MCD_OPC_FilterValue, 1, 196, 71, 0, // Skip to: 18553
1939
/* 181 */     MCD_OPC_CheckPredicate, 21, 191, 71, 0, // Skip to: 18553
1940
/* 186 */     MCD_OPC_Decode, 235, 16, 98, // Opcode: VRHADDsv16i8
1941
/* 190 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 212
1942
/* 196 */     MCD_OPC_CheckPredicate, 21, 176, 71, 0, // Skip to: 18553
1943
/* 201 */     MCD_OPC_CheckField, 6, 1, 0, 169, 71, 0, // Skip to: 18553
1944
/* 208 */     MCD_OPC_Decode, 249, 7, 100, // Opcode: VADDWsv8i16
1945
/* 212 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 249
1946
/* 218 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1947
/* 221 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 235
1948
/* 226 */     MCD_OPC_CheckPredicate, 21, 146, 71, 0, // Skip to: 18553
1949
/* 231 */     MCD_OPC_Decode, 246, 16, 97, // Opcode: VRHADDuv8i8
1950
/* 235 */     MCD_OPC_FilterValue, 1, 137, 71, 0, // Skip to: 18553
1951
/* 240 */     MCD_OPC_CheckPredicate, 21, 132, 71, 0, // Skip to: 18553
1952
/* 245 */     MCD_OPC_Decode, 241, 16, 98, // Opcode: VRHADDuv16i8
1953
/* 249 */     MCD_OPC_FilterValue, 231, 3, 122, 71, 0, // Skip to: 18553
1954
/* 255 */     MCD_OPC_CheckPredicate, 21, 117, 71, 0, // Skip to: 18553
1955
/* 260 */     MCD_OPC_CheckField, 6, 1, 0, 110, 71, 0, // Skip to: 18553
1956
/* 267 */     MCD_OPC_Decode, 252, 7, 100, // Opcode: VADDWuv8i16
1957
/* 271 */     MCD_OPC_FilterValue, 2, 121, 0, 0, // Skip to: 397
1958
/* 276 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
1959
/* 279 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 316
1960
/* 285 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1961
/* 288 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 302
1962
/* 293 */     MCD_OPC_CheckPredicate, 21, 79, 71, 0, // Skip to: 18553
1963
/* 298 */     MCD_OPC_Decode, 191, 10, 97, // Opcode: VHSUBsv8i8
1964
/* 302 */     MCD_OPC_FilterValue, 1, 70, 71, 0, // Skip to: 18553
1965
/* 307 */     MCD_OPC_CheckPredicate, 21, 65, 71, 0, // Skip to: 18553
1966
/* 312 */     MCD_OPC_Decode, 186, 10, 98, // Opcode: VHSUBsv16i8
1967
/* 316 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 338
1968
/* 322 */     MCD_OPC_CheckPredicate, 21, 50, 71, 0, // Skip to: 18553
1969
/* 327 */     MCD_OPC_CheckField, 6, 1, 0, 43, 71, 0, // Skip to: 18553
1970
/* 334 */     MCD_OPC_Decode, 214, 20, 99, // Opcode: VSUBLsv8i16
1971
/* 338 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 375
1972
/* 344 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1973
/* 347 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 361
1974
/* 352 */     MCD_OPC_CheckPredicate, 21, 20, 71, 0, // Skip to: 18553
1975
/* 357 */     MCD_OPC_Decode, 197, 10, 97, // Opcode: VHSUBuv8i8
1976
/* 361 */     MCD_OPC_FilterValue, 1, 11, 71, 0, // Skip to: 18553
1977
/* 366 */     MCD_OPC_CheckPredicate, 21, 6, 71, 0, // Skip to: 18553
1978
/* 371 */     MCD_OPC_Decode, 192, 10, 98, // Opcode: VHSUBuv16i8
1979
/* 375 */     MCD_OPC_FilterValue, 231, 3, 252, 70, 0, // Skip to: 18553
1980
/* 381 */     MCD_OPC_CheckPredicate, 21, 247, 70, 0, // Skip to: 18553
1981
/* 386 */     MCD_OPC_CheckField, 6, 1, 0, 240, 70, 0, // Skip to: 18553
1982
/* 393 */     MCD_OPC_Decode, 217, 20, 99, // Opcode: VSUBLuv8i16
1983
/* 397 */     MCD_OPC_FilterValue, 3, 121, 0, 0, // Skip to: 523
1984
/* 402 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
1985
/* 405 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 442
1986
/* 411 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1987
/* 414 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 428
1988
/* 419 */     MCD_OPC_CheckPredicate, 21, 209, 70, 0, // Skip to: 18553
1989
/* 424 */     MCD_OPC_Decode, 210, 8, 97, // Opcode: VCGTsv8i8
1990
/* 428 */     MCD_OPC_FilterValue, 1, 200, 70, 0, // Skip to: 18553
1991
/* 433 */     MCD_OPC_CheckPredicate, 21, 195, 70, 0, // Skip to: 18553
1992
/* 438 */     MCD_OPC_Decode, 205, 8, 98, // Opcode: VCGTsv16i8
1993
/* 442 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 464
1994
/* 448 */     MCD_OPC_CheckPredicate, 21, 180, 70, 0, // Skip to: 18553
1995
/* 453 */     MCD_OPC_CheckField, 6, 1, 0, 173, 70, 0, // Skip to: 18553
1996
/* 460 */     MCD_OPC_Decode, 221, 20, 100, // Opcode: VSUBWsv8i16
1997
/* 464 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 501
1998
/* 470 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
1999
/* 473 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 487
2000
/* 478 */     MCD_OPC_CheckPredicate, 21, 150, 70, 0, // Skip to: 18553
2001
/* 483 */     MCD_OPC_Decode, 216, 8, 97, // Opcode: VCGTuv8i8
2002
/* 487 */     MCD_OPC_FilterValue, 1, 141, 70, 0, // Skip to: 18553
2003
/* 492 */     MCD_OPC_CheckPredicate, 21, 136, 70, 0, // Skip to: 18553
2004
/* 497 */     MCD_OPC_Decode, 211, 8, 98, // Opcode: VCGTuv16i8
2005
/* 501 */     MCD_OPC_FilterValue, 231, 3, 126, 70, 0, // Skip to: 18553
2006
/* 507 */     MCD_OPC_CheckPredicate, 21, 121, 70, 0, // Skip to: 18553
2007
/* 512 */     MCD_OPC_CheckField, 6, 1, 0, 114, 70, 0, // Skip to: 18553
2008
/* 519 */     MCD_OPC_Decode, 224, 20, 100, // Opcode: VSUBWuv8i16
2009
/* 523 */     MCD_OPC_FilterValue, 4, 121, 0, 0, // Skip to: 649
2010
/* 528 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2011
/* 531 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 568
2012
/* 537 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2013
/* 540 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 554
2014
/* 545 */     MCD_OPC_CheckPredicate, 21, 83, 70, 0, // Skip to: 18553
2015
/* 550 */     MCD_OPC_Decode, 143, 18, 101, // Opcode: VSHLsv8i8
2016
/* 554 */     MCD_OPC_FilterValue, 1, 74, 70, 0, // Skip to: 18553
2017
/* 559 */     MCD_OPC_CheckPredicate, 21, 69, 70, 0, // Skip to: 18553
2018
/* 564 */     MCD_OPC_Decode, 136, 18, 102, // Opcode: VSHLsv16i8
2019
/* 568 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 590
2020
/* 574 */     MCD_OPC_CheckPredicate, 21, 54, 70, 0, // Skip to: 18553
2021
/* 579 */     MCD_OPC_CheckField, 6, 1, 0, 47, 70, 0, // Skip to: 18553
2022
/* 586 */     MCD_OPC_Decode, 239, 7, 103, // Opcode: VADDHNv8i8
2023
/* 590 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 627
2024
/* 596 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2025
/* 599 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 613
2026
/* 604 */     MCD_OPC_CheckPredicate, 21, 24, 70, 0, // Skip to: 18553
2027
/* 609 */     MCD_OPC_Decode, 151, 18, 101, // Opcode: VSHLuv8i8
2028
/* 613 */     MCD_OPC_FilterValue, 1, 15, 70, 0, // Skip to: 18553
2029
/* 618 */     MCD_OPC_CheckPredicate, 21, 10, 70, 0, // Skip to: 18553
2030
/* 623 */     MCD_OPC_Decode, 144, 18, 102, // Opcode: VSHLuv16i8
2031
/* 627 */     MCD_OPC_FilterValue, 231, 3, 0, 70, 0, // Skip to: 18553
2032
/* 633 */     MCD_OPC_CheckPredicate, 21, 251, 69, 0, // Skip to: 18553
2033
/* 638 */     MCD_OPC_CheckField, 6, 1, 0, 244, 69, 0, // Skip to: 18553
2034
/* 645 */     MCD_OPC_Decode, 212, 16, 103, // Opcode: VRADDHNv8i8
2035
/* 649 */     MCD_OPC_FilterValue, 5, 121, 0, 0, // Skip to: 775
2036
/* 654 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2037
/* 657 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 694
2038
/* 663 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2039
/* 666 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 680
2040
/* 671 */     MCD_OPC_CheckPredicate, 21, 213, 69, 0, // Skip to: 18553
2041
/* 676 */     MCD_OPC_Decode, 171, 17, 101, // Opcode: VRSHLsv8i8
2042
/* 680 */     MCD_OPC_FilterValue, 1, 204, 69, 0, // Skip to: 18553
2043
/* 685 */     MCD_OPC_CheckPredicate, 21, 199, 69, 0, // Skip to: 18553
2044
/* 690 */     MCD_OPC_Decode, 164, 17, 102, // Opcode: VRSHLsv16i8
2045
/* 694 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 716
2046
/* 700 */     MCD_OPC_CheckPredicate, 21, 184, 69, 0, // Skip to: 18553
2047
/* 705 */     MCD_OPC_CheckField, 6, 1, 0, 177, 69, 0, // Skip to: 18553
2048
/* 712 */     MCD_OPC_Decode, 176, 7, 104, // Opcode: VABALsv8i16
2049
/* 716 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 753
2050
/* 722 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2051
/* 725 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 739
2052
/* 730 */     MCD_OPC_CheckPredicate, 21, 154, 69, 0, // Skip to: 18553
2053
/* 735 */     MCD_OPC_Decode, 179, 17, 101, // Opcode: VRSHLuv8i8
2054
/* 739 */     MCD_OPC_FilterValue, 1, 145, 69, 0, // Skip to: 18553
2055
/* 744 */     MCD_OPC_CheckPredicate, 21, 140, 69, 0, // Skip to: 18553
2056
/* 749 */     MCD_OPC_Decode, 172, 17, 102, // Opcode: VRSHLuv16i8
2057
/* 753 */     MCD_OPC_FilterValue, 231, 3, 130, 69, 0, // Skip to: 18553
2058
/* 759 */     MCD_OPC_CheckPredicate, 21, 125, 69, 0, // Skip to: 18553
2059
/* 764 */     MCD_OPC_CheckField, 6, 1, 0, 118, 69, 0, // Skip to: 18553
2060
/* 771 */     MCD_OPC_Decode, 179, 7, 104, // Opcode: VABALuv8i16
2061
/* 775 */     MCD_OPC_FilterValue, 6, 121, 0, 0, // Skip to: 901
2062
/* 780 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2063
/* 783 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 820
2064
/* 789 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2065
/* 792 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 806
2066
/* 797 */     MCD_OPC_CheckPredicate, 21, 87, 69, 0, // Skip to: 18553
2067
/* 802 */     MCD_OPC_Decode, 172, 13, 97, // Opcode: VMAXsv8i8
2068
/* 806 */     MCD_OPC_FilterValue, 1, 78, 69, 0, // Skip to: 18553
2069
/* 811 */     MCD_OPC_CheckPredicate, 21, 73, 69, 0, // Skip to: 18553
2070
/* 816 */     MCD_OPC_Decode, 167, 13, 98, // Opcode: VMAXsv16i8
2071
/* 820 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 842
2072
/* 826 */     MCD_OPC_CheckPredicate, 21, 58, 69, 0, // Skip to: 18553
2073
/* 831 */     MCD_OPC_CheckField, 6, 1, 0, 51, 69, 0, // Skip to: 18553
2074
/* 838 */     MCD_OPC_Decode, 211, 20, 103, // Opcode: VSUBHNv8i8
2075
/* 842 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 879
2076
/* 848 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2077
/* 851 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 865
2078
/* 856 */     MCD_OPC_CheckPredicate, 21, 28, 69, 0, // Skip to: 18553
2079
/* 861 */     MCD_OPC_Decode, 178, 13, 97, // Opcode: VMAXuv8i8
2080
/* 865 */     MCD_OPC_FilterValue, 1, 19, 69, 0, // Skip to: 18553
2081
/* 870 */     MCD_OPC_CheckPredicate, 21, 14, 69, 0, // Skip to: 18553
2082
/* 875 */     MCD_OPC_Decode, 173, 13, 98, // Opcode: VMAXuv16i8
2083
/* 879 */     MCD_OPC_FilterValue, 231, 3, 4, 69, 0, // Skip to: 18553
2084
/* 885 */     MCD_OPC_CheckPredicate, 21, 255, 68, 0, // Skip to: 18553
2085
/* 890 */     MCD_OPC_CheckField, 6, 1, 0, 248, 68, 0, // Skip to: 18553
2086
/* 897 */     MCD_OPC_Decode, 227, 17, 103, // Opcode: VRSUBHNv8i8
2087
/* 901 */     MCD_OPC_FilterValue, 7, 121, 0, 0, // Skip to: 1027
2088
/* 906 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2089
/* 909 */     MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 946
2090
/* 915 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2091
/* 918 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 932
2092
/* 923 */     MCD_OPC_CheckPredicate, 21, 217, 68, 0, // Skip to: 18553
2093
/* 928 */     MCD_OPC_Decode, 207, 7, 97, // Opcode: VABDsv8i8
2094
/* 932 */     MCD_OPC_FilterValue, 1, 208, 68, 0, // Skip to: 18553
2095
/* 937 */     MCD_OPC_CheckPredicate, 21, 203, 68, 0, // Skip to: 18553
2096
/* 942 */     MCD_OPC_Decode, 202, 7, 98, // Opcode: VABDsv16i8
2097
/* 946 */     MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 968
2098
/* 952 */     MCD_OPC_CheckPredicate, 21, 188, 68, 0, // Skip to: 18553
2099
/* 957 */     MCD_OPC_CheckField, 6, 1, 0, 181, 68, 0, // Skip to: 18553
2100
/* 964 */     MCD_OPC_Decode, 194, 7, 99, // Opcode: VABDLsv8i16
2101
/* 968 */     MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 1005
2102
/* 974 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2103
/* 977 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 991
2104
/* 982 */     MCD_OPC_CheckPredicate, 21, 158, 68, 0, // Skip to: 18553
2105
/* 987 */     MCD_OPC_Decode, 213, 7, 97, // Opcode: VABDuv8i8
2106
/* 991 */     MCD_OPC_FilterValue, 1, 149, 68, 0, // Skip to: 18553
2107
/* 996 */     MCD_OPC_CheckPredicate, 21, 144, 68, 0, // Skip to: 18553
2108
/* 1001 */    MCD_OPC_Decode, 208, 7, 98, // Opcode: VABDuv16i8
2109
/* 1005 */    MCD_OPC_FilterValue, 231, 3, 134, 68, 0, // Skip to: 18553
2110
/* 1011 */    MCD_OPC_CheckPredicate, 21, 129, 68, 0, // Skip to: 18553
2111
/* 1016 */    MCD_OPC_CheckField, 6, 1, 0, 122, 68, 0, // Skip to: 18553
2112
/* 1023 */    MCD_OPC_Decode, 197, 7, 99, // Opcode: VABDLuv8i16
2113
/* 1027 */    MCD_OPC_FilterValue, 8, 121, 0, 0, // Skip to: 1153
2114
/* 1032 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2115
/* 1035 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 1072
2116
/* 1041 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2117
/* 1044 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1058
2118
/* 1049 */    MCD_OPC_CheckPredicate, 21, 91, 68, 0, // Skip to: 18553
2119
/* 1054 */    MCD_OPC_Decode, 136, 8, 97, // Opcode: VADDv8i8
2120
/* 1058 */    MCD_OPC_FilterValue, 1, 82, 68, 0, // Skip to: 18553
2121
/* 1063 */    MCD_OPC_CheckPredicate, 21, 77, 68, 0, // Skip to: 18553
2122
/* 1068 */    MCD_OPC_Decode, 129, 8, 98, // Opcode: VADDv16i8
2123
/* 1072 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 1094
2124
/* 1078 */    MCD_OPC_CheckPredicate, 21, 62, 68, 0, // Skip to: 18553
2125
/* 1083 */    MCD_OPC_CheckField, 6, 1, 0, 55, 68, 0, // Skip to: 18553
2126
/* 1090 */    MCD_OPC_Decode, 210, 13, 104, // Opcode: VMLALsv8i16
2127
/* 1094 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 1131
2128
/* 1100 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2129
/* 1103 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1117
2130
/* 1108 */    MCD_OPC_CheckPredicate, 21, 32, 68, 0, // Skip to: 18553
2131
/* 1113 */    MCD_OPC_Decode, 236, 20, 97, // Opcode: VSUBv8i8
2132
/* 1117 */    MCD_OPC_FilterValue, 1, 23, 68, 0, // Skip to: 18553
2133
/* 1122 */    MCD_OPC_CheckPredicate, 21, 18, 68, 0, // Skip to: 18553
2134
/* 1127 */    MCD_OPC_Decode, 229, 20, 98, // Opcode: VSUBv16i8
2135
/* 1131 */    MCD_OPC_FilterValue, 231, 3, 8, 68, 0, // Skip to: 18553
2136
/* 1137 */    MCD_OPC_CheckPredicate, 21, 3, 68, 0, // Skip to: 18553
2137
/* 1142 */    MCD_OPC_CheckField, 6, 1, 0, 252, 67, 0, // Skip to: 18553
2138
/* 1149 */    MCD_OPC_Decode, 213, 13, 104, // Opcode: VMLALuv8i16
2139
/* 1153 */    MCD_OPC_FilterValue, 9, 79, 0, 0, // Skip to: 1237
2140
/* 1158 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2141
/* 1161 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1199
2142
/* 1166 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2143
/* 1169 */    MCD_OPC_FilterValue, 228, 3, 9, 0, 0, // Skip to: 1184
2144
/* 1175 */    MCD_OPC_CheckPredicate, 21, 221, 67, 0, // Skip to: 18553
2145
/* 1180 */    MCD_OPC_Decode, 232, 13, 105, // Opcode: VMLAv8i8
2146
/* 1184 */    MCD_OPC_FilterValue, 230, 3, 211, 67, 0, // Skip to: 18553
2147
/* 1190 */    MCD_OPC_CheckPredicate, 21, 206, 67, 0, // Skip to: 18553
2148
/* 1195 */    MCD_OPC_Decode, 135, 14, 105, // Opcode: VMLSv8i8
2149
/* 1199 */    MCD_OPC_FilterValue, 1, 197, 67, 0, // Skip to: 18553
2150
/* 1204 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2151
/* 1207 */    MCD_OPC_FilterValue, 228, 3, 9, 0, 0, // Skip to: 1222
2152
/* 1213 */    MCD_OPC_CheckPredicate, 21, 183, 67, 0, // Skip to: 18553
2153
/* 1218 */    MCD_OPC_Decode, 227, 13, 106, // Opcode: VMLAv16i8
2154
/* 1222 */    MCD_OPC_FilterValue, 230, 3, 173, 67, 0, // Skip to: 18553
2155
/* 1228 */    MCD_OPC_CheckPredicate, 21, 168, 67, 0, // Skip to: 18553
2156
/* 1233 */    MCD_OPC_Decode, 130, 14, 106, // Opcode: VMLSv16i8
2157
/* 1237 */    MCD_OPC_FilterValue, 10, 91, 0, 0, // Skip to: 1333
2158
/* 1242 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2159
/* 1245 */    MCD_OPC_FilterValue, 228, 3, 16, 0, 0, // Skip to: 1267
2160
/* 1251 */    MCD_OPC_CheckPredicate, 21, 145, 67, 0, // Skip to: 18553
2161
/* 1256 */    MCD_OPC_CheckField, 6, 1, 0, 138, 67, 0, // Skip to: 18553
2162
/* 1263 */    MCD_OPC_Decode, 155, 15, 97, // Opcode: VPMAXs8
2163
/* 1267 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 1289
2164
/* 1273 */    MCD_OPC_CheckPredicate, 21, 123, 67, 0, // Skip to: 18553
2165
/* 1278 */    MCD_OPC_CheckField, 6, 1, 0, 116, 67, 0, // Skip to: 18553
2166
/* 1285 */    MCD_OPC_Decode, 241, 13, 104, // Opcode: VMLSLsv8i16
2167
/* 1289 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 1311
2168
/* 1295 */    MCD_OPC_CheckPredicate, 21, 101, 67, 0, // Skip to: 18553
2169
/* 1300 */    MCD_OPC_CheckField, 6, 1, 0, 94, 67, 0, // Skip to: 18553
2170
/* 1307 */    MCD_OPC_Decode, 158, 15, 97, // Opcode: VPMAXu8
2171
/* 1311 */    MCD_OPC_FilterValue, 231, 3, 84, 67, 0, // Skip to: 18553
2172
/* 1317 */    MCD_OPC_CheckPredicate, 21, 79, 67, 0, // Skip to: 18553
2173
/* 1322 */    MCD_OPC_CheckField, 6, 1, 0, 72, 67, 0, // Skip to: 18553
2174
/* 1329 */    MCD_OPC_Decode, 244, 13, 104, // Opcode: VMLSLuv8i16
2175
/* 1333 */    MCD_OPC_FilterValue, 12, 47, 0, 0, // Skip to: 1385
2176
/* 1338 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2177
/* 1341 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 1363
2178
/* 1347 */    MCD_OPC_CheckPredicate, 21, 49, 67, 0, // Skip to: 18553
2179
/* 1352 */    MCD_OPC_CheckField, 6, 1, 0, 42, 67, 0, // Skip to: 18553
2180
/* 1359 */    MCD_OPC_Decode, 189, 14, 99, // Opcode: VMULLsv8i16
2181
/* 1363 */    MCD_OPC_FilterValue, 231, 3, 32, 67, 0, // Skip to: 18553
2182
/* 1369 */    MCD_OPC_CheckPredicate, 21, 27, 67, 0, // Skip to: 18553
2183
/* 1374 */    MCD_OPC_CheckField, 6, 1, 0, 20, 67, 0, // Skip to: 18553
2184
/* 1381 */    MCD_OPC_Decode, 192, 14, 99, // Opcode: VMULLuv8i16
2185
/* 1385 */    MCD_OPC_FilterValue, 13, 63, 0, 0, // Skip to: 1453
2186
/* 1390 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2187
/* 1393 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1431
2188
/* 1398 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2189
/* 1401 */    MCD_OPC_FilterValue, 228, 3, 9, 0, 0, // Skip to: 1416
2190
/* 1407 */    MCD_OPC_CheckPredicate, 21, 245, 66, 0, // Skip to: 18553
2191
/* 1412 */    MCD_OPC_Decode, 253, 7, 97, // Opcode: VADDfd
2192
/* 1416 */    MCD_OPC_FilterValue, 230, 3, 235, 66, 0, // Skip to: 18553
2193
/* 1422 */    MCD_OPC_CheckPredicate, 21, 230, 66, 0, // Skip to: 18553
2194
/* 1427 */    MCD_OPC_Decode, 146, 15, 97, // Opcode: VPADDf
2195
/* 1431 */    MCD_OPC_FilterValue, 1, 221, 66, 0, // Skip to: 18553
2196
/* 1436 */    MCD_OPC_CheckPredicate, 21, 216, 66, 0, // Skip to: 18553
2197
/* 1441 */    MCD_OPC_CheckField, 23, 9, 228, 3, 208, 66, 0, // Skip to: 18553
2198
/* 1449 */    MCD_OPC_Decode, 254, 7, 98, // Opcode: VADDfq
2199
/* 1453 */    MCD_OPC_FilterValue, 14, 99, 0, 0, // Skip to: 1557
2200
/* 1458 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2201
/* 1461 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 1498
2202
/* 1467 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2203
/* 1470 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1484
2204
/* 1475 */    MCD_OPC_CheckPredicate, 21, 177, 66, 0, // Skip to: 18553
2205
/* 1480 */    MCD_OPC_Decode, 155, 8, 97, // Opcode: VCEQfd
2206
/* 1484 */    MCD_OPC_FilterValue, 1, 168, 66, 0, // Skip to: 18553
2207
/* 1489 */    MCD_OPC_CheckPredicate, 21, 163, 66, 0, // Skip to: 18553
2208
/* 1494 */    MCD_OPC_Decode, 156, 8, 98, // Opcode: VCEQfq
2209
/* 1498 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 1520
2210
/* 1504 */    MCD_OPC_CheckPredicate, 21, 148, 66, 0, // Skip to: 18553
2211
/* 1509 */    MCD_OPC_CheckField, 6, 1, 0, 141, 66, 0, // Skip to: 18553
2212
/* 1516 */    MCD_OPC_Decode, 182, 14, 99, // Opcode: VMULLp8
2213
/* 1520 */    MCD_OPC_FilterValue, 230, 3, 131, 66, 0, // Skip to: 18553
2214
/* 1526 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2215
/* 1529 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1543
2216
/* 1534 */    MCD_OPC_CheckPredicate, 21, 118, 66, 0, // Skip to: 18553
2217
/* 1539 */    MCD_OPC_Decode, 175, 8, 97, // Opcode: VCGEfd
2218
/* 1543 */    MCD_OPC_FilterValue, 1, 109, 66, 0, // Skip to: 18553
2219
/* 1548 */    MCD_OPC_CheckPredicate, 21, 104, 66, 0, // Skip to: 18553
2220
/* 1553 */    MCD_OPC_Decode, 176, 8, 98, // Opcode: VCGEfq
2221
/* 1557 */    MCD_OPC_FilterValue, 15, 95, 66, 0, // Skip to: 18553
2222
/* 1562 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2223
/* 1565 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1603
2224
/* 1570 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2225
/* 1573 */    MCD_OPC_FilterValue, 228, 3, 9, 0, 0, // Skip to: 1588
2226
/* 1579 */    MCD_OPC_CheckPredicate, 21, 73, 66, 0, // Skip to: 18553
2227
/* 1584 */    MCD_OPC_Decode, 163, 13, 97, // Opcode: VMAXfd
2228
/* 1588 */    MCD_OPC_FilterValue, 230, 3, 63, 66, 0, // Skip to: 18553
2229
/* 1594 */    MCD_OPC_CheckPredicate, 21, 58, 66, 0, // Skip to: 18553
2230
/* 1599 */    MCD_OPC_Decode, 151, 15, 97, // Opcode: VPMAXf
2231
/* 1603 */    MCD_OPC_FilterValue, 1, 49, 66, 0, // Skip to: 18553
2232
/* 1608 */    MCD_OPC_CheckPredicate, 21, 44, 66, 0, // Skip to: 18553
2233
/* 1613 */    MCD_OPC_CheckField, 23, 9, 228, 3, 36, 66, 0, // Skip to: 18553
2234
/* 1621 */    MCD_OPC_Decode, 164, 13, 98, // Opcode: VMAXfq
2235
/* 1625 */    MCD_OPC_FilterValue, 1, 162, 8, 0, // Skip to: 3840
2236
/* 1630 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
2237
/* 1633 */    MCD_OPC_FilterValue, 0, 151, 0, 0, // Skip to: 1789
2238
/* 1638 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2239
/* 1641 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 1678
2240
/* 1647 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2241
/* 1650 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1664
2242
/* 1655 */    MCD_OPC_CheckPredicate, 21, 253, 65, 0, // Skip to: 18553
2243
/* 1660 */    MCD_OPC_Decode, 176, 10, 97, // Opcode: VHADDsv4i16
2244
/* 1664 */    MCD_OPC_FilterValue, 1, 244, 65, 0, // Skip to: 18553
2245
/* 1669 */    MCD_OPC_CheckPredicate, 21, 239, 65, 0, // Skip to: 18553
2246
/* 1674 */    MCD_OPC_Decode, 178, 10, 98, // Opcode: VHADDsv8i16
2247
/* 1678 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 1715
2248
/* 1684 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2249
/* 1687 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1701
2250
/* 1692 */    MCD_OPC_CheckPredicate, 21, 216, 65, 0, // Skip to: 18553
2251
/* 1697 */    MCD_OPC_Decode, 241, 7, 99, // Opcode: VADDLsv4i32
2252
/* 1701 */    MCD_OPC_FilterValue, 1, 207, 65, 0, // Skip to: 18553
2253
/* 1706 */    MCD_OPC_CheckPredicate, 21, 202, 65, 0, // Skip to: 18553
2254
/* 1711 */    MCD_OPC_Decode, 224, 13, 107, // Opcode: VMLAslv4i16
2255
/* 1715 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 1752
2256
/* 1721 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2257
/* 1724 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1738
2258
/* 1729 */    MCD_OPC_CheckPredicate, 21, 179, 65, 0, // Skip to: 18553
2259
/* 1734 */    MCD_OPC_Decode, 182, 10, 97, // Opcode: VHADDuv4i16
2260
/* 1738 */    MCD_OPC_FilterValue, 1, 170, 65, 0, // Skip to: 18553
2261
/* 1743 */    MCD_OPC_CheckPredicate, 21, 165, 65, 0, // Skip to: 18553
2262
/* 1748 */    MCD_OPC_Decode, 184, 10, 98, // Opcode: VHADDuv8i16
2263
/* 1752 */    MCD_OPC_FilterValue, 231, 3, 155, 65, 0, // Skip to: 18553
2264
/* 1758 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2265
/* 1761 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1775
2266
/* 1766 */    MCD_OPC_CheckPredicate, 21, 142, 65, 0, // Skip to: 18553
2267
/* 1771 */    MCD_OPC_Decode, 244, 7, 99, // Opcode: VADDLuv4i32
2268
/* 1775 */    MCD_OPC_FilterValue, 1, 133, 65, 0, // Skip to: 18553
2269
/* 1780 */    MCD_OPC_CheckPredicate, 21, 128, 65, 0, // Skip to: 18553
2270
/* 1785 */    MCD_OPC_Decode, 226, 13, 108, // Opcode: VMLAslv8i16
2271
/* 1789 */    MCD_OPC_FilterValue, 1, 151, 0, 0, // Skip to: 1945
2272
/* 1794 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2273
/* 1797 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 1834
2274
/* 1803 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2275
/* 1806 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1820
2276
/* 1811 */    MCD_OPC_CheckPredicate, 21, 97, 65, 0, // Skip to: 18553
2277
/* 1816 */    MCD_OPC_Decode, 237, 16, 97, // Opcode: VRHADDsv4i16
2278
/* 1820 */    MCD_OPC_FilterValue, 1, 88, 65, 0, // Skip to: 18553
2279
/* 1825 */    MCD_OPC_CheckPredicate, 21, 83, 65, 0, // Skip to: 18553
2280
/* 1830 */    MCD_OPC_Decode, 239, 16, 98, // Opcode: VRHADDsv8i16
2281
/* 1834 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 1871
2282
/* 1840 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2283
/* 1843 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1857
2284
/* 1848 */    MCD_OPC_CheckPredicate, 21, 60, 65, 0, // Skip to: 18553
2285
/* 1853 */    MCD_OPC_Decode, 248, 7, 100, // Opcode: VADDWsv4i32
2286
/* 1857 */    MCD_OPC_FilterValue, 1, 51, 65, 0, // Skip to: 18553
2287
/* 1862 */    MCD_OPC_CheckPredicate, 22, 46, 65, 0, // Skip to: 18553
2288
/* 1867 */    MCD_OPC_Decode, 221, 13, 107, // Opcode: VMLAslhd
2289
/* 1871 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 1908
2290
/* 1877 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2291
/* 1880 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1894
2292
/* 1885 */    MCD_OPC_CheckPredicate, 21, 23, 65, 0, // Skip to: 18553
2293
/* 1890 */    MCD_OPC_Decode, 243, 16, 97, // Opcode: VRHADDuv4i16
2294
/* 1894 */    MCD_OPC_FilterValue, 1, 14, 65, 0, // Skip to: 18553
2295
/* 1899 */    MCD_OPC_CheckPredicate, 21, 9, 65, 0, // Skip to: 18553
2296
/* 1904 */    MCD_OPC_Decode, 245, 16, 98, // Opcode: VRHADDuv8i16
2297
/* 1908 */    MCD_OPC_FilterValue, 231, 3, 255, 64, 0, // Skip to: 18553
2298
/* 1914 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2299
/* 1917 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1931
2300
/* 1922 */    MCD_OPC_CheckPredicate, 21, 242, 64, 0, // Skip to: 18553
2301
/* 1927 */    MCD_OPC_Decode, 251, 7, 100, // Opcode: VADDWuv4i32
2302
/* 1931 */    MCD_OPC_FilterValue, 1, 233, 64, 0, // Skip to: 18553
2303
/* 1936 */    MCD_OPC_CheckPredicate, 22, 228, 64, 0, // Skip to: 18553
2304
/* 1941 */    MCD_OPC_Decode, 222, 13, 108, // Opcode: VMLAslhq
2305
/* 1945 */    MCD_OPC_FilterValue, 2, 151, 0, 0, // Skip to: 2101
2306
/* 1950 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2307
/* 1953 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 1990
2308
/* 1959 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2309
/* 1962 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1976
2310
/* 1967 */    MCD_OPC_CheckPredicate, 21, 197, 64, 0, // Skip to: 18553
2311
/* 1972 */    MCD_OPC_Decode, 188, 10, 97, // Opcode: VHSUBsv4i16
2312
/* 1976 */    MCD_OPC_FilterValue, 1, 188, 64, 0, // Skip to: 18553
2313
/* 1981 */    MCD_OPC_CheckPredicate, 21, 183, 64, 0, // Skip to: 18553
2314
/* 1986 */    MCD_OPC_Decode, 190, 10, 98, // Opcode: VHSUBsv8i16
2315
/* 1990 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2027
2316
/* 1996 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2317
/* 1999 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2013
2318
/* 2004 */    MCD_OPC_CheckPredicate, 21, 160, 64, 0, // Skip to: 18553
2319
/* 2009 */    MCD_OPC_Decode, 213, 20, 99, // Opcode: VSUBLsv4i32
2320
/* 2013 */    MCD_OPC_FilterValue, 1, 151, 64, 0, // Skip to: 18553
2321
/* 2018 */    MCD_OPC_CheckPredicate, 21, 146, 64, 0, // Skip to: 18553
2322
/* 2023 */    MCD_OPC_Decode, 205, 13, 109, // Opcode: VMLALslsv4i16
2323
/* 2027 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2064
2324
/* 2033 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2325
/* 2036 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2050
2326
/* 2041 */    MCD_OPC_CheckPredicate, 21, 123, 64, 0, // Skip to: 18553
2327
/* 2046 */    MCD_OPC_Decode, 194, 10, 97, // Opcode: VHSUBuv4i16
2328
/* 2050 */    MCD_OPC_FilterValue, 1, 114, 64, 0, // Skip to: 18553
2329
/* 2055 */    MCD_OPC_CheckPredicate, 21, 109, 64, 0, // Skip to: 18553
2330
/* 2060 */    MCD_OPC_Decode, 196, 10, 98, // Opcode: VHSUBuv8i16
2331
/* 2064 */    MCD_OPC_FilterValue, 231, 3, 99, 64, 0, // Skip to: 18553
2332
/* 2070 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2333
/* 2073 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2087
2334
/* 2078 */    MCD_OPC_CheckPredicate, 21, 86, 64, 0, // Skip to: 18553
2335
/* 2083 */    MCD_OPC_Decode, 216, 20, 99, // Opcode: VSUBLuv4i32
2336
/* 2087 */    MCD_OPC_FilterValue, 1, 77, 64, 0, // Skip to: 18553
2337
/* 2092 */    MCD_OPC_CheckPredicate, 21, 72, 64, 0, // Skip to: 18553
2338
/* 2097 */    MCD_OPC_Decode, 207, 13, 109, // Opcode: VMLALsluv4i16
2339
/* 2101 */    MCD_OPC_FilterValue, 3, 136, 0, 0, // Skip to: 2242
2340
/* 2106 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2341
/* 2109 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2146
2342
/* 2115 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2343
/* 2118 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2132
2344
/* 2123 */    MCD_OPC_CheckPredicate, 21, 41, 64, 0, // Skip to: 18553
2345
/* 2128 */    MCD_OPC_Decode, 207, 8, 97, // Opcode: VCGTsv4i16
2346
/* 2132 */    MCD_OPC_FilterValue, 1, 32, 64, 0, // Skip to: 18553
2347
/* 2137 */    MCD_OPC_CheckPredicate, 21, 27, 64, 0, // Skip to: 18553
2348
/* 2142 */    MCD_OPC_Decode, 209, 8, 98, // Opcode: VCGTsv8i16
2349
/* 2146 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2183
2350
/* 2152 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2351
/* 2155 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2169
2352
/* 2160 */    MCD_OPC_CheckPredicate, 21, 4, 64, 0, // Skip to: 18553
2353
/* 2165 */    MCD_OPC_Decode, 220, 20, 100, // Opcode: VSUBWsv4i32
2354
/* 2169 */    MCD_OPC_FilterValue, 1, 251, 63, 0, // Skip to: 18553
2355
/* 2174 */    MCD_OPC_CheckPredicate, 21, 246, 63, 0, // Skip to: 18553
2356
/* 2179 */    MCD_OPC_Decode, 190, 15, 109, // Opcode: VQDMLALslv4i16
2357
/* 2183 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2220
2358
/* 2189 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2359
/* 2192 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2206
2360
/* 2197 */    MCD_OPC_CheckPredicate, 21, 223, 63, 0, // Skip to: 18553
2361
/* 2202 */    MCD_OPC_Decode, 213, 8, 97, // Opcode: VCGTuv4i16
2362
/* 2206 */    MCD_OPC_FilterValue, 1, 214, 63, 0, // Skip to: 18553
2363
/* 2211 */    MCD_OPC_CheckPredicate, 21, 209, 63, 0, // Skip to: 18553
2364
/* 2216 */    MCD_OPC_Decode, 215, 8, 98, // Opcode: VCGTuv8i16
2365
/* 2220 */    MCD_OPC_FilterValue, 231, 3, 199, 63, 0, // Skip to: 18553
2366
/* 2226 */    MCD_OPC_CheckPredicate, 21, 194, 63, 0, // Skip to: 18553
2367
/* 2231 */    MCD_OPC_CheckField, 6, 1, 0, 187, 63, 0, // Skip to: 18553
2368
/* 2238 */    MCD_OPC_Decode, 223, 20, 100, // Opcode: VSUBWuv4i32
2369
/* 2242 */    MCD_OPC_FilterValue, 4, 151, 0, 0, // Skip to: 2398
2370
/* 2247 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2371
/* 2250 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2287
2372
/* 2256 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2373
/* 2259 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2273
2374
/* 2264 */    MCD_OPC_CheckPredicate, 21, 156, 63, 0, // Skip to: 18553
2375
/* 2269 */    MCD_OPC_Decode, 140, 18, 101, // Opcode: VSHLsv4i16
2376
/* 2273 */    MCD_OPC_FilterValue, 1, 147, 63, 0, // Skip to: 18553
2377
/* 2278 */    MCD_OPC_CheckPredicate, 21, 142, 63, 0, // Skip to: 18553
2378
/* 2283 */    MCD_OPC_Decode, 142, 18, 102, // Opcode: VSHLsv8i16
2379
/* 2287 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2324
2380
/* 2293 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2381
/* 2296 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2310
2382
/* 2301 */    MCD_OPC_CheckPredicate, 21, 119, 63, 0, // Skip to: 18553
2383
/* 2306 */    MCD_OPC_Decode, 238, 7, 103, // Opcode: VADDHNv4i16
2384
/* 2310 */    MCD_OPC_FilterValue, 1, 110, 63, 0, // Skip to: 18553
2385
/* 2315 */    MCD_OPC_CheckPredicate, 21, 105, 63, 0, // Skip to: 18553
2386
/* 2320 */    MCD_OPC_Decode, 255, 13, 107, // Opcode: VMLSslv4i16
2387
/* 2324 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2361
2388
/* 2330 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2389
/* 2333 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2347
2390
/* 2338 */    MCD_OPC_CheckPredicate, 21, 82, 63, 0, // Skip to: 18553
2391
/* 2343 */    MCD_OPC_Decode, 148, 18, 101, // Opcode: VSHLuv4i16
2392
/* 2347 */    MCD_OPC_FilterValue, 1, 73, 63, 0, // Skip to: 18553
2393
/* 2352 */    MCD_OPC_CheckPredicate, 21, 68, 63, 0, // Skip to: 18553
2394
/* 2357 */    MCD_OPC_Decode, 150, 18, 102, // Opcode: VSHLuv8i16
2395
/* 2361 */    MCD_OPC_FilterValue, 231, 3, 58, 63, 0, // Skip to: 18553
2396
/* 2367 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2397
/* 2370 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2384
2398
/* 2375 */    MCD_OPC_CheckPredicate, 21, 45, 63, 0, // Skip to: 18553
2399
/* 2380 */    MCD_OPC_Decode, 211, 16, 103, // Opcode: VRADDHNv4i16
2400
/* 2384 */    MCD_OPC_FilterValue, 1, 36, 63, 0, // Skip to: 18553
2401
/* 2389 */    MCD_OPC_CheckPredicate, 21, 31, 63, 0, // Skip to: 18553
2402
/* 2394 */    MCD_OPC_Decode, 129, 14, 108, // Opcode: VMLSslv8i16
2403
/* 2398 */    MCD_OPC_FilterValue, 5, 151, 0, 0, // Skip to: 2554
2404
/* 2403 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2405
/* 2406 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2443
2406
/* 2412 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2407
/* 2415 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2429
2408
/* 2420 */    MCD_OPC_CheckPredicate, 21, 0, 63, 0, // Skip to: 18553
2409
/* 2425 */    MCD_OPC_Decode, 168, 17, 101, // Opcode: VRSHLsv4i16
2410
/* 2429 */    MCD_OPC_FilterValue, 1, 247, 62, 0, // Skip to: 18553
2411
/* 2434 */    MCD_OPC_CheckPredicate, 21, 242, 62, 0, // Skip to: 18553
2412
/* 2439 */    MCD_OPC_Decode, 170, 17, 102, // Opcode: VRSHLsv8i16
2413
/* 2443 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2480
2414
/* 2449 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2415
/* 2452 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2466
2416
/* 2457 */    MCD_OPC_CheckPredicate, 21, 219, 62, 0, // Skip to: 18553
2417
/* 2462 */    MCD_OPC_Decode, 175, 7, 104, // Opcode: VABALsv4i32
2418
/* 2466 */    MCD_OPC_FilterValue, 1, 210, 62, 0, // Skip to: 18553
2419
/* 2471 */    MCD_OPC_CheckPredicate, 22, 205, 62, 0, // Skip to: 18553
2420
/* 2476 */    MCD_OPC_Decode, 252, 13, 107, // Opcode: VMLSslhd
2421
/* 2480 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2517
2422
/* 2486 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2423
/* 2489 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2503
2424
/* 2494 */    MCD_OPC_CheckPredicate, 21, 182, 62, 0, // Skip to: 18553
2425
/* 2499 */    MCD_OPC_Decode, 176, 17, 101, // Opcode: VRSHLuv4i16
2426
/* 2503 */    MCD_OPC_FilterValue, 1, 173, 62, 0, // Skip to: 18553
2427
/* 2508 */    MCD_OPC_CheckPredicate, 21, 168, 62, 0, // Skip to: 18553
2428
/* 2513 */    MCD_OPC_Decode, 178, 17, 102, // Opcode: VRSHLuv8i16
2429
/* 2517 */    MCD_OPC_FilterValue, 231, 3, 158, 62, 0, // Skip to: 18553
2430
/* 2523 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2431
/* 2526 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2540
2432
/* 2531 */    MCD_OPC_CheckPredicate, 21, 145, 62, 0, // Skip to: 18553
2433
/* 2536 */    MCD_OPC_Decode, 178, 7, 104, // Opcode: VABALuv4i32
2434
/* 2540 */    MCD_OPC_FilterValue, 1, 136, 62, 0, // Skip to: 18553
2435
/* 2545 */    MCD_OPC_CheckPredicate, 22, 131, 62, 0, // Skip to: 18553
2436
/* 2550 */    MCD_OPC_Decode, 253, 13, 108, // Opcode: VMLSslhq
2437
/* 2554 */    MCD_OPC_FilterValue, 6, 151, 0, 0, // Skip to: 2710
2438
/* 2559 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2439
/* 2562 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2599
2440
/* 2568 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2441
/* 2571 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2585
2442
/* 2576 */    MCD_OPC_CheckPredicate, 21, 100, 62, 0, // Skip to: 18553
2443
/* 2581 */    MCD_OPC_Decode, 169, 13, 97, // Opcode: VMAXsv4i16
2444
/* 2585 */    MCD_OPC_FilterValue, 1, 91, 62, 0, // Skip to: 18553
2445
/* 2590 */    MCD_OPC_CheckPredicate, 21, 86, 62, 0, // Skip to: 18553
2446
/* 2595 */    MCD_OPC_Decode, 171, 13, 98, // Opcode: VMAXsv8i16
2447
/* 2599 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2636
2448
/* 2605 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2449
/* 2608 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2622
2450
/* 2613 */    MCD_OPC_CheckPredicate, 21, 63, 62, 0, // Skip to: 18553
2451
/* 2618 */    MCD_OPC_Decode, 210, 20, 103, // Opcode: VSUBHNv4i16
2452
/* 2622 */    MCD_OPC_FilterValue, 1, 54, 62, 0, // Skip to: 18553
2453
/* 2627 */    MCD_OPC_CheckPredicate, 21, 49, 62, 0, // Skip to: 18553
2454
/* 2632 */    MCD_OPC_Decode, 236, 13, 109, // Opcode: VMLSLslsv4i16
2455
/* 2636 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2673
2456
/* 2642 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2457
/* 2645 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2659
2458
/* 2650 */    MCD_OPC_CheckPredicate, 21, 26, 62, 0, // Skip to: 18553
2459
/* 2655 */    MCD_OPC_Decode, 175, 13, 97, // Opcode: VMAXuv4i16
2460
/* 2659 */    MCD_OPC_FilterValue, 1, 17, 62, 0, // Skip to: 18553
2461
/* 2664 */    MCD_OPC_CheckPredicate, 21, 12, 62, 0, // Skip to: 18553
2462
/* 2669 */    MCD_OPC_Decode, 177, 13, 98, // Opcode: VMAXuv8i16
2463
/* 2673 */    MCD_OPC_FilterValue, 231, 3, 2, 62, 0, // Skip to: 18553
2464
/* 2679 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2465
/* 2682 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2696
2466
/* 2687 */    MCD_OPC_CheckPredicate, 21, 245, 61, 0, // Skip to: 18553
2467
/* 2692 */    MCD_OPC_Decode, 226, 17, 103, // Opcode: VRSUBHNv4i16
2468
/* 2696 */    MCD_OPC_FilterValue, 1, 236, 61, 0, // Skip to: 18553
2469
/* 2701 */    MCD_OPC_CheckPredicate, 21, 231, 61, 0, // Skip to: 18553
2470
/* 2706 */    MCD_OPC_Decode, 238, 13, 109, // Opcode: VMLSLsluv4i16
2471
/* 2710 */    MCD_OPC_FilterValue, 7, 136, 0, 0, // Skip to: 2851
2472
/* 2715 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2473
/* 2718 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2755
2474
/* 2724 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2475
/* 2727 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2741
2476
/* 2732 */    MCD_OPC_CheckPredicate, 21, 200, 61, 0, // Skip to: 18553
2477
/* 2737 */    MCD_OPC_Decode, 204, 7, 97, // Opcode: VABDsv4i16
2478
/* 2741 */    MCD_OPC_FilterValue, 1, 191, 61, 0, // Skip to: 18553
2479
/* 2746 */    MCD_OPC_CheckPredicate, 21, 186, 61, 0, // Skip to: 18553
2480
/* 2751 */    MCD_OPC_Decode, 206, 7, 98, // Opcode: VABDsv8i16
2481
/* 2755 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2792
2482
/* 2761 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2483
/* 2764 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2778
2484
/* 2769 */    MCD_OPC_CheckPredicate, 21, 163, 61, 0, // Skip to: 18553
2485
/* 2774 */    MCD_OPC_Decode, 193, 7, 99, // Opcode: VABDLsv4i32
2486
/* 2778 */    MCD_OPC_FilterValue, 1, 154, 61, 0, // Skip to: 18553
2487
/* 2783 */    MCD_OPC_CheckPredicate, 21, 149, 61, 0, // Skip to: 18553
2488
/* 2788 */    MCD_OPC_Decode, 194, 15, 109, // Opcode: VQDMLSLslv4i16
2489
/* 2792 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2829
2490
/* 2798 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2491
/* 2801 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2815
2492
/* 2806 */    MCD_OPC_CheckPredicate, 21, 126, 61, 0, // Skip to: 18553
2493
/* 2811 */    MCD_OPC_Decode, 210, 7, 97, // Opcode: VABDuv4i16
2494
/* 2815 */    MCD_OPC_FilterValue, 1, 117, 61, 0, // Skip to: 18553
2495
/* 2820 */    MCD_OPC_CheckPredicate, 21, 112, 61, 0, // Skip to: 18553
2496
/* 2825 */    MCD_OPC_Decode, 212, 7, 98, // Opcode: VABDuv8i16
2497
/* 2829 */    MCD_OPC_FilterValue, 231, 3, 102, 61, 0, // Skip to: 18553
2498
/* 2835 */    MCD_OPC_CheckPredicate, 21, 97, 61, 0, // Skip to: 18553
2499
/* 2840 */    MCD_OPC_CheckField, 6, 1, 0, 90, 61, 0, // Skip to: 18553
2500
/* 2847 */    MCD_OPC_Decode, 196, 7, 99, // Opcode: VABDLuv4i32
2501
/* 2851 */    MCD_OPC_FilterValue, 8, 151, 0, 0, // Skip to: 3007
2502
/* 2856 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2503
/* 2859 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 2896
2504
/* 2865 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2505
/* 2868 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2882
2506
/* 2873 */    MCD_OPC_CheckPredicate, 21, 59, 61, 0, // Skip to: 18553
2507
/* 2878 */    MCD_OPC_Decode, 133, 8, 97, // Opcode: VADDv4i16
2508
/* 2882 */    MCD_OPC_FilterValue, 1, 50, 61, 0, // Skip to: 18553
2509
/* 2887 */    MCD_OPC_CheckPredicate, 21, 45, 61, 0, // Skip to: 18553
2510
/* 2892 */    MCD_OPC_Decode, 135, 8, 98, // Opcode: VADDv8i16
2511
/* 2896 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 2933
2512
/* 2902 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2513
/* 2905 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2919
2514
/* 2910 */    MCD_OPC_CheckPredicate, 21, 22, 61, 0, // Skip to: 18553
2515
/* 2915 */    MCD_OPC_Decode, 209, 13, 104, // Opcode: VMLALsv4i32
2516
/* 2919 */    MCD_OPC_FilterValue, 1, 13, 61, 0, // Skip to: 18553
2517
/* 2924 */    MCD_OPC_CheckPredicate, 21, 8, 61, 0, // Skip to: 18553
2518
/* 2929 */    MCD_OPC_Decode, 205, 14, 110, // Opcode: VMULslv4i16
2519
/* 2933 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 2970
2520
/* 2939 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2521
/* 2942 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2956
2522
/* 2947 */    MCD_OPC_CheckPredicate, 21, 241, 60, 0, // Skip to: 18553
2523
/* 2952 */    MCD_OPC_Decode, 233, 20, 97, // Opcode: VSUBv4i16
2524
/* 2956 */    MCD_OPC_FilterValue, 1, 232, 60, 0, // Skip to: 18553
2525
/* 2961 */    MCD_OPC_CheckPredicate, 21, 227, 60, 0, // Skip to: 18553
2526
/* 2966 */    MCD_OPC_Decode, 235, 20, 98, // Opcode: VSUBv8i16
2527
/* 2970 */    MCD_OPC_FilterValue, 231, 3, 217, 60, 0, // Skip to: 18553
2528
/* 2976 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2529
/* 2979 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2993
2530
/* 2984 */    MCD_OPC_CheckPredicate, 21, 204, 60, 0, // Skip to: 18553
2531
/* 2989 */    MCD_OPC_Decode, 212, 13, 104, // Opcode: VMLALuv4i32
2532
/* 2993 */    MCD_OPC_FilterValue, 1, 195, 60, 0, // Skip to: 18553
2533
/* 2998 */    MCD_OPC_CheckPredicate, 21, 190, 60, 0, // Skip to: 18553
2534
/* 3003 */    MCD_OPC_Decode, 207, 14, 111, // Opcode: VMULslv8i16
2535
/* 3007 */    MCD_OPC_FilterValue, 9, 136, 0, 0, // Skip to: 3148
2536
/* 3012 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2537
/* 3015 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3052
2538
/* 3021 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2539
/* 3024 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3038
2540
/* 3029 */    MCD_OPC_CheckPredicate, 21, 159, 60, 0, // Skip to: 18553
2541
/* 3034 */    MCD_OPC_Decode, 229, 13, 105, // Opcode: VMLAv4i16
2542
/* 3038 */    MCD_OPC_FilterValue, 1, 150, 60, 0, // Skip to: 18553
2543
/* 3043 */    MCD_OPC_CheckPredicate, 21, 145, 60, 0, // Skip to: 18553
2544
/* 3048 */    MCD_OPC_Decode, 231, 13, 106, // Opcode: VMLAv8i16
2545
/* 3052 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 3089
2546
/* 3058 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2547
/* 3061 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3075
2548
/* 3066 */    MCD_OPC_CheckPredicate, 21, 122, 60, 0, // Skip to: 18553
2549
/* 3071 */    MCD_OPC_Decode, 192, 15, 104, // Opcode: VQDMLALv4i32
2550
/* 3075 */    MCD_OPC_FilterValue, 1, 113, 60, 0, // Skip to: 18553
2551
/* 3080 */    MCD_OPC_CheckPredicate, 22, 108, 60, 0, // Skip to: 18553
2552
/* 3085 */    MCD_OPC_Decode, 202, 14, 110, // Opcode: VMULslhd
2553
/* 3089 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 3126
2554
/* 3095 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2555
/* 3098 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3112
2556
/* 3103 */    MCD_OPC_CheckPredicate, 21, 85, 60, 0, // Skip to: 18553
2557
/* 3108 */    MCD_OPC_Decode, 132, 14, 105, // Opcode: VMLSv4i16
2558
/* 3112 */    MCD_OPC_FilterValue, 1, 76, 60, 0, // Skip to: 18553
2559
/* 3117 */    MCD_OPC_CheckPredicate, 21, 71, 60, 0, // Skip to: 18553
2560
/* 3122 */    MCD_OPC_Decode, 134, 14, 106, // Opcode: VMLSv8i16
2561
/* 3126 */    MCD_OPC_FilterValue, 231, 3, 61, 60, 0, // Skip to: 18553
2562
/* 3132 */    MCD_OPC_CheckPredicate, 22, 56, 60, 0, // Skip to: 18553
2563
/* 3137 */    MCD_OPC_CheckField, 6, 1, 1, 49, 60, 0, // Skip to: 18553
2564
/* 3144 */    MCD_OPC_Decode, 203, 14, 111, // Opcode: VMULslhq
2565
/* 3148 */    MCD_OPC_FilterValue, 10, 121, 0, 0, // Skip to: 3274
2566
/* 3153 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2567
/* 3156 */    MCD_OPC_FilterValue, 228, 3, 16, 0, 0, // Skip to: 3178
2568
/* 3162 */    MCD_OPC_CheckPredicate, 21, 26, 60, 0, // Skip to: 18553
2569
/* 3167 */    MCD_OPC_CheckField, 6, 1, 0, 19, 60, 0, // Skip to: 18553
2570
/* 3174 */    MCD_OPC_Decode, 153, 15, 97, // Opcode: VPMAXs16
2571
/* 3178 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 3215
2572
/* 3184 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2573
/* 3187 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3201
2574
/* 3192 */    MCD_OPC_CheckPredicate, 21, 252, 59, 0, // Skip to: 18553
2575
/* 3197 */    MCD_OPC_Decode, 240, 13, 104, // Opcode: VMLSLsv4i32
2576
/* 3201 */    MCD_OPC_FilterValue, 1, 243, 59, 0, // Skip to: 18553
2577
/* 3206 */    MCD_OPC_CheckPredicate, 21, 238, 59, 0, // Skip to: 18553
2578
/* 3211 */    MCD_OPC_Decode, 184, 14, 112, // Opcode: VMULLslsv4i16
2579
/* 3215 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 3237
2580
/* 3221 */    MCD_OPC_CheckPredicate, 21, 223, 59, 0, // Skip to: 18553
2581
/* 3226 */    MCD_OPC_CheckField, 6, 1, 0, 216, 59, 0, // Skip to: 18553
2582
/* 3233 */    MCD_OPC_Decode, 156, 15, 97, // Opcode: VPMAXu16
2583
/* 3237 */    MCD_OPC_FilterValue, 231, 3, 206, 59, 0, // Skip to: 18553
2584
/* 3243 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2585
/* 3246 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3260
2586
/* 3251 */    MCD_OPC_CheckPredicate, 21, 193, 59, 0, // Skip to: 18553
2587
/* 3256 */    MCD_OPC_Decode, 243, 13, 104, // Opcode: VMLSLuv4i32
2588
/* 3260 */    MCD_OPC_FilterValue, 1, 184, 59, 0, // Skip to: 18553
2589
/* 3265 */    MCD_OPC_CheckPredicate, 21, 179, 59, 0, // Skip to: 18553
2590
/* 3270 */    MCD_OPC_Decode, 186, 14, 112, // Opcode: VMULLsluv4i16
2591
/* 3274 */    MCD_OPC_FilterValue, 11, 114, 0, 0, // Skip to: 3393
2592
/* 3279 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2593
/* 3282 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3319
2594
/* 3288 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2595
/* 3291 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3305
2596
/* 3296 */    MCD_OPC_CheckPredicate, 21, 148, 59, 0, // Skip to: 18553
2597
/* 3301 */    MCD_OPC_Decode, 202, 15, 97, // Opcode: VQDMULHv4i16
2598
/* 3305 */    MCD_OPC_FilterValue, 1, 139, 59, 0, // Skip to: 18553
2599
/* 3310 */    MCD_OPC_CheckPredicate, 21, 134, 59, 0, // Skip to: 18553
2600
/* 3315 */    MCD_OPC_Decode, 204, 15, 98, // Opcode: VQDMULHv8i16
2601
/* 3319 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 3356
2602
/* 3325 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2603
/* 3328 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3342
2604
/* 3333 */    MCD_OPC_CheckPredicate, 21, 111, 59, 0, // Skip to: 18553
2605
/* 3338 */    MCD_OPC_Decode, 196, 15, 104, // Opcode: VQDMLSLv4i32
2606
/* 3342 */    MCD_OPC_FilterValue, 1, 102, 59, 0, // Skip to: 18553
2607
/* 3347 */    MCD_OPC_CheckPredicate, 21, 97, 59, 0, // Skip to: 18553
2608
/* 3352 */    MCD_OPC_Decode, 206, 15, 112, // Opcode: VQDMULLslv4i16
2609
/* 3356 */    MCD_OPC_FilterValue, 230, 3, 87, 59, 0, // Skip to: 18553
2610
/* 3362 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2611
/* 3365 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3379
2612
/* 3370 */    MCD_OPC_CheckPredicate, 21, 74, 59, 0, // Skip to: 18553
2613
/* 3375 */    MCD_OPC_Decode, 245, 15, 97, // Opcode: VQRDMULHv4i16
2614
/* 3379 */    MCD_OPC_FilterValue, 1, 65, 59, 0, // Skip to: 18553
2615
/* 3384 */    MCD_OPC_CheckPredicate, 21, 60, 59, 0, // Skip to: 18553
2616
/* 3389 */    MCD_OPC_Decode, 247, 15, 98, // Opcode: VQRDMULHv8i16
2617
/* 3393 */    MCD_OPC_FilterValue, 12, 79, 0, 0, // Skip to: 3477
2618
/* 3398 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2619
/* 3401 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 3439
2620
/* 3406 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2621
/* 3409 */    MCD_OPC_FilterValue, 229, 3, 9, 0, 0, // Skip to: 3424
2622
/* 3415 */    MCD_OPC_CheckPredicate, 21, 29, 59, 0, // Skip to: 18553
2623
/* 3420 */    MCD_OPC_Decode, 188, 14, 99, // Opcode: VMULLsv4i32
2624
/* 3424 */    MCD_OPC_FilterValue, 231, 3, 19, 59, 0, // Skip to: 18553
2625
/* 3430 */    MCD_OPC_CheckPredicate, 21, 14, 59, 0, // Skip to: 18553
2626
/* 3435 */    MCD_OPC_Decode, 191, 14, 99, // Opcode: VMULLuv4i32
2627
/* 3439 */    MCD_OPC_FilterValue, 1, 5, 59, 0, // Skip to: 18553
2628
/* 3444 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2629
/* 3447 */    MCD_OPC_FilterValue, 229, 3, 9, 0, 0, // Skip to: 3462
2630
/* 3453 */    MCD_OPC_CheckPredicate, 21, 247, 58, 0, // Skip to: 18553
2631
/* 3458 */    MCD_OPC_Decode, 198, 15, 110, // Opcode: VQDMULHslv4i16
2632
/* 3462 */    MCD_OPC_FilterValue, 231, 3, 237, 58, 0, // Skip to: 18553
2633
/* 3468 */    MCD_OPC_CheckPredicate, 21, 232, 58, 0, // Skip to: 18553
2634
/* 3473 */    MCD_OPC_Decode, 200, 15, 111, // Opcode: VQDMULHslv8i16
2635
/* 3477 */    MCD_OPC_FilterValue, 13, 121, 0, 0, // Skip to: 3603
2636
/* 3482 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2637
/* 3485 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3522
2638
/* 3491 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2639
/* 3494 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3508
2640
/* 3499 */    MCD_OPC_CheckPredicate, 22, 201, 58, 0, // Skip to: 18553
2641
/* 3504 */    MCD_OPC_Decode, 255, 7, 97, // Opcode: VADDhd
2642
/* 3508 */    MCD_OPC_FilterValue, 1, 192, 58, 0, // Skip to: 18553
2643
/* 3513 */    MCD_OPC_CheckPredicate, 22, 187, 58, 0, // Skip to: 18553
2644
/* 3518 */    MCD_OPC_Decode, 128, 8, 98, // Opcode: VADDhq
2645
/* 3522 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 3559
2646
/* 3528 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2647
/* 3531 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3545
2648
/* 3536 */    MCD_OPC_CheckPredicate, 21, 164, 58, 0, // Skip to: 18553
2649
/* 3541 */    MCD_OPC_Decode, 208, 15, 99, // Opcode: VQDMULLv4i32
2650
/* 3545 */    MCD_OPC_FilterValue, 1, 155, 58, 0, // Skip to: 18553
2651
/* 3550 */    MCD_OPC_CheckPredicate, 21, 150, 58, 0, // Skip to: 18553
2652
/* 3555 */    MCD_OPC_Decode, 241, 15, 110, // Opcode: VQRDMULHslv4i16
2653
/* 3559 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 3581
2654
/* 3565 */    MCD_OPC_CheckPredicate, 22, 135, 58, 0, // Skip to: 18553
2655
/* 3570 */    MCD_OPC_CheckField, 6, 1, 0, 128, 58, 0, // Skip to: 18553
2656
/* 3577 */    MCD_OPC_Decode, 147, 15, 97, // Opcode: VPADDh
2657
/* 3581 */    MCD_OPC_FilterValue, 231, 3, 118, 58, 0, // Skip to: 18553
2658
/* 3587 */    MCD_OPC_CheckPredicate, 21, 113, 58, 0, // Skip to: 18553
2659
/* 3592 */    MCD_OPC_CheckField, 6, 1, 1, 106, 58, 0, // Skip to: 18553
2660
/* 3599 */    MCD_OPC_Decode, 243, 15, 111, // Opcode: VQRDMULHslv8i16
2661
/* 3603 */    MCD_OPC_FilterValue, 14, 121, 0, 0, // Skip to: 3729
2662
/* 3608 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2663
/* 3611 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3648
2664
/* 3617 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2665
/* 3620 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3634
2666
/* 3625 */    MCD_OPC_CheckPredicate, 22, 75, 58, 0, // Skip to: 18553
2667
/* 3630 */    MCD_OPC_Decode, 157, 8, 97, // Opcode: VCEQhd
2668
/* 3634 */    MCD_OPC_FilterValue, 1, 66, 58, 0, // Skip to: 18553
2669
/* 3639 */    MCD_OPC_CheckPredicate, 22, 61, 58, 0, // Skip to: 18553
2670
/* 3644 */    MCD_OPC_Decode, 158, 8, 98, // Opcode: VCEQhq
2671
/* 3648 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 3670
2672
/* 3654 */    MCD_OPC_CheckPredicate, 23, 46, 58, 0, // Skip to: 18553
2673
/* 3659 */    MCD_OPC_CheckField, 6, 1, 1, 39, 58, 0, // Skip to: 18553
2674
/* 3666 */    MCD_OPC_Decode, 225, 15, 107, // Opcode: VQRDMLAHslv4i16
2675
/* 3670 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 3707
2676
/* 3676 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2677
/* 3679 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3693
2678
/* 3684 */    MCD_OPC_CheckPredicate, 22, 16, 58, 0, // Skip to: 18553
2679
/* 3689 */    MCD_OPC_Decode, 177, 8, 97, // Opcode: VCGEhd
2680
/* 3693 */    MCD_OPC_FilterValue, 1, 7, 58, 0, // Skip to: 18553
2681
/* 3698 */    MCD_OPC_CheckPredicate, 22, 2, 58, 0, // Skip to: 18553
2682
/* 3703 */    MCD_OPC_Decode, 178, 8, 98, // Opcode: VCGEhq
2683
/* 3707 */    MCD_OPC_FilterValue, 231, 3, 248, 57, 0, // Skip to: 18553
2684
/* 3713 */    MCD_OPC_CheckPredicate, 23, 243, 57, 0, // Skip to: 18553
2685
/* 3718 */    MCD_OPC_CheckField, 6, 1, 1, 236, 57, 0, // Skip to: 18553
2686
/* 3725 */    MCD_OPC_Decode, 227, 15, 108, // Opcode: VQRDMLAHslv8i16
2687
/* 3729 */    MCD_OPC_FilterValue, 15, 227, 57, 0, // Skip to: 18553
2688
/* 3734 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2689
/* 3737 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3774
2690
/* 3743 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2691
/* 3746 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3760
2692
/* 3751 */    MCD_OPC_CheckPredicate, 22, 205, 57, 0, // Skip to: 18553
2693
/* 3756 */    MCD_OPC_Decode, 165, 13, 97, // Opcode: VMAXhd
2694
/* 3760 */    MCD_OPC_FilterValue, 1, 196, 57, 0, // Skip to: 18553
2695
/* 3765 */    MCD_OPC_CheckPredicate, 22, 191, 57, 0, // Skip to: 18553
2696
/* 3770 */    MCD_OPC_Decode, 166, 13, 98, // Opcode: VMAXhq
2697
/* 3774 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 3796
2698
/* 3780 */    MCD_OPC_CheckPredicate, 23, 176, 57, 0, // Skip to: 18553
2699
/* 3785 */    MCD_OPC_CheckField, 6, 1, 1, 169, 57, 0, // Skip to: 18553
2700
/* 3792 */    MCD_OPC_Decode, 233, 15, 107, // Opcode: VQRDMLSHslv4i16
2701
/* 3796 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 3818
2702
/* 3802 */    MCD_OPC_CheckPredicate, 22, 154, 57, 0, // Skip to: 18553
2703
/* 3807 */    MCD_OPC_CheckField, 6, 1, 0, 147, 57, 0, // Skip to: 18553
2704
/* 3814 */    MCD_OPC_Decode, 152, 15, 97, // Opcode: VPMAXh
2705
/* 3818 */    MCD_OPC_FilterValue, 231, 3, 137, 57, 0, // Skip to: 18553
2706
/* 3824 */    MCD_OPC_CheckPredicate, 23, 132, 57, 0, // Skip to: 18553
2707
/* 3829 */    MCD_OPC_CheckField, 6, 1, 1, 125, 57, 0, // Skip to: 18553
2708
/* 3836 */    MCD_OPC_Decode, 235, 15, 108, // Opcode: VQRDMLSHslv8i16
2709
/* 3840 */    MCD_OPC_FilterValue, 2, 155, 8, 0, // Skip to: 6048
2710
/* 3845 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
2711
/* 3848 */    MCD_OPC_FilterValue, 0, 151, 0, 0, // Skip to: 4004
2712
/* 3853 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2713
/* 3856 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 3893
2714
/* 3862 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2715
/* 3865 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3879
2716
/* 3870 */    MCD_OPC_CheckPredicate, 21, 86, 57, 0, // Skip to: 18553
2717
/* 3875 */    MCD_OPC_Decode, 175, 10, 97, // Opcode: VHADDsv2i32
2718
/* 3879 */    MCD_OPC_FilterValue, 1, 77, 57, 0, // Skip to: 18553
2719
/* 3884 */    MCD_OPC_CheckPredicate, 21, 72, 57, 0, // Skip to: 18553
2720
/* 3889 */    MCD_OPC_Decode, 177, 10, 98, // Opcode: VHADDsv4i32
2721
/* 3893 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 3930
2722
/* 3899 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2723
/* 3902 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3916
2724
/* 3907 */    MCD_OPC_CheckPredicate, 21, 49, 57, 0, // Skip to: 18553
2725
/* 3912 */    MCD_OPC_Decode, 240, 7, 99, // Opcode: VADDLsv2i64
2726
/* 3916 */    MCD_OPC_FilterValue, 1, 40, 57, 0, // Skip to: 18553
2727
/* 3921 */    MCD_OPC_CheckPredicate, 21, 35, 57, 0, // Skip to: 18553
2728
/* 3926 */    MCD_OPC_Decode, 223, 13, 113, // Opcode: VMLAslv2i32
2729
/* 3930 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 3967
2730
/* 3936 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2731
/* 3939 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3953
2732
/* 3944 */    MCD_OPC_CheckPredicate, 21, 12, 57, 0, // Skip to: 18553
2733
/* 3949 */    MCD_OPC_Decode, 181, 10, 97, // Opcode: VHADDuv2i32
2734
/* 3953 */    MCD_OPC_FilterValue, 1, 3, 57, 0, // Skip to: 18553
2735
/* 3958 */    MCD_OPC_CheckPredicate, 21, 254, 56, 0, // Skip to: 18553
2736
/* 3963 */    MCD_OPC_Decode, 183, 10, 98, // Opcode: VHADDuv4i32
2737
/* 3967 */    MCD_OPC_FilterValue, 231, 3, 244, 56, 0, // Skip to: 18553
2738
/* 3973 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2739
/* 3976 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3990
2740
/* 3981 */    MCD_OPC_CheckPredicate, 21, 231, 56, 0, // Skip to: 18553
2741
/* 3986 */    MCD_OPC_Decode, 243, 7, 99, // Opcode: VADDLuv2i64
2742
/* 3990 */    MCD_OPC_FilterValue, 1, 222, 56, 0, // Skip to: 18553
2743
/* 3995 */    MCD_OPC_CheckPredicate, 21, 217, 56, 0, // Skip to: 18553
2744
/* 4000 */    MCD_OPC_Decode, 225, 13, 114, // Opcode: VMLAslv4i32
2745
/* 4004 */    MCD_OPC_FilterValue, 1, 151, 0, 0, // Skip to: 4160
2746
/* 4009 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2747
/* 4012 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4049
2748
/* 4018 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2749
/* 4021 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4035
2750
/* 4026 */    MCD_OPC_CheckPredicate, 21, 186, 56, 0, // Skip to: 18553
2751
/* 4031 */    MCD_OPC_Decode, 236, 16, 97, // Opcode: VRHADDsv2i32
2752
/* 4035 */    MCD_OPC_FilterValue, 1, 177, 56, 0, // Skip to: 18553
2753
/* 4040 */    MCD_OPC_CheckPredicate, 21, 172, 56, 0, // Skip to: 18553
2754
/* 4045 */    MCD_OPC_Decode, 238, 16, 98, // Opcode: VRHADDsv4i32
2755
/* 4049 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4086
2756
/* 4055 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2757
/* 4058 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4072
2758
/* 4063 */    MCD_OPC_CheckPredicate, 21, 149, 56, 0, // Skip to: 18553
2759
/* 4068 */    MCD_OPC_Decode, 247, 7, 100, // Opcode: VADDWsv2i64
2760
/* 4072 */    MCD_OPC_FilterValue, 1, 140, 56, 0, // Skip to: 18553
2761
/* 4077 */    MCD_OPC_CheckPredicate, 21, 135, 56, 0, // Skip to: 18553
2762
/* 4082 */    MCD_OPC_Decode, 219, 13, 113, // Opcode: VMLAslfd
2763
/* 4086 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4123
2764
/* 4092 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2765
/* 4095 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4109
2766
/* 4100 */    MCD_OPC_CheckPredicate, 21, 112, 56, 0, // Skip to: 18553
2767
/* 4105 */    MCD_OPC_Decode, 242, 16, 97, // Opcode: VRHADDuv2i32
2768
/* 4109 */    MCD_OPC_FilterValue, 1, 103, 56, 0, // Skip to: 18553
2769
/* 4114 */    MCD_OPC_CheckPredicate, 21, 98, 56, 0, // Skip to: 18553
2770
/* 4119 */    MCD_OPC_Decode, 244, 16, 98, // Opcode: VRHADDuv4i32
2771
/* 4123 */    MCD_OPC_FilterValue, 231, 3, 88, 56, 0, // Skip to: 18553
2772
/* 4129 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2773
/* 4132 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4146
2774
/* 4137 */    MCD_OPC_CheckPredicate, 21, 75, 56, 0, // Skip to: 18553
2775
/* 4142 */    MCD_OPC_Decode, 250, 7, 100, // Opcode: VADDWuv2i64
2776
/* 4146 */    MCD_OPC_FilterValue, 1, 66, 56, 0, // Skip to: 18553
2777
/* 4151 */    MCD_OPC_CheckPredicate, 21, 61, 56, 0, // Skip to: 18553
2778
/* 4156 */    MCD_OPC_Decode, 220, 13, 114, // Opcode: VMLAslfq
2779
/* 4160 */    MCD_OPC_FilterValue, 2, 151, 0, 0, // Skip to: 4316
2780
/* 4165 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2781
/* 4168 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4205
2782
/* 4174 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2783
/* 4177 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4191
2784
/* 4182 */    MCD_OPC_CheckPredicate, 21, 30, 56, 0, // Skip to: 18553
2785
/* 4187 */    MCD_OPC_Decode, 187, 10, 97, // Opcode: VHSUBsv2i32
2786
/* 4191 */    MCD_OPC_FilterValue, 1, 21, 56, 0, // Skip to: 18553
2787
/* 4196 */    MCD_OPC_CheckPredicate, 21, 16, 56, 0, // Skip to: 18553
2788
/* 4201 */    MCD_OPC_Decode, 189, 10, 98, // Opcode: VHSUBsv4i32
2789
/* 4205 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4242
2790
/* 4211 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2791
/* 4214 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4228
2792
/* 4219 */    MCD_OPC_CheckPredicate, 21, 249, 55, 0, // Skip to: 18553
2793
/* 4224 */    MCD_OPC_Decode, 212, 20, 99, // Opcode: VSUBLsv2i64
2794
/* 4228 */    MCD_OPC_FilterValue, 1, 240, 55, 0, // Skip to: 18553
2795
/* 4233 */    MCD_OPC_CheckPredicate, 21, 235, 55, 0, // Skip to: 18553
2796
/* 4238 */    MCD_OPC_Decode, 204, 13, 115, // Opcode: VMLALslsv2i32
2797
/* 4242 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4279
2798
/* 4248 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2799
/* 4251 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4265
2800
/* 4256 */    MCD_OPC_CheckPredicate, 21, 212, 55, 0, // Skip to: 18553
2801
/* 4261 */    MCD_OPC_Decode, 193, 10, 97, // Opcode: VHSUBuv2i32
2802
/* 4265 */    MCD_OPC_FilterValue, 1, 203, 55, 0, // Skip to: 18553
2803
/* 4270 */    MCD_OPC_CheckPredicate, 21, 198, 55, 0, // Skip to: 18553
2804
/* 4275 */    MCD_OPC_Decode, 195, 10, 98, // Opcode: VHSUBuv4i32
2805
/* 4279 */    MCD_OPC_FilterValue, 231, 3, 188, 55, 0, // Skip to: 18553
2806
/* 4285 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2807
/* 4288 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4302
2808
/* 4293 */    MCD_OPC_CheckPredicate, 21, 175, 55, 0, // Skip to: 18553
2809
/* 4298 */    MCD_OPC_Decode, 215, 20, 99, // Opcode: VSUBLuv2i64
2810
/* 4302 */    MCD_OPC_FilterValue, 1, 166, 55, 0, // Skip to: 18553
2811
/* 4307 */    MCD_OPC_CheckPredicate, 21, 161, 55, 0, // Skip to: 18553
2812
/* 4312 */    MCD_OPC_Decode, 206, 13, 115, // Opcode: VMLALsluv2i32
2813
/* 4316 */    MCD_OPC_FilterValue, 3, 136, 0, 0, // Skip to: 4457
2814
/* 4321 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2815
/* 4324 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4361
2816
/* 4330 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2817
/* 4333 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4347
2818
/* 4338 */    MCD_OPC_CheckPredicate, 21, 130, 55, 0, // Skip to: 18553
2819
/* 4343 */    MCD_OPC_Decode, 206, 8, 97, // Opcode: VCGTsv2i32
2820
/* 4347 */    MCD_OPC_FilterValue, 1, 121, 55, 0, // Skip to: 18553
2821
/* 4352 */    MCD_OPC_CheckPredicate, 21, 116, 55, 0, // Skip to: 18553
2822
/* 4357 */    MCD_OPC_Decode, 208, 8, 98, // Opcode: VCGTsv4i32
2823
/* 4361 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4398
2824
/* 4367 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2825
/* 4370 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4384
2826
/* 4375 */    MCD_OPC_CheckPredicate, 21, 93, 55, 0, // Skip to: 18553
2827
/* 4380 */    MCD_OPC_Decode, 219, 20, 100, // Opcode: VSUBWsv2i64
2828
/* 4384 */    MCD_OPC_FilterValue, 1, 84, 55, 0, // Skip to: 18553
2829
/* 4389 */    MCD_OPC_CheckPredicate, 21, 79, 55, 0, // Skip to: 18553
2830
/* 4394 */    MCD_OPC_Decode, 189, 15, 115, // Opcode: VQDMLALslv2i32
2831
/* 4398 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4435
2832
/* 4404 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2833
/* 4407 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4421
2834
/* 4412 */    MCD_OPC_CheckPredicate, 21, 56, 55, 0, // Skip to: 18553
2835
/* 4417 */    MCD_OPC_Decode, 212, 8, 97, // Opcode: VCGTuv2i32
2836
/* 4421 */    MCD_OPC_FilterValue, 1, 47, 55, 0, // Skip to: 18553
2837
/* 4426 */    MCD_OPC_CheckPredicate, 21, 42, 55, 0, // Skip to: 18553
2838
/* 4431 */    MCD_OPC_Decode, 214, 8, 98, // Opcode: VCGTuv4i32
2839
/* 4435 */    MCD_OPC_FilterValue, 231, 3, 32, 55, 0, // Skip to: 18553
2840
/* 4441 */    MCD_OPC_CheckPredicate, 21, 27, 55, 0, // Skip to: 18553
2841
/* 4446 */    MCD_OPC_CheckField, 6, 1, 0, 20, 55, 0, // Skip to: 18553
2842
/* 4453 */    MCD_OPC_Decode, 222, 20, 100, // Opcode: VSUBWuv2i64
2843
/* 4457 */    MCD_OPC_FilterValue, 4, 151, 0, 0, // Skip to: 4613
2844
/* 4462 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2845
/* 4465 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4502
2846
/* 4471 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2847
/* 4474 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4488
2848
/* 4479 */    MCD_OPC_CheckPredicate, 21, 245, 54, 0, // Skip to: 18553
2849
/* 4484 */    MCD_OPC_Decode, 138, 18, 101, // Opcode: VSHLsv2i32
2850
/* 4488 */    MCD_OPC_FilterValue, 1, 236, 54, 0, // Skip to: 18553
2851
/* 4493 */    MCD_OPC_CheckPredicate, 21, 231, 54, 0, // Skip to: 18553
2852
/* 4498 */    MCD_OPC_Decode, 141, 18, 102, // Opcode: VSHLsv4i32
2853
/* 4502 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4539
2854
/* 4508 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2855
/* 4511 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4525
2856
/* 4516 */    MCD_OPC_CheckPredicate, 21, 208, 54, 0, // Skip to: 18553
2857
/* 4521 */    MCD_OPC_Decode, 237, 7, 103, // Opcode: VADDHNv2i32
2858
/* 4525 */    MCD_OPC_FilterValue, 1, 199, 54, 0, // Skip to: 18553
2859
/* 4530 */    MCD_OPC_CheckPredicate, 21, 194, 54, 0, // Skip to: 18553
2860
/* 4535 */    MCD_OPC_Decode, 254, 13, 113, // Opcode: VMLSslv2i32
2861
/* 4539 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4576
2862
/* 4545 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2863
/* 4548 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4562
2864
/* 4553 */    MCD_OPC_CheckPredicate, 21, 171, 54, 0, // Skip to: 18553
2865
/* 4558 */    MCD_OPC_Decode, 146, 18, 101, // Opcode: VSHLuv2i32
2866
/* 4562 */    MCD_OPC_FilterValue, 1, 162, 54, 0, // Skip to: 18553
2867
/* 4567 */    MCD_OPC_CheckPredicate, 21, 157, 54, 0, // Skip to: 18553
2868
/* 4572 */    MCD_OPC_Decode, 149, 18, 102, // Opcode: VSHLuv4i32
2869
/* 4576 */    MCD_OPC_FilterValue, 231, 3, 147, 54, 0, // Skip to: 18553
2870
/* 4582 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2871
/* 4585 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4599
2872
/* 4590 */    MCD_OPC_CheckPredicate, 21, 134, 54, 0, // Skip to: 18553
2873
/* 4595 */    MCD_OPC_Decode, 210, 16, 103, // Opcode: VRADDHNv2i32
2874
/* 4599 */    MCD_OPC_FilterValue, 1, 125, 54, 0, // Skip to: 18553
2875
/* 4604 */    MCD_OPC_CheckPredicate, 21, 120, 54, 0, // Skip to: 18553
2876
/* 4609 */    MCD_OPC_Decode, 128, 14, 114, // Opcode: VMLSslv4i32
2877
/* 4613 */    MCD_OPC_FilterValue, 5, 151, 0, 0, // Skip to: 4769
2878
/* 4618 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2879
/* 4621 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4658
2880
/* 4627 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2881
/* 4630 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4644
2882
/* 4635 */    MCD_OPC_CheckPredicate, 21, 89, 54, 0, // Skip to: 18553
2883
/* 4640 */    MCD_OPC_Decode, 166, 17, 101, // Opcode: VRSHLsv2i32
2884
/* 4644 */    MCD_OPC_FilterValue, 1, 80, 54, 0, // Skip to: 18553
2885
/* 4649 */    MCD_OPC_CheckPredicate, 21, 75, 54, 0, // Skip to: 18553
2886
/* 4654 */    MCD_OPC_Decode, 169, 17, 102, // Opcode: VRSHLsv4i32
2887
/* 4658 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4695
2888
/* 4664 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2889
/* 4667 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4681
2890
/* 4672 */    MCD_OPC_CheckPredicate, 21, 52, 54, 0, // Skip to: 18553
2891
/* 4677 */    MCD_OPC_Decode, 174, 7, 104, // Opcode: VABALsv2i64
2892
/* 4681 */    MCD_OPC_FilterValue, 1, 43, 54, 0, // Skip to: 18553
2893
/* 4686 */    MCD_OPC_CheckPredicate, 21, 38, 54, 0, // Skip to: 18553
2894
/* 4691 */    MCD_OPC_Decode, 250, 13, 113, // Opcode: VMLSslfd
2895
/* 4695 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4732
2896
/* 4701 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2897
/* 4704 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4718
2898
/* 4709 */    MCD_OPC_CheckPredicate, 21, 15, 54, 0, // Skip to: 18553
2899
/* 4714 */    MCD_OPC_Decode, 174, 17, 101, // Opcode: VRSHLuv2i32
2900
/* 4718 */    MCD_OPC_FilterValue, 1, 6, 54, 0, // Skip to: 18553
2901
/* 4723 */    MCD_OPC_CheckPredicate, 21, 1, 54, 0, // Skip to: 18553
2902
/* 4728 */    MCD_OPC_Decode, 177, 17, 102, // Opcode: VRSHLuv4i32
2903
/* 4732 */    MCD_OPC_FilterValue, 231, 3, 247, 53, 0, // Skip to: 18553
2904
/* 4738 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2905
/* 4741 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4755
2906
/* 4746 */    MCD_OPC_CheckPredicate, 21, 234, 53, 0, // Skip to: 18553
2907
/* 4751 */    MCD_OPC_Decode, 177, 7, 104, // Opcode: VABALuv2i64
2908
/* 4755 */    MCD_OPC_FilterValue, 1, 225, 53, 0, // Skip to: 18553
2909
/* 4760 */    MCD_OPC_CheckPredicate, 21, 220, 53, 0, // Skip to: 18553
2910
/* 4765 */    MCD_OPC_Decode, 251, 13, 114, // Opcode: VMLSslfq
2911
/* 4769 */    MCD_OPC_FilterValue, 6, 151, 0, 0, // Skip to: 4925
2912
/* 4774 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2913
/* 4777 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4814
2914
/* 4783 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2915
/* 4786 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4800
2916
/* 4791 */    MCD_OPC_CheckPredicate, 21, 189, 53, 0, // Skip to: 18553
2917
/* 4796 */    MCD_OPC_Decode, 168, 13, 97, // Opcode: VMAXsv2i32
2918
/* 4800 */    MCD_OPC_FilterValue, 1, 180, 53, 0, // Skip to: 18553
2919
/* 4805 */    MCD_OPC_CheckPredicate, 21, 175, 53, 0, // Skip to: 18553
2920
/* 4810 */    MCD_OPC_Decode, 170, 13, 98, // Opcode: VMAXsv4i32
2921
/* 4814 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 4851
2922
/* 4820 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2923
/* 4823 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4837
2924
/* 4828 */    MCD_OPC_CheckPredicate, 21, 152, 53, 0, // Skip to: 18553
2925
/* 4833 */    MCD_OPC_Decode, 209, 20, 103, // Opcode: VSUBHNv2i32
2926
/* 4837 */    MCD_OPC_FilterValue, 1, 143, 53, 0, // Skip to: 18553
2927
/* 4842 */    MCD_OPC_CheckPredicate, 21, 138, 53, 0, // Skip to: 18553
2928
/* 4847 */    MCD_OPC_Decode, 235, 13, 115, // Opcode: VMLSLslsv2i32
2929
/* 4851 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 4888
2930
/* 4857 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2931
/* 4860 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4874
2932
/* 4865 */    MCD_OPC_CheckPredicate, 21, 115, 53, 0, // Skip to: 18553
2933
/* 4870 */    MCD_OPC_Decode, 174, 13, 97, // Opcode: VMAXuv2i32
2934
/* 4874 */    MCD_OPC_FilterValue, 1, 106, 53, 0, // Skip to: 18553
2935
/* 4879 */    MCD_OPC_CheckPredicate, 21, 101, 53, 0, // Skip to: 18553
2936
/* 4884 */    MCD_OPC_Decode, 176, 13, 98, // Opcode: VMAXuv4i32
2937
/* 4888 */    MCD_OPC_FilterValue, 231, 3, 91, 53, 0, // Skip to: 18553
2938
/* 4894 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2939
/* 4897 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4911
2940
/* 4902 */    MCD_OPC_CheckPredicate, 21, 78, 53, 0, // Skip to: 18553
2941
/* 4907 */    MCD_OPC_Decode, 225, 17, 103, // Opcode: VRSUBHNv2i32
2942
/* 4911 */    MCD_OPC_FilterValue, 1, 69, 53, 0, // Skip to: 18553
2943
/* 4916 */    MCD_OPC_CheckPredicate, 21, 64, 53, 0, // Skip to: 18553
2944
/* 4921 */    MCD_OPC_Decode, 237, 13, 115, // Opcode: VMLSLsluv2i32
2945
/* 4925 */    MCD_OPC_FilterValue, 7, 136, 0, 0, // Skip to: 5066
2946
/* 4930 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2947
/* 4933 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 4970
2948
/* 4939 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2949
/* 4942 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4956
2950
/* 4947 */    MCD_OPC_CheckPredicate, 21, 33, 53, 0, // Skip to: 18553
2951
/* 4952 */    MCD_OPC_Decode, 203, 7, 97, // Opcode: VABDsv2i32
2952
/* 4956 */    MCD_OPC_FilterValue, 1, 24, 53, 0, // Skip to: 18553
2953
/* 4961 */    MCD_OPC_CheckPredicate, 21, 19, 53, 0, // Skip to: 18553
2954
/* 4966 */    MCD_OPC_Decode, 205, 7, 98, // Opcode: VABDsv4i32
2955
/* 4970 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5007
2956
/* 4976 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2957
/* 4979 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4993
2958
/* 4984 */    MCD_OPC_CheckPredicate, 21, 252, 52, 0, // Skip to: 18553
2959
/* 4989 */    MCD_OPC_Decode, 192, 7, 99, // Opcode: VABDLsv2i64
2960
/* 4993 */    MCD_OPC_FilterValue, 1, 243, 52, 0, // Skip to: 18553
2961
/* 4998 */    MCD_OPC_CheckPredicate, 21, 238, 52, 0, // Skip to: 18553
2962
/* 5003 */    MCD_OPC_Decode, 193, 15, 115, // Opcode: VQDMLSLslv2i32
2963
/* 5007 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 5044
2964
/* 5013 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2965
/* 5016 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5030
2966
/* 5021 */    MCD_OPC_CheckPredicate, 21, 215, 52, 0, // Skip to: 18553
2967
/* 5026 */    MCD_OPC_Decode, 209, 7, 97, // Opcode: VABDuv2i32
2968
/* 5030 */    MCD_OPC_FilterValue, 1, 206, 52, 0, // Skip to: 18553
2969
/* 5035 */    MCD_OPC_CheckPredicate, 21, 201, 52, 0, // Skip to: 18553
2970
/* 5040 */    MCD_OPC_Decode, 211, 7, 98, // Opcode: VABDuv4i32
2971
/* 5044 */    MCD_OPC_FilterValue, 231, 3, 191, 52, 0, // Skip to: 18553
2972
/* 5050 */    MCD_OPC_CheckPredicate, 21, 186, 52, 0, // Skip to: 18553
2973
/* 5055 */    MCD_OPC_CheckField, 6, 1, 0, 179, 52, 0, // Skip to: 18553
2974
/* 5062 */    MCD_OPC_Decode, 195, 7, 99, // Opcode: VABDLuv2i64
2975
/* 5066 */    MCD_OPC_FilterValue, 8, 151, 0, 0, // Skip to: 5222
2976
/* 5071 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
2977
/* 5074 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 5111
2978
/* 5080 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2979
/* 5083 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5097
2980
/* 5088 */    MCD_OPC_CheckPredicate, 21, 148, 52, 0, // Skip to: 18553
2981
/* 5093 */    MCD_OPC_Decode, 131, 8, 97, // Opcode: VADDv2i32
2982
/* 5097 */    MCD_OPC_FilterValue, 1, 139, 52, 0, // Skip to: 18553
2983
/* 5102 */    MCD_OPC_CheckPredicate, 21, 134, 52, 0, // Skip to: 18553
2984
/* 5107 */    MCD_OPC_Decode, 134, 8, 98, // Opcode: VADDv4i32
2985
/* 5111 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5148
2986
/* 5117 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2987
/* 5120 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5134
2988
/* 5125 */    MCD_OPC_CheckPredicate, 21, 111, 52, 0, // Skip to: 18553
2989
/* 5130 */    MCD_OPC_Decode, 208, 13, 104, // Opcode: VMLALsv2i64
2990
/* 5134 */    MCD_OPC_FilterValue, 1, 102, 52, 0, // Skip to: 18553
2991
/* 5139 */    MCD_OPC_CheckPredicate, 21, 97, 52, 0, // Skip to: 18553
2992
/* 5144 */    MCD_OPC_Decode, 204, 14, 116, // Opcode: VMULslv2i32
2993
/* 5148 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 5185
2994
/* 5154 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
2995
/* 5157 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5171
2996
/* 5162 */    MCD_OPC_CheckPredicate, 21, 74, 52, 0, // Skip to: 18553
2997
/* 5167 */    MCD_OPC_Decode, 231, 20, 97, // Opcode: VSUBv2i32
2998
/* 5171 */    MCD_OPC_FilterValue, 1, 65, 52, 0, // Skip to: 18553
2999
/* 5176 */    MCD_OPC_CheckPredicate, 21, 60, 52, 0, // Skip to: 18553
3000
/* 5181 */    MCD_OPC_Decode, 234, 20, 98, // Opcode: VSUBv4i32
3001
/* 5185 */    MCD_OPC_FilterValue, 231, 3, 50, 52, 0, // Skip to: 18553
3002
/* 5191 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3003
/* 5194 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5208
3004
/* 5199 */    MCD_OPC_CheckPredicate, 21, 37, 52, 0, // Skip to: 18553
3005
/* 5204 */    MCD_OPC_Decode, 211, 13, 104, // Opcode: VMLALuv2i64
3006
/* 5208 */    MCD_OPC_FilterValue, 1, 28, 52, 0, // Skip to: 18553
3007
/* 5213 */    MCD_OPC_CheckPredicate, 21, 23, 52, 0, // Skip to: 18553
3008
/* 5218 */    MCD_OPC_Decode, 206, 14, 117, // Opcode: VMULslv4i32
3009
/* 5222 */    MCD_OPC_FilterValue, 9, 136, 0, 0, // Skip to: 5363
3010
/* 5227 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3011
/* 5230 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 5267
3012
/* 5236 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3013
/* 5239 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5253
3014
/* 5244 */    MCD_OPC_CheckPredicate, 21, 248, 51, 0, // Skip to: 18553
3015
/* 5249 */    MCD_OPC_Decode, 228, 13, 105, // Opcode: VMLAv2i32
3016
/* 5253 */    MCD_OPC_FilterValue, 1, 239, 51, 0, // Skip to: 18553
3017
/* 5258 */    MCD_OPC_CheckPredicate, 21, 234, 51, 0, // Skip to: 18553
3018
/* 5263 */    MCD_OPC_Decode, 230, 13, 106, // Opcode: VMLAv4i32
3019
/* 5267 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5304
3020
/* 5273 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3021
/* 5276 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5290
3022
/* 5281 */    MCD_OPC_CheckPredicate, 21, 211, 51, 0, // Skip to: 18553
3023
/* 5286 */    MCD_OPC_Decode, 191, 15, 104, // Opcode: VQDMLALv2i64
3024
/* 5290 */    MCD_OPC_FilterValue, 1, 202, 51, 0, // Skip to: 18553
3025
/* 5295 */    MCD_OPC_CheckPredicate, 21, 197, 51, 0, // Skip to: 18553
3026
/* 5300 */    MCD_OPC_Decode, 200, 14, 116, // Opcode: VMULslfd
3027
/* 5304 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 5341
3028
/* 5310 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3029
/* 5313 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5327
3030
/* 5318 */    MCD_OPC_CheckPredicate, 21, 174, 51, 0, // Skip to: 18553
3031
/* 5323 */    MCD_OPC_Decode, 131, 14, 105, // Opcode: VMLSv2i32
3032
/* 5327 */    MCD_OPC_FilterValue, 1, 165, 51, 0, // Skip to: 18553
3033
/* 5332 */    MCD_OPC_CheckPredicate, 21, 160, 51, 0, // Skip to: 18553
3034
/* 5337 */    MCD_OPC_Decode, 133, 14, 106, // Opcode: VMLSv4i32
3035
/* 5341 */    MCD_OPC_FilterValue, 231, 3, 150, 51, 0, // Skip to: 18553
3036
/* 5347 */    MCD_OPC_CheckPredicate, 21, 145, 51, 0, // Skip to: 18553
3037
/* 5352 */    MCD_OPC_CheckField, 6, 1, 1, 138, 51, 0, // Skip to: 18553
3038
/* 5359 */    MCD_OPC_Decode, 201, 14, 117, // Opcode: VMULslfq
3039
/* 5363 */    MCD_OPC_FilterValue, 10, 121, 0, 0, // Skip to: 5489
3040
/* 5368 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3041
/* 5371 */    MCD_OPC_FilterValue, 228, 3, 16, 0, 0, // Skip to: 5393
3042
/* 5377 */    MCD_OPC_CheckPredicate, 21, 115, 51, 0, // Skip to: 18553
3043
/* 5382 */    MCD_OPC_CheckField, 6, 1, 0, 108, 51, 0, // Skip to: 18553
3044
/* 5389 */    MCD_OPC_Decode, 154, 15, 97, // Opcode: VPMAXs32
3045
/* 5393 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5430
3046
/* 5399 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3047
/* 5402 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5416
3048
/* 5407 */    MCD_OPC_CheckPredicate, 21, 85, 51, 0, // Skip to: 18553
3049
/* 5412 */    MCD_OPC_Decode, 239, 13, 104, // Opcode: VMLSLsv2i64
3050
/* 5416 */    MCD_OPC_FilterValue, 1, 76, 51, 0, // Skip to: 18553
3051
/* 5421 */    MCD_OPC_CheckPredicate, 21, 71, 51, 0, // Skip to: 18553
3052
/* 5426 */    MCD_OPC_Decode, 183, 14, 118, // Opcode: VMULLslsv2i32
3053
/* 5430 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 5452
3054
/* 5436 */    MCD_OPC_CheckPredicate, 21, 56, 51, 0, // Skip to: 18553
3055
/* 5441 */    MCD_OPC_CheckField, 6, 1, 0, 49, 51, 0, // Skip to: 18553
3056
/* 5448 */    MCD_OPC_Decode, 157, 15, 97, // Opcode: VPMAXu32
3057
/* 5452 */    MCD_OPC_FilterValue, 231, 3, 39, 51, 0, // Skip to: 18553
3058
/* 5458 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3059
/* 5461 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5475
3060
/* 5466 */    MCD_OPC_CheckPredicate, 21, 26, 51, 0, // Skip to: 18553
3061
/* 5471 */    MCD_OPC_Decode, 242, 13, 104, // Opcode: VMLSLuv2i64
3062
/* 5475 */    MCD_OPC_FilterValue, 1, 17, 51, 0, // Skip to: 18553
3063
/* 5480 */    MCD_OPC_CheckPredicate, 21, 12, 51, 0, // Skip to: 18553
3064
/* 5485 */    MCD_OPC_Decode, 185, 14, 118, // Opcode: VMULLsluv2i32
3065
/* 5489 */    MCD_OPC_FilterValue, 11, 114, 0, 0, // Skip to: 5608
3066
/* 5494 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3067
/* 5497 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 5534
3068
/* 5503 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3069
/* 5506 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5520
3070
/* 5511 */    MCD_OPC_CheckPredicate, 21, 237, 50, 0, // Skip to: 18553
3071
/* 5516 */    MCD_OPC_Decode, 201, 15, 97, // Opcode: VQDMULHv2i32
3072
/* 5520 */    MCD_OPC_FilterValue, 1, 228, 50, 0, // Skip to: 18553
3073
/* 5525 */    MCD_OPC_CheckPredicate, 21, 223, 50, 0, // Skip to: 18553
3074
/* 5530 */    MCD_OPC_Decode, 203, 15, 98, // Opcode: VQDMULHv4i32
3075
/* 5534 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5571
3076
/* 5540 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3077
/* 5543 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5557
3078
/* 5548 */    MCD_OPC_CheckPredicate, 21, 200, 50, 0, // Skip to: 18553
3079
/* 5553 */    MCD_OPC_Decode, 195, 15, 104, // Opcode: VQDMLSLv2i64
3080
/* 5557 */    MCD_OPC_FilterValue, 1, 191, 50, 0, // Skip to: 18553
3081
/* 5562 */    MCD_OPC_CheckPredicate, 21, 186, 50, 0, // Skip to: 18553
3082
/* 5567 */    MCD_OPC_Decode, 205, 15, 118, // Opcode: VQDMULLslv2i32
3083
/* 5571 */    MCD_OPC_FilterValue, 230, 3, 176, 50, 0, // Skip to: 18553
3084
/* 5577 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3085
/* 5580 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5594
3086
/* 5585 */    MCD_OPC_CheckPredicate, 21, 163, 50, 0, // Skip to: 18553
3087
/* 5590 */    MCD_OPC_Decode, 244, 15, 97, // Opcode: VQRDMULHv2i32
3088
/* 5594 */    MCD_OPC_FilterValue, 1, 154, 50, 0, // Skip to: 18553
3089
/* 5599 */    MCD_OPC_CheckPredicate, 21, 149, 50, 0, // Skip to: 18553
3090
/* 5604 */    MCD_OPC_Decode, 246, 15, 98, // Opcode: VQRDMULHv4i32
3091
/* 5608 */    MCD_OPC_FilterValue, 12, 79, 0, 0, // Skip to: 5692
3092
/* 5613 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3093
/* 5616 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 5654
3094
/* 5621 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3095
/* 5624 */    MCD_OPC_FilterValue, 229, 3, 9, 0, 0, // Skip to: 5639
3096
/* 5630 */    MCD_OPC_CheckPredicate, 21, 118, 50, 0, // Skip to: 18553
3097
/* 5635 */    MCD_OPC_Decode, 187, 14, 99, // Opcode: VMULLsv2i64
3098
/* 5639 */    MCD_OPC_FilterValue, 231, 3, 108, 50, 0, // Skip to: 18553
3099
/* 5645 */    MCD_OPC_CheckPredicate, 21, 103, 50, 0, // Skip to: 18553
3100
/* 5650 */    MCD_OPC_Decode, 190, 14, 99, // Opcode: VMULLuv2i64
3101
/* 5654 */    MCD_OPC_FilterValue, 1, 94, 50, 0, // Skip to: 18553
3102
/* 5659 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3103
/* 5662 */    MCD_OPC_FilterValue, 229, 3, 9, 0, 0, // Skip to: 5677
3104
/* 5668 */    MCD_OPC_CheckPredicate, 21, 80, 50, 0, // Skip to: 18553
3105
/* 5673 */    MCD_OPC_Decode, 197, 15, 116, // Opcode: VQDMULHslv2i32
3106
/* 5677 */    MCD_OPC_FilterValue, 231, 3, 70, 50, 0, // Skip to: 18553
3107
/* 5683 */    MCD_OPC_CheckPredicate, 21, 65, 50, 0, // Skip to: 18553
3108
/* 5688 */    MCD_OPC_Decode, 199, 15, 117, // Opcode: VQDMULHslv4i32
3109
/* 5692 */    MCD_OPC_FilterValue, 13, 136, 0, 0, // Skip to: 5833
3110
/* 5697 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3111
/* 5700 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 5737
3112
/* 5706 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3113
/* 5709 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5723
3114
/* 5714 */    MCD_OPC_CheckPredicate, 21, 34, 50, 0, // Skip to: 18553
3115
/* 5719 */    MCD_OPC_Decode, 225, 20, 97, // Opcode: VSUBfd
3116
/* 5723 */    MCD_OPC_FilterValue, 1, 25, 50, 0, // Skip to: 18553
3117
/* 5728 */    MCD_OPC_CheckPredicate, 21, 20, 50, 0, // Skip to: 18553
3118
/* 5733 */    MCD_OPC_Decode, 226, 20, 98, // Opcode: VSUBfq
3119
/* 5737 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5774
3120
/* 5743 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3121
/* 5746 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5760
3122
/* 5751 */    MCD_OPC_CheckPredicate, 21, 253, 49, 0, // Skip to: 18553
3123
/* 5756 */    MCD_OPC_Decode, 207, 15, 99, // Opcode: VQDMULLv2i64
3124
/* 5760 */    MCD_OPC_FilterValue, 1, 244, 49, 0, // Skip to: 18553
3125
/* 5765 */    MCD_OPC_CheckPredicate, 21, 239, 49, 0, // Skip to: 18553
3126
/* 5770 */    MCD_OPC_Decode, 240, 15, 116, // Opcode: VQRDMULHslv2i32
3127
/* 5774 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 5811
3128
/* 5780 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3129
/* 5783 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5797
3130
/* 5788 */    MCD_OPC_CheckPredicate, 21, 216, 49, 0, // Skip to: 18553
3131
/* 5793 */    MCD_OPC_Decode, 198, 7, 97, // Opcode: VABDfd
3132
/* 5797 */    MCD_OPC_FilterValue, 1, 207, 49, 0, // Skip to: 18553
3133
/* 5802 */    MCD_OPC_CheckPredicate, 21, 202, 49, 0, // Skip to: 18553
3134
/* 5807 */    MCD_OPC_Decode, 199, 7, 98, // Opcode: VABDfq
3135
/* 5811 */    MCD_OPC_FilterValue, 231, 3, 192, 49, 0, // Skip to: 18553
3136
/* 5817 */    MCD_OPC_CheckPredicate, 21, 187, 49, 0, // Skip to: 18553
3137
/* 5822 */    MCD_OPC_CheckField, 6, 1, 1, 180, 49, 0, // Skip to: 18553
3138
/* 5829 */    MCD_OPC_Decode, 242, 15, 117, // Opcode: VQRDMULHslv4i32
3139
/* 5833 */    MCD_OPC_FilterValue, 14, 99, 0, 0, // Skip to: 5937
3140
/* 5838 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3141
/* 5841 */    MCD_OPC_FilterValue, 229, 3, 31, 0, 0, // Skip to: 5878
3142
/* 5847 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3143
/* 5850 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5864
3144
/* 5855 */    MCD_OPC_CheckPredicate, 24, 149, 49, 0, // Skip to: 18553
3145
/* 5860 */    MCD_OPC_Decode, 181, 14, 99, // Opcode: VMULLp64
3146
/* 5864 */    MCD_OPC_FilterValue, 1, 140, 49, 0, // Skip to: 18553
3147
/* 5869 */    MCD_OPC_CheckPredicate, 23, 135, 49, 0, // Skip to: 18553
3148
/* 5874 */    MCD_OPC_Decode, 224, 15, 113, // Opcode: VQRDMLAHslv2i32
3149
/* 5878 */    MCD_OPC_FilterValue, 230, 3, 31, 0, 0, // Skip to: 5915
3150
/* 5884 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3151
/* 5887 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5901
3152
/* 5892 */    MCD_OPC_CheckPredicate, 21, 112, 49, 0, // Skip to: 18553
3153
/* 5897 */    MCD_OPC_Decode, 201, 8, 97, // Opcode: VCGTfd
3154
/* 5901 */    MCD_OPC_FilterValue, 1, 103, 49, 0, // Skip to: 18553
3155
/* 5906 */    MCD_OPC_CheckPredicate, 21, 98, 49, 0, // Skip to: 18553
3156
/* 5911 */    MCD_OPC_Decode, 202, 8, 98, // Opcode: VCGTfq
3157
/* 5915 */    MCD_OPC_FilterValue, 231, 3, 88, 49, 0, // Skip to: 18553
3158
/* 5921 */    MCD_OPC_CheckPredicate, 23, 83, 49, 0, // Skip to: 18553
3159
/* 5926 */    MCD_OPC_CheckField, 6, 1, 1, 76, 49, 0, // Skip to: 18553
3160
/* 5933 */    MCD_OPC_Decode, 226, 15, 114, // Opcode: VQRDMLAHslv4i32
3161
/* 5937 */    MCD_OPC_FilterValue, 15, 67, 49, 0, // Skip to: 18553
3162
/* 5942 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3163
/* 5945 */    MCD_OPC_FilterValue, 228, 3, 31, 0, 0, // Skip to: 5982
3164
/* 5951 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3165
/* 5954 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5968
3166
/* 5959 */    MCD_OPC_CheckPredicate, 21, 45, 49, 0, // Skip to: 18553
3167
/* 5964 */    MCD_OPC_Decode, 186, 13, 97, // Opcode: VMINfd
3168
/* 5968 */    MCD_OPC_FilterValue, 1, 36, 49, 0, // Skip to: 18553
3169
/* 5973 */    MCD_OPC_CheckPredicate, 21, 31, 49, 0, // Skip to: 18553
3170
/* 5978 */    MCD_OPC_Decode, 187, 13, 98, // Opcode: VMINfq
3171
/* 5982 */    MCD_OPC_FilterValue, 229, 3, 16, 0, 0, // Skip to: 6004
3172
/* 5988 */    MCD_OPC_CheckPredicate, 23, 16, 49, 0, // Skip to: 18553
3173
/* 5993 */    MCD_OPC_CheckField, 6, 1, 1, 9, 49, 0, // Skip to: 18553
3174
/* 6000 */    MCD_OPC_Decode, 232, 15, 113, // Opcode: VQRDMLSHslv2i32
3175
/* 6004 */    MCD_OPC_FilterValue, 230, 3, 16, 0, 0, // Skip to: 6026
3176
/* 6010 */    MCD_OPC_CheckPredicate, 21, 250, 48, 0, // Skip to: 18553
3177
/* 6015 */    MCD_OPC_CheckField, 6, 1, 0, 243, 48, 0, // Skip to: 18553
3178
/* 6022 */    MCD_OPC_Decode, 159, 15, 97, // Opcode: VPMINf
3179
/* 6026 */    MCD_OPC_FilterValue, 231, 3, 233, 48, 0, // Skip to: 18553
3180
/* 6032 */    MCD_OPC_CheckPredicate, 23, 228, 48, 0, // Skip to: 18553
3181
/* 6037 */    MCD_OPC_CheckField, 6, 1, 1, 221, 48, 0, // Skip to: 18553
3182
/* 6044 */    MCD_OPC_Decode, 234, 15, 114, // Opcode: VQRDMLSHslv4i32
3183
/* 6048 */    MCD_OPC_FilterValue, 3, 212, 48, 0, // Skip to: 18553
3184
/* 6053 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
3185
/* 6056 */    MCD_OPC_FilterValue, 228, 3, 183, 0, 0, // Skip to: 6245
3186
/* 6062 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
3187
/* 6065 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 6101
3188
/* 6070 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3189
/* 6073 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6087
3190
/* 6078 */    MCD_OPC_CheckPredicate, 21, 182, 48, 0, // Skip to: 18553
3191
/* 6083 */    MCD_OPC_Decode, 137, 18, 101, // Opcode: VSHLsv1i64
3192
/* 6087 */    MCD_OPC_FilterValue, 1, 173, 48, 0, // Skip to: 18553
3193
/* 6092 */    MCD_OPC_CheckPredicate, 21, 168, 48, 0, // Skip to: 18553
3194
/* 6097 */    MCD_OPC_Decode, 139, 18, 102, // Opcode: VSHLsv2i64
3195
/* 6101 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 6137
3196
/* 6106 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3197
/* 6109 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6123
3198
/* 6114 */    MCD_OPC_CheckPredicate, 21, 146, 48, 0, // Skip to: 18553
3199
/* 6119 */    MCD_OPC_Decode, 165, 17, 101, // Opcode: VRSHLsv1i64
3200
/* 6123 */    MCD_OPC_FilterValue, 1, 137, 48, 0, // Skip to: 18553
3201
/* 6128 */    MCD_OPC_CheckPredicate, 21, 132, 48, 0, // Skip to: 18553
3202
/* 6133 */    MCD_OPC_Decode, 167, 17, 102, // Opcode: VRSHLsv2i64
3203
/* 6137 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 6173
3204
/* 6142 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3205
/* 6145 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6159
3206
/* 6150 */    MCD_OPC_CheckPredicate, 21, 110, 48, 0, // Skip to: 18553
3207
/* 6155 */    MCD_OPC_Decode, 130, 8, 97, // Opcode: VADDv1i64
3208
/* 6159 */    MCD_OPC_FilterValue, 1, 101, 48, 0, // Skip to: 18553
3209
/* 6164 */    MCD_OPC_CheckPredicate, 21, 96, 48, 0, // Skip to: 18553
3210
/* 6169 */    MCD_OPC_Decode, 132, 8, 98, // Opcode: VADDv2i64
3211
/* 6173 */    MCD_OPC_FilterValue, 13, 31, 0, 0, // Skip to: 6209
3212
/* 6178 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3213
/* 6181 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6195
3214
/* 6186 */    MCD_OPC_CheckPredicate, 22, 74, 48, 0, // Skip to: 18553
3215
/* 6191 */    MCD_OPC_Decode, 227, 20, 97, // Opcode: VSUBhd
3216
/* 6195 */    MCD_OPC_FilterValue, 1, 65, 48, 0, // Skip to: 18553
3217
/* 6200 */    MCD_OPC_CheckPredicate, 22, 60, 48, 0, // Skip to: 18553
3218
/* 6205 */    MCD_OPC_Decode, 228, 20, 98, // Opcode: VSUBhq
3219
/* 6209 */    MCD_OPC_FilterValue, 15, 51, 48, 0, // Skip to: 18553
3220
/* 6214 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3221
/* 6217 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6231
3222
/* 6222 */    MCD_OPC_CheckPredicate, 22, 38, 48, 0, // Skip to: 18553
3223
/* 6227 */    MCD_OPC_Decode, 188, 13, 97, // Opcode: VMINhd
3224
/* 6231 */    MCD_OPC_FilterValue, 1, 29, 48, 0, // Skip to: 18553
3225
/* 6236 */    MCD_OPC_CheckPredicate, 22, 24, 48, 0, // Skip to: 18553
3226
/* 6241 */    MCD_OPC_Decode, 189, 13, 98, // Opcode: VMINhq
3227
/* 6245 */    MCD_OPC_FilterValue, 229, 3, 119, 0, 0, // Skip to: 6370
3228
/* 6251 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3229
/* 6254 */    MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 6308
3230
/* 6259 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
3231
/* 6262 */    MCD_OPC_FilterValue, 0, 254, 47, 0, // Skip to: 18553
3232
/* 6267 */    MCD_OPC_CheckPredicate, 21, 11, 0, 0, // Skip to: 6283
3233
/* 6272 */    MCD_OPC_CheckField, 8, 2, 0, 4, 0, 0, // Skip to: 6283
3234
/* 6279 */    MCD_OPC_Decode, 143, 10, 119, // Opcode: VEXTd32
3235
/* 6283 */    MCD_OPC_CheckPredicate, 21, 11, 0, 0, // Skip to: 6299
3236
/* 6288 */    MCD_OPC_CheckField, 8, 1, 0, 4, 0, 0, // Skip to: 6299
3237
/* 6295 */    MCD_OPC_Decode, 142, 10, 120, // Opcode: VEXTd16
3238
/* 6299 */    MCD_OPC_CheckPredicate, 21, 217, 47, 0, // Skip to: 18553
3239
/* 6304 */    MCD_OPC_Decode, 144, 10, 121, // Opcode: VEXTd8
3240
/* 6308 */    MCD_OPC_FilterValue, 1, 208, 47, 0, // Skip to: 18553
3241
/* 6313 */    MCD_OPC_CheckPredicate, 21, 11, 0, 0, // Skip to: 6329
3242
/* 6318 */    MCD_OPC_CheckField, 8, 3, 0, 4, 0, 0, // Skip to: 6329
3243
/* 6325 */    MCD_OPC_Decode, 147, 10, 122, // Opcode: VEXTq64
3244
/* 6329 */    MCD_OPC_CheckPredicate, 21, 11, 0, 0, // Skip to: 6345
3245
/* 6334 */    MCD_OPC_CheckField, 8, 2, 0, 4, 0, 0, // Skip to: 6345
3246
/* 6341 */    MCD_OPC_Decode, 146, 10, 123, // Opcode: VEXTq32
3247
/* 6345 */    MCD_OPC_CheckPredicate, 21, 11, 0, 0, // Skip to: 6361
3248
/* 6350 */    MCD_OPC_CheckField, 8, 1, 0, 4, 0, 0, // Skip to: 6361
3249
/* 6357 */    MCD_OPC_Decode, 145, 10, 124, // Opcode: VEXTq16
3250
/* 6361 */    MCD_OPC_CheckPredicate, 21, 155, 47, 0, // Skip to: 18553
3251
/* 6366 */    MCD_OPC_Decode, 148, 10, 125, // Opcode: VEXTq8
3252
/* 6370 */    MCD_OPC_FilterValue, 230, 3, 204, 0, 0, // Skip to: 6580
3253
/* 6376 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
3254
/* 6379 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 6415
3255
/* 6384 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3256
/* 6387 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6401
3257
/* 6392 */    MCD_OPC_CheckPredicate, 21, 124, 47, 0, // Skip to: 18553
3258
/* 6397 */    MCD_OPC_Decode, 145, 18, 101, // Opcode: VSHLuv1i64
3259
/* 6401 */    MCD_OPC_FilterValue, 1, 115, 47, 0, // Skip to: 18553
3260
/* 6406 */    MCD_OPC_CheckPredicate, 21, 110, 47, 0, // Skip to: 18553
3261
/* 6411 */    MCD_OPC_Decode, 147, 18, 102, // Opcode: VSHLuv2i64
3262
/* 6415 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 6451
3263
/* 6420 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3264
/* 6423 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6437
3265
/* 6428 */    MCD_OPC_CheckPredicate, 21, 88, 47, 0, // Skip to: 18553
3266
/* 6433 */    MCD_OPC_Decode, 173, 17, 101, // Opcode: VRSHLuv1i64
3267
/* 6437 */    MCD_OPC_FilterValue, 1, 79, 47, 0, // Skip to: 18553
3268
/* 6442 */    MCD_OPC_CheckPredicate, 21, 74, 47, 0, // Skip to: 18553
3269
/* 6447 */    MCD_OPC_Decode, 175, 17, 102, // Opcode: VRSHLuv2i64
3270
/* 6451 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 6487
3271
/* 6456 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3272
/* 6459 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6473
3273
/* 6464 */    MCD_OPC_CheckPredicate, 21, 52, 47, 0, // Skip to: 18553
3274
/* 6469 */    MCD_OPC_Decode, 230, 20, 97, // Opcode: VSUBv1i64
3275
/* 6473 */    MCD_OPC_FilterValue, 1, 43, 47, 0, // Skip to: 18553
3276
/* 6478 */    MCD_OPC_CheckPredicate, 21, 38, 47, 0, // Skip to: 18553
3277
/* 6483 */    MCD_OPC_Decode, 232, 20, 98, // Opcode: VSUBv2i64
3278
/* 6487 */    MCD_OPC_FilterValue, 13, 31, 0, 0, // Skip to: 6523
3279
/* 6492 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3280
/* 6495 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6509
3281
/* 6500 */    MCD_OPC_CheckPredicate, 22, 16, 47, 0, // Skip to: 18553
3282
/* 6505 */    MCD_OPC_Decode, 200, 7, 97, // Opcode: VABDhd
3283
/* 6509 */    MCD_OPC_FilterValue, 1, 7, 47, 0, // Skip to: 18553
3284
/* 6514 */    MCD_OPC_CheckPredicate, 22, 2, 47, 0, // Skip to: 18553
3285
/* 6519 */    MCD_OPC_Decode, 201, 7, 98, // Opcode: VABDhq
3286
/* 6523 */    MCD_OPC_FilterValue, 14, 31, 0, 0, // Skip to: 6559
3287
/* 6528 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
3288
/* 6531 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6545
3289
/* 6536 */    MCD_OPC_CheckPredicate, 22, 236, 46, 0, // Skip to: 18553
3290
/* 6541 */    MCD_OPC_Decode, 203, 8, 97, // Opcode: VCGThd
3291
/* 6545 */    MCD_OPC_FilterValue, 1, 227, 46, 0, // Skip to: 18553
3292
/* 6550 */    MCD_OPC_CheckPredicate, 22, 222, 46, 0, // Skip to: 18553
3293
/* 6555 */    MCD_OPC_Decode, 204, 8, 98, // Opcode: VCGThq
3294
/* 6559 */    MCD_OPC_FilterValue, 15, 213, 46, 0, // Skip to: 18553
3295
/* 6564 */    MCD_OPC_CheckPredicate, 22, 208, 46, 0, // Skip to: 18553
3296
/* 6569 */    MCD_OPC_CheckField, 6, 1, 0, 201, 46, 0, // Skip to: 18553
3297
/* 6576 */    MCD_OPC_Decode, 160, 15, 97, // Opcode: VPMINh
3298
/* 6580 */    MCD_OPC_FilterValue, 231, 3, 191, 46, 0, // Skip to: 18553
3299
/* 6586 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
3300
/* 6589 */    MCD_OPC_FilterValue, 0, 247, 1, 0, // Skip to: 7097
3301
/* 6594 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3302
/* 6597 */    MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 6661
3303
/* 6602 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3304
/* 6605 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6619
3305
/* 6610 */    MCD_OPC_CheckPredicate, 21, 162, 46, 0, // Skip to: 18553
3306
/* 6615 */    MCD_OPC_Decode, 231, 16, 126, // Opcode: VREV64d8
3307
/* 6619 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 6633
3308
/* 6624 */    MCD_OPC_CheckPredicate, 21, 148, 46, 0, // Skip to: 18553
3309
/* 6629 */    MCD_OPC_Decode, 234, 16, 127, // Opcode: VREV64q8
3310
/* 6633 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 6647
3311
/* 6638 */    MCD_OPC_CheckPredicate, 21, 134, 46, 0, // Skip to: 18553
3312
/* 6643 */    MCD_OPC_Decode, 226, 16, 126, // Opcode: VREV32d8
3313
/* 6647 */    MCD_OPC_FilterValue, 3, 125, 46, 0, // Skip to: 18553
3314
/* 6652 */    MCD_OPC_CheckPredicate, 21, 120, 46, 0, // Skip to: 18553
3315
/* 6657 */    MCD_OPC_Decode, 228, 16, 127, // Opcode: VREV32q8
3316
/* 6661 */    MCD_OPC_FilterValue, 1, 59, 0, 0, // Skip to: 6725
3317
/* 6666 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3318
/* 6669 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6683
3319
/* 6674 */    MCD_OPC_CheckPredicate, 21, 98, 46, 0, // Skip to: 18553
3320
/* 6679 */    MCD_OPC_Decode, 226, 8, 126, // Opcode: VCGTzv8i8
3321
/* 6683 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 6697
3322
/* 6688 */    MCD_OPC_CheckPredicate, 21, 84, 46, 0, // Skip to: 18553
3323
/* 6693 */    MCD_OPC_Decode, 217, 8, 127, // Opcode: VCGTzv16i8
3324
/* 6697 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 6711
3325
/* 6702 */    MCD_OPC_CheckPredicate, 21, 70, 46, 0, // Skip to: 18553
3326
/* 6707 */    MCD_OPC_Decode, 200, 8, 126, // Opcode: VCGEzv8i8
3327
/* 6711 */    MCD_OPC_FilterValue, 3, 61, 46, 0, // Skip to: 18553
3328
/* 6716 */    MCD_OPC_CheckPredicate, 21, 56, 46, 0, // Skip to: 18553
3329
/* 6721 */    MCD_OPC_Decode, 191, 8, 127, // Opcode: VCGEzv16i8
3330
/* 6725 */    MCD_OPC_FilterValue, 2, 63, 0, 0, // Skip to: 6793
3331
/* 6730 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3332
/* 6733 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6748
3333
/* 6738 */    MCD_OPC_CheckPredicate, 21, 34, 46, 0, // Skip to: 18553
3334
/* 6743 */    MCD_OPC_Decode, 237, 20, 128, 1, // Opcode: VSWPd
3335
/* 6748 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 6763
3336
/* 6753 */    MCD_OPC_CheckPredicate, 21, 19, 46, 0, // Skip to: 18553
3337
/* 6758 */    MCD_OPC_Decode, 238, 20, 129, 1, // Opcode: VSWPq
3338
/* 6763 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6778
3339
/* 6768 */    MCD_OPC_CheckPredicate, 21, 4, 46, 0, // Skip to: 18553
3340
/* 6773 */    MCD_OPC_Decode, 149, 21, 128, 1, // Opcode: VTRNd8
3341
/* 6778 */    MCD_OPC_FilterValue, 3, 250, 45, 0, // Skip to: 18553
3342
/* 6783 */    MCD_OPC_CheckPredicate, 21, 245, 45, 0, // Skip to: 18553
3343
/* 6788 */    MCD_OPC_Decode, 152, 21, 129, 1, // Opcode: VTRNq8
3344
/* 6793 */    MCD_OPC_FilterValue, 4, 59, 0, 0, // Skip to: 6857
3345
/* 6798 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3346
/* 6801 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6815
3347
/* 6806 */    MCD_OPC_CheckPredicate, 21, 222, 45, 0, // Skip to: 18553
3348
/* 6811 */    MCD_OPC_Decode, 229, 16, 126, // Opcode: VREV64d16
3349
/* 6815 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 6829
3350
/* 6820 */    MCD_OPC_CheckPredicate, 21, 208, 45, 0, // Skip to: 18553
3351
/* 6825 */    MCD_OPC_Decode, 232, 16, 127, // Opcode: VREV64q16
3352
/* 6829 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 6843
3353
/* 6834 */    MCD_OPC_CheckPredicate, 21, 194, 45, 0, // Skip to: 18553
3354
/* 6839 */    MCD_OPC_Decode, 225, 16, 126, // Opcode: VREV32d16
3355
/* 6843 */    MCD_OPC_FilterValue, 3, 185, 45, 0, // Skip to: 18553
3356
/* 6848 */    MCD_OPC_CheckPredicate, 21, 180, 45, 0, // Skip to: 18553
3357
/* 6853 */    MCD_OPC_Decode, 227, 16, 127, // Opcode: VREV32q16
3358
/* 6857 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 6921
3359
/* 6862 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3360
/* 6865 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6879
3361
/* 6870 */    MCD_OPC_CheckPredicate, 21, 158, 45, 0, // Skip to: 18553
3362
/* 6875 */    MCD_OPC_Decode, 222, 8, 126, // Opcode: VCGTzv4i16
3363
/* 6879 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 6893
3364
/* 6884 */    MCD_OPC_CheckPredicate, 21, 144, 45, 0, // Skip to: 18553
3365
/* 6889 */    MCD_OPC_Decode, 225, 8, 127, // Opcode: VCGTzv8i16
3366
/* 6893 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 6907
3367
/* 6898 */    MCD_OPC_CheckPredicate, 21, 130, 45, 0, // Skip to: 18553
3368
/* 6903 */    MCD_OPC_Decode, 196, 8, 126, // Opcode: VCGEzv4i16
3369
/* 6907 */    MCD_OPC_FilterValue, 3, 121, 45, 0, // Skip to: 18553
3370
/* 6912 */    MCD_OPC_CheckPredicate, 21, 116, 45, 0, // Skip to: 18553
3371
/* 6917 */    MCD_OPC_Decode, 199, 8, 127, // Opcode: VCGEzv8i16
3372
/* 6921 */    MCD_OPC_FilterValue, 6, 33, 0, 0, // Skip to: 6959
3373
/* 6926 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3374
/* 6929 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6944
3375
/* 6934 */    MCD_OPC_CheckPredicate, 21, 94, 45, 0, // Skip to: 18553
3376
/* 6939 */    MCD_OPC_Decode, 147, 21, 128, 1, // Opcode: VTRNd16
3377
/* 6944 */    MCD_OPC_FilterValue, 3, 84, 45, 0, // Skip to: 18553
3378
/* 6949 */    MCD_OPC_CheckPredicate, 21, 79, 45, 0, // Skip to: 18553
3379
/* 6954 */    MCD_OPC_Decode, 150, 21, 129, 1, // Opcode: VTRNq16
3380
/* 6959 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 6995
3381
/* 6964 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3382
/* 6967 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 6981
3383
/* 6972 */    MCD_OPC_CheckPredicate, 21, 56, 45, 0, // Skip to: 18553
3384
/* 6977 */    MCD_OPC_Decode, 230, 16, 126, // Opcode: VREV64d32
3385
/* 6981 */    MCD_OPC_FilterValue, 1, 47, 45, 0, // Skip to: 18553
3386
/* 6986 */    MCD_OPC_CheckPredicate, 21, 42, 45, 0, // Skip to: 18553
3387
/* 6991 */    MCD_OPC_Decode, 233, 16, 127, // Opcode: VREV64q32
3388
/* 6995 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 7059
3389
/* 7000 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3390
/* 7003 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7017
3391
/* 7008 */    MCD_OPC_CheckPredicate, 21, 20, 45, 0, // Skip to: 18553
3392
/* 7013 */    MCD_OPC_Decode, 219, 8, 126, // Opcode: VCGTzv2i32
3393
/* 7017 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7031
3394
/* 7022 */    MCD_OPC_CheckPredicate, 21, 6, 45, 0, // Skip to: 18553
3395
/* 7027 */    MCD_OPC_Decode, 223, 8, 127, // Opcode: VCGTzv4i32
3396
/* 7031 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7045
3397
/* 7036 */    MCD_OPC_CheckPredicate, 21, 248, 44, 0, // Skip to: 18553
3398
/* 7041 */    MCD_OPC_Decode, 193, 8, 126, // Opcode: VCGEzv2i32
3399
/* 7045 */    MCD_OPC_FilterValue, 3, 239, 44, 0, // Skip to: 18553
3400
/* 7050 */    MCD_OPC_CheckPredicate, 21, 234, 44, 0, // Skip to: 18553
3401
/* 7055 */    MCD_OPC_Decode, 197, 8, 127, // Opcode: VCGEzv4i32
3402
/* 7059 */    MCD_OPC_FilterValue, 10, 225, 44, 0, // Skip to: 18553
3403
/* 7064 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3404
/* 7067 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7082
3405
/* 7072 */    MCD_OPC_CheckPredicate, 21, 212, 44, 0, // Skip to: 18553
3406
/* 7077 */    MCD_OPC_Decode, 148, 21, 128, 1, // Opcode: VTRNd32
3407
/* 7082 */    MCD_OPC_FilterValue, 3, 202, 44, 0, // Skip to: 18553
3408
/* 7087 */    MCD_OPC_CheckPredicate, 21, 197, 44, 0, // Skip to: 18553
3409
/* 7092 */    MCD_OPC_Decode, 151, 21, 129, 1, // Opcode: VTRNq32
3410
/* 7097 */    MCD_OPC_FilterValue, 1, 149, 1, 0, // Skip to: 7507
3411
/* 7102 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3412
/* 7105 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 7141
3413
/* 7110 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3414
/* 7113 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7127
3415
/* 7118 */    MCD_OPC_CheckPredicate, 21, 166, 44, 0, // Skip to: 18553
3416
/* 7123 */    MCD_OPC_Decode, 223, 16, 126, // Opcode: VREV16d8
3417
/* 7127 */    MCD_OPC_FilterValue, 1, 157, 44, 0, // Skip to: 18553
3418
/* 7132 */    MCD_OPC_CheckPredicate, 21, 152, 44, 0, // Skip to: 18553
3419
/* 7137 */    MCD_OPC_Decode, 224, 16, 127, // Opcode: VREV16q8
3420
/* 7141 */    MCD_OPC_FilterValue, 1, 59, 0, 0, // Skip to: 7205
3421
/* 7146 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3422
/* 7149 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7163
3423
/* 7154 */    MCD_OPC_CheckPredicate, 21, 130, 44, 0, // Skip to: 18553
3424
/* 7159 */    MCD_OPC_Decode, 174, 8, 126, // Opcode: VCEQzv8i8
3425
/* 7163 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7177
3426
/* 7168 */    MCD_OPC_CheckPredicate, 21, 116, 44, 0, // Skip to: 18553
3427
/* 7173 */    MCD_OPC_Decode, 165, 8, 127, // Opcode: VCEQzv16i8
3428
/* 7177 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7191
3429
/* 7182 */    MCD_OPC_CheckPredicate, 21, 102, 44, 0, // Skip to: 18553
3430
/* 7187 */    MCD_OPC_Decode, 236, 8, 126, // Opcode: VCLEzv8i8
3431
/* 7191 */    MCD_OPC_FilterValue, 3, 93, 44, 0, // Skip to: 18553
3432
/* 7196 */    MCD_OPC_CheckPredicate, 21, 88, 44, 0, // Skip to: 18553
3433
/* 7201 */    MCD_OPC_Decode, 227, 8, 127, // Opcode: VCLEzv16i8
3434
/* 7205 */    MCD_OPC_FilterValue, 2, 63, 0, 0, // Skip to: 7273
3435
/* 7210 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3436
/* 7213 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7228
3437
/* 7218 */    MCD_OPC_CheckPredicate, 21, 66, 44, 0, // Skip to: 18553
3438
/* 7223 */    MCD_OPC_Decode, 173, 21, 128, 1, // Opcode: VUZPd8
3439
/* 7228 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7243
3440
/* 7233 */    MCD_OPC_CheckPredicate, 21, 51, 44, 0, // Skip to: 18553
3441
/* 7238 */    MCD_OPC_Decode, 176, 21, 129, 1, // Opcode: VUZPq8
3442
/* 7243 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7258
3443
/* 7248 */    MCD_OPC_CheckPredicate, 21, 36, 44, 0, // Skip to: 18553
3444
/* 7253 */    MCD_OPC_Decode, 178, 21, 128, 1, // Opcode: VZIPd8
3445
/* 7258 */    MCD_OPC_FilterValue, 3, 26, 44, 0, // Skip to: 18553
3446
/* 7263 */    MCD_OPC_CheckPredicate, 21, 21, 44, 0, // Skip to: 18553
3447
/* 7268 */    MCD_OPC_Decode, 181, 21, 129, 1, // Opcode: VZIPq8
3448
/* 7273 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 7337
3449
/* 7278 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3450
/* 7281 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7295
3451
/* 7286 */    MCD_OPC_CheckPredicate, 21, 254, 43, 0, // Skip to: 18553
3452
/* 7291 */    MCD_OPC_Decode, 170, 8, 126, // Opcode: VCEQzv4i16
3453
/* 7295 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7309
3454
/* 7300 */    MCD_OPC_CheckPredicate, 21, 240, 43, 0, // Skip to: 18553
3455
/* 7305 */    MCD_OPC_Decode, 173, 8, 127, // Opcode: VCEQzv8i16
3456
/* 7309 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7323
3457
/* 7314 */    MCD_OPC_CheckPredicate, 21, 226, 43, 0, // Skip to: 18553
3458
/* 7319 */    MCD_OPC_Decode, 232, 8, 126, // Opcode: VCLEzv4i16
3459
/* 7323 */    MCD_OPC_FilterValue, 3, 217, 43, 0, // Skip to: 18553
3460
/* 7328 */    MCD_OPC_CheckPredicate, 21, 212, 43, 0, // Skip to: 18553
3461
/* 7333 */    MCD_OPC_Decode, 235, 8, 127, // Opcode: VCLEzv8i16
3462
/* 7337 */    MCD_OPC_FilterValue, 6, 63, 0, 0, // Skip to: 7405
3463
/* 7342 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3464
/* 7345 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7360
3465
/* 7350 */    MCD_OPC_CheckPredicate, 21, 190, 43, 0, // Skip to: 18553
3466
/* 7355 */    MCD_OPC_Decode, 172, 21, 128, 1, // Opcode: VUZPd16
3467
/* 7360 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7375
3468
/* 7365 */    MCD_OPC_CheckPredicate, 21, 175, 43, 0, // Skip to: 18553
3469
/* 7370 */    MCD_OPC_Decode, 174, 21, 129, 1, // Opcode: VUZPq16
3470
/* 7375 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7390
3471
/* 7380 */    MCD_OPC_CheckPredicate, 21, 160, 43, 0, // Skip to: 18553
3472
/* 7385 */    MCD_OPC_Decode, 177, 21, 128, 1, // Opcode: VZIPd16
3473
/* 7390 */    MCD_OPC_FilterValue, 3, 150, 43, 0, // Skip to: 18553
3474
/* 7395 */    MCD_OPC_CheckPredicate, 21, 145, 43, 0, // Skip to: 18553
3475
/* 7400 */    MCD_OPC_Decode, 179, 21, 129, 1, // Opcode: VZIPq16
3476
/* 7405 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 7469
3477
/* 7410 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3478
/* 7413 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7427
3479
/* 7418 */    MCD_OPC_CheckPredicate, 21, 122, 43, 0, // Skip to: 18553
3480
/* 7423 */    MCD_OPC_Decode, 167, 8, 126, // Opcode: VCEQzv2i32
3481
/* 7427 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7441
3482
/* 7432 */    MCD_OPC_CheckPredicate, 21, 108, 43, 0, // Skip to: 18553
3483
/* 7437 */    MCD_OPC_Decode, 171, 8, 127, // Opcode: VCEQzv4i32
3484
/* 7441 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7455
3485
/* 7446 */    MCD_OPC_CheckPredicate, 21, 94, 43, 0, // Skip to: 18553
3486
/* 7451 */    MCD_OPC_Decode, 229, 8, 126, // Opcode: VCLEzv2i32
3487
/* 7455 */    MCD_OPC_FilterValue, 3, 85, 43, 0, // Skip to: 18553
3488
/* 7460 */    MCD_OPC_CheckPredicate, 21, 80, 43, 0, // Skip to: 18553
3489
/* 7465 */    MCD_OPC_Decode, 233, 8, 127, // Opcode: VCLEzv4i32
3490
/* 7469 */    MCD_OPC_FilterValue, 10, 71, 43, 0, // Skip to: 18553
3491
/* 7474 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3492
/* 7477 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7492
3493
/* 7482 */    MCD_OPC_CheckPredicate, 21, 58, 43, 0, // Skip to: 18553
3494
/* 7487 */    MCD_OPC_Decode, 175, 21, 129, 1, // Opcode: VUZPq32
3495
/* 7492 */    MCD_OPC_FilterValue, 3, 48, 43, 0, // Skip to: 18553
3496
/* 7497 */    MCD_OPC_CheckPredicate, 21, 43, 43, 0, // Skip to: 18553
3497
/* 7502 */    MCD_OPC_Decode, 180, 21, 129, 1, // Opcode: VZIPq32
3498
/* 7507 */    MCD_OPC_FilterValue, 2, 251, 1, 0, // Skip to: 8019
3499
/* 7512 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3500
/* 7515 */    MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 7579
3501
/* 7520 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3502
/* 7523 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7537
3503
/* 7528 */    MCD_OPC_CheckPredicate, 21, 12, 43, 0, // Skip to: 18553
3504
/* 7533 */    MCD_OPC_Decode, 139, 15, 126, // Opcode: VPADDLsv8i8
3505
/* 7537 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7551
3506
/* 7542 */    MCD_OPC_CheckPredicate, 21, 254, 42, 0, // Skip to: 18553
3507
/* 7547 */    MCD_OPC_Decode, 134, 15, 127, // Opcode: VPADDLsv16i8
3508
/* 7551 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7565
3509
/* 7556 */    MCD_OPC_CheckPredicate, 21, 240, 42, 0, // Skip to: 18553
3510
/* 7561 */    MCD_OPC_Decode, 145, 15, 126, // Opcode: VPADDLuv8i8
3511
/* 7565 */    MCD_OPC_FilterValue, 3, 231, 42, 0, // Skip to: 18553
3512
/* 7570 */    MCD_OPC_CheckPredicate, 21, 226, 42, 0, // Skip to: 18553
3513
/* 7575 */    MCD_OPC_Decode, 140, 15, 127, // Opcode: VPADDLuv16i8
3514
/* 7579 */    MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 7615
3515
/* 7584 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3516
/* 7587 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7601
3517
/* 7592 */    MCD_OPC_CheckPredicate, 21, 204, 42, 0, // Skip to: 18553
3518
/* 7597 */    MCD_OPC_Decode, 252, 8, 126, // Opcode: VCLTzv8i8
3519
/* 7601 */    MCD_OPC_FilterValue, 1, 195, 42, 0, // Skip to: 18553
3520
/* 7606 */    MCD_OPC_CheckPredicate, 21, 190, 42, 0, // Skip to: 18553
3521
/* 7611 */    MCD_OPC_Decode, 243, 8, 127, // Opcode: VCLTzv16i8
3522
/* 7615 */    MCD_OPC_FilterValue, 2, 63, 0, 0, // Skip to: 7683
3523
/* 7620 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3524
/* 7623 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7638
3525
/* 7628 */    MCD_OPC_CheckPredicate, 21, 168, 42, 0, // Skip to: 18553
3526
/* 7633 */    MCD_OPC_Decode, 148, 14, 130, 1, // Opcode: VMOVNv8i8
3527
/* 7638 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7653
3528
/* 7643 */    MCD_OPC_CheckPredicate, 21, 153, 42, 0, // Skip to: 18553
3529
/* 7648 */    MCD_OPC_Decode, 211, 15, 130, 1, // Opcode: VQMOVNsuv8i8
3530
/* 7653 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7668
3531
/* 7658 */    MCD_OPC_CheckPredicate, 21, 138, 42, 0, // Skip to: 18553
3532
/* 7663 */    MCD_OPC_Decode, 214, 15, 130, 1, // Opcode: VQMOVNsv8i8
3533
/* 7668 */    MCD_OPC_FilterValue, 3, 128, 42, 0, // Skip to: 18553
3534
/* 7673 */    MCD_OPC_CheckPredicate, 21, 123, 42, 0, // Skip to: 18553
3535
/* 7678 */    MCD_OPC_Decode, 217, 15, 130, 1, // Opcode: VQMOVNuv8i8
3536
/* 7683 */    MCD_OPC_FilterValue, 4, 59, 0, 0, // Skip to: 7747
3537
/* 7688 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3538
/* 7691 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7705
3539
/* 7696 */    MCD_OPC_CheckPredicate, 21, 100, 42, 0, // Skip to: 18553
3540
/* 7701 */    MCD_OPC_Decode, 136, 15, 126, // Opcode: VPADDLsv4i16
3541
/* 7705 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7719
3542
/* 7710 */    MCD_OPC_CheckPredicate, 21, 86, 42, 0, // Skip to: 18553
3543
/* 7715 */    MCD_OPC_Decode, 138, 15, 127, // Opcode: VPADDLsv8i16
3544
/* 7719 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7733
3545
/* 7724 */    MCD_OPC_CheckPredicate, 21, 72, 42, 0, // Skip to: 18553
3546
/* 7729 */    MCD_OPC_Decode, 142, 15, 126, // Opcode: VPADDLuv4i16
3547
/* 7733 */    MCD_OPC_FilterValue, 3, 63, 42, 0, // Skip to: 18553
3548
/* 7738 */    MCD_OPC_CheckPredicate, 21, 58, 42, 0, // Skip to: 18553
3549
/* 7743 */    MCD_OPC_Decode, 144, 15, 127, // Opcode: VPADDLuv8i16
3550
/* 7747 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 7783
3551
/* 7752 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3552
/* 7755 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7769
3553
/* 7760 */    MCD_OPC_CheckPredicate, 21, 36, 42, 0, // Skip to: 18553
3554
/* 7765 */    MCD_OPC_Decode, 248, 8, 126, // Opcode: VCLTzv4i16
3555
/* 7769 */    MCD_OPC_FilterValue, 1, 27, 42, 0, // Skip to: 18553
3556
/* 7774 */    MCD_OPC_CheckPredicate, 21, 22, 42, 0, // Skip to: 18553
3557
/* 7779 */    MCD_OPC_Decode, 251, 8, 127, // Opcode: VCLTzv8i16
3558
/* 7783 */    MCD_OPC_FilterValue, 6, 63, 0, 0, // Skip to: 7851
3559
/* 7788 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3560
/* 7791 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7806
3561
/* 7796 */    MCD_OPC_CheckPredicate, 21, 0, 42, 0, // Skip to: 18553
3562
/* 7801 */    MCD_OPC_Decode, 147, 14, 130, 1, // Opcode: VMOVNv4i16
3563
/* 7806 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7821
3564
/* 7811 */    MCD_OPC_CheckPredicate, 21, 241, 41, 0, // Skip to: 18553
3565
/* 7816 */    MCD_OPC_Decode, 210, 15, 130, 1, // Opcode: VQMOVNsuv4i16
3566
/* 7821 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7836
3567
/* 7826 */    MCD_OPC_CheckPredicate, 21, 226, 41, 0, // Skip to: 18553
3568
/* 7831 */    MCD_OPC_Decode, 213, 15, 130, 1, // Opcode: VQMOVNsv4i16
3569
/* 7836 */    MCD_OPC_FilterValue, 3, 216, 41, 0, // Skip to: 18553
3570
/* 7841 */    MCD_OPC_CheckPredicate, 21, 211, 41, 0, // Skip to: 18553
3571
/* 7846 */    MCD_OPC_Decode, 216, 15, 130, 1, // Opcode: VQMOVNuv4i16
3572
/* 7851 */    MCD_OPC_FilterValue, 8, 59, 0, 0, // Skip to: 7915
3573
/* 7856 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3574
/* 7859 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7873
3575
/* 7864 */    MCD_OPC_CheckPredicate, 21, 188, 41, 0, // Skip to: 18553
3576
/* 7869 */    MCD_OPC_Decode, 135, 15, 126, // Opcode: VPADDLsv2i32
3577
/* 7873 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 7887
3578
/* 7878 */    MCD_OPC_CheckPredicate, 21, 174, 41, 0, // Skip to: 18553
3579
/* 7883 */    MCD_OPC_Decode, 137, 15, 127, // Opcode: VPADDLsv4i32
3580
/* 7887 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 7901
3581
/* 7892 */    MCD_OPC_CheckPredicate, 21, 160, 41, 0, // Skip to: 18553
3582
/* 7897 */    MCD_OPC_Decode, 141, 15, 126, // Opcode: VPADDLuv2i32
3583
/* 7901 */    MCD_OPC_FilterValue, 3, 151, 41, 0, // Skip to: 18553
3584
/* 7906 */    MCD_OPC_CheckPredicate, 21, 146, 41, 0, // Skip to: 18553
3585
/* 7911 */    MCD_OPC_Decode, 143, 15, 127, // Opcode: VPADDLuv4i32
3586
/* 7915 */    MCD_OPC_FilterValue, 9, 31, 0, 0, // Skip to: 7951
3587
/* 7920 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3588
/* 7923 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 7937
3589
/* 7928 */    MCD_OPC_CheckPredicate, 21, 124, 41, 0, // Skip to: 18553
3590
/* 7933 */    MCD_OPC_Decode, 245, 8, 126, // Opcode: VCLTzv2i32
3591
/* 7937 */    MCD_OPC_FilterValue, 1, 115, 41, 0, // Skip to: 18553
3592
/* 7942 */    MCD_OPC_CheckPredicate, 21, 110, 41, 0, // Skip to: 18553
3593
/* 7947 */    MCD_OPC_Decode, 249, 8, 127, // Opcode: VCLTzv4i32
3594
/* 7951 */    MCD_OPC_FilterValue, 10, 101, 41, 0, // Skip to: 18553
3595
/* 7956 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3596
/* 7959 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7974
3597
/* 7964 */    MCD_OPC_CheckPredicate, 21, 88, 41, 0, // Skip to: 18553
3598
/* 7969 */    MCD_OPC_Decode, 146, 14, 130, 1, // Opcode: VMOVNv2i32
3599
/* 7974 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7989
3600
/* 7979 */    MCD_OPC_CheckPredicate, 21, 73, 41, 0, // Skip to: 18553
3601
/* 7984 */    MCD_OPC_Decode, 209, 15, 130, 1, // Opcode: VQMOVNsuv2i32
3602
/* 7989 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 8004
3603
/* 7994 */    MCD_OPC_CheckPredicate, 21, 58, 41, 0, // Skip to: 18553
3604
/* 7999 */    MCD_OPC_Decode, 212, 15, 130, 1, // Opcode: VQMOVNsv2i32
3605
/* 8004 */    MCD_OPC_FilterValue, 3, 48, 41, 0, // Skip to: 18553
3606
/* 8009 */    MCD_OPC_CheckPredicate, 21, 43, 41, 0, // Skip to: 18553
3607
/* 8014 */    MCD_OPC_Decode, 215, 15, 130, 1, // Opcode: VQMOVNuv2i32
3608
/* 8019 */    MCD_OPC_FilterValue, 3, 5, 1, 0, // Skip to: 8285
3609
/* 8024 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3610
/* 8027 */    MCD_OPC_FilterValue, 1, 59, 0, 0, // Skip to: 8091
3611
/* 8032 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3612
/* 8035 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8049
3613
/* 8040 */    MCD_OPC_CheckPredicate, 21, 12, 41, 0, // Skip to: 18553
3614
/* 8045 */    MCD_OPC_Decode, 226, 7, 126, // Opcode: VABSv8i8
3615
/* 8049 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8063
3616
/* 8054 */    MCD_OPC_CheckPredicate, 21, 254, 40, 0, // Skip to: 18553
3617
/* 8059 */    MCD_OPC_Decode, 221, 7, 127, // Opcode: VABSv16i8
3618
/* 8063 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8077
3619
/* 8068 */    MCD_OPC_CheckPredicate, 21, 240, 40, 0, // Skip to: 18553
3620
/* 8073 */    MCD_OPC_Decode, 231, 14, 126, // Opcode: VNEGs8d
3621
/* 8077 */    MCD_OPC_FilterValue, 3, 231, 40, 0, // Skip to: 18553
3622
/* 8082 */    MCD_OPC_CheckPredicate, 21, 226, 40, 0, // Skip to: 18553
3623
/* 8087 */    MCD_OPC_Decode, 232, 14, 127, // Opcode: VNEGs8q
3624
/* 8091 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 8113
3625
/* 8096 */    MCD_OPC_CheckPredicate, 21, 212, 40, 0, // Skip to: 18553
3626
/* 8101 */    MCD_OPC_CheckField, 6, 2, 0, 205, 40, 0, // Skip to: 18553
3627
/* 8108 */    MCD_OPC_Decode, 249, 17, 131, 1, // Opcode: VSHLLi8
3628
/* 8113 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 8177
3629
/* 8118 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3630
/* 8121 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8135
3631
/* 8126 */    MCD_OPC_CheckPredicate, 21, 182, 40, 0, // Skip to: 18553
3632
/* 8131 */    MCD_OPC_Decode, 223, 7, 126, // Opcode: VABSv4i16
3633
/* 8135 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8149
3634
/* 8140 */    MCD_OPC_CheckPredicate, 21, 168, 40, 0, // Skip to: 18553
3635
/* 8145 */    MCD_OPC_Decode, 225, 7, 127, // Opcode: VABSv8i16
3636
/* 8149 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8163
3637
/* 8154 */    MCD_OPC_CheckPredicate, 21, 154, 40, 0, // Skip to: 18553
3638
/* 8159 */    MCD_OPC_Decode, 227, 14, 126, // Opcode: VNEGs16d
3639
/* 8163 */    MCD_OPC_FilterValue, 3, 145, 40, 0, // Skip to: 18553
3640
/* 8168 */    MCD_OPC_CheckPredicate, 21, 140, 40, 0, // Skip to: 18553
3641
/* 8173 */    MCD_OPC_Decode, 228, 14, 127, // Opcode: VNEGs16q
3642
/* 8177 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 8199
3643
/* 8182 */    MCD_OPC_CheckPredicate, 21, 126, 40, 0, // Skip to: 18553
3644
/* 8187 */    MCD_OPC_CheckField, 6, 2, 0, 119, 40, 0, // Skip to: 18553
3645
/* 8194 */    MCD_OPC_Decode, 247, 17, 131, 1, // Opcode: VSHLLi16
3646
/* 8199 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 8263
3647
/* 8204 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3648
/* 8207 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8221
3649
/* 8212 */    MCD_OPC_CheckPredicate, 21, 96, 40, 0, // Skip to: 18553
3650
/* 8217 */    MCD_OPC_Decode, 222, 7, 126, // Opcode: VABSv2i32
3651
/* 8221 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8235
3652
/* 8226 */    MCD_OPC_CheckPredicate, 21, 82, 40, 0, // Skip to: 18553
3653
/* 8231 */    MCD_OPC_Decode, 224, 7, 127, // Opcode: VABSv4i32
3654
/* 8235 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8249
3655
/* 8240 */    MCD_OPC_CheckPredicate, 21, 68, 40, 0, // Skip to: 18553
3656
/* 8245 */    MCD_OPC_Decode, 229, 14, 126, // Opcode: VNEGs32d
3657
/* 8249 */    MCD_OPC_FilterValue, 3, 59, 40, 0, // Skip to: 18553
3658
/* 8254 */    MCD_OPC_CheckPredicate, 21, 54, 40, 0, // Skip to: 18553
3659
/* 8259 */    MCD_OPC_Decode, 230, 14, 127, // Opcode: VNEGs32q
3660
/* 8263 */    MCD_OPC_FilterValue, 10, 45, 40, 0, // Skip to: 18553
3661
/* 8268 */    MCD_OPC_CheckPredicate, 21, 40, 40, 0, // Skip to: 18553
3662
/* 8273 */    MCD_OPC_CheckField, 6, 2, 0, 33, 40, 0, // Skip to: 18553
3663
/* 8280 */    MCD_OPC_Decode, 248, 17, 131, 1, // Opcode: VSHLLi32
3664
/* 8285 */    MCD_OPC_FilterValue, 4, 131, 1, 0, // Skip to: 8677
3665
/* 8290 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3666
/* 8293 */    MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 8357
3667
/* 8298 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3668
/* 8301 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8315
3669
/* 8306 */    MCD_OPC_CheckPredicate, 21, 2, 40, 0, // Skip to: 18553
3670
/* 8311 */    MCD_OPC_Decode, 242, 8, 126, // Opcode: VCLSv8i8
3671
/* 8315 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8329
3672
/* 8320 */    MCD_OPC_CheckPredicate, 21, 244, 39, 0, // Skip to: 18553
3673
/* 8325 */    MCD_OPC_Decode, 237, 8, 127, // Opcode: VCLSv16i8
3674
/* 8329 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8343
3675
/* 8334 */    MCD_OPC_CheckPredicate, 21, 230, 39, 0, // Skip to: 18553
3676
/* 8339 */    MCD_OPC_Decode, 130, 9, 126, // Opcode: VCLZv8i8
3677
/* 8343 */    MCD_OPC_FilterValue, 3, 221, 39, 0, // Skip to: 18553
3678
/* 8348 */    MCD_OPC_CheckPredicate, 21, 216, 39, 0, // Skip to: 18553
3679
/* 8353 */    MCD_OPC_Decode, 253, 8, 127, // Opcode: VCLZv16i8
3680
/* 8357 */    MCD_OPC_FilterValue, 4, 59, 0, 0, // Skip to: 8421
3681
/* 8362 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3682
/* 8365 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8379
3683
/* 8370 */    MCD_OPC_CheckPredicate, 21, 194, 39, 0, // Skip to: 18553
3684
/* 8375 */    MCD_OPC_Decode, 239, 8, 126, // Opcode: VCLSv4i16
3685
/* 8379 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8393
3686
/* 8384 */    MCD_OPC_CheckPredicate, 21, 180, 39, 0, // Skip to: 18553
3687
/* 8389 */    MCD_OPC_Decode, 241, 8, 127, // Opcode: VCLSv8i16
3688
/* 8393 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8407
3689
/* 8398 */    MCD_OPC_CheckPredicate, 21, 166, 39, 0, // Skip to: 18553
3690
/* 8403 */    MCD_OPC_Decode, 255, 8, 126, // Opcode: VCLZv4i16
3691
/* 8407 */    MCD_OPC_FilterValue, 3, 157, 39, 0, // Skip to: 18553
3692
/* 8412 */    MCD_OPC_CheckPredicate, 21, 152, 39, 0, // Skip to: 18553
3693
/* 8417 */    MCD_OPC_Decode, 129, 9, 127, // Opcode: VCLZv8i16
3694
/* 8421 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 8485
3695
/* 8426 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3696
/* 8429 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8443
3697
/* 8434 */    MCD_OPC_CheckPredicate, 22, 130, 39, 0, // Skip to: 18553
3698
/* 8439 */    MCD_OPC_Decode, 220, 8, 126, // Opcode: VCGTzv4f16
3699
/* 8443 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8457
3700
/* 8448 */    MCD_OPC_CheckPredicate, 22, 116, 39, 0, // Skip to: 18553
3701
/* 8453 */    MCD_OPC_Decode, 224, 8, 127, // Opcode: VCGTzv8f16
3702
/* 8457 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8471
3703
/* 8462 */    MCD_OPC_CheckPredicate, 22, 102, 39, 0, // Skip to: 18553
3704
/* 8467 */    MCD_OPC_Decode, 194, 8, 126, // Opcode: VCGEzv4f16
3705
/* 8471 */    MCD_OPC_FilterValue, 3, 93, 39, 0, // Skip to: 18553
3706
/* 8476 */    MCD_OPC_CheckPredicate, 22, 88, 39, 0, // Skip to: 18553
3707
/* 8481 */    MCD_OPC_Decode, 198, 8, 127, // Opcode: VCGEzv8f16
3708
/* 8485 */    MCD_OPC_FilterValue, 8, 59, 0, 0, // Skip to: 8549
3709
/* 8490 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3710
/* 8493 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8507
3711
/* 8498 */    MCD_OPC_CheckPredicate, 21, 66, 39, 0, // Skip to: 18553
3712
/* 8503 */    MCD_OPC_Decode, 238, 8, 126, // Opcode: VCLSv2i32
3713
/* 8507 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8521
3714
/* 8512 */    MCD_OPC_CheckPredicate, 21, 52, 39, 0, // Skip to: 18553
3715
/* 8517 */    MCD_OPC_Decode, 240, 8, 127, // Opcode: VCLSv4i32
3716
/* 8521 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8535
3717
/* 8526 */    MCD_OPC_CheckPredicate, 21, 38, 39, 0, // Skip to: 18553
3718
/* 8531 */    MCD_OPC_Decode, 254, 8, 126, // Opcode: VCLZv2i32
3719
/* 8535 */    MCD_OPC_FilterValue, 3, 29, 39, 0, // Skip to: 18553
3720
/* 8540 */    MCD_OPC_CheckPredicate, 21, 24, 39, 0, // Skip to: 18553
3721
/* 8545 */    MCD_OPC_Decode, 128, 9, 127, // Opcode: VCLZv4i32
3722
/* 8549 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 8613
3723
/* 8554 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3724
/* 8557 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8571
3725
/* 8562 */    MCD_OPC_CheckPredicate, 21, 2, 39, 0, // Skip to: 18553
3726
/* 8567 */    MCD_OPC_Decode, 218, 8, 126, // Opcode: VCGTzv2f32
3727
/* 8571 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8585
3728
/* 8576 */    MCD_OPC_CheckPredicate, 21, 244, 38, 0, // Skip to: 18553
3729
/* 8581 */    MCD_OPC_Decode, 221, 8, 127, // Opcode: VCGTzv4f32
3730
/* 8585 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8599
3731
/* 8590 */    MCD_OPC_CheckPredicate, 21, 230, 38, 0, // Skip to: 18553
3732
/* 8595 */    MCD_OPC_Decode, 192, 8, 126, // Opcode: VCGEzv2f32
3733
/* 8599 */    MCD_OPC_FilterValue, 3, 221, 38, 0, // Skip to: 18553
3734
/* 8604 */    MCD_OPC_CheckPredicate, 21, 216, 38, 0, // Skip to: 18553
3735
/* 8609 */    MCD_OPC_Decode, 195, 8, 127, // Opcode: VCGEzv4f32
3736
/* 8613 */    MCD_OPC_FilterValue, 11, 207, 38, 0, // Skip to: 18553
3737
/* 8618 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3738
/* 8621 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8635
3739
/* 8626 */    MCD_OPC_CheckPredicate, 21, 194, 38, 0, // Skip to: 18553
3740
/* 8631 */    MCD_OPC_Decode, 213, 16, 126, // Opcode: VRECPEd
3741
/* 8635 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8649
3742
/* 8640 */    MCD_OPC_CheckPredicate, 21, 180, 38, 0, // Skip to: 18553
3743
/* 8645 */    MCD_OPC_Decode, 218, 16, 127, // Opcode: VRECPEq
3744
/* 8649 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8663
3745
/* 8654 */    MCD_OPC_CheckPredicate, 21, 166, 38, 0, // Skip to: 18553
3746
/* 8659 */    MCD_OPC_Decode, 199, 17, 126, // Opcode: VRSQRTEd
3747
/* 8663 */    MCD_OPC_FilterValue, 3, 157, 38, 0, // Skip to: 18553
3748
/* 8668 */    MCD_OPC_CheckPredicate, 21, 152, 38, 0, // Skip to: 18553
3749
/* 8673 */    MCD_OPC_Decode, 204, 17, 127, // Opcode: VRSQRTEq
3750
/* 8677 */    MCD_OPC_FilterValue, 5, 67, 1, 0, // Skip to: 9005
3751
/* 8682 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3752
/* 8685 */    MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 8749
3753
/* 8690 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3754
/* 8693 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8707
3755
/* 8698 */    MCD_OPC_CheckPredicate, 21, 122, 38, 0, // Skip to: 18553
3756
/* 8703 */    MCD_OPC_Decode, 151, 9, 126, // Opcode: VCNTd
3757
/* 8707 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8721
3758
/* 8712 */    MCD_OPC_CheckPredicate, 21, 108, 38, 0, // Skip to: 18553
3759
/* 8717 */    MCD_OPC_Decode, 152, 9, 127, // Opcode: VCNTq
3760
/* 8721 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8735
3761
/* 8726 */    MCD_OPC_CheckPredicate, 21, 94, 38, 0, // Skip to: 18553
3762
/* 8731 */    MCD_OPC_Decode, 214, 14, 126, // Opcode: VMVNd
3763
/* 8735 */    MCD_OPC_FilterValue, 3, 85, 38, 0, // Skip to: 18553
3764
/* 8740 */    MCD_OPC_CheckPredicate, 21, 80, 38, 0, // Skip to: 18553
3765
/* 8745 */    MCD_OPC_Decode, 215, 14, 127, // Opcode: VMVNq
3766
/* 8749 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 8813
3767
/* 8754 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3768
/* 8757 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8771
3769
/* 8762 */    MCD_OPC_CheckPredicate, 22, 58, 38, 0, // Skip to: 18553
3770
/* 8767 */    MCD_OPC_Decode, 168, 8, 126, // Opcode: VCEQzv4f16
3771
/* 8771 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8785
3772
/* 8776 */    MCD_OPC_CheckPredicate, 22, 44, 38, 0, // Skip to: 18553
3773
/* 8781 */    MCD_OPC_Decode, 172, 8, 127, // Opcode: VCEQzv8f16
3774
/* 8785 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8799
3775
/* 8790 */    MCD_OPC_CheckPredicate, 22, 30, 38, 0, // Skip to: 18553
3776
/* 8795 */    MCD_OPC_Decode, 230, 8, 126, // Opcode: VCLEzv4f16
3777
/* 8799 */    MCD_OPC_FilterValue, 3, 21, 38, 0, // Skip to: 18553
3778
/* 8804 */    MCD_OPC_CheckPredicate, 22, 16, 38, 0, // Skip to: 18553
3779
/* 8809 */    MCD_OPC_Decode, 234, 8, 127, // Opcode: VCLEzv8f16
3780
/* 8813 */    MCD_OPC_FilterValue, 7, 59, 0, 0, // Skip to: 8877
3781
/* 8818 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3782
/* 8821 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8835
3783
/* 8826 */    MCD_OPC_CheckPredicate, 22, 250, 37, 0, // Skip to: 18553
3784
/* 8831 */    MCD_OPC_Decode, 216, 16, 126, // Opcode: VRECPEhd
3785
/* 8835 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8849
3786
/* 8840 */    MCD_OPC_CheckPredicate, 22, 236, 37, 0, // Skip to: 18553
3787
/* 8845 */    MCD_OPC_Decode, 217, 16, 127, // Opcode: VRECPEhq
3788
/* 8849 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8863
3789
/* 8854 */    MCD_OPC_CheckPredicate, 22, 222, 37, 0, // Skip to: 18553
3790
/* 8859 */    MCD_OPC_Decode, 202, 17, 126, // Opcode: VRSQRTEhd
3791
/* 8863 */    MCD_OPC_FilterValue, 3, 213, 37, 0, // Skip to: 18553
3792
/* 8868 */    MCD_OPC_CheckPredicate, 22, 208, 37, 0, // Skip to: 18553
3793
/* 8873 */    MCD_OPC_Decode, 203, 17, 127, // Opcode: VRSQRTEhq
3794
/* 8877 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 8941
3795
/* 8882 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3796
/* 8885 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8899
3797
/* 8890 */    MCD_OPC_CheckPredicate, 21, 186, 37, 0, // Skip to: 18553
3798
/* 8895 */    MCD_OPC_Decode, 166, 8, 126, // Opcode: VCEQzv2f32
3799
/* 8899 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8913
3800
/* 8904 */    MCD_OPC_CheckPredicate, 21, 172, 37, 0, // Skip to: 18553
3801
/* 8909 */    MCD_OPC_Decode, 169, 8, 127, // Opcode: VCEQzv4f32
3802
/* 8913 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8927
3803
/* 8918 */    MCD_OPC_CheckPredicate, 21, 158, 37, 0, // Skip to: 18553
3804
/* 8923 */    MCD_OPC_Decode, 228, 8, 126, // Opcode: VCLEzv2f32
3805
/* 8927 */    MCD_OPC_FilterValue, 3, 149, 37, 0, // Skip to: 18553
3806
/* 8932 */    MCD_OPC_CheckPredicate, 21, 144, 37, 0, // Skip to: 18553
3807
/* 8937 */    MCD_OPC_Decode, 231, 8, 127, // Opcode: VCLEzv4f32
3808
/* 8941 */    MCD_OPC_FilterValue, 11, 135, 37, 0, // Skip to: 18553
3809
/* 8946 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3810
/* 8949 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 8963
3811
/* 8954 */    MCD_OPC_CheckPredicate, 21, 122, 37, 0, // Skip to: 18553
3812
/* 8959 */    MCD_OPC_Decode, 214, 16, 126, // Opcode: VRECPEfd
3813
/* 8963 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 8977
3814
/* 8968 */    MCD_OPC_CheckPredicate, 21, 108, 37, 0, // Skip to: 18553
3815
/* 8973 */    MCD_OPC_Decode, 215, 16, 127, // Opcode: VRECPEfq
3816
/* 8977 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 8991
3817
/* 8982 */    MCD_OPC_CheckPredicate, 21, 94, 37, 0, // Skip to: 18553
3818
/* 8987 */    MCD_OPC_Decode, 200, 17, 126, // Opcode: VRSQRTEfd
3819
/* 8991 */    MCD_OPC_FilterValue, 3, 85, 37, 0, // Skip to: 18553
3820
/* 8996 */    MCD_OPC_CheckPredicate, 21, 80, 37, 0, // Skip to: 18553
3821
/* 9001 */    MCD_OPC_Decode, 201, 17, 127, // Opcode: VRSQRTEfq
3822
/* 9005 */    MCD_OPC_FilterValue, 6, 173, 1, 0, // Skip to: 9439
3823
/* 9010 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3824
/* 9013 */    MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 9081
3825
/* 9018 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3826
/* 9021 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9036
3827
/* 9026 */    MCD_OPC_CheckPredicate, 21, 50, 37, 0, // Skip to: 18553
3828
/* 9031 */    MCD_OPC_Decode, 255, 14, 132, 1, // Opcode: VPADALsv8i8
3829
/* 9036 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9051
3830
/* 9041 */    MCD_OPC_CheckPredicate, 21, 35, 37, 0, // Skip to: 18553
3831
/* 9046 */    MCD_OPC_Decode, 250, 14, 133, 1, // Opcode: VPADALsv16i8
3832
/* 9051 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9066
3833
/* 9056 */    MCD_OPC_CheckPredicate, 21, 20, 37, 0, // Skip to: 18553
3834
/* 9061 */    MCD_OPC_Decode, 133, 15, 132, 1, // Opcode: VPADALuv8i8
3835
/* 9066 */    MCD_OPC_FilterValue, 3, 10, 37, 0, // Skip to: 18553
3836
/* 9071 */    MCD_OPC_CheckPredicate, 21, 5, 37, 0, // Skip to: 18553
3837
/* 9076 */    MCD_OPC_Decode, 128, 15, 133, 1, // Opcode: VPADALuv16i8
3838
/* 9081 */    MCD_OPC_FilterValue, 4, 63, 0, 0, // Skip to: 9149
3839
/* 9086 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3840
/* 9089 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9104
3841
/* 9094 */    MCD_OPC_CheckPredicate, 21, 238, 36, 0, // Skip to: 18553
3842
/* 9099 */    MCD_OPC_Decode, 252, 14, 132, 1, // Opcode: VPADALsv4i16
3843
/* 9104 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9119
3844
/* 9109 */    MCD_OPC_CheckPredicate, 21, 223, 36, 0, // Skip to: 18553
3845
/* 9114 */    MCD_OPC_Decode, 254, 14, 133, 1, // Opcode: VPADALsv8i16
3846
/* 9119 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9134
3847
/* 9124 */    MCD_OPC_CheckPredicate, 21, 208, 36, 0, // Skip to: 18553
3848
/* 9129 */    MCD_OPC_Decode, 130, 15, 132, 1, // Opcode: VPADALuv4i16
3849
/* 9134 */    MCD_OPC_FilterValue, 3, 198, 36, 0, // Skip to: 18553
3850
/* 9139 */    MCD_OPC_CheckPredicate, 21, 193, 36, 0, // Skip to: 18553
3851
/* 9144 */    MCD_OPC_Decode, 132, 15, 133, 1, // Opcode: VPADALuv8i16
3852
/* 9149 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 9185
3853
/* 9154 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3854
/* 9157 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9171
3855
/* 9162 */    MCD_OPC_CheckPredicate, 22, 170, 36, 0, // Skip to: 18553
3856
/* 9167 */    MCD_OPC_Decode, 246, 8, 126, // Opcode: VCLTzv4f16
3857
/* 9171 */    MCD_OPC_FilterValue, 1, 161, 36, 0, // Skip to: 18553
3858
/* 9176 */    MCD_OPC_CheckPredicate, 22, 156, 36, 0, // Skip to: 18553
3859
/* 9181 */    MCD_OPC_Decode, 250, 8, 127, // Opcode: VCLTzv8f16
3860
/* 9185 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 9207
3861
/* 9190 */    MCD_OPC_CheckPredicate, 25, 142, 36, 0, // Skip to: 18553
3862
/* 9195 */    MCD_OPC_CheckField, 6, 2, 0, 135, 36, 0, // Skip to: 18553
3863
/* 9202 */    MCD_OPC_Decode, 219, 9, 130, 1, // Opcode: VCVTf2h
3864
/* 9207 */    MCD_OPC_FilterValue, 7, 59, 0, 0, // Skip to: 9271
3865
/* 9212 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3866
/* 9215 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9229
3867
/* 9220 */    MCD_OPC_CheckPredicate, 22, 112, 36, 0, // Skip to: 18553
3868
/* 9225 */    MCD_OPC_Decode, 239, 9, 126, // Opcode: VCVTs2hd
3869
/* 9229 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9243
3870
/* 9234 */    MCD_OPC_CheckPredicate, 22, 98, 36, 0, // Skip to: 18553
3871
/* 9239 */    MCD_OPC_Decode, 240, 9, 127, // Opcode: VCVTs2hq
3872
/* 9243 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9257
3873
/* 9248 */    MCD_OPC_CheckPredicate, 22, 84, 36, 0, // Skip to: 18553
3874
/* 9253 */    MCD_OPC_Decode, 243, 9, 126, // Opcode: VCVTu2hd
3875
/* 9257 */    MCD_OPC_FilterValue, 3, 75, 36, 0, // Skip to: 18553
3876
/* 9262 */    MCD_OPC_CheckPredicate, 22, 70, 36, 0, // Skip to: 18553
3877
/* 9267 */    MCD_OPC_Decode, 244, 9, 127, // Opcode: VCVTu2hq
3878
/* 9271 */    MCD_OPC_FilterValue, 8, 63, 0, 0, // Skip to: 9339
3879
/* 9276 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3880
/* 9279 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9294
3881
/* 9284 */    MCD_OPC_CheckPredicate, 21, 48, 36, 0, // Skip to: 18553
3882
/* 9289 */    MCD_OPC_Decode, 251, 14, 132, 1, // Opcode: VPADALsv2i32
3883
/* 9294 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9309
3884
/* 9299 */    MCD_OPC_CheckPredicate, 21, 33, 36, 0, // Skip to: 18553
3885
/* 9304 */    MCD_OPC_Decode, 253, 14, 133, 1, // Opcode: VPADALsv4i32
3886
/* 9309 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9324
3887
/* 9314 */    MCD_OPC_CheckPredicate, 21, 18, 36, 0, // Skip to: 18553
3888
/* 9319 */    MCD_OPC_Decode, 129, 15, 132, 1, // Opcode: VPADALuv2i32
3889
/* 9324 */    MCD_OPC_FilterValue, 3, 8, 36, 0, // Skip to: 18553
3890
/* 9329 */    MCD_OPC_CheckPredicate, 21, 3, 36, 0, // Skip to: 18553
3891
/* 9334 */    MCD_OPC_Decode, 131, 15, 133, 1, // Opcode: VPADALuv4i32
3892
/* 9339 */    MCD_OPC_FilterValue, 9, 31, 0, 0, // Skip to: 9375
3893
/* 9344 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3894
/* 9347 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9361
3895
/* 9352 */    MCD_OPC_CheckPredicate, 21, 236, 35, 0, // Skip to: 18553
3896
/* 9357 */    MCD_OPC_Decode, 244, 8, 126, // Opcode: VCLTzv2f32
3897
/* 9361 */    MCD_OPC_FilterValue, 1, 227, 35, 0, // Skip to: 18553
3898
/* 9366 */    MCD_OPC_CheckPredicate, 21, 222, 35, 0, // Skip to: 18553
3899
/* 9371 */    MCD_OPC_Decode, 247, 8, 127, // Opcode: VCLTzv4f32
3900
/* 9375 */    MCD_OPC_FilterValue, 11, 213, 35, 0, // Skip to: 18553
3901
/* 9380 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3902
/* 9383 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9397
3903
/* 9388 */    MCD_OPC_CheckPredicate, 21, 200, 35, 0, // Skip to: 18553
3904
/* 9393 */    MCD_OPC_Decode, 237, 9, 126, // Opcode: VCVTs2fd
3905
/* 9397 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9411
3906
/* 9402 */    MCD_OPC_CheckPredicate, 21, 186, 35, 0, // Skip to: 18553
3907
/* 9407 */    MCD_OPC_Decode, 238, 9, 127, // Opcode: VCVTs2fq
3908
/* 9411 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9425
3909
/* 9416 */    MCD_OPC_CheckPredicate, 21, 172, 35, 0, // Skip to: 18553
3910
/* 9421 */    MCD_OPC_Decode, 241, 9, 126, // Opcode: VCVTu2fd
3911
/* 9425 */    MCD_OPC_FilterValue, 3, 163, 35, 0, // Skip to: 18553
3912
/* 9430 */    MCD_OPC_CheckPredicate, 21, 158, 35, 0, // Skip to: 18553
3913
/* 9435 */    MCD_OPC_Decode, 242, 9, 127, // Opcode: VCVTu2fq
3914
/* 9439 */    MCD_OPC_FilterValue, 7, 217, 1, 0, // Skip to: 9917
3915
/* 9444 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
3916
/* 9447 */    MCD_OPC_FilterValue, 0, 59, 0, 0, // Skip to: 9511
3917
/* 9452 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3918
/* 9455 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9469
3919
/* 9460 */    MCD_OPC_CheckPredicate, 21, 128, 35, 0, // Skip to: 18553
3920
/* 9465 */    MCD_OPC_Decode, 172, 15, 126, // Opcode: VQABSv8i8
3921
/* 9469 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9483
3922
/* 9474 */    MCD_OPC_CheckPredicate, 21, 114, 35, 0, // Skip to: 18553
3923
/* 9479 */    MCD_OPC_Decode, 167, 15, 127, // Opcode: VQABSv16i8
3924
/* 9483 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9497
3925
/* 9488 */    MCD_OPC_CheckPredicate, 21, 100, 35, 0, // Skip to: 18553
3926
/* 9493 */    MCD_OPC_Decode, 223, 15, 126, // Opcode: VQNEGv8i8
3927
/* 9497 */    MCD_OPC_FilterValue, 3, 91, 35, 0, // Skip to: 18553
3928
/* 9502 */    MCD_OPC_CheckPredicate, 21, 86, 35, 0, // Skip to: 18553
3929
/* 9507 */    MCD_OPC_Decode, 218, 15, 127, // Opcode: VQNEGv16i8
3930
/* 9511 */    MCD_OPC_FilterValue, 4, 59, 0, 0, // Skip to: 9575
3931
/* 9516 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3932
/* 9519 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9533
3933
/* 9524 */    MCD_OPC_CheckPredicate, 21, 64, 35, 0, // Skip to: 18553
3934
/* 9529 */    MCD_OPC_Decode, 169, 15, 126, // Opcode: VQABSv4i16
3935
/* 9533 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9547
3936
/* 9538 */    MCD_OPC_CheckPredicate, 21, 50, 35, 0, // Skip to: 18553
3937
/* 9543 */    MCD_OPC_Decode, 171, 15, 127, // Opcode: VQABSv8i16
3938
/* 9547 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9561
3939
/* 9552 */    MCD_OPC_CheckPredicate, 21, 36, 35, 0, // Skip to: 18553
3940
/* 9557 */    MCD_OPC_Decode, 220, 15, 126, // Opcode: VQNEGv4i16
3941
/* 9561 */    MCD_OPC_FilterValue, 3, 27, 35, 0, // Skip to: 18553
3942
/* 9566 */    MCD_OPC_CheckPredicate, 21, 22, 35, 0, // Skip to: 18553
3943
/* 9571 */    MCD_OPC_Decode, 222, 15, 127, // Opcode: VQNEGv8i16
3944
/* 9575 */    MCD_OPC_FilterValue, 5, 59, 0, 0, // Skip to: 9639
3945
/* 9580 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3946
/* 9583 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9597
3947
/* 9588 */    MCD_OPC_CheckPredicate, 22, 0, 35, 0, // Skip to: 18553
3948
/* 9593 */    MCD_OPC_Decode, 219, 7, 126, // Opcode: VABShd
3949
/* 9597 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9611
3950
/* 9602 */    MCD_OPC_CheckPredicate, 22, 242, 34, 0, // Skip to: 18553
3951
/* 9607 */    MCD_OPC_Decode, 220, 7, 127, // Opcode: VABShq
3952
/* 9611 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9625
3953
/* 9616 */    MCD_OPC_CheckPredicate, 22, 228, 34, 0, // Skip to: 18553
3954
/* 9621 */    MCD_OPC_Decode, 225, 14, 126, // Opcode: VNEGhd
3955
/* 9625 */    MCD_OPC_FilterValue, 3, 219, 34, 0, // Skip to: 18553
3956
/* 9630 */    MCD_OPC_CheckPredicate, 22, 214, 34, 0, // Skip to: 18553
3957
/* 9635 */    MCD_OPC_Decode, 226, 14, 127, // Opcode: VNEGhq
3958
/* 9639 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 9661
3959
/* 9644 */    MCD_OPC_CheckPredicate, 25, 200, 34, 0, // Skip to: 18553
3960
/* 9649 */    MCD_OPC_CheckField, 6, 2, 0, 193, 34, 0, // Skip to: 18553
3961
/* 9656 */    MCD_OPC_Decode, 228, 9, 134, 1, // Opcode: VCVTh2f
3962
/* 9661 */    MCD_OPC_FilterValue, 7, 59, 0, 0, // Skip to: 9725
3963
/* 9666 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3964
/* 9669 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9683
3965
/* 9674 */    MCD_OPC_CheckPredicate, 22, 170, 34, 0, // Skip to: 18553
3966
/* 9679 */    MCD_OPC_Decode, 229, 9, 126, // Opcode: VCVTh2sd
3967
/* 9683 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9697
3968
/* 9688 */    MCD_OPC_CheckPredicate, 22, 156, 34, 0, // Skip to: 18553
3969
/* 9693 */    MCD_OPC_Decode, 230, 9, 127, // Opcode: VCVTh2sq
3970
/* 9697 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9711
3971
/* 9702 */    MCD_OPC_CheckPredicate, 22, 142, 34, 0, // Skip to: 18553
3972
/* 9707 */    MCD_OPC_Decode, 231, 9, 126, // Opcode: VCVTh2ud
3973
/* 9711 */    MCD_OPC_FilterValue, 3, 133, 34, 0, // Skip to: 18553
3974
/* 9716 */    MCD_OPC_CheckPredicate, 22, 128, 34, 0, // Skip to: 18553
3975
/* 9721 */    MCD_OPC_Decode, 232, 9, 127, // Opcode: VCVTh2uq
3976
/* 9725 */    MCD_OPC_FilterValue, 8, 59, 0, 0, // Skip to: 9789
3977
/* 9730 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3978
/* 9733 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9747
3979
/* 9738 */    MCD_OPC_CheckPredicate, 21, 106, 34, 0, // Skip to: 18553
3980
/* 9743 */    MCD_OPC_Decode, 168, 15, 126, // Opcode: VQABSv2i32
3981
/* 9747 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9761
3982
/* 9752 */    MCD_OPC_CheckPredicate, 21, 92, 34, 0, // Skip to: 18553
3983
/* 9757 */    MCD_OPC_Decode, 170, 15, 127, // Opcode: VQABSv4i32
3984
/* 9761 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9775
3985
/* 9766 */    MCD_OPC_CheckPredicate, 21, 78, 34, 0, // Skip to: 18553
3986
/* 9771 */    MCD_OPC_Decode, 219, 15, 126, // Opcode: VQNEGv2i32
3987
/* 9775 */    MCD_OPC_FilterValue, 3, 69, 34, 0, // Skip to: 18553
3988
/* 9780 */    MCD_OPC_CheckPredicate, 21, 64, 34, 0, // Skip to: 18553
3989
/* 9785 */    MCD_OPC_Decode, 221, 15, 127, // Opcode: VQNEGv4i32
3990
/* 9789 */    MCD_OPC_FilterValue, 9, 59, 0, 0, // Skip to: 9853
3991
/* 9794 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
3992
/* 9797 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9811
3993
/* 9802 */    MCD_OPC_CheckPredicate, 21, 42, 34, 0, // Skip to: 18553
3994
/* 9807 */    MCD_OPC_Decode, 217, 7, 126, // Opcode: VABSfd
3995
/* 9811 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9825
3996
/* 9816 */    MCD_OPC_CheckPredicate, 21, 28, 34, 0, // Skip to: 18553
3997
/* 9821 */    MCD_OPC_Decode, 218, 7, 127, // Opcode: VABSfq
3998
/* 9825 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9839
3999
/* 9830 */    MCD_OPC_CheckPredicate, 21, 14, 34, 0, // Skip to: 18553
4000
/* 9835 */    MCD_OPC_Decode, 224, 14, 126, // Opcode: VNEGfd
4001
/* 9839 */    MCD_OPC_FilterValue, 3, 5, 34, 0, // Skip to: 18553
4002
/* 9844 */    MCD_OPC_CheckPredicate, 21, 0, 34, 0, // Skip to: 18553
4003
/* 9849 */    MCD_OPC_Decode, 223, 14, 127, // Opcode: VNEGf32q
4004
/* 9853 */    MCD_OPC_FilterValue, 11, 247, 33, 0, // Skip to: 18553
4005
/* 9858 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
4006
/* 9861 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 9875
4007
/* 9866 */    MCD_OPC_CheckPredicate, 21, 234, 33, 0, // Skip to: 18553
4008
/* 9871 */    MCD_OPC_Decode, 220, 9, 126, // Opcode: VCVTf2sd
4009
/* 9875 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 9889
4010
/* 9880 */    MCD_OPC_CheckPredicate, 21, 220, 33, 0, // Skip to: 18553
4011
/* 9885 */    MCD_OPC_Decode, 221, 9, 127, // Opcode: VCVTf2sq
4012
/* 9889 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 9903
4013
/* 9894 */    MCD_OPC_CheckPredicate, 21, 206, 33, 0, // Skip to: 18553
4014
/* 9899 */    MCD_OPC_Decode, 222, 9, 126, // Opcode: VCVTf2ud
4015
/* 9903 */    MCD_OPC_FilterValue, 3, 197, 33, 0, // Skip to: 18553
4016
/* 9908 */    MCD_OPC_CheckPredicate, 21, 192, 33, 0, // Skip to: 18553
4017
/* 9913 */    MCD_OPC_Decode, 223, 9, 127, // Opcode: VCVTf2uq
4018
/* 9917 */    MCD_OPC_FilterValue, 8, 33, 0, 0, // Skip to: 9955
4019
/* 9922 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
4020
/* 9925 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9940
4021
/* 9930 */    MCD_OPC_CheckPredicate, 21, 170, 33, 0, // Skip to: 18553
4022
/* 9935 */    MCD_OPC_Decode, 239, 20, 135, 1, // Opcode: VTBL1
4023
/* 9940 */    MCD_OPC_FilterValue, 1, 160, 33, 0, // Skip to: 18553
4024
/* 9945 */    MCD_OPC_CheckPredicate, 21, 155, 33, 0, // Skip to: 18553
4025
/* 9950 */    MCD_OPC_Decode, 245, 20, 135, 1, // Opcode: VTBX1
4026
/* 9955 */    MCD_OPC_FilterValue, 9, 33, 0, 0, // Skip to: 9993
4027
/* 9960 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
4028
/* 9963 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9978
4029
/* 9968 */    MCD_OPC_CheckPredicate, 21, 132, 33, 0, // Skip to: 18553
4030
/* 9973 */    MCD_OPC_Decode, 240, 20, 135, 1, // Opcode: VTBL2
4031
/* 9978 */    MCD_OPC_FilterValue, 1, 122, 33, 0, // Skip to: 18553
4032
/* 9983 */    MCD_OPC_CheckPredicate, 21, 117, 33, 0, // Skip to: 18553
4033
/* 9988 */    MCD_OPC_Decode, 246, 20, 135, 1, // Opcode: VTBX2
4034
/* 9993 */    MCD_OPC_FilterValue, 10, 33, 0, 0, // Skip to: 10031
4035
/* 9998 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
4036
/* 10001 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10016
4037
/* 10006 */   MCD_OPC_CheckPredicate, 21, 94, 33, 0, // Skip to: 18553
4038
/* 10011 */   MCD_OPC_Decode, 241, 20, 135, 1, // Opcode: VTBL3
4039
/* 10016 */   MCD_OPC_FilterValue, 1, 84, 33, 0, // Skip to: 18553
4040
/* 10021 */   MCD_OPC_CheckPredicate, 21, 79, 33, 0, // Skip to: 18553
4041
/* 10026 */   MCD_OPC_Decode, 247, 20, 135, 1, // Opcode: VTBX3
4042
/* 10031 */   MCD_OPC_FilterValue, 11, 33, 0, 0, // Skip to: 10069
4043
/* 10036 */   MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
4044
/* 10039 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10054
4045
/* 10044 */   MCD_OPC_CheckPredicate, 21, 56, 33, 0, // Skip to: 18553
4046
/* 10049 */   MCD_OPC_Decode, 243, 20, 135, 1, // Opcode: VTBL4
4047
/* 10054 */   MCD_OPC_FilterValue, 1, 46, 33, 0, // Skip to: 18553
4048
/* 10059 */   MCD_OPC_CheckPredicate, 21, 41, 33, 0, // Skip to: 18553
4049
/* 10064 */   MCD_OPC_Decode, 249, 20, 135, 1, // Opcode: VTBX4
4050
/* 10069 */   MCD_OPC_FilterValue, 12, 31, 33, 0, // Skip to: 18553
4051
/* 10074 */   MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
4052
/* 10077 */   MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 10145
4053
/* 10082 */   MCD_OPC_ExtractField, 16, 1,  // Inst{16} ...
4054
/* 10085 */   MCD_OPC_FilterValue, 0, 40, 0, 0, // Skip to: 10130
4055
/* 10090 */   MCD_OPC_ExtractField, 17, 1,  // Inst{17} ...
4056
/* 10093 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 10115
4057
/* 10098 */   MCD_OPC_CheckPredicate, 21, 2, 33, 0, // Skip to: 18553
4058
/* 10103 */   MCD_OPC_CheckField, 18, 1, 1, 251, 32, 0, // Skip to: 18553
4059
/* 10110 */   MCD_OPC_Decode, 136, 10, 136, 1, // Opcode: VDUPLN32d
4060
/* 10115 */   MCD_OPC_FilterValue, 1, 241, 32, 0, // Skip to: 18553
4061
/* 10120 */   MCD_OPC_CheckPredicate, 21, 236, 32, 0, // Skip to: 18553
4062
/* 10125 */   MCD_OPC_Decode, 134, 10, 137, 1, // Opcode: VDUPLN16d
4063
/* 10130 */   MCD_OPC_FilterValue, 1, 226, 32, 0, // Skip to: 18553
4064
/* 10135 */   MCD_OPC_CheckPredicate, 21, 221, 32, 0, // Skip to: 18553
4065
/* 10140 */   MCD_OPC_Decode, 138, 10, 138, 1, // Opcode: VDUPLN8d
4066
/* 10145 */   MCD_OPC_FilterValue, 1, 211, 32, 0, // Skip to: 18553
4067
/* 10150 */   MCD_OPC_ExtractField, 16, 1,  // Inst{16} ...
4068
/* 10153 */   MCD_OPC_FilterValue, 0, 40, 0, 0, // Skip to: 10198
4069
/* 10158 */   MCD_OPC_ExtractField, 17, 1,  // Inst{17} ...
4070
/* 10161 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 10183
4071
/* 10166 */   MCD_OPC_CheckPredicate, 21, 190, 32, 0, // Skip to: 18553
4072
/* 10171 */   MCD_OPC_CheckField, 18, 1, 1, 183, 32, 0, // Skip to: 18553
4073
/* 10178 */   MCD_OPC_Decode, 137, 10, 139, 1, // Opcode: VDUPLN32q
4074
/* 10183 */   MCD_OPC_FilterValue, 1, 173, 32, 0, // Skip to: 18553
4075
/* 10188 */   MCD_OPC_CheckPredicate, 21, 168, 32, 0, // Skip to: 18553
4076
/* 10193 */   MCD_OPC_Decode, 135, 10, 140, 1, // Opcode: VDUPLN16q
4077
/* 10198 */   MCD_OPC_FilterValue, 1, 158, 32, 0, // Skip to: 18553
4078
/* 10203 */   MCD_OPC_CheckPredicate, 21, 153, 32, 0, // Skip to: 18553
4079
/* 10208 */   MCD_OPC_Decode, 139, 10, 141, 1, // Opcode: VDUPLN8q
4080
/* 10213 */   MCD_OPC_FilterValue, 1, 143, 32, 0, // Skip to: 18553
4081
/* 10218 */   MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
4082
/* 10221 */   MCD_OPC_FilterValue, 0, 21, 17, 0, // Skip to: 14599
4083
/* 10226 */   MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
4084
/* 10229 */   MCD_OPC_FilterValue, 0, 9, 8, 0, // Skip to: 12291
4085
/* 10234 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
4086
/* 10237 */   MCD_OPC_FilterValue, 0, 155, 0, 0, // Skip to: 10397
4087
/* 10242 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4088
/* 10245 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 10283
4089
/* 10250 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4090
/* 10253 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10268
4091
/* 10259 */   MCD_OPC_CheckPredicate, 21, 97, 32, 0, // Skip to: 18553
4092
/* 10264 */   MCD_OPC_Decode, 180, 15, 97, // Opcode: VQADDsv8i8
4093
/* 10268 */   MCD_OPC_FilterValue, 243, 1, 87, 32, 0, // Skip to: 18553
4094
/* 10274 */   MCD_OPC_CheckPredicate, 21, 82, 32, 0, // Skip to: 18553
4095
/* 10279 */   MCD_OPC_Decode, 188, 15, 97, // Opcode: VQADDuv8i8
4096
/* 10283 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 10321
4097
/* 10288 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4098
/* 10291 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10306
4099
/* 10297 */   MCD_OPC_CheckPredicate, 21, 59, 32, 0, // Skip to: 18553
4100
/* 10302 */   MCD_OPC_Decode, 177, 15, 97, // Opcode: VQADDsv4i16
4101
/* 10306 */   MCD_OPC_FilterValue, 243, 1, 49, 32, 0, // Skip to: 18553
4102
/* 10312 */   MCD_OPC_CheckPredicate, 21, 44, 32, 0, // Skip to: 18553
4103
/* 10317 */   MCD_OPC_Decode, 185, 15, 97, // Opcode: VQADDuv4i16
4104
/* 10321 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 10359
4105
/* 10326 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4106
/* 10329 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10344
4107
/* 10335 */   MCD_OPC_CheckPredicate, 21, 21, 32, 0, // Skip to: 18553
4108
/* 10340 */   MCD_OPC_Decode, 175, 15, 97, // Opcode: VQADDsv2i32
4109
/* 10344 */   MCD_OPC_FilterValue, 243, 1, 11, 32, 0, // Skip to: 18553
4110
/* 10350 */   MCD_OPC_CheckPredicate, 21, 6, 32, 0, // Skip to: 18553
4111
/* 10355 */   MCD_OPC_Decode, 183, 15, 97, // Opcode: VQADDuv2i32
4112
/* 10359 */   MCD_OPC_FilterValue, 3, 253, 31, 0, // Skip to: 18553
4113
/* 10364 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4114
/* 10367 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10382
4115
/* 10373 */   MCD_OPC_CheckPredicate, 21, 239, 31, 0, // Skip to: 18553
4116
/* 10378 */   MCD_OPC_Decode, 174, 15, 97, // Opcode: VQADDsv1i64
4117
/* 10382 */   MCD_OPC_FilterValue, 243, 1, 229, 31, 0, // Skip to: 18553
4118
/* 10388 */   MCD_OPC_CheckPredicate, 21, 224, 31, 0, // Skip to: 18553
4119
/* 10393 */   MCD_OPC_Decode, 182, 15, 97, // Opcode: VQADDuv1i64
4120
/* 10397 */   MCD_OPC_FilterValue, 1, 155, 0, 0, // Skip to: 10557
4121
/* 10402 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4122
/* 10405 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 10443
4123
/* 10410 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4124
/* 10413 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10428
4125
/* 10419 */   MCD_OPC_CheckPredicate, 21, 193, 31, 0, // Skip to: 18553
4126
/* 10424 */   MCD_OPC_Decode, 137, 8, 97, // Opcode: VANDd
4127
/* 10428 */   MCD_OPC_FilterValue, 243, 1, 183, 31, 0, // Skip to: 18553
4128
/* 10434 */   MCD_OPC_CheckPredicate, 21, 178, 31, 0, // Skip to: 18553
4129
/* 10439 */   MCD_OPC_Decode, 140, 10, 97, // Opcode: VEORd
4130
/* 10443 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 10481
4131
/* 10448 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4132
/* 10451 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10466
4133
/* 10457 */   MCD_OPC_CheckPredicate, 21, 155, 31, 0, // Skip to: 18553
4134
/* 10462 */   MCD_OPC_Decode, 139, 8, 97, // Opcode: VBICd
4135
/* 10466 */   MCD_OPC_FilterValue, 243, 1, 145, 31, 0, // Skip to: 18553
4136
/* 10472 */   MCD_OPC_CheckPredicate, 21, 140, 31, 0, // Skip to: 18553
4137
/* 10477 */   MCD_OPC_Decode, 149, 8, 105, // Opcode: VBSLd
4138
/* 10481 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 10519
4139
/* 10486 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4140
/* 10489 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10504
4141
/* 10495 */   MCD_OPC_CheckPredicate, 21, 117, 31, 0, // Skip to: 18553
4142
/* 10500 */   MCD_OPC_Decode, 244, 14, 97, // Opcode: VORRd
4143
/* 10504 */   MCD_OPC_FilterValue, 243, 1, 107, 31, 0, // Skip to: 18553
4144
/* 10510 */   MCD_OPC_CheckPredicate, 21, 102, 31, 0, // Skip to: 18553
4145
/* 10515 */   MCD_OPC_Decode, 147, 8, 105, // Opcode: VBITd
4146
/* 10519 */   MCD_OPC_FilterValue, 3, 93, 31, 0, // Skip to: 18553
4147
/* 10524 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4148
/* 10527 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10542
4149
/* 10533 */   MCD_OPC_CheckPredicate, 21, 79, 31, 0, // Skip to: 18553
4150
/* 10538 */   MCD_OPC_Decode, 242, 14, 97, // Opcode: VORNd
4151
/* 10542 */   MCD_OPC_FilterValue, 243, 1, 69, 31, 0, // Skip to: 18553
4152
/* 10548 */   MCD_OPC_CheckPredicate, 21, 64, 31, 0, // Skip to: 18553
4153
/* 10553 */   MCD_OPC_Decode, 145, 8, 105, // Opcode: VBIFd
4154
/* 10557 */   MCD_OPC_FilterValue, 2, 155, 0, 0, // Skip to: 10717
4155
/* 10562 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4156
/* 10565 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 10603
4157
/* 10570 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4158
/* 10573 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10588
4159
/* 10579 */   MCD_OPC_CheckPredicate, 21, 33, 31, 0, // Skip to: 18553
4160
/* 10584 */   MCD_OPC_Decode, 201, 16, 97, // Opcode: VQSUBsv8i8
4161
/* 10588 */   MCD_OPC_FilterValue, 243, 1, 23, 31, 0, // Skip to: 18553
4162
/* 10594 */   MCD_OPC_CheckPredicate, 21, 18, 31, 0, // Skip to: 18553
4163
/* 10599 */   MCD_OPC_Decode, 209, 16, 97, // Opcode: VQSUBuv8i8
4164
/* 10603 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 10641
4165
/* 10608 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4166
/* 10611 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10626
4167
/* 10617 */   MCD_OPC_CheckPredicate, 21, 251, 30, 0, // Skip to: 18553
4168
/* 10622 */   MCD_OPC_Decode, 198, 16, 97, // Opcode: VQSUBsv4i16
4169
/* 10626 */   MCD_OPC_FilterValue, 243, 1, 241, 30, 0, // Skip to: 18553
4170
/* 10632 */   MCD_OPC_CheckPredicate, 21, 236, 30, 0, // Skip to: 18553
4171
/* 10637 */   MCD_OPC_Decode, 206, 16, 97, // Opcode: VQSUBuv4i16
4172
/* 10641 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 10679
4173
/* 10646 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4174
/* 10649 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10664
4175
/* 10655 */   MCD_OPC_CheckPredicate, 21, 213, 30, 0, // Skip to: 18553
4176
/* 10660 */   MCD_OPC_Decode, 196, 16, 97, // Opcode: VQSUBsv2i32
4177
/* 10664 */   MCD_OPC_FilterValue, 243, 1, 203, 30, 0, // Skip to: 18553
4178
/* 10670 */   MCD_OPC_CheckPredicate, 21, 198, 30, 0, // Skip to: 18553
4179
/* 10675 */   MCD_OPC_Decode, 204, 16, 97, // Opcode: VQSUBuv2i32
4180
/* 10679 */   MCD_OPC_FilterValue, 3, 189, 30, 0, // Skip to: 18553
4181
/* 10684 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4182
/* 10687 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10702
4183
/* 10693 */   MCD_OPC_CheckPredicate, 21, 175, 30, 0, // Skip to: 18553
4184
/* 10698 */   MCD_OPC_Decode, 195, 16, 97, // Opcode: VQSUBsv1i64
4185
/* 10702 */   MCD_OPC_FilterValue, 243, 1, 165, 30, 0, // Skip to: 18553
4186
/* 10708 */   MCD_OPC_CheckPredicate, 21, 160, 30, 0, // Skip to: 18553
4187
/* 10713 */   MCD_OPC_Decode, 203, 16, 97, // Opcode: VQSUBuv1i64
4188
/* 10717 */   MCD_OPC_FilterValue, 3, 117, 0, 0, // Skip to: 10839
4189
/* 10722 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4190
/* 10725 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 10763
4191
/* 10730 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4192
/* 10733 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10748
4193
/* 10739 */   MCD_OPC_CheckPredicate, 21, 129, 30, 0, // Skip to: 18553
4194
/* 10744 */   MCD_OPC_Decode, 184, 8, 97, // Opcode: VCGEsv8i8
4195
/* 10748 */   MCD_OPC_FilterValue, 243, 1, 119, 30, 0, // Skip to: 18553
4196
/* 10754 */   MCD_OPC_CheckPredicate, 21, 114, 30, 0, // Skip to: 18553
4197
/* 10759 */   MCD_OPC_Decode, 190, 8, 97, // Opcode: VCGEuv8i8
4198
/* 10763 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 10801
4199
/* 10768 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4200
/* 10771 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10786
4201
/* 10777 */   MCD_OPC_CheckPredicate, 21, 91, 30, 0, // Skip to: 18553
4202
/* 10782 */   MCD_OPC_Decode, 181, 8, 97, // Opcode: VCGEsv4i16
4203
/* 10786 */   MCD_OPC_FilterValue, 243, 1, 81, 30, 0, // Skip to: 18553
4204
/* 10792 */   MCD_OPC_CheckPredicate, 21, 76, 30, 0, // Skip to: 18553
4205
/* 10797 */   MCD_OPC_Decode, 187, 8, 97, // Opcode: VCGEuv4i16
4206
/* 10801 */   MCD_OPC_FilterValue, 2, 67, 30, 0, // Skip to: 18553
4207
/* 10806 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4208
/* 10809 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10824
4209
/* 10815 */   MCD_OPC_CheckPredicate, 21, 53, 30, 0, // Skip to: 18553
4210
/* 10820 */   MCD_OPC_Decode, 180, 8, 97, // Opcode: VCGEsv2i32
4211
/* 10824 */   MCD_OPC_FilterValue, 243, 1, 43, 30, 0, // Skip to: 18553
4212
/* 10830 */   MCD_OPC_CheckPredicate, 21, 38, 30, 0, // Skip to: 18553
4213
/* 10835 */   MCD_OPC_Decode, 186, 8, 97, // Opcode: VCGEuv2i32
4214
/* 10839 */   MCD_OPC_FilterValue, 4, 155, 0, 0, // Skip to: 10999
4215
/* 10844 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4216
/* 10847 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 10885
4217
/* 10852 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4218
/* 10855 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10870
4219
/* 10861 */   MCD_OPC_CheckPredicate, 21, 7, 30, 0, // Skip to: 18553
4220
/* 10866 */   MCD_OPC_Decode, 168, 16, 101, // Opcode: VQSHLsv8i8
4221
/* 10870 */   MCD_OPC_FilterValue, 243, 1, 253, 29, 0, // Skip to: 18553
4222
/* 10876 */   MCD_OPC_CheckPredicate, 21, 248, 29, 0, // Skip to: 18553
4223
/* 10881 */   MCD_OPC_Decode, 184, 16, 101, // Opcode: VQSHLuv8i8
4224
/* 10885 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 10923
4225
/* 10890 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4226
/* 10893 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10908
4227
/* 10899 */   MCD_OPC_CheckPredicate, 21, 225, 29, 0, // Skip to: 18553
4228
/* 10904 */   MCD_OPC_Decode, 165, 16, 101, // Opcode: VQSHLsv4i16
4229
/* 10908 */   MCD_OPC_FilterValue, 243, 1, 215, 29, 0, // Skip to: 18553
4230
/* 10914 */   MCD_OPC_CheckPredicate, 21, 210, 29, 0, // Skip to: 18553
4231
/* 10919 */   MCD_OPC_Decode, 181, 16, 101, // Opcode: VQSHLuv4i16
4232
/* 10923 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 10961
4233
/* 10928 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4234
/* 10931 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10946
4235
/* 10937 */   MCD_OPC_CheckPredicate, 21, 187, 29, 0, // Skip to: 18553
4236
/* 10942 */   MCD_OPC_Decode, 163, 16, 101, // Opcode: VQSHLsv2i32
4237
/* 10946 */   MCD_OPC_FilterValue, 243, 1, 177, 29, 0, // Skip to: 18553
4238
/* 10952 */   MCD_OPC_CheckPredicate, 21, 172, 29, 0, // Skip to: 18553
4239
/* 10957 */   MCD_OPC_Decode, 179, 16, 101, // Opcode: VQSHLuv2i32
4240
/* 10961 */   MCD_OPC_FilterValue, 3, 163, 29, 0, // Skip to: 18553
4241
/* 10966 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4242
/* 10969 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 10984
4243
/* 10975 */   MCD_OPC_CheckPredicate, 21, 149, 29, 0, // Skip to: 18553
4244
/* 10980 */   MCD_OPC_Decode, 162, 16, 101, // Opcode: VQSHLsv1i64
4245
/* 10984 */   MCD_OPC_FilterValue, 243, 1, 139, 29, 0, // Skip to: 18553
4246
/* 10990 */   MCD_OPC_CheckPredicate, 21, 134, 29, 0, // Skip to: 18553
4247
/* 10995 */   MCD_OPC_Decode, 178, 16, 101, // Opcode: VQSHLuv1i64
4248
/* 10999 */   MCD_OPC_FilterValue, 5, 155, 0, 0, // Skip to: 11159
4249
/* 11004 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4250
/* 11007 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11045
4251
/* 11012 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4252
/* 11015 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11030
4253
/* 11021 */   MCD_OPC_CheckPredicate, 21, 103, 29, 0, // Skip to: 18553
4254
/* 11026 */   MCD_OPC_Decode, 255, 15, 101, // Opcode: VQRSHLsv8i8
4255
/* 11030 */   MCD_OPC_FilterValue, 243, 1, 93, 29, 0, // Skip to: 18553
4256
/* 11036 */   MCD_OPC_CheckPredicate, 21, 88, 29, 0, // Skip to: 18553
4257
/* 11041 */   MCD_OPC_Decode, 135, 16, 101, // Opcode: VQRSHLuv8i8
4258
/* 11045 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11083
4259
/* 11050 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4260
/* 11053 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11068
4261
/* 11059 */   MCD_OPC_CheckPredicate, 21, 65, 29, 0, // Skip to: 18553
4262
/* 11064 */   MCD_OPC_Decode, 252, 15, 101, // Opcode: VQRSHLsv4i16
4263
/* 11068 */   MCD_OPC_FilterValue, 243, 1, 55, 29, 0, // Skip to: 18553
4264
/* 11074 */   MCD_OPC_CheckPredicate, 21, 50, 29, 0, // Skip to: 18553
4265
/* 11079 */   MCD_OPC_Decode, 132, 16, 101, // Opcode: VQRSHLuv4i16
4266
/* 11083 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 11121
4267
/* 11088 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4268
/* 11091 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11106
4269
/* 11097 */   MCD_OPC_CheckPredicate, 21, 27, 29, 0, // Skip to: 18553
4270
/* 11102 */   MCD_OPC_Decode, 250, 15, 101, // Opcode: VQRSHLsv2i32
4271
/* 11106 */   MCD_OPC_FilterValue, 243, 1, 17, 29, 0, // Skip to: 18553
4272
/* 11112 */   MCD_OPC_CheckPredicate, 21, 12, 29, 0, // Skip to: 18553
4273
/* 11117 */   MCD_OPC_Decode, 130, 16, 101, // Opcode: VQRSHLuv2i32
4274
/* 11121 */   MCD_OPC_FilterValue, 3, 3, 29, 0, // Skip to: 18553
4275
/* 11126 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4276
/* 11129 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11144
4277
/* 11135 */   MCD_OPC_CheckPredicate, 21, 245, 28, 0, // Skip to: 18553
4278
/* 11140 */   MCD_OPC_Decode, 249, 15, 101, // Opcode: VQRSHLsv1i64
4279
/* 11144 */   MCD_OPC_FilterValue, 243, 1, 235, 28, 0, // Skip to: 18553
4280
/* 11150 */   MCD_OPC_CheckPredicate, 21, 230, 28, 0, // Skip to: 18553
4281
/* 11155 */   MCD_OPC_Decode, 129, 16, 101, // Opcode: VQRSHLuv1i64
4282
/* 11159 */   MCD_OPC_FilterValue, 6, 117, 0, 0, // Skip to: 11281
4283
/* 11164 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4284
/* 11167 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11205
4285
/* 11172 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4286
/* 11175 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11190
4287
/* 11181 */   MCD_OPC_CheckPredicate, 21, 199, 28, 0, // Skip to: 18553
4288
/* 11186 */   MCD_OPC_Decode, 195, 13, 97, // Opcode: VMINsv8i8
4289
/* 11190 */   MCD_OPC_FilterValue, 243, 1, 189, 28, 0, // Skip to: 18553
4290
/* 11196 */   MCD_OPC_CheckPredicate, 21, 184, 28, 0, // Skip to: 18553
4291
/* 11201 */   MCD_OPC_Decode, 201, 13, 97, // Opcode: VMINuv8i8
4292
/* 11205 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11243
4293
/* 11210 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4294
/* 11213 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11228
4295
/* 11219 */   MCD_OPC_CheckPredicate, 21, 161, 28, 0, // Skip to: 18553
4296
/* 11224 */   MCD_OPC_Decode, 192, 13, 97, // Opcode: VMINsv4i16
4297
/* 11228 */   MCD_OPC_FilterValue, 243, 1, 151, 28, 0, // Skip to: 18553
4298
/* 11234 */   MCD_OPC_CheckPredicate, 21, 146, 28, 0, // Skip to: 18553
4299
/* 11239 */   MCD_OPC_Decode, 198, 13, 97, // Opcode: VMINuv4i16
4300
/* 11243 */   MCD_OPC_FilterValue, 2, 137, 28, 0, // Skip to: 18553
4301
/* 11248 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4302
/* 11251 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11266
4303
/* 11257 */   MCD_OPC_CheckPredicate, 21, 123, 28, 0, // Skip to: 18553
4304
/* 11262 */   MCD_OPC_Decode, 191, 13, 97, // Opcode: VMINsv2i32
4305
/* 11266 */   MCD_OPC_FilterValue, 243, 1, 113, 28, 0, // Skip to: 18553
4306
/* 11272 */   MCD_OPC_CheckPredicate, 21, 108, 28, 0, // Skip to: 18553
4307
/* 11277 */   MCD_OPC_Decode, 197, 13, 97, // Opcode: VMINuv2i32
4308
/* 11281 */   MCD_OPC_FilterValue, 7, 117, 0, 0, // Skip to: 11403
4309
/* 11286 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4310
/* 11289 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11327
4311
/* 11294 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4312
/* 11297 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11312
4313
/* 11303 */   MCD_OPC_CheckPredicate, 21, 77, 28, 0, // Skip to: 18553
4314
/* 11308 */   MCD_OPC_Decode, 185, 7, 105, // Opcode: VABAsv8i8
4315
/* 11312 */   MCD_OPC_FilterValue, 243, 1, 67, 28, 0, // Skip to: 18553
4316
/* 11318 */   MCD_OPC_CheckPredicate, 21, 62, 28, 0, // Skip to: 18553
4317
/* 11323 */   MCD_OPC_Decode, 191, 7, 105, // Opcode: VABAuv8i8
4318
/* 11327 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11365
4319
/* 11332 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4320
/* 11335 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11350
4321
/* 11341 */   MCD_OPC_CheckPredicate, 21, 39, 28, 0, // Skip to: 18553
4322
/* 11346 */   MCD_OPC_Decode, 182, 7, 105, // Opcode: VABAsv4i16
4323
/* 11350 */   MCD_OPC_FilterValue, 243, 1, 29, 28, 0, // Skip to: 18553
4324
/* 11356 */   MCD_OPC_CheckPredicate, 21, 24, 28, 0, // Skip to: 18553
4325
/* 11361 */   MCD_OPC_Decode, 188, 7, 105, // Opcode: VABAuv4i16
4326
/* 11365 */   MCD_OPC_FilterValue, 2, 15, 28, 0, // Skip to: 18553
4327
/* 11370 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4328
/* 11373 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11388
4329
/* 11379 */   MCD_OPC_CheckPredicate, 21, 1, 28, 0, // Skip to: 18553
4330
/* 11384 */   MCD_OPC_Decode, 181, 7, 105, // Opcode: VABAsv2i32
4331
/* 11388 */   MCD_OPC_FilterValue, 243, 1, 247, 27, 0, // Skip to: 18553
4332
/* 11394 */   MCD_OPC_CheckPredicate, 21, 242, 27, 0, // Skip to: 18553
4333
/* 11399 */   MCD_OPC_Decode, 187, 7, 105, // Opcode: VABAuv2i32
4334
/* 11403 */   MCD_OPC_FilterValue, 8, 117, 0, 0, // Skip to: 11525
4335
/* 11408 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4336
/* 11411 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11449
4337
/* 11416 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4338
/* 11419 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11434
4339
/* 11425 */   MCD_OPC_CheckPredicate, 21, 211, 27, 0, // Skip to: 18553
4340
/* 11430 */   MCD_OPC_Decode, 158, 21, 97, // Opcode: VTSTv8i8
4341
/* 11434 */   MCD_OPC_FilterValue, 243, 1, 201, 27, 0, // Skip to: 18553
4342
/* 11440 */   MCD_OPC_CheckPredicate, 21, 196, 27, 0, // Skip to: 18553
4343
/* 11445 */   MCD_OPC_Decode, 164, 8, 97, // Opcode: VCEQv8i8
4344
/* 11449 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11487
4345
/* 11454 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4346
/* 11457 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11472
4347
/* 11463 */   MCD_OPC_CheckPredicate, 21, 173, 27, 0, // Skip to: 18553
4348
/* 11468 */   MCD_OPC_Decode, 155, 21, 97, // Opcode: VTSTv4i16
4349
/* 11472 */   MCD_OPC_FilterValue, 243, 1, 163, 27, 0, // Skip to: 18553
4350
/* 11478 */   MCD_OPC_CheckPredicate, 21, 158, 27, 0, // Skip to: 18553
4351
/* 11483 */   MCD_OPC_Decode, 161, 8, 97, // Opcode: VCEQv4i16
4352
/* 11487 */   MCD_OPC_FilterValue, 2, 149, 27, 0, // Skip to: 18553
4353
/* 11492 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4354
/* 11495 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11510
4355
/* 11501 */   MCD_OPC_CheckPredicate, 21, 135, 27, 0, // Skip to: 18553
4356
/* 11506 */   MCD_OPC_Decode, 154, 21, 97, // Opcode: VTSTv2i32
4357
/* 11510 */   MCD_OPC_FilterValue, 243, 1, 125, 27, 0, // Skip to: 18553
4358
/* 11516 */   MCD_OPC_CheckPredicate, 21, 120, 27, 0, // Skip to: 18553
4359
/* 11521 */   MCD_OPC_Decode, 160, 8, 97, // Opcode: VCEQv2i32
4360
/* 11525 */   MCD_OPC_FilterValue, 9, 85, 0, 0, // Skip to: 11615
4361
/* 11530 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4362
/* 11533 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11571
4363
/* 11538 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4364
/* 11541 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11556
4365
/* 11547 */   MCD_OPC_CheckPredicate, 21, 89, 27, 0, // Skip to: 18553
4366
/* 11552 */   MCD_OPC_Decode, 213, 14, 97, // Opcode: VMULv8i8
4367
/* 11556 */   MCD_OPC_FilterValue, 243, 1, 79, 27, 0, // Skip to: 18553
4368
/* 11562 */   MCD_OPC_CheckPredicate, 21, 74, 27, 0, // Skip to: 18553
4369
/* 11567 */   MCD_OPC_Decode, 198, 14, 97, // Opcode: VMULpd
4370
/* 11571 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 11593
4371
/* 11576 */   MCD_OPC_CheckPredicate, 21, 60, 27, 0, // Skip to: 18553
4372
/* 11581 */   MCD_OPC_CheckField, 24, 8, 242, 1, 52, 27, 0, // Skip to: 18553
4373
/* 11589 */   MCD_OPC_Decode, 210, 14, 97, // Opcode: VMULv4i16
4374
/* 11593 */   MCD_OPC_FilterValue, 2, 43, 27, 0, // Skip to: 18553
4375
/* 11598 */   MCD_OPC_CheckPredicate, 21, 38, 27, 0, // Skip to: 18553
4376
/* 11603 */   MCD_OPC_CheckField, 24, 8, 242, 1, 30, 27, 0, // Skip to: 18553
4377
/* 11611 */   MCD_OPC_Decode, 209, 14, 97, // Opcode: VMULv2i32
4378
/* 11615 */   MCD_OPC_FilterValue, 10, 117, 0, 0, // Skip to: 11737
4379
/* 11620 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4380
/* 11623 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 11661
4381
/* 11628 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4382
/* 11631 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11646
4383
/* 11637 */   MCD_OPC_CheckPredicate, 21, 255, 26, 0, // Skip to: 18553
4384
/* 11642 */   MCD_OPC_Decode, 163, 15, 97, // Opcode: VPMINs8
4385
/* 11646 */   MCD_OPC_FilterValue, 243, 1, 245, 26, 0, // Skip to: 18553
4386
/* 11652 */   MCD_OPC_CheckPredicate, 21, 240, 26, 0, // Skip to: 18553
4387
/* 11657 */   MCD_OPC_Decode, 166, 15, 97, // Opcode: VPMINu8
4388
/* 11661 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11699
4389
/* 11666 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4390
/* 11669 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11684
4391
/* 11675 */   MCD_OPC_CheckPredicate, 21, 217, 26, 0, // Skip to: 18553
4392
/* 11680 */   MCD_OPC_Decode, 161, 15, 97, // Opcode: VPMINs16
4393
/* 11684 */   MCD_OPC_FilterValue, 243, 1, 207, 26, 0, // Skip to: 18553
4394
/* 11690 */   MCD_OPC_CheckPredicate, 21, 202, 26, 0, // Skip to: 18553
4395
/* 11695 */   MCD_OPC_Decode, 164, 15, 97, // Opcode: VPMINu16
4396
/* 11699 */   MCD_OPC_FilterValue, 2, 193, 26, 0, // Skip to: 18553
4397
/* 11704 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4398
/* 11707 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11722
4399
/* 11713 */   MCD_OPC_CheckPredicate, 21, 179, 26, 0, // Skip to: 18553
4400
/* 11718 */   MCD_OPC_Decode, 162, 15, 97, // Opcode: VPMINs32
4401
/* 11722 */   MCD_OPC_FilterValue, 243, 1, 169, 26, 0, // Skip to: 18553
4402
/* 11728 */   MCD_OPC_CheckPredicate, 21, 164, 26, 0, // Skip to: 18553
4403
/* 11733 */   MCD_OPC_Decode, 165, 15, 97, // Opcode: VPMINu32
4404
/* 11737 */   MCD_OPC_FilterValue, 11, 101, 0, 0, // Skip to: 11843
4405
/* 11742 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4406
/* 11745 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 11767
4407
/* 11750 */   MCD_OPC_CheckPredicate, 21, 142, 26, 0, // Skip to: 18553
4408
/* 11755 */   MCD_OPC_CheckField, 24, 8, 242, 1, 134, 26, 0, // Skip to: 18553
4409
/* 11763 */   MCD_OPC_Decode, 150, 15, 97, // Opcode: VPADDi8
4410
/* 11767 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11805
4411
/* 11772 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4412
/* 11775 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11790
4413
/* 11781 */   MCD_OPC_CheckPredicate, 21, 111, 26, 0, // Skip to: 18553
4414
/* 11786 */   MCD_OPC_Decode, 148, 15, 97, // Opcode: VPADDi16
4415
/* 11790 */   MCD_OPC_FilterValue, 243, 1, 101, 26, 0, // Skip to: 18553
4416
/* 11796 */   MCD_OPC_CheckPredicate, 23, 96, 26, 0, // Skip to: 18553
4417
/* 11801 */   MCD_OPC_Decode, 229, 15, 105, // Opcode: VQRDMLAHv4i16
4418
/* 11805 */   MCD_OPC_FilterValue, 2, 87, 26, 0, // Skip to: 18553
4419
/* 11810 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4420
/* 11813 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11828
4421
/* 11819 */   MCD_OPC_CheckPredicate, 21, 73, 26, 0, // Skip to: 18553
4422
/* 11824 */   MCD_OPC_Decode, 149, 15, 97, // Opcode: VPADDi32
4423
/* 11828 */   MCD_OPC_FilterValue, 243, 1, 63, 26, 0, // Skip to: 18553
4424
/* 11834 */   MCD_OPC_CheckPredicate, 23, 58, 26, 0, // Skip to: 18553
4425
/* 11839 */   MCD_OPC_Decode, 228, 15, 105, // Opcode: VQRDMLAHv2i32
4426
/* 11843 */   MCD_OPC_FilterValue, 12, 123, 0, 0, // Skip to: 11971
4427
/* 11848 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4428
/* 11851 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 11873
4429
/* 11856 */   MCD_OPC_CheckPredicate, 26, 36, 26, 0, // Skip to: 18553
4430
/* 11861 */   MCD_OPC_CheckField, 24, 8, 242, 1, 28, 26, 0, // Skip to: 18553
4431
/* 11869 */   MCD_OPC_Decode, 152, 10, 105, // Opcode: VFMAfd
4432
/* 11873 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 11911
4433
/* 11878 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4434
/* 11881 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11896
4435
/* 11887 */   MCD_OPC_CheckPredicate, 22, 5, 26, 0, // Skip to: 18553
4436
/* 11892 */   MCD_OPC_Decode, 154, 10, 105, // Opcode: VFMAhd
4437
/* 11896 */   MCD_OPC_FilterValue, 243, 1, 251, 25, 0, // Skip to: 18553
4438
/* 11902 */   MCD_OPC_CheckPredicate, 23, 246, 25, 0, // Skip to: 18553
4439
/* 11907 */   MCD_OPC_Decode, 237, 15, 105, // Opcode: VQRDMLSHv4i16
4440
/* 11911 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 11949
4441
/* 11916 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4442
/* 11919 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 11934
4443
/* 11925 */   MCD_OPC_CheckPredicate, 26, 223, 25, 0, // Skip to: 18553
4444
/* 11930 */   MCD_OPC_Decode, 159, 10, 105, // Opcode: VFMSfd
4445
/* 11934 */   MCD_OPC_FilterValue, 243, 1, 213, 25, 0, // Skip to: 18553
4446
/* 11940 */   MCD_OPC_CheckPredicate, 23, 208, 25, 0, // Skip to: 18553
4447
/* 11945 */   MCD_OPC_Decode, 236, 15, 105, // Opcode: VQRDMLSHv2i32
4448
/* 11949 */   MCD_OPC_FilterValue, 3, 199, 25, 0, // Skip to: 18553
4449
/* 11954 */   MCD_OPC_CheckPredicate, 22, 194, 25, 0, // Skip to: 18553
4450
/* 11959 */   MCD_OPC_CheckField, 24, 8, 242, 1, 186, 25, 0, // Skip to: 18553
4451
/* 11967 */   MCD_OPC_Decode, 161, 10, 105, // Opcode: VFMShd
4452
/* 11971 */   MCD_OPC_FilterValue, 13, 123, 0, 0, // Skip to: 12099
4453
/* 11976 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4454
/* 11979 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 12017
4455
/* 11984 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4456
/* 11987 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 12002
4457
/* 11993 */   MCD_OPC_CheckPredicate, 21, 155, 25, 0, // Skip to: 18553
4458
/* 11998 */   MCD_OPC_Decode, 215, 13, 105, // Opcode: VMLAfd
4459
/* 12002 */   MCD_OPC_FilterValue, 243, 1, 145, 25, 0, // Skip to: 18553
4460
/* 12008 */   MCD_OPC_CheckPredicate, 21, 140, 25, 0, // Skip to: 18553
4461
/* 12013 */   MCD_OPC_Decode, 194, 14, 97, // Opcode: VMULfd
4462
/* 12017 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 12055
4463
/* 12022 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4464
/* 12025 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 12040
4465
/* 12031 */   MCD_OPC_CheckPredicate, 22, 117, 25, 0, // Skip to: 18553
4466
/* 12036 */   MCD_OPC_Decode, 217, 13, 105, // Opcode: VMLAhd
4467
/* 12040 */   MCD_OPC_FilterValue, 243, 1, 107, 25, 0, // Skip to: 18553
4468
/* 12046 */   MCD_OPC_CheckPredicate, 22, 102, 25, 0, // Skip to: 18553
4469
/* 12051 */   MCD_OPC_Decode, 196, 14, 97, // Opcode: VMULhd
4470
/* 12055 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 12077
4471
/* 12060 */   MCD_OPC_CheckPredicate, 21, 88, 25, 0, // Skip to: 18553
4472
/* 12065 */   MCD_OPC_CheckField, 24, 8, 242, 1, 80, 25, 0, // Skip to: 18553
4473
/* 12073 */   MCD_OPC_Decode, 246, 13, 105, // Opcode: VMLSfd
4474
/* 12077 */   MCD_OPC_FilterValue, 3, 71, 25, 0, // Skip to: 18553
4475
/* 12082 */   MCD_OPC_CheckPredicate, 22, 66, 25, 0, // Skip to: 18553
4476
/* 12087 */   MCD_OPC_CheckField, 24, 8, 242, 1, 58, 25, 0, // Skip to: 18553
4477
/* 12095 */   MCD_OPC_Decode, 248, 13, 105, // Opcode: VMLShd
4478
/* 12099 */   MCD_OPC_FilterValue, 14, 91, 0, 0, // Skip to: 12195
4479
/* 12104 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4480
/* 12107 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12129
4481
/* 12112 */   MCD_OPC_CheckPredicate, 21, 36, 25, 0, // Skip to: 18553
4482
/* 12117 */   MCD_OPC_CheckField, 24, 8, 243, 1, 28, 25, 0, // Skip to: 18553
4483
/* 12125 */   MCD_OPC_Decode, 227, 7, 97, // Opcode: VACGEfd
4484
/* 12129 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 12151
4485
/* 12134 */   MCD_OPC_CheckPredicate, 22, 14, 25, 0, // Skip to: 18553
4486
/* 12139 */   MCD_OPC_CheckField, 24, 8, 243, 1, 6, 25, 0, // Skip to: 18553
4487
/* 12147 */   MCD_OPC_Decode, 229, 7, 97, // Opcode: VACGEhd
4488
/* 12151 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 12173
4489
/* 12156 */   MCD_OPC_CheckPredicate, 21, 248, 24, 0, // Skip to: 18553
4490
/* 12161 */   MCD_OPC_CheckField, 24, 8, 243, 1, 240, 24, 0, // Skip to: 18553
4491
/* 12169 */   MCD_OPC_Decode, 231, 7, 97, // Opcode: VACGTfd
4492
/* 12173 */   MCD_OPC_FilterValue, 3, 231, 24, 0, // Skip to: 18553
4493
/* 12178 */   MCD_OPC_CheckPredicate, 22, 226, 24, 0, // Skip to: 18553
4494
/* 12183 */   MCD_OPC_CheckField, 24, 8, 243, 1, 218, 24, 0, // Skip to: 18553
4495
/* 12191 */   MCD_OPC_Decode, 233, 7, 97, // Opcode: VACGThd
4496
/* 12195 */   MCD_OPC_FilterValue, 15, 209, 24, 0, // Skip to: 18553
4497
/* 12200 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4498
/* 12203 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12225
4499
/* 12208 */   MCD_OPC_CheckPredicate, 21, 196, 24, 0, // Skip to: 18553
4500
/* 12213 */   MCD_OPC_CheckField, 24, 8, 242, 1, 188, 24, 0, // Skip to: 18553
4501
/* 12221 */   MCD_OPC_Decode, 219, 16, 97, // Opcode: VRECPSfd
4502
/* 12225 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 12247
4503
/* 12230 */   MCD_OPC_CheckPredicate, 22, 174, 24, 0, // Skip to: 18553
4504
/* 12235 */   MCD_OPC_CheckField, 24, 8, 242, 1, 166, 24, 0, // Skip to: 18553
4505
/* 12243 */   MCD_OPC_Decode, 221, 16, 97, // Opcode: VRECPShd
4506
/* 12247 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 12269
4507
/* 12252 */   MCD_OPC_CheckPredicate, 21, 152, 24, 0, // Skip to: 18553
4508
/* 12257 */   MCD_OPC_CheckField, 24, 8, 242, 1, 144, 24, 0, // Skip to: 18553
4509
/* 12265 */   MCD_OPC_Decode, 205, 17, 97, // Opcode: VRSQRTSfd
4510
/* 12269 */   MCD_OPC_FilterValue, 3, 135, 24, 0, // Skip to: 18553
4511
/* 12274 */   MCD_OPC_CheckPredicate, 22, 130, 24, 0, // Skip to: 18553
4512
/* 12279 */   MCD_OPC_CheckField, 24, 8, 242, 1, 122, 24, 0, // Skip to: 18553
4513
/* 12287 */   MCD_OPC_Decode, 207, 17, 97, // Opcode: VRSQRTShd
4514
/* 12291 */   MCD_OPC_FilterValue, 1, 113, 24, 0, // Skip to: 18553
4515
/* 12296 */   MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
4516
/* 12299 */   MCD_OPC_FilterValue, 0, 209, 7, 0, // Skip to: 14305
4517
/* 12304 */   MCD_OPC_ExtractField, 25, 7,  // Inst{31-25} ...
4518
/* 12307 */   MCD_OPC_FilterValue, 121, 97, 24, 0, // Skip to: 18553
4519
/* 12312 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
4520
/* 12315 */   MCD_OPC_FilterValue, 0, 139, 0, 0, // Skip to: 12459
4521
/* 12320 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4522
/* 12323 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 12421
4523
/* 12328 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4524
/* 12331 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 12383
4525
/* 12336 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4526
/* 12339 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12361
4527
/* 12344 */   MCD_OPC_CheckPredicate, 21, 231, 6, 0, // Skip to: 14116
4528
/* 12349 */   MCD_OPC_CheckField, 19, 1, 1, 224, 6, 0, // Skip to: 14116
4529
/* 12356 */   MCD_OPC_Decode, 162, 18, 142, 1, // Opcode: VSHRsv8i8
4530
/* 12361 */   MCD_OPC_FilterValue, 1, 214, 6, 0, // Skip to: 14116
4531
/* 12366 */   MCD_OPC_CheckPredicate, 21, 209, 6, 0, // Skip to: 14116
4532
/* 12371 */   MCD_OPC_CheckField, 19, 1, 1, 202, 6, 0, // Skip to: 14116
4533
/* 12378 */   MCD_OPC_Decode, 170, 18, 142, 1, // Opcode: VSHRuv8i8
4534
/* 12383 */   MCD_OPC_FilterValue, 1, 192, 6, 0, // Skip to: 14116
4535
/* 12388 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4536
/* 12391 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12406
4537
/* 12396 */   MCD_OPC_CheckPredicate, 21, 179, 6, 0, // Skip to: 14116
4538
/* 12401 */   MCD_OPC_Decode, 159, 18, 143, 1, // Opcode: VSHRsv4i16
4539
/* 12406 */   MCD_OPC_FilterValue, 1, 169, 6, 0, // Skip to: 14116
4540
/* 12411 */   MCD_OPC_CheckPredicate, 21, 164, 6, 0, // Skip to: 14116
4541
/* 12416 */   MCD_OPC_Decode, 167, 18, 143, 1, // Opcode: VSHRuv4i16
4542
/* 12421 */   MCD_OPC_FilterValue, 1, 154, 6, 0, // Skip to: 14116
4543
/* 12426 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4544
/* 12429 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12444
4545
/* 12434 */   MCD_OPC_CheckPredicate, 21, 141, 6, 0, // Skip to: 14116
4546
/* 12439 */   MCD_OPC_Decode, 157, 18, 144, 1, // Opcode: VSHRsv2i32
4547
/* 12444 */   MCD_OPC_FilterValue, 1, 131, 6, 0, // Skip to: 14116
4548
/* 12449 */   MCD_OPC_CheckPredicate, 21, 126, 6, 0, // Skip to: 14116
4549
/* 12454 */   MCD_OPC_Decode, 165, 18, 144, 1, // Opcode: VSHRuv2i32
4550
/* 12459 */   MCD_OPC_FilterValue, 1, 139, 0, 0, // Skip to: 12603
4551
/* 12464 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4552
/* 12467 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 12565
4553
/* 12472 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4554
/* 12475 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 12527
4555
/* 12480 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4556
/* 12483 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12505
4557
/* 12488 */   MCD_OPC_CheckPredicate, 21, 87, 6, 0, // Skip to: 14116
4558
/* 12493 */   MCD_OPC_CheckField, 19, 1, 1, 80, 6, 0, // Skip to: 14116
4559
/* 12500 */   MCD_OPC_Decode, 198, 18, 145, 1, // Opcode: VSRAsv8i8
4560
/* 12505 */   MCD_OPC_FilterValue, 1, 70, 6, 0, // Skip to: 14116
4561
/* 12510 */   MCD_OPC_CheckPredicate, 21, 65, 6, 0, // Skip to: 14116
4562
/* 12515 */   MCD_OPC_CheckField, 19, 1, 1, 58, 6, 0, // Skip to: 14116
4563
/* 12522 */   MCD_OPC_Decode, 206, 18, 145, 1, // Opcode: VSRAuv8i8
4564
/* 12527 */   MCD_OPC_FilterValue, 1, 48, 6, 0, // Skip to: 14116
4565
/* 12532 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4566
/* 12535 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12550
4567
/* 12540 */   MCD_OPC_CheckPredicate, 21, 35, 6, 0, // Skip to: 14116
4568
/* 12545 */   MCD_OPC_Decode, 195, 18, 146, 1, // Opcode: VSRAsv4i16
4569
/* 12550 */   MCD_OPC_FilterValue, 1, 25, 6, 0, // Skip to: 14116
4570
/* 12555 */   MCD_OPC_CheckPredicate, 21, 20, 6, 0, // Skip to: 14116
4571
/* 12560 */   MCD_OPC_Decode, 203, 18, 146, 1, // Opcode: VSRAuv4i16
4572
/* 12565 */   MCD_OPC_FilterValue, 1, 10, 6, 0, // Skip to: 14116
4573
/* 12570 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4574
/* 12573 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12588
4575
/* 12578 */   MCD_OPC_CheckPredicate, 21, 253, 5, 0, // Skip to: 14116
4576
/* 12583 */   MCD_OPC_Decode, 193, 18, 147, 1, // Opcode: VSRAsv2i32
4577
/* 12588 */   MCD_OPC_FilterValue, 1, 243, 5, 0, // Skip to: 14116
4578
/* 12593 */   MCD_OPC_CheckPredicate, 21, 238, 5, 0, // Skip to: 14116
4579
/* 12598 */   MCD_OPC_Decode, 201, 18, 147, 1, // Opcode: VSRAuv2i32
4580
/* 12603 */   MCD_OPC_FilterValue, 2, 139, 0, 0, // Skip to: 12747
4581
/* 12608 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4582
/* 12611 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 12709
4583
/* 12616 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4584
/* 12619 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 12671
4585
/* 12624 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4586
/* 12627 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12649
4587
/* 12632 */   MCD_OPC_CheckPredicate, 21, 199, 5, 0, // Skip to: 14116
4588
/* 12637 */   MCD_OPC_CheckField, 19, 1, 1, 192, 5, 0, // Skip to: 14116
4589
/* 12644 */   MCD_OPC_Decode, 190, 17, 142, 1, // Opcode: VRSHRsv8i8
4590
/* 12649 */   MCD_OPC_FilterValue, 1, 182, 5, 0, // Skip to: 14116
4591
/* 12654 */   MCD_OPC_CheckPredicate, 21, 177, 5, 0, // Skip to: 14116
4592
/* 12659 */   MCD_OPC_CheckField, 19, 1, 1, 170, 5, 0, // Skip to: 14116
4593
/* 12666 */   MCD_OPC_Decode, 198, 17, 142, 1, // Opcode: VRSHRuv8i8
4594
/* 12671 */   MCD_OPC_FilterValue, 1, 160, 5, 0, // Skip to: 14116
4595
/* 12676 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4596
/* 12679 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12694
4597
/* 12684 */   MCD_OPC_CheckPredicate, 21, 147, 5, 0, // Skip to: 14116
4598
/* 12689 */   MCD_OPC_Decode, 187, 17, 143, 1, // Opcode: VRSHRsv4i16
4599
/* 12694 */   MCD_OPC_FilterValue, 1, 137, 5, 0, // Skip to: 14116
4600
/* 12699 */   MCD_OPC_CheckPredicate, 21, 132, 5, 0, // Skip to: 14116
4601
/* 12704 */   MCD_OPC_Decode, 195, 17, 143, 1, // Opcode: VRSHRuv4i16
4602
/* 12709 */   MCD_OPC_FilterValue, 1, 122, 5, 0, // Skip to: 14116
4603
/* 12714 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4604
/* 12717 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12732
4605
/* 12722 */   MCD_OPC_CheckPredicate, 21, 109, 5, 0, // Skip to: 14116
4606
/* 12727 */   MCD_OPC_Decode, 185, 17, 144, 1, // Opcode: VRSHRsv2i32
4607
/* 12732 */   MCD_OPC_FilterValue, 1, 99, 5, 0, // Skip to: 14116
4608
/* 12737 */   MCD_OPC_CheckPredicate, 21, 94, 5, 0, // Skip to: 14116
4609
/* 12742 */   MCD_OPC_Decode, 193, 17, 144, 1, // Opcode: VRSHRuv2i32
4610
/* 12747 */   MCD_OPC_FilterValue, 3, 139, 0, 0, // Skip to: 12891
4611
/* 12752 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4612
/* 12755 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 12853
4613
/* 12760 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4614
/* 12763 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 12815
4615
/* 12768 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4616
/* 12771 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 12793
4617
/* 12776 */   MCD_OPC_CheckPredicate, 21, 55, 5, 0, // Skip to: 14116
4618
/* 12781 */   MCD_OPC_CheckField, 19, 1, 1, 48, 5, 0, // Skip to: 14116
4619
/* 12788 */   MCD_OPC_Decode, 216, 17, 145, 1, // Opcode: VRSRAsv8i8
4620
/* 12793 */   MCD_OPC_FilterValue, 1, 38, 5, 0, // Skip to: 14116
4621
/* 12798 */   MCD_OPC_CheckPredicate, 21, 33, 5, 0, // Skip to: 14116
4622
/* 12803 */   MCD_OPC_CheckField, 19, 1, 1, 26, 5, 0, // Skip to: 14116
4623
/* 12810 */   MCD_OPC_Decode, 224, 17, 145, 1, // Opcode: VRSRAuv8i8
4624
/* 12815 */   MCD_OPC_FilterValue, 1, 16, 5, 0, // Skip to: 14116
4625
/* 12820 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4626
/* 12823 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12838
4627
/* 12828 */   MCD_OPC_CheckPredicate, 21, 3, 5, 0, // Skip to: 14116
4628
/* 12833 */   MCD_OPC_Decode, 213, 17, 146, 1, // Opcode: VRSRAsv4i16
4629
/* 12838 */   MCD_OPC_FilterValue, 1, 249, 4, 0, // Skip to: 14116
4630
/* 12843 */   MCD_OPC_CheckPredicate, 21, 244, 4, 0, // Skip to: 14116
4631
/* 12848 */   MCD_OPC_Decode, 221, 17, 146, 1, // Opcode: VRSRAuv4i16
4632
/* 12853 */   MCD_OPC_FilterValue, 1, 234, 4, 0, // Skip to: 14116
4633
/* 12858 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4634
/* 12861 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12876
4635
/* 12866 */   MCD_OPC_CheckPredicate, 21, 221, 4, 0, // Skip to: 14116
4636
/* 12871 */   MCD_OPC_Decode, 211, 17, 147, 1, // Opcode: VRSRAsv2i32
4637
/* 12876 */   MCD_OPC_FilterValue, 1, 211, 4, 0, // Skip to: 14116
4638
/* 12881 */   MCD_OPC_CheckPredicate, 21, 206, 4, 0, // Skip to: 14116
4639
/* 12886 */   MCD_OPC_Decode, 219, 17, 147, 1, // Opcode: VRSRAuv2i32
4640
/* 12891 */   MCD_OPC_FilterValue, 4, 84, 0, 0, // Skip to: 12980
4641
/* 12896 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4642
/* 12899 */   MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 12958
4643
/* 12904 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4644
/* 12907 */   MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 12936
4645
/* 12912 */   MCD_OPC_CheckPredicate, 21, 175, 4, 0, // Skip to: 14116
4646
/* 12917 */   MCD_OPC_CheckField, 24, 1, 1, 168, 4, 0, // Skip to: 14116
4647
/* 12924 */   MCD_OPC_CheckField, 19, 1, 1, 161, 4, 0, // Skip to: 14116
4648
/* 12931 */   MCD_OPC_Decode, 214, 18, 145, 1, // Opcode: VSRIv8i8
4649
/* 12936 */   MCD_OPC_FilterValue, 1, 151, 4, 0, // Skip to: 14116
4650
/* 12941 */   MCD_OPC_CheckPredicate, 21, 146, 4, 0, // Skip to: 14116
4651
/* 12946 */   MCD_OPC_CheckField, 24, 1, 1, 139, 4, 0, // Skip to: 14116
4652
/* 12953 */   MCD_OPC_Decode, 211, 18, 146, 1, // Opcode: VSRIv4i16
4653
/* 12958 */   MCD_OPC_FilterValue, 1, 129, 4, 0, // Skip to: 14116
4654
/* 12963 */   MCD_OPC_CheckPredicate, 21, 124, 4, 0, // Skip to: 14116
4655
/* 12968 */   MCD_OPC_CheckField, 24, 1, 1, 117, 4, 0, // Skip to: 14116
4656
/* 12975 */   MCD_OPC_Decode, 209, 18, 147, 1, // Opcode: VSRIv2i32
4657
/* 12980 */   MCD_OPC_FilterValue, 5, 139, 0, 0, // Skip to: 13124
4658
/* 12985 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4659
/* 12988 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 13086
4660
/* 12993 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4661
/* 12996 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 13048
4662
/* 13001 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4663
/* 13004 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 13026
4664
/* 13009 */   MCD_OPC_CheckPredicate, 21, 78, 4, 0, // Skip to: 14116
4665
/* 13014 */   MCD_OPC_CheckField, 19, 1, 1, 71, 4, 0, // Skip to: 14116
4666
/* 13021 */   MCD_OPC_Decode, 135, 18, 148, 1, // Opcode: VSHLiv8i8
4667
/* 13026 */   MCD_OPC_FilterValue, 1, 61, 4, 0, // Skip to: 14116
4668
/* 13031 */   MCD_OPC_CheckPredicate, 21, 56, 4, 0, // Skip to: 14116
4669
/* 13036 */   MCD_OPC_CheckField, 19, 1, 1, 49, 4, 0, // Skip to: 14116
4670
/* 13043 */   MCD_OPC_Decode, 184, 18, 149, 1, // Opcode: VSLIv8i8
4671
/* 13048 */   MCD_OPC_FilterValue, 1, 39, 4, 0, // Skip to: 14116
4672
/* 13053 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4673
/* 13056 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13071
4674
/* 13061 */   MCD_OPC_CheckPredicate, 21, 26, 4, 0, // Skip to: 14116
4675
/* 13066 */   MCD_OPC_Decode, 132, 18, 150, 1, // Opcode: VSHLiv4i16
4676
/* 13071 */   MCD_OPC_FilterValue, 1, 16, 4, 0, // Skip to: 14116
4677
/* 13076 */   MCD_OPC_CheckPredicate, 21, 11, 4, 0, // Skip to: 14116
4678
/* 13081 */   MCD_OPC_Decode, 181, 18, 151, 1, // Opcode: VSLIv4i16
4679
/* 13086 */   MCD_OPC_FilterValue, 1, 1, 4, 0, // Skip to: 14116
4680
/* 13091 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4681
/* 13094 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13109
4682
/* 13099 */   MCD_OPC_CheckPredicate, 21, 244, 3, 0, // Skip to: 14116
4683
/* 13104 */   MCD_OPC_Decode, 130, 18, 152, 1, // Opcode: VSHLiv2i32
4684
/* 13109 */   MCD_OPC_FilterValue, 1, 234, 3, 0, // Skip to: 14116
4685
/* 13114 */   MCD_OPC_CheckPredicate, 21, 229, 3, 0, // Skip to: 14116
4686
/* 13119 */   MCD_OPC_Decode, 179, 18, 153, 1, // Opcode: VSLIv2i32
4687
/* 13124 */   MCD_OPC_FilterValue, 6, 84, 0, 0, // Skip to: 13213
4688
/* 13129 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4689
/* 13132 */   MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 13191
4690
/* 13137 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4691
/* 13140 */   MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 13169
4692
/* 13145 */   MCD_OPC_CheckPredicate, 21, 198, 3, 0, // Skip to: 14116
4693
/* 13150 */   MCD_OPC_CheckField, 24, 1, 1, 191, 3, 0, // Skip to: 14116
4694
/* 13157 */   MCD_OPC_CheckField, 19, 1, 1, 184, 3, 0, // Skip to: 14116
4695
/* 13164 */   MCD_OPC_Decode, 160, 16, 148, 1, // Opcode: VQSHLsuv8i8
4696
/* 13169 */   MCD_OPC_FilterValue, 1, 174, 3, 0, // Skip to: 14116
4697
/* 13174 */   MCD_OPC_CheckPredicate, 21, 169, 3, 0, // Skip to: 14116
4698
/* 13179 */   MCD_OPC_CheckField, 24, 1, 1, 162, 3, 0, // Skip to: 14116
4699
/* 13186 */   MCD_OPC_Decode, 157, 16, 150, 1, // Opcode: VQSHLsuv4i16
4700
/* 13191 */   MCD_OPC_FilterValue, 1, 152, 3, 0, // Skip to: 14116
4701
/* 13196 */   MCD_OPC_CheckPredicate, 21, 147, 3, 0, // Skip to: 14116
4702
/* 13201 */   MCD_OPC_CheckField, 24, 1, 1, 140, 3, 0, // Skip to: 14116
4703
/* 13208 */   MCD_OPC_Decode, 155, 16, 152, 1, // Opcode: VQSHLsuv2i32
4704
/* 13213 */   MCD_OPC_FilterValue, 7, 139, 0, 0, // Skip to: 13357
4705
/* 13218 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4706
/* 13221 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 13319
4707
/* 13226 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4708
/* 13229 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 13281
4709
/* 13234 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4710
/* 13237 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 13259
4711
/* 13242 */   MCD_OPC_CheckPredicate, 21, 101, 3, 0, // Skip to: 14116
4712
/* 13247 */   MCD_OPC_CheckField, 19, 1, 1, 94, 3, 0, // Skip to: 14116
4713
/* 13254 */   MCD_OPC_Decode, 152, 16, 148, 1, // Opcode: VQSHLsiv8i8
4714
/* 13259 */   MCD_OPC_FilterValue, 1, 84, 3, 0, // Skip to: 14116
4715
/* 13264 */   MCD_OPC_CheckPredicate, 21, 79, 3, 0, // Skip to: 14116
4716
/* 13269 */   MCD_OPC_CheckField, 19, 1, 1, 72, 3, 0, // Skip to: 14116
4717
/* 13276 */   MCD_OPC_Decode, 176, 16, 148, 1, // Opcode: VQSHLuiv8i8
4718
/* 13281 */   MCD_OPC_FilterValue, 1, 62, 3, 0, // Skip to: 14116
4719
/* 13286 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4720
/* 13289 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13304
4721
/* 13294 */   MCD_OPC_CheckPredicate, 21, 49, 3, 0, // Skip to: 14116
4722
/* 13299 */   MCD_OPC_Decode, 149, 16, 150, 1, // Opcode: VQSHLsiv4i16
4723
/* 13304 */   MCD_OPC_FilterValue, 1, 39, 3, 0, // Skip to: 14116
4724
/* 13309 */   MCD_OPC_CheckPredicate, 21, 34, 3, 0, // Skip to: 14116
4725
/* 13314 */   MCD_OPC_Decode, 173, 16, 150, 1, // Opcode: VQSHLuiv4i16
4726
/* 13319 */   MCD_OPC_FilterValue, 1, 24, 3, 0, // Skip to: 14116
4727
/* 13324 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4728
/* 13327 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13342
4729
/* 13332 */   MCD_OPC_CheckPredicate, 21, 11, 3, 0, // Skip to: 14116
4730
/* 13337 */   MCD_OPC_Decode, 147, 16, 152, 1, // Opcode: VQSHLsiv2i32
4731
/* 13342 */   MCD_OPC_FilterValue, 1, 1, 3, 0, // Skip to: 14116
4732
/* 13347 */   MCD_OPC_CheckPredicate, 21, 252, 2, 0, // Skip to: 14116
4733
/* 13352 */   MCD_OPC_Decode, 171, 16, 152, 1, // Opcode: VQSHLuiv2i32
4734
/* 13357 */   MCD_OPC_FilterValue, 8, 139, 0, 0, // Skip to: 13501
4735
/* 13362 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4736
/* 13365 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 13463
4737
/* 13370 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4738
/* 13373 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 13425
4739
/* 13378 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4740
/* 13381 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 13403
4741
/* 13386 */   MCD_OPC_CheckPredicate, 21, 213, 2, 0, // Skip to: 14116
4742
/* 13391 */   MCD_OPC_CheckField, 19, 1, 1, 206, 2, 0, // Skip to: 14116
4743
/* 13398 */   MCD_OPC_Decode, 154, 18, 154, 1, // Opcode: VSHRNv8i8
4744
/* 13403 */   MCD_OPC_FilterValue, 1, 196, 2, 0, // Skip to: 14116
4745
/* 13408 */   MCD_OPC_CheckPredicate, 21, 191, 2, 0, // Skip to: 14116
4746
/* 13413 */   MCD_OPC_CheckField, 19, 1, 1, 184, 2, 0, // Skip to: 14116
4747
/* 13420 */   MCD_OPC_Decode, 193, 16, 154, 1, // Opcode: VQSHRUNv8i8
4748
/* 13425 */   MCD_OPC_FilterValue, 1, 174, 2, 0, // Skip to: 14116
4749
/* 13430 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4750
/* 13433 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13448
4751
/* 13438 */   MCD_OPC_CheckPredicate, 21, 161, 2, 0, // Skip to: 14116
4752
/* 13443 */   MCD_OPC_Decode, 153, 18, 155, 1, // Opcode: VSHRNv4i16
4753
/* 13448 */   MCD_OPC_FilterValue, 1, 151, 2, 0, // Skip to: 14116
4754
/* 13453 */   MCD_OPC_CheckPredicate, 21, 146, 2, 0, // Skip to: 14116
4755
/* 13458 */   MCD_OPC_Decode, 192, 16, 155, 1, // Opcode: VQSHRUNv4i16
4756
/* 13463 */   MCD_OPC_FilterValue, 1, 136, 2, 0, // Skip to: 14116
4757
/* 13468 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4758
/* 13471 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13486
4759
/* 13476 */   MCD_OPC_CheckPredicate, 21, 123, 2, 0, // Skip to: 14116
4760
/* 13481 */   MCD_OPC_Decode, 152, 18, 156, 1, // Opcode: VSHRNv2i32
4761
/* 13486 */   MCD_OPC_FilterValue, 1, 113, 2, 0, // Skip to: 14116
4762
/* 13491 */   MCD_OPC_CheckPredicate, 21, 108, 2, 0, // Skip to: 14116
4763
/* 13496 */   MCD_OPC_Decode, 191, 16, 156, 1, // Opcode: VQSHRUNv2i32
4764
/* 13501 */   MCD_OPC_FilterValue, 9, 139, 0, 0, // Skip to: 13645
4765
/* 13506 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4766
/* 13509 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 13607
4767
/* 13514 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4768
/* 13517 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 13569
4769
/* 13522 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4770
/* 13525 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 13547
4771
/* 13530 */   MCD_OPC_CheckPredicate, 21, 69, 2, 0, // Skip to: 14116
4772
/* 13535 */   MCD_OPC_CheckField, 19, 1, 1, 62, 2, 0, // Skip to: 14116
4773
/* 13542 */   MCD_OPC_Decode, 187, 16, 154, 1, // Opcode: VQSHRNsv8i8
4774
/* 13547 */   MCD_OPC_FilterValue, 1, 52, 2, 0, // Skip to: 14116
4775
/* 13552 */   MCD_OPC_CheckPredicate, 21, 47, 2, 0, // Skip to: 14116
4776
/* 13557 */   MCD_OPC_CheckField, 19, 1, 1, 40, 2, 0, // Skip to: 14116
4777
/* 13564 */   MCD_OPC_Decode, 190, 16, 154, 1, // Opcode: VQSHRNuv8i8
4778
/* 13569 */   MCD_OPC_FilterValue, 1, 30, 2, 0, // Skip to: 14116
4779
/* 13574 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4780
/* 13577 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13592
4781
/* 13582 */   MCD_OPC_CheckPredicate, 21, 17, 2, 0, // Skip to: 14116
4782
/* 13587 */   MCD_OPC_Decode, 186, 16, 155, 1, // Opcode: VQSHRNsv4i16
4783
/* 13592 */   MCD_OPC_FilterValue, 1, 7, 2, 0, // Skip to: 14116
4784
/* 13597 */   MCD_OPC_CheckPredicate, 21, 2, 2, 0, // Skip to: 14116
4785
/* 13602 */   MCD_OPC_Decode, 189, 16, 155, 1, // Opcode: VQSHRNuv4i16
4786
/* 13607 */   MCD_OPC_FilterValue, 1, 248, 1, 0, // Skip to: 14116
4787
/* 13612 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4788
/* 13615 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13630
4789
/* 13620 */   MCD_OPC_CheckPredicate, 21, 235, 1, 0, // Skip to: 14116
4790
/* 13625 */   MCD_OPC_Decode, 185, 16, 156, 1, // Opcode: VQSHRNsv2i32
4791
/* 13630 */   MCD_OPC_FilterValue, 1, 225, 1, 0, // Skip to: 14116
4792
/* 13635 */   MCD_OPC_CheckPredicate, 21, 220, 1, 0, // Skip to: 14116
4793
/* 13640 */   MCD_OPC_Decode, 188, 16, 156, 1, // Opcode: VQSHRNuv2i32
4794
/* 13645 */   MCD_OPC_FilterValue, 10, 243, 0, 0, // Skip to: 13893
4795
/* 13650 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4796
/* 13653 */   MCD_OPC_FilterValue, 0, 163, 0, 0, // Skip to: 13821
4797
/* 13658 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4798
/* 13661 */   MCD_OPC_FilterValue, 0, 83, 0, 0, // Skip to: 13749
4799
/* 13666 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4800
/* 13669 */   MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 13709
4801
/* 13674 */   MCD_OPC_ExtractField, 19, 1,  // Inst{19} ...
4802
/* 13677 */   MCD_OPC_FilterValue, 1, 178, 1, 0, // Skip to: 14116
4803
/* 13682 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13699
4804
/* 13687 */   MCD_OPC_CheckField, 16, 3, 0, 5, 0, 0, // Skip to: 13699
4805
/* 13694 */   MCD_OPC_Decode, 142, 14, 134, 1, // Opcode: VMOVLsv8i16
4806
/* 13699 */   MCD_OPC_CheckPredicate, 21, 156, 1, 0, // Skip to: 14116
4807
/* 13704 */   MCD_OPC_Decode, 252, 17, 157, 1, // Opcode: VSHLLsv8i16
4808
/* 13709 */   MCD_OPC_FilterValue, 1, 146, 1, 0, // Skip to: 14116
4809
/* 13714 */   MCD_OPC_ExtractField, 19, 1,  // Inst{19} ...
4810
/* 13717 */   MCD_OPC_FilterValue, 1, 138, 1, 0, // Skip to: 14116
4811
/* 13722 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13739
4812
/* 13727 */   MCD_OPC_CheckField, 16, 3, 0, 5, 0, 0, // Skip to: 13739
4813
/* 13734 */   MCD_OPC_Decode, 145, 14, 134, 1, // Opcode: VMOVLuv8i16
4814
/* 13739 */   MCD_OPC_CheckPredicate, 21, 116, 1, 0, // Skip to: 14116
4815
/* 13744 */   MCD_OPC_Decode, 255, 17, 157, 1, // Opcode: VSHLLuv8i16
4816
/* 13749 */   MCD_OPC_FilterValue, 1, 106, 1, 0, // Skip to: 14116
4817
/* 13754 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4818
/* 13757 */   MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 13789
4819
/* 13762 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13779
4820
/* 13767 */   MCD_OPC_CheckField, 16, 4, 0, 5, 0, 0, // Skip to: 13779
4821
/* 13774 */   MCD_OPC_Decode, 141, 14, 134, 1, // Opcode: VMOVLsv4i32
4822
/* 13779 */   MCD_OPC_CheckPredicate, 21, 76, 1, 0, // Skip to: 14116
4823
/* 13784 */   MCD_OPC_Decode, 251, 17, 158, 1, // Opcode: VSHLLsv4i32
4824
/* 13789 */   MCD_OPC_FilterValue, 1, 66, 1, 0, // Skip to: 14116
4825
/* 13794 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13811
4826
/* 13799 */   MCD_OPC_CheckField, 16, 4, 0, 5, 0, 0, // Skip to: 13811
4827
/* 13806 */   MCD_OPC_Decode, 144, 14, 134, 1, // Opcode: VMOVLuv4i32
4828
/* 13811 */   MCD_OPC_CheckPredicate, 21, 44, 1, 0, // Skip to: 14116
4829
/* 13816 */   MCD_OPC_Decode, 254, 17, 158, 1, // Opcode: VSHLLuv4i32
4830
/* 13821 */   MCD_OPC_FilterValue, 1, 34, 1, 0, // Skip to: 14116
4831
/* 13826 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4832
/* 13829 */   MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 13861
4833
/* 13834 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13851
4834
/* 13839 */   MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 13851
4835
/* 13846 */   MCD_OPC_Decode, 140, 14, 134, 1, // Opcode: VMOVLsv2i64
4836
/* 13851 */   MCD_OPC_CheckPredicate, 21, 4, 1, 0, // Skip to: 14116
4837
/* 13856 */   MCD_OPC_Decode, 250, 17, 159, 1, // Opcode: VSHLLsv2i64
4838
/* 13861 */   MCD_OPC_FilterValue, 1, 250, 0, 0, // Skip to: 14116
4839
/* 13866 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 13883
4840
/* 13871 */   MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 13883
4841
/* 13878 */   MCD_OPC_Decode, 143, 14, 134, 1, // Opcode: VMOVLuv2i64
4842
/* 13883 */   MCD_OPC_CheckPredicate, 21, 228, 0, 0, // Skip to: 14116
4843
/* 13888 */   MCD_OPC_Decode, 253, 17, 159, 1, // Opcode: VSHLLuv2i64
4844
/* 13893 */   MCD_OPC_FilterValue, 12, 33, 0, 0, // Skip to: 13931
4845
/* 13898 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4846
/* 13901 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13916
4847
/* 13906 */   MCD_OPC_CheckPredicate, 22, 205, 0, 0, // Skip to: 14116
4848
/* 13911 */   MCD_OPC_Decode, 247, 9, 160, 1, // Opcode: VCVTxs2hd
4849
/* 13916 */   MCD_OPC_FilterValue, 1, 195, 0, 0, // Skip to: 14116
4850
/* 13921 */   MCD_OPC_CheckPredicate, 22, 190, 0, 0, // Skip to: 14116
4851
/* 13926 */   MCD_OPC_Decode, 251, 9, 160, 1, // Opcode: VCVTxu2hd
4852
/* 13931 */   MCD_OPC_FilterValue, 13, 33, 0, 0, // Skip to: 13969
4853
/* 13936 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4854
/* 13939 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13954
4855
/* 13944 */   MCD_OPC_CheckPredicate, 22, 167, 0, 0, // Skip to: 14116
4856
/* 13949 */   MCD_OPC_Decode, 233, 9, 160, 1, // Opcode: VCVTh2xsd
4857
/* 13954 */   MCD_OPC_FilterValue, 1, 157, 0, 0, // Skip to: 14116
4858
/* 13959 */   MCD_OPC_CheckPredicate, 22, 152, 0, 0, // Skip to: 14116
4859
/* 13964 */   MCD_OPC_Decode, 235, 9, 160, 1, // Opcode: VCVTh2xud
4860
/* 13969 */   MCD_OPC_FilterValue, 14, 80, 0, 0, // Skip to: 14054
4861
/* 13974 */   MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
4862
/* 13977 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 13999
4863
/* 13982 */   MCD_OPC_CheckPredicate, 21, 34, 0, 0, // Skip to: 14021
4864
/* 13987 */   MCD_OPC_CheckField, 19, 3, 0, 27, 0, 0, // Skip to: 14021
4865
/* 13994 */   MCD_OPC_Decode, 165, 14, 161, 1, // Opcode: VMOVv8i8
4866
/* 13999 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 14021
4867
/* 14004 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 14021
4868
/* 14009 */   MCD_OPC_CheckField, 19, 3, 0, 5, 0, 0, // Skip to: 14021
4869
/* 14016 */   MCD_OPC_Decode, 157, 14, 161, 1, // Opcode: VMOVv1i64
4870
/* 14021 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4871
/* 14024 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 14039
4872
/* 14029 */   MCD_OPC_CheckPredicate, 21, 82, 0, 0, // Skip to: 14116
4873
/* 14034 */   MCD_OPC_Decode, 245, 9, 160, 1, // Opcode: VCVTxs2fd
4874
/* 14039 */   MCD_OPC_FilterValue, 1, 72, 0, 0, // Skip to: 14116
4875
/* 14044 */   MCD_OPC_CheckPredicate, 21, 67, 0, 0, // Skip to: 14116
4876
/* 14049 */   MCD_OPC_Decode, 249, 9, 160, 1, // Opcode: VCVTxu2fd
4877
/* 14054 */   MCD_OPC_FilterValue, 15, 57, 0, 0, // Skip to: 14116
4878
/* 14059 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
4879
/* 14062 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 14077
4880
/* 14067 */   MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 14092
4881
/* 14072 */   MCD_OPC_Decode, 224, 9, 160, 1, // Opcode: VCVTf2xsd
4882
/* 14077 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 14092
4883
/* 14082 */   MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 14092
4884
/* 14087 */   MCD_OPC_Decode, 226, 9, 160, 1, // Opcode: VCVTf2xud
4885
/* 14092 */   MCD_OPC_CheckPredicate, 21, 19, 0, 0, // Skip to: 14116
4886
/* 14097 */   MCD_OPC_CheckField, 19, 3, 0, 12, 0, 0, // Skip to: 14116
4887
/* 14104 */   MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 14116
4888
/* 14111 */   MCD_OPC_Decode, 158, 14, 161, 1, // Opcode: VMOVv2f32
4889
/* 14116 */   MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
4890
/* 14119 */   MCD_OPC_FilterValue, 0, 88, 0, 0, // Skip to: 14212
4891
/* 14124 */   MCD_OPC_ExtractField, 19, 3,  // Inst{21-19} ...
4892
/* 14127 */   MCD_OPC_FilterValue, 0, 69, 17, 0, // Skip to: 18553
4893
/* 14132 */   MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
4894
/* 14135 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 14157
4895
/* 14140 */   MCD_OPC_CheckPredicate, 21, 57, 0, 0, // Skip to: 14202
4896
/* 14145 */   MCD_OPC_CheckField, 10, 2, 2, 50, 0, 0, // Skip to: 14202
4897
/* 14152 */   MCD_OPC_Decode, 162, 14, 161, 1, // Opcode: VMOVv4i16
4898
/* 14157 */   MCD_OPC_FilterValue, 1, 40, 0, 0, // Skip to: 14202
4899
/* 14162 */   MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
4900
/* 14165 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 14180
4901
/* 14170 */   MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 14202
4902
/* 14175 */   MCD_OPC_Decode, 245, 14, 161, 1, // Opcode: VORRiv2i32
4903
/* 14180 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 14202
4904
/* 14185 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 14202
4905
/* 14190 */   MCD_OPC_CheckField, 10, 1, 0, 5, 0, 0, // Skip to: 14202
4906
/* 14197 */   MCD_OPC_Decode, 246, 14, 161, 1, // Opcode: VORRiv4i16
4907
/* 14202 */   MCD_OPC_CheckPredicate, 21, 250, 16, 0, // Skip to: 18553
4908
/* 14207 */   MCD_OPC_Decode, 159, 14, 161, 1, // Opcode: VMOVv2i32
4909
/* 14212 */   MCD_OPC_FilterValue, 1, 240, 16, 0, // Skip to: 18553
4910
/* 14217 */   MCD_OPC_ExtractField, 19, 3,  // Inst{21-19} ...
4911
/* 14220 */   MCD_OPC_FilterValue, 0, 232, 16, 0, // Skip to: 18553
4912
/* 14225 */   MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
4913
/* 14228 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 14250
4914
/* 14233 */   MCD_OPC_CheckPredicate, 21, 57, 0, 0, // Skip to: 14295
4915
/* 14238 */   MCD_OPC_CheckField, 10, 2, 2, 50, 0, 0, // Skip to: 14295
4916
/* 14245 */   MCD_OPC_Decode, 217, 14, 161, 1, // Opcode: VMVNv4i16
4917
/* 14250 */   MCD_OPC_FilterValue, 1, 40, 0, 0, // Skip to: 14295
4918
/* 14255 */   MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
4919
/* 14258 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 14273
4920
/* 14263 */   MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 14295
4921
/* 14268 */   MCD_OPC_Decode, 140, 8, 161, 1, // Opcode: VBICiv2i32
4922
/* 14273 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 14295
4923
/* 14278 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 14295
4924
/* 14283 */   MCD_OPC_CheckField, 10, 1, 0, 5, 0, 0, // Skip to: 14295
4925
/* 14290 */   MCD_OPC_Decode, 141, 8, 161, 1, // Opcode: VBICiv4i16
4926
/* 14295 */   MCD_OPC_CheckPredicate, 21, 157, 16, 0, // Skip to: 18553
4927
/* 14300 */   MCD_OPC_Decode, 216, 14, 161, 1, // Opcode: VMVNv2i32
4928
/* 14305 */   MCD_OPC_FilterValue, 1, 147, 16, 0, // Skip to: 18553
4929
/* 14310 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
4930
/* 14313 */   MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 14353
4931
/* 14318 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4932
/* 14321 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14337
4933
/* 14327 */   MCD_OPC_CheckPredicate, 21, 125, 16, 0, // Skip to: 18553
4934
/* 14332 */   MCD_OPC_Decode, 156, 18, 162, 1, // Opcode: VSHRsv1i64
4935
/* 14337 */   MCD_OPC_FilterValue, 243, 1, 114, 16, 0, // Skip to: 18553
4936
/* 14343 */   MCD_OPC_CheckPredicate, 21, 109, 16, 0, // Skip to: 18553
4937
/* 14348 */   MCD_OPC_Decode, 164, 18, 162, 1, // Opcode: VSHRuv1i64
4938
/* 14353 */   MCD_OPC_FilterValue, 1, 35, 0, 0, // Skip to: 14393
4939
/* 14358 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4940
/* 14361 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14377
4941
/* 14367 */   MCD_OPC_CheckPredicate, 21, 85, 16, 0, // Skip to: 18553
4942
/* 14372 */   MCD_OPC_Decode, 192, 18, 163, 1, // Opcode: VSRAsv1i64
4943
/* 14377 */   MCD_OPC_FilterValue, 243, 1, 74, 16, 0, // Skip to: 18553
4944
/* 14383 */   MCD_OPC_CheckPredicate, 21, 69, 16, 0, // Skip to: 18553
4945
/* 14388 */   MCD_OPC_Decode, 200, 18, 163, 1, // Opcode: VSRAuv1i64
4946
/* 14393 */   MCD_OPC_FilterValue, 2, 35, 0, 0, // Skip to: 14433
4947
/* 14398 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4948
/* 14401 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14417
4949
/* 14407 */   MCD_OPC_CheckPredicate, 21, 45, 16, 0, // Skip to: 18553
4950
/* 14412 */   MCD_OPC_Decode, 184, 17, 162, 1, // Opcode: VRSHRsv1i64
4951
/* 14417 */   MCD_OPC_FilterValue, 243, 1, 34, 16, 0, // Skip to: 18553
4952
/* 14423 */   MCD_OPC_CheckPredicate, 21, 29, 16, 0, // Skip to: 18553
4953
/* 14428 */   MCD_OPC_Decode, 192, 17, 162, 1, // Opcode: VRSHRuv1i64
4954
/* 14433 */   MCD_OPC_FilterValue, 3, 35, 0, 0, // Skip to: 14473
4955
/* 14438 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4956
/* 14441 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14457
4957
/* 14447 */   MCD_OPC_CheckPredicate, 21, 5, 16, 0, // Skip to: 18553
4958
/* 14452 */   MCD_OPC_Decode, 210, 17, 163, 1, // Opcode: VRSRAsv1i64
4959
/* 14457 */   MCD_OPC_FilterValue, 243, 1, 250, 15, 0, // Skip to: 18553
4960
/* 14463 */   MCD_OPC_CheckPredicate, 21, 245, 15, 0, // Skip to: 18553
4961
/* 14468 */   MCD_OPC_Decode, 218, 17, 163, 1, // Opcode: VRSRAuv1i64
4962
/* 14473 */   MCD_OPC_FilterValue, 4, 18, 0, 0, // Skip to: 14496
4963
/* 14478 */   MCD_OPC_CheckPredicate, 21, 230, 15, 0, // Skip to: 18553
4964
/* 14483 */   MCD_OPC_CheckField, 24, 8, 243, 1, 222, 15, 0, // Skip to: 18553
4965
/* 14491 */   MCD_OPC_Decode, 208, 18, 163, 1, // Opcode: VSRIv1i64
4966
/* 14496 */   MCD_OPC_FilterValue, 5, 35, 0, 0, // Skip to: 14536
4967
/* 14501 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4968
/* 14504 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14520
4969
/* 14510 */   MCD_OPC_CheckPredicate, 21, 198, 15, 0, // Skip to: 18553
4970
/* 14515 */   MCD_OPC_Decode, 129, 18, 164, 1, // Opcode: VSHLiv1i64
4971
/* 14520 */   MCD_OPC_FilterValue, 243, 1, 187, 15, 0, // Skip to: 18553
4972
/* 14526 */   MCD_OPC_CheckPredicate, 21, 182, 15, 0, // Skip to: 18553
4973
/* 14531 */   MCD_OPC_Decode, 178, 18, 165, 1, // Opcode: VSLIv1i64
4974
/* 14536 */   MCD_OPC_FilterValue, 6, 18, 0, 0, // Skip to: 14559
4975
/* 14541 */   MCD_OPC_CheckPredicate, 21, 167, 15, 0, // Skip to: 18553
4976
/* 14546 */   MCD_OPC_CheckField, 24, 8, 243, 1, 159, 15, 0, // Skip to: 18553
4977
/* 14554 */   MCD_OPC_Decode, 154, 16, 164, 1, // Opcode: VQSHLsuv1i64
4978
/* 14559 */   MCD_OPC_FilterValue, 7, 149, 15, 0, // Skip to: 18553
4979
/* 14564 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4980
/* 14567 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 14583
4981
/* 14573 */   MCD_OPC_CheckPredicate, 21, 135, 15, 0, // Skip to: 18553
4982
/* 14578 */   MCD_OPC_Decode, 146, 16, 164, 1, // Opcode: VQSHLsiv1i64
4983
/* 14583 */   MCD_OPC_FilterValue, 243, 1, 124, 15, 0, // Skip to: 18553
4984
/* 14589 */   MCD_OPC_CheckPredicate, 21, 119, 15, 0, // Skip to: 18553
4985
/* 14594 */   MCD_OPC_Decode, 170, 16, 164, 1, // Opcode: VQSHLuiv1i64
4986
/* 14599 */   MCD_OPC_FilterValue, 1, 109, 15, 0, // Skip to: 18553
4987
/* 14604 */   MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
4988
/* 14607 */   MCD_OPC_FilterValue, 0, 89, 7, 0, // Skip to: 16493
4989
/* 14612 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
4990
/* 14615 */   MCD_OPC_FilterValue, 0, 155, 0, 0, // Skip to: 14775
4991
/* 14620 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
4992
/* 14623 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 14661
4993
/* 14628 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
4994
/* 14631 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14646
4995
/* 14637 */   MCD_OPC_CheckPredicate, 21, 71, 15, 0, // Skip to: 18553
4996
/* 14642 */   MCD_OPC_Decode, 173, 15, 98, // Opcode: VQADDsv16i8
4997
/* 14646 */   MCD_OPC_FilterValue, 243, 1, 61, 15, 0, // Skip to: 18553
4998
/* 14652 */   MCD_OPC_CheckPredicate, 21, 56, 15, 0, // Skip to: 18553
4999
/* 14657 */   MCD_OPC_Decode, 181, 15, 98, // Opcode: VQADDuv16i8
5000
/* 14661 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 14699
5001
/* 14666 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5002
/* 14669 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14684
5003
/* 14675 */   MCD_OPC_CheckPredicate, 21, 33, 15, 0, // Skip to: 18553
5004
/* 14680 */   MCD_OPC_Decode, 179, 15, 98, // Opcode: VQADDsv8i16
5005
/* 14684 */   MCD_OPC_FilterValue, 243, 1, 23, 15, 0, // Skip to: 18553
5006
/* 14690 */   MCD_OPC_CheckPredicate, 21, 18, 15, 0, // Skip to: 18553
5007
/* 14695 */   MCD_OPC_Decode, 187, 15, 98, // Opcode: VQADDuv8i16
5008
/* 14699 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 14737
5009
/* 14704 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5010
/* 14707 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14722
5011
/* 14713 */   MCD_OPC_CheckPredicate, 21, 251, 14, 0, // Skip to: 18553
5012
/* 14718 */   MCD_OPC_Decode, 178, 15, 98, // Opcode: VQADDsv4i32
5013
/* 14722 */   MCD_OPC_FilterValue, 243, 1, 241, 14, 0, // Skip to: 18553
5014
/* 14728 */   MCD_OPC_CheckPredicate, 21, 236, 14, 0, // Skip to: 18553
5015
/* 14733 */   MCD_OPC_Decode, 186, 15, 98, // Opcode: VQADDuv4i32
5016
/* 14737 */   MCD_OPC_FilterValue, 3, 227, 14, 0, // Skip to: 18553
5017
/* 14742 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5018
/* 14745 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14760
5019
/* 14751 */   MCD_OPC_CheckPredicate, 21, 213, 14, 0, // Skip to: 18553
5020
/* 14756 */   MCD_OPC_Decode, 176, 15, 98, // Opcode: VQADDsv2i64
5021
/* 14760 */   MCD_OPC_FilterValue, 243, 1, 203, 14, 0, // Skip to: 18553
5022
/* 14766 */   MCD_OPC_CheckPredicate, 21, 198, 14, 0, // Skip to: 18553
5023
/* 14771 */   MCD_OPC_Decode, 184, 15, 98, // Opcode: VQADDuv2i64
5024
/* 14775 */   MCD_OPC_FilterValue, 1, 155, 0, 0, // Skip to: 14935
5025
/* 14780 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5026
/* 14783 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 14821
5027
/* 14788 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5028
/* 14791 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14806
5029
/* 14797 */   MCD_OPC_CheckPredicate, 21, 167, 14, 0, // Skip to: 18553
5030
/* 14802 */   MCD_OPC_Decode, 138, 8, 98, // Opcode: VANDq
5031
/* 14806 */   MCD_OPC_FilterValue, 243, 1, 157, 14, 0, // Skip to: 18553
5032
/* 14812 */   MCD_OPC_CheckPredicate, 21, 152, 14, 0, // Skip to: 18553
5033
/* 14817 */   MCD_OPC_Decode, 141, 10, 98, // Opcode: VEORq
5034
/* 14821 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 14859
5035
/* 14826 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5036
/* 14829 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14844
5037
/* 14835 */   MCD_OPC_CheckPredicate, 21, 129, 14, 0, // Skip to: 18553
5038
/* 14840 */   MCD_OPC_Decode, 144, 8, 98, // Opcode: VBICq
5039
/* 14844 */   MCD_OPC_FilterValue, 243, 1, 119, 14, 0, // Skip to: 18553
5040
/* 14850 */   MCD_OPC_CheckPredicate, 21, 114, 14, 0, // Skip to: 18553
5041
/* 14855 */   MCD_OPC_Decode, 150, 8, 106, // Opcode: VBSLq
5042
/* 14859 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 14897
5043
/* 14864 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5044
/* 14867 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14882
5045
/* 14873 */   MCD_OPC_CheckPredicate, 21, 91, 14, 0, // Skip to: 18553
5046
/* 14878 */   MCD_OPC_Decode, 249, 14, 98, // Opcode: VORRq
5047
/* 14882 */   MCD_OPC_FilterValue, 243, 1, 81, 14, 0, // Skip to: 18553
5048
/* 14888 */   MCD_OPC_CheckPredicate, 21, 76, 14, 0, // Skip to: 18553
5049
/* 14893 */   MCD_OPC_Decode, 148, 8, 106, // Opcode: VBITq
5050
/* 14897 */   MCD_OPC_FilterValue, 3, 67, 14, 0, // Skip to: 18553
5051
/* 14902 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5052
/* 14905 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14920
5053
/* 14911 */   MCD_OPC_CheckPredicate, 21, 53, 14, 0, // Skip to: 18553
5054
/* 14916 */   MCD_OPC_Decode, 243, 14, 98, // Opcode: VORNq
5055
/* 14920 */   MCD_OPC_FilterValue, 243, 1, 43, 14, 0, // Skip to: 18553
5056
/* 14926 */   MCD_OPC_CheckPredicate, 21, 38, 14, 0, // Skip to: 18553
5057
/* 14931 */   MCD_OPC_Decode, 146, 8, 106, // Opcode: VBIFq
5058
/* 14935 */   MCD_OPC_FilterValue, 2, 155, 0, 0, // Skip to: 15095
5059
/* 14940 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5060
/* 14943 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 14981
5061
/* 14948 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5062
/* 14951 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 14966
5063
/* 14957 */   MCD_OPC_CheckPredicate, 21, 7, 14, 0, // Skip to: 18553
5064
/* 14962 */   MCD_OPC_Decode, 194, 16, 98, // Opcode: VQSUBsv16i8
5065
/* 14966 */   MCD_OPC_FilterValue, 243, 1, 253, 13, 0, // Skip to: 18553
5066
/* 14972 */   MCD_OPC_CheckPredicate, 21, 248, 13, 0, // Skip to: 18553
5067
/* 14977 */   MCD_OPC_Decode, 202, 16, 98, // Opcode: VQSUBuv16i8
5068
/* 14981 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15019
5069
/* 14986 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5070
/* 14989 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15004
5071
/* 14995 */   MCD_OPC_CheckPredicate, 21, 225, 13, 0, // Skip to: 18553
5072
/* 15000 */   MCD_OPC_Decode, 200, 16, 98, // Opcode: VQSUBsv8i16
5073
/* 15004 */   MCD_OPC_FilterValue, 243, 1, 215, 13, 0, // Skip to: 18553
5074
/* 15010 */   MCD_OPC_CheckPredicate, 21, 210, 13, 0, // Skip to: 18553
5075
/* 15015 */   MCD_OPC_Decode, 208, 16, 98, // Opcode: VQSUBuv8i16
5076
/* 15019 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 15057
5077
/* 15024 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5078
/* 15027 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15042
5079
/* 15033 */   MCD_OPC_CheckPredicate, 21, 187, 13, 0, // Skip to: 18553
5080
/* 15038 */   MCD_OPC_Decode, 199, 16, 98, // Opcode: VQSUBsv4i32
5081
/* 15042 */   MCD_OPC_FilterValue, 243, 1, 177, 13, 0, // Skip to: 18553
5082
/* 15048 */   MCD_OPC_CheckPredicate, 21, 172, 13, 0, // Skip to: 18553
5083
/* 15053 */   MCD_OPC_Decode, 207, 16, 98, // Opcode: VQSUBuv4i32
5084
/* 15057 */   MCD_OPC_FilterValue, 3, 163, 13, 0, // Skip to: 18553
5085
/* 15062 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5086
/* 15065 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15080
5087
/* 15071 */   MCD_OPC_CheckPredicate, 21, 149, 13, 0, // Skip to: 18553
5088
/* 15076 */   MCD_OPC_Decode, 197, 16, 98, // Opcode: VQSUBsv2i64
5089
/* 15080 */   MCD_OPC_FilterValue, 243, 1, 139, 13, 0, // Skip to: 18553
5090
/* 15086 */   MCD_OPC_CheckPredicate, 21, 134, 13, 0, // Skip to: 18553
5091
/* 15091 */   MCD_OPC_Decode, 205, 16, 98, // Opcode: VQSUBuv2i64
5092
/* 15095 */   MCD_OPC_FilterValue, 3, 117, 0, 0, // Skip to: 15217
5093
/* 15100 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5094
/* 15103 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15141
5095
/* 15108 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5096
/* 15111 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15126
5097
/* 15117 */   MCD_OPC_CheckPredicate, 21, 103, 13, 0, // Skip to: 18553
5098
/* 15122 */   MCD_OPC_Decode, 179, 8, 98, // Opcode: VCGEsv16i8
5099
/* 15126 */   MCD_OPC_FilterValue, 243, 1, 93, 13, 0, // Skip to: 18553
5100
/* 15132 */   MCD_OPC_CheckPredicate, 21, 88, 13, 0, // Skip to: 18553
5101
/* 15137 */   MCD_OPC_Decode, 185, 8, 98, // Opcode: VCGEuv16i8
5102
/* 15141 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15179
5103
/* 15146 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5104
/* 15149 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15164
5105
/* 15155 */   MCD_OPC_CheckPredicate, 21, 65, 13, 0, // Skip to: 18553
5106
/* 15160 */   MCD_OPC_Decode, 183, 8, 98, // Opcode: VCGEsv8i16
5107
/* 15164 */   MCD_OPC_FilterValue, 243, 1, 55, 13, 0, // Skip to: 18553
5108
/* 15170 */   MCD_OPC_CheckPredicate, 21, 50, 13, 0, // Skip to: 18553
5109
/* 15175 */   MCD_OPC_Decode, 189, 8, 98, // Opcode: VCGEuv8i16
5110
/* 15179 */   MCD_OPC_FilterValue, 2, 41, 13, 0, // Skip to: 18553
5111
/* 15184 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5112
/* 15187 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15202
5113
/* 15193 */   MCD_OPC_CheckPredicate, 21, 27, 13, 0, // Skip to: 18553
5114
/* 15198 */   MCD_OPC_Decode, 182, 8, 98, // Opcode: VCGEsv4i32
5115
/* 15202 */   MCD_OPC_FilterValue, 243, 1, 17, 13, 0, // Skip to: 18553
5116
/* 15208 */   MCD_OPC_CheckPredicate, 21, 12, 13, 0, // Skip to: 18553
5117
/* 15213 */   MCD_OPC_Decode, 188, 8, 98, // Opcode: VCGEuv4i32
5118
/* 15217 */   MCD_OPC_FilterValue, 4, 155, 0, 0, // Skip to: 15377
5119
/* 15222 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5120
/* 15225 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15263
5121
/* 15230 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5122
/* 15233 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15248
5123
/* 15239 */   MCD_OPC_CheckPredicate, 21, 237, 12, 0, // Skip to: 18553
5124
/* 15244 */   MCD_OPC_Decode, 161, 16, 102, // Opcode: VQSHLsv16i8
5125
/* 15248 */   MCD_OPC_FilterValue, 243, 1, 227, 12, 0, // Skip to: 18553
5126
/* 15254 */   MCD_OPC_CheckPredicate, 21, 222, 12, 0, // Skip to: 18553
5127
/* 15259 */   MCD_OPC_Decode, 177, 16, 102, // Opcode: VQSHLuv16i8
5128
/* 15263 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15301
5129
/* 15268 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5130
/* 15271 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15286
5131
/* 15277 */   MCD_OPC_CheckPredicate, 21, 199, 12, 0, // Skip to: 18553
5132
/* 15282 */   MCD_OPC_Decode, 167, 16, 102, // Opcode: VQSHLsv8i16
5133
/* 15286 */   MCD_OPC_FilterValue, 243, 1, 189, 12, 0, // Skip to: 18553
5134
/* 15292 */   MCD_OPC_CheckPredicate, 21, 184, 12, 0, // Skip to: 18553
5135
/* 15297 */   MCD_OPC_Decode, 183, 16, 102, // Opcode: VQSHLuv8i16
5136
/* 15301 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 15339
5137
/* 15306 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5138
/* 15309 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15324
5139
/* 15315 */   MCD_OPC_CheckPredicate, 21, 161, 12, 0, // Skip to: 18553
5140
/* 15320 */   MCD_OPC_Decode, 166, 16, 102, // Opcode: VQSHLsv4i32
5141
/* 15324 */   MCD_OPC_FilterValue, 243, 1, 151, 12, 0, // Skip to: 18553
5142
/* 15330 */   MCD_OPC_CheckPredicate, 21, 146, 12, 0, // Skip to: 18553
5143
/* 15335 */   MCD_OPC_Decode, 182, 16, 102, // Opcode: VQSHLuv4i32
5144
/* 15339 */   MCD_OPC_FilterValue, 3, 137, 12, 0, // Skip to: 18553
5145
/* 15344 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5146
/* 15347 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15362
5147
/* 15353 */   MCD_OPC_CheckPredicate, 21, 123, 12, 0, // Skip to: 18553
5148
/* 15358 */   MCD_OPC_Decode, 164, 16, 102, // Opcode: VQSHLsv2i64
5149
/* 15362 */   MCD_OPC_FilterValue, 243, 1, 113, 12, 0, // Skip to: 18553
5150
/* 15368 */   MCD_OPC_CheckPredicate, 21, 108, 12, 0, // Skip to: 18553
5151
/* 15373 */   MCD_OPC_Decode, 180, 16, 102, // Opcode: VQSHLuv2i64
5152
/* 15377 */   MCD_OPC_FilterValue, 5, 155, 0, 0, // Skip to: 15537
5153
/* 15382 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5154
/* 15385 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15423
5155
/* 15390 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5156
/* 15393 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15408
5157
/* 15399 */   MCD_OPC_CheckPredicate, 21, 77, 12, 0, // Skip to: 18553
5158
/* 15404 */   MCD_OPC_Decode, 248, 15, 102, // Opcode: VQRSHLsv16i8
5159
/* 15408 */   MCD_OPC_FilterValue, 243, 1, 67, 12, 0, // Skip to: 18553
5160
/* 15414 */   MCD_OPC_CheckPredicate, 21, 62, 12, 0, // Skip to: 18553
5161
/* 15419 */   MCD_OPC_Decode, 128, 16, 102, // Opcode: VQRSHLuv16i8
5162
/* 15423 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15461
5163
/* 15428 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5164
/* 15431 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15446
5165
/* 15437 */   MCD_OPC_CheckPredicate, 21, 39, 12, 0, // Skip to: 18553
5166
/* 15442 */   MCD_OPC_Decode, 254, 15, 102, // Opcode: VQRSHLsv8i16
5167
/* 15446 */   MCD_OPC_FilterValue, 243, 1, 29, 12, 0, // Skip to: 18553
5168
/* 15452 */   MCD_OPC_CheckPredicate, 21, 24, 12, 0, // Skip to: 18553
5169
/* 15457 */   MCD_OPC_Decode, 134, 16, 102, // Opcode: VQRSHLuv8i16
5170
/* 15461 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 15499
5171
/* 15466 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5172
/* 15469 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15484
5173
/* 15475 */   MCD_OPC_CheckPredicate, 21, 1, 12, 0, // Skip to: 18553
5174
/* 15480 */   MCD_OPC_Decode, 253, 15, 102, // Opcode: VQRSHLsv4i32
5175
/* 15484 */   MCD_OPC_FilterValue, 243, 1, 247, 11, 0, // Skip to: 18553
5176
/* 15490 */   MCD_OPC_CheckPredicate, 21, 242, 11, 0, // Skip to: 18553
5177
/* 15495 */   MCD_OPC_Decode, 133, 16, 102, // Opcode: VQRSHLuv4i32
5178
/* 15499 */   MCD_OPC_FilterValue, 3, 233, 11, 0, // Skip to: 18553
5179
/* 15504 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5180
/* 15507 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15522
5181
/* 15513 */   MCD_OPC_CheckPredicate, 21, 219, 11, 0, // Skip to: 18553
5182
/* 15518 */   MCD_OPC_Decode, 251, 15, 102, // Opcode: VQRSHLsv2i64
5183
/* 15522 */   MCD_OPC_FilterValue, 243, 1, 209, 11, 0, // Skip to: 18553
5184
/* 15528 */   MCD_OPC_CheckPredicate, 21, 204, 11, 0, // Skip to: 18553
5185
/* 15533 */   MCD_OPC_Decode, 131, 16, 102, // Opcode: VQRSHLuv2i64
5186
/* 15537 */   MCD_OPC_FilterValue, 6, 117, 0, 0, // Skip to: 15659
5187
/* 15542 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5188
/* 15545 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15583
5189
/* 15550 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5190
/* 15553 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15568
5191
/* 15559 */   MCD_OPC_CheckPredicate, 21, 173, 11, 0, // Skip to: 18553
5192
/* 15564 */   MCD_OPC_Decode, 190, 13, 98, // Opcode: VMINsv16i8
5193
/* 15568 */   MCD_OPC_FilterValue, 243, 1, 163, 11, 0, // Skip to: 18553
5194
/* 15574 */   MCD_OPC_CheckPredicate, 21, 158, 11, 0, // Skip to: 18553
5195
/* 15579 */   MCD_OPC_Decode, 196, 13, 98, // Opcode: VMINuv16i8
5196
/* 15583 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15621
5197
/* 15588 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5198
/* 15591 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15606
5199
/* 15597 */   MCD_OPC_CheckPredicate, 21, 135, 11, 0, // Skip to: 18553
5200
/* 15602 */   MCD_OPC_Decode, 194, 13, 98, // Opcode: VMINsv8i16
5201
/* 15606 */   MCD_OPC_FilterValue, 243, 1, 125, 11, 0, // Skip to: 18553
5202
/* 15612 */   MCD_OPC_CheckPredicate, 21, 120, 11, 0, // Skip to: 18553
5203
/* 15617 */   MCD_OPC_Decode, 200, 13, 98, // Opcode: VMINuv8i16
5204
/* 15621 */   MCD_OPC_FilterValue, 2, 111, 11, 0, // Skip to: 18553
5205
/* 15626 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5206
/* 15629 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15644
5207
/* 15635 */   MCD_OPC_CheckPredicate, 21, 97, 11, 0, // Skip to: 18553
5208
/* 15640 */   MCD_OPC_Decode, 193, 13, 98, // Opcode: VMINsv4i32
5209
/* 15644 */   MCD_OPC_FilterValue, 243, 1, 87, 11, 0, // Skip to: 18553
5210
/* 15650 */   MCD_OPC_CheckPredicate, 21, 82, 11, 0, // Skip to: 18553
5211
/* 15655 */   MCD_OPC_Decode, 199, 13, 98, // Opcode: VMINuv4i32
5212
/* 15659 */   MCD_OPC_FilterValue, 7, 117, 0, 0, // Skip to: 15781
5213
/* 15664 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5214
/* 15667 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15705
5215
/* 15672 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5216
/* 15675 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15690
5217
/* 15681 */   MCD_OPC_CheckPredicate, 21, 51, 11, 0, // Skip to: 18553
5218
/* 15686 */   MCD_OPC_Decode, 180, 7, 106, // Opcode: VABAsv16i8
5219
/* 15690 */   MCD_OPC_FilterValue, 243, 1, 41, 11, 0, // Skip to: 18553
5220
/* 15696 */   MCD_OPC_CheckPredicate, 21, 36, 11, 0, // Skip to: 18553
5221
/* 15701 */   MCD_OPC_Decode, 186, 7, 106, // Opcode: VABAuv16i8
5222
/* 15705 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15743
5223
/* 15710 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5224
/* 15713 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15728
5225
/* 15719 */   MCD_OPC_CheckPredicate, 21, 13, 11, 0, // Skip to: 18553
5226
/* 15724 */   MCD_OPC_Decode, 184, 7, 106, // Opcode: VABAsv8i16
5227
/* 15728 */   MCD_OPC_FilterValue, 243, 1, 3, 11, 0, // Skip to: 18553
5228
/* 15734 */   MCD_OPC_CheckPredicate, 21, 254, 10, 0, // Skip to: 18553
5229
/* 15739 */   MCD_OPC_Decode, 190, 7, 106, // Opcode: VABAuv8i16
5230
/* 15743 */   MCD_OPC_FilterValue, 2, 245, 10, 0, // Skip to: 18553
5231
/* 15748 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5232
/* 15751 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15766
5233
/* 15757 */   MCD_OPC_CheckPredicate, 21, 231, 10, 0, // Skip to: 18553
5234
/* 15762 */   MCD_OPC_Decode, 183, 7, 106, // Opcode: VABAsv4i32
5235
/* 15766 */   MCD_OPC_FilterValue, 243, 1, 221, 10, 0, // Skip to: 18553
5236
/* 15772 */   MCD_OPC_CheckPredicate, 21, 216, 10, 0, // Skip to: 18553
5237
/* 15777 */   MCD_OPC_Decode, 189, 7, 106, // Opcode: VABAuv4i32
5238
/* 15781 */   MCD_OPC_FilterValue, 8, 117, 0, 0, // Skip to: 15903
5239
/* 15786 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5240
/* 15789 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15827
5241
/* 15794 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5242
/* 15797 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15812
5243
/* 15803 */   MCD_OPC_CheckPredicate, 21, 185, 10, 0, // Skip to: 18553
5244
/* 15808 */   MCD_OPC_Decode, 153, 21, 98, // Opcode: VTSTv16i8
5245
/* 15812 */   MCD_OPC_FilterValue, 243, 1, 175, 10, 0, // Skip to: 18553
5246
/* 15818 */   MCD_OPC_CheckPredicate, 21, 170, 10, 0, // Skip to: 18553
5247
/* 15823 */   MCD_OPC_Decode, 159, 8, 98, // Opcode: VCEQv16i8
5248
/* 15827 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 15865
5249
/* 15832 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5250
/* 15835 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15850
5251
/* 15841 */   MCD_OPC_CheckPredicate, 21, 147, 10, 0, // Skip to: 18553
5252
/* 15846 */   MCD_OPC_Decode, 157, 21, 98, // Opcode: VTSTv8i16
5253
/* 15850 */   MCD_OPC_FilterValue, 243, 1, 137, 10, 0, // Skip to: 18553
5254
/* 15856 */   MCD_OPC_CheckPredicate, 21, 132, 10, 0, // Skip to: 18553
5255
/* 15861 */   MCD_OPC_Decode, 163, 8, 98, // Opcode: VCEQv8i16
5256
/* 15865 */   MCD_OPC_FilterValue, 2, 123, 10, 0, // Skip to: 18553
5257
/* 15870 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5258
/* 15873 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15888
5259
/* 15879 */   MCD_OPC_CheckPredicate, 21, 109, 10, 0, // Skip to: 18553
5260
/* 15884 */   MCD_OPC_Decode, 156, 21, 98, // Opcode: VTSTv4i32
5261
/* 15888 */   MCD_OPC_FilterValue, 243, 1, 99, 10, 0, // Skip to: 18553
5262
/* 15894 */   MCD_OPC_CheckPredicate, 21, 94, 10, 0, // Skip to: 18553
5263
/* 15899 */   MCD_OPC_Decode, 162, 8, 98, // Opcode: VCEQv4i32
5264
/* 15903 */   MCD_OPC_FilterValue, 9, 85, 0, 0, // Skip to: 15993
5265
/* 15908 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5266
/* 15911 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 15949
5267
/* 15916 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5268
/* 15919 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 15934
5269
/* 15925 */   MCD_OPC_CheckPredicate, 21, 63, 10, 0, // Skip to: 18553
5270
/* 15930 */   MCD_OPC_Decode, 208, 14, 98, // Opcode: VMULv16i8
5271
/* 15934 */   MCD_OPC_FilterValue, 243, 1, 53, 10, 0, // Skip to: 18553
5272
/* 15940 */   MCD_OPC_CheckPredicate, 21, 48, 10, 0, // Skip to: 18553
5273
/* 15945 */   MCD_OPC_Decode, 199, 14, 98, // Opcode: VMULpq
5274
/* 15949 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 15971
5275
/* 15954 */   MCD_OPC_CheckPredicate, 21, 34, 10, 0, // Skip to: 18553
5276
/* 15959 */   MCD_OPC_CheckField, 24, 8, 242, 1, 26, 10, 0, // Skip to: 18553
5277
/* 15967 */   MCD_OPC_Decode, 212, 14, 98, // Opcode: VMULv8i16
5278
/* 15971 */   MCD_OPC_FilterValue, 2, 17, 10, 0, // Skip to: 18553
5279
/* 15976 */   MCD_OPC_CheckPredicate, 21, 12, 10, 0, // Skip to: 18553
5280
/* 15981 */   MCD_OPC_CheckField, 24, 8, 242, 1, 4, 10, 0, // Skip to: 18553
5281
/* 15989 */   MCD_OPC_Decode, 211, 14, 98, // Opcode: VMULv4i32
5282
/* 15993 */   MCD_OPC_FilterValue, 11, 47, 0, 0, // Skip to: 16045
5283
/* 15998 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5284
/* 16001 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 16023
5285
/* 16006 */   MCD_OPC_CheckPredicate, 23, 238, 9, 0, // Skip to: 18553
5286
/* 16011 */   MCD_OPC_CheckField, 24, 8, 243, 1, 230, 9, 0, // Skip to: 18553
5287
/* 16019 */   MCD_OPC_Decode, 231, 15, 106, // Opcode: VQRDMLAHv8i16
5288
/* 16023 */   MCD_OPC_FilterValue, 2, 221, 9, 0, // Skip to: 18553
5289
/* 16028 */   MCD_OPC_CheckPredicate, 23, 216, 9, 0, // Skip to: 18553
5290
/* 16033 */   MCD_OPC_CheckField, 24, 8, 243, 1, 208, 9, 0, // Skip to: 18553
5291
/* 16041 */   MCD_OPC_Decode, 230, 15, 106, // Opcode: VQRDMLAHv4i32
5292
/* 16045 */   MCD_OPC_FilterValue, 12, 123, 0, 0, // Skip to: 16173
5293
/* 16050 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5294
/* 16053 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16075
5295
/* 16058 */   MCD_OPC_CheckPredicate, 26, 186, 9, 0, // Skip to: 18553
5296
/* 16063 */   MCD_OPC_CheckField, 24, 8, 242, 1, 178, 9, 0, // Skip to: 18553
5297
/* 16071 */   MCD_OPC_Decode, 153, 10, 106, // Opcode: VFMAfq
5298
/* 16075 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 16113
5299
/* 16080 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5300
/* 16083 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 16098
5301
/* 16089 */   MCD_OPC_CheckPredicate, 22, 155, 9, 0, // Skip to: 18553
5302
/* 16094 */   MCD_OPC_Decode, 155, 10, 106, // Opcode: VFMAhq
5303
/* 16098 */   MCD_OPC_FilterValue, 243, 1, 145, 9, 0, // Skip to: 18553
5304
/* 16104 */   MCD_OPC_CheckPredicate, 23, 140, 9, 0, // Skip to: 18553
5305
/* 16109 */   MCD_OPC_Decode, 239, 15, 106, // Opcode: VQRDMLSHv8i16
5306
/* 16113 */   MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 16151
5307
/* 16118 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5308
/* 16121 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 16136
5309
/* 16127 */   MCD_OPC_CheckPredicate, 26, 117, 9, 0, // Skip to: 18553
5310
/* 16132 */   MCD_OPC_Decode, 160, 10, 106, // Opcode: VFMSfq
5311
/* 16136 */   MCD_OPC_FilterValue, 243, 1, 107, 9, 0, // Skip to: 18553
5312
/* 16142 */   MCD_OPC_CheckPredicate, 23, 102, 9, 0, // Skip to: 18553
5313
/* 16147 */   MCD_OPC_Decode, 238, 15, 106, // Opcode: VQRDMLSHv4i32
5314
/* 16151 */   MCD_OPC_FilterValue, 3, 93, 9, 0, // Skip to: 18553
5315
/* 16156 */   MCD_OPC_CheckPredicate, 22, 88, 9, 0, // Skip to: 18553
5316
/* 16161 */   MCD_OPC_CheckField, 24, 8, 242, 1, 80, 9, 0, // Skip to: 18553
5317
/* 16169 */   MCD_OPC_Decode, 162, 10, 106, // Opcode: VFMShq
5318
/* 16173 */   MCD_OPC_FilterValue, 13, 123, 0, 0, // Skip to: 16301
5319
/* 16178 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5320
/* 16181 */   MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 16219
5321
/* 16186 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5322
/* 16189 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 16204
5323
/* 16195 */   MCD_OPC_CheckPredicate, 21, 49, 9, 0, // Skip to: 18553
5324
/* 16200 */   MCD_OPC_Decode, 216, 13, 106, // Opcode: VMLAfq
5325
/* 16204 */   MCD_OPC_FilterValue, 243, 1, 39, 9, 0, // Skip to: 18553
5326
/* 16210 */   MCD_OPC_CheckPredicate, 21, 34, 9, 0, // Skip to: 18553
5327
/* 16215 */   MCD_OPC_Decode, 195, 14, 98, // Opcode: VMULfq
5328
/* 16219 */   MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 16257
5329
/* 16224 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5330
/* 16227 */   MCD_OPC_FilterValue, 242, 1, 9, 0, 0, // Skip to: 16242
5331
/* 16233 */   MCD_OPC_CheckPredicate, 22, 11, 9, 0, // Skip to: 18553
5332
/* 16238 */   MCD_OPC_Decode, 218, 13, 106, // Opcode: VMLAhq
5333
/* 16242 */   MCD_OPC_FilterValue, 243, 1, 1, 9, 0, // Skip to: 18553
5334
/* 16248 */   MCD_OPC_CheckPredicate, 22, 252, 8, 0, // Skip to: 18553
5335
/* 16253 */   MCD_OPC_Decode, 197, 14, 98, // Opcode: VMULhq
5336
/* 16257 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 16279
5337
/* 16262 */   MCD_OPC_CheckPredicate, 21, 238, 8, 0, // Skip to: 18553
5338
/* 16267 */   MCD_OPC_CheckField, 24, 8, 242, 1, 230, 8, 0, // Skip to: 18553
5339
/* 16275 */   MCD_OPC_Decode, 247, 13, 106, // Opcode: VMLSfq
5340
/* 16279 */   MCD_OPC_FilterValue, 3, 221, 8, 0, // Skip to: 18553
5341
/* 16284 */   MCD_OPC_CheckPredicate, 22, 216, 8, 0, // Skip to: 18553
5342
/* 16289 */   MCD_OPC_CheckField, 24, 8, 242, 1, 208, 8, 0, // Skip to: 18553
5343
/* 16297 */   MCD_OPC_Decode, 249, 13, 106, // Opcode: VMLShq
5344
/* 16301 */   MCD_OPC_FilterValue, 14, 91, 0, 0, // Skip to: 16397
5345
/* 16306 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5346
/* 16309 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16331
5347
/* 16314 */   MCD_OPC_CheckPredicate, 21, 186, 8, 0, // Skip to: 18553
5348
/* 16319 */   MCD_OPC_CheckField, 24, 8, 243, 1, 178, 8, 0, // Skip to: 18553
5349
/* 16327 */   MCD_OPC_Decode, 228, 7, 98, // Opcode: VACGEfq
5350
/* 16331 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 16353
5351
/* 16336 */   MCD_OPC_CheckPredicate, 22, 164, 8, 0, // Skip to: 18553
5352
/* 16341 */   MCD_OPC_CheckField, 24, 8, 243, 1, 156, 8, 0, // Skip to: 18553
5353
/* 16349 */   MCD_OPC_Decode, 230, 7, 98, // Opcode: VACGEhq
5354
/* 16353 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 16375
5355
/* 16358 */   MCD_OPC_CheckPredicate, 21, 142, 8, 0, // Skip to: 18553
5356
/* 16363 */   MCD_OPC_CheckField, 24, 8, 243, 1, 134, 8, 0, // Skip to: 18553
5357
/* 16371 */   MCD_OPC_Decode, 232, 7, 98, // Opcode: VACGTfq
5358
/* 16375 */   MCD_OPC_FilterValue, 3, 125, 8, 0, // Skip to: 18553
5359
/* 16380 */   MCD_OPC_CheckPredicate, 22, 120, 8, 0, // Skip to: 18553
5360
/* 16385 */   MCD_OPC_CheckField, 24, 8, 243, 1, 112, 8, 0, // Skip to: 18553
5361
/* 16393 */   MCD_OPC_Decode, 234, 7, 98, // Opcode: VACGThq
5362
/* 16397 */   MCD_OPC_FilterValue, 15, 103, 8, 0, // Skip to: 18553
5363
/* 16402 */   MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5364
/* 16405 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16427
5365
/* 16410 */   MCD_OPC_CheckPredicate, 21, 90, 8, 0, // Skip to: 18553
5366
/* 16415 */   MCD_OPC_CheckField, 24, 8, 242, 1, 82, 8, 0, // Skip to: 18553
5367
/* 16423 */   MCD_OPC_Decode, 220, 16, 98, // Opcode: VRECPSfq
5368
/* 16427 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 16449
5369
/* 16432 */   MCD_OPC_CheckPredicate, 22, 68, 8, 0, // Skip to: 18553
5370
/* 16437 */   MCD_OPC_CheckField, 24, 8, 242, 1, 60, 8, 0, // Skip to: 18553
5371
/* 16445 */   MCD_OPC_Decode, 222, 16, 98, // Opcode: VRECPShq
5372
/* 16449 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 16471
5373
/* 16454 */   MCD_OPC_CheckPredicate, 21, 46, 8, 0, // Skip to: 18553
5374
/* 16459 */   MCD_OPC_CheckField, 24, 8, 242, 1, 38, 8, 0, // Skip to: 18553
5375
/* 16467 */   MCD_OPC_Decode, 206, 17, 98, // Opcode: VRSQRTSfq
5376
/* 16471 */   MCD_OPC_FilterValue, 3, 29, 8, 0, // Skip to: 18553
5377
/* 16476 */   MCD_OPC_CheckPredicate, 22, 24, 8, 0, // Skip to: 18553
5378
/* 16481 */   MCD_OPC_CheckField, 24, 8, 242, 1, 16, 8, 0, // Skip to: 18553
5379
/* 16489 */   MCD_OPC_Decode, 208, 17, 98, // Opcode: VRSQRTShq
5380
/* 16493 */   MCD_OPC_FilterValue, 1, 7, 8, 0, // Skip to: 18553
5381
/* 16498 */   MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
5382
/* 16501 */   MCD_OPC_FilterValue, 0, 217, 6, 0, // Skip to: 18259
5383
/* 16506 */   MCD_OPC_ExtractField, 25, 7,  // Inst{31-25} ...
5384
/* 16509 */   MCD_OPC_FilterValue, 121, 247, 7, 0, // Skip to: 18553
5385
/* 16514 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
5386
/* 16517 */   MCD_OPC_FilterValue, 0, 139, 0, 0, // Skip to: 16661
5387
/* 16522 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5388
/* 16525 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 16623
5389
/* 16530 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5390
/* 16533 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 16585
5391
/* 16538 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5392
/* 16541 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16563
5393
/* 16546 */   MCD_OPC_CheckPredicate, 21, 239, 5, 0, // Skip to: 18070
5394
/* 16551 */   MCD_OPC_CheckField, 19, 1, 1, 232, 5, 0, // Skip to: 18070
5395
/* 16558 */   MCD_OPC_Decode, 155, 18, 166, 1, // Opcode: VSHRsv16i8
5396
/* 16563 */   MCD_OPC_FilterValue, 1, 222, 5, 0, // Skip to: 18070
5397
/* 16568 */   MCD_OPC_CheckPredicate, 21, 217, 5, 0, // Skip to: 18070
5398
/* 16573 */   MCD_OPC_CheckField, 19, 1, 1, 210, 5, 0, // Skip to: 18070
5399
/* 16580 */   MCD_OPC_Decode, 163, 18, 166, 1, // Opcode: VSHRuv16i8
5400
/* 16585 */   MCD_OPC_FilterValue, 1, 200, 5, 0, // Skip to: 18070
5401
/* 16590 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5402
/* 16593 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16608
5403
/* 16598 */   MCD_OPC_CheckPredicate, 21, 187, 5, 0, // Skip to: 18070
5404
/* 16603 */   MCD_OPC_Decode, 161, 18, 167, 1, // Opcode: VSHRsv8i16
5405
/* 16608 */   MCD_OPC_FilterValue, 1, 177, 5, 0, // Skip to: 18070
5406
/* 16613 */   MCD_OPC_CheckPredicate, 21, 172, 5, 0, // Skip to: 18070
5407
/* 16618 */   MCD_OPC_Decode, 169, 18, 167, 1, // Opcode: VSHRuv8i16
5408
/* 16623 */   MCD_OPC_FilterValue, 1, 162, 5, 0, // Skip to: 18070
5409
/* 16628 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5410
/* 16631 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16646
5411
/* 16636 */   MCD_OPC_CheckPredicate, 21, 149, 5, 0, // Skip to: 18070
5412
/* 16641 */   MCD_OPC_Decode, 160, 18, 168, 1, // Opcode: VSHRsv4i32
5413
/* 16646 */   MCD_OPC_FilterValue, 1, 139, 5, 0, // Skip to: 18070
5414
/* 16651 */   MCD_OPC_CheckPredicate, 21, 134, 5, 0, // Skip to: 18070
5415
/* 16656 */   MCD_OPC_Decode, 168, 18, 168, 1, // Opcode: VSHRuv4i32
5416
/* 16661 */   MCD_OPC_FilterValue, 1, 139, 0, 0, // Skip to: 16805
5417
/* 16666 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5418
/* 16669 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 16767
5419
/* 16674 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5420
/* 16677 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 16729
5421
/* 16682 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5422
/* 16685 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16707
5423
/* 16690 */   MCD_OPC_CheckPredicate, 21, 95, 5, 0, // Skip to: 18070
5424
/* 16695 */   MCD_OPC_CheckField, 19, 1, 1, 88, 5, 0, // Skip to: 18070
5425
/* 16702 */   MCD_OPC_Decode, 191, 18, 169, 1, // Opcode: VSRAsv16i8
5426
/* 16707 */   MCD_OPC_FilterValue, 1, 78, 5, 0, // Skip to: 18070
5427
/* 16712 */   MCD_OPC_CheckPredicate, 21, 73, 5, 0, // Skip to: 18070
5428
/* 16717 */   MCD_OPC_CheckField, 19, 1, 1, 66, 5, 0, // Skip to: 18070
5429
/* 16724 */   MCD_OPC_Decode, 199, 18, 169, 1, // Opcode: VSRAuv16i8
5430
/* 16729 */   MCD_OPC_FilterValue, 1, 56, 5, 0, // Skip to: 18070
5431
/* 16734 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5432
/* 16737 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16752
5433
/* 16742 */   MCD_OPC_CheckPredicate, 21, 43, 5, 0, // Skip to: 18070
5434
/* 16747 */   MCD_OPC_Decode, 197, 18, 170, 1, // Opcode: VSRAsv8i16
5435
/* 16752 */   MCD_OPC_FilterValue, 1, 33, 5, 0, // Skip to: 18070
5436
/* 16757 */   MCD_OPC_CheckPredicate, 21, 28, 5, 0, // Skip to: 18070
5437
/* 16762 */   MCD_OPC_Decode, 205, 18, 170, 1, // Opcode: VSRAuv8i16
5438
/* 16767 */   MCD_OPC_FilterValue, 1, 18, 5, 0, // Skip to: 18070
5439
/* 16772 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5440
/* 16775 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16790
5441
/* 16780 */   MCD_OPC_CheckPredicate, 21, 5, 5, 0, // Skip to: 18070
5442
/* 16785 */   MCD_OPC_Decode, 196, 18, 171, 1, // Opcode: VSRAsv4i32
5443
/* 16790 */   MCD_OPC_FilterValue, 1, 251, 4, 0, // Skip to: 18070
5444
/* 16795 */   MCD_OPC_CheckPredicate, 21, 246, 4, 0, // Skip to: 18070
5445
/* 16800 */   MCD_OPC_Decode, 204, 18, 171, 1, // Opcode: VSRAuv4i32
5446
/* 16805 */   MCD_OPC_FilterValue, 2, 139, 0, 0, // Skip to: 16949
5447
/* 16810 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5448
/* 16813 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 16911
5449
/* 16818 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5450
/* 16821 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 16873
5451
/* 16826 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5452
/* 16829 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16851
5453
/* 16834 */   MCD_OPC_CheckPredicate, 21, 207, 4, 0, // Skip to: 18070
5454
/* 16839 */   MCD_OPC_CheckField, 19, 1, 1, 200, 4, 0, // Skip to: 18070
5455
/* 16846 */   MCD_OPC_Decode, 183, 17, 166, 1, // Opcode: VRSHRsv16i8
5456
/* 16851 */   MCD_OPC_FilterValue, 1, 190, 4, 0, // Skip to: 18070
5457
/* 16856 */   MCD_OPC_CheckPredicate, 21, 185, 4, 0, // Skip to: 18070
5458
/* 16861 */   MCD_OPC_CheckField, 19, 1, 1, 178, 4, 0, // Skip to: 18070
5459
/* 16868 */   MCD_OPC_Decode, 191, 17, 166, 1, // Opcode: VRSHRuv16i8
5460
/* 16873 */   MCD_OPC_FilterValue, 1, 168, 4, 0, // Skip to: 18070
5461
/* 16878 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5462
/* 16881 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16896
5463
/* 16886 */   MCD_OPC_CheckPredicate, 21, 155, 4, 0, // Skip to: 18070
5464
/* 16891 */   MCD_OPC_Decode, 189, 17, 167, 1, // Opcode: VRSHRsv8i16
5465
/* 16896 */   MCD_OPC_FilterValue, 1, 145, 4, 0, // Skip to: 18070
5466
/* 16901 */   MCD_OPC_CheckPredicate, 21, 140, 4, 0, // Skip to: 18070
5467
/* 16906 */   MCD_OPC_Decode, 197, 17, 167, 1, // Opcode: VRSHRuv8i16
5468
/* 16911 */   MCD_OPC_FilterValue, 1, 130, 4, 0, // Skip to: 18070
5469
/* 16916 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5470
/* 16919 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16934
5471
/* 16924 */   MCD_OPC_CheckPredicate, 21, 117, 4, 0, // Skip to: 18070
5472
/* 16929 */   MCD_OPC_Decode, 188, 17, 168, 1, // Opcode: VRSHRsv4i32
5473
/* 16934 */   MCD_OPC_FilterValue, 1, 107, 4, 0, // Skip to: 18070
5474
/* 16939 */   MCD_OPC_CheckPredicate, 21, 102, 4, 0, // Skip to: 18070
5475
/* 16944 */   MCD_OPC_Decode, 196, 17, 168, 1, // Opcode: VRSHRuv4i32
5476
/* 16949 */   MCD_OPC_FilterValue, 3, 139, 0, 0, // Skip to: 17093
5477
/* 16954 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5478
/* 16957 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 17055
5479
/* 16962 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5480
/* 16965 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 17017
5481
/* 16970 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5482
/* 16973 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16995
5483
/* 16978 */   MCD_OPC_CheckPredicate, 21, 63, 4, 0, // Skip to: 18070
5484
/* 16983 */   MCD_OPC_CheckField, 19, 1, 1, 56, 4, 0, // Skip to: 18070
5485
/* 16990 */   MCD_OPC_Decode, 209, 17, 169, 1, // Opcode: VRSRAsv16i8
5486
/* 16995 */   MCD_OPC_FilterValue, 1, 46, 4, 0, // Skip to: 18070
5487
/* 17000 */   MCD_OPC_CheckPredicate, 21, 41, 4, 0, // Skip to: 18070
5488
/* 17005 */   MCD_OPC_CheckField, 19, 1, 1, 34, 4, 0, // Skip to: 18070
5489
/* 17012 */   MCD_OPC_Decode, 217, 17, 169, 1, // Opcode: VRSRAuv16i8
5490
/* 17017 */   MCD_OPC_FilterValue, 1, 24, 4, 0, // Skip to: 18070
5491
/* 17022 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5492
/* 17025 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17040
5493
/* 17030 */   MCD_OPC_CheckPredicate, 21, 11, 4, 0, // Skip to: 18070
5494
/* 17035 */   MCD_OPC_Decode, 215, 17, 170, 1, // Opcode: VRSRAsv8i16
5495
/* 17040 */   MCD_OPC_FilterValue, 1, 1, 4, 0, // Skip to: 18070
5496
/* 17045 */   MCD_OPC_CheckPredicate, 21, 252, 3, 0, // Skip to: 18070
5497
/* 17050 */   MCD_OPC_Decode, 223, 17, 170, 1, // Opcode: VRSRAuv8i16
5498
/* 17055 */   MCD_OPC_FilterValue, 1, 242, 3, 0, // Skip to: 18070
5499
/* 17060 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5500
/* 17063 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17078
5501
/* 17068 */   MCD_OPC_CheckPredicate, 21, 229, 3, 0, // Skip to: 18070
5502
/* 17073 */   MCD_OPC_Decode, 214, 17, 171, 1, // Opcode: VRSRAsv4i32
5503
/* 17078 */   MCD_OPC_FilterValue, 1, 219, 3, 0, // Skip to: 18070
5504
/* 17083 */   MCD_OPC_CheckPredicate, 21, 214, 3, 0, // Skip to: 18070
5505
/* 17088 */   MCD_OPC_Decode, 222, 17, 171, 1, // Opcode: VRSRAuv4i32
5506
/* 17093 */   MCD_OPC_FilterValue, 4, 84, 0, 0, // Skip to: 17182
5507
/* 17098 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5508
/* 17101 */   MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 17160
5509
/* 17106 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5510
/* 17109 */   MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 17138
5511
/* 17114 */   MCD_OPC_CheckPredicate, 21, 183, 3, 0, // Skip to: 18070
5512
/* 17119 */   MCD_OPC_CheckField, 24, 1, 1, 176, 3, 0, // Skip to: 18070
5513
/* 17126 */   MCD_OPC_CheckField, 19, 1, 1, 169, 3, 0, // Skip to: 18070
5514
/* 17133 */   MCD_OPC_Decode, 207, 18, 169, 1, // Opcode: VSRIv16i8
5515
/* 17138 */   MCD_OPC_FilterValue, 1, 159, 3, 0, // Skip to: 18070
5516
/* 17143 */   MCD_OPC_CheckPredicate, 21, 154, 3, 0, // Skip to: 18070
5517
/* 17148 */   MCD_OPC_CheckField, 24, 1, 1, 147, 3, 0, // Skip to: 18070
5518
/* 17155 */   MCD_OPC_Decode, 213, 18, 170, 1, // Opcode: VSRIv8i16
5519
/* 17160 */   MCD_OPC_FilterValue, 1, 137, 3, 0, // Skip to: 18070
5520
/* 17165 */   MCD_OPC_CheckPredicate, 21, 132, 3, 0, // Skip to: 18070
5521
/* 17170 */   MCD_OPC_CheckField, 24, 1, 1, 125, 3, 0, // Skip to: 18070
5522
/* 17177 */   MCD_OPC_Decode, 212, 18, 171, 1, // Opcode: VSRIv4i32
5523
/* 17182 */   MCD_OPC_FilterValue, 5, 139, 0, 0, // Skip to: 17326
5524
/* 17187 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5525
/* 17190 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 17288
5526
/* 17195 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5527
/* 17198 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 17250
5528
/* 17203 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5529
/* 17206 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 17228
5530
/* 17211 */   MCD_OPC_CheckPredicate, 21, 86, 3, 0, // Skip to: 18070
5531
/* 17216 */   MCD_OPC_CheckField, 19, 1, 1, 79, 3, 0, // Skip to: 18070
5532
/* 17223 */   MCD_OPC_Decode, 128, 18, 172, 1, // Opcode: VSHLiv16i8
5533
/* 17228 */   MCD_OPC_FilterValue, 1, 69, 3, 0, // Skip to: 18070
5534
/* 17233 */   MCD_OPC_CheckPredicate, 21, 64, 3, 0, // Skip to: 18070
5535
/* 17238 */   MCD_OPC_CheckField, 19, 1, 1, 57, 3, 0, // Skip to: 18070
5536
/* 17245 */   MCD_OPC_Decode, 177, 18, 173, 1, // Opcode: VSLIv16i8
5537
/* 17250 */   MCD_OPC_FilterValue, 1, 47, 3, 0, // Skip to: 18070
5538
/* 17255 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5539
/* 17258 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17273
5540
/* 17263 */   MCD_OPC_CheckPredicate, 21, 34, 3, 0, // Skip to: 18070
5541
/* 17268 */   MCD_OPC_Decode, 134, 18, 174, 1, // Opcode: VSHLiv8i16
5542
/* 17273 */   MCD_OPC_FilterValue, 1, 24, 3, 0, // Skip to: 18070
5543
/* 17278 */   MCD_OPC_CheckPredicate, 21, 19, 3, 0, // Skip to: 18070
5544
/* 17283 */   MCD_OPC_Decode, 183, 18, 175, 1, // Opcode: VSLIv8i16
5545
/* 17288 */   MCD_OPC_FilterValue, 1, 9, 3, 0, // Skip to: 18070
5546
/* 17293 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5547
/* 17296 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17311
5548
/* 17301 */   MCD_OPC_CheckPredicate, 21, 252, 2, 0, // Skip to: 18070
5549
/* 17306 */   MCD_OPC_Decode, 133, 18, 176, 1, // Opcode: VSHLiv4i32
5550
/* 17311 */   MCD_OPC_FilterValue, 1, 242, 2, 0, // Skip to: 18070
5551
/* 17316 */   MCD_OPC_CheckPredicate, 21, 237, 2, 0, // Skip to: 18070
5552
/* 17321 */   MCD_OPC_Decode, 182, 18, 177, 1, // Opcode: VSLIv4i32
5553
/* 17326 */   MCD_OPC_FilterValue, 6, 84, 0, 0, // Skip to: 17415
5554
/* 17331 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5555
/* 17334 */   MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 17393
5556
/* 17339 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5557
/* 17342 */   MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 17371
5558
/* 17347 */   MCD_OPC_CheckPredicate, 21, 206, 2, 0, // Skip to: 18070
5559
/* 17352 */   MCD_OPC_CheckField, 24, 1, 1, 199, 2, 0, // Skip to: 18070
5560
/* 17359 */   MCD_OPC_CheckField, 19, 1, 1, 192, 2, 0, // Skip to: 18070
5561
/* 17366 */   MCD_OPC_Decode, 153, 16, 172, 1, // Opcode: VQSHLsuv16i8
5562
/* 17371 */   MCD_OPC_FilterValue, 1, 182, 2, 0, // Skip to: 18070
5563
/* 17376 */   MCD_OPC_CheckPredicate, 21, 177, 2, 0, // Skip to: 18070
5564
/* 17381 */   MCD_OPC_CheckField, 24, 1, 1, 170, 2, 0, // Skip to: 18070
5565
/* 17388 */   MCD_OPC_Decode, 159, 16, 174, 1, // Opcode: VQSHLsuv8i16
5566
/* 17393 */   MCD_OPC_FilterValue, 1, 160, 2, 0, // Skip to: 18070
5567
/* 17398 */   MCD_OPC_CheckPredicate, 21, 155, 2, 0, // Skip to: 18070
5568
/* 17403 */   MCD_OPC_CheckField, 24, 1, 1, 148, 2, 0, // Skip to: 18070
5569
/* 17410 */   MCD_OPC_Decode, 158, 16, 176, 1, // Opcode: VQSHLsuv4i32
5570
/* 17415 */   MCD_OPC_FilterValue, 7, 139, 0, 0, // Skip to: 17559
5571
/* 17420 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5572
/* 17423 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 17521
5573
/* 17428 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5574
/* 17431 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 17483
5575
/* 17436 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5576
/* 17439 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 17461
5577
/* 17444 */   MCD_OPC_CheckPredicate, 21, 109, 2, 0, // Skip to: 18070
5578
/* 17449 */   MCD_OPC_CheckField, 19, 1, 1, 102, 2, 0, // Skip to: 18070
5579
/* 17456 */   MCD_OPC_Decode, 145, 16, 172, 1, // Opcode: VQSHLsiv16i8
5580
/* 17461 */   MCD_OPC_FilterValue, 1, 92, 2, 0, // Skip to: 18070
5581
/* 17466 */   MCD_OPC_CheckPredicate, 21, 87, 2, 0, // Skip to: 18070
5582
/* 17471 */   MCD_OPC_CheckField, 19, 1, 1, 80, 2, 0, // Skip to: 18070
5583
/* 17478 */   MCD_OPC_Decode, 169, 16, 172, 1, // Opcode: VQSHLuiv16i8
5584
/* 17483 */   MCD_OPC_FilterValue, 1, 70, 2, 0, // Skip to: 18070
5585
/* 17488 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5586
/* 17491 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17506
5587
/* 17496 */   MCD_OPC_CheckPredicate, 21, 57, 2, 0, // Skip to: 18070
5588
/* 17501 */   MCD_OPC_Decode, 151, 16, 174, 1, // Opcode: VQSHLsiv8i16
5589
/* 17506 */   MCD_OPC_FilterValue, 1, 47, 2, 0, // Skip to: 18070
5590
/* 17511 */   MCD_OPC_CheckPredicate, 21, 42, 2, 0, // Skip to: 18070
5591
/* 17516 */   MCD_OPC_Decode, 175, 16, 174, 1, // Opcode: VQSHLuiv8i16
5592
/* 17521 */   MCD_OPC_FilterValue, 1, 32, 2, 0, // Skip to: 18070
5593
/* 17526 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5594
/* 17529 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17544
5595
/* 17534 */   MCD_OPC_CheckPredicate, 21, 19, 2, 0, // Skip to: 18070
5596
/* 17539 */   MCD_OPC_Decode, 150, 16, 176, 1, // Opcode: VQSHLsiv4i32
5597
/* 17544 */   MCD_OPC_FilterValue, 1, 9, 2, 0, // Skip to: 18070
5598
/* 17549 */   MCD_OPC_CheckPredicate, 21, 4, 2, 0, // Skip to: 18070
5599
/* 17554 */   MCD_OPC_Decode, 174, 16, 176, 1, // Opcode: VQSHLuiv4i32
5600
/* 17559 */   MCD_OPC_FilterValue, 8, 139, 0, 0, // Skip to: 17703
5601
/* 17564 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5602
/* 17567 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 17665
5603
/* 17572 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5604
/* 17575 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 17627
5605
/* 17580 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5606
/* 17583 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 17605
5607
/* 17588 */   MCD_OPC_CheckPredicate, 21, 221, 1, 0, // Skip to: 18070
5608
/* 17593 */   MCD_OPC_CheckField, 19, 1, 1, 214, 1, 0, // Skip to: 18070
5609
/* 17600 */   MCD_OPC_Decode, 182, 17, 154, 1, // Opcode: VRSHRNv8i8
5610
/* 17605 */   MCD_OPC_FilterValue, 1, 204, 1, 0, // Skip to: 18070
5611
/* 17610 */   MCD_OPC_CheckPredicate, 21, 199, 1, 0, // Skip to: 18070
5612
/* 17615 */   MCD_OPC_CheckField, 19, 1, 1, 192, 1, 0, // Skip to: 18070
5613
/* 17622 */   MCD_OPC_Decode, 144, 16, 154, 1, // Opcode: VQRSHRUNv8i8
5614
/* 17627 */   MCD_OPC_FilterValue, 1, 182, 1, 0, // Skip to: 18070
5615
/* 17632 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5616
/* 17635 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17650
5617
/* 17640 */   MCD_OPC_CheckPredicate, 21, 169, 1, 0, // Skip to: 18070
5618
/* 17645 */   MCD_OPC_Decode, 181, 17, 155, 1, // Opcode: VRSHRNv4i16
5619
/* 17650 */   MCD_OPC_FilterValue, 1, 159, 1, 0, // Skip to: 18070
5620
/* 17655 */   MCD_OPC_CheckPredicate, 21, 154, 1, 0, // Skip to: 18070
5621
/* 17660 */   MCD_OPC_Decode, 143, 16, 155, 1, // Opcode: VQRSHRUNv4i16
5622
/* 17665 */   MCD_OPC_FilterValue, 1, 144, 1, 0, // Skip to: 18070
5623
/* 17670 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5624
/* 17673 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17688
5625
/* 17678 */   MCD_OPC_CheckPredicate, 21, 131, 1, 0, // Skip to: 18070
5626
/* 17683 */   MCD_OPC_Decode, 180, 17, 156, 1, // Opcode: VRSHRNv2i32
5627
/* 17688 */   MCD_OPC_FilterValue, 1, 121, 1, 0, // Skip to: 18070
5628
/* 17693 */   MCD_OPC_CheckPredicate, 21, 116, 1, 0, // Skip to: 18070
5629
/* 17698 */   MCD_OPC_Decode, 142, 16, 156, 1, // Opcode: VQRSHRUNv2i32
5630
/* 17703 */   MCD_OPC_FilterValue, 9, 139, 0, 0, // Skip to: 17847
5631
/* 17708 */   MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5632
/* 17711 */   MCD_OPC_FilterValue, 0, 93, 0, 0, // Skip to: 17809
5633
/* 17716 */   MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5634
/* 17719 */   MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 17771
5635
/* 17724 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5636
/* 17727 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 17749
5637
/* 17732 */   MCD_OPC_CheckPredicate, 21, 77, 1, 0, // Skip to: 18070
5638
/* 17737 */   MCD_OPC_CheckField, 19, 1, 1, 70, 1, 0, // Skip to: 18070
5639
/* 17744 */   MCD_OPC_Decode, 138, 16, 154, 1, // Opcode: VQRSHRNsv8i8
5640
/* 17749 */   MCD_OPC_FilterValue, 1, 60, 1, 0, // Skip to: 18070
5641
/* 17754 */   MCD_OPC_CheckPredicate, 21, 55, 1, 0, // Skip to: 18070
5642
/* 17759 */   MCD_OPC_CheckField, 19, 1, 1, 48, 1, 0, // Skip to: 18070
5643
/* 17766 */   MCD_OPC_Decode, 141, 16, 154, 1, // Opcode: VQRSHRNuv8i8
5644
/* 17771 */   MCD_OPC_FilterValue, 1, 38, 1, 0, // Skip to: 18070
5645
/* 17776 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5646
/* 17779 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17794
5647
/* 17784 */   MCD_OPC_CheckPredicate, 21, 25, 1, 0, // Skip to: 18070
5648
/* 17789 */   MCD_OPC_Decode, 137, 16, 155, 1, // Opcode: VQRSHRNsv4i16
5649
/* 17794 */   MCD_OPC_FilterValue, 1, 15, 1, 0, // Skip to: 18070
5650
/* 17799 */   MCD_OPC_CheckPredicate, 21, 10, 1, 0, // Skip to: 18070
5651
/* 17804 */   MCD_OPC_Decode, 140, 16, 155, 1, // Opcode: VQRSHRNuv4i16
5652
/* 17809 */   MCD_OPC_FilterValue, 1, 0, 1, 0, // Skip to: 18070
5653
/* 17814 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5654
/* 17817 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17832
5655
/* 17822 */   MCD_OPC_CheckPredicate, 21, 243, 0, 0, // Skip to: 18070
5656
/* 17827 */   MCD_OPC_Decode, 136, 16, 156, 1, // Opcode: VQRSHRNsv2i32
5657
/* 17832 */   MCD_OPC_FilterValue, 1, 233, 0, 0, // Skip to: 18070
5658
/* 17837 */   MCD_OPC_CheckPredicate, 21, 228, 0, 0, // Skip to: 18070
5659
/* 17842 */   MCD_OPC_Decode, 139, 16, 156, 1, // Opcode: VQRSHRNuv2i32
5660
/* 17847 */   MCD_OPC_FilterValue, 12, 33, 0, 0, // Skip to: 17885
5661
/* 17852 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5662
/* 17855 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17870
5663
/* 17860 */   MCD_OPC_CheckPredicate, 22, 205, 0, 0, // Skip to: 18070
5664
/* 17865 */   MCD_OPC_Decode, 248, 9, 178, 1, // Opcode: VCVTxs2hq
5665
/* 17870 */   MCD_OPC_FilterValue, 1, 195, 0, 0, // Skip to: 18070
5666
/* 17875 */   MCD_OPC_CheckPredicate, 22, 190, 0, 0, // Skip to: 18070
5667
/* 17880 */   MCD_OPC_Decode, 252, 9, 178, 1, // Opcode: VCVTxu2hq
5668
/* 17885 */   MCD_OPC_FilterValue, 13, 33, 0, 0, // Skip to: 17923
5669
/* 17890 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5670
/* 17893 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17908
5671
/* 17898 */   MCD_OPC_CheckPredicate, 22, 167, 0, 0, // Skip to: 18070
5672
/* 17903 */   MCD_OPC_Decode, 234, 9, 178, 1, // Opcode: VCVTh2xsq
5673
/* 17908 */   MCD_OPC_FilterValue, 1, 157, 0, 0, // Skip to: 18070
5674
/* 17913 */   MCD_OPC_CheckPredicate, 22, 152, 0, 0, // Skip to: 18070
5675
/* 17918 */   MCD_OPC_Decode, 236, 9, 178, 1, // Opcode: VCVTh2xuq
5676
/* 17923 */   MCD_OPC_FilterValue, 14, 80, 0, 0, // Skip to: 18008
5677
/* 17928 */   MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
5678
/* 17931 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 17953
5679
/* 17936 */   MCD_OPC_CheckPredicate, 21, 34, 0, 0, // Skip to: 17975
5680
/* 17941 */   MCD_OPC_CheckField, 19, 3, 0, 27, 0, 0, // Skip to: 17975
5681
/* 17948 */   MCD_OPC_Decode, 156, 14, 161, 1, // Opcode: VMOVv16i8
5682
/* 17953 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 17975
5683
/* 17958 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 17975
5684
/* 17963 */   MCD_OPC_CheckField, 19, 3, 0, 5, 0, 0, // Skip to: 17975
5685
/* 17970 */   MCD_OPC_Decode, 160, 14, 161, 1, // Opcode: VMOVv2i64
5686
/* 17975 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5687
/* 17978 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 17993
5688
/* 17983 */   MCD_OPC_CheckPredicate, 21, 82, 0, 0, // Skip to: 18070
5689
/* 17988 */   MCD_OPC_Decode, 246, 9, 178, 1, // Opcode: VCVTxs2fq
5690
/* 17993 */   MCD_OPC_FilterValue, 1, 72, 0, 0, // Skip to: 18070
5691
/* 17998 */   MCD_OPC_CheckPredicate, 21, 67, 0, 0, // Skip to: 18070
5692
/* 18003 */   MCD_OPC_Decode, 250, 9, 178, 1, // Opcode: VCVTxu2fq
5693
/* 18008 */   MCD_OPC_FilterValue, 15, 57, 0, 0, // Skip to: 18070
5694
/* 18013 */   MCD_OPC_ExtractField, 24, 1,  // Inst{24} ...
5695
/* 18016 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 18031
5696
/* 18021 */   MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 18046
5697
/* 18026 */   MCD_OPC_Decode, 225, 9, 178, 1, // Opcode: VCVTf2xsq
5698
/* 18031 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 18046
5699
/* 18036 */   MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 18046
5700
/* 18041 */   MCD_OPC_Decode, 227, 9, 178, 1, // Opcode: VCVTf2xuq
5701
/* 18046 */   MCD_OPC_CheckPredicate, 21, 19, 0, 0, // Skip to: 18070
5702
/* 18051 */   MCD_OPC_CheckField, 19, 3, 0, 12, 0, 0, // Skip to: 18070
5703
/* 18058 */   MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 18070
5704
/* 18065 */   MCD_OPC_Decode, 161, 14, 161, 1, // Opcode: VMOVv4f32
5705
/* 18070 */   MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
5706
/* 18073 */   MCD_OPC_FilterValue, 0, 88, 0, 0, // Skip to: 18166
5707
/* 18078 */   MCD_OPC_ExtractField, 19, 3,  // Inst{21-19} ...
5708
/* 18081 */   MCD_OPC_FilterValue, 0, 211, 1, 0, // Skip to: 18553
5709
/* 18086 */   MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
5710
/* 18089 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 18111
5711
/* 18094 */   MCD_OPC_CheckPredicate, 21, 57, 0, 0, // Skip to: 18156
5712
/* 18099 */   MCD_OPC_CheckField, 10, 2, 2, 50, 0, 0, // Skip to: 18156
5713
/* 18106 */   MCD_OPC_Decode, 164, 14, 161, 1, // Opcode: VMOVv8i16
5714
/* 18111 */   MCD_OPC_FilterValue, 1, 40, 0, 0, // Skip to: 18156
5715
/* 18116 */   MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
5716
/* 18119 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 18134
5717
/* 18124 */   MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 18156
5718
/* 18129 */   MCD_OPC_Decode, 247, 14, 161, 1, // Opcode: VORRiv4i32
5719
/* 18134 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 18156
5720
/* 18139 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 18156
5721
/* 18144 */   MCD_OPC_CheckField, 10, 1, 0, 5, 0, 0, // Skip to: 18156
5722
/* 18151 */   MCD_OPC_Decode, 248, 14, 161, 1, // Opcode: VORRiv8i16
5723
/* 18156 */   MCD_OPC_CheckPredicate, 21, 136, 1, 0, // Skip to: 18553
5724
/* 18161 */   MCD_OPC_Decode, 163, 14, 161, 1, // Opcode: VMOVv4i32
5725
/* 18166 */   MCD_OPC_FilterValue, 1, 126, 1, 0, // Skip to: 18553
5726
/* 18171 */   MCD_OPC_ExtractField, 19, 3,  // Inst{21-19} ...
5727
/* 18174 */   MCD_OPC_FilterValue, 0, 118, 1, 0, // Skip to: 18553
5728
/* 18179 */   MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
5729
/* 18182 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 18204
5730
/* 18187 */   MCD_OPC_CheckPredicate, 21, 57, 0, 0, // Skip to: 18249
5731
/* 18192 */   MCD_OPC_CheckField, 10, 2, 2, 50, 0, 0, // Skip to: 18249
5732
/* 18199 */   MCD_OPC_Decode, 219, 14, 161, 1, // Opcode: VMVNv8i16
5733
/* 18204 */   MCD_OPC_FilterValue, 1, 40, 0, 0, // Skip to: 18249
5734
/* 18209 */   MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
5735
/* 18212 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 18227
5736
/* 18217 */   MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 18249
5737
/* 18222 */   MCD_OPC_Decode, 142, 8, 161, 1, // Opcode: VBICiv4i32
5738
/* 18227 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 18249
5739
/* 18232 */   MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 18249
5740
/* 18237 */   MCD_OPC_CheckField, 10, 1, 0, 5, 0, 0, // Skip to: 18249
5741
/* 18244 */   MCD_OPC_Decode, 143, 8, 161, 1, // Opcode: VBICiv8i16
5742
/* 18249 */   MCD_OPC_CheckPredicate, 21, 43, 1, 0, // Skip to: 18553
5743
/* 18254 */   MCD_OPC_Decode, 218, 14, 161, 1, // Opcode: VMVNv4i32
5744
/* 18259 */   MCD_OPC_FilterValue, 1, 33, 1, 0, // Skip to: 18553
5745
/* 18264 */   MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
5746
/* 18267 */   MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 18307
5747
/* 18272 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5748
/* 18275 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18291
5749
/* 18281 */   MCD_OPC_CheckPredicate, 21, 11, 1, 0, // Skip to: 18553
5750
/* 18286 */   MCD_OPC_Decode, 158, 18, 179, 1, // Opcode: VSHRsv2i64
5751
/* 18291 */   MCD_OPC_FilterValue, 243, 1, 0, 1, 0, // Skip to: 18553
5752
/* 18297 */   MCD_OPC_CheckPredicate, 21, 251, 0, 0, // Skip to: 18553
5753
/* 18302 */   MCD_OPC_Decode, 166, 18, 179, 1, // Opcode: VSHRuv2i64
5754
/* 18307 */   MCD_OPC_FilterValue, 1, 35, 0, 0, // Skip to: 18347
5755
/* 18312 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5756
/* 18315 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18331
5757
/* 18321 */   MCD_OPC_CheckPredicate, 21, 227, 0, 0, // Skip to: 18553
5758
/* 18326 */   MCD_OPC_Decode, 194, 18, 180, 1, // Opcode: VSRAsv2i64
5759
/* 18331 */   MCD_OPC_FilterValue, 243, 1, 216, 0, 0, // Skip to: 18553
5760
/* 18337 */   MCD_OPC_CheckPredicate, 21, 211, 0, 0, // Skip to: 18553
5761
/* 18342 */   MCD_OPC_Decode, 202, 18, 180, 1, // Opcode: VSRAuv2i64
5762
/* 18347 */   MCD_OPC_FilterValue, 2, 35, 0, 0, // Skip to: 18387
5763
/* 18352 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5764
/* 18355 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18371
5765
/* 18361 */   MCD_OPC_CheckPredicate, 21, 187, 0, 0, // Skip to: 18553
5766
/* 18366 */   MCD_OPC_Decode, 186, 17, 179, 1, // Opcode: VRSHRsv2i64
5767
/* 18371 */   MCD_OPC_FilterValue, 243, 1, 176, 0, 0, // Skip to: 18553
5768
/* 18377 */   MCD_OPC_CheckPredicate, 21, 171, 0, 0, // Skip to: 18553
5769
/* 18382 */   MCD_OPC_Decode, 194, 17, 179, 1, // Opcode: VRSHRuv2i64
5770
/* 18387 */   MCD_OPC_FilterValue, 3, 35, 0, 0, // Skip to: 18427
5771
/* 18392 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5772
/* 18395 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18411
5773
/* 18401 */   MCD_OPC_CheckPredicate, 21, 147, 0, 0, // Skip to: 18553
5774
/* 18406 */   MCD_OPC_Decode, 212, 17, 180, 1, // Opcode: VRSRAsv2i64
5775
/* 18411 */   MCD_OPC_FilterValue, 243, 1, 136, 0, 0, // Skip to: 18553
5776
/* 18417 */   MCD_OPC_CheckPredicate, 21, 131, 0, 0, // Skip to: 18553
5777
/* 18422 */   MCD_OPC_Decode, 220, 17, 180, 1, // Opcode: VRSRAuv2i64
5778
/* 18427 */   MCD_OPC_FilterValue, 4, 18, 0, 0, // Skip to: 18450
5779
/* 18432 */   MCD_OPC_CheckPredicate, 21, 116, 0, 0, // Skip to: 18553
5780
/* 18437 */   MCD_OPC_CheckField, 24, 8, 243, 1, 108, 0, 0, // Skip to: 18553
5781
/* 18445 */   MCD_OPC_Decode, 210, 18, 180, 1, // Opcode: VSRIv2i64
5782
/* 18450 */   MCD_OPC_FilterValue, 5, 35, 0, 0, // Skip to: 18490
5783
/* 18455 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5784
/* 18458 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18474
5785
/* 18464 */   MCD_OPC_CheckPredicate, 21, 84, 0, 0, // Skip to: 18553
5786
/* 18469 */   MCD_OPC_Decode, 131, 18, 181, 1, // Opcode: VSHLiv2i64
5787
/* 18474 */   MCD_OPC_FilterValue, 243, 1, 73, 0, 0, // Skip to: 18553
5788
/* 18480 */   MCD_OPC_CheckPredicate, 21, 68, 0, 0, // Skip to: 18553
5789
/* 18485 */   MCD_OPC_Decode, 180, 18, 182, 1, // Opcode: VSLIv2i64
5790
/* 18490 */   MCD_OPC_FilterValue, 6, 18, 0, 0, // Skip to: 18513
5791
/* 18495 */   MCD_OPC_CheckPredicate, 21, 53, 0, 0, // Skip to: 18553
5792
/* 18500 */   MCD_OPC_CheckField, 24, 8, 243, 1, 45, 0, 0, // Skip to: 18553
5793
/* 18508 */   MCD_OPC_Decode, 156, 16, 181, 1, // Opcode: VQSHLsuv2i64
5794
/* 18513 */   MCD_OPC_FilterValue, 7, 35, 0, 0, // Skip to: 18553
5795
/* 18518 */   MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
5796
/* 18521 */   MCD_OPC_FilterValue, 242, 1, 10, 0, 0, // Skip to: 18537
5797
/* 18527 */   MCD_OPC_CheckPredicate, 21, 21, 0, 0, // Skip to: 18553
5798
/* 18532 */   MCD_OPC_Decode, 148, 16, 181, 1, // Opcode: VQSHLsiv2i64
5799
/* 18537 */   MCD_OPC_FilterValue, 243, 1, 10, 0, 0, // Skip to: 18553
5800
/* 18543 */   MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 18553
5801
/* 18548 */   MCD_OPC_Decode, 172, 16, 181, 1, // Opcode: VQSHLuiv2i64
5802
/* 18553 */   MCD_OPC_Fail,
5803
  0
5804
};
5805
5806
static const uint8_t DecoderTableNEONDup32[] = {
5807
/* 0 */       MCD_OPC_ExtractField, 22, 6,  // Inst{27-22} ...
5808
/* 3 */       MCD_OPC_FilterValue, 56, 121, 0, 0, // Skip to: 129
5809
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
5810
/* 11 */      MCD_OPC_FilterValue, 16, 61, 0, 0, // Skip to: 77
5811
/* 16 */      MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5812
/* 19 */      MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 48
5813
/* 24 */      MCD_OPC_CheckPredicate, 27, 183, 1, 0, // Skip to: 468
5814
/* 29 */      MCD_OPC_CheckField, 8, 4, 11, 176, 1, 0, // Skip to: 468
5815
/* 36 */      MCD_OPC_CheckField, 6, 1, 0, 169, 1, 0, // Skip to: 468
5816
/* 43 */      MCD_OPC_Decode, 245, 17, 183, 1, // Opcode: VSETLNi32
5817
/* 48 */      MCD_OPC_FilterValue, 1, 159, 1, 0, // Skip to: 468
5818
/* 53 */      MCD_OPC_CheckPredicate, 27, 154, 1, 0, // Skip to: 468
5819
/* 58 */      MCD_OPC_CheckField, 8, 4, 11, 147, 1, 0, // Skip to: 468
5820
/* 65 */      MCD_OPC_CheckField, 6, 1, 0, 140, 1, 0, // Skip to: 468
5821
/* 72 */      MCD_OPC_Decode, 169, 10, 184, 1, // Opcode: VGETLNi32
5822
/* 77 */      MCD_OPC_FilterValue, 48, 130, 1, 0, // Skip to: 468
5823
/* 82 */      MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5824
/* 85 */      MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 107
5825
/* 90 */      MCD_OPC_CheckPredicate, 21, 117, 1, 0, // Skip to: 468
5826
/* 95 */      MCD_OPC_CheckField, 8, 4, 11, 110, 1, 0, // Skip to: 468
5827
/* 102 */     MCD_OPC_Decode, 244, 17, 185, 1, // Opcode: VSETLNi16
5828
/* 107 */     MCD_OPC_FilterValue, 1, 100, 1, 0, // Skip to: 468
5829
/* 112 */     MCD_OPC_CheckPredicate, 21, 95, 1, 0, // Skip to: 468
5830
/* 117 */     MCD_OPC_CheckField, 8, 4, 11, 88, 1, 0, // Skip to: 468
5831
/* 124 */     MCD_OPC_Decode, 170, 10, 186, 1, // Opcode: VGETLNs16
5832
/* 129 */     MCD_OPC_FilterValue, 57, 61, 0, 0, // Skip to: 195
5833
/* 134 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5834
/* 137 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 166
5835
/* 142 */     MCD_OPC_CheckPredicate, 21, 65, 1, 0, // Skip to: 468
5836
/* 147 */     MCD_OPC_CheckField, 8, 4, 11, 58, 1, 0, // Skip to: 468
5837
/* 154 */     MCD_OPC_CheckField, 0, 5, 16, 51, 1, 0, // Skip to: 468
5838
/* 161 */     MCD_OPC_Decode, 246, 17, 187, 1, // Opcode: VSETLNi8
5839
/* 166 */     MCD_OPC_FilterValue, 1, 41, 1, 0, // Skip to: 468
5840
/* 171 */     MCD_OPC_CheckPredicate, 21, 36, 1, 0, // Skip to: 468
5841
/* 176 */     MCD_OPC_CheckField, 8, 4, 11, 29, 1, 0, // Skip to: 468
5842
/* 183 */     MCD_OPC_CheckField, 0, 5, 16, 22, 1, 0, // Skip to: 468
5843
/* 190 */     MCD_OPC_Decode, 171, 10, 188, 1, // Opcode: VGETLNs8
5844
/* 195 */     MCD_OPC_FilterValue, 58, 165, 0, 0, // Skip to: 365
5845
/* 200 */     MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
5846
/* 203 */     MCD_OPC_FilterValue, 16, 61, 0, 0, // Skip to: 269
5847
/* 208 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5848
/* 211 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 240
5849
/* 216 */     MCD_OPC_CheckPredicate, 21, 247, 0, 0, // Skip to: 468
5850
/* 221 */     MCD_OPC_CheckField, 8, 4, 11, 240, 0, 0, // Skip to: 468
5851
/* 228 */     MCD_OPC_CheckField, 6, 1, 0, 233, 0, 0, // Skip to: 468
5852
/* 235 */     MCD_OPC_Decode, 130, 10, 189, 1, // Opcode: VDUP32d
5853
/* 240 */     MCD_OPC_FilterValue, 2, 223, 0, 0, // Skip to: 468
5854
/* 245 */     MCD_OPC_CheckPredicate, 21, 218, 0, 0, // Skip to: 468
5855
/* 250 */     MCD_OPC_CheckField, 8, 4, 11, 211, 0, 0, // Skip to: 468
5856
/* 257 */     MCD_OPC_CheckField, 6, 1, 0, 204, 0, 0, // Skip to: 468
5857
/* 264 */     MCD_OPC_Decode, 131, 10, 190, 1, // Opcode: VDUP32q
5858
/* 269 */     MCD_OPC_FilterValue, 48, 194, 0, 0, // Skip to: 468
5859
/* 274 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5860
/* 277 */     MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 343
5861
/* 282 */     MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5862
/* 285 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 314
5863
/* 290 */     MCD_OPC_CheckPredicate, 21, 173, 0, 0, // Skip to: 468
5864
/* 295 */     MCD_OPC_CheckField, 8, 4, 11, 166, 0, 0, // Skip to: 468
5865
/* 302 */     MCD_OPC_CheckField, 6, 1, 0, 159, 0, 0, // Skip to: 468
5866
/* 309 */     MCD_OPC_Decode, 128, 10, 189, 1, // Opcode: VDUP16d
5867
/* 314 */     MCD_OPC_FilterValue, 1, 149, 0, 0, // Skip to: 468
5868
/* 319 */     MCD_OPC_CheckPredicate, 21, 144, 0, 0, // Skip to: 468
5869
/* 324 */     MCD_OPC_CheckField, 8, 4, 11, 137, 0, 0, // Skip to: 468
5870
/* 331 */     MCD_OPC_CheckField, 6, 1, 0, 130, 0, 0, // Skip to: 468
5871
/* 338 */     MCD_OPC_Decode, 129, 10, 190, 1, // Opcode: VDUP16q
5872
/* 343 */     MCD_OPC_FilterValue, 1, 120, 0, 0, // Skip to: 468
5873
/* 348 */     MCD_OPC_CheckPredicate, 21, 115, 0, 0, // Skip to: 468
5874
/* 353 */     MCD_OPC_CheckField, 8, 4, 11, 108, 0, 0, // Skip to: 468
5875
/* 360 */     MCD_OPC_Decode, 172, 10, 186, 1, // Opcode: VGETLNu16
5876
/* 365 */     MCD_OPC_FilterValue, 59, 98, 0, 0, // Skip to: 468
5877
/* 370 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
5878
/* 373 */     MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 439
5879
/* 378 */     MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
5880
/* 381 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 410
5881
/* 386 */     MCD_OPC_CheckPredicate, 21, 77, 0, 0, // Skip to: 468
5882
/* 391 */     MCD_OPC_CheckField, 8, 4, 11, 70, 0, 0, // Skip to: 468
5883
/* 398 */     MCD_OPC_CheckField, 0, 7, 16, 63, 0, 0, // Skip to: 468
5884
/* 405 */     MCD_OPC_Decode, 132, 10, 189, 1, // Opcode: VDUP8d
5885
/* 410 */     MCD_OPC_FilterValue, 1, 53, 0, 0, // Skip to: 468
5886
/* 415 */     MCD_OPC_CheckPredicate, 21, 48, 0, 0, // Skip to: 468
5887
/* 420 */     MCD_OPC_CheckField, 8, 4, 11, 41, 0, 0, // Skip to: 468
5888
/* 427 */     MCD_OPC_CheckField, 0, 7, 16, 34, 0, 0, // Skip to: 468
5889
/* 434 */     MCD_OPC_Decode, 133, 10, 190, 1, // Opcode: VDUP8q
5890
/* 439 */     MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 468
5891
/* 444 */     MCD_OPC_CheckPredicate, 21, 19, 0, 0, // Skip to: 468
5892
/* 449 */     MCD_OPC_CheckField, 8, 4, 11, 12, 0, 0, // Skip to: 468
5893
/* 456 */     MCD_OPC_CheckField, 0, 5, 16, 5, 0, 0, // Skip to: 468
5894
/* 463 */     MCD_OPC_Decode, 173, 10, 188, 1, // Opcode: VGETLNu8
5895
/* 468 */     MCD_OPC_Fail,
5896
  0
5897
};
5898
5899
static const uint8_t DecoderTableNEONLoadStore32[] = {
5900
/* 0 */       MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
5901
/* 3 */       MCD_OPC_FilterValue, 0, 55, 1, 0, // Skip to: 319
5902
/* 8 */       MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5903
/* 11 */      MCD_OPC_FilterValue, 0, 149, 0, 0, // Skip to: 165
5904
/* 16 */      MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
5905
/* 19 */      MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 124
5906
/* 25 */      MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
5907
/* 28 */      MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 60
5908
/* 33 */      MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 50
5909
/* 38 */      MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 50
5910
/* 45 */      MCD_OPC_Decode, 178, 20, 191, 1, // Opcode: VST4d8
5911
/* 50 */      MCD_OPC_CheckPredicate, 21, 246, 25, 0, // Skip to: 6701
5912
/* 55 */      MCD_OPC_Decode, 181, 20, 191, 1, // Opcode: VST4d8_UPD
5913
/* 60 */      MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 92
5914
/* 65 */      MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 82
5915
/* 70 */      MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 82
5916
/* 77 */      MCD_OPC_Decode, 170, 20, 191, 1, // Opcode: VST4d16
5917
/* 82 */      MCD_OPC_CheckPredicate, 21, 214, 25, 0, // Skip to: 6701
5918
/* 87 */      MCD_OPC_Decode, 173, 20, 191, 1, // Opcode: VST4d16_UPD
5919
/* 92 */      MCD_OPC_FilterValue, 2, 204, 25, 0, // Skip to: 6701
5920
/* 97 */      MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 114
5921
/* 102 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 114
5922
/* 109 */     MCD_OPC_Decode, 174, 20, 191, 1, // Opcode: VST4d32
5923
/* 114 */     MCD_OPC_CheckPredicate, 21, 182, 25, 0, // Skip to: 6701
5924
/* 119 */     MCD_OPC_Decode, 177, 20, 191, 1, // Opcode: VST4d32_UPD
5925
/* 124 */     MCD_OPC_FilterValue, 233, 3, 171, 25, 0, // Skip to: 6701
5926
/* 130 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
5927
/* 133 */     MCD_OPC_FilterValue, 0, 163, 25, 0, // Skip to: 6701
5928
/* 138 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 155
5929
/* 143 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 155
5930
/* 150 */     MCD_OPC_Decode, 219, 18, 192, 1, // Opcode: VST1LNd8
5931
/* 155 */     MCD_OPC_CheckPredicate, 21, 141, 25, 0, // Skip to: 6701
5932
/* 160 */     MCD_OPC_Decode, 220, 18, 192, 1, // Opcode: VST1LNd8_UPD
5933
/* 165 */     MCD_OPC_FilterValue, 2, 131, 25, 0, // Skip to: 6701
5934
/* 170 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
5935
/* 173 */     MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 278
5936
/* 179 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
5937
/* 182 */     MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 214
5938
/* 187 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 204
5939
/* 192 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 204
5940
/* 199 */     MCD_OPC_Decode, 253, 12, 191, 1, // Opcode: VLD4d8
5941
/* 204 */     MCD_OPC_CheckPredicate, 21, 92, 25, 0, // Skip to: 6701
5942
/* 209 */     MCD_OPC_Decode, 128, 13, 191, 1, // Opcode: VLD4d8_UPD
5943
/* 214 */     MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 246
5944
/* 219 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 236
5945
/* 224 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 236
5946
/* 231 */     MCD_OPC_Decode, 245, 12, 191, 1, // Opcode: VLD4d16
5947
/* 236 */     MCD_OPC_CheckPredicate, 21, 60, 25, 0, // Skip to: 6701
5948
/* 241 */     MCD_OPC_Decode, 248, 12, 191, 1, // Opcode: VLD4d16_UPD
5949
/* 246 */     MCD_OPC_FilterValue, 2, 50, 25, 0, // Skip to: 6701
5950
/* 251 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 268
5951
/* 256 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 268
5952
/* 263 */     MCD_OPC_Decode, 249, 12, 191, 1, // Opcode: VLD4d32
5953
/* 268 */     MCD_OPC_CheckPredicate, 21, 28, 25, 0, // Skip to: 6701
5954
/* 273 */     MCD_OPC_Decode, 252, 12, 191, 1, // Opcode: VLD4d32_UPD
5955
/* 278 */     MCD_OPC_FilterValue, 233, 3, 17, 25, 0, // Skip to: 6701
5956
/* 284 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
5957
/* 287 */     MCD_OPC_FilterValue, 0, 9, 25, 0, // Skip to: 6701
5958
/* 292 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 309
5959
/* 297 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 309
5960
/* 304 */     MCD_OPC_Decode, 222, 10, 193, 1, // Opcode: VLD1LNd8
5961
/* 309 */     MCD_OPC_CheckPredicate, 21, 243, 24, 0, // Skip to: 6701
5962
/* 314 */     MCD_OPC_Decode, 223, 10, 193, 1, // Opcode: VLD1LNd8_UPD
5963
/* 319 */     MCD_OPC_FilterValue, 1, 39, 1, 0, // Skip to: 619
5964
/* 324 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
5965
/* 327 */     MCD_OPC_FilterValue, 0, 141, 0, 0, // Skip to: 473
5966
/* 332 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
5967
/* 335 */     MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 440
5968
/* 341 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
5969
/* 344 */     MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 376
5970
/* 349 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 366
5971
/* 354 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 366
5972
/* 361 */     MCD_OPC_Decode, 192, 20, 191, 1, // Opcode: VST4q8
5973
/* 366 */     MCD_OPC_CheckPredicate, 21, 186, 24, 0, // Skip to: 6701
5974
/* 371 */     MCD_OPC_Decode, 194, 20, 191, 1, // Opcode: VST4q8_UPD
5975
/* 376 */     MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 408
5976
/* 381 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 398
5977
/* 386 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 398
5978
/* 393 */     MCD_OPC_Decode, 182, 20, 191, 1, // Opcode: VST4q16
5979
/* 398 */     MCD_OPC_CheckPredicate, 21, 154, 24, 0, // Skip to: 6701
5980
/* 403 */     MCD_OPC_Decode, 184, 20, 191, 1, // Opcode: VST4q16_UPD
5981
/* 408 */     MCD_OPC_FilterValue, 2, 144, 24, 0, // Skip to: 6701
5982
/* 413 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 430
5983
/* 418 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 430
5984
/* 425 */     MCD_OPC_Decode, 187, 20, 191, 1, // Opcode: VST4q32
5985
/* 430 */     MCD_OPC_CheckPredicate, 21, 122, 24, 0, // Skip to: 6701
5986
/* 435 */     MCD_OPC_Decode, 189, 20, 191, 1, // Opcode: VST4q32_UPD
5987
/* 440 */     MCD_OPC_FilterValue, 233, 3, 111, 24, 0, // Skip to: 6701
5988
/* 446 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 463
5989
/* 451 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 463
5990
/* 458 */     MCD_OPC_Decode, 183, 19, 194, 1, // Opcode: VST2LNd8
5991
/* 463 */     MCD_OPC_CheckPredicate, 21, 89, 24, 0, // Skip to: 6701
5992
/* 468 */     MCD_OPC_Decode, 186, 19, 194, 1, // Opcode: VST2LNd8_UPD
5993
/* 473 */     MCD_OPC_FilterValue, 2, 79, 24, 0, // Skip to: 6701
5994
/* 478 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
5995
/* 481 */     MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 586
5996
/* 487 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
5997
/* 490 */     MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 522
5998
/* 495 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 512
5999
/* 500 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 512
6000
/* 507 */     MCD_OPC_Decode, 139, 13, 191, 1, // Opcode: VLD4q8
6001
/* 512 */     MCD_OPC_CheckPredicate, 21, 40, 24, 0, // Skip to: 6701
6002
/* 517 */     MCD_OPC_Decode, 141, 13, 191, 1, // Opcode: VLD4q8_UPD
6003
/* 522 */     MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 554
6004
/* 527 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 544
6005
/* 532 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 544
6006
/* 539 */     MCD_OPC_Decode, 129, 13, 191, 1, // Opcode: VLD4q16
6007
/* 544 */     MCD_OPC_CheckPredicate, 21, 8, 24, 0, // Skip to: 6701
6008
/* 549 */     MCD_OPC_Decode, 131, 13, 191, 1, // Opcode: VLD4q16_UPD
6009
/* 554 */     MCD_OPC_FilterValue, 2, 254, 23, 0, // Skip to: 6701
6010
/* 559 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 576
6011
/* 564 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 576
6012
/* 571 */     MCD_OPC_Decode, 134, 13, 191, 1, // Opcode: VLD4q32
6013
/* 576 */     MCD_OPC_CheckPredicate, 21, 232, 23, 0, // Skip to: 6701
6014
/* 581 */     MCD_OPC_Decode, 136, 13, 191, 1, // Opcode: VLD4q32_UPD
6015
/* 586 */     MCD_OPC_FilterValue, 233, 3, 221, 23, 0, // Skip to: 6701
6016
/* 592 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 609
6017
/* 597 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 609
6018
/* 604 */     MCD_OPC_Decode, 210, 11, 195, 1, // Opcode: VLD2LNd8
6019
/* 609 */     MCD_OPC_CheckPredicate, 21, 199, 23, 0, // Skip to: 6701
6020
/* 614 */     MCD_OPC_Decode, 213, 11, 195, 1, // Opcode: VLD2LNd8_UPD
6021
/* 619 */     MCD_OPC_FilterValue, 2, 247, 1, 0, // Skip to: 1127
6022
/* 624 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6023
/* 627 */     MCD_OPC_FilterValue, 0, 245, 0, 0, // Skip to: 877
6024
/* 632 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6025
/* 635 */     MCD_OPC_FilterValue, 232, 3, 195, 0, 0, // Skip to: 836
6026
/* 641 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6027
/* 644 */     MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 692
6028
/* 649 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6029
/* 652 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 667
6030
/* 657 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 682
6031
/* 662 */     MCD_OPC_Decode, 139, 19, 196, 1, // Opcode: VST1d8Qwb_fixed
6032
/* 667 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 682
6033
/* 672 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 682
6034
/* 677 */     MCD_OPC_Decode, 137, 19, 196, 1, // Opcode: VST1d8Q
6035
/* 682 */     MCD_OPC_CheckPredicate, 21, 126, 23, 0, // Skip to: 6701
6036
/* 687 */     MCD_OPC_Decode, 140, 19, 196, 1, // Opcode: VST1d8Qwb_register
6037
/* 692 */     MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 740
6038
/* 697 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6039
/* 700 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 715
6040
/* 705 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 730
6041
/* 710 */     MCD_OPC_Decode, 230, 18, 196, 1, // Opcode: VST1d16Qwb_fixed
6042
/* 715 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 730
6043
/* 720 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 730
6044
/* 725 */     MCD_OPC_Decode, 228, 18, 196, 1, // Opcode: VST1d16Q
6045
/* 730 */     MCD_OPC_CheckPredicate, 21, 78, 23, 0, // Skip to: 6701
6046
/* 735 */     MCD_OPC_Decode, 231, 18, 196, 1, // Opcode: VST1d16Qwb_register
6047
/* 740 */     MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 788
6048
/* 745 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6049
/* 748 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 763
6050
/* 753 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 778
6051
/* 758 */     MCD_OPC_Decode, 241, 18, 196, 1, // Opcode: VST1d32Qwb_fixed
6052
/* 763 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 778
6053
/* 768 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 778
6054
/* 773 */     MCD_OPC_Decode, 239, 18, 196, 1, // Opcode: VST1d32Q
6055
/* 778 */     MCD_OPC_CheckPredicate, 21, 30, 23, 0, // Skip to: 6701
6056
/* 783 */     MCD_OPC_Decode, 242, 18, 196, 1, // Opcode: VST1d32Qwb_register
6057
/* 788 */     MCD_OPC_FilterValue, 3, 20, 23, 0, // Skip to: 6701
6058
/* 793 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6059
/* 796 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 811
6060
/* 801 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 826
6061
/* 806 */     MCD_OPC_Decode, 254, 18, 196, 1, // Opcode: VST1d64Qwb_fixed
6062
/* 811 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 826
6063
/* 816 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 826
6064
/* 821 */     MCD_OPC_Decode, 250, 18, 196, 1, // Opcode: VST1d64Q
6065
/* 826 */     MCD_OPC_CheckPredicate, 21, 238, 22, 0, // Skip to: 6701
6066
/* 831 */     MCD_OPC_Decode, 255, 18, 196, 1, // Opcode: VST1d64Qwb_register
6067
/* 836 */     MCD_OPC_FilterValue, 233, 3, 227, 22, 0, // Skip to: 6701
6068
/* 842 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
6069
/* 845 */     MCD_OPC_FilterValue, 0, 219, 22, 0, // Skip to: 6701
6070
/* 850 */     MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 867
6071
/* 855 */     MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 867
6072
/* 862 */     MCD_OPC_Decode, 239, 19, 197, 1, // Opcode: VST3LNd8
6073
/* 867 */     MCD_OPC_CheckPredicate, 21, 197, 22, 0, // Skip to: 6701
6074
/* 872 */     MCD_OPC_Decode, 242, 19, 197, 1, // Opcode: VST3LNd8_UPD
6075
/* 877 */     MCD_OPC_FilterValue, 2, 187, 22, 0, // Skip to: 6701
6076
/* 882 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6077
/* 885 */     MCD_OPC_FilterValue, 232, 3, 195, 0, 0, // Skip to: 1086
6078
/* 891 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6079
/* 894 */     MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 942
6080
/* 899 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6081
/* 902 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 917
6082
/* 907 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 932
6083
/* 912 */     MCD_OPC_Decode, 142, 11, 196, 1, // Opcode: VLD1d8Qwb_fixed
6084
/* 917 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 932
6085
/* 922 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 932
6086
/* 927 */     MCD_OPC_Decode, 140, 11, 196, 1, // Opcode: VLD1d8Q
6087
/* 932 */     MCD_OPC_CheckPredicate, 21, 132, 22, 0, // Skip to: 6701
6088
/* 937 */     MCD_OPC_Decode, 143, 11, 196, 1, // Opcode: VLD1d8Qwb_register
6089
/* 942 */     MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 990
6090
/* 947 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6091
/* 950 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 965
6092
/* 955 */     MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 980
6093
/* 960 */     MCD_OPC_Decode, 233, 10, 196, 1, // Opcode: VLD1d16Qwb_fixed
6094
/* 965 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 980
6095
/* 970 */     MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 980
6096
/* 975 */     MCD_OPC_Decode, 231, 10, 196, 1, // Opcode: VLD1d16Q
6097
/* 980 */     MCD_OPC_CheckPredicate, 21, 84, 22, 0, // Skip to: 6701
6098
/* 985 */     MCD_OPC_Decode, 234, 10, 196, 1, // Opcode: VLD1d16Qwb_register
6099
/* 990 */     MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 1038
6100
/* 995 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6101
/* 998 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1013
6102
/* 1003 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1028
6103
/* 1008 */    MCD_OPC_Decode, 244, 10, 196, 1, // Opcode: VLD1d32Qwb_fixed
6104
/* 1013 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1028
6105
/* 1018 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1028
6106
/* 1023 */    MCD_OPC_Decode, 242, 10, 196, 1, // Opcode: VLD1d32Q
6107
/* 1028 */    MCD_OPC_CheckPredicate, 21, 36, 22, 0, // Skip to: 6701
6108
/* 1033 */    MCD_OPC_Decode, 245, 10, 196, 1, // Opcode: VLD1d32Qwb_register
6109
/* 1038 */    MCD_OPC_FilterValue, 3, 26, 22, 0, // Skip to: 6701
6110
/* 1043 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6111
/* 1046 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1061
6112
/* 1051 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1076
6113
/* 1056 */    MCD_OPC_Decode, 129, 11, 196, 1, // Opcode: VLD1d64Qwb_fixed
6114
/* 1061 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1076
6115
/* 1066 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1076
6116
/* 1071 */    MCD_OPC_Decode, 253, 10, 196, 1, // Opcode: VLD1d64Q
6117
/* 1076 */    MCD_OPC_CheckPredicate, 21, 244, 21, 0, // Skip to: 6701
6118
/* 1081 */    MCD_OPC_Decode, 130, 11, 196, 1, // Opcode: VLD1d64Qwb_register
6119
/* 1086 */    MCD_OPC_FilterValue, 233, 3, 233, 21, 0, // Skip to: 6701
6120
/* 1092 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
6121
/* 1095 */    MCD_OPC_FilterValue, 0, 225, 21, 0, // Skip to: 6701
6122
/* 1100 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1117
6123
/* 1105 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1117
6124
/* 1112 */    MCD_OPC_Decode, 162, 12, 198, 1, // Opcode: VLD3LNd8
6125
/* 1117 */    MCD_OPC_CheckPredicate, 21, 203, 21, 0, // Skip to: 6701
6126
/* 1122 */    MCD_OPC_Decode, 165, 12, 198, 1, // Opcode: VLD3LNd8_UPD
6127
/* 1127 */    MCD_OPC_FilterValue, 3, 135, 1, 0, // Skip to: 1523
6128
/* 1132 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6129
/* 1135 */    MCD_OPC_FilterValue, 0, 189, 0, 0, // Skip to: 1329
6130
/* 1140 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6131
/* 1143 */    MCD_OPC_FilterValue, 232, 3, 147, 0, 0, // Skip to: 1296
6132
/* 1149 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6133
/* 1152 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 1200
6134
/* 1157 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6135
/* 1160 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1175
6136
/* 1165 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1190
6137
/* 1170 */    MCD_OPC_Decode, 229, 19, 199, 1, // Opcode: VST2q8wb_fixed
6138
/* 1175 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1190
6139
/* 1180 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1190
6140
/* 1185 */    MCD_OPC_Decode, 225, 19, 199, 1, // Opcode: VST2q8
6141
/* 1190 */    MCD_OPC_CheckPredicate, 21, 130, 21, 0, // Skip to: 6701
6142
/* 1195 */    MCD_OPC_Decode, 230, 19, 199, 1, // Opcode: VST2q8wb_register
6143
/* 1200 */    MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 1248
6144
/* 1205 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6145
/* 1208 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1223
6146
/* 1213 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1238
6147
/* 1218 */    MCD_OPC_Decode, 217, 19, 199, 1, // Opcode: VST2q16wb_fixed
6148
/* 1223 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1238
6149
/* 1228 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1238
6150
/* 1233 */    MCD_OPC_Decode, 213, 19, 199, 1, // Opcode: VST2q16
6151
/* 1238 */    MCD_OPC_CheckPredicate, 21, 82, 21, 0, // Skip to: 6701
6152
/* 1243 */    MCD_OPC_Decode, 218, 19, 199, 1, // Opcode: VST2q16wb_register
6153
/* 1248 */    MCD_OPC_FilterValue, 2, 72, 21, 0, // Skip to: 6701
6154
/* 1253 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6155
/* 1256 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1271
6156
/* 1261 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1286
6157
/* 1266 */    MCD_OPC_Decode, 223, 19, 199, 1, // Opcode: VST2q32wb_fixed
6158
/* 1271 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1286
6159
/* 1276 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1286
6160
/* 1281 */    MCD_OPC_Decode, 219, 19, 199, 1, // Opcode: VST2q32
6161
/* 1286 */    MCD_OPC_CheckPredicate, 21, 34, 21, 0, // Skip to: 6701
6162
/* 1291 */    MCD_OPC_Decode, 224, 19, 199, 1, // Opcode: VST2q32wb_register
6163
/* 1296 */    MCD_OPC_FilterValue, 233, 3, 23, 21, 0, // Skip to: 6701
6164
/* 1302 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1319
6165
/* 1307 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1319
6166
/* 1314 */    MCD_OPC_Decode, 158, 20, 200, 1, // Opcode: VST4LNd8
6167
/* 1319 */    MCD_OPC_CheckPredicate, 21, 1, 21, 0, // Skip to: 6701
6168
/* 1324 */    MCD_OPC_Decode, 161, 20, 200, 1, // Opcode: VST4LNd8_UPD
6169
/* 1329 */    MCD_OPC_FilterValue, 2, 247, 20, 0, // Skip to: 6701
6170
/* 1334 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6171
/* 1337 */    MCD_OPC_FilterValue, 232, 3, 147, 0, 0, // Skip to: 1490
6172
/* 1343 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6173
/* 1346 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 1394
6174
/* 1351 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6175
/* 1354 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1369
6176
/* 1359 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1384
6177
/* 1364 */    MCD_OPC_Decode, 128, 12, 199, 1, // Opcode: VLD2q8wb_fixed
6178
/* 1369 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1384
6179
/* 1374 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1384
6180
/* 1379 */    MCD_OPC_Decode, 252, 11, 199, 1, // Opcode: VLD2q8
6181
/* 1384 */    MCD_OPC_CheckPredicate, 21, 192, 20, 0, // Skip to: 6701
6182
/* 1389 */    MCD_OPC_Decode, 129, 12, 199, 1, // Opcode: VLD2q8wb_register
6183
/* 1394 */    MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 1442
6184
/* 1399 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6185
/* 1402 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1417
6186
/* 1407 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1432
6187
/* 1412 */    MCD_OPC_Decode, 244, 11, 199, 1, // Opcode: VLD2q16wb_fixed
6188
/* 1417 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1432
6189
/* 1422 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1432
6190
/* 1427 */    MCD_OPC_Decode, 240, 11, 199, 1, // Opcode: VLD2q16
6191
/* 1432 */    MCD_OPC_CheckPredicate, 21, 144, 20, 0, // Skip to: 6701
6192
/* 1437 */    MCD_OPC_Decode, 245, 11, 199, 1, // Opcode: VLD2q16wb_register
6193
/* 1442 */    MCD_OPC_FilterValue, 2, 134, 20, 0, // Skip to: 6701
6194
/* 1447 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6195
/* 1450 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1465
6196
/* 1455 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 1480
6197
/* 1460 */    MCD_OPC_Decode, 250, 11, 199, 1, // Opcode: VLD2q32wb_fixed
6198
/* 1465 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1480
6199
/* 1470 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 1480
6200
/* 1475 */    MCD_OPC_Decode, 246, 11, 199, 1, // Opcode: VLD2q32
6201
/* 1480 */    MCD_OPC_CheckPredicate, 21, 96, 20, 0, // Skip to: 6701
6202
/* 1485 */    MCD_OPC_Decode, 251, 11, 199, 1, // Opcode: VLD2q32wb_register
6203
/* 1490 */    MCD_OPC_FilterValue, 233, 3, 85, 20, 0, // Skip to: 6701
6204
/* 1496 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1513
6205
/* 1501 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1513
6206
/* 1508 */    MCD_OPC_Decode, 233, 12, 201, 1, // Opcode: VLD4LNd8
6207
/* 1513 */    MCD_OPC_CheckPredicate, 21, 63, 20, 0, // Skip to: 6701
6208
/* 1518 */    MCD_OPC_Decode, 236, 12, 201, 1, // Opcode: VLD4LNd8_UPD
6209
/* 1523 */    MCD_OPC_FilterValue, 4, 54, 1, 0, // Skip to: 1838
6210
/* 1528 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6211
/* 1531 */    MCD_OPC_FilterValue, 0, 149, 0, 0, // Skip to: 1685
6212
/* 1536 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6213
/* 1539 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 1644
6214
/* 1545 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
6215
/* 1548 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 1580
6216
/* 1553 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1570
6217
/* 1558 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1570
6218
/* 1565 */    MCD_OPC_Decode, 131, 20, 202, 1, // Opcode: VST3d8
6219
/* 1570 */    MCD_OPC_CheckPredicate, 21, 6, 20, 0, // Skip to: 6701
6220
/* 1575 */    MCD_OPC_Decode, 134, 20, 202, 1, // Opcode: VST3d8_UPD
6221
/* 1580 */    MCD_OPC_FilterValue, 2, 27, 0, 0, // Skip to: 1612
6222
/* 1585 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1602
6223
/* 1590 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1602
6224
/* 1597 */    MCD_OPC_Decode, 251, 19, 202, 1, // Opcode: VST3d16
6225
/* 1602 */    MCD_OPC_CheckPredicate, 21, 230, 19, 0, // Skip to: 6701
6226
/* 1607 */    MCD_OPC_Decode, 254, 19, 202, 1, // Opcode: VST3d16_UPD
6227
/* 1612 */    MCD_OPC_FilterValue, 4, 220, 19, 0, // Skip to: 6701
6228
/* 1617 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1634
6229
/* 1622 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1634
6230
/* 1629 */    MCD_OPC_Decode, 255, 19, 202, 1, // Opcode: VST3d32
6231
/* 1634 */    MCD_OPC_CheckPredicate, 21, 198, 19, 0, // Skip to: 6701
6232
/* 1639 */    MCD_OPC_Decode, 130, 20, 202, 1, // Opcode: VST3d32_UPD
6233
/* 1644 */    MCD_OPC_FilterValue, 233, 3, 187, 19, 0, // Skip to: 6701
6234
/* 1650 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6235
/* 1653 */    MCD_OPC_FilterValue, 0, 179, 19, 0, // Skip to: 6701
6236
/* 1658 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1675
6237
/* 1663 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1675
6238
/* 1670 */    MCD_OPC_Decode, 215, 18, 192, 1, // Opcode: VST1LNd16
6239
/* 1675 */    MCD_OPC_CheckPredicate, 21, 157, 19, 0, // Skip to: 6701
6240
/* 1680 */    MCD_OPC_Decode, 216, 18, 192, 1, // Opcode: VST1LNd16_UPD
6241
/* 1685 */    MCD_OPC_FilterValue, 2, 147, 19, 0, // Skip to: 6701
6242
/* 1690 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6243
/* 1693 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 1798
6244
/* 1699 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
6245
/* 1702 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 1734
6246
/* 1707 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1724
6247
/* 1712 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1724
6248
/* 1719 */    MCD_OPC_Decode, 182, 12, 202, 1, // Opcode: VLD3d8
6249
/* 1724 */    MCD_OPC_CheckPredicate, 21, 108, 19, 0, // Skip to: 6701
6250
/* 1729 */    MCD_OPC_Decode, 185, 12, 202, 1, // Opcode: VLD3d8_UPD
6251
/* 1734 */    MCD_OPC_FilterValue, 2, 27, 0, 0, // Skip to: 1766
6252
/* 1739 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1756
6253
/* 1744 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1756
6254
/* 1751 */    MCD_OPC_Decode, 174, 12, 202, 1, // Opcode: VLD3d16
6255
/* 1756 */    MCD_OPC_CheckPredicate, 21, 76, 19, 0, // Skip to: 6701
6256
/* 1761 */    MCD_OPC_Decode, 177, 12, 202, 1, // Opcode: VLD3d16_UPD
6257
/* 1766 */    MCD_OPC_FilterValue, 4, 66, 19, 0, // Skip to: 6701
6258
/* 1771 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1788
6259
/* 1776 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1788
6260
/* 1783 */    MCD_OPC_Decode, 178, 12, 202, 1, // Opcode: VLD3d32
6261
/* 1788 */    MCD_OPC_CheckPredicate, 21, 44, 19, 0, // Skip to: 6701
6262
/* 1793 */    MCD_OPC_Decode, 181, 12, 202, 1, // Opcode: VLD3d32_UPD
6263
/* 1798 */    MCD_OPC_FilterValue, 233, 3, 33, 19, 0, // Skip to: 6701
6264
/* 1804 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1821
6265
/* 1809 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1821
6266
/* 1816 */    MCD_OPC_Decode, 218, 10, 193, 1, // Opcode: VLD1LNd16
6267
/* 1821 */    MCD_OPC_CheckPredicate, 21, 11, 19, 0, // Skip to: 6701
6268
/* 1826 */    MCD_OPC_CheckField, 5, 1, 0, 4, 19, 0, // Skip to: 6701
6269
/* 1833 */    MCD_OPC_Decode, 219, 10, 193, 1, // Opcode: VLD1LNd16_UPD
6270
/* 1838 */    MCD_OPC_FilterValue, 5, 137, 1, 0, // Skip to: 2236
6271
/* 1843 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6272
/* 1846 */    MCD_OPC_FilterValue, 0, 39, 1, 0, // Skip to: 2146
6273
/* 1851 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6274
/* 1854 */    MCD_OPC_FilterValue, 0, 141, 0, 0, // Skip to: 2000
6275
/* 1859 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6276
/* 1862 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 1967
6277
/* 1868 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6278
/* 1871 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 1903
6279
/* 1876 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1893
6280
/* 1881 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1893
6281
/* 1888 */    MCD_OPC_Decode, 145, 20, 202, 1, // Opcode: VST3q8
6282
/* 1893 */    MCD_OPC_CheckPredicate, 21, 195, 18, 0, // Skip to: 6701
6283
/* 1898 */    MCD_OPC_Decode, 147, 20, 202, 1, // Opcode: VST3q8_UPD
6284
/* 1903 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 1935
6285
/* 1908 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1925
6286
/* 1913 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1925
6287
/* 1920 */    MCD_OPC_Decode, 135, 20, 202, 1, // Opcode: VST3q16
6288
/* 1925 */    MCD_OPC_CheckPredicate, 21, 163, 18, 0, // Skip to: 6701
6289
/* 1930 */    MCD_OPC_Decode, 137, 20, 202, 1, // Opcode: VST3q16_UPD
6290
/* 1935 */    MCD_OPC_FilterValue, 2, 153, 18, 0, // Skip to: 6701
6291
/* 1940 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1957
6292
/* 1945 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1957
6293
/* 1952 */    MCD_OPC_Decode, 140, 20, 202, 1, // Opcode: VST3q32
6294
/* 1957 */    MCD_OPC_CheckPredicate, 21, 131, 18, 0, // Skip to: 6701
6295
/* 1962 */    MCD_OPC_Decode, 142, 20, 202, 1, // Opcode: VST3q32_UPD
6296
/* 1967 */    MCD_OPC_FilterValue, 233, 3, 120, 18, 0, // Skip to: 6701
6297
/* 1973 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 1990
6298
/* 1978 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 1990
6299
/* 1985 */    MCD_OPC_Decode, 175, 19, 194, 1, // Opcode: VST2LNd16
6300
/* 1990 */    MCD_OPC_CheckPredicate, 21, 98, 18, 0, // Skip to: 6701
6301
/* 1995 */    MCD_OPC_Decode, 178, 19, 194, 1, // Opcode: VST2LNd16_UPD
6302
/* 2000 */    MCD_OPC_FilterValue, 2, 88, 18, 0, // Skip to: 6701
6303
/* 2005 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6304
/* 2008 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 2113
6305
/* 2014 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6306
/* 2017 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 2049
6307
/* 2022 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2039
6308
/* 2027 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2039
6309
/* 2034 */    MCD_OPC_Decode, 196, 12, 202, 1, // Opcode: VLD3q8
6310
/* 2039 */    MCD_OPC_CheckPredicate, 21, 49, 18, 0, // Skip to: 6701
6311
/* 2044 */    MCD_OPC_Decode, 198, 12, 202, 1, // Opcode: VLD3q8_UPD
6312
/* 2049 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 2081
6313
/* 2054 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2071
6314
/* 2059 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2071
6315
/* 2066 */    MCD_OPC_Decode, 186, 12, 202, 1, // Opcode: VLD3q16
6316
/* 2071 */    MCD_OPC_CheckPredicate, 21, 17, 18, 0, // Skip to: 6701
6317
/* 2076 */    MCD_OPC_Decode, 188, 12, 202, 1, // Opcode: VLD3q16_UPD
6318
/* 2081 */    MCD_OPC_FilterValue, 2, 7, 18, 0, // Skip to: 6701
6319
/* 2086 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2103
6320
/* 2091 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2103
6321
/* 2098 */    MCD_OPC_Decode, 191, 12, 202, 1, // Opcode: VLD3q32
6322
/* 2103 */    MCD_OPC_CheckPredicate, 21, 241, 17, 0, // Skip to: 6701
6323
/* 2108 */    MCD_OPC_Decode, 193, 12, 202, 1, // Opcode: VLD3q32_UPD
6324
/* 2113 */    MCD_OPC_FilterValue, 233, 3, 230, 17, 0, // Skip to: 6701
6325
/* 2119 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2136
6326
/* 2124 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2136
6327
/* 2131 */    MCD_OPC_Decode, 202, 11, 195, 1, // Opcode: VLD2LNd16
6328
/* 2136 */    MCD_OPC_CheckPredicate, 21, 208, 17, 0, // Skip to: 6701
6329
/* 2141 */    MCD_OPC_Decode, 205, 11, 195, 1, // Opcode: VLD2LNd16_UPD
6330
/* 2146 */    MCD_OPC_FilterValue, 1, 198, 17, 0, // Skip to: 6701
6331
/* 2151 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6332
/* 2154 */    MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 2195
6333
/* 2159 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6334
/* 2162 */    MCD_OPC_FilterValue, 233, 3, 181, 17, 0, // Skip to: 6701
6335
/* 2168 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2185
6336
/* 2173 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2185
6337
/* 2180 */    MCD_OPC_Decode, 187, 19, 194, 1, // Opcode: VST2LNq16
6338
/* 2185 */    MCD_OPC_CheckPredicate, 21, 159, 17, 0, // Skip to: 6701
6339
/* 2190 */    MCD_OPC_Decode, 190, 19, 194, 1, // Opcode: VST2LNq16_UPD
6340
/* 2195 */    MCD_OPC_FilterValue, 2, 149, 17, 0, // Skip to: 6701
6341
/* 2200 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6342
/* 2203 */    MCD_OPC_FilterValue, 233, 3, 140, 17, 0, // Skip to: 6701
6343
/* 2209 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2226
6344
/* 2214 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2226
6345
/* 2221 */    MCD_OPC_Decode, 214, 11, 195, 1, // Opcode: VLD2LNq16
6346
/* 2226 */    MCD_OPC_CheckPredicate, 21, 118, 17, 0, // Skip to: 6701
6347
/* 2231 */    MCD_OPC_Decode, 217, 11, 195, 1, // Opcode: VLD2LNq16_UPD
6348
/* 2236 */    MCD_OPC_FilterValue, 6, 108, 2, 0, // Skip to: 2861
6349
/* 2241 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6350
/* 2244 */    MCD_OPC_FilterValue, 0, 49, 1, 0, // Skip to: 2554
6351
/* 2249 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6352
/* 2252 */    MCD_OPC_FilterValue, 232, 3, 223, 0, 0, // Skip to: 2481
6353
/* 2258 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6354
/* 2261 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 2316
6355
/* 2266 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6356
/* 2269 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2284
6357
/* 2274 */    MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 2306
6358
/* 2279 */    MCD_OPC_Decode, 143, 19, 196, 1, // Opcode: VST1d8Twb_fixed
6359
/* 2284 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 2306
6360
/* 2289 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2306
6361
/* 2294 */    MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 2306
6362
/* 2301 */    MCD_OPC_Decode, 141, 19, 196, 1, // Opcode: VST1d8T
6363
/* 2306 */    MCD_OPC_CheckPredicate, 21, 38, 17, 0, // Skip to: 6701
6364
/* 2311 */    MCD_OPC_Decode, 144, 19, 196, 1, // Opcode: VST1d8Twb_register
6365
/* 2316 */    MCD_OPC_FilterValue, 1, 50, 0, 0, // Skip to: 2371
6366
/* 2321 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6367
/* 2324 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2339
6368
/* 2329 */    MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 2361
6369
/* 2334 */    MCD_OPC_Decode, 234, 18, 196, 1, // Opcode: VST1d16Twb_fixed
6370
/* 2339 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 2361
6371
/* 2344 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2361
6372
/* 2349 */    MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 2361
6373
/* 2356 */    MCD_OPC_Decode, 232, 18, 196, 1, // Opcode: VST1d16T
6374
/* 2361 */    MCD_OPC_CheckPredicate, 21, 239, 16, 0, // Skip to: 6701
6375
/* 2366 */    MCD_OPC_Decode, 235, 18, 196, 1, // Opcode: VST1d16Twb_register
6376
/* 2371 */    MCD_OPC_FilterValue, 2, 50, 0, 0, // Skip to: 2426
6377
/* 2376 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6378
/* 2379 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2394
6379
/* 2384 */    MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 2416
6380
/* 2389 */    MCD_OPC_Decode, 245, 18, 196, 1, // Opcode: VST1d32Twb_fixed
6381
/* 2394 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 2416
6382
/* 2399 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2416
6383
/* 2404 */    MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 2416
6384
/* 2411 */    MCD_OPC_Decode, 243, 18, 196, 1, // Opcode: VST1d32T
6385
/* 2416 */    MCD_OPC_CheckPredicate, 21, 184, 16, 0, // Skip to: 6701
6386
/* 2421 */    MCD_OPC_Decode, 246, 18, 196, 1, // Opcode: VST1d32Twb_register
6387
/* 2426 */    MCD_OPC_FilterValue, 3, 174, 16, 0, // Skip to: 6701
6388
/* 2431 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6389
/* 2434 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2449
6390
/* 2439 */    MCD_OPC_CheckPredicate, 21, 27, 0, 0, // Skip to: 2471
6391
/* 2444 */    MCD_OPC_Decode, 132, 19, 196, 1, // Opcode: VST1d64Twb_fixed
6392
/* 2449 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 2471
6393
/* 2454 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2471
6394
/* 2459 */    MCD_OPC_CheckField, 5, 1, 0, 5, 0, 0, // Skip to: 2471
6395
/* 2466 */    MCD_OPC_Decode, 128, 19, 196, 1, // Opcode: VST1d64T
6396
/* 2471 */    MCD_OPC_CheckPredicate, 21, 129, 16, 0, // Skip to: 6701
6397
/* 2476 */    MCD_OPC_Decode, 133, 19, 196, 1, // Opcode: VST1d64Twb_register
6398
/* 2481 */    MCD_OPC_FilterValue, 233, 3, 118, 16, 0, // Skip to: 6701
6399
/* 2487 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
6400
/* 2490 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 2522
6401
/* 2495 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2512
6402
/* 2500 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2512
6403
/* 2507 */    MCD_OPC_Decode, 231, 19, 197, 1, // Opcode: VST3LNd16
6404
/* 2512 */    MCD_OPC_CheckPredicate, 21, 88, 16, 0, // Skip to: 6701
6405
/* 2517 */    MCD_OPC_Decode, 234, 19, 197, 1, // Opcode: VST3LNd16_UPD
6406
/* 2522 */    MCD_OPC_FilterValue, 2, 78, 16, 0, // Skip to: 6701
6407
/* 2527 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2544
6408
/* 2532 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2544
6409
/* 2539 */    MCD_OPC_Decode, 243, 19, 197, 1, // Opcode: VST3LNq16
6410
/* 2544 */    MCD_OPC_CheckPredicate, 21, 56, 16, 0, // Skip to: 6701
6411
/* 2549 */    MCD_OPC_Decode, 246, 19, 197, 1, // Opcode: VST3LNq16_UPD
6412
/* 2554 */    MCD_OPC_FilterValue, 2, 46, 16, 0, // Skip to: 6701
6413
/* 2559 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6414
/* 2562 */    MCD_OPC_FilterValue, 0, 245, 0, 0, // Skip to: 2812
6415
/* 2567 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6416
/* 2570 */    MCD_OPC_FilterValue, 232, 3, 195, 0, 0, // Skip to: 2771
6417
/* 2576 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6418
/* 2579 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 2627
6419
/* 2584 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6420
/* 2587 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2602
6421
/* 2592 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2617
6422
/* 2597 */    MCD_OPC_Decode, 146, 11, 196, 1, // Opcode: VLD1d8Twb_fixed
6423
/* 2602 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2617
6424
/* 2607 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2617
6425
/* 2612 */    MCD_OPC_Decode, 144, 11, 196, 1, // Opcode: VLD1d8T
6426
/* 2617 */    MCD_OPC_CheckPredicate, 21, 239, 15, 0, // Skip to: 6701
6427
/* 2622 */    MCD_OPC_Decode, 147, 11, 196, 1, // Opcode: VLD1d8Twb_register
6428
/* 2627 */    MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 2675
6429
/* 2632 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6430
/* 2635 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2650
6431
/* 2640 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2665
6432
/* 2645 */    MCD_OPC_Decode, 237, 10, 196, 1, // Opcode: VLD1d16Twb_fixed
6433
/* 2650 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2665
6434
/* 2655 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2665
6435
/* 2660 */    MCD_OPC_Decode, 235, 10, 196, 1, // Opcode: VLD1d16T
6436
/* 2665 */    MCD_OPC_CheckPredicate, 21, 191, 15, 0, // Skip to: 6701
6437
/* 2670 */    MCD_OPC_Decode, 238, 10, 196, 1, // Opcode: VLD1d16Twb_register
6438
/* 2675 */    MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 2723
6439
/* 2680 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6440
/* 2683 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2698
6441
/* 2688 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2713
6442
/* 2693 */    MCD_OPC_Decode, 248, 10, 196, 1, // Opcode: VLD1d32Twb_fixed
6443
/* 2698 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2713
6444
/* 2703 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2713
6445
/* 2708 */    MCD_OPC_Decode, 246, 10, 196, 1, // Opcode: VLD1d32T
6446
/* 2713 */    MCD_OPC_CheckPredicate, 21, 143, 15, 0, // Skip to: 6701
6447
/* 2718 */    MCD_OPC_Decode, 249, 10, 196, 1, // Opcode: VLD1d32Twb_register
6448
/* 2723 */    MCD_OPC_FilterValue, 3, 133, 15, 0, // Skip to: 6701
6449
/* 2728 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6450
/* 2731 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2746
6451
/* 2736 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2761
6452
/* 2741 */    MCD_OPC_Decode, 135, 11, 196, 1, // Opcode: VLD1d64Twb_fixed
6453
/* 2746 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2761
6454
/* 2751 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2761
6455
/* 2756 */    MCD_OPC_Decode, 131, 11, 196, 1, // Opcode: VLD1d64T
6456
/* 2761 */    MCD_OPC_CheckPredicate, 21, 95, 15, 0, // Skip to: 6701
6457
/* 2766 */    MCD_OPC_Decode, 136, 11, 196, 1, // Opcode: VLD1d64Twb_register
6458
/* 2771 */    MCD_OPC_FilterValue, 233, 3, 84, 15, 0, // Skip to: 6701
6459
/* 2777 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
6460
/* 2780 */    MCD_OPC_FilterValue, 0, 76, 15, 0, // Skip to: 6701
6461
/* 2785 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2802
6462
/* 2790 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2802
6463
/* 2797 */    MCD_OPC_Decode, 154, 12, 198, 1, // Opcode: VLD3LNd16
6464
/* 2802 */    MCD_OPC_CheckPredicate, 21, 54, 15, 0, // Skip to: 6701
6465
/* 2807 */    MCD_OPC_Decode, 157, 12, 198, 1, // Opcode: VLD3LNd16_UPD
6466
/* 2812 */    MCD_OPC_FilterValue, 1, 44, 15, 0, // Skip to: 6701
6467
/* 2817 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
6468
/* 2820 */    MCD_OPC_FilterValue, 0, 36, 15, 0, // Skip to: 6701
6469
/* 2825 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6470
/* 2828 */    MCD_OPC_FilterValue, 233, 3, 27, 15, 0, // Skip to: 6701
6471
/* 2834 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 2851
6472
/* 2839 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 2851
6473
/* 2846 */    MCD_OPC_Decode, 166, 12, 198, 1, // Opcode: VLD3LNq16
6474
/* 2851 */    MCD_OPC_CheckPredicate, 21, 5, 15, 0, // Skip to: 6701
6475
/* 2856 */    MCD_OPC_Decode, 169, 12, 198, 1, // Opcode: VLD3LNq16_UPD
6476
/* 2861 */    MCD_OPC_FilterValue, 7, 73, 2, 0, // Skip to: 3451
6477
/* 2866 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6478
/* 2869 */    MCD_OPC_FilterValue, 0, 231, 1, 0, // Skip to: 3361
6479
/* 2874 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6480
/* 2877 */    MCD_OPC_FilterValue, 0, 237, 0, 0, // Skip to: 3119
6481
/* 2882 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6482
/* 2885 */    MCD_OPC_FilterValue, 232, 3, 195, 0, 0, // Skip to: 3086
6483
/* 2891 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6484
/* 2894 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 2942
6485
/* 2899 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6486
/* 2902 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2917
6487
/* 2907 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2932
6488
/* 2912 */    MCD_OPC_Decode, 145, 19, 196, 1, // Opcode: VST1d8wb_fixed
6489
/* 2917 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2932
6490
/* 2922 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2932
6491
/* 2927 */    MCD_OPC_Decode, 136, 19, 196, 1, // Opcode: VST1d8
6492
/* 2932 */    MCD_OPC_CheckPredicate, 21, 180, 14, 0, // Skip to: 6701
6493
/* 2937 */    MCD_OPC_Decode, 146, 19, 196, 1, // Opcode: VST1d8wb_register
6494
/* 2942 */    MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 2990
6495
/* 2947 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6496
/* 2950 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2965
6497
/* 2955 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 2980
6498
/* 2960 */    MCD_OPC_Decode, 236, 18, 196, 1, // Opcode: VST1d16wb_fixed
6499
/* 2965 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2980
6500
/* 2970 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 2980
6501
/* 2975 */    MCD_OPC_Decode, 227, 18, 196, 1, // Opcode: VST1d16
6502
/* 2980 */    MCD_OPC_CheckPredicate, 21, 132, 14, 0, // Skip to: 6701
6503
/* 2985 */    MCD_OPC_Decode, 237, 18, 196, 1, // Opcode: VST1d16wb_register
6504
/* 2990 */    MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 3038
6505
/* 2995 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6506
/* 2998 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3013
6507
/* 3003 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3028
6508
/* 3008 */    MCD_OPC_Decode, 247, 18, 196, 1, // Opcode: VST1d32wb_fixed
6509
/* 3013 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3028
6510
/* 3018 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3028
6511
/* 3023 */    MCD_OPC_Decode, 238, 18, 196, 1, // Opcode: VST1d32
6512
/* 3028 */    MCD_OPC_CheckPredicate, 21, 84, 14, 0, // Skip to: 6701
6513
/* 3033 */    MCD_OPC_Decode, 248, 18, 196, 1, // Opcode: VST1d32wb_register
6514
/* 3038 */    MCD_OPC_FilterValue, 3, 74, 14, 0, // Skip to: 6701
6515
/* 3043 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6516
/* 3046 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3061
6517
/* 3051 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3076
6518
/* 3056 */    MCD_OPC_Decode, 134, 19, 196, 1, // Opcode: VST1d64wb_fixed
6519
/* 3061 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3076
6520
/* 3066 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3076
6521
/* 3071 */    MCD_OPC_Decode, 249, 18, 196, 1, // Opcode: VST1d64
6522
/* 3076 */    MCD_OPC_CheckPredicate, 21, 36, 14, 0, // Skip to: 6701
6523
/* 3081 */    MCD_OPC_Decode, 135, 19, 196, 1, // Opcode: VST1d64wb_register
6524
/* 3086 */    MCD_OPC_FilterValue, 233, 3, 25, 14, 0, // Skip to: 6701
6525
/* 3092 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3109
6526
/* 3097 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3109
6527
/* 3104 */    MCD_OPC_Decode, 150, 20, 200, 1, // Opcode: VST4LNd16
6528
/* 3109 */    MCD_OPC_CheckPredicate, 21, 3, 14, 0, // Skip to: 6701
6529
/* 3114 */    MCD_OPC_Decode, 153, 20, 200, 1, // Opcode: VST4LNd16_UPD
6530
/* 3119 */    MCD_OPC_FilterValue, 2, 249, 13, 0, // Skip to: 6701
6531
/* 3124 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6532
/* 3127 */    MCD_OPC_FilterValue, 232, 3, 195, 0, 0, // Skip to: 3328
6533
/* 3133 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6534
/* 3136 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 3184
6535
/* 3141 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6536
/* 3144 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3159
6537
/* 3149 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3174
6538
/* 3154 */    MCD_OPC_Decode, 148, 11, 196, 1, // Opcode: VLD1d8wb_fixed
6539
/* 3159 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3174
6540
/* 3164 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3174
6541
/* 3169 */    MCD_OPC_Decode, 139, 11, 196, 1, // Opcode: VLD1d8
6542
/* 3174 */    MCD_OPC_CheckPredicate, 21, 194, 13, 0, // Skip to: 6701
6543
/* 3179 */    MCD_OPC_Decode, 149, 11, 196, 1, // Opcode: VLD1d8wb_register
6544
/* 3184 */    MCD_OPC_FilterValue, 1, 43, 0, 0, // Skip to: 3232
6545
/* 3189 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6546
/* 3192 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3207
6547
/* 3197 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3222
6548
/* 3202 */    MCD_OPC_Decode, 239, 10, 196, 1, // Opcode: VLD1d16wb_fixed
6549
/* 3207 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3222
6550
/* 3212 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3222
6551
/* 3217 */    MCD_OPC_Decode, 230, 10, 196, 1, // Opcode: VLD1d16
6552
/* 3222 */    MCD_OPC_CheckPredicate, 21, 146, 13, 0, // Skip to: 6701
6553
/* 3227 */    MCD_OPC_Decode, 240, 10, 196, 1, // Opcode: VLD1d16wb_register
6554
/* 3232 */    MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 3280
6555
/* 3237 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6556
/* 3240 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3255
6557
/* 3245 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3270
6558
/* 3250 */    MCD_OPC_Decode, 250, 10, 196, 1, // Opcode: VLD1d32wb_fixed
6559
/* 3255 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3270
6560
/* 3260 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3270
6561
/* 3265 */    MCD_OPC_Decode, 241, 10, 196, 1, // Opcode: VLD1d32
6562
/* 3270 */    MCD_OPC_CheckPredicate, 21, 98, 13, 0, // Skip to: 6701
6563
/* 3275 */    MCD_OPC_Decode, 251, 10, 196, 1, // Opcode: VLD1d32wb_register
6564
/* 3280 */    MCD_OPC_FilterValue, 3, 88, 13, 0, // Skip to: 6701
6565
/* 3285 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6566
/* 3288 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3303
6567
/* 3293 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3318
6568
/* 3298 */    MCD_OPC_Decode, 137, 11, 196, 1, // Opcode: VLD1d64wb_fixed
6569
/* 3303 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3318
6570
/* 3308 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3318
6571
/* 3313 */    MCD_OPC_Decode, 252, 10, 196, 1, // Opcode: VLD1d64
6572
/* 3318 */    MCD_OPC_CheckPredicate, 21, 50, 13, 0, // Skip to: 6701
6573
/* 3323 */    MCD_OPC_Decode, 138, 11, 196, 1, // Opcode: VLD1d64wb_register
6574
/* 3328 */    MCD_OPC_FilterValue, 233, 3, 39, 13, 0, // Skip to: 6701
6575
/* 3334 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3351
6576
/* 3339 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3351
6577
/* 3346 */    MCD_OPC_Decode, 225, 12, 201, 1, // Opcode: VLD4LNd16
6578
/* 3351 */    MCD_OPC_CheckPredicate, 21, 17, 13, 0, // Skip to: 6701
6579
/* 3356 */    MCD_OPC_Decode, 228, 12, 201, 1, // Opcode: VLD4LNd16_UPD
6580
/* 3361 */    MCD_OPC_FilterValue, 1, 7, 13, 0, // Skip to: 6701
6581
/* 3366 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6582
/* 3369 */    MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 3410
6583
/* 3374 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6584
/* 3377 */    MCD_OPC_FilterValue, 233, 3, 246, 12, 0, // Skip to: 6701
6585
/* 3383 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3400
6586
/* 3388 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3400
6587
/* 3395 */    MCD_OPC_Decode, 162, 20, 200, 1, // Opcode: VST4LNq16
6588
/* 3400 */    MCD_OPC_CheckPredicate, 21, 224, 12, 0, // Skip to: 6701
6589
/* 3405 */    MCD_OPC_Decode, 165, 20, 200, 1, // Opcode: VST4LNq16_UPD
6590
/* 3410 */    MCD_OPC_FilterValue, 2, 214, 12, 0, // Skip to: 6701
6591
/* 3415 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6592
/* 3418 */    MCD_OPC_FilterValue, 233, 3, 205, 12, 0, // Skip to: 6701
6593
/* 3424 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3441
6594
/* 3429 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3441
6595
/* 3436 */    MCD_OPC_Decode, 237, 12, 201, 1, // Opcode: VLD4LNq16
6596
/* 3441 */    MCD_OPC_CheckPredicate, 21, 183, 12, 0, // Skip to: 6701
6597
/* 3446 */    MCD_OPC_Decode, 240, 12, 201, 1, // Opcode: VLD4LNq16_UPD
6598
/* 3451 */    MCD_OPC_FilterValue, 8, 185, 1, 0, // Skip to: 3897
6599
/* 3456 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
6600
/* 3459 */    MCD_OPC_FilterValue, 0, 39, 1, 0, // Skip to: 3759
6601
/* 3464 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6602
/* 3467 */    MCD_OPC_FilterValue, 0, 141, 0, 0, // Skip to: 3613
6603
/* 3472 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6604
/* 3475 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 3580
6605
/* 3481 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6606
/* 3484 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 3532
6607
/* 3489 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6608
/* 3492 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3507
6609
/* 3497 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3522
6610
/* 3502 */    MCD_OPC_Decode, 211, 19, 199, 1, // Opcode: VST2d8wb_fixed
6611
/* 3507 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3522
6612
/* 3512 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3522
6613
/* 3517 */    MCD_OPC_Decode, 210, 19, 199, 1, // Opcode: VST2d8
6614
/* 3522 */    MCD_OPC_CheckPredicate, 21, 102, 12, 0, // Skip to: 6701
6615
/* 3527 */    MCD_OPC_Decode, 212, 19, 199, 1, // Opcode: VST2d8wb_register
6616
/* 3532 */    MCD_OPC_FilterValue, 1, 92, 12, 0, // Skip to: 6701
6617
/* 3537 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6618
/* 3540 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3555
6619
/* 3545 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3570
6620
/* 3550 */    MCD_OPC_Decode, 208, 19, 199, 1, // Opcode: VST2d32wb_fixed
6621
/* 3555 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3570
6622
/* 3560 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3570
6623
/* 3565 */    MCD_OPC_Decode, 207, 19, 199, 1, // Opcode: VST2d32
6624
/* 3570 */    MCD_OPC_CheckPredicate, 21, 54, 12, 0, // Skip to: 6701
6625
/* 3575 */    MCD_OPC_Decode, 209, 19, 199, 1, // Opcode: VST2d32wb_register
6626
/* 3580 */    MCD_OPC_FilterValue, 233, 3, 43, 12, 0, // Skip to: 6701
6627
/* 3586 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3603
6628
/* 3591 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3603
6629
/* 3598 */    MCD_OPC_Decode, 217, 18, 192, 1, // Opcode: VST1LNd32
6630
/* 3603 */    MCD_OPC_CheckPredicate, 21, 21, 12, 0, // Skip to: 6701
6631
/* 3608 */    MCD_OPC_Decode, 218, 18, 192, 1, // Opcode: VST1LNd32_UPD
6632
/* 3613 */    MCD_OPC_FilterValue, 2, 11, 12, 0, // Skip to: 6701
6633
/* 3618 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6634
/* 3621 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 3726
6635
/* 3627 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6636
/* 3630 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 3678
6637
/* 3635 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6638
/* 3638 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3653
6639
/* 3643 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3668
6640
/* 3648 */    MCD_OPC_Decode, 238, 11, 199, 1, // Opcode: VLD2d8wb_fixed
6641
/* 3653 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3668
6642
/* 3658 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3668
6643
/* 3663 */    MCD_OPC_Decode, 237, 11, 199, 1, // Opcode: VLD2d8
6644
/* 3668 */    MCD_OPC_CheckPredicate, 21, 212, 11, 0, // Skip to: 6701
6645
/* 3673 */    MCD_OPC_Decode, 239, 11, 199, 1, // Opcode: VLD2d8wb_register
6646
/* 3678 */    MCD_OPC_FilterValue, 1, 202, 11, 0, // Skip to: 6701
6647
/* 3683 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6648
/* 3686 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3701
6649
/* 3691 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3716
6650
/* 3696 */    MCD_OPC_Decode, 235, 11, 199, 1, // Opcode: VLD2d32wb_fixed
6651
/* 3701 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3716
6652
/* 3706 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3716
6653
/* 3711 */    MCD_OPC_Decode, 234, 11, 199, 1, // Opcode: VLD2d32
6654
/* 3716 */    MCD_OPC_CheckPredicate, 21, 164, 11, 0, // Skip to: 6701
6655
/* 3721 */    MCD_OPC_Decode, 236, 11, 199, 1, // Opcode: VLD2d32wb_register
6656
/* 3726 */    MCD_OPC_FilterValue, 233, 3, 153, 11, 0, // Skip to: 6701
6657
/* 3732 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 3749
6658
/* 3737 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 3749
6659
/* 3744 */    MCD_OPC_Decode, 220, 10, 193, 1, // Opcode: VLD1LNd32
6660
/* 3749 */    MCD_OPC_CheckPredicate, 21, 131, 11, 0, // Skip to: 6701
6661
/* 3754 */    MCD_OPC_Decode, 221, 10, 193, 1, // Opcode: VLD1LNd32_UPD
6662
/* 3759 */    MCD_OPC_FilterValue, 1, 121, 11, 0, // Skip to: 6701
6663
/* 3764 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6664
/* 3767 */    MCD_OPC_FilterValue, 0, 60, 0, 0, // Skip to: 3832
6665
/* 3772 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6666
/* 3775 */    MCD_OPC_FilterValue, 0, 105, 11, 0, // Skip to: 6701
6667
/* 3780 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6668
/* 3783 */    MCD_OPC_FilterValue, 232, 3, 96, 11, 0, // Skip to: 6701
6669
/* 3789 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6670
/* 3792 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3807
6671
/* 3797 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3822
6672
/* 3802 */    MCD_OPC_Decode, 205, 19, 199, 1, // Opcode: VST2d16wb_fixed
6673
/* 3807 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3822
6674
/* 3812 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3822
6675
/* 3817 */    MCD_OPC_Decode, 204, 19, 199, 1, // Opcode: VST2d16
6676
/* 3822 */    MCD_OPC_CheckPredicate, 21, 58, 11, 0, // Skip to: 6701
6677
/* 3827 */    MCD_OPC_Decode, 206, 19, 199, 1, // Opcode: VST2d16wb_register
6678
/* 3832 */    MCD_OPC_FilterValue, 2, 48, 11, 0, // Skip to: 6701
6679
/* 3837 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6680
/* 3840 */    MCD_OPC_FilterValue, 0, 40, 11, 0, // Skip to: 6701
6681
/* 3845 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6682
/* 3848 */    MCD_OPC_FilterValue, 232, 3, 31, 11, 0, // Skip to: 6701
6683
/* 3854 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6684
/* 3857 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3872
6685
/* 3862 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3887
6686
/* 3867 */    MCD_OPC_Decode, 232, 11, 199, 1, // Opcode: VLD2d16wb_fixed
6687
/* 3872 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3887
6688
/* 3877 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3887
6689
/* 3882 */    MCD_OPC_Decode, 231, 11, 199, 1, // Opcode: VLD2d16
6690
/* 3887 */    MCD_OPC_CheckPredicate, 21, 249, 10, 0, // Skip to: 6701
6691
/* 3892 */    MCD_OPC_Decode, 233, 11, 199, 1, // Opcode: VLD2d16wb_register
6692
/* 3897 */    MCD_OPC_FilterValue, 9, 27, 2, 0, // Skip to: 4441
6693
/* 3902 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
6694
/* 3905 */    MCD_OPC_FilterValue, 0, 55, 1, 0, // Skip to: 4221
6695
/* 3910 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6696
/* 3913 */    MCD_OPC_FilterValue, 0, 149, 0, 0, // Skip to: 4067
6697
/* 3918 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6698
/* 3921 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 4026
6699
/* 3927 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6700
/* 3930 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 3978
6701
/* 3935 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6702
/* 3938 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 3953
6703
/* 3943 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 3968
6704
/* 3948 */    MCD_OPC_Decode, 202, 19, 199, 1, // Opcode: VST2b8wb_fixed
6705
/* 3953 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 3968
6706
/* 3958 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 3968
6707
/* 3963 */    MCD_OPC_Decode, 201, 19, 199, 1, // Opcode: VST2b8
6708
/* 3968 */    MCD_OPC_CheckPredicate, 21, 168, 10, 0, // Skip to: 6701
6709
/* 3973 */    MCD_OPC_Decode, 203, 19, 199, 1, // Opcode: VST2b8wb_register
6710
/* 3978 */    MCD_OPC_FilterValue, 1, 158, 10, 0, // Skip to: 6701
6711
/* 3983 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6712
/* 3986 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4001
6713
/* 3991 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4016
6714
/* 3996 */    MCD_OPC_Decode, 199, 19, 199, 1, // Opcode: VST2b32wb_fixed
6715
/* 4001 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4016
6716
/* 4006 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4016
6717
/* 4011 */    MCD_OPC_Decode, 198, 19, 199, 1, // Opcode: VST2b32
6718
/* 4016 */    MCD_OPC_CheckPredicate, 21, 120, 10, 0, // Skip to: 6701
6719
/* 4021 */    MCD_OPC_Decode, 200, 19, 199, 1, // Opcode: VST2b32wb_register
6720
/* 4026 */    MCD_OPC_FilterValue, 233, 3, 109, 10, 0, // Skip to: 6701
6721
/* 4032 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6722
/* 4035 */    MCD_OPC_FilterValue, 0, 101, 10, 0, // Skip to: 6701
6723
/* 4040 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4057
6724
/* 4045 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4057
6725
/* 4052 */    MCD_OPC_Decode, 179, 19, 194, 1, // Opcode: VST2LNd32
6726
/* 4057 */    MCD_OPC_CheckPredicate, 21, 79, 10, 0, // Skip to: 6701
6727
/* 4062 */    MCD_OPC_Decode, 182, 19, 194, 1, // Opcode: VST2LNd32_UPD
6728
/* 4067 */    MCD_OPC_FilterValue, 2, 69, 10, 0, // Skip to: 6701
6729
/* 4072 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6730
/* 4075 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 4180
6731
/* 4081 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6732
/* 4084 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 4132
6733
/* 4089 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6734
/* 4092 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4107
6735
/* 4097 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4122
6736
/* 4102 */    MCD_OPC_Decode, 229, 11, 199, 1, // Opcode: VLD2b8wb_fixed
6737
/* 4107 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4122
6738
/* 4112 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4122
6739
/* 4117 */    MCD_OPC_Decode, 228, 11, 199, 1, // Opcode: VLD2b8
6740
/* 4122 */    MCD_OPC_CheckPredicate, 21, 14, 10, 0, // Skip to: 6701
6741
/* 4127 */    MCD_OPC_Decode, 230, 11, 199, 1, // Opcode: VLD2b8wb_register
6742
/* 4132 */    MCD_OPC_FilterValue, 1, 4, 10, 0, // Skip to: 6701
6743
/* 4137 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6744
/* 4140 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4155
6745
/* 4145 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4170
6746
/* 4150 */    MCD_OPC_Decode, 226, 11, 199, 1, // Opcode: VLD2b32wb_fixed
6747
/* 4155 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4170
6748
/* 4160 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4170
6749
/* 4165 */    MCD_OPC_Decode, 225, 11, 199, 1, // Opcode: VLD2b32
6750
/* 4170 */    MCD_OPC_CheckPredicate, 21, 222, 9, 0, // Skip to: 6701
6751
/* 4175 */    MCD_OPC_Decode, 227, 11, 199, 1, // Opcode: VLD2b32wb_register
6752
/* 4180 */    MCD_OPC_FilterValue, 233, 3, 211, 9, 0, // Skip to: 6701
6753
/* 4186 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6754
/* 4189 */    MCD_OPC_FilterValue, 0, 203, 9, 0, // Skip to: 6701
6755
/* 4194 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4211
6756
/* 4199 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4211
6757
/* 4206 */    MCD_OPC_Decode, 206, 11, 195, 1, // Opcode: VLD2LNd32
6758
/* 4211 */    MCD_OPC_CheckPredicate, 21, 181, 9, 0, // Skip to: 6701
6759
/* 4216 */    MCD_OPC_Decode, 209, 11, 195, 1, // Opcode: VLD2LNd32_UPD
6760
/* 4221 */    MCD_OPC_FilterValue, 1, 171, 9, 0, // Skip to: 6701
6761
/* 4226 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6762
/* 4229 */    MCD_OPC_FilterValue, 0, 101, 0, 0, // Skip to: 4335
6763
/* 4234 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6764
/* 4237 */    MCD_OPC_FilterValue, 232, 3, 51, 0, 0, // Skip to: 4294
6765
/* 4243 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6766
/* 4246 */    MCD_OPC_FilterValue, 0, 146, 9, 0, // Skip to: 6701
6767
/* 4251 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6768
/* 4254 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4269
6769
/* 4259 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4284
6770
/* 4264 */    MCD_OPC_Decode, 196, 19, 199, 1, // Opcode: VST2b16wb_fixed
6771
/* 4269 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4284
6772
/* 4274 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4284
6773
/* 4279 */    MCD_OPC_Decode, 195, 19, 199, 1, // Opcode: VST2b16
6774
/* 4284 */    MCD_OPC_CheckPredicate, 21, 108, 9, 0, // Skip to: 6701
6775
/* 4289 */    MCD_OPC_Decode, 197, 19, 199, 1, // Opcode: VST2b16wb_register
6776
/* 4294 */    MCD_OPC_FilterValue, 233, 3, 97, 9, 0, // Skip to: 6701
6777
/* 4300 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6778
/* 4303 */    MCD_OPC_FilterValue, 0, 89, 9, 0, // Skip to: 6701
6779
/* 4308 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4325
6780
/* 4313 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4325
6781
/* 4320 */    MCD_OPC_Decode, 191, 19, 194, 1, // Opcode: VST2LNq32
6782
/* 4325 */    MCD_OPC_CheckPredicate, 21, 67, 9, 0, // Skip to: 6701
6783
/* 4330 */    MCD_OPC_Decode, 194, 19, 194, 1, // Opcode: VST2LNq32_UPD
6784
/* 4335 */    MCD_OPC_FilterValue, 2, 57, 9, 0, // Skip to: 6701
6785
/* 4340 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6786
/* 4343 */    MCD_OPC_FilterValue, 232, 3, 51, 0, 0, // Skip to: 4400
6787
/* 4349 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6788
/* 4352 */    MCD_OPC_FilterValue, 0, 40, 9, 0, // Skip to: 6701
6789
/* 4357 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6790
/* 4360 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4375
6791
/* 4365 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4390
6792
/* 4370 */    MCD_OPC_Decode, 223, 11, 199, 1, // Opcode: VLD2b16wb_fixed
6793
/* 4375 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4390
6794
/* 4380 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4390
6795
/* 4385 */    MCD_OPC_Decode, 222, 11, 199, 1, // Opcode: VLD2b16
6796
/* 4390 */    MCD_OPC_CheckPredicate, 21, 2, 9, 0, // Skip to: 6701
6797
/* 4395 */    MCD_OPC_Decode, 224, 11, 199, 1, // Opcode: VLD2b16wb_register
6798
/* 4400 */    MCD_OPC_FilterValue, 233, 3, 247, 8, 0, // Skip to: 6701
6799
/* 4406 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
6800
/* 4409 */    MCD_OPC_FilterValue, 0, 239, 8, 0, // Skip to: 6701
6801
/* 4414 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4431
6802
/* 4419 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4431
6803
/* 4426 */    MCD_OPC_Decode, 218, 11, 195, 1, // Opcode: VLD2LNq32
6804
/* 4431 */    MCD_OPC_CheckPredicate, 21, 217, 8, 0, // Skip to: 6701
6805
/* 4436 */    MCD_OPC_Decode, 221, 11, 195, 1, // Opcode: VLD2LNq32_UPD
6806
/* 4441 */    MCD_OPC_FilterValue, 10, 123, 2, 0, // Skip to: 5081
6807
/* 4446 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
6808
/* 4449 */    MCD_OPC_FilterValue, 0, 55, 1, 0, // Skip to: 4765
6809
/* 4454 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6810
/* 4457 */    MCD_OPC_FilterValue, 0, 149, 0, 0, // Skip to: 4611
6811
/* 4462 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6812
/* 4465 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 4570
6813
/* 4471 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6814
/* 4474 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 4522
6815
/* 4479 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6816
/* 4482 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4497
6817
/* 4487 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4512
6818
/* 4492 */    MCD_OPC_Decode, 173, 19, 196, 1, // Opcode: VST1q8wb_fixed
6819
/* 4497 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4512
6820
/* 4502 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4512
6821
/* 4507 */    MCD_OPC_Decode, 168, 19, 196, 1, // Opcode: VST1q8
6822
/* 4512 */    MCD_OPC_CheckPredicate, 21, 136, 8, 0, // Skip to: 6701
6823
/* 4517 */    MCD_OPC_Decode, 174, 19, 196, 1, // Opcode: VST1q8wb_register
6824
/* 4522 */    MCD_OPC_FilterValue, 1, 126, 8, 0, // Skip to: 6701
6825
/* 4527 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6826
/* 4530 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4545
6827
/* 4535 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4560
6828
/* 4540 */    MCD_OPC_Decode, 159, 19, 196, 1, // Opcode: VST1q32wb_fixed
6829
/* 4545 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4560
6830
/* 4550 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4560
6831
/* 4555 */    MCD_OPC_Decode, 154, 19, 196, 1, // Opcode: VST1q32
6832
/* 4560 */    MCD_OPC_CheckPredicate, 21, 88, 8, 0, // Skip to: 6701
6833
/* 4565 */    MCD_OPC_Decode, 160, 19, 196, 1, // Opcode: VST1q32wb_register
6834
/* 4570 */    MCD_OPC_FilterValue, 233, 3, 77, 8, 0, // Skip to: 6701
6835
/* 4576 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
6836
/* 4579 */    MCD_OPC_FilterValue, 0, 69, 8, 0, // Skip to: 6701
6837
/* 4584 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4601
6838
/* 4589 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4601
6839
/* 4596 */    MCD_OPC_Decode, 235, 19, 197, 1, // Opcode: VST3LNd32
6840
/* 4601 */    MCD_OPC_CheckPredicate, 21, 47, 8, 0, // Skip to: 6701
6841
/* 4606 */    MCD_OPC_Decode, 238, 19, 197, 1, // Opcode: VST3LNd32_UPD
6842
/* 4611 */    MCD_OPC_FilterValue, 2, 37, 8, 0, // Skip to: 6701
6843
/* 4616 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6844
/* 4619 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 4724
6845
/* 4625 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6846
/* 4628 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 4676
6847
/* 4633 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6848
/* 4636 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4651
6849
/* 4641 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4666
6850
/* 4646 */    MCD_OPC_Decode, 176, 11, 196, 1, // Opcode: VLD1q8wb_fixed
6851
/* 4651 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4666
6852
/* 4656 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4666
6853
/* 4661 */    MCD_OPC_Decode, 171, 11, 196, 1, // Opcode: VLD1q8
6854
/* 4666 */    MCD_OPC_CheckPredicate, 21, 238, 7, 0, // Skip to: 6701
6855
/* 4671 */    MCD_OPC_Decode, 177, 11, 196, 1, // Opcode: VLD1q8wb_register
6856
/* 4676 */    MCD_OPC_FilterValue, 1, 228, 7, 0, // Skip to: 6701
6857
/* 4681 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6858
/* 4684 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4699
6859
/* 4689 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4714
6860
/* 4694 */    MCD_OPC_Decode, 162, 11, 196, 1, // Opcode: VLD1q32wb_fixed
6861
/* 4699 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4714
6862
/* 4704 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4714
6863
/* 4709 */    MCD_OPC_Decode, 157, 11, 196, 1, // Opcode: VLD1q32
6864
/* 4714 */    MCD_OPC_CheckPredicate, 21, 190, 7, 0, // Skip to: 6701
6865
/* 4719 */    MCD_OPC_Decode, 163, 11, 196, 1, // Opcode: VLD1q32wb_register
6866
/* 4724 */    MCD_OPC_FilterValue, 233, 3, 179, 7, 0, // Skip to: 6701
6867
/* 4730 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
6868
/* 4733 */    MCD_OPC_FilterValue, 0, 171, 7, 0, // Skip to: 6701
6869
/* 4738 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4755
6870
/* 4743 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4755
6871
/* 4750 */    MCD_OPC_Decode, 158, 12, 198, 1, // Opcode: VLD3LNd32
6872
/* 4755 */    MCD_OPC_CheckPredicate, 21, 149, 7, 0, // Skip to: 6701
6873
/* 4760 */    MCD_OPC_Decode, 161, 12, 198, 1, // Opcode: VLD3LNd32_UPD
6874
/* 4765 */    MCD_OPC_FilterValue, 1, 139, 7, 0, // Skip to: 6701
6875
/* 4770 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6876
/* 4773 */    MCD_OPC_FilterValue, 0, 149, 0, 0, // Skip to: 4927
6877
/* 4778 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6878
/* 4781 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 4886
6879
/* 4787 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6880
/* 4790 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 4838
6881
/* 4795 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6882
/* 4798 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4813
6883
/* 4803 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4828
6884
/* 4808 */    MCD_OPC_Decode, 152, 19, 196, 1, // Opcode: VST1q16wb_fixed
6885
/* 4813 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4828
6886
/* 4818 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4828
6887
/* 4823 */    MCD_OPC_Decode, 147, 19, 196, 1, // Opcode: VST1q16
6888
/* 4828 */    MCD_OPC_CheckPredicate, 21, 76, 7, 0, // Skip to: 6701
6889
/* 4833 */    MCD_OPC_Decode, 153, 19, 196, 1, // Opcode: VST1q16wb_register
6890
/* 4838 */    MCD_OPC_FilterValue, 1, 66, 7, 0, // Skip to: 6701
6891
/* 4843 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6892
/* 4846 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4861
6893
/* 4851 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4876
6894
/* 4856 */    MCD_OPC_Decode, 166, 19, 196, 1, // Opcode: VST1q64wb_fixed
6895
/* 4861 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4876
6896
/* 4866 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4876
6897
/* 4871 */    MCD_OPC_Decode, 161, 19, 196, 1, // Opcode: VST1q64
6898
/* 4876 */    MCD_OPC_CheckPredicate, 21, 28, 7, 0, // Skip to: 6701
6899
/* 4881 */    MCD_OPC_Decode, 167, 19, 196, 1, // Opcode: VST1q64wb_register
6900
/* 4886 */    MCD_OPC_FilterValue, 233, 3, 17, 7, 0, // Skip to: 6701
6901
/* 4892 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
6902
/* 4895 */    MCD_OPC_FilterValue, 0, 9, 7, 0, // Skip to: 6701
6903
/* 4900 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 4917
6904
/* 4905 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 4917
6905
/* 4912 */    MCD_OPC_Decode, 247, 19, 197, 1, // Opcode: VST3LNq32
6906
/* 4917 */    MCD_OPC_CheckPredicate, 21, 243, 6, 0, // Skip to: 6701
6907
/* 4922 */    MCD_OPC_Decode, 250, 19, 197, 1, // Opcode: VST3LNq32_UPD
6908
/* 4927 */    MCD_OPC_FilterValue, 2, 233, 6, 0, // Skip to: 6701
6909
/* 4932 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6910
/* 4935 */    MCD_OPC_FilterValue, 232, 3, 99, 0, 0, // Skip to: 5040
6911
/* 4941 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
6912
/* 4944 */    MCD_OPC_FilterValue, 0, 43, 0, 0, // Skip to: 4992
6913
/* 4949 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6914
/* 4952 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 4967
6915
/* 4957 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 4982
6916
/* 4962 */    MCD_OPC_Decode, 155, 11, 196, 1, // Opcode: VLD1q16wb_fixed
6917
/* 4967 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 4982
6918
/* 4972 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 4982
6919
/* 4977 */    MCD_OPC_Decode, 150, 11, 196, 1, // Opcode: VLD1q16
6920
/* 4982 */    MCD_OPC_CheckPredicate, 21, 178, 6, 0, // Skip to: 6701
6921
/* 4987 */    MCD_OPC_Decode, 156, 11, 196, 1, // Opcode: VLD1q16wb_register
6922
/* 4992 */    MCD_OPC_FilterValue, 1, 168, 6, 0, // Skip to: 6701
6923
/* 4997 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6924
/* 5000 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5015
6925
/* 5005 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5030
6926
/* 5010 */    MCD_OPC_Decode, 169, 11, 196, 1, // Opcode: VLD1q64wb_fixed
6927
/* 5015 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5030
6928
/* 5020 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5030
6929
/* 5025 */    MCD_OPC_Decode, 164, 11, 196, 1, // Opcode: VLD1q64
6930
/* 5030 */    MCD_OPC_CheckPredicate, 21, 130, 6, 0, // Skip to: 6701
6931
/* 5035 */    MCD_OPC_Decode, 170, 11, 196, 1, // Opcode: VLD1q64wb_register
6932
/* 5040 */    MCD_OPC_FilterValue, 233, 3, 119, 6, 0, // Skip to: 6701
6933
/* 5046 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
6934
/* 5049 */    MCD_OPC_FilterValue, 0, 111, 6, 0, // Skip to: 6701
6935
/* 5054 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 5071
6936
/* 5059 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 5071
6937
/* 5066 */    MCD_OPC_Decode, 170, 12, 198, 1, // Opcode: VLD3LNq32
6938
/* 5071 */    MCD_OPC_CheckPredicate, 21, 89, 6, 0, // Skip to: 6701
6939
/* 5076 */    MCD_OPC_Decode, 173, 12, 198, 1, // Opcode: VLD3LNq32_UPD
6940
/* 5081 */    MCD_OPC_FilterValue, 11, 183, 0, 0, // Skip to: 5269
6941
/* 5086 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
6942
/* 5089 */    MCD_OPC_FilterValue, 0, 85, 0, 0, // Skip to: 5179
6943
/* 5094 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6944
/* 5097 */    MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 5138
6945
/* 5102 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6946
/* 5105 */    MCD_OPC_FilterValue, 233, 3, 54, 6, 0, // Skip to: 6701
6947
/* 5111 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 5128
6948
/* 5116 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 5128
6949
/* 5123 */    MCD_OPC_Decode, 154, 20, 200, 1, // Opcode: VST4LNd32
6950
/* 5128 */    MCD_OPC_CheckPredicate, 21, 32, 6, 0, // Skip to: 6701
6951
/* 5133 */    MCD_OPC_Decode, 157, 20, 200, 1, // Opcode: VST4LNd32_UPD
6952
/* 5138 */    MCD_OPC_FilterValue, 2, 22, 6, 0, // Skip to: 6701
6953
/* 5143 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6954
/* 5146 */    MCD_OPC_FilterValue, 233, 3, 13, 6, 0, // Skip to: 6701
6955
/* 5152 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 5169
6956
/* 5157 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 5169
6957
/* 5164 */    MCD_OPC_Decode, 229, 12, 201, 1, // Opcode: VLD4LNd32
6958
/* 5169 */    MCD_OPC_CheckPredicate, 21, 247, 5, 0, // Skip to: 6701
6959
/* 5174 */    MCD_OPC_Decode, 232, 12, 201, 1, // Opcode: VLD4LNd32_UPD
6960
/* 5179 */    MCD_OPC_FilterValue, 1, 237, 5, 0, // Skip to: 6701
6961
/* 5184 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6962
/* 5187 */    MCD_OPC_FilterValue, 0, 36, 0, 0, // Skip to: 5228
6963
/* 5192 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6964
/* 5195 */    MCD_OPC_FilterValue, 233, 3, 220, 5, 0, // Skip to: 6701
6965
/* 5201 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 5218
6966
/* 5206 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 5218
6967
/* 5213 */    MCD_OPC_Decode, 166, 20, 200, 1, // Opcode: VST4LNq32
6968
/* 5218 */    MCD_OPC_CheckPredicate, 21, 198, 5, 0, // Skip to: 6701
6969
/* 5223 */    MCD_OPC_Decode, 169, 20, 200, 1, // Opcode: VST4LNq32_UPD
6970
/* 5228 */    MCD_OPC_FilterValue, 2, 188, 5, 0, // Skip to: 6701
6971
/* 5233 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6972
/* 5236 */    MCD_OPC_FilterValue, 233, 3, 179, 5, 0, // Skip to: 6701
6973
/* 5242 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 5259
6974
/* 5247 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 5259
6975
/* 5254 */    MCD_OPC_Decode, 241, 12, 201, 1, // Opcode: VLD4LNq32
6976
/* 5259 */    MCD_OPC_CheckPredicate, 21, 157, 5, 0, // Skip to: 6701
6977
/* 5264 */    MCD_OPC_Decode, 244, 12, 201, 1, // Opcode: VLD4LNq32_UPD
6978
/* 5269 */    MCD_OPC_FilterValue, 12, 137, 1, 0, // Skip to: 5667
6979
/* 5274 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
6980
/* 5277 */    MCD_OPC_FilterValue, 0, 60, 0, 0, // Skip to: 5342
6981
/* 5282 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6982
/* 5285 */    MCD_OPC_FilterValue, 2, 131, 5, 0, // Skip to: 6701
6983
/* 5290 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6984
/* 5293 */    MCD_OPC_FilterValue, 233, 3, 122, 5, 0, // Skip to: 6701
6985
/* 5299 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
6986
/* 5302 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5317
6987
/* 5307 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5332
6988
/* 5312 */    MCD_OPC_Decode, 207, 10, 203, 1, // Opcode: VLD1DUPd8wb_fixed
6989
/* 5317 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5332
6990
/* 5322 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5332
6991
/* 5327 */    MCD_OPC_Decode, 206, 10, 203, 1, // Opcode: VLD1DUPd8
6992
/* 5332 */    MCD_OPC_CheckPredicate, 21, 84, 5, 0, // Skip to: 6701
6993
/* 5337 */    MCD_OPC_Decode, 208, 10, 203, 1, // Opcode: VLD1DUPd8wb_register
6994
/* 5342 */    MCD_OPC_FilterValue, 1, 60, 0, 0, // Skip to: 5407
6995
/* 5347 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
6996
/* 5350 */    MCD_OPC_FilterValue, 2, 66, 5, 0, // Skip to: 6701
6997
/* 5355 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
6998
/* 5358 */    MCD_OPC_FilterValue, 233, 3, 57, 5, 0, // Skip to: 6701
6999
/* 5364 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7000
/* 5367 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5382
7001
/* 5372 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5397
7002
/* 5377 */    MCD_OPC_Decode, 216, 10, 203, 1, // Opcode: VLD1DUPq8wb_fixed
7003
/* 5382 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5397
7004
/* 5387 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5397
7005
/* 5392 */    MCD_OPC_Decode, 215, 10, 203, 1, // Opcode: VLD1DUPq8
7006
/* 5397 */    MCD_OPC_CheckPredicate, 21, 19, 5, 0, // Skip to: 6701
7007
/* 5402 */    MCD_OPC_Decode, 217, 10, 203, 1, // Opcode: VLD1DUPq8wb_register
7008
/* 5407 */    MCD_OPC_FilterValue, 2, 60, 0, 0, // Skip to: 5472
7009
/* 5412 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7010
/* 5415 */    MCD_OPC_FilterValue, 2, 1, 5, 0, // Skip to: 6701
7011
/* 5420 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7012
/* 5423 */    MCD_OPC_FilterValue, 233, 3, 248, 4, 0, // Skip to: 6701
7013
/* 5429 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7014
/* 5432 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5447
7015
/* 5437 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5462
7016
/* 5442 */    MCD_OPC_Decode, 201, 10, 203, 1, // Opcode: VLD1DUPd16wb_fixed
7017
/* 5447 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5462
7018
/* 5452 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5462
7019
/* 5457 */    MCD_OPC_Decode, 200, 10, 203, 1, // Opcode: VLD1DUPd16
7020
/* 5462 */    MCD_OPC_CheckPredicate, 21, 210, 4, 0, // Skip to: 6701
7021
/* 5467 */    MCD_OPC_Decode, 202, 10, 203, 1, // Opcode: VLD1DUPd16wb_register
7022
/* 5472 */    MCD_OPC_FilterValue, 3, 60, 0, 0, // Skip to: 5537
7023
/* 5477 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7024
/* 5480 */    MCD_OPC_FilterValue, 2, 192, 4, 0, // Skip to: 6701
7025
/* 5485 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7026
/* 5488 */    MCD_OPC_FilterValue, 233, 3, 183, 4, 0, // Skip to: 6701
7027
/* 5494 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7028
/* 5497 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5512
7029
/* 5502 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5527
7030
/* 5507 */    MCD_OPC_Decode, 210, 10, 203, 1, // Opcode: VLD1DUPq16wb_fixed
7031
/* 5512 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5527
7032
/* 5517 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5527
7033
/* 5522 */    MCD_OPC_Decode, 209, 10, 203, 1, // Opcode: VLD1DUPq16
7034
/* 5527 */    MCD_OPC_CheckPredicate, 21, 145, 4, 0, // Skip to: 6701
7035
/* 5532 */    MCD_OPC_Decode, 211, 10, 203, 1, // Opcode: VLD1DUPq16wb_register
7036
/* 5537 */    MCD_OPC_FilterValue, 4, 60, 0, 0, // Skip to: 5602
7037
/* 5542 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7038
/* 5545 */    MCD_OPC_FilterValue, 2, 127, 4, 0, // Skip to: 6701
7039
/* 5550 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7040
/* 5553 */    MCD_OPC_FilterValue, 233, 3, 118, 4, 0, // Skip to: 6701
7041
/* 5559 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7042
/* 5562 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5577
7043
/* 5567 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5592
7044
/* 5572 */    MCD_OPC_Decode, 204, 10, 203, 1, // Opcode: VLD1DUPd32wb_fixed
7045
/* 5577 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5592
7046
/* 5582 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5592
7047
/* 5587 */    MCD_OPC_Decode, 203, 10, 203, 1, // Opcode: VLD1DUPd32
7048
/* 5592 */    MCD_OPC_CheckPredicate, 21, 80, 4, 0, // Skip to: 6701
7049
/* 5597 */    MCD_OPC_Decode, 205, 10, 203, 1, // Opcode: VLD1DUPd32wb_register
7050
/* 5602 */    MCD_OPC_FilterValue, 5, 70, 4, 0, // Skip to: 6701
7051
/* 5607 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7052
/* 5610 */    MCD_OPC_FilterValue, 2, 62, 4, 0, // Skip to: 6701
7053
/* 5615 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7054
/* 5618 */    MCD_OPC_FilterValue, 233, 3, 53, 4, 0, // Skip to: 6701
7055
/* 5624 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7056
/* 5627 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5642
7057
/* 5632 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5657
7058
/* 5637 */    MCD_OPC_Decode, 213, 10, 203, 1, // Opcode: VLD1DUPq32wb_fixed
7059
/* 5642 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5657
7060
/* 5647 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5657
7061
/* 5652 */    MCD_OPC_Decode, 212, 10, 203, 1, // Opcode: VLD1DUPq32
7062
/* 5657 */    MCD_OPC_CheckPredicate, 21, 15, 4, 0, // Skip to: 6701
7063
/* 5662 */    MCD_OPC_Decode, 214, 10, 203, 1, // Opcode: VLD1DUPq32wb_register
7064
/* 5667 */    MCD_OPC_FilterValue, 13, 137, 1, 0, // Skip to: 6065
7065
/* 5672 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
7066
/* 5675 */    MCD_OPC_FilterValue, 0, 60, 0, 0, // Skip to: 5740
7067
/* 5680 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7068
/* 5683 */    MCD_OPC_FilterValue, 2, 245, 3, 0, // Skip to: 6701
7069
/* 5688 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7070
/* 5691 */    MCD_OPC_FilterValue, 233, 3, 236, 3, 0, // Skip to: 6701
7071
/* 5697 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7072
/* 5700 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5715
7073
/* 5705 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5730
7074
/* 5710 */    MCD_OPC_Decode, 191, 11, 204, 1, // Opcode: VLD2DUPd8wb_fixed
7075
/* 5715 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5730
7076
/* 5720 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5730
7077
/* 5725 */    MCD_OPC_Decode, 190, 11, 204, 1, // Opcode: VLD2DUPd8
7078
/* 5730 */    MCD_OPC_CheckPredicate, 21, 198, 3, 0, // Skip to: 6701
7079
/* 5735 */    MCD_OPC_Decode, 192, 11, 204, 1, // Opcode: VLD2DUPd8wb_register
7080
/* 5740 */    MCD_OPC_FilterValue, 1, 60, 0, 0, // Skip to: 5805
7081
/* 5745 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7082
/* 5748 */    MCD_OPC_FilterValue, 2, 180, 3, 0, // Skip to: 6701
7083
/* 5753 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7084
/* 5756 */    MCD_OPC_FilterValue, 233, 3, 171, 3, 0, // Skip to: 6701
7085
/* 5762 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7086
/* 5765 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5780
7087
/* 5770 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5795
7088
/* 5775 */    MCD_OPC_Decode, 194, 11, 204, 1, // Opcode: VLD2DUPd8x2wb_fixed
7089
/* 5780 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5795
7090
/* 5785 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5795
7091
/* 5790 */    MCD_OPC_Decode, 193, 11, 204, 1, // Opcode: VLD2DUPd8x2
7092
/* 5795 */    MCD_OPC_CheckPredicate, 21, 133, 3, 0, // Skip to: 6701
7093
/* 5800 */    MCD_OPC_Decode, 195, 11, 204, 1, // Opcode: VLD2DUPd8x2wb_register
7094
/* 5805 */    MCD_OPC_FilterValue, 2, 60, 0, 0, // Skip to: 5870
7095
/* 5810 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7096
/* 5813 */    MCD_OPC_FilterValue, 2, 115, 3, 0, // Skip to: 6701
7097
/* 5818 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7098
/* 5821 */    MCD_OPC_FilterValue, 233, 3, 106, 3, 0, // Skip to: 6701
7099
/* 5827 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7100
/* 5830 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5845
7101
/* 5835 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5860
7102
/* 5840 */    MCD_OPC_Decode, 179, 11, 204, 1, // Opcode: VLD2DUPd16wb_fixed
7103
/* 5845 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5860
7104
/* 5850 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5860
7105
/* 5855 */    MCD_OPC_Decode, 178, 11, 204, 1, // Opcode: VLD2DUPd16
7106
/* 5860 */    MCD_OPC_CheckPredicate, 21, 68, 3, 0, // Skip to: 6701
7107
/* 5865 */    MCD_OPC_Decode, 180, 11, 204, 1, // Opcode: VLD2DUPd16wb_register
7108
/* 5870 */    MCD_OPC_FilterValue, 3, 60, 0, 0, // Skip to: 5935
7109
/* 5875 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7110
/* 5878 */    MCD_OPC_FilterValue, 2, 50, 3, 0, // Skip to: 6701
7111
/* 5883 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7112
/* 5886 */    MCD_OPC_FilterValue, 233, 3, 41, 3, 0, // Skip to: 6701
7113
/* 5892 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7114
/* 5895 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5910
7115
/* 5900 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5925
7116
/* 5905 */    MCD_OPC_Decode, 182, 11, 204, 1, // Opcode: VLD2DUPd16x2wb_fixed
7117
/* 5910 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5925
7118
/* 5915 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5925
7119
/* 5920 */    MCD_OPC_Decode, 181, 11, 204, 1, // Opcode: VLD2DUPd16x2
7120
/* 5925 */    MCD_OPC_CheckPredicate, 21, 3, 3, 0, // Skip to: 6701
7121
/* 5930 */    MCD_OPC_Decode, 183, 11, 204, 1, // Opcode: VLD2DUPd16x2wb_register
7122
/* 5935 */    MCD_OPC_FilterValue, 4, 60, 0, 0, // Skip to: 6000
7123
/* 5940 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7124
/* 5943 */    MCD_OPC_FilterValue, 2, 241, 2, 0, // Skip to: 6701
7125
/* 5948 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7126
/* 5951 */    MCD_OPC_FilterValue, 233, 3, 232, 2, 0, // Skip to: 6701
7127
/* 5957 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7128
/* 5960 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5975
7129
/* 5965 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 5990
7130
/* 5970 */    MCD_OPC_Decode, 185, 11, 204, 1, // Opcode: VLD2DUPd32wb_fixed
7131
/* 5975 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5990
7132
/* 5980 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 5990
7133
/* 5985 */    MCD_OPC_Decode, 184, 11, 204, 1, // Opcode: VLD2DUPd32
7134
/* 5990 */    MCD_OPC_CheckPredicate, 21, 194, 2, 0, // Skip to: 6701
7135
/* 5995 */    MCD_OPC_Decode, 186, 11, 204, 1, // Opcode: VLD2DUPd32wb_register
7136
/* 6000 */    MCD_OPC_FilterValue, 5, 184, 2, 0, // Skip to: 6701
7137
/* 6005 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7138
/* 6008 */    MCD_OPC_FilterValue, 2, 176, 2, 0, // Skip to: 6701
7139
/* 6013 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7140
/* 6016 */    MCD_OPC_FilterValue, 233, 3, 167, 2, 0, // Skip to: 6701
7141
/* 6022 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7142
/* 6025 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 6040
7143
/* 6030 */    MCD_OPC_CheckPredicate, 21, 20, 0, 0, // Skip to: 6055
7144
/* 6035 */    MCD_OPC_Decode, 188, 11, 204, 1, // Opcode: VLD2DUPd32x2wb_fixed
7145
/* 6040 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 6055
7146
/* 6045 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 6055
7147
/* 6050 */    MCD_OPC_Decode, 187, 11, 204, 1, // Opcode: VLD2DUPd32x2
7148
/* 6055 */    MCD_OPC_CheckPredicate, 21, 129, 2, 0, // Skip to: 6701
7149
/* 6060 */    MCD_OPC_Decode, 189, 11, 204, 1, // Opcode: VLD2DUPd32x2wb_register
7150
/* 6065 */    MCD_OPC_FilterValue, 14, 41, 1, 0, // Skip to: 6367
7151
/* 6070 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
7152
/* 6073 */    MCD_OPC_FilterValue, 0, 44, 0, 0, // Skip to: 6122
7153
/* 6078 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7154
/* 6081 */    MCD_OPC_FilterValue, 2, 103, 2, 0, // Skip to: 6701
7155
/* 6086 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7156
/* 6089 */    MCD_OPC_FilterValue, 233, 3, 94, 2, 0, // Skip to: 6701
7157
/* 6095 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6112
7158
/* 6100 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6112
7159
/* 6107 */    MCD_OPC_Decode, 138, 12, 205, 1, // Opcode: VLD3DUPd8
7160
/* 6112 */    MCD_OPC_CheckPredicate, 21, 72, 2, 0, // Skip to: 6701
7161
/* 6117 */    MCD_OPC_Decode, 141, 12, 205, 1, // Opcode: VLD3DUPd8_UPD
7162
/* 6122 */    MCD_OPC_FilterValue, 2, 44, 0, 0, // Skip to: 6171
7163
/* 6127 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7164
/* 6130 */    MCD_OPC_FilterValue, 2, 54, 2, 0, // Skip to: 6701
7165
/* 6135 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7166
/* 6138 */    MCD_OPC_FilterValue, 233, 3, 45, 2, 0, // Skip to: 6701
7167
/* 6144 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6161
7168
/* 6149 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6161
7169
/* 6156 */    MCD_OPC_Decode, 150, 12, 205, 1, // Opcode: VLD3DUPq8
7170
/* 6161 */    MCD_OPC_CheckPredicate, 21, 23, 2, 0, // Skip to: 6701
7171
/* 6166 */    MCD_OPC_Decode, 153, 12, 205, 1, // Opcode: VLD3DUPq8_UPD
7172
/* 6171 */    MCD_OPC_FilterValue, 4, 44, 0, 0, // Skip to: 6220
7173
/* 6176 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7174
/* 6179 */    MCD_OPC_FilterValue, 2, 5, 2, 0, // Skip to: 6701
7175
/* 6184 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7176
/* 6187 */    MCD_OPC_FilterValue, 233, 3, 252, 1, 0, // Skip to: 6701
7177
/* 6193 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6210
7178
/* 6198 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6210
7179
/* 6205 */    MCD_OPC_Decode, 130, 12, 205, 1, // Opcode: VLD3DUPd16
7180
/* 6210 */    MCD_OPC_CheckPredicate, 21, 230, 1, 0, // Skip to: 6701
7181
/* 6215 */    MCD_OPC_Decode, 133, 12, 205, 1, // Opcode: VLD3DUPd16_UPD
7182
/* 6220 */    MCD_OPC_FilterValue, 6, 44, 0, 0, // Skip to: 6269
7183
/* 6225 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7184
/* 6228 */    MCD_OPC_FilterValue, 2, 212, 1, 0, // Skip to: 6701
7185
/* 6233 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7186
/* 6236 */    MCD_OPC_FilterValue, 233, 3, 203, 1, 0, // Skip to: 6701
7187
/* 6242 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6259
7188
/* 6247 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6259
7189
/* 6254 */    MCD_OPC_Decode, 142, 12, 205, 1, // Opcode: VLD3DUPq16
7190
/* 6259 */    MCD_OPC_CheckPredicate, 21, 181, 1, 0, // Skip to: 6701
7191
/* 6264 */    MCD_OPC_Decode, 145, 12, 205, 1, // Opcode: VLD3DUPq16_UPD
7192
/* 6269 */    MCD_OPC_FilterValue, 8, 44, 0, 0, // Skip to: 6318
7193
/* 6274 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7194
/* 6277 */    MCD_OPC_FilterValue, 2, 163, 1, 0, // Skip to: 6701
7195
/* 6282 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7196
/* 6285 */    MCD_OPC_FilterValue, 233, 3, 154, 1, 0, // Skip to: 6701
7197
/* 6291 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6308
7198
/* 6296 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6308
7199
/* 6303 */    MCD_OPC_Decode, 134, 12, 205, 1, // Opcode: VLD3DUPd32
7200
/* 6308 */    MCD_OPC_CheckPredicate, 21, 132, 1, 0, // Skip to: 6701
7201
/* 6313 */    MCD_OPC_Decode, 137, 12, 205, 1, // Opcode: VLD3DUPd32_UPD
7202
/* 6318 */    MCD_OPC_FilterValue, 10, 122, 1, 0, // Skip to: 6701
7203
/* 6323 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7204
/* 6326 */    MCD_OPC_FilterValue, 2, 114, 1, 0, // Skip to: 6701
7205
/* 6331 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7206
/* 6334 */    MCD_OPC_FilterValue, 233, 3, 105, 1, 0, // Skip to: 6701
7207
/* 6340 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6357
7208
/* 6345 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6357
7209
/* 6352 */    MCD_OPC_Decode, 146, 12, 205, 1, // Opcode: VLD3DUPq32
7210
/* 6357 */    MCD_OPC_CheckPredicate, 21, 83, 1, 0, // Skip to: 6701
7211
/* 6362 */    MCD_OPC_Decode, 149, 12, 205, 1, // Opcode: VLD3DUPq32_UPD
7212
/* 6367 */    MCD_OPC_FilterValue, 15, 73, 1, 0, // Skip to: 6701
7213
/* 6372 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
7214
/* 6375 */    MCD_OPC_FilterValue, 0, 158, 0, 0, // Skip to: 6538
7215
/* 6380 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
7216
/* 6383 */    MCD_OPC_FilterValue, 0, 101, 0, 0, // Skip to: 6489
7217
/* 6388 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
7218
/* 6391 */    MCD_OPC_FilterValue, 0, 44, 0, 0, // Skip to: 6440
7219
/* 6396 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7220
/* 6399 */    MCD_OPC_FilterValue, 2, 41, 1, 0, // Skip to: 6701
7221
/* 6404 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7222
/* 6407 */    MCD_OPC_FilterValue, 233, 3, 32, 1, 0, // Skip to: 6701
7223
/* 6413 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6430
7224
/* 6418 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6430
7225
/* 6425 */    MCD_OPC_Decode, 209, 12, 206, 1, // Opcode: VLD4DUPd8
7226
/* 6430 */    MCD_OPC_CheckPredicate, 21, 10, 1, 0, // Skip to: 6701
7227
/* 6435 */    MCD_OPC_Decode, 212, 12, 206, 1, // Opcode: VLD4DUPd8_UPD
7228
/* 6440 */    MCD_OPC_FilterValue, 1, 0, 1, 0, // Skip to: 6701
7229
/* 6445 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7230
/* 6448 */    MCD_OPC_FilterValue, 2, 248, 0, 0, // Skip to: 6701
7231
/* 6453 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7232
/* 6456 */    MCD_OPC_FilterValue, 233, 3, 239, 0, 0, // Skip to: 6701
7233
/* 6462 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6479
7234
/* 6467 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6479
7235
/* 6474 */    MCD_OPC_Decode, 201, 12, 206, 1, // Opcode: VLD4DUPd16
7236
/* 6479 */    MCD_OPC_CheckPredicate, 21, 217, 0, 0, // Skip to: 6701
7237
/* 6484 */    MCD_OPC_Decode, 204, 12, 206, 1, // Opcode: VLD4DUPd16_UPD
7238
/* 6489 */    MCD_OPC_FilterValue, 1, 207, 0, 0, // Skip to: 6701
7239
/* 6494 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7240
/* 6497 */    MCD_OPC_FilterValue, 2, 199, 0, 0, // Skip to: 6701
7241
/* 6502 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7242
/* 6505 */    MCD_OPC_FilterValue, 233, 3, 190, 0, 0, // Skip to: 6701
7243
/* 6511 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6528
7244
/* 6516 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6528
7245
/* 6523 */    MCD_OPC_Decode, 205, 12, 206, 1, // Opcode: VLD4DUPd32
7246
/* 6528 */    MCD_OPC_CheckPredicate, 21, 168, 0, 0, // Skip to: 6701
7247
/* 6533 */    MCD_OPC_Decode, 208, 12, 206, 1, // Opcode: VLD4DUPd32_UPD
7248
/* 6538 */    MCD_OPC_FilterValue, 1, 158, 0, 0, // Skip to: 6701
7249
/* 6543 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
7250
/* 6546 */    MCD_OPC_FilterValue, 0, 101, 0, 0, // Skip to: 6652
7251
/* 6551 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
7252
/* 6554 */    MCD_OPC_FilterValue, 0, 44, 0, 0, // Skip to: 6603
7253
/* 6559 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7254
/* 6562 */    MCD_OPC_FilterValue, 2, 134, 0, 0, // Skip to: 6701
7255
/* 6567 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7256
/* 6570 */    MCD_OPC_FilterValue, 233, 3, 125, 0, 0, // Skip to: 6701
7257
/* 6576 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6593
7258
/* 6581 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6593
7259
/* 6588 */    MCD_OPC_Decode, 221, 12, 206, 1, // Opcode: VLD4DUPq8
7260
/* 6593 */    MCD_OPC_CheckPredicate, 21, 103, 0, 0, // Skip to: 6701
7261
/* 6598 */    MCD_OPC_Decode, 224, 12, 206, 1, // Opcode: VLD4DUPq8_UPD
7262
/* 6603 */    MCD_OPC_FilterValue, 1, 93, 0, 0, // Skip to: 6701
7263
/* 6608 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7264
/* 6611 */    MCD_OPC_FilterValue, 2, 85, 0, 0, // Skip to: 6701
7265
/* 6616 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7266
/* 6619 */    MCD_OPC_FilterValue, 233, 3, 76, 0, 0, // Skip to: 6701
7267
/* 6625 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6642
7268
/* 6630 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6642
7269
/* 6637 */    MCD_OPC_Decode, 213, 12, 206, 1, // Opcode: VLD4DUPq16
7270
/* 6642 */    MCD_OPC_CheckPredicate, 21, 54, 0, 0, // Skip to: 6701
7271
/* 6647 */    MCD_OPC_Decode, 216, 12, 206, 1, // Opcode: VLD4DUPq16_UPD
7272
/* 6652 */    MCD_OPC_FilterValue, 1, 44, 0, 0, // Skip to: 6701
7273
/* 6657 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
7274
/* 6660 */    MCD_OPC_FilterValue, 2, 36, 0, 0, // Skip to: 6701
7275
/* 6665 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
7276
/* 6668 */    MCD_OPC_FilterValue, 233, 3, 27, 0, 0, // Skip to: 6701
7277
/* 6674 */    MCD_OPC_CheckPredicate, 21, 12, 0, 0, // Skip to: 6691
7278
/* 6679 */    MCD_OPC_CheckField, 0, 4, 15, 5, 0, 0, // Skip to: 6691
7279
/* 6686 */    MCD_OPC_Decode, 217, 12, 206, 1, // Opcode: VLD4DUPq32
7280
/* 6691 */    MCD_OPC_CheckPredicate, 21, 5, 0, 0, // Skip to: 6701
7281
/* 6696 */    MCD_OPC_Decode, 220, 12, 206, 1, // Opcode: VLD4DUPq32_UPD
7282
/* 6701 */    MCD_OPC_Fail,
7283
  0
7284
};
7285
7286
static const uint8_t DecoderTableThumb16[] = {
7287
/* 0 */       MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
7288
/* 3 */       MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 25
7289
/* 8 */       MCD_OPC_CheckPredicate, 28, 181, 4, 0, // Skip to: 1218
7290
/* 13 */      MCD_OPC_CheckField, 6, 6, 0, 174, 4, 0, // Skip to: 1218
7291
/* 20 */      MCD_OPC_Decode, 236, 24, 207, 1, // Opcode: tMOVSr
7292
/* 25 */      MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 47
7293
/* 30 */      MCD_OPC_CheckPredicate, 28, 159, 4, 0, // Skip to: 1218
7294
/* 35 */      MCD_OPC_CheckField, 11, 1, 1, 152, 4, 0, // Skip to: 1218
7295
/* 42 */      MCD_OPC_Decode, 212, 24, 208, 1, // Opcode: tCMPi8
7296
/* 47 */      MCD_OPC_FilterValue, 4, 3, 1, 0, // Skip to: 311
7297
/* 52 */      MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7298
/* 55 */      MCD_OPC_FilterValue, 0, 236, 0, 0, // Skip to: 296
7299
/* 60 */      MCD_OPC_ExtractField, 8, 3,  // Inst{10-8} ...
7300
/* 63 */      MCD_OPC_FilterValue, 2, 48, 0, 0, // Skip to: 116
7301
/* 68 */      MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
7302
/* 71 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 86
7303
/* 76 */      MCD_OPC_CheckPredicate, 28, 113, 4, 0, // Skip to: 1218
7304
/* 81 */      MCD_OPC_Decode, 140, 25, 207, 1, // Opcode: tTST
7305
/* 86 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 101
7306
/* 91 */      MCD_OPC_CheckPredicate, 28, 98, 4, 0, // Skip to: 1218
7307
/* 96 */      MCD_OPC_Decode, 213, 24, 207, 1, // Opcode: tCMPr
7308
/* 101 */     MCD_OPC_FilterValue, 3, 88, 4, 0, // Skip to: 1218
7309
/* 106 */     MCD_OPC_CheckPredicate, 28, 83, 4, 0, // Skip to: 1218
7310
/* 111 */     MCD_OPC_Decode, 210, 24, 207, 1, // Opcode: tCMNz
7311
/* 116 */     MCD_OPC_FilterValue, 4, 51, 0, 0, // Skip to: 172
7312
/* 121 */     MCD_OPC_CheckPredicate, 28, 12, 0, 0, // Skip to: 138
7313
/* 126 */     MCD_OPC_CheckField, 3, 4, 13, 5, 0, 0, // Skip to: 138
7314
/* 133 */     MCD_OPC_Decode, 189, 24, 209, 1, // Opcode: tADDrSP
7315
/* 138 */     MCD_OPC_CheckPredicate, 28, 19, 0, 0, // Skip to: 162
7316
/* 143 */     MCD_OPC_CheckField, 7, 1, 1, 12, 0, 0, // Skip to: 162
7317
/* 150 */     MCD_OPC_CheckField, 0, 3, 5, 5, 0, 0, // Skip to: 162
7318
/* 157 */     MCD_OPC_Decode, 193, 24, 209, 1, // Opcode: tADDspr
7319
/* 162 */     MCD_OPC_CheckPredicate, 28, 27, 4, 0, // Skip to: 1218
7320
/* 167 */     MCD_OPC_Decode, 186, 24, 210, 1, // Opcode: tADDhirr
7321
/* 172 */     MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 187
7322
/* 177 */     MCD_OPC_CheckPredicate, 28, 12, 4, 0, // Skip to: 1218
7323
/* 182 */     MCD_OPC_Decode, 211, 24, 211, 1, // Opcode: tCMPhir
7324
/* 187 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 202
7325
/* 192 */     MCD_OPC_CheckPredicate, 28, 253, 3, 0, // Skip to: 1218
7326
/* 197 */     MCD_OPC_Decode, 238, 24, 211, 1, // Opcode: tMOVr
7327
/* 202 */     MCD_OPC_FilterValue, 7, 243, 3, 0, // Skip to: 1218
7328
/* 207 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
7329
/* 210 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 248
7330
/* 215 */     MCD_OPC_CheckPredicate, 29, 15, 0, 0, // Skip to: 235
7331
/* 220 */     MCD_OPC_CheckField, 2, 1, 1, 8, 0, 0, // Skip to: 235
7332
/* 227 */     MCD_OPC_SoftFail, 3, 0,
7333
/* 230 */     MCD_OPC_Decode, 206, 24, 212, 1, // Opcode: tBXNS
7334
/* 235 */     MCD_OPC_CheckPredicate, 28, 210, 3, 0, // Skip to: 1218
7335
/* 240 */     MCD_OPC_SoftFail, 7, 0,
7336
/* 243 */     MCD_OPC_Decode, 205, 24, 212, 1, // Opcode: tBX
7337
/* 248 */     MCD_OPC_FilterValue, 1, 197, 3, 0, // Skip to: 1218
7338
/* 253 */     MCD_OPC_ExtractField, 2, 1,  // Inst{2} ...
7339
/* 256 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 278
7340
/* 261 */     MCD_OPC_CheckPredicate, 30, 184, 3, 0, // Skip to: 1218
7341
/* 266 */     MCD_OPC_CheckField, 0, 2, 0, 177, 3, 0, // Skip to: 1218
7342
/* 273 */     MCD_OPC_Decode, 204, 24, 212, 1, // Opcode: tBLXr
7343
/* 278 */     MCD_OPC_FilterValue, 1, 167, 3, 0, // Skip to: 1218
7344
/* 283 */     MCD_OPC_CheckPredicate, 29, 162, 3, 0, // Skip to: 1218
7345
/* 288 */     MCD_OPC_SoftFail, 3, 0,
7346
/* 291 */     MCD_OPC_Decode, 202, 24, 213, 1, // Opcode: tBLXNSr
7347
/* 296 */     MCD_OPC_FilterValue, 1, 149, 3, 0, // Skip to: 1218
7348
/* 301 */     MCD_OPC_CheckPredicate, 28, 144, 3, 0, // Skip to: 1218
7349
/* 306 */     MCD_OPC_Decode, 229, 24, 214, 1, // Opcode: tLDRpci
7350
/* 311 */     MCD_OPC_FilterValue, 5, 123, 0, 0, // Skip to: 439
7351
/* 316 */     MCD_OPC_ExtractField, 9, 3,  // Inst{11-9} ...
7352
/* 319 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 334
7353
/* 324 */     MCD_OPC_CheckPredicate, 28, 121, 3, 0, // Skip to: 1218
7354
/* 329 */     MCD_OPC_Decode, 130, 25, 215, 1, // Opcode: tSTRr
7355
/* 334 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 349
7356
/* 339 */     MCD_OPC_CheckPredicate, 28, 106, 3, 0, // Skip to: 1218
7357
/* 344 */     MCD_OPC_Decode, 128, 25, 215, 1, // Opcode: tSTRHr
7358
/* 349 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 364
7359
/* 354 */     MCD_OPC_CheckPredicate, 28, 91, 3, 0, // Skip to: 1218
7360
/* 359 */     MCD_OPC_Decode, 254, 24, 215, 1, // Opcode: tSTRBr
7361
/* 364 */     MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 379
7362
/* 369 */     MCD_OPC_CheckPredicate, 28, 76, 3, 0, // Skip to: 1218
7363
/* 374 */     MCD_OPC_Decode, 226, 24, 215, 1, // Opcode: tLDRSB
7364
/* 379 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 394
7365
/* 384 */     MCD_OPC_CheckPredicate, 28, 61, 3, 0, // Skip to: 1218
7366
/* 389 */     MCD_OPC_Decode, 230, 24, 215, 1, // Opcode: tLDRr
7367
/* 394 */     MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 409
7368
/* 399 */     MCD_OPC_CheckPredicate, 28, 46, 3, 0, // Skip to: 1218
7369
/* 404 */     MCD_OPC_Decode, 225, 24, 215, 1, // Opcode: tLDRHr
7370
/* 409 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 424
7371
/* 414 */     MCD_OPC_CheckPredicate, 28, 31, 3, 0, // Skip to: 1218
7372
/* 419 */     MCD_OPC_Decode, 223, 24, 215, 1, // Opcode: tLDRBr
7373
/* 424 */     MCD_OPC_FilterValue, 7, 21, 3, 0, // Skip to: 1218
7374
/* 429 */     MCD_OPC_CheckPredicate, 28, 16, 3, 0, // Skip to: 1218
7375
/* 434 */     MCD_OPC_Decode, 227, 24, 215, 1, // Opcode: tLDRSH
7376
/* 439 */     MCD_OPC_FilterValue, 6, 33, 0, 0, // Skip to: 477
7377
/* 444 */     MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7378
/* 447 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 462
7379
/* 452 */     MCD_OPC_CheckPredicate, 28, 249, 2, 0, // Skip to: 1218
7380
/* 457 */     MCD_OPC_Decode, 129, 25, 216, 1, // Opcode: tSTRi
7381
/* 462 */     MCD_OPC_FilterValue, 1, 239, 2, 0, // Skip to: 1218
7382
/* 467 */     MCD_OPC_CheckPredicate, 28, 234, 2, 0, // Skip to: 1218
7383
/* 472 */     MCD_OPC_Decode, 228, 24, 216, 1, // Opcode: tLDRi
7384
/* 477 */     MCD_OPC_FilterValue, 7, 33, 0, 0, // Skip to: 515
7385
/* 482 */     MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7386
/* 485 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 500
7387
/* 490 */     MCD_OPC_CheckPredicate, 28, 211, 2, 0, // Skip to: 1218
7388
/* 495 */     MCD_OPC_Decode, 253, 24, 216, 1, // Opcode: tSTRBi
7389
/* 500 */     MCD_OPC_FilterValue, 1, 201, 2, 0, // Skip to: 1218
7390
/* 505 */     MCD_OPC_CheckPredicate, 28, 196, 2, 0, // Skip to: 1218
7391
/* 510 */     MCD_OPC_Decode, 222, 24, 216, 1, // Opcode: tLDRBi
7392
/* 515 */     MCD_OPC_FilterValue, 8, 33, 0, 0, // Skip to: 553
7393
/* 520 */     MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7394
/* 523 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 538
7395
/* 528 */     MCD_OPC_CheckPredicate, 28, 173, 2, 0, // Skip to: 1218
7396
/* 533 */     MCD_OPC_Decode, 255, 24, 216, 1, // Opcode: tSTRHi
7397
/* 538 */     MCD_OPC_FilterValue, 1, 163, 2, 0, // Skip to: 1218
7398
/* 543 */     MCD_OPC_CheckPredicate, 28, 158, 2, 0, // Skip to: 1218
7399
/* 548 */     MCD_OPC_Decode, 224, 24, 216, 1, // Opcode: tLDRHi
7400
/* 553 */     MCD_OPC_FilterValue, 9, 33, 0, 0, // Skip to: 591
7401
/* 558 */     MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7402
/* 561 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 576
7403
/* 566 */     MCD_OPC_CheckPredicate, 28, 135, 2, 0, // Skip to: 1218
7404
/* 571 */     MCD_OPC_Decode, 131, 25, 217, 1, // Opcode: tSTRspi
7405
/* 576 */     MCD_OPC_FilterValue, 1, 125, 2, 0, // Skip to: 1218
7406
/* 581 */     MCD_OPC_CheckPredicate, 28, 120, 2, 0, // Skip to: 1218
7407
/* 586 */     MCD_OPC_Decode, 231, 24, 217, 1, // Opcode: tLDRspi
7408
/* 591 */     MCD_OPC_FilterValue, 10, 33, 0, 0, // Skip to: 629
7409
/* 596 */     MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7410
/* 599 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 614
7411
/* 604 */     MCD_OPC_CheckPredicate, 28, 97, 2, 0, // Skip to: 1218
7412
/* 609 */     MCD_OPC_Decode, 194, 24, 218, 1, // Opcode: tADR
7413
/* 614 */     MCD_OPC_FilterValue, 1, 87, 2, 0, // Skip to: 1218
7414
/* 619 */     MCD_OPC_CheckPredicate, 28, 82, 2, 0, // Skip to: 1218
7415
/* 624 */     MCD_OPC_Decode, 190, 24, 218, 1, // Opcode: tADDrSPi
7416
/* 629 */     MCD_OPC_FilterValue, 11, 187, 1, 0, // Skip to: 1077
7417
/* 634 */     MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
7418
/* 637 */     MCD_OPC_FilterValue, 0, 148, 0, 0, // Skip to: 790
7419
/* 642 */     MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
7420
/* 645 */     MCD_OPC_FilterValue, 0, 125, 0, 0, // Skip to: 775
7421
/* 650 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
7422
/* 653 */     MCD_OPC_FilterValue, 0, 56, 0, 0, // Skip to: 714
7423
/* 658 */     MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
7424
/* 661 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 676
7425
/* 666 */     MCD_OPC_CheckPredicate, 28, 35, 2, 0, // Skip to: 1218
7426
/* 671 */     MCD_OPC_Decode, 192, 24, 219, 1, // Opcode: tADDspi
7427
/* 676 */     MCD_OPC_FilterValue, 1, 25, 2, 0, // Skip to: 1218
7428
/* 681 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
7429
/* 684 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 699
7430
/* 689 */     MCD_OPC_CheckPredicate, 31, 12, 2, 0, // Skip to: 1218
7431
/* 694 */     MCD_OPC_Decode, 138, 25, 207, 1, // Opcode: tSXTH
7432
/* 699 */     MCD_OPC_FilterValue, 1, 2, 2, 0, // Skip to: 1218
7433
/* 704 */     MCD_OPC_CheckPredicate, 31, 253, 1, 0, // Skip to: 1218
7434
/* 709 */     MCD_OPC_Decode, 137, 25, 207, 1, // Opcode: tSXTB
7435
/* 714 */     MCD_OPC_FilterValue, 1, 243, 1, 0, // Skip to: 1218
7436
/* 719 */     MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
7437
/* 722 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 737
7438
/* 727 */     MCD_OPC_CheckPredicate, 28, 230, 1, 0, // Skip to: 1218
7439
/* 732 */     MCD_OPC_Decode, 135, 25, 219, 1, // Opcode: tSUBspi
7440
/* 737 */     MCD_OPC_FilterValue, 1, 220, 1, 0, // Skip to: 1218
7441
/* 742 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
7442
/* 745 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 760
7443
/* 750 */     MCD_OPC_CheckPredicate, 31, 207, 1, 0, // Skip to: 1218
7444
/* 755 */     MCD_OPC_Decode, 143, 25, 207, 1, // Opcode: tUXTH
7445
/* 760 */     MCD_OPC_FilterValue, 1, 197, 1, 0, // Skip to: 1218
7446
/* 765 */     MCD_OPC_CheckPredicate, 31, 192, 1, 0, // Skip to: 1218
7447
/* 770 */     MCD_OPC_Decode, 142, 25, 207, 1, // Opcode: tUXTB
7448
/* 775 */     MCD_OPC_FilterValue, 1, 182, 1, 0, // Skip to: 1218
7449
/* 780 */     MCD_OPC_CheckPredicate, 32, 177, 1, 0, // Skip to: 1218
7450
/* 785 */     MCD_OPC_Decode, 209, 24, 220, 1, // Opcode: tCBZ
7451
/* 790 */     MCD_OPC_FilterValue, 1, 95, 0, 0, // Skip to: 890
7452
/* 795 */     MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
7453
/* 798 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 813
7454
/* 803 */     MCD_OPC_CheckPredicate, 28, 154, 1, 0, // Skip to: 1218
7455
/* 808 */     MCD_OPC_Decode, 244, 24, 221, 1, // Opcode: tPUSH
7456
/* 813 */     MCD_OPC_FilterValue, 1, 144, 1, 0, // Skip to: 1218
7457
/* 818 */     MCD_OPC_ExtractField, 5, 4,  // Inst{8-5} ...
7458
/* 821 */     MCD_OPC_FilterValue, 0, 13, 0, 0, // Skip to: 839
7459
/* 826 */     MCD_OPC_CheckPredicate, 33, 131, 1, 0, // Skip to: 1218
7460
/* 831 */     MCD_OPC_SoftFail, 7, 16,
7461
/* 834 */     MCD_OPC_Decode, 149, 23, 222, 1, // Opcode: t2SETPAN
7462
/* 839 */     MCD_OPC_FilterValue, 2, 24, 0, 0, // Skip to: 868
7463
/* 844 */     MCD_OPC_CheckPredicate, 34, 113, 1, 0, // Skip to: 1218
7464
/* 849 */     MCD_OPC_CheckField, 4, 1, 1, 106, 1, 0, // Skip to: 1218
7465
/* 856 */     MCD_OPC_CheckField, 0, 3, 0, 99, 1, 0, // Skip to: 1218
7466
/* 863 */     MCD_OPC_Decode, 251, 24, 222, 1, // Opcode: tSETEND
7467
/* 868 */     MCD_OPC_FilterValue, 3, 89, 1, 0, // Skip to: 1218
7468
/* 873 */     MCD_OPC_CheckPredicate, 28, 84, 1, 0, // Skip to: 1218
7469
/* 878 */     MCD_OPC_CheckField, 3, 1, 0, 77, 1, 0, // Skip to: 1218
7470
/* 885 */     MCD_OPC_Decode, 214, 24, 223, 1, // Opcode: tCPS
7471
/* 890 */     MCD_OPC_FilterValue, 2, 114, 0, 0, // Skip to: 1009
7472
/* 895 */     MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
7473
/* 898 */     MCD_OPC_FilterValue, 0, 91, 0, 0, // Skip to: 994
7474
/* 903 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
7475
/* 906 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 928
7476
/* 911 */     MCD_OPC_CheckPredicate, 31, 46, 1, 0, // Skip to: 1218
7477
/* 916 */     MCD_OPC_CheckField, 9, 1, 1, 39, 1, 0, // Skip to: 1218
7478
/* 923 */     MCD_OPC_Decode, 245, 24, 207, 1, // Opcode: tREV
7479
/* 928 */     MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 950
7480
/* 933 */     MCD_OPC_CheckPredicate, 31, 24, 1, 0, // Skip to: 1218
7481
/* 938 */     MCD_OPC_CheckField, 9, 1, 1, 17, 1, 0, // Skip to: 1218
7482
/* 945 */     MCD_OPC_Decode, 246, 24, 207, 1, // Opcode: tREV16
7483
/* 950 */     MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 972
7484
/* 955 */     MCD_OPC_CheckPredicate, 35, 2, 1, 0, // Skip to: 1218
7485
/* 960 */     MCD_OPC_CheckField, 9, 1, 1, 251, 0, 0, // Skip to: 1218
7486
/* 967 */     MCD_OPC_Decode, 217, 24, 224, 1, // Opcode: tHLT
7487
/* 972 */     MCD_OPC_FilterValue, 3, 241, 0, 0, // Skip to: 1218
7488
/* 977 */     MCD_OPC_CheckPredicate, 31, 236, 0, 0, // Skip to: 1218
7489
/* 982 */     MCD_OPC_CheckField, 9, 1, 1, 229, 0, 0, // Skip to: 1218
7490
/* 989 */     MCD_OPC_Decode, 247, 24, 207, 1, // Opcode: tREVSH
7491
/* 994 */     MCD_OPC_FilterValue, 1, 219, 0, 0, // Skip to: 1218
7492
/* 999 */     MCD_OPC_CheckPredicate, 32, 214, 0, 0, // Skip to: 1218
7493
/* 1004 */    MCD_OPC_Decode, 208, 24, 220, 1, // Opcode: tCBNZ
7494
/* 1009 */    MCD_OPC_FilterValue, 3, 204, 0, 0, // Skip to: 1218
7495
/* 1014 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
7496
/* 1017 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1032
7497
/* 1022 */    MCD_OPC_CheckPredicate, 28, 191, 0, 0, // Skip to: 1218
7498
/* 1027 */    MCD_OPC_Decode, 243, 24, 225, 1, // Opcode: tPOP
7499
/* 1032 */    MCD_OPC_FilterValue, 1, 181, 0, 0, // Skip to: 1218
7500
/* 1037 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
7501
/* 1040 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1055
7502
/* 1045 */    MCD_OPC_CheckPredicate, 28, 168, 0, 0, // Skip to: 1218
7503
/* 1050 */    MCD_OPC_Decode, 200, 24, 226, 1, // Opcode: tBKPT
7504
/* 1055 */    MCD_OPC_FilterValue, 1, 158, 0, 0, // Skip to: 1218
7505
/* 1060 */    MCD_OPC_CheckPredicate, 36, 153, 0, 0, // Skip to: 1218
7506
/* 1065 */    MCD_OPC_CheckField, 0, 4, 0, 146, 0, 0, // Skip to: 1218
7507
/* 1072 */    MCD_OPC_Decode, 216, 24, 227, 1, // Opcode: tHINT
7508
/* 1077 */    MCD_OPC_FilterValue, 12, 33, 0, 0, // Skip to: 1115
7509
/* 1082 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
7510
/* 1085 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1100
7511
/* 1090 */    MCD_OPC_CheckPredicate, 28, 123, 0, 0, // Skip to: 1218
7512
/* 1095 */    MCD_OPC_Decode, 252, 24, 228, 1, // Opcode: tSTMIA_UPD
7513
/* 1100 */    MCD_OPC_FilterValue, 1, 113, 0, 0, // Skip to: 1218
7514
/* 1105 */    MCD_OPC_CheckPredicate, 28, 108, 0, 0, // Skip to: 1218
7515
/* 1110 */    MCD_OPC_Decode, 221, 24, 229, 1, // Opcode: tLDMIA
7516
/* 1115 */    MCD_OPC_FilterValue, 13, 76, 0, 0, // Skip to: 1196
7517
/* 1120 */    MCD_OPC_ExtractField, 0, 12,  // Inst{11-0} ...
7518
/* 1123 */    MCD_OPC_FilterValue, 249, 29, 9, 0, 0, // Skip to: 1138
7519
/* 1129 */    MCD_OPC_CheckPredicate, 28, 19, 0, 0, // Skip to: 1153
7520
/* 1134 */    MCD_OPC_Decode, 144, 25, 51, // Opcode: t__brkdiv0
7521
/* 1138 */    MCD_OPC_FilterValue, 254, 29, 9, 0, 0, // Skip to: 1153
7522
/* 1144 */    MCD_OPC_CheckPredicate, 28, 4, 0, 0, // Skip to: 1153
7523
/* 1149 */    MCD_OPC_Decode, 139, 25, 51, // Opcode: tTRAP
7524
/* 1153 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
7525
/* 1156 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1171
7526
/* 1161 */    MCD_OPC_CheckPredicate, 28, 20, 0, 0, // Skip to: 1186
7527
/* 1166 */    MCD_OPC_Decode, 141, 25, 226, 1, // Opcode: tUDF
7528
/* 1171 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 1186
7529
/* 1176 */    MCD_OPC_CheckPredicate, 28, 5, 0, 0, // Skip to: 1186
7530
/* 1181 */    MCD_OPC_Decode, 136, 25, 226, 1, // Opcode: tSVC
7531
/* 1186 */    MCD_OPC_CheckPredicate, 28, 27, 0, 0, // Skip to: 1218
7532
/* 1191 */    MCD_OPC_Decode, 207, 24, 230, 1, // Opcode: tBcc
7533
/* 1196 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 1218
7534
/* 1201 */    MCD_OPC_CheckPredicate, 28, 12, 0, 0, // Skip to: 1218
7535
/* 1206 */    MCD_OPC_CheckField, 11, 1, 0, 5, 0, 0, // Skip to: 1218
7536
/* 1213 */    MCD_OPC_Decode, 198, 24, 231, 1, // Opcode: tB
7537
/* 1218 */    MCD_OPC_Fail,
7538
  0
7539
};
7540
7541
static const uint8_t DecoderTableThumb32[] = {
7542
/* 0 */       MCD_OPC_ExtractField, 12, 1,  // Inst{12} ...
7543
/* 3 */       MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 39
7544
/* 8 */       MCD_OPC_CheckPredicate, 37, 55, 0, 0, // Skip to: 68
7545
/* 13 */      MCD_OPC_CheckField, 27, 5, 30, 48, 0, 0, // Skip to: 68
7546
/* 20 */      MCD_OPC_CheckField, 14, 2, 3, 41, 0, 0, // Skip to: 68
7547
/* 27 */      MCD_OPC_CheckField, 0, 1, 0, 34, 0, 0, // Skip to: 68
7548
/* 34 */      MCD_OPC_Decode, 203, 24, 232, 1, // Opcode: tBLXi
7549
/* 39 */      MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 68
7550
/* 44 */      MCD_OPC_CheckPredicate, 28, 19, 0, 0, // Skip to: 68
7551
/* 49 */      MCD_OPC_CheckField, 27, 5, 30, 12, 0, 0, // Skip to: 68
7552
/* 56 */      MCD_OPC_CheckField, 14, 2, 3, 5, 0, 0, // Skip to: 68
7553
/* 63 */      MCD_OPC_Decode, 201, 24, 233, 1, // Opcode: tBL
7554
/* 68 */      MCD_OPC_Fail,
7555
  0
7556
};
7557
7558
static const uint8_t DecoderTableThumb216[] = {
7559
/* 0 */       MCD_OPC_CheckPredicate, 38, 13, 0, 0, // Skip to: 18
7560
/* 5 */       MCD_OPC_CheckField, 8, 8, 191, 1, 5, 0, 0, // Skip to: 18
7561
/* 13 */      MCD_OPC_Decode, 250, 21, 234, 1, // Opcode: t2IT
7562
/* 18 */      MCD_OPC_Fail,
7563
  0
7564
};
7565
7566
static const uint8_t DecoderTableThumb232[] = {
7567
/* 0 */       MCD_OPC_ExtractField, 27, 5,  // Inst{31-27} ...
7568
/* 3 */       MCD_OPC_FilterValue, 29, 124, 8, 0, // Skip to: 2180
7569
/* 8 */       MCD_OPC_ExtractField, 21, 2,  // Inst{22-21} ...
7570
/* 11 */      MCD_OPC_FilterValue, 0, 223, 1, 0, // Skip to: 495
7571
/* 16 */      MCD_OPC_ExtractField, 23, 4,  // Inst{26-23} ...
7572
/* 19 */      MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 73
7573
/* 24 */      MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7574
/* 27 */      MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 50
7575
/* 32 */      MCD_OPC_CheckPredicate, 39, 210, 31, 0, // Skip to: 8183
7576
/* 37 */      MCD_OPC_CheckField, 5, 15, 128, 220, 1, 201, 31, 0, // Skip to: 8183
7577
/* 46 */      MCD_OPC_Decode, 194, 23, 83, // Opcode: t2SRSDB
7578
/* 50 */      MCD_OPC_FilterValue, 1, 192, 31, 0, // Skip to: 8183
7579
/* 55 */      MCD_OPC_CheckPredicate, 39, 187, 31, 0, // Skip to: 8183
7580
/* 60 */      MCD_OPC_CheckField, 0, 16, 128, 128, 3, 178, 31, 0, // Skip to: 8183
7581
/* 69 */      MCD_OPC_Decode, 130, 23, 81, // Opcode: t2RFEDB
7582
/* 73 */      MCD_OPC_FilterValue, 1, 47, 0, 0, // Skip to: 125
7583
/* 78 */      MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7584
/* 81 */      MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 110
7585
/* 86 */      MCD_OPC_CheckPredicate, 38, 156, 31, 0, // Skip to: 8183
7586
/* 91 */      MCD_OPC_CheckField, 15, 1, 0, 149, 31, 0, // Skip to: 8183
7587
/* 98 */      MCD_OPC_CheckField, 13, 1, 0, 142, 31, 0, // Skip to: 8183
7588
/* 105 */     MCD_OPC_Decode, 228, 23, 235, 1, // Opcode: t2STMIA
7589
/* 110 */     MCD_OPC_FilterValue, 1, 132, 31, 0, // Skip to: 8183
7590
/* 115 */     MCD_OPC_CheckPredicate, 38, 127, 31, 0, // Skip to: 8183
7591
/* 120 */     MCD_OPC_Decode, 150, 22, 236, 1, // Opcode: t2LDMIA
7592
/* 125 */     MCD_OPC_FilterValue, 2, 47, 0, 0, // Skip to: 177
7593
/* 130 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7594
/* 133 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 162
7595
/* 138 */     MCD_OPC_CheckPredicate, 38, 104, 31, 0, // Skip to: 8183
7596
/* 143 */     MCD_OPC_CheckField, 15, 1, 0, 97, 31, 0, // Skip to: 8183
7597
/* 150 */     MCD_OPC_CheckField, 13, 1, 0, 90, 31, 0, // Skip to: 8183
7598
/* 157 */     MCD_OPC_Decode, 226, 23, 235, 1, // Opcode: t2STMDB
7599
/* 162 */     MCD_OPC_FilterValue, 1, 80, 31, 0, // Skip to: 8183
7600
/* 167 */     MCD_OPC_CheckPredicate, 38, 75, 31, 0, // Skip to: 8183
7601
/* 172 */     MCD_OPC_Decode, 148, 22, 236, 1, // Opcode: t2LDMDB
7602
/* 177 */     MCD_OPC_FilterValue, 3, 49, 0, 0, // Skip to: 231
7603
/* 182 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7604
/* 185 */     MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 208
7605
/* 190 */     MCD_OPC_CheckPredicate, 39, 52, 31, 0, // Skip to: 8183
7606
/* 195 */     MCD_OPC_CheckField, 5, 15, 128, 220, 1, 43, 31, 0, // Skip to: 8183
7607
/* 204 */     MCD_OPC_Decode, 196, 23, 83, // Opcode: t2SRSIA
7608
/* 208 */     MCD_OPC_FilterValue, 1, 34, 31, 0, // Skip to: 8183
7609
/* 213 */     MCD_OPC_CheckPredicate, 39, 29, 31, 0, // Skip to: 8183
7610
/* 218 */     MCD_OPC_CheckField, 0, 16, 128, 128, 3, 20, 31, 0, // Skip to: 8183
7611
/* 227 */     MCD_OPC_Decode, 132, 23, 81, // Opcode: t2RFEIA
7612
/* 231 */     MCD_OPC_FilterValue, 4, 83, 0, 0, // Skip to: 319
7613
/* 236 */     MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 261
7614
/* 241 */     MCD_OPC_CheckField, 20, 1, 1, 13, 0, 0, // Skip to: 261
7615
/* 248 */     MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, 0, // Skip to: 261
7616
/* 256 */     MCD_OPC_Decode, 145, 24, 237, 1, // Opcode: t2TSTrr
7617
/* 261 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 285
7618
/* 266 */     MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 285
7619
/* 273 */     MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 285
7620
/* 280 */     MCD_OPC_Decode, 146, 24, 238, 1, // Opcode: t2TSTrs
7621
/* 285 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 309
7622
/* 290 */     MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 309
7623
/* 297 */     MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 309
7624
/* 304 */     MCD_OPC_Decode, 207, 21, 239, 1, // Opcode: t2ANDrr
7625
/* 309 */     MCD_OPC_CheckPredicate, 38, 189, 30, 0, // Skip to: 8183
7626
/* 314 */     MCD_OPC_Decode, 208, 21, 240, 1, // Opcode: t2ANDrs
7627
/* 319 */     MCD_OPC_FilterValue, 5, 83, 0, 0, // Skip to: 407
7628
/* 324 */     MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 349
7629
/* 329 */     MCD_OPC_CheckField, 20, 1, 1, 13, 0, 0, // Skip to: 349
7630
/* 336 */     MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, 0, // Skip to: 349
7631
/* 344 */     MCD_OPC_Decode, 141, 24, 237, 1, // Opcode: t2TEQrr
7632
/* 349 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 373
7633
/* 354 */     MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 373
7634
/* 361 */     MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 373
7635
/* 368 */     MCD_OPC_Decode, 142, 24, 238, 1, // Opcode: t2TEQrs
7636
/* 373 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 397
7637
/* 378 */     MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 397
7638
/* 385 */     MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 397
7639
/* 392 */     MCD_OPC_Decode, 245, 21, 239, 1, // Opcode: t2EORrr
7640
/* 397 */     MCD_OPC_CheckPredicate, 38, 101, 30, 0, // Skip to: 8183
7641
/* 402 */     MCD_OPC_Decode, 246, 21, 240, 1, // Opcode: t2EORrs
7642
/* 407 */     MCD_OPC_FilterValue, 6, 91, 30, 0, // Skip to: 8183
7643
/* 412 */     MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 437
7644
/* 417 */     MCD_OPC_CheckField, 20, 1, 1, 13, 0, 0, // Skip to: 437
7645
/* 424 */     MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, 0, // Skip to: 437
7646
/* 432 */     MCD_OPC_Decode, 224, 21, 237, 1, // Opcode: t2CMNzrr
7647
/* 437 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 461
7648
/* 442 */     MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 461
7649
/* 449 */     MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 461
7650
/* 456 */     MCD_OPC_Decode, 225, 21, 238, 1, // Opcode: t2CMNzrs
7651
/* 461 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 485
7652
/* 466 */     MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 485
7653
/* 473 */     MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 485
7654
/* 480 */     MCD_OPC_Decode, 203, 21, 241, 1, // Opcode: t2ADDrr
7655
/* 485 */     MCD_OPC_CheckPredicate, 38, 13, 30, 0, // Skip to: 8183
7656
/* 490 */     MCD_OPC_Decode, 204, 21, 242, 1, // Opcode: t2ADDrs
7657
/* 495 */     MCD_OPC_FilterValue, 1, 86, 1, 0, // Skip to: 842
7658
/* 500 */     MCD_OPC_ExtractField, 23, 4,  // Inst{26-23} ...
7659
/* 503 */     MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 557
7660
/* 508 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7661
/* 511 */     MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 534
7662
/* 516 */     MCD_OPC_CheckPredicate, 39, 238, 29, 0, // Skip to: 8183
7663
/* 521 */     MCD_OPC_CheckField, 5, 15, 128, 220, 1, 229, 29, 0, // Skip to: 8183
7664
/* 530 */     MCD_OPC_Decode, 195, 23, 83, // Opcode: t2SRSDB_UPD
7665
/* 534 */     MCD_OPC_FilterValue, 1, 220, 29, 0, // Skip to: 8183
7666
/* 539 */     MCD_OPC_CheckPredicate, 39, 215, 29, 0, // Skip to: 8183
7667
/* 544 */     MCD_OPC_CheckField, 0, 16, 128, 128, 3, 206, 29, 0, // Skip to: 8183
7668
/* 553 */     MCD_OPC_Decode, 131, 23, 81, // Opcode: t2RFEDBW
7669
/* 557 */     MCD_OPC_FilterValue, 1, 47, 0, 0, // Skip to: 609
7670
/* 562 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7671
/* 565 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 594
7672
/* 570 */     MCD_OPC_CheckPredicate, 38, 184, 29, 0, // Skip to: 8183
7673
/* 575 */     MCD_OPC_CheckField, 15, 1, 0, 177, 29, 0, // Skip to: 8183
7674
/* 582 */     MCD_OPC_CheckField, 13, 1, 0, 170, 29, 0, // Skip to: 8183
7675
/* 589 */     MCD_OPC_Decode, 229, 23, 243, 1, // Opcode: t2STMIA_UPD
7676
/* 594 */     MCD_OPC_FilterValue, 1, 160, 29, 0, // Skip to: 8183
7677
/* 599 */     MCD_OPC_CheckPredicate, 38, 155, 29, 0, // Skip to: 8183
7678
/* 604 */     MCD_OPC_Decode, 151, 22, 244, 1, // Opcode: t2LDMIA_UPD
7679
/* 609 */     MCD_OPC_FilterValue, 2, 47, 0, 0, // Skip to: 661
7680
/* 614 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7681
/* 617 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 646
7682
/* 622 */     MCD_OPC_CheckPredicate, 38, 132, 29, 0, // Skip to: 8183
7683
/* 627 */     MCD_OPC_CheckField, 15, 1, 0, 125, 29, 0, // Skip to: 8183
7684
/* 634 */     MCD_OPC_CheckField, 13, 1, 0, 118, 29, 0, // Skip to: 8183
7685
/* 641 */     MCD_OPC_Decode, 227, 23, 243, 1, // Opcode: t2STMDB_UPD
7686
/* 646 */     MCD_OPC_FilterValue, 1, 108, 29, 0, // Skip to: 8183
7687
/* 651 */     MCD_OPC_CheckPredicate, 38, 103, 29, 0, // Skip to: 8183
7688
/* 656 */     MCD_OPC_Decode, 149, 22, 244, 1, // Opcode: t2LDMDB_UPD
7689
/* 661 */     MCD_OPC_FilterValue, 3, 49, 0, 0, // Skip to: 715
7690
/* 666 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7691
/* 669 */     MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 692
7692
/* 674 */     MCD_OPC_CheckPredicate, 39, 80, 29, 0, // Skip to: 8183
7693
/* 679 */     MCD_OPC_CheckField, 5, 15, 128, 220, 1, 71, 29, 0, // Skip to: 8183
7694
/* 688 */     MCD_OPC_Decode, 197, 23, 83, // Opcode: t2SRSIA_UPD
7695
/* 692 */     MCD_OPC_FilterValue, 1, 62, 29, 0, // Skip to: 8183
7696
/* 697 */     MCD_OPC_CheckPredicate, 39, 57, 29, 0, // Skip to: 8183
7697
/* 702 */     MCD_OPC_CheckField, 0, 16, 128, 128, 3, 48, 29, 0, // Skip to: 8183
7698
/* 711 */     MCD_OPC_Decode, 133, 23, 81, // Opcode: t2RFEIAW
7699
/* 715 */     MCD_OPC_FilterValue, 4, 34, 0, 0, // Skip to: 754
7700
/* 720 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 744
7701
/* 725 */     MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 744
7702
/* 732 */     MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 744
7703
/* 739 */     MCD_OPC_Decode, 215, 21, 239, 1, // Opcode: t2BICrr
7704
/* 744 */     MCD_OPC_CheckPredicate, 38, 10, 29, 0, // Skip to: 8183
7705
/* 749 */     MCD_OPC_Decode, 216, 21, 240, 1, // Opcode: t2BICrs
7706
/* 754 */     MCD_OPC_FilterValue, 7, 0, 29, 0, // Skip to: 8183
7707
/* 759 */     MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 784
7708
/* 764 */     MCD_OPC_CheckField, 20, 1, 1, 13, 0, 0, // Skip to: 784
7709
/* 771 */     MCD_OPC_CheckField, 4, 11, 240, 1, 5, 0, 0, // Skip to: 784
7710
/* 779 */     MCD_OPC_Decode, 227, 21, 237, 1, // Opcode: t2CMPrr
7711
/* 784 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 808
7712
/* 789 */     MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 808
7713
/* 796 */     MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 808
7714
/* 803 */     MCD_OPC_Decode, 228, 21, 238, 1, // Opcode: t2CMPrs
7715
/* 808 */     MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 832
7716
/* 813 */     MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 832
7717
/* 820 */     MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 832
7718
/* 827 */     MCD_OPC_Decode, 130, 24, 241, 1, // Opcode: t2SUBrr
7719
/* 832 */     MCD_OPC_CheckPredicate, 38, 178, 28, 0, // Skip to: 8183
7720
/* 837 */     MCD_OPC_Decode, 131, 24, 242, 1, // Opcode: t2SUBrs
7721
/* 842 */     MCD_OPC_FilterValue, 2, 70, 4, 0, // Skip to: 1941
7722
/* 847 */     MCD_OPC_ExtractField, 24, 3,  // Inst{26-24} ...
7723
/* 850 */     MCD_OPC_FilterValue, 0, 212, 2, 0, // Skip to: 1579
7724
/* 855 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7725
/* 858 */     MCD_OPC_FilterValue, 0, 100, 1, 0, // Skip to: 1219
7726
/* 863 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7727
/* 866 */     MCD_OPC_FilterValue, 0, 113, 0, 0, // Skip to: 984
7728
/* 871 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
7729
/* 874 */     MCD_OPC_FilterValue, 0, 20, 0, 0, // Skip to: 899
7730
/* 879 */     MCD_OPC_CheckPredicate, 29, 90, 0, 0, // Skip to: 974
7731
/* 884 */     MCD_OPC_CheckField, 12, 4, 15, 83, 0, 0, // Skip to: 974
7732
/* 891 */     MCD_OPC_SoftFail, 63, 0,
7733
/* 894 */     MCD_OPC_Decode, 147, 24, 245, 1, // Opcode: t2TT
7734
/* 899 */     MCD_OPC_FilterValue, 1, 20, 0, 0, // Skip to: 924
7735
/* 904 */     MCD_OPC_CheckPredicate, 29, 65, 0, 0, // Skip to: 974
7736
/* 909 */     MCD_OPC_CheckField, 12, 4, 15, 58, 0, 0, // Skip to: 974
7737
/* 916 */     MCD_OPC_SoftFail, 63, 0,
7738
/* 919 */     MCD_OPC_Decode, 150, 24, 245, 1, // Opcode: t2TTT
7739
/* 924 */     MCD_OPC_FilterValue, 2, 20, 0, 0, // Skip to: 949
7740
/* 929 */     MCD_OPC_CheckPredicate, 29, 40, 0, 0, // Skip to: 974
7741
/* 934 */     MCD_OPC_CheckField, 12, 4, 15, 33, 0, 0, // Skip to: 974
7742
/* 941 */     MCD_OPC_SoftFail, 63, 0,
7743
/* 944 */     MCD_OPC_Decode, 148, 24, 245, 1, // Opcode: t2TTA
7744
/* 949 */     MCD_OPC_FilterValue, 3, 20, 0, 0, // Skip to: 974
7745
/* 954 */     MCD_OPC_CheckPredicate, 29, 15, 0, 0, // Skip to: 974
7746
/* 959 */     MCD_OPC_CheckField, 12, 4, 15, 8, 0, 0, // Skip to: 974
7747
/* 966 */     MCD_OPC_SoftFail, 63, 0,
7748
/* 969 */     MCD_OPC_Decode, 149, 24, 245, 1, // Opcode: t2TTAT
7749
/* 974 */     MCD_OPC_CheckPredicate, 32, 36, 28, 0, // Skip to: 8183
7750
/* 979 */     MCD_OPC_Decode, 239, 23, 246, 1, // Opcode: t2STREX
7751
/* 984 */     MCD_OPC_FilterValue, 1, 26, 28, 0, // Skip to: 8183
7752
/* 989 */     MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
7753
/* 992 */     MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 1014
7754
/* 997 */     MCD_OPC_CheckPredicate, 32, 13, 28, 0, // Skip to: 8183
7755
/* 1002 */    MCD_OPC_CheckField, 8, 4, 15, 6, 28, 0, // Skip to: 8183
7756
/* 1009 */    MCD_OPC_Decode, 240, 23, 247, 1, // Opcode: t2STREXB
7757
/* 1014 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 1036
7758
/* 1019 */    MCD_OPC_CheckPredicate, 32, 247, 27, 0, // Skip to: 8183
7759
/* 1024 */    MCD_OPC_CheckField, 8, 4, 15, 240, 27, 0, // Skip to: 8183
7760
/* 1031 */    MCD_OPC_Decode, 242, 23, 247, 1, // Opcode: t2STREXH
7761
/* 1036 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 1051
7762
/* 1041 */    MCD_OPC_CheckPredicate, 39, 225, 27, 0, // Skip to: 8183
7763
/* 1046 */    MCD_OPC_Decode, 241, 23, 248, 1, // Opcode: t2STREXD
7764
/* 1051 */    MCD_OPC_FilterValue, 8, 24, 0, 0, // Skip to: 1080
7765
/* 1056 */    MCD_OPC_CheckPredicate, 40, 210, 27, 0, // Skip to: 8183
7766
/* 1061 */    MCD_OPC_CheckField, 8, 4, 15, 203, 27, 0, // Skip to: 8183
7767
/* 1068 */    MCD_OPC_CheckField, 0, 4, 15, 196, 27, 0, // Skip to: 8183
7768
/* 1075 */    MCD_OPC_Decode, 220, 23, 249, 1, // Opcode: t2STLB
7769
/* 1080 */    MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 1109
7770
/* 1085 */    MCD_OPC_CheckPredicate, 40, 181, 27, 0, // Skip to: 8183
7771
/* 1090 */    MCD_OPC_CheckField, 8, 4, 15, 174, 27, 0, // Skip to: 8183
7772
/* 1097 */    MCD_OPC_CheckField, 0, 4, 15, 167, 27, 0, // Skip to: 8183
7773
/* 1104 */    MCD_OPC_Decode, 225, 23, 249, 1, // Opcode: t2STLH
7774
/* 1109 */    MCD_OPC_FilterValue, 10, 24, 0, 0, // Skip to: 1138
7775
/* 1114 */    MCD_OPC_CheckPredicate, 40, 152, 27, 0, // Skip to: 8183
7776
/* 1119 */    MCD_OPC_CheckField, 8, 4, 15, 145, 27, 0, // Skip to: 8183
7777
/* 1126 */    MCD_OPC_CheckField, 0, 4, 15, 138, 27, 0, // Skip to: 8183
7778
/* 1133 */    MCD_OPC_Decode, 219, 23, 249, 1, // Opcode: t2STL
7779
/* 1138 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 1160
7780
/* 1143 */    MCD_OPC_CheckPredicate, 41, 123, 27, 0, // Skip to: 8183
7781
/* 1148 */    MCD_OPC_CheckField, 8, 4, 15, 116, 27, 0, // Skip to: 8183
7782
/* 1155 */    MCD_OPC_Decode, 222, 23, 247, 1, // Opcode: t2STLEXB
7783
/* 1160 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 1182
7784
/* 1165 */    MCD_OPC_CheckPredicate, 41, 101, 27, 0, // Skip to: 8183
7785
/* 1170 */    MCD_OPC_CheckField, 8, 4, 15, 94, 27, 0, // Skip to: 8183
7786
/* 1177 */    MCD_OPC_Decode, 224, 23, 247, 1, // Opcode: t2STLEXH
7787
/* 1182 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 1204
7788
/* 1187 */    MCD_OPC_CheckPredicate, 41, 79, 27, 0, // Skip to: 8183
7789
/* 1192 */    MCD_OPC_CheckField, 8, 4, 15, 72, 27, 0, // Skip to: 8183
7790
/* 1199 */    MCD_OPC_Decode, 221, 23, 247, 1, // Opcode: t2STLEX
7791
/* 1204 */    MCD_OPC_FilterValue, 15, 62, 27, 0, // Skip to: 8183
7792
/* 1209 */    MCD_OPC_CheckPredicate, 42, 57, 27, 0, // Skip to: 8183
7793
/* 1214 */    MCD_OPC_Decode, 223, 23, 248, 1, // Opcode: t2STLEXD
7794
/* 1219 */    MCD_OPC_FilterValue, 1, 47, 27, 0, // Skip to: 8183
7795
/* 1224 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7796
/* 1227 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1249
7797
/* 1232 */    MCD_OPC_CheckPredicate, 32, 34, 27, 0, // Skip to: 8183
7798
/* 1237 */    MCD_OPC_CheckField, 8, 4, 15, 27, 27, 0, // Skip to: 8183
7799
/* 1244 */    MCD_OPC_Decode, 162, 22, 250, 1, // Opcode: t2LDREX
7800
/* 1249 */    MCD_OPC_FilterValue, 1, 17, 27, 0, // Skip to: 8183
7801
/* 1254 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
7802
/* 1257 */    MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 1280
7803
/* 1262 */    MCD_OPC_CheckPredicate, 38, 4, 27, 0, // Skip to: 8183
7804
/* 1267 */    MCD_OPC_CheckField, 8, 8, 240, 1, 252, 26, 0, // Skip to: 8183
7805
/* 1275 */    MCD_OPC_Decode, 138, 24, 251, 1, // Opcode: t2TBB
7806
/* 1280 */    MCD_OPC_FilterValue, 1, 18, 0, 0, // Skip to: 1303
7807
/* 1285 */    MCD_OPC_CheckPredicate, 38, 237, 26, 0, // Skip to: 8183
7808
/* 1290 */    MCD_OPC_CheckField, 8, 8, 240, 1, 229, 26, 0, // Skip to: 8183
7809
/* 1298 */    MCD_OPC_Decode, 139, 24, 251, 1, // Opcode: t2TBH
7810
/* 1303 */    MCD_OPC_FilterValue, 4, 24, 0, 0, // Skip to: 1332
7811
/* 1308 */    MCD_OPC_CheckPredicate, 32, 214, 26, 0, // Skip to: 8183
7812
/* 1313 */    MCD_OPC_CheckField, 8, 4, 15, 207, 26, 0, // Skip to: 8183
7813
/* 1320 */    MCD_OPC_CheckField, 0, 4, 15, 200, 26, 0, // Skip to: 8183
7814
/* 1327 */    MCD_OPC_Decode, 163, 22, 249, 1, // Opcode: t2LDREXB
7815
/* 1332 */    MCD_OPC_FilterValue, 5, 24, 0, 0, // Skip to: 1361
7816
/* 1337 */    MCD_OPC_CheckPredicate, 32, 185, 26, 0, // Skip to: 8183
7817
/* 1342 */    MCD_OPC_CheckField, 8, 4, 15, 178, 26, 0, // Skip to: 8183
7818
/* 1349 */    MCD_OPC_CheckField, 0, 4, 15, 171, 26, 0, // Skip to: 8183
7819
/* 1356 */    MCD_OPC_Decode, 165, 22, 249, 1, // Opcode: t2LDREXH
7820
/* 1361 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 1383
7821
/* 1366 */    MCD_OPC_CheckPredicate, 39, 156, 26, 0, // Skip to: 8183
7822
/* 1371 */    MCD_OPC_CheckField, 0, 4, 15, 149, 26, 0, // Skip to: 8183
7823
/* 1378 */    MCD_OPC_Decode, 164, 22, 252, 1, // Opcode: t2LDREXD
7824
/* 1383 */    MCD_OPC_FilterValue, 8, 24, 0, 0, // Skip to: 1412
7825
/* 1388 */    MCD_OPC_CheckPredicate, 40, 134, 26, 0, // Skip to: 8183
7826
/* 1393 */    MCD_OPC_CheckField, 8, 4, 15, 127, 26, 0, // Skip to: 8183
7827
/* 1400 */    MCD_OPC_CheckField, 0, 4, 15, 120, 26, 0, // Skip to: 8183
7828
/* 1407 */    MCD_OPC_Decode, 254, 21, 249, 1, // Opcode: t2LDAB
7829
/* 1412 */    MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 1441
7830
/* 1417 */    MCD_OPC_CheckPredicate, 40, 105, 26, 0, // Skip to: 8183
7831
/* 1422 */    MCD_OPC_CheckField, 8, 4, 15, 98, 26, 0, // Skip to: 8183
7832
/* 1429 */    MCD_OPC_CheckField, 0, 4, 15, 91, 26, 0, // Skip to: 8183
7833
/* 1436 */    MCD_OPC_Decode, 131, 22, 249, 1, // Opcode: t2LDAH
7834
/* 1441 */    MCD_OPC_FilterValue, 10, 24, 0, 0, // Skip to: 1470
7835
/* 1446 */    MCD_OPC_CheckPredicate, 40, 76, 26, 0, // Skip to: 8183
7836
/* 1451 */    MCD_OPC_CheckField, 8, 4, 15, 69, 26, 0, // Skip to: 8183
7837
/* 1458 */    MCD_OPC_CheckField, 0, 4, 15, 62, 26, 0, // Skip to: 8183
7838
/* 1465 */    MCD_OPC_Decode, 253, 21, 249, 1, // Opcode: t2LDA
7839
/* 1470 */    MCD_OPC_FilterValue, 12, 24, 0, 0, // Skip to: 1499
7840
/* 1475 */    MCD_OPC_CheckPredicate, 41, 47, 26, 0, // Skip to: 8183
7841
/* 1480 */    MCD_OPC_CheckField, 8, 4, 15, 40, 26, 0, // Skip to: 8183
7842
/* 1487 */    MCD_OPC_CheckField, 0, 4, 15, 33, 26, 0, // Skip to: 8183
7843
/* 1494 */    MCD_OPC_Decode, 128, 22, 249, 1, // Opcode: t2LDAEXB
7844
/* 1499 */    MCD_OPC_FilterValue, 13, 24, 0, 0, // Skip to: 1528
7845
/* 1504 */    MCD_OPC_CheckPredicate, 41, 18, 26, 0, // Skip to: 8183
7846
/* 1509 */    MCD_OPC_CheckField, 8, 4, 15, 11, 26, 0, // Skip to: 8183
7847
/* 1516 */    MCD_OPC_CheckField, 0, 4, 15, 4, 26, 0, // Skip to: 8183
7848
/* 1523 */    MCD_OPC_Decode, 130, 22, 249, 1, // Opcode: t2LDAEXH
7849
/* 1528 */    MCD_OPC_FilterValue, 14, 24, 0, 0, // Skip to: 1557
7850
/* 1533 */    MCD_OPC_CheckPredicate, 41, 245, 25, 0, // Skip to: 8183
7851
/* 1538 */    MCD_OPC_CheckField, 8, 4, 15, 238, 25, 0, // Skip to: 8183
7852
/* 1545 */    MCD_OPC_CheckField, 0, 4, 15, 231, 25, 0, // Skip to: 8183
7853
/* 1552 */    MCD_OPC_Decode, 255, 21, 249, 1, // Opcode: t2LDAEX
7854
/* 1557 */    MCD_OPC_FilterValue, 15, 221, 25, 0, // Skip to: 8183
7855
/* 1562 */    MCD_OPC_CheckPredicate, 42, 216, 25, 0, // Skip to: 8183
7856
/* 1567 */    MCD_OPC_CheckField, 0, 4, 15, 209, 25, 0, // Skip to: 8183
7857
/* 1574 */    MCD_OPC_Decode, 129, 22, 252, 1, // Opcode: t2LDAEXD
7858
/* 1579 */    MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 1617
7859
/* 1584 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7860
/* 1587 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1602
7861
/* 1592 */    MCD_OPC_CheckPredicate, 38, 186, 25, 0, // Skip to: 8183
7862
/* 1597 */    MCD_OPC_Decode, 238, 23, 253, 1, // Opcode: t2STRDi8
7863
/* 1602 */    MCD_OPC_FilterValue, 1, 176, 25, 0, // Skip to: 8183
7864
/* 1607 */    MCD_OPC_CheckPredicate, 38, 171, 25, 0, // Skip to: 8183
7865
/* 1612 */    MCD_OPC_Decode, 161, 22, 253, 1, // Opcode: t2LDRDi8
7866
/* 1617 */    MCD_OPC_FilterValue, 2, 233, 0, 0, // Skip to: 1855
7867
/* 1622 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7868
/* 1625 */    MCD_OPC_FilterValue, 0, 173, 0, 0, // Skip to: 1803
7869
/* 1630 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
7870
/* 1633 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 1673
7871
/* 1638 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
7872
/* 1641 */    MCD_OPC_FilterValue, 0, 56, 0, 0, // Skip to: 1702
7873
/* 1646 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 1663
7874
/* 1651 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 1663
7875
/* 1658 */    MCD_OPC_Decode, 207, 22, 254, 1, // Opcode: t2MOVr
7876
/* 1663 */    MCD_OPC_CheckPredicate, 38, 34, 0, 0, // Skip to: 1702
7877
/* 1668 */    MCD_OPC_Decode, 229, 22, 239, 1, // Opcode: t2ORRrr
7878
/* 1673 */    MCD_OPC_FilterValue, 3, 24, 0, 0, // Skip to: 1702
7879
/* 1678 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 1702
7880
/* 1683 */    MCD_OPC_CheckField, 16, 4, 15, 12, 0, 0, // Skip to: 1702
7881
/* 1690 */    MCD_OPC_CheckField, 12, 3, 0, 5, 0, 0, // Skip to: 1702
7882
/* 1697 */    MCD_OPC_Decode, 136, 23, 255, 1, // Opcode: t2RRX
7883
/* 1702 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
7884
/* 1705 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1727
7885
/* 1710 */    MCD_OPC_CheckPredicate, 38, 78, 0, 0, // Skip to: 1793
7886
/* 1715 */    MCD_OPC_CheckField, 16, 4, 15, 71, 0, 0, // Skip to: 1793
7887
/* 1722 */    MCD_OPC_Decode, 194, 22, 128, 2, // Opcode: t2LSLri
7888
/* 1727 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 1749
7889
/* 1732 */    MCD_OPC_CheckPredicate, 38, 56, 0, 0, // Skip to: 1793
7890
/* 1737 */    MCD_OPC_CheckField, 16, 4, 15, 49, 0, 0, // Skip to: 1793
7891
/* 1744 */    MCD_OPC_Decode, 196, 22, 128, 2, // Opcode: t2LSRri
7892
/* 1749 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 1771
7893
/* 1754 */    MCD_OPC_CheckPredicate, 38, 34, 0, 0, // Skip to: 1793
7894
/* 1759 */    MCD_OPC_CheckField, 16, 4, 15, 27, 0, 0, // Skip to: 1793
7895
/* 1766 */    MCD_OPC_Decode, 209, 21, 128, 2, // Opcode: t2ASRri
7896
/* 1771 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 1793
7897
/* 1776 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 1793
7898
/* 1781 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 1793
7899
/* 1788 */    MCD_OPC_Decode, 134, 23, 128, 2, // Opcode: t2RORri
7900
/* 1793 */    MCD_OPC_CheckPredicate, 38, 241, 24, 0, // Skip to: 8183
7901
/* 1798 */    MCD_OPC_Decode, 230, 22, 240, 1, // Opcode: t2ORRrs
7902
/* 1803 */    MCD_OPC_FilterValue, 1, 231, 24, 0, // Skip to: 8183
7903
/* 1808 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
7904
/* 1811 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1833
7905
/* 1816 */    MCD_OPC_CheckPredicate, 43, 218, 24, 0, // Skip to: 8183
7906
/* 1821 */    MCD_OPC_CheckField, 20, 1, 0, 211, 24, 0, // Skip to: 8183
7907
/* 1828 */    MCD_OPC_Decode, 231, 22, 129, 2, // Opcode: t2PKHBT
7908
/* 1833 */    MCD_OPC_FilterValue, 2, 201, 24, 0, // Skip to: 8183
7909
/* 1838 */    MCD_OPC_CheckPredicate, 43, 196, 24, 0, // Skip to: 8183
7910
/* 1843 */    MCD_OPC_CheckField, 20, 1, 0, 189, 24, 0, // Skip to: 8183
7911
/* 1850 */    MCD_OPC_Decode, 232, 22, 129, 2, // Opcode: t2PKHTB
7912
/* 1855 */    MCD_OPC_FilterValue, 3, 179, 24, 0, // Skip to: 8183
7913
/* 1860 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7914
/* 1863 */    MCD_OPC_FilterValue, 0, 34, 0, 0, // Skip to: 1902
7915
/* 1868 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 1892
7916
/* 1873 */    MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 1892
7917
/* 1880 */    MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 1892
7918
/* 1887 */    MCD_OPC_Decode, 199, 21, 239, 1, // Opcode: t2ADCrr
7919
/* 1892 */    MCD_OPC_CheckPredicate, 38, 142, 24, 0, // Skip to: 8183
7920
/* 1897 */    MCD_OPC_Decode, 200, 21, 240, 1, // Opcode: t2ADCrs
7921
/* 1902 */    MCD_OPC_FilterValue, 1, 132, 24, 0, // Skip to: 8183
7922
/* 1907 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 1931
7923
/* 1912 */    MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 1931
7924
/* 1919 */    MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 1931
7925
/* 1926 */    MCD_OPC_Decode, 138, 23, 239, 1, // Opcode: t2RSBrr
7926
/* 1931 */    MCD_OPC_CheckPredicate, 38, 103, 24, 0, // Skip to: 8183
7927
/* 1936 */    MCD_OPC_Decode, 139, 23, 240, 1, // Opcode: t2RSBrs
7928
/* 1941 */    MCD_OPC_FilterValue, 3, 93, 24, 0, // Skip to: 8183
7929
/* 1946 */    MCD_OPC_ExtractField, 24, 3,  // Inst{26-24} ...
7930
/* 1949 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1987
7931
/* 1954 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7932
/* 1957 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1972
7933
/* 1962 */    MCD_OPC_CheckPredicate, 38, 72, 24, 0, // Skip to: 8183
7934
/* 1967 */    MCD_OPC_Decode, 236, 23, 130, 2, // Opcode: t2STRD_POST
7935
/* 1972 */    MCD_OPC_FilterValue, 1, 62, 24, 0, // Skip to: 8183
7936
/* 1977 */    MCD_OPC_CheckPredicate, 38, 57, 24, 0, // Skip to: 8183
7937
/* 1982 */    MCD_OPC_Decode, 159, 22, 131, 2, // Opcode: t2LDRD_POST
7938
/* 1987 */    MCD_OPC_FilterValue, 1, 58, 0, 0, // Skip to: 2050
7939
/* 1992 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
7940
/* 1995 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2010
7941
/* 2000 */    MCD_OPC_CheckPredicate, 38, 34, 24, 0, // Skip to: 8183
7942
/* 2005 */    MCD_OPC_Decode, 237, 23, 132, 2, // Opcode: t2STRD_PRE
7943
/* 2010 */    MCD_OPC_FilterValue, 1, 24, 24, 0, // Skip to: 8183
7944
/* 2015 */    MCD_OPC_CheckPredicate, 44, 20, 0, 0, // Skip to: 2040
7945
/* 2020 */    MCD_OPC_CheckField, 23, 1, 0, 13, 0, 0, // Skip to: 2040
7946
/* 2027 */    MCD_OPC_CheckField, 0, 20, 255, 210, 63, 4, 0, 0, // Skip to: 2040
7947
/* 2036 */    MCD_OPC_Decode, 150, 23, 51, // Opcode: t2SG
7948
/* 2040 */    MCD_OPC_CheckPredicate, 38, 250, 23, 0, // Skip to: 8183
7949
/* 2045 */    MCD_OPC_Decode, 160, 22, 133, 2, // Opcode: t2LDRD_PRE
7950
/* 2050 */    MCD_OPC_FilterValue, 2, 78, 0, 0, // Skip to: 2133
7951
/* 2055 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7952
/* 2058 */    MCD_OPC_FilterValue, 0, 232, 23, 0, // Skip to: 8183
7953
/* 2063 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
7954
/* 2066 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 2106
7955
/* 2071 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
7956
/* 2074 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 2106
7957
/* 2079 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2096
7958
/* 2084 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 2096
7959
/* 2091 */    MCD_OPC_Decode, 223, 22, 255, 1, // Opcode: t2MVNr
7960
/* 2096 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 2106
7961
/* 2101 */    MCD_OPC_Decode, 226, 22, 239, 1, // Opcode: t2ORNrr
7962
/* 2106 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2123
7963
/* 2111 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 2123
7964
/* 2118 */    MCD_OPC_Decode, 224, 22, 134, 2, // Opcode: t2MVNs
7965
/* 2123 */    MCD_OPC_CheckPredicate, 38, 167, 23, 0, // Skip to: 8183
7966
/* 2128 */    MCD_OPC_Decode, 227, 22, 240, 1, // Opcode: t2ORNrs
7967
/* 2133 */    MCD_OPC_FilterValue, 3, 157, 23, 0, // Skip to: 8183
7968
/* 2138 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
7969
/* 2141 */    MCD_OPC_FilterValue, 0, 149, 23, 0, // Skip to: 8183
7970
/* 2146 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 2170
7971
/* 2151 */    MCD_OPC_CheckField, 12, 3, 0, 12, 0, 0, // Skip to: 2170
7972
/* 2158 */    MCD_OPC_CheckField, 4, 4, 0, 5, 0, 0, // Skip to: 2170
7973
/* 2165 */    MCD_OPC_Decode, 144, 23, 239, 1, // Opcode: t2SBCrr
7974
/* 2170 */    MCD_OPC_CheckPredicate, 38, 120, 23, 0, // Skip to: 8183
7975
/* 2175 */    MCD_OPC_Decode, 145, 23, 240, 1, // Opcode: t2SBCrs
7976
/* 2180 */    MCD_OPC_FilterValue, 30, 153, 5, 0, // Skip to: 3618
7977
/* 2185 */    MCD_OPC_ExtractField, 15, 1,  // Inst{15} ...
7978
/* 2188 */    MCD_OPC_FilterValue, 0, 179, 2, 0, // Skip to: 2884
7979
/* 2193 */    MCD_OPC_ExtractField, 24, 2,  // Inst{25-24} ...
7980
/* 2196 */    MCD_OPC_FilterValue, 0, 160, 0, 0, // Skip to: 2361
7981
/* 2201 */    MCD_OPC_ExtractField, 21, 3,  // Inst{23-21} ...
7982
/* 2204 */    MCD_OPC_FilterValue, 0, 34, 0, 0, // Skip to: 2243
7983
/* 2209 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 2233
7984
/* 2214 */    MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 2233
7985
/* 2221 */    MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 2233
7986
/* 2228 */    MCD_OPC_Decode, 144, 24, 135, 2, // Opcode: t2TSTri
7987
/* 2233 */    MCD_OPC_CheckPredicate, 38, 57, 23, 0, // Skip to: 8183
7988
/* 2238 */    MCD_OPC_Decode, 206, 21, 136, 2, // Opcode: t2ANDri
7989
/* 2243 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2258
7990
/* 2248 */    MCD_OPC_CheckPredicate, 38, 42, 23, 0, // Skip to: 8183
7991
/* 2253 */    MCD_OPC_Decode, 214, 21, 136, 2, // Opcode: t2BICri
7992
/* 2258 */    MCD_OPC_FilterValue, 2, 27, 0, 0, // Skip to: 2290
7993
/* 2263 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2280
7994
/* 2268 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 2280
7995
/* 2275 */    MCD_OPC_Decode, 205, 22, 137, 2, // Opcode: t2MOVi
7996
/* 2280 */    MCD_OPC_CheckPredicate, 38, 10, 23, 0, // Skip to: 8183
7997
/* 2285 */    MCD_OPC_Decode, 228, 22, 136, 2, // Opcode: t2ORRri
7998
/* 2290 */    MCD_OPC_FilterValue, 3, 27, 0, 0, // Skip to: 2322
7999
/* 2295 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2312
8000
/* 2300 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 2312
8001
/* 2307 */    MCD_OPC_Decode, 222, 22, 137, 2, // Opcode: t2MVNi
8002
/* 2312 */    MCD_OPC_CheckPredicate, 38, 234, 22, 0, // Skip to: 8183
8003
/* 2317 */    MCD_OPC_Decode, 225, 22, 136, 2, // Opcode: t2ORNri
8004
/* 2322 */    MCD_OPC_FilterValue, 4, 224, 22, 0, // Skip to: 8183
8005
/* 2327 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 2351
8006
/* 2332 */    MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 2351
8007
/* 2339 */    MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 2351
8008
/* 2346 */    MCD_OPC_Decode, 140, 24, 135, 2, // Opcode: t2TEQri
8009
/* 2351 */    MCD_OPC_CheckPredicate, 38, 195, 22, 0, // Skip to: 8183
8010
/* 2356 */    MCD_OPC_Decode, 244, 21, 136, 2, // Opcode: t2EORri
8011
/* 2361 */    MCD_OPC_FilterValue, 1, 126, 0, 0, // Skip to: 2492
8012
/* 2366 */    MCD_OPC_ExtractField, 21, 3,  // Inst{23-21} ...
8013
/* 2369 */    MCD_OPC_FilterValue, 0, 34, 0, 0, // Skip to: 2408
8014
/* 2374 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 2398
8015
/* 2379 */    MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 2398
8016
/* 2386 */    MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 2398
8017
/* 2393 */    MCD_OPC_Decode, 223, 21, 135, 2, // Opcode: t2CMNri
8018
/* 2398 */    MCD_OPC_CheckPredicate, 38, 148, 22, 0, // Skip to: 8183
8019
/* 2403 */    MCD_OPC_Decode, 201, 21, 138, 2, // Opcode: t2ADDri
8020
/* 2408 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2423
8021
/* 2413 */    MCD_OPC_CheckPredicate, 38, 133, 22, 0, // Skip to: 8183
8022
/* 2418 */    MCD_OPC_Decode, 198, 21, 136, 2, // Opcode: t2ADCri
8023
/* 2423 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 2438
8024
/* 2428 */    MCD_OPC_CheckPredicate, 38, 118, 22, 0, // Skip to: 8183
8025
/* 2433 */    MCD_OPC_Decode, 143, 23, 136, 2, // Opcode: t2SBCri
8026
/* 2438 */    MCD_OPC_FilterValue, 5, 34, 0, 0, // Skip to: 2477
8027
/* 2443 */    MCD_OPC_CheckPredicate, 38, 19, 0, 0, // Skip to: 2467
8028
/* 2448 */    MCD_OPC_CheckField, 20, 1, 1, 12, 0, 0, // Skip to: 2467
8029
/* 2455 */    MCD_OPC_CheckField, 8, 4, 15, 5, 0, 0, // Skip to: 2467
8030
/* 2462 */    MCD_OPC_Decode, 226, 21, 135, 2, // Opcode: t2CMPri
8031
/* 2467 */    MCD_OPC_CheckPredicate, 38, 79, 22, 0, // Skip to: 8183
8032
/* 2472 */    MCD_OPC_Decode, 128, 24, 138, 2, // Opcode: t2SUBri
8033
/* 2477 */    MCD_OPC_FilterValue, 6, 69, 22, 0, // Skip to: 8183
8034
/* 2482 */    MCD_OPC_CheckPredicate, 38, 64, 22, 0, // Skip to: 8183
8035
/* 2487 */    MCD_OPC_Decode, 137, 23, 136, 2, // Opcode: t2RSBri
8036
/* 2492 */    MCD_OPC_FilterValue, 2, 132, 0, 0, // Skip to: 2629
8037
/* 2497 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
8038
/* 2500 */    MCD_OPC_FilterValue, 0, 72, 0, 0, // Skip to: 2577
8039
/* 2505 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8040
/* 2508 */    MCD_OPC_FilterValue, 0, 38, 22, 0, // Skip to: 8183
8041
/* 2513 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
8042
/* 2516 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2538
8043
/* 2521 */    MCD_OPC_CheckPredicate, 38, 34, 0, 0, // Skip to: 2560
8044
/* 2526 */    MCD_OPC_CheckField, 23, 1, 0, 27, 0, 0, // Skip to: 2560
8045
/* 2533 */    MCD_OPC_Decode, 202, 21, 139, 2, // Opcode: t2ADDri12
8046
/* 2538 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 2560
8047
/* 2543 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2560
8048
/* 2548 */    MCD_OPC_CheckField, 23, 1, 1, 5, 0, 0, // Skip to: 2560
8049
/* 2555 */    MCD_OPC_Decode, 129, 24, 139, 2, // Opcode: t2SUBri12
8050
/* 2560 */    MCD_OPC_CheckPredicate, 38, 242, 21, 0, // Skip to: 8183
8051
/* 2565 */    MCD_OPC_CheckField, 16, 4, 15, 235, 21, 0, // Skip to: 8183
8052
/* 2572 */    MCD_OPC_Decode, 205, 21, 140, 2, // Opcode: t2ADR
8053
/* 2577 */    MCD_OPC_FilterValue, 1, 225, 21, 0, // Skip to: 8183
8054
/* 2582 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8055
/* 2585 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2607
8056
/* 2590 */    MCD_OPC_CheckPredicate, 32, 212, 21, 0, // Skip to: 8183
8057
/* 2595 */    MCD_OPC_CheckField, 20, 2, 0, 205, 21, 0, // Skip to: 8183
8058
/* 2602 */    MCD_OPC_Decode, 206, 22, 141, 2, // Opcode: t2MOVi16
8059
/* 2607 */    MCD_OPC_FilterValue, 1, 195, 21, 0, // Skip to: 8183
8060
/* 2612 */    MCD_OPC_CheckPredicate, 32, 190, 21, 0, // Skip to: 8183
8061
/* 2617 */    MCD_OPC_CheckField, 20, 2, 0, 183, 21, 0, // Skip to: 8183
8062
/* 2624 */    MCD_OPC_Decode, 204, 22, 141, 2, // Opcode: t2MOVTi16
8063
/* 2629 */    MCD_OPC_FilterValue, 3, 173, 21, 0, // Skip to: 8183
8064
/* 2634 */    MCD_OPC_ExtractField, 22, 2,  // Inst{23-22} ...
8065
/* 2637 */    MCD_OPC_FilterValue, 0, 72, 0, 0, // Skip to: 2714
8066
/* 2642 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
8067
/* 2645 */    MCD_OPC_FilterValue, 0, 157, 21, 0, // Skip to: 8183
8068
/* 2650 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8069
/* 2653 */    MCD_OPC_FilterValue, 0, 149, 21, 0, // Skip to: 8183
8070
/* 2658 */    MCD_OPC_ExtractField, 26, 1,  // Inst{26} ...
8071
/* 2661 */    MCD_OPC_FilterValue, 0, 141, 21, 0, // Skip to: 8183
8072
/* 2666 */    MCD_OPC_CheckPredicate, 45, 33, 0, 0, // Skip to: 2704
8073
/* 2671 */    MCD_OPC_CheckField, 21, 1, 1, 26, 0, 0, // Skip to: 2704
8074
/* 2678 */    MCD_OPC_CheckField, 12, 3, 0, 19, 0, 0, // Skip to: 2704
8075
/* 2685 */    MCD_OPC_CheckField, 6, 2, 0, 12, 0, 0, // Skip to: 2704
8076
/* 2692 */    MCD_OPC_CheckField, 4, 1, 0, 5, 0, 0, // Skip to: 2704
8077
/* 2699 */    MCD_OPC_Decode, 199, 23, 142, 2, // Opcode: t2SSAT16
8078
/* 2704 */    MCD_OPC_CheckPredicate, 38, 98, 21, 0, // Skip to: 8183
8079
/* 2709 */    MCD_OPC_Decode, 198, 23, 143, 2, // Opcode: t2SSAT
8080
/* 2714 */    MCD_OPC_FilterValue, 1, 66, 0, 0, // Skip to: 2785
8081
/* 2719 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
8082
/* 2722 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2737
8083
/* 2727 */    MCD_OPC_CheckPredicate, 38, 75, 21, 0, // Skip to: 8183
8084
/* 2732 */    MCD_OPC_Decode, 146, 23, 144, 2, // Opcode: t2SBFX
8085
/* 2737 */    MCD_OPC_FilterValue, 2, 65, 21, 0, // Skip to: 8183
8086
/* 2742 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
8087
/* 2745 */    MCD_OPC_FilterValue, 0, 57, 21, 0, // Skip to: 8183
8088
/* 2750 */    MCD_OPC_ExtractField, 26, 1,  // Inst{26} ...
8089
/* 2753 */    MCD_OPC_FilterValue, 0, 49, 21, 0, // Skip to: 8183
8090
/* 2758 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 2775
8091
/* 2763 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 2775
8092
/* 2770 */    MCD_OPC_Decode, 212, 21, 145, 2, // Opcode: t2BFC
8093
/* 2775 */    MCD_OPC_CheckPredicate, 38, 27, 21, 0, // Skip to: 8183
8094
/* 2780 */    MCD_OPC_Decode, 213, 21, 146, 2, // Opcode: t2BFI
8095
/* 2785 */    MCD_OPC_FilterValue, 2, 72, 0, 0, // Skip to: 2862
8096
/* 2790 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
8097
/* 2793 */    MCD_OPC_FilterValue, 0, 9, 21, 0, // Skip to: 8183
8098
/* 2798 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8099
/* 2801 */    MCD_OPC_FilterValue, 0, 1, 21, 0, // Skip to: 8183
8100
/* 2806 */    MCD_OPC_ExtractField, 26, 1,  // Inst{26} ...
8101
/* 2809 */    MCD_OPC_FilterValue, 0, 249, 20, 0, // Skip to: 8183
8102
/* 2814 */    MCD_OPC_CheckPredicate, 45, 33, 0, 0, // Skip to: 2852
8103
/* 2819 */    MCD_OPC_CheckField, 21, 1, 1, 26, 0, 0, // Skip to: 2852
8104
/* 2826 */    MCD_OPC_CheckField, 12, 3, 0, 19, 0, 0, // Skip to: 2852
8105
/* 2833 */    MCD_OPC_CheckField, 6, 2, 0, 12, 0, 0, // Skip to: 2852
8106
/* 2840 */    MCD_OPC_CheckField, 4, 1, 0, 5, 0, 0, // Skip to: 2852
8107
/* 2847 */    MCD_OPC_Decode, 175, 24, 142, 2, // Opcode: t2USAT16
8108
/* 2852 */    MCD_OPC_CheckPredicate, 38, 206, 20, 0, // Skip to: 8183
8109
/* 2857 */    MCD_OPC_Decode, 174, 24, 143, 2, // Opcode: t2USAT
8110
/* 2862 */    MCD_OPC_FilterValue, 3, 196, 20, 0, // Skip to: 8183
8111
/* 2867 */    MCD_OPC_CheckPredicate, 38, 191, 20, 0, // Skip to: 8183
8112
/* 2872 */    MCD_OPC_CheckField, 20, 2, 0, 184, 20, 0, // Skip to: 8183
8113
/* 2879 */    MCD_OPC_Decode, 154, 24, 144, 2, // Opcode: t2UBFX
8114
/* 2884 */    MCD_OPC_FilterValue, 1, 174, 20, 0, // Skip to: 8183
8115
/* 2889 */    MCD_OPC_ExtractField, 12, 1,  // Inst{12} ...
8116
/* 2892 */    MCD_OPC_FilterValue, 0, 187, 2, 0, // Skip to: 3596
8117
/* 2897 */    MCD_OPC_ExtractField, 14, 1,  // Inst{14} ...
8118
/* 2900 */    MCD_OPC_FilterValue, 0, 158, 20, 0, // Skip to: 8183
8119
/* 2905 */    MCD_OPC_ExtractField, 0, 12,  // Inst{11-0} ...
8120
/* 2908 */    MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 2937
8121
/* 2913 */    MCD_OPC_CheckPredicate, 46, 166, 0, 0, // Skip to: 3084
8122
/* 2918 */    MCD_OPC_CheckField, 16, 11, 143, 15, 158, 0, 0, // Skip to: 3084
8123
/* 2926 */    MCD_OPC_CheckField, 13, 1, 0, 151, 0, 0, // Skip to: 3084
8124
/* 2933 */    MCD_OPC_Decode, 239, 21, 51, // Opcode: t2DCPS1
8125
/* 2937 */    MCD_OPC_FilterValue, 2, 24, 0, 0, // Skip to: 2966
8126
/* 2942 */    MCD_OPC_CheckPredicate, 46, 137, 0, 0, // Skip to: 3084
8127
/* 2947 */    MCD_OPC_CheckField, 16, 11, 143, 15, 129, 0, 0, // Skip to: 3084
8128
/* 2955 */    MCD_OPC_CheckField, 13, 1, 0, 122, 0, 0, // Skip to: 3084
8129
/* 2962 */    MCD_OPC_Decode, 240, 21, 51, // Opcode: t2DCPS2
8130
/* 2966 */    MCD_OPC_FilterValue, 3, 24, 0, 0, // Skip to: 2995
8131
/* 2971 */    MCD_OPC_CheckPredicate, 46, 108, 0, 0, // Skip to: 3084
8132
/* 2976 */    MCD_OPC_CheckField, 16, 11, 143, 15, 100, 0, 0, // Skip to: 3084
8133
/* 2984 */    MCD_OPC_CheckField, 13, 1, 0, 93, 0, 0, // Skip to: 3084
8134
/* 2991 */    MCD_OPC_Decode, 241, 21, 51, // Opcode: t2DCPS3
8135
/* 2995 */    MCD_OPC_FilterValue, 18, 24, 0, 0, // Skip to: 3024
8136
/* 3000 */    MCD_OPC_CheckPredicate, 47, 79, 0, 0, // Skip to: 3084
8137
/* 3005 */    MCD_OPC_CheckField, 16, 11, 175, 7, 71, 0, 0, // Skip to: 3084
8138
/* 3013 */    MCD_OPC_CheckField, 13, 1, 0, 64, 0, 0, // Skip to: 3084
8139
/* 3020 */    MCD_OPC_Decode, 143, 24, 51, // Opcode: t2TSB
8140
/* 3024 */    MCD_OPC_FilterValue, 128, 30, 24, 0, 0, // Skip to: 3054
8141
/* 3030 */    MCD_OPC_CheckPredicate, 39, 49, 0, 0, // Skip to: 3084
8142
/* 3035 */    MCD_OPC_CheckField, 20, 7, 60, 42, 0, 0, // Skip to: 3084
8143
/* 3042 */    MCD_OPC_CheckField, 13, 1, 0, 35, 0, 0, // Skip to: 3084
8144
/* 3049 */    MCD_OPC_Decode, 217, 21, 147, 2, // Opcode: t2BXJ
8145
/* 3054 */    MCD_OPC_FilterValue, 175, 30, 24, 0, 0, // Skip to: 3084
8146
/* 3060 */    MCD_OPC_CheckPredicate, 48, 19, 0, 0, // Skip to: 3084
8147
/* 3065 */    MCD_OPC_CheckField, 16, 11, 191, 7, 11, 0, 0, // Skip to: 3084
8148
/* 3073 */    MCD_OPC_CheckField, 13, 1, 0, 4, 0, 0, // Skip to: 3084
8149
/* 3080 */    MCD_OPC_Decode, 221, 21, 51, // Opcode: t2CLREX
8150
/* 3084 */    MCD_OPC_ExtractField, 16, 11,  // Inst{26-16} ...
8151
/* 3087 */    MCD_OPC_FilterValue, 175, 7, 131, 0, 0, // Skip to: 3224
8152
/* 3093 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8153
/* 3096 */    MCD_OPC_FilterValue, 0, 68, 0, 0, // Skip to: 3169
8154
/* 3101 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
8155
/* 3104 */    MCD_OPC_FilterValue, 0, 24, 1, 0, // Skip to: 3389
8156
/* 3109 */    MCD_OPC_ExtractField, 13, 1,  // Inst{13} ...
8157
/* 3112 */    MCD_OPC_FilterValue, 0, 16, 1, 0, // Skip to: 3389
8158
/* 3117 */    MCD_OPC_ExtractField, 9, 2,  // Inst{10-9} ...
8159
/* 3120 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 3152
8160
/* 3125 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3142
8161
/* 3130 */    MCD_OPC_CheckField, 4, 4, 15, 5, 0, 0, // Skip to: 3142
8162
/* 3137 */    MCD_OPC_Decode, 238, 21, 148, 2, // Opcode: t2DBG
8163
/* 3142 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 3152
8164
/* 3147 */    MCD_OPC_Decode, 247, 21, 226, 1, // Opcode: t2HINT
8165
/* 3152 */    MCD_OPC_CheckPredicate, 39, 232, 0, 0, // Skip to: 3389
8166
/* 3157 */    MCD_OPC_CheckField, 0, 5, 0, 225, 0, 0, // Skip to: 3389
8167
/* 3164 */    MCD_OPC_Decode, 230, 21, 149, 2, // Opcode: t2CPS2p
8168
/* 3169 */    MCD_OPC_FilterValue, 1, 215, 0, 0, // Skip to: 3389
8169
/* 3174 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
8170
/* 3177 */    MCD_OPC_FilterValue, 0, 207, 0, 0, // Skip to: 3389
8171
/* 3182 */    MCD_OPC_ExtractField, 13, 1,  // Inst{13} ...
8172
/* 3185 */    MCD_OPC_FilterValue, 0, 199, 0, 0, // Skip to: 3389
8173
/* 3190 */    MCD_OPC_CheckPredicate, 39, 19, 0, 0, // Skip to: 3214
8174
/* 3195 */    MCD_OPC_CheckField, 9, 2, 0, 12, 0, 0, // Skip to: 3214
8175
/* 3202 */    MCD_OPC_CheckField, 5, 3, 0, 5, 0, 0, // Skip to: 3214
8176
/* 3209 */    MCD_OPC_Decode, 229, 21, 149, 2, // Opcode: t2CPS1p
8177
/* 3214 */    MCD_OPC_CheckPredicate, 39, 170, 0, 0, // Skip to: 3389
8178
/* 3219 */    MCD_OPC_Decode, 231, 21, 149, 2, // Opcode: t2CPS3p
8179
/* 3224 */    MCD_OPC_FilterValue, 191, 7, 69, 0, 0, // Skip to: 3299
8180
/* 3230 */    MCD_OPC_ExtractField, 4, 8,  // Inst{11-4} ...
8181
/* 3233 */    MCD_OPC_FilterValue, 244, 1, 16, 0, 0, // Skip to: 3255
8182
/* 3239 */    MCD_OPC_CheckPredicate, 49, 145, 0, 0, // Skip to: 3389
8183
/* 3244 */    MCD_OPC_CheckField, 13, 1, 0, 138, 0, 0, // Skip to: 3389
8184
/* 3251 */    MCD_OPC_Decode, 243, 21, 61, // Opcode: t2DSB
8185
/* 3255 */    MCD_OPC_FilterValue, 245, 1, 16, 0, 0, // Skip to: 3277
8186
/* 3261 */    MCD_OPC_CheckPredicate, 49, 123, 0, 0, // Skip to: 3389
8187
/* 3266 */    MCD_OPC_CheckField, 13, 1, 0, 116, 0, 0, // Skip to: 3389
8188
/* 3273 */    MCD_OPC_Decode, 242, 21, 61, // Opcode: t2DMB
8189
/* 3277 */    MCD_OPC_FilterValue, 246, 1, 106, 0, 0, // Skip to: 3389
8190
/* 3283 */    MCD_OPC_CheckPredicate, 49, 101, 0, 0, // Skip to: 3389
8191
/* 3288 */    MCD_OPC_CheckField, 13, 1, 0, 94, 0, 0, // Skip to: 3389
8192
/* 3295 */    MCD_OPC_Decode, 249, 21, 62, // Opcode: t2ISB
8193
/* 3299 */    MCD_OPC_FilterValue, 222, 7, 24, 0, 0, // Skip to: 3329
8194
/* 3305 */    MCD_OPC_CheckPredicate, 39, 79, 0, 0, // Skip to: 3389
8195
/* 3310 */    MCD_OPC_CheckField, 13, 1, 0, 72, 0, 0, // Skip to: 3389
8196
/* 3317 */    MCD_OPC_CheckField, 8, 4, 15, 65, 0, 0, // Skip to: 3389
8197
/* 3324 */    MCD_OPC_Decode, 255, 23, 226, 1, // Opcode: t2SUBS_PC_LR
8198
/* 3329 */    MCD_OPC_FilterValue, 239, 7, 24, 0, 0, // Skip to: 3359
8199
/* 3335 */    MCD_OPC_CheckPredicate, 39, 49, 0, 0, // Skip to: 3389
8200
/* 3340 */    MCD_OPC_CheckField, 13, 1, 0, 42, 0, 0, // Skip to: 3389
8201
/* 3347 */    MCD_OPC_CheckField, 0, 8, 0, 35, 0, 0, // Skip to: 3389
8202
/* 3354 */    MCD_OPC_Decode, 214, 22, 150, 2, // Opcode: t2MRS_AR
8203
/* 3359 */    MCD_OPC_FilterValue, 255, 7, 24, 0, 0, // Skip to: 3389
8204
/* 3365 */    MCD_OPC_CheckPredicate, 39, 19, 0, 0, // Skip to: 3389
8205
/* 3370 */    MCD_OPC_CheckField, 13, 1, 0, 12, 0, 0, // Skip to: 3389
8206
/* 3377 */    MCD_OPC_CheckField, 0, 8, 0, 5, 0, 0, // Skip to: 3389
8207
/* 3384 */    MCD_OPC_Decode, 217, 22, 150, 2, // Opcode: t2MRSsys_AR
8208
/* 3389 */    MCD_OPC_ExtractField, 13, 1,  // Inst{13} ...
8209
/* 3392 */    MCD_OPC_FilterValue, 0, 122, 0, 0, // Skip to: 3519
8210
/* 3397 */    MCD_OPC_ExtractField, 21, 6,  // Inst{26-21} ...
8211
/* 3400 */    MCD_OPC_FilterValue, 28, 47, 0, 0, // Skip to: 3452
8212
/* 3405 */    MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
8213
/* 3408 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3430
8214
/* 3413 */    MCD_OPC_CheckPredicate, 39, 123, 0, 0, // Skip to: 3541
8215
/* 3418 */    MCD_OPC_CheckField, 0, 5, 0, 116, 0, 0, // Skip to: 3541
8216
/* 3425 */    MCD_OPC_Decode, 218, 22, 151, 2, // Opcode: t2MSR_AR
8217
/* 3430 */    MCD_OPC_FilterValue, 1, 106, 0, 0, // Skip to: 3541
8218
/* 3435 */    MCD_OPC_CheckPredicate, 50, 101, 0, 0, // Skip to: 3541
8219
/* 3440 */    MCD_OPC_CheckField, 0, 4, 0, 94, 0, 0, // Skip to: 3541
8220
/* 3447 */    MCD_OPC_Decode, 220, 22, 152, 2, // Opcode: t2MSRbanked
8221
/* 3452 */    MCD_OPC_FilterValue, 31, 24, 0, 0, // Skip to: 3481
8222
/* 3457 */    MCD_OPC_CheckPredicate, 50, 79, 0, 0, // Skip to: 3541
8223
/* 3462 */    MCD_OPC_CheckField, 5, 3, 1, 72, 0, 0, // Skip to: 3541
8224
/* 3469 */    MCD_OPC_CheckField, 0, 4, 0, 65, 0, 0, // Skip to: 3541
8225
/* 3476 */    MCD_OPC_Decode, 216, 22, 153, 2, // Opcode: t2MRSbanked
8226
/* 3481 */    MCD_OPC_FilterValue, 63, 55, 0, 0, // Skip to: 3541
8227
/* 3486 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8228
/* 3489 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3504
8229
/* 3494 */    MCD_OPC_CheckPredicate, 51, 42, 0, 0, // Skip to: 3541
8230
/* 3499 */    MCD_OPC_Decode, 248, 21, 154, 2, // Opcode: t2HVC
8231
/* 3504 */    MCD_OPC_FilterValue, 1, 32, 0, 0, // Skip to: 3541
8232
/* 3509 */    MCD_OPC_CheckPredicate, 52, 27, 0, 0, // Skip to: 3541
8233
/* 3514 */    MCD_OPC_Decode, 157, 23, 155, 2, // Opcode: t2SMC
8234
/* 3519 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 3541
8235
/* 3524 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3541
8236
/* 3529 */    MCD_OPC_CheckField, 20, 7, 127, 5, 0, 0, // Skip to: 3541
8237
/* 3536 */    MCD_OPC_Decode, 155, 24, 154, 2, // Opcode: t2UDF
8238
/* 3541 */    MCD_OPC_ExtractField, 21, 6,  // Inst{26-21} ...
8239
/* 3544 */    MCD_OPC_FilterValue, 28, 15, 0, 0, // Skip to: 3564
8240
/* 3549 */    MCD_OPC_CheckPredicate, 53, 32, 0, 0, // Skip to: 3586
8241
/* 3554 */    MCD_OPC_SoftFail, 128, 198, 64 /* 0x102300 */, 0,
8242
/* 3559 */    MCD_OPC_Decode, 219, 22, 156, 2, // Opcode: t2MSR_M
8243
/* 3564 */    MCD_OPC_FilterValue, 31, 17, 0, 0, // Skip to: 3586
8244
/* 3569 */    MCD_OPC_CheckPredicate, 53, 12, 0, 0, // Skip to: 3586
8245
/* 3574 */    MCD_OPC_SoftFail, 128, 192, 64 /* 0x102000 */, 128, 128, 60 /* 0xf0000 */,
8246
/* 3581 */    MCD_OPC_Decode, 215, 22, 157, 2, // Opcode: t2MRS_M
8247
/* 3586 */    MCD_OPC_CheckPredicate, 38, 240, 17, 0, // Skip to: 8183
8248
/* 3591 */    MCD_OPC_Decode, 218, 21, 158, 2, // Opcode: t2Bcc
8249
/* 3596 */    MCD_OPC_FilterValue, 1, 230, 17, 0, // Skip to: 8183
8250
/* 3601 */    MCD_OPC_CheckPredicate, 32, 225, 17, 0, // Skip to: 8183
8251
/* 3606 */    MCD_OPC_CheckField, 14, 1, 0, 218, 17, 0, // Skip to: 8183
8252
/* 3613 */    MCD_OPC_Decode, 211, 21, 159, 2, // Opcode: t2B
8253
/* 3618 */    MCD_OPC_FilterValue, 31, 208, 17, 0, // Skip to: 8183
8254
/* 3623 */    MCD_OPC_ExtractField, 21, 2,  // Inst{22-21} ...
8255
/* 3626 */    MCD_OPC_FilterValue, 0, 96, 6, 0, // Skip to: 5263
8256
/* 3631 */    MCD_OPC_ExtractField, 24, 3,  // Inst{26-24} ...
8257
/* 3634 */    MCD_OPC_FilterValue, 0, 100, 1, 0, // Skip to: 3995
8258
/* 3639 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8259
/* 3642 */    MCD_OPC_FilterValue, 0, 125, 0, 0, // Skip to: 3772
8260
/* 3647 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8261
/* 3650 */    MCD_OPC_FilterValue, 0, 102, 0, 0, // Skip to: 3757
8262
/* 3655 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8263
/* 3658 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3680
8264
/* 3663 */    MCD_OPC_CheckPredicate, 38, 163, 17, 0, // Skip to: 8183
8265
/* 3668 */    MCD_OPC_CheckField, 6, 4, 0, 156, 17, 0, // Skip to: 8183
8266
/* 3675 */    MCD_OPC_Decode, 235, 23, 160, 2, // Opcode: t2STRBs
8267
/* 3680 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 3702
8268
/* 3685 */    MCD_OPC_CheckPredicate, 38, 141, 17, 0, // Skip to: 8183
8269
/* 3690 */    MCD_OPC_CheckField, 8, 1, 1, 134, 17, 0, // Skip to: 8183
8270
/* 3697 */    MCD_OPC_Decode, 231, 23, 161, 2, // Opcode: t2STRB_POST
8271
/* 3702 */    MCD_OPC_FilterValue, 3, 124, 17, 0, // Skip to: 8183
8272
/* 3707 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8273
/* 3710 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 3742
8274
/* 3715 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3732
8275
/* 3720 */    MCD_OPC_CheckField, 9, 1, 1, 5, 0, 0, // Skip to: 3732
8276
/* 3727 */    MCD_OPC_Decode, 230, 23, 162, 2, // Opcode: t2STRBT
8277
/* 3732 */    MCD_OPC_CheckPredicate, 38, 94, 17, 0, // Skip to: 8183
8278
/* 3737 */    MCD_OPC_Decode, 234, 23, 163, 2, // Opcode: t2STRBi8
8279
/* 3742 */    MCD_OPC_FilterValue, 1, 84, 17, 0, // Skip to: 8183
8280
/* 3747 */    MCD_OPC_CheckPredicate, 38, 79, 17, 0, // Skip to: 8183
8281
/* 3752 */    MCD_OPC_Decode, 232, 23, 161, 2, // Opcode: t2STRB_PRE
8282
/* 3757 */    MCD_OPC_FilterValue, 1, 69, 17, 0, // Skip to: 8183
8283
/* 3762 */    MCD_OPC_CheckPredicate, 38, 64, 17, 0, // Skip to: 8183
8284
/* 3767 */    MCD_OPC_Decode, 233, 23, 164, 2, // Opcode: t2STRBi12
8285
/* 3772 */    MCD_OPC_FilterValue, 1, 54, 17, 0, // Skip to: 8183
8286
/* 3777 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8287
/* 3780 */    MCD_OPC_FilterValue, 0, 143, 0, 0, // Skip to: 3928
8288
/* 3785 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8289
/* 3788 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 3828
8290
/* 3793 */    MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
8291
/* 3796 */    MCD_OPC_FilterValue, 0, 159, 0, 0, // Skip to: 3960
8292
/* 3801 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3818
8293
/* 3806 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 3818
8294
/* 3813 */    MCD_OPC_Decode, 239, 22, 165, 2, // Opcode: t2PLDs
8295
/* 3818 */    MCD_OPC_CheckPredicate, 38, 137, 0, 0, // Skip to: 3960
8296
/* 3823 */    MCD_OPC_Decode, 158, 22, 165, 2, // Opcode: t2LDRBs
8297
/* 3828 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 3850
8298
/* 3833 */    MCD_OPC_CheckPredicate, 38, 122, 0, 0, // Skip to: 3960
8299
/* 3838 */    MCD_OPC_CheckField, 8, 1, 1, 115, 0, 0, // Skip to: 3960
8300
/* 3845 */    MCD_OPC_Decode, 153, 22, 161, 2, // Opcode: t2LDRB_POST
8301
/* 3850 */    MCD_OPC_FilterValue, 3, 105, 0, 0, // Skip to: 3960
8302
/* 3855 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8303
/* 3858 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 3913
8304
/* 3863 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
8305
/* 3866 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3888
8306
/* 3871 */    MCD_OPC_CheckPredicate, 38, 27, 0, 0, // Skip to: 3903
8307
/* 3876 */    MCD_OPC_CheckField, 12, 4, 15, 20, 0, 0, // Skip to: 3903
8308
/* 3883 */    MCD_OPC_Decode, 237, 22, 166, 2, // Opcode: t2PLDi8
8309
/* 3888 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 3903
8310
/* 3893 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 3903
8311
/* 3898 */    MCD_OPC_Decode, 152, 22, 167, 2, // Opcode: t2LDRBT
8312
/* 3903 */    MCD_OPC_CheckPredicate, 38, 52, 0, 0, // Skip to: 3960
8313
/* 3908 */    MCD_OPC_Decode, 156, 22, 166, 2, // Opcode: t2LDRBi8
8314
/* 3913 */    MCD_OPC_FilterValue, 1, 42, 0, 0, // Skip to: 3960
8315
/* 3918 */    MCD_OPC_CheckPredicate, 38, 37, 0, 0, // Skip to: 3960
8316
/* 3923 */    MCD_OPC_Decode, 154, 22, 161, 2, // Opcode: t2LDRB_PRE
8317
/* 3928 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 3960
8318
/* 3933 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3950
8319
/* 3938 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 3950
8320
/* 3945 */    MCD_OPC_Decode, 236, 22, 168, 2, // Opcode: t2PLDi12
8321
/* 3950 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 3960
8322
/* 3955 */    MCD_OPC_Decode, 155, 22, 168, 2, // Opcode: t2LDRBi12
8323
/* 3960 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
8324
/* 3963 */    MCD_OPC_FilterValue, 15, 119, 16, 0, // Skip to: 8183
8325
/* 3968 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 3985
8326
/* 3973 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 3985
8327
/* 3980 */    MCD_OPC_Decode, 238, 22, 169, 2, // Opcode: t2PLDpci
8328
/* 3985 */    MCD_OPC_CheckPredicate, 38, 97, 16, 0, // Skip to: 8183
8329
/* 3990 */    MCD_OPC_Decode, 157, 22, 169, 2, // Opcode: t2LDRBpci
8330
/* 3995 */    MCD_OPC_FilterValue, 1, 226, 0, 0, // Skip to: 4226
8331
/* 4000 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8332
/* 4003 */    MCD_OPC_FilterValue, 1, 79, 16, 0, // Skip to: 8183
8333
/* 4008 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8334
/* 4011 */    MCD_OPC_FilterValue, 0, 143, 0, 0, // Skip to: 4159
8335
/* 4016 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8336
/* 4019 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 4059
8337
/* 4024 */    MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
8338
/* 4027 */    MCD_OPC_FilterValue, 0, 159, 0, 0, // Skip to: 4191
8339
/* 4032 */    MCD_OPC_CheckPredicate, 54, 12, 0, 0, // Skip to: 4049
8340
/* 4037 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 4049
8341
/* 4044 */    MCD_OPC_Decode, 243, 22, 165, 2, // Opcode: t2PLIs
8342
/* 4049 */    MCD_OPC_CheckPredicate, 38, 137, 0, 0, // Skip to: 4191
8343
/* 4054 */    MCD_OPC_Decode, 179, 22, 165, 2, // Opcode: t2LDRSBs
8344
/* 4059 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 4081
8345
/* 4064 */    MCD_OPC_CheckPredicate, 38, 122, 0, 0, // Skip to: 4191
8346
/* 4069 */    MCD_OPC_CheckField, 8, 1, 1, 115, 0, 0, // Skip to: 4191
8347
/* 4076 */    MCD_OPC_Decode, 174, 22, 161, 2, // Opcode: t2LDRSB_POST
8348
/* 4081 */    MCD_OPC_FilterValue, 3, 105, 0, 0, // Skip to: 4191
8349
/* 4086 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8350
/* 4089 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 4144
8351
/* 4094 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
8352
/* 4097 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4119
8353
/* 4102 */    MCD_OPC_CheckPredicate, 54, 27, 0, 0, // Skip to: 4134
8354
/* 4107 */    MCD_OPC_CheckField, 12, 4, 15, 20, 0, 0, // Skip to: 4134
8355
/* 4114 */    MCD_OPC_Decode, 241, 22, 166, 2, // Opcode: t2PLIi8
8356
/* 4119 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 4134
8357
/* 4124 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 4134
8358
/* 4129 */    MCD_OPC_Decode, 173, 22, 167, 2, // Opcode: t2LDRSBT
8359
/* 4134 */    MCD_OPC_CheckPredicate, 38, 52, 0, 0, // Skip to: 4191
8360
/* 4139 */    MCD_OPC_Decode, 177, 22, 166, 2, // Opcode: t2LDRSBi8
8361
/* 4144 */    MCD_OPC_FilterValue, 1, 42, 0, 0, // Skip to: 4191
8362
/* 4149 */    MCD_OPC_CheckPredicate, 38, 37, 0, 0, // Skip to: 4191
8363
/* 4154 */    MCD_OPC_Decode, 175, 22, 161, 2, // Opcode: t2LDRSB_PRE
8364
/* 4159 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 4191
8365
/* 4164 */    MCD_OPC_CheckPredicate, 54, 12, 0, 0, // Skip to: 4181
8366
/* 4169 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 4181
8367
/* 4176 */    MCD_OPC_Decode, 240, 22, 168, 2, // Opcode: t2PLIi12
8368
/* 4181 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 4191
8369
/* 4186 */    MCD_OPC_Decode, 176, 22, 168, 2, // Opcode: t2LDRSBi12
8370
/* 4191 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
8371
/* 4194 */    MCD_OPC_FilterValue, 15, 144, 15, 0, // Skip to: 8183
8372
/* 4199 */    MCD_OPC_CheckPredicate, 54, 12, 0, 0, // Skip to: 4216
8373
/* 4204 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 4216
8374
/* 4211 */    MCD_OPC_Decode, 242, 22, 169, 2, // Opcode: t2PLIpci
8375
/* 4216 */    MCD_OPC_CheckPredicate, 38, 122, 15, 0, // Skip to: 8183
8376
/* 4221 */    MCD_OPC_Decode, 178, 22, 169, 2, // Opcode: t2LDRSBpci
8377
/* 4226 */    MCD_OPC_FilterValue, 2, 207, 2, 0, // Skip to: 4950
8378
/* 4231 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
8379
/* 4234 */    MCD_OPC_FilterValue, 0, 159, 1, 0, // Skip to: 4654
8380
/* 4239 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8381
/* 4242 */    MCD_OPC_FilterValue, 0, 77, 0, 0, // Skip to: 4324
8382
/* 4247 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8383
/* 4250 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4272
8384
/* 4255 */    MCD_OPC_CheckPredicate, 38, 83, 15, 0, // Skip to: 8183
8385
/* 4260 */    MCD_OPC_CheckField, 12, 4, 15, 76, 15, 0, // Skip to: 8183
8386
/* 4267 */    MCD_OPC_Decode, 195, 22, 239, 1, // Opcode: t2LSLrr
8387
/* 4272 */    MCD_OPC_FilterValue, 1, 66, 15, 0, // Skip to: 8183
8388
/* 4277 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8389
/* 4280 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4302
8390
/* 4285 */    MCD_OPC_CheckPredicate, 45, 53, 15, 0, // Skip to: 8183
8391
/* 4290 */    MCD_OPC_CheckField, 12, 4, 15, 46, 15, 0, // Skip to: 8183
8392
/* 4297 */    MCD_OPC_Decode, 141, 23, 170, 2, // Opcode: t2SADD8
8393
/* 4302 */    MCD_OPC_FilterValue, 1, 36, 15, 0, // Skip to: 8183
8394
/* 4307 */    MCD_OPC_CheckPredicate, 45, 31, 15, 0, // Skip to: 8183
8395
/* 4312 */    MCD_OPC_CheckField, 12, 4, 15, 24, 15, 0, // Skip to: 8183
8396
/* 4319 */    MCD_OPC_Decode, 140, 23, 170, 2, // Opcode: t2SADD16
8397
/* 4324 */    MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 4390
8398
/* 4329 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8399
/* 4332 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 4361
8400
/* 4337 */    MCD_OPC_CheckPredicate, 45, 1, 15, 0, // Skip to: 8183
8401
/* 4342 */    MCD_OPC_CheckField, 23, 1, 1, 250, 14, 0, // Skip to: 8183
8402
/* 4349 */    MCD_OPC_CheckField, 12, 4, 15, 243, 14, 0, // Skip to: 8183
8403
/* 4356 */    MCD_OPC_Decode, 246, 22, 170, 2, // Opcode: t2QADD8
8404
/* 4361 */    MCD_OPC_FilterValue, 1, 233, 14, 0, // Skip to: 8183
8405
/* 4366 */    MCD_OPC_CheckPredicate, 45, 228, 14, 0, // Skip to: 8183
8406
/* 4371 */    MCD_OPC_CheckField, 23, 1, 1, 221, 14, 0, // Skip to: 8183
8407
/* 4378 */    MCD_OPC_CheckField, 12, 4, 15, 214, 14, 0, // Skip to: 8183
8408
/* 4385 */    MCD_OPC_Decode, 245, 22, 170, 2, // Opcode: t2QADD16
8409
/* 4390 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 4456
8410
/* 4395 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8411
/* 4398 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 4427
8412
/* 4403 */    MCD_OPC_CheckPredicate, 45, 191, 14, 0, // Skip to: 8183
8413
/* 4408 */    MCD_OPC_CheckField, 23, 1, 1, 184, 14, 0, // Skip to: 8183
8414
/* 4415 */    MCD_OPC_CheckField, 12, 4, 15, 177, 14, 0, // Skip to: 8183
8415
/* 4422 */    MCD_OPC_Decode, 152, 23, 170, 2, // Opcode: t2SHADD8
8416
/* 4427 */    MCD_OPC_FilterValue, 1, 167, 14, 0, // Skip to: 8183
8417
/* 4432 */    MCD_OPC_CheckPredicate, 45, 162, 14, 0, // Skip to: 8183
8418
/* 4437 */    MCD_OPC_CheckField, 23, 1, 1, 155, 14, 0, // Skip to: 8183
8419
/* 4444 */    MCD_OPC_CheckField, 12, 4, 15, 148, 14, 0, // Skip to: 8183
8420
/* 4451 */    MCD_OPC_Decode, 151, 23, 170, 2, // Opcode: t2SHADD16
8421
/* 4456 */    MCD_OPC_FilterValue, 4, 61, 0, 0, // Skip to: 4522
8422
/* 4461 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8423
/* 4464 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 4493
8424
/* 4469 */    MCD_OPC_CheckPredicate, 45, 125, 14, 0, // Skip to: 8183
8425
/* 4474 */    MCD_OPC_CheckField, 23, 1, 1, 118, 14, 0, // Skip to: 8183
8426
/* 4481 */    MCD_OPC_CheckField, 12, 4, 15, 111, 14, 0, // Skip to: 8183
8427
/* 4488 */    MCD_OPC_Decode, 152, 24, 170, 2, // Opcode: t2UADD8
8428
/* 4493 */    MCD_OPC_FilterValue, 1, 101, 14, 0, // Skip to: 8183
8429
/* 4498 */    MCD_OPC_CheckPredicate, 45, 96, 14, 0, // Skip to: 8183
8430
/* 4503 */    MCD_OPC_CheckField, 23, 1, 1, 89, 14, 0, // Skip to: 8183
8431
/* 4510 */    MCD_OPC_CheckField, 12, 4, 15, 82, 14, 0, // Skip to: 8183
8432
/* 4517 */    MCD_OPC_Decode, 151, 24, 170, 2, // Opcode: t2UADD16
8433
/* 4522 */    MCD_OPC_FilterValue, 5, 61, 0, 0, // Skip to: 4588
8434
/* 4527 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8435
/* 4530 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 4559
8436
/* 4535 */    MCD_OPC_CheckPredicate, 45, 59, 14, 0, // Skip to: 8183
8437
/* 4540 */    MCD_OPC_CheckField, 23, 1, 1, 52, 14, 0, // Skip to: 8183
8438
/* 4547 */    MCD_OPC_CheckField, 12, 4, 15, 45, 14, 0, // Skip to: 8183
8439
/* 4554 */    MCD_OPC_Decode, 167, 24, 170, 2, // Opcode: t2UQADD8
8440
/* 4559 */    MCD_OPC_FilterValue, 1, 35, 14, 0, // Skip to: 8183
8441
/* 4564 */    MCD_OPC_CheckPredicate, 45, 30, 14, 0, // Skip to: 8183
8442
/* 4569 */    MCD_OPC_CheckField, 23, 1, 1, 23, 14, 0, // Skip to: 8183
8443
/* 4576 */    MCD_OPC_CheckField, 12, 4, 15, 16, 14, 0, // Skip to: 8183
8444
/* 4583 */    MCD_OPC_Decode, 166, 24, 170, 2, // Opcode: t2UQADD16
8445
/* 4588 */    MCD_OPC_FilterValue, 6, 6, 14, 0, // Skip to: 8183
8446
/* 4593 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8447
/* 4596 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 4625
8448
/* 4601 */    MCD_OPC_CheckPredicate, 45, 249, 13, 0, // Skip to: 8183
8449
/* 4606 */    MCD_OPC_CheckField, 23, 1, 1, 242, 13, 0, // Skip to: 8183
8450
/* 4613 */    MCD_OPC_CheckField, 12, 4, 15, 235, 13, 0, // Skip to: 8183
8451
/* 4620 */    MCD_OPC_Decode, 158, 24, 170, 2, // Opcode: t2UHADD8
8452
/* 4625 */    MCD_OPC_FilterValue, 1, 225, 13, 0, // Skip to: 8183
8453
/* 4630 */    MCD_OPC_CheckPredicate, 45, 220, 13, 0, // Skip to: 8183
8454
/* 4635 */    MCD_OPC_CheckField, 23, 1, 1, 213, 13, 0, // Skip to: 8183
8455
/* 4642 */    MCD_OPC_CheckField, 12, 4, 15, 206, 13, 0, // Skip to: 8183
8456
/* 4649 */    MCD_OPC_Decode, 157, 24, 170, 2, // Opcode: t2UHADD16
8457
/* 4654 */    MCD_OPC_FilterValue, 1, 196, 13, 0, // Skip to: 8183
8458
/* 4659 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8459
/* 4662 */    MCD_OPC_FilterValue, 0, 139, 0, 0, // Skip to: 4806
8460
/* 4667 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8461
/* 4670 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 4710
8462
/* 4675 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8463
/* 4678 */    MCD_OPC_FilterValue, 15, 172, 13, 0, // Skip to: 8183
8464
/* 4683 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 4700
8465
/* 4688 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 4700
8466
/* 4695 */    MCD_OPC_Decode, 137, 24, 171, 2, // Opcode: t2SXTH
8467
/* 4700 */    MCD_OPC_CheckPredicate, 43, 150, 13, 0, // Skip to: 8183
8468
/* 4705 */    MCD_OPC_Decode, 134, 24, 172, 2, // Opcode: t2SXTAH
8469
/* 4710 */    MCD_OPC_FilterValue, 1, 140, 13, 0, // Skip to: 8183
8470
/* 4715 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8471
/* 4718 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4740
8472
/* 4723 */    MCD_OPC_CheckPredicate, 45, 127, 13, 0, // Skip to: 8183
8473
/* 4728 */    MCD_OPC_CheckField, 12, 4, 15, 120, 13, 0, // Skip to: 8183
8474
/* 4735 */    MCD_OPC_Decode, 244, 22, 173, 2, // Opcode: t2QADD
8475
/* 4740 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 4762
8476
/* 4745 */    MCD_OPC_CheckPredicate, 45, 105, 13, 0, // Skip to: 8183
8477
/* 4750 */    MCD_OPC_CheckField, 12, 4, 15, 98, 13, 0, // Skip to: 8183
8478
/* 4757 */    MCD_OPC_Decode, 248, 22, 173, 2, // Opcode: t2QDADD
8479
/* 4762 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 4784
8480
/* 4767 */    MCD_OPC_CheckPredicate, 45, 83, 13, 0, // Skip to: 8183
8481
/* 4772 */    MCD_OPC_CheckField, 12, 4, 15, 76, 13, 0, // Skip to: 8183
8482
/* 4779 */    MCD_OPC_Decode, 251, 22, 173, 2, // Opcode: t2QSUB
8483
/* 4784 */    MCD_OPC_FilterValue, 3, 66, 13, 0, // Skip to: 8183
8484
/* 4789 */    MCD_OPC_CheckPredicate, 45, 61, 13, 0, // Skip to: 8183
8485
/* 4794 */    MCD_OPC_CheckField, 12, 4, 15, 54, 13, 0, // Skip to: 8183
8486
/* 4801 */    MCD_OPC_Decode, 249, 22, 173, 2, // Opcode: t2QDSUB
8487
/* 4806 */    MCD_OPC_FilterValue, 1, 44, 13, 0, // Skip to: 8183
8488
/* 4811 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8489
/* 4814 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 4854
8490
/* 4819 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8491
/* 4822 */    MCD_OPC_FilterValue, 15, 28, 13, 0, // Skip to: 8183
8492
/* 4827 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 4844
8493
/* 4832 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 4844
8494
/* 4839 */    MCD_OPC_Decode, 184, 24, 171, 2, // Opcode: t2UXTH
8495
/* 4844 */    MCD_OPC_CheckPredicate, 43, 6, 13, 0, // Skip to: 8183
8496
/* 4849 */    MCD_OPC_Decode, 181, 24, 172, 2, // Opcode: t2UXTAH
8497
/* 4854 */    MCD_OPC_FilterValue, 1, 252, 12, 0, // Skip to: 8183
8498
/* 4859 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8499
/* 4862 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4884
8500
/* 4867 */    MCD_OPC_CheckPredicate, 38, 239, 12, 0, // Skip to: 8183
8501
/* 4872 */    MCD_OPC_CheckField, 12, 4, 15, 232, 12, 0, // Skip to: 8183
8502
/* 4879 */    MCD_OPC_Decode, 255, 22, 174, 2, // Opcode: t2REV
8503
/* 4884 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 4906
8504
/* 4889 */    MCD_OPC_CheckPredicate, 38, 217, 12, 0, // Skip to: 8183
8505
/* 4894 */    MCD_OPC_CheckField, 12, 4, 15, 210, 12, 0, // Skip to: 8183
8506
/* 4901 */    MCD_OPC_Decode, 128, 23, 174, 2, // Opcode: t2REV16
8507
/* 4906 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 4928
8508
/* 4911 */    MCD_OPC_CheckPredicate, 38, 195, 12, 0, // Skip to: 8183
8509
/* 4916 */    MCD_OPC_CheckField, 12, 4, 15, 188, 12, 0, // Skip to: 8183
8510
/* 4923 */    MCD_OPC_Decode, 254, 22, 174, 2, // Opcode: t2RBIT
8511
/* 4928 */    MCD_OPC_FilterValue, 3, 178, 12, 0, // Skip to: 8183
8512
/* 4933 */    MCD_OPC_CheckPredicate, 38, 173, 12, 0, // Skip to: 8183
8513
/* 4938 */    MCD_OPC_CheckField, 12, 4, 15, 166, 12, 0, // Skip to: 8183
8514
/* 4945 */    MCD_OPC_Decode, 129, 23, 174, 2, // Opcode: t2REVSH
8515
/* 4950 */    MCD_OPC_FilterValue, 3, 156, 12, 0, // Skip to: 8183
8516
/* 4955 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
8517
/* 4958 */    MCD_OPC_FilterValue, 0, 98, 0, 0, // Skip to: 5061
8518
/* 4963 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8519
/* 4966 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 5021
8520
/* 4971 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8521
/* 4974 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 5006
8522
/* 4979 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 4996
8523
/* 4984 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 4996
8524
/* 4991 */    MCD_OPC_Decode, 221, 22, 170, 2, // Opcode: t2MUL
8525
/* 4996 */    MCD_OPC_CheckPredicate, 38, 110, 12, 0, // Skip to: 8183
8526
/* 5001 */    MCD_OPC_Decode, 202, 22, 175, 2, // Opcode: t2MLA
8527
/* 5006 */    MCD_OPC_FilterValue, 1, 100, 12, 0, // Skip to: 8183
8528
/* 5011 */    MCD_OPC_CheckPredicate, 38, 95, 12, 0, // Skip to: 8183
8529
/* 5016 */    MCD_OPC_Decode, 187, 23, 176, 2, // Opcode: t2SMULL
8530
/* 5021 */    MCD_OPC_FilterValue, 1, 85, 12, 0, // Skip to: 8183
8531
/* 5026 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8532
/* 5029 */    MCD_OPC_FilterValue, 0, 77, 12, 0, // Skip to: 8183
8533
/* 5034 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 5051
8534
/* 5039 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5051
8535
/* 5046 */    MCD_OPC_Decode, 185, 23, 170, 2, // Opcode: t2SMULBB
8536
/* 5051 */    MCD_OPC_CheckPredicate, 45, 55, 12, 0, // Skip to: 8183
8537
/* 5056 */    MCD_OPC_Decode, 158, 23, 175, 2, // Opcode: t2SMLABB
8538
/* 5061 */    MCD_OPC_FilterValue, 1, 65, 0, 0, // Skip to: 5131
8539
/* 5066 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8540
/* 5069 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 5091
8541
/* 5074 */    MCD_OPC_CheckPredicate, 38, 32, 12, 0, // Skip to: 8183
8542
/* 5079 */    MCD_OPC_CheckField, 23, 1, 0, 25, 12, 0, // Skip to: 8183
8543
/* 5086 */    MCD_OPC_Decode, 203, 22, 175, 2, // Opcode: t2MLS
8544
/* 5091 */    MCD_OPC_FilterValue, 1, 15, 12, 0, // Skip to: 8183
8545
/* 5096 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8546
/* 5099 */    MCD_OPC_FilterValue, 0, 7, 12, 0, // Skip to: 8183
8547
/* 5104 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 5121
8548
/* 5109 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5121
8549
/* 5116 */    MCD_OPC_Decode, 186, 23, 170, 2, // Opcode: t2SMULBT
8550
/* 5121 */    MCD_OPC_CheckPredicate, 45, 241, 11, 0, // Skip to: 8183
8551
/* 5126 */    MCD_OPC_Decode, 159, 23, 175, 2, // Opcode: t2SMLABT
8552
/* 5131 */    MCD_OPC_FilterValue, 2, 43, 0, 0, // Skip to: 5179
8553
/* 5136 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8554
/* 5139 */    MCD_OPC_FilterValue, 1, 223, 11, 0, // Skip to: 8183
8555
/* 5144 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8556
/* 5147 */    MCD_OPC_FilterValue, 0, 215, 11, 0, // Skip to: 8183
8557
/* 5152 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 5169
8558
/* 5157 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5169
8559
/* 5164 */    MCD_OPC_Decode, 188, 23, 170, 2, // Opcode: t2SMULTB
8560
/* 5169 */    MCD_OPC_CheckPredicate, 45, 193, 11, 0, // Skip to: 8183
8561
/* 5174 */    MCD_OPC_Decode, 169, 23, 175, 2, // Opcode: t2SMLATB
8562
/* 5179 */    MCD_OPC_FilterValue, 3, 43, 0, 0, // Skip to: 5227
8563
/* 5184 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8564
/* 5187 */    MCD_OPC_FilterValue, 1, 175, 11, 0, // Skip to: 8183
8565
/* 5192 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8566
/* 5195 */    MCD_OPC_FilterValue, 0, 167, 11, 0, // Skip to: 8183
8567
/* 5200 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 5217
8568
/* 5205 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5217
8569
/* 5212 */    MCD_OPC_Decode, 189, 23, 170, 2, // Opcode: t2SMULTT
8570
/* 5217 */    MCD_OPC_CheckPredicate, 45, 145, 11, 0, // Skip to: 8183
8571
/* 5222 */    MCD_OPC_Decode, 170, 23, 175, 2, // Opcode: t2SMLATT
8572
/* 5227 */    MCD_OPC_FilterValue, 15, 135, 11, 0, // Skip to: 8183
8573
/* 5232 */    MCD_OPC_CheckPredicate, 55, 130, 11, 0, // Skip to: 8183
8574
/* 5237 */    MCD_OPC_CheckField, 23, 1, 1, 123, 11, 0, // Skip to: 8183
8575
/* 5244 */    MCD_OPC_CheckField, 20, 1, 1, 116, 11, 0, // Skip to: 8183
8576
/* 5251 */    MCD_OPC_CheckField, 12, 4, 15, 109, 11, 0, // Skip to: 8183
8577
/* 5258 */    MCD_OPC_Decode, 147, 23, 170, 2, // Opcode: t2SDIV
8578
/* 5263 */    MCD_OPC_FilterValue, 1, 129, 4, 0, // Skip to: 6421
8579
/* 5268 */    MCD_OPC_ExtractField, 24, 3,  // Inst{26-24} ...
8580
/* 5271 */    MCD_OPC_FilterValue, 0, 82, 1, 0, // Skip to: 5614
8581
/* 5276 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8582
/* 5279 */    MCD_OPC_FilterValue, 0, 125, 0, 0, // Skip to: 5409
8583
/* 5284 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8584
/* 5287 */    MCD_OPC_FilterValue, 0, 102, 0, 0, // Skip to: 5394
8585
/* 5292 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8586
/* 5295 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 5317
8587
/* 5300 */    MCD_OPC_CheckPredicate, 38, 62, 11, 0, // Skip to: 8183
8588
/* 5305 */    MCD_OPC_CheckField, 6, 4, 0, 55, 11, 0, // Skip to: 8183
8589
/* 5312 */    MCD_OPC_Decode, 248, 23, 160, 2, // Opcode: t2STRHs
8590
/* 5317 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 5339
8591
/* 5322 */    MCD_OPC_CheckPredicate, 38, 40, 11, 0, // Skip to: 8183
8592
/* 5327 */    MCD_OPC_CheckField, 8, 1, 1, 33, 11, 0, // Skip to: 8183
8593
/* 5334 */    MCD_OPC_Decode, 244, 23, 161, 2, // Opcode: t2STRH_POST
8594
/* 5339 */    MCD_OPC_FilterValue, 3, 23, 11, 0, // Skip to: 8183
8595
/* 5344 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8596
/* 5347 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 5379
8597
/* 5352 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 5369
8598
/* 5357 */    MCD_OPC_CheckField, 9, 1, 1, 5, 0, 0, // Skip to: 5369
8599
/* 5364 */    MCD_OPC_Decode, 243, 23, 162, 2, // Opcode: t2STRHT
8600
/* 5369 */    MCD_OPC_CheckPredicate, 38, 249, 10, 0, // Skip to: 8183
8601
/* 5374 */    MCD_OPC_Decode, 247, 23, 163, 2, // Opcode: t2STRHi8
8602
/* 5379 */    MCD_OPC_FilterValue, 1, 239, 10, 0, // Skip to: 8183
8603
/* 5384 */    MCD_OPC_CheckPredicate, 38, 234, 10, 0, // Skip to: 8183
8604
/* 5389 */    MCD_OPC_Decode, 245, 23, 161, 2, // Opcode: t2STRH_PRE
8605
/* 5394 */    MCD_OPC_FilterValue, 1, 224, 10, 0, // Skip to: 8183
8606
/* 5399 */    MCD_OPC_CheckPredicate, 38, 219, 10, 0, // Skip to: 8183
8607
/* 5404 */    MCD_OPC_Decode, 246, 23, 164, 2, // Opcode: t2STRHi12
8608
/* 5409 */    MCD_OPC_FilterValue, 1, 209, 10, 0, // Skip to: 8183
8609
/* 5414 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8610
/* 5417 */    MCD_OPC_FilterValue, 0, 143, 0, 0, // Skip to: 5565
8611
/* 5422 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8612
/* 5425 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 5465
8613
/* 5430 */    MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
8614
/* 5433 */    MCD_OPC_FilterValue, 0, 159, 0, 0, // Skip to: 5597
8615
/* 5438 */    MCD_OPC_CheckPredicate, 56, 12, 0, 0, // Skip to: 5455
8616
/* 5443 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5455
8617
/* 5450 */    MCD_OPC_Decode, 235, 22, 165, 2, // Opcode: t2PLDWs
8618
/* 5455 */    MCD_OPC_CheckPredicate, 38, 137, 0, 0, // Skip to: 5597
8619
/* 5460 */    MCD_OPC_Decode, 172, 22, 165, 2, // Opcode: t2LDRHs
8620
/* 5465 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 5487
8621
/* 5470 */    MCD_OPC_CheckPredicate, 38, 122, 0, 0, // Skip to: 5597
8622
/* 5475 */    MCD_OPC_CheckField, 8, 1, 1, 115, 0, 0, // Skip to: 5597
8623
/* 5482 */    MCD_OPC_Decode, 167, 22, 161, 2, // Opcode: t2LDRH_POST
8624
/* 5487 */    MCD_OPC_FilterValue, 3, 105, 0, 0, // Skip to: 5597
8625
/* 5492 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8626
/* 5495 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 5550
8627
/* 5500 */    MCD_OPC_ExtractField, 9, 1,  // Inst{9} ...
8628
/* 5503 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 5525
8629
/* 5508 */    MCD_OPC_CheckPredicate, 56, 27, 0, 0, // Skip to: 5540
8630
/* 5513 */    MCD_OPC_CheckField, 12, 4, 15, 20, 0, 0, // Skip to: 5540
8631
/* 5520 */    MCD_OPC_Decode, 234, 22, 166, 2, // Opcode: t2PLDWi8
8632
/* 5525 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5540
8633
/* 5530 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 5540
8634
/* 5535 */    MCD_OPC_Decode, 166, 22, 167, 2, // Opcode: t2LDRHT
8635
/* 5540 */    MCD_OPC_CheckPredicate, 38, 52, 0, 0, // Skip to: 5597
8636
/* 5545 */    MCD_OPC_Decode, 170, 22, 166, 2, // Opcode: t2LDRHi8
8637
/* 5550 */    MCD_OPC_FilterValue, 1, 42, 0, 0, // Skip to: 5597
8638
/* 5555 */    MCD_OPC_CheckPredicate, 38, 37, 0, 0, // Skip to: 5597
8639
/* 5560 */    MCD_OPC_Decode, 168, 22, 161, 2, // Opcode: t2LDRH_PRE
8640
/* 5565 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 5597
8641
/* 5570 */    MCD_OPC_CheckPredicate, 56, 12, 0, 0, // Skip to: 5587
8642
/* 5575 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 5587
8643
/* 5582 */    MCD_OPC_Decode, 233, 22, 168, 2, // Opcode: t2PLDWi12
8644
/* 5587 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 5597
8645
/* 5592 */    MCD_OPC_Decode, 169, 22, 168, 2, // Opcode: t2LDRHi12
8646
/* 5597 */    MCD_OPC_CheckPredicate, 38, 21, 10, 0, // Skip to: 8183
8647
/* 5602 */    MCD_OPC_CheckField, 16, 4, 15, 14, 10, 0, // Skip to: 8183
8648
/* 5609 */    MCD_OPC_Decode, 171, 22, 169, 2, // Opcode: t2LDRHpci
8649
/* 5614 */    MCD_OPC_FilterValue, 1, 150, 0, 0, // Skip to: 5769
8650
/* 5619 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8651
/* 5622 */    MCD_OPC_FilterValue, 1, 252, 9, 0, // Skip to: 8183
8652
/* 5627 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8653
/* 5630 */    MCD_OPC_FilterValue, 0, 102, 0, 0, // Skip to: 5737
8654
/* 5635 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8655
/* 5638 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 5660
8656
/* 5643 */    MCD_OPC_CheckPredicate, 38, 104, 0, 0, // Skip to: 5752
8657
/* 5648 */    MCD_OPC_CheckField, 6, 4, 0, 97, 0, 0, // Skip to: 5752
8658
/* 5655 */    MCD_OPC_Decode, 186, 22, 165, 2, // Opcode: t2LDRSHs
8659
/* 5660 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 5682
8660
/* 5665 */    MCD_OPC_CheckPredicate, 38, 82, 0, 0, // Skip to: 5752
8661
/* 5670 */    MCD_OPC_CheckField, 8, 1, 1, 75, 0, 0, // Skip to: 5752
8662
/* 5677 */    MCD_OPC_Decode, 181, 22, 161, 2, // Opcode: t2LDRSH_POST
8663
/* 5682 */    MCD_OPC_FilterValue, 3, 65, 0, 0, // Skip to: 5752
8664
/* 5687 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8665
/* 5690 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 5722
8666
/* 5695 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 5712
8667
/* 5700 */    MCD_OPC_CheckField, 9, 1, 1, 5, 0, 0, // Skip to: 5712
8668
/* 5707 */    MCD_OPC_Decode, 180, 22, 167, 2, // Opcode: t2LDRSHT
8669
/* 5712 */    MCD_OPC_CheckPredicate, 38, 35, 0, 0, // Skip to: 5752
8670
/* 5717 */    MCD_OPC_Decode, 184, 22, 166, 2, // Opcode: t2LDRSHi8
8671
/* 5722 */    MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 5752
8672
/* 5727 */    MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 5752
8673
/* 5732 */    MCD_OPC_Decode, 182, 22, 161, 2, // Opcode: t2LDRSH_PRE
8674
/* 5737 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5752
8675
/* 5742 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 5752
8676
/* 5747 */    MCD_OPC_Decode, 183, 22, 168, 2, // Opcode: t2LDRSHi12
8677
/* 5752 */    MCD_OPC_CheckPredicate, 38, 122, 9, 0, // Skip to: 8183
8678
/* 5757 */    MCD_OPC_CheckField, 16, 4, 15, 115, 9, 0, // Skip to: 8183
8679
/* 5764 */    MCD_OPC_Decode, 185, 22, 169, 2, // Opcode: t2LDRSHpci
8680
/* 5769 */    MCD_OPC_FilterValue, 2, 156, 1, 0, // Skip to: 6186
8681
/* 5774 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
8682
/* 5777 */    MCD_OPC_FilterValue, 0, 242, 0, 0, // Skip to: 6024
8683
/* 5782 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8684
/* 5785 */    MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 5844
8685
/* 5790 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8686
/* 5793 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 5815
8687
/* 5798 */    MCD_OPC_CheckPredicate, 38, 76, 9, 0, // Skip to: 8183
8688
/* 5803 */    MCD_OPC_CheckField, 12, 4, 15, 69, 9, 0, // Skip to: 8183
8689
/* 5810 */    MCD_OPC_Decode, 197, 22, 239, 1, // Opcode: t2LSRrr
8690
/* 5815 */    MCD_OPC_FilterValue, 1, 59, 9, 0, // Skip to: 8183
8691
/* 5820 */    MCD_OPC_CheckPredicate, 45, 54, 9, 0, // Skip to: 8183
8692
/* 5825 */    MCD_OPC_CheckField, 20, 1, 0, 47, 9, 0, // Skip to: 8183
8693
/* 5832 */    MCD_OPC_CheckField, 12, 4, 15, 40, 9, 0, // Skip to: 8183
8694
/* 5839 */    MCD_OPC_Decode, 142, 23, 170, 2, // Opcode: t2SASX
8695
/* 5844 */    MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 5880
8696
/* 5849 */    MCD_OPC_CheckPredicate, 45, 25, 9, 0, // Skip to: 8183
8697
/* 5854 */    MCD_OPC_CheckField, 23, 1, 1, 18, 9, 0, // Skip to: 8183
8698
/* 5861 */    MCD_OPC_CheckField, 20, 1, 0, 11, 9, 0, // Skip to: 8183
8699
/* 5868 */    MCD_OPC_CheckField, 12, 4, 15, 4, 9, 0, // Skip to: 8183
8700
/* 5875 */    MCD_OPC_Decode, 247, 22, 170, 2, // Opcode: t2QASX
8701
/* 5880 */    MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 5916
8702
/* 5885 */    MCD_OPC_CheckPredicate, 45, 245, 8, 0, // Skip to: 8183
8703
/* 5890 */    MCD_OPC_CheckField, 23, 1, 1, 238, 8, 0, // Skip to: 8183
8704
/* 5897 */    MCD_OPC_CheckField, 20, 1, 0, 231, 8, 0, // Skip to: 8183
8705
/* 5904 */    MCD_OPC_CheckField, 12, 4, 15, 224, 8, 0, // Skip to: 8183
8706
/* 5911 */    MCD_OPC_Decode, 153, 23, 170, 2, // Opcode: t2SHASX
8707
/* 5916 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 5952
8708
/* 5921 */    MCD_OPC_CheckPredicate, 45, 209, 8, 0, // Skip to: 8183
8709
/* 5926 */    MCD_OPC_CheckField, 23, 1, 1, 202, 8, 0, // Skip to: 8183
8710
/* 5933 */    MCD_OPC_CheckField, 20, 1, 0, 195, 8, 0, // Skip to: 8183
8711
/* 5940 */    MCD_OPC_CheckField, 12, 4, 15, 188, 8, 0, // Skip to: 8183
8712
/* 5947 */    MCD_OPC_Decode, 153, 24, 170, 2, // Opcode: t2UASX
8713
/* 5952 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 5988
8714
/* 5957 */    MCD_OPC_CheckPredicate, 45, 173, 8, 0, // Skip to: 8183
8715
/* 5962 */    MCD_OPC_CheckField, 23, 1, 1, 166, 8, 0, // Skip to: 8183
8716
/* 5969 */    MCD_OPC_CheckField, 20, 1, 0, 159, 8, 0, // Skip to: 8183
8717
/* 5976 */    MCD_OPC_CheckField, 12, 4, 15, 152, 8, 0, // Skip to: 8183
8718
/* 5983 */    MCD_OPC_Decode, 168, 24, 170, 2, // Opcode: t2UQASX
8719
/* 5988 */    MCD_OPC_FilterValue, 6, 142, 8, 0, // Skip to: 8183
8720
/* 5993 */    MCD_OPC_CheckPredicate, 45, 137, 8, 0, // Skip to: 8183
8721
/* 5998 */    MCD_OPC_CheckField, 23, 1, 1, 130, 8, 0, // Skip to: 8183
8722
/* 6005 */    MCD_OPC_CheckField, 20, 1, 0, 123, 8, 0, // Skip to: 8183
8723
/* 6012 */    MCD_OPC_CheckField, 12, 4, 15, 116, 8, 0, // Skip to: 8183
8724
/* 6019 */    MCD_OPC_Decode, 159, 24, 170, 2, // Opcode: t2UHASX
8725
/* 6024 */    MCD_OPC_FilterValue, 1, 106, 8, 0, // Skip to: 8183
8726
/* 6029 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8727
/* 6032 */    MCD_OPC_FilterValue, 0, 72, 0, 0, // Skip to: 6109
8728
/* 6037 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8729
/* 6040 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 6080
8730
/* 6045 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8731
/* 6048 */    MCD_OPC_FilterValue, 15, 82, 8, 0, // Skip to: 8183
8732
/* 6053 */    MCD_OPC_CheckPredicate, 43, 12, 0, 0, // Skip to: 6070
8733
/* 6058 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 6070
8734
/* 6065 */    MCD_OPC_Decode, 136, 24, 171, 2, // Opcode: t2SXTB16
8735
/* 6070 */    MCD_OPC_CheckPredicate, 43, 60, 8, 0, // Skip to: 8183
8736
/* 6075 */    MCD_OPC_Decode, 133, 24, 172, 2, // Opcode: t2SXTAB16
8737
/* 6080 */    MCD_OPC_FilterValue, 1, 50, 8, 0, // Skip to: 8183
8738
/* 6085 */    MCD_OPC_CheckPredicate, 45, 45, 8, 0, // Skip to: 8183
8739
/* 6090 */    MCD_OPC_CheckField, 12, 4, 15, 38, 8, 0, // Skip to: 8183
8740
/* 6097 */    MCD_OPC_CheckField, 4, 3, 0, 31, 8, 0, // Skip to: 8183
8741
/* 6104 */    MCD_OPC_Decode, 148, 23, 177, 2, // Opcode: t2SEL
8742
/* 6109 */    MCD_OPC_FilterValue, 1, 21, 8, 0, // Skip to: 8183
8743
/* 6114 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8744
/* 6117 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 6157
8745
/* 6122 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8746
/* 6125 */    MCD_OPC_FilterValue, 15, 5, 8, 0, // Skip to: 8183
8747
/* 6130 */    MCD_OPC_CheckPredicate, 43, 12, 0, 0, // Skip to: 6147
8748
/* 6135 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 6147
8749
/* 6142 */    MCD_OPC_Decode, 183, 24, 171, 2, // Opcode: t2UXTB16
8750
/* 6147 */    MCD_OPC_CheckPredicate, 43, 239, 7, 0, // Skip to: 8183
8751
/* 6152 */    MCD_OPC_Decode, 180, 24, 172, 2, // Opcode: t2UXTAB16
8752
/* 6157 */    MCD_OPC_FilterValue, 1, 229, 7, 0, // Skip to: 8183
8753
/* 6162 */    MCD_OPC_CheckPredicate, 38, 224, 7, 0, // Skip to: 8183
8754
/* 6167 */    MCD_OPC_CheckField, 12, 4, 15, 217, 7, 0, // Skip to: 8183
8755
/* 6174 */    MCD_OPC_CheckField, 4, 3, 0, 210, 7, 0, // Skip to: 8183
8756
/* 6181 */    MCD_OPC_Decode, 222, 21, 174, 2, // Opcode: t2CLZ
8757
/* 6186 */    MCD_OPC_FilterValue, 3, 200, 7, 0, // Skip to: 8183
8758
/* 6191 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
8759
/* 6194 */    MCD_OPC_FilterValue, 0, 98, 0, 0, // Skip to: 6297
8760
/* 6199 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8761
/* 6202 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 6257
8762
/* 6207 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8763
/* 6210 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 6242
8764
/* 6215 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 6232
8765
/* 6220 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 6232
8766
/* 6227 */    MCD_OPC_Decode, 183, 23, 170, 2, // Opcode: t2SMUAD
8767
/* 6232 */    MCD_OPC_CheckPredicate, 45, 154, 7, 0, // Skip to: 8183
8768
/* 6237 */    MCD_OPC_Decode, 160, 23, 175, 2, // Opcode: t2SMLAD
8769
/* 6242 */    MCD_OPC_FilterValue, 1, 144, 7, 0, // Skip to: 8183
8770
/* 6247 */    MCD_OPC_CheckPredicate, 38, 139, 7, 0, // Skip to: 8183
8771
/* 6252 */    MCD_OPC_Decode, 165, 24, 176, 2, // Opcode: t2UMULL
8772
/* 6257 */    MCD_OPC_FilterValue, 1, 129, 7, 0, // Skip to: 8183
8773
/* 6262 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8774
/* 6265 */    MCD_OPC_FilterValue, 0, 121, 7, 0, // Skip to: 8183
8775
/* 6270 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 6287
8776
/* 6275 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 6287
8777
/* 6282 */    MCD_OPC_Decode, 190, 23, 170, 2, // Opcode: t2SMULWB
8778
/* 6287 */    MCD_OPC_CheckPredicate, 45, 99, 7, 0, // Skip to: 8183
8779
/* 6292 */    MCD_OPC_Decode, 171, 23, 175, 2, // Opcode: t2SMLAWB
8780
/* 6297 */    MCD_OPC_FilterValue, 1, 83, 0, 0, // Skip to: 6385
8781
/* 6302 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8782
/* 6305 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 6345
8783
/* 6310 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8784
/* 6313 */    MCD_OPC_FilterValue, 0, 73, 7, 0, // Skip to: 8183
8785
/* 6318 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 6335
8786
/* 6323 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 6335
8787
/* 6330 */    MCD_OPC_Decode, 184, 23, 170, 2, // Opcode: t2SMUADX
8788
/* 6335 */    MCD_OPC_CheckPredicate, 45, 51, 7, 0, // Skip to: 8183
8789
/* 6340 */    MCD_OPC_Decode, 161, 23, 175, 2, // Opcode: t2SMLADX
8790
/* 6345 */    MCD_OPC_FilterValue, 1, 41, 7, 0, // Skip to: 8183
8791
/* 6350 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8792
/* 6353 */    MCD_OPC_FilterValue, 0, 33, 7, 0, // Skip to: 8183
8793
/* 6358 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 6375
8794
/* 6363 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 6375
8795
/* 6370 */    MCD_OPC_Decode, 191, 23, 170, 2, // Opcode: t2SMULWT
8796
/* 6375 */    MCD_OPC_CheckPredicate, 45, 11, 7, 0, // Skip to: 8183
8797
/* 6380 */    MCD_OPC_Decode, 172, 23, 175, 2, // Opcode: t2SMLAWT
8798
/* 6385 */    MCD_OPC_FilterValue, 15, 1, 7, 0, // Skip to: 8183
8799
/* 6390 */    MCD_OPC_CheckPredicate, 55, 252, 6, 0, // Skip to: 8183
8800
/* 6395 */    MCD_OPC_CheckField, 23, 1, 1, 245, 6, 0, // Skip to: 8183
8801
/* 6402 */    MCD_OPC_CheckField, 20, 1, 1, 238, 6, 0, // Skip to: 8183
8802
/* 6409 */    MCD_OPC_CheckField, 12, 4, 15, 231, 6, 0, // Skip to: 8183
8803
/* 6416 */    MCD_OPC_Decode, 156, 24, 170, 2, // Opcode: t2UDIV
8804
/* 6421 */    MCD_OPC_FilterValue, 2, 107, 5, 0, // Skip to: 7813
8805
/* 6426 */    MCD_OPC_ExtractField, 24, 3,  // Inst{26-24} ...
8806
/* 6429 */    MCD_OPC_FilterValue, 0, 24, 1, 0, // Skip to: 6714
8807
/* 6434 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8808
/* 6437 */    MCD_OPC_FilterValue, 0, 125, 0, 0, // Skip to: 6567
8809
/* 6442 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8810
/* 6445 */    MCD_OPC_FilterValue, 0, 102, 0, 0, // Skip to: 6552
8811
/* 6450 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8812
/* 6453 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 6475
8813
/* 6458 */    MCD_OPC_CheckPredicate, 38, 184, 6, 0, // Skip to: 8183
8814
/* 6463 */    MCD_OPC_CheckField, 6, 4, 0, 177, 6, 0, // Skip to: 8183
8815
/* 6470 */    MCD_OPC_Decode, 254, 23, 178, 2, // Opcode: t2STRs
8816
/* 6475 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 6497
8817
/* 6480 */    MCD_OPC_CheckPredicate, 38, 162, 6, 0, // Skip to: 8183
8818
/* 6485 */    MCD_OPC_CheckField, 8, 1, 1, 155, 6, 0, // Skip to: 8183
8819
/* 6492 */    MCD_OPC_Decode, 250, 23, 161, 2, // Opcode: t2STR_POST
8820
/* 6497 */    MCD_OPC_FilterValue, 3, 145, 6, 0, // Skip to: 8183
8821
/* 6502 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8822
/* 6505 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 6537
8823
/* 6510 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 6527
8824
/* 6515 */    MCD_OPC_CheckField, 9, 1, 1, 5, 0, 0, // Skip to: 6527
8825
/* 6522 */    MCD_OPC_Decode, 249, 23, 162, 2, // Opcode: t2STRT
8826
/* 6527 */    MCD_OPC_CheckPredicate, 38, 115, 6, 0, // Skip to: 8183
8827
/* 6532 */    MCD_OPC_Decode, 253, 23, 179, 2, // Opcode: t2STRi8
8828
/* 6537 */    MCD_OPC_FilterValue, 1, 105, 6, 0, // Skip to: 8183
8829
/* 6542 */    MCD_OPC_CheckPredicate, 38, 100, 6, 0, // Skip to: 8183
8830
/* 6547 */    MCD_OPC_Decode, 251, 23, 161, 2, // Opcode: t2STR_PRE
8831
/* 6552 */    MCD_OPC_FilterValue, 1, 90, 6, 0, // Skip to: 8183
8832
/* 6557 */    MCD_OPC_CheckPredicate, 38, 85, 6, 0, // Skip to: 8183
8833
/* 6562 */    MCD_OPC_Decode, 252, 23, 180, 2, // Opcode: t2STRi12
8834
/* 6567 */    MCD_OPC_FilterValue, 1, 75, 6, 0, // Skip to: 8183
8835
/* 6572 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8836
/* 6575 */    MCD_OPC_FilterValue, 0, 102, 0, 0, // Skip to: 6682
8837
/* 6580 */    MCD_OPC_ExtractField, 10, 2,  // Inst{11-10} ...
8838
/* 6583 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 6605
8839
/* 6588 */    MCD_OPC_CheckPredicate, 38, 104, 0, 0, // Skip to: 6697
8840
/* 6593 */    MCD_OPC_CheckField, 6, 4, 0, 97, 0, 0, // Skip to: 6697
8841
/* 6600 */    MCD_OPC_Decode, 193, 22, 165, 2, // Opcode: t2LDRs
8842
/* 6605 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 6627
8843
/* 6610 */    MCD_OPC_CheckPredicate, 38, 82, 0, 0, // Skip to: 6697
8844
/* 6615 */    MCD_OPC_CheckField, 8, 1, 1, 75, 0, 0, // Skip to: 6697
8845
/* 6622 */    MCD_OPC_Decode, 188, 22, 161, 2, // Opcode: t2LDR_POST
8846
/* 6627 */    MCD_OPC_FilterValue, 3, 65, 0, 0, // Skip to: 6697
8847
/* 6632 */    MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
8848
/* 6635 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 6667
8849
/* 6640 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 6657
8850
/* 6645 */    MCD_OPC_CheckField, 9, 1, 1, 5, 0, 0, // Skip to: 6657
8851
/* 6652 */    MCD_OPC_Decode, 187, 22, 167, 2, // Opcode: t2LDRT
8852
/* 6657 */    MCD_OPC_CheckPredicate, 38, 35, 0, 0, // Skip to: 6697
8853
/* 6662 */    MCD_OPC_Decode, 191, 22, 166, 2, // Opcode: t2LDRi8
8854
/* 6667 */    MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 6697
8855
/* 6672 */    MCD_OPC_CheckPredicate, 38, 20, 0, 0, // Skip to: 6697
8856
/* 6677 */    MCD_OPC_Decode, 189, 22, 161, 2, // Opcode: t2LDR_PRE
8857
/* 6682 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 6697
8858
/* 6687 */    MCD_OPC_CheckPredicate, 38, 5, 0, 0, // Skip to: 6697
8859
/* 6692 */    MCD_OPC_Decode, 190, 22, 168, 2, // Opcode: t2LDRi12
8860
/* 6697 */    MCD_OPC_CheckPredicate, 38, 201, 5, 0, // Skip to: 8183
8861
/* 6702 */    MCD_OPC_CheckField, 16, 4, 15, 194, 5, 0, // Skip to: 8183
8862
/* 6709 */    MCD_OPC_Decode, 192, 22, 169, 2, // Opcode: t2LDRpci
8863
/* 6714 */    MCD_OPC_FilterValue, 2, 163, 2, 0, // Skip to: 7394
8864
/* 6719 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
8865
/* 6722 */    MCD_OPC_FilterValue, 0, 159, 1, 0, // Skip to: 7142
8866
/* 6727 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8867
/* 6730 */    MCD_OPC_FilterValue, 0, 77, 0, 0, // Skip to: 6812
8868
/* 6735 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8869
/* 6738 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 6760
8870
/* 6743 */    MCD_OPC_CheckPredicate, 38, 155, 5, 0, // Skip to: 8183
8871
/* 6748 */    MCD_OPC_CheckField, 12, 4, 15, 148, 5, 0, // Skip to: 8183
8872
/* 6755 */    MCD_OPC_Decode, 210, 21, 239, 1, // Opcode: t2ASRrr
8873
/* 6760 */    MCD_OPC_FilterValue, 1, 138, 5, 0, // Skip to: 8183
8874
/* 6765 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8875
/* 6768 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 6790
8876
/* 6773 */    MCD_OPC_CheckPredicate, 45, 125, 5, 0, // Skip to: 8183
8877
/* 6778 */    MCD_OPC_CheckField, 12, 4, 15, 118, 5, 0, // Skip to: 8183
8878
/* 6785 */    MCD_OPC_Decode, 202, 23, 170, 2, // Opcode: t2SSUB8
8879
/* 6790 */    MCD_OPC_FilterValue, 1, 108, 5, 0, // Skip to: 8183
8880
/* 6795 */    MCD_OPC_CheckPredicate, 45, 103, 5, 0, // Skip to: 8183
8881
/* 6800 */    MCD_OPC_CheckField, 12, 4, 15, 96, 5, 0, // Skip to: 8183
8882
/* 6807 */    MCD_OPC_Decode, 201, 23, 170, 2, // Opcode: t2SSUB16
8883
/* 6812 */    MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 6878
8884
/* 6817 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8885
/* 6820 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 6849
8886
/* 6825 */    MCD_OPC_CheckPredicate, 45, 73, 5, 0, // Skip to: 8183
8887
/* 6830 */    MCD_OPC_CheckField, 23, 1, 1, 66, 5, 0, // Skip to: 8183
8888
/* 6837 */    MCD_OPC_CheckField, 12, 4, 15, 59, 5, 0, // Skip to: 8183
8889
/* 6844 */    MCD_OPC_Decode, 253, 22, 170, 2, // Opcode: t2QSUB8
8890
/* 6849 */    MCD_OPC_FilterValue, 1, 49, 5, 0, // Skip to: 8183
8891
/* 6854 */    MCD_OPC_CheckPredicate, 45, 44, 5, 0, // Skip to: 8183
8892
/* 6859 */    MCD_OPC_CheckField, 23, 1, 1, 37, 5, 0, // Skip to: 8183
8893
/* 6866 */    MCD_OPC_CheckField, 12, 4, 15, 30, 5, 0, // Skip to: 8183
8894
/* 6873 */    MCD_OPC_Decode, 252, 22, 170, 2, // Opcode: t2QSUB16
8895
/* 6878 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 6944
8896
/* 6883 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8897
/* 6886 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 6915
8898
/* 6891 */    MCD_OPC_CheckPredicate, 45, 7, 5, 0, // Skip to: 8183
8899
/* 6896 */    MCD_OPC_CheckField, 23, 1, 1, 0, 5, 0, // Skip to: 8183
8900
/* 6903 */    MCD_OPC_CheckField, 12, 4, 15, 249, 4, 0, // Skip to: 8183
8901
/* 6910 */    MCD_OPC_Decode, 156, 23, 170, 2, // Opcode: t2SHSUB8
8902
/* 6915 */    MCD_OPC_FilterValue, 1, 239, 4, 0, // Skip to: 8183
8903
/* 6920 */    MCD_OPC_CheckPredicate, 45, 234, 4, 0, // Skip to: 8183
8904
/* 6925 */    MCD_OPC_CheckField, 23, 1, 1, 227, 4, 0, // Skip to: 8183
8905
/* 6932 */    MCD_OPC_CheckField, 12, 4, 15, 220, 4, 0, // Skip to: 8183
8906
/* 6939 */    MCD_OPC_Decode, 155, 23, 170, 2, // Opcode: t2SHSUB16
8907
/* 6944 */    MCD_OPC_FilterValue, 4, 61, 0, 0, // Skip to: 7010
8908
/* 6949 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8909
/* 6952 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 6981
8910
/* 6957 */    MCD_OPC_CheckPredicate, 45, 197, 4, 0, // Skip to: 8183
8911
/* 6962 */    MCD_OPC_CheckField, 23, 1, 1, 190, 4, 0, // Skip to: 8183
8912
/* 6969 */    MCD_OPC_CheckField, 12, 4, 15, 183, 4, 0, // Skip to: 8183
8913
/* 6976 */    MCD_OPC_Decode, 178, 24, 170, 2, // Opcode: t2USUB8
8914
/* 6981 */    MCD_OPC_FilterValue, 1, 173, 4, 0, // Skip to: 8183
8915
/* 6986 */    MCD_OPC_CheckPredicate, 45, 168, 4, 0, // Skip to: 8183
8916
/* 6991 */    MCD_OPC_CheckField, 23, 1, 1, 161, 4, 0, // Skip to: 8183
8917
/* 6998 */    MCD_OPC_CheckField, 12, 4, 15, 154, 4, 0, // Skip to: 8183
8918
/* 7005 */    MCD_OPC_Decode, 177, 24, 170, 2, // Opcode: t2USUB16
8919
/* 7010 */    MCD_OPC_FilterValue, 5, 61, 0, 0, // Skip to: 7076
8920
/* 7015 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8921
/* 7018 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 7047
8922
/* 7023 */    MCD_OPC_CheckPredicate, 45, 131, 4, 0, // Skip to: 8183
8923
/* 7028 */    MCD_OPC_CheckField, 23, 1, 1, 124, 4, 0, // Skip to: 8183
8924
/* 7035 */    MCD_OPC_CheckField, 12, 4, 15, 117, 4, 0, // Skip to: 8183
8925
/* 7042 */    MCD_OPC_Decode, 171, 24, 170, 2, // Opcode: t2UQSUB8
8926
/* 7047 */    MCD_OPC_FilterValue, 1, 107, 4, 0, // Skip to: 8183
8927
/* 7052 */    MCD_OPC_CheckPredicate, 45, 102, 4, 0, // Skip to: 8183
8928
/* 7057 */    MCD_OPC_CheckField, 23, 1, 1, 95, 4, 0, // Skip to: 8183
8929
/* 7064 */    MCD_OPC_CheckField, 12, 4, 15, 88, 4, 0, // Skip to: 8183
8930
/* 7071 */    MCD_OPC_Decode, 170, 24, 170, 2, // Opcode: t2UQSUB16
8931
/* 7076 */    MCD_OPC_FilterValue, 6, 78, 4, 0, // Skip to: 8183
8932
/* 7081 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8933
/* 7084 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 7113
8934
/* 7089 */    MCD_OPC_CheckPredicate, 45, 65, 4, 0, // Skip to: 8183
8935
/* 7094 */    MCD_OPC_CheckField, 23, 1, 1, 58, 4, 0, // Skip to: 8183
8936
/* 7101 */    MCD_OPC_CheckField, 12, 4, 15, 51, 4, 0, // Skip to: 8183
8937
/* 7108 */    MCD_OPC_Decode, 162, 24, 170, 2, // Opcode: t2UHSUB8
8938
/* 7113 */    MCD_OPC_FilterValue, 1, 41, 4, 0, // Skip to: 8183
8939
/* 7118 */    MCD_OPC_CheckPredicate, 45, 36, 4, 0, // Skip to: 8183
8940
/* 7123 */    MCD_OPC_CheckField, 23, 1, 1, 29, 4, 0, // Skip to: 8183
8941
/* 7130 */    MCD_OPC_CheckField, 12, 4, 15, 22, 4, 0, // Skip to: 8183
8942
/* 7137 */    MCD_OPC_Decode, 161, 24, 170, 2, // Opcode: t2UHSUB16
8943
/* 7142 */    MCD_OPC_FilterValue, 1, 12, 4, 0, // Skip to: 8183
8944
/* 7147 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8945
/* 7150 */    MCD_OPC_FilterValue, 0, 117, 0, 0, // Skip to: 7272
8946
/* 7155 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8947
/* 7158 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 7198
8948
/* 7163 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8949
/* 7166 */    MCD_OPC_FilterValue, 15, 244, 3, 0, // Skip to: 8183
8950
/* 7171 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 7188
8951
/* 7176 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 7188
8952
/* 7183 */    MCD_OPC_Decode, 135, 24, 171, 2, // Opcode: t2SXTB
8953
/* 7188 */    MCD_OPC_CheckPredicate, 43, 222, 3, 0, // Skip to: 8183
8954
/* 7193 */    MCD_OPC_Decode, 132, 24, 172, 2, // Opcode: t2SXTAB
8955
/* 7198 */    MCD_OPC_FilterValue, 1, 212, 3, 0, // Skip to: 8183
8956
/* 7203 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8957
/* 7206 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 7228
8958
/* 7211 */    MCD_OPC_CheckPredicate, 57, 199, 3, 0, // Skip to: 8183
8959
/* 7216 */    MCD_OPC_CheckField, 12, 4, 15, 192, 3, 0, // Skip to: 8183
8960
/* 7223 */    MCD_OPC_Decode, 232, 21, 170, 2, // Opcode: t2CRC32B
8961
/* 7228 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 7250
8962
/* 7233 */    MCD_OPC_CheckPredicate, 57, 177, 3, 0, // Skip to: 8183
8963
/* 7238 */    MCD_OPC_CheckField, 12, 4, 15, 170, 3, 0, // Skip to: 8183
8964
/* 7245 */    MCD_OPC_Decode, 236, 21, 170, 2, // Opcode: t2CRC32H
8965
/* 7250 */    MCD_OPC_FilterValue, 2, 160, 3, 0, // Skip to: 8183
8966
/* 7255 */    MCD_OPC_CheckPredicate, 57, 155, 3, 0, // Skip to: 8183
8967
/* 7260 */    MCD_OPC_CheckField, 12, 4, 15, 148, 3, 0, // Skip to: 8183
8968
/* 7267 */    MCD_OPC_Decode, 237, 21, 170, 2, // Opcode: t2CRC32W
8969
/* 7272 */    MCD_OPC_FilterValue, 1, 138, 3, 0, // Skip to: 8183
8970
/* 7277 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8971
/* 7280 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 7320
8972
/* 7285 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8973
/* 7288 */    MCD_OPC_FilterValue, 15, 122, 3, 0, // Skip to: 8183
8974
/* 7293 */    MCD_OPC_CheckPredicate, 38, 12, 0, 0, // Skip to: 7310
8975
/* 7298 */    MCD_OPC_CheckField, 16, 4, 15, 5, 0, 0, // Skip to: 7310
8976
/* 7305 */    MCD_OPC_Decode, 182, 24, 171, 2, // Opcode: t2UXTB
8977
/* 7310 */    MCD_OPC_CheckPredicate, 43, 100, 3, 0, // Skip to: 8183
8978
/* 7315 */    MCD_OPC_Decode, 179, 24, 172, 2, // Opcode: t2UXTAB
8979
/* 7320 */    MCD_OPC_FilterValue, 1, 90, 3, 0, // Skip to: 8183
8980
/* 7325 */    MCD_OPC_ExtractField, 4, 3,  // Inst{6-4} ...
8981
/* 7328 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 7350
8982
/* 7333 */    MCD_OPC_CheckPredicate, 57, 77, 3, 0, // Skip to: 8183
8983
/* 7338 */    MCD_OPC_CheckField, 12, 4, 15, 70, 3, 0, // Skip to: 8183
8984
/* 7345 */    MCD_OPC_Decode, 233, 21, 170, 2, // Opcode: t2CRC32CB
8985
/* 7350 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 7372
8986
/* 7355 */    MCD_OPC_CheckPredicate, 57, 55, 3, 0, // Skip to: 8183
8987
/* 7360 */    MCD_OPC_CheckField, 12, 4, 15, 48, 3, 0, // Skip to: 8183
8988
/* 7367 */    MCD_OPC_Decode, 234, 21, 170, 2, // Opcode: t2CRC32CH
8989
/* 7372 */    MCD_OPC_FilterValue, 2, 38, 3, 0, // Skip to: 8183
8990
/* 7377 */    MCD_OPC_CheckPredicate, 57, 33, 3, 0, // Skip to: 8183
8991
/* 7382 */    MCD_OPC_CheckField, 12, 4, 15, 26, 3, 0, // Skip to: 8183
8992
/* 7389 */    MCD_OPC_Decode, 235, 21, 170, 2, // Opcode: t2CRC32CW
8993
/* 7394 */    MCD_OPC_FilterValue, 3, 16, 3, 0, // Skip to: 8183
8994
/* 7399 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
8995
/* 7402 */    MCD_OPC_FilterValue, 0, 98, 0, 0, // Skip to: 7505
8996
/* 7407 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
8997
/* 7410 */    MCD_OPC_FilterValue, 0, 50, 0, 0, // Skip to: 7465
8998
/* 7415 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
8999
/* 7418 */    MCD_OPC_FilterValue, 0, 27, 0, 0, // Skip to: 7450
9000
/* 7423 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 7440
9001
/* 7428 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 7440
9002
/* 7435 */    MCD_OPC_Decode, 192, 23, 170, 2, // Opcode: t2SMUSD
9003
/* 7440 */    MCD_OPC_CheckPredicate, 45, 226, 2, 0, // Skip to: 8183
9004
/* 7445 */    MCD_OPC_Decode, 173, 23, 175, 2, // Opcode: t2SMLSD
9005
/* 7450 */    MCD_OPC_FilterValue, 1, 216, 2, 0, // Skip to: 8183
9006
/* 7455 */    MCD_OPC_CheckPredicate, 38, 211, 2, 0, // Skip to: 8183
9007
/* 7460 */    MCD_OPC_Decode, 162, 23, 181, 2, // Opcode: t2SMLAL
9008
/* 7465 */    MCD_OPC_FilterValue, 1, 201, 2, 0, // Skip to: 8183
9009
/* 7470 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9010
/* 7473 */    MCD_OPC_FilterValue, 0, 193, 2, 0, // Skip to: 8183
9011
/* 7478 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 7495
9012
/* 7483 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 7495
9013
/* 7490 */    MCD_OPC_Decode, 181, 23, 170, 2, // Opcode: t2SMMUL
9014
/* 7495 */    MCD_OPC_CheckPredicate, 45, 171, 2, 0, // Skip to: 8183
9015
/* 7500 */    MCD_OPC_Decode, 177, 23, 175, 2, // Opcode: t2SMMLA
9016
/* 7505 */    MCD_OPC_FilterValue, 1, 83, 0, 0, // Skip to: 7593
9017
/* 7510 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9018
/* 7513 */    MCD_OPC_FilterValue, 0, 35, 0, 0, // Skip to: 7553
9019
/* 7518 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9020
/* 7521 */    MCD_OPC_FilterValue, 0, 145, 2, 0, // Skip to: 8183
9021
/* 7526 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 7543
9022
/* 7531 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 7543
9023
/* 7538 */    MCD_OPC_Decode, 193, 23, 170, 2, // Opcode: t2SMUSDX
9024
/* 7543 */    MCD_OPC_CheckPredicate, 45, 123, 2, 0, // Skip to: 8183
9025
/* 7548 */    MCD_OPC_Decode, 174, 23, 175, 2, // Opcode: t2SMLSDX
9026
/* 7553 */    MCD_OPC_FilterValue, 1, 113, 2, 0, // Skip to: 8183
9027
/* 7558 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9028
/* 7561 */    MCD_OPC_FilterValue, 0, 105, 2, 0, // Skip to: 8183
9029
/* 7566 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 7583
9030
/* 7571 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 7583
9031
/* 7578 */    MCD_OPC_Decode, 182, 23, 170, 2, // Opcode: t2SMMULR
9032
/* 7583 */    MCD_OPC_CheckPredicate, 45, 83, 2, 0, // Skip to: 8183
9033
/* 7588 */    MCD_OPC_Decode, 178, 23, 175, 2, // Opcode: t2SMMLAR
9034
/* 7593 */    MCD_OPC_FilterValue, 8, 24, 0, 0, // Skip to: 7622
9035
/* 7598 */    MCD_OPC_CheckPredicate, 45, 68, 2, 0, // Skip to: 8183
9036
/* 7603 */    MCD_OPC_CheckField, 23, 1, 1, 61, 2, 0, // Skip to: 8183
9037
/* 7610 */    MCD_OPC_CheckField, 20, 1, 0, 54, 2, 0, // Skip to: 8183
9038
/* 7617 */    MCD_OPC_Decode, 163, 23, 181, 2, // Opcode: t2SMLALBB
9039
/* 7622 */    MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 7651
9040
/* 7627 */    MCD_OPC_CheckPredicate, 45, 39, 2, 0, // Skip to: 8183
9041
/* 7632 */    MCD_OPC_CheckField, 23, 1, 1, 32, 2, 0, // Skip to: 8183
9042
/* 7639 */    MCD_OPC_CheckField, 20, 1, 0, 25, 2, 0, // Skip to: 8183
9043
/* 7646 */    MCD_OPC_Decode, 164, 23, 181, 2, // Opcode: t2SMLALBT
9044
/* 7651 */    MCD_OPC_FilterValue, 10, 24, 0, 0, // Skip to: 7680
9045
/* 7656 */    MCD_OPC_CheckPredicate, 45, 10, 2, 0, // Skip to: 8183
9046
/* 7661 */    MCD_OPC_CheckField, 23, 1, 1, 3, 2, 0, // Skip to: 8183
9047
/* 7668 */    MCD_OPC_CheckField, 20, 1, 0, 252, 1, 0, // Skip to: 8183
9048
/* 7675 */    MCD_OPC_Decode, 167, 23, 181, 2, // Opcode: t2SMLALTB
9049
/* 7680 */    MCD_OPC_FilterValue, 11, 24, 0, 0, // Skip to: 7709
9050
/* 7685 */    MCD_OPC_CheckPredicate, 45, 237, 1, 0, // Skip to: 8183
9051
/* 7690 */    MCD_OPC_CheckField, 23, 1, 1, 230, 1, 0, // Skip to: 8183
9052
/* 7697 */    MCD_OPC_CheckField, 20, 1, 0, 223, 1, 0, // Skip to: 8183
9053
/* 7704 */    MCD_OPC_Decode, 168, 23, 181, 2, // Opcode: t2SMLALTT
9054
/* 7709 */    MCD_OPC_FilterValue, 12, 47, 0, 0, // Skip to: 7761
9055
/* 7714 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9056
/* 7717 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 7739
9057
/* 7722 */    MCD_OPC_CheckPredicate, 45, 200, 1, 0, // Skip to: 8183
9058
/* 7727 */    MCD_OPC_CheckField, 23, 1, 1, 193, 1, 0, // Skip to: 8183
9059
/* 7734 */    MCD_OPC_Decode, 165, 23, 181, 2, // Opcode: t2SMLALD
9060
/* 7739 */    MCD_OPC_FilterValue, 1, 183, 1, 0, // Skip to: 8183
9061
/* 7744 */    MCD_OPC_CheckPredicate, 45, 178, 1, 0, // Skip to: 8183
9062
/* 7749 */    MCD_OPC_CheckField, 23, 1, 1, 171, 1, 0, // Skip to: 8183
9063
/* 7756 */    MCD_OPC_Decode, 175, 23, 181, 2, // Opcode: t2SMLSLD
9064
/* 7761 */    MCD_OPC_FilterValue, 13, 161, 1, 0, // Skip to: 8183
9065
/* 7766 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9066
/* 7769 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 7791
9067
/* 7774 */    MCD_OPC_CheckPredicate, 45, 148, 1, 0, // Skip to: 8183
9068
/* 7779 */    MCD_OPC_CheckField, 23, 1, 1, 141, 1, 0, // Skip to: 8183
9069
/* 7786 */    MCD_OPC_Decode, 166, 23, 181, 2, // Opcode: t2SMLALDX
9070
/* 7791 */    MCD_OPC_FilterValue, 1, 131, 1, 0, // Skip to: 8183
9071
/* 7796 */    MCD_OPC_CheckPredicate, 45, 126, 1, 0, // Skip to: 8183
9072
/* 7801 */    MCD_OPC_CheckField, 23, 1, 1, 119, 1, 0, // Skip to: 8183
9073
/* 7808 */    MCD_OPC_Decode, 176, 23, 181, 2, // Opcode: t2SMLSLDX
9074
/* 7813 */    MCD_OPC_FilterValue, 3, 109, 1, 0, // Skip to: 8183
9075
/* 7818 */    MCD_OPC_ExtractField, 4, 4,  // Inst{7-4} ...
9076
/* 7821 */    MCD_OPC_FilterValue, 0, 131, 0, 0, // Skip to: 7957
9077
/* 7826 */    MCD_OPC_ExtractField, 23, 4,  // Inst{26-23} ...
9078
/* 7829 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 7851
9079
/* 7834 */    MCD_OPC_CheckPredicate, 38, 88, 1, 0, // Skip to: 8183
9080
/* 7839 */    MCD_OPC_CheckField, 12, 4, 15, 81, 1, 0, // Skip to: 8183
9081
/* 7846 */    MCD_OPC_Decode, 135, 23, 239, 1, // Opcode: t2RORrr
9082
/* 7851 */    MCD_OPC_FilterValue, 5, 24, 0, 0, // Skip to: 7880
9083
/* 7856 */    MCD_OPC_CheckPredicate, 45, 66, 1, 0, // Skip to: 8183
9084
/* 7861 */    MCD_OPC_CheckField, 20, 1, 0, 59, 1, 0, // Skip to: 8183
9085
/* 7868 */    MCD_OPC_CheckField, 12, 4, 15, 52, 1, 0, // Skip to: 8183
9086
/* 7875 */    MCD_OPC_Decode, 200, 23, 170, 2, // Opcode: t2SSAX
9087
/* 7880 */    MCD_OPC_FilterValue, 6, 50, 0, 0, // Skip to: 7935
9088
/* 7885 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9089
/* 7888 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7903
9090
/* 7893 */    MCD_OPC_CheckPredicate, 45, 29, 1, 0, // Skip to: 8183
9091
/* 7898 */    MCD_OPC_Decode, 179, 23, 175, 2, // Opcode: t2SMMLS
9092
/* 7903 */    MCD_OPC_FilterValue, 1, 19, 1, 0, // Skip to: 8183
9093
/* 7908 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 7925
9094
/* 7913 */    MCD_OPC_CheckField, 12, 4, 15, 5, 0, 0, // Skip to: 7925
9095
/* 7920 */    MCD_OPC_Decode, 172, 24, 170, 2, // Opcode: t2USAD8
9096
/* 7925 */    MCD_OPC_CheckPredicate, 45, 253, 0, 0, // Skip to: 8183
9097
/* 7930 */    MCD_OPC_Decode, 173, 24, 175, 2, // Opcode: t2USADA8
9098
/* 7935 */    MCD_OPC_FilterValue, 7, 243, 0, 0, // Skip to: 8183
9099
/* 7940 */    MCD_OPC_CheckPredicate, 38, 238, 0, 0, // Skip to: 8183
9100
/* 7945 */    MCD_OPC_CheckField, 20, 1, 0, 231, 0, 0, // Skip to: 8183
9101
/* 7952 */    MCD_OPC_Decode, 164, 24, 181, 2, // Opcode: t2UMLAL
9102
/* 7957 */    MCD_OPC_FilterValue, 1, 54, 0, 0, // Skip to: 8016
9103
/* 7962 */    MCD_OPC_ExtractField, 23, 4,  // Inst{26-23} ...
9104
/* 7965 */    MCD_OPC_FilterValue, 5, 24, 0, 0, // Skip to: 7994
9105
/* 7970 */    MCD_OPC_CheckPredicate, 45, 208, 0, 0, // Skip to: 8183
9106
/* 7975 */    MCD_OPC_CheckField, 20, 1, 0, 201, 0, 0, // Skip to: 8183
9107
/* 7982 */    MCD_OPC_CheckField, 12, 4, 15, 194, 0, 0, // Skip to: 8183
9108
/* 7989 */    MCD_OPC_Decode, 250, 22, 170, 2, // Opcode: t2QSAX
9109
/* 7994 */    MCD_OPC_FilterValue, 6, 184, 0, 0, // Skip to: 8183
9110
/* 7999 */    MCD_OPC_CheckPredicate, 45, 179, 0, 0, // Skip to: 8183
9111
/* 8004 */    MCD_OPC_CheckField, 20, 1, 0, 172, 0, 0, // Skip to: 8183
9112
/* 8011 */    MCD_OPC_Decode, 180, 23, 175, 2, // Opcode: t2SMMLSR
9113
/* 8016 */    MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 8052
9114
/* 8021 */    MCD_OPC_CheckPredicate, 45, 157, 0, 0, // Skip to: 8183
9115
/* 8026 */    MCD_OPC_CheckField, 23, 4, 5, 150, 0, 0, // Skip to: 8183
9116
/* 8033 */    MCD_OPC_CheckField, 20, 1, 0, 143, 0, 0, // Skip to: 8183
9117
/* 8040 */    MCD_OPC_CheckField, 12, 4, 15, 136, 0, 0, // Skip to: 8183
9118
/* 8047 */    MCD_OPC_Decode, 154, 23, 170, 2, // Opcode: t2SHSAX
9119
/* 8052 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 8088
9120
/* 8057 */    MCD_OPC_CheckPredicate, 45, 121, 0, 0, // Skip to: 8183
9121
/* 8062 */    MCD_OPC_CheckField, 23, 4, 5, 114, 0, 0, // Skip to: 8183
9122
/* 8069 */    MCD_OPC_CheckField, 20, 1, 0, 107, 0, 0, // Skip to: 8183
9123
/* 8076 */    MCD_OPC_CheckField, 12, 4, 15, 100, 0, 0, // Skip to: 8183
9124
/* 8083 */    MCD_OPC_Decode, 176, 24, 170, 2, // Opcode: t2USAX
9125
/* 8088 */    MCD_OPC_FilterValue, 5, 31, 0, 0, // Skip to: 8124
9126
/* 8093 */    MCD_OPC_CheckPredicate, 45, 85, 0, 0, // Skip to: 8183
9127
/* 8098 */    MCD_OPC_CheckField, 23, 4, 5, 78, 0, 0, // Skip to: 8183
9128
/* 8105 */    MCD_OPC_CheckField, 20, 1, 0, 71, 0, 0, // Skip to: 8183
9129
/* 8112 */    MCD_OPC_CheckField, 12, 4, 15, 64, 0, 0, // Skip to: 8183
9130
/* 8119 */    MCD_OPC_Decode, 169, 24, 170, 2, // Opcode: t2UQSAX
9131
/* 8124 */    MCD_OPC_FilterValue, 6, 54, 0, 0, // Skip to: 8183
9132
/* 8129 */    MCD_OPC_ExtractField, 23, 4,  // Inst{26-23} ...
9133
/* 8132 */    MCD_OPC_FilterValue, 5, 24, 0, 0, // Skip to: 8161
9134
/* 8137 */    MCD_OPC_CheckPredicate, 45, 41, 0, 0, // Skip to: 8183
9135
/* 8142 */    MCD_OPC_CheckField, 20, 1, 0, 34, 0, 0, // Skip to: 8183
9136
/* 8149 */    MCD_OPC_CheckField, 12, 4, 15, 27, 0, 0, // Skip to: 8183
9137
/* 8156 */    MCD_OPC_Decode, 160, 24, 170, 2, // Opcode: t2UHSAX
9138
/* 8161 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 8183
9139
/* 8166 */    MCD_OPC_CheckPredicate, 45, 12, 0, 0, // Skip to: 8183
9140
/* 8171 */    MCD_OPC_CheckField, 20, 1, 0, 5, 0, 0, // Skip to: 8183
9141
/* 8178 */    MCD_OPC_Decode, 163, 24, 181, 2, // Opcode: t2UMAAL
9142
/* 8183 */    MCD_OPC_Fail,
9143
  0
9144
};
9145
9146
static const uint8_t DecoderTableThumb2CoProc32[] = {
9147
/* 0 */       MCD_OPC_ExtractField, 24, 8,  // Inst{31-24} ...
9148
/* 3 */       MCD_OPC_FilterValue, 236, 1, 175, 0, 0, // Skip to: 184
9149
/* 9 */       MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
9150
/* 12 */      MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 33
9151
/* 17 */      MCD_OPC_CheckPredicate, 38, 191, 2, 0, // Skip to: 725
9152
/* 22 */      MCD_OPC_CheckField, 23, 1, 1, 184, 2, 0, // Skip to: 725
9153
/* 29 */      MCD_OPC_Decode, 216, 23, 90, // Opcode: t2STC_OPTION
9154
/* 33 */      MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 54
9155
/* 38 */      MCD_OPC_CheckPredicate, 38, 170, 2, 0, // Skip to: 725
9156
/* 43 */      MCD_OPC_CheckField, 23, 1, 1, 163, 2, 0, // Skip to: 725
9157
/* 50 */      MCD_OPC_Decode, 145, 22, 90, // Opcode: t2LDC_OPTION
9158
/* 54 */      MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 68
9159
/* 59 */      MCD_OPC_CheckPredicate, 38, 149, 2, 0, // Skip to: 725
9160
/* 64 */      MCD_OPC_Decode, 217, 23, 90, // Opcode: t2STC_POST
9161
/* 68 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 82
9162
/* 73 */      MCD_OPC_CheckPredicate, 38, 135, 2, 0, // Skip to: 725
9163
/* 78 */      MCD_OPC_Decode, 146, 22, 90, // Opcode: t2LDC_POST
9164
/* 82 */      MCD_OPC_FilterValue, 4, 32, 0, 0, // Skip to: 119
9165
/* 87 */      MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9166
/* 90 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 105
9167
/* 95 */      MCD_OPC_CheckPredicate, 38, 113, 2, 0, // Skip to: 725
9168
/* 100 */     MCD_OPC_Decode, 200, 22, 182, 2, // Opcode: t2MCRR
9169
/* 105 */     MCD_OPC_FilterValue, 1, 103, 2, 0, // Skip to: 725
9170
/* 110 */     MCD_OPC_CheckPredicate, 38, 98, 2, 0, // Skip to: 725
9171
/* 115 */     MCD_OPC_Decode, 212, 23, 90, // Opcode: t2STCL_OPTION
9172
/* 119 */     MCD_OPC_FilterValue, 5, 32, 0, 0, // Skip to: 156
9173
/* 124 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9174
/* 127 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 142
9175
/* 132 */     MCD_OPC_CheckPredicate, 38, 76, 2, 0, // Skip to: 725
9176
/* 137 */     MCD_OPC_Decode, 212, 22, 183, 2, // Opcode: t2MRRC
9177
/* 142 */     MCD_OPC_FilterValue, 1, 66, 2, 0, // Skip to: 725
9178
/* 147 */     MCD_OPC_CheckPredicate, 38, 61, 2, 0, // Skip to: 725
9179
/* 152 */     MCD_OPC_Decode, 141, 22, 90, // Opcode: t2LDCL_OPTION
9180
/* 156 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 170
9181
/* 161 */     MCD_OPC_CheckPredicate, 38, 47, 2, 0, // Skip to: 725
9182
/* 166 */     MCD_OPC_Decode, 213, 23, 90, // Opcode: t2STCL_POST
9183
/* 170 */     MCD_OPC_FilterValue, 7, 38, 2, 0, // Skip to: 725
9184
/* 175 */     MCD_OPC_CheckPredicate, 38, 33, 2, 0, // Skip to: 725
9185
/* 180 */     MCD_OPC_Decode, 142, 22, 90, // Opcode: t2LDCL_POST
9186
/* 184 */     MCD_OPC_FilterValue, 237, 1, 115, 0, 0, // Skip to: 305
9187
/* 190 */     MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
9188
/* 193 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 207
9189
/* 198 */     MCD_OPC_CheckPredicate, 38, 10, 2, 0, // Skip to: 725
9190
/* 203 */     MCD_OPC_Decode, 215, 23, 90, // Opcode: t2STC_OFFSET
9191
/* 207 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 221
9192
/* 212 */     MCD_OPC_CheckPredicate, 38, 252, 1, 0, // Skip to: 725
9193
/* 217 */     MCD_OPC_Decode, 144, 22, 90, // Opcode: t2LDC_OFFSET
9194
/* 221 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 235
9195
/* 226 */     MCD_OPC_CheckPredicate, 38, 238, 1, 0, // Skip to: 725
9196
/* 231 */     MCD_OPC_Decode, 218, 23, 90, // Opcode: t2STC_PRE
9197
/* 235 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 249
9198
/* 240 */     MCD_OPC_CheckPredicate, 38, 224, 1, 0, // Skip to: 725
9199
/* 245 */     MCD_OPC_Decode, 147, 22, 90, // Opcode: t2LDC_PRE
9200
/* 249 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 263
9201
/* 254 */     MCD_OPC_CheckPredicate, 38, 210, 1, 0, // Skip to: 725
9202
/* 259 */     MCD_OPC_Decode, 211, 23, 90, // Opcode: t2STCL_OFFSET
9203
/* 263 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 277
9204
/* 268 */     MCD_OPC_CheckPredicate, 38, 196, 1, 0, // Skip to: 725
9205
/* 273 */     MCD_OPC_Decode, 140, 22, 90, // Opcode: t2LDCL_OFFSET
9206
/* 277 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 291
9207
/* 282 */     MCD_OPC_CheckPredicate, 38, 182, 1, 0, // Skip to: 725
9208
/* 287 */     MCD_OPC_Decode, 214, 23, 90, // Opcode: t2STCL_PRE
9209
/* 291 */     MCD_OPC_FilterValue, 7, 173, 1, 0, // Skip to: 725
9210
/* 296 */     MCD_OPC_CheckPredicate, 38, 168, 1, 0, // Skip to: 725
9211
/* 301 */     MCD_OPC_Decode, 143, 22, 90, // Opcode: t2LDCL_PRE
9212
/* 305 */     MCD_OPC_FilterValue, 238, 1, 53, 0, 0, // Skip to: 364
9213
/* 311 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9214
/* 314 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 328
9215
/* 319 */     MCD_OPC_CheckPredicate, 58, 145, 1, 0, // Skip to: 725
9216
/* 324 */     MCD_OPC_Decode, 219, 21, 91, // Opcode: t2CDP
9217
/* 328 */     MCD_OPC_FilterValue, 1, 136, 1, 0, // Skip to: 725
9218
/* 333 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9219
/* 336 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 350
9220
/* 341 */     MCD_OPC_CheckPredicate, 38, 123, 1, 0, // Skip to: 725
9221
/* 346 */     MCD_OPC_Decode, 198, 22, 93, // Opcode: t2MCR
9222
/* 350 */     MCD_OPC_FilterValue, 1, 114, 1, 0, // Skip to: 725
9223
/* 355 */     MCD_OPC_CheckPredicate, 38, 109, 1, 0, // Skip to: 725
9224
/* 360 */     MCD_OPC_Decode, 210, 22, 95, // Opcode: t2MRC
9225
/* 364 */     MCD_OPC_FilterValue, 252, 1, 175, 0, 0, // Skip to: 545
9226
/* 370 */     MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
9227
/* 373 */     MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 394
9228
/* 378 */     MCD_OPC_CheckPredicate, 59, 86, 1, 0, // Skip to: 725
9229
/* 383 */     MCD_OPC_CheckField, 23, 1, 1, 79, 1, 0, // Skip to: 725
9230
/* 390 */     MCD_OPC_Decode, 208, 23, 90, // Opcode: t2STC2_OPTION
9231
/* 394 */     MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 415
9232
/* 399 */     MCD_OPC_CheckPredicate, 59, 65, 1, 0, // Skip to: 725
9233
/* 404 */     MCD_OPC_CheckField, 23, 1, 1, 58, 1, 0, // Skip to: 725
9234
/* 411 */     MCD_OPC_Decode, 137, 22, 90, // Opcode: t2LDC2_OPTION
9235
/* 415 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 429
9236
/* 420 */     MCD_OPC_CheckPredicate, 59, 44, 1, 0, // Skip to: 725
9237
/* 425 */     MCD_OPC_Decode, 209, 23, 90, // Opcode: t2STC2_POST
9238
/* 429 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 443
9239
/* 434 */     MCD_OPC_CheckPredicate, 59, 30, 1, 0, // Skip to: 725
9240
/* 439 */     MCD_OPC_Decode, 138, 22, 90, // Opcode: t2LDC2_POST
9241
/* 443 */     MCD_OPC_FilterValue, 4, 32, 0, 0, // Skip to: 480
9242
/* 448 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9243
/* 451 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 466
9244
/* 456 */     MCD_OPC_CheckPredicate, 58, 8, 1, 0, // Skip to: 725
9245
/* 461 */     MCD_OPC_Decode, 201, 22, 182, 2, // Opcode: t2MCRR2
9246
/* 466 */     MCD_OPC_FilterValue, 1, 254, 0, 0, // Skip to: 725
9247
/* 471 */     MCD_OPC_CheckPredicate, 59, 249, 0, 0, // Skip to: 725
9248
/* 476 */     MCD_OPC_Decode, 204, 23, 90, // Opcode: t2STC2L_OPTION
9249
/* 480 */     MCD_OPC_FilterValue, 5, 32, 0, 0, // Skip to: 517
9250
/* 485 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9251
/* 488 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 503
9252
/* 493 */     MCD_OPC_CheckPredicate, 58, 227, 0, 0, // Skip to: 725
9253
/* 498 */     MCD_OPC_Decode, 213, 22, 183, 2, // Opcode: t2MRRC2
9254
/* 503 */     MCD_OPC_FilterValue, 1, 217, 0, 0, // Skip to: 725
9255
/* 508 */     MCD_OPC_CheckPredicate, 59, 212, 0, 0, // Skip to: 725
9256
/* 513 */     MCD_OPC_Decode, 133, 22, 90, // Opcode: t2LDC2L_OPTION
9257
/* 517 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 531
9258
/* 522 */     MCD_OPC_CheckPredicate, 59, 198, 0, 0, // Skip to: 725
9259
/* 527 */     MCD_OPC_Decode, 205, 23, 90, // Opcode: t2STC2L_POST
9260
/* 531 */     MCD_OPC_FilterValue, 7, 189, 0, 0, // Skip to: 725
9261
/* 536 */     MCD_OPC_CheckPredicate, 59, 184, 0, 0, // Skip to: 725
9262
/* 541 */     MCD_OPC_Decode, 134, 22, 90, // Opcode: t2LDC2L_POST
9263
/* 545 */     MCD_OPC_FilterValue, 253, 1, 115, 0, 0, // Skip to: 666
9264
/* 551 */     MCD_OPC_ExtractField, 20, 3,  // Inst{22-20} ...
9265
/* 554 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 568
9266
/* 559 */     MCD_OPC_CheckPredicate, 59, 161, 0, 0, // Skip to: 725
9267
/* 564 */     MCD_OPC_Decode, 207, 23, 90, // Opcode: t2STC2_OFFSET
9268
/* 568 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 582
9269
/* 573 */     MCD_OPC_CheckPredicate, 59, 147, 0, 0, // Skip to: 725
9270
/* 578 */     MCD_OPC_Decode, 136, 22, 90, // Opcode: t2LDC2_OFFSET
9271
/* 582 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 596
9272
/* 587 */     MCD_OPC_CheckPredicate, 59, 133, 0, 0, // Skip to: 725
9273
/* 592 */     MCD_OPC_Decode, 210, 23, 90, // Opcode: t2STC2_PRE
9274
/* 596 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 610
9275
/* 601 */     MCD_OPC_CheckPredicate, 59, 119, 0, 0, // Skip to: 725
9276
/* 606 */     MCD_OPC_Decode, 139, 22, 90, // Opcode: t2LDC2_PRE
9277
/* 610 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 624
9278
/* 615 */     MCD_OPC_CheckPredicate, 59, 105, 0, 0, // Skip to: 725
9279
/* 620 */     MCD_OPC_Decode, 203, 23, 90, // Opcode: t2STC2L_OFFSET
9280
/* 624 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 638
9281
/* 629 */     MCD_OPC_CheckPredicate, 59, 91, 0, 0, // Skip to: 725
9282
/* 634 */     MCD_OPC_Decode, 132, 22, 90, // Opcode: t2LDC2L_OFFSET
9283
/* 638 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 652
9284
/* 643 */     MCD_OPC_CheckPredicate, 59, 77, 0, 0, // Skip to: 725
9285
/* 648 */     MCD_OPC_Decode, 206, 23, 90, // Opcode: t2STC2L_PRE
9286
/* 652 */     MCD_OPC_FilterValue, 7, 68, 0, 0, // Skip to: 725
9287
/* 657 */     MCD_OPC_CheckPredicate, 59, 63, 0, 0, // Skip to: 725
9288
/* 662 */     MCD_OPC_Decode, 135, 22, 90, // Opcode: t2LDC2L_PRE
9289
/* 666 */     MCD_OPC_FilterValue, 254, 1, 53, 0, 0, // Skip to: 725
9290
/* 672 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9291
/* 675 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 689
9292
/* 680 */     MCD_OPC_CheckPredicate, 58, 40, 0, 0, // Skip to: 725
9293
/* 685 */     MCD_OPC_Decode, 220, 21, 91, // Opcode: t2CDP2
9294
/* 689 */     MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 725
9295
/* 694 */     MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
9296
/* 697 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 711
9297
/* 702 */     MCD_OPC_CheckPredicate, 58, 18, 0, 0, // Skip to: 725
9298
/* 707 */     MCD_OPC_Decode, 199, 22, 93, // Opcode: t2MCR2
9299
/* 711 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 725
9300
/* 716 */     MCD_OPC_CheckPredicate, 58, 4, 0, 0, // Skip to: 725
9301
/* 721 */     MCD_OPC_Decode, 211, 22, 95, // Opcode: t2MRC2
9302
/* 725 */     MCD_OPC_Fail,
9303
  0
9304
};
9305
9306
static const uint8_t DecoderTableThumbSBit16[] = {
9307
/* 0 */       MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
9308
/* 3 */       MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 18
9309
/* 8 */       MCD_OPC_CheckPredicate, 28, 95, 1, 0, // Skip to: 364
9310
/* 13 */      MCD_OPC_Decode, 232, 24, 184, 2, // Opcode: tLSLri
9311
/* 18 */      MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 33
9312
/* 23 */      MCD_OPC_CheckPredicate, 28, 80, 1, 0, // Skip to: 364
9313
/* 28 */      MCD_OPC_Decode, 234, 24, 184, 2, // Opcode: tLSRri
9314
/* 33 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 48
9315
/* 38 */      MCD_OPC_CheckPredicate, 28, 65, 1, 0, // Skip to: 364
9316
/* 43 */      MCD_OPC_Decode, 196, 24, 184, 2, // Opcode: tASRri
9317
/* 48 */      MCD_OPC_FilterValue, 3, 63, 0, 0, // Skip to: 116
9318
/* 53 */      MCD_OPC_ExtractField, 9, 2,  // Inst{10-9} ...
9319
/* 56 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 71
9320
/* 61 */      MCD_OPC_CheckPredicate, 28, 42, 1, 0, // Skip to: 364
9321
/* 66 */      MCD_OPC_Decode, 191, 24, 185, 2, // Opcode: tADDrr
9322
/* 71 */      MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 86
9323
/* 76 */      MCD_OPC_CheckPredicate, 28, 27, 1, 0, // Skip to: 364
9324
/* 81 */      MCD_OPC_Decode, 134, 25, 185, 2, // Opcode: tSUBrr
9325
/* 86 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 101
9326
/* 91 */      MCD_OPC_CheckPredicate, 28, 12, 1, 0, // Skip to: 364
9327
/* 96 */      MCD_OPC_Decode, 187, 24, 186, 2, // Opcode: tADDi3
9328
/* 101 */     MCD_OPC_FilterValue, 3, 2, 1, 0, // Skip to: 364
9329
/* 106 */     MCD_OPC_CheckPredicate, 28, 253, 0, 0, // Skip to: 364
9330
/* 111 */     MCD_OPC_Decode, 132, 25, 186, 2, // Opcode: tSUBi3
9331
/* 116 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 131
9332
/* 121 */     MCD_OPC_CheckPredicate, 28, 238, 0, 0, // Skip to: 364
9333
/* 126 */     MCD_OPC_Decode, 237, 24, 208, 1, // Opcode: tMOVi8
9334
/* 131 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 146
9335
/* 136 */     MCD_OPC_CheckPredicate, 28, 223, 0, 0, // Skip to: 364
9336
/* 141 */     MCD_OPC_Decode, 188, 24, 187, 2, // Opcode: tADDi8
9337
/* 146 */     MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 161
9338
/* 151 */     MCD_OPC_CheckPredicate, 28, 208, 0, 0, // Skip to: 364
9339
/* 156 */     MCD_OPC_Decode, 133, 25, 187, 2, // Opcode: tSUBi8
9340
/* 161 */     MCD_OPC_FilterValue, 8, 198, 0, 0, // Skip to: 364
9341
/* 166 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
9342
/* 169 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 184
9343
/* 174 */     MCD_OPC_CheckPredicate, 28, 185, 0, 0, // Skip to: 364
9344
/* 179 */     MCD_OPC_Decode, 195, 24, 188, 2, // Opcode: tAND
9345
/* 184 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 199
9346
/* 189 */     MCD_OPC_CheckPredicate, 28, 170, 0, 0, // Skip to: 364
9347
/* 194 */     MCD_OPC_Decode, 215, 24, 188, 2, // Opcode: tEOR
9348
/* 199 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 214
9349
/* 204 */     MCD_OPC_CheckPredicate, 28, 155, 0, 0, // Skip to: 364
9350
/* 209 */     MCD_OPC_Decode, 233, 24, 188, 2, // Opcode: tLSLrr
9351
/* 214 */     MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 229
9352
/* 219 */     MCD_OPC_CheckPredicate, 28, 140, 0, 0, // Skip to: 364
9353
/* 224 */     MCD_OPC_Decode, 235, 24, 188, 2, // Opcode: tLSRrr
9354
/* 229 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 244
9355
/* 234 */     MCD_OPC_CheckPredicate, 28, 125, 0, 0, // Skip to: 364
9356
/* 239 */     MCD_OPC_Decode, 197, 24, 188, 2, // Opcode: tASRrr
9357
/* 244 */     MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 259
9358
/* 249 */     MCD_OPC_CheckPredicate, 28, 110, 0, 0, // Skip to: 364
9359
/* 254 */     MCD_OPC_Decode, 185, 24, 188, 2, // Opcode: tADC
9360
/* 259 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 274
9361
/* 264 */     MCD_OPC_CheckPredicate, 28, 95, 0, 0, // Skip to: 364
9362
/* 269 */     MCD_OPC_Decode, 250, 24, 188, 2, // Opcode: tSBC
9363
/* 274 */     MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 289
9364
/* 279 */     MCD_OPC_CheckPredicate, 28, 80, 0, 0, // Skip to: 364
9365
/* 284 */     MCD_OPC_Decode, 248, 24, 188, 2, // Opcode: tROR
9366
/* 289 */     MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 304
9367
/* 294 */     MCD_OPC_CheckPredicate, 28, 65, 0, 0, // Skip to: 364
9368
/* 299 */     MCD_OPC_Decode, 249, 24, 207, 1, // Opcode: tRSB
9369
/* 304 */     MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 319
9370
/* 309 */     MCD_OPC_CheckPredicate, 28, 50, 0, 0, // Skip to: 364
9371
/* 314 */     MCD_OPC_Decode, 241, 24, 188, 2, // Opcode: tORR
9372
/* 319 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 334
9373
/* 324 */     MCD_OPC_CheckPredicate, 28, 35, 0, 0, // Skip to: 364
9374
/* 329 */     MCD_OPC_Decode, 239, 24, 189, 2, // Opcode: tMUL
9375
/* 334 */     MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 349
9376
/* 339 */     MCD_OPC_CheckPredicate, 28, 20, 0, 0, // Skip to: 364
9377
/* 344 */     MCD_OPC_Decode, 199, 24, 188, 2, // Opcode: tBIC
9378
/* 349 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 364
9379
/* 354 */     MCD_OPC_CheckPredicate, 28, 5, 0, 0, // Skip to: 364
9380
/* 359 */     MCD_OPC_Decode, 240, 24, 207, 1, // Opcode: tMVN
9381
/* 364 */     MCD_OPC_Fail,
9382
  0
9383
};
9384
9385
static const uint8_t DecoderTableVFP32[] = {
9386
/* 0 */       MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
9387
/* 3 */       MCD_OPC_FilterValue, 0, 21, 2, 0, // Skip to: 541
9388
/* 8 */       MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9389
/* 11 */      MCD_OPC_FilterValue, 9, 130, 0, 0, // Skip to: 146
9390
/* 16 */      MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9391
/* 19 */      MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 34
9392
/* 24 */      MCD_OPC_CheckPredicate, 60, 247, 16, 0, // Skip to: 4372
9393
/* 29 */      MCD_OPC_Decode, 205, 20, 190, 2, // Opcode: VSTRH
9394
/* 34 */      MCD_OPC_FilterValue, 14, 237, 16, 0, // Skip to: 4372
9395
/* 39 */      MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9396
/* 42 */      MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 110
9397
/* 47 */      MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9398
/* 50 */      MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 88
9399
/* 55 */      MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9400
/* 58 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 73
9401
/* 63 */      MCD_OPC_CheckPredicate, 60, 208, 16, 0, // Skip to: 4372
9402
/* 68 */      MCD_OPC_Decode, 203, 13, 191, 2, // Opcode: VMLAH
9403
/* 73 */      MCD_OPC_FilterValue, 1, 198, 16, 0, // Skip to: 4372
9404
/* 78 */      MCD_OPC_CheckPredicate, 60, 193, 16, 0, // Skip to: 4372
9405
/* 83 */      MCD_OPC_Decode, 254, 9, 192, 2, // Opcode: VDIVH
9406
/* 88 */      MCD_OPC_FilterValue, 1, 183, 16, 0, // Skip to: 4372
9407
/* 93 */      MCD_OPC_CheckPredicate, 60, 178, 16, 0, // Skip to: 4372
9408
/* 98 */      MCD_OPC_CheckField, 23, 1, 0, 171, 16, 0, // Skip to: 4372
9409
/* 105 */     MCD_OPC_Decode, 234, 13, 191, 2, // Opcode: VMLSH
9410
/* 110 */     MCD_OPC_FilterValue, 1, 161, 16, 0, // Skip to: 4372
9411
/* 115 */     MCD_OPC_CheckPredicate, 60, 156, 16, 0, // Skip to: 4372
9412
/* 120 */     MCD_OPC_CheckField, 22, 2, 0, 149, 16, 0, // Skip to: 4372
9413
/* 127 */     MCD_OPC_CheckField, 5, 2, 0, 142, 16, 0, // Skip to: 4372
9414
/* 134 */     MCD_OPC_CheckField, 0, 4, 0, 135, 16, 0, // Skip to: 4372
9415
/* 141 */     MCD_OPC_Decode, 139, 14, 193, 2, // Opcode: VMOVHR
9416
/* 146 */     MCD_OPC_FilterValue, 10, 189, 0, 0, // Skip to: 340
9417
/* 151 */     MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9418
/* 154 */     MCD_OPC_FilterValue, 12, 54, 0, 0, // Skip to: 213
9419
/* 159 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9420
/* 162 */     MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 198
9421
/* 167 */     MCD_OPC_CheckPredicate, 27, 104, 16, 0, // Skip to: 4372
9422
/* 172 */     MCD_OPC_CheckField, 22, 1, 1, 97, 16, 0, // Skip to: 4372
9423
/* 179 */     MCD_OPC_CheckField, 6, 2, 0, 90, 16, 0, // Skip to: 4372
9424
/* 186 */     MCD_OPC_CheckField, 4, 1, 1, 83, 16, 0, // Skip to: 4372
9425
/* 193 */     MCD_OPC_Decode, 155, 14, 194, 2, // Opcode: VMOVSRR
9426
/* 198 */     MCD_OPC_FilterValue, 1, 73, 16, 0, // Skip to: 4372
9427
/* 203 */     MCD_OPC_CheckPredicate, 27, 68, 16, 0, // Skip to: 4372
9428
/* 208 */     MCD_OPC_Decode, 202, 20, 195, 2, // Opcode: VSTMSIA
9429
/* 213 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 228
9430
/* 218 */     MCD_OPC_CheckPredicate, 27, 53, 16, 0, // Skip to: 4372
9431
/* 223 */     MCD_OPC_Decode, 206, 20, 196, 2, // Opcode: VSTRS
9432
/* 228 */     MCD_OPC_FilterValue, 14, 43, 16, 0, // Skip to: 4372
9433
/* 233 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9434
/* 236 */     MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 304
9435
/* 241 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9436
/* 244 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 282
9437
/* 249 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9438
/* 252 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 267
9439
/* 257 */     MCD_OPC_CheckPredicate, 27, 14, 16, 0, // Skip to: 4372
9440
/* 262 */     MCD_OPC_Decode, 214, 13, 197, 2, // Opcode: VMLAS
9441
/* 267 */     MCD_OPC_FilterValue, 1, 4, 16, 0, // Skip to: 4372
9442
/* 272 */     MCD_OPC_CheckPredicate, 27, 255, 15, 0, // Skip to: 4372
9443
/* 277 */     MCD_OPC_Decode, 255, 9, 198, 2, // Opcode: VDIVS
9444
/* 282 */     MCD_OPC_FilterValue, 1, 245, 15, 0, // Skip to: 4372
9445
/* 287 */     MCD_OPC_CheckPredicate, 27, 240, 15, 0, // Skip to: 4372
9446
/* 292 */     MCD_OPC_CheckField, 23, 1, 0, 233, 15, 0, // Skip to: 4372
9447
/* 299 */     MCD_OPC_Decode, 245, 13, 197, 2, // Opcode: VMLSS
9448
/* 304 */     MCD_OPC_FilterValue, 1, 223, 15, 0, // Skip to: 4372
9449
/* 309 */     MCD_OPC_CheckPredicate, 27, 218, 15, 0, // Skip to: 4372
9450
/* 314 */     MCD_OPC_CheckField, 22, 2, 0, 211, 15, 0, // Skip to: 4372
9451
/* 321 */     MCD_OPC_CheckField, 5, 2, 0, 204, 15, 0, // Skip to: 4372
9452
/* 328 */     MCD_OPC_CheckField, 0, 4, 0, 197, 15, 0, // Skip to: 4372
9453
/* 335 */     MCD_OPC_Decode, 154, 14, 199, 2, // Opcode: VMOVSR
9454
/* 340 */     MCD_OPC_FilterValue, 11, 187, 15, 0, // Skip to: 4372
9455
/* 345 */     MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9456
/* 348 */     MCD_OPC_FilterValue, 12, 84, 0, 0, // Skip to: 437
9457
/* 353 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9458
/* 356 */     MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 392
9459
/* 361 */     MCD_OPC_CheckPredicate, 27, 166, 15, 0, // Skip to: 4372
9460
/* 366 */     MCD_OPC_CheckField, 22, 1, 1, 159, 15, 0, // Skip to: 4372
9461
/* 373 */     MCD_OPC_CheckField, 6, 2, 0, 152, 15, 0, // Skip to: 4372
9462
/* 380 */     MCD_OPC_CheckField, 4, 1, 1, 145, 15, 0, // Skip to: 4372
9463
/* 387 */     MCD_OPC_Decode, 137, 14, 200, 2, // Opcode: VMOVDRR
9464
/* 392 */     MCD_OPC_FilterValue, 1, 135, 15, 0, // Skip to: 4372
9465
/* 397 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9466
/* 400 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 415
9467
/* 405 */     MCD_OPC_CheckPredicate, 27, 122, 15, 0, // Skip to: 4372
9468
/* 410 */     MCD_OPC_Decode, 198, 20, 201, 2, // Opcode: VSTMDIA
9469
/* 415 */     MCD_OPC_FilterValue, 1, 112, 15, 0, // Skip to: 4372
9470
/* 420 */     MCD_OPC_CheckPredicate, 27, 107, 15, 0, // Skip to: 4372
9471
/* 425 */     MCD_OPC_CheckField, 22, 1, 0, 100, 15, 0, // Skip to: 4372
9472
/* 432 */     MCD_OPC_Decode, 216, 4, 202, 2, // Opcode: FSTMXIA
9473
/* 437 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 452
9474
/* 442 */     MCD_OPC_CheckPredicate, 27, 85, 15, 0, // Skip to: 4372
9475
/* 447 */     MCD_OPC_Decode, 204, 20, 203, 2, // Opcode: VSTRD
9476
/* 452 */     MCD_OPC_FilterValue, 14, 75, 15, 0, // Skip to: 4372
9477
/* 457 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9478
/* 460 */     MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 512
9479
/* 465 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9480
/* 468 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 490
9481
/* 473 */     MCD_OPC_CheckPredicate, 61, 54, 15, 0, // Skip to: 4372
9482
/* 478 */     MCD_OPC_CheckField, 4, 1, 0, 47, 15, 0, // Skip to: 4372
9483
/* 485 */     MCD_OPC_Decode, 202, 13, 204, 2, // Opcode: VMLAD
9484
/* 490 */     MCD_OPC_FilterValue, 1, 37, 15, 0, // Skip to: 4372
9485
/* 495 */     MCD_OPC_CheckPredicate, 61, 32, 15, 0, // Skip to: 4372
9486
/* 500 */     MCD_OPC_CheckField, 4, 1, 0, 25, 15, 0, // Skip to: 4372
9487
/* 507 */     MCD_OPC_Decode, 253, 9, 205, 2, // Opcode: VDIVD
9488
/* 512 */     MCD_OPC_FilterValue, 1, 15, 15, 0, // Skip to: 4372
9489
/* 517 */     MCD_OPC_CheckPredicate, 61, 10, 15, 0, // Skip to: 4372
9490
/* 522 */     MCD_OPC_CheckField, 23, 1, 0, 3, 15, 0, // Skip to: 4372
9491
/* 529 */     MCD_OPC_CheckField, 4, 1, 0, 252, 14, 0, // Skip to: 4372
9492
/* 536 */     MCD_OPC_Decode, 233, 13, 204, 2, // Opcode: VMLSD
9493
/* 541 */     MCD_OPC_FilterValue, 1, 76, 2, 0, // Skip to: 1134
9494
/* 546 */     MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9495
/* 549 */     MCD_OPC_FilterValue, 9, 146, 0, 0, // Skip to: 700
9496
/* 554 */     MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9497
/* 557 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 572
9498
/* 562 */     MCD_OPC_CheckPredicate, 60, 221, 14, 0, // Skip to: 4372
9499
/* 567 */     MCD_OPC_Decode, 152, 13, 190, 2, // Opcode: VLDRH
9500
/* 572 */     MCD_OPC_FilterValue, 14, 211, 14, 0, // Skip to: 4372
9501
/* 577 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9502
/* 580 */     MCD_OPC_FilterValue, 0, 79, 0, 0, // Skip to: 664
9503
/* 585 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9504
/* 588 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 626
9505
/* 593 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9506
/* 596 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 611
9507
/* 601 */     MCD_OPC_CheckPredicate, 60, 182, 14, 0, // Skip to: 4372
9508
/* 606 */     MCD_OPC_Decode, 237, 14, 191, 2, // Opcode: VNMLSH
9509
/* 611 */     MCD_OPC_FilterValue, 1, 172, 14, 0, // Skip to: 4372
9510
/* 616 */     MCD_OPC_CheckPredicate, 60, 167, 14, 0, // Skip to: 4372
9511
/* 621 */     MCD_OPC_Decode, 167, 10, 191, 2, // Opcode: VFNMSH
9512
/* 626 */     MCD_OPC_FilterValue, 1, 157, 14, 0, // Skip to: 4372
9513
/* 631 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9514
/* 634 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 649
9515
/* 639 */     MCD_OPC_CheckPredicate, 60, 144, 14, 0, // Skip to: 4372
9516
/* 644 */     MCD_OPC_Decode, 234, 14, 191, 2, // Opcode: VNMLAH
9517
/* 649 */     MCD_OPC_FilterValue, 1, 134, 14, 0, // Skip to: 4372
9518
/* 654 */     MCD_OPC_CheckPredicate, 60, 129, 14, 0, // Skip to: 4372
9519
/* 659 */     MCD_OPC_Decode, 164, 10, 191, 2, // Opcode: VFNMAH
9520
/* 664 */     MCD_OPC_FilterValue, 1, 119, 14, 0, // Skip to: 4372
9521
/* 669 */     MCD_OPC_CheckPredicate, 60, 114, 14, 0, // Skip to: 4372
9522
/* 674 */     MCD_OPC_CheckField, 22, 2, 0, 107, 14, 0, // Skip to: 4372
9523
/* 681 */     MCD_OPC_CheckField, 5, 2, 0, 100, 14, 0, // Skip to: 4372
9524
/* 688 */     MCD_OPC_CheckField, 0, 4, 0, 93, 14, 0, // Skip to: 4372
9525
/* 695 */     MCD_OPC_Decode, 149, 14, 206, 2, // Opcode: VMOVRH
9526
/* 700 */     MCD_OPC_FilterValue, 10, 205, 0, 0, // Skip to: 910
9527
/* 705 */     MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9528
/* 708 */     MCD_OPC_FilterValue, 12, 54, 0, 0, // Skip to: 767
9529
/* 713 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9530
/* 716 */     MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 752
9531
/* 721 */     MCD_OPC_CheckPredicate, 27, 62, 14, 0, // Skip to: 4372
9532
/* 726 */     MCD_OPC_CheckField, 22, 1, 1, 55, 14, 0, // Skip to: 4372
9533
/* 733 */     MCD_OPC_CheckField, 6, 2, 0, 48, 14, 0, // Skip to: 4372
9534
/* 740 */     MCD_OPC_CheckField, 4, 1, 1, 41, 14, 0, // Skip to: 4372
9535
/* 747 */     MCD_OPC_Decode, 151, 14, 207, 2, // Opcode: VMOVRRS
9536
/* 752 */     MCD_OPC_FilterValue, 1, 31, 14, 0, // Skip to: 4372
9537
/* 757 */     MCD_OPC_CheckPredicate, 27, 26, 14, 0, // Skip to: 4372
9538
/* 762 */     MCD_OPC_Decode, 149, 13, 195, 2, // Opcode: VLDMSIA
9539
/* 767 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 782
9540
/* 772 */     MCD_OPC_CheckPredicate, 27, 11, 14, 0, // Skip to: 4372
9541
/* 777 */     MCD_OPC_Decode, 153, 13, 196, 2, // Opcode: VLDRS
9542
/* 782 */     MCD_OPC_FilterValue, 14, 1, 14, 0, // Skip to: 4372
9543
/* 787 */     MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9544
/* 790 */     MCD_OPC_FilterValue, 0, 79, 0, 0, // Skip to: 874
9545
/* 795 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9546
/* 798 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 836
9547
/* 803 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9548
/* 806 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 821
9549
/* 811 */     MCD_OPC_CheckPredicate, 27, 228, 13, 0, // Skip to: 4372
9550
/* 816 */     MCD_OPC_Decode, 238, 14, 197, 2, // Opcode: VNMLSS
9551
/* 821 */     MCD_OPC_FilterValue, 1, 218, 13, 0, // Skip to: 4372
9552
/* 826 */     MCD_OPC_CheckPredicate, 62, 213, 13, 0, // Skip to: 4372
9553
/* 831 */     MCD_OPC_Decode, 168, 10, 197, 2, // Opcode: VFNMSS
9554
/* 836 */     MCD_OPC_FilterValue, 1, 203, 13, 0, // Skip to: 4372
9555
/* 841 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9556
/* 844 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 859
9557
/* 849 */     MCD_OPC_CheckPredicate, 27, 190, 13, 0, // Skip to: 4372
9558
/* 854 */     MCD_OPC_Decode, 235, 14, 197, 2, // Opcode: VNMLAS
9559
/* 859 */     MCD_OPC_FilterValue, 1, 180, 13, 0, // Skip to: 4372
9560
/* 864 */     MCD_OPC_CheckPredicate, 62, 175, 13, 0, // Skip to: 4372
9561
/* 869 */     MCD_OPC_Decode, 165, 10, 197, 2, // Opcode: VFNMAS
9562
/* 874 */     MCD_OPC_FilterValue, 1, 165, 13, 0, // Skip to: 4372
9563
/* 879 */     MCD_OPC_CheckPredicate, 27, 160, 13, 0, // Skip to: 4372
9564
/* 884 */     MCD_OPC_CheckField, 22, 2, 0, 153, 13, 0, // Skip to: 4372
9565
/* 891 */     MCD_OPC_CheckField, 5, 2, 0, 146, 13, 0, // Skip to: 4372
9566
/* 898 */     MCD_OPC_CheckField, 0, 4, 0, 139, 13, 0, // Skip to: 4372
9567
/* 905 */     MCD_OPC_Decode, 152, 14, 208, 2, // Opcode: VMOVRS
9568
/* 910 */     MCD_OPC_FilterValue, 11, 129, 13, 0, // Skip to: 4372
9569
/* 915 */     MCD_OPC_ExtractField, 24, 4,  // Inst{27-24} ...
9570
/* 918 */     MCD_OPC_FilterValue, 12, 84, 0, 0, // Skip to: 1007
9571
/* 923 */     MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9572
/* 926 */     MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 962
9573
/* 931 */     MCD_OPC_CheckPredicate, 27, 108, 13, 0, // Skip to: 4372
9574
/* 936 */     MCD_OPC_CheckField, 22, 1, 1, 101, 13, 0, // Skip to: 4372
9575
/* 943 */     MCD_OPC_CheckField, 6, 2, 0, 94, 13, 0, // Skip to: 4372
9576
/* 950 */     MCD_OPC_CheckField, 4, 1, 1, 87, 13, 0, // Skip to: 4372
9577
/* 957 */     MCD_OPC_Decode, 150, 14, 209, 2, // Opcode: VMOVRRD
9578
/* 962 */     MCD_OPC_FilterValue, 1, 77, 13, 0, // Skip to: 4372
9579
/* 967 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9580
/* 970 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 985
9581
/* 975 */     MCD_OPC_CheckPredicate, 27, 64, 13, 0, // Skip to: 4372
9582
/* 980 */     MCD_OPC_Decode, 145, 13, 201, 2, // Opcode: VLDMDIA
9583
/* 985 */     MCD_OPC_FilterValue, 1, 54, 13, 0, // Skip to: 4372
9584
/* 990 */     MCD_OPC_CheckPredicate, 27, 49, 13, 0, // Skip to: 4372
9585
/* 995 */     MCD_OPC_CheckField, 22, 1, 0, 42, 13, 0, // Skip to: 4372
9586
/* 1002 */    MCD_OPC_Decode, 212, 4, 202, 2, // Opcode: FLDMXIA
9587
/* 1007 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1022
9588
/* 1012 */    MCD_OPC_CheckPredicate, 27, 27, 13, 0, // Skip to: 4372
9589
/* 1017 */    MCD_OPC_Decode, 151, 13, 203, 2, // Opcode: VLDRD
9590
/* 1022 */    MCD_OPC_FilterValue, 14, 17, 13, 0, // Skip to: 4372
9591
/* 1027 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9592
/* 1030 */    MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 1082
9593
/* 1035 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9594
/* 1038 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1060
9595
/* 1043 */    MCD_OPC_CheckPredicate, 61, 252, 12, 0, // Skip to: 4372
9596
/* 1048 */    MCD_OPC_CheckField, 4, 1, 0, 245, 12, 0, // Skip to: 4372
9597
/* 1055 */    MCD_OPC_Decode, 236, 14, 204, 2, // Opcode: VNMLSD
9598
/* 1060 */    MCD_OPC_FilterValue, 1, 235, 12, 0, // Skip to: 4372
9599
/* 1065 */    MCD_OPC_CheckPredicate, 63, 230, 12, 0, // Skip to: 4372
9600
/* 1070 */    MCD_OPC_CheckField, 4, 1, 0, 223, 12, 0, // Skip to: 4372
9601
/* 1077 */    MCD_OPC_Decode, 166, 10, 204, 2, // Opcode: VFNMSD
9602
/* 1082 */    MCD_OPC_FilterValue, 1, 213, 12, 0, // Skip to: 4372
9603
/* 1087 */    MCD_OPC_ExtractField, 23, 1,  // Inst{23} ...
9604
/* 1090 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1112
9605
/* 1095 */    MCD_OPC_CheckPredicate, 61, 200, 12, 0, // Skip to: 4372
9606
/* 1100 */    MCD_OPC_CheckField, 4, 1, 0, 193, 12, 0, // Skip to: 4372
9607
/* 1107 */    MCD_OPC_Decode, 233, 14, 204, 2, // Opcode: VNMLAD
9608
/* 1112 */    MCD_OPC_FilterValue, 1, 183, 12, 0, // Skip to: 4372
9609
/* 1117 */    MCD_OPC_CheckPredicate, 63, 178, 12, 0, // Skip to: 4372
9610
/* 1122 */    MCD_OPC_CheckField, 4, 1, 0, 171, 12, 0, // Skip to: 4372
9611
/* 1129 */    MCD_OPC_Decode, 163, 10, 204, 2, // Opcode: VFNMAD
9612
/* 1134 */    MCD_OPC_FilterValue, 2, 132, 2, 0, // Skip to: 1783
9613
/* 1139 */    MCD_OPC_ExtractField, 23, 5,  // Inst{27-23} ...
9614
/* 1142 */    MCD_OPC_FilterValue, 24, 25, 0, 0, // Skip to: 1172
9615
/* 1147 */    MCD_OPC_CheckPredicate, 64, 148, 12, 0, // Skip to: 4372
9616
/* 1152 */    MCD_OPC_CheckField, 22, 1, 0, 141, 12, 0, // Skip to: 4372
9617
/* 1159 */    MCD_OPC_CheckField, 0, 16, 128, 20, 133, 12, 0, // Skip to: 4372
9618
/* 1167 */    MCD_OPC_Decode, 155, 13, 210, 2, // Opcode: VLSTM
9619
/* 1172 */    MCD_OPC_FilterValue, 25, 63, 0, 0, // Skip to: 1240
9620
/* 1177 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9621
/* 1180 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1195
9622
/* 1185 */    MCD_OPC_CheckPredicate, 27, 110, 12, 0, // Skip to: 4372
9623
/* 1190 */    MCD_OPC_Decode, 203, 20, 211, 2, // Opcode: VSTMSIA_UPD
9624
/* 1195 */    MCD_OPC_FilterValue, 11, 100, 12, 0, // Skip to: 4372
9625
/* 1200 */    MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9626
/* 1203 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1218
9627
/* 1208 */    MCD_OPC_CheckPredicate, 27, 87, 12, 0, // Skip to: 4372
9628
/* 1213 */    MCD_OPC_Decode, 199, 20, 212, 2, // Opcode: VSTMDIA_UPD
9629
/* 1218 */    MCD_OPC_FilterValue, 1, 77, 12, 0, // Skip to: 4372
9630
/* 1223 */    MCD_OPC_CheckPredicate, 27, 72, 12, 0, // Skip to: 4372
9631
/* 1228 */    MCD_OPC_CheckField, 22, 1, 0, 65, 12, 0, // Skip to: 4372
9632
/* 1235 */    MCD_OPC_Decode, 217, 4, 213, 2, // Opcode: FSTMXIA_UPD
9633
/* 1240 */    MCD_OPC_FilterValue, 26, 63, 0, 0, // Skip to: 1308
9634
/* 1245 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9635
/* 1248 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1263
9636
/* 1253 */    MCD_OPC_CheckPredicate, 27, 42, 12, 0, // Skip to: 4372
9637
/* 1258 */    MCD_OPC_Decode, 201, 20, 211, 2, // Opcode: VSTMSDB_UPD
9638
/* 1263 */    MCD_OPC_FilterValue, 11, 32, 12, 0, // Skip to: 4372
9639
/* 1268 */    MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9640
/* 1271 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1286
9641
/* 1276 */    MCD_OPC_CheckPredicate, 27, 19, 12, 0, // Skip to: 4372
9642
/* 1281 */    MCD_OPC_Decode, 197, 20, 212, 2, // Opcode: VSTMDDB_UPD
9643
/* 1286 */    MCD_OPC_FilterValue, 1, 9, 12, 0, // Skip to: 4372
9644
/* 1291 */    MCD_OPC_CheckPredicate, 27, 4, 12, 0, // Skip to: 4372
9645
/* 1296 */    MCD_OPC_CheckField, 22, 1, 0, 253, 11, 0, // Skip to: 4372
9646
/* 1303 */    MCD_OPC_Decode, 215, 4, 213, 2, // Opcode: FSTMXDB_UPD
9647
/* 1308 */    MCD_OPC_FilterValue, 28, 159, 0, 0, // Skip to: 1472
9648
/* 1313 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9649
/* 1316 */    MCD_OPC_FilterValue, 9, 47, 0, 0, // Skip to: 1368
9650
/* 1321 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9651
/* 1324 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1346
9652
/* 1329 */    MCD_OPC_CheckPredicate, 60, 222, 11, 0, // Skip to: 4372
9653
/* 1334 */    MCD_OPC_CheckField, 4, 1, 0, 215, 11, 0, // Skip to: 4372
9654
/* 1341 */    MCD_OPC_Decode, 180, 14, 192, 2, // Opcode: VMULH
9655
/* 1346 */    MCD_OPC_FilterValue, 1, 205, 11, 0, // Skip to: 4372
9656
/* 1351 */    MCD_OPC_CheckPredicate, 60, 200, 11, 0, // Skip to: 4372
9657
/* 1356 */    MCD_OPC_CheckField, 4, 1, 0, 193, 11, 0, // Skip to: 4372
9658
/* 1363 */    MCD_OPC_Decode, 240, 14, 192, 2, // Opcode: VNMULH
9659
/* 1368 */    MCD_OPC_FilterValue, 10, 47, 0, 0, // Skip to: 1420
9660
/* 1373 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9661
/* 1376 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1398
9662
/* 1381 */    MCD_OPC_CheckPredicate, 27, 170, 11, 0, // Skip to: 4372
9663
/* 1386 */    MCD_OPC_CheckField, 4, 1, 0, 163, 11, 0, // Skip to: 4372
9664
/* 1393 */    MCD_OPC_Decode, 193, 14, 198, 2, // Opcode: VMULS
9665
/* 1398 */    MCD_OPC_FilterValue, 1, 153, 11, 0, // Skip to: 4372
9666
/* 1403 */    MCD_OPC_CheckPredicate, 27, 148, 11, 0, // Skip to: 4372
9667
/* 1408 */    MCD_OPC_CheckField, 4, 1, 0, 141, 11, 0, // Skip to: 4372
9668
/* 1415 */    MCD_OPC_Decode, 241, 14, 198, 2, // Opcode: VNMULS
9669
/* 1420 */    MCD_OPC_FilterValue, 11, 131, 11, 0, // Skip to: 4372
9670
/* 1425 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9671
/* 1428 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1450
9672
/* 1433 */    MCD_OPC_CheckPredicate, 61, 118, 11, 0, // Skip to: 4372
9673
/* 1438 */    MCD_OPC_CheckField, 4, 1, 0, 111, 11, 0, // Skip to: 4372
9674
/* 1445 */    MCD_OPC_Decode, 179, 14, 205, 2, // Opcode: VMULD
9675
/* 1450 */    MCD_OPC_FilterValue, 1, 101, 11, 0, // Skip to: 4372
9676
/* 1455 */    MCD_OPC_CheckPredicate, 61, 96, 11, 0, // Skip to: 4372
9677
/* 1460 */    MCD_OPC_CheckField, 4, 1, 0, 89, 11, 0, // Skip to: 4372
9678
/* 1467 */    MCD_OPC_Decode, 239, 14, 205, 2, // Opcode: VNMULD
9679
/* 1472 */    MCD_OPC_FilterValue, 29, 79, 11, 0, // Skip to: 4372
9680
/* 1477 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9681
/* 1480 */    MCD_OPC_FilterValue, 9, 47, 0, 0, // Skip to: 1532
9682
/* 1485 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9683
/* 1488 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1510
9684
/* 1493 */    MCD_OPC_CheckPredicate, 60, 58, 11, 0, // Skip to: 4372
9685
/* 1498 */    MCD_OPC_CheckField, 4, 1, 0, 51, 11, 0, // Skip to: 4372
9686
/* 1505 */    MCD_OPC_Decode, 150, 10, 191, 2, // Opcode: VFMAH
9687
/* 1510 */    MCD_OPC_FilterValue, 1, 41, 11, 0, // Skip to: 4372
9688
/* 1515 */    MCD_OPC_CheckPredicate, 60, 36, 11, 0, // Skip to: 4372
9689
/* 1520 */    MCD_OPC_CheckField, 4, 1, 0, 29, 11, 0, // Skip to: 4372
9690
/* 1527 */    MCD_OPC_Decode, 157, 10, 191, 2, // Opcode: VFMSH
9691
/* 1532 */    MCD_OPC_FilterValue, 10, 194, 0, 0, // Skip to: 1731
9692
/* 1537 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
9693
/* 1540 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1578
9694
/* 1545 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9695
/* 1548 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1563
9696
/* 1553 */    MCD_OPC_CheckPredicate, 62, 254, 10, 0, // Skip to: 4372
9697
/* 1558 */    MCD_OPC_Decode, 151, 10, 197, 2, // Opcode: VFMAS
9698
/* 1563 */    MCD_OPC_FilterValue, 1, 244, 10, 0, // Skip to: 4372
9699
/* 1568 */    MCD_OPC_CheckPredicate, 62, 239, 10, 0, // Skip to: 4372
9700
/* 1573 */    MCD_OPC_Decode, 158, 10, 197, 2, // Opcode: VFMSS
9701
/* 1578 */    MCD_OPC_FilterValue, 1, 229, 10, 0, // Skip to: 4372
9702
/* 1583 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
9703
/* 1586 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 1615
9704
/* 1591 */    MCD_OPC_CheckPredicate, 27, 216, 10, 0, // Skip to: 4372
9705
/* 1596 */    MCD_OPC_CheckField, 22, 1, 1, 209, 10, 0, // Skip to: 4372
9706
/* 1603 */    MCD_OPC_CheckField, 7, 1, 0, 202, 10, 0, // Skip to: 4372
9707
/* 1610 */    MCD_OPC_Decode, 178, 14, 214, 2, // Opcode: VMSR_FPSID
9708
/* 1615 */    MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 1644
9709
/* 1620 */    MCD_OPC_CheckPredicate, 27, 187, 10, 0, // Skip to: 4372
9710
/* 1625 */    MCD_OPC_CheckField, 22, 1, 1, 180, 10, 0, // Skip to: 4372
9711
/* 1632 */    MCD_OPC_CheckField, 7, 1, 0, 173, 10, 0, // Skip to: 4372
9712
/* 1639 */    MCD_OPC_Decode, 174, 14, 214, 2, // Opcode: VMSR
9713
/* 1644 */    MCD_OPC_FilterValue, 8, 24, 0, 0, // Skip to: 1673
9714
/* 1649 */    MCD_OPC_CheckPredicate, 27, 158, 10, 0, // Skip to: 4372
9715
/* 1654 */    MCD_OPC_CheckField, 22, 1, 1, 151, 10, 0, // Skip to: 4372
9716
/* 1661 */    MCD_OPC_CheckField, 7, 1, 0, 144, 10, 0, // Skip to: 4372
9717
/* 1668 */    MCD_OPC_Decode, 175, 14, 214, 2, // Opcode: VMSR_FPEXC
9718
/* 1673 */    MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 1702
9719
/* 1678 */    MCD_OPC_CheckPredicate, 27, 129, 10, 0, // Skip to: 4372
9720
/* 1683 */    MCD_OPC_CheckField, 22, 1, 1, 122, 10, 0, // Skip to: 4372
9721
/* 1690 */    MCD_OPC_CheckField, 7, 1, 0, 115, 10, 0, // Skip to: 4372
9722
/* 1697 */    MCD_OPC_Decode, 176, 14, 214, 2, // Opcode: VMSR_FPINST
9723
/* 1702 */    MCD_OPC_FilterValue, 10, 105, 10, 0, // Skip to: 4372
9724
/* 1707 */    MCD_OPC_CheckPredicate, 27, 100, 10, 0, // Skip to: 4372
9725
/* 1712 */    MCD_OPC_CheckField, 22, 1, 1, 93, 10, 0, // Skip to: 4372
9726
/* 1719 */    MCD_OPC_CheckField, 7, 1, 0, 86, 10, 0, // Skip to: 4372
9727
/* 1726 */    MCD_OPC_Decode, 177, 14, 214, 2, // Opcode: VMSR_FPINST2
9728
/* 1731 */    MCD_OPC_FilterValue, 11, 76, 10, 0, // Skip to: 4372
9729
/* 1736 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9730
/* 1739 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1761
9731
/* 1744 */    MCD_OPC_CheckPredicate, 63, 63, 10, 0, // Skip to: 4372
9732
/* 1749 */    MCD_OPC_CheckField, 4, 1, 0, 56, 10, 0, // Skip to: 4372
9733
/* 1756 */    MCD_OPC_Decode, 149, 10, 204, 2, // Opcode: VFMAD
9734
/* 1761 */    MCD_OPC_FilterValue, 1, 46, 10, 0, // Skip to: 4372
9735
/* 1766 */    MCD_OPC_CheckPredicate, 63, 41, 10, 0, // Skip to: 4372
9736
/* 1771 */    MCD_OPC_CheckField, 4, 1, 0, 34, 10, 0, // Skip to: 4372
9737
/* 1778 */    MCD_OPC_Decode, 156, 10, 204, 2, // Opcode: VFMSD
9738
/* 1783 */    MCD_OPC_FilterValue, 3, 24, 10, 0, // Skip to: 4372
9739
/* 1788 */    MCD_OPC_ExtractField, 23, 5,  // Inst{27-23} ...
9740
/* 1791 */    MCD_OPC_FilterValue, 24, 25, 0, 0, // Skip to: 1821
9741
/* 1796 */    MCD_OPC_CheckPredicate, 64, 11, 10, 0, // Skip to: 4372
9742
/* 1801 */    MCD_OPC_CheckField, 22, 1, 0, 4, 10, 0, // Skip to: 4372
9743
/* 1808 */    MCD_OPC_CheckField, 0, 16, 128, 20, 252, 9, 0, // Skip to: 4372
9744
/* 1816 */    MCD_OPC_Decode, 154, 13, 210, 2, // Opcode: VLLDM
9745
/* 1821 */    MCD_OPC_FilterValue, 25, 63, 0, 0, // Skip to: 1889
9746
/* 1826 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9747
/* 1829 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1844
9748
/* 1834 */    MCD_OPC_CheckPredicate, 27, 229, 9, 0, // Skip to: 4372
9749
/* 1839 */    MCD_OPC_Decode, 150, 13, 211, 2, // Opcode: VLDMSIA_UPD
9750
/* 1844 */    MCD_OPC_FilterValue, 11, 219, 9, 0, // Skip to: 4372
9751
/* 1849 */    MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9752
/* 1852 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1867
9753
/* 1857 */    MCD_OPC_CheckPredicate, 27, 206, 9, 0, // Skip to: 4372
9754
/* 1862 */    MCD_OPC_Decode, 146, 13, 212, 2, // Opcode: VLDMDIA_UPD
9755
/* 1867 */    MCD_OPC_FilterValue, 1, 196, 9, 0, // Skip to: 4372
9756
/* 1872 */    MCD_OPC_CheckPredicate, 27, 191, 9, 0, // Skip to: 4372
9757
/* 1877 */    MCD_OPC_CheckField, 22, 1, 0, 184, 9, 0, // Skip to: 4372
9758
/* 1884 */    MCD_OPC_Decode, 213, 4, 213, 2, // Opcode: FLDMXIA_UPD
9759
/* 1889 */    MCD_OPC_FilterValue, 26, 63, 0, 0, // Skip to: 1957
9760
/* 1894 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9761
/* 1897 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1912
9762
/* 1902 */    MCD_OPC_CheckPredicate, 27, 161, 9, 0, // Skip to: 4372
9763
/* 1907 */    MCD_OPC_Decode, 148, 13, 211, 2, // Opcode: VLDMSDB_UPD
9764
/* 1912 */    MCD_OPC_FilterValue, 11, 151, 9, 0, // Skip to: 4372
9765
/* 1917 */    MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
9766
/* 1920 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1935
9767
/* 1925 */    MCD_OPC_CheckPredicate, 27, 138, 9, 0, // Skip to: 4372
9768
/* 1930 */    MCD_OPC_Decode, 144, 13, 212, 2, // Opcode: VLDMDDB_UPD
9769
/* 1935 */    MCD_OPC_FilterValue, 1, 128, 9, 0, // Skip to: 4372
9770
/* 1940 */    MCD_OPC_CheckPredicate, 27, 123, 9, 0, // Skip to: 4372
9771
/* 1945 */    MCD_OPC_CheckField, 22, 1, 0, 116, 9, 0, // Skip to: 4372
9772
/* 1952 */    MCD_OPC_Decode, 211, 4, 213, 2, // Opcode: FLDMXDB_UPD
9773
/* 1957 */    MCD_OPC_FilterValue, 28, 159, 0, 0, // Skip to: 2121
9774
/* 1962 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
9775
/* 1965 */    MCD_OPC_FilterValue, 9, 47, 0, 0, // Skip to: 2017
9776
/* 1970 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9777
/* 1973 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1995
9778
/* 1978 */    MCD_OPC_CheckPredicate, 60, 85, 9, 0, // Skip to: 4372
9779
/* 1983 */    MCD_OPC_CheckField, 4, 1, 0, 78, 9, 0, // Skip to: 4372
9780
/* 1990 */    MCD_OPC_Decode, 236, 7, 192, 2, // Opcode: VADDH
9781
/* 1995 */    MCD_OPC_FilterValue, 1, 68, 9, 0, // Skip to: 4372
9782
/* 2000 */    MCD_OPC_CheckPredicate, 60, 63, 9, 0, // Skip to: 4372
9783
/* 2005 */    MCD_OPC_CheckField, 4, 1, 0, 56, 9, 0, // Skip to: 4372
9784
/* 2012 */    MCD_OPC_Decode, 208, 20, 192, 2, // Opcode: VSUBH
9785
/* 2017 */    MCD_OPC_FilterValue, 10, 47, 0, 0, // Skip to: 2069
9786
/* 2022 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9787
/* 2025 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2047
9788
/* 2030 */    MCD_OPC_CheckPredicate, 27, 33, 9, 0, // Skip to: 4372
9789
/* 2035 */    MCD_OPC_CheckField, 4, 1, 0, 26, 9, 0, // Skip to: 4372
9790
/* 2042 */    MCD_OPC_Decode, 246, 7, 198, 2, // Opcode: VADDS
9791
/* 2047 */    MCD_OPC_FilterValue, 1, 16, 9, 0, // Skip to: 4372
9792
/* 2052 */    MCD_OPC_CheckPredicate, 27, 11, 9, 0, // Skip to: 4372
9793
/* 2057 */    MCD_OPC_CheckField, 4, 1, 0, 4, 9, 0, // Skip to: 4372
9794
/* 2064 */    MCD_OPC_Decode, 218, 20, 198, 2, // Opcode: VSUBS
9795
/* 2069 */    MCD_OPC_FilterValue, 11, 250, 8, 0, // Skip to: 4372
9796
/* 2074 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
9797
/* 2077 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2099
9798
/* 2082 */    MCD_OPC_CheckPredicate, 61, 237, 8, 0, // Skip to: 4372
9799
/* 2087 */    MCD_OPC_CheckField, 4, 1, 0, 230, 8, 0, // Skip to: 4372
9800
/* 2094 */    MCD_OPC_Decode, 235, 7, 205, 2, // Opcode: VADDD
9801
/* 2099 */    MCD_OPC_FilterValue, 1, 220, 8, 0, // Skip to: 4372
9802
/* 2104 */    MCD_OPC_CheckPredicate, 61, 215, 8, 0, // Skip to: 4372
9803
/* 2109 */    MCD_OPC_CheckField, 4, 1, 0, 208, 8, 0, // Skip to: 4372
9804
/* 2116 */    MCD_OPC_Decode, 207, 20, 205, 2, // Opcode: VSUBD
9805
/* 2121 */    MCD_OPC_FilterValue, 29, 198, 8, 0, // Skip to: 4372
9806
/* 2126 */    MCD_OPC_ExtractField, 6, 6,  // Inst{11-6} ...
9807
/* 2129 */    MCD_OPC_FilterValue, 36, 17, 0, 0, // Skip to: 2151
9808
/* 2134 */    MCD_OPC_CheckPredicate, 60, 185, 8, 0, // Skip to: 4372
9809
/* 2139 */    MCD_OPC_CheckField, 4, 2, 0, 178, 8, 0, // Skip to: 4372
9810
/* 2146 */    MCD_OPC_Decode, 209, 4, 215, 2, // Opcode: FCONSTH
9811
/* 2151 */    MCD_OPC_FilterValue, 37, 11, 1, 0, // Skip to: 2423
9812
/* 2156 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
9813
/* 2159 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 2181
9814
/* 2164 */    MCD_OPC_CheckPredicate, 60, 155, 8, 0, // Skip to: 4372
9815
/* 2169 */    MCD_OPC_CheckField, 4, 1, 0, 148, 8, 0, // Skip to: 4372
9816
/* 2176 */    MCD_OPC_Decode, 221, 14, 216, 2, // Opcode: VNEGH
9817
/* 2181 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 2203
9818
/* 2186 */    MCD_OPC_CheckPredicate, 60, 133, 8, 0, // Skip to: 4372
9819
/* 2191 */    MCD_OPC_CheckField, 4, 1, 0, 126, 8, 0, // Skip to: 4372
9820
/* 2198 */    MCD_OPC_Decode, 146, 9, 216, 2, // Opcode: VCMPH
9821
/* 2203 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 2225
9822
/* 2208 */    MCD_OPC_CheckPredicate, 60, 111, 8, 0, // Skip to: 4372
9823
/* 2213 */    MCD_OPC_CheckField, 0, 6, 0, 104, 8, 0, // Skip to: 4372
9824
/* 2220 */    MCD_OPC_Decode, 149, 9, 217, 2, // Opcode: VCMPZH
9825
/* 2225 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 2247
9826
/* 2230 */    MCD_OPC_CheckPredicate, 60, 89, 8, 0, // Skip to: 4372
9827
/* 2235 */    MCD_OPC_CheckField, 4, 1, 0, 82, 8, 0, // Skip to: 4372
9828
/* 2242 */    MCD_OPC_Decode, 148, 17, 218, 2, // Opcode: VRINTRH
9829
/* 2247 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 2269
9830
/* 2252 */    MCD_OPC_CheckPredicate, 60, 67, 8, 0, // Skip to: 4372
9831
/* 2257 */    MCD_OPC_CheckField, 4, 1, 0, 60, 8, 0, // Skip to: 4372
9832
/* 2264 */    MCD_OPC_Decode, 151, 17, 218, 2, // Opcode: VRINTXH
9833
/* 2269 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 2291
9834
/* 2274 */    MCD_OPC_CheckPredicate, 60, 45, 8, 0, // Skip to: 4372
9835
/* 2279 */    MCD_OPC_CheckField, 4, 1, 0, 38, 8, 0, // Skip to: 4372
9836
/* 2286 */    MCD_OPC_Decode, 167, 21, 219, 2, // Opcode: VUITOH
9837
/* 2291 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 2313
9838
/* 2296 */    MCD_OPC_CheckPredicate, 60, 23, 8, 0, // Skip to: 4372
9839
/* 2301 */    MCD_OPC_CheckField, 4, 1, 0, 16, 8, 0, // Skip to: 4372
9840
/* 2308 */    MCD_OPC_Decode, 172, 18, 220, 2, // Opcode: VSHTOH
9841
/* 2313 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 2335
9842
/* 2318 */    MCD_OPC_CheckPredicate, 60, 1, 8, 0, // Skip to: 4372
9843
/* 2323 */    MCD_OPC_CheckField, 4, 1, 0, 250, 7, 0, // Skip to: 4372
9844
/* 2330 */    MCD_OPC_Decode, 164, 21, 220, 2, // Opcode: VUHTOH
9845
/* 2335 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 2357
9846
/* 2340 */    MCD_OPC_CheckPredicate, 60, 235, 7, 0, // Skip to: 4372
9847
/* 2345 */    MCD_OPC_CheckField, 4, 1, 0, 228, 7, 0, // Skip to: 4372
9848
/* 2352 */    MCD_OPC_Decode, 139, 21, 218, 2, // Opcode: VTOUIRH
9849
/* 2357 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 2379
9850
/* 2362 */    MCD_OPC_CheckPredicate, 60, 213, 7, 0, // Skip to: 4372
9851
/* 2367 */    MCD_OPC_CheckField, 4, 1, 0, 206, 7, 0, // Skip to: 4372
9852
/* 2374 */    MCD_OPC_Decode, 255, 20, 218, 2, // Opcode: VTOSIRH
9853
/* 2379 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 2401
9854
/* 2384 */    MCD_OPC_CheckPredicate, 60, 191, 7, 0, // Skip to: 4372
9855
/* 2389 */    MCD_OPC_CheckField, 4, 1, 0, 184, 7, 0, // Skip to: 4372
9856
/* 2396 */    MCD_OPC_Decode, 252, 20, 220, 2, // Opcode: VTOSHH
9857
/* 2401 */    MCD_OPC_FilterValue, 15, 174, 7, 0, // Skip to: 4372
9858
/* 2406 */    MCD_OPC_CheckPredicate, 60, 169, 7, 0, // Skip to: 4372
9859
/* 2411 */    MCD_OPC_CheckField, 4, 1, 0, 162, 7, 0, // Skip to: 4372
9860
/* 2418 */    MCD_OPC_Decode, 136, 21, 220, 2, // Opcode: VTOUHH
9861
/* 2423 */    MCD_OPC_FilterValue, 39, 11, 1, 0, // Skip to: 2695
9862
/* 2428 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
9863
/* 2431 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2453
9864
/* 2436 */    MCD_OPC_CheckPredicate, 60, 139, 7, 0, // Skip to: 4372
9865
/* 2441 */    MCD_OPC_CheckField, 4, 1, 0, 132, 7, 0, // Skip to: 4372
9866
/* 2448 */    MCD_OPC_Decode, 215, 7, 218, 2, // Opcode: VABSH
9867
/* 2453 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 2475
9868
/* 2458 */    MCD_OPC_CheckPredicate, 60, 117, 7, 0, // Skip to: 4372
9869
/* 2463 */    MCD_OPC_CheckField, 4, 1, 0, 110, 7, 0, // Skip to: 4372
9870
/* 2470 */    MCD_OPC_Decode, 189, 18, 218, 2, // Opcode: VSQRTH
9871
/* 2475 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 2497
9872
/* 2480 */    MCD_OPC_CheckPredicate, 60, 95, 7, 0, // Skip to: 4372
9873
/* 2485 */    MCD_OPC_CheckField, 4, 1, 0, 88, 7, 0, // Skip to: 4372
9874
/* 2492 */    MCD_OPC_Decode, 141, 9, 216, 2, // Opcode: VCMPEH
9875
/* 2497 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 2519
9876
/* 2502 */    MCD_OPC_CheckPredicate, 60, 73, 7, 0, // Skip to: 4372
9877
/* 2507 */    MCD_OPC_CheckField, 0, 6, 0, 66, 7, 0, // Skip to: 4372
9878
/* 2514 */    MCD_OPC_Decode, 144, 9, 217, 2, // Opcode: VCMPEZH
9879
/* 2519 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 2541
9880
/* 2524 */    MCD_OPC_CheckPredicate, 60, 51, 7, 0, // Skip to: 4372
9881
/* 2529 */    MCD_OPC_CheckField, 4, 1, 0, 44, 7, 0, // Skip to: 4372
9882
/* 2536 */    MCD_OPC_Decode, 158, 17, 218, 2, // Opcode: VRINTZH
9883
/* 2541 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 2563
9884
/* 2546 */    MCD_OPC_CheckPredicate, 60, 29, 7, 0, // Skip to: 4372
9885
/* 2551 */    MCD_OPC_CheckField, 4, 1, 0, 22, 7, 0, // Skip to: 4372
9886
/* 2558 */    MCD_OPC_Decode, 175, 18, 219, 2, // Opcode: VSITOH
9887
/* 2563 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 2585
9888
/* 2568 */    MCD_OPC_CheckPredicate, 60, 7, 7, 0, // Skip to: 4372
9889
/* 2573 */    MCD_OPC_CheckField, 4, 1, 0, 0, 7, 0, // Skip to: 4372
9890
/* 2580 */    MCD_OPC_Decode, 186, 18, 220, 2, // Opcode: VSLTOH
9891
/* 2585 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 2607
9892
/* 2590 */    MCD_OPC_CheckPredicate, 60, 241, 6, 0, // Skip to: 4372
9893
/* 2595 */    MCD_OPC_CheckField, 4, 1, 0, 234, 6, 0, // Skip to: 4372
9894
/* 2602 */    MCD_OPC_Decode, 170, 21, 220, 2, // Opcode: VULTOH
9895
/* 2607 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 2629
9896
/* 2612 */    MCD_OPC_CheckPredicate, 60, 219, 6, 0, // Skip to: 4372
9897
/* 2617 */    MCD_OPC_CheckField, 4, 1, 0, 212, 6, 0, // Skip to: 4372
9898
/* 2624 */    MCD_OPC_Decode, 142, 21, 221, 2, // Opcode: VTOUIZH
9899
/* 2629 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 2651
9900
/* 2634 */    MCD_OPC_CheckPredicate, 60, 197, 6, 0, // Skip to: 4372
9901
/* 2639 */    MCD_OPC_CheckField, 4, 1, 0, 190, 6, 0, // Skip to: 4372
9902
/* 2646 */    MCD_OPC_Decode, 130, 21, 221, 2, // Opcode: VTOSIZH
9903
/* 2651 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 2673
9904
/* 2656 */    MCD_OPC_CheckPredicate, 60, 175, 6, 0, // Skip to: 4372
9905
/* 2661 */    MCD_OPC_CheckField, 4, 1, 0, 168, 6, 0, // Skip to: 4372
9906
/* 2668 */    MCD_OPC_Decode, 133, 21, 220, 2, // Opcode: VTOSLH
9907
/* 2673 */    MCD_OPC_FilterValue, 15, 158, 6, 0, // Skip to: 4372
9908
/* 2678 */    MCD_OPC_CheckPredicate, 60, 153, 6, 0, // Skip to: 4372
9909
/* 2683 */    MCD_OPC_CheckField, 4, 1, 0, 146, 6, 0, // Skip to: 4372
9910
/* 2690 */    MCD_OPC_Decode, 145, 21, 220, 2, // Opcode: VTOULH
9911
/* 2695 */    MCD_OPC_FilterValue, 40, 20, 1, 0, // Skip to: 2976
9912
/* 2700 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
9913
/* 2703 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2718
9914
/* 2708 */    MCD_OPC_CheckPredicate, 65, 123, 6, 0, // Skip to: 4372
9915
/* 2713 */    MCD_OPC_Decode, 210, 4, 222, 2, // Opcode: FCONSTS
9916
/* 2718 */    MCD_OPC_FilterValue, 1, 113, 6, 0, // Skip to: 4372
9917
/* 2723 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
9918
/* 2726 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 2755
9919
/* 2731 */    MCD_OPC_CheckPredicate, 27, 100, 6, 0, // Skip to: 4372
9920
/* 2736 */    MCD_OPC_CheckField, 22, 1, 1, 93, 6, 0, // Skip to: 4372
9921
/* 2743 */    MCD_OPC_CheckField, 0, 4, 0, 86, 6, 0, // Skip to: 4372
9922
/* 2750 */    MCD_OPC_Decode, 170, 14, 214, 2, // Opcode: VMRS_FPSID
9923
/* 2755 */    MCD_OPC_FilterValue, 1, 42, 0, 0, // Skip to: 2802
9924
/* 2760 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
9925
/* 2763 */    MCD_OPC_FilterValue, 0, 68, 6, 0, // Skip to: 4372
9926
/* 2768 */    MCD_OPC_ExtractField, 22, 1,  // Inst{22} ...
9927
/* 2771 */    MCD_OPC_FilterValue, 1, 60, 6, 0, // Skip to: 4372
9928
/* 2776 */    MCD_OPC_CheckPredicate, 27, 11, 0, 0, // Skip to: 2792
9929
/* 2781 */    MCD_OPC_CheckField, 12, 4, 15, 4, 0, 0, // Skip to: 2792
9930
/* 2788 */    MCD_OPC_Decode, 214, 4, 29, // Opcode: FMSTAT
9931
/* 2792 */    MCD_OPC_CheckPredicate, 27, 39, 6, 0, // Skip to: 4372
9932
/* 2797 */    MCD_OPC_Decode, 166, 14, 214, 2, // Opcode: VMRS
9933
/* 2802 */    MCD_OPC_FilterValue, 5, 24, 0, 0, // Skip to: 2831
9934
/* 2807 */    MCD_OPC_CheckPredicate, 66, 24, 6, 0, // Skip to: 4372
9935
/* 2812 */    MCD_OPC_CheckField, 22, 1, 1, 17, 6, 0, // Skip to: 4372
9936
/* 2819 */    MCD_OPC_CheckField, 0, 4, 0, 10, 6, 0, // Skip to: 4372
9937
/* 2826 */    MCD_OPC_Decode, 173, 14, 214, 2, // Opcode: VMRS_MVFR2
9938
/* 2831 */    MCD_OPC_FilterValue, 6, 24, 0, 0, // Skip to: 2860
9939
/* 2836 */    MCD_OPC_CheckPredicate, 27, 251, 5, 0, // Skip to: 4372
9940
/* 2841 */    MCD_OPC_CheckField, 22, 1, 1, 244, 5, 0, // Skip to: 4372
9941
/* 2848 */    MCD_OPC_CheckField, 0, 4, 0, 237, 5, 0, // Skip to: 4372
9942
/* 2855 */    MCD_OPC_Decode, 172, 14, 214, 2, // Opcode: VMRS_MVFR1
9943
/* 2860 */    MCD_OPC_FilterValue, 7, 24, 0, 0, // Skip to: 2889
9944
/* 2865 */    MCD_OPC_CheckPredicate, 27, 222, 5, 0, // Skip to: 4372
9945
/* 2870 */    MCD_OPC_CheckField, 22, 1, 1, 215, 5, 0, // Skip to: 4372
9946
/* 2877 */    MCD_OPC_CheckField, 0, 4, 0, 208, 5, 0, // Skip to: 4372
9947
/* 2884 */    MCD_OPC_Decode, 171, 14, 214, 2, // Opcode: VMRS_MVFR0
9948
/* 2889 */    MCD_OPC_FilterValue, 8, 24, 0, 0, // Skip to: 2918
9949
/* 2894 */    MCD_OPC_CheckPredicate, 27, 193, 5, 0, // Skip to: 4372
9950
/* 2899 */    MCD_OPC_CheckField, 22, 1, 1, 186, 5, 0, // Skip to: 4372
9951
/* 2906 */    MCD_OPC_CheckField, 0, 4, 0, 179, 5, 0, // Skip to: 4372
9952
/* 2913 */    MCD_OPC_Decode, 167, 14, 214, 2, // Opcode: VMRS_FPEXC
9953
/* 2918 */    MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 2947
9954
/* 2923 */    MCD_OPC_CheckPredicate, 27, 164, 5, 0, // Skip to: 4372
9955
/* 2928 */    MCD_OPC_CheckField, 22, 1, 1, 157, 5, 0, // Skip to: 4372
9956
/* 2935 */    MCD_OPC_CheckField, 0, 4, 0, 150, 5, 0, // Skip to: 4372
9957
/* 2942 */    MCD_OPC_Decode, 168, 14, 214, 2, // Opcode: VMRS_FPINST
9958
/* 2947 */    MCD_OPC_FilterValue, 10, 140, 5, 0, // Skip to: 4372
9959
/* 2952 */    MCD_OPC_CheckPredicate, 27, 135, 5, 0, // Skip to: 4372
9960
/* 2957 */    MCD_OPC_CheckField, 22, 1, 1, 128, 5, 0, // Skip to: 4372
9961
/* 2964 */    MCD_OPC_CheckField, 0, 4, 0, 121, 5, 0, // Skip to: 4372
9962
/* 2971 */    MCD_OPC_Decode, 169, 14, 214, 2, // Opcode: VMRS_FPINST2
9963
/* 2976 */    MCD_OPC_FilterValue, 41, 77, 1, 0, // Skip to: 3314
9964
/* 2981 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
9965
/* 2984 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3006
9966
/* 2989 */    MCD_OPC_CheckPredicate, 27, 98, 5, 0, // Skip to: 4372
9967
/* 2994 */    MCD_OPC_CheckField, 4, 1, 0, 91, 5, 0, // Skip to: 4372
9968
/* 3001 */    MCD_OPC_Decode, 153, 14, 218, 2, // Opcode: VMOVS
9969
/* 3006 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 3028
9970
/* 3011 */    MCD_OPC_CheckPredicate, 27, 76, 5, 0, // Skip to: 4372
9971
/* 3016 */    MCD_OPC_CheckField, 4, 1, 0, 69, 5, 0, // Skip to: 4372
9972
/* 3023 */    MCD_OPC_Decode, 222, 14, 218, 2, // Opcode: VNEGS
9973
/* 3028 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 3050
9974
/* 3033 */    MCD_OPC_CheckPredicate, 67, 54, 5, 0, // Skip to: 4372
9975
/* 3038 */    MCD_OPC_CheckField, 4, 1, 0, 47, 5, 0, // Skip to: 4372
9976
/* 3045 */    MCD_OPC_Decode, 169, 9, 218, 2, // Opcode: VCVTBHS
9977
/* 3050 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 3072
9978
/* 3055 */    MCD_OPC_CheckPredicate, 67, 32, 5, 0, // Skip to: 4372
9979
/* 3060 */    MCD_OPC_CheckField, 4, 1, 0, 25, 5, 0, // Skip to: 4372
9980
/* 3067 */    MCD_OPC_Decode, 170, 9, 218, 2, // Opcode: VCVTBSH
9981
/* 3072 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 3094
9982
/* 3077 */    MCD_OPC_CheckPredicate, 27, 10, 5, 0, // Skip to: 4372
9983
/* 3082 */    MCD_OPC_CheckField, 4, 1, 0, 3, 5, 0, // Skip to: 4372
9984
/* 3089 */    MCD_OPC_Decode, 147, 9, 218, 2, // Opcode: VCMPS
9985
/* 3094 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 3116
9986
/* 3099 */    MCD_OPC_CheckPredicate, 27, 244, 4, 0, // Skip to: 4372
9987
/* 3104 */    MCD_OPC_CheckField, 0, 6, 0, 237, 4, 0, // Skip to: 4372
9988
/* 3111 */    MCD_OPC_Decode, 150, 9, 223, 2, // Opcode: VCMPZS
9989
/* 3116 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 3138
9990
/* 3121 */    MCD_OPC_CheckPredicate, 66, 222, 4, 0, // Skip to: 4372
9991
/* 3126 */    MCD_OPC_CheckField, 4, 1, 0, 215, 4, 0, // Skip to: 4372
9992
/* 3133 */    MCD_OPC_Decode, 149, 17, 218, 2, // Opcode: VRINTRS
9993
/* 3138 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 3160
9994
/* 3143 */    MCD_OPC_CheckPredicate, 66, 200, 4, 0, // Skip to: 4372
9995
/* 3148 */    MCD_OPC_CheckField, 4, 1, 0, 193, 4, 0, // Skip to: 4372
9996
/* 3155 */    MCD_OPC_Decode, 156, 17, 218, 2, // Opcode: VRINTXS
9997
/* 3160 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 3182
9998
/* 3165 */    MCD_OPC_CheckPredicate, 27, 178, 4, 0, // Skip to: 4372
9999
/* 3170 */    MCD_OPC_CheckField, 4, 1, 0, 171, 4, 0, // Skip to: 4372
10000
/* 3177 */    MCD_OPC_Decode, 168, 21, 218, 2, // Opcode: VUITOS
10001
/* 3182 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 3204
10002
/* 3187 */    MCD_OPC_CheckPredicate, 27, 156, 4, 0, // Skip to: 4372
10003
/* 3192 */    MCD_OPC_CheckField, 4, 1, 0, 149, 4, 0, // Skip to: 4372
10004
/* 3199 */    MCD_OPC_Decode, 173, 18, 220, 2, // Opcode: VSHTOS
10005
/* 3204 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 3226
10006
/* 3209 */    MCD_OPC_CheckPredicate, 27, 134, 4, 0, // Skip to: 4372
10007
/* 3214 */    MCD_OPC_CheckField, 4, 1, 0, 127, 4, 0, // Skip to: 4372
10008
/* 3221 */    MCD_OPC_Decode, 165, 21, 220, 2, // Opcode: VUHTOS
10009
/* 3226 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 3248
10010
/* 3231 */    MCD_OPC_CheckPredicate, 27, 112, 4, 0, // Skip to: 4372
10011
/* 3236 */    MCD_OPC_CheckField, 4, 1, 0, 105, 4, 0, // Skip to: 4372
10012
/* 3243 */    MCD_OPC_Decode, 140, 21, 218, 2, // Opcode: VTOUIRS
10013
/* 3248 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 3270
10014
/* 3253 */    MCD_OPC_CheckPredicate, 27, 90, 4, 0, // Skip to: 4372
10015
/* 3258 */    MCD_OPC_CheckField, 4, 1, 0, 83, 4, 0, // Skip to: 4372
10016
/* 3265 */    MCD_OPC_Decode, 128, 21, 218, 2, // Opcode: VTOSIRS
10017
/* 3270 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 3292
10018
/* 3275 */    MCD_OPC_CheckPredicate, 27, 68, 4, 0, // Skip to: 4372
10019
/* 3280 */    MCD_OPC_CheckField, 4, 1, 0, 61, 4, 0, // Skip to: 4372
10020
/* 3287 */    MCD_OPC_Decode, 253, 20, 220, 2, // Opcode: VTOSHS
10021
/* 3292 */    MCD_OPC_FilterValue, 15, 51, 4, 0, // Skip to: 4372
10022
/* 3297 */    MCD_OPC_CheckPredicate, 27, 46, 4, 0, // Skip to: 4372
10023
/* 3302 */    MCD_OPC_CheckField, 4, 1, 0, 39, 4, 0, // Skip to: 4372
10024
/* 3309 */    MCD_OPC_Decode, 137, 21, 220, 2, // Opcode: VTOUHS
10025
/* 3314 */    MCD_OPC_FilterValue, 43, 77, 1, 0, // Skip to: 3652
10026
/* 3319 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10027
/* 3322 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3344
10028
/* 3327 */    MCD_OPC_CheckPredicate, 27, 16, 4, 0, // Skip to: 4372
10029
/* 3332 */    MCD_OPC_CheckField, 4, 1, 0, 9, 4, 0, // Skip to: 4372
10030
/* 3339 */    MCD_OPC_Decode, 216, 7, 218, 2, // Opcode: VABSS
10031
/* 3344 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 3366
10032
/* 3349 */    MCD_OPC_CheckPredicate, 27, 250, 3, 0, // Skip to: 4372
10033
/* 3354 */    MCD_OPC_CheckField, 4, 1, 0, 243, 3, 0, // Skip to: 4372
10034
/* 3361 */    MCD_OPC_Decode, 190, 18, 218, 2, // Opcode: VSQRTS
10035
/* 3366 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 3388
10036
/* 3371 */    MCD_OPC_CheckPredicate, 67, 228, 3, 0, // Skip to: 4372
10037
/* 3376 */    MCD_OPC_CheckField, 4, 1, 0, 221, 3, 0, // Skip to: 4372
10038
/* 3383 */    MCD_OPC_Decode, 217, 9, 218, 2, // Opcode: VCVTTHS
10039
/* 3388 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 3410
10040
/* 3393 */    MCD_OPC_CheckPredicate, 67, 206, 3, 0, // Skip to: 4372
10041
/* 3398 */    MCD_OPC_CheckField, 4, 1, 0, 199, 3, 0, // Skip to: 4372
10042
/* 3405 */    MCD_OPC_Decode, 218, 9, 218, 2, // Opcode: VCVTTSH
10043
/* 3410 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 3432
10044
/* 3415 */    MCD_OPC_CheckPredicate, 27, 184, 3, 0, // Skip to: 4372
10045
/* 3420 */    MCD_OPC_CheckField, 4, 1, 0, 177, 3, 0, // Skip to: 4372
10046
/* 3427 */    MCD_OPC_Decode, 142, 9, 218, 2, // Opcode: VCMPES
10047
/* 3432 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 3454
10048
/* 3437 */    MCD_OPC_CheckPredicate, 27, 162, 3, 0, // Skip to: 4372
10049
/* 3442 */    MCD_OPC_CheckField, 0, 6, 0, 155, 3, 0, // Skip to: 4372
10050
/* 3449 */    MCD_OPC_Decode, 145, 9, 223, 2, // Opcode: VCMPEZS
10051
/* 3454 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 3476
10052
/* 3459 */    MCD_OPC_CheckPredicate, 66, 140, 3, 0, // Skip to: 4372
10053
/* 3464 */    MCD_OPC_CheckField, 4, 1, 0, 133, 3, 0, // Skip to: 4372
10054
/* 3471 */    MCD_OPC_Decode, 163, 17, 218, 2, // Opcode: VRINTZS
10055
/* 3476 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 3498
10056
/* 3481 */    MCD_OPC_CheckPredicate, 61, 118, 3, 0, // Skip to: 4372
10057
/* 3486 */    MCD_OPC_CheckField, 4, 1, 0, 111, 3, 0, // Skip to: 4372
10058
/* 3493 */    MCD_OPC_Decode, 171, 9, 224, 2, // Opcode: VCVTDS
10059
/* 3498 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 3520
10060
/* 3503 */    MCD_OPC_CheckPredicate, 27, 96, 3, 0, // Skip to: 4372
10061
/* 3508 */    MCD_OPC_CheckField, 4, 1, 0, 89, 3, 0, // Skip to: 4372
10062
/* 3515 */    MCD_OPC_Decode, 176, 18, 218, 2, // Opcode: VSITOS
10063
/* 3520 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 3542
10064
/* 3525 */    MCD_OPC_CheckPredicate, 27, 74, 3, 0, // Skip to: 4372
10065
/* 3530 */    MCD_OPC_CheckField, 4, 1, 0, 67, 3, 0, // Skip to: 4372
10066
/* 3537 */    MCD_OPC_Decode, 187, 18, 220, 2, // Opcode: VSLTOS
10067
/* 3542 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 3564
10068
/* 3547 */    MCD_OPC_CheckPredicate, 27, 52, 3, 0, // Skip to: 4372
10069
/* 3552 */    MCD_OPC_CheckField, 4, 1, 0, 45, 3, 0, // Skip to: 4372
10070
/* 3559 */    MCD_OPC_Decode, 171, 21, 220, 2, // Opcode: VULTOS
10071
/* 3564 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 3586
10072
/* 3569 */    MCD_OPC_CheckPredicate, 27, 30, 3, 0, // Skip to: 4372
10073
/* 3574 */    MCD_OPC_CheckField, 4, 1, 0, 23, 3, 0, // Skip to: 4372
10074
/* 3581 */    MCD_OPC_Decode, 143, 21, 218, 2, // Opcode: VTOUIZS
10075
/* 3586 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 3608
10076
/* 3591 */    MCD_OPC_CheckPredicate, 27, 8, 3, 0, // Skip to: 4372
10077
/* 3596 */    MCD_OPC_CheckField, 4, 1, 0, 1, 3, 0, // Skip to: 4372
10078
/* 3603 */    MCD_OPC_Decode, 131, 21, 218, 2, // Opcode: VTOSIZS
10079
/* 3608 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 3630
10080
/* 3613 */    MCD_OPC_CheckPredicate, 27, 242, 2, 0, // Skip to: 4372
10081
/* 3618 */    MCD_OPC_CheckField, 4, 1, 0, 235, 2, 0, // Skip to: 4372
10082
/* 3625 */    MCD_OPC_Decode, 134, 21, 220, 2, // Opcode: VTOSLS
10083
/* 3630 */    MCD_OPC_FilterValue, 15, 225, 2, 0, // Skip to: 4372
10084
/* 3635 */    MCD_OPC_CheckPredicate, 27, 220, 2, 0, // Skip to: 4372
10085
/* 3640 */    MCD_OPC_CheckField, 4, 1, 0, 213, 2, 0, // Skip to: 4372
10086
/* 3647 */    MCD_OPC_Decode, 146, 21, 220, 2, // Opcode: VTOULS
10087
/* 3652 */    MCD_OPC_FilterValue, 44, 17, 0, 0, // Skip to: 3674
10088
/* 3657 */    MCD_OPC_CheckPredicate, 68, 198, 2, 0, // Skip to: 4372
10089
/* 3662 */    MCD_OPC_CheckField, 4, 2, 0, 191, 2, 0, // Skip to: 4372
10090
/* 3669 */    MCD_OPC_Decode, 208, 4, 225, 2, // Opcode: FCONSTD
10091
/* 3674 */    MCD_OPC_FilterValue, 45, 77, 1, 0, // Skip to: 4012
10092
/* 3679 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10093
/* 3682 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 3704
10094
/* 3687 */    MCD_OPC_CheckPredicate, 61, 168, 2, 0, // Skip to: 4372
10095
/* 3692 */    MCD_OPC_CheckField, 4, 1, 0, 161, 2, 0, // Skip to: 4372
10096
/* 3699 */    MCD_OPC_Decode, 136, 14, 226, 2, // Opcode: VMOVD
10097
/* 3704 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 3726
10098
/* 3709 */    MCD_OPC_CheckPredicate, 61, 146, 2, 0, // Skip to: 4372
10099
/* 3714 */    MCD_OPC_CheckField, 4, 1, 0, 139, 2, 0, // Skip to: 4372
10100
/* 3721 */    MCD_OPC_Decode, 220, 14, 226, 2, // Opcode: VNEGD
10101
/* 3726 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 3748
10102
/* 3731 */    MCD_OPC_CheckPredicate, 69, 124, 2, 0, // Skip to: 4372
10103
/* 3736 */    MCD_OPC_CheckField, 4, 1, 0, 117, 2, 0, // Skip to: 4372
10104
/* 3743 */    MCD_OPC_Decode, 168, 9, 224, 2, // Opcode: VCVTBHD
10105
/* 3748 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 3770
10106
/* 3753 */    MCD_OPC_CheckPredicate, 69, 102, 2, 0, // Skip to: 4372
10107
/* 3758 */    MCD_OPC_CheckField, 4, 1, 0, 95, 2, 0, // Skip to: 4372
10108
/* 3765 */    MCD_OPC_Decode, 167, 9, 227, 2, // Opcode: VCVTBDH
10109
/* 3770 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 3792
10110
/* 3775 */    MCD_OPC_CheckPredicate, 61, 80, 2, 0, // Skip to: 4372
10111
/* 3780 */    MCD_OPC_CheckField, 4, 1, 0, 73, 2, 0, // Skip to: 4372
10112
/* 3787 */    MCD_OPC_Decode, 139, 9, 226, 2, // Opcode: VCMPD
10113
/* 3792 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 3814
10114
/* 3797 */    MCD_OPC_CheckPredicate, 61, 58, 2, 0, // Skip to: 4372
10115
/* 3802 */    MCD_OPC_CheckField, 0, 6, 0, 51, 2, 0, // Skip to: 4372
10116
/* 3809 */    MCD_OPC_Decode, 148, 9, 228, 2, // Opcode: VCMPZD
10117
/* 3814 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 3836
10118
/* 3819 */    MCD_OPC_CheckPredicate, 69, 36, 2, 0, // Skip to: 4372
10119
/* 3824 */    MCD_OPC_CheckField, 4, 1, 0, 29, 2, 0, // Skip to: 4372
10120
/* 3831 */    MCD_OPC_Decode, 147, 17, 226, 2, // Opcode: VRINTRD
10121
/* 3836 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 3858
10122
/* 3841 */    MCD_OPC_CheckPredicate, 69, 14, 2, 0, // Skip to: 4372
10123
/* 3846 */    MCD_OPC_CheckField, 4, 1, 0, 7, 2, 0, // Skip to: 4372
10124
/* 3853 */    MCD_OPC_Decode, 150, 17, 226, 2, // Opcode: VRINTXD
10125
/* 3858 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 3880
10126
/* 3863 */    MCD_OPC_CheckPredicate, 61, 248, 1, 0, // Skip to: 4372
10127
/* 3868 */    MCD_OPC_CheckField, 4, 1, 0, 241, 1, 0, // Skip to: 4372
10128
/* 3875 */    MCD_OPC_Decode, 166, 21, 224, 2, // Opcode: VUITOD
10129
/* 3880 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 3902
10130
/* 3885 */    MCD_OPC_CheckPredicate, 61, 226, 1, 0, // Skip to: 4372
10131
/* 3890 */    MCD_OPC_CheckField, 4, 1, 0, 219, 1, 0, // Skip to: 4372
10132
/* 3897 */    MCD_OPC_Decode, 171, 18, 229, 2, // Opcode: VSHTOD
10133
/* 3902 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 3924
10134
/* 3907 */    MCD_OPC_CheckPredicate, 61, 204, 1, 0, // Skip to: 4372
10135
/* 3912 */    MCD_OPC_CheckField, 4, 1, 0, 197, 1, 0, // Skip to: 4372
10136
/* 3919 */    MCD_OPC_Decode, 163, 21, 229, 2, // Opcode: VUHTOD
10137
/* 3924 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 3946
10138
/* 3929 */    MCD_OPC_CheckPredicate, 61, 182, 1, 0, // Skip to: 4372
10139
/* 3934 */    MCD_OPC_CheckField, 4, 1, 0, 175, 1, 0, // Skip to: 4372
10140
/* 3941 */    MCD_OPC_Decode, 138, 21, 227, 2, // Opcode: VTOUIRD
10141
/* 3946 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 3968
10142
/* 3951 */    MCD_OPC_CheckPredicate, 61, 160, 1, 0, // Skip to: 4372
10143
/* 3956 */    MCD_OPC_CheckField, 4, 1, 0, 153, 1, 0, // Skip to: 4372
10144
/* 3963 */    MCD_OPC_Decode, 254, 20, 227, 2, // Opcode: VTOSIRD
10145
/* 3968 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 3990
10146
/* 3973 */    MCD_OPC_CheckPredicate, 61, 138, 1, 0, // Skip to: 4372
10147
/* 3978 */    MCD_OPC_CheckField, 4, 1, 0, 131, 1, 0, // Skip to: 4372
10148
/* 3985 */    MCD_OPC_Decode, 251, 20, 229, 2, // Opcode: VTOSHD
10149
/* 3990 */    MCD_OPC_FilterValue, 15, 121, 1, 0, // Skip to: 4372
10150
/* 3995 */    MCD_OPC_CheckPredicate, 61, 116, 1, 0, // Skip to: 4372
10151
/* 4000 */    MCD_OPC_CheckField, 4, 1, 0, 109, 1, 0, // Skip to: 4372
10152
/* 4007 */    MCD_OPC_Decode, 135, 21, 229, 2, // Opcode: VTOUHD
10153
/* 4012 */    MCD_OPC_FilterValue, 47, 99, 1, 0, // Skip to: 4372
10154
/* 4017 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10155
/* 4020 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4042
10156
/* 4025 */    MCD_OPC_CheckPredicate, 61, 86, 1, 0, // Skip to: 4372
10157
/* 4030 */    MCD_OPC_CheckField, 4, 1, 0, 79, 1, 0, // Skip to: 4372
10158
/* 4037 */    MCD_OPC_Decode, 214, 7, 226, 2, // Opcode: VABSD
10159
/* 4042 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 4064
10160
/* 4047 */    MCD_OPC_CheckPredicate, 61, 64, 1, 0, // Skip to: 4372
10161
/* 4052 */    MCD_OPC_CheckField, 4, 1, 0, 57, 1, 0, // Skip to: 4372
10162
/* 4059 */    MCD_OPC_Decode, 188, 18, 226, 2, // Opcode: VSQRTD
10163
/* 4064 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 4086
10164
/* 4069 */    MCD_OPC_CheckPredicate, 69, 42, 1, 0, // Skip to: 4372
10165
/* 4074 */    MCD_OPC_CheckField, 4, 1, 0, 35, 1, 0, // Skip to: 4372
10166
/* 4081 */    MCD_OPC_Decode, 216, 9, 224, 2, // Opcode: VCVTTHD
10167
/* 4086 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 4108
10168
/* 4091 */    MCD_OPC_CheckPredicate, 69, 20, 1, 0, // Skip to: 4372
10169
/* 4096 */    MCD_OPC_CheckField, 4, 1, 0, 13, 1, 0, // Skip to: 4372
10170
/* 4103 */    MCD_OPC_Decode, 215, 9, 227, 2, // Opcode: VCVTTDH
10171
/* 4108 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 4130
10172
/* 4113 */    MCD_OPC_CheckPredicate, 61, 254, 0, 0, // Skip to: 4372
10173
/* 4118 */    MCD_OPC_CheckField, 4, 1, 0, 247, 0, 0, // Skip to: 4372
10174
/* 4125 */    MCD_OPC_Decode, 140, 9, 226, 2, // Opcode: VCMPED
10175
/* 4130 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 4152
10176
/* 4135 */    MCD_OPC_CheckPredicate, 61, 232, 0, 0, // Skip to: 4372
10177
/* 4140 */    MCD_OPC_CheckField, 0, 6, 0, 225, 0, 0, // Skip to: 4372
10178
/* 4147 */    MCD_OPC_Decode, 143, 9, 228, 2, // Opcode: VCMPEZD
10179
/* 4152 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 4174
10180
/* 4157 */    MCD_OPC_CheckPredicate, 69, 210, 0, 0, // Skip to: 4372
10181
/* 4162 */    MCD_OPC_CheckField, 4, 1, 0, 203, 0, 0, // Skip to: 4372
10182
/* 4169 */    MCD_OPC_Decode, 157, 17, 226, 2, // Opcode: VRINTZD
10183
/* 4174 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 4196
10184
/* 4179 */    MCD_OPC_CheckPredicate, 61, 188, 0, 0, // Skip to: 4372
10185
/* 4184 */    MCD_OPC_CheckField, 4, 1, 0, 181, 0, 0, // Skip to: 4372
10186
/* 4191 */    MCD_OPC_Decode, 214, 9, 227, 2, // Opcode: VCVTSD
10187
/* 4196 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 4218
10188
/* 4201 */    MCD_OPC_CheckPredicate, 61, 166, 0, 0, // Skip to: 4372
10189
/* 4206 */    MCD_OPC_CheckField, 4, 1, 0, 159, 0, 0, // Skip to: 4372
10190
/* 4213 */    MCD_OPC_Decode, 174, 18, 224, 2, // Opcode: VSITOD
10191
/* 4218 */    MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 4240
10192
/* 4223 */    MCD_OPC_CheckPredicate, 70, 144, 0, 0, // Skip to: 4372
10193
/* 4228 */    MCD_OPC_CheckField, 4, 1, 0, 137, 0, 0, // Skip to: 4372
10194
/* 4235 */    MCD_OPC_Decode, 199, 10, 227, 2, // Opcode: VJCVT
10195
/* 4240 */    MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 4262
10196
/* 4245 */    MCD_OPC_CheckPredicate, 61, 122, 0, 0, // Skip to: 4372
10197
/* 4250 */    MCD_OPC_CheckField, 4, 1, 0, 115, 0, 0, // Skip to: 4372
10198
/* 4257 */    MCD_OPC_Decode, 185, 18, 229, 2, // Opcode: VSLTOD
10199
/* 4262 */    MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 4284
10200
/* 4267 */    MCD_OPC_CheckPredicate, 61, 100, 0, 0, // Skip to: 4372
10201
/* 4272 */    MCD_OPC_CheckField, 4, 1, 0, 93, 0, 0, // Skip to: 4372
10202
/* 4279 */    MCD_OPC_Decode, 169, 21, 229, 2, // Opcode: VULTOD
10203
/* 4284 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 4306
10204
/* 4289 */    MCD_OPC_CheckPredicate, 61, 78, 0, 0, // Skip to: 4372
10205
/* 4294 */    MCD_OPC_CheckField, 4, 1, 0, 71, 0, 0, // Skip to: 4372
10206
/* 4301 */    MCD_OPC_Decode, 141, 21, 227, 2, // Opcode: VTOUIZD
10207
/* 4306 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 4328
10208
/* 4311 */    MCD_OPC_CheckPredicate, 61, 56, 0, 0, // Skip to: 4372
10209
/* 4316 */    MCD_OPC_CheckField, 4, 1, 0, 49, 0, 0, // Skip to: 4372
10210
/* 4323 */    MCD_OPC_Decode, 129, 21, 227, 2, // Opcode: VTOSIZD
10211
/* 4328 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 4350
10212
/* 4333 */    MCD_OPC_CheckPredicate, 61, 34, 0, 0, // Skip to: 4372
10213
/* 4338 */    MCD_OPC_CheckField, 4, 1, 0, 27, 0, 0, // Skip to: 4372
10214
/* 4345 */    MCD_OPC_Decode, 132, 21, 229, 2, // Opcode: VTOSLD
10215
/* 4350 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 4372
10216
/* 4355 */    MCD_OPC_CheckPredicate, 61, 12, 0, 0, // Skip to: 4372
10217
/* 4360 */    MCD_OPC_CheckField, 4, 1, 0, 5, 0, 0, // Skip to: 4372
10218
/* 4367 */    MCD_OPC_Decode, 144, 21, 229, 2, // Opcode: VTOULD
10219
/* 4372 */    MCD_OPC_Fail,
10220
  0
10221
};
10222
10223
static const uint8_t DecoderTableVFPV832[] = {
10224
/* 0 */       MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
10225
/* 3 */       MCD_OPC_FilterValue, 8, 87, 1, 0, // Skip to: 351
10226
/* 8 */       MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10227
/* 11 */      MCD_OPC_FilterValue, 0, 165, 0, 0, // Skip to: 181
10228
/* 16 */      MCD_OPC_ExtractField, 25, 7,  // Inst{31-25} ...
10229
/* 19 */      MCD_OPC_FilterValue, 126, 105, 0, 0, // Skip to: 129
10230
/* 24 */      MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10231
/* 27 */      MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 56
10232
/* 32 */      MCD_OPC_CheckPredicate, 71, 220, 9, 0, // Skip to: 2561
10233
/* 37 */      MCD_OPC_CheckField, 23, 1, 1, 213, 9, 0, // Skip to: 2561
10234
/* 44 */      MCD_OPC_CheckField, 4, 1, 0, 206, 9, 0, // Skip to: 2561
10235
/* 51 */      MCD_OPC_Decode, 152, 8, 230, 2, // Opcode: VCADDv4f16
10236
/* 56 */      MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 85
10237
/* 61 */      MCD_OPC_CheckPredicate, 72, 191, 9, 0, // Skip to: 2561
10238
/* 66 */      MCD_OPC_CheckField, 23, 1, 1, 184, 9, 0, // Skip to: 2561
10239
/* 73 */      MCD_OPC_CheckField, 4, 1, 0, 177, 9, 0, // Skip to: 2561
10240
/* 80 */      MCD_OPC_Decode, 151, 8, 230, 2, // Opcode: VCADDv2f32
10241
/* 85 */      MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 107
10242
/* 90 */      MCD_OPC_CheckPredicate, 71, 162, 9, 0, // Skip to: 2561
10243
/* 95 */      MCD_OPC_CheckField, 4, 1, 0, 155, 9, 0, // Skip to: 2561
10244
/* 102 */     MCD_OPC_Decode, 133, 9, 231, 2, // Opcode: VCMLAv4f16
10245
/* 107 */     MCD_OPC_FilterValue, 3, 145, 9, 0, // Skip to: 2561
10246
/* 112 */     MCD_OPC_CheckPredicate, 72, 140, 9, 0, // Skip to: 2561
10247
/* 117 */     MCD_OPC_CheckField, 4, 1, 0, 133, 9, 0, // Skip to: 2561
10248
/* 124 */     MCD_OPC_Decode, 131, 9, 231, 2, // Opcode: VCMLAv2f32
10249
/* 129 */     MCD_OPC_FilterValue, 127, 123, 9, 0, // Skip to: 2561
10250
/* 134 */     MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
10251
/* 137 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 159
10252
/* 142 */     MCD_OPC_CheckPredicate, 71, 110, 9, 0, // Skip to: 2561
10253
/* 147 */     MCD_OPC_CheckField, 4, 1, 0, 103, 9, 0, // Skip to: 2561
10254
/* 154 */     MCD_OPC_Decode, 134, 9, 232, 2, // Opcode: VCMLAv4f16_indexed
10255
/* 159 */     MCD_OPC_FilterValue, 1, 93, 9, 0, // Skip to: 2561
10256
/* 164 */     MCD_OPC_CheckPredicate, 72, 88, 9, 0, // Skip to: 2561
10257
/* 169 */     MCD_OPC_CheckField, 4, 1, 0, 81, 9, 0, // Skip to: 2561
10258
/* 176 */     MCD_OPC_Decode, 132, 9, 233, 2, // Opcode: VCMLAv2f32_indexed
10259
/* 181 */     MCD_OPC_FilterValue, 1, 71, 9, 0, // Skip to: 2561
10260
/* 186 */     MCD_OPC_ExtractField, 25, 7,  // Inst{31-25} ...
10261
/* 189 */     MCD_OPC_FilterValue, 126, 105, 0, 0, // Skip to: 299
10262
/* 194 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10263
/* 197 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 226
10264
/* 202 */     MCD_OPC_CheckPredicate, 71, 50, 9, 0, // Skip to: 2561
10265
/* 207 */     MCD_OPC_CheckField, 23, 1, 1, 43, 9, 0, // Skip to: 2561
10266
/* 214 */     MCD_OPC_CheckField, 4, 1, 0, 36, 9, 0, // Skip to: 2561
10267
/* 221 */     MCD_OPC_Decode, 154, 8, 234, 2, // Opcode: VCADDv8f16
10268
/* 226 */     MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 255
10269
/* 231 */     MCD_OPC_CheckPredicate, 72, 21, 9, 0, // Skip to: 2561
10270
/* 236 */     MCD_OPC_CheckField, 23, 1, 1, 14, 9, 0, // Skip to: 2561
10271
/* 243 */     MCD_OPC_CheckField, 4, 1, 0, 7, 9, 0, // Skip to: 2561
10272
/* 250 */     MCD_OPC_Decode, 153, 8, 234, 2, // Opcode: VCADDv4f32
10273
/* 255 */     MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 277
10274
/* 260 */     MCD_OPC_CheckPredicate, 71, 248, 8, 0, // Skip to: 2561
10275
/* 265 */     MCD_OPC_CheckField, 4, 1, 0, 241, 8, 0, // Skip to: 2561
10276
/* 272 */     MCD_OPC_Decode, 137, 9, 235, 2, // Opcode: VCMLAv8f16
10277
/* 277 */     MCD_OPC_FilterValue, 3, 231, 8, 0, // Skip to: 2561
10278
/* 282 */     MCD_OPC_CheckPredicate, 72, 226, 8, 0, // Skip to: 2561
10279
/* 287 */     MCD_OPC_CheckField, 4, 1, 0, 219, 8, 0, // Skip to: 2561
10280
/* 294 */     MCD_OPC_Decode, 135, 9, 235, 2, // Opcode: VCMLAv4f32
10281
/* 299 */     MCD_OPC_FilterValue, 127, 209, 8, 0, // Skip to: 2561
10282
/* 304 */     MCD_OPC_ExtractField, 23, 2,  // Inst{24-23} ...
10283
/* 307 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 329
10284
/* 312 */     MCD_OPC_CheckPredicate, 71, 196, 8, 0, // Skip to: 2561
10285
/* 317 */     MCD_OPC_CheckField, 4, 1, 0, 189, 8, 0, // Skip to: 2561
10286
/* 324 */     MCD_OPC_Decode, 138, 9, 236, 2, // Opcode: VCMLAv8f16_indexed
10287
/* 329 */     MCD_OPC_FilterValue, 1, 179, 8, 0, // Skip to: 2561
10288
/* 334 */     MCD_OPC_CheckPredicate, 72, 174, 8, 0, // Skip to: 2561
10289
/* 339 */     MCD_OPC_CheckField, 4, 1, 0, 167, 8, 0, // Skip to: 2561
10290
/* 346 */     MCD_OPC_Decode, 136, 9, 233, 2, // Opcode: VCMLAv4f32_indexed
10291
/* 351 */     MCD_OPC_FilterValue, 9, 123, 2, 0, // Skip to: 991
10292
/* 356 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10293
/* 359 */     MCD_OPC_FilterValue, 0, 87, 0, 0, // Skip to: 451
10294
/* 364 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10295
/* 367 */     MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 421
10296
/* 372 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10297
/* 375 */     MCD_OPC_FilterValue, 252, 3, 17, 0, 0, // Skip to: 398
10298
/* 381 */     MCD_OPC_CheckPredicate, 60, 127, 8, 0, // Skip to: 2561
10299
/* 386 */     MCD_OPC_CheckField, 4, 1, 0, 120, 8, 0, // Skip to: 2561
10300
/* 393 */     MCD_OPC_Decode, 233, 17, 237, 2, // Opcode: VSELEQH
10301
/* 398 */     MCD_OPC_FilterValue, 253, 3, 109, 8, 0, // Skip to: 2561
10302
/* 404 */     MCD_OPC_CheckPredicate, 60, 104, 8, 0, // Skip to: 2561
10303
/* 409 */     MCD_OPC_CheckField, 4, 1, 0, 97, 8, 0, // Skip to: 2561
10304
/* 416 */     MCD_OPC_Decode, 157, 13, 237, 2, // Opcode: VMAXNMH
10305
/* 421 */     MCD_OPC_FilterValue, 1, 87, 8, 0, // Skip to: 2561
10306
/* 426 */     MCD_OPC_CheckPredicate, 60, 82, 8, 0, // Skip to: 2561
10307
/* 431 */     MCD_OPC_CheckField, 23, 9, 253, 3, 74, 8, 0, // Skip to: 2561
10308
/* 439 */     MCD_OPC_CheckField, 4, 1, 0, 67, 8, 0, // Skip to: 2561
10309
/* 446 */     MCD_OPC_Decode, 180, 13, 237, 2, // Opcode: VMINNMH
10310
/* 451 */     MCD_OPC_FilterValue, 1, 32, 0, 0, // Skip to: 488
10311
/* 456 */     MCD_OPC_CheckPredicate, 60, 52, 8, 0, // Skip to: 2561
10312
/* 461 */     MCD_OPC_CheckField, 23, 9, 252, 3, 44, 8, 0, // Skip to: 2561
10313
/* 469 */     MCD_OPC_CheckField, 6, 1, 0, 37, 8, 0, // Skip to: 2561
10314
/* 476 */     MCD_OPC_CheckField, 4, 1, 0, 30, 8, 0, // Skip to: 2561
10315
/* 483 */     MCD_OPC_Decode, 242, 17, 237, 2, // Opcode: VSELVSH
10316
/* 488 */     MCD_OPC_FilterValue, 2, 32, 0, 0, // Skip to: 525
10317
/* 493 */     MCD_OPC_CheckPredicate, 60, 15, 8, 0, // Skip to: 2561
10318
/* 498 */     MCD_OPC_CheckField, 23, 9, 252, 3, 7, 8, 0, // Skip to: 2561
10319
/* 506 */     MCD_OPC_CheckField, 6, 1, 0, 0, 8, 0, // Skip to: 2561
10320
/* 513 */     MCD_OPC_CheckField, 4, 1, 0, 249, 7, 0, // Skip to: 2561
10321
/* 520 */     MCD_OPC_Decode, 236, 17, 237, 2, // Opcode: VSELGEH
10322
/* 525 */     MCD_OPC_FilterValue, 3, 239, 7, 0, // Skip to: 2561
10323
/* 530 */     MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10324
/* 533 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 563
10325
/* 538 */     MCD_OPC_CheckPredicate, 60, 226, 7, 0, // Skip to: 2561
10326
/* 543 */     MCD_OPC_CheckField, 23, 9, 252, 3, 218, 7, 0, // Skip to: 2561
10327
/* 551 */     MCD_OPC_CheckField, 4, 1, 0, 211, 7, 0, // Skip to: 2561
10328
/* 558 */     MCD_OPC_Decode, 239, 17, 237, 2, // Opcode: VSELGTH
10329
/* 563 */     MCD_OPC_FilterValue, 1, 201, 7, 0, // Skip to: 2561
10330
/* 568 */     MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10331
/* 571 */     MCD_OPC_FilterValue, 8, 32, 0, 0, // Skip to: 608
10332
/* 576 */     MCD_OPC_CheckPredicate, 60, 188, 7, 0, // Skip to: 2561
10333
/* 581 */     MCD_OPC_CheckField, 23, 9, 253, 3, 180, 7, 0, // Skip to: 2561
10334
/* 589 */     MCD_OPC_CheckField, 7, 1, 0, 173, 7, 0, // Skip to: 2561
10335
/* 596 */     MCD_OPC_CheckField, 4, 1, 0, 166, 7, 0, // Skip to: 2561
10336
/* 603 */     MCD_OPC_Decode, 248, 16, 238, 2, // Opcode: VRINTAH
10337
/* 608 */     MCD_OPC_FilterValue, 9, 32, 0, 0, // Skip to: 645
10338
/* 613 */     MCD_OPC_CheckPredicate, 60, 151, 7, 0, // Skip to: 2561
10339
/* 618 */     MCD_OPC_CheckField, 23, 9, 253, 3, 143, 7, 0, // Skip to: 2561
10340
/* 626 */     MCD_OPC_CheckField, 7, 1, 0, 136, 7, 0, // Skip to: 2561
10341
/* 633 */     MCD_OPC_CheckField, 4, 1, 0, 129, 7, 0, // Skip to: 2561
10342
/* 640 */     MCD_OPC_Decode, 134, 17, 238, 2, // Opcode: VRINTNH
10343
/* 645 */     MCD_OPC_FilterValue, 10, 32, 0, 0, // Skip to: 682
10344
/* 650 */     MCD_OPC_CheckPredicate, 60, 114, 7, 0, // Skip to: 2561
10345
/* 655 */     MCD_OPC_CheckField, 23, 9, 253, 3, 106, 7, 0, // Skip to: 2561
10346
/* 663 */     MCD_OPC_CheckField, 7, 1, 0, 99, 7, 0, // Skip to: 2561
10347
/* 670 */     MCD_OPC_CheckField, 4, 1, 0, 92, 7, 0, // Skip to: 2561
10348
/* 677 */     MCD_OPC_Decode, 141, 17, 238, 2, // Opcode: VRINTPH
10349
/* 682 */     MCD_OPC_FilterValue, 11, 32, 0, 0, // Skip to: 719
10350
/* 687 */     MCD_OPC_CheckPredicate, 60, 77, 7, 0, // Skip to: 2561
10351
/* 692 */     MCD_OPC_CheckField, 23, 9, 253, 3, 69, 7, 0, // Skip to: 2561
10352
/* 700 */     MCD_OPC_CheckField, 7, 1, 0, 62, 7, 0, // Skip to: 2561
10353
/* 707 */     MCD_OPC_CheckField, 4, 1, 0, 55, 7, 0, // Skip to: 2561
10354
/* 714 */     MCD_OPC_Decode, 255, 16, 238, 2, // Opcode: VRINTMH
10355
/* 719 */     MCD_OPC_FilterValue, 12, 63, 0, 0, // Skip to: 787
10356
/* 724 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10357
/* 727 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 757
10358
/* 732 */     MCD_OPC_CheckPredicate, 60, 32, 7, 0, // Skip to: 2561
10359
/* 737 */     MCD_OPC_CheckField, 23, 9, 253, 3, 24, 7, 0, // Skip to: 2561
10360
/* 745 */     MCD_OPC_CheckField, 4, 1, 0, 17, 7, 0, // Skip to: 2561
10361
/* 752 */     MCD_OPC_Decode, 165, 9, 239, 2, // Opcode: VCVTAUH
10362
/* 757 */     MCD_OPC_FilterValue, 1, 7, 7, 0, // Skip to: 2561
10363
/* 762 */     MCD_OPC_CheckPredicate, 60, 2, 7, 0, // Skip to: 2561
10364
/* 767 */     MCD_OPC_CheckField, 23, 9, 253, 3, 250, 6, 0, // Skip to: 2561
10365
/* 775 */     MCD_OPC_CheckField, 4, 1, 0, 243, 6, 0, // Skip to: 2561
10366
/* 782 */     MCD_OPC_Decode, 162, 9, 239, 2, // Opcode: VCVTASH
10367
/* 787 */     MCD_OPC_FilterValue, 13, 63, 0, 0, // Skip to: 855
10368
/* 792 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10369
/* 795 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 825
10370
/* 800 */     MCD_OPC_CheckPredicate, 60, 220, 6, 0, // Skip to: 2561
10371
/* 805 */     MCD_OPC_CheckField, 23, 9, 253, 3, 212, 6, 0, // Skip to: 2561
10372
/* 813 */     MCD_OPC_CheckField, 4, 1, 0, 205, 6, 0, // Skip to: 2561
10373
/* 820 */     MCD_OPC_Decode, 198, 9, 239, 2, // Opcode: VCVTNUH
10374
/* 825 */     MCD_OPC_FilterValue, 1, 195, 6, 0, // Skip to: 2561
10375
/* 830 */     MCD_OPC_CheckPredicate, 60, 190, 6, 0, // Skip to: 2561
10376
/* 835 */     MCD_OPC_CheckField, 23, 9, 253, 3, 182, 6, 0, // Skip to: 2561
10377
/* 843 */     MCD_OPC_CheckField, 4, 1, 0, 175, 6, 0, // Skip to: 2561
10378
/* 850 */     MCD_OPC_Decode, 195, 9, 239, 2, // Opcode: VCVTNSH
10379
/* 855 */     MCD_OPC_FilterValue, 14, 63, 0, 0, // Skip to: 923
10380
/* 860 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10381
/* 863 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 893
10382
/* 868 */     MCD_OPC_CheckPredicate, 60, 152, 6, 0, // Skip to: 2561
10383
/* 873 */     MCD_OPC_CheckField, 23, 9, 253, 3, 144, 6, 0, // Skip to: 2561
10384
/* 881 */     MCD_OPC_CheckField, 4, 1, 0, 137, 6, 0, // Skip to: 2561
10385
/* 888 */     MCD_OPC_Decode, 212, 9, 239, 2, // Opcode: VCVTPUH
10386
/* 893 */     MCD_OPC_FilterValue, 1, 127, 6, 0, // Skip to: 2561
10387
/* 898 */     MCD_OPC_CheckPredicate, 60, 122, 6, 0, // Skip to: 2561
10388
/* 903 */     MCD_OPC_CheckField, 23, 9, 253, 3, 114, 6, 0, // Skip to: 2561
10389
/* 911 */     MCD_OPC_CheckField, 4, 1, 0, 107, 6, 0, // Skip to: 2561
10390
/* 918 */     MCD_OPC_Decode, 209, 9, 239, 2, // Opcode: VCVTPSH
10391
/* 923 */     MCD_OPC_FilterValue, 15, 97, 6, 0, // Skip to: 2561
10392
/* 928 */     MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10393
/* 931 */     MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 961
10394
/* 936 */     MCD_OPC_CheckPredicate, 60, 84, 6, 0, // Skip to: 2561
10395
/* 941 */     MCD_OPC_CheckField, 23, 9, 253, 3, 76, 6, 0, // Skip to: 2561
10396
/* 949 */     MCD_OPC_CheckField, 4, 1, 0, 69, 6, 0, // Skip to: 2561
10397
/* 956 */     MCD_OPC_Decode, 184, 9, 239, 2, // Opcode: VCVTMUH
10398
/* 961 */     MCD_OPC_FilterValue, 1, 59, 6, 0, // Skip to: 2561
10399
/* 966 */     MCD_OPC_CheckPredicate, 60, 54, 6, 0, // Skip to: 2561
10400
/* 971 */     MCD_OPC_CheckField, 23, 9, 253, 3, 46, 6, 0, // Skip to: 2561
10401
/* 979 */     MCD_OPC_CheckField, 4, 1, 0, 39, 6, 0, // Skip to: 2561
10402
/* 986 */     MCD_OPC_Decode, 181, 9, 239, 2, // Opcode: VCVTMSH
10403
/* 991 */     MCD_OPC_FilterValue, 10, 191, 2, 0, // Skip to: 1699
10404
/* 996 */     MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10405
/* 999 */     MCD_OPC_FilterValue, 0, 87, 0, 0, // Skip to: 1091
10406
/* 1004 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10407
/* 1007 */    MCD_OPC_FilterValue, 0, 49, 0, 0, // Skip to: 1061
10408
/* 1012 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10409
/* 1015 */    MCD_OPC_FilterValue, 252, 3, 17, 0, 0, // Skip to: 1038
10410
/* 1021 */    MCD_OPC_CheckPredicate, 66, 255, 5, 0, // Skip to: 2561
10411
/* 1026 */    MCD_OPC_CheckField, 4, 1, 0, 248, 5, 0, // Skip to: 2561
10412
/* 1033 */    MCD_OPC_Decode, 234, 17, 240, 2, // Opcode: VSELEQS
10413
/* 1038 */    MCD_OPC_FilterValue, 253, 3, 237, 5, 0, // Skip to: 2561
10414
/* 1044 */    MCD_OPC_CheckPredicate, 66, 232, 5, 0, // Skip to: 2561
10415
/* 1049 */    MCD_OPC_CheckField, 4, 1, 0, 225, 5, 0, // Skip to: 2561
10416
/* 1056 */    MCD_OPC_Decode, 162, 13, 240, 2, // Opcode: VMAXNMS
10417
/* 1061 */    MCD_OPC_FilterValue, 1, 215, 5, 0, // Skip to: 2561
10418
/* 1066 */    MCD_OPC_CheckPredicate, 66, 210, 5, 0, // Skip to: 2561
10419
/* 1071 */    MCD_OPC_CheckField, 23, 9, 253, 3, 202, 5, 0, // Skip to: 2561
10420
/* 1079 */    MCD_OPC_CheckField, 4, 1, 0, 195, 5, 0, // Skip to: 2561
10421
/* 1086 */    MCD_OPC_Decode, 185, 13, 240, 2, // Opcode: VMINNMS
10422
/* 1091 */    MCD_OPC_FilterValue, 1, 32, 0, 0, // Skip to: 1128
10423
/* 1096 */    MCD_OPC_CheckPredicate, 66, 180, 5, 0, // Skip to: 2561
10424
/* 1101 */    MCD_OPC_CheckField, 23, 9, 252, 3, 172, 5, 0, // Skip to: 2561
10425
/* 1109 */    MCD_OPC_CheckField, 6, 1, 0, 165, 5, 0, // Skip to: 2561
10426
/* 1116 */    MCD_OPC_CheckField, 4, 1, 0, 158, 5, 0, // Skip to: 2561
10427
/* 1123 */    MCD_OPC_Decode, 243, 17, 240, 2, // Opcode: VSELVSS
10428
/* 1128 */    MCD_OPC_FilterValue, 2, 32, 0, 0, // Skip to: 1165
10429
/* 1133 */    MCD_OPC_CheckPredicate, 66, 143, 5, 0, // Skip to: 2561
10430
/* 1138 */    MCD_OPC_CheckField, 23, 9, 252, 3, 135, 5, 0, // Skip to: 2561
10431
/* 1146 */    MCD_OPC_CheckField, 6, 1, 0, 128, 5, 0, // Skip to: 2561
10432
/* 1153 */    MCD_OPC_CheckField, 4, 1, 0, 121, 5, 0, // Skip to: 2561
10433
/* 1160 */    MCD_OPC_Decode, 237, 17, 240, 2, // Opcode: VSELGES
10434
/* 1165 */    MCD_OPC_FilterValue, 3, 111, 5, 0, // Skip to: 2561
10435
/* 1170 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10436
/* 1173 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1203
10437
/* 1178 */    MCD_OPC_CheckPredicate, 66, 98, 5, 0, // Skip to: 2561
10438
/* 1183 */    MCD_OPC_CheckField, 23, 9, 252, 3, 90, 5, 0, // Skip to: 2561
10439
/* 1191 */    MCD_OPC_CheckField, 4, 1, 0, 83, 5, 0, // Skip to: 2561
10440
/* 1198 */    MCD_OPC_Decode, 240, 17, 240, 2, // Opcode: VSELGTS
10441
/* 1203 */    MCD_OPC_FilterValue, 1, 73, 5, 0, // Skip to: 2561
10442
/* 1208 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10443
/* 1211 */    MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 1279
10444
/* 1216 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10445
/* 1219 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1249
10446
/* 1224 */    MCD_OPC_CheckPredicate, 60, 52, 5, 0, // Skip to: 2561
10447
/* 1229 */    MCD_OPC_CheckField, 23, 9, 253, 3, 44, 5, 0, // Skip to: 2561
10448
/* 1237 */    MCD_OPC_CheckField, 4, 1, 0, 37, 5, 0, // Skip to: 2561
10449
/* 1244 */    MCD_OPC_Decode, 138, 14, 238, 2, // Opcode: VMOVH
10450
/* 1249 */    MCD_OPC_FilterValue, 1, 27, 5, 0, // Skip to: 2561
10451
/* 1254 */    MCD_OPC_CheckPredicate, 60, 22, 5, 0, // Skip to: 2561
10452
/* 1259 */    MCD_OPC_CheckField, 23, 9, 253, 3, 14, 5, 0, // Skip to: 2561
10453
/* 1267 */    MCD_OPC_CheckField, 4, 1, 0, 7, 5, 0, // Skip to: 2561
10454
/* 1274 */    MCD_OPC_Decode, 198, 10, 238, 2, // Opcode: VINSH
10455
/* 1279 */    MCD_OPC_FilterValue, 8, 32, 0, 0, // Skip to: 1316
10456
/* 1284 */    MCD_OPC_CheckPredicate, 66, 248, 4, 0, // Skip to: 2561
10457
/* 1289 */    MCD_OPC_CheckField, 23, 9, 253, 3, 240, 4, 0, // Skip to: 2561
10458
/* 1297 */    MCD_OPC_CheckField, 7, 1, 0, 233, 4, 0, // Skip to: 2561
10459
/* 1304 */    MCD_OPC_CheckField, 4, 1, 0, 226, 4, 0, // Skip to: 2561
10460
/* 1311 */    MCD_OPC_Decode, 253, 16, 238, 2, // Opcode: VRINTAS
10461
/* 1316 */    MCD_OPC_FilterValue, 9, 32, 0, 0, // Skip to: 1353
10462
/* 1321 */    MCD_OPC_CheckPredicate, 66, 211, 4, 0, // Skip to: 2561
10463
/* 1326 */    MCD_OPC_CheckField, 23, 9, 253, 3, 203, 4, 0, // Skip to: 2561
10464
/* 1334 */    MCD_OPC_CheckField, 7, 1, 0, 196, 4, 0, // Skip to: 2561
10465
/* 1341 */    MCD_OPC_CheckField, 4, 1, 0, 189, 4, 0, // Skip to: 2561
10466
/* 1348 */    MCD_OPC_Decode, 139, 17, 238, 2, // Opcode: VRINTNS
10467
/* 1353 */    MCD_OPC_FilterValue, 10, 32, 0, 0, // Skip to: 1390
10468
/* 1358 */    MCD_OPC_CheckPredicate, 66, 174, 4, 0, // Skip to: 2561
10469
/* 1363 */    MCD_OPC_CheckField, 23, 9, 253, 3, 166, 4, 0, // Skip to: 2561
10470
/* 1371 */    MCD_OPC_CheckField, 7, 1, 0, 159, 4, 0, // Skip to: 2561
10471
/* 1378 */    MCD_OPC_CheckField, 4, 1, 0, 152, 4, 0, // Skip to: 2561
10472
/* 1385 */    MCD_OPC_Decode, 146, 17, 238, 2, // Opcode: VRINTPS
10473
/* 1390 */    MCD_OPC_FilterValue, 11, 32, 0, 0, // Skip to: 1427
10474
/* 1395 */    MCD_OPC_CheckPredicate, 66, 137, 4, 0, // Skip to: 2561
10475
/* 1400 */    MCD_OPC_CheckField, 23, 9, 253, 3, 129, 4, 0, // Skip to: 2561
10476
/* 1408 */    MCD_OPC_CheckField, 7, 1, 0, 122, 4, 0, // Skip to: 2561
10477
/* 1415 */    MCD_OPC_CheckField, 4, 1, 0, 115, 4, 0, // Skip to: 2561
10478
/* 1422 */    MCD_OPC_Decode, 132, 17, 238, 2, // Opcode: VRINTMS
10479
/* 1427 */    MCD_OPC_FilterValue, 12, 63, 0, 0, // Skip to: 1495
10480
/* 1432 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10481
/* 1435 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1465
10482
/* 1440 */    MCD_OPC_CheckPredicate, 66, 92, 4, 0, // Skip to: 2561
10483
/* 1445 */    MCD_OPC_CheckField, 23, 9, 253, 3, 84, 4, 0, // Skip to: 2561
10484
/* 1453 */    MCD_OPC_CheckField, 4, 1, 0, 77, 4, 0, // Skip to: 2561
10485
/* 1460 */    MCD_OPC_Decode, 166, 9, 238, 2, // Opcode: VCVTAUS
10486
/* 1465 */    MCD_OPC_FilterValue, 1, 67, 4, 0, // Skip to: 2561
10487
/* 1470 */    MCD_OPC_CheckPredicate, 66, 62, 4, 0, // Skip to: 2561
10488
/* 1475 */    MCD_OPC_CheckField, 23, 9, 253, 3, 54, 4, 0, // Skip to: 2561
10489
/* 1483 */    MCD_OPC_CheckField, 4, 1, 0, 47, 4, 0, // Skip to: 2561
10490
/* 1490 */    MCD_OPC_Decode, 163, 9, 238, 2, // Opcode: VCVTASS
10491
/* 1495 */    MCD_OPC_FilterValue, 13, 63, 0, 0, // Skip to: 1563
10492
/* 1500 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10493
/* 1503 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1533
10494
/* 1508 */    MCD_OPC_CheckPredicate, 66, 24, 4, 0, // Skip to: 2561
10495
/* 1513 */    MCD_OPC_CheckField, 23, 9, 253, 3, 16, 4, 0, // Skip to: 2561
10496
/* 1521 */    MCD_OPC_CheckField, 4, 1, 0, 9, 4, 0, // Skip to: 2561
10497
/* 1528 */    MCD_OPC_Decode, 199, 9, 238, 2, // Opcode: VCVTNUS
10498
/* 1533 */    MCD_OPC_FilterValue, 1, 255, 3, 0, // Skip to: 2561
10499
/* 1538 */    MCD_OPC_CheckPredicate, 66, 250, 3, 0, // Skip to: 2561
10500
/* 1543 */    MCD_OPC_CheckField, 23, 9, 253, 3, 242, 3, 0, // Skip to: 2561
10501
/* 1551 */    MCD_OPC_CheckField, 4, 1, 0, 235, 3, 0, // Skip to: 2561
10502
/* 1558 */    MCD_OPC_Decode, 196, 9, 238, 2, // Opcode: VCVTNSS
10503
/* 1563 */    MCD_OPC_FilterValue, 14, 63, 0, 0, // Skip to: 1631
10504
/* 1568 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10505
/* 1571 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1601
10506
/* 1576 */    MCD_OPC_CheckPredicate, 66, 212, 3, 0, // Skip to: 2561
10507
/* 1581 */    MCD_OPC_CheckField, 23, 9, 253, 3, 204, 3, 0, // Skip to: 2561
10508
/* 1589 */    MCD_OPC_CheckField, 4, 1, 0, 197, 3, 0, // Skip to: 2561
10509
/* 1596 */    MCD_OPC_Decode, 213, 9, 238, 2, // Opcode: VCVTPUS
10510
/* 1601 */    MCD_OPC_FilterValue, 1, 187, 3, 0, // Skip to: 2561
10511
/* 1606 */    MCD_OPC_CheckPredicate, 66, 182, 3, 0, // Skip to: 2561
10512
/* 1611 */    MCD_OPC_CheckField, 23, 9, 253, 3, 174, 3, 0, // Skip to: 2561
10513
/* 1619 */    MCD_OPC_CheckField, 4, 1, 0, 167, 3, 0, // Skip to: 2561
10514
/* 1626 */    MCD_OPC_Decode, 210, 9, 238, 2, // Opcode: VCVTPSS
10515
/* 1631 */    MCD_OPC_FilterValue, 15, 157, 3, 0, // Skip to: 2561
10516
/* 1636 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10517
/* 1639 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 1669
10518
/* 1644 */    MCD_OPC_CheckPredicate, 66, 144, 3, 0, // Skip to: 2561
10519
/* 1649 */    MCD_OPC_CheckField, 23, 9, 253, 3, 136, 3, 0, // Skip to: 2561
10520
/* 1657 */    MCD_OPC_CheckField, 4, 1, 0, 129, 3, 0, // Skip to: 2561
10521
/* 1664 */    MCD_OPC_Decode, 185, 9, 238, 2, // Opcode: VCVTMUS
10522
/* 1669 */    MCD_OPC_FilterValue, 1, 119, 3, 0, // Skip to: 2561
10523
/* 1674 */    MCD_OPC_CheckPredicate, 66, 114, 3, 0, // Skip to: 2561
10524
/* 1679 */    MCD_OPC_CheckField, 23, 9, 253, 3, 106, 3, 0, // Skip to: 2561
10525
/* 1687 */    MCD_OPC_CheckField, 4, 1, 0, 99, 3, 0, // Skip to: 2561
10526
/* 1694 */    MCD_OPC_Decode, 182, 9, 238, 2, // Opcode: VCVTMSS
10527
/* 1699 */    MCD_OPC_FilterValue, 11, 113, 2, 0, // Skip to: 2329
10528
/* 1704 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10529
/* 1707 */    MCD_OPC_FilterValue, 0, 84, 0, 0, // Skip to: 1796
10530
/* 1712 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10531
/* 1715 */    MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 1767
10532
/* 1720 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10533
/* 1723 */    MCD_OPC_FilterValue, 252, 3, 16, 0, 0, // Skip to: 1745
10534
/* 1729 */    MCD_OPC_CheckPredicate, 69, 59, 3, 0, // Skip to: 2561
10535
/* 1734 */    MCD_OPC_CheckField, 4, 1, 0, 52, 3, 0, // Skip to: 2561
10536
/* 1741 */    MCD_OPC_Decode, 232, 17, 97, // Opcode: VSELEQD
10537
/* 1745 */    MCD_OPC_FilterValue, 253, 3, 42, 3, 0, // Skip to: 2561
10538
/* 1751 */    MCD_OPC_CheckPredicate, 69, 37, 3, 0, // Skip to: 2561
10539
/* 1756 */    MCD_OPC_CheckField, 4, 1, 0, 30, 3, 0, // Skip to: 2561
10540
/* 1763 */    MCD_OPC_Decode, 156, 13, 97, // Opcode: VMAXNMD
10541
/* 1767 */    MCD_OPC_FilterValue, 1, 21, 3, 0, // Skip to: 2561
10542
/* 1772 */    MCD_OPC_CheckPredicate, 69, 16, 3, 0, // Skip to: 2561
10543
/* 1777 */    MCD_OPC_CheckField, 23, 9, 253, 3, 8, 3, 0, // Skip to: 2561
10544
/* 1785 */    MCD_OPC_CheckField, 4, 1, 0, 1, 3, 0, // Skip to: 2561
10545
/* 1792 */    MCD_OPC_Decode, 179, 13, 97, // Opcode: VMINNMD
10546
/* 1796 */    MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 1832
10547
/* 1801 */    MCD_OPC_CheckPredicate, 69, 243, 2, 0, // Skip to: 2561
10548
/* 1806 */    MCD_OPC_CheckField, 23, 9, 252, 3, 235, 2, 0, // Skip to: 2561
10549
/* 1814 */    MCD_OPC_CheckField, 6, 1, 0, 228, 2, 0, // Skip to: 2561
10550
/* 1821 */    MCD_OPC_CheckField, 4, 1, 0, 221, 2, 0, // Skip to: 2561
10551
/* 1828 */    MCD_OPC_Decode, 241, 17, 97, // Opcode: VSELVSD
10552
/* 1832 */    MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 1868
10553
/* 1837 */    MCD_OPC_CheckPredicate, 69, 207, 2, 0, // Skip to: 2561
10554
/* 1842 */    MCD_OPC_CheckField, 23, 9, 252, 3, 199, 2, 0, // Skip to: 2561
10555
/* 1850 */    MCD_OPC_CheckField, 6, 1, 0, 192, 2, 0, // Skip to: 2561
10556
/* 1857 */    MCD_OPC_CheckField, 4, 1, 0, 185, 2, 0, // Skip to: 2561
10557
/* 1864 */    MCD_OPC_Decode, 235, 17, 97, // Opcode: VSELGED
10558
/* 1868 */    MCD_OPC_FilterValue, 3, 176, 2, 0, // Skip to: 2561
10559
/* 1873 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10560
/* 1876 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 1905
10561
/* 1881 */    MCD_OPC_CheckPredicate, 69, 163, 2, 0, // Skip to: 2561
10562
/* 1886 */    MCD_OPC_CheckField, 23, 9, 252, 3, 155, 2, 0, // Skip to: 2561
10563
/* 1894 */    MCD_OPC_CheckField, 4, 1, 0, 148, 2, 0, // Skip to: 2561
10564
/* 1901 */    MCD_OPC_Decode, 238, 17, 97, // Opcode: VSELGTD
10565
/* 1905 */    MCD_OPC_FilterValue, 1, 139, 2, 0, // Skip to: 2561
10566
/* 1910 */    MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10567
/* 1913 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 1949
10568
/* 1918 */    MCD_OPC_CheckPredicate, 69, 126, 2, 0, // Skip to: 2561
10569
/* 1923 */    MCD_OPC_CheckField, 23, 9, 253, 3, 118, 2, 0, // Skip to: 2561
10570
/* 1931 */    MCD_OPC_CheckField, 7, 1, 0, 111, 2, 0, // Skip to: 2561
10571
/* 1938 */    MCD_OPC_CheckField, 4, 1, 0, 104, 2, 0, // Skip to: 2561
10572
/* 1945 */    MCD_OPC_Decode, 247, 16, 126, // Opcode: VRINTAD
10573
/* 1949 */    MCD_OPC_FilterValue, 9, 31, 0, 0, // Skip to: 1985
10574
/* 1954 */    MCD_OPC_CheckPredicate, 69, 90, 2, 0, // Skip to: 2561
10575
/* 1959 */    MCD_OPC_CheckField, 23, 9, 253, 3, 82, 2, 0, // Skip to: 2561
10576
/* 1967 */    MCD_OPC_CheckField, 7, 1, 0, 75, 2, 0, // Skip to: 2561
10577
/* 1974 */    MCD_OPC_CheckField, 4, 1, 0, 68, 2, 0, // Skip to: 2561
10578
/* 1981 */    MCD_OPC_Decode, 133, 17, 126, // Opcode: VRINTND
10579
/* 1985 */    MCD_OPC_FilterValue, 10, 31, 0, 0, // Skip to: 2021
10580
/* 1990 */    MCD_OPC_CheckPredicate, 69, 54, 2, 0, // Skip to: 2561
10581
/* 1995 */    MCD_OPC_CheckField, 23, 9, 253, 3, 46, 2, 0, // Skip to: 2561
10582
/* 2003 */    MCD_OPC_CheckField, 7, 1, 0, 39, 2, 0, // Skip to: 2561
10583
/* 2010 */    MCD_OPC_CheckField, 4, 1, 0, 32, 2, 0, // Skip to: 2561
10584
/* 2017 */    MCD_OPC_Decode, 140, 17, 126, // Opcode: VRINTPD
10585
/* 2021 */    MCD_OPC_FilterValue, 11, 31, 0, 0, // Skip to: 2057
10586
/* 2026 */    MCD_OPC_CheckPredicate, 69, 18, 2, 0, // Skip to: 2561
10587
/* 2031 */    MCD_OPC_CheckField, 23, 9, 253, 3, 10, 2, 0, // Skip to: 2561
10588
/* 2039 */    MCD_OPC_CheckField, 7, 1, 0, 3, 2, 0, // Skip to: 2561
10589
/* 2046 */    MCD_OPC_CheckField, 4, 1, 0, 252, 1, 0, // Skip to: 2561
10590
/* 2053 */    MCD_OPC_Decode, 254, 16, 126, // Opcode: VRINTMD
10591
/* 2057 */    MCD_OPC_FilterValue, 12, 63, 0, 0, // Skip to: 2125
10592
/* 2062 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10593
/* 2065 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2095
10594
/* 2070 */    MCD_OPC_CheckPredicate, 69, 230, 1, 0, // Skip to: 2561
10595
/* 2075 */    MCD_OPC_CheckField, 23, 9, 253, 3, 222, 1, 0, // Skip to: 2561
10596
/* 2083 */    MCD_OPC_CheckField, 4, 1, 0, 215, 1, 0, // Skip to: 2561
10597
/* 2090 */    MCD_OPC_Decode, 164, 9, 241, 2, // Opcode: VCVTAUD
10598
/* 2095 */    MCD_OPC_FilterValue, 1, 205, 1, 0, // Skip to: 2561
10599
/* 2100 */    MCD_OPC_CheckPredicate, 69, 200, 1, 0, // Skip to: 2561
10600
/* 2105 */    MCD_OPC_CheckField, 23, 9, 253, 3, 192, 1, 0, // Skip to: 2561
10601
/* 2113 */    MCD_OPC_CheckField, 4, 1, 0, 185, 1, 0, // Skip to: 2561
10602
/* 2120 */    MCD_OPC_Decode, 161, 9, 241, 2, // Opcode: VCVTASD
10603
/* 2125 */    MCD_OPC_FilterValue, 13, 63, 0, 0, // Skip to: 2193
10604
/* 2130 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10605
/* 2133 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2163
10606
/* 2138 */    MCD_OPC_CheckPredicate, 69, 162, 1, 0, // Skip to: 2561
10607
/* 2143 */    MCD_OPC_CheckField, 23, 9, 253, 3, 154, 1, 0, // Skip to: 2561
10608
/* 2151 */    MCD_OPC_CheckField, 4, 1, 0, 147, 1, 0, // Skip to: 2561
10609
/* 2158 */    MCD_OPC_Decode, 197, 9, 241, 2, // Opcode: VCVTNUD
10610
/* 2163 */    MCD_OPC_FilterValue, 1, 137, 1, 0, // Skip to: 2561
10611
/* 2168 */    MCD_OPC_CheckPredicate, 69, 132, 1, 0, // Skip to: 2561
10612
/* 2173 */    MCD_OPC_CheckField, 23, 9, 253, 3, 124, 1, 0, // Skip to: 2561
10613
/* 2181 */    MCD_OPC_CheckField, 4, 1, 0, 117, 1, 0, // Skip to: 2561
10614
/* 2188 */    MCD_OPC_Decode, 194, 9, 241, 2, // Opcode: VCVTNSD
10615
/* 2193 */    MCD_OPC_FilterValue, 14, 63, 0, 0, // Skip to: 2261
10616
/* 2198 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10617
/* 2201 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2231
10618
/* 2206 */    MCD_OPC_CheckPredicate, 69, 94, 1, 0, // Skip to: 2561
10619
/* 2211 */    MCD_OPC_CheckField, 23, 9, 253, 3, 86, 1, 0, // Skip to: 2561
10620
/* 2219 */    MCD_OPC_CheckField, 4, 1, 0, 79, 1, 0, // Skip to: 2561
10621
/* 2226 */    MCD_OPC_Decode, 211, 9, 241, 2, // Opcode: VCVTPUD
10622
/* 2231 */    MCD_OPC_FilterValue, 1, 69, 1, 0, // Skip to: 2561
10623
/* 2236 */    MCD_OPC_CheckPredicate, 69, 64, 1, 0, // Skip to: 2561
10624
/* 2241 */    MCD_OPC_CheckField, 23, 9, 253, 3, 56, 1, 0, // Skip to: 2561
10625
/* 2249 */    MCD_OPC_CheckField, 4, 1, 0, 49, 1, 0, // Skip to: 2561
10626
/* 2256 */    MCD_OPC_Decode, 208, 9, 241, 2, // Opcode: VCVTPSD
10627
/* 2261 */    MCD_OPC_FilterValue, 15, 39, 1, 0, // Skip to: 2561
10628
/* 2266 */    MCD_OPC_ExtractField, 7, 1,  // Inst{7} ...
10629
/* 2269 */    MCD_OPC_FilterValue, 0, 25, 0, 0, // Skip to: 2299
10630
/* 2274 */    MCD_OPC_CheckPredicate, 69, 26, 1, 0, // Skip to: 2561
10631
/* 2279 */    MCD_OPC_CheckField, 23, 9, 253, 3, 18, 1, 0, // Skip to: 2561
10632
/* 2287 */    MCD_OPC_CheckField, 4, 1, 0, 11, 1, 0, // Skip to: 2561
10633
/* 2294 */    MCD_OPC_Decode, 183, 9, 241, 2, // Opcode: VCVTMUD
10634
/* 2299 */    MCD_OPC_FilterValue, 1, 1, 1, 0, // Skip to: 2561
10635
/* 2304 */    MCD_OPC_CheckPredicate, 69, 252, 0, 0, // Skip to: 2561
10636
/* 2309 */    MCD_OPC_CheckField, 23, 9, 253, 3, 244, 0, 0, // Skip to: 2561
10637
/* 2317 */    MCD_OPC_CheckField, 4, 1, 0, 237, 0, 0, // Skip to: 2561
10638
/* 2324 */    MCD_OPC_Decode, 180, 9, 241, 2, // Opcode: VCVTMSD
10639
/* 2329 */    MCD_OPC_FilterValue, 13, 227, 0, 0, // Skip to: 2561
10640
/* 2334 */    MCD_OPC_ExtractField, 4, 1,  // Inst{4} ...
10641
/* 2337 */    MCD_OPC_FilterValue, 0, 107, 0, 0, // Skip to: 2449
10642
/* 2342 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10643
/* 2345 */    MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 2397
10644
/* 2350 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10645
/* 2353 */    MCD_OPC_FilterValue, 248, 3, 16, 0, 0, // Skip to: 2375
10646
/* 2359 */    MCD_OPC_CheckPredicate, 73, 197, 0, 0, // Skip to: 2561
10647
/* 2364 */    MCD_OPC_CheckField, 20, 2, 2, 190, 0, 0, // Skip to: 2561
10648
/* 2371 */    MCD_OPC_Decode, 228, 17, 105, // Opcode: VSDOTD
10649
/* 2375 */    MCD_OPC_FilterValue, 252, 3, 180, 0, 0, // Skip to: 2561
10650
/* 2381 */    MCD_OPC_CheckPredicate, 73, 175, 0, 0, // Skip to: 2561
10651
/* 2386 */    MCD_OPC_CheckField, 20, 2, 2, 168, 0, 0, // Skip to: 2561
10652
/* 2393 */    MCD_OPC_Decode, 229, 17, 113, // Opcode: VSDOTDI
10653
/* 2397 */    MCD_OPC_FilterValue, 1, 159, 0, 0, // Skip to: 2561
10654
/* 2402 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10655
/* 2405 */    MCD_OPC_FilterValue, 248, 3, 16, 0, 0, // Skip to: 2427
10656
/* 2411 */    MCD_OPC_CheckPredicate, 73, 145, 0, 0, // Skip to: 2561
10657
/* 2416 */    MCD_OPC_CheckField, 20, 2, 2, 138, 0, 0, // Skip to: 2561
10658
/* 2423 */    MCD_OPC_Decode, 230, 17, 106, // Opcode: VSDOTQ
10659
/* 2427 */    MCD_OPC_FilterValue, 252, 3, 128, 0, 0, // Skip to: 2561
10660
/* 2433 */    MCD_OPC_CheckPredicate, 73, 123, 0, 0, // Skip to: 2561
10661
/* 2438 */    MCD_OPC_CheckField, 20, 2, 2, 116, 0, 0, // Skip to: 2561
10662
/* 2445 */    MCD_OPC_Decode, 231, 17, 114, // Opcode: VSDOTQI
10663
/* 2449 */    MCD_OPC_FilterValue, 1, 107, 0, 0, // Skip to: 2561
10664
/* 2454 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
10665
/* 2457 */    MCD_OPC_FilterValue, 0, 47, 0, 0, // Skip to: 2509
10666
/* 2462 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10667
/* 2465 */    MCD_OPC_FilterValue, 248, 3, 16, 0, 0, // Skip to: 2487
10668
/* 2471 */    MCD_OPC_CheckPredicate, 73, 85, 0, 0, // Skip to: 2561
10669
/* 2476 */    MCD_OPC_CheckField, 20, 2, 2, 78, 0, 0, // Skip to: 2561
10670
/* 2483 */    MCD_OPC_Decode, 159, 21, 105, // Opcode: VUDOTD
10671
/* 2487 */    MCD_OPC_FilterValue, 252, 3, 68, 0, 0, // Skip to: 2561
10672
/* 2493 */    MCD_OPC_CheckPredicate, 73, 63, 0, 0, // Skip to: 2561
10673
/* 2498 */    MCD_OPC_CheckField, 20, 2, 2, 56, 0, 0, // Skip to: 2561
10674
/* 2505 */    MCD_OPC_Decode, 160, 21, 113, // Opcode: VUDOTDI
10675
/* 2509 */    MCD_OPC_FilterValue, 1, 47, 0, 0, // Skip to: 2561
10676
/* 2514 */    MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10677
/* 2517 */    MCD_OPC_FilterValue, 248, 3, 16, 0, 0, // Skip to: 2539
10678
/* 2523 */    MCD_OPC_CheckPredicate, 73, 33, 0, 0, // Skip to: 2561
10679
/* 2528 */    MCD_OPC_CheckField, 20, 2, 2, 26, 0, 0, // Skip to: 2561
10680
/* 2535 */    MCD_OPC_Decode, 161, 21, 106, // Opcode: VUDOTQ
10681
/* 2539 */    MCD_OPC_FilterValue, 252, 3, 16, 0, 0, // Skip to: 2561
10682
/* 2545 */    MCD_OPC_CheckPredicate, 73, 11, 0, 0, // Skip to: 2561
10683
/* 2550 */    MCD_OPC_CheckField, 20, 2, 2, 4, 0, 0, // Skip to: 2561
10684
/* 2557 */    MCD_OPC_Decode, 162, 21, 114, // Opcode: VUDOTQI
10685
/* 2561 */    MCD_OPC_Fail,
10686
  0
10687
};
10688
10689
static const uint8_t DecoderTablev8Crypto32[] = {
10690
/* 0 */       MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
10691
/* 3 */       MCD_OPC_FilterValue, 0, 75, 0, 0, // Skip to: 83
10692
/* 8 */       MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10693
/* 11 */      MCD_OPC_FilterValue, 228, 3, 30, 0, 0, // Skip to: 47
10694
/* 17 */      MCD_OPC_CheckPredicate, 24, 12, 2, 0, // Skip to: 546
10695
/* 22 */      MCD_OPC_CheckField, 8, 4, 12, 5, 2, 0, // Skip to: 546
10696
/* 29 */      MCD_OPC_CheckField, 6, 1, 1, 254, 1, 0, // Skip to: 546
10697
/* 36 */      MCD_OPC_CheckField, 4, 1, 0, 247, 1, 0, // Skip to: 546
10698
/* 43 */      MCD_OPC_Decode, 247, 5, 106, // Opcode: SHA1C
10699
/* 47 */      MCD_OPC_FilterValue, 230, 3, 237, 1, 0, // Skip to: 546
10700
/* 53 */      MCD_OPC_CheckPredicate, 24, 232, 1, 0, // Skip to: 546
10701
/* 58 */      MCD_OPC_CheckField, 8, 4, 12, 225, 1, 0, // Skip to: 546
10702
/* 65 */      MCD_OPC_CheckField, 6, 1, 1, 218, 1, 0, // Skip to: 546
10703
/* 72 */      MCD_OPC_CheckField, 4, 1, 0, 211, 1, 0, // Skip to: 546
10704
/* 79 */      MCD_OPC_Decode, 253, 5, 106, // Opcode: SHA256H
10705
/* 83 */      MCD_OPC_FilterValue, 1, 75, 0, 0, // Skip to: 163
10706
/* 88 */      MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10707
/* 91 */      MCD_OPC_FilterValue, 228, 3, 30, 0, 0, // Skip to: 127
10708
/* 97 */      MCD_OPC_CheckPredicate, 24, 188, 1, 0, // Skip to: 546
10709
/* 102 */     MCD_OPC_CheckField, 8, 4, 12, 181, 1, 0, // Skip to: 546
10710
/* 109 */     MCD_OPC_CheckField, 6, 1, 1, 174, 1, 0, // Skip to: 546
10711
/* 116 */     MCD_OPC_CheckField, 4, 1, 0, 167, 1, 0, // Skip to: 546
10712
/* 123 */     MCD_OPC_Decode, 250, 5, 106, // Opcode: SHA1P
10713
/* 127 */     MCD_OPC_FilterValue, 230, 3, 157, 1, 0, // Skip to: 546
10714
/* 133 */     MCD_OPC_CheckPredicate, 24, 152, 1, 0, // Skip to: 546
10715
/* 138 */     MCD_OPC_CheckField, 8, 4, 12, 145, 1, 0, // Skip to: 546
10716
/* 145 */     MCD_OPC_CheckField, 6, 1, 1, 138, 1, 0, // Skip to: 546
10717
/* 152 */     MCD_OPC_CheckField, 4, 1, 0, 131, 1, 0, // Skip to: 546
10718
/* 159 */     MCD_OPC_Decode, 254, 5, 106, // Opcode: SHA256H2
10719
/* 163 */     MCD_OPC_FilterValue, 2, 75, 0, 0, // Skip to: 243
10720
/* 168 */     MCD_OPC_ExtractField, 23, 9,  // Inst{31-23} ...
10721
/* 171 */     MCD_OPC_FilterValue, 228, 3, 30, 0, 0, // Skip to: 207
10722
/* 177 */     MCD_OPC_CheckPredicate, 24, 108, 1, 0, // Skip to: 546
10723
/* 182 */     MCD_OPC_CheckField, 8, 4, 12, 101, 1, 0, // Skip to: 546
10724
/* 189 */     MCD_OPC_CheckField, 6, 1, 1, 94, 1, 0, // Skip to: 546
10725
/* 196 */     MCD_OPC_CheckField, 4, 1, 0, 87, 1, 0, // Skip to: 546
10726
/* 203 */     MCD_OPC_Decode, 249, 5, 106, // Opcode: SHA1M
10727
/* 207 */     MCD_OPC_FilterValue, 230, 3, 77, 1, 0, // Skip to: 546
10728
/* 213 */     MCD_OPC_CheckPredicate, 24, 72, 1, 0, // Skip to: 546
10729
/* 218 */     MCD_OPC_CheckField, 8, 4, 12, 65, 1, 0, // Skip to: 546
10730
/* 225 */     MCD_OPC_CheckField, 6, 1, 1, 58, 1, 0, // Skip to: 546
10731
/* 232 */     MCD_OPC_CheckField, 4, 1, 0, 51, 1, 0, // Skip to: 546
10732
/* 239 */     MCD_OPC_Decode, 128, 6, 106, // Opcode: SHA256SU1
10733
/* 243 */     MCD_OPC_FilterValue, 3, 42, 1, 0, // Skip to: 546
10734
/* 248 */     MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
10735
/* 251 */     MCD_OPC_FilterValue, 2, 38, 0, 0, // Skip to: 294
10736
/* 256 */     MCD_OPC_CheckPredicate, 24, 29, 1, 0, // Skip to: 546
10737
/* 261 */     MCD_OPC_CheckField, 23, 9, 231, 3, 21, 1, 0, // Skip to: 546
10738
/* 269 */     MCD_OPC_CheckField, 16, 4, 9, 14, 1, 0, // Skip to: 546
10739
/* 276 */     MCD_OPC_CheckField, 6, 2, 3, 7, 1, 0, // Skip to: 546
10740
/* 283 */     MCD_OPC_CheckField, 4, 1, 0, 0, 1, 0, // Skip to: 546
10741
/* 290 */     MCD_OPC_Decode, 248, 5, 127, // Opcode: SHA1H
10742
/* 294 */     MCD_OPC_FilterValue, 3, 211, 0, 0, // Skip to: 510
10743
/* 299 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10744
/* 302 */     MCD_OPC_FilterValue, 0, 32, 0, 0, // Skip to: 339
10745
/* 307 */     MCD_OPC_CheckPredicate, 24, 234, 0, 0, // Skip to: 546
10746
/* 312 */     MCD_OPC_CheckField, 23, 9, 231, 3, 226, 0, 0, // Skip to: 546
10747
/* 320 */     MCD_OPC_CheckField, 16, 4, 0, 219, 0, 0, // Skip to: 546
10748
/* 327 */     MCD_OPC_CheckField, 4, 1, 0, 212, 0, 0, // Skip to: 546
10749
/* 334 */     MCD_OPC_Decode, 155, 4, 133, 1, // Opcode: AESE
10750
/* 339 */     MCD_OPC_FilterValue, 1, 32, 0, 0, // Skip to: 376
10751
/* 344 */     MCD_OPC_CheckPredicate, 24, 197, 0, 0, // Skip to: 546
10752
/* 349 */     MCD_OPC_CheckField, 23, 9, 231, 3, 189, 0, 0, // Skip to: 546
10753
/* 357 */     MCD_OPC_CheckField, 16, 4, 0, 182, 0, 0, // Skip to: 546
10754
/* 364 */     MCD_OPC_CheckField, 4, 1, 0, 175, 0, 0, // Skip to: 546
10755
/* 371 */     MCD_OPC_Decode, 154, 4, 133, 1, // Opcode: AESD
10756
/* 376 */     MCD_OPC_FilterValue, 2, 62, 0, 0, // Skip to: 443
10757
/* 381 */     MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10758
/* 384 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 413
10759
/* 389 */     MCD_OPC_CheckPredicate, 24, 152, 0, 0, // Skip to: 546
10760
/* 394 */     MCD_OPC_CheckField, 23, 9, 231, 3, 144, 0, 0, // Skip to: 546
10761
/* 402 */     MCD_OPC_CheckField, 4, 1, 0, 137, 0, 0, // Skip to: 546
10762
/* 409 */     MCD_OPC_Decode, 157, 4, 127, // Opcode: AESMC
10763
/* 413 */     MCD_OPC_FilterValue, 10, 128, 0, 0, // Skip to: 546
10764
/* 418 */     MCD_OPC_CheckPredicate, 24, 123, 0, 0, // Skip to: 546
10765
/* 423 */     MCD_OPC_CheckField, 23, 9, 231, 3, 115, 0, 0, // Skip to: 546
10766
/* 431 */     MCD_OPC_CheckField, 4, 1, 0, 108, 0, 0, // Skip to: 546
10767
/* 438 */     MCD_OPC_Decode, 252, 5, 133, 1, // Opcode: SHA1SU1
10768
/* 443 */     MCD_OPC_FilterValue, 3, 98, 0, 0, // Skip to: 546
10769
/* 448 */     MCD_OPC_ExtractField, 16, 4,  // Inst{19-16} ...
10770
/* 451 */     MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 480
10771
/* 456 */     MCD_OPC_CheckPredicate, 24, 85, 0, 0, // Skip to: 546
10772
/* 461 */     MCD_OPC_CheckField, 23, 9, 231, 3, 77, 0, 0, // Skip to: 546
10773
/* 469 */     MCD_OPC_CheckField, 4, 1, 0, 70, 0, 0, // Skip to: 546
10774
/* 476 */     MCD_OPC_Decode, 156, 4, 127, // Opcode: AESIMC
10775
/* 480 */     MCD_OPC_FilterValue, 10, 61, 0, 0, // Skip to: 546
10776
/* 485 */     MCD_OPC_CheckPredicate, 24, 56, 0, 0, // Skip to: 546
10777
/* 490 */     MCD_OPC_CheckField, 23, 9, 231, 3, 48, 0, 0, // Skip to: 546
10778
/* 498 */     MCD_OPC_CheckField, 4, 1, 0, 41, 0, 0, // Skip to: 546
10779
/* 505 */     MCD_OPC_Decode, 255, 5, 133, 1, // Opcode: SHA256SU0
10780
/* 510 */     MCD_OPC_FilterValue, 12, 31, 0, 0, // Skip to: 546
10781
/* 515 */     MCD_OPC_CheckPredicate, 24, 26, 0, 0, // Skip to: 546
10782
/* 520 */     MCD_OPC_CheckField, 23, 9, 228, 3, 18, 0, 0, // Skip to: 546
10783
/* 528 */     MCD_OPC_CheckField, 6, 1, 1, 11, 0, 0, // Skip to: 546
10784
/* 535 */     MCD_OPC_CheckField, 4, 1, 0, 4, 0, 0, // Skip to: 546
10785
/* 542 */     MCD_OPC_Decode, 251, 5, 106, // Opcode: SHA1SU0
10786
/* 546 */     MCD_OPC_Fail,
10787
  0
10788
};
10789
10790
static const uint8_t DecoderTablev8NEON32[] = {
10791
/* 0 */       MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
10792
/* 3 */       MCD_OPC_FilterValue, 0, 11, 1, 0, // Skip to: 275
10793
/* 8 */       MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10794
/* 11 */      MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 77
10795
/* 16 */      MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10796
/* 19 */      MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 48
10797
/* 24 */      MCD_OPC_CheckPredicate, 74, 110, 8, 0, // Skip to: 2187
10798
/* 29 */      MCD_OPC_CheckField, 23, 9, 231, 3, 102, 8, 0, // Skip to: 2187
10799
/* 37 */      MCD_OPC_CheckField, 4, 1, 0, 95, 8, 0, // Skip to: 2187
10800
/* 44 */      MCD_OPC_Decode, 154, 9, 126, // Opcode: VCVTANSDh
10801
/* 48 */      MCD_OPC_FilterValue, 59, 86, 8, 0, // Skip to: 2187
10802
/* 53 */      MCD_OPC_CheckPredicate, 75, 81, 8, 0, // Skip to: 2187
10803
/* 58 */      MCD_OPC_CheckField, 23, 9, 231, 3, 73, 8, 0, // Skip to: 2187
10804
/* 66 */      MCD_OPC_CheckField, 4, 1, 0, 66, 8, 0, // Skip to: 2187
10805
/* 73 */      MCD_OPC_Decode, 153, 9, 126, // Opcode: VCVTANSDf
10806
/* 77 */      MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 143
10807
/* 82 */      MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10808
/* 85 */      MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 114
10809
/* 90 */      MCD_OPC_CheckPredicate, 74, 44, 8, 0, // Skip to: 2187
10810
/* 95 */      MCD_OPC_CheckField, 23, 9, 231, 3, 36, 8, 0, // Skip to: 2187
10811
/* 103 */     MCD_OPC_CheckField, 4, 1, 0, 29, 8, 0, // Skip to: 2187
10812
/* 110 */     MCD_OPC_Decode, 156, 9, 127, // Opcode: VCVTANSQh
10813
/* 114 */     MCD_OPC_FilterValue, 59, 20, 8, 0, // Skip to: 2187
10814
/* 119 */     MCD_OPC_CheckPredicate, 75, 15, 8, 0, // Skip to: 2187
10815
/* 124 */     MCD_OPC_CheckField, 23, 9, 231, 3, 7, 8, 0, // Skip to: 2187
10816
/* 132 */     MCD_OPC_CheckField, 4, 1, 0, 0, 8, 0, // Skip to: 2187
10817
/* 139 */     MCD_OPC_Decode, 155, 9, 127, // Opcode: VCVTANSQf
10818
/* 143 */     MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 209
10819
/* 148 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10820
/* 151 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 180
10821
/* 156 */     MCD_OPC_CheckPredicate, 74, 234, 7, 0, // Skip to: 2187
10822
/* 161 */     MCD_OPC_CheckField, 23, 9, 231, 3, 226, 7, 0, // Skip to: 2187
10823
/* 169 */     MCD_OPC_CheckField, 4, 1, 0, 219, 7, 0, // Skip to: 2187
10824
/* 176 */     MCD_OPC_Decode, 158, 9, 126, // Opcode: VCVTANUDh
10825
/* 180 */     MCD_OPC_FilterValue, 59, 210, 7, 0, // Skip to: 2187
10826
/* 185 */     MCD_OPC_CheckPredicate, 75, 205, 7, 0, // Skip to: 2187
10827
/* 190 */     MCD_OPC_CheckField, 23, 9, 231, 3, 197, 7, 0, // Skip to: 2187
10828
/* 198 */     MCD_OPC_CheckField, 4, 1, 0, 190, 7, 0, // Skip to: 2187
10829
/* 205 */     MCD_OPC_Decode, 157, 9, 126, // Opcode: VCVTANUDf
10830
/* 209 */     MCD_OPC_FilterValue, 3, 181, 7, 0, // Skip to: 2187
10831
/* 214 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10832
/* 217 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 246
10833
/* 222 */     MCD_OPC_CheckPredicate, 74, 168, 7, 0, // Skip to: 2187
10834
/* 227 */     MCD_OPC_CheckField, 23, 9, 231, 3, 160, 7, 0, // Skip to: 2187
10835
/* 235 */     MCD_OPC_CheckField, 4, 1, 0, 153, 7, 0, // Skip to: 2187
10836
/* 242 */     MCD_OPC_Decode, 160, 9, 127, // Opcode: VCVTANUQh
10837
/* 246 */     MCD_OPC_FilterValue, 59, 144, 7, 0, // Skip to: 2187
10838
/* 251 */     MCD_OPC_CheckPredicate, 75, 139, 7, 0, // Skip to: 2187
10839
/* 256 */     MCD_OPC_CheckField, 23, 9, 231, 3, 131, 7, 0, // Skip to: 2187
10840
/* 264 */     MCD_OPC_CheckField, 4, 1, 0, 124, 7, 0, // Skip to: 2187
10841
/* 271 */     MCD_OPC_Decode, 159, 9, 127, // Opcode: VCVTANUQf
10842
/* 275 */     MCD_OPC_FilterValue, 1, 11, 1, 0, // Skip to: 547
10843
/* 280 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10844
/* 283 */     MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 349
10845
/* 288 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10846
/* 291 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 320
10847
/* 296 */     MCD_OPC_CheckPredicate, 74, 94, 7, 0, // Skip to: 2187
10848
/* 301 */     MCD_OPC_CheckField, 23, 9, 231, 3, 86, 7, 0, // Skip to: 2187
10849
/* 309 */     MCD_OPC_CheckField, 4, 1, 0, 79, 7, 0, // Skip to: 2187
10850
/* 316 */     MCD_OPC_Decode, 187, 9, 126, // Opcode: VCVTNNSDh
10851
/* 320 */     MCD_OPC_FilterValue, 59, 70, 7, 0, // Skip to: 2187
10852
/* 325 */     MCD_OPC_CheckPredicate, 75, 65, 7, 0, // Skip to: 2187
10853
/* 330 */     MCD_OPC_CheckField, 23, 9, 231, 3, 57, 7, 0, // Skip to: 2187
10854
/* 338 */     MCD_OPC_CheckField, 4, 1, 0, 50, 7, 0, // Skip to: 2187
10855
/* 345 */     MCD_OPC_Decode, 186, 9, 126, // Opcode: VCVTNNSDf
10856
/* 349 */     MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 415
10857
/* 354 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10858
/* 357 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 386
10859
/* 362 */     MCD_OPC_CheckPredicate, 74, 28, 7, 0, // Skip to: 2187
10860
/* 367 */     MCD_OPC_CheckField, 23, 9, 231, 3, 20, 7, 0, // Skip to: 2187
10861
/* 375 */     MCD_OPC_CheckField, 4, 1, 0, 13, 7, 0, // Skip to: 2187
10862
/* 382 */     MCD_OPC_Decode, 189, 9, 127, // Opcode: VCVTNNSQh
10863
/* 386 */     MCD_OPC_FilterValue, 59, 4, 7, 0, // Skip to: 2187
10864
/* 391 */     MCD_OPC_CheckPredicate, 75, 255, 6, 0, // Skip to: 2187
10865
/* 396 */     MCD_OPC_CheckField, 23, 9, 231, 3, 247, 6, 0, // Skip to: 2187
10866
/* 404 */     MCD_OPC_CheckField, 4, 1, 0, 240, 6, 0, // Skip to: 2187
10867
/* 411 */     MCD_OPC_Decode, 188, 9, 127, // Opcode: VCVTNNSQf
10868
/* 415 */     MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 481
10869
/* 420 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10870
/* 423 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 452
10871
/* 428 */     MCD_OPC_CheckPredicate, 74, 218, 6, 0, // Skip to: 2187
10872
/* 433 */     MCD_OPC_CheckField, 23, 9, 231, 3, 210, 6, 0, // Skip to: 2187
10873
/* 441 */     MCD_OPC_CheckField, 4, 1, 0, 203, 6, 0, // Skip to: 2187
10874
/* 448 */     MCD_OPC_Decode, 191, 9, 126, // Opcode: VCVTNNUDh
10875
/* 452 */     MCD_OPC_FilterValue, 59, 194, 6, 0, // Skip to: 2187
10876
/* 457 */     MCD_OPC_CheckPredicate, 75, 189, 6, 0, // Skip to: 2187
10877
/* 462 */     MCD_OPC_CheckField, 23, 9, 231, 3, 181, 6, 0, // Skip to: 2187
10878
/* 470 */     MCD_OPC_CheckField, 4, 1, 0, 174, 6, 0, // Skip to: 2187
10879
/* 477 */     MCD_OPC_Decode, 190, 9, 126, // Opcode: VCVTNNUDf
10880
/* 481 */     MCD_OPC_FilterValue, 3, 165, 6, 0, // Skip to: 2187
10881
/* 486 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10882
/* 489 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 518
10883
/* 494 */     MCD_OPC_CheckPredicate, 74, 152, 6, 0, // Skip to: 2187
10884
/* 499 */     MCD_OPC_CheckField, 23, 9, 231, 3, 144, 6, 0, // Skip to: 2187
10885
/* 507 */     MCD_OPC_CheckField, 4, 1, 0, 137, 6, 0, // Skip to: 2187
10886
/* 514 */     MCD_OPC_Decode, 193, 9, 127, // Opcode: VCVTNNUQh
10887
/* 518 */     MCD_OPC_FilterValue, 59, 128, 6, 0, // Skip to: 2187
10888
/* 523 */     MCD_OPC_CheckPredicate, 75, 123, 6, 0, // Skip to: 2187
10889
/* 528 */     MCD_OPC_CheckField, 23, 9, 231, 3, 115, 6, 0, // Skip to: 2187
10890
/* 536 */     MCD_OPC_CheckField, 4, 1, 0, 108, 6, 0, // Skip to: 2187
10891
/* 543 */     MCD_OPC_Decode, 192, 9, 127, // Opcode: VCVTNNUQf
10892
/* 547 */     MCD_OPC_FilterValue, 2, 11, 1, 0, // Skip to: 819
10893
/* 552 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10894
/* 555 */     MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 621
10895
/* 560 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10896
/* 563 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 592
10897
/* 568 */     MCD_OPC_CheckPredicate, 74, 78, 6, 0, // Skip to: 2187
10898
/* 573 */     MCD_OPC_CheckField, 23, 9, 231, 3, 70, 6, 0, // Skip to: 2187
10899
/* 581 */     MCD_OPC_CheckField, 4, 1, 0, 63, 6, 0, // Skip to: 2187
10900
/* 588 */     MCD_OPC_Decode, 201, 9, 126, // Opcode: VCVTPNSDh
10901
/* 592 */     MCD_OPC_FilterValue, 59, 54, 6, 0, // Skip to: 2187
10902
/* 597 */     MCD_OPC_CheckPredicate, 75, 49, 6, 0, // Skip to: 2187
10903
/* 602 */     MCD_OPC_CheckField, 23, 9, 231, 3, 41, 6, 0, // Skip to: 2187
10904
/* 610 */     MCD_OPC_CheckField, 4, 1, 0, 34, 6, 0, // Skip to: 2187
10905
/* 617 */     MCD_OPC_Decode, 200, 9, 126, // Opcode: VCVTPNSDf
10906
/* 621 */     MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 687
10907
/* 626 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10908
/* 629 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 658
10909
/* 634 */     MCD_OPC_CheckPredicate, 74, 12, 6, 0, // Skip to: 2187
10910
/* 639 */     MCD_OPC_CheckField, 23, 9, 231, 3, 4, 6, 0, // Skip to: 2187
10911
/* 647 */     MCD_OPC_CheckField, 4, 1, 0, 253, 5, 0, // Skip to: 2187
10912
/* 654 */     MCD_OPC_Decode, 203, 9, 127, // Opcode: VCVTPNSQh
10913
/* 658 */     MCD_OPC_FilterValue, 59, 244, 5, 0, // Skip to: 2187
10914
/* 663 */     MCD_OPC_CheckPredicate, 75, 239, 5, 0, // Skip to: 2187
10915
/* 668 */     MCD_OPC_CheckField, 23, 9, 231, 3, 231, 5, 0, // Skip to: 2187
10916
/* 676 */     MCD_OPC_CheckField, 4, 1, 0, 224, 5, 0, // Skip to: 2187
10917
/* 683 */     MCD_OPC_Decode, 202, 9, 127, // Opcode: VCVTPNSQf
10918
/* 687 */     MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 753
10919
/* 692 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10920
/* 695 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 724
10921
/* 700 */     MCD_OPC_CheckPredicate, 74, 202, 5, 0, // Skip to: 2187
10922
/* 705 */     MCD_OPC_CheckField, 23, 9, 231, 3, 194, 5, 0, // Skip to: 2187
10923
/* 713 */     MCD_OPC_CheckField, 4, 1, 0, 187, 5, 0, // Skip to: 2187
10924
/* 720 */     MCD_OPC_Decode, 205, 9, 126, // Opcode: VCVTPNUDh
10925
/* 724 */     MCD_OPC_FilterValue, 59, 178, 5, 0, // Skip to: 2187
10926
/* 729 */     MCD_OPC_CheckPredicate, 75, 173, 5, 0, // Skip to: 2187
10927
/* 734 */     MCD_OPC_CheckField, 23, 9, 231, 3, 165, 5, 0, // Skip to: 2187
10928
/* 742 */     MCD_OPC_CheckField, 4, 1, 0, 158, 5, 0, // Skip to: 2187
10929
/* 749 */     MCD_OPC_Decode, 204, 9, 126, // Opcode: VCVTPNUDf
10930
/* 753 */     MCD_OPC_FilterValue, 3, 149, 5, 0, // Skip to: 2187
10931
/* 758 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10932
/* 761 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 790
10933
/* 766 */     MCD_OPC_CheckPredicate, 74, 136, 5, 0, // Skip to: 2187
10934
/* 771 */     MCD_OPC_CheckField, 23, 9, 231, 3, 128, 5, 0, // Skip to: 2187
10935
/* 779 */     MCD_OPC_CheckField, 4, 1, 0, 121, 5, 0, // Skip to: 2187
10936
/* 786 */     MCD_OPC_Decode, 207, 9, 127, // Opcode: VCVTPNUQh
10937
/* 790 */     MCD_OPC_FilterValue, 59, 112, 5, 0, // Skip to: 2187
10938
/* 795 */     MCD_OPC_CheckPredicate, 75, 107, 5, 0, // Skip to: 2187
10939
/* 800 */     MCD_OPC_CheckField, 23, 9, 231, 3, 99, 5, 0, // Skip to: 2187
10940
/* 808 */     MCD_OPC_CheckField, 4, 1, 0, 92, 5, 0, // Skip to: 2187
10941
/* 815 */     MCD_OPC_Decode, 206, 9, 127, // Opcode: VCVTPNUQf
10942
/* 819 */     MCD_OPC_FilterValue, 3, 11, 1, 0, // Skip to: 1091
10943
/* 824 */     MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10944
/* 827 */     MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 893
10945
/* 832 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10946
/* 835 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 864
10947
/* 840 */     MCD_OPC_CheckPredicate, 74, 62, 5, 0, // Skip to: 2187
10948
/* 845 */     MCD_OPC_CheckField, 23, 9, 231, 3, 54, 5, 0, // Skip to: 2187
10949
/* 853 */     MCD_OPC_CheckField, 4, 1, 0, 47, 5, 0, // Skip to: 2187
10950
/* 860 */     MCD_OPC_Decode, 173, 9, 126, // Opcode: VCVTMNSDh
10951
/* 864 */     MCD_OPC_FilterValue, 59, 38, 5, 0, // Skip to: 2187
10952
/* 869 */     MCD_OPC_CheckPredicate, 75, 33, 5, 0, // Skip to: 2187
10953
/* 874 */     MCD_OPC_CheckField, 23, 9, 231, 3, 25, 5, 0, // Skip to: 2187
10954
/* 882 */     MCD_OPC_CheckField, 4, 1, 0, 18, 5, 0, // Skip to: 2187
10955
/* 889 */     MCD_OPC_Decode, 172, 9, 126, // Opcode: VCVTMNSDf
10956
/* 893 */     MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 959
10957
/* 898 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10958
/* 901 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 930
10959
/* 906 */     MCD_OPC_CheckPredicate, 74, 252, 4, 0, // Skip to: 2187
10960
/* 911 */     MCD_OPC_CheckField, 23, 9, 231, 3, 244, 4, 0, // Skip to: 2187
10961
/* 919 */     MCD_OPC_CheckField, 4, 1, 0, 237, 4, 0, // Skip to: 2187
10962
/* 926 */     MCD_OPC_Decode, 175, 9, 127, // Opcode: VCVTMNSQh
10963
/* 930 */     MCD_OPC_FilterValue, 59, 228, 4, 0, // Skip to: 2187
10964
/* 935 */     MCD_OPC_CheckPredicate, 75, 223, 4, 0, // Skip to: 2187
10965
/* 940 */     MCD_OPC_CheckField, 23, 9, 231, 3, 215, 4, 0, // Skip to: 2187
10966
/* 948 */     MCD_OPC_CheckField, 4, 1, 0, 208, 4, 0, // Skip to: 2187
10967
/* 955 */     MCD_OPC_Decode, 174, 9, 127, // Opcode: VCVTMNSQf
10968
/* 959 */     MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 1025
10969
/* 964 */     MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10970
/* 967 */     MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 996
10971
/* 972 */     MCD_OPC_CheckPredicate, 74, 186, 4, 0, // Skip to: 2187
10972
/* 977 */     MCD_OPC_CheckField, 23, 9, 231, 3, 178, 4, 0, // Skip to: 2187
10973
/* 985 */     MCD_OPC_CheckField, 4, 1, 0, 171, 4, 0, // Skip to: 2187
10974
/* 992 */     MCD_OPC_Decode, 177, 9, 126, // Opcode: VCVTMNUDh
10975
/* 996 */     MCD_OPC_FilterValue, 59, 162, 4, 0, // Skip to: 2187
10976
/* 1001 */    MCD_OPC_CheckPredicate, 75, 157, 4, 0, // Skip to: 2187
10977
/* 1006 */    MCD_OPC_CheckField, 23, 9, 231, 3, 149, 4, 0, // Skip to: 2187
10978
/* 1014 */    MCD_OPC_CheckField, 4, 1, 0, 142, 4, 0, // Skip to: 2187
10979
/* 1021 */    MCD_OPC_Decode, 176, 9, 126, // Opcode: VCVTMNUDf
10980
/* 1025 */    MCD_OPC_FilterValue, 3, 133, 4, 0, // Skip to: 2187
10981
/* 1030 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10982
/* 1033 */    MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 1062
10983
/* 1038 */    MCD_OPC_CheckPredicate, 74, 120, 4, 0, // Skip to: 2187
10984
/* 1043 */    MCD_OPC_CheckField, 23, 9, 231, 3, 112, 4, 0, // Skip to: 2187
10985
/* 1051 */    MCD_OPC_CheckField, 4, 1, 0, 105, 4, 0, // Skip to: 2187
10986
/* 1058 */    MCD_OPC_Decode, 179, 9, 127, // Opcode: VCVTMNUQh
10987
/* 1062 */    MCD_OPC_FilterValue, 59, 96, 4, 0, // Skip to: 2187
10988
/* 1067 */    MCD_OPC_CheckPredicate, 75, 91, 4, 0, // Skip to: 2187
10989
/* 1072 */    MCD_OPC_CheckField, 23, 9, 231, 3, 83, 4, 0, // Skip to: 2187
10990
/* 1080 */    MCD_OPC_CheckField, 4, 1, 0, 76, 4, 0, // Skip to: 2187
10991
/* 1087 */    MCD_OPC_Decode, 178, 9, 127, // Opcode: VCVTMNUQf
10992
/* 1091 */    MCD_OPC_FilterValue, 4, 11, 1, 0, // Skip to: 1363
10993
/* 1096 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
10994
/* 1099 */    MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 1165
10995
/* 1104 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
10996
/* 1107 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1136
10997
/* 1112 */    MCD_OPC_CheckPredicate, 74, 46, 4, 0, // Skip to: 2187
10998
/* 1117 */    MCD_OPC_CheckField, 23, 9, 231, 3, 38, 4, 0, // Skip to: 2187
10999
/* 1125 */    MCD_OPC_CheckField, 4, 1, 0, 31, 4, 0, // Skip to: 2187
11000
/* 1132 */    MCD_OPC_Decode, 136, 17, 126, // Opcode: VRINTNNDh
11001
/* 1136 */    MCD_OPC_FilterValue, 58, 22, 4, 0, // Skip to: 2187
11002
/* 1141 */    MCD_OPC_CheckPredicate, 75, 17, 4, 0, // Skip to: 2187
11003
/* 1146 */    MCD_OPC_CheckField, 23, 9, 231, 3, 9, 4, 0, // Skip to: 2187
11004
/* 1154 */    MCD_OPC_CheckField, 4, 1, 0, 2, 4, 0, // Skip to: 2187
11005
/* 1161 */    MCD_OPC_Decode, 135, 17, 126, // Opcode: VRINTNNDf
11006
/* 1165 */    MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 1231
11007
/* 1170 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11008
/* 1173 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1202
11009
/* 1178 */    MCD_OPC_CheckPredicate, 74, 236, 3, 0, // Skip to: 2187
11010
/* 1183 */    MCD_OPC_CheckField, 23, 9, 231, 3, 228, 3, 0, // Skip to: 2187
11011
/* 1191 */    MCD_OPC_CheckField, 4, 1, 0, 221, 3, 0, // Skip to: 2187
11012
/* 1198 */    MCD_OPC_Decode, 138, 17, 127, // Opcode: VRINTNNQh
11013
/* 1202 */    MCD_OPC_FilterValue, 58, 212, 3, 0, // Skip to: 2187
11014
/* 1207 */    MCD_OPC_CheckPredicate, 75, 207, 3, 0, // Skip to: 2187
11015
/* 1212 */    MCD_OPC_CheckField, 23, 9, 231, 3, 199, 3, 0, // Skip to: 2187
11016
/* 1220 */    MCD_OPC_CheckField, 4, 1, 0, 192, 3, 0, // Skip to: 2187
11017
/* 1227 */    MCD_OPC_Decode, 137, 17, 127, // Opcode: VRINTNNQf
11018
/* 1231 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 1297
11019
/* 1236 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11020
/* 1239 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1268
11021
/* 1244 */    MCD_OPC_CheckPredicate, 74, 170, 3, 0, // Skip to: 2187
11022
/* 1249 */    MCD_OPC_CheckField, 23, 9, 231, 3, 162, 3, 0, // Skip to: 2187
11023
/* 1257 */    MCD_OPC_CheckField, 4, 1, 0, 155, 3, 0, // Skip to: 2187
11024
/* 1264 */    MCD_OPC_Decode, 153, 17, 126, // Opcode: VRINTXNDh
11025
/* 1268 */    MCD_OPC_FilterValue, 58, 146, 3, 0, // Skip to: 2187
11026
/* 1273 */    MCD_OPC_CheckPredicate, 75, 141, 3, 0, // Skip to: 2187
11027
/* 1278 */    MCD_OPC_CheckField, 23, 9, 231, 3, 133, 3, 0, // Skip to: 2187
11028
/* 1286 */    MCD_OPC_CheckField, 4, 1, 0, 126, 3, 0, // Skip to: 2187
11029
/* 1293 */    MCD_OPC_Decode, 152, 17, 126, // Opcode: VRINTXNDf
11030
/* 1297 */    MCD_OPC_FilterValue, 3, 117, 3, 0, // Skip to: 2187
11031
/* 1302 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11032
/* 1305 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1334
11033
/* 1310 */    MCD_OPC_CheckPredicate, 74, 104, 3, 0, // Skip to: 2187
11034
/* 1315 */    MCD_OPC_CheckField, 23, 9, 231, 3, 96, 3, 0, // Skip to: 2187
11035
/* 1323 */    MCD_OPC_CheckField, 4, 1, 0, 89, 3, 0, // Skip to: 2187
11036
/* 1330 */    MCD_OPC_Decode, 155, 17, 127, // Opcode: VRINTXNQh
11037
/* 1334 */    MCD_OPC_FilterValue, 58, 80, 3, 0, // Skip to: 2187
11038
/* 1339 */    MCD_OPC_CheckPredicate, 75, 75, 3, 0, // Skip to: 2187
11039
/* 1344 */    MCD_OPC_CheckField, 23, 9, 231, 3, 67, 3, 0, // Skip to: 2187
11040
/* 1352 */    MCD_OPC_CheckField, 4, 1, 0, 60, 3, 0, // Skip to: 2187
11041
/* 1359 */    MCD_OPC_Decode, 154, 17, 127, // Opcode: VRINTXNQf
11042
/* 1363 */    MCD_OPC_FilterValue, 5, 11, 1, 0, // Skip to: 1635
11043
/* 1368 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
11044
/* 1371 */    MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 1437
11045
/* 1376 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11046
/* 1379 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1408
11047
/* 1384 */    MCD_OPC_CheckPredicate, 74, 30, 3, 0, // Skip to: 2187
11048
/* 1389 */    MCD_OPC_CheckField, 23, 9, 231, 3, 22, 3, 0, // Skip to: 2187
11049
/* 1397 */    MCD_OPC_CheckField, 4, 1, 0, 15, 3, 0, // Skip to: 2187
11050
/* 1404 */    MCD_OPC_Decode, 250, 16, 126, // Opcode: VRINTANDh
11051
/* 1408 */    MCD_OPC_FilterValue, 58, 6, 3, 0, // Skip to: 2187
11052
/* 1413 */    MCD_OPC_CheckPredicate, 75, 1, 3, 0, // Skip to: 2187
11053
/* 1418 */    MCD_OPC_CheckField, 23, 9, 231, 3, 249, 2, 0, // Skip to: 2187
11054
/* 1426 */    MCD_OPC_CheckField, 4, 1, 0, 242, 2, 0, // Skip to: 2187
11055
/* 1433 */    MCD_OPC_Decode, 249, 16, 126, // Opcode: VRINTANDf
11056
/* 1437 */    MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 1503
11057
/* 1442 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11058
/* 1445 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1474
11059
/* 1450 */    MCD_OPC_CheckPredicate, 74, 220, 2, 0, // Skip to: 2187
11060
/* 1455 */    MCD_OPC_CheckField, 23, 9, 231, 3, 212, 2, 0, // Skip to: 2187
11061
/* 1463 */    MCD_OPC_CheckField, 4, 1, 0, 205, 2, 0, // Skip to: 2187
11062
/* 1470 */    MCD_OPC_Decode, 252, 16, 127, // Opcode: VRINTANQh
11063
/* 1474 */    MCD_OPC_FilterValue, 58, 196, 2, 0, // Skip to: 2187
11064
/* 1479 */    MCD_OPC_CheckPredicate, 75, 191, 2, 0, // Skip to: 2187
11065
/* 1484 */    MCD_OPC_CheckField, 23, 9, 231, 3, 183, 2, 0, // Skip to: 2187
11066
/* 1492 */    MCD_OPC_CheckField, 4, 1, 0, 176, 2, 0, // Skip to: 2187
11067
/* 1499 */    MCD_OPC_Decode, 251, 16, 127, // Opcode: VRINTANQf
11068
/* 1503 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 1569
11069
/* 1508 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11070
/* 1511 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1540
11071
/* 1516 */    MCD_OPC_CheckPredicate, 74, 154, 2, 0, // Skip to: 2187
11072
/* 1521 */    MCD_OPC_CheckField, 23, 9, 231, 3, 146, 2, 0, // Skip to: 2187
11073
/* 1529 */    MCD_OPC_CheckField, 4, 1, 0, 139, 2, 0, // Skip to: 2187
11074
/* 1536 */    MCD_OPC_Decode, 160, 17, 126, // Opcode: VRINTZNDh
11075
/* 1540 */    MCD_OPC_FilterValue, 58, 130, 2, 0, // Skip to: 2187
11076
/* 1545 */    MCD_OPC_CheckPredicate, 75, 125, 2, 0, // Skip to: 2187
11077
/* 1550 */    MCD_OPC_CheckField, 23, 9, 231, 3, 117, 2, 0, // Skip to: 2187
11078
/* 1558 */    MCD_OPC_CheckField, 4, 1, 0, 110, 2, 0, // Skip to: 2187
11079
/* 1565 */    MCD_OPC_Decode, 159, 17, 126, // Opcode: VRINTZNDf
11080
/* 1569 */    MCD_OPC_FilterValue, 3, 101, 2, 0, // Skip to: 2187
11081
/* 1574 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11082
/* 1577 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1606
11083
/* 1582 */    MCD_OPC_CheckPredicate, 74, 88, 2, 0, // Skip to: 2187
11084
/* 1587 */    MCD_OPC_CheckField, 23, 9, 231, 3, 80, 2, 0, // Skip to: 2187
11085
/* 1595 */    MCD_OPC_CheckField, 4, 1, 0, 73, 2, 0, // Skip to: 2187
11086
/* 1602 */    MCD_OPC_Decode, 162, 17, 127, // Opcode: VRINTZNQh
11087
/* 1606 */    MCD_OPC_FilterValue, 58, 64, 2, 0, // Skip to: 2187
11088
/* 1611 */    MCD_OPC_CheckPredicate, 75, 59, 2, 0, // Skip to: 2187
11089
/* 1616 */    MCD_OPC_CheckField, 23, 9, 231, 3, 51, 2, 0, // Skip to: 2187
11090
/* 1624 */    MCD_OPC_CheckField, 4, 1, 0, 44, 2, 0, // Skip to: 2187
11091
/* 1631 */    MCD_OPC_Decode, 161, 17, 127, // Opcode: VRINTZNQf
11092
/* 1635 */    MCD_OPC_FilterValue, 6, 135, 0, 0, // Skip to: 1775
11093
/* 1640 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
11094
/* 1643 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 1709
11095
/* 1648 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11096
/* 1651 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1680
11097
/* 1656 */    MCD_OPC_CheckPredicate, 74, 14, 2, 0, // Skip to: 2187
11098
/* 1661 */    MCD_OPC_CheckField, 23, 9, 231, 3, 6, 2, 0, // Skip to: 2187
11099
/* 1669 */    MCD_OPC_CheckField, 4, 1, 0, 255, 1, 0, // Skip to: 2187
11100
/* 1676 */    MCD_OPC_Decode, 129, 17, 126, // Opcode: VRINTMNDh
11101
/* 1680 */    MCD_OPC_FilterValue, 58, 246, 1, 0, // Skip to: 2187
11102
/* 1685 */    MCD_OPC_CheckPredicate, 75, 241, 1, 0, // Skip to: 2187
11103
/* 1690 */    MCD_OPC_CheckField, 23, 9, 231, 3, 233, 1, 0, // Skip to: 2187
11104
/* 1698 */    MCD_OPC_CheckField, 4, 1, 0, 226, 1, 0, // Skip to: 2187
11105
/* 1705 */    MCD_OPC_Decode, 128, 17, 126, // Opcode: VRINTMNDf
11106
/* 1709 */    MCD_OPC_FilterValue, 3, 217, 1, 0, // Skip to: 2187
11107
/* 1714 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11108
/* 1717 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1746
11109
/* 1722 */    MCD_OPC_CheckPredicate, 74, 204, 1, 0, // Skip to: 2187
11110
/* 1727 */    MCD_OPC_CheckField, 23, 9, 231, 3, 196, 1, 0, // Skip to: 2187
11111
/* 1735 */    MCD_OPC_CheckField, 4, 1, 0, 189, 1, 0, // Skip to: 2187
11112
/* 1742 */    MCD_OPC_Decode, 131, 17, 127, // Opcode: VRINTMNQh
11113
/* 1746 */    MCD_OPC_FilterValue, 58, 180, 1, 0, // Skip to: 2187
11114
/* 1751 */    MCD_OPC_CheckPredicate, 75, 175, 1, 0, // Skip to: 2187
11115
/* 1756 */    MCD_OPC_CheckField, 23, 9, 231, 3, 167, 1, 0, // Skip to: 2187
11116
/* 1764 */    MCD_OPC_CheckField, 4, 1, 0, 160, 1, 0, // Skip to: 2187
11117
/* 1771 */    MCD_OPC_Decode, 130, 17, 127, // Opcode: VRINTMNQf
11118
/* 1775 */    MCD_OPC_FilterValue, 7, 135, 0, 0, // Skip to: 1915
11119
/* 1780 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
11120
/* 1783 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 1849
11121
/* 1788 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11122
/* 1791 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1820
11123
/* 1796 */    MCD_OPC_CheckPredicate, 74, 130, 1, 0, // Skip to: 2187
11124
/* 1801 */    MCD_OPC_CheckField, 23, 9, 231, 3, 122, 1, 0, // Skip to: 2187
11125
/* 1809 */    MCD_OPC_CheckField, 4, 1, 0, 115, 1, 0, // Skip to: 2187
11126
/* 1816 */    MCD_OPC_Decode, 143, 17, 126, // Opcode: VRINTPNDh
11127
/* 1820 */    MCD_OPC_FilterValue, 58, 106, 1, 0, // Skip to: 2187
11128
/* 1825 */    MCD_OPC_CheckPredicate, 75, 101, 1, 0, // Skip to: 2187
11129
/* 1830 */    MCD_OPC_CheckField, 23, 9, 231, 3, 93, 1, 0, // Skip to: 2187
11130
/* 1838 */    MCD_OPC_CheckField, 4, 1, 0, 86, 1, 0, // Skip to: 2187
11131
/* 1845 */    MCD_OPC_Decode, 142, 17, 126, // Opcode: VRINTPNDf
11132
/* 1849 */    MCD_OPC_FilterValue, 3, 77, 1, 0, // Skip to: 2187
11133
/* 1854 */    MCD_OPC_ExtractField, 16, 6,  // Inst{21-16} ...
11134
/* 1857 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1886
11135
/* 1862 */    MCD_OPC_CheckPredicate, 74, 64, 1, 0, // Skip to: 2187
11136
/* 1867 */    MCD_OPC_CheckField, 23, 9, 231, 3, 56, 1, 0, // Skip to: 2187
11137
/* 1875 */    MCD_OPC_CheckField, 4, 1, 0, 49, 1, 0, // Skip to: 2187
11138
/* 1882 */    MCD_OPC_Decode, 145, 17, 127, // Opcode: VRINTPNQh
11139
/* 1886 */    MCD_OPC_FilterValue, 58, 40, 1, 0, // Skip to: 2187
11140
/* 1891 */    MCD_OPC_CheckPredicate, 75, 35, 1, 0, // Skip to: 2187
11141
/* 1896 */    MCD_OPC_CheckField, 23, 9, 231, 3, 27, 1, 0, // Skip to: 2187
11142
/* 1904 */    MCD_OPC_CheckField, 4, 1, 0, 20, 1, 0, // Skip to: 2187
11143
/* 1911 */    MCD_OPC_Decode, 144, 17, 127, // Opcode: VRINTPNQf
11144
/* 1915 */    MCD_OPC_FilterValue, 15, 11, 1, 0, // Skip to: 2187
11145
/* 1920 */    MCD_OPC_ExtractField, 20, 2,  // Inst{21-20} ...
11146
/* 1923 */    MCD_OPC_FilterValue, 0, 61, 0, 0, // Skip to: 1989
11147
/* 1928 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
11148
/* 1931 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 1960
11149
/* 1936 */    MCD_OPC_CheckPredicate, 75, 246, 0, 0, // Skip to: 2187
11150
/* 1941 */    MCD_OPC_CheckField, 23, 9, 230, 3, 238, 0, 0, // Skip to: 2187
11151
/* 1949 */    MCD_OPC_CheckField, 4, 1, 1, 231, 0, 0, // Skip to: 2187
11152
/* 1956 */    MCD_OPC_Decode, 158, 13, 97, // Opcode: VMAXNMNDf
11153
/* 1960 */    MCD_OPC_FilterValue, 1, 222, 0, 0, // Skip to: 2187
11154
/* 1965 */    MCD_OPC_CheckPredicate, 75, 217, 0, 0, // Skip to: 2187
11155
/* 1970 */    MCD_OPC_CheckField, 23, 9, 230, 3, 209, 0, 0, // Skip to: 2187
11156
/* 1978 */    MCD_OPC_CheckField, 4, 1, 1, 202, 0, 0, // Skip to: 2187
11157
/* 1985 */    MCD_OPC_Decode, 160, 13, 98, // Opcode: VMAXNMNQf
11158
/* 1989 */    MCD_OPC_FilterValue, 1, 61, 0, 0, // Skip to: 2055
11159
/* 1994 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
11160
/* 1997 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 2026
11161
/* 2002 */    MCD_OPC_CheckPredicate, 74, 180, 0, 0, // Skip to: 2187
11162
/* 2007 */    MCD_OPC_CheckField, 23, 9, 230, 3, 172, 0, 0, // Skip to: 2187
11163
/* 2015 */    MCD_OPC_CheckField, 4, 1, 1, 165, 0, 0, // Skip to: 2187
11164
/* 2022 */    MCD_OPC_Decode, 159, 13, 97, // Opcode: VMAXNMNDh
11165
/* 2026 */    MCD_OPC_FilterValue, 1, 156, 0, 0, // Skip to: 2187
11166
/* 2031 */    MCD_OPC_CheckPredicate, 74, 151, 0, 0, // Skip to: 2187
11167
/* 2036 */    MCD_OPC_CheckField, 23, 9, 230, 3, 143, 0, 0, // Skip to: 2187
11168
/* 2044 */    MCD_OPC_CheckField, 4, 1, 1, 136, 0, 0, // Skip to: 2187
11169
/* 2051 */    MCD_OPC_Decode, 161, 13, 98, // Opcode: VMAXNMNQh
11170
/* 2055 */    MCD_OPC_FilterValue, 2, 61, 0, 0, // Skip to: 2121
11171
/* 2060 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
11172
/* 2063 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 2092
11173
/* 2068 */    MCD_OPC_CheckPredicate, 75, 114, 0, 0, // Skip to: 2187
11174
/* 2073 */    MCD_OPC_CheckField, 23, 9, 230, 3, 106, 0, 0, // Skip to: 2187
11175
/* 2081 */    MCD_OPC_CheckField, 4, 1, 1, 99, 0, 0, // Skip to: 2187
11176
/* 2088 */    MCD_OPC_Decode, 181, 13, 97, // Opcode: VMINNMNDf
11177
/* 2092 */    MCD_OPC_FilterValue, 1, 90, 0, 0, // Skip to: 2187
11178
/* 2097 */    MCD_OPC_CheckPredicate, 75, 85, 0, 0, // Skip to: 2187
11179
/* 2102 */    MCD_OPC_CheckField, 23, 9, 230, 3, 77, 0, 0, // Skip to: 2187
11180
/* 2110 */    MCD_OPC_CheckField, 4, 1, 1, 70, 0, 0, // Skip to: 2187
11181
/* 2117 */    MCD_OPC_Decode, 183, 13, 98, // Opcode: VMINNMNQf
11182
/* 2121 */    MCD_OPC_FilterValue, 3, 61, 0, 0, // Skip to: 2187
11183
/* 2126 */    MCD_OPC_ExtractField, 6, 1,  // Inst{6} ...
11184
/* 2129 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 2158
11185
/* 2134 */    MCD_OPC_CheckPredicate, 74, 48, 0, 0, // Skip to: 2187
11186
/* 2139 */    MCD_OPC_CheckField, 23, 9, 230, 3, 40, 0, 0, // Skip to: 2187
11187
/* 2147 */    MCD_OPC_CheckField, 4, 1, 1, 33, 0, 0, // Skip to: 2187
11188
/* 2154 */    MCD_OPC_Decode, 182, 13, 97, // Opcode: VMINNMNDh
11189
/* 2158 */    MCD_OPC_FilterValue, 1, 24, 0, 0, // Skip to: 2187
11190
/* 2163 */    MCD_OPC_CheckPredicate, 74, 19, 0, 0, // Skip to: 2187
11191
/* 2168 */    MCD_OPC_CheckField, 23, 9, 230, 3, 11, 0, 0, // Skip to: 2187
11192
/* 2176 */    MCD_OPC_CheckField, 4, 1, 1, 4, 0, 0, // Skip to: 2187
11193
/* 2183 */    MCD_OPC_Decode, 184, 13, 98, // Opcode: VMINNMNQh
11194
/* 2187 */    MCD_OPC_Fail,
11195
  0
11196
};
11197
11198
static bool checkDecoderPredicate(unsigned Idx, MCInst *MI)
11199
1.46M
{
11200
1.46M
  switch (Idx) {
11201
0
  default: /* llvm_unreachable("Invalid index!");*/ 
11202
149k
  case 0:
11203
149k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb));
11204
14.6k
  case 1:
11205
14.6k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV6Ops));
11206
1.81k
  case 2:
11207
1.81k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureCRC));
11208
4.78k
  case 3:
11209
4.78k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV5TEOps));
11210
27.1k
  case 4:
11211
27.1k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && !ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops));
11212
68
  case 5:
11213
68
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops));
11214
783
  case 6:
11215
783
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_1aOps));
11216
530
  case 7:
11217
530
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVirtualization));
11218
986
  case 8:
11219
986
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureAcquireRelease));
11220
753
  case 9:
11221
753
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureAcquireRelease) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureV7Clrex));
11222
973
  case 10:
11223
973
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV4TOps));
11224
234
  case 11:
11225
234
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV5TOps));
11226
195
  case 12:
11227
195
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureTrustZone));
11228
4.43k
  case 13:
11229
4.43k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV6T2Ops));
11230
2.72k
  case 14:
11231
2.72k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_4aOps));
11232
3.64k
  case 15:
11233
3.64k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV7Ops));
11234
1.80k
  case 16:
11235
1.80k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV7Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMP));
11236
3.22k
  case 17:
11237
3.22k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV6KOps));
11238
2.19k
  case 18:
11239
2.19k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureDB));
11240
140
  case 19:
11241
140
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureHWDivARM));
11242
35
  case 20:
11243
35
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNaClTrap));
11244
108k
  case 21:
11245
108k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON));
11246
4.35k
  case 22:
11247
4.35k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFullFP16));
11248
900
  case 23:
11249
900
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_1aOps));
11250
9.24k
  case 24:
11251
9.24k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureCrypto));
11252
198
  case 25:
11253
198
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFP16));
11254
216
  case 26:
11255
216
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP4));
11256
17.0k
  case 27:
11257
17.0k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP2));
11258
546k
  case 28:
11259
546k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb));
11260
2.98k
  case 29:
11261
2.98k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_Feature8MSecExt));
11262
221
  case 30:
11263
221
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV5TOps));
11264
940
  case 31:
11265
940
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV6Ops));
11266
6.88k
  case 32:
11267
6.88k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8MBaselineOps));
11268
300
  case 33:
11269
300
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_1aOps));
11270
461
  case 34:
11271
461
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMClass));
11272
270
  case 35:
11273
270
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops));
11274
12.5k
  case 36:
11275
12.5k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV6MOps));
11276
125k
  case 37:
11277
125k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV5TOps) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMClass));
11278
304k
  case 38:
11279
304k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2));
11280
6.18k
  case 39:
11281
6.18k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMClass));
11282
333
  case 40:
11283
333
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureAcquireRelease));
11284
1.07k
  case 41:
11285
1.07k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureAcquireRelease) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureV7Clrex));
11286
2.94k
  case 42:
11287
2.94k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureAcquireRelease) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureV7Clrex) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMClass));
11288
3.83k
  case 43:
11289
3.83k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureDSP) && ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2));
11290
3.52k
  case 44:
11291
3.52k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_Feature8MSecExt));
11292
10.6k
  case 45:
11293
10.6k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureDSP));
11294
1.37k
  case 46:
11295
1.37k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops));
11296
829
  case 47:
11297
829
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_4aOps));
11298
66
  case 48:
11299
66
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureV7Clrex));
11300
2.74k
  case 49:
11301
2.74k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureDB));
11302
2.84k
  case 50:
11303
2.84k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVirtualization));
11304
68
  case 51:
11305
68
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVirtualization));
11306
70
  case 52:
11307
70
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureTrustZone));
11308
7.95k
  case 53:
11309
7.95k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMClass));
11310
1.75k
  case 54:
11311
1.75k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV7Ops));
11312
248
  case 55:
11313
248
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureHWDivThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8MBaselineOps));
11314
1.66k
  case 56:
11315
1.66k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV7Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureMP));
11316
208
  case 57:
11317
208
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureCRC));
11318
3.19k
  case 58:
11319
3.19k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2) && !ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops));
11320
4.96k
  case 59:
11321
4.96k
    return (!ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_ModeThumb) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureThumb2));
11322
13.2k
  case 60:
11323
13.2k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFullFP16));
11324
5.73k
  case 61:
11325
5.73k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP2) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFPOnlySP));
11326
271
  case 62:
11327
271
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP4));
11328
502
  case 63:
11329
502
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP4) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFPOnlySP));
11330
2.80k
  case 64:
11331
2.80k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_HasV8MMainlineOps) && ARM_getFeatureBits(MI->csh->mode, ARM_Feature8MSecExt));
11332
73
  case 65:
11333
73
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP3));
11334
7.34k
  case 66:
11335
7.34k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFPARMv8));
11336
82
  case 67:
11337
82
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFP16));
11338
232
  case 68:
11339
232
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFP3) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFPOnlySP));
11340
5.02k
  case 69:
11341
5.02k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFPARMv8) && !ARM_getFeatureBits(MI->csh->mode, ARM_FeatureVFPOnlySP));
11342
554
  case 70:
11343
554
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFPARMv8) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_3aOps));
11344
1.24k
  case 71:
11345
1.24k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_3aOps) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFullFP16));
11346
1.28k
  case 72:
11347
1.28k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_HasV8_3aOps));
11348
1.31k
  case 73:
11349
1.31k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureDotProd));
11350
1.58k
  case 74:
11351
1.58k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureFullFP16));
11352
1.92k
  case 75:
11353
1.92k
    return (ARM_getFeatureBits(MI->csh->mode, ARM_HasV8Ops) && ARM_getFeatureBits(MI->csh->mode, ARM_FeatureNEON));
11354
1.46M
  }
11355
1.46M
}
11356
11357
#define DecodeToMCInst(fname, fieldname, InsnType) \
11358
static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
11359
732k
    uint64_t Address, bool *Decoder) \
11360
732k
{ \
11361
732k
  InsnType tmp; \
11362
732k
  /* printf("Idx = %u\n", Idx); */\
11363
732k
  switch (Idx) { \
11364
0
  default: /* llvm_unreachable("Invalid index!");*/  \
11365
4.86k
  case 0: \
11366
4.86k
    tmp = fieldname(insn, 12, 4); \
11367
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
4.86k
    tmp = fieldname(insn, 16, 4); \
11369
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11370
4.86k
    tmp = fieldname(insn, 0, 4); \
11371
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
4.86k
    tmp = fieldname(insn, 28, 4); \
11373
4.86k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11374
4.86k
    tmp = fieldname(insn, 20, 1); \
11375
4.86k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
4.86k
    return S; \
11377
8.33k
  case 1: \
11378
8.33k
    tmp = fieldname(insn, 12, 4); \
11379
8.33k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11380
8.33k
    tmp = fieldname(insn, 16, 4); \
11381
8.33k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
8.33k
    tmp = 0; \
11383
8.33k
    tmp |= fieldname(insn, 0, 4) << 0; \
11384
8.33k
    tmp |= fieldname(insn, 5, 7) << 5; \
11385
8.33k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11386
8.33k
    tmp = fieldname(insn, 28, 4); \
11387
8.33k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
8.33k
    tmp = fieldname(insn, 20, 1); \
11389
8.33k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11390
8.33k
    return S; \
11391
8.33k
  case 2: \
11392
3.86k
    tmp = fieldname(insn, 12, 4); \
11393
3.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11394
3.86k
    tmp = fieldname(insn, 16, 4); \
11395
3.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
3.86k
    tmp = 0; \
11397
3.86k
    tmp |= fieldname(insn, 0, 4) << 0; \
11398
3.86k
    tmp |= fieldname(insn, 5, 2) << 5; \
11399
3.86k
    tmp |= fieldname(insn, 8, 4) << 8; \
11400
3.86k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11401
3.86k
    tmp = fieldname(insn, 28, 4); \
11402
3.86k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11403
3.86k
    tmp = fieldname(insn, 20, 1); \
11404
3.85k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11405
3.85k
    return S; \
11406
3.85k
  case 3: \
11407
1.10k
    tmp = fieldname(insn, 12, 4); \
11408
1.10k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11409
1.10k
    tmp = fieldname(insn, 16, 4); \
11410
1.10k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11411
1.10k
    tmp = 0; \
11412
1.10k
    tmp |= fieldname(insn, 0, 4) << 0; \
11413
1.10k
    tmp |= fieldname(insn, 5, 2) << 5; \
11414
1.10k
    tmp |= fieldname(insn, 8, 4) << 8; \
11415
1.10k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11416
1.10k
    tmp = fieldname(insn, 28, 4); \
11417
1.10k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
1.10k
    tmp = fieldname(insn, 20, 1); \
11419
1.10k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
1.10k
    return S; \
11421
1.59k
  case 4: \
11422
1.59k
    tmp = fieldname(insn, 16, 4); \
11423
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11424
1.59k
    tmp = fieldname(insn, 0, 4); \
11425
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
1.59k
    tmp = fieldname(insn, 8, 4); \
11427
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11428
1.59k
    tmp = fieldname(insn, 28, 4); \
11429
1.59k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11430
1.59k
    tmp = fieldname(insn, 20, 1); \
11431
1.59k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
1.59k
    return S; \
11433
1.59k
  case 5: \
11434
88
    tmp = fieldname(insn, 12, 4); \
11435
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
88
    tmp = fieldname(insn, 16, 4); \
11437
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11438
88
    tmp = fieldname(insn, 0, 4); \
11439
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
88
    tmp = fieldname(insn, 8, 4); \
11441
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11442
88
    tmp = fieldname(insn, 12, 4); \
11443
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
88
    tmp = fieldname(insn, 16, 4); \
11445
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11446
88
    tmp = fieldname(insn, 28, 4); \
11447
88
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
88
    return S; \
11449
661
  case 6: \
11450
661
    tmp = fieldname(insn, 12, 4); \
11451
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
661
    tmp = fieldname(insn, 16, 4); \
11453
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
661
    tmp = fieldname(insn, 0, 4); \
11455
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11456
661
    tmp = fieldname(insn, 8, 4); \
11457
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11458
661
    tmp = fieldname(insn, 28, 4); \
11459
661
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
661
    tmp = fieldname(insn, 20, 1); \
11461
660
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
660
    return S; \
11463
11.7k
  case 7: \
11464
11.7k
    if (!Check(&S, DecodeAddrMode3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11465
11.7k
    return S; \
11466
11.7k
  case 8: \
11467
1.14k
    tmp = fieldname(insn, 12, 4); \
11468
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11469
1.14k
    tmp = fieldname(insn, 16, 4); \
11470
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11471
1.14k
    tmp = fieldname(insn, 0, 4); \
11472
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11473
1.14k
    return S; \
11474
1.28k
  case 9: \
11475
1.28k
    if (!Check(&S, DecodeCPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
1.28k
    return S; \
11477
1.28k
  case 10: \
11478
103
    tmp = fieldname(insn, 9, 1); \
11479
103
    MCOperand_CreateImm0(MI, tmp); \
11480
103
    return S; \
11481
1.28k
  case 11: \
11482
486
    tmp = fieldname(insn, 12, 4); \
11483
486
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
486
    tmp = fieldname(insn, 28, 4); \
11485
486
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
486
    return S; \
11487
1.17k
  case 12: \
11488
1.17k
    if (!Check(&S, DecodeQADDInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11489
1.17k
    return S; \
11490
1.64k
  case 13: \
11491
1.64k
    if (!Check(&S, DecodeSMLAInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11492
1.64k
    return S; \
11493
2.01k
  case 14: \
11494
2.01k
    if (!Check(&S, DecodeSwap(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11495
2.01k
    return S; \
11496
2.01k
  case 15: \
11497
328
    tmp = 0; \
11498
328
    tmp |= fieldname(insn, 0, 4) << 0; \
11499
328
    tmp |= fieldname(insn, 8, 12) << 4; \
11500
328
    MCOperand_CreateImm0(MI, tmp); \
11501
328
    return S; \
11502
2.01k
  case 16: \
11503
472
    if (!Check(&S, DecodeTSTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11504
472
    return S; \
11505
907
  case 17: \
11506
907
    tmp = fieldname(insn, 16, 4); \
11507
907
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
907
    tmp = 0; \
11509
907
    tmp |= fieldname(insn, 0, 4) << 0; \
11510
907
    tmp |= fieldname(insn, 5, 7) << 5; \
11511
907
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
907
    tmp = fieldname(insn, 28, 4); \
11513
907
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
907
    return S; \
11515
1.11k
  case 18: \
11516
1.11k
    tmp = fieldname(insn, 16, 4); \
11517
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
1.11k
    tmp = 0; \
11519
1.11k
    tmp |= fieldname(insn, 0, 4) << 0; \
11520
1.11k
    tmp |= fieldname(insn, 5, 2) << 5; \
11521
1.11k
    tmp |= fieldname(insn, 8, 4) << 8; \
11522
1.11k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11523
1.11k
    tmp = fieldname(insn, 28, 4); \
11524
1.11k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11525
1.11k
    return S; \
11526
1.11k
  case 19: \
11527
369
    tmp = fieldname(insn, 12, 4); \
11528
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11529
369
    tmp = fieldname(insn, 16, 4); \
11530
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
369
    tmp = fieldname(insn, 0, 4); \
11532
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
369
    tmp = fieldname(insn, 8, 4); \
11534
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
369
    tmp = fieldname(insn, 12, 4); \
11536
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11537
369
    tmp = fieldname(insn, 16, 4); \
11538
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11539
369
    tmp = fieldname(insn, 28, 4); \
11540
369
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
369
    return S; \
11542
369
  case 20: \
11543
90
    tmp = fieldname(insn, 16, 4); \
11544
90
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11545
90
    tmp = fieldname(insn, 0, 4); \
11546
90
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
90
    tmp = fieldname(insn, 28, 4); \
11548
90
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11549
90
    return S; \
11550
356
  case 21: \
11551
356
    tmp = fieldname(insn, 12, 4); \
11552
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
356
    tmp = fieldname(insn, 0, 4); \
11554
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11555
356
    tmp = fieldname(insn, 16, 4); \
11556
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
356
    tmp = fieldname(insn, 28, 4); \
11558
356
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11559
356
    return S; \
11560
356
  case 22: \
11561
197
    tmp = fieldname(insn, 0, 4); \
11562
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11563
197
    tmp = fieldname(insn, 16, 4); \
11564
197
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11565
197
    tmp = fieldname(insn, 28, 4); \
11566
197
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11567
197
    return S; \
11568
211
  case 23: \
11569
211
    tmp = fieldname(insn, 12, 4); \
11570
211
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11571
211
    tmp = fieldname(insn, 16, 4); \
11572
211
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
211
    tmp = fieldname(insn, 28, 4); \
11574
211
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
211
    return S; \
11576
211
  case 24: \
11577
197
    tmp = fieldname(insn, 12, 4); \
11578
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11579
197
    tmp = fieldname(insn, 0, 4); \
11580
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
197
    tmp = fieldname(insn, 16, 4); \
11582
197
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11583
197
    tmp = fieldname(insn, 28, 4); \
11584
197
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
197
    return S; \
11586
197
  case 25: \
11587
158
    tmp = fieldname(insn, 12, 4); \
11588
158
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
158
    tmp = 0; \
11590
158
    tmp |= fieldname(insn, 8, 1) << 4; \
11591
158
    tmp |= fieldname(insn, 16, 4) << 0; \
11592
158
    tmp |= fieldname(insn, 22, 1) << 5; \
11593
158
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11594
158
    tmp = fieldname(insn, 28, 4); \
11595
156
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11596
156
    return S; \
11597
156
  case 26: \
11598
129
    tmp = 0; \
11599
129
    tmp |= fieldname(insn, 16, 4) << 0; \
11600
129
    tmp |= fieldname(insn, 22, 1) << 4; \
11601
129
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11602
129
    tmp = fieldname(insn, 0, 4); \
11603
128
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11604
128
    tmp = fieldname(insn, 28, 4); \
11605
128
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11606
128
    return S; \
11607
134
  case 27: \
11608
134
    tmp = 0; \
11609
134
    tmp |= fieldname(insn, 8, 1) << 4; \
11610
134
    tmp |= fieldname(insn, 16, 4) << 0; \
11611
134
    tmp |= fieldname(insn, 22, 1) << 5; \
11612
134
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11613
134
    tmp = fieldname(insn, 0, 4); \
11614
133
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11615
133
    tmp = fieldname(insn, 28, 4); \
11616
133
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
133
    return S; \
11618
158
  case 28: \
11619
158
    tmp = fieldname(insn, 0, 4); \
11620
158
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11621
158
    tmp = fieldname(insn, 28, 4); \
11622
158
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
158
    return S; \
11624
201
  case 29: \
11625
201
    tmp = fieldname(insn, 28, 4); \
11626
201
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11627
201
    return S; \
11628
637
  case 30: \
11629
637
    tmp = fieldname(insn, 16, 4); \
11630
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
637
    tmp = fieldname(insn, 0, 4); \
11632
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
637
    tmp = fieldname(insn, 8, 4); \
11634
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11635
637
    tmp = fieldname(insn, 28, 4); \
11636
637
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11637
637
    return S; \
11638
637
  case 31: \
11639
273
    tmp = fieldname(insn, 12, 4); \
11640
273
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
273
    tmp = fieldname(insn, 0, 4); \
11642
273
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
273
    tmp = fieldname(insn, 28, 4); \
11644
273
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11645
273
    tmp = fieldname(insn, 20, 1); \
11646
272
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
272
    return S; \
11648
532
  case 32: \
11649
532
    tmp = fieldname(insn, 12, 4); \
11650
532
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
532
    tmp = fieldname(insn, 0, 4); \
11652
529
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
529
    tmp = fieldname(insn, 28, 4); \
11654
527
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11655
527
    tmp = fieldname(insn, 20, 1); \
11656
526
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
526
    return S; \
11658
1.72k
  case 33: \
11659
1.72k
    tmp = fieldname(insn, 12, 4); \
11660
1.72k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
1.72k
    tmp = 0; \
11662
1.72k
    tmp |= fieldname(insn, 0, 4) << 0; \
11663
1.72k
    tmp |= fieldname(insn, 5, 7) << 5; \
11664
1.72k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11665
1.72k
    tmp = fieldname(insn, 28, 4); \
11666
1.72k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
1.72k
    tmp = fieldname(insn, 20, 1); \
11668
1.72k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
1.72k
    return S; \
11670
1.72k
  case 34: \
11671
378
    tmp = fieldname(insn, 0, 4); \
11672
378
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11673
378
    return S; \
11674
378
  case 35: \
11675
69
    tmp = fieldname(insn, 12, 4); \
11676
69
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
69
    tmp = fieldname(insn, 0, 4); \
11678
69
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
69
    tmp = fieldname(insn, 28, 4); \
11680
69
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11681
69
    return S; \
11682
214
  case 36: \
11683
214
    tmp = fieldname(insn, 0, 4); \
11684
214
    MCOperand_CreateImm0(MI, tmp); \
11685
214
    tmp = fieldname(insn, 28, 4); \
11686
214
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11687
214
    return S; \
11688
1.13k
  case 37: \
11689
1.13k
    tmp = fieldname(insn, 12, 4); \
11690
1.13k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
1.13k
    tmp = 0; \
11692
1.13k
    tmp |= fieldname(insn, 0, 4) << 0; \
11693
1.13k
    tmp |= fieldname(insn, 5, 2) << 5; \
11694
1.13k
    tmp |= fieldname(insn, 8, 4) << 8; \
11695
1.13k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11696
1.13k
    tmp = fieldname(insn, 28, 4); \
11697
1.13k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11698
1.13k
    tmp = fieldname(insn, 20, 1); \
11699
1.13k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11700
1.13k
    return S; \
11701
1.40k
  case 38: \
11702
1.40k
    tmp = fieldname(insn, 16, 4); \
11703
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11704
1.40k
    tmp = fieldname(insn, 0, 4); \
11705
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11706
1.40k
    tmp = fieldname(insn, 8, 4); \
11707
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11708
1.40k
    tmp = fieldname(insn, 12, 4); \
11709
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11710
1.40k
    tmp = fieldname(insn, 28, 4); \
11711
1.40k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11712
1.40k
    tmp = fieldname(insn, 20, 1); \
11713
1.40k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11714
1.40k
    return S; \
11715
1.40k
  case 39: \
11716
225
    tmp = fieldname(insn, 16, 4); \
11717
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11718
225
    tmp = fieldname(insn, 0, 4); \
11719
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11720
225
    tmp = fieldname(insn, 8, 4); \
11721
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11722
225
    tmp = fieldname(insn, 12, 4); \
11723
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11724
225
    tmp = fieldname(insn, 28, 4); \
11725
225
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11726
225
    return S; \
11727
783
  case 40: \
11728
783
    tmp = fieldname(insn, 12, 4); \
11729
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11730
783
    tmp = fieldname(insn, 16, 4); \
11731
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11732
783
    tmp = fieldname(insn, 0, 4); \
11733
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11734
783
    tmp = fieldname(insn, 8, 4); \
11735
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11736
783
    tmp = fieldname(insn, 12, 4); \
11737
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11738
783
    tmp = fieldname(insn, 16, 4); \
11739
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11740
783
    tmp = fieldname(insn, 28, 4); \
11741
783
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11742
783
    tmp = fieldname(insn, 20, 1); \
11743
782
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11744
782
    return S; \
11745
1.12k
  case 41: \
11746
1.12k
    if (!Check(&S, DecodeDoubleRegStore(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
1.12k
    return S; \
11748
1.12k
  case 42: \
11749
897
    if (!Check(&S, DecodeDoubleRegLoad(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11750
897
    return S; \
11751
897
  case 43: \
11752
210
    tmp = fieldname(insn, 16, 4); \
11753
210
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11754
210
    tmp = fieldname(insn, 12, 4); \
11755
210
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11756
210
    tmp = fieldname(insn, 16, 4); \
11757
210
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11758
210
    tmp = 0; \
11759
210
    tmp |= fieldname(insn, 0, 4) << 0; \
11760
210
    tmp |= fieldname(insn, 23, 1) << 4; \
11761
210
    if (!Check(&S, DecodePostIdxReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11762
210
    tmp = fieldname(insn, 28, 4); \
11763
210
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11764
210
    return S; \
11765
284
  case 44: \
11766
284
    tmp = fieldname(insn, 16, 4); \
11767
284
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11768
284
    tmp = fieldname(insn, 12, 4); \
11769
284
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11770
284
    tmp = fieldname(insn, 16, 4); \
11771
284
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11772
284
    tmp = 0; \
11773
284
    tmp |= fieldname(insn, 0, 4) << 0; \
11774
284
    tmp |= fieldname(insn, 8, 4) << 4; \
11775
284
    tmp |= fieldname(insn, 23, 1) << 8; \
11776
284
    MCOperand_CreateImm0(MI, tmp); \
11777
284
    tmp = fieldname(insn, 28, 4); \
11778
284
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11779
284
    return S; \
11780
1.06k
  case 45: \
11781
1.06k
    if (!Check(&S, DecodeLDR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
1.06k
    return S; \
11783
1.06k
  case 46: \
11784
437
    tmp = fieldname(insn, 12, 4); \
11785
437
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
437
    tmp = fieldname(insn, 16, 4); \
11787
437
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
437
    tmp = fieldname(insn, 16, 4); \
11789
437
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
437
    tmp = 0; \
11791
437
    tmp |= fieldname(insn, 0, 4) << 0; \
11792
437
    tmp |= fieldname(insn, 8, 4) << 4; \
11793
437
    tmp |= fieldname(insn, 23, 1) << 8; \
11794
437
    MCOperand_CreateImm0(MI, tmp); \
11795
437
    tmp = fieldname(insn, 28, 4); \
11796
437
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11797
437
    return S; \
11798
7.21k
  case 47: \
11799
7.21k
    tmp = fieldname(insn, 12, 4); \
11800
7.21k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11801
7.21k
    tmp = fieldname(insn, 16, 4); \
11802
7.21k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11803
7.21k
    tmp = fieldname(insn, 0, 12); \
11804
7.21k
    MCOperand_CreateImm0(MI, tmp); \
11805
7.21k
    tmp = fieldname(insn, 28, 4); \
11806
7.21k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11807
7.21k
    tmp = fieldname(insn, 20, 1); \
11808
4.81k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11809
4.81k
    return S; \
11810
4.81k
  case 48: \
11811
0
    tmp = fieldname(insn, 12, 4); \
11812
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11813
0
    tmp = 0; \
11814
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11815
0
    tmp |= fieldname(insn, 22, 2) << 12; \
11816
0
    MCOperand_CreateImm0(MI, tmp); \
11817
0
    tmp = fieldname(insn, 28, 4); \
11818
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11819
0
    return S; \
11820
1.65k
  case 49: \
11821
1.65k
    if (!Check(&S, DecodeArmMOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
1.65k
    return S; \
11823
1.65k
  case 50: \
11824
1.09k
    tmp = fieldname(insn, 16, 4); \
11825
1.09k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
1.09k
    tmp = fieldname(insn, 0, 12); \
11827
1.09k
    MCOperand_CreateImm0(MI, tmp); \
11828
1.09k
    tmp = fieldname(insn, 28, 4); \
11829
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11830
1.09k
    return S; \
11831
1.09k
  case 51: \
11832
650
    return S; \
11833
1.63k
  case 52: \
11834
1.63k
    if (!Check(&S, DecodeHINTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11835
1.63k
    return S; \
11836
1.63k
  case 53: \
11837
996
    tmp = 0; \
11838
996
    tmp |= fieldname(insn, 16, 4) << 0; \
11839
996
    tmp |= fieldname(insn, 22, 1) << 4; \
11840
996
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11841
996
    tmp = fieldname(insn, 0, 12); \
11842
927
    MCOperand_CreateImm0(MI, tmp); \
11843
927
    tmp = fieldname(insn, 28, 4); \
11844
927
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11845
927
    return S; \
11846
927
  case 54: \
11847
769
    tmp = fieldname(insn, 12, 4); \
11848
769
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11849
769
    tmp = fieldname(insn, 0, 12); \
11850
769
    MCOperand_CreateImm0(MI, tmp); \
11851
769
    tmp = fieldname(insn, 28, 4); \
11852
769
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11853
769
    tmp = fieldname(insn, 20, 1); \
11854
574
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11855
574
    return S; \
11856
9.91k
  case 55: \
11857
9.91k
    if (!Check(&S, DecodeAddrMode2IdxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
9.91k
    return S; \
11859
9.91k
  case 56: \
11860
2.60k
    tmp = fieldname(insn, 12, 4); \
11861
2.60k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11862
2.60k
    tmp = 0; \
11863
2.60k
    tmp |= fieldname(insn, 0, 12) << 0; \
11864
2.60k
    tmp |= fieldname(insn, 16, 4) << 13; \
11865
2.60k
    tmp |= fieldname(insn, 23, 1) << 12; \
11866
2.60k
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11867
2.60k
    tmp = fieldname(insn, 28, 4); \
11868
2.60k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11869
2.60k
    return S; \
11870
2.60k
  case 57: \
11871
273
    tmp = 0; \
11872
273
    tmp |= fieldname(insn, 0, 12) << 0; \
11873
273
    tmp |= fieldname(insn, 16, 4) << 13; \
11874
273
    tmp |= fieldname(insn, 23, 1) << 12; \
11875
273
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
273
    return S; \
11877
2.07k
  case 58: \
11878
2.07k
    if (!Check(&S, DecodeSTRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11879
2.07k
    return S; \
11880
2.29k
  case 59: \
11881
2.29k
    if (!Check(&S, DecodeLDRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11882
2.29k
    return S; \
11883
2.29k
  case 60: \
11884
1.68k
    tmp = fieldname(insn, 12, 4); \
11885
1.68k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
1.68k
    tmp = 0; \
11887
1.68k
    tmp |= fieldname(insn, 0, 12) << 0; \
11888
1.68k
    tmp |= fieldname(insn, 16, 4) << 13; \
11889
1.68k
    tmp |= fieldname(insn, 23, 1) << 12; \
11890
1.68k
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11891
1.68k
    tmp = fieldname(insn, 28, 4); \
11892
1.68k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11893
1.68k
    return S; \
11894
2.99k
  case 61: \
11895
2.99k
    tmp = fieldname(insn, 0, 4); \
11896
2.99k
    if (!Check(&S, DecodeMemBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11897
2.99k
    return S; \
11898
2.99k
  case 62: \
11899
1.93k
    tmp = fieldname(insn, 0, 4); \
11900
1.93k
    if (!Check(&S, DecodeInstSyncBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11901
1.93k
    return S; \
11902
1.93k
  case 63: \
11903
1.63k
    tmp = fieldname(insn, 12, 4); \
11904
1.63k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11905
1.63k
    tmp = 0; \
11906
1.63k
    tmp |= fieldname(insn, 0, 4) << 0; \
11907
1.63k
    tmp |= fieldname(insn, 5, 7) << 5; \
11908
1.63k
    tmp |= fieldname(insn, 16, 4) << 13; \
11909
1.63k
    tmp |= fieldname(insn, 23, 1) << 12; \
11910
1.63k
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11911
1.63k
    tmp = fieldname(insn, 28, 4); \
11912
1.63k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11913
1.63k
    return S; \
11914
1.63k
  case 64: \
11915
66
    tmp = 0; \
11916
66
    tmp |= fieldname(insn, 0, 4) << 0; \
11917
66
    tmp |= fieldname(insn, 5, 7) << 5; \
11918
66
    tmp |= fieldname(insn, 16, 4) << 13; \
11919
66
    tmp |= fieldname(insn, 23, 1) << 12; \
11920
66
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11921
66
    return S; \
11922
1.25k
  case 65: \
11923
1.25k
    tmp = fieldname(insn, 12, 4); \
11924
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11925
1.25k
    tmp = fieldname(insn, 16, 4); \
11926
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11927
1.25k
    tmp = fieldname(insn, 0, 4); \
11928
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11929
1.25k
    tmp = fieldname(insn, 28, 4); \
11930
1.25k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11931
1.25k
    return S; \
11932
1.37k
  case 66: \
11933
1.37k
    tmp = fieldname(insn, 12, 4); \
11934
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11935
1.37k
    tmp = fieldname(insn, 16, 4); \
11936
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11937
1.37k
    tmp = fieldname(insn, 0, 4); \
11938
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11939
1.37k
    tmp = fieldname(insn, 7, 5); \
11940
1.37k
    MCOperand_CreateImm0(MI, tmp); \
11941
1.37k
    tmp = fieldname(insn, 28, 4); \
11942
1.37k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11943
1.37k
    return S; \
11944
1.37k
  case 67: \
11945
817
    tmp = fieldname(insn, 16, 4); \
11946
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11947
817
    tmp = fieldname(insn, 0, 4); \
11948
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11949
817
    tmp = fieldname(insn, 8, 4); \
11950
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11951
817
    tmp = fieldname(insn, 28, 4); \
11952
817
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11953
817
    return S; \
11954
817
  case 68: \
11955
518
    tmp = fieldname(insn, 16, 4); \
11956
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11957
518
    tmp = fieldname(insn, 0, 4); \
11958
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11959
518
    tmp = fieldname(insn, 8, 4); \
11960
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
518
    tmp = fieldname(insn, 12, 4); \
11962
518
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11963
518
    tmp = fieldname(insn, 28, 4); \
11964
518
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
518
    return S; \
11966
518
  case 69: \
11967
70
    tmp = fieldname(insn, 12, 4); \
11968
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11969
70
    tmp = fieldname(insn, 16, 4); \
11970
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11971
70
    tmp = fieldname(insn, 0, 4); \
11972
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
70
    tmp = fieldname(insn, 28, 4); \
11974
70
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
70
    return S; \
11976
752
  case 70: \
11977
752
    tmp = fieldname(insn, 12, 4); \
11978
752
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11979
752
    tmp = fieldname(insn, 0, 4); \
11980
752
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11981
752
    tmp = fieldname(insn, 10, 2); \
11982
752
    MCOperand_CreateImm0(MI, tmp); \
11983
752
    tmp = fieldname(insn, 28, 4); \
11984
752
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11985
752
    return S; \
11986
752
  case 71: \
11987
684
    tmp = fieldname(insn, 12, 4); \
11988
684
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11989
684
    tmp = fieldname(insn, 16, 4); \
11990
684
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
684
    tmp = fieldname(insn, 0, 4); \
11992
684
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11993
684
    tmp = fieldname(insn, 10, 2); \
11994
684
    MCOperand_CreateImm0(MI, tmp); \
11995
684
    tmp = fieldname(insn, 28, 4); \
11996
684
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11997
684
    return S; \
11998
2.59k
  case 72: \
11999
2.59k
    if (!Check(&S, DecodeSTRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12000
2.59k
    return S; \
12001
2.59k
  case 73: \
12002
1.62k
    if (!Check(&S, DecodeLDRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12003
1.62k
    return S; \
12004
1.62k
  case 74: \
12005
546
    tmp = fieldname(insn, 12, 4); \
12006
546
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12007
546
    tmp = fieldname(insn, 16, 5); \
12008
546
    MCOperand_CreateImm0(MI, tmp); \
12009
546
    tmp = fieldname(insn, 0, 4); \
12010
546
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12011
546
    tmp = 0; \
12012
546
    tmp |= fieldname(insn, 6, 1) << 5; \
12013
546
    tmp |= fieldname(insn, 7, 5) << 0; \
12014
546
    MCOperand_CreateImm0(MI, tmp); \
12015
546
    tmp = fieldname(insn, 28, 4); \
12016
546
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12017
546
    return S; \
12018
1.11k
  case 75: \
12019
1.11k
    tmp = fieldname(insn, 12, 4); \
12020
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12021
1.11k
    tmp = fieldname(insn, 16, 4); \
12022
1.11k
    MCOperand_CreateImm0(MI, tmp); \
12023
1.11k
    tmp = fieldname(insn, 0, 4); \
12024
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12025
1.11k
    tmp = fieldname(insn, 28, 4); \
12026
1.11k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12027
1.11k
    return S; \
12028
1.11k
  case 76: \
12029
365
    tmp = fieldname(insn, 12, 4); \
12030
365
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12031
365
    tmp = fieldname(insn, 0, 4); \
12032
365
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12033
365
    tmp = fieldname(insn, 7, 5); \
12034
365
    MCOperand_CreateImm0(MI, tmp); \
12035
365
    tmp = fieldname(insn, 16, 5); \
12036
365
    MCOperand_CreateImm0(MI, tmp); \
12037
365
    tmp = fieldname(insn, 28, 4); \
12038
365
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12039
365
    return S; \
12040
1.21k
  case 77: \
12041
1.21k
    tmp = fieldname(insn, 12, 4); \
12042
1.21k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12043
1.21k
    tmp = 0; \
12044
1.21k
    tmp |= fieldname(insn, 0, 4) << 0; \
12045
1.21k
    tmp |= fieldname(insn, 5, 7) << 5; \
12046
1.21k
    tmp |= fieldname(insn, 16, 4) << 13; \
12047
1.21k
    tmp |= fieldname(insn, 23, 1) << 12; \
12048
1.21k
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12049
1.21k
    tmp = fieldname(insn, 28, 4); \
12050
1.21k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12051
1.21k
    return S; \
12052
1.21k
  case 78: \
12053
855
    tmp = fieldname(insn, 12, 4); \
12054
855
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12055
855
    tmp = fieldname(insn, 12, 4); \
12056
855
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12057
855
    tmp = 0; \
12058
855
    tmp |= fieldname(insn, 7, 5) << 0; \
12059
855
    tmp |= fieldname(insn, 16, 5) << 5; \
12060
855
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12061
855
    tmp = fieldname(insn, 28, 4); \
12062
855
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12063
855
    return S; \
12064
855
  case 79: \
12065
733
    tmp = fieldname(insn, 12, 4); \
12066
733
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12067
733
    tmp = fieldname(insn, 12, 4); \
12068
733
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12069
733
    tmp = fieldname(insn, 0, 4); \
12070
733
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12071
733
    tmp = 0; \
12072
733
    tmp |= fieldname(insn, 7, 5) << 0; \
12073
733
    tmp |= fieldname(insn, 16, 5) << 5; \
12074
733
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12075
733
    tmp = fieldname(insn, 28, 4); \
12076
733
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12077
733
    return S; \
12078
2.30k
  case 80: \
12079
2.30k
    tmp = fieldname(insn, 16, 4); \
12080
2.30k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12081
2.30k
    tmp = fieldname(insn, 28, 4); \
12082
2.30k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12083
2.30k
    tmp = fieldname(insn, 0, 16); \
12084
2.30k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12085
2.30k
    return S; \
12086
2.30k
  case 81: \
12087
401
    tmp = fieldname(insn, 16, 4); \
12088
401
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12089
401
    return S; \
12090
5.36k
  case 82: \
12091
5.36k
    if (!Check(&S, DecodeMemMultipleWritebackInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12092
5.36k
    return S; \
12093
5.36k
  case 83: \
12094
260
    tmp = fieldname(insn, 0, 5); \
12095
260
    MCOperand_CreateImm0(MI, tmp); \
12096
260
    return S; \
12097
6.64k
  case 84: \
12098
6.64k
    if (!Check(&S, DecodeBranchImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12099
6.64k
    return S; \
12100
6.64k
  case 85: \
12101
0
    tmp = 0; \
12102
0
    tmp |= fieldname(insn, 0, 24) << 1; \
12103
0
    tmp |= fieldname(insn, 24, 1) << 0; \
12104
0
    MCOperand_CreateImm0(MI, tmp); \
12105
0
    return S; \
12106
6.64k
  case 86: \
12107
959
    if (!Check(&S, DecoderForMRRC2AndMCRR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12108
959
    return S; \
12109
1.22k
  case 87: \
12110
1.22k
    tmp = fieldname(insn, 8, 4); \
12111
1.22k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12112
1.22k
    tmp = fieldname(insn, 4, 4); \
12113
833
    MCOperand_CreateImm0(MI, tmp); \
12114
833
    tmp = fieldname(insn, 12, 4); \
12115
833
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12116
833
    tmp = fieldname(insn, 16, 4); \
12117
833
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12118
833
    tmp = fieldname(insn, 0, 4); \
12119
833
    MCOperand_CreateImm0(MI, tmp); \
12120
833
    tmp = fieldname(insn, 28, 4); \
12121
833
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12122
833
    return S; \
12123
1.40k
  case 88: \
12124
1.40k
    tmp = fieldname(insn, 12, 4); \
12125
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12126
1.40k
    tmp = fieldname(insn, 16, 4); \
12127
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12128
1.40k
    tmp = fieldname(insn, 8, 4); \
12129
1.40k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12130
1.40k
    tmp = fieldname(insn, 4, 4); \
12131
384
    MCOperand_CreateImm0(MI, tmp); \
12132
384
    tmp = fieldname(insn, 0, 4); \
12133
384
    MCOperand_CreateImm0(MI, tmp); \
12134
384
    tmp = fieldname(insn, 28, 4); \
12135
384
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12136
384
    return S; \
12137
5.71k
  case 89: \
12138
5.71k
    tmp = fieldname(insn, 0, 24); \
12139
5.71k
    MCOperand_CreateImm0(MI, tmp); \
12140
5.71k
    tmp = fieldname(insn, 28, 4); \
12141
5.71k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12142
5.71k
    return S; \
12143
22.9k
  case 90: \
12144
22.9k
    if (!Check(&S, DecodeCopMemInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12145
22.9k
    return S; \
12146
22.9k
  case 91: \
12147
3.01k
    tmp = fieldname(insn, 8, 4); \
12148
3.01k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12149
3.01k
    tmp = fieldname(insn, 20, 4); \
12150
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12151
3.01k
    tmp = fieldname(insn, 12, 4); \
12152
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12153
3.01k
    tmp = fieldname(insn, 16, 4); \
12154
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12155
3.01k
    tmp = fieldname(insn, 0, 4); \
12156
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12157
3.01k
    tmp = fieldname(insn, 5, 3); \
12158
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12159
3.01k
    return S; \
12160
3.01k
  case 92: \
12161
1.94k
    tmp = fieldname(insn, 8, 4); \
12162
1.94k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12163
1.94k
    tmp = fieldname(insn, 20, 4); \
12164
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12165
1.94k
    tmp = fieldname(insn, 12, 4); \
12166
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12167
1.94k
    tmp = fieldname(insn, 16, 4); \
12168
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12169
1.94k
    tmp = fieldname(insn, 0, 4); \
12170
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12171
1.94k
    tmp = fieldname(insn, 5, 3); \
12172
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12173
1.94k
    tmp = fieldname(insn, 28, 4); \
12174
1.94k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12175
1.94k
    return S; \
12176
1.94k
  case 93: \
12177
1.65k
    tmp = fieldname(insn, 8, 4); \
12178
1.65k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12179
1.65k
    tmp = fieldname(insn, 21, 3); \
12180
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12181
1.64k
    tmp = fieldname(insn, 12, 4); \
12182
1.64k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12183
1.64k
    tmp = fieldname(insn, 16, 4); \
12184
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12185
1.64k
    tmp = fieldname(insn, 0, 4); \
12186
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12187
1.64k
    tmp = fieldname(insn, 5, 3); \
12188
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12189
1.64k
    return S; \
12190
1.64k
  case 94: \
12191
762
    tmp = fieldname(insn, 8, 4); \
12192
762
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12193
762
    tmp = fieldname(insn, 21, 3); \
12194
759
    MCOperand_CreateImm0(MI, tmp); \
12195
759
    tmp = fieldname(insn, 12, 4); \
12196
759
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12197
759
    tmp = fieldname(insn, 16, 4); \
12198
759
    MCOperand_CreateImm0(MI, tmp); \
12199
759
    tmp = fieldname(insn, 0, 4); \
12200
759
    MCOperand_CreateImm0(MI, tmp); \
12201
759
    tmp = fieldname(insn, 5, 3); \
12202
759
    MCOperand_CreateImm0(MI, tmp); \
12203
759
    tmp = fieldname(insn, 28, 4); \
12204
759
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12205
759
    return S; \
12206
1.93k
  case 95: \
12207
1.93k
    tmp = fieldname(insn, 12, 4); \
12208
1.93k
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12209
1.93k
    tmp = fieldname(insn, 8, 4); \
12210
1.93k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12211
1.93k
    tmp = fieldname(insn, 21, 3); \
12212
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12213
1.92k
    tmp = fieldname(insn, 16, 4); \
12214
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12215
1.92k
    tmp = fieldname(insn, 0, 4); \
12216
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12217
1.92k
    tmp = fieldname(insn, 5, 3); \
12218
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12219
1.92k
    return S; \
12220
1.93k
  case 96: \
12221
1.10k
    tmp = fieldname(insn, 12, 4); \
12222
1.10k
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12223
1.10k
    tmp = fieldname(insn, 8, 4); \
12224
1.10k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12225
1.10k
    tmp = fieldname(insn, 21, 3); \
12226
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12227
1.09k
    tmp = fieldname(insn, 16, 4); \
12228
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12229
1.09k
    tmp = fieldname(insn, 0, 4); \
12230
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12231
1.09k
    tmp = fieldname(insn, 5, 3); \
12232
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12233
1.09k
    tmp = fieldname(insn, 28, 4); \
12234
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12235
1.09k
    return S; \
12236
2.55k
  case 97: \
12237
2.55k
    tmp = 0; \
12238
2.55k
    tmp |= fieldname(insn, 12, 4) << 0; \
12239
2.55k
    tmp |= fieldname(insn, 22, 1) << 4; \
12240
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12241
2.55k
    tmp = 0; \
12242
2.55k
    tmp |= fieldname(insn, 7, 1) << 4; \
12243
2.55k
    tmp |= fieldname(insn, 16, 4) << 0; \
12244
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12245
2.55k
    tmp = 0; \
12246
2.55k
    tmp |= fieldname(insn, 0, 4) << 0; \
12247
2.55k
    tmp |= fieldname(insn, 5, 1) << 4; \
12248
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12249
2.55k
    return S; \
12250
2.55k
  case 98: \
12251
297
    tmp = 0; \
12252
297
    tmp |= fieldname(insn, 12, 4) << 0; \
12253
297
    tmp |= fieldname(insn, 22, 1) << 4; \
12254
297
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12255
297
    tmp = 0; \
12256
279
    tmp |= fieldname(insn, 7, 1) << 4; \
12257
279
    tmp |= fieldname(insn, 16, 4) << 0; \
12258
279
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12259
279
    tmp = 0; \
12260
276
    tmp |= fieldname(insn, 0, 4) << 0; \
12261
276
    tmp |= fieldname(insn, 5, 1) << 4; \
12262
276
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12263
276
    return S; \
12264
663
  case 99: \
12265
663
    tmp = 0; \
12266
663
    tmp |= fieldname(insn, 12, 4) << 0; \
12267
663
    tmp |= fieldname(insn, 22, 1) << 4; \
12268
663
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12269
663
    tmp = 0; \
12270
660
    tmp |= fieldname(insn, 7, 1) << 4; \
12271
660
    tmp |= fieldname(insn, 16, 4) << 0; \
12272
660
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12273
660
    tmp = 0; \
12274
660
    tmp |= fieldname(insn, 0, 4) << 0; \
12275
660
    tmp |= fieldname(insn, 5, 1) << 4; \
12276
660
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12277
660
    return S; \
12278
660
  case 100: \
12279
267
    tmp = 0; \
12280
267
    tmp |= fieldname(insn, 12, 4) << 0; \
12281
267
    tmp |= fieldname(insn, 22, 1) << 4; \
12282
267
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12283
267
    tmp = 0; \
12284
260
    tmp |= fieldname(insn, 7, 1) << 4; \
12285
260
    tmp |= fieldname(insn, 16, 4) << 0; \
12286
260
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12287
260
    tmp = 0; \
12288
259
    tmp |= fieldname(insn, 0, 4) << 0; \
12289
259
    tmp |= fieldname(insn, 5, 1) << 4; \
12290
259
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12291
259
    return S; \
12292
445
  case 101: \
12293
445
    tmp = 0; \
12294
445
    tmp |= fieldname(insn, 12, 4) << 0; \
12295
445
    tmp |= fieldname(insn, 22, 1) << 4; \
12296
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12297
445
    tmp = 0; \
12298
445
    tmp |= fieldname(insn, 0, 4) << 0; \
12299
445
    tmp |= fieldname(insn, 5, 1) << 4; \
12300
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12301
445
    tmp = 0; \
12302
445
    tmp |= fieldname(insn, 7, 1) << 4; \
12303
445
    tmp |= fieldname(insn, 16, 4) << 0; \
12304
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12305
445
    return S; \
12306
445
  case 102: \
12307
242
    tmp = 0; \
12308
242
    tmp |= fieldname(insn, 12, 4) << 0; \
12309
242
    tmp |= fieldname(insn, 22, 1) << 4; \
12310
242
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12311
242
    tmp = 0; \
12312
241
    tmp |= fieldname(insn, 0, 4) << 0; \
12313
241
    tmp |= fieldname(insn, 5, 1) << 4; \
12314
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12315
241
    tmp = 0; \
12316
238
    tmp |= fieldname(insn, 7, 1) << 4; \
12317
238
    tmp |= fieldname(insn, 16, 4) << 0; \
12318
238
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12319
238
    return S; \
12320
238
  case 103: \
12321
87
    tmp = 0; \
12322
87
    tmp |= fieldname(insn, 12, 4) << 0; \
12323
87
    tmp |= fieldname(insn, 22, 1) << 4; \
12324
87
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12325
87
    tmp = 0; \
12326
87
    tmp |= fieldname(insn, 7, 1) << 4; \
12327
87
    tmp |= fieldname(insn, 16, 4) << 0; \
12328
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12329
87
    tmp = 0; \
12330
85
    tmp |= fieldname(insn, 0, 4) << 0; \
12331
85
    tmp |= fieldname(insn, 5, 1) << 4; \
12332
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12333
85
    return S; \
12334
289
  case 104: \
12335
289
    tmp = 0; \
12336
289
    tmp |= fieldname(insn, 12, 4) << 0; \
12337
289
    tmp |= fieldname(insn, 22, 1) << 4; \
12338
289
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12339
289
    tmp = 0; \
12340
286
    tmp |= fieldname(insn, 12, 4) << 0; \
12341
286
    tmp |= fieldname(insn, 22, 1) << 4; \
12342
286
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12343
286
    tmp = 0; \
12344
286
    tmp |= fieldname(insn, 7, 1) << 4; \
12345
286
    tmp |= fieldname(insn, 16, 4) << 0; \
12346
286
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12347
286
    tmp = 0; \
12348
286
    tmp |= fieldname(insn, 0, 4) << 0; \
12349
286
    tmp |= fieldname(insn, 5, 1) << 4; \
12350
286
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12351
286
    return S; \
12352
322
  case 105: \
12353
322
    tmp = 0; \
12354
322
    tmp |= fieldname(insn, 12, 4) << 0; \
12355
322
    tmp |= fieldname(insn, 22, 1) << 4; \
12356
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12357
322
    tmp = 0; \
12358
322
    tmp |= fieldname(insn, 12, 4) << 0; \
12359
322
    tmp |= fieldname(insn, 22, 1) << 4; \
12360
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12361
322
    tmp = 0; \
12362
322
    tmp |= fieldname(insn, 7, 1) << 4; \
12363
322
    tmp |= fieldname(insn, 16, 4) << 0; \
12364
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12365
322
    tmp = 0; \
12366
322
    tmp |= fieldname(insn, 0, 4) << 0; \
12367
322
    tmp |= fieldname(insn, 5, 1) << 4; \
12368
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12369
322
    return S; \
12370
1.15k
  case 106: \
12371
1.15k
    tmp = 0; \
12372
1.15k
    tmp |= fieldname(insn, 12, 4) << 0; \
12373
1.15k
    tmp |= fieldname(insn, 22, 1) << 4; \
12374
1.15k
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12375
1.15k
    tmp = 0; \
12376
954
    tmp |= fieldname(insn, 12, 4) << 0; \
12377
954
    tmp |= fieldname(insn, 22, 1) << 4; \
12378
954
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12379
954
    tmp = 0; \
12380
954
    tmp |= fieldname(insn, 7, 1) << 4; \
12381
954
    tmp |= fieldname(insn, 16, 4) << 0; \
12382
954
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12383
954
    tmp = 0; \
12384
736
    tmp |= fieldname(insn, 0, 4) << 0; \
12385
736
    tmp |= fieldname(insn, 5, 1) << 4; \
12386
736
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12387
736
    return S; \
12388
736
  case 107: \
12389
379
    tmp = 0; \
12390
379
    tmp |= fieldname(insn, 12, 4) << 0; \
12391
379
    tmp |= fieldname(insn, 22, 1) << 4; \
12392
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12393
379
    tmp = 0; \
12394
379
    tmp |= fieldname(insn, 12, 4) << 0; \
12395
379
    tmp |= fieldname(insn, 22, 1) << 4; \
12396
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12397
379
    tmp = 0; \
12398
379
    tmp |= fieldname(insn, 7, 1) << 4; \
12399
379
    tmp |= fieldname(insn, 16, 4) << 0; \
12400
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12401
379
    tmp = fieldname(insn, 0, 3); \
12402
379
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12403
379
    tmp = 0; \
12404
379
    tmp |= fieldname(insn, 3, 1) << 0; \
12405
379
    tmp |= fieldname(insn, 5, 1) << 1; \
12406
379
    MCOperand_CreateImm0(MI, tmp); \
12407
379
    return S; \
12408
379
  case 108: \
12409
198
    tmp = 0; \
12410
198
    tmp |= fieldname(insn, 12, 4) << 0; \
12411
198
    tmp |= fieldname(insn, 22, 1) << 4; \
12412
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12413
198
    tmp = 0; \
12414
197
    tmp |= fieldname(insn, 12, 4) << 0; \
12415
197
    tmp |= fieldname(insn, 22, 1) << 4; \
12416
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12417
197
    tmp = 0; \
12418
197
    tmp |= fieldname(insn, 7, 1) << 4; \
12419
197
    tmp |= fieldname(insn, 16, 4) << 0; \
12420
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12421
197
    tmp = fieldname(insn, 0, 3); \
12422
196
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12423
196
    tmp = 0; \
12424
196
    tmp |= fieldname(insn, 3, 1) << 0; \
12425
196
    tmp |= fieldname(insn, 5, 1) << 1; \
12426
196
    MCOperand_CreateImm0(MI, tmp); \
12427
196
    return S; \
12428
204
  case 109: \
12429
204
    tmp = 0; \
12430
204
    tmp |= fieldname(insn, 12, 4) << 0; \
12431
204
    tmp |= fieldname(insn, 22, 1) << 4; \
12432
204
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12433
204
    tmp = 0; \
12434
203
    tmp |= fieldname(insn, 12, 4) << 0; \
12435
203
    tmp |= fieldname(insn, 22, 1) << 4; \
12436
203
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12437
203
    tmp = 0; \
12438
203
    tmp |= fieldname(insn, 7, 1) << 4; \
12439
203
    tmp |= fieldname(insn, 16, 4) << 0; \
12440
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12441
203
    tmp = fieldname(insn, 0, 3); \
12442
203
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12443
203
    tmp = 0; \
12444
203
    tmp |= fieldname(insn, 3, 1) << 0; \
12445
203
    tmp |= fieldname(insn, 5, 1) << 1; \
12446
203
    MCOperand_CreateImm0(MI, tmp); \
12447
203
    return S; \
12448
242
  case 110: \
12449
242
    tmp = 0; \
12450
242
    tmp |= fieldname(insn, 12, 4) << 0; \
12451
242
    tmp |= fieldname(insn, 22, 1) << 4; \
12452
242
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12453
242
    tmp = 0; \
12454
242
    tmp |= fieldname(insn, 7, 1) << 4; \
12455
242
    tmp |= fieldname(insn, 16, 4) << 0; \
12456
242
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12457
242
    tmp = fieldname(insn, 0, 3); \
12458
242
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12459
242
    tmp = 0; \
12460
242
    tmp |= fieldname(insn, 3, 1) << 0; \
12461
242
    tmp |= fieldname(insn, 5, 1) << 1; \
12462
242
    MCOperand_CreateImm0(MI, tmp); \
12463
242
    return S; \
12464
614
  case 111: \
12465
614
    tmp = 0; \
12466
614
    tmp |= fieldname(insn, 12, 4) << 0; \
12467
614
    tmp |= fieldname(insn, 22, 1) << 4; \
12468
614
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12469
614
    tmp = 0; \
12470
612
    tmp |= fieldname(insn, 7, 1) << 4; \
12471
612
    tmp |= fieldname(insn, 16, 4) << 0; \
12472
612
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12473
612
    tmp = fieldname(insn, 0, 3); \
12474
611
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12475
611
    tmp = 0; \
12476
611
    tmp |= fieldname(insn, 3, 1) << 0; \
12477
611
    tmp |= fieldname(insn, 5, 1) << 1; \
12478
611
    MCOperand_CreateImm0(MI, tmp); \
12479
611
    return S; \
12480
611
  case 112: \
12481
77
    tmp = 0; \
12482
77
    tmp |= fieldname(insn, 12, 4) << 0; \
12483
77
    tmp |= fieldname(insn, 22, 1) << 4; \
12484
77
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12485
77
    tmp = 0; \
12486
76
    tmp |= fieldname(insn, 7, 1) << 4; \
12487
76
    tmp |= fieldname(insn, 16, 4) << 0; \
12488
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12489
76
    tmp = fieldname(insn, 0, 3); \
12490
76
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12491
76
    tmp = 0; \
12492
76
    tmp |= fieldname(insn, 3, 1) << 0; \
12493
76
    tmp |= fieldname(insn, 5, 1) << 1; \
12494
76
    MCOperand_CreateImm0(MI, tmp); \
12495
76
    return S; \
12496
444
  case 113: \
12497
444
    tmp = 0; \
12498
444
    tmp |= fieldname(insn, 12, 4) << 0; \
12499
444
    tmp |= fieldname(insn, 22, 1) << 4; \
12500
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12501
444
    tmp = 0; \
12502
444
    tmp |= fieldname(insn, 12, 4) << 0; \
12503
444
    tmp |= fieldname(insn, 22, 1) << 4; \
12504
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12505
444
    tmp = 0; \
12506
444
    tmp |= fieldname(insn, 7, 1) << 4; \
12507
444
    tmp |= fieldname(insn, 16, 4) << 0; \
12508
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12509
444
    tmp = fieldname(insn, 0, 4); \
12510
444
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12511
444
    tmp = fieldname(insn, 5, 1); \
12512
444
    MCOperand_CreateImm0(MI, tmp); \
12513
444
    return S; \
12514
481
  case 114: \
12515
481
    tmp = 0; \
12516
481
    tmp |= fieldname(insn, 12, 4) << 0; \
12517
481
    tmp |= fieldname(insn, 22, 1) << 4; \
12518
481
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12519
481
    tmp = 0; \
12520
413
    tmp |= fieldname(insn, 12, 4) << 0; \
12521
413
    tmp |= fieldname(insn, 22, 1) << 4; \
12522
413
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12523
413
    tmp = 0; \
12524
413
    tmp |= fieldname(insn, 7, 1) << 4; \
12525
413
    tmp |= fieldname(insn, 16, 4) << 0; \
12526
413
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12527
413
    tmp = fieldname(insn, 0, 4); \
12528
192
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12529
192
    tmp = fieldname(insn, 5, 1); \
12530
192
    MCOperand_CreateImm0(MI, tmp); \
12531
192
    return S; \
12532
361
  case 115: \
12533
361
    tmp = 0; \
12534
361
    tmp |= fieldname(insn, 12, 4) << 0; \
12535
361
    tmp |= fieldname(insn, 22, 1) << 4; \
12536
361
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12537
361
    tmp = 0; \
12538
360
    tmp |= fieldname(insn, 12, 4) << 0; \
12539
360
    tmp |= fieldname(insn, 22, 1) << 4; \
12540
360
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12541
360
    tmp = 0; \
12542
360
    tmp |= fieldname(insn, 7, 1) << 4; \
12543
360
    tmp |= fieldname(insn, 16, 4) << 0; \
12544
360
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12545
360
    tmp = fieldname(insn, 0, 4); \
12546
360
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12547
360
    tmp = fieldname(insn, 5, 1); \
12548
360
    MCOperand_CreateImm0(MI, tmp); \
12549
360
    return S; \
12550
360
  case 116: \
12551
234
    tmp = 0; \
12552
234
    tmp |= fieldname(insn, 12, 4) << 0; \
12553
234
    tmp |= fieldname(insn, 22, 1) << 4; \
12554
234
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12555
234
    tmp = 0; \
12556
234
    tmp |= fieldname(insn, 7, 1) << 4; \
12557
234
    tmp |= fieldname(insn, 16, 4) << 0; \
12558
234
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12559
234
    tmp = fieldname(insn, 0, 4); \
12560
234
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12561
234
    tmp = fieldname(insn, 5, 1); \
12562
234
    MCOperand_CreateImm0(MI, tmp); \
12563
234
    return S; \
12564
234
  case 117: \
12565
218
    tmp = 0; \
12566
218
    tmp |= fieldname(insn, 12, 4) << 0; \
12567
218
    tmp |= fieldname(insn, 22, 1) << 4; \
12568
218
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12569
218
    tmp = 0; \
12570
216
    tmp |= fieldname(insn, 7, 1) << 4; \
12571
216
    tmp |= fieldname(insn, 16, 4) << 0; \
12572
216
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12573
216
    tmp = fieldname(insn, 0, 4); \
12574
215
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12575
215
    tmp = fieldname(insn, 5, 1); \
12576
215
    MCOperand_CreateImm0(MI, tmp); \
12577
215
    return S; \
12578
368
  case 118: \
12579
368
    tmp = 0; \
12580
368
    tmp |= fieldname(insn, 12, 4) << 0; \
12581
368
    tmp |= fieldname(insn, 22, 1) << 4; \
12582
368
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12583
368
    tmp = 0; \
12584
367
    tmp |= fieldname(insn, 7, 1) << 4; \
12585
367
    tmp |= fieldname(insn, 16, 4) << 0; \
12586
367
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12587
367
    tmp = fieldname(insn, 0, 4); \
12588
367
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12589
367
    tmp = fieldname(insn, 5, 1); \
12590
367
    MCOperand_CreateImm0(MI, tmp); \
12591
367
    return S; \
12592
443
  case 119: \
12593
443
    tmp = 0; \
12594
443
    tmp |= fieldname(insn, 12, 4) << 0; \
12595
443
    tmp |= fieldname(insn, 22, 1) << 4; \
12596
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12597
443
    tmp = 0; \
12598
443
    tmp |= fieldname(insn, 7, 1) << 4; \
12599
443
    tmp |= fieldname(insn, 16, 4) << 0; \
12600
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12601
443
    tmp = 0; \
12602
443
    tmp |= fieldname(insn, 0, 4) << 0; \
12603
443
    tmp |= fieldname(insn, 5, 1) << 4; \
12604
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12605
443
    tmp = fieldname(insn, 10, 1); \
12606
443
    MCOperand_CreateImm0(MI, tmp); \
12607
443
    return S; \
12608
443
  case 120: \
12609
378
    tmp = 0; \
12610
378
    tmp |= fieldname(insn, 12, 4) << 0; \
12611
378
    tmp |= fieldname(insn, 22, 1) << 4; \
12612
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12613
378
    tmp = 0; \
12614
378
    tmp |= fieldname(insn, 7, 1) << 4; \
12615
378
    tmp |= fieldname(insn, 16, 4) << 0; \
12616
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12617
378
    tmp = 0; \
12618
378
    tmp |= fieldname(insn, 0, 4) << 0; \
12619
378
    tmp |= fieldname(insn, 5, 1) << 4; \
12620
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12621
378
    tmp = fieldname(insn, 9, 2); \
12622
378
    MCOperand_CreateImm0(MI, tmp); \
12623
378
    return S; \
12624
378
  case 121: \
12625
211
    tmp = 0; \
12626
211
    tmp |= fieldname(insn, 12, 4) << 0; \
12627
211
    tmp |= fieldname(insn, 22, 1) << 4; \
12628
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12629
211
    tmp = 0; \
12630
211
    tmp |= fieldname(insn, 7, 1) << 4; \
12631
211
    tmp |= fieldname(insn, 16, 4) << 0; \
12632
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12633
211
    tmp = 0; \
12634
211
    tmp |= fieldname(insn, 0, 4) << 0; \
12635
211
    tmp |= fieldname(insn, 5, 1) << 4; \
12636
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12637
211
    tmp = fieldname(insn, 8, 3); \
12638
211
    MCOperand_CreateImm0(MI, tmp); \
12639
211
    return S; \
12640
211
  case 122: \
12641
87
    tmp = 0; \
12642
87
    tmp |= fieldname(insn, 12, 4) << 0; \
12643
87
    tmp |= fieldname(insn, 22, 1) << 4; \
12644
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12645
87
    tmp = 0; \
12646
86
    tmp |= fieldname(insn, 7, 1) << 4; \
12647
86
    tmp |= fieldname(insn, 16, 4) << 0; \
12648
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12649
86
    tmp = 0; \
12650
85
    tmp |= fieldname(insn, 0, 4) << 0; \
12651
85
    tmp |= fieldname(insn, 5, 1) << 4; \
12652
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12653
85
    tmp = fieldname(insn, 11, 1); \
12654
84
    MCOperand_CreateImm0(MI, tmp); \
12655
84
    return S; \
12656
86
  case 123: \
12657
86
    tmp = 0; \
12658
86
    tmp |= fieldname(insn, 12, 4) << 0; \
12659
86
    tmp |= fieldname(insn, 22, 1) << 4; \
12660
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12661
86
    tmp = 0; \
12662
85
    tmp |= fieldname(insn, 7, 1) << 4; \
12663
85
    tmp |= fieldname(insn, 16, 4) << 0; \
12664
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12665
85
    tmp = 0; \
12666
84
    tmp |= fieldname(insn, 0, 4) << 0; \
12667
84
    tmp |= fieldname(insn, 5, 1) << 4; \
12668
84
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12669
84
    tmp = fieldname(insn, 10, 2); \
12670
82
    MCOperand_CreateImm0(MI, tmp); \
12671
82
    return S; \
12672
117
  case 124: \
12673
117
    tmp = 0; \
12674
117
    tmp |= fieldname(insn, 12, 4) << 0; \
12675
117
    tmp |= fieldname(insn, 22, 1) << 4; \
12676
117
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12677
117
    tmp = 0; \
12678
116
    tmp |= fieldname(insn, 7, 1) << 4; \
12679
116
    tmp |= fieldname(insn, 16, 4) << 0; \
12680
116
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12681
116
    tmp = 0; \
12682
115
    tmp |= fieldname(insn, 0, 4) << 0; \
12683
115
    tmp |= fieldname(insn, 5, 1) << 4; \
12684
115
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12685
115
    tmp = fieldname(insn, 9, 3); \
12686
114
    MCOperand_CreateImm0(MI, tmp); \
12687
114
    return S; \
12688
115
  case 125: \
12689
73
    tmp = 0; \
12690
73
    tmp |= fieldname(insn, 12, 4) << 0; \
12691
73
    tmp |= fieldname(insn, 22, 1) << 4; \
12692
73
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12693
73
    tmp = 0; \
12694
72
    tmp |= fieldname(insn, 7, 1) << 4; \
12695
72
    tmp |= fieldname(insn, 16, 4) << 0; \
12696
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12697
72
    tmp = 0; \
12698
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12699
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12700
71
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12701
71
    tmp = fieldname(insn, 8, 4); \
12702
70
    MCOperand_CreateImm0(MI, tmp); \
12703
70
    return S; \
12704
1.03k
  case 126: \
12705
1.03k
    tmp = 0; \
12706
1.03k
    tmp |= fieldname(insn, 12, 4) << 0; \
12707
1.03k
    tmp |= fieldname(insn, 22, 1) << 4; \
12708
1.03k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12709
1.03k
    tmp = 0; \
12710
1.03k
    tmp |= fieldname(insn, 0, 4) << 0; \
12711
1.03k
    tmp |= fieldname(insn, 5, 1) << 4; \
12712
1.03k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12713
1.03k
    return S; \
12714
1.03k
  case 127: \
12715
644
    tmp = 0; \
12716
644
    tmp |= fieldname(insn, 12, 4) << 0; \
12717
644
    tmp |= fieldname(insn, 22, 1) << 4; \
12718
644
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12719
644
    tmp = 0; \
12720
643
    tmp |= fieldname(insn, 0, 4) << 0; \
12721
643
    tmp |= fieldname(insn, 5, 1) << 4; \
12722
643
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12723
643
    return S; \
12724
643
  case 128: \
12725
71
    tmp = 0; \
12726
71
    tmp |= fieldname(insn, 12, 4) << 0; \
12727
71
    tmp |= fieldname(insn, 22, 1) << 4; \
12728
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12729
71
    tmp = 0; \
12730
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12731
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12732
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12733
71
    tmp = 0; \
12734
71
    tmp |= fieldname(insn, 12, 4) << 0; \
12735
71
    tmp |= fieldname(insn, 22, 1) << 4; \
12736
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12737
71
    tmp = 0; \
12738
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12739
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12740
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12741
71
    return S; \
12742
71
  case 129: \
12743
68
    tmp = 0; \
12744
68
    tmp |= fieldname(insn, 12, 4) << 0; \
12745
68
    tmp |= fieldname(insn, 22, 1) << 4; \
12746
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12747
68
    tmp = 0; \
12748
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12749
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12750
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12751
67
    tmp = 0; \
12752
66
    tmp |= fieldname(insn, 12, 4) << 0; \
12753
66
    tmp |= fieldname(insn, 22, 1) << 4; \
12754
66
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12755
66
    tmp = 0; \
12756
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12757
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12758
66
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12759
66
    return S; \
12760
384
  case 130: \
12761
384
    tmp = 0; \
12762
384
    tmp |= fieldname(insn, 12, 4) << 0; \
12763
384
    tmp |= fieldname(insn, 22, 1) << 4; \
12764
384
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12765
384
    tmp = 0; \
12766
384
    tmp |= fieldname(insn, 0, 4) << 0; \
12767
384
    tmp |= fieldname(insn, 5, 1) << 4; \
12768
384
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12769
384
    return S; \
12770
384
  case 131: \
12771
209
    if (!Check(&S, DecodeVSHLMaxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12772
209
    return S; \
12773
209
  case 132: \
12774
67
    tmp = 0; \
12775
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12776
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12777
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12778
67
    tmp = 0; \
12779
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12780
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12781
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12782
67
    tmp = 0; \
12783
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12784
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12785
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12786
67
    return S; \
12787
73
  case 133: \
12788
73
    tmp = 0; \
12789
73
    tmp |= fieldname(insn, 12, 4) << 0; \
12790
73
    tmp |= fieldname(insn, 22, 1) << 4; \
12791
73
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12792
73
    tmp = 0; \
12793
72
    tmp |= fieldname(insn, 12, 4) << 0; \
12794
72
    tmp |= fieldname(insn, 22, 1) << 4; \
12795
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12796
72
    tmp = 0; \
12797
72
    tmp |= fieldname(insn, 0, 4) << 0; \
12798
72
    tmp |= fieldname(insn, 5, 1) << 4; \
12799
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12800
72
    return S; \
12801
72
  case 134: \
12802
70
    tmp = 0; \
12803
70
    tmp |= fieldname(insn, 12, 4) << 0; \
12804
70
    tmp |= fieldname(insn, 22, 1) << 4; \
12805
70
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12806
70
    tmp = 0; \
12807
69
    tmp |= fieldname(insn, 0, 4) << 0; \
12808
69
    tmp |= fieldname(insn, 5, 1) << 4; \
12809
69
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12810
69
    return S; \
12811
1.65k
  case 135: \
12812
1.65k
    if (!Check(&S, DecodeTBLInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12813
1.65k
    return S; \
12814
1.65k
  case 136: \
12815
66
    tmp = 0; \
12816
66
    tmp |= fieldname(insn, 12, 4) << 0; \
12817
66
    tmp |= fieldname(insn, 22, 1) << 4; \
12818
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12819
66
    tmp = 0; \
12820
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12821
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12822
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12823
66
    tmp = fieldname(insn, 19, 1); \
12824
66
    MCOperand_CreateImm0(MI, tmp); \
12825
66
    return S; \
12826
203
  case 137: \
12827
203
    tmp = 0; \
12828
203
    tmp |= fieldname(insn, 12, 4) << 0; \
12829
203
    tmp |= fieldname(insn, 22, 1) << 4; \
12830
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12831
203
    tmp = 0; \
12832
203
    tmp |= fieldname(insn, 0, 4) << 0; \
12833
203
    tmp |= fieldname(insn, 5, 1) << 4; \
12834
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12835
203
    tmp = fieldname(insn, 18, 2); \
12836
203
    MCOperand_CreateImm0(MI, tmp); \
12837
203
    return S; \
12838
203
  case 138: \
12839
77
    tmp = 0; \
12840
77
    tmp |= fieldname(insn, 12, 4) << 0; \
12841
77
    tmp |= fieldname(insn, 22, 1) << 4; \
12842
77
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12843
77
    tmp = 0; \
12844
77
    tmp |= fieldname(insn, 0, 4) << 0; \
12845
77
    tmp |= fieldname(insn, 5, 1) << 4; \
12846
77
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12847
77
    tmp = fieldname(insn, 17, 3); \
12848
77
    MCOperand_CreateImm0(MI, tmp); \
12849
77
    return S; \
12850
239
  case 139: \
12851
239
    tmp = 0; \
12852
239
    tmp |= fieldname(insn, 12, 4) << 0; \
12853
239
    tmp |= fieldname(insn, 22, 1) << 4; \
12854
239
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12855
239
    tmp = 0; \
12856
238
    tmp |= fieldname(insn, 0, 4) << 0; \
12857
238
    tmp |= fieldname(insn, 5, 1) << 4; \
12858
238
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12859
238
    tmp = fieldname(insn, 19, 1); \
12860
238
    MCOperand_CreateImm0(MI, tmp); \
12861
238
    return S; \
12862
238
  case 140: \
12863
67
    tmp = 0; \
12864
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12865
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12866
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12867
67
    tmp = 0; \
12868
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12869
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12870
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12871
66
    tmp = fieldname(insn, 18, 2); \
12872
66
    MCOperand_CreateImm0(MI, tmp); \
12873
66
    return S; \
12874
83
  case 141: \
12875
83
    tmp = 0; \
12876
83
    tmp |= fieldname(insn, 12, 4) << 0; \
12877
83
    tmp |= fieldname(insn, 22, 1) << 4; \
12878
83
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12879
83
    tmp = 0; \
12880
82
    tmp |= fieldname(insn, 0, 4) << 0; \
12881
82
    tmp |= fieldname(insn, 5, 1) << 4; \
12882
82
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12883
82
    tmp = fieldname(insn, 17, 3); \
12884
82
    MCOperand_CreateImm0(MI, tmp); \
12885
82
    return S; \
12886
107
  case 142: \
12887
107
    tmp = 0; \
12888
107
    tmp |= fieldname(insn, 12, 4) << 0; \
12889
107
    tmp |= fieldname(insn, 22, 1) << 4; \
12890
107
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12891
107
    tmp = 0; \
12892
107
    tmp |= fieldname(insn, 0, 4) << 0; \
12893
107
    tmp |= fieldname(insn, 5, 1) << 4; \
12894
107
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12895
107
    tmp = fieldname(insn, 16, 3); \
12896
107
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12897
107
    return S; \
12898
129
  case 143: \
12899
129
    tmp = 0; \
12900
129
    tmp |= fieldname(insn, 12, 4) << 0; \
12901
129
    tmp |= fieldname(insn, 22, 1) << 4; \
12902
129
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12903
129
    tmp = 0; \
12904
129
    tmp |= fieldname(insn, 0, 4) << 0; \
12905
129
    tmp |= fieldname(insn, 5, 1) << 4; \
12906
129
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12907
129
    tmp = fieldname(insn, 16, 4); \
12908
129
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12909
129
    return S; \
12910
229
  case 144: \
12911
229
    tmp = 0; \
12912
229
    tmp |= fieldname(insn, 12, 4) << 0; \
12913
229
    tmp |= fieldname(insn, 22, 1) << 4; \
12914
229
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12915
229
    tmp = 0; \
12916
229
    tmp |= fieldname(insn, 0, 4) << 0; \
12917
229
    tmp |= fieldname(insn, 5, 1) << 4; \
12918
229
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12919
229
    tmp = fieldname(insn, 16, 5); \
12920
229
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12921
229
    return S; \
12922
229
  case 145: \
12923
104
    tmp = 0; \
12924
104
    tmp |= fieldname(insn, 12, 4) << 0; \
12925
104
    tmp |= fieldname(insn, 22, 1) << 4; \
12926
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12927
104
    tmp = 0; \
12928
104
    tmp |= fieldname(insn, 12, 4) << 0; \
12929
104
    tmp |= fieldname(insn, 22, 1) << 4; \
12930
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12931
104
    tmp = 0; \
12932
104
    tmp |= fieldname(insn, 0, 4) << 0; \
12933
104
    tmp |= fieldname(insn, 5, 1) << 4; \
12934
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12935
104
    tmp = fieldname(insn, 16, 3); \
12936
104
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12937
104
    return S; \
12938
312
  case 146: \
12939
312
    tmp = 0; \
12940
312
    tmp |= fieldname(insn, 12, 4) << 0; \
12941
312
    tmp |= fieldname(insn, 22, 1) << 4; \
12942
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12943
312
    tmp = 0; \
12944
312
    tmp |= fieldname(insn, 12, 4) << 0; \
12945
312
    tmp |= fieldname(insn, 22, 1) << 4; \
12946
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12947
312
    tmp = 0; \
12948
312
    tmp |= fieldname(insn, 0, 4) << 0; \
12949
312
    tmp |= fieldname(insn, 5, 1) << 4; \
12950
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12951
312
    tmp = fieldname(insn, 16, 4); \
12952
312
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12953
312
    return S; \
12954
370
  case 147: \
12955
370
    tmp = 0; \
12956
370
    tmp |= fieldname(insn, 12, 4) << 0; \
12957
370
    tmp |= fieldname(insn, 22, 1) << 4; \
12958
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12959
370
    tmp = 0; \
12960
370
    tmp |= fieldname(insn, 12, 4) << 0; \
12961
370
    tmp |= fieldname(insn, 22, 1) << 4; \
12962
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12963
370
    tmp = 0; \
12964
370
    tmp |= fieldname(insn, 0, 4) << 0; \
12965
370
    tmp |= fieldname(insn, 5, 1) << 4; \
12966
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12967
370
    tmp = fieldname(insn, 16, 5); \
12968
370
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12969
370
    return S; \
12970
370
  case 148: \
12971
239
    tmp = 0; \
12972
239
    tmp |= fieldname(insn, 12, 4) << 0; \
12973
239
    tmp |= fieldname(insn, 22, 1) << 4; \
12974
239
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12975
239
    tmp = 0; \
12976
239
    tmp |= fieldname(insn, 0, 4) << 0; \
12977
239
    tmp |= fieldname(insn, 5, 1) << 4; \
12978
239
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12979
239
    tmp = fieldname(insn, 16, 3); \
12980
239
    MCOperand_CreateImm0(MI, tmp); \
12981
239
    return S; \
12982
239
  case 149: \
12983
67
    tmp = 0; \
12984
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12985
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12986
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12987
67
    tmp = 0; \
12988
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12989
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12990
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12991
67
    tmp = 0; \
12992
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12993
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12994
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12995
67
    tmp = fieldname(insn, 16, 3); \
12996
67
    MCOperand_CreateImm0(MI, tmp); \
12997
67
    return S; \
12998
86
  case 150: \
12999
86
    tmp = 0; \
13000
86
    tmp |= fieldname(insn, 12, 4) << 0; \
13001
86
    tmp |= fieldname(insn, 22, 1) << 4; \
13002
86
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13003
86
    tmp = 0; \
13004
86
    tmp |= fieldname(insn, 0, 4) << 0; \
13005
86
    tmp |= fieldname(insn, 5, 1) << 4; \
13006
86
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13007
86
    tmp = fieldname(insn, 16, 4); \
13008
86
    MCOperand_CreateImm0(MI, tmp); \
13009
86
    return S; \
13010
86
  case 151: \
13011
76
    tmp = 0; \
13012
76
    tmp |= fieldname(insn, 12, 4) << 0; \
13013
76
    tmp |= fieldname(insn, 22, 1) << 4; \
13014
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13015
76
    tmp = 0; \
13016
76
    tmp |= fieldname(insn, 12, 4) << 0; \
13017
76
    tmp |= fieldname(insn, 22, 1) << 4; \
13018
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13019
76
    tmp = 0; \
13020
76
    tmp |= fieldname(insn, 0, 4) << 0; \
13021
76
    tmp |= fieldname(insn, 5, 1) << 4; \
13022
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13023
76
    tmp = fieldname(insn, 16, 4); \
13024
76
    MCOperand_CreateImm0(MI, tmp); \
13025
76
    return S; \
13026
352
  case 152: \
13027
352
    tmp = 0; \
13028
352
    tmp |= fieldname(insn, 12, 4) << 0; \
13029
352
    tmp |= fieldname(insn, 22, 1) << 4; \
13030
352
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13031
352
    tmp = 0; \
13032
352
    tmp |= fieldname(insn, 0, 4) << 0; \
13033
352
    tmp |= fieldname(insn, 5, 1) << 4; \
13034
352
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13035
352
    tmp = fieldname(insn, 16, 5); \
13036
352
    MCOperand_CreateImm0(MI, tmp); \
13037
352
    return S; \
13038
393
  case 153: \
13039
393
    tmp = 0; \
13040
393
    tmp |= fieldname(insn, 12, 4) << 0; \
13041
393
    tmp |= fieldname(insn, 22, 1) << 4; \
13042
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13043
393
    tmp = 0; \
13044
393
    tmp |= fieldname(insn, 12, 4) << 0; \
13045
393
    tmp |= fieldname(insn, 22, 1) << 4; \
13046
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13047
393
    tmp = 0; \
13048
393
    tmp |= fieldname(insn, 0, 4) << 0; \
13049
393
    tmp |= fieldname(insn, 5, 1) << 4; \
13050
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13051
393
    tmp = fieldname(insn, 16, 5); \
13052
393
    MCOperand_CreateImm0(MI, tmp); \
13053
393
    return S; \
13054
393
  case 154: \
13055
99
    tmp = 0; \
13056
99
    tmp |= fieldname(insn, 12, 4) << 0; \
13057
99
    tmp |= fieldname(insn, 22, 1) << 4; \
13058
99
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13059
99
    tmp = 0; \
13060
99
    tmp |= fieldname(insn, 0, 4) << 0; \
13061
99
    tmp |= fieldname(insn, 5, 1) << 4; \
13062
99
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13063
99
    tmp = fieldname(insn, 16, 3); \
13064
97
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13065
97
    return S; \
13066
97
  case 155: \
13067
95
    tmp = 0; \
13068
95
    tmp |= fieldname(insn, 12, 4) << 0; \
13069
95
    tmp |= fieldname(insn, 22, 1) << 4; \
13070
95
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13071
95
    tmp = 0; \
13072
95
    tmp |= fieldname(insn, 0, 4) << 0; \
13073
95
    tmp |= fieldname(insn, 5, 1) << 4; \
13074
95
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13075
95
    tmp = fieldname(insn, 16, 4); \
13076
94
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13077
94
    return S; \
13078
305
  case 156: \
13079
305
    tmp = 0; \
13080
305
    tmp |= fieldname(insn, 12, 4) << 0; \
13081
305
    tmp |= fieldname(insn, 22, 1) << 4; \
13082
305
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13083
305
    tmp = 0; \
13084
305
    tmp |= fieldname(insn, 0, 4) << 0; \
13085
305
    tmp |= fieldname(insn, 5, 1) << 4; \
13086
305
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13087
305
    tmp = fieldname(insn, 16, 5); \
13088
303
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13089
303
    return S; \
13090
303
  case 157: \
13091
85
    tmp = 0; \
13092
85
    tmp |= fieldname(insn, 12, 4) << 0; \
13093
85
    tmp |= fieldname(insn, 22, 1) << 4; \
13094
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13095
85
    tmp = 0; \
13096
84
    tmp |= fieldname(insn, 0, 4) << 0; \
13097
84
    tmp |= fieldname(insn, 5, 1) << 4; \
13098
84
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13099
84
    tmp = fieldname(insn, 16, 3); \
13100
84
    MCOperand_CreateImm0(MI, tmp); \
13101
84
    return S; \
13102
196
  case 158: \
13103
196
    tmp = 0; \
13104
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13105
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13106
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13107
196
    tmp = 0; \
13108
195
    tmp |= fieldname(insn, 0, 4) << 0; \
13109
195
    tmp |= fieldname(insn, 5, 1) << 4; \
13110
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13111
195
    tmp = fieldname(insn, 16, 4); \
13112
195
    MCOperand_CreateImm0(MI, tmp); \
13113
195
    return S; \
13114
196
  case 159: \
13115
196
    tmp = 0; \
13116
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13117
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13118
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13119
196
    tmp = 0; \
13120
194
    tmp |= fieldname(insn, 0, 4) << 0; \
13121
194
    tmp |= fieldname(insn, 5, 1) << 4; \
13122
194
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13123
194
    tmp = fieldname(insn, 16, 5); \
13124
194
    MCOperand_CreateImm0(MI, tmp); \
13125
194
    return S; \
13126
1.67k
  case 160: \
13127
1.67k
    if (!Check(&S, DecodeVCVTD(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13128
1.67k
    return S; \
13129
2.90k
  case 161: \
13130
2.90k
    if (!Check(&S, DecodeNEONModImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13131
2.90k
    return S; \
13132
2.90k
  case 162: \
13133
280
    tmp = 0; \
13134
280
    tmp |= fieldname(insn, 12, 4) << 0; \
13135
280
    tmp |= fieldname(insn, 22, 1) << 4; \
13136
280
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13137
280
    tmp = 0; \
13138
280
    tmp |= fieldname(insn, 0, 4) << 0; \
13139
280
    tmp |= fieldname(insn, 5, 1) << 4; \
13140
280
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13141
280
    tmp = fieldname(insn, 16, 6); \
13142
280
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13143
280
    return S; \
13144
280
  case 163: \
13145
101
    tmp = 0; \
13146
101
    tmp |= fieldname(insn, 12, 4) << 0; \
13147
101
    tmp |= fieldname(insn, 22, 1) << 4; \
13148
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13149
101
    tmp = 0; \
13150
101
    tmp |= fieldname(insn, 12, 4) << 0; \
13151
101
    tmp |= fieldname(insn, 22, 1) << 4; \
13152
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13153
101
    tmp = 0; \
13154
101
    tmp |= fieldname(insn, 0, 4) << 0; \
13155
101
    tmp |= fieldname(insn, 5, 1) << 4; \
13156
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13157
101
    tmp = fieldname(insn, 16, 6); \
13158
101
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13159
101
    return S; \
13160
254
  case 164: \
13161
254
    tmp = 0; \
13162
254
    tmp |= fieldname(insn, 12, 4) << 0; \
13163
254
    tmp |= fieldname(insn, 22, 1) << 4; \
13164
254
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13165
254
    tmp = 0; \
13166
254
    tmp |= fieldname(insn, 0, 4) << 0; \
13167
254
    tmp |= fieldname(insn, 5, 1) << 4; \
13168
254
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13169
254
    tmp = fieldname(insn, 16, 6); \
13170
254
    MCOperand_CreateImm0(MI, tmp); \
13171
254
    return S; \
13172
254
  case 165: \
13173
73
    tmp = 0; \
13174
73
    tmp |= fieldname(insn, 12, 4) << 0; \
13175
73
    tmp |= fieldname(insn, 22, 1) << 4; \
13176
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13177
73
    tmp = 0; \
13178
73
    tmp |= fieldname(insn, 12, 4) << 0; \
13179
73
    tmp |= fieldname(insn, 22, 1) << 4; \
13180
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13181
73
    tmp = 0; \
13182
73
    tmp |= fieldname(insn, 0, 4) << 0; \
13183
73
    tmp |= fieldname(insn, 5, 1) << 4; \
13184
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13185
73
    tmp = fieldname(insn, 16, 6); \
13186
73
    MCOperand_CreateImm0(MI, tmp); \
13187
73
    return S; \
13188
86
  case 166: \
13189
86
    tmp = 0; \
13190
86
    tmp |= fieldname(insn, 12, 4) << 0; \
13191
86
    tmp |= fieldname(insn, 22, 1) << 4; \
13192
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13193
86
    tmp = 0; \
13194
85
    tmp |= fieldname(insn, 0, 4) << 0; \
13195
85
    tmp |= fieldname(insn, 5, 1) << 4; \
13196
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13197
85
    tmp = fieldname(insn, 16, 3); \
13198
84
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13199
84
    return S; \
13200
202
  case 167: \
13201
202
    tmp = 0; \
13202
202
    tmp |= fieldname(insn, 12, 4) << 0; \
13203
202
    tmp |= fieldname(insn, 22, 1) << 4; \
13204
202
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13205
202
    tmp = 0; \
13206
200
    tmp |= fieldname(insn, 0, 4) << 0; \
13207
200
    tmp |= fieldname(insn, 5, 1) << 4; \
13208
200
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13209
200
    tmp = fieldname(insn, 16, 4); \
13210
199
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13211
199
    return S; \
13212
235
  case 168: \
13213
235
    tmp = 0; \
13214
235
    tmp |= fieldname(insn, 12, 4) << 0; \
13215
235
    tmp |= fieldname(insn, 22, 1) << 4; \
13216
235
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13217
235
    tmp = 0; \
13218
234
    tmp |= fieldname(insn, 0, 4) << 0; \
13219
234
    tmp |= fieldname(insn, 5, 1) << 4; \
13220
234
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13221
234
    tmp = fieldname(insn, 16, 5); \
13222
232
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13223
232
    return S; \
13224
232
  case 169: \
13225
68
    tmp = 0; \
13226
68
    tmp |= fieldname(insn, 12, 4) << 0; \
13227
68
    tmp |= fieldname(insn, 22, 1) << 4; \
13228
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13229
68
    tmp = 0; \
13230
67
    tmp |= fieldname(insn, 12, 4) << 0; \
13231
67
    tmp |= fieldname(insn, 22, 1) << 4; \
13232
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13233
67
    tmp = 0; \
13234
67
    tmp |= fieldname(insn, 0, 4) << 0; \
13235
67
    tmp |= fieldname(insn, 5, 1) << 4; \
13236
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13237
67
    tmp = fieldname(insn, 16, 3); \
13238
66
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13239
66
    return S; \
13240
430
  case 170: \
13241
430
    tmp = 0; \
13242
430
    tmp |= fieldname(insn, 12, 4) << 0; \
13243
430
    tmp |= fieldname(insn, 22, 1) << 4; \
13244
430
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13245
430
    tmp = 0; \
13246
429
    tmp |= fieldname(insn, 12, 4) << 0; \
13247
429
    tmp |= fieldname(insn, 22, 1) << 4; \
13248
429
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13249
429
    tmp = 0; \
13250
429
    tmp |= fieldname(insn, 0, 4) << 0; \
13251
429
    tmp |= fieldname(insn, 5, 1) << 4; \
13252
429
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13253
429
    tmp = fieldname(insn, 16, 4); \
13254
428
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13255
428
    return S; \
13256
428
  case 171: \
13257
114
    tmp = 0; \
13258
114
    tmp |= fieldname(insn, 12, 4) << 0; \
13259
114
    tmp |= fieldname(insn, 22, 1) << 4; \
13260
114
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13261
114
    tmp = 0; \
13262
112
    tmp |= fieldname(insn, 12, 4) << 0; \
13263
112
    tmp |= fieldname(insn, 22, 1) << 4; \
13264
112
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13265
112
    tmp = 0; \
13266
112
    tmp |= fieldname(insn, 0, 4) << 0; \
13267
112
    tmp |= fieldname(insn, 5, 1) << 4; \
13268
112
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13269
112
    tmp = fieldname(insn, 16, 5); \
13270
111
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13271
111
    return S; \
13272
199
  case 172: \
13273
199
    tmp = 0; \
13274
199
    tmp |= fieldname(insn, 12, 4) << 0; \
13275
199
    tmp |= fieldname(insn, 22, 1) << 4; \
13276
199
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13277
199
    tmp = 0; \
13278
198
    tmp |= fieldname(insn, 0, 4) << 0; \
13279
198
    tmp |= fieldname(insn, 5, 1) << 4; \
13280
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13281
198
    tmp = fieldname(insn, 16, 3); \
13282
197
    MCOperand_CreateImm0(MI, tmp); \
13283
197
    return S; \
13284
198
  case 173: \
13285
196
    tmp = 0; \
13286
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13287
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13288
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13289
196
    tmp = 0; \
13290
195
    tmp |= fieldname(insn, 12, 4) << 0; \
13291
195
    tmp |= fieldname(insn, 22, 1) << 4; \
13292
195
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13293
195
    tmp = 0; \
13294
195
    tmp |= fieldname(insn, 0, 4) << 0; \
13295
195
    tmp |= fieldname(insn, 5, 1) << 4; \
13296
195
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13297
195
    tmp = fieldname(insn, 16, 3); \
13298
194
    MCOperand_CreateImm0(MI, tmp); \
13299
194
    return S; \
13300
195
  case 174: \
13301
80
    tmp = 0; \
13302
80
    tmp |= fieldname(insn, 12, 4) << 0; \
13303
80
    tmp |= fieldname(insn, 22, 1) << 4; \
13304
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13305
80
    tmp = 0; \
13306
79
    tmp |= fieldname(insn, 0, 4) << 0; \
13307
79
    tmp |= fieldname(insn, 5, 1) << 4; \
13308
79
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13309
79
    tmp = fieldname(insn, 16, 4); \
13310
78
    MCOperand_CreateImm0(MI, tmp); \
13311
78
    return S; \
13312
79
  case 175: \
13313
68
    tmp = 0; \
13314
68
    tmp |= fieldname(insn, 12, 4) << 0; \
13315
68
    tmp |= fieldname(insn, 22, 1) << 4; \
13316
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13317
68
    tmp = 0; \
13318
67
    tmp |= fieldname(insn, 12, 4) << 0; \
13319
67
    tmp |= fieldname(insn, 22, 1) << 4; \
13320
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13321
67
    tmp = 0; \
13322
67
    tmp |= fieldname(insn, 0, 4) << 0; \
13323
67
    tmp |= fieldname(insn, 5, 1) << 4; \
13324
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13325
67
    tmp = fieldname(insn, 16, 4); \
13326
66
    MCOperand_CreateImm0(MI, tmp); \
13327
66
    return S; \
13328
241
  case 176: \
13329
241
    tmp = 0; \
13330
241
    tmp |= fieldname(insn, 12, 4) << 0; \
13331
241
    tmp |= fieldname(insn, 22, 1) << 4; \
13332
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13333
241
    tmp = 0; \
13334
239
    tmp |= fieldname(insn, 0, 4) << 0; \
13335
239
    tmp |= fieldname(insn, 5, 1) << 4; \
13336
239
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13337
239
    tmp = fieldname(insn, 16, 5); \
13338
238
    MCOperand_CreateImm0(MI, tmp); \
13339
238
    return S; \
13340
239
  case 177: \
13341
88
    tmp = 0; \
13342
88
    tmp |= fieldname(insn, 12, 4) << 0; \
13343
88
    tmp |= fieldname(insn, 22, 1) << 4; \
13344
88
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13345
88
    tmp = 0; \
13346
87
    tmp |= fieldname(insn, 12, 4) << 0; \
13347
87
    tmp |= fieldname(insn, 22, 1) << 4; \
13348
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13349
87
    tmp = 0; \
13350
87
    tmp |= fieldname(insn, 0, 4) << 0; \
13351
87
    tmp |= fieldname(insn, 5, 1) << 4; \
13352
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13353
87
    tmp = fieldname(insn, 16, 5); \
13354
86
    MCOperand_CreateImm0(MI, tmp); \
13355
86
    return S; \
13356
1.56k
  case 178: \
13357
1.56k
    if (!Check(&S, DecodeVCVTQ(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13358
1.56k
    return S; \
13359
1.56k
  case 179: \
13360
274
    tmp = 0; \
13361
274
    tmp |= fieldname(insn, 12, 4) << 0; \
13362
274
    tmp |= fieldname(insn, 22, 1) << 4; \
13363
274
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13364
274
    tmp = 0; \
13365
270
    tmp |= fieldname(insn, 0, 4) << 0; \
13366
270
    tmp |= fieldname(insn, 5, 1) << 4; \
13367
270
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13368
270
    tmp = fieldname(insn, 16, 6); \
13369
267
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13370
267
    return S; \
13371
267
  case 180: \
13372
245
    tmp = 0; \
13373
245
    tmp |= fieldname(insn, 12, 4) << 0; \
13374
245
    tmp |= fieldname(insn, 22, 1) << 4; \
13375
245
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13376
245
    tmp = 0; \
13377
241
    tmp |= fieldname(insn, 12, 4) << 0; \
13378
241
    tmp |= fieldname(insn, 22, 1) << 4; \
13379
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13380
241
    tmp = 0; \
13381
241
    tmp |= fieldname(insn, 0, 4) << 0; \
13382
241
    tmp |= fieldname(insn, 5, 1) << 4; \
13383
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13384
241
    tmp = fieldname(insn, 16, 6); \
13385
238
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13386
238
    return S; \
13387
238
  case 181: \
13388
72
    tmp = 0; \
13389
72
    tmp |= fieldname(insn, 12, 4) << 0; \
13390
72
    tmp |= fieldname(insn, 22, 1) << 4; \
13391
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13392
72
    tmp = 0; \
13393
70
    tmp |= fieldname(insn, 0, 4) << 0; \
13394
70
    tmp |= fieldname(insn, 5, 1) << 4; \
13395
70
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13396
70
    tmp = fieldname(insn, 16, 6); \
13397
67
    MCOperand_CreateImm0(MI, tmp); \
13398
67
    return S; \
13399
198
  case 182: \
13400
198
    tmp = 0; \
13401
198
    tmp |= fieldname(insn, 12, 4) << 0; \
13402
198
    tmp |= fieldname(insn, 22, 1) << 4; \
13403
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13404
198
    tmp = 0; \
13405
197
    tmp |= fieldname(insn, 12, 4) << 0; \
13406
197
    tmp |= fieldname(insn, 22, 1) << 4; \
13407
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13408
197
    tmp = 0; \
13409
197
    tmp |= fieldname(insn, 0, 4) << 0; \
13410
197
    tmp |= fieldname(insn, 5, 1) << 4; \
13411
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13412
197
    tmp = fieldname(insn, 16, 6); \
13413
196
    MCOperand_CreateImm0(MI, tmp); \
13414
196
    return S; \
13415
257
  case 183: \
13416
257
    tmp = 0; \
13417
257
    tmp |= fieldname(insn, 7, 1) << 4; \
13418
257
    tmp |= fieldname(insn, 16, 4) << 0; \
13419
257
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13420
257
    tmp = 0; \
13421
257
    tmp |= fieldname(insn, 7, 1) << 4; \
13422
257
    tmp |= fieldname(insn, 16, 4) << 0; \
13423
257
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13424
257
    tmp = fieldname(insn, 12, 4); \
13425
257
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13426
257
    tmp = fieldname(insn, 21, 1); \
13427
257
    MCOperand_CreateImm0(MI, tmp); \
13428
257
    tmp = fieldname(insn, 28, 4); \
13429
257
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13430
257
    return S; \
13431
296
  case 184: \
13432
296
    tmp = fieldname(insn, 12, 4); \
13433
296
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13434
296
    tmp = 0; \
13435
296
    tmp |= fieldname(insn, 7, 1) << 4; \
13436
296
    tmp |= fieldname(insn, 16, 4) << 0; \
13437
296
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13438
296
    tmp = fieldname(insn, 21, 1); \
13439
296
    MCOperand_CreateImm0(MI, tmp); \
13440
296
    tmp = fieldname(insn, 28, 4); \
13441
296
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13442
296
    return S; \
13443
296
  case 185: \
13444
195
    tmp = 0; \
13445
195
    tmp |= fieldname(insn, 7, 1) << 4; \
13446
195
    tmp |= fieldname(insn, 16, 4) << 0; \
13447
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13448
195
    tmp = 0; \
13449
195
    tmp |= fieldname(insn, 7, 1) << 4; \
13450
195
    tmp |= fieldname(insn, 16, 4) << 0; \
13451
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13452
195
    tmp = fieldname(insn, 12, 4); \
13453
195
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13454
195
    tmp = 0; \
13455
195
    tmp |= fieldname(insn, 6, 1) << 0; \
13456
195
    tmp |= fieldname(insn, 21, 1) << 1; \
13457
195
    MCOperand_CreateImm0(MI, tmp); \
13458
195
    tmp = fieldname(insn, 28, 4); \
13459
195
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13460
195
    return S; \
13461
195
  case 186: \
13462
68
    tmp = fieldname(insn, 12, 4); \
13463
68
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13464
68
    tmp = 0; \
13465
68
    tmp |= fieldname(insn, 7, 1) << 4; \
13466
68
    tmp |= fieldname(insn, 16, 4) << 0; \
13467
68
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13468
68
    tmp = 0; \
13469
68
    tmp |= fieldname(insn, 6, 1) << 0; \
13470
68
    tmp |= fieldname(insn, 21, 1) << 1; \
13471
68
    MCOperand_CreateImm0(MI, tmp); \
13472
68
    tmp = fieldname(insn, 28, 4); \
13473
68
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13474
68
    return S; \
13475
403
  case 187: \
13476
403
    tmp = 0; \
13477
403
    tmp |= fieldname(insn, 7, 1) << 4; \
13478
403
    tmp |= fieldname(insn, 16, 4) << 0; \
13479
403
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13480
403
    tmp = 0; \
13481
403
    tmp |= fieldname(insn, 7, 1) << 4; \
13482
403
    tmp |= fieldname(insn, 16, 4) << 0; \
13483
403
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13484
403
    tmp = fieldname(insn, 12, 4); \
13485
403
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13486
403
    tmp = 0; \
13487
403
    tmp |= fieldname(insn, 5, 2) << 0; \
13488
403
    tmp |= fieldname(insn, 21, 1) << 2; \
13489
403
    MCOperand_CreateImm0(MI, tmp); \
13490
403
    tmp = fieldname(insn, 28, 4); \
13491
403
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13492
403
    return S; \
13493
406
  case 188: \
13494
406
    tmp = fieldname(insn, 12, 4); \
13495
406
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13496
406
    tmp = 0; \
13497
406
    tmp |= fieldname(insn, 7, 1) << 4; \
13498
406
    tmp |= fieldname(insn, 16, 4) << 0; \
13499
406
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13500
406
    tmp = 0; \
13501
406
    tmp |= fieldname(insn, 5, 2) << 0; \
13502
406
    tmp |= fieldname(insn, 21, 1) << 2; \
13503
406
    MCOperand_CreateImm0(MI, tmp); \
13504
406
    tmp = fieldname(insn, 28, 4); \
13505
406
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13506
406
    return S; \
13507
406
  case 189: \
13508
202
    tmp = 0; \
13509
202
    tmp |= fieldname(insn, 7, 1) << 4; \
13510
202
    tmp |= fieldname(insn, 16, 4) << 0; \
13511
202
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13512
202
    tmp = fieldname(insn, 12, 4); \
13513
202
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13514
202
    tmp = fieldname(insn, 28, 4); \
13515
202
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13516
202
    return S; \
13517
202
  case 190: \
13518
104
    tmp = 0; \
13519
104
    tmp |= fieldname(insn, 7, 1) << 4; \
13520
104
    tmp |= fieldname(insn, 16, 4) << 0; \
13521
104
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13522
104
    tmp = fieldname(insn, 12, 4); \
13523
103
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13524
103
    tmp = fieldname(insn, 28, 4); \
13525
103
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13526
103
    return S; \
13527
5.36k
  case 191: \
13528
5.36k
    if (!Check(&S, DecodeVLDST4Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13529
5.36k
    return S; \
13530
5.36k
  case 192: \
13531
1.90k
    if (!Check(&S, DecodeVST1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13532
1.90k
    return S; \
13533
1.90k
  case 193: \
13534
1.32k
    if (!Check(&S, DecodeVLD1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13535
1.32k
    return S; \
13536
2.64k
  case 194: \
13537
2.64k
    if (!Check(&S, DecodeVST2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13538
2.64k
    return S; \
13539
2.64k
  case 195: \
13540
2.45k
    if (!Check(&S, DecodeVLD2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13541
2.45k
    return S; \
13542
14.1k
  case 196: \
13543
14.1k
    if (!Check(&S, DecodeVLDST1Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13544
14.1k
    return S; \
13545
14.1k
  case 197: \
13546
1.20k
    if (!Check(&S, DecodeVST3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13547
1.20k
    return S; \
13548
1.45k
  case 198: \
13549
1.45k
    if (!Check(&S, DecodeVLD3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13550
1.45k
    return S; \
13551
11.8k
  case 199: \
13552
11.8k
    if (!Check(&S, DecodeVLDST2Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13553
11.8k
    return S; \
13554
11.8k
  case 200: \
13555
1.75k
    if (!Check(&S, DecodeVST4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13556
1.75k
    return S; \
13557
1.75k
  case 201: \
13558
1.71k
    if (!Check(&S, DecodeVLD4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13559
1.71k
    return S; \
13560
5.42k
  case 202: \
13561
5.42k
    if (!Check(&S, DecodeVLDST3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13562
5.42k
    return S; \
13563
5.42k
  case 203: \
13564
783
    if (!Check(&S, DecodeVLD1DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13565
783
    return S; \
13566
2.98k
  case 204: \
13567
2.98k
    if (!Check(&S, DecodeVLD2DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13568
2.98k
    return S; \
13569
2.98k
  case 205: \
13570
719
    if (!Check(&S, DecodeVLD3DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13571
719
    return S; \
13572
891
  case 206: \
13573
891
    if (!Check(&S, DecodeVLD4DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13574
891
    return S; \
13575
39.2k
  case 207: \
13576
39.2k
    tmp = fieldname(insn, 0, 3); \
13577
39.2k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13578
39.2k
    tmp = fieldname(insn, 3, 3); \
13579
39.2k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13580
39.2k
    return S; \
13581
39.2k
  case 208: \
13582
22.7k
    tmp = fieldname(insn, 8, 3); \
13583
22.7k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13584
22.7k
    tmp = fieldname(insn, 0, 8); \
13585
22.7k
    MCOperand_CreateImm0(MI, tmp); \
13586
22.7k
    return S; \
13587
22.7k
  case 209: \
13588
421
    if (!Check(&S, DecodeThumbAddSPReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13589
421
    return S; \
13590
1.52k
  case 210: \
13591
1.52k
    tmp = 0; \
13592
1.52k
    tmp |= fieldname(insn, 0, 3) << 0; \
13593
1.52k
    tmp |= fieldname(insn, 7, 1) << 3; \
13594
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13595
1.52k
    tmp = 0; \
13596
1.52k
    tmp |= fieldname(insn, 0, 3) << 0; \
13597
1.52k
    tmp |= fieldname(insn, 7, 1) << 3; \
13598
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13599
1.52k
    tmp = fieldname(insn, 3, 4); \
13600
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13601
1.52k
    return S; \
13602
1.52k
  case 211: \
13603
1.37k
    tmp = 0; \
13604
1.37k
    tmp |= fieldname(insn, 0, 3) << 0; \
13605
1.37k
    tmp |= fieldname(insn, 7, 1) << 3; \
13606
1.37k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13607
1.37k
    tmp = fieldname(insn, 3, 4); \
13608
1.37k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13609
1.37k
    return S; \
13610
1.37k
  case 212: \
13611
1.06k
    tmp = fieldname(insn, 3, 4); \
13612
1.06k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13613
1.06k
    return S; \
13614
1.06k
  case 213: \
13615
437
    tmp = fieldname(insn, 3, 4); \
13616
437
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13617
437
    return S; \
13618
10.8k
  case 214: \
13619
10.8k
    tmp = fieldname(insn, 8, 3); \
13620
10.8k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13621
10.8k
    tmp = fieldname(insn, 0, 8); \
13622
10.8k
    if (!Check(&S, DecodeThumbAddrModePC(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13623
10.8k
    return S; \
13624
10.9k
  case 215: \
13625
10.9k
    tmp = fieldname(insn, 0, 3); \
13626
10.9k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13627
10.9k
    tmp = fieldname(insn, 3, 6); \
13628
10.9k
    if (!Check(&S, DecodeThumbAddrModeRR(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13629
10.9k
    return S; \
13630
77.5k
  case 216: \
13631
77.5k
    tmp = fieldname(insn, 0, 3); \
13632
77.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13633
77.5k
    tmp = fieldname(insn, 3, 8); \
13634
77.5k
    if (!Check(&S, DecodeThumbAddrModeIS(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13635
77.5k
    return S; \
13636
77.5k
  case 217: \
13637
11.8k
    tmp = fieldname(insn, 8, 3); \
13638
11.8k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13639
11.8k
    tmp = fieldname(insn, 0, 8); \
13640
11.8k
    if (!Check(&S, DecodeThumbAddrModeSP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13641
11.8k
    return S; \
13642
15.7k
  case 218: \
13643
15.7k
    if (!Check(&S, DecodeThumbAddSpecialReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13644
15.7k
    return S; \
13645
15.7k
  case 219: \
13646
828
    if (!Check(&S, DecodeThumbAddSPImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13647
828
    return S; \
13648
2.71k
  case 220: \
13649
2.71k
    tmp = fieldname(insn, 0, 3); \
13650
2.71k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13651
2.71k
    tmp = 0; \
13652
2.71k
    tmp |= fieldname(insn, 3, 5) << 0; \
13653
2.71k
    tmp |= fieldname(insn, 9, 1) << 5; \
13654
2.71k
    if (!Check(&S, DecodeThumbCmpBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13655
2.71k
    return S; \
13656
2.71k
  case 221: \
13657
1.61k
    tmp = 0; \
13658
1.61k
    tmp |= fieldname(insn, 0, 8) << 0; \
13659
1.61k
    tmp |= fieldname(insn, 8, 1) << 14; \
13660
1.61k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13661
1.61k
    return S; \
13662
1.61k
  case 222: \
13663
756
    tmp = fieldname(insn, 3, 1); \
13664
756
    MCOperand_CreateImm0(MI, tmp); \
13665
756
    return S; \
13666
1.61k
  case 223: \
13667
305
    if (!Check(&S, DecodeThumbCPS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13668
305
    return S; \
13669
305
  case 224: \
13670
266
    tmp = fieldname(insn, 0, 6); \
13671
266
    MCOperand_CreateImm0(MI, tmp); \
13672
266
    return S; \
13673
1.54k
  case 225: \
13674
1.54k
    tmp = 0; \
13675
1.54k
    tmp |= fieldname(insn, 0, 8) << 0; \
13676
1.54k
    tmp |= fieldname(insn, 8, 1) << 15; \
13677
1.54k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13678
1.54k
    return S; \
13679
6.16k
  case 226: \
13680
6.16k
    tmp = fieldname(insn, 0, 8); \
13681
6.16k
    MCOperand_CreateImm0(MI, tmp); \
13682
6.16k
    return S; \
13683
3.47k
  case 227: \
13684
3.47k
    tmp = fieldname(insn, 4, 4); \
13685
3.47k
    MCOperand_CreateImm0(MI, tmp); \
13686
3.47k
    return S; \
13687
6.54k
  case 228: \
13688
6.54k
    tmp = fieldname(insn, 8, 3); \
13689
6.54k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13690
6.54k
    tmp = fieldname(insn, 8, 3); \
13691
6.54k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13692
6.54k
    tmp = fieldname(insn, 0, 8); \
13693
6.54k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13694
6.54k
    return S; \
13695
7.20k
  case 229: \
13696
7.20k
    tmp = fieldname(insn, 8, 3); \
13697
7.20k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13698
7.20k
    tmp = fieldname(insn, 0, 8); \
13699
7.20k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13700
7.20k
    return S; \
13701
13.0k
  case 230: \
13702
13.0k
    tmp = fieldname(insn, 0, 8); \
13703
13.0k
    if (!Check(&S, DecodeThumbBCCTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13704
13.0k
    tmp = fieldname(insn, 8, 4); \
13705
13.0k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13706
13.0k
    return S; \
13707
13.0k
  case 231: \
13708
4.37k
    tmp = fieldname(insn, 0, 11); \
13709
4.37k
    if (!Check(&S, DecodeThumbBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13710
4.37k
    return S; \
13711
4.37k
  case 232: \
13712
424
    tmp = 0; \
13713
424
    tmp |= fieldname(insn, 1, 10) << 1; \
13714
424
    tmp |= fieldname(insn, 11, 1) << 21; \
13715
424
    tmp |= fieldname(insn, 13, 1) << 22; \
13716
424
    tmp |= fieldname(insn, 16, 10) << 11; \
13717
424
    tmp |= fieldname(insn, 26, 1) << 23; \
13718
424
    if (!Check(&S, DecodeThumbBLXOffset(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13719
424
    return S; \
13720
2.11k
  case 233: \
13721
2.11k
    tmp = 0; \
13722
2.11k
    tmp |= fieldname(insn, 0, 11) << 0; \
13723
2.11k
    tmp |= fieldname(insn, 11, 1) << 21; \
13724
2.11k
    tmp |= fieldname(insn, 13, 1) << 22; \
13725
2.11k
    tmp |= fieldname(insn, 16, 10) << 11; \
13726
2.11k
    tmp |= fieldname(insn, 26, 1) << 23; \
13727
2.11k
    if (!Check(&S, DecodeThumbBLTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13728
2.11k
    return S; \
13729
9.10k
  case 234: \
13730
9.10k
    if (!Check(&S, DecodeIT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13731
9.10k
    return S; \
13732
9.10k
  case 235: \
13733
248
    tmp = fieldname(insn, 16, 4); \
13734
248
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13735
248
    tmp = 0; \
13736
248
    tmp |= fieldname(insn, 0, 13) << 0; \
13737
248
    tmp |= fieldname(insn, 14, 1) << 14; \
13738
248
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13739
248
    return S; \
13740
495
  case 236: \
13741
495
    tmp = fieldname(insn, 16, 4); \
13742
495
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13743
495
    tmp = fieldname(insn, 0, 16); \
13744
495
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13745
495
    return S; \
13746
899
  case 237: \
13747
899
    tmp = fieldname(insn, 16, 4); \
13748
899
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13749
899
    tmp = fieldname(insn, 0, 4); \
13750
899
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13751
899
    return S; \
13752
899
  case 238: \
13753
587
    tmp = fieldname(insn, 16, 4); \
13754
587
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13755
587
    tmp = 0; \
13756
587
    tmp |= fieldname(insn, 0, 4) << 0; \
13757
587
    tmp |= fieldname(insn, 4, 4) << 5; \
13758
587
    tmp |= fieldname(insn, 12, 3) << 9; \
13759
587
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13760
587
    return S; \
13761
1.40k
  case 239: \
13762
1.40k
    tmp = fieldname(insn, 8, 4); \
13763
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13764
1.40k
    tmp = fieldname(insn, 16, 4); \
13765
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13766
1.40k
    tmp = fieldname(insn, 0, 4); \
13767
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13768
1.40k
    tmp = fieldname(insn, 20, 1); \
13769
1.40k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13770
1.40k
    return S; \
13771
1.49k
  case 240: \
13772
1.49k
    tmp = fieldname(insn, 8, 4); \
13773
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13774
1.49k
    tmp = fieldname(insn, 16, 4); \
13775
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13776
1.49k
    tmp = 0; \
13777
1.49k
    tmp |= fieldname(insn, 0, 4) << 0; \
13778
1.49k
    tmp |= fieldname(insn, 4, 4) << 5; \
13779
1.49k
    tmp |= fieldname(insn, 12, 3) << 9; \
13780
1.49k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13781
1.49k
    tmp = fieldname(insn, 20, 1); \
13782
1.49k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13783
1.49k
    return S; \
13784
1.49k
  case 241: \
13785
993
    tmp = fieldname(insn, 8, 4); \
13786
993
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13787
993
    tmp = fieldname(insn, 16, 4); \
13788
993
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13789
993
    tmp = fieldname(insn, 0, 4); \
13790
993
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13791
993
    tmp = fieldname(insn, 20, 1); \
13792
993
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13793
993
    return S; \
13794
1.33k
  case 242: \
13795
1.33k
    tmp = fieldname(insn, 8, 4); \
13796
1.33k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13797
1.33k
    tmp = fieldname(insn, 16, 4); \
13798
1.33k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13799
1.33k
    tmp = 0; \
13800
1.33k
    tmp |= fieldname(insn, 0, 4) << 0; \
13801
1.33k
    tmp |= fieldname(insn, 4, 4) << 5; \
13802
1.33k
    tmp |= fieldname(insn, 12, 3) << 9; \
13803
1.33k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13804
1.33k
    tmp = fieldname(insn, 20, 1); \
13805
1.33k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13806
1.33k
    return S; \
13807
1.33k
  case 243: \
13808
386
    tmp = fieldname(insn, 16, 4); \
13809
386
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13810
386
    tmp = fieldname(insn, 16, 4); \
13811
386
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13812
386
    tmp = 0; \
13813
386
    tmp |= fieldname(insn, 0, 13) << 0; \
13814
386
    tmp |= fieldname(insn, 14, 1) << 14; \
13815
386
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13816
386
    return S; \
13817
848
  case 244: \
13818
848
    tmp = fieldname(insn, 16, 4); \
13819
848
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13820
848
    tmp = fieldname(insn, 16, 4); \
13821
848
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13822
848
    tmp = fieldname(insn, 0, 16); \
13823
848
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13824
848
    return S; \
13825
848
  case 245: \
13826
218
    tmp = fieldname(insn, 8, 4); \
13827
218
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13828
218
    tmp = fieldname(insn, 16, 4); \
13829
218
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13830
218
    return S; \
13831
1.47k
  case 246: \
13832
1.47k
    tmp = fieldname(insn, 8, 4); \
13833
1.47k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13834
1.47k
    tmp = fieldname(insn, 12, 4); \
13835
1.47k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13836
1.47k
    tmp = 0; \
13837
1.47k
    tmp |= fieldname(insn, 0, 8) << 0; \
13838
1.47k
    tmp |= fieldname(insn, 16, 4) << 8; \
13839
1.47k
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13840
1.47k
    return S; \
13841
1.47k
  case 247: \
13842
897
    tmp = fieldname(insn, 0, 4); \
13843
897
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13844
897
    tmp = fieldname(insn, 12, 4); \
13845
897
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13846
897
    tmp = fieldname(insn, 16, 4); \
13847
897
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13848
897
    return S; \
13849
1.33k
  case 248: \
13850
1.33k
    tmp = fieldname(insn, 0, 4); \
13851
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13852
1.33k
    tmp = fieldname(insn, 12, 4); \
13853
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13854
1.33k
    tmp = fieldname(insn, 8, 4); \
13855
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13856
1.33k
    tmp = fieldname(insn, 16, 4); \
13857
1.33k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13858
1.33k
    return S; \
13859
1.33k
  case 249: \
13860
783
    tmp = fieldname(insn, 12, 4); \
13861
783
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13862
783
    tmp = fieldname(insn, 16, 4); \
13863
783
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13864
783
    return S; \
13865
783
  case 250: \
13866
635
    tmp = fieldname(insn, 12, 4); \
13867
635
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13868
635
    tmp = 0; \
13869
635
    tmp |= fieldname(insn, 0, 8) << 0; \
13870
635
    tmp |= fieldname(insn, 16, 4) << 8; \
13871
635
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13872
635
    return S; \
13873
968
  case 251: \
13874
968
    if (!Check(&S, DecodeThumbTableBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13875
968
    return S; \
13876
1.76k
  case 252: \
13877
1.76k
    tmp = fieldname(insn, 12, 4); \
13878
1.76k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13879
1.76k
    tmp = fieldname(insn, 8, 4); \
13880
1.76k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13881
1.76k
    tmp = fieldname(insn, 16, 4); \
13882
1.76k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13883
1.76k
    return S; \
13884
1.76k
  case 253: \
13885
1.09k
    tmp = fieldname(insn, 12, 4); \
13886
1.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13887
1.09k
    tmp = fieldname(insn, 8, 4); \
13888
1.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13889
1.09k
    tmp = 0; \
13890
1.09k
    tmp |= fieldname(insn, 0, 8) << 0; \
13891
1.09k
    tmp |= fieldname(insn, 16, 4) << 9; \
13892
1.09k
    tmp |= fieldname(insn, 23, 1) << 8; \
13893
1.09k
    if (!Check(&S, DecodeT2AddrModeImm8s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13894
1.09k
    return S; \
13895
1.09k
  case 254: \
13896
659
    tmp = fieldname(insn, 8, 4); \
13897
659
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13898
659
    tmp = fieldname(insn, 0, 4); \
13899
659
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13900
659
    tmp = fieldname(insn, 20, 1); \
13901
659
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13902
659
    return S; \
13903
774
  case 255: \
13904
774
    tmp = fieldname(insn, 8, 4); \
13905
774
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13906
774
    tmp = fieldname(insn, 0, 4); \
13907
774
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13908
774
    tmp = fieldname(insn, 20, 1); \
13909
774
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13910
774
    return S; \
13911
1.25k
  case 256: \
13912
1.25k
    tmp = fieldname(insn, 8, 4); \
13913
1.25k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13914
1.25k
    tmp = fieldname(insn, 0, 4); \
13915
1.25k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13916
1.25k
    tmp = 0; \
13917
1.25k
    tmp |= fieldname(insn, 6, 2) << 0; \
13918
1.25k
    tmp |= fieldname(insn, 12, 3) << 2; \
13919
1.25k
    MCOperand_CreateImm0(MI, tmp); \
13920
1.25k
    tmp = fieldname(insn, 20, 1); \
13921
1.25k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13922
1.25k
    return S; \
13923
1.25k
  case 257: \
13924
1.06k
    tmp = fieldname(insn, 8, 4); \
13925
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13926
1.06k
    tmp = fieldname(insn, 16, 4); \
13927
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13928
1.06k
    tmp = fieldname(insn, 0, 4); \
13929
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13930
1.06k
    tmp = 0; \
13931
1.06k
    tmp |= fieldname(insn, 6, 2) << 0; \
13932
1.06k
    tmp |= fieldname(insn, 12, 3) << 2; \
13933
1.06k
    MCOperand_CreateImm0(MI, tmp); \
13934
1.06k
    return S; \
13935
1.26k
  case 258: \
13936
1.26k
    tmp = fieldname(insn, 16, 4); \
13937
1.26k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13938
1.26k
    tmp = fieldname(insn, 12, 4); \
13939
1.26k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13940
1.26k
    tmp = fieldname(insn, 8, 4); \
13941
1.26k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13942
1.26k
    tmp = fieldname(insn, 16, 4); \
13943
1.26k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13944
1.26k
    tmp = 0; \
13945
1.26k
    tmp |= fieldname(insn, 0, 8) << 0; \
13946
1.26k
    tmp |= fieldname(insn, 23, 1) << 8; \
13947
1.26k
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13948
1.26k
    return S; \
13949
1.26k
  case 259: \
13950
888
    tmp = fieldname(insn, 12, 4); \
13951
888
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13952
888
    tmp = fieldname(insn, 8, 4); \
13953
888
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13954
888
    tmp = fieldname(insn, 16, 4); \
13955
888
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13956
888
    tmp = fieldname(insn, 16, 4); \
13957
888
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13958
888
    tmp = 0; \
13959
888
    tmp |= fieldname(insn, 0, 8) << 0; \
13960
888
    tmp |= fieldname(insn, 23, 1) << 8; \
13961
888
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13962
888
    return S; \
13963
3.68k
  case 260: \
13964
3.68k
    if (!Check(&S, DecodeT2STRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13965
3.68k
    return S; \
13966
3.68k
  case 261: \
13967
3.52k
    if (!Check(&S, DecodeT2LDRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13968
3.52k
    return S; \
13969
3.52k
  case 262: \
13970
876
    tmp = fieldname(insn, 8, 4); \
13971
876
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13972
876
    tmp = 0; \
13973
876
    tmp |= fieldname(insn, 0, 4) << 0; \
13974
876
    tmp |= fieldname(insn, 4, 4) << 5; \
13975
876
    tmp |= fieldname(insn, 12, 3) << 9; \
13976
876
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13977
876
    tmp = fieldname(insn, 20, 1); \
13978
876
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13979
876
    return S; \
13980
876
  case 263: \
13981
397
    tmp = fieldname(insn, 16, 4); \
13982
397
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13983
397
    tmp = 0; \
13984
397
    tmp |= fieldname(insn, 0, 8) << 0; \
13985
397
    tmp |= fieldname(insn, 12, 3) << 8; \
13986
397
    tmp |= fieldname(insn, 26, 1) << 11; \
13987
397
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13988
397
    return S; \
13989
2.21k
  case 264: \
13990
2.21k
    tmp = fieldname(insn, 8, 4); \
13991
2.21k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13992
2.21k
    tmp = fieldname(insn, 16, 4); \
13993
2.21k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13994
2.21k
    tmp = 0; \
13995
2.21k
    tmp |= fieldname(insn, 0, 8) << 0; \
13996
2.21k
    tmp |= fieldname(insn, 12, 3) << 8; \
13997
2.21k
    tmp |= fieldname(insn, 26, 1) << 11; \
13998
2.21k
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13999
2.21k
    tmp = fieldname(insn, 20, 1); \
14000
2.21k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14001
2.21k
    return S; \
14002
2.21k
  case 265: \
14003
828
    tmp = fieldname(insn, 8, 4); \
14004
828
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14005
828
    tmp = 0; \
14006
828
    tmp |= fieldname(insn, 0, 8) << 0; \
14007
828
    tmp |= fieldname(insn, 12, 3) << 8; \
14008
828
    tmp |= fieldname(insn, 26, 1) << 11; \
14009
828
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14010
828
    tmp = fieldname(insn, 20, 1); \
14011
828
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14012
828
    return S; \
14013
1.06k
  case 266: \
14014
1.06k
    tmp = fieldname(insn, 8, 4); \
14015
1.06k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14016
1.06k
    tmp = fieldname(insn, 16, 4); \
14017
1.06k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14018
1.06k
    tmp = 0; \
14019
1.06k
    tmp |= fieldname(insn, 0, 8) << 0; \
14020
1.06k
    tmp |= fieldname(insn, 12, 3) << 8; \
14021
1.06k
    tmp |= fieldname(insn, 26, 1) << 11; \
14022
1.06k
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14023
1.06k
    tmp = fieldname(insn, 20, 1); \
14024
1.06k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14025
1.06k
    return S; \
14026
1.06k
  case 267: \
14027
385
    tmp = fieldname(insn, 8, 4); \
14028
385
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14029
385
    tmp = fieldname(insn, 16, 4); \
14030
385
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14031
385
    tmp = 0; \
14032
385
    tmp |= fieldname(insn, 0, 8) << 0; \
14033
385
    tmp |= fieldname(insn, 12, 3) << 8; \
14034
385
    tmp |= fieldname(insn, 26, 1) << 11; \
14035
385
    MCOperand_CreateImm0(MI, tmp); \
14036
385
    return S; \
14037
385
  case 268: \
14038
1
    if (!Check(&S, DecodeT2Adr(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14039
1
    return S; \
14040
1.08k
  case 269: \
14041
1.08k
    if (!Check(&S, DecodeT2MOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14042
1.08k
    return S; \
14043
1.08k
  case 270: \
14044
646
    tmp = fieldname(insn, 8, 4); \
14045
646
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14046
646
    tmp = fieldname(insn, 0, 4); \
14047
646
    MCOperand_CreateImm0(MI, tmp); \
14048
646
    tmp = fieldname(insn, 16, 4); \
14049
646
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14050
646
    return S; \
14051
2.10k
  case 271: \
14052
2.10k
    tmp = fieldname(insn, 8, 4); \
14053
2.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14054
2.10k
    tmp = fieldname(insn, 0, 5); \
14055
2.10k
    MCOperand_CreateImm0(MI, tmp); \
14056
2.10k
    tmp = fieldname(insn, 16, 4); \
14057
2.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14058
2.10k
    tmp = 0; \
14059
2.10k
    tmp |= fieldname(insn, 6, 2) << 0; \
14060
2.10k
    tmp |= fieldname(insn, 12, 3) << 2; \
14061
2.10k
    tmp |= fieldname(insn, 21, 1) << 5; \
14062
2.10k
    if (!Check(&S, DecodeT2ShifterImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14063
2.10k
    return S; \
14064
2.10k
  case 272: \
14065
980
    tmp = fieldname(insn, 8, 4); \
14066
980
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14067
980
    tmp = fieldname(insn, 16, 4); \
14068
980
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14069
980
    tmp = 0; \
14070
980
    tmp |= fieldname(insn, 6, 2) << 0; \
14071
980
    tmp |= fieldname(insn, 12, 3) << 2; \
14072
980
    MCOperand_CreateImm0(MI, tmp); \
14073
980
    tmp = fieldname(insn, 0, 5); \
14074
980
    MCOperand_CreateImm0(MI, tmp); \
14075
980
    return S; \
14076
980
  case 273: \
14077
641
    tmp = fieldname(insn, 8, 4); \
14078
641
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14079
641
    tmp = fieldname(insn, 8, 4); \
14080
641
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14081
641
    tmp = 0; \
14082
641
    tmp |= fieldname(insn, 0, 5) << 5; \
14083
641
    tmp |= fieldname(insn, 6, 2) << 0; \
14084
641
    tmp |= fieldname(insn, 12, 3) << 2; \
14085
641
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14086
641
    return S; \
14087
714
  case 274: \
14088
714
    tmp = fieldname(insn, 8, 4); \
14089
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14090
714
    tmp = fieldname(insn, 8, 4); \
14091
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14092
714
    tmp = fieldname(insn, 16, 4); \
14093
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14094
714
    tmp = 0; \
14095
714
    tmp |= fieldname(insn, 0, 5) << 5; \
14096
714
    tmp |= fieldname(insn, 6, 2) << 0; \
14097
714
    tmp |= fieldname(insn, 12, 3) << 2; \
14098
714
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14099
714
    return S; \
14100
714
  case 275: \
14101
263
    tmp = fieldname(insn, 16, 4); \
14102
263
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14103
263
    return S; \
14104
263
  case 276: \
14105
68
    tmp = fieldname(insn, 0, 4); \
14106
68
    MCOperand_CreateImm0(MI, tmp); \
14107
68
    return S; \
14108
796
  case 277: \
14109
796
    if (!Check(&S, DecodeT2CPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14110
796
    return S; \
14111
796
  case 278: \
14112
66
    tmp = fieldname(insn, 8, 4); \
14113
66
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14114
66
    return S; \
14115
440
  case 279: \
14116
440
    tmp = 0; \
14117
440
    tmp |= fieldname(insn, 8, 4) << 0; \
14118
440
    tmp |= fieldname(insn, 20, 1) << 4; \
14119
440
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14120
440
    tmp = fieldname(insn, 16, 4); \
14121
439
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14122
439
    return S; \
14123
500
  case 280: \
14124
500
    tmp = 0; \
14125
500
    tmp |= fieldname(insn, 4, 1) << 4; \
14126
500
    tmp |= fieldname(insn, 8, 4) << 0; \
14127
500
    tmp |= fieldname(insn, 20, 1) << 5; \
14128
500
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14129
500
    tmp = fieldname(insn, 16, 4); \
14130
499
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14131
499
    return S; \
14132
499
  case 281: \
14133
330
    tmp = fieldname(insn, 8, 4); \
14134
330
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14135
330
    tmp = 0; \
14136
330
    tmp |= fieldname(insn, 4, 1) << 4; \
14137
330
    tmp |= fieldname(insn, 16, 4) << 0; \
14138
330
    tmp |= fieldname(insn, 20, 1) << 5; \
14139
330
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14140
330
    return S; \
14141
330
  case 282: \
14142
84
    tmp = 0; \
14143
84
    tmp |= fieldname(insn, 0, 12) << 0; \
14144
84
    tmp |= fieldname(insn, 16, 4) << 12; \
14145
84
    MCOperand_CreateImm0(MI, tmp); \
14146
84
    return S; \
14147
330
  case 283: \
14148
70
    tmp = fieldname(insn, 16, 4); \
14149
70
    MCOperand_CreateImm0(MI, tmp); \
14150
70
    return S; \
14151
5.49k
  case 284: \
14152
5.49k
    tmp = 0; \
14153
5.49k
    tmp |= fieldname(insn, 0, 8) << 0; \
14154
5.49k
    tmp |= fieldname(insn, 10, 2) << 10; \
14155
5.49k
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14156
5.49k
    tmp = fieldname(insn, 16, 4); \
14157
5.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14158
5.49k
    return S; \
14159
5.49k
  case 285: \
14160
2.09k
    tmp = fieldname(insn, 8, 4); \
14161
2.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14162
2.09k
    tmp = fieldname(insn, 0, 8); \
14163
2.09k
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14164
2.09k
    return S; \
14165
2.37k
  case 286: \
14166
2.37k
    if (!Check(&S, DecodeThumb2BCCInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14167
2.37k
    return S; \
14168
2.37k
  case 287: \
14169
679
    if (!Check(&S, DecodeT2BInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14170
679
    return S; \
14171
1.29k
  case 288: \
14172
1.29k
    tmp = fieldname(insn, 12, 4); \
14173
1.29k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14174
1.29k
    tmp = 0; \
14175
1.29k
    tmp |= fieldname(insn, 0, 4) << 2; \
14176
1.29k
    tmp |= fieldname(insn, 4, 2) << 0; \
14177
1.29k
    tmp |= fieldname(insn, 16, 4) << 6; \
14178
1.29k
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14179
1.29k
    return S; \
14180
4.68k
  case 289: \
14181
4.68k
    if (!Check(&S, DecodeT2LdStPre(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14182
4.68k
    return S; \
14183
4.68k
  case 290: \
14184
1.10k
    tmp = fieldname(insn, 12, 4); \
14185
1.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14186
1.10k
    tmp = 0; \
14187
1.10k
    tmp |= fieldname(insn, 0, 8) << 0; \
14188
1.10k
    tmp |= fieldname(insn, 16, 4) << 9; \
14189
1.10k
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14190
1.10k
    return S; \
14191
1.10k
  case 291: \
14192
498
    tmp = fieldname(insn, 12, 4); \
14193
498
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14194
498
    tmp = 0; \
14195
498
    tmp |= fieldname(insn, 0, 8) << 0; \
14196
498
    tmp |= fieldname(insn, 9, 1) << 8; \
14197
498
    tmp |= fieldname(insn, 16, 4) << 9; \
14198
498
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14199
498
    return S; \
14200
1.27k
  case 292: \
14201
1.27k
    tmp = fieldname(insn, 12, 4); \
14202
1.27k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14203
1.27k
    tmp = 0; \
14204
1.27k
    tmp |= fieldname(insn, 0, 12) << 0; \
14205
1.27k
    tmp |= fieldname(insn, 16, 4) << 13; \
14206
1.27k
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14207
1.27k
    return S; \
14208
2.66k
  case 293: \
14209
2.66k
    if (!Check(&S, DecodeT2LoadShift(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14210
2.66k
    return S; \
14211
2.66k
  case 294: \
14212
2.47k
    if (!Check(&S, DecodeT2LoadImm8(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14213
2.47k
    return S; \
14214
2.66k
  case 295: \
14215
2.66k
    if (!Check(&S, DecodeT2LoadT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14216
2.66k
    return S; \
14217
3.95k
  case 296: \
14218
3.95k
    if (!Check(&S, DecodeT2LoadImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14219
3.95k
    return S; \
14220
3.95k
  case 297: \
14221
634
    if (!Check(&S, DecodeT2LoadLabel(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14222
634
    return S; \
14223
822
  case 298: \
14224
822
    tmp = fieldname(insn, 8, 4); \
14225
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14226
822
    tmp = fieldname(insn, 16, 4); \
14227
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14228
822
    tmp = fieldname(insn, 0, 4); \
14229
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14230
822
    return S; \
14231
1.19k
  case 299: \
14232
1.19k
    tmp = fieldname(insn, 8, 4); \
14233
1.19k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14234
1.19k
    tmp = fieldname(insn, 0, 4); \
14235
1.19k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14236
1.19k
    tmp = fieldname(insn, 4, 2); \
14237
1.19k
    MCOperand_CreateImm0(MI, tmp); \
14238
1.19k
    return S; \
14239
1.45k
  case 300: \
14240
1.45k
    tmp = fieldname(insn, 8, 4); \
14241
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14242
1.45k
    tmp = fieldname(insn, 16, 4); \
14243
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14244
1.45k
    tmp = fieldname(insn, 0, 4); \
14245
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14246
1.45k
    tmp = fieldname(insn, 4, 2); \
14247
1.45k
    MCOperand_CreateImm0(MI, tmp); \
14248
1.45k
    return S; \
14249
1.45k
  case 301: \
14250
764
    tmp = fieldname(insn, 8, 4); \
14251
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14252
764
    tmp = fieldname(insn, 0, 4); \
14253
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14254
764
    tmp = fieldname(insn, 16, 4); \
14255
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14256
764
    return S; \
14257
764
  case 302: \
14258
206
    tmp = fieldname(insn, 8, 4); \
14259
206
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14260
206
    tmp = 0; \
14261
206
    tmp |= fieldname(insn, 0, 4) << 0; \
14262
206
    tmp |= fieldname(insn, 16, 4) << 0; \
14263
206
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14264
206
    return S; \
14265
1.49k
  case 303: \
14266
1.49k
    tmp = fieldname(insn, 8, 4); \
14267
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14268
1.49k
    tmp = fieldname(insn, 16, 4); \
14269
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14270
1.49k
    tmp = fieldname(insn, 0, 4); \
14271
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14272
1.49k
    tmp = fieldname(insn, 12, 4); \
14273
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14274
1.49k
    return S; \
14275
1.49k
  case 304: \
14276
988
    tmp = fieldname(insn, 12, 4); \
14277
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14278
988
    tmp = fieldname(insn, 8, 4); \
14279
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14280
988
    tmp = fieldname(insn, 16, 4); \
14281
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14282
988
    tmp = fieldname(insn, 0, 4); \
14283
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14284
988
    return S; \
14285
988
  case 305: \
14286
312
    tmp = fieldname(insn, 8, 4); \
14287
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14288
312
    tmp = fieldname(insn, 16, 4); \
14289
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14290
312
    tmp = fieldname(insn, 0, 4); \
14291
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14292
312
    return S; \
14293
410
  case 306: \
14294
410
    tmp = fieldname(insn, 12, 4); \
14295
410
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14296
410
    tmp = 0; \
14297
410
    tmp |= fieldname(insn, 0, 4) << 2; \
14298
410
    tmp |= fieldname(insn, 4, 2) << 0; \
14299
410
    tmp |= fieldname(insn, 16, 4) << 6; \
14300
410
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14301
410
    return S; \
14302
410
  case 307: \
14303
85
    tmp = fieldname(insn, 12, 4); \
14304
85
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14305
85
    tmp = 0; \
14306
85
    tmp |= fieldname(insn, 0, 8) << 0; \
14307
85
    tmp |= fieldname(insn, 9, 1) << 8; \
14308
85
    tmp |= fieldname(insn, 16, 4) << 9; \
14309
85
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14310
85
    return S; \
14311
257
  case 308: \
14312
257
    tmp = fieldname(insn, 12, 4); \
14313
257
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14314
257
    tmp = 0; \
14315
257
    tmp |= fieldname(insn, 0, 12) << 0; \
14316
257
    tmp |= fieldname(insn, 16, 4) << 13; \
14317
257
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14318
257
    return S; \
14319
1.18k
  case 309: \
14320
1.18k
    tmp = fieldname(insn, 12, 4); \
14321
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14322
1.18k
    tmp = fieldname(insn, 8, 4); \
14323
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14324
1.18k
    tmp = fieldname(insn, 16, 4); \
14325
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14326
1.18k
    tmp = fieldname(insn, 0, 4); \
14327
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14328
1.18k
    tmp = fieldname(insn, 12, 4); \
14329
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14330
1.18k
    tmp = fieldname(insn, 8, 4); \
14331
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14332
1.18k
    return S; \
14333
1.18k
  case 310: \
14334
634
    tmp = fieldname(insn, 8, 4); \
14335
634
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14336
634
    tmp = fieldname(insn, 4, 4); \
14337
632
    MCOperand_CreateImm0(MI, tmp); \
14338
632
    tmp = fieldname(insn, 12, 4); \
14339
632
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14340
632
    tmp = fieldname(insn, 16, 4); \
14341
632
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14342
632
    tmp = fieldname(insn, 0, 4); \
14343
632
    MCOperand_CreateImm0(MI, tmp); \
14344
632
    return S; \
14345
632
  case 311: \
14346
275
    tmp = fieldname(insn, 12, 4); \
14347
275
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14348
275
    tmp = fieldname(insn, 16, 4); \
14349
275
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14350
275
    tmp = fieldname(insn, 8, 4); \
14351
275
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14352
275
    tmp = fieldname(insn, 4, 4); \
14353
273
    MCOperand_CreateImm0(MI, tmp); \
14354
273
    tmp = fieldname(insn, 0, 4); \
14355
273
    MCOperand_CreateImm0(MI, tmp); \
14356
273
    return S; \
14357
67.5k
  case 312: \
14358
67.5k
    tmp = fieldname(insn, 0, 3); \
14359
67.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14360
67.5k
    tmp = fieldname(insn, 3, 3); \
14361
67.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14362
67.5k
    tmp = fieldname(insn, 6, 5); \
14363
67.5k
    MCOperand_CreateImm0(MI, tmp); \
14364
67.5k
    return S; \
14365
67.5k
  case 313: \
14366
3.51k
    tmp = fieldname(insn, 0, 3); \
14367
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14368
3.51k
    tmp = fieldname(insn, 3, 3); \
14369
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14370
3.51k
    tmp = fieldname(insn, 6, 3); \
14371
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14372
3.51k
    return S; \
14373
5.37k
  case 314: \
14374
5.37k
    tmp = fieldname(insn, 0, 3); \
14375
5.37k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14376
5.37k
    tmp = fieldname(insn, 3, 3); \
14377
5.37k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14378
5.37k
    tmp = fieldname(insn, 6, 3); \
14379
5.37k
    MCOperand_CreateImm0(MI, tmp); \
14380
5.37k
    return S; \
14381
21.5k
  case 315: \
14382
21.5k
    tmp = fieldname(insn, 8, 3); \
14383
21.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14384
21.5k
    tmp = fieldname(insn, 8, 3); \
14385
21.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14386
21.5k
    tmp = fieldname(insn, 0, 8); \
14387
21.5k
    MCOperand_CreateImm0(MI, tmp); \
14388
21.5k
    return S; \
14389
21.5k
  case 316: \
14390
4.89k
    tmp = fieldname(insn, 0, 3); \
14391
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14392
4.89k
    tmp = fieldname(insn, 0, 3); \
14393
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14394
4.89k
    tmp = fieldname(insn, 3, 3); \
14395
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14396
4.89k
    return S; \
14397
4.89k
  case 317: \
14398
925
    tmp = fieldname(insn, 0, 3); \
14399
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14400
925
    tmp = fieldname(insn, 3, 3); \
14401
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14402
925
    tmp = fieldname(insn, 0, 3); \
14403
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14404
925
    return S; \
14405
925
  case 318: \
14406
887
    tmp = 0; \
14407
887
    tmp |= fieldname(insn, 12, 4) << 1; \
14408
887
    tmp |= fieldname(insn, 22, 1) << 0; \
14409
887
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14410
887
    tmp = 0; \
14411
887
    tmp |= fieldname(insn, 0, 8) << 0; \
14412
887
    tmp |= fieldname(insn, 16, 4) << 9; \
14413
887
    tmp |= fieldname(insn, 23, 1) << 8; \
14414
887
    if (!Check(&S, DecodeAddrMode5FP16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14415
887
    tmp = fieldname(insn, 28, 4); \
14416
887
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14417
887
    return S; \
14418
887
  case 319: \
14419
634
    tmp = 0; \
14420
634
    tmp |= fieldname(insn, 12, 4) << 1; \
14421
634
    tmp |= fieldname(insn, 22, 1) << 0; \
14422
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14423
634
    tmp = 0; \
14424
634
    tmp |= fieldname(insn, 12, 4) << 1; \
14425
634
    tmp |= fieldname(insn, 22, 1) << 0; \
14426
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14427
634
    tmp = 0; \
14428
634
    tmp |= fieldname(insn, 7, 1) << 0; \
14429
634
    tmp |= fieldname(insn, 16, 4) << 1; \
14430
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14431
634
    tmp = 0; \
14432
634
    tmp |= fieldname(insn, 0, 4) << 1; \
14433
634
    tmp |= fieldname(insn, 5, 1) << 0; \
14434
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14435
634
    tmp = fieldname(insn, 28, 4); \
14436
634
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14437
634
    return S; \
14438
634
  case 320: \
14439
337
    tmp = 0; \
14440
337
    tmp |= fieldname(insn, 12, 4) << 1; \
14441
337
    tmp |= fieldname(insn, 22, 1) << 0; \
14442
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14443
337
    tmp = 0; \
14444
337
    tmp |= fieldname(insn, 7, 1) << 0; \
14445
337
    tmp |= fieldname(insn, 16, 4) << 1; \
14446
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14447
337
    tmp = 0; \
14448
337
    tmp |= fieldname(insn, 0, 4) << 1; \
14449
337
    tmp |= fieldname(insn, 5, 1) << 0; \
14450
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14451
337
    tmp = fieldname(insn, 28, 4); \
14452
337
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14453
337
    return S; \
14454
424
  case 321: \
14455
424
    tmp = 0; \
14456
424
    tmp |= fieldname(insn, 7, 1) << 0; \
14457
424
    tmp |= fieldname(insn, 16, 4) << 1; \
14458
424
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14459
424
    tmp = fieldname(insn, 12, 4); \
14460
424
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14461
424
    tmp = fieldname(insn, 28, 4); \
14462
424
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14463
424
    return S; \
14464
627
  case 322: \
14465
627
    if (!Check(&S, DecodeVMOVSRR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14466
627
    return S; \
14467
949
  case 323: \
14468
949
    tmp = fieldname(insn, 16, 4); \
14469
949
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14470
949
    tmp = fieldname(insn, 28, 4); \
14471
949
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14472
949
    tmp = 0; \
14473
722
    tmp |= fieldname(insn, 0, 8) << 0; \
14474
722
    tmp |= fieldname(insn, 12, 4) << 9; \
14475
722
    tmp |= fieldname(insn, 22, 1) << 8; \
14476
722
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14477
722
    return S; \
14478
722
  case 324: \
14479
532
    tmp = 0; \
14480
532
    tmp |= fieldname(insn, 12, 4) << 1; \
14481
532
    tmp |= fieldname(insn, 22, 1) << 0; \
14482
532
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14483
532
    tmp = 0; \
14484
532
    tmp |= fieldname(insn, 0, 8) << 0; \
14485
532
    tmp |= fieldname(insn, 16, 4) << 9; \
14486
532
    tmp |= fieldname(insn, 23, 1) << 8; \
14487
532
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14488
532
    tmp = fieldname(insn, 28, 4); \
14489
532
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14490
532
    return S; \
14491
804
  case 325: \
14492
804
    tmp = 0; \
14493
804
    tmp |= fieldname(insn, 12, 4) << 1; \
14494
804
    tmp |= fieldname(insn, 22, 1) << 0; \
14495
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14496
804
    tmp = 0; \
14497
804
    tmp |= fieldname(insn, 12, 4) << 1; \
14498
804
    tmp |= fieldname(insn, 22, 1) << 0; \
14499
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14500
804
    tmp = 0; \
14501
804
    tmp |= fieldname(insn, 7, 1) << 0; \
14502
804
    tmp |= fieldname(insn, 16, 4) << 1; \
14503
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14504
804
    tmp = 0; \
14505
804
    tmp |= fieldname(insn, 0, 4) << 1; \
14506
804
    tmp |= fieldname(insn, 5, 1) << 0; \
14507
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14508
804
    tmp = fieldname(insn, 28, 4); \
14509
804
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14510
804
    return S; \
14511
804
  case 326: \
14512
310
    tmp = 0; \
14513
310
    tmp |= fieldname(insn, 12, 4) << 1; \
14514
310
    tmp |= fieldname(insn, 22, 1) << 0; \
14515
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14516
310
    tmp = 0; \
14517
310
    tmp |= fieldname(insn, 7, 1) << 0; \
14518
310
    tmp |= fieldname(insn, 16, 4) << 1; \
14519
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14520
310
    tmp = 0; \
14521
310
    tmp |= fieldname(insn, 0, 4) << 1; \
14522
310
    tmp |= fieldname(insn, 5, 1) << 0; \
14523
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14524
310
    tmp = fieldname(insn, 28, 4); \
14525
310
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14526
310
    return S; \
14527
486
  case 327: \
14528
486
    tmp = 0; \
14529
486
    tmp |= fieldname(insn, 7, 1) << 0; \
14530
486
    tmp |= fieldname(insn, 16, 4) << 1; \
14531
486
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14532
486
    tmp = fieldname(insn, 12, 4); \
14533
486
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14534
486
    tmp = fieldname(insn, 28, 4); \
14535
486
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14536
486
    return S; \
14537
486
  case 328: \
14538
70
    tmp = 0; \
14539
70
    tmp |= fieldname(insn, 0, 4) << 0; \
14540
70
    tmp |= fieldname(insn, 5, 1) << 4; \
14541
70
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14542
70
    tmp = fieldname(insn, 12, 4); \
14543
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14544
70
    tmp = fieldname(insn, 16, 4); \
14545
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14546
70
    tmp = fieldname(insn, 28, 4); \
14547
70
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14548
70
    return S; \
14549
1.18k
  case 329: \
14550
1.18k
    tmp = fieldname(insn, 16, 4); \
14551
1.18k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14552
1.18k
    tmp = fieldname(insn, 28, 4); \
14553
1.18k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14554
1.18k
    tmp = 0; \
14555
1.11k
    tmp |= fieldname(insn, 1, 7) << 1; \
14556
1.11k
    tmp |= fieldname(insn, 12, 4) << 8; \
14557
1.11k
    tmp |= fieldname(insn, 22, 1) << 12; \
14558
1.11k
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14559
1.11k
    return S; \
14560
1.11k
  case 330: \
14561
390
    tmp = fieldname(insn, 16, 4); \
14562
390
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14563
390
    tmp = fieldname(insn, 28, 4); \
14564
390
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14565
390
    tmp = 0; \
14566
324
    tmp |= fieldname(insn, 1, 7) << 1; \
14567
324
    tmp |= fieldname(insn, 12, 4) << 8; \
14568
324
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14569
324
    return S; \
14570
523
  case 331: \
14571
523
    tmp = 0; \
14572
523
    tmp |= fieldname(insn, 12, 4) << 0; \
14573
523
    tmp |= fieldname(insn, 22, 1) << 4; \
14574
523
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14575
523
    tmp = 0; \
14576
523
    tmp |= fieldname(insn, 0, 8) << 0; \
14577
523
    tmp |= fieldname(insn, 16, 4) << 9; \
14578
523
    tmp |= fieldname(insn, 23, 1) << 8; \
14579
523
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14580
523
    tmp = fieldname(insn, 28, 4); \
14581
523
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14582
523
    return S; \
14583
567
  case 332: \
14584
567
    tmp = 0; \
14585
567
    tmp |= fieldname(insn, 12, 4) << 0; \
14586
567
    tmp |= fieldname(insn, 22, 1) << 4; \
14587
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14588
567
    tmp = 0; \
14589
567
    tmp |= fieldname(insn, 12, 4) << 0; \
14590
567
    tmp |= fieldname(insn, 22, 1) << 4; \
14591
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14592
567
    tmp = 0; \
14593
567
    tmp |= fieldname(insn, 7, 1) << 4; \
14594
567
    tmp |= fieldname(insn, 16, 4) << 0; \
14595
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14596
567
    tmp = 0; \
14597
567
    tmp |= fieldname(insn, 0, 4) << 0; \
14598
567
    tmp |= fieldname(insn, 5, 1) << 4; \
14599
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14600
567
    tmp = fieldname(insn, 28, 4); \
14601
567
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14602
567
    return S; \
14603
567
  case 333: \
14604
356
    tmp = 0; \
14605
356
    tmp |= fieldname(insn, 12, 4) << 0; \
14606
356
    tmp |= fieldname(insn, 22, 1) << 4; \
14607
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14608
356
    tmp = 0; \
14609
356
    tmp |= fieldname(insn, 7, 1) << 4; \
14610
356
    tmp |= fieldname(insn, 16, 4) << 0; \
14611
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14612
356
    tmp = 0; \
14613
356
    tmp |= fieldname(insn, 0, 4) << 0; \
14614
356
    tmp |= fieldname(insn, 5, 1) << 4; \
14615
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14616
356
    tmp = fieldname(insn, 28, 4); \
14617
356
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14618
356
    return S; \
14619
356
  case 334: \
14620
316
    tmp = fieldname(insn, 12, 4); \
14621
316
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14622
316
    tmp = 0; \
14623
316
    tmp |= fieldname(insn, 7, 1) << 0; \
14624
316
    tmp |= fieldname(insn, 16, 4) << 1; \
14625
316
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14626
316
    tmp = fieldname(insn, 28, 4); \
14627
316
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14628
316
    return S; \
14629
1.05k
  case 335: \
14630
1.05k
    if (!Check(&S, DecodeVMOVRRS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14631
1.05k
    return S; \
14632
1.05k
  case 336: \
14633
161
    tmp = fieldname(insn, 12, 4); \
14634
161
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14635
161
    tmp = 0; \
14636
161
    tmp |= fieldname(insn, 7, 1) << 0; \
14637
161
    tmp |= fieldname(insn, 16, 4) << 1; \
14638
161
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14639
161
    tmp = fieldname(insn, 28, 4); \
14640
161
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14641
161
    return S; \
14642
161
  case 337: \
14643
75
    tmp = fieldname(insn, 12, 4); \
14644
75
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14645
75
    tmp = fieldname(insn, 16, 4); \
14646
75
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14647
75
    tmp = 0; \
14648
75
    tmp |= fieldname(insn, 0, 4) << 0; \
14649
75
    tmp |= fieldname(insn, 5, 1) << 4; \
14650
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14651
75
    tmp = fieldname(insn, 28, 4); \
14652
75
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14653
75
    return S; \
14654
349
  case 338: \
14655
349
    tmp = fieldname(insn, 16, 4); \
14656
349
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14657
349
    tmp = fieldname(insn, 28, 4); \
14658
349
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14659
349
    return S; \
14660
841
  case 339: \
14661
841
    tmp = fieldname(insn, 16, 4); \
14662
841
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14663
841
    tmp = fieldname(insn, 16, 4); \
14664
841
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14665
841
    tmp = fieldname(insn, 28, 4); \
14666
841
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14667
841
    tmp = 0; \
14668
766
    tmp |= fieldname(insn, 0, 8) << 0; \
14669
766
    tmp |= fieldname(insn, 12, 4) << 9; \
14670
766
    tmp |= fieldname(insn, 22, 1) << 8; \
14671
766
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14672
766
    return S; \
14673
1.14k
  case 340: \
14674
1.14k
    tmp = fieldname(insn, 16, 4); \
14675
1.14k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14676
1.14k
    tmp = fieldname(insn, 16, 4); \
14677
1.14k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14678
1.14k
    tmp = fieldname(insn, 28, 4); \
14679
1.14k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14680
1.14k
    tmp = 0; \
14681
995
    tmp |= fieldname(insn, 1, 7) << 1; \
14682
995
    tmp |= fieldname(insn, 12, 4) << 8; \
14683
995
    tmp |= fieldname(insn, 22, 1) << 12; \
14684
995
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14685
995
    return S; \
14686
995
  case 341: \
14687
939
    tmp = fieldname(insn, 16, 4); \
14688
939
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14689
939
    tmp = fieldname(insn, 16, 4); \
14690
939
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14691
939
    tmp = fieldname(insn, 28, 4); \
14692
939
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14693
939
    tmp = 0; \
14694
636
    tmp |= fieldname(insn, 1, 7) << 1; \
14695
636
    tmp |= fieldname(insn, 12, 4) << 8; \
14696
636
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14697
636
    return S; \
14698
4.72k
  case 342: \
14699
4.72k
    if (!Check(&S, DecodeForVMRSandVMSR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14700
4.72k
    return S; \
14701
4.72k
  case 343: \
14702
155
    tmp = 0; \
14703
155
    tmp |= fieldname(insn, 12, 4) << 1; \
14704
155
    tmp |= fieldname(insn, 22, 1) << 0; \
14705
155
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14706
155
    tmp = 0; \
14707
155
    tmp |= fieldname(insn, 0, 4) << 0; \
14708
155
    tmp |= fieldname(insn, 16, 4) << 4; \
14709
155
    MCOperand_CreateImm0(MI, tmp); \
14710
155
    tmp = fieldname(insn, 28, 4); \
14711
155
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14712
155
    return S; \
14713
475
  case 344: \
14714
475
    tmp = 0; \
14715
475
    tmp |= fieldname(insn, 12, 4) << 1; \
14716
475
    tmp |= fieldname(insn, 22, 1) << 0; \
14717
475
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14718
475
    tmp = 0; \
14719
475
    tmp |= fieldname(insn, 0, 4) << 1; \
14720
475
    tmp |= fieldname(insn, 5, 1) << 0; \
14721
475
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14722
475
    tmp = fieldname(insn, 28, 4); \
14723
475
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14724
475
    return S; \
14725
475
  case 345: \
14726
275
    tmp = 0; \
14727
275
    tmp |= fieldname(insn, 12, 4) << 1; \
14728
275
    tmp |= fieldname(insn, 22, 1) << 0; \
14729
275
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14730
275
    tmp = fieldname(insn, 28, 4); \
14731
275
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14732
275
    return S; \
14733
432
  case 346: \
14734
432
    tmp = 0; \
14735
432
    tmp |= fieldname(insn, 12, 4) << 1; \
14736
432
    tmp |= fieldname(insn, 22, 1) << 0; \
14737
432
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14738
432
    tmp = 0; \
14739
432
    tmp |= fieldname(insn, 0, 4) << 1; \
14740
432
    tmp |= fieldname(insn, 5, 1) << 0; \
14741
432
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14742
432
    tmp = fieldname(insn, 28, 4); \
14743
432
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14744
432
    return S; \
14745
494
  case 347: \
14746
494
    tmp = 0; \
14747
494
    tmp |= fieldname(insn, 12, 4) << 1; \
14748
494
    tmp |= fieldname(insn, 22, 1) << 0; \
14749
494
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14750
494
    tmp = 0; \
14751
494
    tmp |= fieldname(insn, 0, 4) << 1; \
14752
494
    tmp |= fieldname(insn, 5, 1) << 0; \
14753
494
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14754
494
    tmp = fieldname(insn, 28, 4); \
14755
494
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14756
494
    return S; \
14757
1.09k
  case 348: \
14758
1.09k
    tmp = 0; \
14759
1.09k
    tmp |= fieldname(insn, 12, 4) << 1; \
14760
1.09k
    tmp |= fieldname(insn, 22, 1) << 0; \
14761
1.09k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14762
1.09k
    tmp = 0; \
14763
1.09k
    tmp |= fieldname(insn, 12, 4) << 1; \
14764
1.09k
    tmp |= fieldname(insn, 22, 1) << 0; \
14765
1.09k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14766
1.09k
    tmp = 0; \
14767
1.09k
    tmp |= fieldname(insn, 0, 4) << 1; \
14768
1.09k
    tmp |= fieldname(insn, 5, 1) << 0; \
14769
1.09k
    MCOperand_CreateImm0(MI, tmp); \
14770
1.09k
    tmp = fieldname(insn, 28, 4); \
14771
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14772
1.09k
    return S; \
14773
1.09k
  case 349: \
14774
925
    tmp = 0; \
14775
925
    tmp |= fieldname(insn, 12, 4) << 1; \
14776
925
    tmp |= fieldname(insn, 22, 1) << 0; \
14777
925
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14778
925
    tmp = 0; \
14779
925
    tmp |= fieldname(insn, 0, 4) << 1; \
14780
925
    tmp |= fieldname(insn, 5, 1) << 0; \
14781
925
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14782
925
    tmp = fieldname(insn, 28, 4); \
14783
925
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14784
925
    return S; \
14785
925
  case 350: \
14786
73
    tmp = 0; \
14787
73
    tmp |= fieldname(insn, 12, 4) << 1; \
14788
73
    tmp |= fieldname(insn, 22, 1) << 0; \
14789
73
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14790
73
    tmp = 0; \
14791
73
    tmp |= fieldname(insn, 0, 4) << 0; \
14792
73
    tmp |= fieldname(insn, 16, 4) << 4; \
14793
73
    MCOperand_CreateImm0(MI, tmp); \
14794
73
    tmp = fieldname(insn, 28, 4); \
14795
73
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14796
73
    return S; \
14797
79
  case 351: \
14798
79
    tmp = 0; \
14799
79
    tmp |= fieldname(insn, 12, 4) << 1; \
14800
79
    tmp |= fieldname(insn, 22, 1) << 0; \
14801
79
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14802
79
    tmp = fieldname(insn, 28, 4); \
14803
79
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14804
79
    return S; \
14805
685
  case 352: \
14806
685
    tmp = 0; \
14807
685
    tmp |= fieldname(insn, 12, 4) << 0; \
14808
685
    tmp |= fieldname(insn, 22, 1) << 4; \
14809
685
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14810
685
    tmp = 0; \
14811
685
    tmp |= fieldname(insn, 0, 4) << 1; \
14812
685
    tmp |= fieldname(insn, 5, 1) << 0; \
14813
685
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14814
685
    tmp = fieldname(insn, 28, 4); \
14815
685
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14816
685
    return S; \
14817
685
  case 353: \
14818
198
    tmp = 0; \
14819
198
    tmp |= fieldname(insn, 12, 4) << 0; \
14820
198
    tmp |= fieldname(insn, 22, 1) << 4; \
14821
198
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14822
198
    tmp = 0; \
14823
198
    tmp |= fieldname(insn, 0, 4) << 0; \
14824
198
    tmp |= fieldname(insn, 16, 4) << 4; \
14825
198
    MCOperand_CreateImm0(MI, tmp); \
14826
198
    tmp = fieldname(insn, 28, 4); \
14827
198
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14828
198
    return S; \
14829
453
  case 354: \
14830
453
    tmp = 0; \
14831
453
    tmp |= fieldname(insn, 12, 4) << 0; \
14832
453
    tmp |= fieldname(insn, 22, 1) << 4; \
14833
453
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14834
453
    tmp = 0; \
14835
453
    tmp |= fieldname(insn, 0, 4) << 0; \
14836
453
    tmp |= fieldname(insn, 5, 1) << 4; \
14837
453
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14838
453
    tmp = fieldname(insn, 28, 4); \
14839
453
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14840
453
    return S; \
14841
1.50k
  case 355: \
14842
1.50k
    tmp = 0; \
14843
1.50k
    tmp |= fieldname(insn, 12, 4) << 1; \
14844
1.50k
    tmp |= fieldname(insn, 22, 1) << 0; \
14845
1.50k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14846
1.50k
    tmp = 0; \
14847
1.50k
    tmp |= fieldname(insn, 0, 4) << 0; \
14848
1.50k
    tmp |= fieldname(insn, 5, 1) << 4; \
14849
1.50k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14850
1.50k
    tmp = fieldname(insn, 28, 4); \
14851
1.50k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14852
1.50k
    return S; \
14853
1.50k
  case 356: \
14854
208
    tmp = 0; \
14855
208
    tmp |= fieldname(insn, 12, 4) << 0; \
14856
208
    tmp |= fieldname(insn, 22, 1) << 4; \
14857
208
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14858
208
    tmp = fieldname(insn, 28, 4); \
14859
208
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14860
208
    return S; \
14861
1.82k
  case 357: \
14862
1.82k
    tmp = 0; \
14863
1.82k
    tmp |= fieldname(insn, 12, 4) << 0; \
14864
1.82k
    tmp |= fieldname(insn, 22, 1) << 4; \
14865
1.82k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14866
1.82k
    tmp = 0; \
14867
1.82k
    tmp |= fieldname(insn, 12, 4) << 0; \
14868
1.82k
    tmp |= fieldname(insn, 22, 1) << 4; \
14869
1.82k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14870
1.82k
    tmp = 0; \
14871
1.82k
    tmp |= fieldname(insn, 0, 4) << 1; \
14872
1.82k
    tmp |= fieldname(insn, 5, 1) << 0; \
14873
1.82k
    MCOperand_CreateImm0(MI, tmp); \
14874
1.82k
    tmp = fieldname(insn, 28, 4); \
14875
1.82k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14876
1.82k
    return S; \
14877
1.82k
  case 358: \
14878
76
    tmp = 0; \
14879
76
    tmp |= fieldname(insn, 12, 4) << 0; \
14880
76
    tmp |= fieldname(insn, 22, 1) << 4; \
14881
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14882
76
    tmp = 0; \
14883
76
    tmp |= fieldname(insn, 7, 1) << 4; \
14884
76
    tmp |= fieldname(insn, 16, 4) << 0; \
14885
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14886
76
    tmp = 0; \
14887
76
    tmp |= fieldname(insn, 0, 4) << 0; \
14888
76
    tmp |= fieldname(insn, 5, 1) << 4; \
14889
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14890
76
    tmp = fieldname(insn, 24, 1); \
14891
76
    MCOperand_CreateImm0(MI, tmp); \
14892
76
    return S; \
14893
76
  case 359: \
14894
75
    tmp = 0; \
14895
75
    tmp |= fieldname(insn, 12, 4) << 0; \
14896
75
    tmp |= fieldname(insn, 22, 1) << 4; \
14897
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14898
75
    tmp = 0; \
14899
75
    tmp |= fieldname(insn, 12, 4) << 0; \
14900
75
    tmp |= fieldname(insn, 22, 1) << 4; \
14901
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14902
75
    tmp = 0; \
14903
75
    tmp |= fieldname(insn, 7, 1) << 4; \
14904
75
    tmp |= fieldname(insn, 16, 4) << 0; \
14905
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14906
75
    tmp = 0; \
14907
75
    tmp |= fieldname(insn, 0, 4) << 0; \
14908
75
    tmp |= fieldname(insn, 5, 1) << 4; \
14909
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14910
75
    tmp = fieldname(insn, 23, 2); \
14911
75
    MCOperand_CreateImm0(MI, tmp); \
14912
75
    return S; \
14913
75
  case 360: \
14914
66
    tmp = 0; \
14915
66
    tmp |= fieldname(insn, 12, 4) << 0; \
14916
66
    tmp |= fieldname(insn, 22, 1) << 4; \
14917
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14918
66
    tmp = 0; \
14919
66
    tmp |= fieldname(insn, 12, 4) << 0; \
14920
66
    tmp |= fieldname(insn, 22, 1) << 4; \
14921
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14922
66
    tmp = 0; \
14923
66
    tmp |= fieldname(insn, 7, 1) << 4; \
14924
66
    tmp |= fieldname(insn, 16, 4) << 0; \
14925
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14926
66
    tmp = fieldname(insn, 0, 4); \
14927
66
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14928
66
    tmp = fieldname(insn, 5, 1); \
14929
66
    MCOperand_CreateImm0(MI, tmp); \
14930
66
    tmp = fieldname(insn, 20, 2); \
14931
66
    MCOperand_CreateImm0(MI, tmp); \
14932
66
    return S; \
14933
737
  case 361: \
14934
737
    if (!Check(&S, DecodeNEONComplexLane64Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14935
737
    return S; \
14936
737
  case 362: \
14937
69
    tmp = 0; \
14938
69
    tmp |= fieldname(insn, 12, 4) << 0; \
14939
69
    tmp |= fieldname(insn, 22, 1) << 4; \
14940
69
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14941
69
    tmp = 0; \
14942
68
    tmp |= fieldname(insn, 7, 1) << 4; \
14943
68
    tmp |= fieldname(insn, 16, 4) << 0; \
14944
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14945
68
    tmp = 0; \
14946
67
    tmp |= fieldname(insn, 0, 4) << 0; \
14947
67
    tmp |= fieldname(insn, 5, 1) << 4; \
14948
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14949
67
    tmp = fieldname(insn, 24, 1); \
14950
66
    MCOperand_CreateImm0(MI, tmp); \
14951
66
    return S; \
14952
345
  case 363: \
14953
345
    tmp = 0; \
14954
345
    tmp |= fieldname(insn, 12, 4) << 0; \
14955
345
    tmp |= fieldname(insn, 22, 1) << 4; \
14956
345
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14957
345
    tmp = 0; \
14958
344
    tmp |= fieldname(insn, 12, 4) << 0; \
14959
344
    tmp |= fieldname(insn, 22, 1) << 4; \
14960
344
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14961
344
    tmp = 0; \
14962
344
    tmp |= fieldname(insn, 7, 1) << 4; \
14963
344
    tmp |= fieldname(insn, 16, 4) << 0; \
14964
344
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14965
344
    tmp = 0; \
14966
343
    tmp |= fieldname(insn, 0, 4) << 0; \
14967
343
    tmp |= fieldname(insn, 5, 1) << 4; \
14968
343
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14969
343
    tmp = fieldname(insn, 23, 2); \
14970
342
    MCOperand_CreateImm0(MI, tmp); \
14971
342
    return S; \
14972
343
  case 364: \
14973
81
    tmp = 0; \
14974
81
    tmp |= fieldname(insn, 12, 4) << 0; \
14975
81
    tmp |= fieldname(insn, 22, 1) << 4; \
14976
81
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14977
81
    tmp = 0; \
14978
80
    tmp |= fieldname(insn, 12, 4) << 0; \
14979
80
    tmp |= fieldname(insn, 22, 1) << 4; \
14980
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14981
80
    tmp = 0; \
14982
80
    tmp |= fieldname(insn, 7, 1) << 4; \
14983
80
    tmp |= fieldname(insn, 16, 4) << 0; \
14984
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14985
80
    tmp = fieldname(insn, 0, 4); \
14986
77
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14987
77
    tmp = fieldname(insn, 5, 1); \
14988
77
    MCOperand_CreateImm0(MI, tmp); \
14989
77
    tmp = fieldname(insn, 20, 2); \
14990
77
    MCOperand_CreateImm0(MI, tmp); \
14991
77
    return S; \
14992
213
  case 365: \
14993
213
    tmp = 0; \
14994
213
    tmp |= fieldname(insn, 12, 4) << 1; \
14995
213
    tmp |= fieldname(insn, 22, 1) << 0; \
14996
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14997
213
    tmp = 0; \
14998
213
    tmp |= fieldname(insn, 7, 1) << 0; \
14999
213
    tmp |= fieldname(insn, 16, 4) << 1; \
15000
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15001
213
    tmp = 0; \
15002
213
    tmp |= fieldname(insn, 0, 4) << 1; \
15003
213
    tmp |= fieldname(insn, 5, 1) << 0; \
15004
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15005
213
    return S; \
15006
436
  case 366: \
15007
436
    tmp = 0; \
15008
436
    tmp |= fieldname(insn, 12, 4) << 1; \
15009
436
    tmp |= fieldname(insn, 22, 1) << 0; \
15010
436
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15011
436
    tmp = 0; \
15012
436
    tmp |= fieldname(insn, 0, 4) << 1; \
15013
436
    tmp |= fieldname(insn, 5, 1) << 0; \
15014
436
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15015
436
    return S; \
15016
499
  case 367: \
15017
499
    tmp = 0; \
15018
499
    tmp |= fieldname(insn, 12, 4) << 1; \
15019
499
    tmp |= fieldname(insn, 22, 1) << 0; \
15020
499
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15021
499
    tmp = 0; \
15022
499
    tmp |= fieldname(insn, 0, 4) << 1; \
15023
499
    tmp |= fieldname(insn, 5, 1) << 0; \
15024
499
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15025
499
    return S; \
15026
499
  case 368: \
15027
480
    tmp = 0; \
15028
480
    tmp |= fieldname(insn, 12, 4) << 1; \
15029
480
    tmp |= fieldname(insn, 22, 1) << 0; \
15030
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15031
480
    tmp = 0; \
15032
480
    tmp |= fieldname(insn, 7, 1) << 0; \
15033
480
    tmp |= fieldname(insn, 16, 4) << 1; \
15034
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15035
480
    tmp = 0; \
15036
480
    tmp |= fieldname(insn, 0, 4) << 1; \
15037
480
    tmp |= fieldname(insn, 5, 1) << 0; \
15038
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15039
480
    return S; \
15040
480
  case 369: \
15041
474
    tmp = 0; \
15042
474
    tmp |= fieldname(insn, 12, 4) << 1; \
15043
474
    tmp |= fieldname(insn, 22, 1) << 0; \
15044
474
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15045
474
    tmp = 0; \
15046
474
    tmp |= fieldname(insn, 0, 4) << 0; \
15047
474
    tmp |= fieldname(insn, 5, 1) << 4; \
15048
474
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15049
474
    return S; \
15050
732k
  } \
15051
732k
}
ARMDisassembler.c:decodeToMCInst_2
Line
Count
Source
11359
352k
    uint64_t Address, bool *Decoder) \
11360
352k
{ \
11361
352k
  InsnType tmp; \
11362
352k
  /* printf("Idx = %u\n", Idx); */\
11363
352k
  switch (Idx) { \
11364
0
  default: /* llvm_unreachable("Invalid index!");*/  \
11365
0
  case 0: \
11366
0
    tmp = fieldname(insn, 12, 4); \
11367
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
0
    tmp = fieldname(insn, 16, 4); \
11369
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11370
0
    tmp = fieldname(insn, 0, 4); \
11371
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
0
    tmp = fieldname(insn, 28, 4); \
11373
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11374
0
    tmp = fieldname(insn, 20, 1); \
11375
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
0
    return S; \
11377
0
  case 1: \
11378
0
    tmp = fieldname(insn, 12, 4); \
11379
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11380
0
    tmp = fieldname(insn, 16, 4); \
11381
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
0
    tmp = 0; \
11383
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11384
0
    tmp |= fieldname(insn, 5, 7) << 5; \
11385
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11386
0
    tmp = fieldname(insn, 28, 4); \
11387
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
0
    tmp = fieldname(insn, 20, 1); \
11389
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11390
0
    return S; \
11391
0
  case 2: \
11392
0
    tmp = fieldname(insn, 12, 4); \
11393
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11394
0
    tmp = fieldname(insn, 16, 4); \
11395
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
0
    tmp = 0; \
11397
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11398
0
    tmp |= fieldname(insn, 5, 2) << 5; \
11399
0
    tmp |= fieldname(insn, 8, 4) << 8; \
11400
0
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11401
0
    tmp = fieldname(insn, 28, 4); \
11402
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11403
0
    tmp = fieldname(insn, 20, 1); \
11404
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11405
0
    return S; \
11406
0
  case 3: \
11407
0
    tmp = fieldname(insn, 12, 4); \
11408
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11409
0
    tmp = fieldname(insn, 16, 4); \
11410
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11411
0
    tmp = 0; \
11412
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11413
0
    tmp |= fieldname(insn, 5, 2) << 5; \
11414
0
    tmp |= fieldname(insn, 8, 4) << 8; \
11415
0
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11416
0
    tmp = fieldname(insn, 28, 4); \
11417
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
0
    tmp = fieldname(insn, 20, 1); \
11419
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
0
    return S; \
11421
0
  case 4: \
11422
0
    tmp = fieldname(insn, 16, 4); \
11423
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11424
0
    tmp = fieldname(insn, 0, 4); \
11425
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
0
    tmp = fieldname(insn, 8, 4); \
11427
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11428
0
    tmp = fieldname(insn, 28, 4); \
11429
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11430
0
    tmp = fieldname(insn, 20, 1); \
11431
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
0
    return S; \
11433
0
  case 5: \
11434
0
    tmp = fieldname(insn, 12, 4); \
11435
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
0
    tmp = fieldname(insn, 16, 4); \
11437
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11438
0
    tmp = fieldname(insn, 0, 4); \
11439
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
0
    tmp = fieldname(insn, 8, 4); \
11441
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11442
0
    tmp = fieldname(insn, 12, 4); \
11443
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
0
    tmp = fieldname(insn, 16, 4); \
11445
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11446
0
    tmp = fieldname(insn, 28, 4); \
11447
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
0
    return S; \
11449
0
  case 6: \
11450
0
    tmp = fieldname(insn, 12, 4); \
11451
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
0
    tmp = fieldname(insn, 16, 4); \
11453
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
0
    tmp = fieldname(insn, 0, 4); \
11455
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11456
0
    tmp = fieldname(insn, 8, 4); \
11457
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11458
0
    tmp = fieldname(insn, 28, 4); \
11459
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
0
    tmp = fieldname(insn, 20, 1); \
11461
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
0
    return S; \
11463
0
  case 7: \
11464
0
    if (!Check(&S, DecodeAddrMode3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11465
0
    return S; \
11466
0
  case 8: \
11467
0
    tmp = fieldname(insn, 12, 4); \
11468
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11469
0
    tmp = fieldname(insn, 16, 4); \
11470
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11471
0
    tmp = fieldname(insn, 0, 4); \
11472
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11473
0
    return S; \
11474
0
  case 9: \
11475
0
    if (!Check(&S, DecodeCPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
0
    return S; \
11477
0
  case 10: \
11478
0
    tmp = fieldname(insn, 9, 1); \
11479
0
    MCOperand_CreateImm0(MI, tmp); \
11480
0
    return S; \
11481
0
  case 11: \
11482
0
    tmp = fieldname(insn, 12, 4); \
11483
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
0
    tmp = fieldname(insn, 28, 4); \
11485
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
0
    return S; \
11487
0
  case 12: \
11488
0
    if (!Check(&S, DecodeQADDInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11489
0
    return S; \
11490
0
  case 13: \
11491
0
    if (!Check(&S, DecodeSMLAInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11492
0
    return S; \
11493
0
  case 14: \
11494
0
    if (!Check(&S, DecodeSwap(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11495
0
    return S; \
11496
0
  case 15: \
11497
0
    tmp = 0; \
11498
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11499
0
    tmp |= fieldname(insn, 8, 12) << 4; \
11500
0
    MCOperand_CreateImm0(MI, tmp); \
11501
0
    return S; \
11502
0
  case 16: \
11503
0
    if (!Check(&S, DecodeTSTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11504
0
    return S; \
11505
0
  case 17: \
11506
0
    tmp = fieldname(insn, 16, 4); \
11507
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
0
    tmp = 0; \
11509
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11510
0
    tmp |= fieldname(insn, 5, 7) << 5; \
11511
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
0
    tmp = fieldname(insn, 28, 4); \
11513
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
0
    return S; \
11515
0
  case 18: \
11516
0
    tmp = fieldname(insn, 16, 4); \
11517
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
0
    tmp = 0; \
11519
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11520
0
    tmp |= fieldname(insn, 5, 2) << 5; \
11521
0
    tmp |= fieldname(insn, 8, 4) << 8; \
11522
0
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11523
0
    tmp = fieldname(insn, 28, 4); \
11524
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11525
0
    return S; \
11526
0
  case 19: \
11527
0
    tmp = fieldname(insn, 12, 4); \
11528
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11529
0
    tmp = fieldname(insn, 16, 4); \
11530
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
0
    tmp = fieldname(insn, 0, 4); \
11532
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
0
    tmp = fieldname(insn, 8, 4); \
11534
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
0
    tmp = fieldname(insn, 12, 4); \
11536
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11537
0
    tmp = fieldname(insn, 16, 4); \
11538
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11539
0
    tmp = fieldname(insn, 28, 4); \
11540
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
0
    return S; \
11542
0
  case 20: \
11543
0
    tmp = fieldname(insn, 16, 4); \
11544
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11545
0
    tmp = fieldname(insn, 0, 4); \
11546
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
0
    tmp = fieldname(insn, 28, 4); \
11548
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11549
0
    return S; \
11550
0
  case 21: \
11551
0
    tmp = fieldname(insn, 12, 4); \
11552
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
0
    tmp = fieldname(insn, 0, 4); \
11554
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11555
0
    tmp = fieldname(insn, 16, 4); \
11556
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
0
    tmp = fieldname(insn, 28, 4); \
11558
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11559
0
    return S; \
11560
0
  case 22: \
11561
0
    tmp = fieldname(insn, 0, 4); \
11562
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11563
0
    tmp = fieldname(insn, 16, 4); \
11564
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11565
0
    tmp = fieldname(insn, 28, 4); \
11566
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11567
0
    return S; \
11568
0
  case 23: \
11569
0
    tmp = fieldname(insn, 12, 4); \
11570
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11571
0
    tmp = fieldname(insn, 16, 4); \
11572
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
0
    tmp = fieldname(insn, 28, 4); \
11574
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
0
    return S; \
11576
0
  case 24: \
11577
0
    tmp = fieldname(insn, 12, 4); \
11578
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11579
0
    tmp = fieldname(insn, 0, 4); \
11580
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
0
    tmp = fieldname(insn, 16, 4); \
11582
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11583
0
    tmp = fieldname(insn, 28, 4); \
11584
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
0
    return S; \
11586
0
  case 25: \
11587
0
    tmp = fieldname(insn, 12, 4); \
11588
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
0
    tmp = 0; \
11590
0
    tmp |= fieldname(insn, 8, 1) << 4; \
11591
0
    tmp |= fieldname(insn, 16, 4) << 0; \
11592
0
    tmp |= fieldname(insn, 22, 1) << 5; \
11593
0
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11594
0
    tmp = fieldname(insn, 28, 4); \
11595
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11596
0
    return S; \
11597
0
  case 26: \
11598
0
    tmp = 0; \
11599
0
    tmp |= fieldname(insn, 16, 4) << 0; \
11600
0
    tmp |= fieldname(insn, 22, 1) << 4; \
11601
0
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11602
0
    tmp = fieldname(insn, 0, 4); \
11603
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11604
0
    tmp = fieldname(insn, 28, 4); \
11605
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11606
0
    return S; \
11607
0
  case 27: \
11608
0
    tmp = 0; \
11609
0
    tmp |= fieldname(insn, 8, 1) << 4; \
11610
0
    tmp |= fieldname(insn, 16, 4) << 0; \
11611
0
    tmp |= fieldname(insn, 22, 1) << 5; \
11612
0
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11613
0
    tmp = fieldname(insn, 0, 4); \
11614
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11615
0
    tmp = fieldname(insn, 28, 4); \
11616
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
0
    return S; \
11618
0
  case 28: \
11619
0
    tmp = fieldname(insn, 0, 4); \
11620
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11621
0
    tmp = fieldname(insn, 28, 4); \
11622
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
0
    return S; \
11624
0
  case 29: \
11625
0
    tmp = fieldname(insn, 28, 4); \
11626
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11627
0
    return S; \
11628
0
  case 30: \
11629
0
    tmp = fieldname(insn, 16, 4); \
11630
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
0
    tmp = fieldname(insn, 0, 4); \
11632
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
0
    tmp = fieldname(insn, 8, 4); \
11634
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11635
0
    tmp = fieldname(insn, 28, 4); \
11636
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11637
0
    return S; \
11638
0
  case 31: \
11639
0
    tmp = fieldname(insn, 12, 4); \
11640
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
0
    tmp = fieldname(insn, 0, 4); \
11642
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
0
    tmp = fieldname(insn, 28, 4); \
11644
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11645
0
    tmp = fieldname(insn, 20, 1); \
11646
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
0
    return S; \
11648
0
  case 32: \
11649
0
    tmp = fieldname(insn, 12, 4); \
11650
0
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
0
    tmp = fieldname(insn, 0, 4); \
11652
0
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
0
    tmp = fieldname(insn, 28, 4); \
11654
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11655
0
    tmp = fieldname(insn, 20, 1); \
11656
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
0
    return S; \
11658
0
  case 33: \
11659
0
    tmp = fieldname(insn, 12, 4); \
11660
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
0
    tmp = 0; \
11662
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11663
0
    tmp |= fieldname(insn, 5, 7) << 5; \
11664
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11665
0
    tmp = fieldname(insn, 28, 4); \
11666
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
0
    tmp = fieldname(insn, 20, 1); \
11668
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
0
    return S; \
11670
0
  case 34: \
11671
0
    tmp = fieldname(insn, 0, 4); \
11672
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11673
0
    return S; \
11674
0
  case 35: \
11675
0
    tmp = fieldname(insn, 12, 4); \
11676
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
0
    tmp = fieldname(insn, 0, 4); \
11678
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
0
    tmp = fieldname(insn, 28, 4); \
11680
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11681
0
    return S; \
11682
0
  case 36: \
11683
0
    tmp = fieldname(insn, 0, 4); \
11684
0
    MCOperand_CreateImm0(MI, tmp); \
11685
0
    tmp = fieldname(insn, 28, 4); \
11686
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11687
0
    return S; \
11688
0
  case 37: \
11689
0
    tmp = fieldname(insn, 12, 4); \
11690
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
0
    tmp = 0; \
11692
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11693
0
    tmp |= fieldname(insn, 5, 2) << 5; \
11694
0
    tmp |= fieldname(insn, 8, 4) << 8; \
11695
0
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11696
0
    tmp = fieldname(insn, 28, 4); \
11697
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11698
0
    tmp = fieldname(insn, 20, 1); \
11699
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11700
0
    return S; \
11701
0
  case 38: \
11702
0
    tmp = fieldname(insn, 16, 4); \
11703
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11704
0
    tmp = fieldname(insn, 0, 4); \
11705
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11706
0
    tmp = fieldname(insn, 8, 4); \
11707
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11708
0
    tmp = fieldname(insn, 12, 4); \
11709
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11710
0
    tmp = fieldname(insn, 28, 4); \
11711
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11712
0
    tmp = fieldname(insn, 20, 1); \
11713
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11714
0
    return S; \
11715
0
  case 39: \
11716
0
    tmp = fieldname(insn, 16, 4); \
11717
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11718
0
    tmp = fieldname(insn, 0, 4); \
11719
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11720
0
    tmp = fieldname(insn, 8, 4); \
11721
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11722
0
    tmp = fieldname(insn, 12, 4); \
11723
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11724
0
    tmp = fieldname(insn, 28, 4); \
11725
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11726
0
    return S; \
11727
0
  case 40: \
11728
0
    tmp = fieldname(insn, 12, 4); \
11729
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11730
0
    tmp = fieldname(insn, 16, 4); \
11731
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11732
0
    tmp = fieldname(insn, 0, 4); \
11733
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11734
0
    tmp = fieldname(insn, 8, 4); \
11735
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11736
0
    tmp = fieldname(insn, 12, 4); \
11737
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11738
0
    tmp = fieldname(insn, 16, 4); \
11739
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11740
0
    tmp = fieldname(insn, 28, 4); \
11741
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11742
0
    tmp = fieldname(insn, 20, 1); \
11743
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11744
0
    return S; \
11745
0
  case 41: \
11746
0
    if (!Check(&S, DecodeDoubleRegStore(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
0
    return S; \
11748
0
  case 42: \
11749
0
    if (!Check(&S, DecodeDoubleRegLoad(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11750
0
    return S; \
11751
0
  case 43: \
11752
0
    tmp = fieldname(insn, 16, 4); \
11753
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11754
0
    tmp = fieldname(insn, 12, 4); \
11755
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11756
0
    tmp = fieldname(insn, 16, 4); \
11757
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11758
0
    tmp = 0; \
11759
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11760
0
    tmp |= fieldname(insn, 23, 1) << 4; \
11761
0
    if (!Check(&S, DecodePostIdxReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11762
0
    tmp = fieldname(insn, 28, 4); \
11763
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11764
0
    return S; \
11765
0
  case 44: \
11766
0
    tmp = fieldname(insn, 16, 4); \
11767
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11768
0
    tmp = fieldname(insn, 12, 4); \
11769
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11770
0
    tmp = fieldname(insn, 16, 4); \
11771
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11772
0
    tmp = 0; \
11773
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11774
0
    tmp |= fieldname(insn, 8, 4) << 4; \
11775
0
    tmp |= fieldname(insn, 23, 1) << 8; \
11776
0
    MCOperand_CreateImm0(MI, tmp); \
11777
0
    tmp = fieldname(insn, 28, 4); \
11778
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11779
0
    return S; \
11780
0
  case 45: \
11781
0
    if (!Check(&S, DecodeLDR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
0
    return S; \
11783
0
  case 46: \
11784
0
    tmp = fieldname(insn, 12, 4); \
11785
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
0
    tmp = fieldname(insn, 16, 4); \
11787
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
0
    tmp = fieldname(insn, 16, 4); \
11789
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
0
    tmp = 0; \
11791
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11792
0
    tmp |= fieldname(insn, 8, 4) << 4; \
11793
0
    tmp |= fieldname(insn, 23, 1) << 8; \
11794
0
    MCOperand_CreateImm0(MI, tmp); \
11795
0
    tmp = fieldname(insn, 28, 4); \
11796
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11797
0
    return S; \
11798
0
  case 47: \
11799
0
    tmp = fieldname(insn, 12, 4); \
11800
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11801
0
    tmp = fieldname(insn, 16, 4); \
11802
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11803
0
    tmp = fieldname(insn, 0, 12); \
11804
0
    MCOperand_CreateImm0(MI, tmp); \
11805
0
    tmp = fieldname(insn, 28, 4); \
11806
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11807
0
    tmp = fieldname(insn, 20, 1); \
11808
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11809
0
    return S; \
11810
0
  case 48: \
11811
0
    tmp = fieldname(insn, 12, 4); \
11812
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11813
0
    tmp = 0; \
11814
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11815
0
    tmp |= fieldname(insn, 22, 2) << 12; \
11816
0
    MCOperand_CreateImm0(MI, tmp); \
11817
0
    tmp = fieldname(insn, 28, 4); \
11818
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11819
0
    return S; \
11820
0
  case 49: \
11821
0
    if (!Check(&S, DecodeArmMOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
0
    return S; \
11823
0
  case 50: \
11824
0
    tmp = fieldname(insn, 16, 4); \
11825
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
0
    tmp = fieldname(insn, 0, 12); \
11827
0
    MCOperand_CreateImm0(MI, tmp); \
11828
0
    tmp = fieldname(insn, 28, 4); \
11829
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11830
0
    return S; \
11831
198
  case 51: \
11832
198
    return S; \
11833
0
  case 52: \
11834
0
    if (!Check(&S, DecodeHINTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11835
0
    return S; \
11836
0
  case 53: \
11837
0
    tmp = 0; \
11838
0
    tmp |= fieldname(insn, 16, 4) << 0; \
11839
0
    tmp |= fieldname(insn, 22, 1) << 4; \
11840
0
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11841
0
    tmp = fieldname(insn, 0, 12); \
11842
0
    MCOperand_CreateImm0(MI, tmp); \
11843
0
    tmp = fieldname(insn, 28, 4); \
11844
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11845
0
    return S; \
11846
0
  case 54: \
11847
0
    tmp = fieldname(insn, 12, 4); \
11848
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11849
0
    tmp = fieldname(insn, 0, 12); \
11850
0
    MCOperand_CreateImm0(MI, tmp); \
11851
0
    tmp = fieldname(insn, 28, 4); \
11852
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11853
0
    tmp = fieldname(insn, 20, 1); \
11854
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11855
0
    return S; \
11856
0
  case 55: \
11857
0
    if (!Check(&S, DecodeAddrMode2IdxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
0
    return S; \
11859
0
  case 56: \
11860
0
    tmp = fieldname(insn, 12, 4); \
11861
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11862
0
    tmp = 0; \
11863
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11864
0
    tmp |= fieldname(insn, 16, 4) << 13; \
11865
0
    tmp |= fieldname(insn, 23, 1) << 12; \
11866
0
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11867
0
    tmp = fieldname(insn, 28, 4); \
11868
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11869
0
    return S; \
11870
0
  case 57: \
11871
0
    tmp = 0; \
11872
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11873
0
    tmp |= fieldname(insn, 16, 4) << 13; \
11874
0
    tmp |= fieldname(insn, 23, 1) << 12; \
11875
0
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
0
    return S; \
11877
0
  case 58: \
11878
0
    if (!Check(&S, DecodeSTRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11879
0
    return S; \
11880
0
  case 59: \
11881
0
    if (!Check(&S, DecodeLDRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11882
0
    return S; \
11883
0
  case 60: \
11884
0
    tmp = fieldname(insn, 12, 4); \
11885
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
0
    tmp = 0; \
11887
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11888
0
    tmp |= fieldname(insn, 16, 4) << 13; \
11889
0
    tmp |= fieldname(insn, 23, 1) << 12; \
11890
0
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11891
0
    tmp = fieldname(insn, 28, 4); \
11892
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11893
0
    return S; \
11894
0
  case 61: \
11895
0
    tmp = fieldname(insn, 0, 4); \
11896
0
    if (!Check(&S, DecodeMemBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11897
0
    return S; \
11898
0
  case 62: \
11899
0
    tmp = fieldname(insn, 0, 4); \
11900
0
    if (!Check(&S, DecodeInstSyncBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11901
0
    return S; \
11902
0
  case 63: \
11903
0
    tmp = fieldname(insn, 12, 4); \
11904
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11905
0
    tmp = 0; \
11906
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11907
0
    tmp |= fieldname(insn, 5, 7) << 5; \
11908
0
    tmp |= fieldname(insn, 16, 4) << 13; \
11909
0
    tmp |= fieldname(insn, 23, 1) << 12; \
11910
0
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11911
0
    tmp = fieldname(insn, 28, 4); \
11912
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11913
0
    return S; \
11914
0
  case 64: \
11915
0
    tmp = 0; \
11916
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11917
0
    tmp |= fieldname(insn, 5, 7) << 5; \
11918
0
    tmp |= fieldname(insn, 16, 4) << 13; \
11919
0
    tmp |= fieldname(insn, 23, 1) << 12; \
11920
0
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11921
0
    return S; \
11922
0
  case 65: \
11923
0
    tmp = fieldname(insn, 12, 4); \
11924
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11925
0
    tmp = fieldname(insn, 16, 4); \
11926
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11927
0
    tmp = fieldname(insn, 0, 4); \
11928
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11929
0
    tmp = fieldname(insn, 28, 4); \
11930
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11931
0
    return S; \
11932
0
  case 66: \
11933
0
    tmp = fieldname(insn, 12, 4); \
11934
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11935
0
    tmp = fieldname(insn, 16, 4); \
11936
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11937
0
    tmp = fieldname(insn, 0, 4); \
11938
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11939
0
    tmp = fieldname(insn, 7, 5); \
11940
0
    MCOperand_CreateImm0(MI, tmp); \
11941
0
    tmp = fieldname(insn, 28, 4); \
11942
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11943
0
    return S; \
11944
0
  case 67: \
11945
0
    tmp = fieldname(insn, 16, 4); \
11946
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11947
0
    tmp = fieldname(insn, 0, 4); \
11948
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11949
0
    tmp = fieldname(insn, 8, 4); \
11950
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11951
0
    tmp = fieldname(insn, 28, 4); \
11952
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11953
0
    return S; \
11954
0
  case 68: \
11955
0
    tmp = fieldname(insn, 16, 4); \
11956
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11957
0
    tmp = fieldname(insn, 0, 4); \
11958
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11959
0
    tmp = fieldname(insn, 8, 4); \
11960
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
0
    tmp = fieldname(insn, 12, 4); \
11962
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11963
0
    tmp = fieldname(insn, 28, 4); \
11964
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
0
    return S; \
11966
0
  case 69: \
11967
0
    tmp = fieldname(insn, 12, 4); \
11968
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11969
0
    tmp = fieldname(insn, 16, 4); \
11970
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11971
0
    tmp = fieldname(insn, 0, 4); \
11972
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
0
    tmp = fieldname(insn, 28, 4); \
11974
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
0
    return S; \
11976
0
  case 70: \
11977
0
    tmp = fieldname(insn, 12, 4); \
11978
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11979
0
    tmp = fieldname(insn, 0, 4); \
11980
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11981
0
    tmp = fieldname(insn, 10, 2); \
11982
0
    MCOperand_CreateImm0(MI, tmp); \
11983
0
    tmp = fieldname(insn, 28, 4); \
11984
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11985
0
    return S; \
11986
0
  case 71: \
11987
0
    tmp = fieldname(insn, 12, 4); \
11988
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11989
0
    tmp = fieldname(insn, 16, 4); \
11990
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
0
    tmp = fieldname(insn, 0, 4); \
11992
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11993
0
    tmp = fieldname(insn, 10, 2); \
11994
0
    MCOperand_CreateImm0(MI, tmp); \
11995
0
    tmp = fieldname(insn, 28, 4); \
11996
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11997
0
    return S; \
11998
0
  case 72: \
11999
0
    if (!Check(&S, DecodeSTRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12000
0
    return S; \
12001
0
  case 73: \
12002
0
    if (!Check(&S, DecodeLDRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12003
0
    return S; \
12004
0
  case 74: \
12005
0
    tmp = fieldname(insn, 12, 4); \
12006
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12007
0
    tmp = fieldname(insn, 16, 5); \
12008
0
    MCOperand_CreateImm0(MI, tmp); \
12009
0
    tmp = fieldname(insn, 0, 4); \
12010
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12011
0
    tmp = 0; \
12012
0
    tmp |= fieldname(insn, 6, 1) << 5; \
12013
0
    tmp |= fieldname(insn, 7, 5) << 0; \
12014
0
    MCOperand_CreateImm0(MI, tmp); \
12015
0
    tmp = fieldname(insn, 28, 4); \
12016
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12017
0
    return S; \
12018
0
  case 75: \
12019
0
    tmp = fieldname(insn, 12, 4); \
12020
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12021
0
    tmp = fieldname(insn, 16, 4); \
12022
0
    MCOperand_CreateImm0(MI, tmp); \
12023
0
    tmp = fieldname(insn, 0, 4); \
12024
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12025
0
    tmp = fieldname(insn, 28, 4); \
12026
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12027
0
    return S; \
12028
0
  case 76: \
12029
0
    tmp = fieldname(insn, 12, 4); \
12030
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12031
0
    tmp = fieldname(insn, 0, 4); \
12032
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12033
0
    tmp = fieldname(insn, 7, 5); \
12034
0
    MCOperand_CreateImm0(MI, tmp); \
12035
0
    tmp = fieldname(insn, 16, 5); \
12036
0
    MCOperand_CreateImm0(MI, tmp); \
12037
0
    tmp = fieldname(insn, 28, 4); \
12038
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12039
0
    return S; \
12040
0
  case 77: \
12041
0
    tmp = fieldname(insn, 12, 4); \
12042
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12043
0
    tmp = 0; \
12044
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12045
0
    tmp |= fieldname(insn, 5, 7) << 5; \
12046
0
    tmp |= fieldname(insn, 16, 4) << 13; \
12047
0
    tmp |= fieldname(insn, 23, 1) << 12; \
12048
0
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12049
0
    tmp = fieldname(insn, 28, 4); \
12050
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12051
0
    return S; \
12052
0
  case 78: \
12053
0
    tmp = fieldname(insn, 12, 4); \
12054
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12055
0
    tmp = fieldname(insn, 12, 4); \
12056
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12057
0
    tmp = 0; \
12058
0
    tmp |= fieldname(insn, 7, 5) << 0; \
12059
0
    tmp |= fieldname(insn, 16, 5) << 5; \
12060
0
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12061
0
    tmp = fieldname(insn, 28, 4); \
12062
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12063
0
    return S; \
12064
0
  case 79: \
12065
0
    tmp = fieldname(insn, 12, 4); \
12066
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12067
0
    tmp = fieldname(insn, 12, 4); \
12068
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12069
0
    tmp = fieldname(insn, 0, 4); \
12070
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12071
0
    tmp = 0; \
12072
0
    tmp |= fieldname(insn, 7, 5) << 0; \
12073
0
    tmp |= fieldname(insn, 16, 5) << 5; \
12074
0
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12075
0
    tmp = fieldname(insn, 28, 4); \
12076
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12077
0
    return S; \
12078
0
  case 80: \
12079
0
    tmp = fieldname(insn, 16, 4); \
12080
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12081
0
    tmp = fieldname(insn, 28, 4); \
12082
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12083
0
    tmp = fieldname(insn, 0, 16); \
12084
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12085
0
    return S; \
12086
0
  case 81: \
12087
0
    tmp = fieldname(insn, 16, 4); \
12088
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12089
0
    return S; \
12090
0
  case 82: \
12091
0
    if (!Check(&S, DecodeMemMultipleWritebackInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12092
0
    return S; \
12093
0
  case 83: \
12094
0
    tmp = fieldname(insn, 0, 5); \
12095
0
    MCOperand_CreateImm0(MI, tmp); \
12096
0
    return S; \
12097
0
  case 84: \
12098
0
    if (!Check(&S, DecodeBranchImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12099
0
    return S; \
12100
0
  case 85: \
12101
0
    tmp = 0; \
12102
0
    tmp |= fieldname(insn, 0, 24) << 1; \
12103
0
    tmp |= fieldname(insn, 24, 1) << 0; \
12104
0
    MCOperand_CreateImm0(MI, tmp); \
12105
0
    return S; \
12106
0
  case 86: \
12107
0
    if (!Check(&S, DecoderForMRRC2AndMCRR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12108
0
    return S; \
12109
0
  case 87: \
12110
0
    tmp = fieldname(insn, 8, 4); \
12111
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12112
0
    tmp = fieldname(insn, 4, 4); \
12113
0
    MCOperand_CreateImm0(MI, tmp); \
12114
0
    tmp = fieldname(insn, 12, 4); \
12115
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12116
0
    tmp = fieldname(insn, 16, 4); \
12117
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12118
0
    tmp = fieldname(insn, 0, 4); \
12119
0
    MCOperand_CreateImm0(MI, tmp); \
12120
0
    tmp = fieldname(insn, 28, 4); \
12121
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12122
0
    return S; \
12123
0
  case 88: \
12124
0
    tmp = fieldname(insn, 12, 4); \
12125
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12126
0
    tmp = fieldname(insn, 16, 4); \
12127
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12128
0
    tmp = fieldname(insn, 8, 4); \
12129
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12130
0
    tmp = fieldname(insn, 4, 4); \
12131
0
    MCOperand_CreateImm0(MI, tmp); \
12132
0
    tmp = fieldname(insn, 0, 4); \
12133
0
    MCOperand_CreateImm0(MI, tmp); \
12134
0
    tmp = fieldname(insn, 28, 4); \
12135
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12136
0
    return S; \
12137
0
  case 89: \
12138
0
    tmp = fieldname(insn, 0, 24); \
12139
0
    MCOperand_CreateImm0(MI, tmp); \
12140
0
    tmp = fieldname(insn, 28, 4); \
12141
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12142
0
    return S; \
12143
0
  case 90: \
12144
0
    if (!Check(&S, DecodeCopMemInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12145
0
    return S; \
12146
0
  case 91: \
12147
0
    tmp = fieldname(insn, 8, 4); \
12148
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12149
0
    tmp = fieldname(insn, 20, 4); \
12150
0
    MCOperand_CreateImm0(MI, tmp); \
12151
0
    tmp = fieldname(insn, 12, 4); \
12152
0
    MCOperand_CreateImm0(MI, tmp); \
12153
0
    tmp = fieldname(insn, 16, 4); \
12154
0
    MCOperand_CreateImm0(MI, tmp); \
12155
0
    tmp = fieldname(insn, 0, 4); \
12156
0
    MCOperand_CreateImm0(MI, tmp); \
12157
0
    tmp = fieldname(insn, 5, 3); \
12158
0
    MCOperand_CreateImm0(MI, tmp); \
12159
0
    return S; \
12160
0
  case 92: \
12161
0
    tmp = fieldname(insn, 8, 4); \
12162
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12163
0
    tmp = fieldname(insn, 20, 4); \
12164
0
    MCOperand_CreateImm0(MI, tmp); \
12165
0
    tmp = fieldname(insn, 12, 4); \
12166
0
    MCOperand_CreateImm0(MI, tmp); \
12167
0
    tmp = fieldname(insn, 16, 4); \
12168
0
    MCOperand_CreateImm0(MI, tmp); \
12169
0
    tmp = fieldname(insn, 0, 4); \
12170
0
    MCOperand_CreateImm0(MI, tmp); \
12171
0
    tmp = fieldname(insn, 5, 3); \
12172
0
    MCOperand_CreateImm0(MI, tmp); \
12173
0
    tmp = fieldname(insn, 28, 4); \
12174
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12175
0
    return S; \
12176
0
  case 93: \
12177
0
    tmp = fieldname(insn, 8, 4); \
12178
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12179
0
    tmp = fieldname(insn, 21, 3); \
12180
0
    MCOperand_CreateImm0(MI, tmp); \
12181
0
    tmp = fieldname(insn, 12, 4); \
12182
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12183
0
    tmp = fieldname(insn, 16, 4); \
12184
0
    MCOperand_CreateImm0(MI, tmp); \
12185
0
    tmp = fieldname(insn, 0, 4); \
12186
0
    MCOperand_CreateImm0(MI, tmp); \
12187
0
    tmp = fieldname(insn, 5, 3); \
12188
0
    MCOperand_CreateImm0(MI, tmp); \
12189
0
    return S; \
12190
0
  case 94: \
12191
0
    tmp = fieldname(insn, 8, 4); \
12192
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12193
0
    tmp = fieldname(insn, 21, 3); \
12194
0
    MCOperand_CreateImm0(MI, tmp); \
12195
0
    tmp = fieldname(insn, 12, 4); \
12196
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12197
0
    tmp = fieldname(insn, 16, 4); \
12198
0
    MCOperand_CreateImm0(MI, tmp); \
12199
0
    tmp = fieldname(insn, 0, 4); \
12200
0
    MCOperand_CreateImm0(MI, tmp); \
12201
0
    tmp = fieldname(insn, 5, 3); \
12202
0
    MCOperand_CreateImm0(MI, tmp); \
12203
0
    tmp = fieldname(insn, 28, 4); \
12204
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12205
0
    return S; \
12206
0
  case 95: \
12207
0
    tmp = fieldname(insn, 12, 4); \
12208
0
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12209
0
    tmp = fieldname(insn, 8, 4); \
12210
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12211
0
    tmp = fieldname(insn, 21, 3); \
12212
0
    MCOperand_CreateImm0(MI, tmp); \
12213
0
    tmp = fieldname(insn, 16, 4); \
12214
0
    MCOperand_CreateImm0(MI, tmp); \
12215
0
    tmp = fieldname(insn, 0, 4); \
12216
0
    MCOperand_CreateImm0(MI, tmp); \
12217
0
    tmp = fieldname(insn, 5, 3); \
12218
0
    MCOperand_CreateImm0(MI, tmp); \
12219
0
    return S; \
12220
0
  case 96: \
12221
0
    tmp = fieldname(insn, 12, 4); \
12222
0
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12223
0
    tmp = fieldname(insn, 8, 4); \
12224
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12225
0
    tmp = fieldname(insn, 21, 3); \
12226
0
    MCOperand_CreateImm0(MI, tmp); \
12227
0
    tmp = fieldname(insn, 16, 4); \
12228
0
    MCOperand_CreateImm0(MI, tmp); \
12229
0
    tmp = fieldname(insn, 0, 4); \
12230
0
    MCOperand_CreateImm0(MI, tmp); \
12231
0
    tmp = fieldname(insn, 5, 3); \
12232
0
    MCOperand_CreateImm0(MI, tmp); \
12233
0
    tmp = fieldname(insn, 28, 4); \
12234
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12235
0
    return S; \
12236
0
  case 97: \
12237
0
    tmp = 0; \
12238
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12239
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12240
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12241
0
    tmp = 0; \
12242
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12243
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12244
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12245
0
    tmp = 0; \
12246
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12247
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12248
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12249
0
    return S; \
12250
0
  case 98: \
12251
0
    tmp = 0; \
12252
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12253
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12254
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12255
0
    tmp = 0; \
12256
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12257
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12258
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12259
0
    tmp = 0; \
12260
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12261
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12262
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12263
0
    return S; \
12264
0
  case 99: \
12265
0
    tmp = 0; \
12266
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12267
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12268
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12269
0
    tmp = 0; \
12270
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12271
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12272
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12273
0
    tmp = 0; \
12274
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12275
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12276
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12277
0
    return S; \
12278
0
  case 100: \
12279
0
    tmp = 0; \
12280
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12281
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12282
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12283
0
    tmp = 0; \
12284
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12285
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12286
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12287
0
    tmp = 0; \
12288
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12289
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12290
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12291
0
    return S; \
12292
0
  case 101: \
12293
0
    tmp = 0; \
12294
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12295
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12296
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12297
0
    tmp = 0; \
12298
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12299
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12300
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12301
0
    tmp = 0; \
12302
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12303
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12304
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12305
0
    return S; \
12306
0
  case 102: \
12307
0
    tmp = 0; \
12308
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12309
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12310
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12311
0
    tmp = 0; \
12312
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12313
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12314
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12315
0
    tmp = 0; \
12316
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12317
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12318
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12319
0
    return S; \
12320
0
  case 103: \
12321
0
    tmp = 0; \
12322
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12323
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12324
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12325
0
    tmp = 0; \
12326
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12327
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12328
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12329
0
    tmp = 0; \
12330
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12331
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12332
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12333
0
    return S; \
12334
0
  case 104: \
12335
0
    tmp = 0; \
12336
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12337
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12338
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12339
0
    tmp = 0; \
12340
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12341
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12342
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12343
0
    tmp = 0; \
12344
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12345
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12346
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12347
0
    tmp = 0; \
12348
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12349
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12350
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12351
0
    return S; \
12352
0
  case 105: \
12353
0
    tmp = 0; \
12354
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12355
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12356
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12357
0
    tmp = 0; \
12358
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12359
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12360
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12361
0
    tmp = 0; \
12362
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12363
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12364
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12365
0
    tmp = 0; \
12366
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12367
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12368
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12369
0
    return S; \
12370
0
  case 106: \
12371
0
    tmp = 0; \
12372
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12373
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12374
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12375
0
    tmp = 0; \
12376
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12377
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12378
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12379
0
    tmp = 0; \
12380
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12381
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12382
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12383
0
    tmp = 0; \
12384
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12385
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12386
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12387
0
    return S; \
12388
0
  case 107: \
12389
0
    tmp = 0; \
12390
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12391
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12392
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12393
0
    tmp = 0; \
12394
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12395
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12396
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12397
0
    tmp = 0; \
12398
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12399
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12400
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12401
0
    tmp = fieldname(insn, 0, 3); \
12402
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12403
0
    tmp = 0; \
12404
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12405
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12406
0
    MCOperand_CreateImm0(MI, tmp); \
12407
0
    return S; \
12408
0
  case 108: \
12409
0
    tmp = 0; \
12410
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12411
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12412
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12413
0
    tmp = 0; \
12414
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12415
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12416
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12417
0
    tmp = 0; \
12418
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12419
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12420
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12421
0
    tmp = fieldname(insn, 0, 3); \
12422
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12423
0
    tmp = 0; \
12424
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12425
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12426
0
    MCOperand_CreateImm0(MI, tmp); \
12427
0
    return S; \
12428
0
  case 109: \
12429
0
    tmp = 0; \
12430
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12431
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12432
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12433
0
    tmp = 0; \
12434
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12435
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12436
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12437
0
    tmp = 0; \
12438
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12439
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12440
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12441
0
    tmp = fieldname(insn, 0, 3); \
12442
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12443
0
    tmp = 0; \
12444
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12445
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12446
0
    MCOperand_CreateImm0(MI, tmp); \
12447
0
    return S; \
12448
0
  case 110: \
12449
0
    tmp = 0; \
12450
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12451
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12452
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12453
0
    tmp = 0; \
12454
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12455
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12456
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12457
0
    tmp = fieldname(insn, 0, 3); \
12458
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12459
0
    tmp = 0; \
12460
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12461
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12462
0
    MCOperand_CreateImm0(MI, tmp); \
12463
0
    return S; \
12464
0
  case 111: \
12465
0
    tmp = 0; \
12466
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12467
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12468
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12469
0
    tmp = 0; \
12470
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12471
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12472
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12473
0
    tmp = fieldname(insn, 0, 3); \
12474
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12475
0
    tmp = 0; \
12476
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12477
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12478
0
    MCOperand_CreateImm0(MI, tmp); \
12479
0
    return S; \
12480
0
  case 112: \
12481
0
    tmp = 0; \
12482
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12483
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12484
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12485
0
    tmp = 0; \
12486
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12487
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12488
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12489
0
    tmp = fieldname(insn, 0, 3); \
12490
0
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12491
0
    tmp = 0; \
12492
0
    tmp |= fieldname(insn, 3, 1) << 0; \
12493
0
    tmp |= fieldname(insn, 5, 1) << 1; \
12494
0
    MCOperand_CreateImm0(MI, tmp); \
12495
0
    return S; \
12496
0
  case 113: \
12497
0
    tmp = 0; \
12498
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12499
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12500
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12501
0
    tmp = 0; \
12502
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12503
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12504
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12505
0
    tmp = 0; \
12506
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12507
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12508
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12509
0
    tmp = fieldname(insn, 0, 4); \
12510
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12511
0
    tmp = fieldname(insn, 5, 1); \
12512
0
    MCOperand_CreateImm0(MI, tmp); \
12513
0
    return S; \
12514
0
  case 114: \
12515
0
    tmp = 0; \
12516
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12517
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12518
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12519
0
    tmp = 0; \
12520
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12521
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12522
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12523
0
    tmp = 0; \
12524
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12525
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12526
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12527
0
    tmp = fieldname(insn, 0, 4); \
12528
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12529
0
    tmp = fieldname(insn, 5, 1); \
12530
0
    MCOperand_CreateImm0(MI, tmp); \
12531
0
    return S; \
12532
0
  case 115: \
12533
0
    tmp = 0; \
12534
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12535
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12536
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12537
0
    tmp = 0; \
12538
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12539
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12540
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12541
0
    tmp = 0; \
12542
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12543
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12544
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12545
0
    tmp = fieldname(insn, 0, 4); \
12546
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12547
0
    tmp = fieldname(insn, 5, 1); \
12548
0
    MCOperand_CreateImm0(MI, tmp); \
12549
0
    return S; \
12550
0
  case 116: \
12551
0
    tmp = 0; \
12552
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12553
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12554
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12555
0
    tmp = 0; \
12556
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12557
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12558
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12559
0
    tmp = fieldname(insn, 0, 4); \
12560
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12561
0
    tmp = fieldname(insn, 5, 1); \
12562
0
    MCOperand_CreateImm0(MI, tmp); \
12563
0
    return S; \
12564
0
  case 117: \
12565
0
    tmp = 0; \
12566
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12567
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12568
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12569
0
    tmp = 0; \
12570
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12571
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12572
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12573
0
    tmp = fieldname(insn, 0, 4); \
12574
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12575
0
    tmp = fieldname(insn, 5, 1); \
12576
0
    MCOperand_CreateImm0(MI, tmp); \
12577
0
    return S; \
12578
0
  case 118: \
12579
0
    tmp = 0; \
12580
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12581
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12582
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12583
0
    tmp = 0; \
12584
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12585
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12586
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12587
0
    tmp = fieldname(insn, 0, 4); \
12588
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12589
0
    tmp = fieldname(insn, 5, 1); \
12590
0
    MCOperand_CreateImm0(MI, tmp); \
12591
0
    return S; \
12592
0
  case 119: \
12593
0
    tmp = 0; \
12594
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12595
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12596
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12597
0
    tmp = 0; \
12598
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12599
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12600
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12601
0
    tmp = 0; \
12602
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12603
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12604
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12605
0
    tmp = fieldname(insn, 10, 1); \
12606
0
    MCOperand_CreateImm0(MI, tmp); \
12607
0
    return S; \
12608
0
  case 120: \
12609
0
    tmp = 0; \
12610
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12611
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12612
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12613
0
    tmp = 0; \
12614
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12615
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12616
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12617
0
    tmp = 0; \
12618
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12619
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12620
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12621
0
    tmp = fieldname(insn, 9, 2); \
12622
0
    MCOperand_CreateImm0(MI, tmp); \
12623
0
    return S; \
12624
0
  case 121: \
12625
0
    tmp = 0; \
12626
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12627
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12628
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12629
0
    tmp = 0; \
12630
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12631
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12632
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12633
0
    tmp = 0; \
12634
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12635
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12636
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12637
0
    tmp = fieldname(insn, 8, 3); \
12638
0
    MCOperand_CreateImm0(MI, tmp); \
12639
0
    return S; \
12640
0
  case 122: \
12641
0
    tmp = 0; \
12642
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12643
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12644
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12645
0
    tmp = 0; \
12646
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12647
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12648
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12649
0
    tmp = 0; \
12650
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12651
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12652
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12653
0
    tmp = fieldname(insn, 11, 1); \
12654
0
    MCOperand_CreateImm0(MI, tmp); \
12655
0
    return S; \
12656
0
  case 123: \
12657
0
    tmp = 0; \
12658
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12659
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12660
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12661
0
    tmp = 0; \
12662
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12663
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12664
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12665
0
    tmp = 0; \
12666
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12667
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12668
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12669
0
    tmp = fieldname(insn, 10, 2); \
12670
0
    MCOperand_CreateImm0(MI, tmp); \
12671
0
    return S; \
12672
0
  case 124: \
12673
0
    tmp = 0; \
12674
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12675
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12676
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12677
0
    tmp = 0; \
12678
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12679
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12680
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12681
0
    tmp = 0; \
12682
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12683
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12684
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12685
0
    tmp = fieldname(insn, 9, 3); \
12686
0
    MCOperand_CreateImm0(MI, tmp); \
12687
0
    return S; \
12688
0
  case 125: \
12689
0
    tmp = 0; \
12690
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12691
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12692
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12693
0
    tmp = 0; \
12694
0
    tmp |= fieldname(insn, 7, 1) << 4; \
12695
0
    tmp |= fieldname(insn, 16, 4) << 0; \
12696
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12697
0
    tmp = 0; \
12698
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12699
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12700
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12701
0
    tmp = fieldname(insn, 8, 4); \
12702
0
    MCOperand_CreateImm0(MI, tmp); \
12703
0
    return S; \
12704
0
  case 126: \
12705
0
    tmp = 0; \
12706
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12707
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12708
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12709
0
    tmp = 0; \
12710
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12711
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12712
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12713
0
    return S; \
12714
0
  case 127: \
12715
0
    tmp = 0; \
12716
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12717
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12718
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12719
0
    tmp = 0; \
12720
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12721
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12722
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12723
0
    return S; \
12724
0
  case 128: \
12725
0
    tmp = 0; \
12726
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12727
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12728
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12729
0
    tmp = 0; \
12730
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12731
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12732
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12733
0
    tmp = 0; \
12734
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12735
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12736
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12737
0
    tmp = 0; \
12738
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12739
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12740
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12741
0
    return S; \
12742
0
  case 129: \
12743
0
    tmp = 0; \
12744
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12745
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12746
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12747
0
    tmp = 0; \
12748
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12749
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12750
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12751
0
    tmp = 0; \
12752
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12753
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12754
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12755
0
    tmp = 0; \
12756
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12757
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12758
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12759
0
    return S; \
12760
0
  case 130: \
12761
0
    tmp = 0; \
12762
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12763
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12764
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12765
0
    tmp = 0; \
12766
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12767
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12768
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12769
0
    return S; \
12770
0
  case 131: \
12771
0
    if (!Check(&S, DecodeVSHLMaxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12772
0
    return S; \
12773
0
  case 132: \
12774
0
    tmp = 0; \
12775
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12776
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12777
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12778
0
    tmp = 0; \
12779
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12780
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12781
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12782
0
    tmp = 0; \
12783
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12784
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12785
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12786
0
    return S; \
12787
0
  case 133: \
12788
0
    tmp = 0; \
12789
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12790
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12791
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12792
0
    tmp = 0; \
12793
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12794
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12795
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12796
0
    tmp = 0; \
12797
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12798
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12799
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12800
0
    return S; \
12801
0
  case 134: \
12802
0
    tmp = 0; \
12803
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12804
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12805
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12806
0
    tmp = 0; \
12807
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12808
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12809
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12810
0
    return S; \
12811
0
  case 135: \
12812
0
    if (!Check(&S, DecodeTBLInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12813
0
    return S; \
12814
0
  case 136: \
12815
0
    tmp = 0; \
12816
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12817
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12818
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12819
0
    tmp = 0; \
12820
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12821
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12822
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12823
0
    tmp = fieldname(insn, 19, 1); \
12824
0
    MCOperand_CreateImm0(MI, tmp); \
12825
0
    return S; \
12826
0
  case 137: \
12827
0
    tmp = 0; \
12828
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12829
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12830
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12831
0
    tmp = 0; \
12832
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12833
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12834
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12835
0
    tmp = fieldname(insn, 18, 2); \
12836
0
    MCOperand_CreateImm0(MI, tmp); \
12837
0
    return S; \
12838
0
  case 138: \
12839
0
    tmp = 0; \
12840
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12841
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12842
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12843
0
    tmp = 0; \
12844
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12845
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12846
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12847
0
    tmp = fieldname(insn, 17, 3); \
12848
0
    MCOperand_CreateImm0(MI, tmp); \
12849
0
    return S; \
12850
0
  case 139: \
12851
0
    tmp = 0; \
12852
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12853
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12854
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12855
0
    tmp = 0; \
12856
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12857
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12858
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12859
0
    tmp = fieldname(insn, 19, 1); \
12860
0
    MCOperand_CreateImm0(MI, tmp); \
12861
0
    return S; \
12862
0
  case 140: \
12863
0
    tmp = 0; \
12864
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12865
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12866
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12867
0
    tmp = 0; \
12868
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12869
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12870
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12871
0
    tmp = fieldname(insn, 18, 2); \
12872
0
    MCOperand_CreateImm0(MI, tmp); \
12873
0
    return S; \
12874
0
  case 141: \
12875
0
    tmp = 0; \
12876
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12877
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12878
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12879
0
    tmp = 0; \
12880
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12881
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12882
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12883
0
    tmp = fieldname(insn, 17, 3); \
12884
0
    MCOperand_CreateImm0(MI, tmp); \
12885
0
    return S; \
12886
0
  case 142: \
12887
0
    tmp = 0; \
12888
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12889
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12890
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12891
0
    tmp = 0; \
12892
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12893
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12894
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12895
0
    tmp = fieldname(insn, 16, 3); \
12896
0
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12897
0
    return S; \
12898
0
  case 143: \
12899
0
    tmp = 0; \
12900
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12901
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12902
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12903
0
    tmp = 0; \
12904
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12905
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12906
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12907
0
    tmp = fieldname(insn, 16, 4); \
12908
0
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12909
0
    return S; \
12910
0
  case 144: \
12911
0
    tmp = 0; \
12912
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12913
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12914
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12915
0
    tmp = 0; \
12916
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12917
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12918
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12919
0
    tmp = fieldname(insn, 16, 5); \
12920
0
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12921
0
    return S; \
12922
0
  case 145: \
12923
0
    tmp = 0; \
12924
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12925
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12926
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12927
0
    tmp = 0; \
12928
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12929
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12930
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12931
0
    tmp = 0; \
12932
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12933
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12934
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12935
0
    tmp = fieldname(insn, 16, 3); \
12936
0
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12937
0
    return S; \
12938
0
  case 146: \
12939
0
    tmp = 0; \
12940
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12941
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12942
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12943
0
    tmp = 0; \
12944
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12945
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12946
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12947
0
    tmp = 0; \
12948
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12949
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12950
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12951
0
    tmp = fieldname(insn, 16, 4); \
12952
0
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12953
0
    return S; \
12954
0
  case 147: \
12955
0
    tmp = 0; \
12956
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12957
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12958
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12959
0
    tmp = 0; \
12960
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12961
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12962
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12963
0
    tmp = 0; \
12964
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12965
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12966
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12967
0
    tmp = fieldname(insn, 16, 5); \
12968
0
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12969
0
    return S; \
12970
0
  case 148: \
12971
0
    tmp = 0; \
12972
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12973
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12974
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12975
0
    tmp = 0; \
12976
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12977
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12978
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12979
0
    tmp = fieldname(insn, 16, 3); \
12980
0
    MCOperand_CreateImm0(MI, tmp); \
12981
0
    return S; \
12982
0
  case 149: \
12983
0
    tmp = 0; \
12984
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12985
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12986
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12987
0
    tmp = 0; \
12988
0
    tmp |= fieldname(insn, 12, 4) << 0; \
12989
0
    tmp |= fieldname(insn, 22, 1) << 4; \
12990
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12991
0
    tmp = 0; \
12992
0
    tmp |= fieldname(insn, 0, 4) << 0; \
12993
0
    tmp |= fieldname(insn, 5, 1) << 4; \
12994
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12995
0
    tmp = fieldname(insn, 16, 3); \
12996
0
    MCOperand_CreateImm0(MI, tmp); \
12997
0
    return S; \
12998
0
  case 150: \
12999
0
    tmp = 0; \
13000
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13001
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13002
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13003
0
    tmp = 0; \
13004
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13005
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13006
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13007
0
    tmp = fieldname(insn, 16, 4); \
13008
0
    MCOperand_CreateImm0(MI, tmp); \
13009
0
    return S; \
13010
0
  case 151: \
13011
0
    tmp = 0; \
13012
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13013
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13014
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13015
0
    tmp = 0; \
13016
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13017
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13018
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13019
0
    tmp = 0; \
13020
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13021
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13022
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13023
0
    tmp = fieldname(insn, 16, 4); \
13024
0
    MCOperand_CreateImm0(MI, tmp); \
13025
0
    return S; \
13026
0
  case 152: \
13027
0
    tmp = 0; \
13028
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13029
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13030
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13031
0
    tmp = 0; \
13032
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13033
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13034
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13035
0
    tmp = fieldname(insn, 16, 5); \
13036
0
    MCOperand_CreateImm0(MI, tmp); \
13037
0
    return S; \
13038
0
  case 153: \
13039
0
    tmp = 0; \
13040
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13041
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13042
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13043
0
    tmp = 0; \
13044
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13045
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13046
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13047
0
    tmp = 0; \
13048
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13049
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13050
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13051
0
    tmp = fieldname(insn, 16, 5); \
13052
0
    MCOperand_CreateImm0(MI, tmp); \
13053
0
    return S; \
13054
0
  case 154: \
13055
0
    tmp = 0; \
13056
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13057
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13058
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13059
0
    tmp = 0; \
13060
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13061
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13062
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13063
0
    tmp = fieldname(insn, 16, 3); \
13064
0
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13065
0
    return S; \
13066
0
  case 155: \
13067
0
    tmp = 0; \
13068
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13069
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13070
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13071
0
    tmp = 0; \
13072
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13073
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13074
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13075
0
    tmp = fieldname(insn, 16, 4); \
13076
0
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13077
0
    return S; \
13078
0
  case 156: \
13079
0
    tmp = 0; \
13080
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13081
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13082
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13083
0
    tmp = 0; \
13084
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13085
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13086
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13087
0
    tmp = fieldname(insn, 16, 5); \
13088
0
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13089
0
    return S; \
13090
0
  case 157: \
13091
0
    tmp = 0; \
13092
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13093
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13094
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13095
0
    tmp = 0; \
13096
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13097
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13098
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13099
0
    tmp = fieldname(insn, 16, 3); \
13100
0
    MCOperand_CreateImm0(MI, tmp); \
13101
0
    return S; \
13102
0
  case 158: \
13103
0
    tmp = 0; \
13104
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13105
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13106
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13107
0
    tmp = 0; \
13108
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13109
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13110
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13111
0
    tmp = fieldname(insn, 16, 4); \
13112
0
    MCOperand_CreateImm0(MI, tmp); \
13113
0
    return S; \
13114
0
  case 159: \
13115
0
    tmp = 0; \
13116
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13117
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13118
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13119
0
    tmp = 0; \
13120
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13121
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13122
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13123
0
    tmp = fieldname(insn, 16, 5); \
13124
0
    MCOperand_CreateImm0(MI, tmp); \
13125
0
    return S; \
13126
0
  case 160: \
13127
0
    if (!Check(&S, DecodeVCVTD(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13128
0
    return S; \
13129
0
  case 161: \
13130
0
    if (!Check(&S, DecodeNEONModImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13131
0
    return S; \
13132
0
  case 162: \
13133
0
    tmp = 0; \
13134
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13135
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13136
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13137
0
    tmp = 0; \
13138
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13139
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13140
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13141
0
    tmp = fieldname(insn, 16, 6); \
13142
0
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13143
0
    return S; \
13144
0
  case 163: \
13145
0
    tmp = 0; \
13146
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13147
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13148
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13149
0
    tmp = 0; \
13150
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13151
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13152
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13153
0
    tmp = 0; \
13154
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13155
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13156
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13157
0
    tmp = fieldname(insn, 16, 6); \
13158
0
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13159
0
    return S; \
13160
0
  case 164: \
13161
0
    tmp = 0; \
13162
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13163
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13164
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13165
0
    tmp = 0; \
13166
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13167
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13168
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13169
0
    tmp = fieldname(insn, 16, 6); \
13170
0
    MCOperand_CreateImm0(MI, tmp); \
13171
0
    return S; \
13172
0
  case 165: \
13173
0
    tmp = 0; \
13174
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13175
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13176
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13177
0
    tmp = 0; \
13178
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13179
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13180
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13181
0
    tmp = 0; \
13182
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13183
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13184
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13185
0
    tmp = fieldname(insn, 16, 6); \
13186
0
    MCOperand_CreateImm0(MI, tmp); \
13187
0
    return S; \
13188
0
  case 166: \
13189
0
    tmp = 0; \
13190
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13191
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13192
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13193
0
    tmp = 0; \
13194
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13195
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13196
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13197
0
    tmp = fieldname(insn, 16, 3); \
13198
0
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13199
0
    return S; \
13200
0
  case 167: \
13201
0
    tmp = 0; \
13202
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13203
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13204
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13205
0
    tmp = 0; \
13206
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13207
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13208
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13209
0
    tmp = fieldname(insn, 16, 4); \
13210
0
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13211
0
    return S; \
13212
0
  case 168: \
13213
0
    tmp = 0; \
13214
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13215
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13216
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13217
0
    tmp = 0; \
13218
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13219
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13220
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13221
0
    tmp = fieldname(insn, 16, 5); \
13222
0
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13223
0
    return S; \
13224
0
  case 169: \
13225
0
    tmp = 0; \
13226
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13227
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13228
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13229
0
    tmp = 0; \
13230
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13231
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13232
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13233
0
    tmp = 0; \
13234
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13235
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13236
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13237
0
    tmp = fieldname(insn, 16, 3); \
13238
0
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13239
0
    return S; \
13240
0
  case 170: \
13241
0
    tmp = 0; \
13242
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13243
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13244
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13245
0
    tmp = 0; \
13246
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13247
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13248
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13249
0
    tmp = 0; \
13250
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13251
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13252
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13253
0
    tmp = fieldname(insn, 16, 4); \
13254
0
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13255
0
    return S; \
13256
0
  case 171: \
13257
0
    tmp = 0; \
13258
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13259
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13260
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13261
0
    tmp = 0; \
13262
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13263
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13264
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13265
0
    tmp = 0; \
13266
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13267
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13268
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13269
0
    tmp = fieldname(insn, 16, 5); \
13270
0
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13271
0
    return S; \
13272
0
  case 172: \
13273
0
    tmp = 0; \
13274
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13275
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13276
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13277
0
    tmp = 0; \
13278
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13279
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13280
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13281
0
    tmp = fieldname(insn, 16, 3); \
13282
0
    MCOperand_CreateImm0(MI, tmp); \
13283
0
    return S; \
13284
0
  case 173: \
13285
0
    tmp = 0; \
13286
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13287
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13288
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13289
0
    tmp = 0; \
13290
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13291
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13292
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13293
0
    tmp = 0; \
13294
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13295
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13296
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13297
0
    tmp = fieldname(insn, 16, 3); \
13298
0
    MCOperand_CreateImm0(MI, tmp); \
13299
0
    return S; \
13300
0
  case 174: \
13301
0
    tmp = 0; \
13302
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13303
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13304
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13305
0
    tmp = 0; \
13306
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13307
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13308
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13309
0
    tmp = fieldname(insn, 16, 4); \
13310
0
    MCOperand_CreateImm0(MI, tmp); \
13311
0
    return S; \
13312
0
  case 175: \
13313
0
    tmp = 0; \
13314
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13315
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13316
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13317
0
    tmp = 0; \
13318
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13319
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13320
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13321
0
    tmp = 0; \
13322
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13323
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13324
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13325
0
    tmp = fieldname(insn, 16, 4); \
13326
0
    MCOperand_CreateImm0(MI, tmp); \
13327
0
    return S; \
13328
0
  case 176: \
13329
0
    tmp = 0; \
13330
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13331
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13332
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13333
0
    tmp = 0; \
13334
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13335
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13336
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13337
0
    tmp = fieldname(insn, 16, 5); \
13338
0
    MCOperand_CreateImm0(MI, tmp); \
13339
0
    return S; \
13340
0
  case 177: \
13341
0
    tmp = 0; \
13342
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13343
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13344
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13345
0
    tmp = 0; \
13346
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13347
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13348
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13349
0
    tmp = 0; \
13350
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13351
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13352
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13353
0
    tmp = fieldname(insn, 16, 5); \
13354
0
    MCOperand_CreateImm0(MI, tmp); \
13355
0
    return S; \
13356
0
  case 178: \
13357
0
    if (!Check(&S, DecodeVCVTQ(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13358
0
    return S; \
13359
0
  case 179: \
13360
0
    tmp = 0; \
13361
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13362
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13363
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13364
0
    tmp = 0; \
13365
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13366
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13367
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13368
0
    tmp = fieldname(insn, 16, 6); \
13369
0
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13370
0
    return S; \
13371
0
  case 180: \
13372
0
    tmp = 0; \
13373
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13374
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13375
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13376
0
    tmp = 0; \
13377
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13378
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13379
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13380
0
    tmp = 0; \
13381
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13382
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13383
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13384
0
    tmp = fieldname(insn, 16, 6); \
13385
0
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13386
0
    return S; \
13387
0
  case 181: \
13388
0
    tmp = 0; \
13389
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13390
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13391
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13392
0
    tmp = 0; \
13393
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13394
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13395
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13396
0
    tmp = fieldname(insn, 16, 6); \
13397
0
    MCOperand_CreateImm0(MI, tmp); \
13398
0
    return S; \
13399
0
  case 182: \
13400
0
    tmp = 0; \
13401
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13402
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13403
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13404
0
    tmp = 0; \
13405
0
    tmp |= fieldname(insn, 12, 4) << 0; \
13406
0
    tmp |= fieldname(insn, 22, 1) << 4; \
13407
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13408
0
    tmp = 0; \
13409
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13410
0
    tmp |= fieldname(insn, 5, 1) << 4; \
13411
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13412
0
    tmp = fieldname(insn, 16, 6); \
13413
0
    MCOperand_CreateImm0(MI, tmp); \
13414
0
    return S; \
13415
0
  case 183: \
13416
0
    tmp = 0; \
13417
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13418
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13419
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13420
0
    tmp = 0; \
13421
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13422
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13423
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13424
0
    tmp = fieldname(insn, 12, 4); \
13425
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13426
0
    tmp = fieldname(insn, 21, 1); \
13427
0
    MCOperand_CreateImm0(MI, tmp); \
13428
0
    tmp = fieldname(insn, 28, 4); \
13429
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13430
0
    return S; \
13431
0
  case 184: \
13432
0
    tmp = fieldname(insn, 12, 4); \
13433
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13434
0
    tmp = 0; \
13435
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13436
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13437
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13438
0
    tmp = fieldname(insn, 21, 1); \
13439
0
    MCOperand_CreateImm0(MI, tmp); \
13440
0
    tmp = fieldname(insn, 28, 4); \
13441
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13442
0
    return S; \
13443
0
  case 185: \
13444
0
    tmp = 0; \
13445
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13446
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13447
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13448
0
    tmp = 0; \
13449
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13450
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13451
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13452
0
    tmp = fieldname(insn, 12, 4); \
13453
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13454
0
    tmp = 0; \
13455
0
    tmp |= fieldname(insn, 6, 1) << 0; \
13456
0
    tmp |= fieldname(insn, 21, 1) << 1; \
13457
0
    MCOperand_CreateImm0(MI, tmp); \
13458
0
    tmp = fieldname(insn, 28, 4); \
13459
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13460
0
    return S; \
13461
0
  case 186: \
13462
0
    tmp = fieldname(insn, 12, 4); \
13463
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13464
0
    tmp = 0; \
13465
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13466
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13467
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13468
0
    tmp = 0; \
13469
0
    tmp |= fieldname(insn, 6, 1) << 0; \
13470
0
    tmp |= fieldname(insn, 21, 1) << 1; \
13471
0
    MCOperand_CreateImm0(MI, tmp); \
13472
0
    tmp = fieldname(insn, 28, 4); \
13473
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13474
0
    return S; \
13475
0
  case 187: \
13476
0
    tmp = 0; \
13477
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13478
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13479
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13480
0
    tmp = 0; \
13481
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13482
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13483
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13484
0
    tmp = fieldname(insn, 12, 4); \
13485
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13486
0
    tmp = 0; \
13487
0
    tmp |= fieldname(insn, 5, 2) << 0; \
13488
0
    tmp |= fieldname(insn, 21, 1) << 2; \
13489
0
    MCOperand_CreateImm0(MI, tmp); \
13490
0
    tmp = fieldname(insn, 28, 4); \
13491
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13492
0
    return S; \
13493
0
  case 188: \
13494
0
    tmp = fieldname(insn, 12, 4); \
13495
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13496
0
    tmp = 0; \
13497
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13498
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13499
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13500
0
    tmp = 0; \
13501
0
    tmp |= fieldname(insn, 5, 2) << 0; \
13502
0
    tmp |= fieldname(insn, 21, 1) << 2; \
13503
0
    MCOperand_CreateImm0(MI, tmp); \
13504
0
    tmp = fieldname(insn, 28, 4); \
13505
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13506
0
    return S; \
13507
0
  case 189: \
13508
0
    tmp = 0; \
13509
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13510
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13511
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13512
0
    tmp = fieldname(insn, 12, 4); \
13513
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13514
0
    tmp = fieldname(insn, 28, 4); \
13515
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13516
0
    return S; \
13517
0
  case 190: \
13518
0
    tmp = 0; \
13519
0
    tmp |= fieldname(insn, 7, 1) << 4; \
13520
0
    tmp |= fieldname(insn, 16, 4) << 0; \
13521
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13522
0
    tmp = fieldname(insn, 12, 4); \
13523
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13524
0
    tmp = fieldname(insn, 28, 4); \
13525
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13526
0
    return S; \
13527
0
  case 191: \
13528
0
    if (!Check(&S, DecodeVLDST4Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13529
0
    return S; \
13530
0
  case 192: \
13531
0
    if (!Check(&S, DecodeVST1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13532
0
    return S; \
13533
0
  case 193: \
13534
0
    if (!Check(&S, DecodeVLD1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13535
0
    return S; \
13536
0
  case 194: \
13537
0
    if (!Check(&S, DecodeVST2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13538
0
    return S; \
13539
0
  case 195: \
13540
0
    if (!Check(&S, DecodeVLD2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13541
0
    return S; \
13542
0
  case 196: \
13543
0
    if (!Check(&S, DecodeVLDST1Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13544
0
    return S; \
13545
0
  case 197: \
13546
0
    if (!Check(&S, DecodeVST3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13547
0
    return S; \
13548
0
  case 198: \
13549
0
    if (!Check(&S, DecodeVLD3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13550
0
    return S; \
13551
0
  case 199: \
13552
0
    if (!Check(&S, DecodeVLDST2Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13553
0
    return S; \
13554
0
  case 200: \
13555
0
    if (!Check(&S, DecodeVST4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13556
0
    return S; \
13557
0
  case 201: \
13558
0
    if (!Check(&S, DecodeVLD4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13559
0
    return S; \
13560
0
  case 202: \
13561
0
    if (!Check(&S, DecodeVLDST3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13562
0
    return S; \
13563
0
  case 203: \
13564
0
    if (!Check(&S, DecodeVLD1DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13565
0
    return S; \
13566
0
  case 204: \
13567
0
    if (!Check(&S, DecodeVLD2DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13568
0
    return S; \
13569
0
  case 205: \
13570
0
    if (!Check(&S, DecodeVLD3DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13571
0
    return S; \
13572
0
  case 206: \
13573
0
    if (!Check(&S, DecodeVLD4DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13574
0
    return S; \
13575
39.2k
  case 207: \
13576
39.2k
    tmp = fieldname(insn, 0, 3); \
13577
39.2k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13578
39.2k
    tmp = fieldname(insn, 3, 3); \
13579
39.2k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13580
39.2k
    return S; \
13581
39.2k
  case 208: \
13582
22.7k
    tmp = fieldname(insn, 8, 3); \
13583
22.7k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13584
22.7k
    tmp = fieldname(insn, 0, 8); \
13585
22.7k
    MCOperand_CreateImm0(MI, tmp); \
13586
22.7k
    return S; \
13587
22.7k
  case 209: \
13588
421
    if (!Check(&S, DecodeThumbAddSPReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13589
421
    return S; \
13590
1.52k
  case 210: \
13591
1.52k
    tmp = 0; \
13592
1.52k
    tmp |= fieldname(insn, 0, 3) << 0; \
13593
1.52k
    tmp |= fieldname(insn, 7, 1) << 3; \
13594
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13595
1.52k
    tmp = 0; \
13596
1.52k
    tmp |= fieldname(insn, 0, 3) << 0; \
13597
1.52k
    tmp |= fieldname(insn, 7, 1) << 3; \
13598
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13599
1.52k
    tmp = fieldname(insn, 3, 4); \
13600
1.52k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13601
1.52k
    return S; \
13602
1.52k
  case 211: \
13603
1.37k
    tmp = 0; \
13604
1.37k
    tmp |= fieldname(insn, 0, 3) << 0; \
13605
1.37k
    tmp |= fieldname(insn, 7, 1) << 3; \
13606
1.37k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13607
1.37k
    tmp = fieldname(insn, 3, 4); \
13608
1.37k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13609
1.37k
    return S; \
13610
1.37k
  case 212: \
13611
1.06k
    tmp = fieldname(insn, 3, 4); \
13612
1.06k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13613
1.06k
    return S; \
13614
1.06k
  case 213: \
13615
437
    tmp = fieldname(insn, 3, 4); \
13616
437
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13617
437
    return S; \
13618
10.8k
  case 214: \
13619
10.8k
    tmp = fieldname(insn, 8, 3); \
13620
10.8k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13621
10.8k
    tmp = fieldname(insn, 0, 8); \
13622
10.8k
    if (!Check(&S, DecodeThumbAddrModePC(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13623
10.8k
    return S; \
13624
10.9k
  case 215: \
13625
10.9k
    tmp = fieldname(insn, 0, 3); \
13626
10.9k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13627
10.9k
    tmp = fieldname(insn, 3, 6); \
13628
10.9k
    if (!Check(&S, DecodeThumbAddrModeRR(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13629
10.9k
    return S; \
13630
77.5k
  case 216: \
13631
77.5k
    tmp = fieldname(insn, 0, 3); \
13632
77.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13633
77.5k
    tmp = fieldname(insn, 3, 8); \
13634
77.5k
    if (!Check(&S, DecodeThumbAddrModeIS(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13635
77.5k
    return S; \
13636
77.5k
  case 217: \
13637
11.8k
    tmp = fieldname(insn, 8, 3); \
13638
11.8k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13639
11.8k
    tmp = fieldname(insn, 0, 8); \
13640
11.8k
    if (!Check(&S, DecodeThumbAddrModeSP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13641
11.8k
    return S; \
13642
15.7k
  case 218: \
13643
15.7k
    if (!Check(&S, DecodeThumbAddSpecialReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13644
15.7k
    return S; \
13645
15.7k
  case 219: \
13646
828
    if (!Check(&S, DecodeThumbAddSPImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13647
828
    return S; \
13648
2.71k
  case 220: \
13649
2.71k
    tmp = fieldname(insn, 0, 3); \
13650
2.71k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13651
2.71k
    tmp = 0; \
13652
2.71k
    tmp |= fieldname(insn, 3, 5) << 0; \
13653
2.71k
    tmp |= fieldname(insn, 9, 1) << 5; \
13654
2.71k
    if (!Check(&S, DecodeThumbCmpBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13655
2.71k
    return S; \
13656
2.71k
  case 221: \
13657
1.61k
    tmp = 0; \
13658
1.61k
    tmp |= fieldname(insn, 0, 8) << 0; \
13659
1.61k
    tmp |= fieldname(insn, 8, 1) << 14; \
13660
1.61k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13661
1.61k
    return S; \
13662
1.61k
  case 222: \
13663
756
    tmp = fieldname(insn, 3, 1); \
13664
756
    MCOperand_CreateImm0(MI, tmp); \
13665
756
    return S; \
13666
1.61k
  case 223: \
13667
305
    if (!Check(&S, DecodeThumbCPS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13668
305
    return S; \
13669
305
  case 224: \
13670
266
    tmp = fieldname(insn, 0, 6); \
13671
266
    MCOperand_CreateImm0(MI, tmp); \
13672
266
    return S; \
13673
1.54k
  case 225: \
13674
1.54k
    tmp = 0; \
13675
1.54k
    tmp |= fieldname(insn, 0, 8) << 0; \
13676
1.54k
    tmp |= fieldname(insn, 8, 1) << 15; \
13677
1.54k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13678
1.54k
    return S; \
13679
3.31k
  case 226: \
13680
3.31k
    tmp = fieldname(insn, 0, 8); \
13681
3.31k
    MCOperand_CreateImm0(MI, tmp); \
13682
3.31k
    return S; \
13683
3.47k
  case 227: \
13684
3.47k
    tmp = fieldname(insn, 4, 4); \
13685
3.47k
    MCOperand_CreateImm0(MI, tmp); \
13686
3.47k
    return S; \
13687
6.54k
  case 228: \
13688
6.54k
    tmp = fieldname(insn, 8, 3); \
13689
6.54k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13690
6.54k
    tmp = fieldname(insn, 8, 3); \
13691
6.54k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13692
6.54k
    tmp = fieldname(insn, 0, 8); \
13693
6.54k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13694
6.54k
    return S; \
13695
7.20k
  case 229: \
13696
7.20k
    tmp = fieldname(insn, 8, 3); \
13697
7.20k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13698
7.20k
    tmp = fieldname(insn, 0, 8); \
13699
7.20k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13700
7.20k
    return S; \
13701
13.0k
  case 230: \
13702
13.0k
    tmp = fieldname(insn, 0, 8); \
13703
13.0k
    if (!Check(&S, DecodeThumbBCCTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13704
13.0k
    tmp = fieldname(insn, 8, 4); \
13705
13.0k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13706
13.0k
    return S; \
13707
13.0k
  case 231: \
13708
4.37k
    tmp = fieldname(insn, 0, 11); \
13709
4.37k
    if (!Check(&S, DecodeThumbBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13710
4.37k
    return S; \
13711
4.37k
  case 232: \
13712
0
    tmp = 0; \
13713
0
    tmp |= fieldname(insn, 1, 10) << 1; \
13714
0
    tmp |= fieldname(insn, 11, 1) << 21; \
13715
0
    tmp |= fieldname(insn, 13, 1) << 22; \
13716
0
    tmp |= fieldname(insn, 16, 10) << 11; \
13717
0
    tmp |= fieldname(insn, 26, 1) << 23; \
13718
0
    if (!Check(&S, DecodeThumbBLXOffset(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13719
0
    return S; \
13720
0
  case 233: \
13721
0
    tmp = 0; \
13722
0
    tmp |= fieldname(insn, 0, 11) << 0; \
13723
0
    tmp |= fieldname(insn, 11, 1) << 21; \
13724
0
    tmp |= fieldname(insn, 13, 1) << 22; \
13725
0
    tmp |= fieldname(insn, 16, 10) << 11; \
13726
0
    tmp |= fieldname(insn, 26, 1) << 23; \
13727
0
    if (!Check(&S, DecodeThumbBLTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13728
0
    return S; \
13729
9.10k
  case 234: \
13730
9.10k
    if (!Check(&S, DecodeIT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13731
9.10k
    return S; \
13732
9.10k
  case 235: \
13733
0
    tmp = fieldname(insn, 16, 4); \
13734
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13735
0
    tmp = 0; \
13736
0
    tmp |= fieldname(insn, 0, 13) << 0; \
13737
0
    tmp |= fieldname(insn, 14, 1) << 14; \
13738
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13739
0
    return S; \
13740
0
  case 236: \
13741
0
    tmp = fieldname(insn, 16, 4); \
13742
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13743
0
    tmp = fieldname(insn, 0, 16); \
13744
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13745
0
    return S; \
13746
0
  case 237: \
13747
0
    tmp = fieldname(insn, 16, 4); \
13748
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13749
0
    tmp = fieldname(insn, 0, 4); \
13750
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13751
0
    return S; \
13752
0
  case 238: \
13753
0
    tmp = fieldname(insn, 16, 4); \
13754
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13755
0
    tmp = 0; \
13756
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13757
0
    tmp |= fieldname(insn, 4, 4) << 5; \
13758
0
    tmp |= fieldname(insn, 12, 3) << 9; \
13759
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13760
0
    return S; \
13761
0
  case 239: \
13762
0
    tmp = fieldname(insn, 8, 4); \
13763
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13764
0
    tmp = fieldname(insn, 16, 4); \
13765
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13766
0
    tmp = fieldname(insn, 0, 4); \
13767
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13768
0
    tmp = fieldname(insn, 20, 1); \
13769
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13770
0
    return S; \
13771
0
  case 240: \
13772
0
    tmp = fieldname(insn, 8, 4); \
13773
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13774
0
    tmp = fieldname(insn, 16, 4); \
13775
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13776
0
    tmp = 0; \
13777
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13778
0
    tmp |= fieldname(insn, 4, 4) << 5; \
13779
0
    tmp |= fieldname(insn, 12, 3) << 9; \
13780
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13781
0
    tmp = fieldname(insn, 20, 1); \
13782
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13783
0
    return S; \
13784
0
  case 241: \
13785
0
    tmp = fieldname(insn, 8, 4); \
13786
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13787
0
    tmp = fieldname(insn, 16, 4); \
13788
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13789
0
    tmp = fieldname(insn, 0, 4); \
13790
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13791
0
    tmp = fieldname(insn, 20, 1); \
13792
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13793
0
    return S; \
13794
0
  case 242: \
13795
0
    tmp = fieldname(insn, 8, 4); \
13796
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13797
0
    tmp = fieldname(insn, 16, 4); \
13798
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13799
0
    tmp = 0; \
13800
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13801
0
    tmp |= fieldname(insn, 4, 4) << 5; \
13802
0
    tmp |= fieldname(insn, 12, 3) << 9; \
13803
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13804
0
    tmp = fieldname(insn, 20, 1); \
13805
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13806
0
    return S; \
13807
0
  case 243: \
13808
0
    tmp = fieldname(insn, 16, 4); \
13809
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13810
0
    tmp = fieldname(insn, 16, 4); \
13811
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13812
0
    tmp = 0; \
13813
0
    tmp |= fieldname(insn, 0, 13) << 0; \
13814
0
    tmp |= fieldname(insn, 14, 1) << 14; \
13815
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13816
0
    return S; \
13817
0
  case 244: \
13818
0
    tmp = fieldname(insn, 16, 4); \
13819
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13820
0
    tmp = fieldname(insn, 16, 4); \
13821
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13822
0
    tmp = fieldname(insn, 0, 16); \
13823
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13824
0
    return S; \
13825
0
  case 245: \
13826
0
    tmp = fieldname(insn, 8, 4); \
13827
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13828
0
    tmp = fieldname(insn, 16, 4); \
13829
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13830
0
    return S; \
13831
0
  case 246: \
13832
0
    tmp = fieldname(insn, 8, 4); \
13833
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13834
0
    tmp = fieldname(insn, 12, 4); \
13835
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13836
0
    tmp = 0; \
13837
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13838
0
    tmp |= fieldname(insn, 16, 4) << 8; \
13839
0
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13840
0
    return S; \
13841
0
  case 247: \
13842
0
    tmp = fieldname(insn, 0, 4); \
13843
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13844
0
    tmp = fieldname(insn, 12, 4); \
13845
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13846
0
    tmp = fieldname(insn, 16, 4); \
13847
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13848
0
    return S; \
13849
0
  case 248: \
13850
0
    tmp = fieldname(insn, 0, 4); \
13851
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13852
0
    tmp = fieldname(insn, 12, 4); \
13853
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13854
0
    tmp = fieldname(insn, 8, 4); \
13855
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13856
0
    tmp = fieldname(insn, 16, 4); \
13857
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13858
0
    return S; \
13859
0
  case 249: \
13860
0
    tmp = fieldname(insn, 12, 4); \
13861
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13862
0
    tmp = fieldname(insn, 16, 4); \
13863
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13864
0
    return S; \
13865
0
  case 250: \
13866
0
    tmp = fieldname(insn, 12, 4); \
13867
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13868
0
    tmp = 0; \
13869
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13870
0
    tmp |= fieldname(insn, 16, 4) << 8; \
13871
0
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13872
0
    return S; \
13873
0
  case 251: \
13874
0
    if (!Check(&S, DecodeThumbTableBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13875
0
    return S; \
13876
0
  case 252: \
13877
0
    tmp = fieldname(insn, 12, 4); \
13878
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13879
0
    tmp = fieldname(insn, 8, 4); \
13880
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13881
0
    tmp = fieldname(insn, 16, 4); \
13882
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13883
0
    return S; \
13884
0
  case 253: \
13885
0
    tmp = fieldname(insn, 12, 4); \
13886
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13887
0
    tmp = fieldname(insn, 8, 4); \
13888
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13889
0
    tmp = 0; \
13890
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13891
0
    tmp |= fieldname(insn, 16, 4) << 9; \
13892
0
    tmp |= fieldname(insn, 23, 1) << 8; \
13893
0
    if (!Check(&S, DecodeT2AddrModeImm8s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13894
0
    return S; \
13895
0
  case 254: \
13896
0
    tmp = fieldname(insn, 8, 4); \
13897
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13898
0
    tmp = fieldname(insn, 0, 4); \
13899
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13900
0
    tmp = fieldname(insn, 20, 1); \
13901
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13902
0
    return S; \
13903
0
  case 255: \
13904
0
    tmp = fieldname(insn, 8, 4); \
13905
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13906
0
    tmp = fieldname(insn, 0, 4); \
13907
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13908
0
    tmp = fieldname(insn, 20, 1); \
13909
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13910
0
    return S; \
13911
0
  case 256: \
13912
0
    tmp = fieldname(insn, 8, 4); \
13913
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13914
0
    tmp = fieldname(insn, 0, 4); \
13915
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13916
0
    tmp = 0; \
13917
0
    tmp |= fieldname(insn, 6, 2) << 0; \
13918
0
    tmp |= fieldname(insn, 12, 3) << 2; \
13919
0
    MCOperand_CreateImm0(MI, tmp); \
13920
0
    tmp = fieldname(insn, 20, 1); \
13921
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13922
0
    return S; \
13923
0
  case 257: \
13924
0
    tmp = fieldname(insn, 8, 4); \
13925
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13926
0
    tmp = fieldname(insn, 16, 4); \
13927
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13928
0
    tmp = fieldname(insn, 0, 4); \
13929
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13930
0
    tmp = 0; \
13931
0
    tmp |= fieldname(insn, 6, 2) << 0; \
13932
0
    tmp |= fieldname(insn, 12, 3) << 2; \
13933
0
    MCOperand_CreateImm0(MI, tmp); \
13934
0
    return S; \
13935
0
  case 258: \
13936
0
    tmp = fieldname(insn, 16, 4); \
13937
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13938
0
    tmp = fieldname(insn, 12, 4); \
13939
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13940
0
    tmp = fieldname(insn, 8, 4); \
13941
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13942
0
    tmp = fieldname(insn, 16, 4); \
13943
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13944
0
    tmp = 0; \
13945
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13946
0
    tmp |= fieldname(insn, 23, 1) << 8; \
13947
0
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13948
0
    return S; \
13949
0
  case 259: \
13950
0
    tmp = fieldname(insn, 12, 4); \
13951
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13952
0
    tmp = fieldname(insn, 8, 4); \
13953
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13954
0
    tmp = fieldname(insn, 16, 4); \
13955
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13956
0
    tmp = fieldname(insn, 16, 4); \
13957
0
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13958
0
    tmp = 0; \
13959
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13960
0
    tmp |= fieldname(insn, 23, 1) << 8; \
13961
0
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13962
0
    return S; \
13963
0
  case 260: \
13964
0
    if (!Check(&S, DecodeT2STRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13965
0
    return S; \
13966
0
  case 261: \
13967
0
    if (!Check(&S, DecodeT2LDRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13968
0
    return S; \
13969
0
  case 262: \
13970
0
    tmp = fieldname(insn, 8, 4); \
13971
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13972
0
    tmp = 0; \
13973
0
    tmp |= fieldname(insn, 0, 4) << 0; \
13974
0
    tmp |= fieldname(insn, 4, 4) << 5; \
13975
0
    tmp |= fieldname(insn, 12, 3) << 9; \
13976
0
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13977
0
    tmp = fieldname(insn, 20, 1); \
13978
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13979
0
    return S; \
13980
0
  case 263: \
13981
0
    tmp = fieldname(insn, 16, 4); \
13982
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13983
0
    tmp = 0; \
13984
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13985
0
    tmp |= fieldname(insn, 12, 3) << 8; \
13986
0
    tmp |= fieldname(insn, 26, 1) << 11; \
13987
0
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13988
0
    return S; \
13989
0
  case 264: \
13990
0
    tmp = fieldname(insn, 8, 4); \
13991
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13992
0
    tmp = fieldname(insn, 16, 4); \
13993
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13994
0
    tmp = 0; \
13995
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13996
0
    tmp |= fieldname(insn, 12, 3) << 8; \
13997
0
    tmp |= fieldname(insn, 26, 1) << 11; \
13998
0
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13999
0
    tmp = fieldname(insn, 20, 1); \
14000
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14001
0
    return S; \
14002
0
  case 265: \
14003
0
    tmp = fieldname(insn, 8, 4); \
14004
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14005
0
    tmp = 0; \
14006
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14007
0
    tmp |= fieldname(insn, 12, 3) << 8; \
14008
0
    tmp |= fieldname(insn, 26, 1) << 11; \
14009
0
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14010
0
    tmp = fieldname(insn, 20, 1); \
14011
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14012
0
    return S; \
14013
0
  case 266: \
14014
0
    tmp = fieldname(insn, 8, 4); \
14015
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14016
0
    tmp = fieldname(insn, 16, 4); \
14017
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14018
0
    tmp = 0; \
14019
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14020
0
    tmp |= fieldname(insn, 12, 3) << 8; \
14021
0
    tmp |= fieldname(insn, 26, 1) << 11; \
14022
0
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14023
0
    tmp = fieldname(insn, 20, 1); \
14024
0
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14025
0
    return S; \
14026
0
  case 267: \
14027
0
    tmp = fieldname(insn, 8, 4); \
14028
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14029
0
    tmp = fieldname(insn, 16, 4); \
14030
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14031
0
    tmp = 0; \
14032
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14033
0
    tmp |= fieldname(insn, 12, 3) << 8; \
14034
0
    tmp |= fieldname(insn, 26, 1) << 11; \
14035
0
    MCOperand_CreateImm0(MI, tmp); \
14036
0
    return S; \
14037
0
  case 268: \
14038
0
    if (!Check(&S, DecodeT2Adr(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14039
0
    return S; \
14040
0
  case 269: \
14041
0
    if (!Check(&S, DecodeT2MOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14042
0
    return S; \
14043
0
  case 270: \
14044
0
    tmp = fieldname(insn, 8, 4); \
14045
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14046
0
    tmp = fieldname(insn, 0, 4); \
14047
0
    MCOperand_CreateImm0(MI, tmp); \
14048
0
    tmp = fieldname(insn, 16, 4); \
14049
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14050
0
    return S; \
14051
0
  case 271: \
14052
0
    tmp = fieldname(insn, 8, 4); \
14053
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14054
0
    tmp = fieldname(insn, 0, 5); \
14055
0
    MCOperand_CreateImm0(MI, tmp); \
14056
0
    tmp = fieldname(insn, 16, 4); \
14057
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14058
0
    tmp = 0; \
14059
0
    tmp |= fieldname(insn, 6, 2) << 0; \
14060
0
    tmp |= fieldname(insn, 12, 3) << 2; \
14061
0
    tmp |= fieldname(insn, 21, 1) << 5; \
14062
0
    if (!Check(&S, DecodeT2ShifterImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14063
0
    return S; \
14064
0
  case 272: \
14065
0
    tmp = fieldname(insn, 8, 4); \
14066
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14067
0
    tmp = fieldname(insn, 16, 4); \
14068
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14069
0
    tmp = 0; \
14070
0
    tmp |= fieldname(insn, 6, 2) << 0; \
14071
0
    tmp |= fieldname(insn, 12, 3) << 2; \
14072
0
    MCOperand_CreateImm0(MI, tmp); \
14073
0
    tmp = fieldname(insn, 0, 5); \
14074
0
    MCOperand_CreateImm0(MI, tmp); \
14075
0
    return S; \
14076
0
  case 273: \
14077
0
    tmp = fieldname(insn, 8, 4); \
14078
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14079
0
    tmp = fieldname(insn, 8, 4); \
14080
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14081
0
    tmp = 0; \
14082
0
    tmp |= fieldname(insn, 0, 5) << 5; \
14083
0
    tmp |= fieldname(insn, 6, 2) << 0; \
14084
0
    tmp |= fieldname(insn, 12, 3) << 2; \
14085
0
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14086
0
    return S; \
14087
0
  case 274: \
14088
0
    tmp = fieldname(insn, 8, 4); \
14089
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14090
0
    tmp = fieldname(insn, 8, 4); \
14091
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14092
0
    tmp = fieldname(insn, 16, 4); \
14093
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14094
0
    tmp = 0; \
14095
0
    tmp |= fieldname(insn, 0, 5) << 5; \
14096
0
    tmp |= fieldname(insn, 6, 2) << 0; \
14097
0
    tmp |= fieldname(insn, 12, 3) << 2; \
14098
0
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14099
0
    return S; \
14100
0
  case 275: \
14101
0
    tmp = fieldname(insn, 16, 4); \
14102
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14103
0
    return S; \
14104
0
  case 276: \
14105
0
    tmp = fieldname(insn, 0, 4); \
14106
0
    MCOperand_CreateImm0(MI, tmp); \
14107
0
    return S; \
14108
0
  case 277: \
14109
0
    if (!Check(&S, DecodeT2CPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14110
0
    return S; \
14111
0
  case 278: \
14112
0
    tmp = fieldname(insn, 8, 4); \
14113
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14114
0
    return S; \
14115
0
  case 279: \
14116
0
    tmp = 0; \
14117
0
    tmp |= fieldname(insn, 8, 4) << 0; \
14118
0
    tmp |= fieldname(insn, 20, 1) << 4; \
14119
0
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14120
0
    tmp = fieldname(insn, 16, 4); \
14121
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14122
0
    return S; \
14123
0
  case 280: \
14124
0
    tmp = 0; \
14125
0
    tmp |= fieldname(insn, 4, 1) << 4; \
14126
0
    tmp |= fieldname(insn, 8, 4) << 0; \
14127
0
    tmp |= fieldname(insn, 20, 1) << 5; \
14128
0
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14129
0
    tmp = fieldname(insn, 16, 4); \
14130
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14131
0
    return S; \
14132
0
  case 281: \
14133
0
    tmp = fieldname(insn, 8, 4); \
14134
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14135
0
    tmp = 0; \
14136
0
    tmp |= fieldname(insn, 4, 1) << 4; \
14137
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14138
0
    tmp |= fieldname(insn, 20, 1) << 5; \
14139
0
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14140
0
    return S; \
14141
0
  case 282: \
14142
0
    tmp = 0; \
14143
0
    tmp |= fieldname(insn, 0, 12) << 0; \
14144
0
    tmp |= fieldname(insn, 16, 4) << 12; \
14145
0
    MCOperand_CreateImm0(MI, tmp); \
14146
0
    return S; \
14147
0
  case 283: \
14148
0
    tmp = fieldname(insn, 16, 4); \
14149
0
    MCOperand_CreateImm0(MI, tmp); \
14150
0
    return S; \
14151
0
  case 284: \
14152
0
    tmp = 0; \
14153
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14154
0
    tmp |= fieldname(insn, 10, 2) << 10; \
14155
0
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14156
0
    tmp = fieldname(insn, 16, 4); \
14157
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14158
0
    return S; \
14159
0
  case 285: \
14160
0
    tmp = fieldname(insn, 8, 4); \
14161
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14162
0
    tmp = fieldname(insn, 0, 8); \
14163
0
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14164
0
    return S; \
14165
0
  case 286: \
14166
0
    if (!Check(&S, DecodeThumb2BCCInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14167
0
    return S; \
14168
0
  case 287: \
14169
0
    if (!Check(&S, DecodeT2BInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14170
0
    return S; \
14171
0
  case 288: \
14172
0
    tmp = fieldname(insn, 12, 4); \
14173
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14174
0
    tmp = 0; \
14175
0
    tmp |= fieldname(insn, 0, 4) << 2; \
14176
0
    tmp |= fieldname(insn, 4, 2) << 0; \
14177
0
    tmp |= fieldname(insn, 16, 4) << 6; \
14178
0
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14179
0
    return S; \
14180
0
  case 289: \
14181
0
    if (!Check(&S, DecodeT2LdStPre(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14182
0
    return S; \
14183
0
  case 290: \
14184
0
    tmp = fieldname(insn, 12, 4); \
14185
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14186
0
    tmp = 0; \
14187
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14188
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14189
0
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14190
0
    return S; \
14191
0
  case 291: \
14192
0
    tmp = fieldname(insn, 12, 4); \
14193
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14194
0
    tmp = 0; \
14195
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14196
0
    tmp |= fieldname(insn, 9, 1) << 8; \
14197
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14198
0
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14199
0
    return S; \
14200
0
  case 292: \
14201
0
    tmp = fieldname(insn, 12, 4); \
14202
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14203
0
    tmp = 0; \
14204
0
    tmp |= fieldname(insn, 0, 12) << 0; \
14205
0
    tmp |= fieldname(insn, 16, 4) << 13; \
14206
0
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14207
0
    return S; \
14208
0
  case 293: \
14209
0
    if (!Check(&S, DecodeT2LoadShift(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14210
0
    return S; \
14211
0
  case 294: \
14212
0
    if (!Check(&S, DecodeT2LoadImm8(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14213
0
    return S; \
14214
0
  case 295: \
14215
0
    if (!Check(&S, DecodeT2LoadT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14216
0
    return S; \
14217
0
  case 296: \
14218
0
    if (!Check(&S, DecodeT2LoadImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14219
0
    return S; \
14220
0
  case 297: \
14221
0
    if (!Check(&S, DecodeT2LoadLabel(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14222
0
    return S; \
14223
0
  case 298: \
14224
0
    tmp = fieldname(insn, 8, 4); \
14225
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14226
0
    tmp = fieldname(insn, 16, 4); \
14227
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14228
0
    tmp = fieldname(insn, 0, 4); \
14229
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14230
0
    return S; \
14231
0
  case 299: \
14232
0
    tmp = fieldname(insn, 8, 4); \
14233
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14234
0
    tmp = fieldname(insn, 0, 4); \
14235
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14236
0
    tmp = fieldname(insn, 4, 2); \
14237
0
    MCOperand_CreateImm0(MI, tmp); \
14238
0
    return S; \
14239
0
  case 300: \
14240
0
    tmp = fieldname(insn, 8, 4); \
14241
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14242
0
    tmp = fieldname(insn, 16, 4); \
14243
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14244
0
    tmp = fieldname(insn, 0, 4); \
14245
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14246
0
    tmp = fieldname(insn, 4, 2); \
14247
0
    MCOperand_CreateImm0(MI, tmp); \
14248
0
    return S; \
14249
0
  case 301: \
14250
0
    tmp = fieldname(insn, 8, 4); \
14251
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14252
0
    tmp = fieldname(insn, 0, 4); \
14253
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14254
0
    tmp = fieldname(insn, 16, 4); \
14255
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14256
0
    return S; \
14257
0
  case 302: \
14258
0
    tmp = fieldname(insn, 8, 4); \
14259
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14260
0
    tmp = 0; \
14261
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14262
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14263
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14264
0
    return S; \
14265
0
  case 303: \
14266
0
    tmp = fieldname(insn, 8, 4); \
14267
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14268
0
    tmp = fieldname(insn, 16, 4); \
14269
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14270
0
    tmp = fieldname(insn, 0, 4); \
14271
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14272
0
    tmp = fieldname(insn, 12, 4); \
14273
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14274
0
    return S; \
14275
0
  case 304: \
14276
0
    tmp = fieldname(insn, 12, 4); \
14277
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14278
0
    tmp = fieldname(insn, 8, 4); \
14279
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14280
0
    tmp = fieldname(insn, 16, 4); \
14281
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14282
0
    tmp = fieldname(insn, 0, 4); \
14283
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14284
0
    return S; \
14285
0
  case 305: \
14286
0
    tmp = fieldname(insn, 8, 4); \
14287
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14288
0
    tmp = fieldname(insn, 16, 4); \
14289
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14290
0
    tmp = fieldname(insn, 0, 4); \
14291
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14292
0
    return S; \
14293
0
  case 306: \
14294
0
    tmp = fieldname(insn, 12, 4); \
14295
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14296
0
    tmp = 0; \
14297
0
    tmp |= fieldname(insn, 0, 4) << 2; \
14298
0
    tmp |= fieldname(insn, 4, 2) << 0; \
14299
0
    tmp |= fieldname(insn, 16, 4) << 6; \
14300
0
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14301
0
    return S; \
14302
0
  case 307: \
14303
0
    tmp = fieldname(insn, 12, 4); \
14304
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14305
0
    tmp = 0; \
14306
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14307
0
    tmp |= fieldname(insn, 9, 1) << 8; \
14308
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14309
0
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14310
0
    return S; \
14311
0
  case 308: \
14312
0
    tmp = fieldname(insn, 12, 4); \
14313
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14314
0
    tmp = 0; \
14315
0
    tmp |= fieldname(insn, 0, 12) << 0; \
14316
0
    tmp |= fieldname(insn, 16, 4) << 13; \
14317
0
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14318
0
    return S; \
14319
0
  case 309: \
14320
0
    tmp = fieldname(insn, 12, 4); \
14321
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14322
0
    tmp = fieldname(insn, 8, 4); \
14323
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14324
0
    tmp = fieldname(insn, 16, 4); \
14325
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14326
0
    tmp = fieldname(insn, 0, 4); \
14327
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14328
0
    tmp = fieldname(insn, 12, 4); \
14329
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14330
0
    tmp = fieldname(insn, 8, 4); \
14331
0
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14332
0
    return S; \
14333
0
  case 310: \
14334
0
    tmp = fieldname(insn, 8, 4); \
14335
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14336
0
    tmp = fieldname(insn, 4, 4); \
14337
0
    MCOperand_CreateImm0(MI, tmp); \
14338
0
    tmp = fieldname(insn, 12, 4); \
14339
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14340
0
    tmp = fieldname(insn, 16, 4); \
14341
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14342
0
    tmp = fieldname(insn, 0, 4); \
14343
0
    MCOperand_CreateImm0(MI, tmp); \
14344
0
    return S; \
14345
0
  case 311: \
14346
0
    tmp = fieldname(insn, 12, 4); \
14347
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14348
0
    tmp = fieldname(insn, 16, 4); \
14349
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14350
0
    tmp = fieldname(insn, 8, 4); \
14351
0
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14352
0
    tmp = fieldname(insn, 4, 4); \
14353
0
    MCOperand_CreateImm0(MI, tmp); \
14354
0
    tmp = fieldname(insn, 0, 4); \
14355
0
    MCOperand_CreateImm0(MI, tmp); \
14356
0
    return S; \
14357
67.5k
  case 312: \
14358
67.5k
    tmp = fieldname(insn, 0, 3); \
14359
67.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14360
67.5k
    tmp = fieldname(insn, 3, 3); \
14361
67.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14362
67.5k
    tmp = fieldname(insn, 6, 5); \
14363
67.5k
    MCOperand_CreateImm0(MI, tmp); \
14364
67.5k
    return S; \
14365
67.5k
  case 313: \
14366
3.51k
    tmp = fieldname(insn, 0, 3); \
14367
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14368
3.51k
    tmp = fieldname(insn, 3, 3); \
14369
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14370
3.51k
    tmp = fieldname(insn, 6, 3); \
14371
3.51k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14372
3.51k
    return S; \
14373
5.37k
  case 314: \
14374
5.37k
    tmp = fieldname(insn, 0, 3); \
14375
5.37k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14376
5.37k
    tmp = fieldname(insn, 3, 3); \
14377
5.37k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14378
5.37k
    tmp = fieldname(insn, 6, 3); \
14379
5.37k
    MCOperand_CreateImm0(MI, tmp); \
14380
5.37k
    return S; \
14381
21.5k
  case 315: \
14382
21.5k
    tmp = fieldname(insn, 8, 3); \
14383
21.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14384
21.5k
    tmp = fieldname(insn, 8, 3); \
14385
21.5k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14386
21.5k
    tmp = fieldname(insn, 0, 8); \
14387
21.5k
    MCOperand_CreateImm0(MI, tmp); \
14388
21.5k
    return S; \
14389
21.5k
  case 316: \
14390
4.89k
    tmp = fieldname(insn, 0, 3); \
14391
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14392
4.89k
    tmp = fieldname(insn, 0, 3); \
14393
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14394
4.89k
    tmp = fieldname(insn, 3, 3); \
14395
4.89k
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14396
4.89k
    return S; \
14397
4.89k
  case 317: \
14398
925
    tmp = fieldname(insn, 0, 3); \
14399
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14400
925
    tmp = fieldname(insn, 3, 3); \
14401
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14402
925
    tmp = fieldname(insn, 0, 3); \
14403
925
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14404
925
    return S; \
14405
925
  case 318: \
14406
0
    tmp = 0; \
14407
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14408
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14409
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14410
0
    tmp = 0; \
14411
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14412
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14413
0
    tmp |= fieldname(insn, 23, 1) << 8; \
14414
0
    if (!Check(&S, DecodeAddrMode5FP16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14415
0
    tmp = fieldname(insn, 28, 4); \
14416
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14417
0
    return S; \
14418
0
  case 319: \
14419
0
    tmp = 0; \
14420
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14421
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14422
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14423
0
    tmp = 0; \
14424
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14425
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14426
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14427
0
    tmp = 0; \
14428
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14429
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14430
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14431
0
    tmp = 0; \
14432
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14433
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14434
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14435
0
    tmp = fieldname(insn, 28, 4); \
14436
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14437
0
    return S; \
14438
0
  case 320: \
14439
0
    tmp = 0; \
14440
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14441
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14442
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14443
0
    tmp = 0; \
14444
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14445
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14446
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14447
0
    tmp = 0; \
14448
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14449
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14450
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14451
0
    tmp = fieldname(insn, 28, 4); \
14452
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14453
0
    return S; \
14454
0
  case 321: \
14455
0
    tmp = 0; \
14456
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14457
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14458
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14459
0
    tmp = fieldname(insn, 12, 4); \
14460
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14461
0
    tmp = fieldname(insn, 28, 4); \
14462
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14463
0
    return S; \
14464
0
  case 322: \
14465
0
    if (!Check(&S, DecodeVMOVSRR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14466
0
    return S; \
14467
0
  case 323: \
14468
0
    tmp = fieldname(insn, 16, 4); \
14469
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14470
0
    tmp = fieldname(insn, 28, 4); \
14471
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14472
0
    tmp = 0; \
14473
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14474
0
    tmp |= fieldname(insn, 12, 4) << 9; \
14475
0
    tmp |= fieldname(insn, 22, 1) << 8; \
14476
0
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14477
0
    return S; \
14478
0
  case 324: \
14479
0
    tmp = 0; \
14480
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14481
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14482
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14483
0
    tmp = 0; \
14484
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14485
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14486
0
    tmp |= fieldname(insn, 23, 1) << 8; \
14487
0
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14488
0
    tmp = fieldname(insn, 28, 4); \
14489
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14490
0
    return S; \
14491
0
  case 325: \
14492
0
    tmp = 0; \
14493
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14494
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14495
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14496
0
    tmp = 0; \
14497
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14498
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14499
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14500
0
    tmp = 0; \
14501
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14502
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14503
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14504
0
    tmp = 0; \
14505
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14506
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14507
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14508
0
    tmp = fieldname(insn, 28, 4); \
14509
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14510
0
    return S; \
14511
0
  case 326: \
14512
0
    tmp = 0; \
14513
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14514
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14515
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14516
0
    tmp = 0; \
14517
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14518
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14519
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14520
0
    tmp = 0; \
14521
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14522
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14523
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14524
0
    tmp = fieldname(insn, 28, 4); \
14525
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14526
0
    return S; \
14527
0
  case 327: \
14528
0
    tmp = 0; \
14529
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14530
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14531
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14532
0
    tmp = fieldname(insn, 12, 4); \
14533
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14534
0
    tmp = fieldname(insn, 28, 4); \
14535
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14536
0
    return S; \
14537
0
  case 328: \
14538
0
    tmp = 0; \
14539
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14540
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14541
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14542
0
    tmp = fieldname(insn, 12, 4); \
14543
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14544
0
    tmp = fieldname(insn, 16, 4); \
14545
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14546
0
    tmp = fieldname(insn, 28, 4); \
14547
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14548
0
    return S; \
14549
0
  case 329: \
14550
0
    tmp = fieldname(insn, 16, 4); \
14551
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14552
0
    tmp = fieldname(insn, 28, 4); \
14553
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14554
0
    tmp = 0; \
14555
0
    tmp |= fieldname(insn, 1, 7) << 1; \
14556
0
    tmp |= fieldname(insn, 12, 4) << 8; \
14557
0
    tmp |= fieldname(insn, 22, 1) << 12; \
14558
0
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14559
0
    return S; \
14560
0
  case 330: \
14561
0
    tmp = fieldname(insn, 16, 4); \
14562
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14563
0
    tmp = fieldname(insn, 28, 4); \
14564
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14565
0
    tmp = 0; \
14566
0
    tmp |= fieldname(insn, 1, 7) << 1; \
14567
0
    tmp |= fieldname(insn, 12, 4) << 8; \
14568
0
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14569
0
    return S; \
14570
0
  case 331: \
14571
0
    tmp = 0; \
14572
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14573
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14574
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14575
0
    tmp = 0; \
14576
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14577
0
    tmp |= fieldname(insn, 16, 4) << 9; \
14578
0
    tmp |= fieldname(insn, 23, 1) << 8; \
14579
0
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14580
0
    tmp = fieldname(insn, 28, 4); \
14581
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14582
0
    return S; \
14583
0
  case 332: \
14584
0
    tmp = 0; \
14585
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14586
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14587
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14588
0
    tmp = 0; \
14589
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14590
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14591
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14592
0
    tmp = 0; \
14593
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14594
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14595
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14596
0
    tmp = 0; \
14597
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14598
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14599
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14600
0
    tmp = fieldname(insn, 28, 4); \
14601
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14602
0
    return S; \
14603
0
  case 333: \
14604
0
    tmp = 0; \
14605
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14606
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14607
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14608
0
    tmp = 0; \
14609
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14610
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14611
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14612
0
    tmp = 0; \
14613
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14614
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14615
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14616
0
    tmp = fieldname(insn, 28, 4); \
14617
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14618
0
    return S; \
14619
0
  case 334: \
14620
0
    tmp = fieldname(insn, 12, 4); \
14621
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14622
0
    tmp = 0; \
14623
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14624
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14625
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14626
0
    tmp = fieldname(insn, 28, 4); \
14627
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14628
0
    return S; \
14629
0
  case 335: \
14630
0
    if (!Check(&S, DecodeVMOVRRS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14631
0
    return S; \
14632
0
  case 336: \
14633
0
    tmp = fieldname(insn, 12, 4); \
14634
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14635
0
    tmp = 0; \
14636
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14637
0
    tmp |= fieldname(insn, 16, 4) << 1; \
14638
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14639
0
    tmp = fieldname(insn, 28, 4); \
14640
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14641
0
    return S; \
14642
0
  case 337: \
14643
0
    tmp = fieldname(insn, 12, 4); \
14644
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14645
0
    tmp = fieldname(insn, 16, 4); \
14646
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14647
0
    tmp = 0; \
14648
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14649
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14650
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14651
0
    tmp = fieldname(insn, 28, 4); \
14652
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14653
0
    return S; \
14654
0
  case 338: \
14655
0
    tmp = fieldname(insn, 16, 4); \
14656
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14657
0
    tmp = fieldname(insn, 28, 4); \
14658
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14659
0
    return S; \
14660
0
  case 339: \
14661
0
    tmp = fieldname(insn, 16, 4); \
14662
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14663
0
    tmp = fieldname(insn, 16, 4); \
14664
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14665
0
    tmp = fieldname(insn, 28, 4); \
14666
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14667
0
    tmp = 0; \
14668
0
    tmp |= fieldname(insn, 0, 8) << 0; \
14669
0
    tmp |= fieldname(insn, 12, 4) << 9; \
14670
0
    tmp |= fieldname(insn, 22, 1) << 8; \
14671
0
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14672
0
    return S; \
14673
0
  case 340: \
14674
0
    tmp = fieldname(insn, 16, 4); \
14675
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14676
0
    tmp = fieldname(insn, 16, 4); \
14677
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14678
0
    tmp = fieldname(insn, 28, 4); \
14679
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14680
0
    tmp = 0; \
14681
0
    tmp |= fieldname(insn, 1, 7) << 1; \
14682
0
    tmp |= fieldname(insn, 12, 4) << 8; \
14683
0
    tmp |= fieldname(insn, 22, 1) << 12; \
14684
0
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14685
0
    return S; \
14686
0
  case 341: \
14687
0
    tmp = fieldname(insn, 16, 4); \
14688
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14689
0
    tmp = fieldname(insn, 16, 4); \
14690
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14691
0
    tmp = fieldname(insn, 28, 4); \
14692
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14693
0
    tmp = 0; \
14694
0
    tmp |= fieldname(insn, 1, 7) << 1; \
14695
0
    tmp |= fieldname(insn, 12, 4) << 8; \
14696
0
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14697
0
    return S; \
14698
0
  case 342: \
14699
0
    if (!Check(&S, DecodeForVMRSandVMSR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14700
0
    return S; \
14701
0
  case 343: \
14702
0
    tmp = 0; \
14703
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14704
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14705
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14706
0
    tmp = 0; \
14707
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14708
0
    tmp |= fieldname(insn, 16, 4) << 4; \
14709
0
    MCOperand_CreateImm0(MI, tmp); \
14710
0
    tmp = fieldname(insn, 28, 4); \
14711
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14712
0
    return S; \
14713
0
  case 344: \
14714
0
    tmp = 0; \
14715
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14716
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14717
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14718
0
    tmp = 0; \
14719
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14720
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14721
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14722
0
    tmp = fieldname(insn, 28, 4); \
14723
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14724
0
    return S; \
14725
0
  case 345: \
14726
0
    tmp = 0; \
14727
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14728
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14729
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14730
0
    tmp = fieldname(insn, 28, 4); \
14731
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14732
0
    return S; \
14733
0
  case 346: \
14734
0
    tmp = 0; \
14735
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14736
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14737
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14738
0
    tmp = 0; \
14739
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14740
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14741
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14742
0
    tmp = fieldname(insn, 28, 4); \
14743
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14744
0
    return S; \
14745
0
  case 347: \
14746
0
    tmp = 0; \
14747
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14748
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14749
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14750
0
    tmp = 0; \
14751
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14752
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14753
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14754
0
    tmp = fieldname(insn, 28, 4); \
14755
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14756
0
    return S; \
14757
0
  case 348: \
14758
0
    tmp = 0; \
14759
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14760
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14761
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14762
0
    tmp = 0; \
14763
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14764
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14765
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14766
0
    tmp = 0; \
14767
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14768
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14769
0
    MCOperand_CreateImm0(MI, tmp); \
14770
0
    tmp = fieldname(insn, 28, 4); \
14771
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14772
0
    return S; \
14773
0
  case 349: \
14774
0
    tmp = 0; \
14775
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14776
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14777
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14778
0
    tmp = 0; \
14779
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14780
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14781
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14782
0
    tmp = fieldname(insn, 28, 4); \
14783
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14784
0
    return S; \
14785
0
  case 350: \
14786
0
    tmp = 0; \
14787
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14788
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14789
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14790
0
    tmp = 0; \
14791
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14792
0
    tmp |= fieldname(insn, 16, 4) << 4; \
14793
0
    MCOperand_CreateImm0(MI, tmp); \
14794
0
    tmp = fieldname(insn, 28, 4); \
14795
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14796
0
    return S; \
14797
0
  case 351: \
14798
0
    tmp = 0; \
14799
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14800
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14801
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14802
0
    tmp = fieldname(insn, 28, 4); \
14803
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14804
0
    return S; \
14805
0
  case 352: \
14806
0
    tmp = 0; \
14807
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14808
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14809
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14810
0
    tmp = 0; \
14811
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14812
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14813
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14814
0
    tmp = fieldname(insn, 28, 4); \
14815
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14816
0
    return S; \
14817
0
  case 353: \
14818
0
    tmp = 0; \
14819
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14820
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14821
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14822
0
    tmp = 0; \
14823
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14824
0
    tmp |= fieldname(insn, 16, 4) << 4; \
14825
0
    MCOperand_CreateImm0(MI, tmp); \
14826
0
    tmp = fieldname(insn, 28, 4); \
14827
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14828
0
    return S; \
14829
0
  case 354: \
14830
0
    tmp = 0; \
14831
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14832
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14833
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14834
0
    tmp = 0; \
14835
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14836
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14837
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14838
0
    tmp = fieldname(insn, 28, 4); \
14839
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14840
0
    return S; \
14841
0
  case 355: \
14842
0
    tmp = 0; \
14843
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14844
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14845
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14846
0
    tmp = 0; \
14847
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14848
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14849
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14850
0
    tmp = fieldname(insn, 28, 4); \
14851
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14852
0
    return S; \
14853
0
  case 356: \
14854
0
    tmp = 0; \
14855
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14856
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14857
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14858
0
    tmp = fieldname(insn, 28, 4); \
14859
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14860
0
    return S; \
14861
0
  case 357: \
14862
0
    tmp = 0; \
14863
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14864
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14865
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14866
0
    tmp = 0; \
14867
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14868
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14869
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14870
0
    tmp = 0; \
14871
0
    tmp |= fieldname(insn, 0, 4) << 1; \
14872
0
    tmp |= fieldname(insn, 5, 1) << 0; \
14873
0
    MCOperand_CreateImm0(MI, tmp); \
14874
0
    tmp = fieldname(insn, 28, 4); \
14875
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14876
0
    return S; \
14877
0
  case 358: \
14878
0
    tmp = 0; \
14879
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14880
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14881
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14882
0
    tmp = 0; \
14883
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14884
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14885
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14886
0
    tmp = 0; \
14887
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14888
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14889
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14890
0
    tmp = fieldname(insn, 24, 1); \
14891
0
    MCOperand_CreateImm0(MI, tmp); \
14892
0
    return S; \
14893
0
  case 359: \
14894
0
    tmp = 0; \
14895
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14896
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14897
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14898
0
    tmp = 0; \
14899
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14900
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14901
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14902
0
    tmp = 0; \
14903
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14904
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14905
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14906
0
    tmp = 0; \
14907
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14908
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14909
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14910
0
    tmp = fieldname(insn, 23, 2); \
14911
0
    MCOperand_CreateImm0(MI, tmp); \
14912
0
    return S; \
14913
0
  case 360: \
14914
0
    tmp = 0; \
14915
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14916
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14917
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14918
0
    tmp = 0; \
14919
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14920
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14921
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14922
0
    tmp = 0; \
14923
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14924
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14925
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14926
0
    tmp = fieldname(insn, 0, 4); \
14927
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14928
0
    tmp = fieldname(insn, 5, 1); \
14929
0
    MCOperand_CreateImm0(MI, tmp); \
14930
0
    tmp = fieldname(insn, 20, 2); \
14931
0
    MCOperand_CreateImm0(MI, tmp); \
14932
0
    return S; \
14933
0
  case 361: \
14934
0
    if (!Check(&S, DecodeNEONComplexLane64Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14935
0
    return S; \
14936
0
  case 362: \
14937
0
    tmp = 0; \
14938
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14939
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14940
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14941
0
    tmp = 0; \
14942
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14943
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14944
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14945
0
    tmp = 0; \
14946
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14947
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14948
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14949
0
    tmp = fieldname(insn, 24, 1); \
14950
0
    MCOperand_CreateImm0(MI, tmp); \
14951
0
    return S; \
14952
0
  case 363: \
14953
0
    tmp = 0; \
14954
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14955
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14956
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14957
0
    tmp = 0; \
14958
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14959
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14960
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14961
0
    tmp = 0; \
14962
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14963
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14964
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14965
0
    tmp = 0; \
14966
0
    tmp |= fieldname(insn, 0, 4) << 0; \
14967
0
    tmp |= fieldname(insn, 5, 1) << 4; \
14968
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14969
0
    tmp = fieldname(insn, 23, 2); \
14970
0
    MCOperand_CreateImm0(MI, tmp); \
14971
0
    return S; \
14972
0
  case 364: \
14973
0
    tmp = 0; \
14974
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14975
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14976
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14977
0
    tmp = 0; \
14978
0
    tmp |= fieldname(insn, 12, 4) << 0; \
14979
0
    tmp |= fieldname(insn, 22, 1) << 4; \
14980
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14981
0
    tmp = 0; \
14982
0
    tmp |= fieldname(insn, 7, 1) << 4; \
14983
0
    tmp |= fieldname(insn, 16, 4) << 0; \
14984
0
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14985
0
    tmp = fieldname(insn, 0, 4); \
14986
0
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14987
0
    tmp = fieldname(insn, 5, 1); \
14988
0
    MCOperand_CreateImm0(MI, tmp); \
14989
0
    tmp = fieldname(insn, 20, 2); \
14990
0
    MCOperand_CreateImm0(MI, tmp); \
14991
0
    return S; \
14992
0
  case 365: \
14993
0
    tmp = 0; \
14994
0
    tmp |= fieldname(insn, 12, 4) << 1; \
14995
0
    tmp |= fieldname(insn, 22, 1) << 0; \
14996
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14997
0
    tmp = 0; \
14998
0
    tmp |= fieldname(insn, 7, 1) << 0; \
14999
0
    tmp |= fieldname(insn, 16, 4) << 1; \
15000
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15001
0
    tmp = 0; \
15002
0
    tmp |= fieldname(insn, 0, 4) << 1; \
15003
0
    tmp |= fieldname(insn, 5, 1) << 0; \
15004
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15005
0
    return S; \
15006
0
  case 366: \
15007
0
    tmp = 0; \
15008
0
    tmp |= fieldname(insn, 12, 4) << 1; \
15009
0
    tmp |= fieldname(insn, 22, 1) << 0; \
15010
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15011
0
    tmp = 0; \
15012
0
    tmp |= fieldname(insn, 0, 4) << 1; \
15013
0
    tmp |= fieldname(insn, 5, 1) << 0; \
15014
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15015
0
    return S; \
15016
0
  case 367: \
15017
0
    tmp = 0; \
15018
0
    tmp |= fieldname(insn, 12, 4) << 1; \
15019
0
    tmp |= fieldname(insn, 22, 1) << 0; \
15020
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15021
0
    tmp = 0; \
15022
0
    tmp |= fieldname(insn, 0, 4) << 1; \
15023
0
    tmp |= fieldname(insn, 5, 1) << 0; \
15024
0
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15025
0
    return S; \
15026
0
  case 368: \
15027
0
    tmp = 0; \
15028
0
    tmp |= fieldname(insn, 12, 4) << 1; \
15029
0
    tmp |= fieldname(insn, 22, 1) << 0; \
15030
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15031
0
    tmp = 0; \
15032
0
    tmp |= fieldname(insn, 7, 1) << 0; \
15033
0
    tmp |= fieldname(insn, 16, 4) << 1; \
15034
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15035
0
    tmp = 0; \
15036
0
    tmp |= fieldname(insn, 0, 4) << 1; \
15037
0
    tmp |= fieldname(insn, 5, 1) << 0; \
15038
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15039
0
    return S; \
15040
0
  case 369: \
15041
0
    tmp = 0; \
15042
0
    tmp |= fieldname(insn, 12, 4) << 1; \
15043
0
    tmp |= fieldname(insn, 22, 1) << 0; \
15044
0
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15045
0
    tmp = 0; \
15046
0
    tmp |= fieldname(insn, 0, 4) << 0; \
15047
0
    tmp |= fieldname(insn, 5, 1) << 4; \
15048
0
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15049
0
    return S; \
15050
352k
  } \
15051
352k
}
ARMDisassembler.c:decodeToMCInst_4
Line
Count
Source
11359
380k
    uint64_t Address, bool *Decoder) \
11360
380k
{ \
11361
380k
  InsnType tmp; \
11362
380k
  /* printf("Idx = %u\n", Idx); */\
11363
380k
  switch (Idx) { \
11364
0
  default: /* llvm_unreachable("Invalid index!");*/  \
11365
4.86k
  case 0: \
11366
4.86k
    tmp = fieldname(insn, 12, 4); \
11367
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
4.86k
    tmp = fieldname(insn, 16, 4); \
11369
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11370
4.86k
    tmp = fieldname(insn, 0, 4); \
11371
4.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
4.86k
    tmp = fieldname(insn, 28, 4); \
11373
4.86k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11374
4.86k
    tmp = fieldname(insn, 20, 1); \
11375
4.86k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
4.86k
    return S; \
11377
8.33k
  case 1: \
11378
8.33k
    tmp = fieldname(insn, 12, 4); \
11379
8.33k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11380
8.33k
    tmp = fieldname(insn, 16, 4); \
11381
8.33k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
8.33k
    tmp = 0; \
11383
8.33k
    tmp |= fieldname(insn, 0, 4) << 0; \
11384
8.33k
    tmp |= fieldname(insn, 5, 7) << 5; \
11385
8.33k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11386
8.33k
    tmp = fieldname(insn, 28, 4); \
11387
8.33k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
8.33k
    tmp = fieldname(insn, 20, 1); \
11389
8.33k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11390
8.33k
    return S; \
11391
8.33k
  case 2: \
11392
3.86k
    tmp = fieldname(insn, 12, 4); \
11393
3.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11394
3.86k
    tmp = fieldname(insn, 16, 4); \
11395
3.86k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
3.86k
    tmp = 0; \
11397
3.86k
    tmp |= fieldname(insn, 0, 4) << 0; \
11398
3.86k
    tmp |= fieldname(insn, 5, 2) << 5; \
11399
3.86k
    tmp |= fieldname(insn, 8, 4) << 8; \
11400
3.86k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11401
3.86k
    tmp = fieldname(insn, 28, 4); \
11402
3.86k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11403
3.86k
    tmp = fieldname(insn, 20, 1); \
11404
3.85k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11405
3.85k
    return S; \
11406
3.85k
  case 3: \
11407
1.10k
    tmp = fieldname(insn, 12, 4); \
11408
1.10k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11409
1.10k
    tmp = fieldname(insn, 16, 4); \
11410
1.10k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11411
1.10k
    tmp = 0; \
11412
1.10k
    tmp |= fieldname(insn, 0, 4) << 0; \
11413
1.10k
    tmp |= fieldname(insn, 5, 2) << 5; \
11414
1.10k
    tmp |= fieldname(insn, 8, 4) << 8; \
11415
1.10k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11416
1.10k
    tmp = fieldname(insn, 28, 4); \
11417
1.10k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
1.10k
    tmp = fieldname(insn, 20, 1); \
11419
1.10k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
1.10k
    return S; \
11421
1.59k
  case 4: \
11422
1.59k
    tmp = fieldname(insn, 16, 4); \
11423
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11424
1.59k
    tmp = fieldname(insn, 0, 4); \
11425
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
1.59k
    tmp = fieldname(insn, 8, 4); \
11427
1.59k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11428
1.59k
    tmp = fieldname(insn, 28, 4); \
11429
1.59k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11430
1.59k
    tmp = fieldname(insn, 20, 1); \
11431
1.59k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
1.59k
    return S; \
11433
1.59k
  case 5: \
11434
88
    tmp = fieldname(insn, 12, 4); \
11435
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
88
    tmp = fieldname(insn, 16, 4); \
11437
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11438
88
    tmp = fieldname(insn, 0, 4); \
11439
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
88
    tmp = fieldname(insn, 8, 4); \
11441
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11442
88
    tmp = fieldname(insn, 12, 4); \
11443
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
88
    tmp = fieldname(insn, 16, 4); \
11445
88
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11446
88
    tmp = fieldname(insn, 28, 4); \
11447
88
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
88
    return S; \
11449
661
  case 6: \
11450
661
    tmp = fieldname(insn, 12, 4); \
11451
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
661
    tmp = fieldname(insn, 16, 4); \
11453
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
661
    tmp = fieldname(insn, 0, 4); \
11455
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11456
661
    tmp = fieldname(insn, 8, 4); \
11457
661
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11458
661
    tmp = fieldname(insn, 28, 4); \
11459
661
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
661
    tmp = fieldname(insn, 20, 1); \
11461
660
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
660
    return S; \
11463
11.7k
  case 7: \
11464
11.7k
    if (!Check(&S, DecodeAddrMode3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11465
11.7k
    return S; \
11466
11.7k
  case 8: \
11467
1.14k
    tmp = fieldname(insn, 12, 4); \
11468
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11469
1.14k
    tmp = fieldname(insn, 16, 4); \
11470
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11471
1.14k
    tmp = fieldname(insn, 0, 4); \
11472
1.14k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11473
1.14k
    return S; \
11474
1.28k
  case 9: \
11475
1.28k
    if (!Check(&S, DecodeCPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
1.28k
    return S; \
11477
1.28k
  case 10: \
11478
103
    tmp = fieldname(insn, 9, 1); \
11479
103
    MCOperand_CreateImm0(MI, tmp); \
11480
103
    return S; \
11481
1.28k
  case 11: \
11482
486
    tmp = fieldname(insn, 12, 4); \
11483
486
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
486
    tmp = fieldname(insn, 28, 4); \
11485
486
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
486
    return S; \
11487
1.17k
  case 12: \
11488
1.17k
    if (!Check(&S, DecodeQADDInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11489
1.17k
    return S; \
11490
1.64k
  case 13: \
11491
1.64k
    if (!Check(&S, DecodeSMLAInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11492
1.64k
    return S; \
11493
2.01k
  case 14: \
11494
2.01k
    if (!Check(&S, DecodeSwap(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11495
2.01k
    return S; \
11496
2.01k
  case 15: \
11497
328
    tmp = 0; \
11498
328
    tmp |= fieldname(insn, 0, 4) << 0; \
11499
328
    tmp |= fieldname(insn, 8, 12) << 4; \
11500
328
    MCOperand_CreateImm0(MI, tmp); \
11501
328
    return S; \
11502
2.01k
  case 16: \
11503
472
    if (!Check(&S, DecodeTSTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11504
472
    return S; \
11505
907
  case 17: \
11506
907
    tmp = fieldname(insn, 16, 4); \
11507
907
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
907
    tmp = 0; \
11509
907
    tmp |= fieldname(insn, 0, 4) << 0; \
11510
907
    tmp |= fieldname(insn, 5, 7) << 5; \
11511
907
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
907
    tmp = fieldname(insn, 28, 4); \
11513
907
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
907
    return S; \
11515
1.11k
  case 18: \
11516
1.11k
    tmp = fieldname(insn, 16, 4); \
11517
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
1.11k
    tmp = 0; \
11519
1.11k
    tmp |= fieldname(insn, 0, 4) << 0; \
11520
1.11k
    tmp |= fieldname(insn, 5, 2) << 5; \
11521
1.11k
    tmp |= fieldname(insn, 8, 4) << 8; \
11522
1.11k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11523
1.11k
    tmp = fieldname(insn, 28, 4); \
11524
1.11k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11525
1.11k
    return S; \
11526
1.11k
  case 19: \
11527
369
    tmp = fieldname(insn, 12, 4); \
11528
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11529
369
    tmp = fieldname(insn, 16, 4); \
11530
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
369
    tmp = fieldname(insn, 0, 4); \
11532
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
369
    tmp = fieldname(insn, 8, 4); \
11534
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
369
    tmp = fieldname(insn, 12, 4); \
11536
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11537
369
    tmp = fieldname(insn, 16, 4); \
11538
369
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11539
369
    tmp = fieldname(insn, 28, 4); \
11540
369
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
369
    return S; \
11542
369
  case 20: \
11543
90
    tmp = fieldname(insn, 16, 4); \
11544
90
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11545
90
    tmp = fieldname(insn, 0, 4); \
11546
90
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
90
    tmp = fieldname(insn, 28, 4); \
11548
90
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11549
90
    return S; \
11550
356
  case 21: \
11551
356
    tmp = fieldname(insn, 12, 4); \
11552
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
356
    tmp = fieldname(insn, 0, 4); \
11554
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11555
356
    tmp = fieldname(insn, 16, 4); \
11556
356
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
356
    tmp = fieldname(insn, 28, 4); \
11558
356
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11559
356
    return S; \
11560
356
  case 22: \
11561
197
    tmp = fieldname(insn, 0, 4); \
11562
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11563
197
    tmp = fieldname(insn, 16, 4); \
11564
197
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11565
197
    tmp = fieldname(insn, 28, 4); \
11566
197
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11567
197
    return S; \
11568
211
  case 23: \
11569
211
    tmp = fieldname(insn, 12, 4); \
11570
211
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11571
211
    tmp = fieldname(insn, 16, 4); \
11572
211
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
211
    tmp = fieldname(insn, 28, 4); \
11574
211
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
211
    return S; \
11576
211
  case 24: \
11577
197
    tmp = fieldname(insn, 12, 4); \
11578
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11579
197
    tmp = fieldname(insn, 0, 4); \
11580
197
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
197
    tmp = fieldname(insn, 16, 4); \
11582
197
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11583
197
    tmp = fieldname(insn, 28, 4); \
11584
197
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
197
    return S; \
11586
197
  case 25: \
11587
158
    tmp = fieldname(insn, 12, 4); \
11588
158
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
158
    tmp = 0; \
11590
158
    tmp |= fieldname(insn, 8, 1) << 4; \
11591
158
    tmp |= fieldname(insn, 16, 4) << 0; \
11592
158
    tmp |= fieldname(insn, 22, 1) << 5; \
11593
158
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11594
158
    tmp = fieldname(insn, 28, 4); \
11595
156
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11596
156
    return S; \
11597
156
  case 26: \
11598
129
    tmp = 0; \
11599
129
    tmp |= fieldname(insn, 16, 4) << 0; \
11600
129
    tmp |= fieldname(insn, 22, 1) << 4; \
11601
129
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11602
129
    tmp = fieldname(insn, 0, 4); \
11603
128
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11604
128
    tmp = fieldname(insn, 28, 4); \
11605
128
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11606
128
    return S; \
11607
134
  case 27: \
11608
134
    tmp = 0; \
11609
134
    tmp |= fieldname(insn, 8, 1) << 4; \
11610
134
    tmp |= fieldname(insn, 16, 4) << 0; \
11611
134
    tmp |= fieldname(insn, 22, 1) << 5; \
11612
134
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11613
134
    tmp = fieldname(insn, 0, 4); \
11614
133
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11615
133
    tmp = fieldname(insn, 28, 4); \
11616
133
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
133
    return S; \
11618
158
  case 28: \
11619
158
    tmp = fieldname(insn, 0, 4); \
11620
158
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11621
158
    tmp = fieldname(insn, 28, 4); \
11622
158
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
158
    return S; \
11624
201
  case 29: \
11625
201
    tmp = fieldname(insn, 28, 4); \
11626
201
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11627
201
    return S; \
11628
637
  case 30: \
11629
637
    tmp = fieldname(insn, 16, 4); \
11630
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
637
    tmp = fieldname(insn, 0, 4); \
11632
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
637
    tmp = fieldname(insn, 8, 4); \
11634
637
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11635
637
    tmp = fieldname(insn, 28, 4); \
11636
637
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11637
637
    return S; \
11638
637
  case 31: \
11639
273
    tmp = fieldname(insn, 12, 4); \
11640
273
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
273
    tmp = fieldname(insn, 0, 4); \
11642
273
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
273
    tmp = fieldname(insn, 28, 4); \
11644
273
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11645
273
    tmp = fieldname(insn, 20, 1); \
11646
272
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
272
    return S; \
11648
532
  case 32: \
11649
532
    tmp = fieldname(insn, 12, 4); \
11650
532
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
532
    tmp = fieldname(insn, 0, 4); \
11652
529
    if (!Check(&S, DecodetcGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
529
    tmp = fieldname(insn, 28, 4); \
11654
527
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11655
527
    tmp = fieldname(insn, 20, 1); \
11656
526
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
526
    return S; \
11658
1.72k
  case 33: \
11659
1.72k
    tmp = fieldname(insn, 12, 4); \
11660
1.72k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
1.72k
    tmp = 0; \
11662
1.72k
    tmp |= fieldname(insn, 0, 4) << 0; \
11663
1.72k
    tmp |= fieldname(insn, 5, 7) << 5; \
11664
1.72k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11665
1.72k
    tmp = fieldname(insn, 28, 4); \
11666
1.72k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
1.72k
    tmp = fieldname(insn, 20, 1); \
11668
1.72k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
1.72k
    return S; \
11670
1.72k
  case 34: \
11671
378
    tmp = fieldname(insn, 0, 4); \
11672
378
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11673
378
    return S; \
11674
378
  case 35: \
11675
69
    tmp = fieldname(insn, 12, 4); \
11676
69
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
69
    tmp = fieldname(insn, 0, 4); \
11678
69
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
69
    tmp = fieldname(insn, 28, 4); \
11680
69
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11681
69
    return S; \
11682
214
  case 36: \
11683
214
    tmp = fieldname(insn, 0, 4); \
11684
214
    MCOperand_CreateImm0(MI, tmp); \
11685
214
    tmp = fieldname(insn, 28, 4); \
11686
214
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11687
214
    return S; \
11688
1.13k
  case 37: \
11689
1.13k
    tmp = fieldname(insn, 12, 4); \
11690
1.13k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
1.13k
    tmp = 0; \
11692
1.13k
    tmp |= fieldname(insn, 0, 4) << 0; \
11693
1.13k
    tmp |= fieldname(insn, 5, 2) << 5; \
11694
1.13k
    tmp |= fieldname(insn, 8, 4) << 8; \
11695
1.13k
    if (!Check(&S, DecodeSORegRegOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11696
1.13k
    tmp = fieldname(insn, 28, 4); \
11697
1.13k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11698
1.13k
    tmp = fieldname(insn, 20, 1); \
11699
1.13k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11700
1.13k
    return S; \
11701
1.40k
  case 38: \
11702
1.40k
    tmp = fieldname(insn, 16, 4); \
11703
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11704
1.40k
    tmp = fieldname(insn, 0, 4); \
11705
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11706
1.40k
    tmp = fieldname(insn, 8, 4); \
11707
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11708
1.40k
    tmp = fieldname(insn, 12, 4); \
11709
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11710
1.40k
    tmp = fieldname(insn, 28, 4); \
11711
1.40k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11712
1.40k
    tmp = fieldname(insn, 20, 1); \
11713
1.40k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11714
1.40k
    return S; \
11715
1.40k
  case 39: \
11716
225
    tmp = fieldname(insn, 16, 4); \
11717
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11718
225
    tmp = fieldname(insn, 0, 4); \
11719
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11720
225
    tmp = fieldname(insn, 8, 4); \
11721
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11722
225
    tmp = fieldname(insn, 12, 4); \
11723
225
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11724
225
    tmp = fieldname(insn, 28, 4); \
11725
225
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11726
225
    return S; \
11727
783
  case 40: \
11728
783
    tmp = fieldname(insn, 12, 4); \
11729
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11730
783
    tmp = fieldname(insn, 16, 4); \
11731
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11732
783
    tmp = fieldname(insn, 0, 4); \
11733
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11734
783
    tmp = fieldname(insn, 8, 4); \
11735
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11736
783
    tmp = fieldname(insn, 12, 4); \
11737
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11738
783
    tmp = fieldname(insn, 16, 4); \
11739
783
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11740
783
    tmp = fieldname(insn, 28, 4); \
11741
783
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11742
783
    tmp = fieldname(insn, 20, 1); \
11743
782
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11744
782
    return S; \
11745
1.12k
  case 41: \
11746
1.12k
    if (!Check(&S, DecodeDoubleRegStore(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
1.12k
    return S; \
11748
1.12k
  case 42: \
11749
897
    if (!Check(&S, DecodeDoubleRegLoad(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11750
897
    return S; \
11751
897
  case 43: \
11752
210
    tmp = fieldname(insn, 16, 4); \
11753
210
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11754
210
    tmp = fieldname(insn, 12, 4); \
11755
210
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11756
210
    tmp = fieldname(insn, 16, 4); \
11757
210
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11758
210
    tmp = 0; \
11759
210
    tmp |= fieldname(insn, 0, 4) << 0; \
11760
210
    tmp |= fieldname(insn, 23, 1) << 4; \
11761
210
    if (!Check(&S, DecodePostIdxReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11762
210
    tmp = fieldname(insn, 28, 4); \
11763
210
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11764
210
    return S; \
11765
284
  case 44: \
11766
284
    tmp = fieldname(insn, 16, 4); \
11767
284
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11768
284
    tmp = fieldname(insn, 12, 4); \
11769
284
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11770
284
    tmp = fieldname(insn, 16, 4); \
11771
284
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11772
284
    tmp = 0; \
11773
284
    tmp |= fieldname(insn, 0, 4) << 0; \
11774
284
    tmp |= fieldname(insn, 8, 4) << 4; \
11775
284
    tmp |= fieldname(insn, 23, 1) << 8; \
11776
284
    MCOperand_CreateImm0(MI, tmp); \
11777
284
    tmp = fieldname(insn, 28, 4); \
11778
284
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11779
284
    return S; \
11780
1.06k
  case 45: \
11781
1.06k
    if (!Check(&S, DecodeLDR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
1.06k
    return S; \
11783
1.06k
  case 46: \
11784
437
    tmp = fieldname(insn, 12, 4); \
11785
437
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
437
    tmp = fieldname(insn, 16, 4); \
11787
437
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
437
    tmp = fieldname(insn, 16, 4); \
11789
437
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
437
    tmp = 0; \
11791
437
    tmp |= fieldname(insn, 0, 4) << 0; \
11792
437
    tmp |= fieldname(insn, 8, 4) << 4; \
11793
437
    tmp |= fieldname(insn, 23, 1) << 8; \
11794
437
    MCOperand_CreateImm0(MI, tmp); \
11795
437
    tmp = fieldname(insn, 28, 4); \
11796
437
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11797
437
    return S; \
11798
7.21k
  case 47: \
11799
7.21k
    tmp = fieldname(insn, 12, 4); \
11800
7.21k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11801
7.21k
    tmp = fieldname(insn, 16, 4); \
11802
7.21k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11803
7.21k
    tmp = fieldname(insn, 0, 12); \
11804
7.21k
    MCOperand_CreateImm0(MI, tmp); \
11805
7.21k
    tmp = fieldname(insn, 28, 4); \
11806
7.21k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11807
7.21k
    tmp = fieldname(insn, 20, 1); \
11808
4.81k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11809
4.81k
    return S; \
11810
4.81k
  case 48: \
11811
0
    tmp = fieldname(insn, 12, 4); \
11812
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11813
0
    tmp = 0; \
11814
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11815
0
    tmp |= fieldname(insn, 22, 2) << 12; \
11816
0
    MCOperand_CreateImm0(MI, tmp); \
11817
0
    tmp = fieldname(insn, 28, 4); \
11818
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11819
0
    return S; \
11820
1.65k
  case 49: \
11821
1.65k
    if (!Check(&S, DecodeArmMOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
1.65k
    return S; \
11823
1.65k
  case 50: \
11824
1.09k
    tmp = fieldname(insn, 16, 4); \
11825
1.09k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
1.09k
    tmp = fieldname(insn, 0, 12); \
11827
1.09k
    MCOperand_CreateImm0(MI, tmp); \
11828
1.09k
    tmp = fieldname(insn, 28, 4); \
11829
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11830
1.09k
    return S; \
11831
1.09k
  case 51: \
11832
452
    return S; \
11833
1.63k
  case 52: \
11834
1.63k
    if (!Check(&S, DecodeHINTInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11835
1.63k
    return S; \
11836
1.63k
  case 53: \
11837
996
    tmp = 0; \
11838
996
    tmp |= fieldname(insn, 16, 4) << 0; \
11839
996
    tmp |= fieldname(insn, 22, 1) << 4; \
11840
996
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11841
996
    tmp = fieldname(insn, 0, 12); \
11842
927
    MCOperand_CreateImm0(MI, tmp); \
11843
927
    tmp = fieldname(insn, 28, 4); \
11844
927
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11845
927
    return S; \
11846
927
  case 54: \
11847
769
    tmp = fieldname(insn, 12, 4); \
11848
769
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11849
769
    tmp = fieldname(insn, 0, 12); \
11850
769
    MCOperand_CreateImm0(MI, tmp); \
11851
769
    tmp = fieldname(insn, 28, 4); \
11852
769
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11853
769
    tmp = fieldname(insn, 20, 1); \
11854
574
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11855
574
    return S; \
11856
9.91k
  case 55: \
11857
9.91k
    if (!Check(&S, DecodeAddrMode2IdxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
9.91k
    return S; \
11859
9.91k
  case 56: \
11860
2.60k
    tmp = fieldname(insn, 12, 4); \
11861
2.60k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11862
2.60k
    tmp = 0; \
11863
2.60k
    tmp |= fieldname(insn, 0, 12) << 0; \
11864
2.60k
    tmp |= fieldname(insn, 16, 4) << 13; \
11865
2.60k
    tmp |= fieldname(insn, 23, 1) << 12; \
11866
2.60k
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11867
2.60k
    tmp = fieldname(insn, 28, 4); \
11868
2.60k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11869
2.60k
    return S; \
11870
2.60k
  case 57: \
11871
273
    tmp = 0; \
11872
273
    tmp |= fieldname(insn, 0, 12) << 0; \
11873
273
    tmp |= fieldname(insn, 16, 4) << 13; \
11874
273
    tmp |= fieldname(insn, 23, 1) << 12; \
11875
273
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
273
    return S; \
11877
2.07k
  case 58: \
11878
2.07k
    if (!Check(&S, DecodeSTRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11879
2.07k
    return S; \
11880
2.29k
  case 59: \
11881
2.29k
    if (!Check(&S, DecodeLDRPreImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11882
2.29k
    return S; \
11883
2.29k
  case 60: \
11884
1.68k
    tmp = fieldname(insn, 12, 4); \
11885
1.68k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
1.68k
    tmp = 0; \
11887
1.68k
    tmp |= fieldname(insn, 0, 12) << 0; \
11888
1.68k
    tmp |= fieldname(insn, 16, 4) << 13; \
11889
1.68k
    tmp |= fieldname(insn, 23, 1) << 12; \
11890
1.68k
    if (!Check(&S, DecodeAddrModeImm12Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11891
1.68k
    tmp = fieldname(insn, 28, 4); \
11892
1.68k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11893
1.68k
    return S; \
11894
2.99k
  case 61: \
11895
2.99k
    tmp = fieldname(insn, 0, 4); \
11896
2.99k
    if (!Check(&S, DecodeMemBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11897
2.99k
    return S; \
11898
2.99k
  case 62: \
11899
1.93k
    tmp = fieldname(insn, 0, 4); \
11900
1.93k
    if (!Check(&S, DecodeInstSyncBarrierOption(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11901
1.93k
    return S; \
11902
1.93k
  case 63: \
11903
1.63k
    tmp = fieldname(insn, 12, 4); \
11904
1.63k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11905
1.63k
    tmp = 0; \
11906
1.63k
    tmp |= fieldname(insn, 0, 4) << 0; \
11907
1.63k
    tmp |= fieldname(insn, 5, 7) << 5; \
11908
1.63k
    tmp |= fieldname(insn, 16, 4) << 13; \
11909
1.63k
    tmp |= fieldname(insn, 23, 1) << 12; \
11910
1.63k
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11911
1.63k
    tmp = fieldname(insn, 28, 4); \
11912
1.63k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11913
1.63k
    return S; \
11914
1.63k
  case 64: \
11915
66
    tmp = 0; \
11916
66
    tmp |= fieldname(insn, 0, 4) << 0; \
11917
66
    tmp |= fieldname(insn, 5, 7) << 5; \
11918
66
    tmp |= fieldname(insn, 16, 4) << 13; \
11919
66
    tmp |= fieldname(insn, 23, 1) << 12; \
11920
66
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11921
66
    return S; \
11922
1.25k
  case 65: \
11923
1.25k
    tmp = fieldname(insn, 12, 4); \
11924
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11925
1.25k
    tmp = fieldname(insn, 16, 4); \
11926
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11927
1.25k
    tmp = fieldname(insn, 0, 4); \
11928
1.25k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11929
1.25k
    tmp = fieldname(insn, 28, 4); \
11930
1.25k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11931
1.25k
    return S; \
11932
1.37k
  case 66: \
11933
1.37k
    tmp = fieldname(insn, 12, 4); \
11934
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11935
1.37k
    tmp = fieldname(insn, 16, 4); \
11936
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11937
1.37k
    tmp = fieldname(insn, 0, 4); \
11938
1.37k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11939
1.37k
    tmp = fieldname(insn, 7, 5); \
11940
1.37k
    MCOperand_CreateImm0(MI, tmp); \
11941
1.37k
    tmp = fieldname(insn, 28, 4); \
11942
1.37k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11943
1.37k
    return S; \
11944
1.37k
  case 67: \
11945
817
    tmp = fieldname(insn, 16, 4); \
11946
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11947
817
    tmp = fieldname(insn, 0, 4); \
11948
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11949
817
    tmp = fieldname(insn, 8, 4); \
11950
817
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11951
817
    tmp = fieldname(insn, 28, 4); \
11952
817
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11953
817
    return S; \
11954
817
  case 68: \
11955
518
    tmp = fieldname(insn, 16, 4); \
11956
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11957
518
    tmp = fieldname(insn, 0, 4); \
11958
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11959
518
    tmp = fieldname(insn, 8, 4); \
11960
518
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
518
    tmp = fieldname(insn, 12, 4); \
11962
518
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11963
518
    tmp = fieldname(insn, 28, 4); \
11964
518
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
518
    return S; \
11966
518
  case 69: \
11967
70
    tmp = fieldname(insn, 12, 4); \
11968
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11969
70
    tmp = fieldname(insn, 16, 4); \
11970
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11971
70
    tmp = fieldname(insn, 0, 4); \
11972
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
70
    tmp = fieldname(insn, 28, 4); \
11974
70
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
70
    return S; \
11976
752
  case 70: \
11977
752
    tmp = fieldname(insn, 12, 4); \
11978
752
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11979
752
    tmp = fieldname(insn, 0, 4); \
11980
752
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11981
752
    tmp = fieldname(insn, 10, 2); \
11982
752
    MCOperand_CreateImm0(MI, tmp); \
11983
752
    tmp = fieldname(insn, 28, 4); \
11984
752
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11985
752
    return S; \
11986
752
  case 71: \
11987
684
    tmp = fieldname(insn, 12, 4); \
11988
684
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11989
684
    tmp = fieldname(insn, 16, 4); \
11990
684
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
684
    tmp = fieldname(insn, 0, 4); \
11992
684
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11993
684
    tmp = fieldname(insn, 10, 2); \
11994
684
    MCOperand_CreateImm0(MI, tmp); \
11995
684
    tmp = fieldname(insn, 28, 4); \
11996
684
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11997
684
    return S; \
11998
2.59k
  case 72: \
11999
2.59k
    if (!Check(&S, DecodeSTRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12000
2.59k
    return S; \
12001
2.59k
  case 73: \
12002
1.62k
    if (!Check(&S, DecodeLDRPreReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12003
1.62k
    return S; \
12004
1.62k
  case 74: \
12005
546
    tmp = fieldname(insn, 12, 4); \
12006
546
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12007
546
    tmp = fieldname(insn, 16, 5); \
12008
546
    MCOperand_CreateImm0(MI, tmp); \
12009
546
    tmp = fieldname(insn, 0, 4); \
12010
546
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12011
546
    tmp = 0; \
12012
546
    tmp |= fieldname(insn, 6, 1) << 5; \
12013
546
    tmp |= fieldname(insn, 7, 5) << 0; \
12014
546
    MCOperand_CreateImm0(MI, tmp); \
12015
546
    tmp = fieldname(insn, 28, 4); \
12016
546
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12017
546
    return S; \
12018
1.11k
  case 75: \
12019
1.11k
    tmp = fieldname(insn, 12, 4); \
12020
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12021
1.11k
    tmp = fieldname(insn, 16, 4); \
12022
1.11k
    MCOperand_CreateImm0(MI, tmp); \
12023
1.11k
    tmp = fieldname(insn, 0, 4); \
12024
1.11k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12025
1.11k
    tmp = fieldname(insn, 28, 4); \
12026
1.11k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12027
1.11k
    return S; \
12028
1.11k
  case 76: \
12029
365
    tmp = fieldname(insn, 12, 4); \
12030
365
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12031
365
    tmp = fieldname(insn, 0, 4); \
12032
365
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12033
365
    tmp = fieldname(insn, 7, 5); \
12034
365
    MCOperand_CreateImm0(MI, tmp); \
12035
365
    tmp = fieldname(insn, 16, 5); \
12036
365
    MCOperand_CreateImm0(MI, tmp); \
12037
365
    tmp = fieldname(insn, 28, 4); \
12038
365
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12039
365
    return S; \
12040
1.21k
  case 77: \
12041
1.21k
    tmp = fieldname(insn, 12, 4); \
12042
1.21k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12043
1.21k
    tmp = 0; \
12044
1.21k
    tmp |= fieldname(insn, 0, 4) << 0; \
12045
1.21k
    tmp |= fieldname(insn, 5, 7) << 5; \
12046
1.21k
    tmp |= fieldname(insn, 16, 4) << 13; \
12047
1.21k
    tmp |= fieldname(insn, 23, 1) << 12; \
12048
1.21k
    if (!Check(&S, DecodeSORegMemOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12049
1.21k
    tmp = fieldname(insn, 28, 4); \
12050
1.21k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12051
1.21k
    return S; \
12052
1.21k
  case 78: \
12053
855
    tmp = fieldname(insn, 12, 4); \
12054
855
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12055
855
    tmp = fieldname(insn, 12, 4); \
12056
855
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12057
855
    tmp = 0; \
12058
855
    tmp |= fieldname(insn, 7, 5) << 0; \
12059
855
    tmp |= fieldname(insn, 16, 5) << 5; \
12060
855
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12061
855
    tmp = fieldname(insn, 28, 4); \
12062
855
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12063
855
    return S; \
12064
855
  case 79: \
12065
733
    tmp = fieldname(insn, 12, 4); \
12066
733
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12067
733
    tmp = fieldname(insn, 12, 4); \
12068
733
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12069
733
    tmp = fieldname(insn, 0, 4); \
12070
733
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12071
733
    tmp = 0; \
12072
733
    tmp |= fieldname(insn, 7, 5) << 0; \
12073
733
    tmp |= fieldname(insn, 16, 5) << 5; \
12074
733
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12075
733
    tmp = fieldname(insn, 28, 4); \
12076
733
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12077
733
    return S; \
12078
2.30k
  case 80: \
12079
2.30k
    tmp = fieldname(insn, 16, 4); \
12080
2.30k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12081
2.30k
    tmp = fieldname(insn, 28, 4); \
12082
2.30k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12083
2.30k
    tmp = fieldname(insn, 0, 16); \
12084
2.30k
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12085
2.30k
    return S; \
12086
2.30k
  case 81: \
12087
401
    tmp = fieldname(insn, 16, 4); \
12088
401
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12089
401
    return S; \
12090
5.36k
  case 82: \
12091
5.36k
    if (!Check(&S, DecodeMemMultipleWritebackInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12092
5.36k
    return S; \
12093
5.36k
  case 83: \
12094
260
    tmp = fieldname(insn, 0, 5); \
12095
260
    MCOperand_CreateImm0(MI, tmp); \
12096
260
    return S; \
12097
6.64k
  case 84: \
12098
6.64k
    if (!Check(&S, DecodeBranchImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12099
6.64k
    return S; \
12100
6.64k
  case 85: \
12101
0
    tmp = 0; \
12102
0
    tmp |= fieldname(insn, 0, 24) << 1; \
12103
0
    tmp |= fieldname(insn, 24, 1) << 0; \
12104
0
    MCOperand_CreateImm0(MI, tmp); \
12105
0
    return S; \
12106
6.64k
  case 86: \
12107
959
    if (!Check(&S, DecoderForMRRC2AndMCRR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12108
959
    return S; \
12109
1.22k
  case 87: \
12110
1.22k
    tmp = fieldname(insn, 8, 4); \
12111
1.22k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12112
1.22k
    tmp = fieldname(insn, 4, 4); \
12113
833
    MCOperand_CreateImm0(MI, tmp); \
12114
833
    tmp = fieldname(insn, 12, 4); \
12115
833
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12116
833
    tmp = fieldname(insn, 16, 4); \
12117
833
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12118
833
    tmp = fieldname(insn, 0, 4); \
12119
833
    MCOperand_CreateImm0(MI, tmp); \
12120
833
    tmp = fieldname(insn, 28, 4); \
12121
833
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12122
833
    return S; \
12123
1.40k
  case 88: \
12124
1.40k
    tmp = fieldname(insn, 12, 4); \
12125
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12126
1.40k
    tmp = fieldname(insn, 16, 4); \
12127
1.40k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12128
1.40k
    tmp = fieldname(insn, 8, 4); \
12129
1.40k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12130
1.40k
    tmp = fieldname(insn, 4, 4); \
12131
384
    MCOperand_CreateImm0(MI, tmp); \
12132
384
    tmp = fieldname(insn, 0, 4); \
12133
384
    MCOperand_CreateImm0(MI, tmp); \
12134
384
    tmp = fieldname(insn, 28, 4); \
12135
384
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12136
384
    return S; \
12137
5.71k
  case 89: \
12138
5.71k
    tmp = fieldname(insn, 0, 24); \
12139
5.71k
    MCOperand_CreateImm0(MI, tmp); \
12140
5.71k
    tmp = fieldname(insn, 28, 4); \
12141
5.71k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12142
5.71k
    return S; \
12143
22.9k
  case 90: \
12144
22.9k
    if (!Check(&S, DecodeCopMemInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12145
22.9k
    return S; \
12146
22.9k
  case 91: \
12147
3.01k
    tmp = fieldname(insn, 8, 4); \
12148
3.01k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12149
3.01k
    tmp = fieldname(insn, 20, 4); \
12150
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12151
3.01k
    tmp = fieldname(insn, 12, 4); \
12152
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12153
3.01k
    tmp = fieldname(insn, 16, 4); \
12154
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12155
3.01k
    tmp = fieldname(insn, 0, 4); \
12156
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12157
3.01k
    tmp = fieldname(insn, 5, 3); \
12158
3.01k
    MCOperand_CreateImm0(MI, tmp); \
12159
3.01k
    return S; \
12160
3.01k
  case 92: \
12161
1.94k
    tmp = fieldname(insn, 8, 4); \
12162
1.94k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12163
1.94k
    tmp = fieldname(insn, 20, 4); \
12164
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12165
1.94k
    tmp = fieldname(insn, 12, 4); \
12166
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12167
1.94k
    tmp = fieldname(insn, 16, 4); \
12168
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12169
1.94k
    tmp = fieldname(insn, 0, 4); \
12170
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12171
1.94k
    tmp = fieldname(insn, 5, 3); \
12172
1.94k
    MCOperand_CreateImm0(MI, tmp); \
12173
1.94k
    tmp = fieldname(insn, 28, 4); \
12174
1.94k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12175
1.94k
    return S; \
12176
1.94k
  case 93: \
12177
1.65k
    tmp = fieldname(insn, 8, 4); \
12178
1.65k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12179
1.65k
    tmp = fieldname(insn, 21, 3); \
12180
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12181
1.64k
    tmp = fieldname(insn, 12, 4); \
12182
1.64k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12183
1.64k
    tmp = fieldname(insn, 16, 4); \
12184
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12185
1.64k
    tmp = fieldname(insn, 0, 4); \
12186
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12187
1.64k
    tmp = fieldname(insn, 5, 3); \
12188
1.64k
    MCOperand_CreateImm0(MI, tmp); \
12189
1.64k
    return S; \
12190
1.64k
  case 94: \
12191
762
    tmp = fieldname(insn, 8, 4); \
12192
762
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12193
762
    tmp = fieldname(insn, 21, 3); \
12194
759
    MCOperand_CreateImm0(MI, tmp); \
12195
759
    tmp = fieldname(insn, 12, 4); \
12196
759
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12197
759
    tmp = fieldname(insn, 16, 4); \
12198
759
    MCOperand_CreateImm0(MI, tmp); \
12199
759
    tmp = fieldname(insn, 0, 4); \
12200
759
    MCOperand_CreateImm0(MI, tmp); \
12201
759
    tmp = fieldname(insn, 5, 3); \
12202
759
    MCOperand_CreateImm0(MI, tmp); \
12203
759
    tmp = fieldname(insn, 28, 4); \
12204
759
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12205
759
    return S; \
12206
1.93k
  case 95: \
12207
1.93k
    tmp = fieldname(insn, 12, 4); \
12208
1.93k
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12209
1.93k
    tmp = fieldname(insn, 8, 4); \
12210
1.93k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12211
1.93k
    tmp = fieldname(insn, 21, 3); \
12212
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12213
1.92k
    tmp = fieldname(insn, 16, 4); \
12214
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12215
1.92k
    tmp = fieldname(insn, 0, 4); \
12216
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12217
1.92k
    tmp = fieldname(insn, 5, 3); \
12218
1.92k
    MCOperand_CreateImm0(MI, tmp); \
12219
1.92k
    return S; \
12220
1.93k
  case 96: \
12221
1.10k
    tmp = fieldname(insn, 12, 4); \
12222
1.10k
    if (!Check(&S, DecodeGPRwithAPSRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12223
1.10k
    tmp = fieldname(insn, 8, 4); \
12224
1.10k
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12225
1.10k
    tmp = fieldname(insn, 21, 3); \
12226
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12227
1.09k
    tmp = fieldname(insn, 16, 4); \
12228
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12229
1.09k
    tmp = fieldname(insn, 0, 4); \
12230
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12231
1.09k
    tmp = fieldname(insn, 5, 3); \
12232
1.09k
    MCOperand_CreateImm0(MI, tmp); \
12233
1.09k
    tmp = fieldname(insn, 28, 4); \
12234
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12235
1.09k
    return S; \
12236
2.55k
  case 97: \
12237
2.55k
    tmp = 0; \
12238
2.55k
    tmp |= fieldname(insn, 12, 4) << 0; \
12239
2.55k
    tmp |= fieldname(insn, 22, 1) << 4; \
12240
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12241
2.55k
    tmp = 0; \
12242
2.55k
    tmp |= fieldname(insn, 7, 1) << 4; \
12243
2.55k
    tmp |= fieldname(insn, 16, 4) << 0; \
12244
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12245
2.55k
    tmp = 0; \
12246
2.55k
    tmp |= fieldname(insn, 0, 4) << 0; \
12247
2.55k
    tmp |= fieldname(insn, 5, 1) << 4; \
12248
2.55k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12249
2.55k
    return S; \
12250
2.55k
  case 98: \
12251
297
    tmp = 0; \
12252
297
    tmp |= fieldname(insn, 12, 4) << 0; \
12253
297
    tmp |= fieldname(insn, 22, 1) << 4; \
12254
297
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12255
297
    tmp = 0; \
12256
279
    tmp |= fieldname(insn, 7, 1) << 4; \
12257
279
    tmp |= fieldname(insn, 16, 4) << 0; \
12258
279
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12259
279
    tmp = 0; \
12260
276
    tmp |= fieldname(insn, 0, 4) << 0; \
12261
276
    tmp |= fieldname(insn, 5, 1) << 4; \
12262
276
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12263
276
    return S; \
12264
663
  case 99: \
12265
663
    tmp = 0; \
12266
663
    tmp |= fieldname(insn, 12, 4) << 0; \
12267
663
    tmp |= fieldname(insn, 22, 1) << 4; \
12268
663
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12269
663
    tmp = 0; \
12270
660
    tmp |= fieldname(insn, 7, 1) << 4; \
12271
660
    tmp |= fieldname(insn, 16, 4) << 0; \
12272
660
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12273
660
    tmp = 0; \
12274
660
    tmp |= fieldname(insn, 0, 4) << 0; \
12275
660
    tmp |= fieldname(insn, 5, 1) << 4; \
12276
660
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12277
660
    return S; \
12278
660
  case 100: \
12279
267
    tmp = 0; \
12280
267
    tmp |= fieldname(insn, 12, 4) << 0; \
12281
267
    tmp |= fieldname(insn, 22, 1) << 4; \
12282
267
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12283
267
    tmp = 0; \
12284
260
    tmp |= fieldname(insn, 7, 1) << 4; \
12285
260
    tmp |= fieldname(insn, 16, 4) << 0; \
12286
260
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12287
260
    tmp = 0; \
12288
259
    tmp |= fieldname(insn, 0, 4) << 0; \
12289
259
    tmp |= fieldname(insn, 5, 1) << 4; \
12290
259
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12291
259
    return S; \
12292
445
  case 101: \
12293
445
    tmp = 0; \
12294
445
    tmp |= fieldname(insn, 12, 4) << 0; \
12295
445
    tmp |= fieldname(insn, 22, 1) << 4; \
12296
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12297
445
    tmp = 0; \
12298
445
    tmp |= fieldname(insn, 0, 4) << 0; \
12299
445
    tmp |= fieldname(insn, 5, 1) << 4; \
12300
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12301
445
    tmp = 0; \
12302
445
    tmp |= fieldname(insn, 7, 1) << 4; \
12303
445
    tmp |= fieldname(insn, 16, 4) << 0; \
12304
445
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12305
445
    return S; \
12306
445
  case 102: \
12307
242
    tmp = 0; \
12308
242
    tmp |= fieldname(insn, 12, 4) << 0; \
12309
242
    tmp |= fieldname(insn, 22, 1) << 4; \
12310
242
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12311
242
    tmp = 0; \
12312
241
    tmp |= fieldname(insn, 0, 4) << 0; \
12313
241
    tmp |= fieldname(insn, 5, 1) << 4; \
12314
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12315
241
    tmp = 0; \
12316
238
    tmp |= fieldname(insn, 7, 1) << 4; \
12317
238
    tmp |= fieldname(insn, 16, 4) << 0; \
12318
238
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12319
238
    return S; \
12320
238
  case 103: \
12321
87
    tmp = 0; \
12322
87
    tmp |= fieldname(insn, 12, 4) << 0; \
12323
87
    tmp |= fieldname(insn, 22, 1) << 4; \
12324
87
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12325
87
    tmp = 0; \
12326
87
    tmp |= fieldname(insn, 7, 1) << 4; \
12327
87
    tmp |= fieldname(insn, 16, 4) << 0; \
12328
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12329
87
    tmp = 0; \
12330
85
    tmp |= fieldname(insn, 0, 4) << 0; \
12331
85
    tmp |= fieldname(insn, 5, 1) << 4; \
12332
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12333
85
    return S; \
12334
289
  case 104: \
12335
289
    tmp = 0; \
12336
289
    tmp |= fieldname(insn, 12, 4) << 0; \
12337
289
    tmp |= fieldname(insn, 22, 1) << 4; \
12338
289
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12339
289
    tmp = 0; \
12340
286
    tmp |= fieldname(insn, 12, 4) << 0; \
12341
286
    tmp |= fieldname(insn, 22, 1) << 4; \
12342
286
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12343
286
    tmp = 0; \
12344
286
    tmp |= fieldname(insn, 7, 1) << 4; \
12345
286
    tmp |= fieldname(insn, 16, 4) << 0; \
12346
286
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12347
286
    tmp = 0; \
12348
286
    tmp |= fieldname(insn, 0, 4) << 0; \
12349
286
    tmp |= fieldname(insn, 5, 1) << 4; \
12350
286
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12351
286
    return S; \
12352
322
  case 105: \
12353
322
    tmp = 0; \
12354
322
    tmp |= fieldname(insn, 12, 4) << 0; \
12355
322
    tmp |= fieldname(insn, 22, 1) << 4; \
12356
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12357
322
    tmp = 0; \
12358
322
    tmp |= fieldname(insn, 12, 4) << 0; \
12359
322
    tmp |= fieldname(insn, 22, 1) << 4; \
12360
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12361
322
    tmp = 0; \
12362
322
    tmp |= fieldname(insn, 7, 1) << 4; \
12363
322
    tmp |= fieldname(insn, 16, 4) << 0; \
12364
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12365
322
    tmp = 0; \
12366
322
    tmp |= fieldname(insn, 0, 4) << 0; \
12367
322
    tmp |= fieldname(insn, 5, 1) << 4; \
12368
322
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12369
322
    return S; \
12370
1.15k
  case 106: \
12371
1.15k
    tmp = 0; \
12372
1.15k
    tmp |= fieldname(insn, 12, 4) << 0; \
12373
1.15k
    tmp |= fieldname(insn, 22, 1) << 4; \
12374
1.15k
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12375
1.15k
    tmp = 0; \
12376
954
    tmp |= fieldname(insn, 12, 4) << 0; \
12377
954
    tmp |= fieldname(insn, 22, 1) << 4; \
12378
954
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12379
954
    tmp = 0; \
12380
954
    tmp |= fieldname(insn, 7, 1) << 4; \
12381
954
    tmp |= fieldname(insn, 16, 4) << 0; \
12382
954
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12383
954
    tmp = 0; \
12384
736
    tmp |= fieldname(insn, 0, 4) << 0; \
12385
736
    tmp |= fieldname(insn, 5, 1) << 4; \
12386
736
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12387
736
    return S; \
12388
736
  case 107: \
12389
379
    tmp = 0; \
12390
379
    tmp |= fieldname(insn, 12, 4) << 0; \
12391
379
    tmp |= fieldname(insn, 22, 1) << 4; \
12392
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12393
379
    tmp = 0; \
12394
379
    tmp |= fieldname(insn, 12, 4) << 0; \
12395
379
    tmp |= fieldname(insn, 22, 1) << 4; \
12396
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12397
379
    tmp = 0; \
12398
379
    tmp |= fieldname(insn, 7, 1) << 4; \
12399
379
    tmp |= fieldname(insn, 16, 4) << 0; \
12400
379
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12401
379
    tmp = fieldname(insn, 0, 3); \
12402
379
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12403
379
    tmp = 0; \
12404
379
    tmp |= fieldname(insn, 3, 1) << 0; \
12405
379
    tmp |= fieldname(insn, 5, 1) << 1; \
12406
379
    MCOperand_CreateImm0(MI, tmp); \
12407
379
    return S; \
12408
379
  case 108: \
12409
198
    tmp = 0; \
12410
198
    tmp |= fieldname(insn, 12, 4) << 0; \
12411
198
    tmp |= fieldname(insn, 22, 1) << 4; \
12412
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12413
198
    tmp = 0; \
12414
197
    tmp |= fieldname(insn, 12, 4) << 0; \
12415
197
    tmp |= fieldname(insn, 22, 1) << 4; \
12416
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12417
197
    tmp = 0; \
12418
197
    tmp |= fieldname(insn, 7, 1) << 4; \
12419
197
    tmp |= fieldname(insn, 16, 4) << 0; \
12420
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12421
197
    tmp = fieldname(insn, 0, 3); \
12422
196
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12423
196
    tmp = 0; \
12424
196
    tmp |= fieldname(insn, 3, 1) << 0; \
12425
196
    tmp |= fieldname(insn, 5, 1) << 1; \
12426
196
    MCOperand_CreateImm0(MI, tmp); \
12427
196
    return S; \
12428
204
  case 109: \
12429
204
    tmp = 0; \
12430
204
    tmp |= fieldname(insn, 12, 4) << 0; \
12431
204
    tmp |= fieldname(insn, 22, 1) << 4; \
12432
204
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12433
204
    tmp = 0; \
12434
203
    tmp |= fieldname(insn, 12, 4) << 0; \
12435
203
    tmp |= fieldname(insn, 22, 1) << 4; \
12436
203
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12437
203
    tmp = 0; \
12438
203
    tmp |= fieldname(insn, 7, 1) << 4; \
12439
203
    tmp |= fieldname(insn, 16, 4) << 0; \
12440
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12441
203
    tmp = fieldname(insn, 0, 3); \
12442
203
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12443
203
    tmp = 0; \
12444
203
    tmp |= fieldname(insn, 3, 1) << 0; \
12445
203
    tmp |= fieldname(insn, 5, 1) << 1; \
12446
203
    MCOperand_CreateImm0(MI, tmp); \
12447
203
    return S; \
12448
242
  case 110: \
12449
242
    tmp = 0; \
12450
242
    tmp |= fieldname(insn, 12, 4) << 0; \
12451
242
    tmp |= fieldname(insn, 22, 1) << 4; \
12452
242
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12453
242
    tmp = 0; \
12454
242
    tmp |= fieldname(insn, 7, 1) << 4; \
12455
242
    tmp |= fieldname(insn, 16, 4) << 0; \
12456
242
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12457
242
    tmp = fieldname(insn, 0, 3); \
12458
242
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12459
242
    tmp = 0; \
12460
242
    tmp |= fieldname(insn, 3, 1) << 0; \
12461
242
    tmp |= fieldname(insn, 5, 1) << 1; \
12462
242
    MCOperand_CreateImm0(MI, tmp); \
12463
242
    return S; \
12464
614
  case 111: \
12465
614
    tmp = 0; \
12466
614
    tmp |= fieldname(insn, 12, 4) << 0; \
12467
614
    tmp |= fieldname(insn, 22, 1) << 4; \
12468
614
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12469
614
    tmp = 0; \
12470
612
    tmp |= fieldname(insn, 7, 1) << 4; \
12471
612
    tmp |= fieldname(insn, 16, 4) << 0; \
12472
612
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12473
612
    tmp = fieldname(insn, 0, 3); \
12474
611
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12475
611
    tmp = 0; \
12476
611
    tmp |= fieldname(insn, 3, 1) << 0; \
12477
611
    tmp |= fieldname(insn, 5, 1) << 1; \
12478
611
    MCOperand_CreateImm0(MI, tmp); \
12479
611
    return S; \
12480
611
  case 112: \
12481
77
    tmp = 0; \
12482
77
    tmp |= fieldname(insn, 12, 4) << 0; \
12483
77
    tmp |= fieldname(insn, 22, 1) << 4; \
12484
77
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12485
77
    tmp = 0; \
12486
76
    tmp |= fieldname(insn, 7, 1) << 4; \
12487
76
    tmp |= fieldname(insn, 16, 4) << 0; \
12488
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12489
76
    tmp = fieldname(insn, 0, 3); \
12490
76
    if (!Check(&S, DecodeDPR_8RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12491
76
    tmp = 0; \
12492
76
    tmp |= fieldname(insn, 3, 1) << 0; \
12493
76
    tmp |= fieldname(insn, 5, 1) << 1; \
12494
76
    MCOperand_CreateImm0(MI, tmp); \
12495
76
    return S; \
12496
444
  case 113: \
12497
444
    tmp = 0; \
12498
444
    tmp |= fieldname(insn, 12, 4) << 0; \
12499
444
    tmp |= fieldname(insn, 22, 1) << 4; \
12500
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12501
444
    tmp = 0; \
12502
444
    tmp |= fieldname(insn, 12, 4) << 0; \
12503
444
    tmp |= fieldname(insn, 22, 1) << 4; \
12504
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12505
444
    tmp = 0; \
12506
444
    tmp |= fieldname(insn, 7, 1) << 4; \
12507
444
    tmp |= fieldname(insn, 16, 4) << 0; \
12508
444
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12509
444
    tmp = fieldname(insn, 0, 4); \
12510
444
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12511
444
    tmp = fieldname(insn, 5, 1); \
12512
444
    MCOperand_CreateImm0(MI, tmp); \
12513
444
    return S; \
12514
481
  case 114: \
12515
481
    tmp = 0; \
12516
481
    tmp |= fieldname(insn, 12, 4) << 0; \
12517
481
    tmp |= fieldname(insn, 22, 1) << 4; \
12518
481
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12519
481
    tmp = 0; \
12520
413
    tmp |= fieldname(insn, 12, 4) << 0; \
12521
413
    tmp |= fieldname(insn, 22, 1) << 4; \
12522
413
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12523
413
    tmp = 0; \
12524
413
    tmp |= fieldname(insn, 7, 1) << 4; \
12525
413
    tmp |= fieldname(insn, 16, 4) << 0; \
12526
413
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12527
413
    tmp = fieldname(insn, 0, 4); \
12528
192
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12529
192
    tmp = fieldname(insn, 5, 1); \
12530
192
    MCOperand_CreateImm0(MI, tmp); \
12531
192
    return S; \
12532
361
  case 115: \
12533
361
    tmp = 0; \
12534
361
    tmp |= fieldname(insn, 12, 4) << 0; \
12535
361
    tmp |= fieldname(insn, 22, 1) << 4; \
12536
361
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12537
361
    tmp = 0; \
12538
360
    tmp |= fieldname(insn, 12, 4) << 0; \
12539
360
    tmp |= fieldname(insn, 22, 1) << 4; \
12540
360
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12541
360
    tmp = 0; \
12542
360
    tmp |= fieldname(insn, 7, 1) << 4; \
12543
360
    tmp |= fieldname(insn, 16, 4) << 0; \
12544
360
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12545
360
    tmp = fieldname(insn, 0, 4); \
12546
360
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12547
360
    tmp = fieldname(insn, 5, 1); \
12548
360
    MCOperand_CreateImm0(MI, tmp); \
12549
360
    return S; \
12550
360
  case 116: \
12551
234
    tmp = 0; \
12552
234
    tmp |= fieldname(insn, 12, 4) << 0; \
12553
234
    tmp |= fieldname(insn, 22, 1) << 4; \
12554
234
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12555
234
    tmp = 0; \
12556
234
    tmp |= fieldname(insn, 7, 1) << 4; \
12557
234
    tmp |= fieldname(insn, 16, 4) << 0; \
12558
234
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12559
234
    tmp = fieldname(insn, 0, 4); \
12560
234
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12561
234
    tmp = fieldname(insn, 5, 1); \
12562
234
    MCOperand_CreateImm0(MI, tmp); \
12563
234
    return S; \
12564
234
  case 117: \
12565
218
    tmp = 0; \
12566
218
    tmp |= fieldname(insn, 12, 4) << 0; \
12567
218
    tmp |= fieldname(insn, 22, 1) << 4; \
12568
218
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12569
218
    tmp = 0; \
12570
216
    tmp |= fieldname(insn, 7, 1) << 4; \
12571
216
    tmp |= fieldname(insn, 16, 4) << 0; \
12572
216
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12573
216
    tmp = fieldname(insn, 0, 4); \
12574
215
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12575
215
    tmp = fieldname(insn, 5, 1); \
12576
215
    MCOperand_CreateImm0(MI, tmp); \
12577
215
    return S; \
12578
368
  case 118: \
12579
368
    tmp = 0; \
12580
368
    tmp |= fieldname(insn, 12, 4) << 0; \
12581
368
    tmp |= fieldname(insn, 22, 1) << 4; \
12582
368
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12583
368
    tmp = 0; \
12584
367
    tmp |= fieldname(insn, 7, 1) << 4; \
12585
367
    tmp |= fieldname(insn, 16, 4) << 0; \
12586
367
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12587
367
    tmp = fieldname(insn, 0, 4); \
12588
367
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12589
367
    tmp = fieldname(insn, 5, 1); \
12590
367
    MCOperand_CreateImm0(MI, tmp); \
12591
367
    return S; \
12592
443
  case 119: \
12593
443
    tmp = 0; \
12594
443
    tmp |= fieldname(insn, 12, 4) << 0; \
12595
443
    tmp |= fieldname(insn, 22, 1) << 4; \
12596
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12597
443
    tmp = 0; \
12598
443
    tmp |= fieldname(insn, 7, 1) << 4; \
12599
443
    tmp |= fieldname(insn, 16, 4) << 0; \
12600
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12601
443
    tmp = 0; \
12602
443
    tmp |= fieldname(insn, 0, 4) << 0; \
12603
443
    tmp |= fieldname(insn, 5, 1) << 4; \
12604
443
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12605
443
    tmp = fieldname(insn, 10, 1); \
12606
443
    MCOperand_CreateImm0(MI, tmp); \
12607
443
    return S; \
12608
443
  case 120: \
12609
378
    tmp = 0; \
12610
378
    tmp |= fieldname(insn, 12, 4) << 0; \
12611
378
    tmp |= fieldname(insn, 22, 1) << 4; \
12612
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12613
378
    tmp = 0; \
12614
378
    tmp |= fieldname(insn, 7, 1) << 4; \
12615
378
    tmp |= fieldname(insn, 16, 4) << 0; \
12616
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12617
378
    tmp = 0; \
12618
378
    tmp |= fieldname(insn, 0, 4) << 0; \
12619
378
    tmp |= fieldname(insn, 5, 1) << 4; \
12620
378
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12621
378
    tmp = fieldname(insn, 9, 2); \
12622
378
    MCOperand_CreateImm0(MI, tmp); \
12623
378
    return S; \
12624
378
  case 121: \
12625
211
    tmp = 0; \
12626
211
    tmp |= fieldname(insn, 12, 4) << 0; \
12627
211
    tmp |= fieldname(insn, 22, 1) << 4; \
12628
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12629
211
    tmp = 0; \
12630
211
    tmp |= fieldname(insn, 7, 1) << 4; \
12631
211
    tmp |= fieldname(insn, 16, 4) << 0; \
12632
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12633
211
    tmp = 0; \
12634
211
    tmp |= fieldname(insn, 0, 4) << 0; \
12635
211
    tmp |= fieldname(insn, 5, 1) << 4; \
12636
211
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12637
211
    tmp = fieldname(insn, 8, 3); \
12638
211
    MCOperand_CreateImm0(MI, tmp); \
12639
211
    return S; \
12640
211
  case 122: \
12641
87
    tmp = 0; \
12642
87
    tmp |= fieldname(insn, 12, 4) << 0; \
12643
87
    tmp |= fieldname(insn, 22, 1) << 4; \
12644
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12645
87
    tmp = 0; \
12646
86
    tmp |= fieldname(insn, 7, 1) << 4; \
12647
86
    tmp |= fieldname(insn, 16, 4) << 0; \
12648
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12649
86
    tmp = 0; \
12650
85
    tmp |= fieldname(insn, 0, 4) << 0; \
12651
85
    tmp |= fieldname(insn, 5, 1) << 4; \
12652
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12653
85
    tmp = fieldname(insn, 11, 1); \
12654
84
    MCOperand_CreateImm0(MI, tmp); \
12655
84
    return S; \
12656
86
  case 123: \
12657
86
    tmp = 0; \
12658
86
    tmp |= fieldname(insn, 12, 4) << 0; \
12659
86
    tmp |= fieldname(insn, 22, 1) << 4; \
12660
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12661
86
    tmp = 0; \
12662
85
    tmp |= fieldname(insn, 7, 1) << 4; \
12663
85
    tmp |= fieldname(insn, 16, 4) << 0; \
12664
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12665
85
    tmp = 0; \
12666
84
    tmp |= fieldname(insn, 0, 4) << 0; \
12667
84
    tmp |= fieldname(insn, 5, 1) << 4; \
12668
84
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12669
84
    tmp = fieldname(insn, 10, 2); \
12670
82
    MCOperand_CreateImm0(MI, tmp); \
12671
82
    return S; \
12672
117
  case 124: \
12673
117
    tmp = 0; \
12674
117
    tmp |= fieldname(insn, 12, 4) << 0; \
12675
117
    tmp |= fieldname(insn, 22, 1) << 4; \
12676
117
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12677
117
    tmp = 0; \
12678
116
    tmp |= fieldname(insn, 7, 1) << 4; \
12679
116
    tmp |= fieldname(insn, 16, 4) << 0; \
12680
116
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12681
116
    tmp = 0; \
12682
115
    tmp |= fieldname(insn, 0, 4) << 0; \
12683
115
    tmp |= fieldname(insn, 5, 1) << 4; \
12684
115
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12685
115
    tmp = fieldname(insn, 9, 3); \
12686
114
    MCOperand_CreateImm0(MI, tmp); \
12687
114
    return S; \
12688
115
  case 125: \
12689
73
    tmp = 0; \
12690
73
    tmp |= fieldname(insn, 12, 4) << 0; \
12691
73
    tmp |= fieldname(insn, 22, 1) << 4; \
12692
73
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12693
73
    tmp = 0; \
12694
72
    tmp |= fieldname(insn, 7, 1) << 4; \
12695
72
    tmp |= fieldname(insn, 16, 4) << 0; \
12696
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12697
72
    tmp = 0; \
12698
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12699
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12700
71
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12701
71
    tmp = fieldname(insn, 8, 4); \
12702
70
    MCOperand_CreateImm0(MI, tmp); \
12703
70
    return S; \
12704
1.03k
  case 126: \
12705
1.03k
    tmp = 0; \
12706
1.03k
    tmp |= fieldname(insn, 12, 4) << 0; \
12707
1.03k
    tmp |= fieldname(insn, 22, 1) << 4; \
12708
1.03k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12709
1.03k
    tmp = 0; \
12710
1.03k
    tmp |= fieldname(insn, 0, 4) << 0; \
12711
1.03k
    tmp |= fieldname(insn, 5, 1) << 4; \
12712
1.03k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12713
1.03k
    return S; \
12714
1.03k
  case 127: \
12715
644
    tmp = 0; \
12716
644
    tmp |= fieldname(insn, 12, 4) << 0; \
12717
644
    tmp |= fieldname(insn, 22, 1) << 4; \
12718
644
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12719
644
    tmp = 0; \
12720
643
    tmp |= fieldname(insn, 0, 4) << 0; \
12721
643
    tmp |= fieldname(insn, 5, 1) << 4; \
12722
643
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12723
643
    return S; \
12724
643
  case 128: \
12725
71
    tmp = 0; \
12726
71
    tmp |= fieldname(insn, 12, 4) << 0; \
12727
71
    tmp |= fieldname(insn, 22, 1) << 4; \
12728
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12729
71
    tmp = 0; \
12730
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12731
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12732
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12733
71
    tmp = 0; \
12734
71
    tmp |= fieldname(insn, 12, 4) << 0; \
12735
71
    tmp |= fieldname(insn, 22, 1) << 4; \
12736
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12737
71
    tmp = 0; \
12738
71
    tmp |= fieldname(insn, 0, 4) << 0; \
12739
71
    tmp |= fieldname(insn, 5, 1) << 4; \
12740
71
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12741
71
    return S; \
12742
71
  case 129: \
12743
68
    tmp = 0; \
12744
68
    tmp |= fieldname(insn, 12, 4) << 0; \
12745
68
    tmp |= fieldname(insn, 22, 1) << 4; \
12746
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12747
68
    tmp = 0; \
12748
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12749
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12750
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12751
67
    tmp = 0; \
12752
66
    tmp |= fieldname(insn, 12, 4) << 0; \
12753
66
    tmp |= fieldname(insn, 22, 1) << 4; \
12754
66
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12755
66
    tmp = 0; \
12756
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12757
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12758
66
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12759
66
    return S; \
12760
384
  case 130: \
12761
384
    tmp = 0; \
12762
384
    tmp |= fieldname(insn, 12, 4) << 0; \
12763
384
    tmp |= fieldname(insn, 22, 1) << 4; \
12764
384
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12765
384
    tmp = 0; \
12766
384
    tmp |= fieldname(insn, 0, 4) << 0; \
12767
384
    tmp |= fieldname(insn, 5, 1) << 4; \
12768
384
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12769
384
    return S; \
12770
384
  case 131: \
12771
209
    if (!Check(&S, DecodeVSHLMaxInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12772
209
    return S; \
12773
209
  case 132: \
12774
67
    tmp = 0; \
12775
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12776
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12777
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12778
67
    tmp = 0; \
12779
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12780
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12781
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12782
67
    tmp = 0; \
12783
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12784
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12785
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12786
67
    return S; \
12787
73
  case 133: \
12788
73
    tmp = 0; \
12789
73
    tmp |= fieldname(insn, 12, 4) << 0; \
12790
73
    tmp |= fieldname(insn, 22, 1) << 4; \
12791
73
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12792
73
    tmp = 0; \
12793
72
    tmp |= fieldname(insn, 12, 4) << 0; \
12794
72
    tmp |= fieldname(insn, 22, 1) << 4; \
12795
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12796
72
    tmp = 0; \
12797
72
    tmp |= fieldname(insn, 0, 4) << 0; \
12798
72
    tmp |= fieldname(insn, 5, 1) << 4; \
12799
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12800
72
    return S; \
12801
72
  case 134: \
12802
70
    tmp = 0; \
12803
70
    tmp |= fieldname(insn, 12, 4) << 0; \
12804
70
    tmp |= fieldname(insn, 22, 1) << 4; \
12805
70
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12806
70
    tmp = 0; \
12807
69
    tmp |= fieldname(insn, 0, 4) << 0; \
12808
69
    tmp |= fieldname(insn, 5, 1) << 4; \
12809
69
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12810
69
    return S; \
12811
1.65k
  case 135: \
12812
1.65k
    if (!Check(&S, DecodeTBLInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
12813
1.65k
    return S; \
12814
1.65k
  case 136: \
12815
66
    tmp = 0; \
12816
66
    tmp |= fieldname(insn, 12, 4) << 0; \
12817
66
    tmp |= fieldname(insn, 22, 1) << 4; \
12818
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12819
66
    tmp = 0; \
12820
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12821
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12822
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12823
66
    tmp = fieldname(insn, 19, 1); \
12824
66
    MCOperand_CreateImm0(MI, tmp); \
12825
66
    return S; \
12826
203
  case 137: \
12827
203
    tmp = 0; \
12828
203
    tmp |= fieldname(insn, 12, 4) << 0; \
12829
203
    tmp |= fieldname(insn, 22, 1) << 4; \
12830
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12831
203
    tmp = 0; \
12832
203
    tmp |= fieldname(insn, 0, 4) << 0; \
12833
203
    tmp |= fieldname(insn, 5, 1) << 4; \
12834
203
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12835
203
    tmp = fieldname(insn, 18, 2); \
12836
203
    MCOperand_CreateImm0(MI, tmp); \
12837
203
    return S; \
12838
203
  case 138: \
12839
77
    tmp = 0; \
12840
77
    tmp |= fieldname(insn, 12, 4) << 0; \
12841
77
    tmp |= fieldname(insn, 22, 1) << 4; \
12842
77
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12843
77
    tmp = 0; \
12844
77
    tmp |= fieldname(insn, 0, 4) << 0; \
12845
77
    tmp |= fieldname(insn, 5, 1) << 4; \
12846
77
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12847
77
    tmp = fieldname(insn, 17, 3); \
12848
77
    MCOperand_CreateImm0(MI, tmp); \
12849
77
    return S; \
12850
239
  case 139: \
12851
239
    tmp = 0; \
12852
239
    tmp |= fieldname(insn, 12, 4) << 0; \
12853
239
    tmp |= fieldname(insn, 22, 1) << 4; \
12854
239
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12855
239
    tmp = 0; \
12856
238
    tmp |= fieldname(insn, 0, 4) << 0; \
12857
238
    tmp |= fieldname(insn, 5, 1) << 4; \
12858
238
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12859
238
    tmp = fieldname(insn, 19, 1); \
12860
238
    MCOperand_CreateImm0(MI, tmp); \
12861
238
    return S; \
12862
238
  case 140: \
12863
67
    tmp = 0; \
12864
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12865
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12866
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12867
67
    tmp = 0; \
12868
66
    tmp |= fieldname(insn, 0, 4) << 0; \
12869
66
    tmp |= fieldname(insn, 5, 1) << 4; \
12870
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12871
66
    tmp = fieldname(insn, 18, 2); \
12872
66
    MCOperand_CreateImm0(MI, tmp); \
12873
66
    return S; \
12874
83
  case 141: \
12875
83
    tmp = 0; \
12876
83
    tmp |= fieldname(insn, 12, 4) << 0; \
12877
83
    tmp |= fieldname(insn, 22, 1) << 4; \
12878
83
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12879
83
    tmp = 0; \
12880
82
    tmp |= fieldname(insn, 0, 4) << 0; \
12881
82
    tmp |= fieldname(insn, 5, 1) << 4; \
12882
82
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12883
82
    tmp = fieldname(insn, 17, 3); \
12884
82
    MCOperand_CreateImm0(MI, tmp); \
12885
82
    return S; \
12886
107
  case 142: \
12887
107
    tmp = 0; \
12888
107
    tmp |= fieldname(insn, 12, 4) << 0; \
12889
107
    tmp |= fieldname(insn, 22, 1) << 4; \
12890
107
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12891
107
    tmp = 0; \
12892
107
    tmp |= fieldname(insn, 0, 4) << 0; \
12893
107
    tmp |= fieldname(insn, 5, 1) << 4; \
12894
107
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12895
107
    tmp = fieldname(insn, 16, 3); \
12896
107
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12897
107
    return S; \
12898
129
  case 143: \
12899
129
    tmp = 0; \
12900
129
    tmp |= fieldname(insn, 12, 4) << 0; \
12901
129
    tmp |= fieldname(insn, 22, 1) << 4; \
12902
129
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12903
129
    tmp = 0; \
12904
129
    tmp |= fieldname(insn, 0, 4) << 0; \
12905
129
    tmp |= fieldname(insn, 5, 1) << 4; \
12906
129
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12907
129
    tmp = fieldname(insn, 16, 4); \
12908
129
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12909
129
    return S; \
12910
229
  case 144: \
12911
229
    tmp = 0; \
12912
229
    tmp |= fieldname(insn, 12, 4) << 0; \
12913
229
    tmp |= fieldname(insn, 22, 1) << 4; \
12914
229
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12915
229
    tmp = 0; \
12916
229
    tmp |= fieldname(insn, 0, 4) << 0; \
12917
229
    tmp |= fieldname(insn, 5, 1) << 4; \
12918
229
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12919
229
    tmp = fieldname(insn, 16, 5); \
12920
229
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12921
229
    return S; \
12922
229
  case 145: \
12923
104
    tmp = 0; \
12924
104
    tmp |= fieldname(insn, 12, 4) << 0; \
12925
104
    tmp |= fieldname(insn, 22, 1) << 4; \
12926
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12927
104
    tmp = 0; \
12928
104
    tmp |= fieldname(insn, 12, 4) << 0; \
12929
104
    tmp |= fieldname(insn, 22, 1) << 4; \
12930
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12931
104
    tmp = 0; \
12932
104
    tmp |= fieldname(insn, 0, 4) << 0; \
12933
104
    tmp |= fieldname(insn, 5, 1) << 4; \
12934
104
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12935
104
    tmp = fieldname(insn, 16, 3); \
12936
104
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12937
104
    return S; \
12938
312
  case 146: \
12939
312
    tmp = 0; \
12940
312
    tmp |= fieldname(insn, 12, 4) << 0; \
12941
312
    tmp |= fieldname(insn, 22, 1) << 4; \
12942
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12943
312
    tmp = 0; \
12944
312
    tmp |= fieldname(insn, 12, 4) << 0; \
12945
312
    tmp |= fieldname(insn, 22, 1) << 4; \
12946
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12947
312
    tmp = 0; \
12948
312
    tmp |= fieldname(insn, 0, 4) << 0; \
12949
312
    tmp |= fieldname(insn, 5, 1) << 4; \
12950
312
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12951
312
    tmp = fieldname(insn, 16, 4); \
12952
312
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12953
312
    return S; \
12954
370
  case 147: \
12955
370
    tmp = 0; \
12956
370
    tmp |= fieldname(insn, 12, 4) << 0; \
12957
370
    tmp |= fieldname(insn, 22, 1) << 4; \
12958
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12959
370
    tmp = 0; \
12960
370
    tmp |= fieldname(insn, 12, 4) << 0; \
12961
370
    tmp |= fieldname(insn, 22, 1) << 4; \
12962
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12963
370
    tmp = 0; \
12964
370
    tmp |= fieldname(insn, 0, 4) << 0; \
12965
370
    tmp |= fieldname(insn, 5, 1) << 4; \
12966
370
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12967
370
    tmp = fieldname(insn, 16, 5); \
12968
370
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12969
370
    return S; \
12970
370
  case 148: \
12971
239
    tmp = 0; \
12972
239
    tmp |= fieldname(insn, 12, 4) << 0; \
12973
239
    tmp |= fieldname(insn, 22, 1) << 4; \
12974
239
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12975
239
    tmp = 0; \
12976
239
    tmp |= fieldname(insn, 0, 4) << 0; \
12977
239
    tmp |= fieldname(insn, 5, 1) << 4; \
12978
239
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12979
239
    tmp = fieldname(insn, 16, 3); \
12980
239
    MCOperand_CreateImm0(MI, tmp); \
12981
239
    return S; \
12982
239
  case 149: \
12983
67
    tmp = 0; \
12984
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12985
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12986
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12987
67
    tmp = 0; \
12988
67
    tmp |= fieldname(insn, 12, 4) << 0; \
12989
67
    tmp |= fieldname(insn, 22, 1) << 4; \
12990
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12991
67
    tmp = 0; \
12992
67
    tmp |= fieldname(insn, 0, 4) << 0; \
12993
67
    tmp |= fieldname(insn, 5, 1) << 4; \
12994
67
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
12995
67
    tmp = fieldname(insn, 16, 3); \
12996
67
    MCOperand_CreateImm0(MI, tmp); \
12997
67
    return S; \
12998
86
  case 150: \
12999
86
    tmp = 0; \
13000
86
    tmp |= fieldname(insn, 12, 4) << 0; \
13001
86
    tmp |= fieldname(insn, 22, 1) << 4; \
13002
86
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13003
86
    tmp = 0; \
13004
86
    tmp |= fieldname(insn, 0, 4) << 0; \
13005
86
    tmp |= fieldname(insn, 5, 1) << 4; \
13006
86
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13007
86
    tmp = fieldname(insn, 16, 4); \
13008
86
    MCOperand_CreateImm0(MI, tmp); \
13009
86
    return S; \
13010
86
  case 151: \
13011
76
    tmp = 0; \
13012
76
    tmp |= fieldname(insn, 12, 4) << 0; \
13013
76
    tmp |= fieldname(insn, 22, 1) << 4; \
13014
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13015
76
    tmp = 0; \
13016
76
    tmp |= fieldname(insn, 12, 4) << 0; \
13017
76
    tmp |= fieldname(insn, 22, 1) << 4; \
13018
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13019
76
    tmp = 0; \
13020
76
    tmp |= fieldname(insn, 0, 4) << 0; \
13021
76
    tmp |= fieldname(insn, 5, 1) << 4; \
13022
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13023
76
    tmp = fieldname(insn, 16, 4); \
13024
76
    MCOperand_CreateImm0(MI, tmp); \
13025
76
    return S; \
13026
352
  case 152: \
13027
352
    tmp = 0; \
13028
352
    tmp |= fieldname(insn, 12, 4) << 0; \
13029
352
    tmp |= fieldname(insn, 22, 1) << 4; \
13030
352
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13031
352
    tmp = 0; \
13032
352
    tmp |= fieldname(insn, 0, 4) << 0; \
13033
352
    tmp |= fieldname(insn, 5, 1) << 4; \
13034
352
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13035
352
    tmp = fieldname(insn, 16, 5); \
13036
352
    MCOperand_CreateImm0(MI, tmp); \
13037
352
    return S; \
13038
393
  case 153: \
13039
393
    tmp = 0; \
13040
393
    tmp |= fieldname(insn, 12, 4) << 0; \
13041
393
    tmp |= fieldname(insn, 22, 1) << 4; \
13042
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13043
393
    tmp = 0; \
13044
393
    tmp |= fieldname(insn, 12, 4) << 0; \
13045
393
    tmp |= fieldname(insn, 22, 1) << 4; \
13046
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13047
393
    tmp = 0; \
13048
393
    tmp |= fieldname(insn, 0, 4) << 0; \
13049
393
    tmp |= fieldname(insn, 5, 1) << 4; \
13050
393
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13051
393
    tmp = fieldname(insn, 16, 5); \
13052
393
    MCOperand_CreateImm0(MI, tmp); \
13053
393
    return S; \
13054
393
  case 154: \
13055
99
    tmp = 0; \
13056
99
    tmp |= fieldname(insn, 12, 4) << 0; \
13057
99
    tmp |= fieldname(insn, 22, 1) << 4; \
13058
99
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13059
99
    tmp = 0; \
13060
99
    tmp |= fieldname(insn, 0, 4) << 0; \
13061
99
    tmp |= fieldname(insn, 5, 1) << 4; \
13062
99
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13063
99
    tmp = fieldname(insn, 16, 3); \
13064
97
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13065
97
    return S; \
13066
97
  case 155: \
13067
95
    tmp = 0; \
13068
95
    tmp |= fieldname(insn, 12, 4) << 0; \
13069
95
    tmp |= fieldname(insn, 22, 1) << 4; \
13070
95
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13071
95
    tmp = 0; \
13072
95
    tmp |= fieldname(insn, 0, 4) << 0; \
13073
95
    tmp |= fieldname(insn, 5, 1) << 4; \
13074
95
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13075
95
    tmp = fieldname(insn, 16, 4); \
13076
94
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13077
94
    return S; \
13078
305
  case 156: \
13079
305
    tmp = 0; \
13080
305
    tmp |= fieldname(insn, 12, 4) << 0; \
13081
305
    tmp |= fieldname(insn, 22, 1) << 4; \
13082
305
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13083
305
    tmp = 0; \
13084
305
    tmp |= fieldname(insn, 0, 4) << 0; \
13085
305
    tmp |= fieldname(insn, 5, 1) << 4; \
13086
305
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13087
305
    tmp = fieldname(insn, 16, 5); \
13088
303
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13089
303
    return S; \
13090
303
  case 157: \
13091
85
    tmp = 0; \
13092
85
    tmp |= fieldname(insn, 12, 4) << 0; \
13093
85
    tmp |= fieldname(insn, 22, 1) << 4; \
13094
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13095
85
    tmp = 0; \
13096
84
    tmp |= fieldname(insn, 0, 4) << 0; \
13097
84
    tmp |= fieldname(insn, 5, 1) << 4; \
13098
84
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13099
84
    tmp = fieldname(insn, 16, 3); \
13100
84
    MCOperand_CreateImm0(MI, tmp); \
13101
84
    return S; \
13102
196
  case 158: \
13103
196
    tmp = 0; \
13104
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13105
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13106
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13107
196
    tmp = 0; \
13108
195
    tmp |= fieldname(insn, 0, 4) << 0; \
13109
195
    tmp |= fieldname(insn, 5, 1) << 4; \
13110
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13111
195
    tmp = fieldname(insn, 16, 4); \
13112
195
    MCOperand_CreateImm0(MI, tmp); \
13113
195
    return S; \
13114
196
  case 159: \
13115
196
    tmp = 0; \
13116
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13117
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13118
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13119
196
    tmp = 0; \
13120
194
    tmp |= fieldname(insn, 0, 4) << 0; \
13121
194
    tmp |= fieldname(insn, 5, 1) << 4; \
13122
194
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13123
194
    tmp = fieldname(insn, 16, 5); \
13124
194
    MCOperand_CreateImm0(MI, tmp); \
13125
194
    return S; \
13126
1.67k
  case 160: \
13127
1.67k
    if (!Check(&S, DecodeVCVTD(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13128
1.67k
    return S; \
13129
2.90k
  case 161: \
13130
2.90k
    if (!Check(&S, DecodeNEONModImmInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13131
2.90k
    return S; \
13132
2.90k
  case 162: \
13133
280
    tmp = 0; \
13134
280
    tmp |= fieldname(insn, 12, 4) << 0; \
13135
280
    tmp |= fieldname(insn, 22, 1) << 4; \
13136
280
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13137
280
    tmp = 0; \
13138
280
    tmp |= fieldname(insn, 0, 4) << 0; \
13139
280
    tmp |= fieldname(insn, 5, 1) << 4; \
13140
280
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13141
280
    tmp = fieldname(insn, 16, 6); \
13142
280
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13143
280
    return S; \
13144
280
  case 163: \
13145
101
    tmp = 0; \
13146
101
    tmp |= fieldname(insn, 12, 4) << 0; \
13147
101
    tmp |= fieldname(insn, 22, 1) << 4; \
13148
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13149
101
    tmp = 0; \
13150
101
    tmp |= fieldname(insn, 12, 4) << 0; \
13151
101
    tmp |= fieldname(insn, 22, 1) << 4; \
13152
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13153
101
    tmp = 0; \
13154
101
    tmp |= fieldname(insn, 0, 4) << 0; \
13155
101
    tmp |= fieldname(insn, 5, 1) << 4; \
13156
101
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13157
101
    tmp = fieldname(insn, 16, 6); \
13158
101
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13159
101
    return S; \
13160
254
  case 164: \
13161
254
    tmp = 0; \
13162
254
    tmp |= fieldname(insn, 12, 4) << 0; \
13163
254
    tmp |= fieldname(insn, 22, 1) << 4; \
13164
254
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13165
254
    tmp = 0; \
13166
254
    tmp |= fieldname(insn, 0, 4) << 0; \
13167
254
    tmp |= fieldname(insn, 5, 1) << 4; \
13168
254
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13169
254
    tmp = fieldname(insn, 16, 6); \
13170
254
    MCOperand_CreateImm0(MI, tmp); \
13171
254
    return S; \
13172
254
  case 165: \
13173
73
    tmp = 0; \
13174
73
    tmp |= fieldname(insn, 12, 4) << 0; \
13175
73
    tmp |= fieldname(insn, 22, 1) << 4; \
13176
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13177
73
    tmp = 0; \
13178
73
    tmp |= fieldname(insn, 12, 4) << 0; \
13179
73
    tmp |= fieldname(insn, 22, 1) << 4; \
13180
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13181
73
    tmp = 0; \
13182
73
    tmp |= fieldname(insn, 0, 4) << 0; \
13183
73
    tmp |= fieldname(insn, 5, 1) << 4; \
13184
73
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13185
73
    tmp = fieldname(insn, 16, 6); \
13186
73
    MCOperand_CreateImm0(MI, tmp); \
13187
73
    return S; \
13188
86
  case 166: \
13189
86
    tmp = 0; \
13190
86
    tmp |= fieldname(insn, 12, 4) << 0; \
13191
86
    tmp |= fieldname(insn, 22, 1) << 4; \
13192
86
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13193
86
    tmp = 0; \
13194
85
    tmp |= fieldname(insn, 0, 4) << 0; \
13195
85
    tmp |= fieldname(insn, 5, 1) << 4; \
13196
85
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13197
85
    tmp = fieldname(insn, 16, 3); \
13198
84
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13199
84
    return S; \
13200
202
  case 167: \
13201
202
    tmp = 0; \
13202
202
    tmp |= fieldname(insn, 12, 4) << 0; \
13203
202
    tmp |= fieldname(insn, 22, 1) << 4; \
13204
202
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13205
202
    tmp = 0; \
13206
200
    tmp |= fieldname(insn, 0, 4) << 0; \
13207
200
    tmp |= fieldname(insn, 5, 1) << 4; \
13208
200
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13209
200
    tmp = fieldname(insn, 16, 4); \
13210
199
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13211
199
    return S; \
13212
235
  case 168: \
13213
235
    tmp = 0; \
13214
235
    tmp |= fieldname(insn, 12, 4) << 0; \
13215
235
    tmp |= fieldname(insn, 22, 1) << 4; \
13216
235
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13217
235
    tmp = 0; \
13218
234
    tmp |= fieldname(insn, 0, 4) << 0; \
13219
234
    tmp |= fieldname(insn, 5, 1) << 4; \
13220
234
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13221
234
    tmp = fieldname(insn, 16, 5); \
13222
232
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13223
232
    return S; \
13224
232
  case 169: \
13225
68
    tmp = 0; \
13226
68
    tmp |= fieldname(insn, 12, 4) << 0; \
13227
68
    tmp |= fieldname(insn, 22, 1) << 4; \
13228
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13229
68
    tmp = 0; \
13230
67
    tmp |= fieldname(insn, 12, 4) << 0; \
13231
67
    tmp |= fieldname(insn, 22, 1) << 4; \
13232
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13233
67
    tmp = 0; \
13234
67
    tmp |= fieldname(insn, 0, 4) << 0; \
13235
67
    tmp |= fieldname(insn, 5, 1) << 4; \
13236
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13237
67
    tmp = fieldname(insn, 16, 3); \
13238
66
    if (!Check(&S, DecodeShiftRight8Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13239
66
    return S; \
13240
430
  case 170: \
13241
430
    tmp = 0; \
13242
430
    tmp |= fieldname(insn, 12, 4) << 0; \
13243
430
    tmp |= fieldname(insn, 22, 1) << 4; \
13244
430
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13245
430
    tmp = 0; \
13246
429
    tmp |= fieldname(insn, 12, 4) << 0; \
13247
429
    tmp |= fieldname(insn, 22, 1) << 4; \
13248
429
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13249
429
    tmp = 0; \
13250
429
    tmp |= fieldname(insn, 0, 4) << 0; \
13251
429
    tmp |= fieldname(insn, 5, 1) << 4; \
13252
429
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13253
429
    tmp = fieldname(insn, 16, 4); \
13254
428
    if (!Check(&S, DecodeShiftRight16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13255
428
    return S; \
13256
428
  case 171: \
13257
114
    tmp = 0; \
13258
114
    tmp |= fieldname(insn, 12, 4) << 0; \
13259
114
    tmp |= fieldname(insn, 22, 1) << 4; \
13260
114
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13261
114
    tmp = 0; \
13262
112
    tmp |= fieldname(insn, 12, 4) << 0; \
13263
112
    tmp |= fieldname(insn, 22, 1) << 4; \
13264
112
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13265
112
    tmp = 0; \
13266
112
    tmp |= fieldname(insn, 0, 4) << 0; \
13267
112
    tmp |= fieldname(insn, 5, 1) << 4; \
13268
112
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13269
112
    tmp = fieldname(insn, 16, 5); \
13270
111
    if (!Check(&S, DecodeShiftRight32Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13271
111
    return S; \
13272
199
  case 172: \
13273
199
    tmp = 0; \
13274
199
    tmp |= fieldname(insn, 12, 4) << 0; \
13275
199
    tmp |= fieldname(insn, 22, 1) << 4; \
13276
199
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13277
199
    tmp = 0; \
13278
198
    tmp |= fieldname(insn, 0, 4) << 0; \
13279
198
    tmp |= fieldname(insn, 5, 1) << 4; \
13280
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13281
198
    tmp = fieldname(insn, 16, 3); \
13282
197
    MCOperand_CreateImm0(MI, tmp); \
13283
197
    return S; \
13284
198
  case 173: \
13285
196
    tmp = 0; \
13286
196
    tmp |= fieldname(insn, 12, 4) << 0; \
13287
196
    tmp |= fieldname(insn, 22, 1) << 4; \
13288
196
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13289
196
    tmp = 0; \
13290
195
    tmp |= fieldname(insn, 12, 4) << 0; \
13291
195
    tmp |= fieldname(insn, 22, 1) << 4; \
13292
195
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13293
195
    tmp = 0; \
13294
195
    tmp |= fieldname(insn, 0, 4) << 0; \
13295
195
    tmp |= fieldname(insn, 5, 1) << 4; \
13296
195
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13297
195
    tmp = fieldname(insn, 16, 3); \
13298
194
    MCOperand_CreateImm0(MI, tmp); \
13299
194
    return S; \
13300
195
  case 174: \
13301
80
    tmp = 0; \
13302
80
    tmp |= fieldname(insn, 12, 4) << 0; \
13303
80
    tmp |= fieldname(insn, 22, 1) << 4; \
13304
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13305
80
    tmp = 0; \
13306
79
    tmp |= fieldname(insn, 0, 4) << 0; \
13307
79
    tmp |= fieldname(insn, 5, 1) << 4; \
13308
79
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13309
79
    tmp = fieldname(insn, 16, 4); \
13310
78
    MCOperand_CreateImm0(MI, tmp); \
13311
78
    return S; \
13312
79
  case 175: \
13313
68
    tmp = 0; \
13314
68
    tmp |= fieldname(insn, 12, 4) << 0; \
13315
68
    tmp |= fieldname(insn, 22, 1) << 4; \
13316
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13317
68
    tmp = 0; \
13318
67
    tmp |= fieldname(insn, 12, 4) << 0; \
13319
67
    tmp |= fieldname(insn, 22, 1) << 4; \
13320
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13321
67
    tmp = 0; \
13322
67
    tmp |= fieldname(insn, 0, 4) << 0; \
13323
67
    tmp |= fieldname(insn, 5, 1) << 4; \
13324
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13325
67
    tmp = fieldname(insn, 16, 4); \
13326
66
    MCOperand_CreateImm0(MI, tmp); \
13327
66
    return S; \
13328
241
  case 176: \
13329
241
    tmp = 0; \
13330
241
    tmp |= fieldname(insn, 12, 4) << 0; \
13331
241
    tmp |= fieldname(insn, 22, 1) << 4; \
13332
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13333
241
    tmp = 0; \
13334
239
    tmp |= fieldname(insn, 0, 4) << 0; \
13335
239
    tmp |= fieldname(insn, 5, 1) << 4; \
13336
239
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13337
239
    tmp = fieldname(insn, 16, 5); \
13338
238
    MCOperand_CreateImm0(MI, tmp); \
13339
238
    return S; \
13340
239
  case 177: \
13341
88
    tmp = 0; \
13342
88
    tmp |= fieldname(insn, 12, 4) << 0; \
13343
88
    tmp |= fieldname(insn, 22, 1) << 4; \
13344
88
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13345
88
    tmp = 0; \
13346
87
    tmp |= fieldname(insn, 12, 4) << 0; \
13347
87
    tmp |= fieldname(insn, 22, 1) << 4; \
13348
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13349
87
    tmp = 0; \
13350
87
    tmp |= fieldname(insn, 0, 4) << 0; \
13351
87
    tmp |= fieldname(insn, 5, 1) << 4; \
13352
87
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13353
87
    tmp = fieldname(insn, 16, 5); \
13354
86
    MCOperand_CreateImm0(MI, tmp); \
13355
86
    return S; \
13356
1.56k
  case 178: \
13357
1.56k
    if (!Check(&S, DecodeVCVTQ(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13358
1.56k
    return S; \
13359
1.56k
  case 179: \
13360
274
    tmp = 0; \
13361
274
    tmp |= fieldname(insn, 12, 4) << 0; \
13362
274
    tmp |= fieldname(insn, 22, 1) << 4; \
13363
274
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13364
274
    tmp = 0; \
13365
270
    tmp |= fieldname(insn, 0, 4) << 0; \
13366
270
    tmp |= fieldname(insn, 5, 1) << 4; \
13367
270
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13368
270
    tmp = fieldname(insn, 16, 6); \
13369
267
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13370
267
    return S; \
13371
267
  case 180: \
13372
245
    tmp = 0; \
13373
245
    tmp |= fieldname(insn, 12, 4) << 0; \
13374
245
    tmp |= fieldname(insn, 22, 1) << 4; \
13375
245
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13376
245
    tmp = 0; \
13377
241
    tmp |= fieldname(insn, 12, 4) << 0; \
13378
241
    tmp |= fieldname(insn, 22, 1) << 4; \
13379
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13380
241
    tmp = 0; \
13381
241
    tmp |= fieldname(insn, 0, 4) << 0; \
13382
241
    tmp |= fieldname(insn, 5, 1) << 4; \
13383
241
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13384
241
    tmp = fieldname(insn, 16, 6); \
13385
238
    if (!Check(&S, DecodeShiftRight64Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13386
238
    return S; \
13387
238
  case 181: \
13388
72
    tmp = 0; \
13389
72
    tmp |= fieldname(insn, 12, 4) << 0; \
13390
72
    tmp |= fieldname(insn, 22, 1) << 4; \
13391
72
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13392
72
    tmp = 0; \
13393
70
    tmp |= fieldname(insn, 0, 4) << 0; \
13394
70
    tmp |= fieldname(insn, 5, 1) << 4; \
13395
70
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13396
70
    tmp = fieldname(insn, 16, 6); \
13397
67
    MCOperand_CreateImm0(MI, tmp); \
13398
67
    return S; \
13399
198
  case 182: \
13400
198
    tmp = 0; \
13401
198
    tmp |= fieldname(insn, 12, 4) << 0; \
13402
198
    tmp |= fieldname(insn, 22, 1) << 4; \
13403
198
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13404
198
    tmp = 0; \
13405
197
    tmp |= fieldname(insn, 12, 4) << 0; \
13406
197
    tmp |= fieldname(insn, 22, 1) << 4; \
13407
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13408
197
    tmp = 0; \
13409
197
    tmp |= fieldname(insn, 0, 4) << 0; \
13410
197
    tmp |= fieldname(insn, 5, 1) << 4; \
13411
197
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13412
197
    tmp = fieldname(insn, 16, 6); \
13413
196
    MCOperand_CreateImm0(MI, tmp); \
13414
196
    return S; \
13415
257
  case 183: \
13416
257
    tmp = 0; \
13417
257
    tmp |= fieldname(insn, 7, 1) << 4; \
13418
257
    tmp |= fieldname(insn, 16, 4) << 0; \
13419
257
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13420
257
    tmp = 0; \
13421
257
    tmp |= fieldname(insn, 7, 1) << 4; \
13422
257
    tmp |= fieldname(insn, 16, 4) << 0; \
13423
257
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13424
257
    tmp = fieldname(insn, 12, 4); \
13425
257
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13426
257
    tmp = fieldname(insn, 21, 1); \
13427
257
    MCOperand_CreateImm0(MI, tmp); \
13428
257
    tmp = fieldname(insn, 28, 4); \
13429
257
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13430
257
    return S; \
13431
296
  case 184: \
13432
296
    tmp = fieldname(insn, 12, 4); \
13433
296
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13434
296
    tmp = 0; \
13435
296
    tmp |= fieldname(insn, 7, 1) << 4; \
13436
296
    tmp |= fieldname(insn, 16, 4) << 0; \
13437
296
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13438
296
    tmp = fieldname(insn, 21, 1); \
13439
296
    MCOperand_CreateImm0(MI, tmp); \
13440
296
    tmp = fieldname(insn, 28, 4); \
13441
296
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13442
296
    return S; \
13443
296
  case 185: \
13444
195
    tmp = 0; \
13445
195
    tmp |= fieldname(insn, 7, 1) << 4; \
13446
195
    tmp |= fieldname(insn, 16, 4) << 0; \
13447
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13448
195
    tmp = 0; \
13449
195
    tmp |= fieldname(insn, 7, 1) << 4; \
13450
195
    tmp |= fieldname(insn, 16, 4) << 0; \
13451
195
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13452
195
    tmp = fieldname(insn, 12, 4); \
13453
195
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13454
195
    tmp = 0; \
13455
195
    tmp |= fieldname(insn, 6, 1) << 0; \
13456
195
    tmp |= fieldname(insn, 21, 1) << 1; \
13457
195
    MCOperand_CreateImm0(MI, tmp); \
13458
195
    tmp = fieldname(insn, 28, 4); \
13459
195
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13460
195
    return S; \
13461
195
  case 186: \
13462
68
    tmp = fieldname(insn, 12, 4); \
13463
68
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13464
68
    tmp = 0; \
13465
68
    tmp |= fieldname(insn, 7, 1) << 4; \
13466
68
    tmp |= fieldname(insn, 16, 4) << 0; \
13467
68
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13468
68
    tmp = 0; \
13469
68
    tmp |= fieldname(insn, 6, 1) << 0; \
13470
68
    tmp |= fieldname(insn, 21, 1) << 1; \
13471
68
    MCOperand_CreateImm0(MI, tmp); \
13472
68
    tmp = fieldname(insn, 28, 4); \
13473
68
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13474
68
    return S; \
13475
403
  case 187: \
13476
403
    tmp = 0; \
13477
403
    tmp |= fieldname(insn, 7, 1) << 4; \
13478
403
    tmp |= fieldname(insn, 16, 4) << 0; \
13479
403
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13480
403
    tmp = 0; \
13481
403
    tmp |= fieldname(insn, 7, 1) << 4; \
13482
403
    tmp |= fieldname(insn, 16, 4) << 0; \
13483
403
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13484
403
    tmp = fieldname(insn, 12, 4); \
13485
403
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13486
403
    tmp = 0; \
13487
403
    tmp |= fieldname(insn, 5, 2) << 0; \
13488
403
    tmp |= fieldname(insn, 21, 1) << 2; \
13489
403
    MCOperand_CreateImm0(MI, tmp); \
13490
403
    tmp = fieldname(insn, 28, 4); \
13491
403
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13492
403
    return S; \
13493
406
  case 188: \
13494
406
    tmp = fieldname(insn, 12, 4); \
13495
406
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13496
406
    tmp = 0; \
13497
406
    tmp |= fieldname(insn, 7, 1) << 4; \
13498
406
    tmp |= fieldname(insn, 16, 4) << 0; \
13499
406
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13500
406
    tmp = 0; \
13501
406
    tmp |= fieldname(insn, 5, 2) << 0; \
13502
406
    tmp |= fieldname(insn, 21, 1) << 2; \
13503
406
    MCOperand_CreateImm0(MI, tmp); \
13504
406
    tmp = fieldname(insn, 28, 4); \
13505
406
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13506
406
    return S; \
13507
406
  case 189: \
13508
202
    tmp = 0; \
13509
202
    tmp |= fieldname(insn, 7, 1) << 4; \
13510
202
    tmp |= fieldname(insn, 16, 4) << 0; \
13511
202
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13512
202
    tmp = fieldname(insn, 12, 4); \
13513
202
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13514
202
    tmp = fieldname(insn, 28, 4); \
13515
202
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13516
202
    return S; \
13517
202
  case 190: \
13518
104
    tmp = 0; \
13519
104
    tmp |= fieldname(insn, 7, 1) << 4; \
13520
104
    tmp |= fieldname(insn, 16, 4) << 0; \
13521
104
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13522
104
    tmp = fieldname(insn, 12, 4); \
13523
103
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13524
103
    tmp = fieldname(insn, 28, 4); \
13525
103
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13526
103
    return S; \
13527
5.36k
  case 191: \
13528
5.36k
    if (!Check(&S, DecodeVLDST4Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13529
5.36k
    return S; \
13530
5.36k
  case 192: \
13531
1.90k
    if (!Check(&S, DecodeVST1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13532
1.90k
    return S; \
13533
1.90k
  case 193: \
13534
1.32k
    if (!Check(&S, DecodeVLD1LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13535
1.32k
    return S; \
13536
2.64k
  case 194: \
13537
2.64k
    if (!Check(&S, DecodeVST2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13538
2.64k
    return S; \
13539
2.64k
  case 195: \
13540
2.45k
    if (!Check(&S, DecodeVLD2LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13541
2.45k
    return S; \
13542
14.1k
  case 196: \
13543
14.1k
    if (!Check(&S, DecodeVLDST1Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13544
14.1k
    return S; \
13545
14.1k
  case 197: \
13546
1.20k
    if (!Check(&S, DecodeVST3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13547
1.20k
    return S; \
13548
1.45k
  case 198: \
13549
1.45k
    if (!Check(&S, DecodeVLD3LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13550
1.45k
    return S; \
13551
11.8k
  case 199: \
13552
11.8k
    if (!Check(&S, DecodeVLDST2Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13553
11.8k
    return S; \
13554
11.8k
  case 200: \
13555
1.75k
    if (!Check(&S, DecodeVST4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13556
1.75k
    return S; \
13557
1.75k
  case 201: \
13558
1.71k
    if (!Check(&S, DecodeVLD4LN(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13559
1.71k
    return S; \
13560
5.42k
  case 202: \
13561
5.42k
    if (!Check(&S, DecodeVLDST3Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13562
5.42k
    return S; \
13563
5.42k
  case 203: \
13564
783
    if (!Check(&S, DecodeVLD1DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13565
783
    return S; \
13566
2.98k
  case 204: \
13567
2.98k
    if (!Check(&S, DecodeVLD2DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13568
2.98k
    return S; \
13569
2.98k
  case 205: \
13570
719
    if (!Check(&S, DecodeVLD3DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13571
719
    return S; \
13572
891
  case 206: \
13573
891
    if (!Check(&S, DecodeVLD4DupInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13574
891
    return S; \
13575
891
  case 207: \
13576
0
    tmp = fieldname(insn, 0, 3); \
13577
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13578
0
    tmp = fieldname(insn, 3, 3); \
13579
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13580
0
    return S; \
13581
0
  case 208: \
13582
0
    tmp = fieldname(insn, 8, 3); \
13583
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13584
0
    tmp = fieldname(insn, 0, 8); \
13585
0
    MCOperand_CreateImm0(MI, tmp); \
13586
0
    return S; \
13587
0
  case 209: \
13588
0
    if (!Check(&S, DecodeThumbAddSPReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13589
0
    return S; \
13590
0
  case 210: \
13591
0
    tmp = 0; \
13592
0
    tmp |= fieldname(insn, 0, 3) << 0; \
13593
0
    tmp |= fieldname(insn, 7, 1) << 3; \
13594
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13595
0
    tmp = 0; \
13596
0
    tmp |= fieldname(insn, 0, 3) << 0; \
13597
0
    tmp |= fieldname(insn, 7, 1) << 3; \
13598
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13599
0
    tmp = fieldname(insn, 3, 4); \
13600
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13601
0
    return S; \
13602
0
  case 211: \
13603
0
    tmp = 0; \
13604
0
    tmp |= fieldname(insn, 0, 3) << 0; \
13605
0
    tmp |= fieldname(insn, 7, 1) << 3; \
13606
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13607
0
    tmp = fieldname(insn, 3, 4); \
13608
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13609
0
    return S; \
13610
0
  case 212: \
13611
0
    tmp = fieldname(insn, 3, 4); \
13612
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13613
0
    return S; \
13614
0
  case 213: \
13615
0
    tmp = fieldname(insn, 3, 4); \
13616
0
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13617
0
    return S; \
13618
0
  case 214: \
13619
0
    tmp = fieldname(insn, 8, 3); \
13620
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13621
0
    tmp = fieldname(insn, 0, 8); \
13622
0
    if (!Check(&S, DecodeThumbAddrModePC(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13623
0
    return S; \
13624
0
  case 215: \
13625
0
    tmp = fieldname(insn, 0, 3); \
13626
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13627
0
    tmp = fieldname(insn, 3, 6); \
13628
0
    if (!Check(&S, DecodeThumbAddrModeRR(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13629
0
    return S; \
13630
0
  case 216: \
13631
0
    tmp = fieldname(insn, 0, 3); \
13632
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13633
0
    tmp = fieldname(insn, 3, 8); \
13634
0
    if (!Check(&S, DecodeThumbAddrModeIS(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13635
0
    return S; \
13636
0
  case 217: \
13637
0
    tmp = fieldname(insn, 8, 3); \
13638
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13639
0
    tmp = fieldname(insn, 0, 8); \
13640
0
    if (!Check(&S, DecodeThumbAddrModeSP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13641
0
    return S; \
13642
0
  case 218: \
13643
0
    if (!Check(&S, DecodeThumbAddSpecialReg(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13644
0
    return S; \
13645
0
  case 219: \
13646
0
    if (!Check(&S, DecodeThumbAddSPImm(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13647
0
    return S; \
13648
0
  case 220: \
13649
0
    tmp = fieldname(insn, 0, 3); \
13650
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13651
0
    tmp = 0; \
13652
0
    tmp |= fieldname(insn, 3, 5) << 0; \
13653
0
    tmp |= fieldname(insn, 9, 1) << 5; \
13654
0
    if (!Check(&S, DecodeThumbCmpBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13655
0
    return S; \
13656
0
  case 221: \
13657
0
    tmp = 0; \
13658
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13659
0
    tmp |= fieldname(insn, 8, 1) << 14; \
13660
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13661
0
    return S; \
13662
0
  case 222: \
13663
0
    tmp = fieldname(insn, 3, 1); \
13664
0
    MCOperand_CreateImm0(MI, tmp); \
13665
0
    return S; \
13666
0
  case 223: \
13667
0
    if (!Check(&S, DecodeThumbCPS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13668
0
    return S; \
13669
0
  case 224: \
13670
0
    tmp = fieldname(insn, 0, 6); \
13671
0
    MCOperand_CreateImm0(MI, tmp); \
13672
0
    return S; \
13673
0
  case 225: \
13674
0
    tmp = 0; \
13675
0
    tmp |= fieldname(insn, 0, 8) << 0; \
13676
0
    tmp |= fieldname(insn, 8, 1) << 15; \
13677
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13678
0
    return S; \
13679
2.85k
  case 226: \
13680
2.85k
    tmp = fieldname(insn, 0, 8); \
13681
2.85k
    MCOperand_CreateImm0(MI, tmp); \
13682
2.85k
    return S; \
13683
0
  case 227: \
13684
0
    tmp = fieldname(insn, 4, 4); \
13685
0
    MCOperand_CreateImm0(MI, tmp); \
13686
0
    return S; \
13687
0
  case 228: \
13688
0
    tmp = fieldname(insn, 8, 3); \
13689
0
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13690
0
    tmp = fieldname(insn, 8, 3); \
13691
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13692
0
    tmp = fieldname(insn, 0, 8); \
13693
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13694
0
    return S; \
13695
0
  case 229: \
13696
0
    tmp = fieldname(insn, 8, 3); \
13697
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13698
0
    tmp = fieldname(insn, 0, 8); \
13699
0
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13700
0
    return S; \
13701
0
  case 230: \
13702
0
    tmp = fieldname(insn, 0, 8); \
13703
0
    if (!Check(&S, DecodeThumbBCCTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13704
0
    tmp = fieldname(insn, 8, 4); \
13705
0
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13706
0
    return S; \
13707
0
  case 231: \
13708
0
    tmp = fieldname(insn, 0, 11); \
13709
0
    if (!Check(&S, DecodeThumbBROperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13710
0
    return S; \
13711
424
  case 232: \
13712
424
    tmp = 0; \
13713
424
    tmp |= fieldname(insn, 1, 10) << 1; \
13714
424
    tmp |= fieldname(insn, 11, 1) << 21; \
13715
424
    tmp |= fieldname(insn, 13, 1) << 22; \
13716
424
    tmp |= fieldname(insn, 16, 10) << 11; \
13717
424
    tmp |= fieldname(insn, 26, 1) << 23; \
13718
424
    if (!Check(&S, DecodeThumbBLXOffset(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13719
424
    return S; \
13720
2.11k
  case 233: \
13721
2.11k
    tmp = 0; \
13722
2.11k
    tmp |= fieldname(insn, 0, 11) << 0; \
13723
2.11k
    tmp |= fieldname(insn, 11, 1) << 21; \
13724
2.11k
    tmp |= fieldname(insn, 13, 1) << 22; \
13725
2.11k
    tmp |= fieldname(insn, 16, 10) << 11; \
13726
2.11k
    tmp |= fieldname(insn, 26, 1) << 23; \
13727
2.11k
    if (!Check(&S, DecodeThumbBLTargetOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13728
2.11k
    return S; \
13729
2.11k
  case 234: \
13730
0
    if (!Check(&S, DecodeIT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13731
0
    return S; \
13732
248
  case 235: \
13733
248
    tmp = fieldname(insn, 16, 4); \
13734
248
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13735
248
    tmp = 0; \
13736
248
    tmp |= fieldname(insn, 0, 13) << 0; \
13737
248
    tmp |= fieldname(insn, 14, 1) << 14; \
13738
248
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13739
248
    return S; \
13740
495
  case 236: \
13741
495
    tmp = fieldname(insn, 16, 4); \
13742
495
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13743
495
    tmp = fieldname(insn, 0, 16); \
13744
495
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13745
495
    return S; \
13746
899
  case 237: \
13747
899
    tmp = fieldname(insn, 16, 4); \
13748
899
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13749
899
    tmp = fieldname(insn, 0, 4); \
13750
899
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13751
899
    return S; \
13752
899
  case 238: \
13753
587
    tmp = fieldname(insn, 16, 4); \
13754
587
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13755
587
    tmp = 0; \
13756
587
    tmp |= fieldname(insn, 0, 4) << 0; \
13757
587
    tmp |= fieldname(insn, 4, 4) << 5; \
13758
587
    tmp |= fieldname(insn, 12, 3) << 9; \
13759
587
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13760
587
    return S; \
13761
1.40k
  case 239: \
13762
1.40k
    tmp = fieldname(insn, 8, 4); \
13763
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13764
1.40k
    tmp = fieldname(insn, 16, 4); \
13765
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13766
1.40k
    tmp = fieldname(insn, 0, 4); \
13767
1.40k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13768
1.40k
    tmp = fieldname(insn, 20, 1); \
13769
1.40k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13770
1.40k
    return S; \
13771
1.49k
  case 240: \
13772
1.49k
    tmp = fieldname(insn, 8, 4); \
13773
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13774
1.49k
    tmp = fieldname(insn, 16, 4); \
13775
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13776
1.49k
    tmp = 0; \
13777
1.49k
    tmp |= fieldname(insn, 0, 4) << 0; \
13778
1.49k
    tmp |= fieldname(insn, 4, 4) << 5; \
13779
1.49k
    tmp |= fieldname(insn, 12, 3) << 9; \
13780
1.49k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13781
1.49k
    tmp = fieldname(insn, 20, 1); \
13782
1.49k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13783
1.49k
    return S; \
13784
1.49k
  case 241: \
13785
993
    tmp = fieldname(insn, 8, 4); \
13786
993
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13787
993
    tmp = fieldname(insn, 16, 4); \
13788
993
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13789
993
    tmp = fieldname(insn, 0, 4); \
13790
993
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13791
993
    tmp = fieldname(insn, 20, 1); \
13792
993
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13793
993
    return S; \
13794
1.33k
  case 242: \
13795
1.33k
    tmp = fieldname(insn, 8, 4); \
13796
1.33k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13797
1.33k
    tmp = fieldname(insn, 16, 4); \
13798
1.33k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13799
1.33k
    tmp = 0; \
13800
1.33k
    tmp |= fieldname(insn, 0, 4) << 0; \
13801
1.33k
    tmp |= fieldname(insn, 4, 4) << 5; \
13802
1.33k
    tmp |= fieldname(insn, 12, 3) << 9; \
13803
1.33k
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13804
1.33k
    tmp = fieldname(insn, 20, 1); \
13805
1.33k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13806
1.33k
    return S; \
13807
1.33k
  case 243: \
13808
386
    tmp = fieldname(insn, 16, 4); \
13809
386
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13810
386
    tmp = fieldname(insn, 16, 4); \
13811
386
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13812
386
    tmp = 0; \
13813
386
    tmp |= fieldname(insn, 0, 13) << 0; \
13814
386
    tmp |= fieldname(insn, 14, 1) << 14; \
13815
386
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13816
386
    return S; \
13817
848
  case 244: \
13818
848
    tmp = fieldname(insn, 16, 4); \
13819
848
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13820
848
    tmp = fieldname(insn, 16, 4); \
13821
848
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13822
848
    tmp = fieldname(insn, 0, 16); \
13823
848
    if (!Check(&S, DecodeRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13824
848
    return S; \
13825
848
  case 245: \
13826
218
    tmp = fieldname(insn, 8, 4); \
13827
218
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13828
218
    tmp = fieldname(insn, 16, 4); \
13829
218
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13830
218
    return S; \
13831
1.47k
  case 246: \
13832
1.47k
    tmp = fieldname(insn, 8, 4); \
13833
1.47k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13834
1.47k
    tmp = fieldname(insn, 12, 4); \
13835
1.47k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13836
1.47k
    tmp = 0; \
13837
1.47k
    tmp |= fieldname(insn, 0, 8) << 0; \
13838
1.47k
    tmp |= fieldname(insn, 16, 4) << 8; \
13839
1.47k
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13840
1.47k
    return S; \
13841
1.47k
  case 247: \
13842
897
    tmp = fieldname(insn, 0, 4); \
13843
897
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13844
897
    tmp = fieldname(insn, 12, 4); \
13845
897
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13846
897
    tmp = fieldname(insn, 16, 4); \
13847
897
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13848
897
    return S; \
13849
1.33k
  case 248: \
13850
1.33k
    tmp = fieldname(insn, 0, 4); \
13851
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13852
1.33k
    tmp = fieldname(insn, 12, 4); \
13853
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13854
1.33k
    tmp = fieldname(insn, 8, 4); \
13855
1.33k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13856
1.33k
    tmp = fieldname(insn, 16, 4); \
13857
1.33k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13858
1.33k
    return S; \
13859
1.33k
  case 249: \
13860
783
    tmp = fieldname(insn, 12, 4); \
13861
783
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13862
783
    tmp = fieldname(insn, 16, 4); \
13863
783
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13864
783
    return S; \
13865
783
  case 250: \
13866
635
    tmp = fieldname(insn, 12, 4); \
13867
635
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13868
635
    tmp = 0; \
13869
635
    tmp |= fieldname(insn, 0, 8) << 0; \
13870
635
    tmp |= fieldname(insn, 16, 4) << 8; \
13871
635
    if (!Check(&S, DecodeT2AddrModeImm0_1020s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13872
635
    return S; \
13873
968
  case 251: \
13874
968
    if (!Check(&S, DecodeThumbTableBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13875
968
    return S; \
13876
1.76k
  case 252: \
13877
1.76k
    tmp = fieldname(insn, 12, 4); \
13878
1.76k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13879
1.76k
    tmp = fieldname(insn, 8, 4); \
13880
1.76k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13881
1.76k
    tmp = fieldname(insn, 16, 4); \
13882
1.76k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13883
1.76k
    return S; \
13884
1.76k
  case 253: \
13885
1.09k
    tmp = fieldname(insn, 12, 4); \
13886
1.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13887
1.09k
    tmp = fieldname(insn, 8, 4); \
13888
1.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13889
1.09k
    tmp = 0; \
13890
1.09k
    tmp |= fieldname(insn, 0, 8) << 0; \
13891
1.09k
    tmp |= fieldname(insn, 16, 4) << 9; \
13892
1.09k
    tmp |= fieldname(insn, 23, 1) << 8; \
13893
1.09k
    if (!Check(&S, DecodeT2AddrModeImm8s4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13894
1.09k
    return S; \
13895
1.09k
  case 254: \
13896
659
    tmp = fieldname(insn, 8, 4); \
13897
659
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13898
659
    tmp = fieldname(insn, 0, 4); \
13899
659
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13900
659
    tmp = fieldname(insn, 20, 1); \
13901
659
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13902
659
    return S; \
13903
774
  case 255: \
13904
774
    tmp = fieldname(insn, 8, 4); \
13905
774
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13906
774
    tmp = fieldname(insn, 0, 4); \
13907
774
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13908
774
    tmp = fieldname(insn, 20, 1); \
13909
774
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13910
774
    return S; \
13911
1.25k
  case 256: \
13912
1.25k
    tmp = fieldname(insn, 8, 4); \
13913
1.25k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13914
1.25k
    tmp = fieldname(insn, 0, 4); \
13915
1.25k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13916
1.25k
    tmp = 0; \
13917
1.25k
    tmp |= fieldname(insn, 6, 2) << 0; \
13918
1.25k
    tmp |= fieldname(insn, 12, 3) << 2; \
13919
1.25k
    MCOperand_CreateImm0(MI, tmp); \
13920
1.25k
    tmp = fieldname(insn, 20, 1); \
13921
1.25k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13922
1.25k
    return S; \
13923
1.25k
  case 257: \
13924
1.06k
    tmp = fieldname(insn, 8, 4); \
13925
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13926
1.06k
    tmp = fieldname(insn, 16, 4); \
13927
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13928
1.06k
    tmp = fieldname(insn, 0, 4); \
13929
1.06k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13930
1.06k
    tmp = 0; \
13931
1.06k
    tmp |= fieldname(insn, 6, 2) << 0; \
13932
1.06k
    tmp |= fieldname(insn, 12, 3) << 2; \
13933
1.06k
    MCOperand_CreateImm0(MI, tmp); \
13934
1.06k
    return S; \
13935
1.26k
  case 258: \
13936
1.26k
    tmp = fieldname(insn, 16, 4); \
13937
1.26k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13938
1.26k
    tmp = fieldname(insn, 12, 4); \
13939
1.26k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13940
1.26k
    tmp = fieldname(insn, 8, 4); \
13941
1.26k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13942
1.26k
    tmp = fieldname(insn, 16, 4); \
13943
1.26k
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13944
1.26k
    tmp = 0; \
13945
1.26k
    tmp |= fieldname(insn, 0, 8) << 0; \
13946
1.26k
    tmp |= fieldname(insn, 23, 1) << 8; \
13947
1.26k
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13948
1.26k
    return S; \
13949
1.26k
  case 259: \
13950
888
    tmp = fieldname(insn, 12, 4); \
13951
888
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13952
888
    tmp = fieldname(insn, 8, 4); \
13953
888
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13954
888
    tmp = fieldname(insn, 16, 4); \
13955
888
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13956
888
    tmp = fieldname(insn, 16, 4); \
13957
888
    if (!Check(&S, DecodeAddrMode7Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13958
888
    tmp = 0; \
13959
888
    tmp |= fieldname(insn, 0, 8) << 0; \
13960
888
    tmp |= fieldname(insn, 23, 1) << 8; \
13961
888
    if (!Check(&S, DecodeT2Imm8S4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13962
888
    return S; \
13963
3.68k
  case 260: \
13964
3.68k
    if (!Check(&S, DecodeT2STRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13965
3.68k
    return S; \
13966
3.68k
  case 261: \
13967
3.52k
    if (!Check(&S, DecodeT2LDRDPreInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
13968
3.52k
    return S; \
13969
3.52k
  case 262: \
13970
876
    tmp = fieldname(insn, 8, 4); \
13971
876
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13972
876
    tmp = 0; \
13973
876
    tmp |= fieldname(insn, 0, 4) << 0; \
13974
876
    tmp |= fieldname(insn, 4, 4) << 5; \
13975
876
    tmp |= fieldname(insn, 12, 3) << 9; \
13976
876
    if (!Check(&S, DecodeSORegImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13977
876
    tmp = fieldname(insn, 20, 1); \
13978
876
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13979
876
    return S; \
13980
876
  case 263: \
13981
397
    tmp = fieldname(insn, 16, 4); \
13982
397
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13983
397
    tmp = 0; \
13984
397
    tmp |= fieldname(insn, 0, 8) << 0; \
13985
397
    tmp |= fieldname(insn, 12, 3) << 8; \
13986
397
    tmp |= fieldname(insn, 26, 1) << 11; \
13987
397
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13988
397
    return S; \
13989
2.21k
  case 264: \
13990
2.21k
    tmp = fieldname(insn, 8, 4); \
13991
2.21k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13992
2.21k
    tmp = fieldname(insn, 16, 4); \
13993
2.21k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13994
2.21k
    tmp = 0; \
13995
2.21k
    tmp |= fieldname(insn, 0, 8) << 0; \
13996
2.21k
    tmp |= fieldname(insn, 12, 3) << 8; \
13997
2.21k
    tmp |= fieldname(insn, 26, 1) << 11; \
13998
2.21k
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
13999
2.21k
    tmp = fieldname(insn, 20, 1); \
14000
2.21k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14001
2.21k
    return S; \
14002
2.21k
  case 265: \
14003
828
    tmp = fieldname(insn, 8, 4); \
14004
828
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14005
828
    tmp = 0; \
14006
828
    tmp |= fieldname(insn, 0, 8) << 0; \
14007
828
    tmp |= fieldname(insn, 12, 3) << 8; \
14008
828
    tmp |= fieldname(insn, 26, 1) << 11; \
14009
828
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14010
828
    tmp = fieldname(insn, 20, 1); \
14011
828
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14012
828
    return S; \
14013
1.06k
  case 266: \
14014
1.06k
    tmp = fieldname(insn, 8, 4); \
14015
1.06k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14016
1.06k
    tmp = fieldname(insn, 16, 4); \
14017
1.06k
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14018
1.06k
    tmp = 0; \
14019
1.06k
    tmp |= fieldname(insn, 0, 8) << 0; \
14020
1.06k
    tmp |= fieldname(insn, 12, 3) << 8; \
14021
1.06k
    tmp |= fieldname(insn, 26, 1) << 11; \
14022
1.06k
    if (!Check(&S, DecodeT2SOImm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14023
1.06k
    tmp = fieldname(insn, 20, 1); \
14024
1.06k
    if (!Check(&S, DecodeCCOutOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14025
1.06k
    return S; \
14026
1.06k
  case 267: \
14027
385
    tmp = fieldname(insn, 8, 4); \
14028
385
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14029
385
    tmp = fieldname(insn, 16, 4); \
14030
385
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14031
385
    tmp = 0; \
14032
385
    tmp |= fieldname(insn, 0, 8) << 0; \
14033
385
    tmp |= fieldname(insn, 12, 3) << 8; \
14034
385
    tmp |= fieldname(insn, 26, 1) << 11; \
14035
385
    MCOperand_CreateImm0(MI, tmp); \
14036
385
    return S; \
14037
385
  case 268: \
14038
1
    if (!Check(&S, DecodeT2Adr(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14039
1
    return S; \
14040
1.08k
  case 269: \
14041
1.08k
    if (!Check(&S, DecodeT2MOVTWInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14042
1.08k
    return S; \
14043
1.08k
  case 270: \
14044
646
    tmp = fieldname(insn, 8, 4); \
14045
646
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14046
646
    tmp = fieldname(insn, 0, 4); \
14047
646
    MCOperand_CreateImm0(MI, tmp); \
14048
646
    tmp = fieldname(insn, 16, 4); \
14049
646
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14050
646
    return S; \
14051
2.10k
  case 271: \
14052
2.10k
    tmp = fieldname(insn, 8, 4); \
14053
2.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14054
2.10k
    tmp = fieldname(insn, 0, 5); \
14055
2.10k
    MCOperand_CreateImm0(MI, tmp); \
14056
2.10k
    tmp = fieldname(insn, 16, 4); \
14057
2.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14058
2.10k
    tmp = 0; \
14059
2.10k
    tmp |= fieldname(insn, 6, 2) << 0; \
14060
2.10k
    tmp |= fieldname(insn, 12, 3) << 2; \
14061
2.10k
    tmp |= fieldname(insn, 21, 1) << 5; \
14062
2.10k
    if (!Check(&S, DecodeT2ShifterImmOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14063
2.10k
    return S; \
14064
2.10k
  case 272: \
14065
980
    tmp = fieldname(insn, 8, 4); \
14066
980
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14067
980
    tmp = fieldname(insn, 16, 4); \
14068
980
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14069
980
    tmp = 0; \
14070
980
    tmp |= fieldname(insn, 6, 2) << 0; \
14071
980
    tmp |= fieldname(insn, 12, 3) << 2; \
14072
980
    MCOperand_CreateImm0(MI, tmp); \
14073
980
    tmp = fieldname(insn, 0, 5); \
14074
980
    MCOperand_CreateImm0(MI, tmp); \
14075
980
    return S; \
14076
980
  case 273: \
14077
641
    tmp = fieldname(insn, 8, 4); \
14078
641
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14079
641
    tmp = fieldname(insn, 8, 4); \
14080
641
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14081
641
    tmp = 0; \
14082
641
    tmp |= fieldname(insn, 0, 5) << 5; \
14083
641
    tmp |= fieldname(insn, 6, 2) << 0; \
14084
641
    tmp |= fieldname(insn, 12, 3) << 2; \
14085
641
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14086
641
    return S; \
14087
714
  case 274: \
14088
714
    tmp = fieldname(insn, 8, 4); \
14089
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14090
714
    tmp = fieldname(insn, 8, 4); \
14091
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14092
714
    tmp = fieldname(insn, 16, 4); \
14093
714
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14094
714
    tmp = 0; \
14095
714
    tmp |= fieldname(insn, 0, 5) << 5; \
14096
714
    tmp |= fieldname(insn, 6, 2) << 0; \
14097
714
    tmp |= fieldname(insn, 12, 3) << 2; \
14098
714
    if (!Check(&S, DecodeBitfieldMaskOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14099
714
    return S; \
14100
714
  case 275: \
14101
263
    tmp = fieldname(insn, 16, 4); \
14102
263
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14103
263
    return S; \
14104
263
  case 276: \
14105
68
    tmp = fieldname(insn, 0, 4); \
14106
68
    MCOperand_CreateImm0(MI, tmp); \
14107
68
    return S; \
14108
796
  case 277: \
14109
796
    if (!Check(&S, DecodeT2CPSInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14110
796
    return S; \
14111
796
  case 278: \
14112
66
    tmp = fieldname(insn, 8, 4); \
14113
66
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14114
66
    return S; \
14115
440
  case 279: \
14116
440
    tmp = 0; \
14117
440
    tmp |= fieldname(insn, 8, 4) << 0; \
14118
440
    tmp |= fieldname(insn, 20, 1) << 4; \
14119
440
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14120
440
    tmp = fieldname(insn, 16, 4); \
14121
439
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14122
439
    return S; \
14123
500
  case 280: \
14124
500
    tmp = 0; \
14125
500
    tmp |= fieldname(insn, 4, 1) << 4; \
14126
500
    tmp |= fieldname(insn, 8, 4) << 0; \
14127
500
    tmp |= fieldname(insn, 20, 1) << 5; \
14128
500
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14129
500
    tmp = fieldname(insn, 16, 4); \
14130
499
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14131
499
    return S; \
14132
499
  case 281: \
14133
330
    tmp = fieldname(insn, 8, 4); \
14134
330
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14135
330
    tmp = 0; \
14136
330
    tmp |= fieldname(insn, 4, 1) << 4; \
14137
330
    tmp |= fieldname(insn, 16, 4) << 0; \
14138
330
    tmp |= fieldname(insn, 20, 1) << 5; \
14139
330
    if (!Check(&S, DecodeBankedReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14140
330
    return S; \
14141
330
  case 282: \
14142
84
    tmp = 0; \
14143
84
    tmp |= fieldname(insn, 0, 12) << 0; \
14144
84
    tmp |= fieldname(insn, 16, 4) << 12; \
14145
84
    MCOperand_CreateImm0(MI, tmp); \
14146
84
    return S; \
14147
330
  case 283: \
14148
70
    tmp = fieldname(insn, 16, 4); \
14149
70
    MCOperand_CreateImm0(MI, tmp); \
14150
70
    return S; \
14151
5.49k
  case 284: \
14152
5.49k
    tmp = 0; \
14153
5.49k
    tmp |= fieldname(insn, 0, 8) << 0; \
14154
5.49k
    tmp |= fieldname(insn, 10, 2) << 10; \
14155
5.49k
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14156
5.49k
    tmp = fieldname(insn, 16, 4); \
14157
5.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14158
5.49k
    return S; \
14159
5.49k
  case 285: \
14160
2.09k
    tmp = fieldname(insn, 8, 4); \
14161
2.09k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14162
2.09k
    tmp = fieldname(insn, 0, 8); \
14163
2.09k
    if (!Check(&S, DecodeMSRMask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14164
2.09k
    return S; \
14165
2.37k
  case 286: \
14166
2.37k
    if (!Check(&S, DecodeThumb2BCCInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14167
2.37k
    return S; \
14168
2.37k
  case 287: \
14169
679
    if (!Check(&S, DecodeT2BInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14170
679
    return S; \
14171
1.29k
  case 288: \
14172
1.29k
    tmp = fieldname(insn, 12, 4); \
14173
1.29k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14174
1.29k
    tmp = 0; \
14175
1.29k
    tmp |= fieldname(insn, 0, 4) << 2; \
14176
1.29k
    tmp |= fieldname(insn, 4, 2) << 0; \
14177
1.29k
    tmp |= fieldname(insn, 16, 4) << 6; \
14178
1.29k
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14179
1.29k
    return S; \
14180
4.68k
  case 289: \
14181
4.68k
    if (!Check(&S, DecodeT2LdStPre(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14182
4.68k
    return S; \
14183
4.68k
  case 290: \
14184
1.10k
    tmp = fieldname(insn, 12, 4); \
14185
1.10k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14186
1.10k
    tmp = 0; \
14187
1.10k
    tmp |= fieldname(insn, 0, 8) << 0; \
14188
1.10k
    tmp |= fieldname(insn, 16, 4) << 9; \
14189
1.10k
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14190
1.10k
    return S; \
14191
1.10k
  case 291: \
14192
498
    tmp = fieldname(insn, 12, 4); \
14193
498
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14194
498
    tmp = 0; \
14195
498
    tmp |= fieldname(insn, 0, 8) << 0; \
14196
498
    tmp |= fieldname(insn, 9, 1) << 8; \
14197
498
    tmp |= fieldname(insn, 16, 4) << 9; \
14198
498
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14199
498
    return S; \
14200
1.27k
  case 292: \
14201
1.27k
    tmp = fieldname(insn, 12, 4); \
14202
1.27k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14203
1.27k
    tmp = 0; \
14204
1.27k
    tmp |= fieldname(insn, 0, 12) << 0; \
14205
1.27k
    tmp |= fieldname(insn, 16, 4) << 13; \
14206
1.27k
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14207
1.27k
    return S; \
14208
2.66k
  case 293: \
14209
2.66k
    if (!Check(&S, DecodeT2LoadShift(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14210
2.66k
    return S; \
14211
2.66k
  case 294: \
14212
2.47k
    if (!Check(&S, DecodeT2LoadImm8(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14213
2.47k
    return S; \
14214
2.66k
  case 295: \
14215
2.66k
    if (!Check(&S, DecodeT2LoadT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14216
2.66k
    return S; \
14217
3.95k
  case 296: \
14218
3.95k
    if (!Check(&S, DecodeT2LoadImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14219
3.95k
    return S; \
14220
3.95k
  case 297: \
14221
634
    if (!Check(&S, DecodeT2LoadLabel(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14222
634
    return S; \
14223
822
  case 298: \
14224
822
    tmp = fieldname(insn, 8, 4); \
14225
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14226
822
    tmp = fieldname(insn, 16, 4); \
14227
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14228
822
    tmp = fieldname(insn, 0, 4); \
14229
822
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14230
822
    return S; \
14231
1.19k
  case 299: \
14232
1.19k
    tmp = fieldname(insn, 8, 4); \
14233
1.19k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14234
1.19k
    tmp = fieldname(insn, 0, 4); \
14235
1.19k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14236
1.19k
    tmp = fieldname(insn, 4, 2); \
14237
1.19k
    MCOperand_CreateImm0(MI, tmp); \
14238
1.19k
    return S; \
14239
1.45k
  case 300: \
14240
1.45k
    tmp = fieldname(insn, 8, 4); \
14241
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14242
1.45k
    tmp = fieldname(insn, 16, 4); \
14243
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14244
1.45k
    tmp = fieldname(insn, 0, 4); \
14245
1.45k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14246
1.45k
    tmp = fieldname(insn, 4, 2); \
14247
1.45k
    MCOperand_CreateImm0(MI, tmp); \
14248
1.45k
    return S; \
14249
1.45k
  case 301: \
14250
764
    tmp = fieldname(insn, 8, 4); \
14251
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14252
764
    tmp = fieldname(insn, 0, 4); \
14253
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14254
764
    tmp = fieldname(insn, 16, 4); \
14255
764
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14256
764
    return S; \
14257
764
  case 302: \
14258
206
    tmp = fieldname(insn, 8, 4); \
14259
206
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14260
206
    tmp = 0; \
14261
206
    tmp |= fieldname(insn, 0, 4) << 0; \
14262
206
    tmp |= fieldname(insn, 16, 4) << 0; \
14263
206
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14264
206
    return S; \
14265
1.49k
  case 303: \
14266
1.49k
    tmp = fieldname(insn, 8, 4); \
14267
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14268
1.49k
    tmp = fieldname(insn, 16, 4); \
14269
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14270
1.49k
    tmp = fieldname(insn, 0, 4); \
14271
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14272
1.49k
    tmp = fieldname(insn, 12, 4); \
14273
1.49k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14274
1.49k
    return S; \
14275
1.49k
  case 304: \
14276
988
    tmp = fieldname(insn, 12, 4); \
14277
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14278
988
    tmp = fieldname(insn, 8, 4); \
14279
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14280
988
    tmp = fieldname(insn, 16, 4); \
14281
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14282
988
    tmp = fieldname(insn, 0, 4); \
14283
988
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14284
988
    return S; \
14285
988
  case 305: \
14286
312
    tmp = fieldname(insn, 8, 4); \
14287
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14288
312
    tmp = fieldname(insn, 16, 4); \
14289
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14290
312
    tmp = fieldname(insn, 0, 4); \
14291
312
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14292
312
    return S; \
14293
410
  case 306: \
14294
410
    tmp = fieldname(insn, 12, 4); \
14295
410
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14296
410
    tmp = 0; \
14297
410
    tmp |= fieldname(insn, 0, 4) << 2; \
14298
410
    tmp |= fieldname(insn, 4, 2) << 0; \
14299
410
    tmp |= fieldname(insn, 16, 4) << 6; \
14300
410
    if (!Check(&S, DecodeT2AddrModeSOReg(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14301
410
    return S; \
14302
410
  case 307: \
14303
85
    tmp = fieldname(insn, 12, 4); \
14304
85
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14305
85
    tmp = 0; \
14306
85
    tmp |= fieldname(insn, 0, 8) << 0; \
14307
85
    tmp |= fieldname(insn, 9, 1) << 8; \
14308
85
    tmp |= fieldname(insn, 16, 4) << 9; \
14309
85
    if (!Check(&S, DecodeT2AddrModeImm8(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14310
85
    return S; \
14311
257
  case 308: \
14312
257
    tmp = fieldname(insn, 12, 4); \
14313
257
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14314
257
    tmp = 0; \
14315
257
    tmp |= fieldname(insn, 0, 12) << 0; \
14316
257
    tmp |= fieldname(insn, 16, 4) << 13; \
14317
257
    if (!Check(&S, DecodeT2AddrModeImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14318
257
    return S; \
14319
1.18k
  case 309: \
14320
1.18k
    tmp = fieldname(insn, 12, 4); \
14321
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14322
1.18k
    tmp = fieldname(insn, 8, 4); \
14323
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14324
1.18k
    tmp = fieldname(insn, 16, 4); \
14325
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14326
1.18k
    tmp = fieldname(insn, 0, 4); \
14327
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14328
1.18k
    tmp = fieldname(insn, 12, 4); \
14329
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14330
1.18k
    tmp = fieldname(insn, 8, 4); \
14331
1.18k
    if (!Check(&S, DecoderGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14332
1.18k
    return S; \
14333
1.18k
  case 310: \
14334
634
    tmp = fieldname(insn, 8, 4); \
14335
634
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14336
634
    tmp = fieldname(insn, 4, 4); \
14337
632
    MCOperand_CreateImm0(MI, tmp); \
14338
632
    tmp = fieldname(insn, 12, 4); \
14339
632
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14340
632
    tmp = fieldname(insn, 16, 4); \
14341
632
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14342
632
    tmp = fieldname(insn, 0, 4); \
14343
632
    MCOperand_CreateImm0(MI, tmp); \
14344
632
    return S; \
14345
632
  case 311: \
14346
275
    tmp = fieldname(insn, 12, 4); \
14347
275
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14348
275
    tmp = fieldname(insn, 16, 4); \
14349
275
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14350
275
    tmp = fieldname(insn, 8, 4); \
14351
275
    if (!Check(&S, DecodeCoprocessor(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14352
275
    tmp = fieldname(insn, 4, 4); \
14353
273
    MCOperand_CreateImm0(MI, tmp); \
14354
273
    tmp = fieldname(insn, 0, 4); \
14355
273
    MCOperand_CreateImm0(MI, tmp); \
14356
273
    return S; \
14357
275
  case 312: \
14358
0
    tmp = fieldname(insn, 0, 3); \
14359
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14360
0
    tmp = fieldname(insn, 3, 3); \
14361
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14362
0
    tmp = fieldname(insn, 6, 5); \
14363
0
    MCOperand_CreateImm0(MI, tmp); \
14364
0
    return S; \
14365
0
  case 313: \
14366
0
    tmp = fieldname(insn, 0, 3); \
14367
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14368
0
    tmp = fieldname(insn, 3, 3); \
14369
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14370
0
    tmp = fieldname(insn, 6, 3); \
14371
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14372
0
    return S; \
14373
0
  case 314: \
14374
0
    tmp = fieldname(insn, 0, 3); \
14375
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14376
0
    tmp = fieldname(insn, 3, 3); \
14377
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14378
0
    tmp = fieldname(insn, 6, 3); \
14379
0
    MCOperand_CreateImm0(MI, tmp); \
14380
0
    return S; \
14381
0
  case 315: \
14382
0
    tmp = fieldname(insn, 8, 3); \
14383
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14384
0
    tmp = fieldname(insn, 8, 3); \
14385
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14386
0
    tmp = fieldname(insn, 0, 8); \
14387
0
    MCOperand_CreateImm0(MI, tmp); \
14388
0
    return S; \
14389
0
  case 316: \
14390
0
    tmp = fieldname(insn, 0, 3); \
14391
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14392
0
    tmp = fieldname(insn, 0, 3); \
14393
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14394
0
    tmp = fieldname(insn, 3, 3); \
14395
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14396
0
    return S; \
14397
0
  case 317: \
14398
0
    tmp = fieldname(insn, 0, 3); \
14399
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14400
0
    tmp = fieldname(insn, 3, 3); \
14401
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14402
0
    tmp = fieldname(insn, 0, 3); \
14403
0
    if (!Check(&S, DecodetGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14404
0
    return S; \
14405
887
  case 318: \
14406
887
    tmp = 0; \
14407
887
    tmp |= fieldname(insn, 12, 4) << 1; \
14408
887
    tmp |= fieldname(insn, 22, 1) << 0; \
14409
887
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14410
887
    tmp = 0; \
14411
887
    tmp |= fieldname(insn, 0, 8) << 0; \
14412
887
    tmp |= fieldname(insn, 16, 4) << 9; \
14413
887
    tmp |= fieldname(insn, 23, 1) << 8; \
14414
887
    if (!Check(&S, DecodeAddrMode5FP16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14415
887
    tmp = fieldname(insn, 28, 4); \
14416
887
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14417
887
    return S; \
14418
887
  case 319: \
14419
634
    tmp = 0; \
14420
634
    tmp |= fieldname(insn, 12, 4) << 1; \
14421
634
    tmp |= fieldname(insn, 22, 1) << 0; \
14422
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14423
634
    tmp = 0; \
14424
634
    tmp |= fieldname(insn, 12, 4) << 1; \
14425
634
    tmp |= fieldname(insn, 22, 1) << 0; \
14426
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14427
634
    tmp = 0; \
14428
634
    tmp |= fieldname(insn, 7, 1) << 0; \
14429
634
    tmp |= fieldname(insn, 16, 4) << 1; \
14430
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14431
634
    tmp = 0; \
14432
634
    tmp |= fieldname(insn, 0, 4) << 1; \
14433
634
    tmp |= fieldname(insn, 5, 1) << 0; \
14434
634
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14435
634
    tmp = fieldname(insn, 28, 4); \
14436
634
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14437
634
    return S; \
14438
634
  case 320: \
14439
337
    tmp = 0; \
14440
337
    tmp |= fieldname(insn, 12, 4) << 1; \
14441
337
    tmp |= fieldname(insn, 22, 1) << 0; \
14442
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14443
337
    tmp = 0; \
14444
337
    tmp |= fieldname(insn, 7, 1) << 0; \
14445
337
    tmp |= fieldname(insn, 16, 4) << 1; \
14446
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14447
337
    tmp = 0; \
14448
337
    tmp |= fieldname(insn, 0, 4) << 1; \
14449
337
    tmp |= fieldname(insn, 5, 1) << 0; \
14450
337
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14451
337
    tmp = fieldname(insn, 28, 4); \
14452
337
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14453
337
    return S; \
14454
424
  case 321: \
14455
424
    tmp = 0; \
14456
424
    tmp |= fieldname(insn, 7, 1) << 0; \
14457
424
    tmp |= fieldname(insn, 16, 4) << 1; \
14458
424
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14459
424
    tmp = fieldname(insn, 12, 4); \
14460
424
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14461
424
    tmp = fieldname(insn, 28, 4); \
14462
424
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14463
424
    return S; \
14464
627
  case 322: \
14465
627
    if (!Check(&S, DecodeVMOVSRR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14466
627
    return S; \
14467
949
  case 323: \
14468
949
    tmp = fieldname(insn, 16, 4); \
14469
949
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14470
949
    tmp = fieldname(insn, 28, 4); \
14471
949
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14472
949
    tmp = 0; \
14473
722
    tmp |= fieldname(insn, 0, 8) << 0; \
14474
722
    tmp |= fieldname(insn, 12, 4) << 9; \
14475
722
    tmp |= fieldname(insn, 22, 1) << 8; \
14476
722
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14477
722
    return S; \
14478
722
  case 324: \
14479
532
    tmp = 0; \
14480
532
    tmp |= fieldname(insn, 12, 4) << 1; \
14481
532
    tmp |= fieldname(insn, 22, 1) << 0; \
14482
532
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14483
532
    tmp = 0; \
14484
532
    tmp |= fieldname(insn, 0, 8) << 0; \
14485
532
    tmp |= fieldname(insn, 16, 4) << 9; \
14486
532
    tmp |= fieldname(insn, 23, 1) << 8; \
14487
532
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14488
532
    tmp = fieldname(insn, 28, 4); \
14489
532
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14490
532
    return S; \
14491
804
  case 325: \
14492
804
    tmp = 0; \
14493
804
    tmp |= fieldname(insn, 12, 4) << 1; \
14494
804
    tmp |= fieldname(insn, 22, 1) << 0; \
14495
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14496
804
    tmp = 0; \
14497
804
    tmp |= fieldname(insn, 12, 4) << 1; \
14498
804
    tmp |= fieldname(insn, 22, 1) << 0; \
14499
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14500
804
    tmp = 0; \
14501
804
    tmp |= fieldname(insn, 7, 1) << 0; \
14502
804
    tmp |= fieldname(insn, 16, 4) << 1; \
14503
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14504
804
    tmp = 0; \
14505
804
    tmp |= fieldname(insn, 0, 4) << 1; \
14506
804
    tmp |= fieldname(insn, 5, 1) << 0; \
14507
804
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14508
804
    tmp = fieldname(insn, 28, 4); \
14509
804
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14510
804
    return S; \
14511
804
  case 326: \
14512
310
    tmp = 0; \
14513
310
    tmp |= fieldname(insn, 12, 4) << 1; \
14514
310
    tmp |= fieldname(insn, 22, 1) << 0; \
14515
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14516
310
    tmp = 0; \
14517
310
    tmp |= fieldname(insn, 7, 1) << 0; \
14518
310
    tmp |= fieldname(insn, 16, 4) << 1; \
14519
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14520
310
    tmp = 0; \
14521
310
    tmp |= fieldname(insn, 0, 4) << 1; \
14522
310
    tmp |= fieldname(insn, 5, 1) << 0; \
14523
310
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14524
310
    tmp = fieldname(insn, 28, 4); \
14525
310
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14526
310
    return S; \
14527
486
  case 327: \
14528
486
    tmp = 0; \
14529
486
    tmp |= fieldname(insn, 7, 1) << 0; \
14530
486
    tmp |= fieldname(insn, 16, 4) << 1; \
14531
486
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14532
486
    tmp = fieldname(insn, 12, 4); \
14533
486
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14534
486
    tmp = fieldname(insn, 28, 4); \
14535
486
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14536
486
    return S; \
14537
486
  case 328: \
14538
70
    tmp = 0; \
14539
70
    tmp |= fieldname(insn, 0, 4) << 0; \
14540
70
    tmp |= fieldname(insn, 5, 1) << 4; \
14541
70
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14542
70
    tmp = fieldname(insn, 12, 4); \
14543
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14544
70
    tmp = fieldname(insn, 16, 4); \
14545
70
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14546
70
    tmp = fieldname(insn, 28, 4); \
14547
70
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14548
70
    return S; \
14549
1.18k
  case 329: \
14550
1.18k
    tmp = fieldname(insn, 16, 4); \
14551
1.18k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14552
1.18k
    tmp = fieldname(insn, 28, 4); \
14553
1.18k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14554
1.18k
    tmp = 0; \
14555
1.11k
    tmp |= fieldname(insn, 1, 7) << 1; \
14556
1.11k
    tmp |= fieldname(insn, 12, 4) << 8; \
14557
1.11k
    tmp |= fieldname(insn, 22, 1) << 12; \
14558
1.11k
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14559
1.11k
    return S; \
14560
1.11k
  case 330: \
14561
390
    tmp = fieldname(insn, 16, 4); \
14562
390
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14563
390
    tmp = fieldname(insn, 28, 4); \
14564
390
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14565
390
    tmp = 0; \
14566
324
    tmp |= fieldname(insn, 1, 7) << 1; \
14567
324
    tmp |= fieldname(insn, 12, 4) << 8; \
14568
324
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14569
324
    return S; \
14570
523
  case 331: \
14571
523
    tmp = 0; \
14572
523
    tmp |= fieldname(insn, 12, 4) << 0; \
14573
523
    tmp |= fieldname(insn, 22, 1) << 4; \
14574
523
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14575
523
    tmp = 0; \
14576
523
    tmp |= fieldname(insn, 0, 8) << 0; \
14577
523
    tmp |= fieldname(insn, 16, 4) << 9; \
14578
523
    tmp |= fieldname(insn, 23, 1) << 8; \
14579
523
    if (!Check(&S, DecodeAddrMode5Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14580
523
    tmp = fieldname(insn, 28, 4); \
14581
523
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14582
523
    return S; \
14583
567
  case 332: \
14584
567
    tmp = 0; \
14585
567
    tmp |= fieldname(insn, 12, 4) << 0; \
14586
567
    tmp |= fieldname(insn, 22, 1) << 4; \
14587
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14588
567
    tmp = 0; \
14589
567
    tmp |= fieldname(insn, 12, 4) << 0; \
14590
567
    tmp |= fieldname(insn, 22, 1) << 4; \
14591
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14592
567
    tmp = 0; \
14593
567
    tmp |= fieldname(insn, 7, 1) << 4; \
14594
567
    tmp |= fieldname(insn, 16, 4) << 0; \
14595
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14596
567
    tmp = 0; \
14597
567
    tmp |= fieldname(insn, 0, 4) << 0; \
14598
567
    tmp |= fieldname(insn, 5, 1) << 4; \
14599
567
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14600
567
    tmp = fieldname(insn, 28, 4); \
14601
567
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14602
567
    return S; \
14603
567
  case 333: \
14604
356
    tmp = 0; \
14605
356
    tmp |= fieldname(insn, 12, 4) << 0; \
14606
356
    tmp |= fieldname(insn, 22, 1) << 4; \
14607
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14608
356
    tmp = 0; \
14609
356
    tmp |= fieldname(insn, 7, 1) << 4; \
14610
356
    tmp |= fieldname(insn, 16, 4) << 0; \
14611
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14612
356
    tmp = 0; \
14613
356
    tmp |= fieldname(insn, 0, 4) << 0; \
14614
356
    tmp |= fieldname(insn, 5, 1) << 4; \
14615
356
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14616
356
    tmp = fieldname(insn, 28, 4); \
14617
356
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14618
356
    return S; \
14619
356
  case 334: \
14620
316
    tmp = fieldname(insn, 12, 4); \
14621
316
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14622
316
    tmp = 0; \
14623
316
    tmp |= fieldname(insn, 7, 1) << 0; \
14624
316
    tmp |= fieldname(insn, 16, 4) << 1; \
14625
316
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14626
316
    tmp = fieldname(insn, 28, 4); \
14627
316
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14628
316
    return S; \
14629
1.05k
  case 335: \
14630
1.05k
    if (!Check(&S, DecodeVMOVRRS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14631
1.05k
    return S; \
14632
1.05k
  case 336: \
14633
161
    tmp = fieldname(insn, 12, 4); \
14634
161
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14635
161
    tmp = 0; \
14636
161
    tmp |= fieldname(insn, 7, 1) << 0; \
14637
161
    tmp |= fieldname(insn, 16, 4) << 1; \
14638
161
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14639
161
    tmp = fieldname(insn, 28, 4); \
14640
161
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14641
161
    return S; \
14642
161
  case 337: \
14643
75
    tmp = fieldname(insn, 12, 4); \
14644
75
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14645
75
    tmp = fieldname(insn, 16, 4); \
14646
75
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14647
75
    tmp = 0; \
14648
75
    tmp |= fieldname(insn, 0, 4) << 0; \
14649
75
    tmp |= fieldname(insn, 5, 1) << 4; \
14650
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14651
75
    tmp = fieldname(insn, 28, 4); \
14652
75
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14653
75
    return S; \
14654
349
  case 338: \
14655
349
    tmp = fieldname(insn, 16, 4); \
14656
349
    if (!Check(&S, DecodeGPRnopcRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14657
349
    tmp = fieldname(insn, 28, 4); \
14658
349
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14659
349
    return S; \
14660
841
  case 339: \
14661
841
    tmp = fieldname(insn, 16, 4); \
14662
841
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14663
841
    tmp = fieldname(insn, 16, 4); \
14664
841
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14665
841
    tmp = fieldname(insn, 28, 4); \
14666
841
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14667
841
    tmp = 0; \
14668
766
    tmp |= fieldname(insn, 0, 8) << 0; \
14669
766
    tmp |= fieldname(insn, 12, 4) << 9; \
14670
766
    tmp |= fieldname(insn, 22, 1) << 8; \
14671
766
    if (!Check(&S, DecodeSPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14672
766
    return S; \
14673
1.14k
  case 340: \
14674
1.14k
    tmp = fieldname(insn, 16, 4); \
14675
1.14k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14676
1.14k
    tmp = fieldname(insn, 16, 4); \
14677
1.14k
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14678
1.14k
    tmp = fieldname(insn, 28, 4); \
14679
1.14k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14680
1.14k
    tmp = 0; \
14681
995
    tmp |= fieldname(insn, 1, 7) << 1; \
14682
995
    tmp |= fieldname(insn, 12, 4) << 8; \
14683
995
    tmp |= fieldname(insn, 22, 1) << 12; \
14684
995
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14685
995
    return S; \
14686
995
  case 341: \
14687
939
    tmp = fieldname(insn, 16, 4); \
14688
939
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14689
939
    tmp = fieldname(insn, 16, 4); \
14690
939
    if (!Check(&S, DecodeGPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14691
939
    tmp = fieldname(insn, 28, 4); \
14692
939
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14693
939
    tmp = 0; \
14694
636
    tmp |= fieldname(insn, 1, 7) << 1; \
14695
636
    tmp |= fieldname(insn, 12, 4) << 8; \
14696
636
    if (!Check(&S, DecodeDPRRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14697
636
    return S; \
14698
4.72k
  case 342: \
14699
4.72k
    if (!Check(&S, DecodeForVMRSandVMSR(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14700
4.72k
    return S; \
14701
4.72k
  case 343: \
14702
155
    tmp = 0; \
14703
155
    tmp |= fieldname(insn, 12, 4) << 1; \
14704
155
    tmp |= fieldname(insn, 22, 1) << 0; \
14705
155
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14706
155
    tmp = 0; \
14707
155
    tmp |= fieldname(insn, 0, 4) << 0; \
14708
155
    tmp |= fieldname(insn, 16, 4) << 4; \
14709
155
    MCOperand_CreateImm0(MI, tmp); \
14710
155
    tmp = fieldname(insn, 28, 4); \
14711
155
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14712
155
    return S; \
14713
475
  case 344: \
14714
475
    tmp = 0; \
14715
475
    tmp |= fieldname(insn, 12, 4) << 1; \
14716
475
    tmp |= fieldname(insn, 22, 1) << 0; \
14717
475
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14718
475
    tmp = 0; \
14719
475
    tmp |= fieldname(insn, 0, 4) << 1; \
14720
475
    tmp |= fieldname(insn, 5, 1) << 0; \
14721
475
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14722
475
    tmp = fieldname(insn, 28, 4); \
14723
475
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14724
475
    return S; \
14725
475
  case 345: \
14726
275
    tmp = 0; \
14727
275
    tmp |= fieldname(insn, 12, 4) << 1; \
14728
275
    tmp |= fieldname(insn, 22, 1) << 0; \
14729
275
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14730
275
    tmp = fieldname(insn, 28, 4); \
14731
275
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14732
275
    return S; \
14733
432
  case 346: \
14734
432
    tmp = 0; \
14735
432
    tmp |= fieldname(insn, 12, 4) << 1; \
14736
432
    tmp |= fieldname(insn, 22, 1) << 0; \
14737
432
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14738
432
    tmp = 0; \
14739
432
    tmp |= fieldname(insn, 0, 4) << 1; \
14740
432
    tmp |= fieldname(insn, 5, 1) << 0; \
14741
432
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14742
432
    tmp = fieldname(insn, 28, 4); \
14743
432
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14744
432
    return S; \
14745
494
  case 347: \
14746
494
    tmp = 0; \
14747
494
    tmp |= fieldname(insn, 12, 4) << 1; \
14748
494
    tmp |= fieldname(insn, 22, 1) << 0; \
14749
494
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14750
494
    tmp = 0; \
14751
494
    tmp |= fieldname(insn, 0, 4) << 1; \
14752
494
    tmp |= fieldname(insn, 5, 1) << 0; \
14753
494
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14754
494
    tmp = fieldname(insn, 28, 4); \
14755
494
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14756
494
    return S; \
14757
1.09k
  case 348: \
14758
1.09k
    tmp = 0; \
14759
1.09k
    tmp |= fieldname(insn, 12, 4) << 1; \
14760
1.09k
    tmp |= fieldname(insn, 22, 1) << 0; \
14761
1.09k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14762
1.09k
    tmp = 0; \
14763
1.09k
    tmp |= fieldname(insn, 12, 4) << 1; \
14764
1.09k
    tmp |= fieldname(insn, 22, 1) << 0; \
14765
1.09k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14766
1.09k
    tmp = 0; \
14767
1.09k
    tmp |= fieldname(insn, 0, 4) << 1; \
14768
1.09k
    tmp |= fieldname(insn, 5, 1) << 0; \
14769
1.09k
    MCOperand_CreateImm0(MI, tmp); \
14770
1.09k
    tmp = fieldname(insn, 28, 4); \
14771
1.09k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14772
1.09k
    return S; \
14773
1.09k
  case 349: \
14774
925
    tmp = 0; \
14775
925
    tmp |= fieldname(insn, 12, 4) << 1; \
14776
925
    tmp |= fieldname(insn, 22, 1) << 0; \
14777
925
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14778
925
    tmp = 0; \
14779
925
    tmp |= fieldname(insn, 0, 4) << 1; \
14780
925
    tmp |= fieldname(insn, 5, 1) << 0; \
14781
925
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14782
925
    tmp = fieldname(insn, 28, 4); \
14783
925
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14784
925
    return S; \
14785
925
  case 350: \
14786
73
    tmp = 0; \
14787
73
    tmp |= fieldname(insn, 12, 4) << 1; \
14788
73
    tmp |= fieldname(insn, 22, 1) << 0; \
14789
73
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14790
73
    tmp = 0; \
14791
73
    tmp |= fieldname(insn, 0, 4) << 0; \
14792
73
    tmp |= fieldname(insn, 16, 4) << 4; \
14793
73
    MCOperand_CreateImm0(MI, tmp); \
14794
73
    tmp = fieldname(insn, 28, 4); \
14795
73
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14796
73
    return S; \
14797
79
  case 351: \
14798
79
    tmp = 0; \
14799
79
    tmp |= fieldname(insn, 12, 4) << 1; \
14800
79
    tmp |= fieldname(insn, 22, 1) << 0; \
14801
79
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14802
79
    tmp = fieldname(insn, 28, 4); \
14803
79
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14804
79
    return S; \
14805
685
  case 352: \
14806
685
    tmp = 0; \
14807
685
    tmp |= fieldname(insn, 12, 4) << 0; \
14808
685
    tmp |= fieldname(insn, 22, 1) << 4; \
14809
685
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14810
685
    tmp = 0; \
14811
685
    tmp |= fieldname(insn, 0, 4) << 1; \
14812
685
    tmp |= fieldname(insn, 5, 1) << 0; \
14813
685
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14814
685
    tmp = fieldname(insn, 28, 4); \
14815
685
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14816
685
    return S; \
14817
685
  case 353: \
14818
198
    tmp = 0; \
14819
198
    tmp |= fieldname(insn, 12, 4) << 0; \
14820
198
    tmp |= fieldname(insn, 22, 1) << 4; \
14821
198
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14822
198
    tmp = 0; \
14823
198
    tmp |= fieldname(insn, 0, 4) << 0; \
14824
198
    tmp |= fieldname(insn, 16, 4) << 4; \
14825
198
    MCOperand_CreateImm0(MI, tmp); \
14826
198
    tmp = fieldname(insn, 28, 4); \
14827
198
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14828
198
    return S; \
14829
453
  case 354: \
14830
453
    tmp = 0; \
14831
453
    tmp |= fieldname(insn, 12, 4) << 0; \
14832
453
    tmp |= fieldname(insn, 22, 1) << 4; \
14833
453
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14834
453
    tmp = 0; \
14835
453
    tmp |= fieldname(insn, 0, 4) << 0; \
14836
453
    tmp |= fieldname(insn, 5, 1) << 4; \
14837
453
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14838
453
    tmp = fieldname(insn, 28, 4); \
14839
453
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14840
453
    return S; \
14841
1.50k
  case 355: \
14842
1.50k
    tmp = 0; \
14843
1.50k
    tmp |= fieldname(insn, 12, 4) << 1; \
14844
1.50k
    tmp |= fieldname(insn, 22, 1) << 0; \
14845
1.50k
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14846
1.50k
    tmp = 0; \
14847
1.50k
    tmp |= fieldname(insn, 0, 4) << 0; \
14848
1.50k
    tmp |= fieldname(insn, 5, 1) << 4; \
14849
1.50k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14850
1.50k
    tmp = fieldname(insn, 28, 4); \
14851
1.50k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14852
1.50k
    return S; \
14853
1.50k
  case 356: \
14854
208
    tmp = 0; \
14855
208
    tmp |= fieldname(insn, 12, 4) << 0; \
14856
208
    tmp |= fieldname(insn, 22, 1) << 4; \
14857
208
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14858
208
    tmp = fieldname(insn, 28, 4); \
14859
208
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14860
208
    return S; \
14861
1.82k
  case 357: \
14862
1.82k
    tmp = 0; \
14863
1.82k
    tmp |= fieldname(insn, 12, 4) << 0; \
14864
1.82k
    tmp |= fieldname(insn, 22, 1) << 4; \
14865
1.82k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14866
1.82k
    tmp = 0; \
14867
1.82k
    tmp |= fieldname(insn, 12, 4) << 0; \
14868
1.82k
    tmp |= fieldname(insn, 22, 1) << 4; \
14869
1.82k
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14870
1.82k
    tmp = 0; \
14871
1.82k
    tmp |= fieldname(insn, 0, 4) << 1; \
14872
1.82k
    tmp |= fieldname(insn, 5, 1) << 0; \
14873
1.82k
    MCOperand_CreateImm0(MI, tmp); \
14874
1.82k
    tmp = fieldname(insn, 28, 4); \
14875
1.82k
    if (!Check(&S, DecodePredicateOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14876
1.82k
    return S; \
14877
1.82k
  case 358: \
14878
76
    tmp = 0; \
14879
76
    tmp |= fieldname(insn, 12, 4) << 0; \
14880
76
    tmp |= fieldname(insn, 22, 1) << 4; \
14881
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14882
76
    tmp = 0; \
14883
76
    tmp |= fieldname(insn, 7, 1) << 4; \
14884
76
    tmp |= fieldname(insn, 16, 4) << 0; \
14885
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14886
76
    tmp = 0; \
14887
76
    tmp |= fieldname(insn, 0, 4) << 0; \
14888
76
    tmp |= fieldname(insn, 5, 1) << 4; \
14889
76
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14890
76
    tmp = fieldname(insn, 24, 1); \
14891
76
    MCOperand_CreateImm0(MI, tmp); \
14892
76
    return S; \
14893
76
  case 359: \
14894
75
    tmp = 0; \
14895
75
    tmp |= fieldname(insn, 12, 4) << 0; \
14896
75
    tmp |= fieldname(insn, 22, 1) << 4; \
14897
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14898
75
    tmp = 0; \
14899
75
    tmp |= fieldname(insn, 12, 4) << 0; \
14900
75
    tmp |= fieldname(insn, 22, 1) << 4; \
14901
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14902
75
    tmp = 0; \
14903
75
    tmp |= fieldname(insn, 7, 1) << 4; \
14904
75
    tmp |= fieldname(insn, 16, 4) << 0; \
14905
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14906
75
    tmp = 0; \
14907
75
    tmp |= fieldname(insn, 0, 4) << 0; \
14908
75
    tmp |= fieldname(insn, 5, 1) << 4; \
14909
75
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14910
75
    tmp = fieldname(insn, 23, 2); \
14911
75
    MCOperand_CreateImm0(MI, tmp); \
14912
75
    return S; \
14913
75
  case 360: \
14914
66
    tmp = 0; \
14915
66
    tmp |= fieldname(insn, 12, 4) << 0; \
14916
66
    tmp |= fieldname(insn, 22, 1) << 4; \
14917
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14918
66
    tmp = 0; \
14919
66
    tmp |= fieldname(insn, 12, 4) << 0; \
14920
66
    tmp |= fieldname(insn, 22, 1) << 4; \
14921
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14922
66
    tmp = 0; \
14923
66
    tmp |= fieldname(insn, 7, 1) << 4; \
14924
66
    tmp |= fieldname(insn, 16, 4) << 0; \
14925
66
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14926
66
    tmp = fieldname(insn, 0, 4); \
14927
66
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14928
66
    tmp = fieldname(insn, 5, 1); \
14929
66
    MCOperand_CreateImm0(MI, tmp); \
14930
66
    tmp = fieldname(insn, 20, 2); \
14931
66
    MCOperand_CreateImm0(MI, tmp); \
14932
66
    return S; \
14933
737
  case 361: \
14934
737
    if (!Check(&S, DecodeNEONComplexLane64Instruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
14935
737
    return S; \
14936
737
  case 362: \
14937
69
    tmp = 0; \
14938
69
    tmp |= fieldname(insn, 12, 4) << 0; \
14939
69
    tmp |= fieldname(insn, 22, 1) << 4; \
14940
69
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14941
69
    tmp = 0; \
14942
68
    tmp |= fieldname(insn, 7, 1) << 4; \
14943
68
    tmp |= fieldname(insn, 16, 4) << 0; \
14944
68
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14945
68
    tmp = 0; \
14946
67
    tmp |= fieldname(insn, 0, 4) << 0; \
14947
67
    tmp |= fieldname(insn, 5, 1) << 4; \
14948
67
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14949
67
    tmp = fieldname(insn, 24, 1); \
14950
66
    MCOperand_CreateImm0(MI, tmp); \
14951
66
    return S; \
14952
345
  case 363: \
14953
345
    tmp = 0; \
14954
345
    tmp |= fieldname(insn, 12, 4) << 0; \
14955
345
    tmp |= fieldname(insn, 22, 1) << 4; \
14956
345
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14957
345
    tmp = 0; \
14958
344
    tmp |= fieldname(insn, 12, 4) << 0; \
14959
344
    tmp |= fieldname(insn, 22, 1) << 4; \
14960
344
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14961
344
    tmp = 0; \
14962
344
    tmp |= fieldname(insn, 7, 1) << 4; \
14963
344
    tmp |= fieldname(insn, 16, 4) << 0; \
14964
344
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14965
344
    tmp = 0; \
14966
343
    tmp |= fieldname(insn, 0, 4) << 0; \
14967
343
    tmp |= fieldname(insn, 5, 1) << 4; \
14968
343
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14969
343
    tmp = fieldname(insn, 23, 2); \
14970
342
    MCOperand_CreateImm0(MI, tmp); \
14971
342
    return S; \
14972
343
  case 364: \
14973
81
    tmp = 0; \
14974
81
    tmp |= fieldname(insn, 12, 4) << 0; \
14975
81
    tmp |= fieldname(insn, 22, 1) << 4; \
14976
81
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14977
81
    tmp = 0; \
14978
80
    tmp |= fieldname(insn, 12, 4) << 0; \
14979
80
    tmp |= fieldname(insn, 22, 1) << 4; \
14980
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14981
80
    tmp = 0; \
14982
80
    tmp |= fieldname(insn, 7, 1) << 4; \
14983
80
    tmp |= fieldname(insn, 16, 4) << 0; \
14984
80
    if (!Check(&S, DecodeQPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14985
80
    tmp = fieldname(insn, 0, 4); \
14986
77
    if (!Check(&S, DecodeDPR_VFP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14987
77
    tmp = fieldname(insn, 5, 1); \
14988
77
    MCOperand_CreateImm0(MI, tmp); \
14989
77
    tmp = fieldname(insn, 20, 2); \
14990
77
    MCOperand_CreateImm0(MI, tmp); \
14991
77
    return S; \
14992
213
  case 365: \
14993
213
    tmp = 0; \
14994
213
    tmp |= fieldname(insn, 12, 4) << 1; \
14995
213
    tmp |= fieldname(insn, 22, 1) << 0; \
14996
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
14997
213
    tmp = 0; \
14998
213
    tmp |= fieldname(insn, 7, 1) << 0; \
14999
213
    tmp |= fieldname(insn, 16, 4) << 1; \
15000
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15001
213
    tmp = 0; \
15002
213
    tmp |= fieldname(insn, 0, 4) << 1; \
15003
213
    tmp |= fieldname(insn, 5, 1) << 0; \
15004
213
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15005
213
    return S; \
15006
436
  case 366: \
15007
436
    tmp = 0; \
15008
436
    tmp |= fieldname(insn, 12, 4) << 1; \
15009
436
    tmp |= fieldname(insn, 22, 1) << 0; \
15010
436
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15011
436
    tmp = 0; \
15012
436
    tmp |= fieldname(insn, 0, 4) << 1; \
15013
436
    tmp |= fieldname(insn, 5, 1) << 0; \
15014
436
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15015
436
    return S; \
15016
499
  case 367: \
15017
499
    tmp = 0; \
15018
499
    tmp |= fieldname(insn, 12, 4) << 1; \
15019
499
    tmp |= fieldname(insn, 22, 1) << 0; \
15020
499
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15021
499
    tmp = 0; \
15022
499
    tmp |= fieldname(insn, 0, 4) << 1; \
15023
499
    tmp |= fieldname(insn, 5, 1) << 0; \
15024
499
    if (!Check(&S, DecodeHPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15025
499
    return S; \
15026
499
  case 368: \
15027
480
    tmp = 0; \
15028
480
    tmp |= fieldname(insn, 12, 4) << 1; \
15029
480
    tmp |= fieldname(insn, 22, 1) << 0; \
15030
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15031
480
    tmp = 0; \
15032
480
    tmp |= fieldname(insn, 7, 1) << 0; \
15033
480
    tmp |= fieldname(insn, 16, 4) << 1; \
15034
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15035
480
    tmp = 0; \
15036
480
    tmp |= fieldname(insn, 0, 4) << 1; \
15037
480
    tmp |= fieldname(insn, 5, 1) << 0; \
15038
480
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15039
480
    return S; \
15040
480
  case 369: \
15041
474
    tmp = 0; \
15042
474
    tmp |= fieldname(insn, 12, 4) << 1; \
15043
474
    tmp |= fieldname(insn, 22, 1) << 0; \
15044
474
    if (!Check(&S, DecodeSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15045
474
    tmp = 0; \
15046
474
    tmp |= fieldname(insn, 0, 4) << 0; \
15047
474
    tmp |= fieldname(insn, 5, 1) << 4; \
15048
474
    if (!Check(&S, DecodeDPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
15049
474
    return S; \
15050
380k
  } \
15051
380k
}
15052
15053
#define DecodeInstruction(fname, fieldname, decoder, InsnType) \
15054
static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \
15055
2.13M
    InsnType insn, uint64_t Address) \
15056
2.13M
{ \
15057
2.13M
  unsigned Start, Len, NumToSkip, PIdx, Opc, DecodeIdx; \
15058
2.13M
  InsnType Val, FieldValue, PositiveMask, NegativeMask; \
15059
2.13M
  bool Pred, Fail, DecodeComplete = true; \
15060
2.13M
  uint32_t ExpectedValue; \
15061
2.13M
  const uint8_t *Ptr = DecodeTable; \
15062
2.13M
  uint32_t CurFieldValue = 0; \
15063
2.13M
  DecodeStatus S = MCDisassembler_Success; \
15064
24.6M
  while (true) { \
15065
24.6M
    switch (*Ptr) { \
15066
0
    default: \
15067
0
      return MCDisassembler_Fail; \
15068
4.34M
    case MCD_OPC_ExtractField: { \
15069
4.34M
      Start = *++Ptr; \
15070
4.34M
      Len = *++Ptr; \
15071
4.34M
      ++Ptr; \
15072
4.34M
      CurFieldValue = fieldname(insn, Start, Len); \
15073
4.34M
      break; \
15074
0
    } \
15075
15.7M
    case MCD_OPC_FilterValue: { \
15076
15.7M
      /* Decode the field value. */ \
15077
15.7M
      Val = decodeULEB128(++Ptr, &Len); \
15078
15.7M
      Ptr += Len; \
15079
15.7M
      /* NumToSkip is a plain 24-bit integer. */ \
15080
15.7M
      NumToSkip = *Ptr++; \
15081
15.7M
      NumToSkip |= (*Ptr++) << 8; \
15082
15.7M
      NumToSkip |= (*Ptr++) << 16; \
15083
15.7M
      /* Perform the filter operation. */ \
15084
15.7M
      if (Val != CurFieldValue) \
15085
15.7M
        Ptr += NumToSkip; \
15086
15.7M
      break; \
15087
0
    } \
15088
940k
    case MCD_OPC_CheckField: { \
15089
940k
      Start = *++Ptr; \
15090
940k
      Len = *++Ptr; \
15091
940k
      FieldValue = fieldname(insn, Start, Len); \
15092
940k
      /* Decode the field value. */ \
15093
940k
      ExpectedValue = decodeULEB128(++Ptr, &Len); \
15094
940k
      Ptr += Len; \
15095
940k
      /* NumToSkip is a plain 24-bit integer. */ \
15096
940k
      NumToSkip = *Ptr++; \
15097
940k
      NumToSkip |= (*Ptr++) << 8; \
15098
940k
      NumToSkip |= (*Ptr++) << 16; \
15099
940k
      /* If the actual and expected values don't match, skip. */ \
15100
940k
      if (ExpectedValue != FieldValue) \
15101
940k
        Ptr += NumToSkip; \
15102
940k
      break; \
15103
0
    } \
15104
1.46M
    case MCD_OPC_CheckPredicate: { \
15105
1.46M
      /* Decode the Predicate Index value. */ \
15106
1.46M
      PIdx = decodeULEB128(++Ptr, &Len); \
15107
1.46M
      Ptr += Len; \
15108
1.46M
      /* NumToSkip is a plain 24-bit integer. */ \
15109
1.46M
      NumToSkip = *Ptr++; \
15110
1.46M
      NumToSkip |= (*Ptr++) << 8; \
15111
1.46M
      NumToSkip |= (*Ptr++) << 16; \
15112
1.46M
      /* Check the predicate. */ \
15113
1.46M
      if (!(Pred = checkDecoderPredicate(PIdx, MI))) \
15114
1.46M
        Ptr += NumToSkip; \
15115
1.46M
    /* printf("55 PIdx = %u, Pred = %u\n", PIdx, Pred); */ \
15116
1.46M
      (void)Pred; \
15117
1.46M
      break; \
15118
0
    } \
15119
732k
    case MCD_OPC_Decode: { \
15120
732k
      /* Decode the Opcode value. */ \
15121
732k
      Opc = decodeULEB128(++Ptr, &Len); \
15122
732k
      Ptr += Len; \
15123
732k
      DecodeIdx = decodeULEB128(Ptr, &Len); \
15124
732k
      Ptr += Len; \
15125
732k
      MCInst_clear(MI); \
15126
732k
      MCInst_setOpcode(MI, Opc); \
15127
732k
      S = decoder(S, DecodeIdx, insn, MI, Address, &DecodeComplete); \
15128
732k
      /* assert(DecodeComplete); */ \
15129
732k
      return S; \
15130
0
    } \
15131
0
    case MCD_OPC_TryDecode: { \
15132
0
      /* Decode the Opcode value. */ \
15133
0
      Opc = decodeULEB128(++Ptr, &Len); \
15134
0
      Ptr += Len; \
15135
0
      DecodeIdx = decodeULEB128(Ptr, &Len); \
15136
0
      Ptr += Len; \
15137
0
      /* NumToSkip is a plain 24-bit integer. */ \
15138
0
      NumToSkip = *Ptr++; \
15139
0
      NumToSkip |= (*Ptr++) << 8; \
15140
0
      NumToSkip |= (*Ptr++) << 16; \
15141
0
      /* Perform the decode operation. */ \
15142
0
      MCInst_setOpcode(MI, Opc); \
15143
0
      S = decoder(S, DecodeIdx, insn, MI, Address, &DecodeComplete); \
15144
0
      if (DecodeComplete) { \
15145
0
        /* Decoding complete. */ \
15146
0
        return S; \
15147
0
      } else { \
15148
0
        /* assert(S == MCDisassembler_Fail); */ \
15149
0
        /* If the decoding was incomplete, skip. */ \
15150
0
        Ptr += NumToSkip; \
15151
0
        /* Reset decode status. This also drops a SoftFail status that could be */ \
15152
0
        /* set before the decode attempt. */ \
15153
0
        S = MCDisassembler_Success; \
15154
0
      } \
15155
0
      break; \
15156
0
    } \
15157
25.2k
    case MCD_OPC_SoftFail: { \
15158
25.2k
      /* Decode the mask values. */ \
15159
25.2k
      PositiveMask = decodeULEB128(++Ptr, &Len); \
15160
25.2k
      Ptr += Len; \
15161
25.2k
      NegativeMask = decodeULEB128(Ptr, &Len); \
15162
25.2k
      Ptr += Len; \
15163
25.2k
      Fail = (insn & PositiveMask) || (~insn & NegativeMask); \
15164
25.2k
      if (Fail) \
15165
25.2k
        S = MCDisassembler_SoftFail; \
15166
25.2k
      break; \
15167
0
    } \
15168
1.40M
    case MCD_OPC_Fail: { \
15169
1.40M
      return MCDisassembler_Fail; \
15170
0
    } \
15171
24.6M
    } \
15172
24.6M
  } \
15173
2.13M
  /* llvm_unreachable("bogosity detected in disassembler state machine!");*/  \
15174
2.13M
}
15175
15176
15177
15178
FieldFromInstruction(fieldFromInstruction_2, uint16_t)
15179
DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint16_t)
15180
1.10M
DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint16_t)
15181
15182
FieldFromInstruction(fieldFromInstruction_4, uint32_t)
15183
DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t)
15184
DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t)
15185