Coverage Report

Created: 2025-11-11 06:33

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
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//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
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#endif
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38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.4k
{
50
10.4k
  uint8_t Imm =
51
10.4k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.4k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
4.19k
  case 0:
56
4.19k
    SStream_concat0(O, "eq");
57
4.19k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
4.19k
    break;
59
1.04k
  case 1:
60
1.04k
    SStream_concat0(O, "lt");
61
1.04k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.04k
    break;
63
342
  case 2:
64
342
    SStream_concat0(O, "le");
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342
    op_addAvxCC(MI, X86_AVX_CC_LE);
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342
    break;
67
74
  case 3:
68
74
    SStream_concat0(O, "unord");
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74
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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74
    break;
71
190
  case 4:
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190
    SStream_concat0(O, "neq");
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190
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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190
    break;
75
61
  case 5:
76
61
    SStream_concat0(O, "nlt");
77
61
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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61
    break;
79
193
  case 6:
80
193
    SStream_concat0(O, "nle");
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193
    op_addAvxCC(MI, X86_AVX_CC_NLE);
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193
    break;
83
61
  case 7:
84
61
    SStream_concat0(O, "ord");
85
61
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
61
    break;
87
196
  case 8:
88
196
    SStream_concat0(O, "eq_uq");
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196
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
196
    break;
91
32
  case 9:
92
32
    SStream_concat0(O, "nge");
93
32
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
32
    break;
95
102
  case 0xa:
96
102
    SStream_concat0(O, "ngt");
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102
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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102
    break;
99
14
  case 0xb:
100
14
    SStream_concat0(O, "false");
101
14
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
14
    break;
103
133
  case 0xc:
104
133
    SStream_concat0(O, "neq_oq");
105
133
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
133
    break;
107
35
  case 0xd:
108
35
    SStream_concat0(O, "ge");
109
35
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
35
    break;
111
42
  case 0xe:
112
42
    SStream_concat0(O, "gt");
113
42
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
42
    break;
115
29
  case 0xf:
116
29
    SStream_concat0(O, "true");
117
29
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
29
    break;
119
512
  case 0x10:
120
512
    SStream_concat0(O, "eq_os");
121
512
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
512
    break;
123
121
  case 0x11:
124
121
    SStream_concat0(O, "lt_oq");
125
121
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
121
    break;
127
236
  case 0x12:
128
236
    SStream_concat0(O, "le_oq");
129
236
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
236
    break;
131
147
  case 0x13:
132
147
    SStream_concat0(O, "unord_s");
133
147
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
147
    break;
135
46
  case 0x14:
136
46
    SStream_concat0(O, "neq_us");
137
46
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
46
    break;
139
593
  case 0x15:
140
593
    SStream_concat0(O, "nlt_uq");
141
593
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
593
    break;
143
130
  case 0x16:
144
130
    SStream_concat0(O, "nle_uq");
145
130
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
130
    break;
147
73
  case 0x17:
148
73
    SStream_concat0(O, "ord_s");
149
73
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
73
    break;
151
277
  case 0x18:
152
277
    SStream_concat0(O, "eq_us");
153
277
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
277
    break;
155
8
  case 0x19:
156
8
    SStream_concat0(O, "nge_uq");
157
8
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
8
    break;
159
93
  case 0x1a:
160
93
    SStream_concat0(O, "ngt_uq");
161
93
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
93
    break;
163
564
  case 0x1b:
164
564
    SStream_concat0(O, "false_os");
165
564
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
564
    break;
167
575
  case 0x1c:
168
575
    SStream_concat0(O, "neq_os");
169
575
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
575
    break;
171
146
  case 0x1d:
172
146
    SStream_concat0(O, "ge_oq");
173
146
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
146
    break;
175
35
  case 0x1e:
176
35
    SStream_concat0(O, "gt_oq");
177
35
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
35
    break;
179
168
  case 0x1f:
180
168
    SStream_concat0(O, "true_us");
181
168
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
168
    break;
183
10.4k
  }
184
185
10.4k
  MI->popcode_adjust = Imm + 1;
186
10.4k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.90k
{
190
1.90k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.90k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
564
  case 0:
195
564
    SStream_concat0(O, "lt");
196
564
    op_addXopCC(MI, X86_XOP_CC_LT);
197
564
    break;
198
220
  case 1:
199
220
    SStream_concat0(O, "le");
200
220
    op_addXopCC(MI, X86_XOP_CC_LE);
201
220
    break;
202
299
  case 2:
203
299
    SStream_concat0(O, "gt");
204
299
    op_addXopCC(MI, X86_XOP_CC_GT);
205
299
    break;
206
77
  case 3:
207
77
    SStream_concat0(O, "ge");
208
77
    op_addXopCC(MI, X86_XOP_CC_GE);
209
77
    break;
210
119
  case 4:
211
119
    SStream_concat0(O, "eq");
212
119
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
119
    break;
214
27
  case 5:
215
27
    SStream_concat0(O, "neq");
216
27
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
27
    break;
218
369
  case 6:
219
369
    SStream_concat0(O, "false");
220
369
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
369
    break;
222
234
  case 7:
223
234
    SStream_concat0(O, "true");
224
234
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
234
    break;
226
1.90k
  }
227
1.90k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.62k
{
231
1.62k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.62k
  switch (Imm) {
233
1.05k
  case 0:
234
1.05k
    SStream_concat0(O, "{rn-sae}");
235
1.05k
    op_addAvxSae(MI);
236
1.05k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.05k
    break;
238
284
  case 1:
239
284
    SStream_concat0(O, "{rd-sae}");
240
284
    op_addAvxSae(MI);
241
284
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
284
    break;
243
160
  case 2:
244
160
    SStream_concat0(O, "{ru-sae}");
245
160
    op_addAvxSae(MI);
246
160
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
160
    break;
248
130
  case 3:
249
130
    SStream_concat0(O, "{rz-sae}");
250
130
    op_addAvxSae(MI);
251
130
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
130
    break;
253
0
  default:
254
0
    break; // never reach
255
1.62k
  }
256
1.62k
}
257
#endif