Coverage Report

Created: 2025-12-05 06:11

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
32
#include <libkern/libkern.h>
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#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
11.5k
{
50
11.5k
  uint8_t Imm =
51
11.5k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
11.5k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
4.31k
  case 0:
56
4.31k
    SStream_concat0(O, "eq");
57
4.31k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
4.31k
    break;
59
982
  case 1:
60
982
    SStream_concat0(O, "lt");
61
982
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
982
    break;
63
842
  case 2:
64
842
    SStream_concat0(O, "le");
65
842
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
842
    break;
67
97
  case 3:
68
97
    SStream_concat0(O, "unord");
69
97
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
97
    break;
71
394
  case 4:
72
394
    SStream_concat0(O, "neq");
73
394
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
394
    break;
75
54
  case 5:
76
54
    SStream_concat0(O, "nlt");
77
54
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
54
    break;
79
161
  case 6:
80
161
    SStream_concat0(O, "nle");
81
161
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
161
    break;
83
34
  case 7:
84
34
    SStream_concat0(O, "ord");
85
34
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
34
    break;
87
113
  case 8:
88
113
    SStream_concat0(O, "eq_uq");
89
113
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
113
    break;
91
152
  case 9:
92
152
    SStream_concat0(O, "nge");
93
152
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
152
    break;
95
63
  case 0xa:
96
63
    SStream_concat0(O, "ngt");
97
63
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
63
    break;
99
82
  case 0xb:
100
82
    SStream_concat0(O, "false");
101
82
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
82
    break;
103
117
  case 0xc:
104
117
    SStream_concat0(O, "neq_oq");
105
117
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
117
    break;
107
226
  case 0xd:
108
226
    SStream_concat0(O, "ge");
109
226
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
226
    break;
111
277
  case 0xe:
112
277
    SStream_concat0(O, "gt");
113
277
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
277
    break;
115
128
  case 0xf:
116
128
    SStream_concat0(O, "true");
117
128
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
128
    break;
119
205
  case 0x10:
120
205
    SStream_concat0(O, "eq_os");
121
205
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
205
    break;
123
225
  case 0x11:
124
225
    SStream_concat0(O, "lt_oq");
125
225
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
225
    break;
127
117
  case 0x12:
128
117
    SStream_concat0(O, "le_oq");
129
117
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
117
    break;
131
65
  case 0x13:
132
65
    SStream_concat0(O, "unord_s");
133
65
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
65
    break;
135
36
  case 0x14:
136
36
    SStream_concat0(O, "neq_us");
137
36
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
36
    break;
139
787
  case 0x15:
140
787
    SStream_concat0(O, "nlt_uq");
141
787
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
787
    break;
143
113
  case 0x16:
144
113
    SStream_concat0(O, "nle_uq");
145
113
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
113
    break;
147
255
  case 0x17:
148
255
    SStream_concat0(O, "ord_s");
149
255
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
255
    break;
151
256
  case 0x18:
152
256
    SStream_concat0(O, "eq_us");
153
256
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
256
    break;
155
20
  case 0x19:
156
20
    SStream_concat0(O, "nge_uq");
157
20
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
20
    break;
159
22
  case 0x1a:
160
22
    SStream_concat0(O, "ngt_uq");
161
22
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
22
    break;
163
618
  case 0x1b:
164
618
    SStream_concat0(O, "false_os");
165
618
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
618
    break;
167
509
  case 0x1c:
168
509
    SStream_concat0(O, "neq_os");
169
509
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
509
    break;
171
183
  case 0x1d:
172
183
    SStream_concat0(O, "ge_oq");
173
183
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
183
    break;
175
21
  case 0x1e:
176
21
    SStream_concat0(O, "gt_oq");
177
21
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
21
    break;
179
73
  case 0x1f:
180
73
    SStream_concat0(O, "true_us");
181
73
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
73
    break;
183
11.5k
  }
184
185
11.5k
  MI->popcode_adjust = Imm + 1;
186
11.5k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.74k
{
190
1.74k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.74k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
782
  case 0:
195
782
    SStream_concat0(O, "lt");
196
782
    op_addXopCC(MI, X86_XOP_CC_LT);
197
782
    break;
198
186
  case 1:
199
186
    SStream_concat0(O, "le");
200
186
    op_addXopCC(MI, X86_XOP_CC_LE);
201
186
    break;
202
193
  case 2:
203
193
    SStream_concat0(O, "gt");
204
193
    op_addXopCC(MI, X86_XOP_CC_GT);
205
193
    break;
206
27
  case 3:
207
27
    SStream_concat0(O, "ge");
208
27
    op_addXopCC(MI, X86_XOP_CC_GE);
209
27
    break;
210
4
  case 4:
211
4
    SStream_concat0(O, "eq");
212
4
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
4
    break;
214
51
  case 5:
215
51
    SStream_concat0(O, "neq");
216
51
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
51
    break;
218
372
  case 6:
219
372
    SStream_concat0(O, "false");
220
372
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
372
    break;
222
129
  case 7:
223
129
    SStream_concat0(O, "true");
224
129
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
129
    break;
226
1.74k
  }
227
1.74k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.92k
{
231
2.92k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.92k
  switch (Imm) {
233
2.13k
  case 0:
234
2.13k
    SStream_concat0(O, "{rn-sae}");
235
2.13k
    op_addAvxSae(MI);
236
2.13k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.13k
    break;
238
573
  case 1:
239
573
    SStream_concat0(O, "{rd-sae}");
240
573
    op_addAvxSae(MI);
241
573
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
573
    break;
243
110
  case 2:
244
110
    SStream_concat0(O, "{ru-sae}");
245
110
    op_addAvxSae(MI);
246
110
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
110
    break;
248
103
  case 3:
249
103
    SStream_concat0(O, "{rz-sae}");
250
103
    op_addAvxSae(MI);
251
103
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
103
    break;
253
0
  default:
254
0
    break; // never reach
255
2.92k
  }
256
2.92k
}
257
#endif