Coverage Report

Created: 2026-01-10 06:34

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
11.7k
{
50
11.7k
  uint8_t Imm =
51
11.7k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
11.7k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
5.12k
  case 0:
56
5.12k
    SStream_concat0(O, "eq");
57
5.12k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
5.12k
    break;
59
846
  case 1:
60
846
    SStream_concat0(O, "lt");
61
846
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
846
    break;
63
986
  case 2:
64
986
    SStream_concat0(O, "le");
65
986
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
986
    break;
67
89
  case 3:
68
89
    SStream_concat0(O, "unord");
69
89
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
89
    break;
71
35
  case 4:
72
35
    SStream_concat0(O, "neq");
73
35
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
35
    break;
75
68
  case 5:
76
68
    SStream_concat0(O, "nlt");
77
68
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
68
    break;
79
40
  case 6:
80
40
    SStream_concat0(O, "nle");
81
40
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
40
    break;
83
102
  case 7:
84
102
    SStream_concat0(O, "ord");
85
102
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
102
    break;
87
642
  case 8:
88
642
    SStream_concat0(O, "eq_uq");
89
642
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
642
    break;
91
106
  case 9:
92
106
    SStream_concat0(O, "nge");
93
106
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
106
    break;
95
31
  case 0xa:
96
31
    SStream_concat0(O, "ngt");
97
31
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
31
    break;
99
70
  case 0xb:
100
70
    SStream_concat0(O, "false");
101
70
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
70
    break;
103
323
  case 0xc:
104
323
    SStream_concat0(O, "neq_oq");
105
323
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
323
    break;
107
233
  case 0xd:
108
233
    SStream_concat0(O, "ge");
109
233
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
233
    break;
111
56
  case 0xe:
112
56
    SStream_concat0(O, "gt");
113
56
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
56
    break;
115
102
  case 0xf:
116
102
    SStream_concat0(O, "true");
117
102
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
102
    break;
119
134
  case 0x10:
120
134
    SStream_concat0(O, "eq_os");
121
134
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
134
    break;
123
438
  case 0x11:
124
438
    SStream_concat0(O, "lt_oq");
125
438
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
438
    break;
127
332
  case 0x12:
128
332
    SStream_concat0(O, "le_oq");
129
332
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
332
    break;
131
101
  case 0x13:
132
101
    SStream_concat0(O, "unord_s");
133
101
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
101
    break;
135
86
  case 0x14:
136
86
    SStream_concat0(O, "neq_us");
137
86
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
86
    break;
139
314
  case 0x15:
140
314
    SStream_concat0(O, "nlt_uq");
141
314
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
314
    break;
143
99
  case 0x16:
144
99
    SStream_concat0(O, "nle_uq");
145
99
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
99
    break;
147
111
  case 0x17:
148
111
    SStream_concat0(O, "ord_s");
149
111
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
111
    break;
151
144
  case 0x18:
152
144
    SStream_concat0(O, "eq_us");
153
144
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
144
    break;
155
95
  case 0x19:
156
95
    SStream_concat0(O, "nge_uq");
157
95
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
95
    break;
159
135
  case 0x1a:
160
135
    SStream_concat0(O, "ngt_uq");
161
135
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
135
    break;
163
330
  case 0x1b:
164
330
    SStream_concat0(O, "false_os");
165
330
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
330
    break;
167
212
  case 0x1c:
168
212
    SStream_concat0(O, "neq_os");
169
212
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
212
    break;
171
36
  case 0x1d:
172
36
    SStream_concat0(O, "ge_oq");
173
36
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
36
    break;
175
75
  case 0x1e:
176
75
    SStream_concat0(O, "gt_oq");
177
75
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
75
    break;
179
215
  case 0x1f:
180
215
    SStream_concat0(O, "true_us");
181
215
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
215
    break;
183
11.7k
  }
184
185
11.7k
  MI->popcode_adjust = Imm + 1;
186
11.7k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.93k
{
190
2.93k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.93k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
765
  case 0:
195
765
    SStream_concat0(O, "lt");
196
765
    op_addXopCC(MI, X86_XOP_CC_LT);
197
765
    break;
198
80
  case 1:
199
80
    SStream_concat0(O, "le");
200
80
    op_addXopCC(MI, X86_XOP_CC_LE);
201
80
    break;
202
369
  case 2:
203
369
    SStream_concat0(O, "gt");
204
369
    op_addXopCC(MI, X86_XOP_CC_GT);
205
369
    break;
206
19
  case 3:
207
19
    SStream_concat0(O, "ge");
208
19
    op_addXopCC(MI, X86_XOP_CC_GE);
209
19
    break;
210
250
  case 4:
211
250
    SStream_concat0(O, "eq");
212
250
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
250
    break;
214
189
  case 5:
215
189
    SStream_concat0(O, "neq");
216
189
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
189
    break;
218
1.23k
  case 6:
219
1.23k
    SStream_concat0(O, "false");
220
1.23k
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
1.23k
    break;
222
21
  case 7:
223
21
    SStream_concat0(O, "true");
224
21
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
21
    break;
226
2.93k
  }
227
2.93k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
3.09k
{
231
3.09k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
3.09k
  switch (Imm) {
233
2.09k
  case 0:
234
2.09k
    SStream_concat0(O, "{rn-sae}");
235
2.09k
    op_addAvxSae(MI);
236
2.09k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.09k
    break;
238
609
  case 1:
239
609
    SStream_concat0(O, "{rd-sae}");
240
609
    op_addAvxSae(MI);
241
609
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
609
    break;
243
251
  case 2:
244
251
    SStream_concat0(O, "{ru-sae}");
245
251
    op_addAvxSae(MI);
246
251
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
251
    break;
248
142
  case 3:
249
142
    SStream_concat0(O, "{rz-sae}");
250
142
    op_addAvxSae(MI);
251
142
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
142
    break;
253
0
  default:
254
0
    break; // never reach
255
3.09k
  }
256
3.09k
}
257
#endif