/src/capstonenext/arch/Mips/MipsGenAsmWriter.inc
Line | Count | Source |
1 | | /* Capstone Disassembly Engine, https://www.capstone-engine.org */ |
2 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */ |
3 | | /* Rot127 <unisono@quyllur.org> 2022-2024 */ |
4 | | /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ |
5 | | |
6 | | /* LLVM-commit: <commit> */ |
7 | | /* LLVM-tag: <tag> */ |
8 | | |
9 | | /* Do not edit. */ |
10 | | |
11 | | /* Capstone's LLVM TableGen Backends: */ |
12 | | /* https://github.com/capstone-engine/llvm-capstone */ |
13 | | |
14 | | #include <capstone/platform.h> |
15 | | #include "../../cs_priv.h" |
16 | | |
17 | | /// getMnemonic - This method is automatically generated by tablegen |
18 | | /// from the instruction set description. |
19 | 91.2k | static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { |
20 | 91.2k | #ifndef CAPSTONE_DIET |
21 | 91.2k | static const char AsmStrs[] = { |
22 | 91.2k | /* 0 */ "ins \t\0" |
23 | 91.2k | /* 6 */ "dmfc0\t\0" |
24 | 91.2k | /* 13 */ "dmfgc0\t\0" |
25 | 91.2k | /* 21 */ "mfhgc0\t\0" |
26 | 91.2k | /* 29 */ "mthgc0\t\0" |
27 | 91.2k | /* 37 */ "dmtgc0\t\0" |
28 | 91.2k | /* 45 */ "mfhc0\t\0" |
29 | 91.2k | /* 52 */ "mthc0\t\0" |
30 | 91.2k | /* 59 */ "dmtc0\t\0" |
31 | 91.2k | /* 66 */ "vmm0\t\0" |
32 | 91.2k | /* 72 */ "mtm0\t\0" |
33 | 91.2k | /* 78 */ "mtp0\t\0" |
34 | 91.2k | /* 84 */ "bbit0\t\0" |
35 | 91.2k | /* 91 */ "ldc1\t\0" |
36 | 91.2k | /* 97 */ "sdc1\t\0" |
37 | 91.2k | /* 103 */ "cfc1\t\0" |
38 | 91.2k | /* 109 */ "dmfc1\t\0" |
39 | 91.2k | /* 116 */ "mfhc1\t\0" |
40 | 91.2k | /* 123 */ "mthc1\t\0" |
41 | 91.2k | /* 130 */ "ctc1\t\0" |
42 | 91.2k | /* 136 */ "dmtc1\t\0" |
43 | 91.2k | /* 143 */ "lwc1\t\0" |
44 | 91.2k | /* 149 */ "swc1\t\0" |
45 | 91.2k | /* 155 */ "ldxc1\t\0" |
46 | 91.2k | /* 162 */ "sdxc1\t\0" |
47 | 91.2k | /* 169 */ "luxc1\t\0" |
48 | 91.2k | /* 176 */ "suxc1\t\0" |
49 | 91.2k | /* 183 */ "lwxc1\t\0" |
50 | 91.2k | /* 190 */ "swxc1\t\0" |
51 | 91.2k | /* 197 */ "mtm1\t\0" |
52 | 91.2k | /* 203 */ "mtp1\t\0" |
53 | 91.2k | /* 209 */ "bbit1\t\0" |
54 | 91.2k | /* 216 */ "bbit032\t\0" |
55 | 91.2k | /* 225 */ "bbit132\t\0" |
56 | 91.2k | /* 234 */ "dsra32\t\0" |
57 | 91.2k | /* 242 */ "bposge32\t\0" |
58 | 91.2k | /* 252 */ "dsll32\t\0" |
59 | 91.2k | /* 260 */ "dsrl32\t\0" |
60 | 91.2k | /* 268 */ "lwm32\t\0" |
61 | 91.2k | /* 275 */ "swm32\t\0" |
62 | 91.2k | /* 282 */ "drotr32\t\0" |
63 | 91.2k | /* 291 */ "cins32\t\0" |
64 | 91.2k | /* 299 */ "exts32\t\0" |
65 | 91.2k | /* 307 */ "ldc2\t\0" |
66 | 91.2k | /* 313 */ "sdc2\t\0" |
67 | 91.2k | /* 319 */ "cfc2\t\0" |
68 | 91.2k | /* 325 */ "dmfc2\t\0" |
69 | 91.2k | /* 332 */ "mfhc2\t\0" |
70 | 91.2k | /* 339 */ "mthc2\t\0" |
71 | 91.2k | /* 346 */ "ctc2\t\0" |
72 | 91.2k | /* 352 */ "dmtc2\t\0" |
73 | 91.2k | /* 359 */ "lwc2\t\0" |
74 | 91.2k | /* 365 */ "swc2\t\0" |
75 | 91.2k | /* 371 */ "mtm2\t\0" |
76 | 91.2k | /* 377 */ "mtp2\t\0" |
77 | 91.2k | /* 383 */ "addiur2\t\0" |
78 | 91.2k | /* 392 */ "ldc3\t\0" |
79 | 91.2k | /* 398 */ "sdc3\t\0" |
80 | 91.2k | /* 404 */ "lwc3\t\0" |
81 | 91.2k | /* 410 */ "swc3\t\0" |
82 | 91.2k | /* 416 */ "addius5\t\0" |
83 | 91.2k | /* 425 */ "sb16\t\0" |
84 | 91.2k | /* 431 */ "bc16\t\0" |
85 | 91.2k | /* 437 */ "jrc16\t\0" |
86 | 91.2k | /* 444 */ "bnezc16\t\0" |
87 | 91.2k | /* 453 */ "beqzc16\t\0" |
88 | 91.2k | /* 462 */ "and16\t\0" |
89 | 91.2k | /* 469 */ "move16\t\0" |
90 | 91.2k | /* 477 */ "sh16\t\0" |
91 | 91.2k | /* 483 */ "andi16\t\0" |
92 | 91.2k | /* 491 */ "mfhi16\t\0" |
93 | 91.2k | /* 499 */ "li16\t\0" |
94 | 91.2k | /* 505 */ "break16\t\0" |
95 | 91.2k | /* 514 */ "sll16\t\0" |
96 | 91.2k | /* 521 */ "srl16\t\0" |
97 | 91.2k | /* 528 */ "lwm16\t\0" |
98 | 91.2k | /* 535 */ "swm16\t\0" |
99 | 91.2k | /* 542 */ "mflo16\t\0" |
100 | 91.2k | /* 550 */ "sdbbp16\t\0" |
101 | 91.2k | /* 559 */ "jr16\t\0" |
102 | 91.2k | /* 565 */ "xor16\t\0" |
103 | 91.2k | /* 572 */ "jalrs16\t\0" |
104 | 91.2k | /* 581 */ "not16\t\0" |
105 | 91.2k | /* 588 */ "lbu16\t\0" |
106 | 91.2k | /* 595 */ "subu16\t\0" |
107 | 91.2k | /* 603 */ "addu16\t\0" |
108 | 91.2k | /* 611 */ "lhu16\t\0" |
109 | 91.2k | /* 618 */ "lw16\t\0" |
110 | 91.2k | /* 624 */ "sw16\t\0" |
111 | 91.2k | /* 630 */ "bnez16\t\0" |
112 | 91.2k | /* 638 */ "beqz16\t\0" |
113 | 91.2k | /* 646 */ "andi[32]\t\0" |
114 | 91.2k | /* 656 */ "addiu[32]\t\0" |
115 | 91.2k | /* 667 */ "addiu[r2]\t\0" |
116 | 91.2k | /* 678 */ "addiu[rs5]\t\0" |
117 | 91.2k | /* 690 */ "balc[16]\t\0" |
118 | 91.2k | /* 700 */ "andi[16]\t\0" |
119 | 91.2k | /* 710 */ "li[48]\t\0" |
120 | 91.2k | /* 718 */ "addiu[48]\t\0" |
121 | 91.2k | /* 729 */ "addiu[gp48]\t\0" |
122 | 91.2k | /* 742 */ "addiu[gp.b]\t\0" |
123 | 91.2k | /* 755 */ "addiu[neg]\t\0" |
124 | 91.2k | /* 767 */ "addiu[r1.sp]\t\0" |
125 | 91.2k | /* 781 */ "addiu[gp.w]\t\0" |
126 | 91.2k | /* 794 */ "saa\t\0" |
127 | 91.2k | /* 799 */ "preceu.ph.qbla\t\0" |
128 | 91.2k | /* 815 */ "precequ.ph.qbla\t\0" |
129 | 91.2k | /* 832 */ "dla\t\0" |
130 | 91.2k | /* 837 */ "preceu.ph.qbra\t\0" |
131 | 91.2k | /* 853 */ "precequ.ph.qbra\t\0" |
132 | 91.2k | /* 870 */ "dsra\t\0" |
133 | 91.2k | /* 876 */ "dlsa\t\0" |
134 | 91.2k | /* 882 */ "cfcmsa\t\0" |
135 | 91.2k | /* 890 */ "ctcmsa\t\0" |
136 | 91.2k | /* 898 */ "add_a.b\t\0" |
137 | 91.2k | /* 907 */ "min_a.b\t\0" |
138 | 91.2k | /* 916 */ "adds_a.b\t\0" |
139 | 91.2k | /* 926 */ "max_a.b\t\0" |
140 | 91.2k | /* 935 */ "sra.b\t\0" |
141 | 91.2k | /* 942 */ "nloc.b\t\0" |
142 | 91.2k | /* 950 */ "lapc.b\t\0" |
143 | 91.2k | /* 958 */ "nlzc.b\t\0" |
144 | 91.2k | /* 966 */ "sld.b\t\0" |
145 | 91.2k | /* 973 */ "pckod.b\t\0" |
146 | 91.2k | /* 982 */ "ilvod.b\t\0" |
147 | 91.2k | /* 991 */ "insve.b\t\0" |
148 | 91.2k | /* 1000 */ "vshf.b\t\0" |
149 | 91.2k | /* 1008 */ "bneg.b\t\0" |
150 | 91.2k | /* 1016 */ "srai.b\t\0" |
151 | 91.2k | /* 1024 */ "sldi.b\t\0" |
152 | 91.2k | /* 1032 */ "andi.b\t\0" |
153 | 91.2k | /* 1040 */ "bnegi.b\t\0" |
154 | 91.2k | /* 1049 */ "bseli.b\t\0" |
155 | 91.2k | /* 1058 */ "slli.b\t\0" |
156 | 91.2k | /* 1066 */ "srli.b\t\0" |
157 | 91.2k | /* 1074 */ "binsli.b\t\0" |
158 | 91.2k | /* 1084 */ "ceqi.b\t\0" |
159 | 91.2k | /* 1092 */ "srari.b\t\0" |
160 | 91.2k | /* 1101 */ "bclri.b\t\0" |
161 | 91.2k | /* 1110 */ "srlri.b\t\0" |
162 | 91.2k | /* 1119 */ "nori.b\t\0" |
163 | 91.2k | /* 1127 */ "xori.b\t\0" |
164 | 91.2k | /* 1135 */ "binsri.b\t\0" |
165 | 91.2k | /* 1145 */ "splati.b\t\0" |
166 | 91.2k | /* 1155 */ "bseti.b\t\0" |
167 | 91.2k | /* 1164 */ "subvi.b\t\0" |
168 | 91.2k | /* 1173 */ "addvi.b\t\0" |
169 | 91.2k | /* 1182 */ "bmzi.b\t\0" |
170 | 91.2k | /* 1190 */ "bmnzi.b\t\0" |
171 | 91.2k | /* 1199 */ "fill.b\t\0" |
172 | 91.2k | /* 1207 */ "sll.b\t\0" |
173 | 91.2k | /* 1214 */ "srl.b\t\0" |
174 | 91.2k | /* 1221 */ "binsl.b\t\0" |
175 | 91.2k | /* 1230 */ "ilvl.b\t\0" |
176 | 91.2k | /* 1238 */ "ceq.b\t\0" |
177 | 91.2k | /* 1245 */ "srar.b\t\0" |
178 | 91.2k | /* 1253 */ "bclr.b\t\0" |
179 | 91.2k | /* 1261 */ "srlr.b\t\0" |
180 | 91.2k | /* 1269 */ "binsr.b\t\0" |
181 | 91.2k | /* 1278 */ "ilvr.b\t\0" |
182 | 91.2k | /* 1286 */ "asub_s.b\t\0" |
183 | 91.2k | /* 1296 */ "mod_s.b\t\0" |
184 | 91.2k | /* 1305 */ "cle_s.b\t\0" |
185 | 91.2k | /* 1314 */ "ave_s.b\t\0" |
186 | 91.2k | /* 1323 */ "clei_s.b\t\0" |
187 | 91.2k | /* 1333 */ "mini_s.b\t\0" |
188 | 91.2k | /* 1343 */ "clti_s.b\t\0" |
189 | 91.2k | /* 1353 */ "maxi_s.b\t\0" |
190 | 91.2k | /* 1363 */ "min_s.b\t\0" |
191 | 91.2k | /* 1372 */ "aver_s.b\t\0" |
192 | 91.2k | /* 1382 */ "subs_s.b\t\0" |
193 | 91.2k | /* 1392 */ "adds_s.b\t\0" |
194 | 91.2k | /* 1402 */ "sat_s.b\t\0" |
195 | 91.2k | /* 1411 */ "clt_s.b\t\0" |
196 | 91.2k | /* 1420 */ "subsuu_s.b\t\0" |
197 | 91.2k | /* 1432 */ "div_s.b\t\0" |
198 | 91.2k | /* 1441 */ "max_s.b\t\0" |
199 | 91.2k | /* 1450 */ "copy_s.b\t\0" |
200 | 91.2k | /* 1460 */ "splat.b\t\0" |
201 | 91.2k | /* 1469 */ "bset.b\t\0" |
202 | 91.2k | /* 1477 */ "pcnt.b\t\0" |
203 | 91.2k | /* 1485 */ "insert.b\t\0" |
204 | 91.2k | /* 1495 */ "st.b\t\0" |
205 | 91.2k | /* 1501 */ "asub_u.b\t\0" |
206 | 91.2k | /* 1511 */ "mod_u.b\t\0" |
207 | 91.2k | /* 1520 */ "cle_u.b\t\0" |
208 | 91.2k | /* 1529 */ "ave_u.b\t\0" |
209 | 91.2k | /* 1538 */ "clei_u.b\t\0" |
210 | 91.2k | /* 1548 */ "mini_u.b\t\0" |
211 | 91.2k | /* 1558 */ "clti_u.b\t\0" |
212 | 91.2k | /* 1568 */ "maxi_u.b\t\0" |
213 | 91.2k | /* 1578 */ "min_u.b\t\0" |
214 | 91.2k | /* 1587 */ "aver_u.b\t\0" |
215 | 91.2k | /* 1597 */ "subs_u.b\t\0" |
216 | 91.2k | /* 1607 */ "adds_u.b\t\0" |
217 | 91.2k | /* 1617 */ "subsus_u.b\t\0" |
218 | 91.2k | /* 1629 */ "sat_u.b\t\0" |
219 | 91.2k | /* 1638 */ "clt_u.b\t\0" |
220 | 91.2k | /* 1647 */ "div_u.b\t\0" |
221 | 91.2k | /* 1656 */ "max_u.b\t\0" |
222 | 91.2k | /* 1665 */ "copy_u.b\t\0" |
223 | 91.2k | /* 1675 */ "msubv.b\t\0" |
224 | 91.2k | /* 1684 */ "maddv.b\t\0" |
225 | 91.2k | /* 1693 */ "pckev.b\t\0" |
226 | 91.2k | /* 1702 */ "ilvev.b\t\0" |
227 | 91.2k | /* 1711 */ "mulv.b\t\0" |
228 | 91.2k | /* 1719 */ "bz.b\t\0" |
229 | 91.2k | /* 1725 */ "bnz.b\t\0" |
230 | 91.2k | /* 1732 */ "crc32b\t\0" |
231 | 91.2k | /* 1740 */ "crc32cb\t\0" |
232 | 91.2k | /* 1749 */ "seb\t\0" |
233 | 91.2k | /* 1754 */ "jalrc.hb\t\0" |
234 | 91.2k | /* 1764 */ "jr.hb\t\0" |
235 | 91.2k | /* 1771 */ "jalr.hb\t\0" |
236 | 91.2k | /* 1780 */ "lb\t\0" |
237 | 91.2k | /* 1784 */ "shra.qb\t\0" |
238 | 91.2k | /* 1793 */ "cmpgdu.le.qb\t\0" |
239 | 91.2k | /* 1807 */ "cmpgu.le.qb\t\0" |
240 | 91.2k | /* 1820 */ "cmpu.le.qb\t\0" |
241 | 91.2k | /* 1832 */ "subuh.qb\t\0" |
242 | 91.2k | /* 1842 */ "adduh.qb\t\0" |
243 | 91.2k | /* 1852 */ "pick.qb\t\0" |
244 | 91.2k | /* 1861 */ "shll.qb\t\0" |
245 | 91.2k | /* 1870 */ "repl.qb\t\0" |
246 | 91.2k | /* 1879 */ "shrl.qb\t\0" |
247 | 91.2k | /* 1888 */ "cmpgdu.eq.qb\t\0" |
248 | 91.2k | /* 1902 */ "cmpgu.eq.qb\t\0" |
249 | 91.2k | /* 1915 */ "cmpu.eq.qb\t\0" |
250 | 91.2k | /* 1927 */ "shra_r.qb\t\0" |
251 | 91.2k | /* 1938 */ "subuh_r.qb\t\0" |
252 | 91.2k | /* 1950 */ "adduh_r.qb\t\0" |
253 | 91.2k | /* 1962 */ "shrav_r.qb\t\0" |
254 | 91.2k | /* 1974 */ "absq_s.qb\t\0" |
255 | 91.2k | /* 1985 */ "subu_s.qb\t\0" |
256 | 91.2k | /* 1996 */ "addu_s.qb\t\0" |
257 | 91.2k | /* 2007 */ "cmpgdu.lt.qb\t\0" |
258 | 91.2k | /* 2021 */ "cmpgu.lt.qb\t\0" |
259 | 91.2k | /* 2034 */ "cmpu.lt.qb\t\0" |
260 | 91.2k | /* 2046 */ "subu.qb\t\0" |
261 | 91.2k | /* 2055 */ "addu.qb\t\0" |
262 | 91.2k | /* 2064 */ "shrav.qb\t\0" |
263 | 91.2k | /* 2074 */ "shllv.qb\t\0" |
264 | 91.2k | /* 2084 */ "replv.qb\t\0" |
265 | 91.2k | /* 2094 */ "shrlv.qb\t\0" |
266 | 91.2k | /* 2104 */ "raddu.w.qb\t\0" |
267 | 91.2k | /* 2116 */ "sb\t\0" |
268 | 91.2k | /* 2120 */ "modsub\t\0" |
269 | 91.2k | /* 2128 */ "msub\t\0" |
270 | 91.2k | /* 2134 */ "bposge32c\t\0" |
271 | 91.2k | /* 2145 */ "bc\t\0" |
272 | 91.2k | /* 2149 */ "bgec\t\0" |
273 | 91.2k | /* 2155 */ "bnec\t\0" |
274 | 91.2k | /* 2161 */ "bgeic\t\0" |
275 | 91.2k | /* 2168 */ "bneic\t\0" |
276 | 91.2k | /* 2175 */ "jic\t\0" |
277 | 91.2k | /* 2180 */ "beqic\t\0" |
278 | 91.2k | /* 2187 */ "bltic\t\0" |
279 | 91.2k | /* 2194 */ "move.balc\t\0" |
280 | 91.2k | /* 2205 */ "jialc\t\0" |
281 | 91.2k | /* 2212 */ "bgezalc\t\0" |
282 | 91.2k | /* 2221 */ "blezalc\t\0" |
283 | 91.2k | /* 2230 */ "bnezalc\t\0" |
284 | 91.2k | /* 2239 */ "beqzalc\t\0" |
285 | 91.2k | /* 2248 */ "bgtzalc\t\0" |
286 | 91.2k | /* 2257 */ "bltzalc\t\0" |
287 | 91.2k | /* 2266 */ "sync\t\0" |
288 | 91.2k | /* 2272 */ "ldpc\t\0" |
289 | 91.2k | /* 2278 */ "auipc\t\0" |
290 | 91.2k | /* 2285 */ "aluipc\t\0" |
291 | 91.2k | /* 2293 */ "addiupc\t\0" |
292 | 91.2k | /* 2302 */ "lwupc\t\0" |
293 | 91.2k | /* 2309 */ "lwpc\t\0" |
294 | 91.2k | /* 2315 */ "swpc\t\0" |
295 | 91.2k | /* 2321 */ "beqc\t\0" |
296 | 91.2k | /* 2327 */ "restore.jrc\t\0" |
297 | 91.2k | /* 2340 */ "jalrc\t\0" |
298 | 91.2k | /* 2347 */ "addsc\t\0" |
299 | 91.2k | /* 2354 */ "brsc\t\0" |
300 | 91.2k | /* 2360 */ "balrsc\t\0" |
301 | 91.2k | /* 2368 */ "bltc\t\0" |
302 | 91.2k | /* 2374 */ "bgeuc\t\0" |
303 | 91.2k | /* 2381 */ "bgeiuc\t\0" |
304 | 91.2k | /* 2389 */ "bltiuc\t\0" |
305 | 91.2k | /* 2397 */ "bltuc\t\0" |
306 | 91.2k | /* 2404 */ "bnvc\t\0" |
307 | 91.2k | /* 2410 */ "bovc\t\0" |
308 | 91.2k | /* 2416 */ "addwc\t\0" |
309 | 91.2k | /* 2423 */ "bgezc\t\0" |
310 | 91.2k | /* 2430 */ "blezc\t\0" |
311 | 91.2k | /* 2437 */ "bc1nezc\t\0" |
312 | 91.2k | /* 2446 */ "bc2nezc\t\0" |
313 | 91.2k | /* 2455 */ "bbnezc\t\0" |
314 | 91.2k | /* 2463 */ "bc1eqzc\t\0" |
315 | 91.2k | /* 2472 */ "bc2eqzc\t\0" |
316 | 91.2k | /* 2481 */ "bbeqzc\t\0" |
317 | 91.2k | /* 2489 */ "bgtzc\t\0" |
318 | 91.2k | /* 2496 */ "bltzc\t\0" |
319 | 91.2k | /* 2503 */ "flog2.d\t\0" |
320 | 91.2k | /* 2512 */ "fexp2.d\t\0" |
321 | 91.2k | /* 2521 */ "add_a.d\t\0" |
322 | 91.2k | /* 2530 */ "fmin_a.d\t\0" |
323 | 91.2k | /* 2540 */ "adds_a.d\t\0" |
324 | 91.2k | /* 2550 */ "fmax_a.d\t\0" |
325 | 91.2k | /* 2560 */ "mina.d\t\0" |
326 | 91.2k | /* 2568 */ "sra.d\t\0" |
327 | 91.2k | /* 2575 */ "maxa.d\t\0" |
328 | 91.2k | /* 2583 */ "fsub.d\t\0" |
329 | 91.2k | /* 2591 */ "fmsub.d\t\0" |
330 | 91.2k | /* 2600 */ "nmsub.d\t\0" |
331 | 91.2k | /* 2609 */ "nloc.d\t\0" |
332 | 91.2k | /* 2617 */ "nlzc.d\t\0" |
333 | 91.2k | /* 2625 */ "fadd.d\t\0" |
334 | 91.2k | /* 2633 */ "fmadd.d\t\0" |
335 | 91.2k | /* 2642 */ "nmadd.d\t\0" |
336 | 91.2k | /* 2651 */ "sld.d\t\0" |
337 | 91.2k | /* 2658 */ "pckod.d\t\0" |
338 | 91.2k | /* 2667 */ "ilvod.d\t\0" |
339 | 91.2k | /* 2676 */ "c.nge.d\t\0" |
340 | 91.2k | /* 2685 */ "c.le.d\t\0" |
341 | 91.2k | /* 2693 */ "cmp.le.d\t\0" |
342 | 91.2k | /* 2703 */ "fcle.d\t\0" |
343 | 91.2k | /* 2711 */ "c.ngle.d\t\0" |
344 | 91.2k | /* 2721 */ "c.ole.d\t\0" |
345 | 91.2k | /* 2730 */ "cmp.sle.d\t\0" |
346 | 91.2k | /* 2741 */ "fsle.d\t\0" |
347 | 91.2k | /* 2749 */ "c.ule.d\t\0" |
348 | 91.2k | /* 2758 */ "cmp.ule.d\t\0" |
349 | 91.2k | /* 2769 */ "fcule.d\t\0" |
350 | 91.2k | /* 2778 */ "cmp.sule.d\t\0" |
351 | 91.2k | /* 2790 */ "fsule.d\t\0" |
352 | 91.2k | /* 2799 */ "fcne.d\t\0" |
353 | 91.2k | /* 2807 */ "fsne.d\t\0" |
354 | 91.2k | /* 2815 */ "fcune.d\t\0" |
355 | 91.2k | /* 2824 */ "fsune.d\t\0" |
356 | 91.2k | /* 2833 */ "insve.d\t\0" |
357 | 91.2k | /* 2842 */ "c.f.d\t\0" |
358 | 91.2k | /* 2849 */ "cmp.af.d\t\0" |
359 | 91.2k | /* 2859 */ "fcaf.d\t\0" |
360 | 91.2k | /* 2867 */ "cmp.saf.d\t\0" |
361 | 91.2k | /* 2878 */ "fsaf.d\t\0" |
362 | 91.2k | /* 2886 */ "msubf.d\t\0" |
363 | 91.2k | /* 2895 */ "maddf.d\t\0" |
364 | 91.2k | /* 2904 */ "vshf.d\t\0" |
365 | 91.2k | /* 2912 */ "c.sf.d\t\0" |
366 | 91.2k | /* 2920 */ "movf.d\t\0" |
367 | 91.2k | /* 2928 */ "bneg.d\t\0" |
368 | 91.2k | /* 2936 */ "srai.d\t\0" |
369 | 91.2k | /* 2944 */ "sldi.d\t\0" |
370 | 91.2k | /* 2952 */ "bnegi.d\t\0" |
371 | 91.2k | /* 2961 */ "slli.d\t\0" |
372 | 91.2k | /* 2969 */ "srli.d\t\0" |
373 | 91.2k | /* 2977 */ "binsli.d\t\0" |
374 | 91.2k | /* 2987 */ "ceqi.d\t\0" |
375 | 91.2k | /* 2995 */ "srari.d\t\0" |
376 | 91.2k | /* 3004 */ "bclri.d\t\0" |
377 | 91.2k | /* 3013 */ "srlri.d\t\0" |
378 | 91.2k | /* 3022 */ "binsri.d\t\0" |
379 | 91.2k | /* 3032 */ "splati.d\t\0" |
380 | 91.2k | /* 3042 */ "bseti.d\t\0" |
381 | 91.2k | /* 3051 */ "subvi.d\t\0" |
382 | 91.2k | /* 3060 */ "addvi.d\t\0" |
383 | 91.2k | /* 3069 */ "trunc.l.d\t\0" |
384 | 91.2k | /* 3080 */ "round.l.d\t\0" |
385 | 91.2k | /* 3091 */ "ceil.l.d\t\0" |
386 | 91.2k | /* 3101 */ "floor.l.d\t\0" |
387 | 91.2k | /* 3112 */ "cvt.l.d\t\0" |
388 | 91.2k | /* 3121 */ "sel.d\t\0" |
389 | 91.2k | /* 3128 */ "c.ngl.d\t\0" |
390 | 91.2k | /* 3137 */ "fill.d\t\0" |
391 | 91.2k | /* 3145 */ "sll.d\t\0" |
392 | 91.2k | /* 3152 */ "fexupl.d\t\0" |
393 | 91.2k | /* 3162 */ "ffql.d\t\0" |
394 | 91.2k | /* 3170 */ "srl.d\t\0" |
395 | 91.2k | /* 3177 */ "binsl.d\t\0" |
396 | 91.2k | /* 3186 */ "fmul.d\t\0" |
397 | 91.2k | /* 3194 */ "ilvl.d\t\0" |
398 | 91.2k | /* 3202 */ "fmin.d\t\0" |
399 | 91.2k | /* 3210 */ "c.un.d\t\0" |
400 | 91.2k | /* 3218 */ "cmp.un.d\t\0" |
401 | 91.2k | /* 3228 */ "fcun.d\t\0" |
402 | 91.2k | /* 3236 */ "cmp.sun.d\t\0" |
403 | 91.2k | /* 3247 */ "fsun.d\t\0" |
404 | 91.2k | /* 3255 */ "movn.d\t\0" |
405 | 91.2k | /* 3263 */ "frcp.d\t\0" |
406 | 91.2k | /* 3271 */ "recip.d\t\0" |
407 | 91.2k | /* 3280 */ "c.eq.d\t\0" |
408 | 91.2k | /* 3288 */ "cmp.eq.d\t\0" |
409 | 91.2k | /* 3298 */ "fceq.d\t\0" |
410 | 91.2k | /* 3306 */ "c.seq.d\t\0" |
411 | 91.2k | /* 3315 */ "cmp.seq.d\t\0" |
412 | 91.2k | /* 3326 */ "fseq.d\t\0" |
413 | 91.2k | /* 3334 */ "c.ueq.d\t\0" |
414 | 91.2k | /* 3343 */ "cmp.ueq.d\t\0" |
415 | 91.2k | /* 3354 */ "fcueq.d\t\0" |
416 | 91.2k | /* 3363 */ "cmp.sueq.d\t\0" |
417 | 91.2k | /* 3375 */ "fsueq.d\t\0" |
418 | 91.2k | /* 3384 */ "srar.d\t\0" |
419 | 91.2k | /* 3392 */ "bclr.d\t\0" |
420 | 91.2k | /* 3400 */ "srlr.d\t\0" |
421 | 91.2k | /* 3408 */ "fcor.d\t\0" |
422 | 91.2k | /* 3416 */ "fsor.d\t\0" |
423 | 91.2k | /* 3424 */ "fexupr.d\t\0" |
424 | 91.2k | /* 3434 */ "ffqr.d\t\0" |
425 | 91.2k | /* 3442 */ "binsr.d\t\0" |
426 | 91.2k | /* 3451 */ "ilvr.d\t\0" |
427 | 91.2k | /* 3459 */ "cvt.s.d\t\0" |
428 | 91.2k | /* 3468 */ "asub_s.d\t\0" |
429 | 91.2k | /* 3478 */ "hsub_s.d\t\0" |
430 | 91.2k | /* 3488 */ "dpsub_s.d\t\0" |
431 | 91.2k | /* 3499 */ "ftrunc_s.d\t\0" |
432 | 91.2k | /* 3511 */ "hadd_s.d\t\0" |
433 | 91.2k | /* 3521 */ "dpadd_s.d\t\0" |
434 | 91.2k | /* 3532 */ "mod_s.d\t\0" |
435 | 91.2k | /* 3541 */ "cle_s.d\t\0" |
436 | 91.2k | /* 3550 */ "ave_s.d\t\0" |
437 | 91.2k | /* 3559 */ "clei_s.d\t\0" |
438 | 91.2k | /* 3569 */ "mini_s.d\t\0" |
439 | 91.2k | /* 3579 */ "clti_s.d\t\0" |
440 | 91.2k | /* 3589 */ "maxi_s.d\t\0" |
441 | 91.2k | /* 3599 */ "min_s.d\t\0" |
442 | 91.2k | /* 3608 */ "dotp_s.d\t\0" |
443 | 91.2k | /* 3618 */ "aver_s.d\t\0" |
444 | 91.2k | /* 3628 */ "subs_s.d\t\0" |
445 | 91.2k | /* 3638 */ "adds_s.d\t\0" |
446 | 91.2k | /* 3648 */ "sat_s.d\t\0" |
447 | 91.2k | /* 3657 */ "clt_s.d\t\0" |
448 | 91.2k | /* 3666 */ "ffint_s.d\t\0" |
449 | 91.2k | /* 3677 */ "ftint_s.d\t\0" |
450 | 91.2k | /* 3688 */ "subsuu_s.d\t\0" |
451 | 91.2k | /* 3700 */ "div_s.d\t\0" |
452 | 91.2k | /* 3709 */ "max_s.d\t\0" |
453 | 91.2k | /* 3718 */ "copy_s.d\t\0" |
454 | 91.2k | /* 3728 */ "abs.d\t\0" |
455 | 91.2k | /* 3735 */ "fclass.d\t\0" |
456 | 91.2k | /* 3745 */ "splat.d\t\0" |
457 | 91.2k | /* 3754 */ "bset.d\t\0" |
458 | 91.2k | /* 3762 */ "c.ngt.d\t\0" |
459 | 91.2k | /* 3771 */ "c.lt.d\t\0" |
460 | 91.2k | /* 3779 */ "cmp.lt.d\t\0" |
461 | 91.2k | /* 3789 */ "fclt.d\t\0" |
462 | 91.2k | /* 3797 */ "c.olt.d\t\0" |
463 | 91.2k | /* 3806 */ "cmp.slt.d\t\0" |
464 | 91.2k | /* 3817 */ "fslt.d\t\0" |
465 | 91.2k | /* 3825 */ "c.ult.d\t\0" |
466 | 91.2k | /* 3834 */ "cmp.ult.d\t\0" |
467 | 91.2k | /* 3845 */ "fcult.d\t\0" |
468 | 91.2k | /* 3854 */ "cmp.sult.d\t\0" |
469 | 91.2k | /* 3866 */ "fsult.d\t\0" |
470 | 91.2k | /* 3875 */ "pcnt.d\t\0" |
471 | 91.2k | /* 3883 */ "frint.d\t\0" |
472 | 91.2k | /* 3892 */ "insert.d\t\0" |
473 | 91.2k | /* 3902 */ "fsqrt.d\t\0" |
474 | 91.2k | /* 3911 */ "frsqrt.d\t\0" |
475 | 91.2k | /* 3921 */ "st.d\t\0" |
476 | 91.2k | /* 3927 */ "movt.d\t\0" |
477 | 91.2k | /* 3935 */ "asub_u.d\t\0" |
478 | 91.2k | /* 3945 */ "hsub_u.d\t\0" |
479 | 91.2k | /* 3955 */ "dpsub_u.d\t\0" |
480 | 91.2k | /* 3966 */ "ftrunc_u.d\t\0" |
481 | 91.2k | /* 3978 */ "hadd_u.d\t\0" |
482 | 91.2k | /* 3988 */ "dpadd_u.d\t\0" |
483 | 91.2k | /* 3999 */ "mod_u.d\t\0" |
484 | 91.2k | /* 4008 */ "cle_u.d\t\0" |
485 | 91.2k | /* 4017 */ "ave_u.d\t\0" |
486 | 91.2k | /* 4026 */ "clei_u.d\t\0" |
487 | 91.2k | /* 4036 */ "mini_u.d\t\0" |
488 | 91.2k | /* 4046 */ "clti_u.d\t\0" |
489 | 91.2k | /* 4056 */ "maxi_u.d\t\0" |
490 | 91.2k | /* 4066 */ "min_u.d\t\0" |
491 | 91.2k | /* 4075 */ "dotp_u.d\t\0" |
492 | 91.2k | /* 4085 */ "aver_u.d\t\0" |
493 | 91.2k | /* 4095 */ "subs_u.d\t\0" |
494 | 91.2k | /* 4105 */ "adds_u.d\t\0" |
495 | 91.2k | /* 4115 */ "subsus_u.d\t\0" |
496 | 91.2k | /* 4127 */ "sat_u.d\t\0" |
497 | 91.2k | /* 4136 */ "clt_u.d\t\0" |
498 | 91.2k | /* 4145 */ "ffint_u.d\t\0" |
499 | 91.2k | /* 4156 */ "ftint_u.d\t\0" |
500 | 91.2k | /* 4167 */ "div_u.d\t\0" |
501 | 91.2k | /* 4176 */ "max_u.d\t\0" |
502 | 91.2k | /* 4185 */ "msubv.d\t\0" |
503 | 91.2k | /* 4194 */ "maddv.d\t\0" |
504 | 91.2k | /* 4203 */ "pckev.d\t\0" |
505 | 91.2k | /* 4212 */ "ilvev.d\t\0" |
506 | 91.2k | /* 4221 */ "fdiv.d\t\0" |
507 | 91.2k | /* 4229 */ "mulv.d\t\0" |
508 | 91.2k | /* 4237 */ "mov.d\t\0" |
509 | 91.2k | /* 4244 */ "trunc.w.d\t\0" |
510 | 91.2k | /* 4255 */ "round.w.d\t\0" |
511 | 91.2k | /* 4266 */ "ceil.w.d\t\0" |
512 | 91.2k | /* 4276 */ "floor.w.d\t\0" |
513 | 91.2k | /* 4287 */ "cvt.w.d\t\0" |
514 | 91.2k | /* 4296 */ "fmax.d\t\0" |
515 | 91.2k | /* 4304 */ "bz.d\t\0" |
516 | 91.2k | /* 4310 */ "selnez.d\t\0" |
517 | 91.2k | /* 4320 */ "bnz.d\t\0" |
518 | 91.2k | /* 4327 */ "seleqz.d\t\0" |
519 | 91.2k | /* 4337 */ "movz.d\t\0" |
520 | 91.2k | /* 4345 */ "crc32d\t\0" |
521 | 91.2k | /* 4353 */ "saad\t\0" |
522 | 91.2k | /* 4359 */ "crc32cd\t\0" |
523 | 91.2k | /* 4368 */ "scd\t\0" |
524 | 91.2k | /* 4373 */ "dadd\t\0" |
525 | 91.2k | /* 4379 */ "madd\t\0" |
526 | 91.2k | /* 4385 */ "dshd\t\0" |
527 | 91.2k | /* 4391 */ "yield\t\0" |
528 | 91.2k | /* 4398 */ "lld\t\0" |
529 | 91.2k | /* 4403 */ "and\t\0" |
530 | 91.2k | /* 4408 */ "prepend\t\0" |
531 | 91.2k | /* 4417 */ "append\t\0" |
532 | 91.2k | /* 4425 */ "dmod\t\0" |
533 | 91.2k | /* 4431 */ "sd\t\0" |
534 | 91.2k | /* 4435 */ "lbe\t\0" |
535 | 91.2k | /* 4440 */ "sbe\t\0" |
536 | 91.2k | /* 4445 */ "sce\t\0" |
537 | 91.2k | /* 4450 */ "cachee\t\0" |
538 | 91.2k | /* 4458 */ "prefe\t\0" |
539 | 91.2k | /* 4465 */ "bge\t\0" |
540 | 91.2k | /* 4470 */ "sge\t\0" |
541 | 91.2k | /* 4475 */ "tge\t\0" |
542 | 91.2k | /* 4480 */ "cache\t\0" |
543 | 91.2k | /* 4487 */ "lhe\t\0" |
544 | 91.2k | /* 4492 */ "she\t\0" |
545 | 91.2k | /* 4497 */ "sigrie\t\0" |
546 | 91.2k | /* 4505 */ "ble\t\0" |
547 | 91.2k | /* 4510 */ "lle\t\0" |
548 | 91.2k | /* 4515 */ "sle\t\0" |
549 | 91.2k | /* 4520 */ "lwle\t\0" |
550 | 91.2k | /* 4526 */ "swle\t\0" |
551 | 91.2k | /* 4532 */ "bne\t\0" |
552 | 91.2k | /* 4537 */ "sne\t\0" |
553 | 91.2k | /* 4542 */ "tne\t\0" |
554 | 91.2k | /* 4547 */ "dvpe\t\0" |
555 | 91.2k | /* 4553 */ "evpe\t\0" |
556 | 91.2k | /* 4559 */ "restore\t\0" |
557 | 91.2k | /* 4568 */ "lwre\t\0" |
558 | 91.2k | /* 4574 */ "swre\t\0" |
559 | 91.2k | /* 4580 */ "lbue\t\0" |
560 | 91.2k | /* 4586 */ "lhue\t\0" |
561 | 91.2k | /* 4592 */ "save\t\0" |
562 | 91.2k | /* 4598 */ "move\t\0" |
563 | 91.2k | /* 4604 */ "lwe\t\0" |
564 | 91.2k | /* 4609 */ "swe\t\0" |
565 | 91.2k | /* 4614 */ "bc1f\t\0" |
566 | 91.2k | /* 4620 */ "pref\t\0" |
567 | 91.2k | /* 4626 */ "movf\t\0" |
568 | 91.2k | /* 4632 */ "neg\t\0" |
569 | 91.2k | /* 4637 */ "add_a.h\t\0" |
570 | 91.2k | /* 4646 */ "min_a.h\t\0" |
571 | 91.2k | /* 4655 */ "adds_a.h\t\0" |
572 | 91.2k | /* 4665 */ "max_a.h\t\0" |
573 | 91.2k | /* 4674 */ "sra.h\t\0" |
574 | 91.2k | /* 4681 */ "nloc.h\t\0" |
575 | 91.2k | /* 4689 */ "lapc.h\t\0" |
576 | 91.2k | /* 4697 */ "nlzc.h\t\0" |
577 | 91.2k | /* 4705 */ "sld.h\t\0" |
578 | 91.2k | /* 4712 */ "pckod.h\t\0" |
579 | 91.2k | /* 4721 */ "ilvod.h\t\0" |
580 | 91.2k | /* 4730 */ "insve.h\t\0" |
581 | 91.2k | /* 4739 */ "vshf.h\t\0" |
582 | 91.2k | /* 4747 */ "bneg.h\t\0" |
583 | 91.2k | /* 4755 */ "srai.h\t\0" |
584 | 91.2k | /* 4763 */ "sldi.h\t\0" |
585 | 91.2k | /* 4771 */ "bnegi.h\t\0" |
586 | 91.2k | /* 4780 */ "slli.h\t\0" |
587 | 91.2k | /* 4788 */ "srli.h\t\0" |
588 | 91.2k | /* 4796 */ "binsli.h\t\0" |
589 | 91.2k | /* 4806 */ "ceqi.h\t\0" |
590 | 91.2k | /* 4814 */ "srari.h\t\0" |
591 | 91.2k | /* 4823 */ "bclri.h\t\0" |
592 | 91.2k | /* 4832 */ "srlri.h\t\0" |
593 | 91.2k | /* 4841 */ "binsri.h\t\0" |
594 | 91.2k | /* 4851 */ "splati.h\t\0" |
595 | 91.2k | /* 4861 */ "bseti.h\t\0" |
596 | 91.2k | /* 4870 */ "subvi.h\t\0" |
597 | 91.2k | /* 4879 */ "addvi.h\t\0" |
598 | 91.2k | /* 4888 */ "fill.h\t\0" |
599 | 91.2k | /* 4896 */ "sll.h\t\0" |
600 | 91.2k | /* 4903 */ "srl.h\t\0" |
601 | 91.2k | /* 4910 */ "binsl.h\t\0" |
602 | 91.2k | /* 4919 */ "ilvl.h\t\0" |
603 | 91.2k | /* 4927 */ "fexdo.h\t\0" |
604 | 91.2k | /* 4936 */ "msub_q.h\t\0" |
605 | 91.2k | /* 4946 */ "madd_q.h\t\0" |
606 | 91.2k | /* 4956 */ "mul_q.h\t\0" |
607 | 91.2k | /* 4965 */ "msubr_q.h\t\0" |
608 | 91.2k | /* 4976 */ "maddr_q.h\t\0" |
609 | 91.2k | /* 4987 */ "mulr_q.h\t\0" |
610 | 91.2k | /* 4997 */ "ceq.h\t\0" |
611 | 91.2k | /* 5004 */ "ftq.h\t\0" |
612 | 91.2k | /* 5011 */ "srar.h\t\0" |
613 | 91.2k | /* 5019 */ "bclr.h\t\0" |
614 | 91.2k | /* 5027 */ "srlr.h\t\0" |
615 | 91.2k | /* 5035 */ "binsr.h\t\0" |
616 | 91.2k | /* 5044 */ "ilvr.h\t\0" |
617 | 91.2k | /* 5052 */ "asub_s.h\t\0" |
618 | 91.2k | /* 5062 */ "hsub_s.h\t\0" |
619 | 91.2k | /* 5072 */ "dpsub_s.h\t\0" |
620 | 91.2k | /* 5083 */ "hadd_s.h\t\0" |
621 | 91.2k | /* 5093 */ "dpadd_s.h\t\0" |
622 | 91.2k | /* 5104 */ "mod_s.h\t\0" |
623 | 91.2k | /* 5113 */ "cle_s.h\t\0" |
624 | 91.2k | /* 5122 */ "ave_s.h\t\0" |
625 | 91.2k | /* 5131 */ "clei_s.h\t\0" |
626 | 91.2k | /* 5141 */ "mini_s.h\t\0" |
627 | 91.2k | /* 5151 */ "clti_s.h\t\0" |
628 | 91.2k | /* 5161 */ "maxi_s.h\t\0" |
629 | 91.2k | /* 5171 */ "min_s.h\t\0" |
630 | 91.2k | /* 5180 */ "dotp_s.h\t\0" |
631 | 91.2k | /* 5190 */ "aver_s.h\t\0" |
632 | 91.2k | /* 5200 */ "extr_s.h\t\0" |
633 | 91.2k | /* 5210 */ "subs_s.h\t\0" |
634 | 91.2k | /* 5220 */ "adds_s.h\t\0" |
635 | 91.2k | /* 5230 */ "sat_s.h\t\0" |
636 | 91.2k | /* 5239 */ "clt_s.h\t\0" |
637 | 91.2k | /* 5248 */ "subsuu_s.h\t\0" |
638 | 91.2k | /* 5260 */ "div_s.h\t\0" |
639 | 91.2k | /* 5269 */ "extrv_s.h\t\0" |
640 | 91.2k | /* 5280 */ "max_s.h\t\0" |
641 | 91.2k | /* 5289 */ "copy_s.h\t\0" |
642 | 91.2k | /* 5299 */ "splat.h\t\0" |
643 | 91.2k | /* 5308 */ "bset.h\t\0" |
644 | 91.2k | /* 5316 */ "pcnt.h\t\0" |
645 | 91.2k | /* 5324 */ "insert.h\t\0" |
646 | 91.2k | /* 5334 */ "st.h\t\0" |
647 | 91.2k | /* 5340 */ "asub_u.h\t\0" |
648 | 91.2k | /* 5350 */ "hsub_u.h\t\0" |
649 | 91.2k | /* 5360 */ "dpsub_u.h\t\0" |
650 | 91.2k | /* 5371 */ "hadd_u.h\t\0" |
651 | 91.2k | /* 5381 */ "dpadd_u.h\t\0" |
652 | 91.2k | /* 5392 */ "mod_u.h\t\0" |
653 | 91.2k | /* 5401 */ "cle_u.h\t\0" |
654 | 91.2k | /* 5410 */ "ave_u.h\t\0" |
655 | 91.2k | /* 5419 */ "clei_u.h\t\0" |
656 | 91.2k | /* 5429 */ "mini_u.h\t\0" |
657 | 91.2k | /* 5439 */ "clti_u.h\t\0" |
658 | 91.2k | /* 5449 */ "maxi_u.h\t\0" |
659 | 91.2k | /* 5459 */ "min_u.h\t\0" |
660 | 91.2k | /* 5468 */ "dotp_u.h\t\0" |
661 | 91.2k | /* 5478 */ "aver_u.h\t\0" |
662 | 91.2k | /* 5488 */ "subs_u.h\t\0" |
663 | 91.2k | /* 5498 */ "adds_u.h\t\0" |
664 | 91.2k | /* 5508 */ "subsus_u.h\t\0" |
665 | 91.2k | /* 5520 */ "sat_u.h\t\0" |
666 | 91.2k | /* 5529 */ "clt_u.h\t\0" |
667 | 91.2k | /* 5538 */ "div_u.h\t\0" |
668 | 91.2k | /* 5547 */ "max_u.h\t\0" |
669 | 91.2k | /* 5556 */ "copy_u.h\t\0" |
670 | 91.2k | /* 5566 */ "msubv.h\t\0" |
671 | 91.2k | /* 5575 */ "maddv.h\t\0" |
672 | 91.2k | /* 5584 */ "pckev.h\t\0" |
673 | 91.2k | /* 5593 */ "ilvev.h\t\0" |
674 | 91.2k | /* 5602 */ "mulv.h\t\0" |
675 | 91.2k | /* 5610 */ "bz.h\t\0" |
676 | 91.2k | /* 5616 */ "bnz.h\t\0" |
677 | 91.2k | /* 5623 */ "crc32h\t\0" |
678 | 91.2k | /* 5631 */ "dsbh\t\0" |
679 | 91.2k | /* 5637 */ "wsbh\t\0" |
680 | 91.2k | /* 5643 */ "crc32ch\t\0" |
681 | 91.2k | /* 5652 */ "seh\t\0" |
682 | 91.2k | /* 5657 */ "ualh\t\0" |
683 | 91.2k | /* 5663 */ "ulh\t\0" |
684 | 91.2k | /* 5668 */ "shra.ph\t\0" |
685 | 91.2k | /* 5677 */ "precrq.qb.ph\t\0" |
686 | 91.2k | /* 5691 */ "precr.qb.ph\t\0" |
687 | 91.2k | /* 5704 */ "precrqu_s.qb.ph\t\0" |
688 | 91.2k | /* 5721 */ "cmp.le.ph\t\0" |
689 | 91.2k | /* 5732 */ "subqh.ph\t\0" |
690 | 91.2k | /* 5742 */ "addqh.ph\t\0" |
691 | 91.2k | /* 5752 */ "pick.ph\t\0" |
692 | 91.2k | /* 5761 */ "shll.ph\t\0" |
693 | 91.2k | /* 5770 */ "repl.ph\t\0" |
694 | 91.2k | /* 5779 */ "shrl.ph\t\0" |
695 | 91.2k | /* 5788 */ "packrl.ph\t\0" |
696 | 91.2k | /* 5799 */ "mul.ph\t\0" |
697 | 91.2k | /* 5807 */ "subq.ph\t\0" |
698 | 91.2k | /* 5816 */ "addq.ph\t\0" |
699 | 91.2k | /* 5825 */ "cmp.eq.ph\t\0" |
700 | 91.2k | /* 5836 */ "shra_r.ph\t\0" |
701 | 91.2k | /* 5847 */ "subqh_r.ph\t\0" |
702 | 91.2k | /* 5859 */ "addqh_r.ph\t\0" |
703 | 91.2k | /* 5871 */ "shrav_r.ph\t\0" |
704 | 91.2k | /* 5883 */ "shll_s.ph\t\0" |
705 | 91.2k | /* 5894 */ "mul_s.ph\t\0" |
706 | 91.2k | /* 5904 */ "subq_s.ph\t\0" |
707 | 91.2k | /* 5915 */ "addq_s.ph\t\0" |
708 | 91.2k | /* 5926 */ "mulq_s.ph\t\0" |
709 | 91.2k | /* 5937 */ "absq_s.ph\t\0" |
710 | 91.2k | /* 5948 */ "subu_s.ph\t\0" |
711 | 91.2k | /* 5959 */ "addu_s.ph\t\0" |
712 | 91.2k | /* 5970 */ "shllv_s.ph\t\0" |
713 | 91.2k | /* 5982 */ "mulq_rs.ph\t\0" |
714 | 91.2k | /* 5994 */ "cmp.lt.ph\t\0" |
715 | 91.2k | /* 6005 */ "subu.ph\t\0" |
716 | 91.2k | /* 6014 */ "addu.ph\t\0" |
717 | 91.2k | /* 6023 */ "shrav.ph\t\0" |
718 | 91.2k | /* 6033 */ "shllv.ph\t\0" |
719 | 91.2k | /* 6043 */ "replv.ph\t\0" |
720 | 91.2k | /* 6053 */ "shrlv.ph\t\0" |
721 | 91.2k | /* 6063 */ "dpa.w.ph\t\0" |
722 | 91.2k | /* 6073 */ "dpaqx_sa.w.ph\t\0" |
723 | 91.2k | /* 6088 */ "dpsqx_sa.w.ph\t\0" |
724 | 91.2k | /* 6103 */ "mulsa.w.ph\t\0" |
725 | 91.2k | /* 6115 */ "dpaq_s.w.ph\t\0" |
726 | 91.2k | /* 6128 */ "mulsaq_s.w.ph\t\0" |
727 | 91.2k | /* 6143 */ "dpsq_s.w.ph\t\0" |
728 | 91.2k | /* 6156 */ "dpaqx_s.w.ph\t\0" |
729 | 91.2k | /* 6170 */ "dpsqx_s.w.ph\t\0" |
730 | 91.2k | /* 6184 */ "dps.w.ph\t\0" |
731 | 91.2k | /* 6194 */ "dpax.w.ph\t\0" |
732 | 91.2k | /* 6205 */ "dpsx.w.ph\t\0" |
733 | 91.2k | /* 6216 */ "uash\t\0" |
734 | 91.2k | /* 6222 */ "ush\t\0" |
735 | 91.2k | /* 6227 */ "dmuh\t\0" |
736 | 91.2k | /* 6233 */ "synci\t\0" |
737 | 91.2k | /* 6240 */ "daddi\t\0" |
738 | 91.2k | /* 6247 */ "andi\t\0" |
739 | 91.2k | /* 6253 */ "tgei\t\0" |
740 | 91.2k | /* 6259 */ "snei\t\0" |
741 | 91.2k | /* 6265 */ "tnei\t\0" |
742 | 91.2k | /* 6271 */ "dahi\t\0" |
743 | 91.2k | /* 6277 */ "mfhi\t\0" |
744 | 91.2k | /* 6283 */ "mthi\t\0" |
745 | 91.2k | /* 6289 */ ".align 2\n\tli\t\0" |
746 | 91.2k | /* 6303 */ "dli\t\0" |
747 | 91.2k | /* 6308 */ "cmpi\t\0" |
748 | 91.2k | /* 6314 */ "seqi\t\0" |
749 | 91.2k | /* 6320 */ "teqi\t\0" |
750 | 91.2k | /* 6326 */ "xori\t\0" |
751 | 91.2k | /* 6332 */ "dati\t\0" |
752 | 91.2k | /* 6338 */ "slti\t\0" |
753 | 91.2k | /* 6344 */ "tlti\t\0" |
754 | 91.2k | /* 6350 */ "daui\t\0" |
755 | 91.2k | /* 6356 */ "lui\t\0" |
756 | 91.2k | /* 6361 */ "ginvi\t\0" |
757 | 91.2k | /* 6368 */ "j\t\0" |
758 | 91.2k | /* 6371 */ "break\t\0" |
759 | 91.2k | /* 6378 */ "fork\t\0" |
760 | 91.2k | /* 6384 */ "cvt.d.l\t\0" |
761 | 91.2k | /* 6393 */ "cvt.s.l\t\0" |
762 | 91.2k | /* 6402 */ "bal\t\0" |
763 | 91.2k | /* 6407 */ "jal\t\0" |
764 | 91.2k | /* 6412 */ "bgezal\t\0" |
765 | 91.2k | /* 6420 */ "bltzal\t\0" |
766 | 91.2k | /* 6428 */ "dpau.h.qbl\t\0" |
767 | 91.2k | /* 6440 */ "dpsu.h.qbl\t\0" |
768 | 91.2k | /* 6452 */ "muleu_s.ph.qbl\t\0" |
769 | 91.2k | /* 6468 */ "preceu.ph.qbl\t\0" |
770 | 91.2k | /* 6483 */ "precequ.ph.qbl\t\0" |
771 | 91.2k | /* 6499 */ "ldl\t\0" |
772 | 91.2k | /* 6504 */ "sdl\t\0" |
773 | 91.2k | /* 6509 */ "bgel\t\0" |
774 | 91.2k | /* 6515 */ "blel\t\0" |
775 | 91.2k | /* 6521 */ "bnel\t\0" |
776 | 91.2k | /* 6527 */ "bc1fl\t\0" |
777 | 91.2k | /* 6534 */ "maq_sa.w.phl\t\0" |
778 | 91.2k | /* 6548 */ "preceq.w.phl\t\0" |
779 | 91.2k | /* 6562 */ "maq_s.w.phl\t\0" |
780 | 91.2k | /* 6575 */ "muleq_s.w.phl\t\0" |
781 | 91.2k | /* 6590 */ "hypcall\t\0" |
782 | 91.2k | /* 6599 */ "syscall\t\0" |
783 | 91.2k | /* 6608 */ "bgezall\t\0" |
784 | 91.2k | /* 6617 */ "bltzall\t\0" |
785 | 91.2k | /* 6626 */ "dsll\t\0" |
786 | 91.2k | /* 6632 */ "drol\t\0" |
787 | 91.2k | /* 6638 */ "cvt.s.pl\t\0" |
788 | 91.2k | /* 6648 */ "beql\t\0" |
789 | 91.2k | /* 6654 */ "dsrl\t\0" |
790 | 91.2k | /* 6660 */ "bc1tl\t\0" |
791 | 91.2k | /* 6667 */ "bgtl\t\0" |
792 | 91.2k | /* 6673 */ "bltl\t\0" |
793 | 91.2k | /* 6679 */ "bgeul\t\0" |
794 | 91.2k | /* 6686 */ "bleul\t\0" |
795 | 91.2k | /* 6693 */ "dmul\t\0" |
796 | 91.2k | /* 6699 */ "bgtul\t\0" |
797 | 91.2k | /* 6706 */ "bltul\t\0" |
798 | 91.2k | /* 6713 */ "lwl\t\0" |
799 | 91.2k | /* 6718 */ "swl\t\0" |
800 | 91.2k | /* 6723 */ "bgezl\t\0" |
801 | 91.2k | /* 6730 */ "blezl\t\0" |
802 | 91.2k | /* 6737 */ "bgtzl\t\0" |
803 | 91.2k | /* 6744 */ "bltzl\t\0" |
804 | 91.2k | /* 6751 */ "drem\t\0" |
805 | 91.2k | /* 6757 */ "dinsm\t\0" |
806 | 91.2k | /* 6764 */ "dextm\t\0" |
807 | 91.2k | /* 6771 */ "ualwm\t\0" |
808 | 91.2k | /* 6778 */ "uaswm\t\0" |
809 | 91.2k | /* 6785 */ "balign\t\0" |
810 | 91.2k | /* 6793 */ "dalign\t\0" |
811 | 91.2k | /* 6801 */ "movn\t\0" |
812 | 91.2k | /* 6807 */ "dclo\t\0" |
813 | 91.2k | /* 6813 */ "mflo\t\0" |
814 | 91.2k | /* 6819 */ "shilo\t\0" |
815 | 91.2k | /* 6826 */ "mtlo\t\0" |
816 | 91.2k | /* 6832 */ "dmulo\t\0" |
817 | 91.2k | /* 6839 */ "dbitswap\t\0" |
818 | 91.2k | /* 6849 */ "sdbbp\t\0" |
819 | 91.2k | /* 6856 */ "extpdp\t\0" |
820 | 91.2k | /* 6864 */ "movep\t\0" |
821 | 91.2k | /* 6871 */ "mthlip\t\0" |
822 | 91.2k | /* 6879 */ "cmp\t\0" |
823 | 91.2k | /* 6884 */ "dpop\t\0" |
824 | 91.2k | /* 6890 */ "addiur1sp\t\0" |
825 | 91.2k | /* 6901 */ "load_ccond_dsp\t\0" |
826 | 91.2k | /* 6917 */ "store_ccond_dsp\t\0" |
827 | 91.2k | /* 6934 */ "rddsp\t\0" |
828 | 91.2k | /* 6941 */ "wrdsp\t\0" |
829 | 91.2k | /* 6948 */ "jrcaddiusp\t\0" |
830 | 91.2k | /* 6960 */ "jraddiusp\t\0" |
831 | 91.2k | /* 6971 */ "swsp\t\0" |
832 | 91.2k | /* 6977 */ "extp\t\0" |
833 | 91.2k | /* 6983 */ "dvp\t\0" |
834 | 91.2k | /* 6988 */ "evp\t\0" |
835 | 91.2k | /* 6993 */ "lwp\t\0" |
836 | 91.2k | /* 6998 */ "swp\t\0" |
837 | 91.2k | /* 7003 */ "beq\t\0" |
838 | 91.2k | /* 7008 */ "seq\t\0" |
839 | 91.2k | /* 7013 */ "teq\t\0" |
840 | 91.2k | /* 7018 */ "dpau.h.qbr\t\0" |
841 | 91.2k | /* 7030 */ "dpsu.h.qbr\t\0" |
842 | 91.2k | /* 7042 */ "muleu_s.ph.qbr\t\0" |
843 | 91.2k | /* 7058 */ "preceu.ph.qbr\t\0" |
844 | 91.2k | /* 7073 */ "precequ.ph.qbr\t\0" |
845 | 91.2k | /* 7089 */ "ldr\t\0" |
846 | 91.2k | /* 7094 */ "sdr\t\0" |
847 | 91.2k | /* 7099 */ "maq_sa.w.phr\t\0" |
848 | 91.2k | /* 7113 */ "preceq.w.phr\t\0" |
849 | 91.2k | /* 7127 */ "maq_s.w.phr\t\0" |
850 | 91.2k | /* 7140 */ "muleq_s.w.phr\t\0" |
851 | 91.2k | /* 7155 */ "jr\t\0" |
852 | 91.2k | /* 7159 */ "jalr\t\0" |
853 | 91.2k | /* 7165 */ "nor\t\0" |
854 | 91.2k | /* 7170 */ "dror\t\0" |
855 | 91.2k | /* 7176 */ "xor\t\0" |
856 | 91.2k | /* 7181 */ "rdpgpr\t\0" |
857 | 91.2k | /* 7189 */ "wrpgpr\t\0" |
858 | 91.2k | /* 7197 */ "mftr\t\0" |
859 | 91.2k | /* 7203 */ "drotr\t\0" |
860 | 91.2k | /* 7210 */ "mttr\t\0" |
861 | 91.2k | /* 7216 */ "rdhwr\t\0" |
862 | 91.2k | /* 7223 */ "lwr\t\0" |
863 | 91.2k | /* 7228 */ "swr\t\0" |
864 | 91.2k | /* 7233 */ "mina.s\t\0" |
865 | 91.2k | /* 7241 */ "maxa.s\t\0" |
866 | 91.2k | /* 7249 */ "nmsub.s\t\0" |
867 | 91.2k | /* 7258 */ "cvt.d.s\t\0" |
868 | 91.2k | /* 7267 */ "nmadd.s\t\0" |
869 | 91.2k | /* 7276 */ "c.nge.s\t\0" |
870 | 91.2k | /* 7285 */ "c.le.s\t\0" |
871 | 91.2k | /* 7293 */ "cmp.le.s\t\0" |
872 | 91.2k | /* 7303 */ "c.ngle.s\t\0" |
873 | 91.2k | /* 7313 */ "c.ole.s\t\0" |
874 | 91.2k | /* 7322 */ "cmp.sle.s\t\0" |
875 | 91.2k | /* 7333 */ "c.ule.s\t\0" |
876 | 91.2k | /* 7342 */ "cmp.ule.s\t\0" |
877 | 91.2k | /* 7353 */ "cmp.sule.s\t\0" |
878 | 91.2k | /* 7365 */ "c.f.s\t\0" |
879 | 91.2k | /* 7372 */ "cmp.af.s\t\0" |
880 | 91.2k | /* 7382 */ "cmp.saf.s\t\0" |
881 | 91.2k | /* 7393 */ "msubf.s\t\0" |
882 | 91.2k | /* 7402 */ "maddf.s\t\0" |
883 | 91.2k | /* 7411 */ "c.sf.s\t\0" |
884 | 91.2k | /* 7419 */ "movf.s\t\0" |
885 | 91.2k | /* 7427 */ "neg.s\t\0" |
886 | 91.2k | /* 7434 */ "li.s\t\0" |
887 | 91.2k | /* 7440 */ "trunc.l.s\t\0" |
888 | 91.2k | /* 7451 */ "round.l.s\t\0" |
889 | 91.2k | /* 7462 */ "ceil.l.s\t\0" |
890 | 91.2k | /* 7472 */ "floor.l.s\t\0" |
891 | 91.2k | /* 7483 */ "cvt.l.s\t\0" |
892 | 91.2k | /* 7492 */ "sel.s\t\0" |
893 | 91.2k | /* 7499 */ "c.ngl.s\t\0" |
894 | 91.2k | /* 7508 */ "mul.s\t\0" |
895 | 91.2k | /* 7515 */ "min.s\t\0" |
896 | 91.2k | /* 7522 */ "c.un.s\t\0" |
897 | 91.2k | /* 7530 */ "cmp.un.s\t\0" |
898 | 91.2k | /* 7540 */ "cmp.sun.s\t\0" |
899 | 91.2k | /* 7551 */ "movn.s\t\0" |
900 | 91.2k | /* 7559 */ "recip.s\t\0" |
901 | 91.2k | /* 7568 */ "c.eq.s\t\0" |
902 | 91.2k | /* 7576 */ "cmp.eq.s\t\0" |
903 | 91.2k | /* 7586 */ "c.seq.s\t\0" |
904 | 91.2k | /* 7595 */ "cmp.seq.s\t\0" |
905 | 91.2k | /* 7606 */ "c.ueq.s\t\0" |
906 | 91.2k | /* 7615 */ "cmp.ueq.s\t\0" |
907 | 91.2k | /* 7626 */ "cmp.sueq.s\t\0" |
908 | 91.2k | /* 7638 */ "abs.s\t\0" |
909 | 91.2k | /* 7645 */ "cvt.ps.s\t\0" |
910 | 91.2k | /* 7655 */ "class.s\t\0" |
911 | 91.2k | /* 7664 */ "c.ngt.s\t\0" |
912 | 91.2k | /* 7673 */ "c.lt.s\t\0" |
913 | 91.2k | /* 7681 */ "cmp.lt.s\t\0" |
914 | 91.2k | /* 7691 */ "c.olt.s\t\0" |
915 | 91.2k | /* 7700 */ "cmp.slt.s\t\0" |
916 | 91.2k | /* 7711 */ "c.ult.s\t\0" |
917 | 91.2k | /* 7720 */ "cmp.ult.s\t\0" |
918 | 91.2k | /* 7731 */ "cmp.sult.s\t\0" |
919 | 91.2k | /* 7743 */ "rint.s\t\0" |
920 | 91.2k | /* 7751 */ "rsqrt.s\t\0" |
921 | 91.2k | /* 7760 */ "movt.s\t\0" |
922 | 91.2k | /* 7768 */ "div.s\t\0" |
923 | 91.2k | /* 7775 */ "mov.s\t\0" |
924 | 91.2k | /* 7782 */ "trunc.w.s\t\0" |
925 | 91.2k | /* 7793 */ "round.w.s\t\0" |
926 | 91.2k | /* 7804 */ "ceil.w.s\t\0" |
927 | 91.2k | /* 7814 */ "floor.w.s\t\0" |
928 | 91.2k | /* 7825 */ "cvt.w.s\t\0" |
929 | 91.2k | /* 7834 */ "max.s\t\0" |
930 | 91.2k | /* 7841 */ "selnez.s\t\0" |
931 | 91.2k | /* 7851 */ "seleqz.s\t\0" |
932 | 91.2k | /* 7861 */ "movz.s\t\0" |
933 | 91.2k | /* 7869 */ "abs\t\0" |
934 | 91.2k | /* 7874 */ "jals\t\0" |
935 | 91.2k | /* 7880 */ "bgezals\t\0" |
936 | 91.2k | /* 7889 */ "bltzals\t\0" |
937 | 91.2k | /* 7898 */ "cins\t\0" |
938 | 91.2k | /* 7904 */ "dins\t\0" |
939 | 91.2k | /* 7910 */ "sub.ps\t\0" |
940 | 91.2k | /* 7918 */ "add.ps\t\0" |
941 | 91.2k | /* 7926 */ "pll.ps\t\0" |
942 | 91.2k | /* 7934 */ "mul.ps\t\0" |
943 | 91.2k | /* 7942 */ "pul.ps\t\0" |
944 | 91.2k | /* 7950 */ "addr.ps\t\0" |
945 | 91.2k | /* 7959 */ "mulr.ps\t\0" |
946 | 91.2k | /* 7968 */ "plu.ps\t\0" |
947 | 91.2k | /* 7976 */ "puu.ps\t\0" |
948 | 91.2k | /* 7984 */ "cvt.pw.ps\t\0" |
949 | 91.2k | /* 7995 */ "jalrs\t\0" |
950 | 91.2k | /* 8002 */ "exts\t\0" |
951 | 91.2k | /* 8008 */ "lhxs\t\0" |
952 | 91.2k | /* 8014 */ "shxs\t\0" |
953 | 91.2k | /* 8020 */ "lhuxs\t\0" |
954 | 91.2k | /* 8027 */ "lwxs\t\0" |
955 | 91.2k | /* 8033 */ "swxs\t\0" |
956 | 91.2k | /* 8039 */ "bc1t\t\0" |
957 | 91.2k | /* 8045 */ "bgt\t\0" |
958 | 91.2k | /* 8050 */ "sgt\t\0" |
959 | 91.2k | /* 8055 */ "wait\t\0" |
960 | 91.2k | /* 8061 */ "blt\t\0" |
961 | 91.2k | /* 8066 */ "slt\t\0" |
962 | 91.2k | /* 8071 */ "tlt\t\0" |
963 | 91.2k | /* 8076 */ "dmult\t\0" |
964 | 91.2k | /* 8083 */ "dmt\t\0" |
965 | 91.2k | /* 8088 */ "emt\t\0" |
966 | 91.2k | /* 8093 */ "not\t\0" |
967 | 91.2k | /* 8098 */ "ginvt\t\0" |
968 | 91.2k | /* 8105 */ "movt\t\0" |
969 | 91.2k | /* 8111 */ "dext\t\0" |
970 | 91.2k | /* 8117 */ "lbu\t\0" |
971 | 91.2k | /* 8122 */ "dsubu\t\0" |
972 | 91.2k | /* 8129 */ "msubu\t\0" |
973 | 91.2k | /* 8136 */ "baddu\t\0" |
974 | 91.2k | /* 8143 */ "daddu\t\0" |
975 | 91.2k | /* 8150 */ "maddu\t\0" |
976 | 91.2k | /* 8157 */ "dmodu\t\0" |
977 | 91.2k | /* 8164 */ "bgeu\t\0" |
978 | 91.2k | /* 8170 */ "sgeu\t\0" |
979 | 91.2k | /* 8176 */ "tgeu\t\0" |
980 | 91.2k | /* 8182 */ "bleu\t\0" |
981 | 91.2k | /* 8188 */ "sleu\t\0" |
982 | 91.2k | /* 8194 */ "ulhu\t\0" |
983 | 91.2k | /* 8200 */ "dmuhu\t\0" |
984 | 91.2k | /* 8207 */ "daddiu\t\0" |
985 | 91.2k | /* 8215 */ "tgeiu\t\0" |
986 | 91.2k | /* 8222 */ "sltiu\t\0" |
987 | 91.2k | /* 8229 */ "tltiu\t\0" |
988 | 91.2k | /* 8236 */ "v3mulu\t\0" |
989 | 91.2k | /* 8244 */ "dmulu\t\0" |
990 | 91.2k | /* 8251 */ "vmulu\t\0" |
991 | 91.2k | /* 8258 */ "dremu\t\0" |
992 | 91.2k | /* 8265 */ "dmulou\t\0" |
993 | 91.2k | /* 8273 */ "cvt.s.pu\t\0" |
994 | 91.2k | /* 8283 */ "dinsu\t\0" |
995 | 91.2k | /* 8290 */ "bgtu\t\0" |
996 | 91.2k | /* 8296 */ "sgtu\t\0" |
997 | 91.2k | /* 8302 */ "bltu\t\0" |
998 | 91.2k | /* 8308 */ "sltu\t\0" |
999 | 91.2k | /* 8314 */ "tltu\t\0" |
1000 | 91.2k | /* 8320 */ "dmultu\t\0" |
1001 | 91.2k | /* 8328 */ "dextu\t\0" |
1002 | 91.2k | /* 8335 */ "ddivu\t\0" |
1003 | 91.2k | /* 8342 */ "lwu\t\0" |
1004 | 91.2k | /* 8347 */ "and.v\t\0" |
1005 | 91.2k | /* 8354 */ "move.v\t\0" |
1006 | 91.2k | /* 8362 */ "bsel.v\t\0" |
1007 | 91.2k | /* 8370 */ "nor.v\t\0" |
1008 | 91.2k | /* 8377 */ "xor.v\t\0" |
1009 | 91.2k | /* 8384 */ "bz.v\t\0" |
1010 | 91.2k | /* 8390 */ "bmz.v\t\0" |
1011 | 91.2k | /* 8397 */ "bnz.v\t\0" |
1012 | 91.2k | /* 8404 */ "bmnz.v\t\0" |
1013 | 91.2k | /* 8412 */ "dsrav\t\0" |
1014 | 91.2k | /* 8419 */ "bitrev\t\0" |
1015 | 91.2k | /* 8427 */ "ddiv\t\0" |
1016 | 91.2k | /* 8433 */ "dsllv\t\0" |
1017 | 91.2k | /* 8440 */ "dsrlv\t\0" |
1018 | 91.2k | /* 8447 */ "shilov\t\0" |
1019 | 91.2k | /* 8455 */ "sov\t\0" |
1020 | 91.2k | /* 8460 */ "extpdpv\t\0" |
1021 | 91.2k | /* 8469 */ "extpv\t\0" |
1022 | 91.2k | /* 8476 */ "drotrv\t\0" |
1023 | 91.2k | /* 8484 */ "insv\t\0" |
1024 | 91.2k | /* 8490 */ "flog2.w\t\0" |
1025 | 91.2k | /* 8499 */ "fexp2.w\t\0" |
1026 | 91.2k | /* 8508 */ "add_a.w\t\0" |
1027 | 91.2k | /* 8517 */ "fmin_a.w\t\0" |
1028 | 91.2k | /* 8527 */ "adds_a.w\t\0" |
1029 | 91.2k | /* 8537 */ "fmax_a.w\t\0" |
1030 | 91.2k | /* 8547 */ "sra.w\t\0" |
1031 | 91.2k | /* 8554 */ "fsub.w\t\0" |
1032 | 91.2k | /* 8562 */ "fmsub.w\t\0" |
1033 | 91.2k | /* 8571 */ "nloc.w\t\0" |
1034 | 91.2k | /* 8579 */ "nlzc.w\t\0" |
1035 | 91.2k | /* 8587 */ "cvt.d.w\t\0" |
1036 | 91.2k | /* 8596 */ "fadd.w\t\0" |
1037 | 91.2k | /* 8604 */ "fmadd.w\t\0" |
1038 | 91.2k | /* 8613 */ "sld.w\t\0" |
1039 | 91.2k | /* 8620 */ "pckod.w\t\0" |
1040 | 91.2k | /* 8629 */ "ilvod.w\t\0" |
1041 | 91.2k | /* 8638 */ "fcle.w\t\0" |
1042 | 91.2k | /* 8646 */ "fsle.w\t\0" |
1043 | 91.2k | /* 8654 */ "fcule.w\t\0" |
1044 | 91.2k | /* 8663 */ "fsule.w\t\0" |
1045 | 91.2k | /* 8672 */ "fcne.w\t\0" |
1046 | 91.2k | /* 8680 */ "fsne.w\t\0" |
1047 | 91.2k | /* 8688 */ "fcune.w\t\0" |
1048 | 91.2k | /* 8697 */ "fsune.w\t\0" |
1049 | 91.2k | /* 8706 */ "insve.w\t\0" |
1050 | 91.2k | /* 8715 */ "fcaf.w\t\0" |
1051 | 91.2k | /* 8723 */ "fsaf.w\t\0" |
1052 | 91.2k | /* 8731 */ "vshf.w\t\0" |
1053 | 91.2k | /* 8739 */ "bneg.w\t\0" |
1054 | 91.2k | /* 8747 */ "precr_sra.ph.w\t\0" |
1055 | 91.2k | /* 8763 */ "precrq.ph.w\t\0" |
1056 | 91.2k | /* 8776 */ "precr_sra_r.ph.w\t\0" |
1057 | 91.2k | /* 8794 */ "precrq_rs.ph.w\t\0" |
1058 | 91.2k | /* 8810 */ "subqh.w\t\0" |
1059 | 91.2k | /* 8819 */ "addqh.w\t\0" |
1060 | 91.2k | /* 8828 */ "srai.w\t\0" |
1061 | 91.2k | /* 8836 */ "sldi.w\t\0" |
1062 | 91.2k | /* 8844 */ "bnegi.w\t\0" |
1063 | 91.2k | /* 8853 */ "slli.w\t\0" |
1064 | 91.2k | /* 8861 */ "srli.w\t\0" |
1065 | 91.2k | /* 8869 */ "binsli.w\t\0" |
1066 | 91.2k | /* 8879 */ "ceqi.w\t\0" |
1067 | 91.2k | /* 8887 */ "srari.w\t\0" |
1068 | 91.2k | /* 8896 */ "bclri.w\t\0" |
1069 | 91.2k | /* 8905 */ "srlri.w\t\0" |
1070 | 91.2k | /* 8914 */ "binsri.w\t\0" |
1071 | 91.2k | /* 8924 */ "splati.w\t\0" |
1072 | 91.2k | /* 8934 */ "bseti.w\t\0" |
1073 | 91.2k | /* 8943 */ "subvi.w\t\0" |
1074 | 91.2k | /* 8952 */ "addvi.w\t\0" |
1075 | 91.2k | /* 8961 */ "dpaq_sa.l.w\t\0" |
1076 | 91.2k | /* 8974 */ "dpsq_sa.l.w\t\0" |
1077 | 91.2k | /* 8987 */ "fill.w\t\0" |
1078 | 91.2k | /* 8995 */ "sll.w\t\0" |
1079 | 91.2k | /* 9002 */ "fexupl.w\t\0" |
1080 | 91.2k | /* 9012 */ "ffql.w\t\0" |
1081 | 91.2k | /* 9020 */ "srl.w\t\0" |
1082 | 91.2k | /* 9027 */ "binsl.w\t\0" |
1083 | 91.2k | /* 9036 */ "fmul.w\t\0" |
1084 | 91.2k | /* 9044 */ "ilvl.w\t\0" |
1085 | 91.2k | /* 9052 */ "fmin.w\t\0" |
1086 | 91.2k | /* 9060 */ "fcun.w\t\0" |
1087 | 91.2k | /* 9068 */ "fsun.w\t\0" |
1088 | 91.2k | /* 9076 */ "fexdo.w\t\0" |
1089 | 91.2k | /* 9085 */ "frcp.w\t\0" |
1090 | 91.2k | /* 9093 */ "msub_q.w\t\0" |
1091 | 91.2k | /* 9103 */ "madd_q.w\t\0" |
1092 | 91.2k | /* 9113 */ "mul_q.w\t\0" |
1093 | 91.2k | /* 9122 */ "msubr_q.w\t\0" |
1094 | 91.2k | /* 9133 */ "maddr_q.w\t\0" |
1095 | 91.2k | /* 9144 */ "mulr_q.w\t\0" |
1096 | 91.2k | /* 9154 */ "fceq.w\t\0" |
1097 | 91.2k | /* 9162 */ "fseq.w\t\0" |
1098 | 91.2k | /* 9170 */ "fcueq.w\t\0" |
1099 | 91.2k | /* 9179 */ "fsueq.w\t\0" |
1100 | 91.2k | /* 9188 */ "ftq.w\t\0" |
1101 | 91.2k | /* 9195 */ "shra_r.w\t\0" |
1102 | 91.2k | /* 9205 */ "subqh_r.w\t\0" |
1103 | 91.2k | /* 9216 */ "addqh_r.w\t\0" |
1104 | 91.2k | /* 9227 */ "extr_r.w\t\0" |
1105 | 91.2k | /* 9237 */ "shrav_r.w\t\0" |
1106 | 91.2k | /* 9248 */ "extrv_r.w\t\0" |
1107 | 91.2k | /* 9259 */ "srar.w\t\0" |
1108 | 91.2k | /* 9267 */ "bclr.w\t\0" |
1109 | 91.2k | /* 9275 */ "srlr.w\t\0" |
1110 | 91.2k | /* 9283 */ "fcor.w\t\0" |
1111 | 91.2k | /* 9291 */ "fsor.w\t\0" |
1112 | 91.2k | /* 9299 */ "fexupr.w\t\0" |
1113 | 91.2k | /* 9309 */ "ffqr.w\t\0" |
1114 | 91.2k | /* 9317 */ "binsr.w\t\0" |
1115 | 91.2k | /* 9326 */ "extr.w\t\0" |
1116 | 91.2k | /* 9334 */ "ilvr.w\t\0" |
1117 | 91.2k | /* 9342 */ "cvt.s.w\t\0" |
1118 | 91.2k | /* 9351 */ "asub_s.w\t\0" |
1119 | 91.2k | /* 9361 */ "hsub_s.w\t\0" |
1120 | 91.2k | /* 9371 */ "dpsub_s.w\t\0" |
1121 | 91.2k | /* 9382 */ "ftrunc_s.w\t\0" |
1122 | 91.2k | /* 9394 */ "hadd_s.w\t\0" |
1123 | 91.2k | /* 9404 */ "dpadd_s.w\t\0" |
1124 | 91.2k | /* 9415 */ "mod_s.w\t\0" |
1125 | 91.2k | /* 9424 */ "cle_s.w\t\0" |
1126 | 91.2k | /* 9433 */ "ave_s.w\t\0" |
1127 | 91.2k | /* 9442 */ "clei_s.w\t\0" |
1128 | 91.2k | /* 9452 */ "mini_s.w\t\0" |
1129 | 91.2k | /* 9462 */ "clti_s.w\t\0" |
1130 | 91.2k | /* 9472 */ "maxi_s.w\t\0" |
1131 | 91.2k | /* 9482 */ "shll_s.w\t\0" |
1132 | 91.2k | /* 9492 */ "min_s.w\t\0" |
1133 | 91.2k | /* 9501 */ "dotp_s.w\t\0" |
1134 | 91.2k | /* 9511 */ "subq_s.w\t\0" |
1135 | 91.2k | /* 9521 */ "addq_s.w\t\0" |
1136 | 91.2k | /* 9531 */ "mulq_s.w\t\0" |
1137 | 91.2k | /* 9541 */ "absq_s.w\t\0" |
1138 | 91.2k | /* 9551 */ "aver_s.w\t\0" |
1139 | 91.2k | /* 9561 */ "subs_s.w\t\0" |
1140 | 91.2k | /* 9571 */ "adds_s.w\t\0" |
1141 | 91.2k | /* 9581 */ "sat_s.w\t\0" |
1142 | 91.2k | /* 9590 */ "clt_s.w\t\0" |
1143 | 91.2k | /* 9599 */ "ffint_s.w\t\0" |
1144 | 91.2k | /* 9610 */ "ftint_s.w\t\0" |
1145 | 91.2k | /* 9621 */ "subsuu_s.w\t\0" |
1146 | 91.2k | /* 9633 */ "div_s.w\t\0" |
1147 | 91.2k | /* 9642 */ "shllv_s.w\t\0" |
1148 | 91.2k | /* 9653 */ "max_s.w\t\0" |
1149 | 91.2k | /* 9662 */ "copy_s.w\t\0" |
1150 | 91.2k | /* 9672 */ "mulq_rs.w\t\0" |
1151 | 91.2k | /* 9683 */ "extr_rs.w\t\0" |
1152 | 91.2k | /* 9694 */ "extrv_rs.w\t\0" |
1153 | 91.2k | /* 9706 */ "fclass.w\t\0" |
1154 | 91.2k | /* 9716 */ "splat.w\t\0" |
1155 | 91.2k | /* 9725 */ "bset.w\t\0" |
1156 | 91.2k | /* 9733 */ "fclt.w\t\0" |
1157 | 91.2k | /* 9741 */ "fslt.w\t\0" |
1158 | 91.2k | /* 9749 */ "fcult.w\t\0" |
1159 | 91.2k | /* 9758 */ "fsult.w\t\0" |
1160 | 91.2k | /* 9767 */ "pcnt.w\t\0" |
1161 | 91.2k | /* 9775 */ "frint.w\t\0" |
1162 | 91.2k | /* 9784 */ "insert.w\t\0" |
1163 | 91.2k | /* 9794 */ "fsqrt.w\t\0" |
1164 | 91.2k | /* 9803 */ "frsqrt.w\t\0" |
1165 | 91.2k | /* 9813 */ "st.w\t\0" |
1166 | 91.2k | /* 9819 */ "asub_u.w\t\0" |
1167 | 91.2k | /* 9829 */ "hsub_u.w\t\0" |
1168 | 91.2k | /* 9839 */ "dpsub_u.w\t\0" |
1169 | 91.2k | /* 9850 */ "ftrunc_u.w\t\0" |
1170 | 91.2k | /* 9862 */ "hadd_u.w\t\0" |
1171 | 91.2k | /* 9872 */ "dpadd_u.w\t\0" |
1172 | 91.2k | /* 9883 */ "mod_u.w\t\0" |
1173 | 91.2k | /* 9892 */ "cle_u.w\t\0" |
1174 | 91.2k | /* 9901 */ "ave_u.w\t\0" |
1175 | 91.2k | /* 9910 */ "clei_u.w\t\0" |
1176 | 91.2k | /* 9920 */ "mini_u.w\t\0" |
1177 | 91.2k | /* 9930 */ "clti_u.w\t\0" |
1178 | 91.2k | /* 9940 */ "maxi_u.w\t\0" |
1179 | 91.2k | /* 9950 */ "min_u.w\t\0" |
1180 | 91.2k | /* 9959 */ "dotp_u.w\t\0" |
1181 | 91.2k | /* 9969 */ "aver_u.w\t\0" |
1182 | 91.2k | /* 9979 */ "subs_u.w\t\0" |
1183 | 91.2k | /* 9989 */ "adds_u.w\t\0" |
1184 | 91.2k | /* 9999 */ "subsus_u.w\t\0" |
1185 | 91.2k | /* 10011 */ "sat_u.w\t\0" |
1186 | 91.2k | /* 10020 */ "clt_u.w\t\0" |
1187 | 91.2k | /* 10029 */ "ffint_u.w\t\0" |
1188 | 91.2k | /* 10040 */ "ftint_u.w\t\0" |
1189 | 91.2k | /* 10051 */ "div_u.w\t\0" |
1190 | 91.2k | /* 10060 */ "max_u.w\t\0" |
1191 | 91.2k | /* 10069 */ "copy_u.w\t\0" |
1192 | 91.2k | /* 10079 */ "msubv.w\t\0" |
1193 | 91.2k | /* 10088 */ "maddv.w\t\0" |
1194 | 91.2k | /* 10097 */ "pckev.w\t\0" |
1195 | 91.2k | /* 10106 */ "ilvev.w\t\0" |
1196 | 91.2k | /* 10115 */ "fdiv.w\t\0" |
1197 | 91.2k | /* 10123 */ "mulv.w\t\0" |
1198 | 91.2k | /* 10131 */ "extrv.w\t\0" |
1199 | 91.2k | /* 10140 */ "fmax.w\t\0" |
1200 | 91.2k | /* 10148 */ "bz.w\t\0" |
1201 | 91.2k | /* 10154 */ "bnz.w\t\0" |
1202 | 91.2k | /* 10161 */ "crc32w\t\0" |
1203 | 91.2k | /* 10169 */ "crc32cw\t\0" |
1204 | 91.2k | /* 10178 */ "ualw\t\0" |
1205 | 91.2k | /* 10184 */ "ulw\t\0" |
1206 | 91.2k | /* 10189 */ "cvt.ps.pw\t\0" |
1207 | 91.2k | /* 10200 */ "uasw\t\0" |
1208 | 91.2k | /* 10206 */ "usw\t\0" |
1209 | 91.2k | /* 10211 */ "extw\t\0" |
1210 | 91.2k | /* 10217 */ "byterevw\t\0" |
1211 | 91.2k | /* 10227 */ "bitrevw\t\0" |
1212 | 91.2k | /* 10236 */ "lbx\t\0" |
1213 | 91.2k | /* 10241 */ "sbx\t\0" |
1214 | 91.2k | /* 10246 */ "prefx\t\0" |
1215 | 91.2k | /* 10253 */ "lhx\t\0" |
1216 | 91.2k | /* 10258 */ "shx\t\0" |
1217 | 91.2k | /* 10263 */ "jalx\t\0" |
1218 | 91.2k | /* 10269 */ "rotx\t\0" |
1219 | 91.2k | /* 10275 */ "lbux\t\0" |
1220 | 91.2k | /* 10281 */ "lhux\t\0" |
1221 | 91.2k | /* 10287 */ "lwx\t\0" |
1222 | 91.2k | /* 10292 */ "swx\t\0" |
1223 | 91.2k | /* 10297 */ "bgez\t\0" |
1224 | 91.2k | /* 10303 */ "blez\t\0" |
1225 | 91.2k | /* 10309 */ "bnez\t\0" |
1226 | 91.2k | /* 10315 */ "selnez\t\0" |
1227 | 91.2k | /* 10323 */ "btnez\t\0" |
1228 | 91.2k | /* 10330 */ "dclz\t\0" |
1229 | 91.2k | /* 10336 */ "beqz\t\0" |
1230 | 91.2k | /* 10342 */ "seleqz\t\0" |
1231 | 91.2k | /* 10350 */ "bteqz\t\0" |
1232 | 91.2k | /* 10357 */ "bgtz\t\0" |
1233 | 91.2k | /* 10363 */ "bltz\t\0" |
1234 | 91.2k | /* 10369 */ "movz\t\0" |
1235 | 91.2k | /* 10375 */ "seb\t \0" |
1236 | 91.2k | /* 10381 */ "seh\t \0" |
1237 | 91.2k | /* 10387 */ "ddivu\t$zero, \0" |
1238 | 91.2k | /* 10401 */ "ddiv\t$zero, \0" |
1239 | 91.2k | /* 10414 */ "addiu\t$sp, \0" |
1240 | 91.2k | /* 10426 */ "mftc0 \0" |
1241 | 91.2k | /* 10433 */ "mttc0 \0" |
1242 | 91.2k | /* 10440 */ "mfthc1 \0" |
1243 | 91.2k | /* 10448 */ "mtthc1 \0" |
1244 | 91.2k | /* 10456 */ "cftc1 \0" |
1245 | 91.2k | /* 10463 */ "mftc1 \0" |
1246 | 91.2k | /* 10470 */ "cttc1 \0" |
1247 | 91.2k | /* 10477 */ "mttc1 \0" |
1248 | 91.2k | /* 10484 */ "sync \0" |
1249 | 91.2k | /* 10490 */ "ld \0" |
1250 | 91.2k | /* 10494 */ "\t.word \0" |
1251 | 91.2k | /* 10502 */ "sd \0" |
1252 | 91.2k | /* 10506 */ "sne \0" |
1253 | 91.2k | /* 10511 */ "mfthi \0" |
1254 | 91.2k | /* 10518 */ "mtthi \0" |
1255 | 91.2k | /* 10525 */ "mftlo \0" |
1256 | 91.2k | /* 10532 */ "mttlo \0" |
1257 | 91.2k | /* 10539 */ "mftdsp \0" |
1258 | 91.2k | /* 10547 */ "mttdsp \0" |
1259 | 91.2k | /* 10555 */ "scwp \0" |
1260 | 91.2k | /* 10561 */ "llwp \0" |
1261 | 91.2k | /* 10567 */ "seq \0" |
1262 | 91.2k | /* 10572 */ "mftgpr \0" |
1263 | 91.2k | /* 10580 */ "mttgpr \0" |
1264 | 91.2k | /* 10588 */ "dext \0" |
1265 | 91.2k | /* 10594 */ "mftacx \0" |
1266 | 91.2k | /* 10602 */ "mttacx \0" |
1267 | 91.2k | /* 10610 */ "bc1nez \0" |
1268 | 91.2k | /* 10618 */ "bc2nez \0" |
1269 | 91.2k | /* 10626 */ "bc1eqz \0" |
1270 | 91.2k | /* 10634 */ "bc2eqz \0" |
1271 | 91.2k | /* 10642 */ "# XRay Function Patchable RET.\0" |
1272 | 91.2k | /* 10673 */ "c.\0" |
1273 | 91.2k | /* 10676 */ "# XRay Typed Event Log.\0" |
1274 | 91.2k | /* 10700 */ "# XRay Custom Event Log.\0" |
1275 | 91.2k | /* 10725 */ "# XRay Function Enter.\0" |
1276 | 91.2k | /* 10748 */ "# XRay Tail Call Exit.\0" |
1277 | 91.2k | /* 10771 */ "# XRay Function Exit.\0" |
1278 | 91.2k | /* 10793 */ "break 0\0" |
1279 | 91.2k | /* 10801 */ "nop32\0" |
1280 | 91.2k | /* 10807 */ "LIFETIME_END\0" |
1281 | 91.2k | /* 10820 */ "PSEUDO_PROBE\0" |
1282 | 91.2k | /* 10833 */ "BUNDLE\0" |
1283 | 91.2k | /* 10840 */ "DBG_VALUE\0" |
1284 | 91.2k | /* 10850 */ "DBG_INSTR_REF\0" |
1285 | 91.2k | /* 10864 */ "DBG_PHI\0" |
1286 | 91.2k | /* 10872 */ "DBG_LABEL\0" |
1287 | 91.2k | /* 10882 */ "LIFETIME_START\0" |
1288 | 91.2k | /* 10897 */ "DBG_VALUE_LIST\0" |
1289 | 91.2k | /* 10912 */ "jrc\t$ra\0" |
1290 | 91.2k | /* 10920 */ "jr\t$ra\0" |
1291 | 91.2k | /* 10927 */ "ehb\0" |
1292 | 91.2k | /* 10931 */ "eretnc\0" |
1293 | 91.2k | /* 10938 */ "pause\0" |
1294 | 91.2k | /* 10944 */ "tlbinvf\0" |
1295 | 91.2k | /* 10952 */ "tlbginvf\0" |
1296 | 91.2k | /* 10961 */ "tlbwi\0" |
1297 | 91.2k | /* 10967 */ "tlbgwi\0" |
1298 | 91.2k | /* 10974 */ "# FEntry call\0" |
1299 | 91.2k | /* 10988 */ "foo\0" |
1300 | 91.2k | /* 10992 */ "tlbp\0" |
1301 | 91.2k | /* 10997 */ "tlbgp\0" |
1302 | 91.2k | /* 11003 */ "ssnop\0" |
1303 | 91.2k | /* 11009 */ "tlbr\0" |
1304 | 91.2k | /* 11014 */ "tlbgr\0" |
1305 | 91.2k | /* 11020 */ "tlbwr\0" |
1306 | 91.2k | /* 11026 */ "tlbgwr\0" |
1307 | 91.2k | /* 11033 */ "deret\0" |
1308 | 91.2k | /* 11039 */ "wait\0" |
1309 | 91.2k | /* 11044 */ "tlbinv\0" |
1310 | 91.2k | /* 11051 */ "tlbginv\0" |
1311 | 91.2k | }; |
1312 | 91.2k | #endif // CAPSTONE_DIET |
1313 | | |
1314 | 91.2k | static const uint32_t OpInfo0[] = { |
1315 | 91.2k | 0U, // PHI |
1316 | 91.2k | 0U, // INLINEASM |
1317 | 91.2k | 0U, // INLINEASM_BR |
1318 | 91.2k | 0U, // CFI_INSTRUCTION |
1319 | 91.2k | 0U, // EH_LABEL |
1320 | 91.2k | 0U, // GC_LABEL |
1321 | 91.2k | 0U, // ANNOTATION_LABEL |
1322 | 91.2k | 0U, // KILL |
1323 | 91.2k | 0U, // EXTRACT_SUBREG |
1324 | 91.2k | 0U, // INSERT_SUBREG |
1325 | 91.2k | 0U, // IMPLICIT_DEF |
1326 | 91.2k | 0U, // SUBREG_TO_REG |
1327 | 91.2k | 0U, // COPY_TO_REGCLASS |
1328 | 91.2k | 10841U, // DBG_VALUE |
1329 | 91.2k | 10898U, // DBG_VALUE_LIST |
1330 | 91.2k | 10851U, // DBG_INSTR_REF |
1331 | 91.2k | 10865U, // DBG_PHI |
1332 | 91.2k | 10873U, // DBG_LABEL |
1333 | 91.2k | 0U, // REG_SEQUENCE |
1334 | 91.2k | 0U, // COPY |
1335 | 91.2k | 10834U, // BUNDLE |
1336 | 91.2k | 10883U, // LIFETIME_START |
1337 | 91.2k | 10808U, // LIFETIME_END |
1338 | 91.2k | 10821U, // PSEUDO_PROBE |
1339 | 91.2k | 0U, // ARITH_FENCE |
1340 | 91.2k | 0U, // STACKMAP |
1341 | 91.2k | 10975U, // FENTRY_CALL |
1342 | 91.2k | 0U, // PATCHPOINT |
1343 | 91.2k | 0U, // LOAD_STACK_GUARD |
1344 | 91.2k | 0U, // PREALLOCATED_SETUP |
1345 | 91.2k | 0U, // PREALLOCATED_ARG |
1346 | 91.2k | 0U, // STATEPOINT |
1347 | 91.2k | 0U, // LOCAL_ESCAPE |
1348 | 91.2k | 0U, // FAULTING_OP |
1349 | 91.2k | 0U, // PATCHABLE_OP |
1350 | 91.2k | 10726U, // PATCHABLE_FUNCTION_ENTER |
1351 | 91.2k | 10643U, // PATCHABLE_RET |
1352 | 91.2k | 10772U, // PATCHABLE_FUNCTION_EXIT |
1353 | 91.2k | 10749U, // PATCHABLE_TAIL_CALL |
1354 | 91.2k | 10701U, // PATCHABLE_EVENT_CALL |
1355 | 91.2k | 10677U, // PATCHABLE_TYPED_EVENT_CALL |
1356 | 91.2k | 0U, // ICALL_BRANCH_FUNNEL |
1357 | 91.2k | 0U, // MEMBARRIER |
1358 | 91.2k | 0U, // JUMP_TABLE_DEBUG_INFO |
1359 | 91.2k | 0U, // G_ASSERT_SEXT |
1360 | 91.2k | 0U, // G_ASSERT_ZEXT |
1361 | 91.2k | 0U, // G_ASSERT_ALIGN |
1362 | 91.2k | 0U, // G_ADD |
1363 | 91.2k | 0U, // G_SUB |
1364 | 91.2k | 0U, // G_MUL |
1365 | 91.2k | 0U, // G_SDIV |
1366 | 91.2k | 0U, // G_UDIV |
1367 | 91.2k | 0U, // G_SREM |
1368 | 91.2k | 0U, // G_UREM |
1369 | 91.2k | 0U, // G_SDIVREM |
1370 | 91.2k | 0U, // G_UDIVREM |
1371 | 91.2k | 0U, // G_AND |
1372 | 91.2k | 0U, // G_OR |
1373 | 91.2k | 0U, // G_XOR |
1374 | 91.2k | 0U, // G_IMPLICIT_DEF |
1375 | 91.2k | 0U, // G_PHI |
1376 | 91.2k | 0U, // G_FRAME_INDEX |
1377 | 91.2k | 0U, // G_GLOBAL_VALUE |
1378 | 91.2k | 0U, // G_CONSTANT_POOL |
1379 | 91.2k | 0U, // G_EXTRACT |
1380 | 91.2k | 0U, // G_UNMERGE_VALUES |
1381 | 91.2k | 0U, // G_INSERT |
1382 | 91.2k | 0U, // G_MERGE_VALUES |
1383 | 91.2k | 0U, // G_BUILD_VECTOR |
1384 | 91.2k | 0U, // G_BUILD_VECTOR_TRUNC |
1385 | 91.2k | 0U, // G_CONCAT_VECTORS |
1386 | 91.2k | 0U, // G_PTRTOINT |
1387 | 91.2k | 0U, // G_INTTOPTR |
1388 | 91.2k | 0U, // G_BITCAST |
1389 | 91.2k | 0U, // G_FREEZE |
1390 | 91.2k | 0U, // G_CONSTANT_FOLD_BARRIER |
1391 | 91.2k | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
1392 | 91.2k | 0U, // G_INTRINSIC_TRUNC |
1393 | 91.2k | 0U, // G_INTRINSIC_ROUND |
1394 | 91.2k | 0U, // G_INTRINSIC_LRINT |
1395 | 91.2k | 0U, // G_INTRINSIC_ROUNDEVEN |
1396 | 91.2k | 0U, // G_READCYCLECOUNTER |
1397 | 91.2k | 0U, // G_LOAD |
1398 | 91.2k | 0U, // G_SEXTLOAD |
1399 | 91.2k | 0U, // G_ZEXTLOAD |
1400 | 91.2k | 0U, // G_INDEXED_LOAD |
1401 | 91.2k | 0U, // G_INDEXED_SEXTLOAD |
1402 | 91.2k | 0U, // G_INDEXED_ZEXTLOAD |
1403 | 91.2k | 0U, // G_STORE |
1404 | 91.2k | 0U, // G_INDEXED_STORE |
1405 | 91.2k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
1406 | 91.2k | 0U, // G_ATOMIC_CMPXCHG |
1407 | 91.2k | 0U, // G_ATOMICRMW_XCHG |
1408 | 91.2k | 0U, // G_ATOMICRMW_ADD |
1409 | 91.2k | 0U, // G_ATOMICRMW_SUB |
1410 | 91.2k | 0U, // G_ATOMICRMW_AND |
1411 | 91.2k | 0U, // G_ATOMICRMW_NAND |
1412 | 91.2k | 0U, // G_ATOMICRMW_OR |
1413 | 91.2k | 0U, // G_ATOMICRMW_XOR |
1414 | 91.2k | 0U, // G_ATOMICRMW_MAX |
1415 | 91.2k | 0U, // G_ATOMICRMW_MIN |
1416 | 91.2k | 0U, // G_ATOMICRMW_UMAX |
1417 | 91.2k | 0U, // G_ATOMICRMW_UMIN |
1418 | 91.2k | 0U, // G_ATOMICRMW_FADD |
1419 | 91.2k | 0U, // G_ATOMICRMW_FSUB |
1420 | 91.2k | 0U, // G_ATOMICRMW_FMAX |
1421 | 91.2k | 0U, // G_ATOMICRMW_FMIN |
1422 | 91.2k | 0U, // G_ATOMICRMW_UINC_WRAP |
1423 | 91.2k | 0U, // G_ATOMICRMW_UDEC_WRAP |
1424 | 91.2k | 0U, // G_FENCE |
1425 | 91.2k | 0U, // G_PREFETCH |
1426 | 91.2k | 0U, // G_BRCOND |
1427 | 91.2k | 0U, // G_BRINDIRECT |
1428 | 91.2k | 0U, // G_INVOKE_REGION_START |
1429 | 91.2k | 0U, // G_INTRINSIC |
1430 | 91.2k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
1431 | 91.2k | 0U, // G_INTRINSIC_CONVERGENT |
1432 | 91.2k | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
1433 | 91.2k | 0U, // G_ANYEXT |
1434 | 91.2k | 0U, // G_TRUNC |
1435 | 91.2k | 0U, // G_CONSTANT |
1436 | 91.2k | 0U, // G_FCONSTANT |
1437 | 91.2k | 0U, // G_VASTART |
1438 | 91.2k | 0U, // G_VAARG |
1439 | 91.2k | 0U, // G_SEXT |
1440 | 91.2k | 0U, // G_SEXT_INREG |
1441 | 91.2k | 0U, // G_ZEXT |
1442 | 91.2k | 0U, // G_SHL |
1443 | 91.2k | 0U, // G_LSHR |
1444 | 91.2k | 0U, // G_ASHR |
1445 | 91.2k | 0U, // G_FSHL |
1446 | 91.2k | 0U, // G_FSHR |
1447 | 91.2k | 0U, // G_ROTR |
1448 | 91.2k | 0U, // G_ROTL |
1449 | 91.2k | 0U, // G_ICMP |
1450 | 91.2k | 0U, // G_FCMP |
1451 | 91.2k | 0U, // G_SELECT |
1452 | 91.2k | 0U, // G_UADDO |
1453 | 91.2k | 0U, // G_UADDE |
1454 | 91.2k | 0U, // G_USUBO |
1455 | 91.2k | 0U, // G_USUBE |
1456 | 91.2k | 0U, // G_SADDO |
1457 | 91.2k | 0U, // G_SADDE |
1458 | 91.2k | 0U, // G_SSUBO |
1459 | 91.2k | 0U, // G_SSUBE |
1460 | 91.2k | 0U, // G_UMULO |
1461 | 91.2k | 0U, // G_SMULO |
1462 | 91.2k | 0U, // G_UMULH |
1463 | 91.2k | 0U, // G_SMULH |
1464 | 91.2k | 0U, // G_UADDSAT |
1465 | 91.2k | 0U, // G_SADDSAT |
1466 | 91.2k | 0U, // G_USUBSAT |
1467 | 91.2k | 0U, // G_SSUBSAT |
1468 | 91.2k | 0U, // G_USHLSAT |
1469 | 91.2k | 0U, // G_SSHLSAT |
1470 | 91.2k | 0U, // G_SMULFIX |
1471 | 91.2k | 0U, // G_UMULFIX |
1472 | 91.2k | 0U, // G_SMULFIXSAT |
1473 | 91.2k | 0U, // G_UMULFIXSAT |
1474 | 91.2k | 0U, // G_SDIVFIX |
1475 | 91.2k | 0U, // G_UDIVFIX |
1476 | 91.2k | 0U, // G_SDIVFIXSAT |
1477 | 91.2k | 0U, // G_UDIVFIXSAT |
1478 | 91.2k | 0U, // G_FADD |
1479 | 91.2k | 0U, // G_FSUB |
1480 | 91.2k | 0U, // G_FMUL |
1481 | 91.2k | 0U, // G_FMA |
1482 | 91.2k | 0U, // G_FMAD |
1483 | 91.2k | 0U, // G_FDIV |
1484 | 91.2k | 0U, // G_FREM |
1485 | 91.2k | 0U, // G_FPOW |
1486 | 91.2k | 0U, // G_FPOWI |
1487 | 91.2k | 0U, // G_FEXP |
1488 | 91.2k | 0U, // G_FEXP2 |
1489 | 91.2k | 0U, // G_FEXP10 |
1490 | 91.2k | 0U, // G_FLOG |
1491 | 91.2k | 0U, // G_FLOG2 |
1492 | 91.2k | 0U, // G_FLOG10 |
1493 | 91.2k | 0U, // G_FLDEXP |
1494 | 91.2k | 0U, // G_FFREXP |
1495 | 91.2k | 0U, // G_FNEG |
1496 | 91.2k | 0U, // G_FPEXT |
1497 | 91.2k | 0U, // G_FPTRUNC |
1498 | 91.2k | 0U, // G_FPTOSI |
1499 | 91.2k | 0U, // G_FPTOUI |
1500 | 91.2k | 0U, // G_SITOFP |
1501 | 91.2k | 0U, // G_UITOFP |
1502 | 91.2k | 0U, // G_FABS |
1503 | 91.2k | 0U, // G_FCOPYSIGN |
1504 | 91.2k | 0U, // G_IS_FPCLASS |
1505 | 91.2k | 0U, // G_FCANONICALIZE |
1506 | 91.2k | 0U, // G_FMINNUM |
1507 | 91.2k | 0U, // G_FMAXNUM |
1508 | 91.2k | 0U, // G_FMINNUM_IEEE |
1509 | 91.2k | 0U, // G_FMAXNUM_IEEE |
1510 | 91.2k | 0U, // G_FMINIMUM |
1511 | 91.2k | 0U, // G_FMAXIMUM |
1512 | 91.2k | 0U, // G_GET_FPENV |
1513 | 91.2k | 0U, // G_SET_FPENV |
1514 | 91.2k | 0U, // G_RESET_FPENV |
1515 | 91.2k | 0U, // G_GET_FPMODE |
1516 | 91.2k | 0U, // G_SET_FPMODE |
1517 | 91.2k | 0U, // G_RESET_FPMODE |
1518 | 91.2k | 0U, // G_PTR_ADD |
1519 | 91.2k | 0U, // G_PTRMASK |
1520 | 91.2k | 0U, // G_SMIN |
1521 | 91.2k | 0U, // G_SMAX |
1522 | 91.2k | 0U, // G_UMIN |
1523 | 91.2k | 0U, // G_UMAX |
1524 | 91.2k | 0U, // G_ABS |
1525 | 91.2k | 0U, // G_LROUND |
1526 | 91.2k | 0U, // G_LLROUND |
1527 | 91.2k | 0U, // G_BR |
1528 | 91.2k | 0U, // G_BRJT |
1529 | 91.2k | 0U, // G_INSERT_VECTOR_ELT |
1530 | 91.2k | 0U, // G_EXTRACT_VECTOR_ELT |
1531 | 91.2k | 0U, // G_SHUFFLE_VECTOR |
1532 | 91.2k | 0U, // G_CTTZ |
1533 | 91.2k | 0U, // G_CTTZ_ZERO_UNDEF |
1534 | 91.2k | 0U, // G_CTLZ |
1535 | 91.2k | 0U, // G_CTLZ_ZERO_UNDEF |
1536 | 91.2k | 0U, // G_CTPOP |
1537 | 91.2k | 0U, // G_BSWAP |
1538 | 91.2k | 0U, // G_BITREVERSE |
1539 | 91.2k | 0U, // G_FCEIL |
1540 | 91.2k | 0U, // G_FCOS |
1541 | 91.2k | 0U, // G_FSIN |
1542 | 91.2k | 0U, // G_FSQRT |
1543 | 91.2k | 0U, // G_FFLOOR |
1544 | 91.2k | 0U, // G_FRINT |
1545 | 91.2k | 0U, // G_FNEARBYINT |
1546 | 91.2k | 0U, // G_ADDRSPACE_CAST |
1547 | 91.2k | 0U, // G_BLOCK_ADDR |
1548 | 91.2k | 0U, // G_JUMP_TABLE |
1549 | 91.2k | 0U, // G_DYN_STACKALLOC |
1550 | 91.2k | 0U, // G_STACKSAVE |
1551 | 91.2k | 0U, // G_STACKRESTORE |
1552 | 91.2k | 0U, // G_STRICT_FADD |
1553 | 91.2k | 0U, // G_STRICT_FSUB |
1554 | 91.2k | 0U, // G_STRICT_FMUL |
1555 | 91.2k | 0U, // G_STRICT_FDIV |
1556 | 91.2k | 0U, // G_STRICT_FREM |
1557 | 91.2k | 0U, // G_STRICT_FMA |
1558 | 91.2k | 0U, // G_STRICT_FSQRT |
1559 | 91.2k | 0U, // G_STRICT_FLDEXP |
1560 | 91.2k | 0U, // G_READ_REGISTER |
1561 | 91.2k | 0U, // G_WRITE_REGISTER |
1562 | 91.2k | 0U, // G_MEMCPY |
1563 | 91.2k | 0U, // G_MEMCPY_INLINE |
1564 | 91.2k | 0U, // G_MEMMOVE |
1565 | 91.2k | 0U, // G_MEMSET |
1566 | 91.2k | 0U, // G_BZERO |
1567 | 91.2k | 0U, // G_VECREDUCE_SEQ_FADD |
1568 | 91.2k | 0U, // G_VECREDUCE_SEQ_FMUL |
1569 | 91.2k | 0U, // G_VECREDUCE_FADD |
1570 | 91.2k | 0U, // G_VECREDUCE_FMUL |
1571 | 91.2k | 0U, // G_VECREDUCE_FMAX |
1572 | 91.2k | 0U, // G_VECREDUCE_FMIN |
1573 | 91.2k | 0U, // G_VECREDUCE_FMAXIMUM |
1574 | 91.2k | 0U, // G_VECREDUCE_FMINIMUM |
1575 | 91.2k | 0U, // G_VECREDUCE_ADD |
1576 | 91.2k | 0U, // G_VECREDUCE_MUL |
1577 | 91.2k | 0U, // G_VECREDUCE_AND |
1578 | 91.2k | 0U, // G_VECREDUCE_OR |
1579 | 91.2k | 0U, // G_VECREDUCE_XOR |
1580 | 91.2k | 0U, // G_VECREDUCE_SMAX |
1581 | 91.2k | 0U, // G_VECREDUCE_SMIN |
1582 | 91.2k | 0U, // G_VECREDUCE_UMAX |
1583 | 91.2k | 0U, // G_VECREDUCE_UMIN |
1584 | 91.2k | 0U, // G_SBFX |
1585 | 91.2k | 0U, // G_UBFX |
1586 | 91.2k | 24254U, // ABSMacro |
1587 | 91.2k | 0U, // ADJCALLSTACKDOWN |
1588 | 91.2k | 0U, // ADJCALLSTACKDOWN_NM |
1589 | 91.2k | 0U, // ADJCALLSTACKUP |
1590 | 91.2k | 0U, // ADJCALLSTACKUP_NM |
1591 | 91.2k | 536894083U, // ALIGN_NM |
1592 | 91.2k | 0U, // AND_V_D_PSEUDO |
1593 | 91.2k | 0U, // AND_V_H_PSEUDO |
1594 | 91.2k | 0U, // AND_V_W_PSEUDO |
1595 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I16 |
1596 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I16_POSTRA |
1597 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I32 |
1598 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I32_POSTRA |
1599 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I64 |
1600 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I64_POSTRA |
1601 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I8 |
1602 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I8_POSTRA |
1603 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I16 |
1604 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I16_POSTRA |
1605 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I32 |
1606 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I32_POSTRA |
1607 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I64 |
1608 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I64_POSTRA |
1609 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I8 |
1610 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I8_POSTRA |
1611 | 91.2k | 0U, // ATOMIC_LOAD_AND_I16 |
1612 | 91.2k | 0U, // ATOMIC_LOAD_AND_I16_POSTRA |
1613 | 91.2k | 0U, // ATOMIC_LOAD_AND_I32 |
1614 | 91.2k | 0U, // ATOMIC_LOAD_AND_I32_POSTRA |
1615 | 91.2k | 0U, // ATOMIC_LOAD_AND_I64 |
1616 | 91.2k | 0U, // ATOMIC_LOAD_AND_I64_POSTRA |
1617 | 91.2k | 0U, // ATOMIC_LOAD_AND_I8 |
1618 | 91.2k | 0U, // ATOMIC_LOAD_AND_I8_POSTRA |
1619 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I16 |
1620 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I16_POSTRA |
1621 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I32 |
1622 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I32_POSTRA |
1623 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I64 |
1624 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I64_POSTRA |
1625 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I8 |
1626 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I8_POSTRA |
1627 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I16 |
1628 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I16_POSTRA |
1629 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I32 |
1630 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I32_POSTRA |
1631 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I64 |
1632 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I64_POSTRA |
1633 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I8 |
1634 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I8_POSTRA |
1635 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I16 |
1636 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I16_POSTRA |
1637 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I32 |
1638 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I32_POSTRA |
1639 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I64 |
1640 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I64_POSTRA |
1641 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I8 |
1642 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I8_POSTRA |
1643 | 91.2k | 0U, // ATOMIC_LOAD_OR_I16 |
1644 | 91.2k | 0U, // ATOMIC_LOAD_OR_I16_POSTRA |
1645 | 91.2k | 0U, // ATOMIC_LOAD_OR_I32 |
1646 | 91.2k | 0U, // ATOMIC_LOAD_OR_I32_POSTRA |
1647 | 91.2k | 0U, // ATOMIC_LOAD_OR_I64 |
1648 | 91.2k | 0U, // ATOMIC_LOAD_OR_I64_POSTRA |
1649 | 91.2k | 0U, // ATOMIC_LOAD_OR_I8 |
1650 | 91.2k | 0U, // ATOMIC_LOAD_OR_I8_POSTRA |
1651 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I16 |
1652 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I16_POSTRA |
1653 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I32 |
1654 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I32_POSTRA |
1655 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I64 |
1656 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I64_POSTRA |
1657 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I8 |
1658 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I8_POSTRA |
1659 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I16 |
1660 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I16_POSTRA |
1661 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I32 |
1662 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I32_POSTRA |
1663 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I64 |
1664 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I64_POSTRA |
1665 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I8 |
1666 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I8_POSTRA |
1667 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I16 |
1668 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I16_POSTRA |
1669 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I32 |
1670 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I32_POSTRA |
1671 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I64 |
1672 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I64_POSTRA |
1673 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I8 |
1674 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I8_POSTRA |
1675 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I16 |
1676 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I16_POSTRA |
1677 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I32 |
1678 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I32_POSTRA |
1679 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I64 |
1680 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I64_POSTRA |
1681 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I8 |
1682 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I8_POSTRA |
1683 | 91.2k | 0U, // ATOMIC_SWAP_I16 |
1684 | 91.2k | 0U, // ATOMIC_SWAP_I16_POSTRA |
1685 | 91.2k | 0U, // ATOMIC_SWAP_I32 |
1686 | 91.2k | 0U, // ATOMIC_SWAP_I32_POSTRA |
1687 | 91.2k | 0U, // ATOMIC_SWAP_I64 |
1688 | 91.2k | 0U, // ATOMIC_SWAP_I64_POSTRA |
1689 | 91.2k | 0U, // ATOMIC_SWAP_I8 |
1690 | 91.2k | 0U, // ATOMIC_SWAP_I8_POSTRA |
1691 | 91.2k | 0U, // B |
1692 | 91.2k | 0U, // BAL_BR |
1693 | 91.2k | 0U, // BAL_BR_MM |
1694 | 91.2k | 536893945U, // BEQLImmMacro |
1695 | 91.2k | 536891762U, // BGE |
1696 | 91.2k | 536891762U, // BGEImmMacro |
1697 | 91.2k | 536893806U, // BGEL |
1698 | 91.2k | 536893806U, // BGELImmMacro |
1699 | 91.2k | 536895461U, // BGEU |
1700 | 91.2k | 536895461U, // BGEUImmMacro |
1701 | 91.2k | 536893976U, // BGEUL |
1702 | 91.2k | 536893976U, // BGEULImmMacro |
1703 | 91.2k | 536895342U, // BGT |
1704 | 91.2k | 536895342U, // BGTImmMacro |
1705 | 91.2k | 536893964U, // BGTL |
1706 | 91.2k | 536893964U, // BGTLImmMacro |
1707 | 91.2k | 536895587U, // BGTU |
1708 | 91.2k | 536895587U, // BGTUImmMacro |
1709 | 91.2k | 536893996U, // BGTUL |
1710 | 91.2k | 536893996U, // BGTULImmMacro |
1711 | 91.2k | 536891802U, // BLE |
1712 | 91.2k | 536891802U, // BLEImmMacro |
1713 | 91.2k | 536893812U, // BLEL |
1714 | 91.2k | 536893812U, // BLELImmMacro |
1715 | 91.2k | 536895479U, // BLEU |
1716 | 91.2k | 536895479U, // BLEUImmMacro |
1717 | 91.2k | 536893983U, // BLEUL |
1718 | 91.2k | 536893983U, // BLEULImmMacro |
1719 | 91.2k | 536895358U, // BLT |
1720 | 91.2k | 536895358U, // BLTImmMacro |
1721 | 91.2k | 536893970U, // BLTL |
1722 | 91.2k | 536893970U, // BLTLImmMacro |
1723 | 91.2k | 536895599U, // BLTU |
1724 | 91.2k | 536895599U, // BLTUImmMacro |
1725 | 91.2k | 536894003U, // BLTUL |
1726 | 91.2k | 536894003U, // BLTULImmMacro |
1727 | 91.2k | 536893818U, // BNELImmMacro |
1728 | 91.2k | 0U, // BPOSGE32_PSEUDO |
1729 | 91.2k | 0U, // BSEL_D_PSEUDO |
1730 | 91.2k | 0U, // BSEL_FD_PSEUDO |
1731 | 91.2k | 0U, // BSEL_FW_PSEUDO |
1732 | 91.2k | 0U, // BSEL_H_PSEUDO |
1733 | 91.2k | 0U, // BSEL_W_PSEUDO |
1734 | 91.2k | 0U, // B_MM |
1735 | 91.2k | 557961U, // B_MMR6_Pseudo |
1736 | 91.2k | 557961U, // B_MM_Pseudo |
1737 | 91.2k | 536894300U, // BeqImm |
1738 | 91.2k | 536891829U, // BneImm |
1739 | 91.2k | 1073765088U, // BteqzT8CmpX16 |
1740 | 91.2k | 1073764517U, // BteqzT8CmpiX16 |
1741 | 91.2k | 1073766275U, // BteqzT8SltX16 |
1742 | 91.2k | 1073764547U, // BteqzT8SltiX16 |
1743 | 91.2k | 1073766431U, // BteqzT8SltiuX16 |
1744 | 91.2k | 1073766517U, // BteqzT8SltuX16 |
1745 | 91.2k | 1610636000U, // BtnezT8CmpX16 |
1746 | 91.2k | 1610635429U, // BtnezT8CmpiX16 |
1747 | 91.2k | 1610637187U, // BtnezT8SltX16 |
1748 | 91.2k | 1610635459U, // BtnezT8SltiX16 |
1749 | 91.2k | 1610637343U, // BtnezT8SltiuX16 |
1750 | 91.2k | 1610637429U, // BtnezT8SltuX16 |
1751 | 91.2k | 0U, // BuildPairF64 |
1752 | 91.2k | 0U, // BuildPairF64_64 |
1753 | 91.2k | 26841U, // CFTC1 |
1754 | 91.2k | 10989U, // CONSTPOOL_ENTRY |
1755 | 91.2k | 0U, // COPY_FD_PSEUDO |
1756 | 91.2k | 0U, // COPY_FW_PSEUDO |
1757 | 91.2k | 17885415U, // CTTC1 |
1758 | 91.2k | 551167U, // Constant32 |
1759 | 91.2k | 536893990U, // DMULImmMacro |
1760 | 91.2k | 536893990U, // DMULMacro |
1761 | 91.2k | 536894129U, // DMULOMacro |
1762 | 91.2k | 536895562U, // DMULOUMacro |
1763 | 91.2k | 536893929U, // DROL |
1764 | 91.2k | 536893929U, // DROLImm |
1765 | 91.2k | 536894467U, // DROR |
1766 | 91.2k | 536894467U, // DRORImm |
1767 | 91.2k | 536895724U, // DSDivIMacro |
1768 | 91.2k | 536895724U, // DSDivMacro |
1769 | 91.2k | 536894048U, // DSRemIMacro |
1770 | 91.2k | 536894048U, // DSRemMacro |
1771 | 91.2k | 536895632U, // DUDivIMacro |
1772 | 91.2k | 536895632U, // DUDivMacro |
1773 | 91.2k | 536895555U, // DURemIMacro |
1774 | 91.2k | 536895555U, // DURemMacro |
1775 | 91.2k | 0U, // ERet |
1776 | 91.2k | 0U, // ExtractElementF64 |
1777 | 91.2k | 0U, // ExtractElementF64_64 |
1778 | 91.2k | 0U, // FABS_D |
1779 | 91.2k | 0U, // FABS_W |
1780 | 91.2k | 0U, // FEXP2_D_1_PSEUDO |
1781 | 91.2k | 0U, // FEXP2_W_1_PSEUDO |
1782 | 91.2k | 0U, // FILL_FD_PSEUDO |
1783 | 91.2k | 0U, // FILL_FW_PSEUDO |
1784 | 91.2k | 2181060764U, // GotPrologue16 |
1785 | 91.2k | 0U, // INSERT_B_VIDX64_PSEUDO |
1786 | 91.2k | 0U, // INSERT_B_VIDX_PSEUDO |
1787 | 91.2k | 0U, // INSERT_D_VIDX64_PSEUDO |
1788 | 91.2k | 0U, // INSERT_D_VIDX_PSEUDO |
1789 | 91.2k | 0U, // INSERT_FD_PSEUDO |
1790 | 91.2k | 0U, // INSERT_FD_VIDX64_PSEUDO |
1791 | 91.2k | 0U, // INSERT_FD_VIDX_PSEUDO |
1792 | 91.2k | 0U, // INSERT_FW_PSEUDO |
1793 | 91.2k | 0U, // INSERT_FW_VIDX64_PSEUDO |
1794 | 91.2k | 0U, // INSERT_FW_VIDX_PSEUDO |
1795 | 91.2k | 0U, // INSERT_H_VIDX64_PSEUDO |
1796 | 91.2k | 0U, // INSERT_H_VIDX_PSEUDO |
1797 | 91.2k | 0U, // INSERT_W_VIDX64_PSEUDO |
1798 | 91.2k | 0U, // INSERT_W_VIDX_PSEUDO |
1799 | 91.2k | 0U, // JALR64Pseudo |
1800 | 91.2k | 0U, // JALRCPseudo |
1801 | 91.2k | 0U, // JALRHB64Pseudo |
1802 | 91.2k | 0U, // JALRHBPseudo |
1803 | 91.2k | 0U, // JALRPseudo |
1804 | 91.2k | 0U, // JAL_MMR6 |
1805 | 91.2k | 547080U, // JalOneReg |
1806 | 91.2k | 22792U, // JalTwoReg |
1807 | 91.2k | 50358523U, // LDMacro |
1808 | 91.2k | 0U, // LDR_D |
1809 | 91.2k | 0U, // LDR_W |
1810 | 91.2k | 0U, // LD_F16 |
1811 | 91.2k | 50348037U, // LOAD_ACC128 |
1812 | 91.2k | 50348037U, // LOAD_ACC64 |
1813 | 91.2k | 50348037U, // LOAD_ACC64DSP |
1814 | 91.2k | 50354934U, // LOAD_CCOND_DSP |
1815 | 91.2k | 0U, // LONG_BRANCH_ADDiu |
1816 | 91.2k | 0U, // LONG_BRANCH_ADDiu2Op |
1817 | 91.2k | 0U, // LONG_BRANCH_DADDiu |
1818 | 91.2k | 0U, // LONG_BRANCH_DADDiu2Op |
1819 | 91.2k | 0U, // LONG_BRANCH_LUi |
1820 | 91.2k | 0U, // LONG_BRANCH_LUi2Op |
1821 | 91.2k | 0U, // LONG_BRANCH_LUi2Op_64 |
1822 | 91.2k | 72310U, // LWM_MM |
1823 | 91.2k | 17196U, // LoadAddrImm32 |
1824 | 91.2k | 17217U, // LoadAddrImm64 |
1825 | 91.2k | 50348844U, // LoadAddrReg32 |
1826 | 91.2k | 50348865U, // LoadAddrReg64 |
1827 | 91.2k | 22684U, // LoadImm32 |
1828 | 91.2k | 22688U, // LoadImm64 |
1829 | 91.2k | 19348U, // LoadImmDoubleFGR |
1830 | 91.2k | 19348U, // LoadImmDoubleFGR_32 |
1831 | 91.2k | 19348U, // LoadImmDoubleGPR |
1832 | 91.2k | 23819U, // LoadImmSingleFGR |
1833 | 91.2k | 23819U, // LoadImmSingleGPR |
1834 | 91.2k | 0U, // LoadJumpTableOffset |
1835 | 91.2k | 1599429U, // LwConstant32 |
1836 | 91.2k | 26979U, // MFTACX |
1837 | 91.2k | 26979U, // MFTACX_NM |
1838 | 91.2k | 536897723U, // MFTC0 |
1839 | 91.2k | 536897723U, // MFTC0_NM |
1840 | 91.2k | 26848U, // MFTC1 |
1841 | 91.2k | 551212U, // MFTDSP |
1842 | 91.2k | 551212U, // MFTDSP_NM |
1843 | 91.2k | 26957U, // MFTGPR |
1844 | 91.2k | 26957U, // MFTGPR_NM |
1845 | 91.2k | 26825U, // MFTHC1 |
1846 | 91.2k | 26896U, // MFTHI |
1847 | 91.2k | 26896U, // MFTHI_NM |
1848 | 91.2k | 26910U, // MFTLO |
1849 | 91.2k | 26910U, // MFTLO_NM |
1850 | 91.2k | 0U, // MIPSeh_return32 |
1851 | 91.2k | 0U, // MIPSeh_return64 |
1852 | 91.2k | 0U, // MSA_FP_EXTEND_D_PSEUDO |
1853 | 91.2k | 0U, // MSA_FP_EXTEND_W_PSEUDO |
1854 | 91.2k | 0U, // MSA_FP_ROUND_D_PSEUDO |
1855 | 91.2k | 0U, // MSA_FP_ROUND_W_PSEUDO |
1856 | 91.2k | 17885547U, // MTTACX |
1857 | 91.2k | 17885547U, // MTTACX_NM |
1858 | 91.2k | 2752571586U, // MTTC0 |
1859 | 91.2k | 2752571586U, // MTTC0_NM |
1860 | 91.2k | 17885422U, // MTTC1 |
1861 | 91.2k | 551220U, // MTTDSP |
1862 | 91.2k | 551220U, // MTTDSP_NM |
1863 | 91.2k | 17885525U, // MTTGPR |
1864 | 91.2k | 17885525U, // MTTGPR_NM |
1865 | 91.2k | 17885393U, // MTTHC1 |
1866 | 91.2k | 17885463U, // MTTHI |
1867 | 91.2k | 17885463U, // MTTHI_NM |
1868 | 91.2k | 17885477U, // MTTLO |
1869 | 91.2k | 17885477U, // MTTLO_NM |
1870 | 91.2k | 536893991U, // MULImmMacro |
1871 | 91.2k | 536894130U, // MULOMacro |
1872 | 91.2k | 536895563U, // MULOUMacro |
1873 | 91.2k | 0U, // MUSTTAILCALLREG_NM |
1874 | 91.2k | 0U, // MUSTTAILCALL_NM |
1875 | 91.2k | 24462U, // MultRxRy16 |
1876 | 91.2k | 86040462U, // MultRxRyRz16 |
1877 | 91.2k | 24706U, // MultuRxRy16 |
1878 | 91.2k | 86040706U, // MultuRxRyRz16 |
1879 | 91.2k | 0U, // NOP |
1880 | 91.2k | 536894462U, // NORImm |
1881 | 91.2k | 536894462U, // NORImm64 |
1882 | 91.2k | 0U, // NOR_V_D_PSEUDO |
1883 | 91.2k | 0U, // NOR_V_H_PSEUDO |
1884 | 91.2k | 0U, // NOR_V_W_PSEUDO |
1885 | 91.2k | 0U, // OR_V_D_PSEUDO |
1886 | 91.2k | 0U, // OR_V_H_PSEUDO |
1887 | 91.2k | 0U, // OR_V_W_PSEUDO |
1888 | 91.2k | 536895505U, // PseudoADDIU_NM |
1889 | 91.2k | 536893544U, // PseudoANDI_NM |
1890 | 91.2k | 0U, // PseudoCMPU_EQ_QB |
1891 | 91.2k | 0U, // PseudoCMPU_LE_QB |
1892 | 91.2k | 0U, // PseudoCMPU_LT_QB |
1893 | 91.2k | 0U, // PseudoCMP_EQ_PH |
1894 | 91.2k | 0U, // PseudoCMP_LE_PH |
1895 | 91.2k | 0U, // PseudoCMP_LT_PH |
1896 | 91.2k | 16389U, // PseudoCVT_D32_W |
1897 | 91.2k | 16389U, // PseudoCVT_D64_L |
1898 | 91.2k | 16389U, // PseudoCVT_D64_W |
1899 | 91.2k | 16389U, // PseudoCVT_S_L |
1900 | 91.2k | 16389U, // PseudoCVT_S_W |
1901 | 91.2k | 0U, // PseudoDMULT |
1902 | 91.2k | 0U, // PseudoDMULTu |
1903 | 91.2k | 0U, // PseudoDSDIV |
1904 | 91.2k | 0U, // PseudoDUDIV |
1905 | 91.2k | 0U, // PseudoD_SELECT_I |
1906 | 91.2k | 0U, // PseudoD_SELECT_I64 |
1907 | 91.2k | 0U, // PseudoIndirectBranch |
1908 | 91.2k | 0U, // PseudoIndirectBranch64 |
1909 | 91.2k | 0U, // PseudoIndirectBranch64R6 |
1910 | 91.2k | 0U, // PseudoIndirectBranchNM |
1911 | 91.2k | 0U, // PseudoIndirectBranchR6 |
1912 | 91.2k | 0U, // PseudoIndirectBranch_MM |
1913 | 91.2k | 0U, // PseudoIndirectBranch_MMR6 |
1914 | 91.2k | 0U, // PseudoIndirectHazardBranch |
1915 | 91.2k | 0U, // PseudoIndirectHazardBranch64 |
1916 | 91.2k | 0U, // PseudoIndrectHazardBranch64R6 |
1917 | 91.2k | 0U, // PseudoIndrectHazardBranchR6 |
1918 | 91.2k | 100680492U, // PseudoLA_NM |
1919 | 91.2k | 100685980U, // PseudoLI_NM |
1920 | 91.2k | 0U, // PseudoMADD |
1921 | 91.2k | 0U, // PseudoMADDU |
1922 | 91.2k | 0U, // PseudoMADDU_MM |
1923 | 91.2k | 0U, // PseudoMADD_MM |
1924 | 91.2k | 0U, // PseudoMFHI |
1925 | 91.2k | 0U, // PseudoMFHI64 |
1926 | 91.2k | 0U, // PseudoMFHI_MM |
1927 | 91.2k | 0U, // PseudoMFLO |
1928 | 91.2k | 0U, // PseudoMFLO64 |
1929 | 91.2k | 0U, // PseudoMFLO_MM |
1930 | 91.2k | 0U, // PseudoMSUB |
1931 | 91.2k | 0U, // PseudoMSUBU |
1932 | 91.2k | 0U, // PseudoMSUBU_MM |
1933 | 91.2k | 0U, // PseudoMSUB_MM |
1934 | 91.2k | 0U, // PseudoMTLOHI |
1935 | 91.2k | 0U, // PseudoMTLOHI64 |
1936 | 91.2k | 0U, // PseudoMTLOHI_DSP |
1937 | 91.2k | 0U, // PseudoMTLOHI_MM |
1938 | 91.2k | 0U, // PseudoMULT |
1939 | 91.2k | 0U, // PseudoMULT_MM |
1940 | 91.2k | 0U, // PseudoMULTu |
1941 | 91.2k | 0U, // PseudoMULTu_MM |
1942 | 91.2k | 0U, // PseudoPICK_PH |
1943 | 91.2k | 0U, // PseudoPICK_QB |
1944 | 91.2k | 0U, // PseudoReturn |
1945 | 91.2k | 0U, // PseudoReturn64 |
1946 | 91.2k | 0U, // PseudoReturnNM |
1947 | 91.2k | 0U, // PseudoSDIV |
1948 | 91.2k | 0U, // PseudoSELECTFP_F_D32 |
1949 | 91.2k | 0U, // PseudoSELECTFP_F_D64 |
1950 | 91.2k | 0U, // PseudoSELECTFP_F_I |
1951 | 91.2k | 0U, // PseudoSELECTFP_F_I64 |
1952 | 91.2k | 0U, // PseudoSELECTFP_F_S |
1953 | 91.2k | 0U, // PseudoSELECTFP_T_D32 |
1954 | 91.2k | 0U, // PseudoSELECTFP_T_D64 |
1955 | 91.2k | 0U, // PseudoSELECTFP_T_I |
1956 | 91.2k | 0U, // PseudoSELECTFP_T_I64 |
1957 | 91.2k | 0U, // PseudoSELECTFP_T_S |
1958 | 91.2k | 0U, // PseudoSELECT_D32 |
1959 | 91.2k | 0U, // PseudoSELECT_D64 |
1960 | 91.2k | 0U, // PseudoSELECT_I |
1961 | 91.2k | 0U, // PseudoSELECT_I64 |
1962 | 91.2k | 0U, // PseudoSELECT_S |
1963 | 91.2k | 536895420U, // PseudoSUBU_NM |
1964 | 91.2k | 536891541U, // PseudoTRUNC_W_D |
1965 | 91.2k | 536891541U, // PseudoTRUNC_W_D32 |
1966 | 91.2k | 536895079U, // PseudoTRUNC_W_S |
1967 | 91.2k | 0U, // PseudoUDIV |
1968 | 91.2k | 536893930U, // ROL |
1969 | 91.2k | 536893930U, // ROLImm |
1970 | 91.2k | 536894468U, // ROR |
1971 | 91.2k | 536894468U, // RORImm |
1972 | 91.2k | 0U, // RetRA |
1973 | 91.2k | 0U, // RetRA16 |
1974 | 91.2k | 50351496U, // SDC1_M1 |
1975 | 91.2k | 0U, // SDIV_MM_Pseudo |
1976 | 91.2k | 50358535U, // SDMacro |
1977 | 91.2k | 536895725U, // SDivIMacro |
1978 | 91.2k | 536895725U, // SDivMacro |
1979 | 91.2k | 536897864U, // SEQIMacro |
1980 | 91.2k | 536897864U, // SEQMacro |
1981 | 91.2k | 536891767U, // SGE |
1982 | 91.2k | 536891767U, // SGEImm |
1983 | 91.2k | 536891767U, // SGEImm64 |
1984 | 91.2k | 536895467U, // SGEU |
1985 | 91.2k | 536895467U, // SGEUImm |
1986 | 91.2k | 536895467U, // SGEUImm64 |
1987 | 91.2k | 536895347U, // SGTImm |
1988 | 91.2k | 536895347U, // SGTImm64 |
1989 | 91.2k | 536895593U, // SGTUImm |
1990 | 91.2k | 536895593U, // SGTUImm64 |
1991 | 91.2k | 536891812U, // SLE |
1992 | 91.2k | 536891812U, // SLEImm |
1993 | 91.2k | 536891812U, // SLEImm64 |
1994 | 91.2k | 536895485U, // SLEU |
1995 | 91.2k | 536895485U, // SLEUImm |
1996 | 91.2k | 536895485U, // SLEUImm64 |
1997 | 91.2k | 536895363U, // SLTImm64 |
1998 | 91.2k | 536895605U, // SLTUImm64 |
1999 | 91.2k | 536897803U, // SNEIMacro |
2000 | 91.2k | 536897803U, // SNEMacro |
2001 | 91.2k | 0U, // SNZ_B_PSEUDO |
2002 | 91.2k | 0U, // SNZ_D_PSEUDO |
2003 | 91.2k | 0U, // SNZ_H_PSEUDO |
2004 | 91.2k | 0U, // SNZ_V_PSEUDO |
2005 | 91.2k | 0U, // SNZ_W_PSEUDO |
2006 | 91.2k | 536894049U, // SRemIMacro |
2007 | 91.2k | 536894049U, // SRemMacro |
2008 | 91.2k | 50348037U, // STORE_ACC128 |
2009 | 91.2k | 50348037U, // STORE_ACC64 |
2010 | 91.2k | 50348037U, // STORE_ACC64DSP |
2011 | 91.2k | 50354950U, // STORE_CCOND_DSP |
2012 | 91.2k | 0U, // STR_D |
2013 | 91.2k | 0U, // STR_W |
2014 | 91.2k | 0U, // ST_F16 |
2015 | 91.2k | 72317U, // SWM_MM |
2016 | 91.2k | 0U, // SZ_B_PSEUDO |
2017 | 91.2k | 0U, // SZ_D_PSEUDO |
2018 | 91.2k | 0U, // SZ_H_PSEUDO |
2019 | 91.2k | 0U, // SZ_V_PSEUDO |
2020 | 91.2k | 0U, // SZ_W_PSEUDO |
2021 | 91.2k | 50348827U, // SaaAddr |
2022 | 91.2k | 50352386U, // SaadAddr |
2023 | 91.2k | 2713697U, // SelBeqZ |
2024 | 91.2k | 2713670U, // SelBneZ |
2025 | 91.2k | 3338754784U, // SelTBteqZCmp |
2026 | 91.2k | 3338754213U, // SelTBteqZCmpi |
2027 | 91.2k | 3338755971U, // SelTBteqZSlt |
2028 | 91.2k | 3338754243U, // SelTBteqZSlti |
2029 | 91.2k | 3338756127U, // SelTBteqZSltiu |
2030 | 91.2k | 3338756213U, // SelTBteqZSltu |
2031 | 91.2k | 3875625696U, // SelTBtneZCmp |
2032 | 91.2k | 3875625125U, // SelTBtneZCmpi |
2033 | 91.2k | 3875626883U, // SelTBtneZSlt |
2034 | 91.2k | 3875625155U, // SelTBtneZSlti |
2035 | 91.2k | 3875627039U, // SelTBtneZSltiu |
2036 | 91.2k | 3875627125U, // SelTBtneZSltu |
2037 | 91.2k | 136372099U, // SltCCRxRy16 |
2038 | 91.2k | 136370371U, // SltiCCRxImmX16 |
2039 | 91.2k | 136372255U, // SltiuCCRxImmX16 |
2040 | 91.2k | 136372341U, // SltuCCRxRy16 |
2041 | 91.2k | 136372341U, // SltuRxRyRz16 |
2042 | 91.2k | 0U, // TAILCALL |
2043 | 91.2k | 0U, // TAILCALL64R6REG |
2044 | 91.2k | 0U, // TAILCALLHB64R6REG |
2045 | 91.2k | 0U, // TAILCALLHBR6REG |
2046 | 91.2k | 0U, // TAILCALLR6REG |
2047 | 91.2k | 0U, // TAILCALLREG |
2048 | 91.2k | 0U, // TAILCALLREG64 |
2049 | 91.2k | 0U, // TAILCALLREGHB |
2050 | 91.2k | 0U, // TAILCALLREGHB64 |
2051 | 91.2k | 0U, // TAILCALLREG_MM |
2052 | 91.2k | 0U, // TAILCALLREG_MMR6 |
2053 | 91.2k | 0U, // TAILCALLREG_NM |
2054 | 91.2k | 0U, // TAILCALL_MM |
2055 | 91.2k | 0U, // TAILCALL_MMR6 |
2056 | 91.2k | 0U, // TAILCALL_NM |
2057 | 91.2k | 0U, // TRAP |
2058 | 91.2k | 0U, // TRAP_MM |
2059 | 91.2k | 0U, // UDIV_MM_Pseudo |
2060 | 91.2k | 536895633U, // UDivIMacro |
2061 | 91.2k | 536895633U, // UDivMacro |
2062 | 91.2k | 536895556U, // URemIMacro |
2063 | 91.2k | 536895556U, // URemMacro |
2064 | 91.2k | 50353696U, // Ulh |
2065 | 91.2k | 50356227U, // Ulhu |
2066 | 91.2k | 50358217U, // Ulw |
2067 | 91.2k | 50354255U, // Ush |
2068 | 91.2k | 50358239U, // Usw |
2069 | 91.2k | 0U, // XOR_V_D_PSEUDO |
2070 | 91.2k | 0U, // XOR_V_H_PSEUDO |
2071 | 91.2k | 0U, // XOR_V_W_PSEUDO |
2072 | 91.2k | 22322U, // ABSQ_S_PH |
2073 | 91.2k | 22322U, // ABSQ_S_PH_MM |
2074 | 91.2k | 18359U, // ABSQ_S_QB |
2075 | 91.2k | 18359U, // ABSQ_S_QB_MMR2 |
2076 | 91.2k | 25926U, // ABSQ_S_W |
2077 | 91.2k | 25926U, // ABSQ_S_W_MM |
2078 | 91.2k | 536891671U, // ADD |
2079 | 91.2k | 536888015U, // ADDIU48_NM |
2080 | 91.2k | 536888026U, // ADDIUGP48_NM |
2081 | 91.2k | 536888039U, // ADDIUGPB_NM |
2082 | 91.2k | 536888078U, // ADDIUGPW_NM |
2083 | 91.2k | 536888052U, // ADDIUNEG_NM |
2084 | 91.2k | 18678U, // ADDIUPC |
2085 | 91.2k | 18678U, // ADDIUPC_MM |
2086 | 91.2k | 18678U, // ADDIUPC_MMR6 |
2087 | 91.2k | 23275U, // ADDIUR1SP_MM |
2088 | 91.2k | 536888064U, // ADDIUR1SP_NM |
2089 | 91.2k | 536887680U, // ADDIUR2_MM |
2090 | 91.2k | 536887964U, // ADDIUR2_NM |
2091 | 91.2k | 536887975U, // ADDIURS5_NM |
2092 | 91.2k | 18923937U, // ADDIUS5_MM |
2093 | 91.2k | 547624U, // ADDIUSP_MM |
2094 | 91.2k | 536895505U, // ADDIU_MMR6 |
2095 | 91.2k | 536887953U, // ADDIU_NM |
2096 | 91.2k | 536893039U, // ADDQH_PH |
2097 | 91.2k | 536893039U, // ADDQH_PH_MMR2 |
2098 | 91.2k | 536893156U, // ADDQH_R_PH |
2099 | 91.2k | 536893156U, // ADDQH_R_PH_MMR2 |
2100 | 91.2k | 536896513U, // ADDQH_R_W |
2101 | 91.2k | 536896513U, // ADDQH_R_W_MMR2 |
2102 | 91.2k | 536896116U, // ADDQH_W |
2103 | 91.2k | 536896116U, // ADDQH_W_MMR2 |
2104 | 91.2k | 536893113U, // ADDQ_PH |
2105 | 91.2k | 536893113U, // ADDQ_PH_MM |
2106 | 91.2k | 536893212U, // ADDQ_S_PH |
2107 | 91.2k | 536893212U, // ADDQ_S_PH_MM |
2108 | 91.2k | 536896818U, // ADDQ_S_W |
2109 | 91.2k | 536896818U, // ADDQ_S_W_MM |
2110 | 91.2k | 536895247U, // ADDR_PS64 |
2111 | 91.2k | 536889644U, // ADDSC |
2112 | 91.2k | 536889644U, // ADDSC_MM |
2113 | 91.2k | 536888213U, // ADDS_A_B |
2114 | 91.2k | 536889837U, // ADDS_A_D |
2115 | 91.2k | 536891952U, // ADDS_A_H |
2116 | 91.2k | 536895824U, // ADDS_A_W |
2117 | 91.2k | 536888689U, // ADDS_S_B |
2118 | 91.2k | 536890935U, // ADDS_S_D |
2119 | 91.2k | 536892517U, // ADDS_S_H |
2120 | 91.2k | 536896868U, // ADDS_S_W |
2121 | 91.2k | 536888904U, // ADDS_U_B |
2122 | 91.2k | 536891402U, // ADDS_U_D |
2123 | 91.2k | 536892795U, // ADDS_U_H |
2124 | 91.2k | 536897286U, // ADDS_U_W |
2125 | 91.2k | 536887900U, // ADDU16_MM |
2126 | 91.2k | 536887900U, // ADDU16_MMR6 |
2127 | 91.2k | 536889139U, // ADDUH_QB |
2128 | 91.2k | 536889139U, // ADDUH_QB_MMR2 |
2129 | 91.2k | 536889247U, // ADDUH_R_QB |
2130 | 91.2k | 536889247U, // ADDUH_R_QB_MMR2 |
2131 | 91.2k | 536895434U, // ADDU_MMR6 |
2132 | 91.2k | 536893311U, // ADDU_PH |
2133 | 91.2k | 536893311U, // ADDU_PH_MMR2 |
2134 | 91.2k | 536889352U, // ADDU_QB |
2135 | 91.2k | 536889352U, // ADDU_QB_MM |
2136 | 91.2k | 536893256U, // ADDU_S_PH |
2137 | 91.2k | 536893256U, // ADDU_S_PH_MMR2 |
2138 | 91.2k | 536889293U, // ADDU_S_QB |
2139 | 91.2k | 536889293U, // ADDU_S_QB_MM |
2140 | 91.2k | 536888470U, // ADDVI_B |
2141 | 91.2k | 536890357U, // ADDVI_D |
2142 | 91.2k | 536892176U, // ADDVI_H |
2143 | 91.2k | 536896249U, // ADDVI_W |
2144 | 91.2k | 536888982U, // ADDV_B |
2145 | 91.2k | 536891492U, // ADDV_D |
2146 | 91.2k | 536892873U, // ADDV_H |
2147 | 91.2k | 536897386U, // ADDV_W |
2148 | 91.2k | 536889713U, // ADDWC |
2149 | 91.2k | 536889713U, // ADDWC_MM |
2150 | 91.2k | 536888195U, // ADD_A_B |
2151 | 91.2k | 536889818U, // ADD_A_D |
2152 | 91.2k | 536891934U, // ADD_A_H |
2153 | 91.2k | 536895805U, // ADD_A_W |
2154 | 91.2k | 536891671U, // ADD_MM |
2155 | 91.2k | 536891671U, // ADD_MMR6 |
2156 | 91.2k | 536891671U, // ADD_NM |
2157 | 91.2k | 536893538U, // ADDi |
2158 | 91.2k | 536893538U, // ADDi_MM |
2159 | 91.2k | 536895505U, // ADDiu |
2160 | 91.2k | 536895505U, // ADDiu_MM |
2161 | 91.2k | 536895434U, // ADDu |
2162 | 91.2k | 536895434U, // ADDu16_NM |
2163 | 91.2k | 536895434U, // ADDu4x4_NM |
2164 | 91.2k | 536895434U, // ADDu_MM |
2165 | 91.2k | 536895434U, // ADDu_NM |
2166 | 91.2k | 536894083U, // ALIGN |
2167 | 91.2k | 536894083U, // ALIGN_MMR6 |
2168 | 91.2k | 18670U, // ALUIPC |
2169 | 91.2k | 18670U, // ALUIPC_MMR6 |
2170 | 91.2k | 151013614U, // ALUIPC_NM |
2171 | 91.2k | 536891700U, // AND |
2172 | 91.2k | 20021711U, // AND16_MM |
2173 | 91.2k | 20021711U, // AND16_MMR6 |
2174 | 91.2k | 536891700U, // AND16_NM |
2175 | 91.2k | 536891700U, // AND64 |
2176 | 91.2k | 536887780U, // ANDI16_MM |
2177 | 91.2k | 536887780U, // ANDI16_MMR6 |
2178 | 91.2k | 536887997U, // ANDI16_NM |
2179 | 91.2k | 536888329U, // ANDI_B |
2180 | 91.2k | 536893544U, // ANDI_MMR6 |
2181 | 91.2k | 536887943U, // ANDI_NM |
2182 | 91.2k | 536891700U, // AND_MM |
2183 | 91.2k | 536891700U, // AND_MMR6 |
2184 | 91.2k | 536891700U, // AND_NM |
2185 | 91.2k | 536895644U, // AND_V |
2186 | 91.2k | 536893544U, // ANDi |
2187 | 91.2k | 536893544U, // ANDi64 |
2188 | 91.2k | 536893544U, // ANDi_MM |
2189 | 91.2k | 536891714U, // APPEND |
2190 | 91.2k | 536891714U, // APPEND_MMR2 |
2191 | 91.2k | 536888583U, // ASUB_S_B |
2192 | 91.2k | 536890765U, // ASUB_S_D |
2193 | 91.2k | 536892349U, // ASUB_S_H |
2194 | 91.2k | 536896648U, // ASUB_S_W |
2195 | 91.2k | 536888798U, // ASUB_U_B |
2196 | 91.2k | 536891232U, // ASUB_U_D |
2197 | 91.2k | 536892637U, // ASUB_U_H |
2198 | 91.2k | 536897116U, // ASUB_U_W |
2199 | 91.2k | 536893648U, // AUI |
2200 | 91.2k | 18663U, // AUIPC |
2201 | 91.2k | 18663U, // AUIPC_MMR6 |
2202 | 91.2k | 536893648U, // AUI_MMR6 |
2203 | 91.2k | 536888669U, // AVER_S_B |
2204 | 91.2k | 536890915U, // AVER_S_D |
2205 | 91.2k | 536892487U, // AVER_S_H |
2206 | 91.2k | 536896848U, // AVER_S_W |
2207 | 91.2k | 536888884U, // AVER_U_B |
2208 | 91.2k | 536891382U, // AVER_U_D |
2209 | 91.2k | 536892775U, // AVER_U_H |
2210 | 91.2k | 536897266U, // AVER_U_W |
2211 | 91.2k | 536888611U, // AVE_S_B |
2212 | 91.2k | 536890847U, // AVE_S_D |
2213 | 91.2k | 536892419U, // AVE_S_H |
2214 | 91.2k | 536896730U, // AVE_S_W |
2215 | 91.2k | 536888826U, // AVE_U_B |
2216 | 91.2k | 536891314U, // AVE_U_D |
2217 | 91.2k | 536892707U, // AVE_U_H |
2218 | 91.2k | 536897198U, // AVE_U_W |
2219 | 91.2k | 24593U, // AddiuRxImmX16 |
2220 | 91.2k | 3694609U, // AddiuRxPcImmX16 |
2221 | 91.2k | 33579025U, // AddiuRxRxImm16 |
2222 | 91.2k | 33579025U, // AddiuRxRxImmX16 |
2223 | 91.2k | 167796753U, // AddiuRxRyOffMemX16 |
2224 | 91.2k | 4221103U, // AddiuSpImm16 |
2225 | 91.2k | 551087U, // AddiuSpImmX16 |
2226 | 91.2k | 536895434U, // AdduRxRyRz16 |
2227 | 91.2k | 33575220U, // AndRxRxRy16 |
2228 | 91.2k | 557483U, // B16_MM |
2229 | 91.2k | 536895433U, // BADDu |
2230 | 91.2k | 563459U, // BAL |
2231 | 91.2k | 559256U, // BALC |
2232 | 91.2k | 115379U, // BALC16_NM |
2233 | 91.2k | 559256U, // BALC_MMR6 |
2234 | 91.2k | 116888U, // BALC_NM |
2235 | 91.2k | 536894082U, // BALIGN |
2236 | 91.2k | 536894082U, // BALIGN_MMR2 |
2237 | 91.2k | 18745U, // BALRSC_NM |
2238 | 91.2k | 536889778U, // BBEQZC_NM |
2239 | 91.2k | 184565845U, // BBIT0 |
2240 | 91.2k | 184565977U, // BBIT032 |
2241 | 91.2k | 184565970U, // BBIT1 |
2242 | 91.2k | 184565986U, // BBIT132 |
2243 | 91.2k | 536889752U, // BBNEZC_NM |
2244 | 91.2k | 559202U, // BC |
2245 | 91.2k | 557488U, // BC16_MMR6 |
2246 | 91.2k | 559202U, // BC16_NM |
2247 | 91.2k | 201353603U, // BC1EQZ |
2248 | 91.2k | 201345440U, // BC1EQZC_MMR6 |
2249 | 91.2k | 201347591U, // BC1F |
2250 | 91.2k | 201349504U, // BC1FL |
2251 | 91.2k | 201347591U, // BC1F_MM |
2252 | 91.2k | 201353587U, // BC1NEZ |
2253 | 91.2k | 201345414U, // BC1NEZC_MMR6 |
2254 | 91.2k | 201351016U, // BC1T |
2255 | 91.2k | 201349637U, // BC1TL |
2256 | 91.2k | 201351016U, // BC1T_MM |
2257 | 91.2k | 201353611U, // BC2EQZ |
2258 | 91.2k | 201345449U, // BC2EQZC_MMR6 |
2259 | 91.2k | 201353595U, // BC2NEZ |
2260 | 91.2k | 201345423U, // BC2NEZC_MMR6 |
2261 | 91.2k | 536888398U, // BCLRI_B |
2262 | 91.2k | 536890301U, // BCLRI_D |
2263 | 91.2k | 536892120U, // BCLRI_H |
2264 | 91.2k | 536896193U, // BCLRI_W |
2265 | 91.2k | 536888550U, // BCLR_B |
2266 | 91.2k | 536890689U, // BCLR_D |
2267 | 91.2k | 536892316U, // BCLR_H |
2268 | 91.2k | 536896564U, // BCLR_W |
2269 | 91.2k | 559202U, // BC_MMR6 |
2270 | 91.2k | 559202U, // BC_NM |
2271 | 91.2k | 536894300U, // BEQ |
2272 | 91.2k | 536894300U, // BEQ64 |
2273 | 91.2k | 536889618U, // BEQC |
2274 | 91.2k | 536889618U, // BEQC16_NM |
2275 | 91.2k | 536889618U, // BEQC64 |
2276 | 91.2k | 536889618U, // BEQC_MMR6 |
2277 | 91.2k | 536889618U, // BEQC_NM |
2278 | 91.2k | 536889618U, // BEQCzero_NM |
2279 | 91.2k | 754993285U, // BEQIC_NM |
2280 | 91.2k | 536893945U, // BEQL |
2281 | 91.2k | 201343615U, // BEQZ16_MM |
2282 | 91.2k | 201345216U, // BEQZALC |
2283 | 91.2k | 201345216U, // BEQZALC_MMR6 |
2284 | 91.2k | 201345459U, // BEQZC |
2285 | 91.2k | 201343430U, // BEQZC16_MMR6 |
2286 | 91.2k | 201345459U, // BEQZC16_NM |
2287 | 91.2k | 201345459U, // BEQZC64 |
2288 | 91.2k | 201345459U, // BEQZC_MM |
2289 | 91.2k | 201345459U, // BEQZC_MMR6 |
2290 | 91.2k | 201345459U, // BEQZC_NM |
2291 | 91.2k | 536894300U, // BEQ_MM |
2292 | 91.2k | 536889446U, // BGEC |
2293 | 91.2k | 536889446U, // BGEC64 |
2294 | 91.2k | 536889446U, // BGEC_MMR6 |
2295 | 91.2k | 536889446U, // BGEC_NM |
2296 | 91.2k | 754993266U, // BGEIC_NM |
2297 | 91.2k | 754993486U, // BGEIUC_NM |
2298 | 91.2k | 536889671U, // BGEUC |
2299 | 91.2k | 536889671U, // BGEUC64 |
2300 | 91.2k | 536889671U, // BGEUC_MMR6 |
2301 | 91.2k | 536889671U, // BGEUC_NM |
2302 | 91.2k | 201353274U, // BGEZ |
2303 | 91.2k | 201353274U, // BGEZ64 |
2304 | 91.2k | 201349389U, // BGEZAL |
2305 | 91.2k | 201345189U, // BGEZALC |
2306 | 91.2k | 201345189U, // BGEZALC_MMR6 |
2307 | 91.2k | 201349585U, // BGEZALL |
2308 | 91.2k | 201350857U, // BGEZALS_MM |
2309 | 91.2k | 201349389U, // BGEZAL_MM |
2310 | 91.2k | 201345400U, // BGEZC |
2311 | 91.2k | 201345400U, // BGEZC64 |
2312 | 91.2k | 201345400U, // BGEZC_MMR6 |
2313 | 91.2k | 201349700U, // BGEZL |
2314 | 91.2k | 201353274U, // BGEZ_MM |
2315 | 91.2k | 201353334U, // BGTZ |
2316 | 91.2k | 201353334U, // BGTZ64 |
2317 | 91.2k | 201345225U, // BGTZALC |
2318 | 91.2k | 201345225U, // BGTZALC_MMR6 |
2319 | 91.2k | 201345466U, // BGTZC |
2320 | 91.2k | 201345466U, // BGTZC64 |
2321 | 91.2k | 201345466U, // BGTZC_MMR6 |
2322 | 91.2k | 201349714U, // BGTZL |
2323 | 91.2k | 201353334U, // BGTZ_MM |
2324 | 91.2k | 570442803U, // BINSLI_B |
2325 | 91.2k | 570444706U, // BINSLI_D |
2326 | 91.2k | 570446525U, // BINSLI_H |
2327 | 91.2k | 570450598U, // BINSLI_W |
2328 | 91.2k | 570442950U, // BINSL_B |
2329 | 91.2k | 570444906U, // BINSL_D |
2330 | 91.2k | 570446639U, // BINSL_H |
2331 | 91.2k | 570450756U, // BINSL_W |
2332 | 91.2k | 570442864U, // BINSRI_B |
2333 | 91.2k | 570444751U, // BINSRI_D |
2334 | 91.2k | 570446570U, // BINSRI_H |
2335 | 91.2k | 570450643U, // BINSRI_W |
2336 | 91.2k | 570442998U, // BINSR_B |
2337 | 91.2k | 570445171U, // BINSR_D |
2338 | 91.2k | 570446764U, // BINSR_H |
2339 | 91.2k | 570451046U, // BINSR_W |
2340 | 91.2k | 24804U, // BITREV |
2341 | 91.2k | 26612U, // BITREVW_NM |
2342 | 91.2k | 24804U, // BITREV_MM |
2343 | 91.2k | 23225U, // BITSWAP |
2344 | 91.2k | 23225U, // BITSWAP_MMR6 |
2345 | 91.2k | 201353280U, // BLEZ |
2346 | 91.2k | 201353280U, // BLEZ64 |
2347 | 91.2k | 201345198U, // BLEZALC |
2348 | 91.2k | 201345198U, // BLEZALC_MMR6 |
2349 | 91.2k | 201345407U, // BLEZC |
2350 | 91.2k | 201345407U, // BLEZC64 |
2351 | 91.2k | 201345407U, // BLEZC_MMR6 |
2352 | 91.2k | 201349707U, // BLEZL |
2353 | 91.2k | 201353280U, // BLEZ_MM |
2354 | 91.2k | 536889665U, // BLTC |
2355 | 91.2k | 536889665U, // BLTC64 |
2356 | 91.2k | 536889665U, // BLTC_MMR6 |
2357 | 91.2k | 536889665U, // BLTC_NM |
2358 | 91.2k | 754993292U, // BLTIC_NM |
2359 | 91.2k | 754993494U, // BLTIUC_NM |
2360 | 91.2k | 536889694U, // BLTUC |
2361 | 91.2k | 536889694U, // BLTUC64 |
2362 | 91.2k | 536889694U, // BLTUC_MMR6 |
2363 | 91.2k | 536889694U, // BLTUC_NM |
2364 | 91.2k | 201353340U, // BLTZ |
2365 | 91.2k | 201353340U, // BLTZ64 |
2366 | 91.2k | 201349397U, // BLTZAL |
2367 | 91.2k | 201345234U, // BLTZALC |
2368 | 91.2k | 201345234U, // BLTZALC_MMR6 |
2369 | 91.2k | 201349594U, // BLTZALL |
2370 | 91.2k | 201350866U, // BLTZALS_MM |
2371 | 91.2k | 201349397U, // BLTZAL_MM |
2372 | 91.2k | 201345473U, // BLTZC |
2373 | 91.2k | 201345473U, // BLTZC64 |
2374 | 91.2k | 201345473U, // BLTZC_MMR6 |
2375 | 91.2k | 201349721U, // BLTZL |
2376 | 91.2k | 201353340U, // BLTZ_MM |
2377 | 91.2k | 570442919U, // BMNZI_B |
2378 | 91.2k | 570450133U, // BMNZ_V |
2379 | 91.2k | 570442911U, // BMZI_B |
2380 | 91.2k | 570450119U, // BMZ_V |
2381 | 91.2k | 536891829U, // BNE |
2382 | 91.2k | 536891829U, // BNE64 |
2383 | 91.2k | 536889452U, // BNEC |
2384 | 91.2k | 536889452U, // BNEC16_NM |
2385 | 91.2k | 536889452U, // BNEC64 |
2386 | 91.2k | 536889452U, // BNEC_MMR6 |
2387 | 91.2k | 536889452U, // BNEC_NM |
2388 | 91.2k | 536889452U, // BNECzero_NM |
2389 | 91.2k | 536888337U, // BNEGI_B |
2390 | 91.2k | 536890249U, // BNEGI_D |
2391 | 91.2k | 536892068U, // BNEGI_H |
2392 | 91.2k | 536896141U, // BNEGI_W |
2393 | 91.2k | 536888305U, // BNEG_B |
2394 | 91.2k | 536890225U, // BNEG_D |
2395 | 91.2k | 536892044U, // BNEG_H |
2396 | 91.2k | 536896036U, // BNEG_W |
2397 | 91.2k | 754993273U, // BNEIC_NM |
2398 | 91.2k | 536893818U, // BNEL |
2399 | 91.2k | 201343607U, // BNEZ16_MM |
2400 | 91.2k | 201345207U, // BNEZALC |
2401 | 91.2k | 201345207U, // BNEZALC_MMR6 |
2402 | 91.2k | 201345433U, // BNEZC |
2403 | 91.2k | 201343421U, // BNEZC16_MMR6 |
2404 | 91.2k | 201345433U, // BNEZC16_NM |
2405 | 91.2k | 201345433U, // BNEZC64 |
2406 | 91.2k | 201345433U, // BNEZC_MM |
2407 | 91.2k | 201345433U, // BNEZC_MMR6 |
2408 | 91.2k | 201345433U, // BNEZC_NM |
2409 | 91.2k | 536891829U, // BNE_MM |
2410 | 91.2k | 536889701U, // BNVC |
2411 | 91.2k | 536889701U, // BNVC_MMR6 |
2412 | 91.2k | 201344702U, // BNZ_B |
2413 | 91.2k | 201347297U, // BNZ_D |
2414 | 91.2k | 201348593U, // BNZ_H |
2415 | 91.2k | 201351374U, // BNZ_V |
2416 | 91.2k | 201353131U, // BNZ_W |
2417 | 91.2k | 536889707U, // BOVC |
2418 | 91.2k | 536889707U, // BOVC_MMR6 |
2419 | 91.2k | 557299U, // BPOSGE32 |
2420 | 91.2k | 559191U, // BPOSGE32C_MMR3 |
2421 | 91.2k | 557299U, // BPOSGE32_MM |
2422 | 91.2k | 235018468U, // BREAK |
2423 | 91.2k | 147962U, // BREAK16_MM |
2424 | 91.2k | 147962U, // BREAK16_MMR6 |
2425 | 91.2k | 547044U, // BREAK16_NM |
2426 | 91.2k | 235018468U, // BREAK_MM |
2427 | 91.2k | 235018468U, // BREAK_MMR6 |
2428 | 91.2k | 547044U, // BREAK_NM |
2429 | 91.2k | 543027U, // BRSC_NM |
2430 | 91.2k | 570442778U, // BSELI_B |
2431 | 91.2k | 570450091U, // BSEL_V |
2432 | 91.2k | 536888452U, // BSETI_B |
2433 | 91.2k | 536890339U, // BSETI_D |
2434 | 91.2k | 536892158U, // BSETI_H |
2435 | 91.2k | 536896231U, // BSETI_W |
2436 | 91.2k | 536888766U, // BSET_B |
2437 | 91.2k | 536891051U, // BSET_D |
2438 | 91.2k | 536892605U, // BSET_H |
2439 | 91.2k | 536897022U, // BSET_W |
2440 | 91.2k | 26602U, // BYTEREVW_NM |
2441 | 91.2k | 201344696U, // BZ_B |
2442 | 91.2k | 201347281U, // BZ_D |
2443 | 91.2k | 201348587U, // BZ_H |
2444 | 91.2k | 201351361U, // BZ_V |
2445 | 91.2k | 201353125U, // BZ_W |
2446 | 91.2k | 738224225U, // BeqzRxImm16 |
2447 | 91.2k | 201353313U, // BeqzRxImmX16 |
2448 | 91.2k | 4227977U, // Bimm16 |
2449 | 91.2k | 557961U, // BimmX16 |
2450 | 91.2k | 738224198U, // BnezRxImm16 |
2451 | 91.2k | 201353286U, // BnezRxImmX16 |
2452 | 91.2k | 10794U, // Break16 |
2453 | 91.2k | 4745327U, // Bteqz16 |
2454 | 91.2k | 551023U, // BteqzX16 |
2455 | 91.2k | 4745300U, // Btnez16 |
2456 | 91.2k | 550996U, // BtnezX16 |
2457 | 91.2k | 5411201U, // CACHE |
2458 | 91.2k | 5411171U, // CACHEE |
2459 | 91.2k | 5411171U, // CACHEE_MM |
2460 | 91.2k | 5411201U, // CACHE_MM |
2461 | 91.2k | 5411201U, // CACHE_MMR6 |
2462 | 91.2k | 50516353U, // CACHE_NM |
2463 | 91.2k | 5411201U, // CACHE_R6 |
2464 | 91.2k | 19476U, // CEIL_L_D64 |
2465 | 91.2k | 19476U, // CEIL_L_D_MMR6 |
2466 | 91.2k | 23847U, // CEIL_L_S |
2467 | 91.2k | 23847U, // CEIL_L_S_MMR6 |
2468 | 91.2k | 20651U, // CEIL_W_D32 |
2469 | 91.2k | 20651U, // CEIL_W_D64 |
2470 | 91.2k | 20651U, // CEIL_W_D_MMR6 |
2471 | 91.2k | 20651U, // CEIL_W_MM |
2472 | 91.2k | 24189U, // CEIL_W_S |
2473 | 91.2k | 24189U, // CEIL_W_S_MM |
2474 | 91.2k | 24189U, // CEIL_W_S_MMR6 |
2475 | 91.2k | 536888381U, // CEQI_B |
2476 | 91.2k | 536890284U, // CEQI_D |
2477 | 91.2k | 536892103U, // CEQI_H |
2478 | 91.2k | 536896176U, // CEQI_W |
2479 | 91.2k | 536888535U, // CEQ_B |
2480 | 91.2k | 536890596U, // CEQ_D |
2481 | 91.2k | 536892294U, // CEQ_H |
2482 | 91.2k | 536896452U, // CEQ_W |
2483 | 91.2k | 16488U, // CFC1 |
2484 | 91.2k | 16488U, // CFC1_MM |
2485 | 91.2k | 16704U, // CFC2_MM |
2486 | 91.2k | 17267U, // CFCMSA |
2487 | 91.2k | 536895195U, // CINS |
2488 | 91.2k | 536887588U, // CINS32 |
2489 | 91.2k | 536895195U, // CINS64_32 |
2490 | 91.2k | 536895195U, // CINS_i32 |
2491 | 91.2k | 20121U, // CLASS_D |
2492 | 91.2k | 20121U, // CLASS_D_MMR6 |
2493 | 91.2k | 24040U, // CLASS_S |
2494 | 91.2k | 24040U, // CLASS_S_MMR6 |
2495 | 91.2k | 536888620U, // CLEI_S_B |
2496 | 91.2k | 536890856U, // CLEI_S_D |
2497 | 91.2k | 536892428U, // CLEI_S_H |
2498 | 91.2k | 536896739U, // CLEI_S_W |
2499 | 91.2k | 536888835U, // CLEI_U_B |
2500 | 91.2k | 536891323U, // CLEI_U_D |
2501 | 91.2k | 536892716U, // CLEI_U_H |
2502 | 91.2k | 536897207U, // CLEI_U_W |
2503 | 91.2k | 536888602U, // CLE_S_B |
2504 | 91.2k | 536890838U, // CLE_S_D |
2505 | 91.2k | 536892410U, // CLE_S_H |
2506 | 91.2k | 536896721U, // CLE_S_W |
2507 | 91.2k | 536888817U, // CLE_U_B |
2508 | 91.2k | 536891305U, // CLE_U_D |
2509 | 91.2k | 536892698U, // CLE_U_H |
2510 | 91.2k | 536897189U, // CLE_U_W |
2511 | 91.2k | 23193U, // CLO |
2512 | 91.2k | 23193U, // CLO_MM |
2513 | 91.2k | 23193U, // CLO_MMR6 |
2514 | 91.2k | 23193U, // CLO_NM |
2515 | 91.2k | 23193U, // CLO_R6 |
2516 | 91.2k | 536888640U, // CLTI_S_B |
2517 | 91.2k | 536890876U, // CLTI_S_D |
2518 | 91.2k | 536892448U, // CLTI_S_H |
2519 | 91.2k | 536896759U, // CLTI_S_W |
2520 | 91.2k | 536888855U, // CLTI_U_B |
2521 | 91.2k | 536891343U, // CLTI_U_D |
2522 | 91.2k | 536892736U, // CLTI_U_H |
2523 | 91.2k | 536897227U, // CLTI_U_W |
2524 | 91.2k | 536888708U, // CLT_S_B |
2525 | 91.2k | 536890954U, // CLT_S_D |
2526 | 91.2k | 536892536U, // CLT_S_H |
2527 | 91.2k | 536896887U, // CLT_S_W |
2528 | 91.2k | 536888935U, // CLT_U_B |
2529 | 91.2k | 536891433U, // CLT_U_D |
2530 | 91.2k | 536892826U, // CLT_U_H |
2531 | 91.2k | 536897317U, // CLT_U_W |
2532 | 91.2k | 26716U, // CLZ |
2533 | 91.2k | 26716U, // CLZ_MM |
2534 | 91.2k | 26716U, // CLZ_MMR6 |
2535 | 91.2k | 26716U, // CLZ_NM |
2536 | 91.2k | 26716U, // CLZ_R6 |
2537 | 91.2k | 536889185U, // CMPGDU_EQ_QB |
2538 | 91.2k | 536889185U, // CMPGDU_EQ_QB_MMR2 |
2539 | 91.2k | 536889090U, // CMPGDU_LE_QB |
2540 | 91.2k | 536889090U, // CMPGDU_LE_QB_MMR2 |
2541 | 91.2k | 536889304U, // CMPGDU_LT_QB |
2542 | 91.2k | 536889304U, // CMPGDU_LT_QB_MMR2 |
2543 | 91.2k | 536889199U, // CMPGU_EQ_QB |
2544 | 91.2k | 536889199U, // CMPGU_EQ_QB_MM |
2545 | 91.2k | 536889104U, // CMPGU_LE_QB |
2546 | 91.2k | 536889104U, // CMPGU_LE_QB_MM |
2547 | 91.2k | 536889318U, // CMPGU_LT_QB |
2548 | 91.2k | 536889318U, // CMPGU_LT_QB_MM |
2549 | 91.2k | 18300U, // CMPU_EQ_QB |
2550 | 91.2k | 18300U, // CMPU_EQ_QB_MM |
2551 | 91.2k | 18205U, // CMPU_LE_QB |
2552 | 91.2k | 18205U, // CMPU_LE_QB_MM |
2553 | 91.2k | 18419U, // CMPU_LT_QB |
2554 | 91.2k | 18419U, // CMPU_LT_QB_MM |
2555 | 91.2k | 536890146U, // CMP_AF_D_MMR6 |
2556 | 91.2k | 536894669U, // CMP_AF_S_MMR6 |
2557 | 91.2k | 536890585U, // CMP_EQ_D |
2558 | 91.2k | 536890585U, // CMP_EQ_D_MMR6 |
2559 | 91.2k | 22210U, // CMP_EQ_PH |
2560 | 91.2k | 22210U, // CMP_EQ_PH_MM |
2561 | 91.2k | 536894873U, // CMP_EQ_S |
2562 | 91.2k | 536894873U, // CMP_EQ_S_MMR6 |
2563 | 91.2k | 536890146U, // CMP_F_D |
2564 | 91.2k | 536894669U, // CMP_F_S |
2565 | 91.2k | 536889990U, // CMP_LE_D |
2566 | 91.2k | 536889990U, // CMP_LE_D_MMR6 |
2567 | 91.2k | 22106U, // CMP_LE_PH |
2568 | 91.2k | 22106U, // CMP_LE_PH_MM |
2569 | 91.2k | 536894590U, // CMP_LE_S |
2570 | 91.2k | 536894590U, // CMP_LE_S_MMR6 |
2571 | 91.2k | 536891076U, // CMP_LT_D |
2572 | 91.2k | 536891076U, // CMP_LT_D_MMR6 |
2573 | 91.2k | 22379U, // CMP_LT_PH |
2574 | 91.2k | 22379U, // CMP_LT_PH_MM |
2575 | 91.2k | 536894978U, // CMP_LT_S |
2576 | 91.2k | 536894978U, // CMP_LT_S_MMR6 |
2577 | 91.2k | 536890164U, // CMP_SAF_D |
2578 | 91.2k | 536890164U, // CMP_SAF_D_MMR6 |
2579 | 91.2k | 536894679U, // CMP_SAF_S |
2580 | 91.2k | 536894679U, // CMP_SAF_S_MMR6 |
2581 | 91.2k | 536890612U, // CMP_SEQ_D |
2582 | 91.2k | 536890612U, // CMP_SEQ_D_MMR6 |
2583 | 91.2k | 536894892U, // CMP_SEQ_S |
2584 | 91.2k | 536894892U, // CMP_SEQ_S_MMR6 |
2585 | 91.2k | 536890027U, // CMP_SLE_D |
2586 | 91.2k | 536890027U, // CMP_SLE_D_MMR6 |
2587 | 91.2k | 536894619U, // CMP_SLE_S |
2588 | 91.2k | 536894619U, // CMP_SLE_S_MMR6 |
2589 | 91.2k | 536891103U, // CMP_SLT_D |
2590 | 91.2k | 536891103U, // CMP_SLT_D_MMR6 |
2591 | 91.2k | 536894997U, // CMP_SLT_S |
2592 | 91.2k | 536894997U, // CMP_SLT_S_MMR6 |
2593 | 91.2k | 536890660U, // CMP_SUEQ_D |
2594 | 91.2k | 536890660U, // CMP_SUEQ_D_MMR6 |
2595 | 91.2k | 536894923U, // CMP_SUEQ_S |
2596 | 91.2k | 536894923U, // CMP_SUEQ_S_MMR6 |
2597 | 91.2k | 536890075U, // CMP_SULE_D |
2598 | 91.2k | 536890075U, // CMP_SULE_D_MMR6 |
2599 | 91.2k | 536894650U, // CMP_SULE_S |
2600 | 91.2k | 536894650U, // CMP_SULE_S_MMR6 |
2601 | 91.2k | 536891151U, // CMP_SULT_D |
2602 | 91.2k | 536891151U, // CMP_SULT_D_MMR6 |
2603 | 91.2k | 536895028U, // CMP_SULT_S |
2604 | 91.2k | 536895028U, // CMP_SULT_S_MMR6 |
2605 | 91.2k | 536890533U, // CMP_SUN_D |
2606 | 91.2k | 536890533U, // CMP_SUN_D_MMR6 |
2607 | 91.2k | 536894837U, // CMP_SUN_S |
2608 | 91.2k | 536894837U, // CMP_SUN_S_MMR6 |
2609 | 91.2k | 536890640U, // CMP_UEQ_D |
2610 | 91.2k | 536890640U, // CMP_UEQ_D_MMR6 |
2611 | 91.2k | 536894912U, // CMP_UEQ_S |
2612 | 91.2k | 536894912U, // CMP_UEQ_S_MMR6 |
2613 | 91.2k | 536890055U, // CMP_ULE_D |
2614 | 91.2k | 536890055U, // CMP_ULE_D_MMR6 |
2615 | 91.2k | 536894639U, // CMP_ULE_S |
2616 | 91.2k | 536894639U, // CMP_ULE_S_MMR6 |
2617 | 91.2k | 536891131U, // CMP_ULT_D |
2618 | 91.2k | 536891131U, // CMP_ULT_D_MMR6 |
2619 | 91.2k | 536895017U, // CMP_ULT_S |
2620 | 91.2k | 536895017U, // CMP_ULT_S_MMR6 |
2621 | 91.2k | 536890515U, // CMP_UN_D |
2622 | 91.2k | 536890515U, // CMP_UN_D_MMR6 |
2623 | 91.2k | 536894827U, // CMP_UN_S |
2624 | 91.2k | 536894827U, // CMP_UN_S_MMR6 |
2625 | 91.2k | 1073759659U, // COPY_S_B |
2626 | 91.2k | 1073761927U, // COPY_S_D |
2627 | 91.2k | 1073763498U, // COPY_S_H |
2628 | 91.2k | 1073767871U, // COPY_S_W |
2629 | 91.2k | 1073759874U, // COPY_U_B |
2630 | 91.2k | 1073763765U, // COPY_U_H |
2631 | 91.2k | 1073768278U, // COPY_U_W |
2632 | 91.2k | 536889029U, // CRC32B |
2633 | 91.2k | 33572549U, // CRC32B_NM |
2634 | 91.2k | 536889037U, // CRC32CB |
2635 | 91.2k | 33572557U, // CRC32CB_NM |
2636 | 91.2k | 536891656U, // CRC32CD |
2637 | 91.2k | 536892940U, // CRC32CH |
2638 | 91.2k | 33576460U, // CRC32CH_NM |
2639 | 91.2k | 536897466U, // CRC32CW |
2640 | 91.2k | 33580986U, // CRC32CW_NM |
2641 | 91.2k | 536891642U, // CRC32D |
2642 | 91.2k | 536892920U, // CRC32H |
2643 | 91.2k | 33576440U, // CRC32H_NM |
2644 | 91.2k | 536897458U, // CRC32W |
2645 | 91.2k | 33580978U, // CRC32W_NM |
2646 | 91.2k | 17875075U, // CTC1 |
2647 | 91.2k | 17875075U, // CTC1_MM |
2648 | 91.2k | 17875291U, // CTC2_MM |
2649 | 91.2k | 17275U, // CTCMSA |
2650 | 91.2k | 23643U, // CVT_D32_S |
2651 | 91.2k | 23643U, // CVT_D32_S_MM |
2652 | 91.2k | 24972U, // CVT_D32_W |
2653 | 91.2k | 24972U, // CVT_D32_W_MM |
2654 | 91.2k | 22769U, // CVT_D64_L |
2655 | 91.2k | 23643U, // CVT_D64_S |
2656 | 91.2k | 23643U, // CVT_D64_S_MM |
2657 | 91.2k | 24972U, // CVT_D64_W |
2658 | 91.2k | 24972U, // CVT_D64_W_MM |
2659 | 91.2k | 22769U, // CVT_D_L_MMR6 |
2660 | 91.2k | 19497U, // CVT_L_D64 |
2661 | 91.2k | 19497U, // CVT_L_D64_MM |
2662 | 91.2k | 19497U, // CVT_L_D_MMR6 |
2663 | 91.2k | 23868U, // CVT_L_S |
2664 | 91.2k | 23868U, // CVT_L_S_MM |
2665 | 91.2k | 23868U, // CVT_L_S_MMR6 |
2666 | 91.2k | 26574U, // CVT_PS_PW64 |
2667 | 91.2k | 536894942U, // CVT_PS_S64 |
2668 | 91.2k | 24369U, // CVT_PW_PS64 |
2669 | 91.2k | 19844U, // CVT_S_D32 |
2670 | 91.2k | 19844U, // CVT_S_D32_MM |
2671 | 91.2k | 19844U, // CVT_S_D64 |
2672 | 91.2k | 19844U, // CVT_S_D64_MM |
2673 | 91.2k | 22778U, // CVT_S_L |
2674 | 91.2k | 22778U, // CVT_S_L_MMR6 |
2675 | 91.2k | 23023U, // CVT_S_PL64 |
2676 | 91.2k | 24658U, // CVT_S_PU64 |
2677 | 91.2k | 25727U, // CVT_S_W |
2678 | 91.2k | 25727U, // CVT_S_W_MM |
2679 | 91.2k | 25727U, // CVT_S_W_MMR6 |
2680 | 91.2k | 20672U, // CVT_W_D32 |
2681 | 91.2k | 20672U, // CVT_W_D32_MM |
2682 | 91.2k | 20672U, // CVT_W_D64 |
2683 | 91.2k | 20672U, // CVT_W_D64_MM |
2684 | 91.2k | 24210U, // CVT_W_S |
2685 | 91.2k | 24210U, // CVT_W_S_MM |
2686 | 91.2k | 24210U, // CVT_W_S_MMR6 |
2687 | 91.2k | 536890577U, // C_EQ_D32 |
2688 | 91.2k | 536890577U, // C_EQ_D32_MM |
2689 | 91.2k | 536890577U, // C_EQ_D64 |
2690 | 91.2k | 536890577U, // C_EQ_D64_MM |
2691 | 91.2k | 536894865U, // C_EQ_S |
2692 | 91.2k | 536894865U, // C_EQ_S_MM |
2693 | 91.2k | 536890139U, // C_F_D32 |
2694 | 91.2k | 536890139U, // C_F_D32_MM |
2695 | 91.2k | 536890139U, // C_F_D64 |
2696 | 91.2k | 536890139U, // C_F_D64_MM |
2697 | 91.2k | 536894662U, // C_F_S |
2698 | 91.2k | 536894662U, // C_F_S_MM |
2699 | 91.2k | 536889982U, // C_LE_D32 |
2700 | 91.2k | 536889982U, // C_LE_D32_MM |
2701 | 91.2k | 536889982U, // C_LE_D64 |
2702 | 91.2k | 536889982U, // C_LE_D64_MM |
2703 | 91.2k | 536894582U, // C_LE_S |
2704 | 91.2k | 536894582U, // C_LE_S_MM |
2705 | 91.2k | 536891068U, // C_LT_D32 |
2706 | 91.2k | 536891068U, // C_LT_D32_MM |
2707 | 91.2k | 536891068U, // C_LT_D64 |
2708 | 91.2k | 536891068U, // C_LT_D64_MM |
2709 | 91.2k | 536894970U, // C_LT_S |
2710 | 91.2k | 536894970U, // C_LT_S_MM |
2711 | 91.2k | 536889973U, // C_NGE_D32 |
2712 | 91.2k | 536889973U, // C_NGE_D32_MM |
2713 | 91.2k | 536889973U, // C_NGE_D64 |
2714 | 91.2k | 536889973U, // C_NGE_D64_MM |
2715 | 91.2k | 536894573U, // C_NGE_S |
2716 | 91.2k | 536894573U, // C_NGE_S_MM |
2717 | 91.2k | 536890008U, // C_NGLE_D32 |
2718 | 91.2k | 536890008U, // C_NGLE_D32_MM |
2719 | 91.2k | 536890008U, // C_NGLE_D64 |
2720 | 91.2k | 536890008U, // C_NGLE_D64_MM |
2721 | 91.2k | 536894600U, // C_NGLE_S |
2722 | 91.2k | 536894600U, // C_NGLE_S_MM |
2723 | 91.2k | 536890425U, // C_NGL_D32 |
2724 | 91.2k | 536890425U, // C_NGL_D32_MM |
2725 | 91.2k | 536890425U, // C_NGL_D64 |
2726 | 91.2k | 536890425U, // C_NGL_D64_MM |
2727 | 91.2k | 536894796U, // C_NGL_S |
2728 | 91.2k | 536894796U, // C_NGL_S_MM |
2729 | 91.2k | 536891059U, // C_NGT_D32 |
2730 | 91.2k | 536891059U, // C_NGT_D32_MM |
2731 | 91.2k | 536891059U, // C_NGT_D64 |
2732 | 91.2k | 536891059U, // C_NGT_D64_MM |
2733 | 91.2k | 536894961U, // C_NGT_S |
2734 | 91.2k | 536894961U, // C_NGT_S_MM |
2735 | 91.2k | 536890018U, // C_OLE_D32 |
2736 | 91.2k | 536890018U, // C_OLE_D32_MM |
2737 | 91.2k | 536890018U, // C_OLE_D64 |
2738 | 91.2k | 536890018U, // C_OLE_D64_MM |
2739 | 91.2k | 536894610U, // C_OLE_S |
2740 | 91.2k | 536894610U, // C_OLE_S_MM |
2741 | 91.2k | 536891094U, // C_OLT_D32 |
2742 | 91.2k | 536891094U, // C_OLT_D32_MM |
2743 | 91.2k | 536891094U, // C_OLT_D64 |
2744 | 91.2k | 536891094U, // C_OLT_D64_MM |
2745 | 91.2k | 536894988U, // C_OLT_S |
2746 | 91.2k | 536894988U, // C_OLT_S_MM |
2747 | 91.2k | 536890603U, // C_SEQ_D32 |
2748 | 91.2k | 536890603U, // C_SEQ_D32_MM |
2749 | 91.2k | 536890603U, // C_SEQ_D64 |
2750 | 91.2k | 536890603U, // C_SEQ_D64_MM |
2751 | 91.2k | 536894883U, // C_SEQ_S |
2752 | 91.2k | 536894883U, // C_SEQ_S_MM |
2753 | 91.2k | 536890209U, // C_SF_D32 |
2754 | 91.2k | 536890209U, // C_SF_D32_MM |
2755 | 91.2k | 536890209U, // C_SF_D64 |
2756 | 91.2k | 536890209U, // C_SF_D64_MM |
2757 | 91.2k | 536894708U, // C_SF_S |
2758 | 91.2k | 536894708U, // C_SF_S_MM |
2759 | 91.2k | 536890631U, // C_UEQ_D32 |
2760 | 91.2k | 536890631U, // C_UEQ_D32_MM |
2761 | 91.2k | 536890631U, // C_UEQ_D64 |
2762 | 91.2k | 536890631U, // C_UEQ_D64_MM |
2763 | 91.2k | 536894903U, // C_UEQ_S |
2764 | 91.2k | 536894903U, // C_UEQ_S_MM |
2765 | 91.2k | 536890046U, // C_ULE_D32 |
2766 | 91.2k | 536890046U, // C_ULE_D32_MM |
2767 | 91.2k | 536890046U, // C_ULE_D64 |
2768 | 91.2k | 536890046U, // C_ULE_D64_MM |
2769 | 91.2k | 536894630U, // C_ULE_S |
2770 | 91.2k | 536894630U, // C_ULE_S_MM |
2771 | 91.2k | 536891122U, // C_ULT_D32 |
2772 | 91.2k | 536891122U, // C_ULT_D32_MM |
2773 | 91.2k | 536891122U, // C_ULT_D64 |
2774 | 91.2k | 536891122U, // C_ULT_D64_MM |
2775 | 91.2k | 536895008U, // C_ULT_S |
2776 | 91.2k | 536895008U, // C_ULT_S_MM |
2777 | 91.2k | 536890507U, // C_UN_D32 |
2778 | 91.2k | 536890507U, // C_UN_D32_MM |
2779 | 91.2k | 536890507U, // C_UN_D64 |
2780 | 91.2k | 536890507U, // C_UN_D64_MM |
2781 | 91.2k | 536894819U, // C_UN_S |
2782 | 91.2k | 536894819U, // C_UN_S_MM |
2783 | 91.2k | 23264U, // CmpRxRy16 |
2784 | 91.2k | 1610635429U, // CmpiRxImm16 |
2785 | 91.2k | 22693U, // CmpiRxImmX16 |
2786 | 91.2k | 536891670U, // DADD |
2787 | 91.2k | 536893537U, // DADDi |
2788 | 91.2k | 536895504U, // DADDiu |
2789 | 91.2k | 536895440U, // DADDu |
2790 | 91.2k | 536893568U, // DAHI |
2791 | 91.2k | 536894090U, // DALIGN |
2792 | 91.2k | 536893629U, // DATI |
2793 | 91.2k | 536893647U, // DAUI |
2794 | 91.2k | 23224U, // DBITSWAP |
2795 | 91.2k | 23192U, // DCLO |
2796 | 91.2k | 23192U, // DCLO_R6 |
2797 | 91.2k | 26715U, // DCLZ |
2798 | 91.2k | 26715U, // DCLZ_R6 |
2799 | 91.2k | 536895724U, // DDIV |
2800 | 91.2k | 536895632U, // DDIVU |
2801 | 91.2k | 11034U, // DERET |
2802 | 91.2k | 11034U, // DERET_MM |
2803 | 91.2k | 11034U, // DERET_MMR6 |
2804 | 91.2k | 11034U, // DERET_NM |
2805 | 91.2k | 536895408U, // DEXT |
2806 | 91.2k | 536897885U, // DEXT64_32 |
2807 | 91.2k | 536894061U, // DEXTM |
2808 | 91.2k | 536895625U, // DEXTU |
2809 | 91.2k | 546916U, // DI |
2810 | 91.2k | 536895201U, // DINS |
2811 | 91.2k | 536894054U, // DINSM |
2812 | 91.2k | 536895580U, // DINSU |
2813 | 91.2k | 536895725U, // DIV |
2814 | 91.2k | 536895633U, // DIVU |
2815 | 91.2k | 536895633U, // DIVU_MMR6 |
2816 | 91.2k | 536895633U, // DIVU_NM |
2817 | 91.2k | 536895725U, // DIV_MMR6 |
2818 | 91.2k | 536895725U, // DIV_NM |
2819 | 91.2k | 536888729U, // DIV_S_B |
2820 | 91.2k | 536890997U, // DIV_S_D |
2821 | 91.2k | 536892557U, // DIV_S_H |
2822 | 91.2k | 536896930U, // DIV_S_W |
2823 | 91.2k | 536888944U, // DIV_U_B |
2824 | 91.2k | 536891464U, // DIV_U_D |
2825 | 91.2k | 536892835U, // DIV_U_H |
2826 | 91.2k | 536897348U, // DIV_U_W |
2827 | 91.2k | 546916U, // DI_MM |
2828 | 91.2k | 546916U, // DI_MMR6 |
2829 | 91.2k | 546916U, // DI_NM |
2830 | 91.2k | 536888173U, // DLSA |
2831 | 91.2k | 536888173U, // DLSA_R6 |
2832 | 91.2k | 536887303U, // DMFC0 |
2833 | 91.2k | 16494U, // DMFC1 |
2834 | 91.2k | 536887622U, // DMFC2 |
2835 | 91.2k | 251674950U, // DMFC2_OCTEON |
2836 | 91.2k | 536887310U, // DMFGC0 |
2837 | 91.2k | 536891722U, // DMOD |
2838 | 91.2k | 536895454U, // DMODU |
2839 | 91.2k | 548756U, // DMT |
2840 | 91.2k | 2752561212U, // DMTC0 |
2841 | 91.2k | 17875081U, // DMTC1 |
2842 | 91.2k | 2752561505U, // DMTC2 |
2843 | 91.2k | 251674977U, // DMTC2_OCTEON |
2844 | 91.2k | 2752561190U, // DMTGC0 |
2845 | 91.2k | 548756U, // DMT_NM |
2846 | 91.2k | 536893524U, // DMUH |
2847 | 91.2k | 536895497U, // DMUHU |
2848 | 91.2k | 536893990U, // DMUL |
2849 | 91.2k | 24461U, // DMULT |
2850 | 91.2k | 24705U, // DMULTu |
2851 | 91.2k | 536895541U, // DMULU |
2852 | 91.2k | 536893990U, // DMUL_R6 |
2853 | 91.2k | 536890905U, // DOTP_S_D |
2854 | 91.2k | 536892477U, // DOTP_S_H |
2855 | 91.2k | 536896798U, // DOTP_S_W |
2856 | 91.2k | 536891372U, // DOTP_U_D |
2857 | 91.2k | 536892765U, // DOTP_U_H |
2858 | 91.2k | 536897256U, // DOTP_U_W |
2859 | 91.2k | 570445250U, // DPADD_S_D |
2860 | 91.2k | 570446822U, // DPADD_S_H |
2861 | 91.2k | 570451133U, // DPADD_S_W |
2862 | 91.2k | 570445717U, // DPADD_U_D |
2863 | 91.2k | 570447110U, // DPADD_U_H |
2864 | 91.2k | 570451601U, // DPADD_U_W |
2865 | 91.2k | 536893370U, // DPAQX_SA_W_PH |
2866 | 91.2k | 536893370U, // DPAQX_SA_W_PH_MMR2 |
2867 | 91.2k | 536893453U, // DPAQX_S_W_PH |
2868 | 91.2k | 536893453U, // DPAQX_S_W_PH_MMR2 |
2869 | 91.2k | 536896258U, // DPAQ_SA_L_W |
2870 | 91.2k | 536896258U, // DPAQ_SA_L_W_MM |
2871 | 91.2k | 536893412U, // DPAQ_S_W_PH |
2872 | 91.2k | 536893412U, // DPAQ_S_W_PH_MM |
2873 | 91.2k | 536893725U, // DPAU_H_QBL |
2874 | 91.2k | 536893725U, // DPAU_H_QBL_MM |
2875 | 91.2k | 536894315U, // DPAU_H_QBR |
2876 | 91.2k | 536894315U, // DPAU_H_QBR_MM |
2877 | 91.2k | 536893491U, // DPAX_W_PH |
2878 | 91.2k | 536893491U, // DPAX_W_PH_MMR2 |
2879 | 91.2k | 536893360U, // DPA_W_PH |
2880 | 91.2k | 536893360U, // DPA_W_PH_MMR2 |
2881 | 91.2k | 23269U, // DPOP |
2882 | 91.2k | 536893385U, // DPSQX_SA_W_PH |
2883 | 91.2k | 536893385U, // DPSQX_SA_W_PH_MMR2 |
2884 | 91.2k | 536893467U, // DPSQX_S_W_PH |
2885 | 91.2k | 536893467U, // DPSQX_S_W_PH_MMR2 |
2886 | 91.2k | 536896271U, // DPSQ_SA_L_W |
2887 | 91.2k | 536896271U, // DPSQ_SA_L_W_MM |
2888 | 91.2k | 536893440U, // DPSQ_S_W_PH |
2889 | 91.2k | 536893440U, // DPSQ_S_W_PH_MM |
2890 | 91.2k | 570445217U, // DPSUB_S_D |
2891 | 91.2k | 570446801U, // DPSUB_S_H |
2892 | 91.2k | 570451100U, // DPSUB_S_W |
2893 | 91.2k | 570445684U, // DPSUB_U_D |
2894 | 91.2k | 570447089U, // DPSUB_U_H |
2895 | 91.2k | 570451568U, // DPSUB_U_W |
2896 | 91.2k | 536893737U, // DPSU_H_QBL |
2897 | 91.2k | 536893737U, // DPSU_H_QBL_MM |
2898 | 91.2k | 536894327U, // DPSU_H_QBR |
2899 | 91.2k | 536894327U, // DPSU_H_QBR_MM |
2900 | 91.2k | 536893502U, // DPSX_W_PH |
2901 | 91.2k | 536893502U, // DPSX_W_PH_MMR2 |
2902 | 91.2k | 536893481U, // DPS_W_PH |
2903 | 91.2k | 536893481U, // DPS_W_PH_MMR2 |
2904 | 91.2k | 536894500U, // DROTR |
2905 | 91.2k | 536887579U, // DROTR32 |
2906 | 91.2k | 536895773U, // DROTRV |
2907 | 91.2k | 22016U, // DSBH |
2908 | 91.2k | 26786U, // DSDIV |
2909 | 91.2k | 20770U, // DSHD |
2910 | 91.2k | 536893923U, // DSLL |
2911 | 91.2k | 536887549U, // DSLL32 |
2912 | 91.2k | 2147506659U, // DSLL64_32 |
2913 | 91.2k | 536895730U, // DSLLV |
2914 | 91.2k | 536888167U, // DSRA |
2915 | 91.2k | 536887531U, // DSRA32 |
2916 | 91.2k | 536895709U, // DSRAV |
2917 | 91.2k | 536893951U, // DSRL |
2918 | 91.2k | 536887557U, // DSRL32 |
2919 | 91.2k | 536895737U, // DSRLV |
2920 | 91.2k | 536889419U, // DSUB |
2921 | 91.2k | 536895419U, // DSUBu |
2922 | 91.2k | 26772U, // DUDIV |
2923 | 91.2k | 547656U, // DVP |
2924 | 91.2k | 545220U, // DVPE |
2925 | 91.2k | 545220U, // DVPE_NM |
2926 | 91.2k | 547656U, // DVP_MMR6 |
2927 | 91.2k | 26787U, // DivRxRy16 |
2928 | 91.2k | 26773U, // DivuRxRy16 |
2929 | 91.2k | 10928U, // EHB |
2930 | 91.2k | 10928U, // EHB_MM |
2931 | 91.2k | 10928U, // EHB_MMR6 |
2932 | 91.2k | 10928U, // EHB_NM |
2933 | 91.2k | 546928U, // EI |
2934 | 91.2k | 546928U, // EI_MM |
2935 | 91.2k | 546928U, // EI_MMR6 |
2936 | 91.2k | 546928U, // EI_NM |
2937 | 91.2k | 548761U, // EMT |
2938 | 91.2k | 548761U, // EMT_NM |
2939 | 91.2k | 11035U, // ERET |
2940 | 91.2k | 10932U, // ERETNC |
2941 | 91.2k | 10932U, // ERETNC_MMR6 |
2942 | 91.2k | 10932U, // ERETNC_NM |
2943 | 91.2k | 11035U, // ERET_MM |
2944 | 91.2k | 11035U, // ERET_MMR6 |
2945 | 91.2k | 11035U, // ERET_NM |
2946 | 91.2k | 547661U, // EVP |
2947 | 91.2k | 545226U, // EVPE |
2948 | 91.2k | 545226U, // EVPE_NM |
2949 | 91.2k | 547661U, // EVP_MMR6 |
2950 | 91.2k | 536895409U, // EXT |
2951 | 91.2k | 536894274U, // EXTP |
2952 | 91.2k | 536894153U, // EXTPDP |
2953 | 91.2k | 536895757U, // EXTPDPV |
2954 | 91.2k | 536895757U, // EXTPDPV_MM |
2955 | 91.2k | 536894153U, // EXTPDP_MM |
2956 | 91.2k | 536895766U, // EXTPV |
2957 | 91.2k | 536895766U, // EXTPV_MM |
2958 | 91.2k | 536894274U, // EXTP_MM |
2959 | 91.2k | 536896991U, // EXTRV_RS_W |
2960 | 91.2k | 536896991U, // EXTRV_RS_W_MM |
2961 | 91.2k | 536896545U, // EXTRV_R_W |
2962 | 91.2k | 536896545U, // EXTRV_R_W_MM |
2963 | 91.2k | 536892566U, // EXTRV_S_H |
2964 | 91.2k | 536892566U, // EXTRV_S_H_MM |
2965 | 91.2k | 536897428U, // EXTRV_W |
2966 | 91.2k | 536897428U, // EXTRV_W_MM |
2967 | 91.2k | 536896980U, // EXTR_RS_W |
2968 | 91.2k | 536896980U, // EXTR_RS_W_MM |
2969 | 91.2k | 536896524U, // EXTR_R_W |
2970 | 91.2k | 536896524U, // EXTR_R_W_MM |
2971 | 91.2k | 536892497U, // EXTR_S_H |
2972 | 91.2k | 536892497U, // EXTR_S_H_MM |
2973 | 91.2k | 536896623U, // EXTR_W |
2974 | 91.2k | 536896623U, // EXTR_W_MM |
2975 | 91.2k | 536895299U, // EXTS |
2976 | 91.2k | 536887596U, // EXTS32 |
2977 | 91.2k | 536897508U, // EXTW_NM |
2978 | 91.2k | 536895409U, // EXT_MM |
2979 | 91.2k | 536895409U, // EXT_MMR6 |
2980 | 91.2k | 536895409U, // EXT_NM |
2981 | 91.2k | 20113U, // FABS_D32 |
2982 | 91.2k | 20113U, // FABS_D32_MM |
2983 | 91.2k | 20113U, // FABS_D64 |
2984 | 91.2k | 20113U, // FABS_D64_MM |
2985 | 91.2k | 24023U, // FABS_S |
2986 | 91.2k | 24023U, // FABS_S_MM |
2987 | 91.2k | 536889922U, // FADD_D |
2988 | 91.2k | 536889923U, // FADD_D32 |
2989 | 91.2k | 536889923U, // FADD_D32_MM |
2990 | 91.2k | 536889923U, // FADD_D64 |
2991 | 91.2k | 536889923U, // FADD_D64_MM |
2992 | 91.2k | 536895215U, // FADD_PS64 |
2993 | 91.2k | 536894566U, // FADD_S |
2994 | 91.2k | 536894566U, // FADD_S_MM |
2995 | 91.2k | 570448998U, // FADD_S_MMR6 |
2996 | 91.2k | 536895893U, // FADD_W |
2997 | 91.2k | 536890156U, // FCAF_D |
2998 | 91.2k | 536896012U, // FCAF_W |
2999 | 91.2k | 536890595U, // FCEQ_D |
3000 | 91.2k | 536896451U, // FCEQ_W |
3001 | 91.2k | 20120U, // FCLASS_D |
3002 | 91.2k | 26091U, // FCLASS_W |
3003 | 91.2k | 536890000U, // FCLE_D |
3004 | 91.2k | 536895935U, // FCLE_W |
3005 | 91.2k | 536891086U, // FCLT_D |
3006 | 91.2k | 536897030U, // FCLT_W |
3007 | 91.2k | 5974450U, // FCMP_D32 |
3008 | 91.2k | 5974450U, // FCMP_D32_MM |
3009 | 91.2k | 5974450U, // FCMP_D64 |
3010 | 91.2k | 6498738U, // FCMP_S32 |
3011 | 91.2k | 6498738U, // FCMP_S32_MM |
3012 | 91.2k | 536890096U, // FCNE_D |
3013 | 91.2k | 536895969U, // FCNE_W |
3014 | 91.2k | 536890705U, // FCOR_D |
3015 | 91.2k | 536896580U, // FCOR_W |
3016 | 91.2k | 536890651U, // FCUEQ_D |
3017 | 91.2k | 536896467U, // FCUEQ_W |
3018 | 91.2k | 536890066U, // FCULE_D |
3019 | 91.2k | 536895951U, // FCULE_W |
3020 | 91.2k | 536891142U, // FCULT_D |
3021 | 91.2k | 536897046U, // FCULT_W |
3022 | 91.2k | 536890112U, // FCUNE_D |
3023 | 91.2k | 536895985U, // FCUNE_W |
3024 | 91.2k | 536890525U, // FCUN_D |
3025 | 91.2k | 536896357U, // FCUN_W |
3026 | 91.2k | 536891518U, // FDIV_D |
3027 | 91.2k | 536891519U, // FDIV_D32 |
3028 | 91.2k | 536891519U, // FDIV_D32_MM |
3029 | 91.2k | 536891519U, // FDIV_D64 |
3030 | 91.2k | 536891519U, // FDIV_D64_MM |
3031 | 91.2k | 536895065U, // FDIV_S |
3032 | 91.2k | 536895065U, // FDIV_S_MM |
3033 | 91.2k | 570449497U, // FDIV_S_MMR6 |
3034 | 91.2k | 536897412U, // FDIV_W |
3035 | 91.2k | 536892224U, // FEXDO_H |
3036 | 91.2k | 536896373U, // FEXDO_W |
3037 | 91.2k | 536889809U, // FEXP2_D |
3038 | 91.2k | 536895796U, // FEXP2_W |
3039 | 91.2k | 19537U, // FEXUPL_D |
3040 | 91.2k | 25387U, // FEXUPL_W |
3041 | 91.2k | 19809U, // FEXUPR_D |
3042 | 91.2k | 25684U, // FEXUPR_W |
3043 | 91.2k | 20051U, // FFINT_S_D |
3044 | 91.2k | 25984U, // FFINT_S_W |
3045 | 91.2k | 20530U, // FFINT_U_D |
3046 | 91.2k | 26414U, // FFINT_U_W |
3047 | 91.2k | 19547U, // FFQL_D |
3048 | 91.2k | 25397U, // FFQL_W |
3049 | 91.2k | 19819U, // FFQR_D |
3050 | 91.2k | 25694U, // FFQR_W |
3051 | 91.2k | 17584U, // FILL_B |
3052 | 91.2k | 19522U, // FILL_D |
3053 | 91.2k | 21273U, // FILL_H |
3054 | 91.2k | 25372U, // FILL_W |
3055 | 91.2k | 18888U, // FLOG2_D |
3056 | 91.2k | 24875U, // FLOG2_W |
3057 | 91.2k | 19486U, // FLOOR_L_D64 |
3058 | 91.2k | 19486U, // FLOOR_L_D_MMR6 |
3059 | 91.2k | 23857U, // FLOOR_L_S |
3060 | 91.2k | 23857U, // FLOOR_L_S_MMR6 |
3061 | 91.2k | 20661U, // FLOOR_W_D32 |
3062 | 91.2k | 20661U, // FLOOR_W_D64 |
3063 | 91.2k | 20661U, // FLOOR_W_D_MMR6 |
3064 | 91.2k | 20661U, // FLOOR_W_MM |
3065 | 91.2k | 24199U, // FLOOR_W_S |
3066 | 91.2k | 24199U, // FLOOR_W_S_MM |
3067 | 91.2k | 24199U, // FLOOR_W_S_MMR6 |
3068 | 91.2k | 570444362U, // FMADD_D |
3069 | 91.2k | 570450333U, // FMADD_W |
3070 | 91.2k | 536889847U, // FMAX_A_D |
3071 | 91.2k | 536895834U, // FMAX_A_W |
3072 | 91.2k | 536891593U, // FMAX_D |
3073 | 91.2k | 536897437U, // FMAX_W |
3074 | 91.2k | 536889827U, // FMIN_A_D |
3075 | 91.2k | 536895814U, // FMIN_A_W |
3076 | 91.2k | 536890499U, // FMIN_D |
3077 | 91.2k | 536896349U, // FMIN_W |
3078 | 91.2k | 20622U, // FMOV_D32 |
3079 | 91.2k | 20622U, // FMOV_D32_MM |
3080 | 91.2k | 20622U, // FMOV_D64 |
3081 | 91.2k | 20622U, // FMOV_D64_MM |
3082 | 91.2k | 20622U, // FMOV_D_MMR6 |
3083 | 91.2k | 24160U, // FMOV_S |
3084 | 91.2k | 24160U, // FMOV_S_MM |
3085 | 91.2k | 24160U, // FMOV_S_MMR6 |
3086 | 91.2k | 570444320U, // FMSUB_D |
3087 | 91.2k | 570450291U, // FMSUB_W |
3088 | 91.2k | 536890483U, // FMUL_D |
3089 | 91.2k | 536890484U, // FMUL_D32 |
3090 | 91.2k | 536890484U, // FMUL_D32_MM |
3091 | 91.2k | 536890484U, // FMUL_D64 |
3092 | 91.2k | 536890484U, // FMUL_D64_MM |
3093 | 91.2k | 536895231U, // FMUL_PS64 |
3094 | 91.2k | 536894805U, // FMUL_S |
3095 | 91.2k | 536894805U, // FMUL_S_MM |
3096 | 91.2k | 570449237U, // FMUL_S_MMR6 |
3097 | 91.2k | 536896333U, // FMUL_W |
3098 | 91.2k | 19314U, // FNEG_D32 |
3099 | 91.2k | 19314U, // FNEG_D32_MM |
3100 | 91.2k | 19314U, // FNEG_D64 |
3101 | 91.2k | 19314U, // FNEG_D64_MM |
3102 | 91.2k | 23812U, // FNEG_S |
3103 | 91.2k | 23812U, // FNEG_S_MM |
3104 | 91.2k | 23812U, // FNEG_S_MMR6 |
3105 | 91.2k | 2752567531U, // FORK |
3106 | 91.2k | 2752567531U, // FORK_NM |
3107 | 91.2k | 19648U, // FRCP_D |
3108 | 91.2k | 25470U, // FRCP_W |
3109 | 91.2k | 20268U, // FRINT_D |
3110 | 91.2k | 26160U, // FRINT_W |
3111 | 91.2k | 20296U, // FRSQRT_D |
3112 | 91.2k | 26188U, // FRSQRT_W |
3113 | 91.2k | 536890175U, // FSAF_D |
3114 | 91.2k | 536896020U, // FSAF_W |
3115 | 91.2k | 536890623U, // FSEQ_D |
3116 | 91.2k | 536896459U, // FSEQ_W |
3117 | 91.2k | 536890038U, // FSLE_D |
3118 | 91.2k | 536895943U, // FSLE_W |
3119 | 91.2k | 536891114U, // FSLT_D |
3120 | 91.2k | 536897038U, // FSLT_W |
3121 | 91.2k | 536890104U, // FSNE_D |
3122 | 91.2k | 536895977U, // FSNE_W |
3123 | 91.2k | 536890713U, // FSOR_D |
3124 | 91.2k | 536896588U, // FSOR_W |
3125 | 91.2k | 20287U, // FSQRT_D |
3126 | 91.2k | 20288U, // FSQRT_D32 |
3127 | 91.2k | 20288U, // FSQRT_D32_MM |
3128 | 91.2k | 20288U, // FSQRT_D64 |
3129 | 91.2k | 20288U, // FSQRT_D64_MM |
3130 | 91.2k | 24137U, // FSQRT_S |
3131 | 91.2k | 24137U, // FSQRT_S_MM |
3132 | 91.2k | 26179U, // FSQRT_W |
3133 | 91.2k | 536889880U, // FSUB_D |
3134 | 91.2k | 536889881U, // FSUB_D32 |
3135 | 91.2k | 536889881U, // FSUB_D32_MM |
3136 | 91.2k | 536889881U, // FSUB_D64 |
3137 | 91.2k | 536889881U, // FSUB_D64_MM |
3138 | 91.2k | 536895207U, // FSUB_PS64 |
3139 | 91.2k | 536894548U, // FSUB_S |
3140 | 91.2k | 536894548U, // FSUB_S_MM |
3141 | 91.2k | 570448980U, // FSUB_S_MMR6 |
3142 | 91.2k | 536895851U, // FSUB_W |
3143 | 91.2k | 536890672U, // FSUEQ_D |
3144 | 91.2k | 536896476U, // FSUEQ_W |
3145 | 91.2k | 536890087U, // FSULE_D |
3146 | 91.2k | 536895960U, // FSULE_W |
3147 | 91.2k | 536891163U, // FSULT_D |
3148 | 91.2k | 536897055U, // FSULT_W |
3149 | 91.2k | 536890121U, // FSUNE_D |
3150 | 91.2k | 536895994U, // FSUNE_W |
3151 | 91.2k | 536890544U, // FSUN_D |
3152 | 91.2k | 536896365U, // FSUN_W |
3153 | 91.2k | 20062U, // FTINT_S_D |
3154 | 91.2k | 25995U, // FTINT_S_W |
3155 | 91.2k | 20541U, // FTINT_U_D |
3156 | 91.2k | 26425U, // FTINT_U_W |
3157 | 91.2k | 536892301U, // FTQ_H |
3158 | 91.2k | 536896485U, // FTQ_W |
3159 | 91.2k | 19884U, // FTRUNC_S_D |
3160 | 91.2k | 25767U, // FTRUNC_S_W |
3161 | 91.2k | 20351U, // FTRUNC_U_D |
3162 | 91.2k | 26235U, // FTRUNC_U_W |
3163 | 91.2k | 547034U, // GINVI |
3164 | 91.2k | 547034U, // GINVI_MMR6 |
3165 | 91.2k | 547034U, // GINVI_NM |
3166 | 91.2k | 268459939U, // GINVT |
3167 | 91.2k | 268459939U, // GINVT_MMR6 |
3168 | 91.2k | 268459939U, // GINVT_NM |
3169 | 91.2k | 536890808U, // HADD_S_D |
3170 | 91.2k | 536892380U, // HADD_S_H |
3171 | 91.2k | 536896691U, // HADD_S_W |
3172 | 91.2k | 536891275U, // HADD_U_D |
3173 | 91.2k | 536892668U, // HADD_U_H |
3174 | 91.2k | 536897159U, // HADD_U_W |
3175 | 91.2k | 536890775U, // HSUB_S_D |
3176 | 91.2k | 536892359U, // HSUB_S_H |
3177 | 91.2k | 536896658U, // HSUB_S_W |
3178 | 91.2k | 536891242U, // HSUB_U_D |
3179 | 91.2k | 536892647U, // HSUB_U_H |
3180 | 91.2k | 536897126U, // HSUB_U_W |
3181 | 91.2k | 661951U, // HYPCALL |
3182 | 91.2k | 661951U, // HYPCALL_MM |
3183 | 91.2k | 536888999U, // ILVEV_B |
3184 | 91.2k | 536891509U, // ILVEV_D |
3185 | 91.2k | 536892890U, // ILVEV_H |
3186 | 91.2k | 536897403U, // ILVEV_W |
3187 | 91.2k | 536888527U, // ILVL_B |
3188 | 91.2k | 536890491U, // ILVL_D |
3189 | 91.2k | 536892216U, // ILVL_H |
3190 | 91.2k | 536896341U, // ILVL_W |
3191 | 91.2k | 536888279U, // ILVOD_B |
3192 | 91.2k | 536889964U, // ILVOD_D |
3193 | 91.2k | 536892018U, // ILVOD_H |
3194 | 91.2k | 536895926U, // ILVOD_W |
3195 | 91.2k | 536888575U, // ILVR_B |
3196 | 91.2k | 536890748U, // ILVR_D |
3197 | 91.2k | 536892341U, // ILVR_H |
3198 | 91.2k | 536896631U, // ILVR_W |
3199 | 91.2k | 536895196U, // INS |
3200 | 91.2k | 292046286U, // INSERT_B |
3201 | 91.2k | 308825909U, // INSERT_D |
3202 | 91.2k | 325604557U, // INSERT_H |
3203 | 91.2k | 342386233U, // INSERT_W |
3204 | 91.2k | 33579301U, // INSV |
3205 | 91.2k | 359154656U, // INSVE_B |
3206 | 91.2k | 375933714U, // INSVE_D |
3207 | 91.2k | 392712827U, // INSVE_H |
3208 | 91.2k | 409494019U, // INSVE_W |
3209 | 91.2k | 33579301U, // INSV_MM |
3210 | 91.2k | 536895196U, // INS_MM |
3211 | 91.2k | 536895196U, // INS_MMR6 |
3212 | 91.2k | 536887297U, // INS_NM |
3213 | 91.2k | 219361U, // J |
3214 | 91.2k | 219400U, // JAL |
3215 | 91.2k | 23544U, // JALR |
3216 | 91.2k | 547832U, // JALR16_MM |
3217 | 91.2k | 23544U, // JALR64 |
3218 | 91.2k | 547832U, // JALRC16_MMR6 |
3219 | 91.2k | 18725U, // JALRC16_NM |
3220 | 91.2k | 18139U, // JALRCHB_NM |
3221 | 91.2k | 18139U, // JALRC_HB_MMR6 |
3222 | 91.2k | 18725U, // JALRC_MMR6 |
3223 | 91.2k | 18725U, // JALRC_NM |
3224 | 91.2k | 541245U, // JALRS16_MM |
3225 | 91.2k | 24380U, // JALRS_MM |
3226 | 91.2k | 18156U, // JALR_HB |
3227 | 91.2k | 18156U, // JALR_HB64 |
3228 | 91.2k | 23544U, // JALR_MM |
3229 | 91.2k | 220867U, // JALS_MM |
3230 | 91.2k | 223256U, // JALX |
3231 | 91.2k | 223256U, // JALX_MM |
3232 | 91.2k | 219400U, // JAL_MM |
3233 | 91.2k | 18590U, // JIALC |
3234 | 91.2k | 18590U, // JIALC64 |
3235 | 91.2k | 18590U, // JIALC_MMR6 |
3236 | 91.2k | 18560U, // JIC |
3237 | 91.2k | 18560U, // JIC64 |
3238 | 91.2k | 18560U, // JIC_MMR6 |
3239 | 91.2k | 547828U, // JR |
3240 | 91.2k | 541232U, // JR16_MM |
3241 | 91.2k | 547828U, // JR64 |
3242 | 91.2k | 547633U, // JRADDIUSP |
3243 | 91.2k | 543008U, // JRC16_MM |
3244 | 91.2k | 541110U, // JRC16_MMR6 |
3245 | 91.2k | 547621U, // JRCADDIUSP_MMR6 |
3246 | 91.2k | 543008U, // JRC_NM |
3247 | 91.2k | 542437U, // JR_HB |
3248 | 91.2k | 542437U, // JR_HB64 |
3249 | 91.2k | 542437U, // JR_HB64_R6 |
3250 | 91.2k | 542437U, // JR_HB_R6 |
3251 | 91.2k | 547828U, // JR_MM |
3252 | 91.2k | 219361U, // J_MM |
3253 | 91.2k | 7575816U, // Jal16 |
3254 | 91.2k | 8100104U, // JalB16 |
3255 | 91.2k | 10921U, // JrRa16 |
3256 | 91.2k | 10913U, // JrcRa16 |
3257 | 91.2k | 543008U, // JrcRx16 |
3258 | 91.2k | 543013U, // JumpLinkReg16 |
3259 | 91.2k | 419451474U, // LAPC32_NM |
3260 | 91.2k | 419447735U, // LAPC48_NM |
3261 | 91.2k | 50349813U, // LB |
3262 | 91.2k | 50349813U, // LB16_NM |
3263 | 91.2k | 50349813U, // LB64 |
3264 | 91.2k | 50352468U, // LBE |
3265 | 91.2k | 50352468U, // LBE_MM |
3266 | 91.2k | 50349813U, // LBGP_NM |
3267 | 91.2k | 50348621U, // LBU16_MM |
3268 | 91.2k | 50356150U, // LBU16_NM |
3269 | 91.2k | 50356150U, // LBUGP_NM |
3270 | 91.2k | 3254806564U, // LBUX |
3271 | 91.2k | 3254806564U, // LBUX_MM |
3272 | 91.2k | 50358308U, // LBUX_NM |
3273 | 91.2k | 50356150U, // LBU_MMR6 |
3274 | 91.2k | 50356150U, // LBU_NM |
3275 | 91.2k | 50356150U, // LBUs9_NM |
3276 | 91.2k | 50358269U, // LBX_NM |
3277 | 91.2k | 50349813U, // LB_MM |
3278 | 91.2k | 50349813U, // LB_MMR6 |
3279 | 91.2k | 50349813U, // LB_NM |
3280 | 91.2k | 50349813U, // LBs9_NM |
3281 | 91.2k | 50356150U, // LBu |
3282 | 91.2k | 50356150U, // LBu64 |
3283 | 91.2k | 50352613U, // LBuE |
3284 | 91.2k | 50352613U, // LBuE_MM |
3285 | 91.2k | 50356150U, // LBu_MM |
3286 | 91.2k | 50352427U, // LD |
3287 | 91.2k | 50348124U, // LDC1 |
3288 | 91.2k | 50348124U, // LDC164 |
3289 | 91.2k | 50348124U, // LDC1_D64_MMR6 |
3290 | 91.2k | 50348124U, // LDC1_MM_D32 |
3291 | 91.2k | 50348124U, // LDC1_MM_D64 |
3292 | 91.2k | 50348340U, // LDC2 |
3293 | 91.2k | 50348340U, // LDC2_MMR6 |
3294 | 91.2k | 50348340U, // LDC2_R6 |
3295 | 91.2k | 50348425U, // LDC3 |
3296 | 91.2k | 17410U, // LDI_B |
3297 | 91.2k | 19330U, // LDI_D |
3298 | 91.2k | 21149U, // LDI_H |
3299 | 91.2k | 25222U, // LDI_W |
3300 | 91.2k | 50354532U, // LDL |
3301 | 91.2k | 18657U, // LDPC |
3302 | 91.2k | 50355122U, // LDR |
3303 | 91.2k | 3254796444U, // LDXC1 |
3304 | 91.2k | 3254796444U, // LDXC164 |
3305 | 91.2k | 50349000U, // LD_B |
3306 | 91.2k | 50350685U, // LD_D |
3307 | 91.2k | 50352739U, // LD_H |
3308 | 91.2k | 50356647U, // LD_W |
3309 | 91.2k | 167796753U, // LEA_ADDIU_NM |
3310 | 91.2k | 167796753U, // LEA_ADDiu |
3311 | 91.2k | 167796752U, // LEA_ADDiu64 |
3312 | 91.2k | 167796753U, // LEA_ADDiu_MM |
3313 | 91.2k | 50353692U, // LH |
3314 | 91.2k | 50353692U, // LH16_NM |
3315 | 91.2k | 50353692U, // LH64 |
3316 | 91.2k | 50352520U, // LHE |
3317 | 91.2k | 50352520U, // LHE_MM |
3318 | 91.2k | 50353692U, // LHGP_NM |
3319 | 91.2k | 50348644U, // LHU16_MM |
3320 | 91.2k | 50356228U, // LHU16_NM |
3321 | 91.2k | 50356228U, // LHUGP_NM |
3322 | 91.2k | 50356053U, // LHUXS_NM |
3323 | 91.2k | 50358314U, // LHUX_NM |
3324 | 91.2k | 50356228U, // LHU_NM |
3325 | 91.2k | 50356228U, // LHUs9_NM |
3326 | 91.2k | 3254806542U, // LHX |
3327 | 91.2k | 50356041U, // LHXS_NM |
3328 | 91.2k | 3254806542U, // LHX_MM |
3329 | 91.2k | 50358286U, // LHX_NM |
3330 | 91.2k | 50353692U, // LH_MM |
3331 | 91.2k | 50353692U, // LH_NM |
3332 | 91.2k | 50353692U, // LHs9_NM |
3333 | 91.2k | 50356228U, // LHu |
3334 | 91.2k | 50356228U, // LHu64 |
3335 | 91.2k | 50352619U, // LHuE |
3336 | 91.2k | 50352619U, // LHuE_MM |
3337 | 91.2k | 50356228U, // LHu_MM |
3338 | 91.2k | 16884U, // LI16_MM |
3339 | 91.2k | 16884U, // LI16_MMR6 |
3340 | 91.2k | 218126492U, // LI16_NM |
3341 | 91.2k | 100680391U, // LI48_NM |
3342 | 91.2k | 50354628U, // LL |
3343 | 91.2k | 50354628U, // LL64 |
3344 | 91.2k | 50354628U, // LL64_R6 |
3345 | 91.2k | 50352431U, // LLD |
3346 | 91.2k | 50352431U, // LLD_R6 |
3347 | 91.2k | 50352543U, // LLE |
3348 | 91.2k | 50352543U, // LLE_MM |
3349 | 91.2k | 536897858U, // LLWP_NM |
3350 | 91.2k | 50354628U, // LL_MM |
3351 | 91.2k | 50354628U, // LL_MMR6 |
3352 | 91.2k | 50354628U, // LL_NM |
3353 | 91.2k | 50354628U, // LL_R6 |
3354 | 91.2k | 536888174U, // LSA |
3355 | 91.2k | 3828450158U, // LSA_MMR6 |
3356 | 91.2k | 536888174U, // LSA_NM |
3357 | 91.2k | 536888174U, // LSA_R6 |
3358 | 91.2k | 251680981U, // LUI_MMR6 |
3359 | 91.2k | 436230357U, // LUI_NM |
3360 | 91.2k | 3254796458U, // LUXC1 |
3361 | 91.2k | 3254796458U, // LUXC164 |
3362 | 91.2k | 3254796458U, // LUXC1_MM |
3363 | 91.2k | 251680981U, // LUi |
3364 | 91.2k | 251680981U, // LUi64 |
3365 | 91.2k | 251680981U, // LUi_MM |
3366 | 91.2k | 50358213U, // LW |
3367 | 91.2k | 50348651U, // LW16_MM |
3368 | 91.2k | 50358213U, // LW16_NM |
3369 | 91.2k | 50358213U, // LW4x4_NM |
3370 | 91.2k | 50358213U, // LW64 |
3371 | 91.2k | 50348176U, // LWC1 |
3372 | 91.2k | 50348176U, // LWC1_MM |
3373 | 91.2k | 50348392U, // LWC2 |
3374 | 91.2k | 50348392U, // LWC2_MMR6 |
3375 | 91.2k | 50348392U, // LWC2_R6 |
3376 | 91.2k | 50348437U, // LWC3 |
3377 | 91.2k | 50358213U, // LWDSP |
3378 | 91.2k | 50358213U, // LWDSP_MM |
3379 | 91.2k | 50352637U, // LWE |
3380 | 91.2k | 50352637U, // LWE_MM |
3381 | 91.2k | 50358213U, // LWGP16_NM |
3382 | 91.2k | 50358213U, // LWGP_MM |
3383 | 91.2k | 50358213U, // LWGP_NM |
3384 | 91.2k | 50354746U, // LWL |
3385 | 91.2k | 50354746U, // LWL64 |
3386 | 91.2k | 50352553U, // LWLE |
3387 | 91.2k | 50352553U, // LWLE_MM |
3388 | 91.2k | 50354746U, // LWL_MM |
3389 | 91.2k | 66065U, // LWM16_MM |
3390 | 91.2k | 66065U, // LWM16_MMR6 |
3391 | 91.2k | 65805U, // LWM32_MM |
3392 | 91.2k | 587225718U, // LWM_NM |
3393 | 91.2k | 18694U, // LWPC |
3394 | 91.2k | 18694U, // LWPC_MMR6 |
3395 | 91.2k | 419449094U, // LWPC_NM |
3396 | 91.2k | 453008210U, // LWP_MM |
3397 | 91.2k | 50355256U, // LWR |
3398 | 91.2k | 50355256U, // LWR64 |
3399 | 91.2k | 50352601U, // LWRE |
3400 | 91.2k | 50352601U, // LWRE_MM |
3401 | 91.2k | 50355256U, // LWR_MM |
3402 | 91.2k | 50358213U, // LWSP16_NM |
3403 | 91.2k | 50358213U, // LWSP_MM |
3404 | 91.2k | 18687U, // LWUPC |
3405 | 91.2k | 50356375U, // LWU_MM |
3406 | 91.2k | 3254806576U, // LWX |
3407 | 91.2k | 3254796472U, // LWXC1 |
3408 | 91.2k | 3254796472U, // LWXC1_MM |
3409 | 91.2k | 50356060U, // LWXS16_NM |
3410 | 91.2k | 3254804316U, // LWXS_MM |
3411 | 91.2k | 50356060U, // LWXS_NM |
3412 | 91.2k | 3254806576U, // LWX_MM |
3413 | 91.2k | 50358320U, // LWX_NM |
3414 | 91.2k | 50358213U, // LW_MM |
3415 | 91.2k | 50358213U, // LW_MMR6 |
3416 | 91.2k | 50358213U, // LW_NM |
3417 | 91.2k | 50358213U, // LWs9_NM |
3418 | 91.2k | 50356375U, // LWu |
3419 | 91.2k | 50349813U, // LbRxRyOffMemX16 |
3420 | 91.2k | 50356150U, // LbuRxRyOffMemX16 |
3421 | 91.2k | 50353692U, // LhRxRyOffMemX16 |
3422 | 91.2k | 50356228U, // LhuRxRyOffMemX16 |
3423 | 91.2k | 1610635420U, // LiRxImm16 |
3424 | 91.2k | 22674U, // LiRxImmAlignX16 |
3425 | 91.2k | 22684U, // LiRxImmX16 |
3426 | 91.2k | 26565U, // LwRxPcTcp16 |
3427 | 91.2k | 26565U, // LwRxPcTcpX16 |
3428 | 91.2k | 50358213U, // LwRxRyOffMemX16 |
3429 | 91.2k | 50358213U, // LwRxSpImmX16 |
3430 | 91.2k | 20764U, // MADD |
3431 | 91.2k | 570444624U, // MADDF_D |
3432 | 91.2k | 570444624U, // MADDF_D_MMR6 |
3433 | 91.2k | 570449131U, // MADDF_S |
3434 | 91.2k | 570449131U, // MADDF_S_MMR6 |
3435 | 91.2k | 570446705U, // MADDR_Q_H |
3436 | 91.2k | 570450862U, // MADDR_Q_W |
3437 | 91.2k | 24535U, // MADDU |
3438 | 91.2k | 536895447U, // MADDU_DSP |
3439 | 91.2k | 536895447U, // MADDU_DSP_MM |
3440 | 91.2k | 24535U, // MADDU_MM |
3441 | 91.2k | 570443413U, // MADDV_B |
3442 | 91.2k | 570445923U, // MADDV_D |
3443 | 91.2k | 570447304U, // MADDV_H |
3444 | 91.2k | 570451817U, // MADDV_W |
3445 | 91.2k | 536889931U, // MADD_D32 |
3446 | 91.2k | 536889931U, // MADD_D32_MM |
3447 | 91.2k | 536889931U, // MADD_D64 |
3448 | 91.2k | 536891676U, // MADD_DSP |
3449 | 91.2k | 536891676U, // MADD_DSP_MM |
3450 | 91.2k | 20764U, // MADD_MM |
3451 | 91.2k | 570446675U, // MADD_Q_H |
3452 | 91.2k | 570450832U, // MADD_Q_W |
3453 | 91.2k | 536894565U, // MADD_S |
3454 | 91.2k | 536894565U, // MADD_S_MM |
3455 | 91.2k | 536893831U, // MAQ_SA_W_PHL |
3456 | 91.2k | 536893831U, // MAQ_SA_W_PHL_MM |
3457 | 91.2k | 536894396U, // MAQ_SA_W_PHR |
3458 | 91.2k | 536894396U, // MAQ_SA_W_PHR_MM |
3459 | 91.2k | 536893859U, // MAQ_S_W_PHL |
3460 | 91.2k | 536893859U, // MAQ_S_W_PHL_MM |
3461 | 91.2k | 536894424U, // MAQ_S_W_PHR |
3462 | 91.2k | 536894424U, // MAQ_S_W_PHR_MM |
3463 | 91.2k | 536889872U, // MAXA_D |
3464 | 91.2k | 536889872U, // MAXA_D_MMR6 |
3465 | 91.2k | 536894538U, // MAXA_S |
3466 | 91.2k | 536894538U, // MAXA_S_MMR6 |
3467 | 91.2k | 536888650U, // MAXI_S_B |
3468 | 91.2k | 536890886U, // MAXI_S_D |
3469 | 91.2k | 536892458U, // MAXI_S_H |
3470 | 91.2k | 536896769U, // MAXI_S_W |
3471 | 91.2k | 536888865U, // MAXI_U_B |
3472 | 91.2k | 536891353U, // MAXI_U_D |
3473 | 91.2k | 536892746U, // MAXI_U_H |
3474 | 91.2k | 536897237U, // MAXI_U_W |
3475 | 91.2k | 536888223U, // MAX_A_B |
3476 | 91.2k | 536889848U, // MAX_A_D |
3477 | 91.2k | 536891962U, // MAX_A_H |
3478 | 91.2k | 536895835U, // MAX_A_W |
3479 | 91.2k | 536891594U, // MAX_D |
3480 | 91.2k | 536891594U, // MAX_D_MMR6 |
3481 | 91.2k | 536895131U, // MAX_S |
3482 | 91.2k | 536888738U, // MAX_S_B |
3483 | 91.2k | 536891006U, // MAX_S_D |
3484 | 91.2k | 536892577U, // MAX_S_H |
3485 | 91.2k | 536895131U, // MAX_S_MMR6 |
3486 | 91.2k | 536896950U, // MAX_S_W |
3487 | 91.2k | 536888953U, // MAX_U_B |
3488 | 91.2k | 536891473U, // MAX_U_D |
3489 | 91.2k | 536892844U, // MAX_U_H |
3490 | 91.2k | 536897357U, // MAX_U_W |
3491 | 91.2k | 536887304U, // MFC0 |
3492 | 91.2k | 16392U, // MFC0Sel_NM |
3493 | 91.2k | 536887304U, // MFC0_MMR6 |
3494 | 91.2k | 536887304U, // MFC0_NM |
3495 | 91.2k | 16495U, // MFC1 |
3496 | 91.2k | 16495U, // MFC1_D64 |
3497 | 91.2k | 16495U, // MFC1_MM |
3498 | 91.2k | 16495U, // MFC1_MMR6 |
3499 | 91.2k | 536887623U, // MFC2 |
3500 | 91.2k | 16711U, // MFC2_MMR6 |
3501 | 91.2k | 536887311U, // MFGC0 |
3502 | 91.2k | 536887311U, // MFGC0_MM |
3503 | 91.2k | 16430U, // MFHC0Sel_NM |
3504 | 91.2k | 536887342U, // MFHC0_MMR6 |
3505 | 91.2k | 536887342U, // MFHC0_NM |
3506 | 91.2k | 16501U, // MFHC1_D32 |
3507 | 91.2k | 16501U, // MFHC1_D32_MM |
3508 | 91.2k | 16501U, // MFHC1_D64 |
3509 | 91.2k | 16501U, // MFHC1_D64_MM |
3510 | 91.2k | 16717U, // MFHC2_MMR6 |
3511 | 91.2k | 536887318U, // MFHGC0 |
3512 | 91.2k | 536887318U, // MFHGC0_MM |
3513 | 91.2k | 546950U, // MFHI |
3514 | 91.2k | 541164U, // MFHI16_MM |
3515 | 91.2k | 546950U, // MFHI64 |
3516 | 91.2k | 22662U, // MFHI_DSP |
3517 | 91.2k | 22662U, // MFHI_DSP_MM |
3518 | 91.2k | 546950U, // MFHI_MM |
3519 | 91.2k | 547486U, // MFLO |
3520 | 91.2k | 541215U, // MFLO16_MM |
3521 | 91.2k | 547486U, // MFLO64 |
3522 | 91.2k | 23198U, // MFLO_DSP |
3523 | 91.2k | 23198U, // MFLO_DSP_MM |
3524 | 91.2k | 547486U, // MFLO_MM |
3525 | 91.2k | 536894494U, // MFTR |
3526 | 91.2k | 536894494U, // MFTR_NM |
3527 | 91.2k | 536889857U, // MINA_D |
3528 | 91.2k | 536889857U, // MINA_D_MMR6 |
3529 | 91.2k | 536894530U, // MINA_S |
3530 | 91.2k | 536894530U, // MINA_S_MMR6 |
3531 | 91.2k | 536888630U, // MINI_S_B |
3532 | 91.2k | 536890866U, // MINI_S_D |
3533 | 91.2k | 536892438U, // MINI_S_H |
3534 | 91.2k | 536896749U, // MINI_S_W |
3535 | 91.2k | 536888845U, // MINI_U_B |
3536 | 91.2k | 536891333U, // MINI_U_D |
3537 | 91.2k | 536892726U, // MINI_U_H |
3538 | 91.2k | 536897217U, // MINI_U_W |
3539 | 91.2k | 536888204U, // MIN_A_B |
3540 | 91.2k | 536889828U, // MIN_A_D |
3541 | 91.2k | 536891943U, // MIN_A_H |
3542 | 91.2k | 536895815U, // MIN_A_W |
3543 | 91.2k | 536890500U, // MIN_D |
3544 | 91.2k | 536890500U, // MIN_D_MMR6 |
3545 | 91.2k | 536894812U, // MIN_S |
3546 | 91.2k | 536888660U, // MIN_S_B |
3547 | 91.2k | 536890896U, // MIN_S_D |
3548 | 91.2k | 536892468U, // MIN_S_H |
3549 | 91.2k | 536894812U, // MIN_S_MMR6 |
3550 | 91.2k | 536896789U, // MIN_S_W |
3551 | 91.2k | 536888875U, // MIN_U_B |
3552 | 91.2k | 536891363U, // MIN_U_D |
3553 | 91.2k | 536892756U, // MIN_U_H |
3554 | 91.2k | 536897247U, // MIN_U_W |
3555 | 91.2k | 536891723U, // MOD |
3556 | 91.2k | 536889417U, // MODSUB |
3557 | 91.2k | 536889417U, // MODSUB_MM |
3558 | 91.2k | 536895455U, // MODU |
3559 | 91.2k | 536895455U, // MODU_MMR6 |
3560 | 91.2k | 536895455U, // MODU_NM |
3561 | 91.2k | 536891723U, // MOD_MMR6 |
3562 | 91.2k | 536891723U, // MOD_NM |
3563 | 91.2k | 536888593U, // MOD_S_B |
3564 | 91.2k | 536890829U, // MOD_S_D |
3565 | 91.2k | 536892401U, // MOD_S_H |
3566 | 91.2k | 536896712U, // MOD_S_W |
3567 | 91.2k | 536888808U, // MOD_U_B |
3568 | 91.2k | 536891296U, // MOD_U_D |
3569 | 91.2k | 536892689U, // MOD_U_H |
3570 | 91.2k | 536897180U, // MOD_U_W |
3571 | 91.2k | 20983U, // MOVE16_MM |
3572 | 91.2k | 16854U, // MOVE16_MMR6 |
3573 | 91.2k | 536889491U, // MOVEBALC_NM |
3574 | 91.2k | 536894161U, // MOVEPREV_NM |
3575 | 91.2k | 536894161U, // MOVEP_MM |
3576 | 91.2k | 536894161U, // MOVEP_MMR6 |
3577 | 91.2k | 536894161U, // MOVEP_NM |
3578 | 91.2k | 20983U, // MOVE_NM |
3579 | 91.2k | 24739U, // MOVE_V |
3580 | 91.2k | 536890217U, // MOVF_D32 |
3581 | 91.2k | 536890217U, // MOVF_D32_MM |
3582 | 91.2k | 536890217U, // MOVF_D64 |
3583 | 91.2k | 536891923U, // MOVF_I |
3584 | 91.2k | 536891923U, // MOVF_I64 |
3585 | 91.2k | 536891923U, // MOVF_I_MM |
3586 | 91.2k | 536894716U, // MOVF_S |
3587 | 91.2k | 536894716U, // MOVF_S_MM |
3588 | 91.2k | 536890552U, // MOVN_I64_D64 |
3589 | 91.2k | 536894098U, // MOVN_I64_I |
3590 | 91.2k | 536894098U, // MOVN_I64_I64 |
3591 | 91.2k | 536894848U, // MOVN_I64_S |
3592 | 91.2k | 536890552U, // MOVN_I_D32 |
3593 | 91.2k | 536890552U, // MOVN_I_D32_MM |
3594 | 91.2k | 536890552U, // MOVN_I_D64 |
3595 | 91.2k | 536894098U, // MOVN_I_I |
3596 | 91.2k | 536894098U, // MOVN_I_I64 |
3597 | 91.2k | 536894098U, // MOVN_I_MM |
3598 | 91.2k | 536894848U, // MOVN_I_S |
3599 | 91.2k | 536894848U, // MOVN_I_S_MM |
3600 | 91.2k | 536894098U, // MOVN_NM |
3601 | 91.2k | 536891224U, // MOVT_D32 |
3602 | 91.2k | 536891224U, // MOVT_D32_MM |
3603 | 91.2k | 536891224U, // MOVT_D64 |
3604 | 91.2k | 536895402U, // MOVT_I |
3605 | 91.2k | 536895402U, // MOVT_I64 |
3606 | 91.2k | 536895402U, // MOVT_I_MM |
3607 | 91.2k | 536895057U, // MOVT_S |
3608 | 91.2k | 536895057U, // MOVT_S_MM |
3609 | 91.2k | 536891634U, // MOVZ_I64_D64 |
3610 | 91.2k | 536897666U, // MOVZ_I64_I |
3611 | 91.2k | 536897666U, // MOVZ_I64_I64 |
3612 | 91.2k | 536895158U, // MOVZ_I64_S |
3613 | 91.2k | 536891634U, // MOVZ_I_D32 |
3614 | 91.2k | 536891634U, // MOVZ_I_D32_MM |
3615 | 91.2k | 536891634U, // MOVZ_I_D64 |
3616 | 91.2k | 536897666U, // MOVZ_I_I |
3617 | 91.2k | 536897666U, // MOVZ_I_I64 |
3618 | 91.2k | 536897666U, // MOVZ_I_MM |
3619 | 91.2k | 536895158U, // MOVZ_I_S |
3620 | 91.2k | 536895158U, // MOVZ_I_S_MM |
3621 | 91.2k | 536897666U, // MOVZ_NM |
3622 | 91.2k | 18513U, // MSUB |
3623 | 91.2k | 570444615U, // MSUBF_D |
3624 | 91.2k | 570444615U, // MSUBF_D_MMR6 |
3625 | 91.2k | 570449122U, // MSUBF_S |
3626 | 91.2k | 570449122U, // MSUBF_S_MMR6 |
3627 | 91.2k | 570446694U, // MSUBR_Q_H |
3628 | 91.2k | 570450851U, // MSUBR_Q_W |
3629 | 91.2k | 24514U, // MSUBU |
3630 | 91.2k | 536895426U, // MSUBU_DSP |
3631 | 91.2k | 536895426U, // MSUBU_DSP_MM |
3632 | 91.2k | 24514U, // MSUBU_MM |
3633 | 91.2k | 570443404U, // MSUBV_B |
3634 | 91.2k | 570445914U, // MSUBV_D |
3635 | 91.2k | 570447295U, // MSUBV_H |
3636 | 91.2k | 570451808U, // MSUBV_W |
3637 | 91.2k | 536889889U, // MSUB_D32 |
3638 | 91.2k | 536889889U, // MSUB_D32_MM |
3639 | 91.2k | 536889889U, // MSUB_D64 |
3640 | 91.2k | 536889425U, // MSUB_DSP |
3641 | 91.2k | 536889425U, // MSUB_DSP_MM |
3642 | 91.2k | 18513U, // MSUB_MM |
3643 | 91.2k | 570446665U, // MSUB_Q_H |
3644 | 91.2k | 570450822U, // MSUB_Q_W |
3645 | 91.2k | 536894547U, // MSUB_S |
3646 | 91.2k | 536894547U, // MSUB_S_MM |
3647 | 91.2k | 2752561213U, // MTC0 |
3648 | 91.2k | 16445U, // MTC0Sel_NM |
3649 | 91.2k | 2752561213U, // MTC0_MMR6 |
3650 | 91.2k | 536887357U, // MTC0_NM |
3651 | 91.2k | 17875082U, // MTC1 |
3652 | 91.2k | 17875082U, // MTC1_D64 |
3653 | 91.2k | 17875082U, // MTC1_D64_MM |
3654 | 91.2k | 17875082U, // MTC1_MM |
3655 | 91.2k | 17875082U, // MTC1_MMR6 |
3656 | 91.2k | 2752561506U, // MTC2 |
3657 | 91.2k | 17875298U, // MTC2_MMR6 |
3658 | 91.2k | 2752561191U, // MTGC0 |
3659 | 91.2k | 2752561191U, // MTGC0_MM |
3660 | 91.2k | 16437U, // MTHC0Sel_NM |
3661 | 91.2k | 2752561205U, // MTHC0_MMR6 |
3662 | 91.2k | 536887349U, // MTHC0_NM |
3663 | 91.2k | 17924220U, // MTHC1_D32 |
3664 | 91.2k | 17924220U, // MTHC1_D32_MM |
3665 | 91.2k | 17924220U, // MTHC1_D64 |
3666 | 91.2k | 17924220U, // MTHC1_D64_MM |
3667 | 91.2k | 17875284U, // MTHC2_MMR6 |
3668 | 91.2k | 2752561182U, // MTHGC0 |
3669 | 91.2k | 2752561182U, // MTHGC0_MM |
3670 | 91.2k | 546956U, // MTHI |
3671 | 91.2k | 546956U, // MTHI64 |
3672 | 91.2k | 17881228U, // MTHI_DSP |
3673 | 91.2k | 17881228U, // MTHI_DSP_MM |
3674 | 91.2k | 546956U, // MTHI_MM |
3675 | 91.2k | 17881816U, // MTHLIP |
3676 | 91.2k | 17881816U, // MTHLIP_MM |
3677 | 91.2k | 547499U, // MTLO |
3678 | 91.2k | 547499U, // MTLO64 |
3679 | 91.2k | 17881771U, // MTLO_DSP |
3680 | 91.2k | 17881771U, // MTLO_DSP_MM |
3681 | 91.2k | 547499U, // MTLO_MM |
3682 | 91.2k | 540745U, // MTM0 |
3683 | 91.2k | 540870U, // MTM1 |
3684 | 91.2k | 541044U, // MTM2 |
3685 | 91.2k | 540751U, // MTP0 |
3686 | 91.2k | 540876U, // MTP1 |
3687 | 91.2k | 541050U, // MTP2 |
3688 | 91.2k | 68213803U, // MTTR |
3689 | 91.2k | 68213803U, // MTTR_NM |
3690 | 91.2k | 536893525U, // MUH |
3691 | 91.2k | 536895498U, // MUHU |
3692 | 91.2k | 536895498U, // MUHU_MMR6 |
3693 | 91.2k | 536895498U, // MUHU_NM |
3694 | 91.2k | 536893525U, // MUH_MMR6 |
3695 | 91.2k | 536893525U, // MUH_NM |
3696 | 91.2k | 536893991U, // MUL |
3697 | 91.2k | 536893991U, // MUL4x4_NM |
3698 | 91.2k | 536893872U, // MULEQ_S_W_PHL |
3699 | 91.2k | 536893872U, // MULEQ_S_W_PHL_MM |
3700 | 91.2k | 536894437U, // MULEQ_S_W_PHR |
3701 | 91.2k | 536894437U, // MULEQ_S_W_PHR_MM |
3702 | 91.2k | 536893749U, // MULEU_S_PH_QBL |
3703 | 91.2k | 536893749U, // MULEU_S_PH_QBL_MM |
3704 | 91.2k | 536894339U, // MULEU_S_PH_QBR |
3705 | 91.2k | 536894339U, // MULEU_S_PH_QBR_MM |
3706 | 91.2k | 536893279U, // MULQ_RS_PH |
3707 | 91.2k | 536893279U, // MULQ_RS_PH_MM |
3708 | 91.2k | 536896969U, // MULQ_RS_W |
3709 | 91.2k | 536896969U, // MULQ_RS_W_MMR2 |
3710 | 91.2k | 536893223U, // MULQ_S_PH |
3711 | 91.2k | 536893223U, // MULQ_S_PH_MMR2 |
3712 | 91.2k | 536896828U, // MULQ_S_W |
3713 | 91.2k | 536896828U, // MULQ_S_W_MMR2 |
3714 | 91.2k | 536895256U, // MULR_PS64 |
3715 | 91.2k | 536892284U, // MULR_Q_H |
3716 | 91.2k | 536896441U, // MULR_Q_W |
3717 | 91.2k | 536893425U, // MULSAQ_S_W_PH |
3718 | 91.2k | 536893425U, // MULSAQ_S_W_PH_MM |
3719 | 91.2k | 536893400U, // MULSA_W_PH |
3720 | 91.2k | 536893400U, // MULSA_W_PH_MMR2 |
3721 | 91.2k | 24462U, // MULT |
3722 | 91.2k | 536895618U, // MULTU_DSP |
3723 | 91.2k | 536895618U, // MULTU_DSP_MM |
3724 | 91.2k | 536895374U, // MULT_DSP |
3725 | 91.2k | 536895374U, // MULT_DSP_MM |
3726 | 91.2k | 24462U, // MULT_MM |
3727 | 91.2k | 24706U, // MULTu |
3728 | 91.2k | 24706U, // MULTu_MM |
3729 | 91.2k | 536895535U, // MULU |
3730 | 91.2k | 536895535U, // MULU_MMR6 |
3731 | 91.2k | 536895535U, // MULU_NM |
3732 | 91.2k | 536889008U, // MULV_B |
3733 | 91.2k | 536891526U, // MULV_D |
3734 | 91.2k | 536892899U, // MULV_H |
3735 | 91.2k | 536897420U, // MULV_W |
3736 | 91.2k | 536893991U, // MUL_MM |
3737 | 91.2k | 536893991U, // MUL_MMR6 |
3738 | 91.2k | 536893991U, // MUL_NM |
3739 | 91.2k | 536893096U, // MUL_PH |
3740 | 91.2k | 536893096U, // MUL_PH_MMR2 |
3741 | 91.2k | 536892253U, // MUL_Q_H |
3742 | 91.2k | 536896410U, // MUL_Q_W |
3743 | 91.2k | 536893991U, // MUL_R6 |
3744 | 91.2k | 536893191U, // MUL_S_PH |
3745 | 91.2k | 536893191U, // MUL_S_PH_MMR2 |
3746 | 91.2k | 546950U, // Mfhi16 |
3747 | 91.2k | 547486U, // Mflo16 |
3748 | 91.2k | 20983U, // Move32R16 |
3749 | 91.2k | 20983U, // MoveR3216 |
3750 | 91.2k | 17327U, // NLOC_B |
3751 | 91.2k | 18994U, // NLOC_D |
3752 | 91.2k | 21066U, // NLOC_H |
3753 | 91.2k | 24956U, // NLOC_W |
3754 | 91.2k | 17343U, // NLZC_B |
3755 | 91.2k | 19002U, // NLZC_D |
3756 | 91.2k | 21082U, // NLZC_H |
3757 | 91.2k | 24964U, // NLZC_W |
3758 | 91.2k | 536889939U, // NMADD_D32 |
3759 | 91.2k | 536889939U, // NMADD_D32_MM |
3760 | 91.2k | 536889939U, // NMADD_D64 |
3761 | 91.2k | 536894564U, // NMADD_S |
3762 | 91.2k | 536894564U, // NMADD_S_MM |
3763 | 91.2k | 536889897U, // NMSUB_D32 |
3764 | 91.2k | 536889897U, // NMSUB_D32_MM |
3765 | 91.2k | 536889897U, // NMSUB_D64 |
3766 | 91.2k | 536894546U, // NMSUB_S |
3767 | 91.2k | 536894546U, // NMSUB_S_MM |
3768 | 91.2k | 10802U, // NOP32_NM |
3769 | 91.2k | 11006U, // NOP_NM |
3770 | 91.2k | 536894462U, // NOR |
3771 | 91.2k | 536894462U, // NOR64 |
3772 | 91.2k | 536888416U, // NORI_B |
3773 | 91.2k | 536894462U, // NOR_MM |
3774 | 91.2k | 536894462U, // NOR_MMR6 |
3775 | 91.2k | 536894462U, // NOR_NM |
3776 | 91.2k | 536895667U, // NOR_V |
3777 | 91.2k | 16966U, // NOT16_MM |
3778 | 91.2k | 16966U, // NOT16_MMR6 |
3779 | 91.2k | 24478U, // NOT16_NM |
3780 | 91.2k | 21017U, // NegRxRy16 |
3781 | 91.2k | 24478U, // NotRxRy16 |
3782 | 91.2k | 536894463U, // OR |
3783 | 91.2k | 20021815U, // OR16_MM |
3784 | 91.2k | 20021815U, // OR16_MMR6 |
3785 | 91.2k | 536894463U, // OR16_NM |
3786 | 91.2k | 536894463U, // OR64 |
3787 | 91.2k | 536888417U, // ORI_B |
3788 | 91.2k | 536893624U, // ORI_MMR6 |
3789 | 91.2k | 536893624U, // ORI_NM |
3790 | 91.2k | 536894463U, // OR_MM |
3791 | 91.2k | 536894463U, // OR_MMR6 |
3792 | 91.2k | 536894463U, // OR_NM |
3793 | 91.2k | 536895668U, // OR_V |
3794 | 91.2k | 536893624U, // ORi |
3795 | 91.2k | 536893624U, // ORi64 |
3796 | 91.2k | 536893624U, // ORi_MM |
3797 | 91.2k | 33577983U, // OrRxRxRy16 |
3798 | 91.2k | 536893085U, // PACKRL_PH |
3799 | 91.2k | 536893085U, // PACKRL_PH_MM |
3800 | 91.2k | 10939U, // PAUSE |
3801 | 91.2k | 10939U, // PAUSE_MM |
3802 | 91.2k | 10939U, // PAUSE_MMR6 |
3803 | 91.2k | 10939U, // PAUSE_NM |
3804 | 91.2k | 536888990U, // PCKEV_B |
3805 | 91.2k | 536891500U, // PCKEV_D |
3806 | 91.2k | 536892881U, // PCKEV_H |
3807 | 91.2k | 536897394U, // PCKEV_W |
3808 | 91.2k | 536888270U, // PCKOD_B |
3809 | 91.2k | 536889955U, // PCKOD_D |
3810 | 91.2k | 536892009U, // PCKOD_H |
3811 | 91.2k | 536895917U, // PCKOD_W |
3812 | 91.2k | 17862U, // PCNT_B |
3813 | 91.2k | 20260U, // PCNT_D |
3814 | 91.2k | 21701U, // PCNT_H |
3815 | 91.2k | 26152U, // PCNT_W |
3816 | 91.2k | 536893049U, // PICK_PH |
3817 | 91.2k | 536893049U, // PICK_PH_MM |
3818 | 91.2k | 536889149U, // PICK_QB |
3819 | 91.2k | 536889149U, // PICK_QB_MM |
3820 | 91.2k | 536895223U, // PLL_PS64 |
3821 | 91.2k | 536895265U, // PLU_PS64 |
3822 | 91.2k | 23270U, // POP |
3823 | 91.2k | 22868U, // PRECEQU_PH_QBL |
3824 | 91.2k | 17200U, // PRECEQU_PH_QBLA |
3825 | 91.2k | 17200U, // PRECEQU_PH_QBLA_MM |
3826 | 91.2k | 22868U, // PRECEQU_PH_QBL_MM |
3827 | 91.2k | 23458U, // PRECEQU_PH_QBR |
3828 | 91.2k | 17238U, // PRECEQU_PH_QBRA |
3829 | 91.2k | 17238U, // PRECEQU_PH_QBRA_MM |
3830 | 91.2k | 23458U, // PRECEQU_PH_QBR_MM |
3831 | 91.2k | 22933U, // PRECEQ_W_PHL |
3832 | 91.2k | 22933U, // PRECEQ_W_PHL_MM |
3833 | 91.2k | 23498U, // PRECEQ_W_PHR |
3834 | 91.2k | 23498U, // PRECEQ_W_PHR_MM |
3835 | 91.2k | 22853U, // PRECEU_PH_QBL |
3836 | 91.2k | 17184U, // PRECEU_PH_QBLA |
3837 | 91.2k | 17184U, // PRECEU_PH_QBLA_MM |
3838 | 91.2k | 22853U, // PRECEU_PH_QBL_MM |
3839 | 91.2k | 23443U, // PRECEU_PH_QBR |
3840 | 91.2k | 17222U, // PRECEU_PH_QBRA |
3841 | 91.2k | 17222U, // PRECEU_PH_QBRA_MM |
3842 | 91.2k | 23443U, // PRECEU_PH_QBR_MM |
3843 | 91.2k | 536893001U, // PRECRQU_S_QB_PH |
3844 | 91.2k | 536893001U, // PRECRQU_S_QB_PH_MM |
3845 | 91.2k | 536896060U, // PRECRQ_PH_W |
3846 | 91.2k | 536896060U, // PRECRQ_PH_W_MM |
3847 | 91.2k | 536892974U, // PRECRQ_QB_PH |
3848 | 91.2k | 536892974U, // PRECRQ_QB_PH_MM |
3849 | 91.2k | 536896091U, // PRECRQ_RS_PH_W |
3850 | 91.2k | 536896091U, // PRECRQ_RS_PH_W_MM |
3851 | 91.2k | 536892988U, // PRECR_QB_PH |
3852 | 91.2k | 536892988U, // PRECR_QB_PH_MMR2 |
3853 | 91.2k | 536896044U, // PRECR_SRA_PH_W |
3854 | 91.2k | 536896044U, // PRECR_SRA_PH_W_MMR2 |
3855 | 91.2k | 536896073U, // PRECR_SRA_R_PH_W |
3856 | 91.2k | 536896073U, // PRECR_SRA_R_PH_W_MMR2 |
3857 | 91.2k | 5411341U, // PREF |
3858 | 91.2k | 5411179U, // PREFE |
3859 | 91.2k | 5411179U, // PREFE_MM |
3860 | 91.2k | 473081863U, // PREFX_MM |
3861 | 91.2k | 5411341U, // PREF_MM |
3862 | 91.2k | 5411341U, // PREF_MMR6 |
3863 | 91.2k | 50516493U, // PREF_NM |
3864 | 91.2k | 5411341U, // PREF_R6 |
3865 | 91.2k | 50516493U, // PREFs9_NM |
3866 | 91.2k | 536891705U, // PREPEND |
3867 | 91.2k | 536891705U, // PREPEND_MMR2 |
3868 | 91.2k | 536895239U, // PUL_PS64 |
3869 | 91.2k | 536895273U, // PUU_PS64 |
3870 | 91.2k | 18489U, // RADDU_W_QB |
3871 | 91.2k | 18489U, // RADDU_W_QB_MM |
3872 | 91.2k | 234904343U, // RDDSP |
3873 | 91.2k | 218127127U, // RDDSP_MM |
3874 | 91.2k | 536894513U, // RDHWR |
3875 | 91.2k | 536894513U, // RDHWR64 |
3876 | 91.2k | 536894513U, // RDHWR_MM |
3877 | 91.2k | 536894513U, // RDHWR_MMR6 |
3878 | 91.2k | 536894513U, // RDHWR_NM |
3879 | 91.2k | 23566U, // RDPGPR_MMR6 |
3880 | 91.2k | 23566U, // RDPGPR_NM |
3881 | 91.2k | 19656U, // RECIP_D32 |
3882 | 91.2k | 19656U, // RECIP_D32_MM |
3883 | 91.2k | 19656U, // RECIP_D64 |
3884 | 91.2k | 19656U, // RECIP_D64_MM |
3885 | 91.2k | 23944U, // RECIP_S |
3886 | 91.2k | 23944U, // RECIP_S_MM |
3887 | 91.2k | 22428U, // REPLV_PH |
3888 | 91.2k | 22428U, // REPLV_PH_MM |
3889 | 91.2k | 18469U, // REPLV_QB |
3890 | 91.2k | 18469U, // REPLV_QB_MM |
3891 | 91.2k | 22155U, // REPL_PH |
3892 | 91.2k | 22155U, // REPL_PH_MM |
3893 | 91.2k | 486557519U, // REPL_QB |
3894 | 91.2k | 486557519U, // REPL_QB_MM |
3895 | 91.2k | 248088U, // RESTOREJRC16_NM |
3896 | 91.2k | 264472U, // RESTOREJRC_NM |
3897 | 91.2k | 266704U, // RESTORE_NM |
3898 | 91.2k | 20269U, // RINT_D |
3899 | 91.2k | 20269U, // RINT_D_MMR6 |
3900 | 91.2k | 24128U, // RINT_S |
3901 | 91.2k | 24128U, // RINT_S_MMR6 |
3902 | 91.2k | 536894501U, // ROTR |
3903 | 91.2k | 536895774U, // ROTRV |
3904 | 91.2k | 536895774U, // ROTRV_MM |
3905 | 91.2k | 536895774U, // ROTRV_NM |
3906 | 91.2k | 536894501U, // ROTR_MM |
3907 | 91.2k | 536894501U, // ROTR_NM |
3908 | 91.2k | 536897566U, // ROTX_NM |
3909 | 91.2k | 19465U, // ROUND_L_D64 |
3910 | 91.2k | 19465U, // ROUND_L_D_MMR6 |
3911 | 91.2k | 23836U, // ROUND_L_S |
3912 | 91.2k | 23836U, // ROUND_L_S_MMR6 |
3913 | 91.2k | 20640U, // ROUND_W_D32 |
3914 | 91.2k | 20640U, // ROUND_W_D64 |
3915 | 91.2k | 20640U, // ROUND_W_D_MMR6 |
3916 | 91.2k | 20640U, // ROUND_W_MM |
3917 | 91.2k | 24178U, // ROUND_W_S |
3918 | 91.2k | 24178U, // ROUND_W_S_MM |
3919 | 91.2k | 24178U, // ROUND_W_S_MMR6 |
3920 | 91.2k | 20297U, // RSQRT_D32 |
3921 | 91.2k | 20297U, // RSQRT_D32_MM |
3922 | 91.2k | 20297U, // RSQRT_D64 |
3923 | 91.2k | 20297U, // RSQRT_D64_MM |
3924 | 91.2k | 24136U, // RSQRT_S |
3925 | 91.2k | 24136U, // RSQRT_S_MM |
3926 | 91.2k | 0U, // Restore16 |
3927 | 91.2k | 0U, // RestoreX16 |
3928 | 91.2k | 8405787U, // SAA |
3929 | 91.2k | 8409346U, // SAAD |
3930 | 91.2k | 536888699U, // SAT_S_B |
3931 | 91.2k | 536890945U, // SAT_S_D |
3932 | 91.2k | 536892527U, // SAT_S_H |
3933 | 91.2k | 536896878U, // SAT_S_W |
3934 | 91.2k | 536888926U, // SAT_U_B |
3935 | 91.2k | 536891424U, // SAT_U_D |
3936 | 91.2k | 536892817U, // SAT_U_H |
3937 | 91.2k | 536897308U, // SAT_U_W |
3938 | 91.2k | 250353U, // SAVE16_NM |
3939 | 91.2k | 266737U, // SAVE_NM |
3940 | 91.2k | 50350149U, // SB |
3941 | 91.2k | 50348458U, // SB16_MM |
3942 | 91.2k | 50348458U, // SB16_MMR6 |
3943 | 91.2k | 50350149U, // SB16_NM |
3944 | 91.2k | 50350149U, // SB64 |
3945 | 91.2k | 50352473U, // SBE |
3946 | 91.2k | 50352473U, // SBE_MM |
3947 | 91.2k | 50350149U, // SBGP_NM |
3948 | 91.2k | 50358274U, // SBX_NM |
3949 | 91.2k | 50350149U, // SB_MM |
3950 | 91.2k | 50350149U, // SB_MMR6 |
3951 | 91.2k | 50350149U, // SB_NM |
3952 | 91.2k | 50350149U, // SBs9_NM |
3953 | 91.2k | 8964399U, // SC |
3954 | 91.2k | 8964399U, // SC64 |
3955 | 91.2k | 8964399U, // SC64_R6 |
3956 | 91.2k | 8966417U, // SCD |
3957 | 91.2k | 8966417U, // SCD_R6 |
3958 | 91.2k | 8966494U, // SCE |
3959 | 91.2k | 8966494U, // SCE_MM |
3960 | 91.2k | 606136636U, // SCWP_NM |
3961 | 91.2k | 8964399U, // SC_MM |
3962 | 91.2k | 8964399U, // SC_MMR6 |
3963 | 91.2k | 8964399U, // SC_NM |
3964 | 91.2k | 8964399U, // SC_R6 |
3965 | 91.2k | 50352464U, // SD |
3966 | 91.2k | 285378U, // SDBBP |
3967 | 91.2k | 148007U, // SDBBP16_MM |
3968 | 91.2k | 148007U, // SDBBP16_MMR6 |
3969 | 91.2k | 547522U, // SDBBP16_NM |
3970 | 91.2k | 662210U, // SDBBP_MM |
3971 | 91.2k | 285378U, // SDBBP_MMR6 |
3972 | 91.2k | 547522U, // SDBBP_NM |
3973 | 91.2k | 285378U, // SDBBP_R6 |
3974 | 91.2k | 50348130U, // SDC1 |
3975 | 91.2k | 50348130U, // SDC164 |
3976 | 91.2k | 50348130U, // SDC1_D64_MMR6 |
3977 | 91.2k | 50348130U, // SDC1_MM_D32 |
3978 | 91.2k | 50348130U, // SDC1_MM_D64 |
3979 | 91.2k | 50348346U, // SDC2 |
3980 | 91.2k | 50348346U, // SDC2_MMR6 |
3981 | 91.2k | 50348346U, // SDC2_R6 |
3982 | 91.2k | 50348431U, // SDC3 |
3983 | 91.2k | 26787U, // SDIV |
3984 | 91.2k | 26787U, // SDIV_MM |
3985 | 91.2k | 50354537U, // SDL |
3986 | 91.2k | 50355127U, // SDR |
3987 | 91.2k | 3254796451U, // SDXC1 |
3988 | 91.2k | 3254796451U, // SDXC164 |
3989 | 91.2k | 18134U, // SEB |
3990 | 91.2k | 18134U, // SEB64 |
3991 | 91.2k | 18134U, // SEB_MM |
3992 | 91.2k | 18134U, // SEB_NM |
3993 | 91.2k | 22037U, // SEH |
3994 | 91.2k | 22037U, // SEH64 |
3995 | 91.2k | 22037U, // SEH_MM |
3996 | 91.2k | 22037U, // SEH_NM |
3997 | 91.2k | 536897639U, // SELEQZ |
3998 | 91.2k | 536897639U, // SELEQZ64 |
3999 | 91.2k | 536891624U, // SELEQZ_D |
4000 | 91.2k | 536891624U, // SELEQZ_D_MMR6 |
4001 | 91.2k | 536897639U, // SELEQZ_MMR6 |
4002 | 91.2k | 536895148U, // SELEQZ_S |
4003 | 91.2k | 536895148U, // SELEQZ_S_MMR6 |
4004 | 91.2k | 536897612U, // SELNEZ |
4005 | 91.2k | 536897612U, // SELNEZ64 |
4006 | 91.2k | 536891607U, // SELNEZ_D |
4007 | 91.2k | 536891607U, // SELNEZ_D_MMR6 |
4008 | 91.2k | 536897612U, // SELNEZ_MMR6 |
4009 | 91.2k | 536895138U, // SELNEZ_S |
4010 | 91.2k | 536895138U, // SELNEZ_S_MMR6 |
4011 | 91.2k | 570444850U, // SEL_D |
4012 | 91.2k | 570444850U, // SEL_D_MMR6 |
4013 | 91.2k | 570449221U, // SEL_S |
4014 | 91.2k | 570449221U, // SEL_S_MMR6 |
4015 | 91.2k | 536894305U, // SEQ |
4016 | 91.2k | 536893611U, // SEQI_NM |
4017 | 91.2k | 536893611U, // SEQi |
4018 | 91.2k | 50354251U, // SH |
4019 | 91.2k | 50348510U, // SH16_MM |
4020 | 91.2k | 50348510U, // SH16_MMR6 |
4021 | 91.2k | 50354251U, // SH16_NM |
4022 | 91.2k | 50354251U, // SH64 |
4023 | 91.2k | 50352525U, // SHE |
4024 | 91.2k | 50352525U, // SHE_MM |
4025 | 91.2k | 536888298U, // SHF_B |
4026 | 91.2k | 536892037U, // SHF_H |
4027 | 91.2k | 536896029U, // SHF_W |
4028 | 91.2k | 50354251U, // SHGP_NM |
4029 | 91.2k | 23204U, // SHILO |
4030 | 91.2k | 24832U, // SHILOV |
4031 | 91.2k | 24832U, // SHILOV_MM |
4032 | 91.2k | 23204U, // SHILO_MM |
4033 | 91.2k | 536893330U, // SHLLV_PH |
4034 | 91.2k | 536893330U, // SHLLV_PH_MM |
4035 | 91.2k | 536889371U, // SHLLV_QB |
4036 | 91.2k | 536889371U, // SHLLV_QB_MM |
4037 | 91.2k | 536893267U, // SHLLV_S_PH |
4038 | 91.2k | 536893267U, // SHLLV_S_PH_MM |
4039 | 91.2k | 536896939U, // SHLLV_S_W |
4040 | 91.2k | 536896939U, // SHLLV_S_W_MM |
4041 | 91.2k | 536893058U, // SHLL_PH |
4042 | 91.2k | 536893058U, // SHLL_PH_MM |
4043 | 91.2k | 536889158U, // SHLL_QB |
4044 | 91.2k | 536889158U, // SHLL_QB_MM |
4045 | 91.2k | 536893180U, // SHLL_S_PH |
4046 | 91.2k | 536893180U, // SHLL_S_PH_MM |
4047 | 91.2k | 536896779U, // SHLL_S_W |
4048 | 91.2k | 536896779U, // SHLL_S_W_MM |
4049 | 91.2k | 536893320U, // SHRAV_PH |
4050 | 91.2k | 536893320U, // SHRAV_PH_MM |
4051 | 91.2k | 536889361U, // SHRAV_QB |
4052 | 91.2k | 536889361U, // SHRAV_QB_MMR2 |
4053 | 91.2k | 536893168U, // SHRAV_R_PH |
4054 | 91.2k | 536893168U, // SHRAV_R_PH_MM |
4055 | 91.2k | 536889259U, // SHRAV_R_QB |
4056 | 91.2k | 536889259U, // SHRAV_R_QB_MMR2 |
4057 | 91.2k | 536896534U, // SHRAV_R_W |
4058 | 91.2k | 536896534U, // SHRAV_R_W_MM |
4059 | 91.2k | 536892965U, // SHRA_PH |
4060 | 91.2k | 536892965U, // SHRA_PH_MM |
4061 | 91.2k | 536889081U, // SHRA_QB |
4062 | 91.2k | 536889081U, // SHRA_QB_MMR2 |
4063 | 91.2k | 536893133U, // SHRA_R_PH |
4064 | 91.2k | 536893133U, // SHRA_R_PH_MM |
4065 | 91.2k | 536889224U, // SHRA_R_QB |
4066 | 91.2k | 536889224U, // SHRA_R_QB_MMR2 |
4067 | 91.2k | 536896492U, // SHRA_R_W |
4068 | 91.2k | 536896492U, // SHRA_R_W_MM |
4069 | 91.2k | 536893350U, // SHRLV_PH |
4070 | 91.2k | 536893350U, // SHRLV_PH_MMR2 |
4071 | 91.2k | 536889391U, // SHRLV_QB |
4072 | 91.2k | 536889391U, // SHRLV_QB_MM |
4073 | 91.2k | 536893076U, // SHRL_PH |
4074 | 91.2k | 536893076U, // SHRL_PH_MMR2 |
4075 | 91.2k | 536889176U, // SHRL_QB |
4076 | 91.2k | 536889176U, // SHRL_QB_MM |
4077 | 91.2k | 50356047U, // SHXS_NM |
4078 | 91.2k | 50358291U, // SHX_NM |
4079 | 91.2k | 50354251U, // SH_MM |
4080 | 91.2k | 50354251U, // SH_MMR6 |
4081 | 91.2k | 50354251U, // SH_NM |
4082 | 91.2k | 50354251U, // SHs9_NM |
4083 | 91.2k | 299410U, // SIGRIE |
4084 | 91.2k | 299410U, // SIGRIE_MMR6 |
4085 | 91.2k | 545170U, // SIGRIE_NM |
4086 | 91.2k | 1107313665U, // SLDI_B |
4087 | 91.2k | 1107315585U, // SLDI_D |
4088 | 91.2k | 1107317404U, // SLDI_H |
4089 | 91.2k | 1107321477U, // SLDI_W |
4090 | 91.2k | 1107313607U, // SLD_B |
4091 | 91.2k | 1107315292U, // SLD_D |
4092 | 91.2k | 1107317346U, // SLD_H |
4093 | 91.2k | 1107321254U, // SLD_W |
4094 | 91.2k | 536893924U, // SLL |
4095 | 91.2k | 536887811U, // SLL16_MM |
4096 | 91.2k | 536887811U, // SLL16_MMR6 |
4097 | 91.2k | 536893924U, // SLL16_NM |
4098 | 91.2k | 1073764836U, // SLL64_32 |
4099 | 91.2k | 1073764836U, // SLL64_64 |
4100 | 91.2k | 536888355U, // SLLI_B |
4101 | 91.2k | 536890258U, // SLLI_D |
4102 | 91.2k | 536892077U, // SLLI_H |
4103 | 91.2k | 536896150U, // SLLI_W |
4104 | 91.2k | 536895731U, // SLLV |
4105 | 91.2k | 536895731U, // SLLV_MM |
4106 | 91.2k | 536895731U, // SLLV_NM |
4107 | 91.2k | 536888504U, // SLL_B |
4108 | 91.2k | 536890442U, // SLL_D |
4109 | 91.2k | 536892193U, // SLL_H |
4110 | 91.2k | 536893924U, // SLL_MM |
4111 | 91.2k | 536893924U, // SLL_MMR6 |
4112 | 91.2k | 536893924U, // SLL_NM |
4113 | 91.2k | 536896292U, // SLL_W |
4114 | 91.2k | 536895363U, // SLT |
4115 | 91.2k | 536895363U, // SLT64 |
4116 | 91.2k | 536895519U, // SLTIU_NM |
4117 | 91.2k | 536893635U, // SLTI_NM |
4118 | 91.2k | 536895605U, // SLTU_NM |
4119 | 91.2k | 536895363U, // SLT_MM |
4120 | 91.2k | 536895363U, // SLT_NM |
4121 | 91.2k | 536893635U, // SLTi |
4122 | 91.2k | 536893635U, // SLTi64 |
4123 | 91.2k | 536893635U, // SLTi_MM |
4124 | 91.2k | 536895519U, // SLTiu |
4125 | 91.2k | 536895519U, // SLTiu64 |
4126 | 91.2k | 536895519U, // SLTiu_MM |
4127 | 91.2k | 536895605U, // SLTu |
4128 | 91.2k | 536895605U, // SLTu64 |
4129 | 91.2k | 536895605U, // SLTu_MM |
4130 | 91.2k | 536891834U, // SNE |
4131 | 91.2k | 536893556U, // SNEi |
4132 | 91.2k | 536895752U, // SOV_NM |
4133 | 91.2k | 1073759354U, // SPLATI_B |
4134 | 91.2k | 1073761241U, // SPLATI_D |
4135 | 91.2k | 1073763060U, // SPLATI_H |
4136 | 91.2k | 1073767133U, // SPLATI_W |
4137 | 91.2k | 1073759669U, // SPLAT_B |
4138 | 91.2k | 1073761954U, // SPLAT_D |
4139 | 91.2k | 1073763508U, // SPLAT_H |
4140 | 91.2k | 1073767925U, // SPLAT_W |
4141 | 91.2k | 536888168U, // SRA |
4142 | 91.2k | 536888313U, // SRAI_B |
4143 | 91.2k | 536890233U, // SRAI_D |
4144 | 91.2k | 536892052U, // SRAI_H |
4145 | 91.2k | 536896125U, // SRAI_W |
4146 | 91.2k | 536888389U, // SRARI_B |
4147 | 91.2k | 536890292U, // SRARI_D |
4148 | 91.2k | 536892111U, // SRARI_H |
4149 | 91.2k | 536896184U, // SRARI_W |
4150 | 91.2k | 536888542U, // SRAR_B |
4151 | 91.2k | 536890681U, // SRAR_D |
4152 | 91.2k | 536892308U, // SRAR_H |
4153 | 91.2k | 536896556U, // SRAR_W |
4154 | 91.2k | 536895710U, // SRAV |
4155 | 91.2k | 536895710U, // SRAV_MM |
4156 | 91.2k | 536895710U, // SRAV_NM |
4157 | 91.2k | 536888232U, // SRA_B |
4158 | 91.2k | 536889865U, // SRA_D |
4159 | 91.2k | 536891971U, // SRA_H |
4160 | 91.2k | 536888168U, // SRA_MM |
4161 | 91.2k | 536888168U, // SRA_NM |
4162 | 91.2k | 536895844U, // SRA_W |
4163 | 91.2k | 536893952U, // SRL |
4164 | 91.2k | 536887818U, // SRL16_MM |
4165 | 91.2k | 536887818U, // SRL16_MMR6 |
4166 | 91.2k | 536893952U, // SRL16_NM |
4167 | 91.2k | 536888363U, // SRLI_B |
4168 | 91.2k | 536890266U, // SRLI_D |
4169 | 91.2k | 536892085U, // SRLI_H |
4170 | 91.2k | 536896158U, // SRLI_W |
4171 | 91.2k | 536888407U, // SRLRI_B |
4172 | 91.2k | 536890310U, // SRLRI_D |
4173 | 91.2k | 536892129U, // SRLRI_H |
4174 | 91.2k | 536896202U, // SRLRI_W |
4175 | 91.2k | 536888558U, // SRLR_B |
4176 | 91.2k | 536890697U, // SRLR_D |
4177 | 91.2k | 536892324U, // SRLR_H |
4178 | 91.2k | 536896572U, // SRLR_W |
4179 | 91.2k | 536895738U, // SRLV |
4180 | 91.2k | 536895738U, // SRLV_MM |
4181 | 91.2k | 536895738U, // SRLV_NM |
4182 | 91.2k | 536888511U, // SRL_B |
4183 | 91.2k | 536890467U, // SRL_D |
4184 | 91.2k | 536892200U, // SRL_H |
4185 | 91.2k | 536893952U, // SRL_MM |
4186 | 91.2k | 536893952U, // SRL_NM |
4187 | 91.2k | 536896317U, // SRL_W |
4188 | 91.2k | 11004U, // SSNOP |
4189 | 91.2k | 11004U, // SSNOP_MM |
4190 | 91.2k | 11004U, // SSNOP_MMR6 |
4191 | 91.2k | 50349528U, // ST_B |
4192 | 91.2k | 50351954U, // ST_D |
4193 | 91.2k | 50353367U, // ST_H |
4194 | 91.2k | 50357846U, // ST_W |
4195 | 91.2k | 536889420U, // SUB |
4196 | 91.2k | 536893029U, // SUBQH_PH |
4197 | 91.2k | 536893029U, // SUBQH_PH_MMR2 |
4198 | 91.2k | 536893144U, // SUBQH_R_PH |
4199 | 91.2k | 536893144U, // SUBQH_R_PH_MMR2 |
4200 | 91.2k | 536896502U, // SUBQH_R_W |
4201 | 91.2k | 536896502U, // SUBQH_R_W_MMR2 |
4202 | 91.2k | 536896107U, // SUBQH_W |
4203 | 91.2k | 536896107U, // SUBQH_W_MMR2 |
4204 | 91.2k | 536893104U, // SUBQ_PH |
4205 | 91.2k | 536893104U, // SUBQ_PH_MM |
4206 | 91.2k | 536893201U, // SUBQ_S_PH |
4207 | 91.2k | 536893201U, // SUBQ_S_PH_MM |
4208 | 91.2k | 536896808U, // SUBQ_S_W |
4209 | 91.2k | 536896808U, // SUBQ_S_W_MM |
4210 | 91.2k | 536888914U, // SUBSUS_U_B |
4211 | 91.2k | 536891412U, // SUBSUS_U_D |
4212 | 91.2k | 536892805U, // SUBSUS_U_H |
4213 | 91.2k | 536897296U, // SUBSUS_U_W |
4214 | 91.2k | 536888717U, // SUBSUU_S_B |
4215 | 91.2k | 536890985U, // SUBSUU_S_D |
4216 | 91.2k | 536892545U, // SUBSUU_S_H |
4217 | 91.2k | 536896918U, // SUBSUU_S_W |
4218 | 91.2k | 536888679U, // SUBS_S_B |
4219 | 91.2k | 536890925U, // SUBS_S_D |
4220 | 91.2k | 536892507U, // SUBS_S_H |
4221 | 91.2k | 536896858U, // SUBS_S_W |
4222 | 91.2k | 536888894U, // SUBS_U_B |
4223 | 91.2k | 536891392U, // SUBS_U_D |
4224 | 91.2k | 536892785U, // SUBS_U_H |
4225 | 91.2k | 536897276U, // SUBS_U_W |
4226 | 91.2k | 536887892U, // SUBU16_MM |
4227 | 91.2k | 536887892U, // SUBU16_MMR6 |
4228 | 91.2k | 536889129U, // SUBUH_QB |
4229 | 91.2k | 536889129U, // SUBUH_QB_MMR2 |
4230 | 91.2k | 536889235U, // SUBUH_R_QB |
4231 | 91.2k | 536889235U, // SUBUH_R_QB_MMR2 |
4232 | 91.2k | 536895420U, // SUBU_MMR6 |
4233 | 91.2k | 536893302U, // SUBU_PH |
4234 | 91.2k | 536893302U, // SUBU_PH_MMR2 |
4235 | 91.2k | 536889343U, // SUBU_QB |
4236 | 91.2k | 536889343U, // SUBU_QB_MM |
4237 | 91.2k | 536893245U, // SUBU_S_PH |
4238 | 91.2k | 536893245U, // SUBU_S_PH_MMR2 |
4239 | 91.2k | 536889282U, // SUBU_S_QB |
4240 | 91.2k | 536889282U, // SUBU_S_QB_MM |
4241 | 91.2k | 536888461U, // SUBVI_B |
4242 | 91.2k | 536890348U, // SUBVI_D |
4243 | 91.2k | 536892167U, // SUBVI_H |
4244 | 91.2k | 536896240U, // SUBVI_W |
4245 | 91.2k | 536888973U, // SUBV_B |
4246 | 91.2k | 536891483U, // SUBV_D |
4247 | 91.2k | 536892864U, // SUBV_H |
4248 | 91.2k | 536897377U, // SUBV_W |
4249 | 91.2k | 536889420U, // SUB_MM |
4250 | 91.2k | 536889420U, // SUB_MMR6 |
4251 | 91.2k | 536889420U, // SUB_NM |
4252 | 91.2k | 536895420U, // SUBu |
4253 | 91.2k | 536895420U, // SUBu16_NM |
4254 | 91.2k | 536895420U, // SUBu_MM |
4255 | 91.2k | 536895420U, // SUBu_NM |
4256 | 91.2k | 3254796465U, // SUXC1 |
4257 | 91.2k | 3254796465U, // SUXC164 |
4258 | 91.2k | 3254796465U, // SUXC1_MM |
4259 | 91.2k | 50358235U, // SW |
4260 | 91.2k | 50348657U, // SW16_MM |
4261 | 91.2k | 50348657U, // SW16_MMR6 |
4262 | 91.2k | 50358235U, // SW16_NM |
4263 | 91.2k | 50358235U, // SW4x4_NM |
4264 | 91.2k | 50358235U, // SW64 |
4265 | 91.2k | 50348182U, // SWC1 |
4266 | 91.2k | 50348182U, // SWC1_MM |
4267 | 91.2k | 50348398U, // SWC2 |
4268 | 91.2k | 50348398U, // SWC2_MMR6 |
4269 | 91.2k | 50348398U, // SWC2_R6 |
4270 | 91.2k | 50348443U, // SWC3 |
4271 | 91.2k | 50358235U, // SWDSP |
4272 | 91.2k | 50358235U, // SWDSP_MM |
4273 | 91.2k | 50352642U, // SWE |
4274 | 91.2k | 50352642U, // SWE_MM |
4275 | 91.2k | 50358235U, // SWGP16_NM |
4276 | 91.2k | 50358235U, // SWGP_NM |
4277 | 91.2k | 50354751U, // SWL |
4278 | 91.2k | 50354751U, // SWL64 |
4279 | 91.2k | 50352559U, // SWLE |
4280 | 91.2k | 50352559U, // SWLE_MM |
4281 | 91.2k | 50354751U, // SWL_MM |
4282 | 91.2k | 66072U, // SWM16_MM |
4283 | 91.2k | 66072U, // SWM16_MMR6 |
4284 | 91.2k | 65812U, // SWM32_MM |
4285 | 91.2k | 587225725U, // SWM_NM |
4286 | 91.2k | 419449100U, // SWPC_NM |
4287 | 91.2k | 453008215U, // SWP_MM |
4288 | 91.2k | 50355261U, // SWR |
4289 | 91.2k | 50355261U, // SWR64 |
4290 | 91.2k | 50352607U, // SWRE |
4291 | 91.2k | 50352607U, // SWRE_MM |
4292 | 91.2k | 50355261U, // SWR_MM |
4293 | 91.2k | 50358235U, // SWSP16_NM |
4294 | 91.2k | 50355004U, // SWSP_MM |
4295 | 91.2k | 50358235U, // SWSP_MMR6 |
4296 | 91.2k | 3254796479U, // SWXC1 |
4297 | 91.2k | 3254796479U, // SWXC1_MM |
4298 | 91.2k | 50356066U, // SWXS_NM |
4299 | 91.2k | 50358325U, // SWX_NM |
4300 | 91.2k | 50358235U, // SW_MM |
4301 | 91.2k | 50358235U, // SW_MMR6 |
4302 | 91.2k | 50358235U, // SW_NM |
4303 | 91.2k | 50358235U, // SWs9_NM |
4304 | 91.2k | 714997U, // SYNC |
4305 | 91.2k | 317530U, // SYNCI |
4306 | 91.2k | 317530U, // SYNCI_MM |
4307 | 91.2k | 317530U, // SYNCI_MMR6 |
4308 | 91.2k | 317530U, // SYNCI_NM |
4309 | 91.2k | 317530U, // SYNCIs9_NM |
4310 | 91.2k | 714997U, // SYNC_MM |
4311 | 91.2k | 706779U, // SYNC_MMR6 |
4312 | 91.2k | 706779U, // SYNC_NM |
4313 | 91.2k | 285128U, // SYSCALL |
4314 | 91.2k | 547272U, // SYSCALL16_NM |
4315 | 91.2k | 661960U, // SYSCALL_MM |
4316 | 91.2k | 547272U, // SYSCALL_NM |
4317 | 91.2k | 0U, // Save16 |
4318 | 91.2k | 0U, // SaveX16 |
4319 | 91.2k | 50350149U, // SbRxRyOffMemX16 |
4320 | 91.2k | 551048U, // SebRx16 |
4321 | 91.2k | 551054U, // SehRx16 |
4322 | 91.2k | 50354251U, // ShRxRyOffMemX16 |
4323 | 91.2k | 536893924U, // SllX16 |
4324 | 91.2k | 33579251U, // SllvRxRy16 |
4325 | 91.2k | 24451U, // SltRxRy16 |
4326 | 91.2k | 1610635459U, // SltiRxImm16 |
4327 | 91.2k | 22723U, // SltiRxImmX16 |
4328 | 91.2k | 1610637343U, // SltiuRxImm16 |
4329 | 91.2k | 24607U, // SltiuRxImmX16 |
4330 | 91.2k | 24693U, // SltuRxRy16 |
4331 | 91.2k | 536888168U, // SraX16 |
4332 | 91.2k | 33579230U, // SravRxRy16 |
4333 | 91.2k | 536893952U, // SrlX16 |
4334 | 91.2k | 33579258U, // SrlvRxRy16 |
4335 | 91.2k | 536895420U, // SubuRxRyRz16 |
4336 | 91.2k | 50358235U, // SwRxRyOffMemX16 |
4337 | 91.2k | 50358235U, // SwRxSpImmX16 |
4338 | 91.2k | 536894310U, // TEQ |
4339 | 91.2k | 22705U, // TEQI |
4340 | 91.2k | 22705U, // TEQI_MM |
4341 | 91.2k | 536894310U, // TEQ_MM |
4342 | 91.2k | 536894310U, // TEQ_NM |
4343 | 91.2k | 536891772U, // TGE |
4344 | 91.2k | 22638U, // TGEI |
4345 | 91.2k | 24600U, // TGEIU |
4346 | 91.2k | 24600U, // TGEIU_MM |
4347 | 91.2k | 22638U, // TGEI_MM |
4348 | 91.2k | 536895473U, // TGEU |
4349 | 91.2k | 536895473U, // TGEU_MM |
4350 | 91.2k | 536891772U, // TGE_MM |
4351 | 91.2k | 11052U, // TLBGINV |
4352 | 91.2k | 10953U, // TLBGINVF |
4353 | 91.2k | 10953U, // TLBGINVF_MM |
4354 | 91.2k | 11052U, // TLBGINV_MM |
4355 | 91.2k | 10998U, // TLBGP |
4356 | 91.2k | 10998U, // TLBGP_MM |
4357 | 91.2k | 11015U, // TLBGR |
4358 | 91.2k | 11015U, // TLBGR_MM |
4359 | 91.2k | 10968U, // TLBGWI |
4360 | 91.2k | 10968U, // TLBGWI_MM |
4361 | 91.2k | 11027U, // TLBGWR |
4362 | 91.2k | 11027U, // TLBGWR_MM |
4363 | 91.2k | 11045U, // TLBINV |
4364 | 91.2k | 10945U, // TLBINVF |
4365 | 91.2k | 10945U, // TLBINVF_MMR6 |
4366 | 91.2k | 10945U, // TLBINVF_NM |
4367 | 91.2k | 11045U, // TLBINV_MMR6 |
4368 | 91.2k | 11045U, // TLBINV_NM |
4369 | 91.2k | 10993U, // TLBP |
4370 | 91.2k | 10993U, // TLBP_MM |
4371 | 91.2k | 10993U, // TLBP_NM |
4372 | 91.2k | 11010U, // TLBR |
4373 | 91.2k | 11010U, // TLBR_MM |
4374 | 91.2k | 11010U, // TLBR_NM |
4375 | 91.2k | 10962U, // TLBWI |
4376 | 91.2k | 10962U, // TLBWI_MM |
4377 | 91.2k | 10962U, // TLBWI_NM |
4378 | 91.2k | 11021U, // TLBWR |
4379 | 91.2k | 11021U, // TLBWR_MM |
4380 | 91.2k | 11021U, // TLBWR_NM |
4381 | 91.2k | 536895368U, // TLT |
4382 | 91.2k | 22729U, // TLTI |
4383 | 91.2k | 24614U, // TLTIU_MM |
4384 | 91.2k | 22729U, // TLTI_MM |
4385 | 91.2k | 536895611U, // TLTU |
4386 | 91.2k | 536895611U, // TLTU_MM |
4387 | 91.2k | 536895368U, // TLT_MM |
4388 | 91.2k | 536891839U, // TNE |
4389 | 91.2k | 22650U, // TNEI |
4390 | 91.2k | 22650U, // TNEI_MM |
4391 | 91.2k | 536891839U, // TNE_MM |
4392 | 91.2k | 536891839U, // TNE_NM |
4393 | 91.2k | 19454U, // TRUNC_L_D64 |
4394 | 91.2k | 19454U, // TRUNC_L_D_MMR6 |
4395 | 91.2k | 23825U, // TRUNC_L_S |
4396 | 91.2k | 23825U, // TRUNC_L_S_MMR6 |
4397 | 91.2k | 20629U, // TRUNC_W_D32 |
4398 | 91.2k | 20629U, // TRUNC_W_D64 |
4399 | 91.2k | 20629U, // TRUNC_W_D_MMR6 |
4400 | 91.2k | 20629U, // TRUNC_W_MM |
4401 | 91.2k | 24167U, // TRUNC_W_S |
4402 | 91.2k | 24167U, // TRUNC_W_S_MM |
4403 | 91.2k | 24167U, // TRUNC_W_S_MMR6 |
4404 | 91.2k | 24614U, // TTLTIU |
4405 | 91.2k | 50353690U, // UALH_NM |
4406 | 91.2k | 587225716U, // UALWM_NM |
4407 | 91.2k | 50358211U, // UALW_NM |
4408 | 91.2k | 50354249U, // UASH_NM |
4409 | 91.2k | 587225723U, // UASWM_NM |
4410 | 91.2k | 50358233U, // UASW_NM |
4411 | 91.2k | 26773U, // UDIV |
4412 | 91.2k | 26773U, // UDIV_MM |
4413 | 91.2k | 536895533U, // V3MULU |
4414 | 91.2k | 536887363U, // VMM0 |
4415 | 91.2k | 536895548U, // VMULU |
4416 | 91.2k | 570442729U, // VSHF_B |
4417 | 91.2k | 570444633U, // VSHF_D |
4418 | 91.2k | 570446468U, // VSHF_H |
4419 | 91.2k | 570450460U, // VSHF_W |
4420 | 91.2k | 11040U, // WAIT |
4421 | 91.2k | 663416U, // WAIT_MM |
4422 | 91.2k | 663416U, // WAIT_MMR6 |
4423 | 91.2k | 663416U, // WAIT_NM |
4424 | 91.2k | 234904350U, // WRDSP |
4425 | 91.2k | 218127134U, // WRDSP_MM |
4426 | 91.2k | 23574U, // WRPGPR_MMR6 |
4427 | 91.2k | 23574U, // WRPGPR_NM |
4428 | 91.2k | 22022U, // WSBH |
4429 | 91.2k | 22022U, // WSBH_MM |
4430 | 91.2k | 22022U, // WSBH_MMR6 |
4431 | 91.2k | 536894473U, // XOR |
4432 | 91.2k | 20021814U, // XOR16_MM |
4433 | 91.2k | 20021814U, // XOR16_MMR6 |
4434 | 91.2k | 536894473U, // XOR16_NM |
4435 | 91.2k | 536894473U, // XOR64 |
4436 | 91.2k | 536888424U, // XORI_B |
4437 | 91.2k | 536893623U, // XORI_MMR6 |
4438 | 91.2k | 536893623U, // XORI_NM |
4439 | 91.2k | 536894473U, // XOR_MM |
4440 | 91.2k | 536894473U, // XOR_MMR6 |
4441 | 91.2k | 536894473U, // XOR_NM |
4442 | 91.2k | 536895674U, // XOR_V |
4443 | 91.2k | 536893623U, // XORi |
4444 | 91.2k | 536893623U, // XORi64 |
4445 | 91.2k | 536893623U, // XORi_MM |
4446 | 91.2k | 33577993U, // XorRxRxRy16 |
4447 | 91.2k | 20776U, // YIELD |
4448 | 91.2k | 20776U, // YIELD_NM |
4449 | 91.2k | }; |
4450 | | |
4451 | 91.2k | static const uint16_t OpInfo1[] = { |
4452 | 91.2k | 0U, // PHI |
4453 | 91.2k | 0U, // INLINEASM |
4454 | 91.2k | 0U, // INLINEASM_BR |
4455 | 91.2k | 0U, // CFI_INSTRUCTION |
4456 | 91.2k | 0U, // EH_LABEL |
4457 | 91.2k | 0U, // GC_LABEL |
4458 | 91.2k | 0U, // ANNOTATION_LABEL |
4459 | 91.2k | 0U, // KILL |
4460 | 91.2k | 0U, // EXTRACT_SUBREG |
4461 | 91.2k | 0U, // INSERT_SUBREG |
4462 | 91.2k | 0U, // IMPLICIT_DEF |
4463 | 91.2k | 0U, // SUBREG_TO_REG |
4464 | 91.2k | 0U, // COPY_TO_REGCLASS |
4465 | 91.2k | 0U, // DBG_VALUE |
4466 | 91.2k | 0U, // DBG_VALUE_LIST |
4467 | 91.2k | 0U, // DBG_INSTR_REF |
4468 | 91.2k | 0U, // DBG_PHI |
4469 | 91.2k | 0U, // DBG_LABEL |
4470 | 91.2k | 0U, // REG_SEQUENCE |
4471 | 91.2k | 0U, // COPY |
4472 | 91.2k | 0U, // BUNDLE |
4473 | 91.2k | 0U, // LIFETIME_START |
4474 | 91.2k | 0U, // LIFETIME_END |
4475 | 91.2k | 0U, // PSEUDO_PROBE |
4476 | 91.2k | 0U, // ARITH_FENCE |
4477 | 91.2k | 0U, // STACKMAP |
4478 | 91.2k | 0U, // FENTRY_CALL |
4479 | 91.2k | 0U, // PATCHPOINT |
4480 | 91.2k | 0U, // LOAD_STACK_GUARD |
4481 | 91.2k | 0U, // PREALLOCATED_SETUP |
4482 | 91.2k | 0U, // PREALLOCATED_ARG |
4483 | 91.2k | 0U, // STATEPOINT |
4484 | 91.2k | 0U, // LOCAL_ESCAPE |
4485 | 91.2k | 0U, // FAULTING_OP |
4486 | 91.2k | 0U, // PATCHABLE_OP |
4487 | 91.2k | 0U, // PATCHABLE_FUNCTION_ENTER |
4488 | 91.2k | 0U, // PATCHABLE_RET |
4489 | 91.2k | 0U, // PATCHABLE_FUNCTION_EXIT |
4490 | 91.2k | 0U, // PATCHABLE_TAIL_CALL |
4491 | 91.2k | 0U, // PATCHABLE_EVENT_CALL |
4492 | 91.2k | 0U, // PATCHABLE_TYPED_EVENT_CALL |
4493 | 91.2k | 0U, // ICALL_BRANCH_FUNNEL |
4494 | 91.2k | 0U, // MEMBARRIER |
4495 | 91.2k | 0U, // JUMP_TABLE_DEBUG_INFO |
4496 | 91.2k | 0U, // G_ASSERT_SEXT |
4497 | 91.2k | 0U, // G_ASSERT_ZEXT |
4498 | 91.2k | 0U, // G_ASSERT_ALIGN |
4499 | 91.2k | 0U, // G_ADD |
4500 | 91.2k | 0U, // G_SUB |
4501 | 91.2k | 0U, // G_MUL |
4502 | 91.2k | 0U, // G_SDIV |
4503 | 91.2k | 0U, // G_UDIV |
4504 | 91.2k | 0U, // G_SREM |
4505 | 91.2k | 0U, // G_UREM |
4506 | 91.2k | 0U, // G_SDIVREM |
4507 | 91.2k | 0U, // G_UDIVREM |
4508 | 91.2k | 0U, // G_AND |
4509 | 91.2k | 0U, // G_OR |
4510 | 91.2k | 0U, // G_XOR |
4511 | 91.2k | 0U, // G_IMPLICIT_DEF |
4512 | 91.2k | 0U, // G_PHI |
4513 | 91.2k | 0U, // G_FRAME_INDEX |
4514 | 91.2k | 0U, // G_GLOBAL_VALUE |
4515 | 91.2k | 0U, // G_CONSTANT_POOL |
4516 | 91.2k | 0U, // G_EXTRACT |
4517 | 91.2k | 0U, // G_UNMERGE_VALUES |
4518 | 91.2k | 0U, // G_INSERT |
4519 | 91.2k | 0U, // G_MERGE_VALUES |
4520 | 91.2k | 0U, // G_BUILD_VECTOR |
4521 | 91.2k | 0U, // G_BUILD_VECTOR_TRUNC |
4522 | 91.2k | 0U, // G_CONCAT_VECTORS |
4523 | 91.2k | 0U, // G_PTRTOINT |
4524 | 91.2k | 0U, // G_INTTOPTR |
4525 | 91.2k | 0U, // G_BITCAST |
4526 | 91.2k | 0U, // G_FREEZE |
4527 | 91.2k | 0U, // G_CONSTANT_FOLD_BARRIER |
4528 | 91.2k | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
4529 | 91.2k | 0U, // G_INTRINSIC_TRUNC |
4530 | 91.2k | 0U, // G_INTRINSIC_ROUND |
4531 | 91.2k | 0U, // G_INTRINSIC_LRINT |
4532 | 91.2k | 0U, // G_INTRINSIC_ROUNDEVEN |
4533 | 91.2k | 0U, // G_READCYCLECOUNTER |
4534 | 91.2k | 0U, // G_LOAD |
4535 | 91.2k | 0U, // G_SEXTLOAD |
4536 | 91.2k | 0U, // G_ZEXTLOAD |
4537 | 91.2k | 0U, // G_INDEXED_LOAD |
4538 | 91.2k | 0U, // G_INDEXED_SEXTLOAD |
4539 | 91.2k | 0U, // G_INDEXED_ZEXTLOAD |
4540 | 91.2k | 0U, // G_STORE |
4541 | 91.2k | 0U, // G_INDEXED_STORE |
4542 | 91.2k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
4543 | 91.2k | 0U, // G_ATOMIC_CMPXCHG |
4544 | 91.2k | 0U, // G_ATOMICRMW_XCHG |
4545 | 91.2k | 0U, // G_ATOMICRMW_ADD |
4546 | 91.2k | 0U, // G_ATOMICRMW_SUB |
4547 | 91.2k | 0U, // G_ATOMICRMW_AND |
4548 | 91.2k | 0U, // G_ATOMICRMW_NAND |
4549 | 91.2k | 0U, // G_ATOMICRMW_OR |
4550 | 91.2k | 0U, // G_ATOMICRMW_XOR |
4551 | 91.2k | 0U, // G_ATOMICRMW_MAX |
4552 | 91.2k | 0U, // G_ATOMICRMW_MIN |
4553 | 91.2k | 0U, // G_ATOMICRMW_UMAX |
4554 | 91.2k | 0U, // G_ATOMICRMW_UMIN |
4555 | 91.2k | 0U, // G_ATOMICRMW_FADD |
4556 | 91.2k | 0U, // G_ATOMICRMW_FSUB |
4557 | 91.2k | 0U, // G_ATOMICRMW_FMAX |
4558 | 91.2k | 0U, // G_ATOMICRMW_FMIN |
4559 | 91.2k | 0U, // G_ATOMICRMW_UINC_WRAP |
4560 | 91.2k | 0U, // G_ATOMICRMW_UDEC_WRAP |
4561 | 91.2k | 0U, // G_FENCE |
4562 | 91.2k | 0U, // G_PREFETCH |
4563 | 91.2k | 0U, // G_BRCOND |
4564 | 91.2k | 0U, // G_BRINDIRECT |
4565 | 91.2k | 0U, // G_INVOKE_REGION_START |
4566 | 91.2k | 0U, // G_INTRINSIC |
4567 | 91.2k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
4568 | 91.2k | 0U, // G_INTRINSIC_CONVERGENT |
4569 | 91.2k | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
4570 | 91.2k | 0U, // G_ANYEXT |
4571 | 91.2k | 0U, // G_TRUNC |
4572 | 91.2k | 0U, // G_CONSTANT |
4573 | 91.2k | 0U, // G_FCONSTANT |
4574 | 91.2k | 0U, // G_VASTART |
4575 | 91.2k | 0U, // G_VAARG |
4576 | 91.2k | 0U, // G_SEXT |
4577 | 91.2k | 0U, // G_SEXT_INREG |
4578 | 91.2k | 0U, // G_ZEXT |
4579 | 91.2k | 0U, // G_SHL |
4580 | 91.2k | 0U, // G_LSHR |
4581 | 91.2k | 0U, // G_ASHR |
4582 | 91.2k | 0U, // G_FSHL |
4583 | 91.2k | 0U, // G_FSHR |
4584 | 91.2k | 0U, // G_ROTR |
4585 | 91.2k | 0U, // G_ROTL |
4586 | 91.2k | 0U, // G_ICMP |
4587 | 91.2k | 0U, // G_FCMP |
4588 | 91.2k | 0U, // G_SELECT |
4589 | 91.2k | 0U, // G_UADDO |
4590 | 91.2k | 0U, // G_UADDE |
4591 | 91.2k | 0U, // G_USUBO |
4592 | 91.2k | 0U, // G_USUBE |
4593 | 91.2k | 0U, // G_SADDO |
4594 | 91.2k | 0U, // G_SADDE |
4595 | 91.2k | 0U, // G_SSUBO |
4596 | 91.2k | 0U, // G_SSUBE |
4597 | 91.2k | 0U, // G_UMULO |
4598 | 91.2k | 0U, // G_SMULO |
4599 | 91.2k | 0U, // G_UMULH |
4600 | 91.2k | 0U, // G_SMULH |
4601 | 91.2k | 0U, // G_UADDSAT |
4602 | 91.2k | 0U, // G_SADDSAT |
4603 | 91.2k | 0U, // G_USUBSAT |
4604 | 91.2k | 0U, // G_SSUBSAT |
4605 | 91.2k | 0U, // G_USHLSAT |
4606 | 91.2k | 0U, // G_SSHLSAT |
4607 | 91.2k | 0U, // G_SMULFIX |
4608 | 91.2k | 0U, // G_UMULFIX |
4609 | 91.2k | 0U, // G_SMULFIXSAT |
4610 | 91.2k | 0U, // G_UMULFIXSAT |
4611 | 91.2k | 0U, // G_SDIVFIX |
4612 | 91.2k | 0U, // G_UDIVFIX |
4613 | 91.2k | 0U, // G_SDIVFIXSAT |
4614 | 91.2k | 0U, // G_UDIVFIXSAT |
4615 | 91.2k | 0U, // G_FADD |
4616 | 91.2k | 0U, // G_FSUB |
4617 | 91.2k | 0U, // G_FMUL |
4618 | 91.2k | 0U, // G_FMA |
4619 | 91.2k | 0U, // G_FMAD |
4620 | 91.2k | 0U, // G_FDIV |
4621 | 91.2k | 0U, // G_FREM |
4622 | 91.2k | 0U, // G_FPOW |
4623 | 91.2k | 0U, // G_FPOWI |
4624 | 91.2k | 0U, // G_FEXP |
4625 | 91.2k | 0U, // G_FEXP2 |
4626 | 91.2k | 0U, // G_FEXP10 |
4627 | 91.2k | 0U, // G_FLOG |
4628 | 91.2k | 0U, // G_FLOG2 |
4629 | 91.2k | 0U, // G_FLOG10 |
4630 | 91.2k | 0U, // G_FLDEXP |
4631 | 91.2k | 0U, // G_FFREXP |
4632 | 91.2k | 0U, // G_FNEG |
4633 | 91.2k | 0U, // G_FPEXT |
4634 | 91.2k | 0U, // G_FPTRUNC |
4635 | 91.2k | 0U, // G_FPTOSI |
4636 | 91.2k | 0U, // G_FPTOUI |
4637 | 91.2k | 0U, // G_SITOFP |
4638 | 91.2k | 0U, // G_UITOFP |
4639 | 91.2k | 0U, // G_FABS |
4640 | 91.2k | 0U, // G_FCOPYSIGN |
4641 | 91.2k | 0U, // G_IS_FPCLASS |
4642 | 91.2k | 0U, // G_FCANONICALIZE |
4643 | 91.2k | 0U, // G_FMINNUM |
4644 | 91.2k | 0U, // G_FMAXNUM |
4645 | 91.2k | 0U, // G_FMINNUM_IEEE |
4646 | 91.2k | 0U, // G_FMAXNUM_IEEE |
4647 | 91.2k | 0U, // G_FMINIMUM |
4648 | 91.2k | 0U, // G_FMAXIMUM |
4649 | 91.2k | 0U, // G_GET_FPENV |
4650 | 91.2k | 0U, // G_SET_FPENV |
4651 | 91.2k | 0U, // G_RESET_FPENV |
4652 | 91.2k | 0U, // G_GET_FPMODE |
4653 | 91.2k | 0U, // G_SET_FPMODE |
4654 | 91.2k | 0U, // G_RESET_FPMODE |
4655 | 91.2k | 0U, // G_PTR_ADD |
4656 | 91.2k | 0U, // G_PTRMASK |
4657 | 91.2k | 0U, // G_SMIN |
4658 | 91.2k | 0U, // G_SMAX |
4659 | 91.2k | 0U, // G_UMIN |
4660 | 91.2k | 0U, // G_UMAX |
4661 | 91.2k | 0U, // G_ABS |
4662 | 91.2k | 0U, // G_LROUND |
4663 | 91.2k | 0U, // G_LLROUND |
4664 | 91.2k | 0U, // G_BR |
4665 | 91.2k | 0U, // G_BRJT |
4666 | 91.2k | 0U, // G_INSERT_VECTOR_ELT |
4667 | 91.2k | 0U, // G_EXTRACT_VECTOR_ELT |
4668 | 91.2k | 0U, // G_SHUFFLE_VECTOR |
4669 | 91.2k | 0U, // G_CTTZ |
4670 | 91.2k | 0U, // G_CTTZ_ZERO_UNDEF |
4671 | 91.2k | 0U, // G_CTLZ |
4672 | 91.2k | 0U, // G_CTLZ_ZERO_UNDEF |
4673 | 91.2k | 0U, // G_CTPOP |
4674 | 91.2k | 0U, // G_BSWAP |
4675 | 91.2k | 0U, // G_BITREVERSE |
4676 | 91.2k | 0U, // G_FCEIL |
4677 | 91.2k | 0U, // G_FCOS |
4678 | 91.2k | 0U, // G_FSIN |
4679 | 91.2k | 0U, // G_FSQRT |
4680 | 91.2k | 0U, // G_FFLOOR |
4681 | 91.2k | 0U, // G_FRINT |
4682 | 91.2k | 0U, // G_FNEARBYINT |
4683 | 91.2k | 0U, // G_ADDRSPACE_CAST |
4684 | 91.2k | 0U, // G_BLOCK_ADDR |
4685 | 91.2k | 0U, // G_JUMP_TABLE |
4686 | 91.2k | 0U, // G_DYN_STACKALLOC |
4687 | 91.2k | 0U, // G_STACKSAVE |
4688 | 91.2k | 0U, // G_STACKRESTORE |
4689 | 91.2k | 0U, // G_STRICT_FADD |
4690 | 91.2k | 0U, // G_STRICT_FSUB |
4691 | 91.2k | 0U, // G_STRICT_FMUL |
4692 | 91.2k | 0U, // G_STRICT_FDIV |
4693 | 91.2k | 0U, // G_STRICT_FREM |
4694 | 91.2k | 0U, // G_STRICT_FMA |
4695 | 91.2k | 0U, // G_STRICT_FSQRT |
4696 | 91.2k | 0U, // G_STRICT_FLDEXP |
4697 | 91.2k | 0U, // G_READ_REGISTER |
4698 | 91.2k | 0U, // G_WRITE_REGISTER |
4699 | 91.2k | 0U, // G_MEMCPY |
4700 | 91.2k | 0U, // G_MEMCPY_INLINE |
4701 | 91.2k | 0U, // G_MEMMOVE |
4702 | 91.2k | 0U, // G_MEMSET |
4703 | 91.2k | 0U, // G_BZERO |
4704 | 91.2k | 0U, // G_VECREDUCE_SEQ_FADD |
4705 | 91.2k | 0U, // G_VECREDUCE_SEQ_FMUL |
4706 | 91.2k | 0U, // G_VECREDUCE_FADD |
4707 | 91.2k | 0U, // G_VECREDUCE_FMUL |
4708 | 91.2k | 0U, // G_VECREDUCE_FMAX |
4709 | 91.2k | 0U, // G_VECREDUCE_FMIN |
4710 | 91.2k | 0U, // G_VECREDUCE_FMAXIMUM |
4711 | 91.2k | 0U, // G_VECREDUCE_FMINIMUM |
4712 | 91.2k | 0U, // G_VECREDUCE_ADD |
4713 | 91.2k | 0U, // G_VECREDUCE_MUL |
4714 | 91.2k | 0U, // G_VECREDUCE_AND |
4715 | 91.2k | 0U, // G_VECREDUCE_OR |
4716 | 91.2k | 0U, // G_VECREDUCE_XOR |
4717 | 91.2k | 0U, // G_VECREDUCE_SMAX |
4718 | 91.2k | 0U, // G_VECREDUCE_SMIN |
4719 | 91.2k | 0U, // G_VECREDUCE_UMAX |
4720 | 91.2k | 0U, // G_VECREDUCE_UMIN |
4721 | 91.2k | 0U, // G_SBFX |
4722 | 91.2k | 0U, // G_UBFX |
4723 | 91.2k | 0U, // ABSMacro |
4724 | 91.2k | 0U, // ADJCALLSTACKDOWN |
4725 | 91.2k | 0U, // ADJCALLSTACKDOWN_NM |
4726 | 91.2k | 0U, // ADJCALLSTACKUP |
4727 | 91.2k | 0U, // ADJCALLSTACKUP_NM |
4728 | 91.2k | 0U, // ALIGN_NM |
4729 | 91.2k | 0U, // AND_V_D_PSEUDO |
4730 | 91.2k | 0U, // AND_V_H_PSEUDO |
4731 | 91.2k | 0U, // AND_V_W_PSEUDO |
4732 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I16 |
4733 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I16_POSTRA |
4734 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I32 |
4735 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I32_POSTRA |
4736 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I64 |
4737 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I64_POSTRA |
4738 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I8 |
4739 | 91.2k | 0U, // ATOMIC_CMP_SWAP_I8_POSTRA |
4740 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I16 |
4741 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I16_POSTRA |
4742 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I32 |
4743 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I32_POSTRA |
4744 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I64 |
4745 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I64_POSTRA |
4746 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I8 |
4747 | 91.2k | 0U, // ATOMIC_LOAD_ADD_I8_POSTRA |
4748 | 91.2k | 0U, // ATOMIC_LOAD_AND_I16 |
4749 | 91.2k | 0U, // ATOMIC_LOAD_AND_I16_POSTRA |
4750 | 91.2k | 0U, // ATOMIC_LOAD_AND_I32 |
4751 | 91.2k | 0U, // ATOMIC_LOAD_AND_I32_POSTRA |
4752 | 91.2k | 0U, // ATOMIC_LOAD_AND_I64 |
4753 | 91.2k | 0U, // ATOMIC_LOAD_AND_I64_POSTRA |
4754 | 91.2k | 0U, // ATOMIC_LOAD_AND_I8 |
4755 | 91.2k | 0U, // ATOMIC_LOAD_AND_I8_POSTRA |
4756 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I16 |
4757 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I16_POSTRA |
4758 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I32 |
4759 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I32_POSTRA |
4760 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I64 |
4761 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I64_POSTRA |
4762 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I8 |
4763 | 91.2k | 0U, // ATOMIC_LOAD_MAX_I8_POSTRA |
4764 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I16 |
4765 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I16_POSTRA |
4766 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I32 |
4767 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I32_POSTRA |
4768 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I64 |
4769 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I64_POSTRA |
4770 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I8 |
4771 | 91.2k | 0U, // ATOMIC_LOAD_MIN_I8_POSTRA |
4772 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I16 |
4773 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I16_POSTRA |
4774 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I32 |
4775 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I32_POSTRA |
4776 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I64 |
4777 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I64_POSTRA |
4778 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I8 |
4779 | 91.2k | 0U, // ATOMIC_LOAD_NAND_I8_POSTRA |
4780 | 91.2k | 0U, // ATOMIC_LOAD_OR_I16 |
4781 | 91.2k | 0U, // ATOMIC_LOAD_OR_I16_POSTRA |
4782 | 91.2k | 0U, // ATOMIC_LOAD_OR_I32 |
4783 | 91.2k | 0U, // ATOMIC_LOAD_OR_I32_POSTRA |
4784 | 91.2k | 0U, // ATOMIC_LOAD_OR_I64 |
4785 | 91.2k | 0U, // ATOMIC_LOAD_OR_I64_POSTRA |
4786 | 91.2k | 0U, // ATOMIC_LOAD_OR_I8 |
4787 | 91.2k | 0U, // ATOMIC_LOAD_OR_I8_POSTRA |
4788 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I16 |
4789 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I16_POSTRA |
4790 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I32 |
4791 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I32_POSTRA |
4792 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I64 |
4793 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I64_POSTRA |
4794 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I8 |
4795 | 91.2k | 0U, // ATOMIC_LOAD_SUB_I8_POSTRA |
4796 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I16 |
4797 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I16_POSTRA |
4798 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I32 |
4799 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I32_POSTRA |
4800 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I64 |
4801 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I64_POSTRA |
4802 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I8 |
4803 | 91.2k | 0U, // ATOMIC_LOAD_UMAX_I8_POSTRA |
4804 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I16 |
4805 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I16_POSTRA |
4806 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I32 |
4807 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I32_POSTRA |
4808 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I64 |
4809 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I64_POSTRA |
4810 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I8 |
4811 | 91.2k | 0U, // ATOMIC_LOAD_UMIN_I8_POSTRA |
4812 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I16 |
4813 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I16_POSTRA |
4814 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I32 |
4815 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I32_POSTRA |
4816 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I64 |
4817 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I64_POSTRA |
4818 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I8 |
4819 | 91.2k | 0U, // ATOMIC_LOAD_XOR_I8_POSTRA |
4820 | 91.2k | 0U, // ATOMIC_SWAP_I16 |
4821 | 91.2k | 0U, // ATOMIC_SWAP_I16_POSTRA |
4822 | 91.2k | 0U, // ATOMIC_SWAP_I32 |
4823 | 91.2k | 0U, // ATOMIC_SWAP_I32_POSTRA |
4824 | 91.2k | 0U, // ATOMIC_SWAP_I64 |
4825 | 91.2k | 0U, // ATOMIC_SWAP_I64_POSTRA |
4826 | 91.2k | 0U, // ATOMIC_SWAP_I8 |
4827 | 91.2k | 0U, // ATOMIC_SWAP_I8_POSTRA |
4828 | 91.2k | 0U, // B |
4829 | 91.2k | 0U, // BAL_BR |
4830 | 91.2k | 0U, // BAL_BR_MM |
4831 | 91.2k | 4U, // BEQLImmMacro |
4832 | 91.2k | 4U, // BGE |
4833 | 91.2k | 4U, // BGEImmMacro |
4834 | 91.2k | 4U, // BGEL |
4835 | 91.2k | 4U, // BGELImmMacro |
4836 | 91.2k | 4U, // BGEU |
4837 | 91.2k | 4U, // BGEUImmMacro |
4838 | 91.2k | 4U, // BGEUL |
4839 | 91.2k | 4U, // BGEULImmMacro |
4840 | 91.2k | 4U, // BGT |
4841 | 91.2k | 4U, // BGTImmMacro |
4842 | 91.2k | 4U, // BGTL |
4843 | 91.2k | 4U, // BGTLImmMacro |
4844 | 91.2k | 4U, // BGTU |
4845 | 91.2k | 4U, // BGTUImmMacro |
4846 | 91.2k | 4U, // BGTUL |
4847 | 91.2k | 4U, // BGTULImmMacro |
4848 | 91.2k | 4U, // BLE |
4849 | 91.2k | 4U, // BLEImmMacro |
4850 | 91.2k | 4U, // BLEL |
4851 | 91.2k | 4U, // BLELImmMacro |
4852 | 91.2k | 4U, // BLEU |
4853 | 91.2k | 4U, // BLEUImmMacro |
4854 | 91.2k | 4U, // BLEUL |
4855 | 91.2k | 4U, // BLEULImmMacro |
4856 | 91.2k | 4U, // BLT |
4857 | 91.2k | 4U, // BLTImmMacro |
4858 | 91.2k | 4U, // BLTL |
4859 | 91.2k | 4U, // BLTLImmMacro |
4860 | 91.2k | 4U, // BLTU |
4861 | 91.2k | 4U, // BLTUImmMacro |
4862 | 91.2k | 4U, // BLTUL |
4863 | 91.2k | 4U, // BLTULImmMacro |
4864 | 91.2k | 4U, // BNELImmMacro |
4865 | 91.2k | 0U, // BPOSGE32_PSEUDO |
4866 | 91.2k | 0U, // BSEL_D_PSEUDO |
4867 | 91.2k | 0U, // BSEL_FD_PSEUDO |
4868 | 91.2k | 0U, // BSEL_FW_PSEUDO |
4869 | 91.2k | 0U, // BSEL_H_PSEUDO |
4870 | 91.2k | 0U, // BSEL_W_PSEUDO |
4871 | 91.2k | 0U, // B_MM |
4872 | 91.2k | 0U, // B_MMR6_Pseudo |
4873 | 91.2k | 0U, // B_MM_Pseudo |
4874 | 91.2k | 4U, // BeqImm |
4875 | 91.2k | 4U, // BneImm |
4876 | 91.2k | 0U, // BteqzT8CmpX16 |
4877 | 91.2k | 0U, // BteqzT8CmpiX16 |
4878 | 91.2k | 0U, // BteqzT8SltX16 |
4879 | 91.2k | 0U, // BteqzT8SltiX16 |
4880 | 91.2k | 0U, // BteqzT8SltiuX16 |
4881 | 91.2k | 0U, // BteqzT8SltuX16 |
4882 | 91.2k | 0U, // BtnezT8CmpX16 |
4883 | 91.2k | 0U, // BtnezT8CmpiX16 |
4884 | 91.2k | 0U, // BtnezT8SltX16 |
4885 | 91.2k | 0U, // BtnezT8SltiX16 |
4886 | 91.2k | 0U, // BtnezT8SltiuX16 |
4887 | 91.2k | 0U, // BtnezT8SltuX16 |
4888 | 91.2k | 0U, // BuildPairF64 |
4889 | 91.2k | 0U, // BuildPairF64_64 |
4890 | 91.2k | 0U, // CFTC1 |
4891 | 91.2k | 0U, // CONSTPOOL_ENTRY |
4892 | 91.2k | 0U, // COPY_FD_PSEUDO |
4893 | 91.2k | 0U, // COPY_FW_PSEUDO |
4894 | 91.2k | 0U, // CTTC1 |
4895 | 91.2k | 0U, // Constant32 |
4896 | 91.2k | 128U, // DMULImmMacro |
4897 | 91.2k | 128U, // DMULMacro |
4898 | 91.2k | 128U, // DMULOMacro |
4899 | 91.2k | 128U, // DMULOUMacro |
4900 | 91.2k | 128U, // DROL |
4901 | 91.2k | 128U, // DROLImm |
4902 | 91.2k | 128U, // DROR |
4903 | 91.2k | 128U, // DRORImm |
4904 | 91.2k | 128U, // DSDivIMacro |
4905 | 91.2k | 128U, // DSDivMacro |
4906 | 91.2k | 128U, // DSRemIMacro |
4907 | 91.2k | 128U, // DSRemMacro |
4908 | 91.2k | 128U, // DUDivIMacro |
4909 | 91.2k | 128U, // DUDivMacro |
4910 | 91.2k | 128U, // DURemIMacro |
4911 | 91.2k | 128U, // DURemMacro |
4912 | 91.2k | 0U, // ERet |
4913 | 91.2k | 0U, // ExtractElementF64 |
4914 | 91.2k | 0U, // ExtractElementF64_64 |
4915 | 91.2k | 0U, // FABS_D |
4916 | 91.2k | 0U, // FABS_W |
4917 | 91.2k | 0U, // FEXP2_D_1_PSEUDO |
4918 | 91.2k | 0U, // FEXP2_W_1_PSEUDO |
4919 | 91.2k | 0U, // FILL_FD_PSEUDO |
4920 | 91.2k | 0U, // FILL_FW_PSEUDO |
4921 | 91.2k | 0U, // GotPrologue16 |
4922 | 91.2k | 0U, // INSERT_B_VIDX64_PSEUDO |
4923 | 91.2k | 0U, // INSERT_B_VIDX_PSEUDO |
4924 | 91.2k | 0U, // INSERT_D_VIDX64_PSEUDO |
4925 | 91.2k | 0U, // INSERT_D_VIDX_PSEUDO |
4926 | 91.2k | 0U, // INSERT_FD_PSEUDO |
4927 | 91.2k | 0U, // INSERT_FD_VIDX64_PSEUDO |
4928 | 91.2k | 0U, // INSERT_FD_VIDX_PSEUDO |
4929 | 91.2k | 0U, // INSERT_FW_PSEUDO |
4930 | 91.2k | 0U, // INSERT_FW_VIDX64_PSEUDO |
4931 | 91.2k | 0U, // INSERT_FW_VIDX_PSEUDO |
4932 | 91.2k | 0U, // INSERT_H_VIDX64_PSEUDO |
4933 | 91.2k | 0U, // INSERT_H_VIDX_PSEUDO |
4934 | 91.2k | 0U, // INSERT_W_VIDX64_PSEUDO |
4935 | 91.2k | 0U, // INSERT_W_VIDX_PSEUDO |
4936 | 91.2k | 0U, // JALR64Pseudo |
4937 | 91.2k | 0U, // JALRCPseudo |
4938 | 91.2k | 0U, // JALRHB64Pseudo |
4939 | 91.2k | 0U, // JALRHBPseudo |
4940 | 91.2k | 0U, // JALRPseudo |
4941 | 91.2k | 0U, // JAL_MMR6 |
4942 | 91.2k | 0U, // JalOneReg |
4943 | 91.2k | 0U, // JalTwoReg |
4944 | 91.2k | 0U, // LDMacro |
4945 | 91.2k | 0U, // LDR_D |
4946 | 91.2k | 0U, // LDR_W |
4947 | 91.2k | 0U, // LD_F16 |
4948 | 91.2k | 0U, // LOAD_ACC128 |
4949 | 91.2k | 0U, // LOAD_ACC64 |
4950 | 91.2k | 0U, // LOAD_ACC64DSP |
4951 | 91.2k | 0U, // LOAD_CCOND_DSP |
4952 | 91.2k | 0U, // LONG_BRANCH_ADDiu |
4953 | 91.2k | 0U, // LONG_BRANCH_ADDiu2Op |
4954 | 91.2k | 0U, // LONG_BRANCH_DADDiu |
4955 | 91.2k | 0U, // LONG_BRANCH_DADDiu2Op |
4956 | 91.2k | 0U, // LONG_BRANCH_LUi |
4957 | 91.2k | 0U, // LONG_BRANCH_LUi2Op |
4958 | 91.2k | 0U, // LONG_BRANCH_LUi2Op_64 |
4959 | 91.2k | 0U, // LWM_MM |
4960 | 91.2k | 0U, // LoadAddrImm32 |
4961 | 91.2k | 0U, // LoadAddrImm64 |
4962 | 91.2k | 0U, // LoadAddrReg32 |
4963 | 91.2k | 0U, // LoadAddrReg64 |
4964 | 91.2k | 0U, // LoadImm32 |
4965 | 91.2k | 0U, // LoadImm64 |
4966 | 91.2k | 0U, // LoadImmDoubleFGR |
4967 | 91.2k | 0U, // LoadImmDoubleFGR_32 |
4968 | 91.2k | 0U, // LoadImmDoubleGPR |
4969 | 91.2k | 0U, // LoadImmSingleFGR |
4970 | 91.2k | 0U, // LoadImmSingleGPR |
4971 | 91.2k | 0U, // LoadJumpTableOffset |
4972 | 91.2k | 0U, // LwConstant32 |
4973 | 91.2k | 0U, // MFTACX |
4974 | 91.2k | 0U, // MFTACX_NM |
4975 | 91.2k | 136U, // MFTC0 |
4976 | 91.2k | 136U, // MFTC0_NM |
4977 | 91.2k | 0U, // MFTC1 |
4978 | 91.2k | 0U, // MFTDSP |
4979 | 91.2k | 0U, // MFTDSP_NM |
4980 | 91.2k | 0U, // MFTGPR |
4981 | 91.2k | 0U, // MFTGPR_NM |
4982 | 91.2k | 0U, // MFTHC1 |
4983 | 91.2k | 0U, // MFTHI |
4984 | 91.2k | 0U, // MFTHI_NM |
4985 | 91.2k | 0U, // MFTLO |
4986 | 91.2k | 0U, // MFTLO_NM |
4987 | 91.2k | 0U, // MIPSeh_return32 |
4988 | 91.2k | 0U, // MIPSeh_return64 |
4989 | 91.2k | 0U, // MSA_FP_EXTEND_D_PSEUDO |
4990 | 91.2k | 0U, // MSA_FP_EXTEND_W_PSEUDO |
4991 | 91.2k | 0U, // MSA_FP_ROUND_D_PSEUDO |
4992 | 91.2k | 0U, // MSA_FP_ROUND_W_PSEUDO |
4993 | 91.2k | 0U, // MTTACX |
4994 | 91.2k | 0U, // MTTACX_NM |
4995 | 91.2k | 0U, // MTTC0 |
4996 | 91.2k | 0U, // MTTC0_NM |
4997 | 91.2k | 0U, // MTTC1 |
4998 | 91.2k | 0U, // MTTDSP |
4999 | 91.2k | 0U, // MTTDSP_NM |
5000 | 91.2k | 0U, // MTTGPR |
5001 | 91.2k | 0U, // MTTGPR_NM |
5002 | 91.2k | 0U, // MTTHC1 |
5003 | 91.2k | 0U, // MTTHI |
5004 | 91.2k | 0U, // MTTHI_NM |
5005 | 91.2k | 0U, // MTTLO |
5006 | 91.2k | 0U, // MTTLO_NM |
5007 | 91.2k | 128U, // MULImmMacro |
5008 | 91.2k | 128U, // MULOMacro |
5009 | 91.2k | 128U, // MULOUMacro |
5010 | 91.2k | 0U, // MUSTTAILCALLREG_NM |
5011 | 91.2k | 0U, // MUSTTAILCALL_NM |
5012 | 91.2k | 0U, // MultRxRy16 |
5013 | 91.2k | 0U, // MultRxRyRz16 |
5014 | 91.2k | 0U, // MultuRxRy16 |
5015 | 91.2k | 0U, // MultuRxRyRz16 |
5016 | 91.2k | 0U, // NOP |
5017 | 91.2k | 128U, // NORImm |
5018 | 91.2k | 128U, // NORImm64 |
5019 | 91.2k | 0U, // NOR_V_D_PSEUDO |
5020 | 91.2k | 0U, // NOR_V_H_PSEUDO |
5021 | 91.2k | 0U, // NOR_V_W_PSEUDO |
5022 | 91.2k | 0U, // OR_V_D_PSEUDO |
5023 | 91.2k | 0U, // OR_V_H_PSEUDO |
5024 | 91.2k | 0U, // OR_V_W_PSEUDO |
5025 | 91.2k | 12U, // PseudoADDIU_NM |
5026 | 91.2k | 16U, // PseudoANDI_NM |
5027 | 91.2k | 0U, // PseudoCMPU_EQ_QB |
5028 | 91.2k | 0U, // PseudoCMPU_LE_QB |
5029 | 91.2k | 0U, // PseudoCMPU_LT_QB |
5030 | 91.2k | 0U, // PseudoCMP_EQ_PH |
5031 | 91.2k | 0U, // PseudoCMP_LE_PH |
5032 | 91.2k | 0U, // PseudoCMP_LT_PH |
5033 | 91.2k | 0U, // PseudoCVT_D32_W |
5034 | 91.2k | 0U, // PseudoCVT_D64_L |
5035 | 91.2k | 0U, // PseudoCVT_D64_W |
5036 | 91.2k | 0U, // PseudoCVT_S_L |
5037 | 91.2k | 0U, // PseudoCVT_S_W |
5038 | 91.2k | 0U, // PseudoDMULT |
5039 | 91.2k | 0U, // PseudoDMULTu |
5040 | 91.2k | 0U, // PseudoDSDIV |
5041 | 91.2k | 0U, // PseudoDUDIV |
5042 | 91.2k | 0U, // PseudoD_SELECT_I |
5043 | 91.2k | 0U, // PseudoD_SELECT_I64 |
5044 | 91.2k | 0U, // PseudoIndirectBranch |
5045 | 91.2k | 0U, // PseudoIndirectBranch64 |
5046 | 91.2k | 0U, // PseudoIndirectBranch64R6 |
5047 | 91.2k | 0U, // PseudoIndirectBranchNM |
5048 | 91.2k | 0U, // PseudoIndirectBranchR6 |
5049 | 91.2k | 0U, // PseudoIndirectBranch_MM |
5050 | 91.2k | 0U, // PseudoIndirectBranch_MMR6 |
5051 | 91.2k | 0U, // PseudoIndirectHazardBranch |
5052 | 91.2k | 0U, // PseudoIndirectHazardBranch64 |
5053 | 91.2k | 0U, // PseudoIndrectHazardBranch64R6 |
5054 | 91.2k | 0U, // PseudoIndrectHazardBranchR6 |
5055 | 91.2k | 0U, // PseudoLA_NM |
5056 | 91.2k | 0U, // PseudoLI_NM |
5057 | 91.2k | 0U, // PseudoMADD |
5058 | 91.2k | 0U, // PseudoMADDU |
5059 | 91.2k | 0U, // PseudoMADDU_MM |
5060 | 91.2k | 0U, // PseudoMADD_MM |
5061 | 91.2k | 0U, // PseudoMFHI |
5062 | 91.2k | 0U, // PseudoMFHI64 |
5063 | 91.2k | 0U, // PseudoMFHI_MM |
5064 | 91.2k | 0U, // PseudoMFLO |
5065 | 91.2k | 0U, // PseudoMFLO64 |
5066 | 91.2k | 0U, // PseudoMFLO_MM |
5067 | 91.2k | 0U, // PseudoMSUB |
5068 | 91.2k | 0U, // PseudoMSUBU |
5069 | 91.2k | 0U, // PseudoMSUBU_MM |
5070 | 91.2k | 0U, // PseudoMSUB_MM |
5071 | 91.2k | 0U, // PseudoMTLOHI |
5072 | 91.2k | 0U, // PseudoMTLOHI64 |
5073 | 91.2k | 0U, // PseudoMTLOHI_DSP |
5074 | 91.2k | 0U, // PseudoMTLOHI_MM |
5075 | 91.2k | 0U, // PseudoMULT |
5076 | 91.2k | 0U, // PseudoMULT_MM |
5077 | 91.2k | 0U, // PseudoMULTu |
5078 | 91.2k | 0U, // PseudoMULTu_MM |
5079 | 91.2k | 0U, // PseudoPICK_PH |
5080 | 91.2k | 0U, // PseudoPICK_QB |
5081 | 91.2k | 0U, // PseudoReturn |
5082 | 91.2k | 0U, // PseudoReturn64 |
5083 | 91.2k | 0U, // PseudoReturnNM |
5084 | 91.2k | 0U, // PseudoSDIV |
5085 | 91.2k | 0U, // PseudoSELECTFP_F_D32 |
5086 | 91.2k | 0U, // PseudoSELECTFP_F_D64 |
5087 | 91.2k | 0U, // PseudoSELECTFP_F_I |
5088 | 91.2k | 0U, // PseudoSELECTFP_F_I64 |
5089 | 91.2k | 0U, // PseudoSELECTFP_F_S |
5090 | 91.2k | 0U, // PseudoSELECTFP_T_D32 |
5091 | 91.2k | 0U, // PseudoSELECTFP_T_D64 |
5092 | 91.2k | 0U, // PseudoSELECTFP_T_I |
5093 | 91.2k | 0U, // PseudoSELECTFP_T_I64 |
5094 | 91.2k | 0U, // PseudoSELECTFP_T_S |
5095 | 91.2k | 0U, // PseudoSELECT_D32 |
5096 | 91.2k | 0U, // PseudoSELECT_D64 |
5097 | 91.2k | 0U, // PseudoSELECT_I |
5098 | 91.2k | 0U, // PseudoSELECT_I64 |
5099 | 91.2k | 0U, // PseudoSELECT_S |
5100 | 91.2k | 128U, // PseudoSUBU_NM |
5101 | 91.2k | 128U, // PseudoTRUNC_W_D |
5102 | 91.2k | 128U, // PseudoTRUNC_W_D32 |
5103 | 91.2k | 128U, // PseudoTRUNC_W_S |
5104 | 91.2k | 0U, // PseudoUDIV |
5105 | 91.2k | 128U, // ROL |
5106 | 91.2k | 128U, // ROLImm |
5107 | 91.2k | 128U, // ROR |
5108 | 91.2k | 128U, // RORImm |
5109 | 91.2k | 0U, // RetRA |
5110 | 91.2k | 0U, // RetRA16 |
5111 | 91.2k | 0U, // SDC1_M1 |
5112 | 91.2k | 0U, // SDIV_MM_Pseudo |
5113 | 91.2k | 0U, // SDMacro |
5114 | 91.2k | 128U, // SDivIMacro |
5115 | 91.2k | 128U, // SDivMacro |
5116 | 91.2k | 128U, // SEQIMacro |
5117 | 91.2k | 128U, // SEQMacro |
5118 | 91.2k | 128U, // SGE |
5119 | 91.2k | 128U, // SGEImm |
5120 | 91.2k | 128U, // SGEImm64 |
5121 | 91.2k | 128U, // SGEU |
5122 | 91.2k | 128U, // SGEUImm |
5123 | 91.2k | 128U, // SGEUImm64 |
5124 | 91.2k | 128U, // SGTImm |
5125 | 91.2k | 128U, // SGTImm64 |
5126 | 91.2k | 128U, // SGTUImm |
5127 | 91.2k | 128U, // SGTUImm64 |
5128 | 91.2k | 128U, // SLE |
5129 | 91.2k | 128U, // SLEImm |
5130 | 91.2k | 128U, // SLEImm64 |
5131 | 91.2k | 128U, // SLEU |
5132 | 91.2k | 128U, // SLEUImm |
5133 | 91.2k | 128U, // SLEUImm64 |
5134 | 91.2k | 128U, // SLTImm64 |
5135 | 91.2k | 128U, // SLTUImm64 |
5136 | 91.2k | 128U, // SNEIMacro |
5137 | 91.2k | 128U, // SNEMacro |
5138 | 91.2k | 0U, // SNZ_B_PSEUDO |
5139 | 91.2k | 0U, // SNZ_D_PSEUDO |
5140 | 91.2k | 0U, // SNZ_H_PSEUDO |
5141 | 91.2k | 0U, // SNZ_V_PSEUDO |
5142 | 91.2k | 0U, // SNZ_W_PSEUDO |
5143 | 91.2k | 128U, // SRemIMacro |
5144 | 91.2k | 128U, // SRemMacro |
5145 | 91.2k | 0U, // STORE_ACC128 |
5146 | 91.2k | 0U, // STORE_ACC64 |
5147 | 91.2k | 0U, // STORE_ACC64DSP |
5148 | 91.2k | 0U, // STORE_CCOND_DSP |
5149 | 91.2k | 0U, // STR_D |
5150 | 91.2k | 0U, // STR_W |
5151 | 91.2k | 0U, // ST_F16 |
5152 | 91.2k | 0U, // SWM_MM |
5153 | 91.2k | 0U, // SZ_B_PSEUDO |
5154 | 91.2k | 0U, // SZ_D_PSEUDO |
5155 | 91.2k | 0U, // SZ_H_PSEUDO |
5156 | 91.2k | 0U, // SZ_V_PSEUDO |
5157 | 91.2k | 0U, // SZ_W_PSEUDO |
5158 | 91.2k | 0U, // SaaAddr |
5159 | 91.2k | 0U, // SaadAddr |
5160 | 91.2k | 0U, // SelBeqZ |
5161 | 91.2k | 0U, // SelBneZ |
5162 | 91.2k | 0U, // SelTBteqZCmp |
5163 | 91.2k | 0U, // SelTBteqZCmpi |
5164 | 91.2k | 0U, // SelTBteqZSlt |
5165 | 91.2k | 0U, // SelTBteqZSlti |
5166 | 91.2k | 0U, // SelTBteqZSltiu |
5167 | 91.2k | 0U, // SelTBteqZSltu |
5168 | 91.2k | 0U, // SelTBtneZCmp |
5169 | 91.2k | 0U, // SelTBtneZCmpi |
5170 | 91.2k | 0U, // SelTBtneZSlt |
5171 | 91.2k | 0U, // SelTBtneZSlti |
5172 | 91.2k | 0U, // SelTBtneZSltiu |
5173 | 91.2k | 0U, // SelTBtneZSltu |
5174 | 91.2k | 0U, // SltCCRxRy16 |
5175 | 91.2k | 0U, // SltiCCRxImmX16 |
5176 | 91.2k | 0U, // SltiuCCRxImmX16 |
5177 | 91.2k | 0U, // SltuCCRxRy16 |
5178 | 91.2k | 0U, // SltuRxRyRz16 |
5179 | 91.2k | 0U, // TAILCALL |
5180 | 91.2k | 0U, // TAILCALL64R6REG |
5181 | 91.2k | 0U, // TAILCALLHB64R6REG |
5182 | 91.2k | 0U, // TAILCALLHBR6REG |
5183 | 91.2k | 0U, // TAILCALLR6REG |
5184 | 91.2k | 0U, // TAILCALLREG |
5185 | 91.2k | 0U, // TAILCALLREG64 |
5186 | 91.2k | 0U, // TAILCALLREGHB |
5187 | 91.2k | 0U, // TAILCALLREGHB64 |
5188 | 91.2k | 0U, // TAILCALLREG_MM |
5189 | 91.2k | 0U, // TAILCALLREG_MMR6 |
5190 | 91.2k | 0U, // TAILCALLREG_NM |
5191 | 91.2k | 0U, // TAILCALL_MM |
5192 | 91.2k | 0U, // TAILCALL_MMR6 |
5193 | 91.2k | 0U, // TAILCALL_NM |
5194 | 91.2k | 0U, // TRAP |
5195 | 91.2k | 0U, // TRAP_MM |
5196 | 91.2k | 0U, // UDIV_MM_Pseudo |
5197 | 91.2k | 128U, // UDivIMacro |
5198 | 91.2k | 128U, // UDivMacro |
5199 | 91.2k | 128U, // URemIMacro |
5200 | 91.2k | 128U, // URemMacro |
5201 | 91.2k | 0U, // Ulh |
5202 | 91.2k | 0U, // Ulhu |
5203 | 91.2k | 0U, // Ulw |
5204 | 91.2k | 0U, // Ush |
5205 | 91.2k | 0U, // Usw |
5206 | 91.2k | 0U, // XOR_V_D_PSEUDO |
5207 | 91.2k | 0U, // XOR_V_H_PSEUDO |
5208 | 91.2k | 0U, // XOR_V_W_PSEUDO |
5209 | 91.2k | 0U, // ABSQ_S_PH |
5210 | 91.2k | 0U, // ABSQ_S_PH_MM |
5211 | 91.2k | 0U, // ABSQ_S_QB |
5212 | 91.2k | 0U, // ABSQ_S_QB_MMR2 |
5213 | 91.2k | 0U, // ABSQ_S_W |
5214 | 91.2k | 0U, // ABSQ_S_W_MM |
5215 | 91.2k | 128U, // ADD |
5216 | 91.2k | 12U, // ADDIU48_NM |
5217 | 91.2k | 128U, // ADDIUGP48_NM |
5218 | 91.2k | 128U, // ADDIUGPB_NM |
5219 | 91.2k | 128U, // ADDIUGPW_NM |
5220 | 91.2k | 128U, // ADDIUNEG_NM |
5221 | 91.2k | 0U, // ADDIUPC |
5222 | 91.2k | 0U, // ADDIUPC_MM |
5223 | 91.2k | 0U, // ADDIUPC_MMR6 |
5224 | 91.2k | 0U, // ADDIUR1SP_MM |
5225 | 91.2k | 20U, // ADDIUR1SP_NM |
5226 | 91.2k | 128U, // ADDIUR2_MM |
5227 | 91.2k | 152U, // ADDIUR2_NM |
5228 | 91.2k | 128U, // ADDIURS5_NM |
5229 | 91.2k | 0U, // ADDIUS5_MM |
5230 | 91.2k | 0U, // ADDIUSP_MM |
5231 | 91.2k | 128U, // ADDIU_MMR6 |
5232 | 91.2k | 16U, // ADDIU_NM |
5233 | 91.2k | 128U, // ADDQH_PH |
5234 | 91.2k | 128U, // ADDQH_PH_MMR2 |
5235 | 91.2k | 128U, // ADDQH_R_PH |
5236 | 91.2k | 128U, // ADDQH_R_PH_MMR2 |
5237 | 91.2k | 128U, // ADDQH_R_W |
5238 | 91.2k | 128U, // ADDQH_R_W_MMR2 |
5239 | 91.2k | 128U, // ADDQH_W |
5240 | 91.2k | 128U, // ADDQH_W_MMR2 |
5241 | 91.2k | 128U, // ADDQ_PH |
5242 | 91.2k | 128U, // ADDQ_PH_MM |
5243 | 91.2k | 128U, // ADDQ_S_PH |
5244 | 91.2k | 128U, // ADDQ_S_PH_MM |
5245 | 91.2k | 128U, // ADDQ_S_W |
5246 | 91.2k | 128U, // ADDQ_S_W_MM |
5247 | 91.2k | 128U, // ADDR_PS64 |
5248 | 91.2k | 128U, // ADDSC |
5249 | 91.2k | 128U, // ADDSC_MM |
5250 | 91.2k | 128U, // ADDS_A_B |
5251 | 91.2k | 128U, // ADDS_A_D |
5252 | 91.2k | 128U, // ADDS_A_H |
5253 | 91.2k | 128U, // ADDS_A_W |
5254 | 91.2k | 128U, // ADDS_S_B |
5255 | 91.2k | 128U, // ADDS_S_D |
5256 | 91.2k | 128U, // ADDS_S_H |
5257 | 91.2k | 128U, // ADDS_S_W |
5258 | 91.2k | 128U, // ADDS_U_B |
5259 | 91.2k | 128U, // ADDS_U_D |
5260 | 91.2k | 128U, // ADDS_U_H |
5261 | 91.2k | 128U, // ADDS_U_W |
5262 | 91.2k | 128U, // ADDU16_MM |
5263 | 91.2k | 128U, // ADDU16_MMR6 |
5264 | 91.2k | 128U, // ADDUH_QB |
5265 | 91.2k | 128U, // ADDUH_QB_MMR2 |
5266 | 91.2k | 128U, // ADDUH_R_QB |
5267 | 91.2k | 128U, // ADDUH_R_QB_MMR2 |
5268 | 91.2k | 128U, // ADDU_MMR6 |
5269 | 91.2k | 128U, // ADDU_PH |
5270 | 91.2k | 128U, // ADDU_PH_MMR2 |
5271 | 91.2k | 128U, // ADDU_QB |
5272 | 91.2k | 128U, // ADDU_QB_MM |
5273 | 91.2k | 128U, // ADDU_S_PH |
5274 | 91.2k | 128U, // ADDU_S_PH_MMR2 |
5275 | 91.2k | 128U, // ADDU_S_QB |
5276 | 91.2k | 128U, // ADDU_S_QB_MM |
5277 | 91.2k | 152U, // ADDVI_B |
5278 | 91.2k | 152U, // ADDVI_D |
5279 | 91.2k | 152U, // ADDVI_H |
5280 | 91.2k | 152U, // ADDVI_W |
5281 | 91.2k | 128U, // ADDV_B |
5282 | 91.2k | 128U, // ADDV_D |
5283 | 91.2k | 128U, // ADDV_H |
5284 | 91.2k | 128U, // ADDV_W |
5285 | 91.2k | 128U, // ADDWC |
5286 | 91.2k | 128U, // ADDWC_MM |
5287 | 91.2k | 128U, // ADD_A_B |
5288 | 91.2k | 128U, // ADD_A_D |
5289 | 91.2k | 128U, // ADD_A_H |
5290 | 91.2k | 128U, // ADD_A_W |
5291 | 91.2k | 128U, // ADD_MM |
5292 | 91.2k | 128U, // ADD_MMR6 |
5293 | 91.2k | 128U, // ADD_NM |
5294 | 91.2k | 128U, // ADDi |
5295 | 91.2k | 128U, // ADDi_MM |
5296 | 91.2k | 128U, // ADDiu |
5297 | 91.2k | 128U, // ADDiu_MM |
5298 | 91.2k | 128U, // ADDu |
5299 | 91.2k | 128U, // ADDu16_NM |
5300 | 91.2k | 128U, // ADDu4x4_NM |
5301 | 91.2k | 128U, // ADDu_MM |
5302 | 91.2k | 128U, // ADDu_NM |
5303 | 91.2k | 1024U, // ALIGN |
5304 | 91.2k | 1024U, // ALIGN_MMR6 |
5305 | 91.2k | 0U, // ALUIPC |
5306 | 91.2k | 0U, // ALUIPC_MMR6 |
5307 | 91.2k | 0U, // ALUIPC_NM |
5308 | 91.2k | 128U, // AND |
5309 | 91.2k | 0U, // AND16_MM |
5310 | 91.2k | 0U, // AND16_MMR6 |
5311 | 91.2k | 128U, // AND16_NM |
5312 | 91.2k | 128U, // AND64 |
5313 | 91.2k | 128U, // ANDI16_MM |
5314 | 91.2k | 128U, // ANDI16_MMR6 |
5315 | 91.2k | 16U, // ANDI16_NM |
5316 | 91.2k | 20U, // ANDI_B |
5317 | 91.2k | 16U, // ANDI_MMR6 |
5318 | 91.2k | 128U, // ANDI_NM |
5319 | 91.2k | 128U, // AND_MM |
5320 | 91.2k | 128U, // AND_MMR6 |
5321 | 91.2k | 128U, // AND_NM |
5322 | 91.2k | 128U, // AND_V |
5323 | 91.2k | 16U, // ANDi |
5324 | 91.2k | 16U, // ANDi64 |
5325 | 91.2k | 16U, // ANDi_MM |
5326 | 91.2k | 152U, // APPEND |
5327 | 91.2k | 152U, // APPEND_MMR2 |
5328 | 91.2k | 128U, // ASUB_S_B |
5329 | 91.2k | 128U, // ASUB_S_D |
5330 | 91.2k | 128U, // ASUB_S_H |
5331 | 91.2k | 128U, // ASUB_S_W |
5332 | 91.2k | 128U, // ASUB_U_B |
5333 | 91.2k | 128U, // ASUB_U_D |
5334 | 91.2k | 128U, // ASUB_U_H |
5335 | 91.2k | 128U, // ASUB_U_W |
5336 | 91.2k | 16U, // AUI |
5337 | 91.2k | 0U, // AUIPC |
5338 | 91.2k | 0U, // AUIPC_MMR6 |
5339 | 91.2k | 16U, // AUI_MMR6 |
5340 | 91.2k | 128U, // AVER_S_B |
5341 | 91.2k | 128U, // AVER_S_D |
5342 | 91.2k | 128U, // AVER_S_H |
5343 | 91.2k | 128U, // AVER_S_W |
5344 | 91.2k | 128U, // AVER_U_B |
5345 | 91.2k | 128U, // AVER_U_D |
5346 | 91.2k | 128U, // AVER_U_H |
5347 | 91.2k | 128U, // AVER_U_W |
5348 | 91.2k | 128U, // AVE_S_B |
5349 | 91.2k | 128U, // AVE_S_D |
5350 | 91.2k | 128U, // AVE_S_H |
5351 | 91.2k | 128U, // AVE_S_W |
5352 | 91.2k | 128U, // AVE_U_B |
5353 | 91.2k | 128U, // AVE_U_D |
5354 | 91.2k | 128U, // AVE_U_H |
5355 | 91.2k | 128U, // AVE_U_W |
5356 | 91.2k | 0U, // AddiuRxImmX16 |
5357 | 91.2k | 0U, // AddiuRxPcImmX16 |
5358 | 91.2k | 1U, // AddiuRxRxImm16 |
5359 | 91.2k | 0U, // AddiuRxRxImmX16 |
5360 | 91.2k | 0U, // AddiuRxRyOffMemX16 |
5361 | 91.2k | 0U, // AddiuSpImm16 |
5362 | 91.2k | 0U, // AddiuSpImmX16 |
5363 | 91.2k | 128U, // AdduRxRyRz16 |
5364 | 91.2k | 0U, // AndRxRxRy16 |
5365 | 91.2k | 0U, // B16_MM |
5366 | 91.2k | 128U, // BADDu |
5367 | 91.2k | 0U, // BAL |
5368 | 91.2k | 0U, // BALC |
5369 | 91.2k | 0U, // BALC16_NM |
5370 | 91.2k | 0U, // BALC_MMR6 |
5371 | 91.2k | 0U, // BALC_NM |
5372 | 91.2k | 156U, // BALIGN |
5373 | 91.2k | 156U, // BALIGN_MMR2 |
5374 | 91.2k | 0U, // BALRSC_NM |
5375 | 91.2k | 4U, // BBEQZC_NM |
5376 | 91.2k | 0U, // BBIT0 |
5377 | 91.2k | 0U, // BBIT032 |
5378 | 91.2k | 0U, // BBIT1 |
5379 | 91.2k | 0U, // BBIT132 |
5380 | 91.2k | 4U, // BBNEZC_NM |
5381 | 91.2k | 0U, // BC |
5382 | 91.2k | 0U, // BC16_MMR6 |
5383 | 91.2k | 0U, // BC16_NM |
5384 | 91.2k | 0U, // BC1EQZ |
5385 | 91.2k | 0U, // BC1EQZC_MMR6 |
5386 | 91.2k | 0U, // BC1F |
5387 | 91.2k | 0U, // BC1FL |
5388 | 91.2k | 0U, // BC1F_MM |
5389 | 91.2k | 0U, // BC1NEZ |
5390 | 91.2k | 0U, // BC1NEZC_MMR6 |
5391 | 91.2k | 0U, // BC1T |
5392 | 91.2k | 0U, // BC1TL |
5393 | 91.2k | 0U, // BC1T_MM |
5394 | 91.2k | 0U, // BC2EQZ |
5395 | 91.2k | 0U, // BC2EQZC_MMR6 |
5396 | 91.2k | 0U, // BC2NEZ |
5397 | 91.2k | 0U, // BC2NEZC_MMR6 |
5398 | 91.2k | 136U, // BCLRI_B |
5399 | 91.2k | 160U, // BCLRI_D |
5400 | 91.2k | 164U, // BCLRI_H |
5401 | 91.2k | 152U, // BCLRI_W |
5402 | 91.2k | 128U, // BCLR_B |
5403 | 91.2k | 128U, // BCLR_D |
5404 | 91.2k | 128U, // BCLR_H |
5405 | 91.2k | 128U, // BCLR_W |
5406 | 91.2k | 0U, // BC_MMR6 |
5407 | 91.2k | 0U, // BC_NM |
5408 | 91.2k | 4U, // BEQ |
5409 | 91.2k | 4U, // BEQ64 |
5410 | 91.2k | 4U, // BEQC |
5411 | 91.2k | 4U, // BEQC16_NM |
5412 | 91.2k | 4U, // BEQC64 |
5413 | 91.2k | 4U, // BEQC_MMR6 |
5414 | 91.2k | 4U, // BEQC_NM |
5415 | 91.2k | 4U, // BEQCzero_NM |
5416 | 91.2k | 4U, // BEQIC_NM |
5417 | 91.2k | 4U, // BEQL |
5418 | 91.2k | 0U, // BEQZ16_MM |
5419 | 91.2k | 0U, // BEQZALC |
5420 | 91.2k | 0U, // BEQZALC_MMR6 |
5421 | 91.2k | 0U, // BEQZC |
5422 | 91.2k | 0U, // BEQZC16_MMR6 |
5423 | 91.2k | 0U, // BEQZC16_NM |
5424 | 91.2k | 0U, // BEQZC64 |
5425 | 91.2k | 0U, // BEQZC_MM |
5426 | 91.2k | 0U, // BEQZC_MMR6 |
5427 | 91.2k | 0U, // BEQZC_NM |
5428 | 91.2k | 4U, // BEQ_MM |
5429 | 91.2k | 4U, // BGEC |
5430 | 91.2k | 4U, // BGEC64 |
5431 | 91.2k | 4U, // BGEC_MMR6 |
5432 | 91.2k | 4U, // BGEC_NM |
5433 | 91.2k | 4U, // BGEIC_NM |
5434 | 91.2k | 4U, // BGEIUC_NM |
5435 | 91.2k | 4U, // BGEUC |
5436 | 91.2k | 4U, // BGEUC64 |
5437 | 91.2k | 4U, // BGEUC_MMR6 |
5438 | 91.2k | 4U, // BGEUC_NM |
5439 | 91.2k | 0U, // BGEZ |
5440 | 91.2k | 0U, // BGEZ64 |
5441 | 91.2k | 0U, // BGEZAL |
5442 | 91.2k | 0U, // BGEZALC |
5443 | 91.2k | 0U, // BGEZALC_MMR6 |
5444 | 91.2k | 0U, // BGEZALL |
5445 | 91.2k | 0U, // BGEZALS_MM |
5446 | 91.2k | 0U, // BGEZAL_MM |
5447 | 91.2k | 0U, // BGEZC |
5448 | 91.2k | 0U, // BGEZC64 |
5449 | 91.2k | 0U, // BGEZC_MMR6 |
5450 | 91.2k | 0U, // BGEZL |
5451 | 91.2k | 0U, // BGEZ_MM |
5452 | 91.2k | 0U, // BGTZ |
5453 | 91.2k | 0U, // BGTZ64 |
5454 | 91.2k | 0U, // BGTZALC |
5455 | 91.2k | 0U, // BGTZALC_MMR6 |
5456 | 91.2k | 0U, // BGTZC |
5457 | 91.2k | 0U, // BGTZC64 |
5458 | 91.2k | 0U, // BGTZC_MMR6 |
5459 | 91.2k | 0U, // BGTZL |
5460 | 91.2k | 0U, // BGTZ_MM |
5461 | 91.2k | 168U, // BINSLI_B |
5462 | 91.2k | 44U, // BINSLI_D |
5463 | 91.2k | 176U, // BINSLI_H |
5464 | 91.2k | 52U, // BINSLI_W |
5465 | 91.2k | 184U, // BINSL_B |
5466 | 91.2k | 184U, // BINSL_D |
5467 | 91.2k | 184U, // BINSL_H |
5468 | 91.2k | 184U, // BINSL_W |
5469 | 91.2k | 168U, // BINSRI_B |
5470 | 91.2k | 44U, // BINSRI_D |
5471 | 91.2k | 176U, // BINSRI_H |
5472 | 91.2k | 52U, // BINSRI_W |
5473 | 91.2k | 184U, // BINSR_B |
5474 | 91.2k | 184U, // BINSR_D |
5475 | 91.2k | 184U, // BINSR_H |
5476 | 91.2k | 184U, // BINSR_W |
5477 | 91.2k | 0U, // BITREV |
5478 | 91.2k | 0U, // BITREVW_NM |
5479 | 91.2k | 0U, // BITREV_MM |
5480 | 91.2k | 0U, // BITSWAP |
5481 | 91.2k | 0U, // BITSWAP_MMR6 |
5482 | 91.2k | 0U, // BLEZ |
5483 | 91.2k | 0U, // BLEZ64 |
5484 | 91.2k | 0U, // BLEZALC |
5485 | 91.2k | 0U, // BLEZALC_MMR6 |
5486 | 91.2k | 0U, // BLEZC |
5487 | 91.2k | 0U, // BLEZC64 |
5488 | 91.2k | 0U, // BLEZC_MMR6 |
5489 | 91.2k | 0U, // BLEZL |
5490 | 91.2k | 0U, // BLEZ_MM |
5491 | 91.2k | 4U, // BLTC |
5492 | 91.2k | 4U, // BLTC64 |
5493 | 91.2k | 4U, // BLTC_MMR6 |
5494 | 91.2k | 4U, // BLTC_NM |
5495 | 91.2k | 4U, // BLTIC_NM |
5496 | 91.2k | 4U, // BLTIUC_NM |
5497 | 91.2k | 4U, // BLTUC |
5498 | 91.2k | 4U, // BLTUC64 |
5499 | 91.2k | 4U, // BLTUC_MMR6 |
5500 | 91.2k | 4U, // BLTUC_NM |
5501 | 91.2k | 0U, // BLTZ |
5502 | 91.2k | 0U, // BLTZ64 |
5503 | 91.2k | 0U, // BLTZAL |
5504 | 91.2k | 0U, // BLTZALC |
5505 | 91.2k | 0U, // BLTZALC_MMR6 |
5506 | 91.2k | 0U, // BLTZALL |
5507 | 91.2k | 0U, // BLTZALS_MM |
5508 | 91.2k | 0U, // BLTZAL_MM |
5509 | 91.2k | 0U, // BLTZC |
5510 | 91.2k | 0U, // BLTZC64 |
5511 | 91.2k | 0U, // BLTZC_MMR6 |
5512 | 91.2k | 0U, // BLTZL |
5513 | 91.2k | 0U, // BLTZ_MM |
5514 | 91.2k | 60U, // BMNZI_B |
5515 | 91.2k | 184U, // BMNZ_V |
5516 | 91.2k | 60U, // BMZI_B |
5517 | 91.2k | 184U, // BMZ_V |
5518 | 91.2k | 4U, // BNE |
5519 | 91.2k | 4U, // BNE64 |
5520 | 91.2k | 4U, // BNEC |
5521 | 91.2k | 4U, // BNEC16_NM |
5522 | 91.2k | 4U, // BNEC64 |
5523 | 91.2k | 4U, // BNEC_MMR6 |
5524 | 91.2k | 4U, // BNEC_NM |
5525 | 91.2k | 4U, // BNECzero_NM |
5526 | 91.2k | 136U, // BNEGI_B |
5527 | 91.2k | 160U, // BNEGI_D |
5528 | 91.2k | 164U, // BNEGI_H |
5529 | 91.2k | 152U, // BNEGI_W |
5530 | 91.2k | 128U, // BNEG_B |
5531 | 91.2k | 128U, // BNEG_D |
5532 | 91.2k | 128U, // BNEG_H |
5533 | 91.2k | 128U, // BNEG_W |
5534 | 91.2k | 4U, // BNEIC_NM |
5535 | 91.2k | 4U, // BNEL |
5536 | 91.2k | 0U, // BNEZ16_MM |
5537 | 91.2k | 0U, // BNEZALC |
5538 | 91.2k | 0U, // BNEZALC_MMR6 |
5539 | 91.2k | 0U, // BNEZC |
5540 | 91.2k | 0U, // BNEZC16_MMR6 |
5541 | 91.2k | 0U, // BNEZC16_NM |
5542 | 91.2k | 0U, // BNEZC64 |
5543 | 91.2k | 0U, // BNEZC_MM |
5544 | 91.2k | 0U, // BNEZC_MMR6 |
5545 | 91.2k | 0U, // BNEZC_NM |
5546 | 91.2k | 4U, // BNE_MM |
5547 | 91.2k | 4U, // BNVC |
5548 | 91.2k | 4U, // BNVC_MMR6 |
5549 | 91.2k | 0U, // BNZ_B |
5550 | 91.2k | 0U, // BNZ_D |
5551 | 91.2k | 0U, // BNZ_H |
5552 | 91.2k | 0U, // BNZ_V |
5553 | 91.2k | 0U, // BNZ_W |
5554 | 91.2k | 4U, // BOVC |
5555 | 91.2k | 4U, // BOVC_MMR6 |
5556 | 91.2k | 0U, // BPOSGE32 |
5557 | 91.2k | 0U, // BPOSGE32C_MMR3 |
5558 | 91.2k | 0U, // BPOSGE32_MM |
5559 | 91.2k | 0U, // BREAK |
5560 | 91.2k | 0U, // BREAK16_MM |
5561 | 91.2k | 0U, // BREAK16_MMR6 |
5562 | 91.2k | 0U, // BREAK16_NM |
5563 | 91.2k | 0U, // BREAK_MM |
5564 | 91.2k | 0U, // BREAK_MMR6 |
5565 | 91.2k | 0U, // BREAK_NM |
5566 | 91.2k | 0U, // BRSC_NM |
5567 | 91.2k | 60U, // BSELI_B |
5568 | 91.2k | 184U, // BSEL_V |
5569 | 91.2k | 136U, // BSETI_B |
5570 | 91.2k | 160U, // BSETI_D |
5571 | 91.2k | 164U, // BSETI_H |
5572 | 91.2k | 152U, // BSETI_W |
5573 | 91.2k | 128U, // BSET_B |
5574 | 91.2k | 128U, // BSET_D |
5575 | 91.2k | 128U, // BSET_H |
5576 | 91.2k | 128U, // BSET_W |
5577 | 91.2k | 0U, // BYTEREVW_NM |
5578 | 91.2k | 0U, // BZ_B |
5579 | 91.2k | 0U, // BZ_D |
5580 | 91.2k | 0U, // BZ_H |
5581 | 91.2k | 0U, // BZ_V |
5582 | 91.2k | 0U, // BZ_W |
5583 | 91.2k | 1U, // BeqzRxImm16 |
5584 | 91.2k | 0U, // BeqzRxImmX16 |
5585 | 91.2k | 0U, // Bimm16 |
5586 | 91.2k | 0U, // BimmX16 |
5587 | 91.2k | 1U, // BnezRxImm16 |
5588 | 91.2k | 0U, // BnezRxImmX16 |
5589 | 91.2k | 0U, // Break16 |
5590 | 91.2k | 0U, // Bteqz16 |
5591 | 91.2k | 0U, // BteqzX16 |
5592 | 91.2k | 0U, // Btnez16 |
5593 | 91.2k | 0U, // BtnezX16 |
5594 | 91.2k | 0U, // CACHE |
5595 | 91.2k | 0U, // CACHEE |
5596 | 91.2k | 0U, // CACHEE_MM |
5597 | 91.2k | 0U, // CACHE_MM |
5598 | 91.2k | 0U, // CACHE_MMR6 |
5599 | 91.2k | 0U, // CACHE_NM |
5600 | 91.2k | 0U, // CACHE_R6 |
5601 | 91.2k | 0U, // CEIL_L_D64 |
5602 | 91.2k | 0U, // CEIL_L_D_MMR6 |
5603 | 91.2k | 0U, // CEIL_L_S |
5604 | 91.2k | 0U, // CEIL_L_S_MMR6 |
5605 | 91.2k | 0U, // CEIL_W_D32 |
5606 | 91.2k | 0U, // CEIL_W_D64 |
5607 | 91.2k | 0U, // CEIL_W_D_MMR6 |
5608 | 91.2k | 0U, // CEIL_W_MM |
5609 | 91.2k | 0U, // CEIL_W_S |
5610 | 91.2k | 0U, // CEIL_W_S_MM |
5611 | 91.2k | 0U, // CEIL_W_S_MMR6 |
5612 | 91.2k | 128U, // CEQI_B |
5613 | 91.2k | 128U, // CEQI_D |
5614 | 91.2k | 128U, // CEQI_H |
5615 | 91.2k | 128U, // CEQI_W |
5616 | 91.2k | 128U, // CEQ_B |
5617 | 91.2k | 128U, // CEQ_D |
5618 | 91.2k | 128U, // CEQ_H |
5619 | 91.2k | 128U, // CEQ_W |
5620 | 91.2k | 0U, // CFC1 |
5621 | 91.2k | 0U, // CFC1_MM |
5622 | 91.2k | 0U, // CFC2_MM |
5623 | 91.2k | 0U, // CFCMSA |
5624 | 91.2k | 2072U, // CINS |
5625 | 91.2k | 2072U, // CINS32 |
5626 | 91.2k | 2072U, // CINS64_32 |
5627 | 91.2k | 2072U, // CINS_i32 |
5628 | 91.2k | 0U, // CLASS_D |
5629 | 91.2k | 0U, // CLASS_D_MMR6 |
5630 | 91.2k | 0U, // CLASS_S |
5631 | 91.2k | 0U, // CLASS_S_MMR6 |
5632 | 91.2k | 128U, // CLEI_S_B |
5633 | 91.2k | 128U, // CLEI_S_D |
5634 | 91.2k | 128U, // CLEI_S_H |
5635 | 91.2k | 128U, // CLEI_S_W |
5636 | 91.2k | 152U, // CLEI_U_B |
5637 | 91.2k | 152U, // CLEI_U_D |
5638 | 91.2k | 152U, // CLEI_U_H |
5639 | 91.2k | 152U, // CLEI_U_W |
5640 | 91.2k | 128U, // CLE_S_B |
5641 | 91.2k | 128U, // CLE_S_D |
5642 | 91.2k | 128U, // CLE_S_H |
5643 | 91.2k | 128U, // CLE_S_W |
5644 | 91.2k | 128U, // CLE_U_B |
5645 | 91.2k | 128U, // CLE_U_D |
5646 | 91.2k | 128U, // CLE_U_H |
5647 | 91.2k | 128U, // CLE_U_W |
5648 | 91.2k | 0U, // CLO |
5649 | 91.2k | 0U, // CLO_MM |
5650 | 91.2k | 0U, // CLO_MMR6 |
5651 | 91.2k | 0U, // CLO_NM |
5652 | 91.2k | 0U, // CLO_R6 |
5653 | 91.2k | 128U, // CLTI_S_B |
5654 | 91.2k | 128U, // CLTI_S_D |
5655 | 91.2k | 128U, // CLTI_S_H |
5656 | 91.2k | 128U, // CLTI_S_W |
5657 | 91.2k | 152U, // CLTI_U_B |
5658 | 91.2k | 152U, // CLTI_U_D |
5659 | 91.2k | 152U, // CLTI_U_H |
5660 | 91.2k | 152U, // CLTI_U_W |
5661 | 91.2k | 128U, // CLT_S_B |
5662 | 91.2k | 128U, // CLT_S_D |
5663 | 91.2k | 128U, // CLT_S_H |
5664 | 91.2k | 128U, // CLT_S_W |
5665 | 91.2k | 128U, // CLT_U_B |
5666 | 91.2k | 128U, // CLT_U_D |
5667 | 91.2k | 128U, // CLT_U_H |
5668 | 91.2k | 128U, // CLT_U_W |
5669 | 91.2k | 0U, // CLZ |
5670 | 91.2k | 0U, // CLZ_MM |
5671 | 91.2k | 0U, // CLZ_MMR6 |
5672 | 91.2k | 0U, // CLZ_NM |
5673 | 91.2k | 0U, // CLZ_R6 |
5674 | 91.2k | 128U, // CMPGDU_EQ_QB |
5675 | 91.2k | 128U, // CMPGDU_EQ_QB_MMR2 |
5676 | 91.2k | 128U, // CMPGDU_LE_QB |
5677 | 91.2k | 128U, // CMPGDU_LE_QB_MMR2 |
5678 | 91.2k | 128U, // CMPGDU_LT_QB |
5679 | 91.2k | 128U, // CMPGDU_LT_QB_MMR2 |
5680 | 91.2k | 128U, // CMPGU_EQ_QB |
5681 | 91.2k | 128U, // CMPGU_EQ_QB_MM |
5682 | 91.2k | 128U, // CMPGU_LE_QB |
5683 | 91.2k | 128U, // CMPGU_LE_QB_MM |
5684 | 91.2k | 128U, // CMPGU_LT_QB |
5685 | 91.2k | 128U, // CMPGU_LT_QB_MM |
5686 | 91.2k | 0U, // CMPU_EQ_QB |
5687 | 91.2k | 0U, // CMPU_EQ_QB_MM |
5688 | 91.2k | 0U, // CMPU_LE_QB |
5689 | 91.2k | 0U, // CMPU_LE_QB_MM |
5690 | 91.2k | 0U, // CMPU_LT_QB |
5691 | 91.2k | 0U, // CMPU_LT_QB_MM |
5692 | 91.2k | 128U, // CMP_AF_D_MMR6 |
5693 | 91.2k | 128U, // CMP_AF_S_MMR6 |
5694 | 91.2k | 128U, // CMP_EQ_D |
5695 | 91.2k | 128U, // CMP_EQ_D_MMR6 |
5696 | 91.2k | 0U, // CMP_EQ_PH |
5697 | 91.2k | 0U, // CMP_EQ_PH_MM |
5698 | 91.2k | 128U, // CMP_EQ_S |
5699 | 91.2k | 128U, // CMP_EQ_S_MMR6 |
5700 | 91.2k | 128U, // CMP_F_D |
5701 | 91.2k | 128U, // CMP_F_S |
5702 | 91.2k | 128U, // CMP_LE_D |
5703 | 91.2k | 128U, // CMP_LE_D_MMR6 |
5704 | 91.2k | 0U, // CMP_LE_PH |
5705 | 91.2k | 0U, // CMP_LE_PH_MM |
5706 | 91.2k | 128U, // CMP_LE_S |
5707 | 91.2k | 128U, // CMP_LE_S_MMR6 |
5708 | 91.2k | 128U, // CMP_LT_D |
5709 | 91.2k | 128U, // CMP_LT_D_MMR6 |
5710 | 91.2k | 0U, // CMP_LT_PH |
5711 | 91.2k | 0U, // CMP_LT_PH_MM |
5712 | 91.2k | 128U, // CMP_LT_S |
5713 | 91.2k | 128U, // CMP_LT_S_MMR6 |
5714 | 91.2k | 128U, // CMP_SAF_D |
5715 | 91.2k | 128U, // CMP_SAF_D_MMR6 |
5716 | 91.2k | 128U, // CMP_SAF_S |
5717 | 91.2k | 128U, // CMP_SAF_S_MMR6 |
5718 | 91.2k | 128U, // CMP_SEQ_D |
5719 | 91.2k | 128U, // CMP_SEQ_D_MMR6 |
5720 | 91.2k | 128U, // CMP_SEQ_S |
5721 | 91.2k | 128U, // CMP_SEQ_S_MMR6 |
5722 | 91.2k | 128U, // CMP_SLE_D |
5723 | 91.2k | 128U, // CMP_SLE_D_MMR6 |
5724 | 91.2k | 128U, // CMP_SLE_S |
5725 | 91.2k | 128U, // CMP_SLE_S_MMR6 |
5726 | 91.2k | 128U, // CMP_SLT_D |
5727 | 91.2k | 128U, // CMP_SLT_D_MMR6 |
5728 | 91.2k | 128U, // CMP_SLT_S |
5729 | 91.2k | 128U, // CMP_SLT_S_MMR6 |
5730 | 91.2k | 128U, // CMP_SUEQ_D |
5731 | 91.2k | 128U, // CMP_SUEQ_D_MMR6 |
5732 | 91.2k | 128U, // CMP_SUEQ_S |
5733 | 91.2k | 128U, // CMP_SUEQ_S_MMR6 |
5734 | 91.2k | 128U, // CMP_SULE_D |
5735 | 91.2k | 128U, // CMP_SULE_D_MMR6 |
5736 | 91.2k | 128U, // CMP_SULE_S |
5737 | 91.2k | 128U, // CMP_SULE_S_MMR6 |
5738 | 91.2k | 128U, // CMP_SULT_D |
5739 | 91.2k | 128U, // CMP_SULT_D_MMR6 |
5740 | 91.2k | 128U, // CMP_SULT_S |
5741 | 91.2k | 128U, // CMP_SULT_S_MMR6 |
5742 | 91.2k | 128U, // CMP_SUN_D |
5743 | 91.2k | 128U, // CMP_SUN_D_MMR6 |
5744 | 91.2k | 128U, // CMP_SUN_S |
5745 | 91.2k | 128U, // CMP_SUN_S_MMR6 |
5746 | 91.2k | 128U, // CMP_UEQ_D |
5747 | 91.2k | 128U, // CMP_UEQ_D_MMR6 |
5748 | 91.2k | 128U, // CMP_UEQ_S |
5749 | 91.2k | 128U, // CMP_UEQ_S_MMR6 |
5750 | 91.2k | 128U, // CMP_ULE_D |
5751 | 91.2k | 128U, // CMP_ULE_D_MMR6 |
5752 | 91.2k | 128U, // CMP_ULE_S |
5753 | 91.2k | 128U, // CMP_ULE_S_MMR6 |
5754 | 91.2k | 128U, // CMP_ULT_D |
5755 | 91.2k | 128U, // CMP_ULT_D_MMR6 |
5756 | 91.2k | 128U, // CMP_ULT_S |
5757 | 91.2k | 128U, // CMP_ULT_S_MMR6 |
5758 | 91.2k | 128U, // CMP_UN_D |
5759 | 91.2k | 128U, // CMP_UN_D_MMR6 |
5760 | 91.2k | 128U, // CMP_UN_S |
5761 | 91.2k | 128U, // CMP_UN_S_MMR6 |
5762 | 91.2k | 293U, // COPY_S_B |
5763 | 91.2k | 321U, // COPY_S_D |
5764 | 91.2k | 265U, // COPY_S_H |
5765 | 91.2k | 285U, // COPY_S_W |
5766 | 91.2k | 293U, // COPY_U_B |
5767 | 91.2k | 265U, // COPY_U_H |
5768 | 91.2k | 285U, // COPY_U_W |
5769 | 91.2k | 128U, // CRC32B |
5770 | 91.2k | 0U, // CRC32B_NM |
5771 | 91.2k | 128U, // CRC32CB |
5772 | 91.2k | 0U, // CRC32CB_NM |
5773 | 91.2k | 128U, // CRC32CD |
5774 | 91.2k | 128U, // CRC32CH |
5775 | 91.2k | 0U, // CRC32CH_NM |
5776 | 91.2k | 128U, // CRC32CW |
5777 | 91.2k | 0U, // CRC32CW_NM |
5778 | 91.2k | 128U, // CRC32D |
5779 | 91.2k | 128U, // CRC32H |
5780 | 91.2k | 0U, // CRC32H_NM |
5781 | 91.2k | 128U, // CRC32W |
5782 | 91.2k | 0U, // CRC32W_NM |
5783 | 91.2k | 0U, // CTC1 |
5784 | 91.2k | 0U, // CTC1_MM |
5785 | 91.2k | 0U, // CTC2_MM |
5786 | 91.2k | 0U, // CTCMSA |
5787 | 91.2k | 0U, // CVT_D32_S |
5788 | 91.2k | 0U, // CVT_D32_S_MM |
5789 | 91.2k | 0U, // CVT_D32_W |
5790 | 91.2k | 0U, // CVT_D32_W_MM |
5791 | 91.2k | 0U, // CVT_D64_L |
5792 | 91.2k | 0U, // CVT_D64_S |
5793 | 91.2k | 0U, // CVT_D64_S_MM |
5794 | 91.2k | 0U, // CVT_D64_W |
5795 | 91.2k | 0U, // CVT_D64_W_MM |
5796 | 91.2k | 0U, // CVT_D_L_MMR6 |
5797 | 91.2k | 0U, // CVT_L_D64 |
5798 | 91.2k | 0U, // CVT_L_D64_MM |
5799 | 91.2k | 0U, // CVT_L_D_MMR6 |
5800 | 91.2k | 0U, // CVT_L_S |
5801 | 91.2k | 0U, // CVT_L_S_MM |
5802 | 91.2k | 0U, // CVT_L_S_MMR6 |
5803 | 91.2k | 0U, // CVT_PS_PW64 |
5804 | 91.2k | 128U, // CVT_PS_S64 |
5805 | 91.2k | 0U, // CVT_PW_PS64 |
5806 | 91.2k | 0U, // CVT_S_D32 |
5807 | 91.2k | 0U, // CVT_S_D32_MM |
5808 | 91.2k | 0U, // CVT_S_D64 |
5809 | 91.2k | 0U, // CVT_S_D64_MM |
5810 | 91.2k | 0U, // CVT_S_L |
5811 | 91.2k | 0U, // CVT_S_L_MMR6 |
5812 | 91.2k | 0U, // CVT_S_PL64 |
5813 | 91.2k | 0U, // CVT_S_PU64 |
5814 | 91.2k | 0U, // CVT_S_W |
5815 | 91.2k | 0U, // CVT_S_W_MM |
5816 | 91.2k | 0U, // CVT_S_W_MMR6 |
5817 | 91.2k | 0U, // CVT_W_D32 |
5818 | 91.2k | 0U, // CVT_W_D32_MM |
5819 | 91.2k | 0U, // CVT_W_D64 |
5820 | 91.2k | 0U, // CVT_W_D64_MM |
5821 | 91.2k | 0U, // CVT_W_S |
5822 | 91.2k | 0U, // CVT_W_S_MM |
5823 | 91.2k | 0U, // CVT_W_S_MMR6 |
5824 | 91.2k | 128U, // C_EQ_D32 |
5825 | 91.2k | 128U, // C_EQ_D32_MM |
5826 | 91.2k | 128U, // C_EQ_D64 |
5827 | 91.2k | 128U, // C_EQ_D64_MM |
5828 | 91.2k | 128U, // C_EQ_S |
5829 | 91.2k | 128U, // C_EQ_S_MM |
5830 | 91.2k | 128U, // C_F_D32 |
5831 | 91.2k | 128U, // C_F_D32_MM |
5832 | 91.2k | 128U, // C_F_D64 |
5833 | 91.2k | 128U, // C_F_D64_MM |
5834 | 91.2k | 128U, // C_F_S |
5835 | 91.2k | 128U, // C_F_S_MM |
5836 | 91.2k | 128U, // C_LE_D32 |
5837 | 91.2k | 128U, // C_LE_D32_MM |
5838 | 91.2k | 128U, // C_LE_D64 |
5839 | 91.2k | 128U, // C_LE_D64_MM |
5840 | 91.2k | 128U, // C_LE_S |
5841 | 91.2k | 128U, // C_LE_S_MM |
5842 | 91.2k | 128U, // C_LT_D32 |
5843 | 91.2k | 128U, // C_LT_D32_MM |
5844 | 91.2k | 128U, // C_LT_D64 |
5845 | 91.2k | 128U, // C_LT_D64_MM |
5846 | 91.2k | 128U, // C_LT_S |
5847 | 91.2k | 128U, // C_LT_S_MM |
5848 | 91.2k | 128U, // C_NGE_D32 |
5849 | 91.2k | 128U, // C_NGE_D32_MM |
5850 | 91.2k | 128U, // C_NGE_D64 |
5851 | 91.2k | 128U, // C_NGE_D64_MM |
5852 | 91.2k | 128U, // C_NGE_S |
5853 | 91.2k | 128U, // C_NGE_S_MM |
5854 | 91.2k | 128U, // C_NGLE_D32 |
5855 | 91.2k | 128U, // C_NGLE_D32_MM |
5856 | 91.2k | 128U, // C_NGLE_D64 |
5857 | 91.2k | 128U, // C_NGLE_D64_MM |
5858 | 91.2k | 128U, // C_NGLE_S |
5859 | 91.2k | 128U, // C_NGLE_S_MM |
5860 | 91.2k | 128U, // C_NGL_D32 |
5861 | 91.2k | 128U, // C_NGL_D32_MM |
5862 | 91.2k | 128U, // C_NGL_D64 |
5863 | 91.2k | 128U, // C_NGL_D64_MM |
5864 | 91.2k | 128U, // C_NGL_S |
5865 | 91.2k | 128U, // C_NGL_S_MM |
5866 | 91.2k | 128U, // C_NGT_D32 |
5867 | 91.2k | 128U, // C_NGT_D32_MM |
5868 | 91.2k | 128U, // C_NGT_D64 |
5869 | 91.2k | 128U, // C_NGT_D64_MM |
5870 | 91.2k | 128U, // C_NGT_S |
5871 | 91.2k | 128U, // C_NGT_S_MM |
5872 | 91.2k | 128U, // C_OLE_D32 |
5873 | 91.2k | 128U, // C_OLE_D32_MM |
5874 | 91.2k | 128U, // C_OLE_D64 |
5875 | 91.2k | 128U, // C_OLE_D64_MM |
5876 | 91.2k | 128U, // C_OLE_S |
5877 | 91.2k | 128U, // C_OLE_S_MM |
5878 | 91.2k | 128U, // C_OLT_D32 |
5879 | 91.2k | 128U, // C_OLT_D32_MM |
5880 | 91.2k | 128U, // C_OLT_D64 |
5881 | 91.2k | 128U, // C_OLT_D64_MM |
5882 | 91.2k | 128U, // C_OLT_S |
5883 | 91.2k | 128U, // C_OLT_S_MM |
5884 | 91.2k | 128U, // C_SEQ_D32 |
5885 | 91.2k | 128U, // C_SEQ_D32_MM |
5886 | 91.2k | 128U, // C_SEQ_D64 |
5887 | 91.2k | 128U, // C_SEQ_D64_MM |
5888 | 91.2k | 128U, // C_SEQ_S |
5889 | 91.2k | 128U, // C_SEQ_S_MM |
5890 | 91.2k | 128U, // C_SF_D32 |
5891 | 91.2k | 128U, // C_SF_D32_MM |
5892 | 91.2k | 128U, // C_SF_D64 |
5893 | 91.2k | 128U, // C_SF_D64_MM |
5894 | 91.2k | 128U, // C_SF_S |
5895 | 91.2k | 128U, // C_SF_S_MM |
5896 | 91.2k | 128U, // C_UEQ_D32 |
5897 | 91.2k | 128U, // C_UEQ_D32_MM |
5898 | 91.2k | 128U, // C_UEQ_D64 |
5899 | 91.2k | 128U, // C_UEQ_D64_MM |
5900 | 91.2k | 128U, // C_UEQ_S |
5901 | 91.2k | 128U, // C_UEQ_S_MM |
5902 | 91.2k | 128U, // C_ULE_D32 |
5903 | 91.2k | 128U, // C_ULE_D32_MM |
5904 | 91.2k | 128U, // C_ULE_D64 |
5905 | 91.2k | 128U, // C_ULE_D64_MM |
5906 | 91.2k | 128U, // C_ULE_S |
5907 | 91.2k | 128U, // C_ULE_S_MM |
5908 | 91.2k | 128U, // C_ULT_D32 |
5909 | 91.2k | 128U, // C_ULT_D32_MM |
5910 | 91.2k | 128U, // C_ULT_D64 |
5911 | 91.2k | 128U, // C_ULT_D64_MM |
5912 | 91.2k | 128U, // C_ULT_S |
5913 | 91.2k | 128U, // C_ULT_S_MM |
5914 | 91.2k | 128U, // C_UN_D32 |
5915 | 91.2k | 128U, // C_UN_D32_MM |
5916 | 91.2k | 128U, // C_UN_D64 |
5917 | 91.2k | 128U, // C_UN_D64_MM |
5918 | 91.2k | 128U, // C_UN_S |
5919 | 91.2k | 128U, // C_UN_S_MM |
5920 | 91.2k | 0U, // CmpRxRy16 |
5921 | 91.2k | 1U, // CmpiRxImm16 |
5922 | 91.2k | 0U, // CmpiRxImmX16 |
5923 | 91.2k | 128U, // DADD |
5924 | 91.2k | 128U, // DADDi |
5925 | 91.2k | 128U, // DADDiu |
5926 | 91.2k | 128U, // DADDu |
5927 | 91.2k | 16U, // DAHI |
5928 | 91.2k | 3072U, // DALIGN |
5929 | 91.2k | 16U, // DATI |
5930 | 91.2k | 16U, // DAUI |
5931 | 91.2k | 0U, // DBITSWAP |
5932 | 91.2k | 0U, // DCLO |
5933 | 91.2k | 0U, // DCLO_R6 |
5934 | 91.2k | 0U, // DCLZ |
5935 | 91.2k | 0U, // DCLZ_R6 |
5936 | 91.2k | 128U, // DDIV |
5937 | 91.2k | 128U, // DDIVU |
5938 | 91.2k | 0U, // DERET |
5939 | 91.2k | 0U, // DERET_MM |
5940 | 91.2k | 0U, // DERET_MMR6 |
5941 | 91.2k | 0U, // DERET_NM |
5942 | 91.2k | 4128U, // DEXT |
5943 | 91.2k | 5152U, // DEXT64_32 |
5944 | 91.2k | 6168U, // DEXTM |
5945 | 91.2k | 452U, // DEXTU |
5946 | 91.2k | 0U, // DI |
5947 | 91.2k | 7200U, // DINS |
5948 | 91.2k | 8216U, // DINSM |
5949 | 91.2k | 580U, // DINSU |
5950 | 91.2k | 128U, // DIV |
5951 | 91.2k | 128U, // DIVU |
5952 | 91.2k | 128U, // DIVU_MMR6 |
5953 | 91.2k | 128U, // DIVU_NM |
5954 | 91.2k | 128U, // DIV_MMR6 |
5955 | 91.2k | 128U, // DIV_NM |
5956 | 91.2k | 128U, // DIV_S_B |
5957 | 91.2k | 128U, // DIV_S_D |
5958 | 91.2k | 128U, // DIV_S_H |
5959 | 91.2k | 128U, // DIV_S_W |
5960 | 91.2k | 128U, // DIV_U_B |
5961 | 91.2k | 128U, // DIV_U_D |
5962 | 91.2k | 128U, // DIV_U_H |
5963 | 91.2k | 128U, // DIV_U_W |
5964 | 91.2k | 0U, // DI_MM |
5965 | 91.2k | 0U, // DI_MMR6 |
5966 | 91.2k | 0U, // DI_NM |
5967 | 91.2k | 9216U, // DLSA |
5968 | 91.2k | 9216U, // DLSA_R6 |
5969 | 91.2k | 136U, // DMFC0 |
5970 | 91.2k | 0U, // DMFC1 |
5971 | 91.2k | 136U, // DMFC2 |
5972 | 91.2k | 0U, // DMFC2_OCTEON |
5973 | 91.2k | 136U, // DMFGC0 |
5974 | 91.2k | 128U, // DMOD |
5975 | 91.2k | 128U, // DMODU |
5976 | 91.2k | 0U, // DMT |
5977 | 91.2k | 0U, // DMTC0 |
5978 | 91.2k | 0U, // DMTC1 |
5979 | 91.2k | 0U, // DMTC2 |
5980 | 91.2k | 0U, // DMTC2_OCTEON |
5981 | 91.2k | 0U, // DMTGC0 |
5982 | 91.2k | 0U, // DMT_NM |
5983 | 91.2k | 128U, // DMUH |
5984 | 91.2k | 128U, // DMUHU |
5985 | 91.2k | 128U, // DMUL |
5986 | 91.2k | 0U, // DMULT |
5987 | 91.2k | 0U, // DMULTu |
5988 | 91.2k | 128U, // DMULU |
5989 | 91.2k | 128U, // DMUL_R6 |
5990 | 91.2k | 128U, // DOTP_S_D |
5991 | 91.2k | 128U, // DOTP_S_H |
5992 | 91.2k | 128U, // DOTP_S_W |
5993 | 91.2k | 128U, // DOTP_U_D |
5994 | 91.2k | 128U, // DOTP_U_H |
5995 | 91.2k | 128U, // DOTP_U_W |
5996 | 91.2k | 184U, // DPADD_S_D |
5997 | 91.2k | 184U, // DPADD_S_H |
5998 | 91.2k | 184U, // DPADD_S_W |
5999 | 91.2k | 184U, // DPADD_U_D |
6000 | 91.2k | 184U, // DPADD_U_H |
6001 | 91.2k | 184U, // DPADD_U_W |
6002 | 91.2k | 128U, // DPAQX_SA_W_PH |
6003 | 91.2k | 128U, // DPAQX_SA_W_PH_MMR2 |
6004 | 91.2k | 128U, // DPAQX_S_W_PH |
6005 | 91.2k | 128U, // DPAQX_S_W_PH_MMR2 |
6006 | 91.2k | 128U, // DPAQ_SA_L_W |
6007 | 91.2k | 128U, // DPAQ_SA_L_W_MM |
6008 | 91.2k | 128U, // DPAQ_S_W_PH |
6009 | 91.2k | 128U, // DPAQ_S_W_PH_MM |
6010 | 91.2k | 128U, // DPAU_H_QBL |
6011 | 91.2k | 128U, // DPAU_H_QBL_MM |
6012 | 91.2k | 128U, // DPAU_H_QBR |
6013 | 91.2k | 128U, // DPAU_H_QBR_MM |
6014 | 91.2k | 128U, // DPAX_W_PH |
6015 | 91.2k | 128U, // DPAX_W_PH_MMR2 |
6016 | 91.2k | 128U, // DPA_W_PH |
6017 | 91.2k | 128U, // DPA_W_PH_MMR2 |
6018 | 91.2k | 0U, // DPOP |
6019 | 91.2k | 128U, // DPSQX_SA_W_PH |
6020 | 91.2k | 128U, // DPSQX_SA_W_PH_MMR2 |
6021 | 91.2k | 128U, // DPSQX_S_W_PH |
6022 | 91.2k | 128U, // DPSQX_S_W_PH_MMR2 |
6023 | 91.2k | 128U, // DPSQ_SA_L_W |
6024 | 91.2k | 128U, // DPSQ_SA_L_W_MM |
6025 | 91.2k | 128U, // DPSQ_S_W_PH |
6026 | 91.2k | 128U, // DPSQ_S_W_PH_MM |
6027 | 91.2k | 184U, // DPSUB_S_D |
6028 | 91.2k | 184U, // DPSUB_S_H |
6029 | 91.2k | 184U, // DPSUB_S_W |
6030 | 91.2k | 184U, // DPSUB_U_D |
6031 | 91.2k | 184U, // DPSUB_U_H |
6032 | 91.2k | 184U, // DPSUB_U_W |
6033 | 91.2k | 128U, // DPSU_H_QBL |
6034 | 91.2k | 128U, // DPSU_H_QBL_MM |
6035 | 91.2k | 128U, // DPSU_H_QBR |
6036 | 91.2k | 128U, // DPSU_H_QBR_MM |
6037 | 91.2k | 128U, // DPSX_W_PH |
6038 | 91.2k | 128U, // DPSX_W_PH_MMR2 |
6039 | 91.2k | 128U, // DPS_W_PH |
6040 | 91.2k | 128U, // DPS_W_PH_MMR2 |
6041 | 91.2k | 160U, // DROTR |
6042 | 91.2k | 152U, // DROTR32 |
6043 | 91.2k | 128U, // DROTRV |
6044 | 91.2k | 0U, // DSBH |
6045 | 91.2k | 0U, // DSDIV |
6046 | 91.2k | 0U, // DSHD |
6047 | 91.2k | 160U, // DSLL |
6048 | 91.2k | 152U, // DSLL32 |
6049 | 91.2k | 1U, // DSLL64_32 |
6050 | 91.2k | 128U, // DSLLV |
6051 | 91.2k | 160U, // DSRA |
6052 | 91.2k | 152U, // DSRA32 |
6053 | 91.2k | 128U, // DSRAV |
6054 | 91.2k | 160U, // DSRL |
6055 | 91.2k | 152U, // DSRL32 |
6056 | 91.2k | 128U, // DSRLV |
6057 | 91.2k | 128U, // DSUB |
6058 | 91.2k | 128U, // DSUBu |
6059 | 91.2k | 0U, // DUDIV |
6060 | 91.2k | 0U, // DVP |
6061 | 91.2k | 0U, // DVPE |
6062 | 91.2k | 0U, // DVPE_NM |
6063 | 91.2k | 0U, // DVP_MMR6 |
6064 | 91.2k | 0U, // DivRxRy16 |
6065 | 91.2k | 0U, // DivuRxRy16 |
6066 | 91.2k | 0U, // EHB |
6067 | 91.2k | 0U, // EHB_MM |
6068 | 91.2k | 0U, // EHB_MMR6 |
6069 | 91.2k | 0U, // EHB_NM |
6070 | 91.2k | 0U, // EI |
6071 | 91.2k | 0U, // EI_MM |
6072 | 91.2k | 0U, // EI_MMR6 |
6073 | 91.2k | 0U, // EI_NM |
6074 | 91.2k | 0U, // EMT |
6075 | 91.2k | 0U, // EMT_NM |
6076 | 91.2k | 0U, // ERET |
6077 | 91.2k | 0U, // ERETNC |
6078 | 91.2k | 0U, // ERETNC_MMR6 |
6079 | 91.2k | 0U, // ERETNC_NM |
6080 | 91.2k | 0U, // ERET_MM |
6081 | 91.2k | 0U, // ERET_MMR6 |
6082 | 91.2k | 0U, // ERET_NM |
6083 | 91.2k | 0U, // EVP |
6084 | 91.2k | 0U, // EVPE |
6085 | 91.2k | 0U, // EVPE_NM |
6086 | 91.2k | 0U, // EVP_MMR6 |
6087 | 91.2k | 5144U, // EXT |
6088 | 91.2k | 152U, // EXTP |
6089 | 91.2k | 152U, // EXTPDP |
6090 | 91.2k | 128U, // EXTPDPV |
6091 | 91.2k | 128U, // EXTPDPV_MM |
6092 | 91.2k | 152U, // EXTPDP_MM |
6093 | 91.2k | 128U, // EXTPV |
6094 | 91.2k | 128U, // EXTPV_MM |
6095 | 91.2k | 152U, // EXTP_MM |
6096 | 91.2k | 128U, // EXTRV_RS_W |
6097 | 91.2k | 128U, // EXTRV_RS_W_MM |
6098 | 91.2k | 128U, // EXTRV_R_W |
6099 | 91.2k | 128U, // EXTRV_R_W_MM |
6100 | 91.2k | 128U, // EXTRV_S_H |
6101 | 91.2k | 128U, // EXTRV_S_H_MM |
6102 | 91.2k | 128U, // EXTRV_W |
6103 | 91.2k | 128U, // EXTRV_W_MM |
6104 | 91.2k | 152U, // EXTR_RS_W |
6105 | 91.2k | 152U, // EXTR_RS_W_MM |
6106 | 91.2k | 152U, // EXTR_R_W |
6107 | 91.2k | 152U, // EXTR_R_W_MM |
6108 | 91.2k | 152U, // EXTR_S_H |
6109 | 91.2k | 152U, // EXTR_S_H_MM |
6110 | 91.2k | 152U, // EXTR_W |
6111 | 91.2k | 152U, // EXTR_W_MM |
6112 | 91.2k | 2072U, // EXTS |
6113 | 91.2k | 2072U, // EXTS32 |
6114 | 91.2k | 2048U, // EXTW_NM |
6115 | 91.2k | 5144U, // EXT_MM |
6116 | 91.2k | 5144U, // EXT_MMR6 |
6117 | 91.2k | 5144U, // EXT_NM |
6118 | 91.2k | 0U, // FABS_D32 |
6119 | 91.2k | 0U, // FABS_D32_MM |
6120 | 91.2k | 0U, // FABS_D64 |
6121 | 91.2k | 0U, // FABS_D64_MM |
6122 | 91.2k | 0U, // FABS_S |
6123 | 91.2k | 0U, // FABS_S_MM |
6124 | 91.2k | 128U, // FADD_D |
6125 | 91.2k | 128U, // FADD_D32 |
6126 | 91.2k | 128U, // FADD_D32_MM |
6127 | 91.2k | 128U, // FADD_D64 |
6128 | 91.2k | 128U, // FADD_D64_MM |
6129 | 91.2k | 128U, // FADD_PS64 |
6130 | 91.2k | 128U, // FADD_S |
6131 | 91.2k | 128U, // FADD_S_MM |
6132 | 91.2k | 72U, // FADD_S_MMR6 |
6133 | 91.2k | 128U, // FADD_W |
6134 | 91.2k | 128U, // FCAF_D |
6135 | 91.2k | 128U, // FCAF_W |
6136 | 91.2k | 128U, // FCEQ_D |
6137 | 91.2k | 128U, // FCEQ_W |
6138 | 91.2k | 0U, // FCLASS_D |
6139 | 91.2k | 0U, // FCLASS_W |
6140 | 91.2k | 128U, // FCLE_D |
6141 | 91.2k | 128U, // FCLE_W |
6142 | 91.2k | 128U, // FCLT_D |
6143 | 91.2k | 128U, // FCLT_W |
6144 | 91.2k | 0U, // FCMP_D32 |
6145 | 91.2k | 0U, // FCMP_D32_MM |
6146 | 91.2k | 0U, // FCMP_D64 |
6147 | 91.2k | 0U, // FCMP_S32 |
6148 | 91.2k | 0U, // FCMP_S32_MM |
6149 | 91.2k | 128U, // FCNE_D |
6150 | 91.2k | 128U, // FCNE_W |
6151 | 91.2k | 128U, // FCOR_D |
6152 | 91.2k | 128U, // FCOR_W |
6153 | 91.2k | 128U, // FCUEQ_D |
6154 | 91.2k | 128U, // FCUEQ_W |
6155 | 91.2k | 128U, // FCULE_D |
6156 | 91.2k | 128U, // FCULE_W |
6157 | 91.2k | 128U, // FCULT_D |
6158 | 91.2k | 128U, // FCULT_W |
6159 | 91.2k | 128U, // FCUNE_D |
6160 | 91.2k | 128U, // FCUNE_W |
6161 | 91.2k | 128U, // FCUN_D |
6162 | 91.2k | 128U, // FCUN_W |
6163 | 91.2k | 128U, // FDIV_D |
6164 | 91.2k | 128U, // FDIV_D32 |
6165 | 91.2k | 128U, // FDIV_D32_MM |
6166 | 91.2k | 128U, // FDIV_D64 |
6167 | 91.2k | 128U, // FDIV_D64_MM |
6168 | 91.2k | 128U, // FDIV_S |
6169 | 91.2k | 128U, // FDIV_S_MM |
6170 | 91.2k | 72U, // FDIV_S_MMR6 |
6171 | 91.2k | 128U, // FDIV_W |
6172 | 91.2k | 128U, // FEXDO_H |
6173 | 91.2k | 128U, // FEXDO_W |
6174 | 91.2k | 128U, // FEXP2_D |
6175 | 91.2k | 128U, // FEXP2_W |
6176 | 91.2k | 0U, // FEXUPL_D |
6177 | 91.2k | 0U, // FEXUPL_W |
6178 | 91.2k | 0U, // FEXUPR_D |
6179 | 91.2k | 0U, // FEXUPR_W |
6180 | 91.2k | 0U, // FFINT_S_D |
6181 | 91.2k | 0U, // FFINT_S_W |
6182 | 91.2k | 0U, // FFINT_U_D |
6183 | 91.2k | 0U, // FFINT_U_W |
6184 | 91.2k | 0U, // FFQL_D |
6185 | 91.2k | 0U, // FFQL_W |
6186 | 91.2k | 0U, // FFQR_D |
6187 | 91.2k | 0U, // FFQR_W |
6188 | 91.2k | 0U, // FILL_B |
6189 | 91.2k | 0U, // FILL_D |
6190 | 91.2k | 0U, // FILL_H |
6191 | 91.2k | 0U, // FILL_W |
6192 | 91.2k | 0U, // FLOG2_D |
6193 | 91.2k | 0U, // FLOG2_W |
6194 | 91.2k | 0U, // FLOOR_L_D64 |
6195 | 91.2k | 0U, // FLOOR_L_D_MMR6 |
6196 | 91.2k | 0U, // FLOOR_L_S |
6197 | 91.2k | 0U, // FLOOR_L_S_MMR6 |
6198 | 91.2k | 0U, // FLOOR_W_D32 |
6199 | 91.2k | 0U, // FLOOR_W_D64 |
6200 | 91.2k | 0U, // FLOOR_W_D_MMR6 |
6201 | 91.2k | 0U, // FLOOR_W_MM |
6202 | 91.2k | 0U, // FLOOR_W_S |
6203 | 91.2k | 0U, // FLOOR_W_S_MM |
6204 | 91.2k | 0U, // FLOOR_W_S_MMR6 |
6205 | 91.2k | 184U, // FMADD_D |
6206 | 91.2k | 184U, // FMADD_W |
6207 | 91.2k | 128U, // FMAX_A_D |
6208 | 91.2k | 128U, // FMAX_A_W |
6209 | 91.2k | 128U, // FMAX_D |
6210 | 91.2k | 128U, // FMAX_W |
6211 | 91.2k | 128U, // FMIN_A_D |
6212 | 91.2k | 128U, // FMIN_A_W |
6213 | 91.2k | 128U, // FMIN_D |
6214 | 91.2k | 128U, // FMIN_W |
6215 | 91.2k | 0U, // FMOV_D32 |
6216 | 91.2k | 0U, // FMOV_D32_MM |
6217 | 91.2k | 0U, // FMOV_D64 |
6218 | 91.2k | 0U, // FMOV_D64_MM |
6219 | 91.2k | 0U, // FMOV_D_MMR6 |
6220 | 91.2k | 0U, // FMOV_S |
6221 | 91.2k | 0U, // FMOV_S_MM |
6222 | 91.2k | 0U, // FMOV_S_MMR6 |
6223 | 91.2k | 184U, // FMSUB_D |
6224 | 91.2k | 184U, // FMSUB_W |
6225 | 91.2k | 128U, // FMUL_D |
6226 | 91.2k | 128U, // FMUL_D32 |
6227 | 91.2k | 128U, // FMUL_D32_MM |
6228 | 91.2k | 128U, // FMUL_D64 |
6229 | 91.2k | 128U, // FMUL_D64_MM |
6230 | 91.2k | 128U, // FMUL_PS64 |
6231 | 91.2k | 128U, // FMUL_S |
6232 | 91.2k | 128U, // FMUL_S_MM |
6233 | 91.2k | 72U, // FMUL_S_MMR6 |
6234 | 91.2k | 128U, // FMUL_W |
6235 | 91.2k | 0U, // FNEG_D32 |
6236 | 91.2k | 0U, // FNEG_D32_MM |
6237 | 91.2k | 0U, // FNEG_D64 |
6238 | 91.2k | 0U, // FNEG_D64_MM |
6239 | 91.2k | 0U, // FNEG_S |
6240 | 91.2k | 0U, // FNEG_S_MM |
6241 | 91.2k | 0U, // FNEG_S_MMR6 |
6242 | 91.2k | 1U, // FORK |
6243 | 91.2k | 1U, // FORK_NM |
6244 | 91.2k | 0U, // FRCP_D |
6245 | 91.2k | 0U, // FRCP_W |
6246 | 91.2k | 0U, // FRINT_D |
6247 | 91.2k | 0U, // FRINT_W |
6248 | 91.2k | 0U, // FRSQRT_D |
6249 | 91.2k | 0U, // FRSQRT_W |
6250 | 91.2k | 128U, // FSAF_D |
6251 | 91.2k | 128U, // FSAF_W |
6252 | 91.2k | 128U, // FSEQ_D |
6253 | 91.2k | 128U, // FSEQ_W |
6254 | 91.2k | 128U, // FSLE_D |
6255 | 91.2k | 128U, // FSLE_W |
6256 | 91.2k | 128U, // FSLT_D |
6257 | 91.2k | 128U, // FSLT_W |
6258 | 91.2k | 128U, // FSNE_D |
6259 | 91.2k | 128U, // FSNE_W |
6260 | 91.2k | 128U, // FSOR_D |
6261 | 91.2k | 128U, // FSOR_W |
6262 | 91.2k | 0U, // FSQRT_D |
6263 | 91.2k | 0U, // FSQRT_D32 |
6264 | 91.2k | 0U, // FSQRT_D32_MM |
6265 | 91.2k | 0U, // FSQRT_D64 |
6266 | 91.2k | 0U, // FSQRT_D64_MM |
6267 | 91.2k | 0U, // FSQRT_S |
6268 | 91.2k | 0U, // FSQRT_S_MM |
6269 | 91.2k | 0U, // FSQRT_W |
6270 | 91.2k | 128U, // FSUB_D |
6271 | 91.2k | 128U, // FSUB_D32 |
6272 | 91.2k | 128U, // FSUB_D32_MM |
6273 | 91.2k | 128U, // FSUB_D64 |
6274 | 91.2k | 128U, // FSUB_D64_MM |
6275 | 91.2k | 128U, // FSUB_PS64 |
6276 | 91.2k | 128U, // FSUB_S |
6277 | 91.2k | 128U, // FSUB_S_MM |
6278 | 91.2k | 72U, // FSUB_S_MMR6 |
6279 | 91.2k | 128U, // FSUB_W |
6280 | 91.2k | 128U, // FSUEQ_D |
6281 | 91.2k | 128U, // FSUEQ_W |
6282 | 91.2k | 128U, // FSULE_D |
6283 | 91.2k | 128U, // FSULE_W |
6284 | 91.2k | 128U, // FSULT_D |
6285 | 91.2k | 128U, // FSULT_W |
6286 | 91.2k | 128U, // FSUNE_D |
6287 | 91.2k | 128U, // FSUNE_W |
6288 | 91.2k | 128U, // FSUN_D |
6289 | 91.2k | 128U, // FSUN_W |
6290 | 91.2k | 0U, // FTINT_S_D |
6291 | 91.2k | 0U, // FTINT_S_W |
6292 | 91.2k | 0U, // FTINT_U_D |
6293 | 91.2k | 0U, // FTINT_U_W |
6294 | 91.2k | 128U, // FTQ_H |
6295 | 91.2k | 128U, // FTQ_W |
6296 | 91.2k | 0U, // FTRUNC_S_D |
6297 | 91.2k | 0U, // FTRUNC_S_W |
6298 | 91.2k | 0U, // FTRUNC_U_D |
6299 | 91.2k | 0U, // FTRUNC_U_W |
6300 | 91.2k | 0U, // GINVI |
6301 | 91.2k | 0U, // GINVI_MMR6 |
6302 | 91.2k | 0U, // GINVI_NM |
6303 | 91.2k | 0U, // GINVT |
6304 | 91.2k | 0U, // GINVT_MMR6 |
6305 | 91.2k | 0U, // GINVT_NM |
6306 | 91.2k | 128U, // HADD_S_D |
6307 | 91.2k | 128U, // HADD_S_H |
6308 | 91.2k | 128U, // HADD_S_W |
6309 | 91.2k | 128U, // HADD_U_D |
6310 | 91.2k | 128U, // HADD_U_H |
6311 | 91.2k | 128U, // HADD_U_W |
6312 | 91.2k | 128U, // HSUB_S_D |
6313 | 91.2k | 128U, // HSUB_S_H |
6314 | 91.2k | 128U, // HSUB_S_W |
6315 | 91.2k | 128U, // HSUB_U_D |
6316 | 91.2k | 128U, // HSUB_U_H |
6317 | 91.2k | 128U, // HSUB_U_W |
6318 | 91.2k | 0U, // HYPCALL |
6319 | 91.2k | 0U, // HYPCALL_MM |
6320 | 91.2k | 128U, // ILVEV_B |
6321 | 91.2k | 128U, // ILVEV_D |
6322 | 91.2k | 128U, // ILVEV_H |
6323 | 91.2k | 128U, // ILVEV_W |
6324 | 91.2k | 128U, // ILVL_B |
6325 | 91.2k | 128U, // ILVL_D |
6326 | 91.2k | 128U, // ILVL_H |
6327 | 91.2k | 128U, // ILVL_W |
6328 | 91.2k | 128U, // ILVOD_B |
6329 | 91.2k | 128U, // ILVOD_D |
6330 | 91.2k | 128U, // ILVOD_H |
6331 | 91.2k | 128U, // ILVOD_W |
6332 | 91.2k | 128U, // ILVR_B |
6333 | 91.2k | 128U, // ILVR_D |
6334 | 91.2k | 128U, // ILVR_H |
6335 | 91.2k | 128U, // ILVR_W |
6336 | 91.2k | 7192U, // INS |
6337 | 91.2k | 0U, // INSERT_B |
6338 | 91.2k | 0U, // INSERT_D |
6339 | 91.2k | 0U, // INSERT_H |
6340 | 91.2k | 0U, // INSERT_W |
6341 | 91.2k | 0U, // INSV |
6342 | 91.2k | 0U, // INSVE_B |
6343 | 91.2k | 0U, // INSVE_D |
6344 | 91.2k | 0U, // INSVE_H |
6345 | 91.2k | 0U, // INSVE_W |
6346 | 91.2k | 0U, // INSV_MM |
6347 | 91.2k | 7192U, // INS_MM |
6348 | 91.2k | 7192U, // INS_MMR6 |
6349 | 91.2k | 7192U, // INS_NM |
6350 | 91.2k | 0U, // J |
6351 | 91.2k | 0U, // JAL |
6352 | 91.2k | 0U, // JALR |
6353 | 91.2k | 0U, // JALR16_MM |
6354 | 91.2k | 0U, // JALR64 |
6355 | 91.2k | 0U, // JALRC16_MMR6 |
6356 | 91.2k | 0U, // JALRC16_NM |
6357 | 91.2k | 0U, // JALRCHB_NM |
6358 | 91.2k | 0U, // JALRC_HB_MMR6 |
6359 | 91.2k | 0U, // JALRC_MMR6 |
6360 | 91.2k | 0U, // JALRC_NM |
6361 | 91.2k | 0U, // JALRS16_MM |
6362 | 91.2k | 0U, // JALRS_MM |
6363 | 91.2k | 0U, // JALR_HB |
6364 | 91.2k | 0U, // JALR_HB64 |
6365 | 91.2k | 0U, // JALR_MM |
6366 | 91.2k | 0U, // JALS_MM |
6367 | 91.2k | 0U, // JALX |
6368 | 91.2k | 0U, // JALX_MM |
6369 | 91.2k | 0U, // JAL_MM |
6370 | 91.2k | 0U, // JIALC |
6371 | 91.2k | 0U, // JIALC64 |
6372 | 91.2k | 0U, // JIALC_MMR6 |
6373 | 91.2k | 0U, // JIC |
6374 | 91.2k | 0U, // JIC64 |
6375 | 91.2k | 0U, // JIC_MMR6 |
6376 | 91.2k | 0U, // JR |
6377 | 91.2k | 0U, // JR16_MM |
6378 | 91.2k | 0U, // JR64 |
6379 | 91.2k | 0U, // JRADDIUSP |
6380 | 91.2k | 0U, // JRC16_MM |
6381 | 91.2k | 0U, // JRC16_MMR6 |
6382 | 91.2k | 0U, // JRCADDIUSP_MMR6 |
6383 | 91.2k | 0U, // JRC_NM |
6384 | 91.2k | 0U, // JR_HB |
6385 | 91.2k | 0U, // JR_HB64 |
6386 | 91.2k | 0U, // JR_HB64_R6 |
6387 | 91.2k | 0U, // JR_HB_R6 |
6388 | 91.2k | 0U, // JR_MM |
6389 | 91.2k | 0U, // J_MM |
6390 | 91.2k | 0U, // Jal16 |
6391 | 91.2k | 0U, // JalB16 |
6392 | 91.2k | 0U, // JrRa16 |
6393 | 91.2k | 0U, // JrcRa16 |
6394 | 91.2k | 0U, // JrcRx16 |
6395 | 91.2k | 0U, // JumpLinkReg16 |
6396 | 91.2k | 0U, // LAPC32_NM |
6397 | 91.2k | 0U, // LAPC48_NM |
6398 | 91.2k | 0U, // LB |
6399 | 91.2k | 0U, // LB16_NM |
6400 | 91.2k | 0U, // LB64 |
6401 | 91.2k | 0U, // LBE |
6402 | 91.2k | 0U, // LBE_MM |
6403 | 91.2k | 0U, // LBGP_NM |
6404 | 91.2k | 0U, // LBU16_MM |
6405 | 91.2k | 0U, // LBU16_NM |
6406 | 91.2k | 0U, // LBUGP_NM |
6407 | 91.2k | 1U, // LBUX |
6408 | 91.2k | 1U, // LBUX_MM |
6409 | 91.2k | 0U, // LBUX_NM |
6410 | 91.2k | 0U, // LBU_MMR6 |
6411 | 91.2k | 0U, // LBU_NM |
6412 | 91.2k | 0U, // LBUs9_NM |
6413 | 91.2k | 0U, // LBX_NM |
6414 | 91.2k | 0U, // LB_MM |
6415 | 91.2k | 0U, // LB_MMR6 |
6416 | 91.2k | 0U, // LB_NM |
6417 | 91.2k | 0U, // LBs9_NM |
6418 | 91.2k | 0U, // LBu |
6419 | 91.2k | 0U, // LBu64 |
6420 | 91.2k | 0U, // LBuE |
6421 | 91.2k | 0U, // LBuE_MM |
6422 | 91.2k | 0U, // LBu_MM |
6423 | 91.2k | 0U, // LD |
6424 | 91.2k | 0U, // LDC1 |
6425 | 91.2k | 0U, // LDC164 |
6426 | 91.2k | 0U, // LDC1_D64_MMR6 |
6427 | 91.2k | 0U, // LDC1_MM_D32 |
6428 | 91.2k | 0U, // LDC1_MM_D64 |
6429 | 91.2k | 0U, // LDC2 |
6430 | 91.2k | 0U, // LDC2_MMR6 |
6431 | 91.2k | 0U, // LDC2_R6 |
6432 | 91.2k | 0U, // LDC3 |
6433 | 91.2k | 0U, // LDI_B |
6434 | 91.2k | 0U, // LDI_D |
6435 | 91.2k | 0U, // LDI_H |
6436 | 91.2k | 0U, // LDI_W |
6437 | 91.2k | 0U, // LDL |
6438 | 91.2k | 0U, // LDPC |
6439 | 91.2k | 0U, // LDR |
6440 | 91.2k | 1U, // LDXC1 |
6441 | 91.2k | 1U, // LDXC164 |
6442 | 91.2k | 0U, // LD_B |
6443 | 91.2k | 0U, // LD_D |
6444 | 91.2k | 0U, // LD_H |
6445 | 91.2k | 0U, // LD_W |
6446 | 91.2k | 0U, // LEA_ADDIU_NM |
6447 | 91.2k | 0U, // LEA_ADDiu |
6448 | 91.2k | 0U, // LEA_ADDiu64 |
6449 | 91.2k | 0U, // LEA_ADDiu_MM |
6450 | 91.2k | 0U, // LH |
6451 | 91.2k | 0U, // LH16_NM |
6452 | 91.2k | 0U, // LH64 |
6453 | 91.2k | 0U, // LHE |
6454 | 91.2k | 0U, // LHE_MM |
6455 | 91.2k | 0U, // LHGP_NM |
6456 | 91.2k | 0U, // LHU16_MM |
6457 | 91.2k | 0U, // LHU16_NM |
6458 | 91.2k | 0U, // LHUGP_NM |
6459 | 91.2k | 0U, // LHUXS_NM |
6460 | 91.2k | 0U, // LHUX_NM |
6461 | 91.2k | 0U, // LHU_NM |
6462 | 91.2k | 0U, // LHUs9_NM |
6463 | 91.2k | 1U, // LHX |
6464 | 91.2k | 0U, // LHXS_NM |
6465 | 91.2k | 1U, // LHX_MM |
6466 | 91.2k | 0U, // LHX_NM |
6467 | 91.2k | 0U, // LH_MM |
6468 | 91.2k | 0U, // LH_NM |
6469 | 91.2k | 0U, // LHs9_NM |
6470 | 91.2k | 0U, // LHu |
6471 | 91.2k | 0U, // LHu64 |
6472 | 91.2k | 0U, // LHuE |
6473 | 91.2k | 0U, // LHuE_MM |
6474 | 91.2k | 0U, // LHu_MM |
6475 | 91.2k | 0U, // LI16_MM |
6476 | 91.2k | 0U, // LI16_MMR6 |
6477 | 91.2k | 0U, // LI16_NM |
6478 | 91.2k | 0U, // LI48_NM |
6479 | 91.2k | 0U, // LL |
6480 | 91.2k | 0U, // LL64 |
6481 | 91.2k | 0U, // LL64_R6 |
6482 | 91.2k | 0U, // LLD |
6483 | 91.2k | 0U, // LLD_R6 |
6484 | 91.2k | 0U, // LLE |
6485 | 91.2k | 0U, // LLE_MM |
6486 | 91.2k | 76U, // LLWP_NM |
6487 | 91.2k | 0U, // LL_MM |
6488 | 91.2k | 0U, // LL_MMR6 |
6489 | 91.2k | 0U, // LL_NM |
6490 | 91.2k | 0U, // LL_R6 |
6491 | 91.2k | 9216U, // LSA |
6492 | 91.2k | 1U, // LSA_MMR6 |
6493 | 91.2k | 1024U, // LSA_NM |
6494 | 91.2k | 9216U, // LSA_R6 |
6495 | 91.2k | 0U, // LUI_MMR6 |
6496 | 91.2k | 0U, // LUI_NM |
6497 | 91.2k | 1U, // LUXC1 |
6498 | 91.2k | 1U, // LUXC164 |
6499 | 91.2k | 1U, // LUXC1_MM |
6500 | 91.2k | 0U, // LUi |
6501 | 91.2k | 0U, // LUi64 |
6502 | 91.2k | 0U, // LUi_MM |
6503 | 91.2k | 0U, // LW |
6504 | 91.2k | 0U, // LW16_MM |
6505 | 91.2k | 0U, // LW16_NM |
6506 | 91.2k | 0U, // LW4x4_NM |
6507 | 91.2k | 0U, // LW64 |
6508 | 91.2k | 0U, // LWC1 |
6509 | 91.2k | 0U, // LWC1_MM |
6510 | 91.2k | 0U, // LWC2 |
6511 | 91.2k | 0U, // LWC2_MMR6 |
6512 | 91.2k | 0U, // LWC2_R6 |
6513 | 91.2k | 0U, // LWC3 |
6514 | 91.2k | 0U, // LWDSP |
6515 | 91.2k | 0U, // LWDSP_MM |
6516 | 91.2k | 0U, // LWE |
6517 | 91.2k | 0U, // LWE_MM |
6518 | 91.2k | 0U, // LWGP16_NM |
6519 | 91.2k | 0U, // LWGP_MM |
6520 | 91.2k | 0U, // LWGP_NM |
6521 | 91.2k | 0U, // LWL |
6522 | 91.2k | 0U, // LWL64 |
6523 | 91.2k | 0U, // LWLE |
6524 | 91.2k | 0U, // LWLE_MM |
6525 | 91.2k | 0U, // LWL_MM |
6526 | 91.2k | 0U, // LWM16_MM |
6527 | 91.2k | 0U, // LWM16_MMR6 |
6528 | 91.2k | 0U, // LWM32_MM |
6529 | 91.2k | 184U, // LWM_NM |
6530 | 91.2k | 0U, // LWPC |
6531 | 91.2k | 0U, // LWPC_MMR6 |
6532 | 91.2k | 0U, // LWPC_NM |
6533 | 91.2k | 0U, // LWP_MM |
6534 | 91.2k | 0U, // LWR |
6535 | 91.2k | 0U, // LWR64 |
6536 | 91.2k | 0U, // LWRE |
6537 | 91.2k | 0U, // LWRE_MM |
6538 | 91.2k | 0U, // LWR_MM |
6539 | 91.2k | 0U, // LWSP16_NM |
6540 | 91.2k | 0U, // LWSP_MM |
6541 | 91.2k | 0U, // LWUPC |
6542 | 91.2k | 0U, // LWU_MM |
6543 | 91.2k | 1U, // LWX |
6544 | 91.2k | 1U, // LWXC1 |
6545 | 91.2k | 1U, // LWXC1_MM |
6546 | 91.2k | 0U, // LWXS16_NM |
6547 | 91.2k | 1U, // LWXS_MM |
6548 | 91.2k | 0U, // LWXS_NM |
6549 | 91.2k | 1U, // LWX_MM |
6550 | 91.2k | 0U, // LWX_NM |
6551 | 91.2k | 0U, // LW_MM |
6552 | 91.2k | 0U, // LW_MMR6 |
6553 | 91.2k | 0U, // LW_NM |
6554 | 91.2k | 0U, // LWs9_NM |
6555 | 91.2k | 0U, // LWu |
6556 | 91.2k | 0U, // LbRxRyOffMemX16 |
6557 | 91.2k | 0U, // LbuRxRyOffMemX16 |
6558 | 91.2k | 0U, // LhRxRyOffMemX16 |
6559 | 91.2k | 0U, // LhuRxRyOffMemX16 |
6560 | 91.2k | 1U, // LiRxImm16 |
6561 | 91.2k | 0U, // LiRxImmAlignX16 |
6562 | 91.2k | 0U, // LiRxImmX16 |
6563 | 91.2k | 1U, // LwRxPcTcp16 |
6564 | 91.2k | 0U, // LwRxPcTcpX16 |
6565 | 91.2k | 0U, // LwRxRyOffMemX16 |
6566 | 91.2k | 0U, // LwRxSpImmX16 |
6567 | 91.2k | 0U, // MADD |
6568 | 91.2k | 184U, // MADDF_D |
6569 | 91.2k | 184U, // MADDF_D_MMR6 |
6570 | 91.2k | 184U, // MADDF_S |
6571 | 91.2k | 184U, // MADDF_S_MMR6 |
6572 | 91.2k | 184U, // MADDR_Q_H |
6573 | 91.2k | 184U, // MADDR_Q_W |
6574 | 91.2k | 0U, // MADDU |
6575 | 91.2k | 128U, // MADDU_DSP |
6576 | 91.2k | 128U, // MADDU_DSP_MM |
6577 | 91.2k | 0U, // MADDU_MM |
6578 | 91.2k | 184U, // MADDV_B |
6579 | 91.2k | 184U, // MADDV_D |
6580 | 91.2k | 184U, // MADDV_H |
6581 | 91.2k | 184U, // MADDV_W |
6582 | 91.2k | 0U, // MADD_D32 |
6583 | 91.2k | 0U, // MADD_D32_MM |
6584 | 91.2k | 0U, // MADD_D64 |
6585 | 91.2k | 128U, // MADD_DSP |
6586 | 91.2k | 128U, // MADD_DSP_MM |
6587 | 91.2k | 0U, // MADD_MM |
6588 | 91.2k | 184U, // MADD_Q_H |
6589 | 91.2k | 184U, // MADD_Q_W |
6590 | 91.2k | 0U, // MADD_S |
6591 | 91.2k | 0U, // MADD_S_MM |
6592 | 91.2k | 128U, // MAQ_SA_W_PHL |
6593 | 91.2k | 128U, // MAQ_SA_W_PHL_MM |
6594 | 91.2k | 128U, // MAQ_SA_W_PHR |
6595 | 91.2k | 128U, // MAQ_SA_W_PHR_MM |
6596 | 91.2k | 128U, // MAQ_S_W_PHL |
6597 | 91.2k | 128U, // MAQ_S_W_PHL_MM |
6598 | 91.2k | 128U, // MAQ_S_W_PHR |
6599 | 91.2k | 128U, // MAQ_S_W_PHR_MM |
6600 | 91.2k | 128U, // MAXA_D |
6601 | 91.2k | 128U, // MAXA_D_MMR6 |
6602 | 91.2k | 128U, // MAXA_S |
6603 | 91.2k | 128U, // MAXA_S_MMR6 |
6604 | 91.2k | 128U, // MAXI_S_B |
6605 | 91.2k | 128U, // MAXI_S_D |
6606 | 91.2k | 128U, // MAXI_S_H |
6607 | 91.2k | 128U, // MAXI_S_W |
6608 | 91.2k | 152U, // MAXI_U_B |
6609 | 91.2k | 152U, // MAXI_U_D |
6610 | 91.2k | 152U, // MAXI_U_H |
6611 | 91.2k | 152U, // MAXI_U_W |
6612 | 91.2k | 128U, // MAX_A_B |
6613 | 91.2k | 128U, // MAX_A_D |
6614 | 91.2k | 128U, // MAX_A_H |
6615 | 91.2k | 128U, // MAX_A_W |
6616 | 91.2k | 128U, // MAX_D |
6617 | 91.2k | 128U, // MAX_D_MMR6 |
6618 | 91.2k | 128U, // MAX_S |
6619 | 91.2k | 128U, // MAX_S_B |
6620 | 91.2k | 128U, // MAX_S_D |
6621 | 91.2k | 128U, // MAX_S_H |
6622 | 91.2k | 128U, // MAX_S_MMR6 |
6623 | 91.2k | 128U, // MAX_S_W |
6624 | 91.2k | 128U, // MAX_U_B |
6625 | 91.2k | 128U, // MAX_U_D |
6626 | 91.2k | 128U, // MAX_U_H |
6627 | 91.2k | 128U, // MAX_U_W |
6628 | 91.2k | 136U, // MFC0 |
6629 | 91.2k | 0U, // MFC0Sel_NM |
6630 | 91.2k | 136U, // MFC0_MMR6 |
6631 | 91.2k | 152U, // MFC0_NM |
6632 | 91.2k | 0U, // MFC1 |
6633 | 91.2k | 0U, // MFC1_D64 |
6634 | 91.2k | 0U, // MFC1_MM |
6635 | 91.2k | 0U, // MFC1_MMR6 |
6636 | 91.2k | 136U, // MFC2 |
6637 | 91.2k | 0U, // MFC2_MMR6 |
6638 | 91.2k | 136U, // MFGC0 |
6639 | 91.2k | 136U, // MFGC0_MM |
6640 | 91.2k | 0U, // MFHC0Sel_NM |
6641 | 91.2k | 136U, // MFHC0_MMR6 |
6642 | 91.2k | 152U, // MFHC0_NM |
6643 | 91.2k | 0U, // MFHC1_D32 |
6644 | 91.2k | 0U, // MFHC1_D32_MM |
6645 | 91.2k | 0U, // MFHC1_D64 |
6646 | 91.2k | 0U, // MFHC1_D64_MM |
6647 | 91.2k | 0U, // MFHC2_MMR6 |
6648 | 91.2k | 136U, // MFHGC0 |
6649 | 91.2k | 136U, // MFHGC0_MM |
6650 | 91.2k | 0U, // MFHI |
6651 | 91.2k | 0U, // MFHI16_MM |
6652 | 91.2k | 0U, // MFHI64 |
6653 | 91.2k | 0U, // MFHI_DSP |
6654 | 91.2k | 0U, // MFHI_DSP_MM |
6655 | 91.2k | 0U, // MFHI_MM |
6656 | 91.2k | 0U, // MFLO |
6657 | 91.2k | 0U, // MFLO16_MM |
6658 | 91.2k | 0U, // MFLO64 |
6659 | 91.2k | 0U, // MFLO_DSP |
6660 | 91.2k | 0U, // MFLO_DSP_MM |
6661 | 91.2k | 0U, // MFLO_MM |
6662 | 91.2k | 19520U, // MFTR |
6663 | 91.2k | 19520U, // MFTR_NM |
6664 | 91.2k | 128U, // MINA_D |
6665 | 91.2k | 128U, // MINA_D_MMR6 |
6666 | 91.2k | 128U, // MINA_S |
6667 | 91.2k | 128U, // MINA_S_MMR6 |
6668 | 91.2k | 128U, // MINI_S_B |
6669 | 91.2k | 128U, // MINI_S_D |
6670 | 91.2k | 128U, // MINI_S_H |
6671 | 91.2k | 128U, // MINI_S_W |
6672 | 91.2k | 152U, // MINI_U_B |
6673 | 91.2k | 152U, // MINI_U_D |
6674 | 91.2k | 152U, // MINI_U_H |
6675 | 91.2k | 152U, // MINI_U_W |
6676 | 91.2k | 128U, // MIN_A_B |
6677 | 91.2k | 128U, // MIN_A_D |
6678 | 91.2k | 128U, // MIN_A_H |
6679 | 91.2k | 128U, // MIN_A_W |
6680 | 91.2k | 128U, // MIN_D |
6681 | 91.2k | 128U, // MIN_D_MMR6 |
6682 | 91.2k | 128U, // MIN_S |
6683 | 91.2k | 128U, // MIN_S_B |
6684 | 91.2k | 128U, // MIN_S_D |
6685 | 91.2k | 128U, // MIN_S_H |
6686 | 91.2k | 128U, // MIN_S_MMR6 |
6687 | 91.2k | 128U, // MIN_S_W |
6688 | 91.2k | 128U, // MIN_U_B |
6689 | 91.2k | 128U, // MIN_U_D |
6690 | 91.2k | 128U, // MIN_U_H |
6691 | 91.2k | 128U, // MIN_U_W |
6692 | 91.2k | 128U, // MOD |
6693 | 91.2k | 128U, // MODSUB |
6694 | 91.2k | 128U, // MODSUB_MM |
6695 | 91.2k | 128U, // MODU |
6696 | 91.2k | 128U, // MODU_MMR6 |
6697 | 91.2k | 128U, // MODU_NM |
6698 | 91.2k | 128U, // MOD_MMR6 |
6699 | 91.2k | 128U, // MOD_NM |
6700 | 91.2k | 128U, // MOD_S_B |
6701 | 91.2k | 128U, // MOD_S_D |
6702 | 91.2k | 128U, // MOD_S_H |
6703 | 91.2k | 128U, // MOD_S_W |
6704 | 91.2k | 128U, // MOD_U_B |
6705 | 91.2k | 128U, // MOD_U_D |
6706 | 91.2k | 128U, // MOD_U_H |
6707 | 91.2k | 128U, // MOD_U_W |
6708 | 91.2k | 0U, // MOVE16_MM |
6709 | 91.2k | 0U, // MOVE16_MMR6 |
6710 | 91.2k | 80U, // MOVEBALC_NM |
6711 | 91.2k | 0U, // MOVEPREV_NM |
6712 | 91.2k | 0U, // MOVEP_MM |
6713 | 91.2k | 0U, // MOVEP_MMR6 |
6714 | 91.2k | 0U, // MOVEP_NM |
6715 | 91.2k | 0U, // MOVE_NM |
6716 | 91.2k | 0U, // MOVE_V |
6717 | 91.2k | 128U, // MOVF_D32 |
6718 | 91.2k | 128U, // MOVF_D32_MM |
6719 | 91.2k | 128U, // MOVF_D64 |
6720 | 91.2k | 128U, // MOVF_I |
6721 | 91.2k | 128U, // MOVF_I64 |
6722 | 91.2k | 128U, // MOVF_I_MM |
6723 | 91.2k | 128U, // MOVF_S |
6724 | 91.2k | 128U, // MOVF_S_MM |
6725 | 91.2k | 128U, // MOVN_I64_D64 |
6726 | 91.2k | 128U, // MOVN_I64_I |
6727 | 91.2k | 128U, // MOVN_I64_I64 |
6728 | 91.2k | 128U, // MOVN_I64_S |
6729 | 91.2k | 128U, // MOVN_I_D32 |
6730 | 91.2k | 128U, // MOVN_I_D32_MM |
6731 | 91.2k | 128U, // MOVN_I_D64 |
6732 | 91.2k | 128U, // MOVN_I_I |
6733 | 91.2k | 128U, // MOVN_I_I64 |
6734 | 91.2k | 128U, // MOVN_I_MM |
6735 | 91.2k | 128U, // MOVN_I_S |
6736 | 91.2k | 128U, // MOVN_I_S_MM |
6737 | 91.2k | 128U, // MOVN_NM |
6738 | 91.2k | 128U, // MOVT_D32 |
6739 | 91.2k | 128U, // MOVT_D32_MM |
6740 | 91.2k | 128U, // MOVT_D64 |
6741 | 91.2k | 128U, // MOVT_I |
6742 | 91.2k | 128U, // MOVT_I64 |
6743 | 91.2k | 128U, // MOVT_I_MM |
6744 | 91.2k | 128U, // MOVT_S |
6745 | 91.2k | 128U, // MOVT_S_MM |
6746 | 91.2k | 128U, // MOVZ_I64_D64 |
6747 | 91.2k | 128U, // MOVZ_I64_I |
6748 | 91.2k | 128U, // MOVZ_I64_I64 |
6749 | 91.2k | 128U, // MOVZ_I64_S |
6750 | 91.2k | 128U, // MOVZ_I_D32 |
6751 | 91.2k | 128U, // MOVZ_I_D32_MM |
6752 | 91.2k | 128U, // MOVZ_I_D64 |
6753 | 91.2k | 128U, // MOVZ_I_I |
6754 | 91.2k | 128U, // MOVZ_I_I64 |
6755 | 91.2k | 128U, // MOVZ_I_MM |
6756 | 91.2k | 128U, // MOVZ_I_S |
6757 | 91.2k | 128U, // MOVZ_I_S_MM |
6758 | 91.2k | 128U, // MOVZ_NM |
6759 | 91.2k | 0U, // MSUB |
6760 | 91.2k | 184U, // MSUBF_D |
6761 | 91.2k | 184U, // MSUBF_D_MMR6 |
6762 | 91.2k | 184U, // MSUBF_S |
6763 | 91.2k | 184U, // MSUBF_S_MMR6 |
6764 | 91.2k | 184U, // MSUBR_Q_H |
6765 | 91.2k | 184U, // MSUBR_Q_W |
6766 | 91.2k | 0U, // MSUBU |
6767 | 91.2k | 128U, // MSUBU_DSP |
6768 | 91.2k | 128U, // MSUBU_DSP_MM |
6769 | 91.2k | 0U, // MSUBU_MM |
6770 | 91.2k | 184U, // MSUBV_B |
6771 | 91.2k | 184U, // MSUBV_D |
6772 | 91.2k | 184U, // MSUBV_H |
6773 | 91.2k | 184U, // MSUBV_W |
6774 | 91.2k | 0U, // MSUB_D32 |
6775 | 91.2k | 0U, // MSUB_D32_MM |
6776 | 91.2k | 0U, // MSUB_D64 |
6777 | 91.2k | 128U, // MSUB_DSP |
6778 | 91.2k | 128U, // MSUB_DSP_MM |
6779 | 91.2k | 0U, // MSUB_MM |
6780 | 91.2k | 184U, // MSUB_Q_H |
6781 | 91.2k | 184U, // MSUB_Q_W |
6782 | 91.2k | 0U, // MSUB_S |
6783 | 91.2k | 0U, // MSUB_S_MM |
6784 | 91.2k | 0U, // MTC0 |
6785 | 91.2k | 0U, // MTC0Sel_NM |
6786 | 91.2k | 0U, // MTC0_MMR6 |
6787 | 91.2k | 152U, // MTC0_NM |
6788 | 91.2k | 0U, // MTC1 |
6789 | 91.2k | 0U, // MTC1_D64 |
6790 | 91.2k | 0U, // MTC1_D64_MM |
6791 | 91.2k | 0U, // MTC1_MM |
6792 | 91.2k | 0U, // MTC1_MMR6 |
6793 | 91.2k | 0U, // MTC2 |
6794 | 91.2k | 0U, // MTC2_MMR6 |
6795 | 91.2k | 0U, // MTGC0 |
6796 | 91.2k | 0U, // MTGC0_MM |
6797 | 91.2k | 0U, // MTHC0Sel_NM |
6798 | 91.2k | 0U, // MTHC0_MMR6 |
6799 | 91.2k | 152U, // MTHC0_NM |
6800 | 91.2k | 0U, // MTHC1_D32 |
6801 | 91.2k | 0U, // MTHC1_D32_MM |
6802 | 91.2k | 0U, // MTHC1_D64 |
6803 | 91.2k | 0U, // MTHC1_D64_MM |
6804 | 91.2k | 0U, // MTHC2_MMR6 |
6805 | 91.2k | 0U, // MTHGC0 |
6806 | 91.2k | 0U, // MTHGC0_MM |
6807 | 91.2k | 0U, // MTHI |
6808 | 91.2k | 0U, // MTHI64 |
6809 | 91.2k | 0U, // MTHI_DSP |
6810 | 91.2k | 0U, // MTHI_DSP_MM |
6811 | 91.2k | 0U, // MTHI_MM |
6812 | 91.2k | 0U, // MTHLIP |
6813 | 91.2k | 0U, // MTHLIP_MM |
6814 | 91.2k | 0U, // MTLO |
6815 | 91.2k | 0U, // MTLO64 |
6816 | 91.2k | 0U, // MTLO_DSP |
6817 | 91.2k | 0U, // MTLO_DSP_MM |
6818 | 91.2k | 0U, // MTLO_MM |
6819 | 91.2k | 0U, // MTM0 |
6820 | 91.2k | 0U, // MTM1 |
6821 | 91.2k | 0U, // MTM2 |
6822 | 91.2k | 0U, // MTP0 |
6823 | 91.2k | 0U, // MTP1 |
6824 | 91.2k | 0U, // MTP2 |
6825 | 91.2k | 2U, // MTTR |
6826 | 91.2k | 2U, // MTTR_NM |
6827 | 91.2k | 128U, // MUH |
6828 | 91.2k | 128U, // MUHU |
6829 | 91.2k | 128U, // MUHU_MMR6 |
6830 | 91.2k | 128U, // MUHU_NM |
6831 | 91.2k | 128U, // MUH_MMR6 |
6832 | 91.2k | 128U, // MUH_NM |
6833 | 91.2k | 128U, // MUL |
6834 | 91.2k | 128U, // MUL4x4_NM |
6835 | 91.2k | 128U, // MULEQ_S_W_PHL |
6836 | 91.2k | 128U, // MULEQ_S_W_PHL_MM |
6837 | 91.2k | 128U, // MULEQ_S_W_PHR |
6838 | 91.2k | 128U, // MULEQ_S_W_PHR_MM |
6839 | 91.2k | 128U, // MULEU_S_PH_QBL |
6840 | 91.2k | 128U, // MULEU_S_PH_QBL_MM |
6841 | 91.2k | 128U, // MULEU_S_PH_QBR |
6842 | 91.2k | 128U, // MULEU_S_PH_QBR_MM |
6843 | 91.2k | 128U, // MULQ_RS_PH |
6844 | 91.2k | 128U, // MULQ_RS_PH_MM |
6845 | 91.2k | 128U, // MULQ_RS_W |
6846 | 91.2k | 128U, // MULQ_RS_W_MMR2 |
6847 | 91.2k | 128U, // MULQ_S_PH |
6848 | 91.2k | 128U, // MULQ_S_PH_MMR2 |
6849 | 91.2k | 128U, // MULQ_S_W |
6850 | 91.2k | 128U, // MULQ_S_W_MMR2 |
6851 | 91.2k | 128U, // MULR_PS64 |
6852 | 91.2k | 128U, // MULR_Q_H |
6853 | 91.2k | 128U, // MULR_Q_W |
6854 | 91.2k | 128U, // MULSAQ_S_W_PH |
6855 | 91.2k | 128U, // MULSAQ_S_W_PH_MM |
6856 | 91.2k | 128U, // MULSA_W_PH |
6857 | 91.2k | 128U, // MULSA_W_PH_MMR2 |
6858 | 91.2k | 0U, // MULT |
6859 | 91.2k | 128U, // MULTU_DSP |
6860 | 91.2k | 128U, // MULTU_DSP_MM |
6861 | 91.2k | 128U, // MULT_DSP |
6862 | 91.2k | 128U, // MULT_DSP_MM |
6863 | 91.2k | 0U, // MULT_MM |
6864 | 91.2k | 0U, // MULTu |
6865 | 91.2k | 0U, // MULTu_MM |
6866 | 91.2k | 128U, // MULU |
6867 | 91.2k | 128U, // MULU_MMR6 |
6868 | 91.2k | 128U, // MULU_NM |
6869 | 91.2k | 128U, // MULV_B |
6870 | 91.2k | 128U, // MULV_D |
6871 | 91.2k | 128U, // MULV_H |
6872 | 91.2k | 128U, // MULV_W |
6873 | 91.2k | 128U, // MUL_MM |
6874 | 91.2k | 128U, // MUL_MMR6 |
6875 | 91.2k | 128U, // MUL_NM |
6876 | 91.2k | 128U, // MUL_PH |
6877 | 91.2k | 128U, // MUL_PH_MMR2 |
6878 | 91.2k | 128U, // MUL_Q_H |
6879 | 91.2k | 128U, // MUL_Q_W |
6880 | 91.2k | 128U, // MUL_R6 |
6881 | 91.2k | 128U, // MUL_S_PH |
6882 | 91.2k | 128U, // MUL_S_PH_MMR2 |
6883 | 91.2k | 0U, // Mfhi16 |
6884 | 91.2k | 0U, // Mflo16 |
6885 | 91.2k | 0U, // Move32R16 |
6886 | 91.2k | 0U, // MoveR3216 |
6887 | 91.2k | 0U, // NLOC_B |
6888 | 91.2k | 0U, // NLOC_D |
6889 | 91.2k | 0U, // NLOC_H |
6890 | 91.2k | 0U, // NLOC_W |
6891 | 91.2k | 0U, // NLZC_B |
6892 | 91.2k | 0U, // NLZC_D |
6893 | 91.2k | 0U, // NLZC_H |
6894 | 91.2k | 0U, // NLZC_W |
6895 | 91.2k | 0U, // NMADD_D32 |
6896 | 91.2k | 0U, // NMADD_D32_MM |
6897 | 91.2k | 0U, // NMADD_D64 |
6898 | 91.2k | 0U, // NMADD_S |
6899 | 91.2k | 0U, // NMADD_S_MM |
6900 | 91.2k | 0U, // NMSUB_D32 |
6901 | 91.2k | 0U, // NMSUB_D32_MM |
6902 | 91.2k | 0U, // NMSUB_D64 |
6903 | 91.2k | 0U, // NMSUB_S |
6904 | 91.2k | 0U, // NMSUB_S_MM |
6905 | 91.2k | 0U, // NOP32_NM |
6906 | 91.2k | 0U, // NOP_NM |
6907 | 91.2k | 128U, // NOR |
6908 | 91.2k | 128U, // NOR64 |
6909 | 91.2k | 20U, // NORI_B |
6910 | 91.2k | 128U, // NOR_MM |
6911 | 91.2k | 128U, // NOR_MMR6 |
6912 | 91.2k | 128U, // NOR_NM |
6913 | 91.2k | 128U, // NOR_V |
6914 | 91.2k | 0U, // NOT16_MM |
6915 | 91.2k | 0U, // NOT16_MMR6 |
6916 | 91.2k | 0U, // NOT16_NM |
6917 | 91.2k | 0U, // NegRxRy16 |
6918 | 91.2k | 0U, // NotRxRy16 |
6919 | 91.2k | 128U, // OR |
6920 | 91.2k | 0U, // OR16_MM |
6921 | 91.2k | 0U, // OR16_MMR6 |
6922 | 91.2k | 128U, // OR16_NM |
6923 | 91.2k | 128U, // OR64 |
6924 | 91.2k | 20U, // ORI_B |
6925 | 91.2k | 16U, // ORI_MMR6 |
6926 | 91.2k | 128U, // ORI_NM |
6927 | 91.2k | 128U, // OR_MM |
6928 | 91.2k | 128U, // OR_MMR6 |
6929 | 91.2k | 128U, // OR_NM |
6930 | 91.2k | 128U, // OR_V |
6931 | 91.2k | 16U, // ORi |
6932 | 91.2k | 16U, // ORi64 |
6933 | 91.2k | 16U, // ORi_MM |
6934 | 91.2k | 0U, // OrRxRxRy16 |
6935 | 91.2k | 128U, // PACKRL_PH |
6936 | 91.2k | 128U, // PACKRL_PH_MM |
6937 | 91.2k | 0U, // PAUSE |
6938 | 91.2k | 0U, // PAUSE_MM |
6939 | 91.2k | 0U, // PAUSE_MMR6 |
6940 | 91.2k | 0U, // PAUSE_NM |
6941 | 91.2k | 128U, // PCKEV_B |
6942 | 91.2k | 128U, // PCKEV_D |
6943 | 91.2k | 128U, // PCKEV_H |
6944 | 91.2k | 128U, // PCKEV_W |
6945 | 91.2k | 128U, // PCKOD_B |
6946 | 91.2k | 128U, // PCKOD_D |
6947 | 91.2k | 128U, // PCKOD_H |
6948 | 91.2k | 128U, // PCKOD_W |
6949 | 91.2k | 0U, // PCNT_B |
6950 | 91.2k | 0U, // PCNT_D |
6951 | 91.2k | 0U, // PCNT_H |
6952 | 91.2k | 0U, // PCNT_W |
6953 | 91.2k | 128U, // PICK_PH |
6954 | 91.2k | 128U, // PICK_PH_MM |
6955 | 91.2k | 128U, // PICK_QB |
6956 | 91.2k | 128U, // PICK_QB_MM |
6957 | 91.2k | 128U, // PLL_PS64 |
6958 | 91.2k | 128U, // PLU_PS64 |
6959 | 91.2k | 0U, // POP |
6960 | 91.2k | 0U, // PRECEQU_PH_QBL |
6961 | 91.2k | 0U, // PRECEQU_PH_QBLA |
6962 | 91.2k | 0U, // PRECEQU_PH_QBLA_MM |
6963 | 91.2k | 0U, // PRECEQU_PH_QBL_MM |
6964 | 91.2k | 0U, // PRECEQU_PH_QBR |
6965 | 91.2k | 0U, // PRECEQU_PH_QBRA |
6966 | 91.2k | 0U, // PRECEQU_PH_QBRA_MM |
6967 | 91.2k | 0U, // PRECEQU_PH_QBR_MM |
6968 | 91.2k | 0U, // PRECEQ_W_PHL |
6969 | 91.2k | 0U, // PRECEQ_W_PHL_MM |
6970 | 91.2k | 0U, // PRECEQ_W_PHR |
6971 | 91.2k | 0U, // PRECEQ_W_PHR_MM |
6972 | 91.2k | 0U, // PRECEU_PH_QBL |
6973 | 91.2k | 0U, // PRECEU_PH_QBLA |
6974 | 91.2k | 0U, // PRECEU_PH_QBLA_MM |
6975 | 91.2k | 0U, // PRECEU_PH_QBL_MM |
6976 | 91.2k | 0U, // PRECEU_PH_QBR |
6977 | 91.2k | 0U, // PRECEU_PH_QBRA |
6978 | 91.2k | 0U, // PRECEU_PH_QBRA_MM |
6979 | 91.2k | 0U, // PRECEU_PH_QBR_MM |
6980 | 91.2k | 128U, // PRECRQU_S_QB_PH |
6981 | 91.2k | 128U, // PRECRQU_S_QB_PH_MM |
6982 | 91.2k | 128U, // PRECRQ_PH_W |
6983 | 91.2k | 128U, // PRECRQ_PH_W_MM |
6984 | 91.2k | 128U, // PRECRQ_QB_PH |
6985 | 91.2k | 128U, // PRECRQ_QB_PH_MM |
6986 | 91.2k | 128U, // PRECRQ_RS_PH_W |
6987 | 91.2k | 128U, // PRECRQ_RS_PH_W_MM |
6988 | 91.2k | 128U, // PRECR_QB_PH |
6989 | 91.2k | 128U, // PRECR_QB_PH_MMR2 |
6990 | 91.2k | 152U, // PRECR_SRA_PH_W |
6991 | 91.2k | 152U, // PRECR_SRA_PH_W_MMR2 |
6992 | 91.2k | 152U, // PRECR_SRA_R_PH_W |
6993 | 91.2k | 152U, // PRECR_SRA_R_PH_W_MMR2 |
6994 | 91.2k | 0U, // PREF |
6995 | 91.2k | 0U, // PREFE |
6996 | 91.2k | 0U, // PREFE_MM |
6997 | 91.2k | 0U, // PREFX_MM |
6998 | 91.2k | 0U, // PREF_MM |
6999 | 91.2k | 0U, // PREF_MMR6 |
7000 | 91.2k | 0U, // PREF_NM |
7001 | 91.2k | 0U, // PREF_R6 |
7002 | 91.2k | 0U, // PREFs9_NM |
7003 | 91.2k | 152U, // PREPEND |
7004 | 91.2k | 152U, // PREPEND_MMR2 |
7005 | 91.2k | 128U, // PUL_PS64 |
7006 | 91.2k | 128U, // PUU_PS64 |
7007 | 91.2k | 0U, // RADDU_W_QB |
7008 | 91.2k | 0U, // RADDU_W_QB_MM |
7009 | 91.2k | 0U, // RDDSP |
7010 | 91.2k | 0U, // RDDSP_MM |
7011 | 91.2k | 20U, // RDHWR |
7012 | 91.2k | 20U, // RDHWR64 |
7013 | 91.2k | 20U, // RDHWR_MM |
7014 | 91.2k | 136U, // RDHWR_MMR6 |
7015 | 91.2k | 152U, // RDHWR_NM |
7016 | 91.2k | 0U, // RDPGPR_MMR6 |
7017 | 91.2k | 0U, // RDPGPR_NM |
7018 | 91.2k | 0U, // RECIP_D32 |
7019 | 91.2k | 0U, // RECIP_D32_MM |
7020 | 91.2k | 0U, // RECIP_D64 |
7021 | 91.2k | 0U, // RECIP_D64_MM |
7022 | 91.2k | 0U, // RECIP_S |
7023 | 91.2k | 0U, // RECIP_S_MM |
7024 | 91.2k | 0U, // REPLV_PH |
7025 | 91.2k | 0U, // REPLV_PH_MM |
7026 | 91.2k | 0U, // REPLV_QB |
7027 | 91.2k | 0U, // REPLV_QB_MM |
7028 | 91.2k | 0U, // REPL_PH |
7029 | 91.2k | 0U, // REPL_PH_MM |
7030 | 91.2k | 0U, // REPL_QB |
7031 | 91.2k | 0U, // REPL_QB_MM |
7032 | 91.2k | 0U, // RESTOREJRC16_NM |
7033 | 91.2k | 0U, // RESTOREJRC_NM |
7034 | 91.2k | 0U, // RESTORE_NM |
7035 | 91.2k | 0U, // RINT_D |
7036 | 91.2k | 0U, // RINT_D_MMR6 |
7037 | 91.2k | 0U, // RINT_S |
7038 | 91.2k | 0U, // RINT_S_MMR6 |
7039 | 91.2k | 152U, // ROTR |
7040 | 91.2k | 128U, // ROTRV |
7041 | 91.2k | 128U, // ROTRV_MM |
7042 | 91.2k | 128U, // ROTRV_NM |
7043 | 91.2k | 152U, // ROTR_MM |
7044 | 91.2k | 152U, // ROTR_NM |
7045 | 91.2k | 18456U, // ROTX_NM |
7046 | 91.2k | 0U, // ROUND_L_D64 |
7047 | 91.2k | 0U, // ROUND_L_D_MMR6 |
7048 | 91.2k | 0U, // ROUND_L_S |
7049 | 91.2k | 0U, // ROUND_L_S_MMR6 |
7050 | 91.2k | 0U, // ROUND_W_D32 |
7051 | 91.2k | 0U, // ROUND_W_D64 |
7052 | 91.2k | 0U, // ROUND_W_D_MMR6 |
7053 | 91.2k | 0U, // ROUND_W_MM |
7054 | 91.2k | 0U, // ROUND_W_S |
7055 | 91.2k | 0U, // ROUND_W_S_MM |
7056 | 91.2k | 0U, // ROUND_W_S_MMR6 |
7057 | 91.2k | 0U, // RSQRT_D32 |
7058 | 91.2k | 0U, // RSQRT_D32_MM |
7059 | 91.2k | 0U, // RSQRT_D64 |
7060 | 91.2k | 0U, // RSQRT_D64_MM |
7061 | 91.2k | 0U, // RSQRT_S |
7062 | 91.2k | 0U, // RSQRT_S_MM |
7063 | 91.2k | 0U, // Restore16 |
7064 | 91.2k | 0U, // RestoreX16 |
7065 | 91.2k | 0U, // SAA |
7066 | 91.2k | 0U, // SAAD |
7067 | 91.2k | 136U, // SAT_S_B |
7068 | 91.2k | 160U, // SAT_S_D |
7069 | 91.2k | 164U, // SAT_S_H |
7070 | 91.2k | 152U, // SAT_S_W |
7071 | 91.2k | 136U, // SAT_U_B |
7072 | 91.2k | 160U, // SAT_U_D |
7073 | 91.2k | 164U, // SAT_U_H |
7074 | 91.2k | 152U, // SAT_U_W |
7075 | 91.2k | 0U, // SAVE16_NM |
7076 | 91.2k | 0U, // SAVE_NM |
7077 | 91.2k | 0U, // SB |
7078 | 91.2k | 0U, // SB16_MM |
7079 | 91.2k | 0U, // SB16_MMR6 |
7080 | 91.2k | 0U, // SB16_NM |
7081 | 91.2k | 0U, // SB64 |
7082 | 91.2k | 0U, // SBE |
7083 | 91.2k | 0U, // SBE_MM |
7084 | 91.2k | 0U, // SBGP_NM |
7085 | 91.2k | 0U, // SBX_NM |
7086 | 91.2k | 0U, // SB_MM |
7087 | 91.2k | 0U, // SB_MMR6 |
7088 | 91.2k | 0U, // SB_NM |
7089 | 91.2k | 0U, // SBs9_NM |
7090 | 91.2k | 0U, // SC |
7091 | 91.2k | 0U, // SC64 |
7092 | 91.2k | 0U, // SC64_R6 |
7093 | 91.2k | 0U, // SCD |
7094 | 91.2k | 0U, // SCD_R6 |
7095 | 91.2k | 0U, // SCE |
7096 | 91.2k | 0U, // SCE_MM |
7097 | 91.2k | 2U, // SCWP_NM |
7098 | 91.2k | 0U, // SC_MM |
7099 | 91.2k | 0U, // SC_MMR6 |
7100 | 91.2k | 0U, // SC_NM |
7101 | 91.2k | 0U, // SC_R6 |
7102 | 91.2k | 0U, // SD |
7103 | 91.2k | 0U, // SDBBP |
7104 | 91.2k | 0U, // SDBBP16_MM |
7105 | 91.2k | 0U, // SDBBP16_MMR6 |
7106 | 91.2k | 0U, // SDBBP16_NM |
7107 | 91.2k | 0U, // SDBBP_MM |
7108 | 91.2k | 0U, // SDBBP_MMR6 |
7109 | 91.2k | 0U, // SDBBP_NM |
7110 | 91.2k | 0U, // SDBBP_R6 |
7111 | 91.2k | 0U, // SDC1 |
7112 | 91.2k | 0U, // SDC164 |
7113 | 91.2k | 0U, // SDC1_D64_MMR6 |
7114 | 91.2k | 0U, // SDC1_MM_D32 |
7115 | 91.2k | 0U, // SDC1_MM_D64 |
7116 | 91.2k | 0U, // SDC2 |
7117 | 91.2k | 0U, // SDC2_MMR6 |
7118 | 91.2k | 0U, // SDC2_R6 |
7119 | 91.2k | 0U, // SDC3 |
7120 | 91.2k | 0U, // SDIV |
7121 | 91.2k | 0U, // SDIV_MM |
7122 | 91.2k | 0U, // SDL |
7123 | 91.2k | 0U, // SDR |
7124 | 91.2k | 1U, // SDXC1 |
7125 | 91.2k | 1U, // SDXC164 |
7126 | 91.2k | 0U, // SEB |
7127 | 91.2k | 0U, // SEB64 |
7128 | 91.2k | 0U, // SEB_MM |
7129 | 91.2k | 0U, // SEB_NM |
7130 | 91.2k | 0U, // SEH |
7131 | 91.2k | 0U, // SEH64 |
7132 | 91.2k | 0U, // SEH_MM |
7133 | 91.2k | 0U, // SEH_NM |
7134 | 91.2k | 128U, // SELEQZ |
7135 | 91.2k | 128U, // SELEQZ64 |
7136 | 91.2k | 128U, // SELEQZ_D |
7137 | 91.2k | 128U, // SELEQZ_D_MMR6 |
7138 | 91.2k | 128U, // SELEQZ_MMR6 |
7139 | 91.2k | 128U, // SELEQZ_S |
7140 | 91.2k | 128U, // SELEQZ_S_MMR6 |
7141 | 91.2k | 128U, // SELNEZ |
7142 | 91.2k | 128U, // SELNEZ64 |
7143 | 91.2k | 128U, // SELNEZ_D |
7144 | 91.2k | 128U, // SELNEZ_D_MMR6 |
7145 | 91.2k | 128U, // SELNEZ_MMR6 |
7146 | 91.2k | 128U, // SELNEZ_S |
7147 | 91.2k | 128U, // SELNEZ_S_MMR6 |
7148 | 91.2k | 184U, // SEL_D |
7149 | 91.2k | 184U, // SEL_D_MMR6 |
7150 | 91.2k | 184U, // SEL_S |
7151 | 91.2k | 184U, // SEL_S_MMR6 |
7152 | 91.2k | 128U, // SEQ |
7153 | 91.2k | 128U, // SEQI_NM |
7154 | 91.2k | 128U, // SEQi |
7155 | 91.2k | 0U, // SH |
7156 | 91.2k | 0U, // SH16_MM |
7157 | 91.2k | 0U, // SH16_MMR6 |
7158 | 91.2k | 0U, // SH16_NM |
7159 | 91.2k | 0U, // SH64 |
7160 | 91.2k | 0U, // SHE |
7161 | 91.2k | 0U, // SHE_MM |
7162 | 91.2k | 20U, // SHF_B |
7163 | 91.2k | 20U, // SHF_H |
7164 | 91.2k | 20U, // SHF_W |
7165 | 91.2k | 0U, // SHGP_NM |
7166 | 91.2k | 0U, // SHILO |
7167 | 91.2k | 0U, // SHILOV |
7168 | 91.2k | 0U, // SHILOV_MM |
7169 | 91.2k | 0U, // SHILO_MM |
7170 | 91.2k | 128U, // SHLLV_PH |
7171 | 91.2k | 128U, // SHLLV_PH_MM |
7172 | 91.2k | 128U, // SHLLV_QB |
7173 | 91.2k | 128U, // SHLLV_QB_MM |
7174 | 91.2k | 128U, // SHLLV_S_PH |
7175 | 91.2k | 128U, // SHLLV_S_PH_MM |
7176 | 91.2k | 128U, // SHLLV_S_W |
7177 | 91.2k | 128U, // SHLLV_S_W_MM |
7178 | 91.2k | 164U, // SHLL_PH |
7179 | 91.2k | 164U, // SHLL_PH_MM |
7180 | 91.2k | 136U, // SHLL_QB |
7181 | 91.2k | 136U, // SHLL_QB_MM |
7182 | 91.2k | 164U, // SHLL_S_PH |
7183 | 91.2k | 164U, // SHLL_S_PH_MM |
7184 | 91.2k | 152U, // SHLL_S_W |
7185 | 91.2k | 152U, // SHLL_S_W_MM |
7186 | 91.2k | 128U, // SHRAV_PH |
7187 | 91.2k | 128U, // SHRAV_PH_MM |
7188 | 91.2k | 128U, // SHRAV_QB |
7189 | 91.2k | 128U, // SHRAV_QB_MMR2 |
7190 | 91.2k | 128U, // SHRAV_R_PH |
7191 | 91.2k | 128U, // SHRAV_R_PH_MM |
7192 | 91.2k | 128U, // SHRAV_R_QB |
7193 | 91.2k | 128U, // SHRAV_R_QB_MMR2 |
7194 | 91.2k | 128U, // SHRAV_R_W |
7195 | 91.2k | 128U, // SHRAV_R_W_MM |
7196 | 91.2k | 164U, // SHRA_PH |
7197 | 91.2k | 164U, // SHRA_PH_MM |
7198 | 91.2k | 136U, // SHRA_QB |
7199 | 91.2k | 136U, // SHRA_QB_MMR2 |
7200 | 91.2k | 164U, // SHRA_R_PH |
7201 | 91.2k | 164U, // SHRA_R_PH_MM |
7202 | 91.2k | 136U, // SHRA_R_QB |
7203 | 91.2k | 136U, // SHRA_R_QB_MMR2 |
7204 | 91.2k | 152U, // SHRA_R_W |
7205 | 91.2k | 152U, // SHRA_R_W_MM |
7206 | 91.2k | 128U, // SHRLV_PH |
7207 | 91.2k | 128U, // SHRLV_PH_MMR2 |
7208 | 91.2k | 128U, // SHRLV_QB |
7209 | 91.2k | 128U, // SHRLV_QB_MM |
7210 | 91.2k | 164U, // SHRL_PH |
7211 | 91.2k | 164U, // SHRL_PH_MMR2 |
7212 | 91.2k | 136U, // SHRL_QB |
7213 | 91.2k | 136U, // SHRL_QB_MM |
7214 | 91.2k | 0U, // SHXS_NM |
7215 | 91.2k | 0U, // SHX_NM |
7216 | 91.2k | 0U, // SH_MM |
7217 | 91.2k | 0U, // SH_MMR6 |
7218 | 91.2k | 0U, // SH_NM |
7219 | 91.2k | 0U, // SHs9_NM |
7220 | 91.2k | 0U, // SIGRIE |
7221 | 91.2k | 0U, // SIGRIE_MMR6 |
7222 | 91.2k | 0U, // SIGRIE_NM |
7223 | 91.2k | 305U, // SLDI_B |
7224 | 91.2k | 85U, // SLDI_D |
7225 | 91.2k | 297U, // SLDI_H |
7226 | 91.2k | 89U, // SLDI_W |
7227 | 91.2k | 313U, // SLD_B |
7228 | 91.2k | 313U, // SLD_D |
7229 | 91.2k | 313U, // SLD_H |
7230 | 91.2k | 313U, // SLD_W |
7231 | 91.2k | 152U, // SLL |
7232 | 91.2k | 128U, // SLL16_MM |
7233 | 91.2k | 128U, // SLL16_MMR6 |
7234 | 91.2k | 164U, // SLL16_NM |
7235 | 91.2k | 2U, // SLL64_32 |
7236 | 91.2k | 2U, // SLL64_64 |
7237 | 91.2k | 136U, // SLLI_B |
7238 | 91.2k | 160U, // SLLI_D |
7239 | 91.2k | 164U, // SLLI_H |
7240 | 91.2k | 152U, // SLLI_W |
7241 | 91.2k | 128U, // SLLV |
7242 | 91.2k | 128U, // SLLV_MM |
7243 | 91.2k | 128U, // SLLV_NM |
7244 | 91.2k | 128U, // SLL_B |
7245 | 91.2k | 128U, // SLL_D |
7246 | 91.2k | 128U, // SLL_H |
7247 | 91.2k | 152U, // SLL_MM |
7248 | 91.2k | 152U, // SLL_MMR6 |
7249 | 91.2k | 152U, // SLL_NM |
7250 | 91.2k | 128U, // SLL_W |
7251 | 91.2k | 128U, // SLT |
7252 | 91.2k | 128U, // SLT64 |
7253 | 91.2k | 128U, // SLTIU_NM |
7254 | 91.2k | 128U, // SLTI_NM |
7255 | 91.2k | 128U, // SLTU_NM |
7256 | 91.2k | 128U, // SLT_MM |
7257 | 91.2k | 128U, // SLT_NM |
7258 | 91.2k | 128U, // SLTi |
7259 | 91.2k | 128U, // SLTi64 |
7260 | 91.2k | 128U, // SLTi_MM |
7261 | 91.2k | 128U, // SLTiu |
7262 | 91.2k | 128U, // SLTiu64 |
7263 | 91.2k | 128U, // SLTiu_MM |
7264 | 91.2k | 128U, // SLTu |
7265 | 91.2k | 128U, // SLTu64 |
7266 | 91.2k | 128U, // SLTu_MM |
7267 | 91.2k | 128U, // SNE |
7268 | 91.2k | 128U, // SNEi |
7269 | 91.2k | 128U, // SOV_NM |
7270 | 91.2k | 293U, // SPLATI_B |
7271 | 91.2k | 321U, // SPLATI_D |
7272 | 91.2k | 265U, // SPLATI_H |
7273 | 91.2k | 285U, // SPLATI_W |
7274 | 91.2k | 257U, // SPLAT_B |
7275 | 91.2k | 257U, // SPLAT_D |
7276 | 91.2k | 257U, // SPLAT_H |
7277 | 91.2k | 257U, // SPLAT_W |
7278 | 91.2k | 152U, // SRA |
7279 | 91.2k | 136U, // SRAI_B |
7280 | 91.2k | 160U, // SRAI_D |
7281 | 91.2k | 164U, // SRAI_H |
7282 | 91.2k | 152U, // SRAI_W |
7283 | 91.2k | 136U, // SRARI_B |
7284 | 91.2k | 160U, // SRARI_D |
7285 | 91.2k | 164U, // SRARI_H |
7286 | 91.2k | 152U, // SRARI_W |
7287 | 91.2k | 128U, // SRAR_B |
7288 | 91.2k | 128U, // SRAR_D |
7289 | 91.2k | 128U, // SRAR_H |
7290 | 91.2k | 128U, // SRAR_W |
7291 | 91.2k | 128U, // SRAV |
7292 | 91.2k | 128U, // SRAV_MM |
7293 | 91.2k | 128U, // SRAV_NM |
7294 | 91.2k | 128U, // SRA_B |
7295 | 91.2k | 128U, // SRA_D |
7296 | 91.2k | 128U, // SRA_H |
7297 | 91.2k | 152U, // SRA_MM |
7298 | 91.2k | 152U, // SRA_NM |
7299 | 91.2k | 128U, // SRA_W |
7300 | 91.2k | 152U, // SRL |
7301 | 91.2k | 128U, // SRL16_MM |
7302 | 91.2k | 128U, // SRL16_MMR6 |
7303 | 91.2k | 164U, // SRL16_NM |
7304 | 91.2k | 136U, // SRLI_B |
7305 | 91.2k | 160U, // SRLI_D |
7306 | 91.2k | 164U, // SRLI_H |
7307 | 91.2k | 152U, // SRLI_W |
7308 | 91.2k | 136U, // SRLRI_B |
7309 | 91.2k | 160U, // SRLRI_D |
7310 | 91.2k | 164U, // SRLRI_H |
7311 | 91.2k | 152U, // SRLRI_W |
7312 | 91.2k | 128U, // SRLR_B |
7313 | 91.2k | 128U, // SRLR_D |
7314 | 91.2k | 128U, // SRLR_H |
7315 | 91.2k | 128U, // SRLR_W |
7316 | 91.2k | 128U, // SRLV |
7317 | 91.2k | 128U, // SRLV_MM |
7318 | 91.2k | 128U, // SRLV_NM |
7319 | 91.2k | 128U, // SRL_B |
7320 | 91.2k | 128U, // SRL_D |
7321 | 91.2k | 128U, // SRL_H |
7322 | 91.2k | 152U, // SRL_MM |
7323 | 91.2k | 152U, // SRL_NM |
7324 | 91.2k | 128U, // SRL_W |
7325 | 91.2k | 0U, // SSNOP |
7326 | 91.2k | 0U, // SSNOP_MM |
7327 | 91.2k | 0U, // SSNOP_MMR6 |
7328 | 91.2k | 0U, // ST_B |
7329 | 91.2k | 0U, // ST_D |
7330 | 91.2k | 0U, // ST_H |
7331 | 91.2k | 0U, // ST_W |
7332 | 91.2k | 128U, // SUB |
7333 | 91.2k | 128U, // SUBQH_PH |
7334 | 91.2k | 128U, // SUBQH_PH_MMR2 |
7335 | 91.2k | 128U, // SUBQH_R_PH |
7336 | 91.2k | 128U, // SUBQH_R_PH_MMR2 |
7337 | 91.2k | 128U, // SUBQH_R_W |
7338 | 91.2k | 128U, // SUBQH_R_W_MMR2 |
7339 | 91.2k | 128U, // SUBQH_W |
7340 | 91.2k | 128U, // SUBQH_W_MMR2 |
7341 | 91.2k | 128U, // SUBQ_PH |
7342 | 91.2k | 128U, // SUBQ_PH_MM |
7343 | 91.2k | 128U, // SUBQ_S_PH |
7344 | 91.2k | 128U, // SUBQ_S_PH_MM |
7345 | 91.2k | 128U, // SUBQ_S_W |
7346 | 91.2k | 128U, // SUBQ_S_W_MM |
7347 | 91.2k | 128U, // SUBSUS_U_B |
7348 | 91.2k | 128U, // SUBSUS_U_D |
7349 | 91.2k | 128U, // SUBSUS_U_H |
7350 | 91.2k | 128U, // SUBSUS_U_W |
7351 | 91.2k | 128U, // SUBSUU_S_B |
7352 | 91.2k | 128U, // SUBSUU_S_D |
7353 | 91.2k | 128U, // SUBSUU_S_H |
7354 | 91.2k | 128U, // SUBSUU_S_W |
7355 | 91.2k | 128U, // SUBS_S_B |
7356 | 91.2k | 128U, // SUBS_S_D |
7357 | 91.2k | 128U, // SUBS_S_H |
7358 | 91.2k | 128U, // SUBS_S_W |
7359 | 91.2k | 128U, // SUBS_U_B |
7360 | 91.2k | 128U, // SUBS_U_D |
7361 | 91.2k | 128U, // SUBS_U_H |
7362 | 91.2k | 128U, // SUBS_U_W |
7363 | 91.2k | 128U, // SUBU16_MM |
7364 | 91.2k | 128U, // SUBU16_MMR6 |
7365 | 91.2k | 128U, // SUBUH_QB |
7366 | 91.2k | 128U, // SUBUH_QB_MMR2 |
7367 | 91.2k | 128U, // SUBUH_R_QB |
7368 | 91.2k | 128U, // SUBUH_R_QB_MMR2 |
7369 | 91.2k | 128U, // SUBU_MMR6 |
7370 | 91.2k | 128U, // SUBU_PH |
7371 | 91.2k | 128U, // SUBU_PH_MMR2 |
7372 | 91.2k | 128U, // SUBU_QB |
7373 | 91.2k | 128U, // SUBU_QB_MM |
7374 | 91.2k | 128U, // SUBU_S_PH |
7375 | 91.2k | 128U, // SUBU_S_PH_MMR2 |
7376 | 91.2k | 128U, // SUBU_S_QB |
7377 | 91.2k | 128U, // SUBU_S_QB_MM |
7378 | 91.2k | 152U, // SUBVI_B |
7379 | 91.2k | 152U, // SUBVI_D |
7380 | 91.2k | 152U, // SUBVI_H |
7381 | 91.2k | 152U, // SUBVI_W |
7382 | 91.2k | 128U, // SUBV_B |
7383 | 91.2k | 128U, // SUBV_D |
7384 | 91.2k | 128U, // SUBV_H |
7385 | 91.2k | 128U, // SUBV_W |
7386 | 91.2k | 128U, // SUB_MM |
7387 | 91.2k | 128U, // SUB_MMR6 |
7388 | 91.2k | 128U, // SUB_NM |
7389 | 91.2k | 128U, // SUBu |
7390 | 91.2k | 128U, // SUBu16_NM |
7391 | 91.2k | 128U, // SUBu_MM |
7392 | 91.2k | 128U, // SUBu_NM |
7393 | 91.2k | 1U, // SUXC1 |
7394 | 91.2k | 1U, // SUXC164 |
7395 | 91.2k | 1U, // SUXC1_MM |
7396 | 91.2k | 0U, // SW |
7397 | 91.2k | 0U, // SW16_MM |
7398 | 91.2k | 0U, // SW16_MMR6 |
7399 | 91.2k | 0U, // SW16_NM |
7400 | 91.2k | 0U, // SW4x4_NM |
7401 | 91.2k | 0U, // SW64 |
7402 | 91.2k | 0U, // SWC1 |
7403 | 91.2k | 0U, // SWC1_MM |
7404 | 91.2k | 0U, // SWC2 |
7405 | 91.2k | 0U, // SWC2_MMR6 |
7406 | 91.2k | 0U, // SWC2_R6 |
7407 | 91.2k | 0U, // SWC3 |
7408 | 91.2k | 0U, // SWDSP |
7409 | 91.2k | 0U, // SWDSP_MM |
7410 | 91.2k | 0U, // SWE |
7411 | 91.2k | 0U, // SWE_MM |
7412 | 91.2k | 0U, // SWGP16_NM |
7413 | 91.2k | 0U, // SWGP_NM |
7414 | 91.2k | 0U, // SWL |
7415 | 91.2k | 0U, // SWL64 |
7416 | 91.2k | 0U, // SWLE |
7417 | 91.2k | 0U, // SWLE_MM |
7418 | 91.2k | 0U, // SWL_MM |
7419 | 91.2k | 0U, // SWM16_MM |
7420 | 91.2k | 0U, // SWM16_MMR6 |
7421 | 91.2k | 0U, // SWM32_MM |
7422 | 91.2k | 184U, // SWM_NM |
7423 | 91.2k | 0U, // SWPC_NM |
7424 | 91.2k | 0U, // SWP_MM |
7425 | 91.2k | 0U, // SWR |
7426 | 91.2k | 0U, // SWR64 |
7427 | 91.2k | 0U, // SWRE |
7428 | 91.2k | 0U, // SWRE_MM |
7429 | 91.2k | 0U, // SWR_MM |
7430 | 91.2k | 0U, // SWSP16_NM |
7431 | 91.2k | 0U, // SWSP_MM |
7432 | 91.2k | 0U, // SWSP_MMR6 |
7433 | 91.2k | 1U, // SWXC1 |
7434 | 91.2k | 1U, // SWXC1_MM |
7435 | 91.2k | 0U, // SWXS_NM |
7436 | 91.2k | 0U, // SWX_NM |
7437 | 91.2k | 0U, // SW_MM |
7438 | 91.2k | 0U, // SW_MMR6 |
7439 | 91.2k | 0U, // SW_NM |
7440 | 91.2k | 0U, // SWs9_NM |
7441 | 91.2k | 0U, // SYNC |
7442 | 91.2k | 0U, // SYNCI |
7443 | 91.2k | 0U, // SYNCI_MM |
7444 | 91.2k | 0U, // SYNCI_MMR6 |
7445 | 91.2k | 0U, // SYNCI_NM |
7446 | 91.2k | 0U, // SYNCIs9_NM |
7447 | 91.2k | 0U, // SYNC_MM |
7448 | 91.2k | 0U, // SYNC_MMR6 |
7449 | 91.2k | 0U, // SYNC_NM |
7450 | 91.2k | 0U, // SYSCALL |
7451 | 91.2k | 0U, // SYSCALL16_NM |
7452 | 91.2k | 0U, // SYSCALL_MM |
7453 | 91.2k | 0U, // SYSCALL_NM |
7454 | 91.2k | 0U, // Save16 |
7455 | 91.2k | 0U, // SaveX16 |
7456 | 91.2k | 0U, // SbRxRyOffMemX16 |
7457 | 91.2k | 0U, // SebRx16 |
7458 | 91.2k | 0U, // SehRx16 |
7459 | 91.2k | 0U, // ShRxRyOffMemX16 |
7460 | 91.2k | 152U, // SllX16 |
7461 | 91.2k | 0U, // SllvRxRy16 |
7462 | 91.2k | 0U, // SltRxRy16 |
7463 | 91.2k | 1U, // SltiRxImm16 |
7464 | 91.2k | 0U, // SltiRxImmX16 |
7465 | 91.2k | 1U, // SltiuRxImm16 |
7466 | 91.2k | 0U, // SltiuRxImmX16 |
7467 | 91.2k | 0U, // SltuRxRy16 |
7468 | 91.2k | 152U, // SraX16 |
7469 | 91.2k | 0U, // SravRxRy16 |
7470 | 91.2k | 152U, // SrlX16 |
7471 | 91.2k | 0U, // SrlvRxRy16 |
7472 | 91.2k | 128U, // SubuRxRyRz16 |
7473 | 91.2k | 0U, // SwRxRyOffMemX16 |
7474 | 91.2k | 0U, // SwRxSpImmX16 |
7475 | 91.2k | 92U, // TEQ |
7476 | 91.2k | 0U, // TEQI |
7477 | 91.2k | 0U, // TEQI_MM |
7478 | 91.2k | 164U, // TEQ_MM |
7479 | 91.2k | 152U, // TEQ_NM |
7480 | 91.2k | 92U, // TGE |
7481 | 91.2k | 0U, // TGEI |
7482 | 91.2k | 0U, // TGEIU |
7483 | 91.2k | 0U, // TGEIU_MM |
7484 | 91.2k | 0U, // TGEI_MM |
7485 | 91.2k | 92U, // TGEU |
7486 | 91.2k | 164U, // TGEU_MM |
7487 | 91.2k | 164U, // TGE_MM |
7488 | 91.2k | 0U, // TLBGINV |
7489 | 91.2k | 0U, // TLBGINVF |
7490 | 91.2k | 0U, // TLBGINVF_MM |
7491 | 91.2k | 0U, // TLBGINV_MM |
7492 | 91.2k | 0U, // TLBGP |
7493 | 91.2k | 0U, // TLBGP_MM |
7494 | 91.2k | 0U, // TLBGR |
7495 | 91.2k | 0U, // TLBGR_MM |
7496 | 91.2k | 0U, // TLBGWI |
7497 | 91.2k | 0U, // TLBGWI_MM |
7498 | 91.2k | 0U, // TLBGWR |
7499 | 91.2k | 0U, // TLBGWR_MM |
7500 | 91.2k | 0U, // TLBINV |
7501 | 91.2k | 0U, // TLBINVF |
7502 | 91.2k | 0U, // TLBINVF_MMR6 |
7503 | 91.2k | 0U, // TLBINVF_NM |
7504 | 91.2k | 0U, // TLBINV_MMR6 |
7505 | 91.2k | 0U, // TLBINV_NM |
7506 | 91.2k | 0U, // TLBP |
7507 | 91.2k | 0U, // TLBP_MM |
7508 | 91.2k | 0U, // TLBP_NM |
7509 | 91.2k | 0U, // TLBR |
7510 | 91.2k | 0U, // TLBR_MM |
7511 | 91.2k | 0U, // TLBR_NM |
7512 | 91.2k | 0U, // TLBWI |
7513 | 91.2k | 0U, // TLBWI_MM |
7514 | 91.2k | 0U, // TLBWI_NM |
7515 | 91.2k | 0U, // TLBWR |
7516 | 91.2k | 0U, // TLBWR_MM |
7517 | 91.2k | 0U, // TLBWR_NM |
7518 | 91.2k | 92U, // TLT |
7519 | 91.2k | 0U, // TLTI |
7520 | 91.2k | 0U, // TLTIU_MM |
7521 | 91.2k | 0U, // TLTI_MM |
7522 | 91.2k | 92U, // TLTU |
7523 | 91.2k | 164U, // TLTU_MM |
7524 | 91.2k | 164U, // TLT_MM |
7525 | 91.2k | 92U, // TNE |
7526 | 91.2k | 0U, // TNEI |
7527 | 91.2k | 0U, // TNEI_MM |
7528 | 91.2k | 164U, // TNE_MM |
7529 | 91.2k | 152U, // TNE_NM |
7530 | 91.2k | 0U, // TRUNC_L_D64 |
7531 | 91.2k | 0U, // TRUNC_L_D_MMR6 |
7532 | 91.2k | 0U, // TRUNC_L_S |
7533 | 91.2k | 0U, // TRUNC_L_S_MMR6 |
7534 | 91.2k | 0U, // TRUNC_W_D32 |
7535 | 91.2k | 0U, // TRUNC_W_D64 |
7536 | 91.2k | 0U, // TRUNC_W_D_MMR6 |
7537 | 91.2k | 0U, // TRUNC_W_MM |
7538 | 91.2k | 0U, // TRUNC_W_S |
7539 | 91.2k | 0U, // TRUNC_W_S_MM |
7540 | 91.2k | 0U, // TRUNC_W_S_MMR6 |
7541 | 91.2k | 0U, // TTLTIU |
7542 | 91.2k | 0U, // UALH_NM |
7543 | 91.2k | 184U, // UALWM_NM |
7544 | 91.2k | 0U, // UALW_NM |
7545 | 91.2k | 0U, // UASH_NM |
7546 | 91.2k | 184U, // UASWM_NM |
7547 | 91.2k | 0U, // UASW_NM |
7548 | 91.2k | 0U, // UDIV |
7549 | 91.2k | 0U, // UDIV_MM |
7550 | 91.2k | 128U, // V3MULU |
7551 | 91.2k | 128U, // VMM0 |
7552 | 91.2k | 128U, // VMULU |
7553 | 91.2k | 184U, // VSHF_B |
7554 | 91.2k | 184U, // VSHF_D |
7555 | 91.2k | 184U, // VSHF_H |
7556 | 91.2k | 184U, // VSHF_W |
7557 | 91.2k | 0U, // WAIT |
7558 | 91.2k | 0U, // WAIT_MM |
7559 | 91.2k | 0U, // WAIT_MMR6 |
7560 | 91.2k | 0U, // WAIT_NM |
7561 | 91.2k | 0U, // WRDSP |
7562 | 91.2k | 0U, // WRDSP_MM |
7563 | 91.2k | 0U, // WRPGPR_MMR6 |
7564 | 91.2k | 0U, // WRPGPR_NM |
7565 | 91.2k | 0U, // WSBH |
7566 | 91.2k | 0U, // WSBH_MM |
7567 | 91.2k | 0U, // WSBH_MMR6 |
7568 | 91.2k | 128U, // XOR |
7569 | 91.2k | 0U, // XOR16_MM |
7570 | 91.2k | 0U, // XOR16_MMR6 |
7571 | 91.2k | 128U, // XOR16_NM |
7572 | 91.2k | 128U, // XOR64 |
7573 | 91.2k | 20U, // XORI_B |
7574 | 91.2k | 16U, // XORI_MMR6 |
7575 | 91.2k | 128U, // XORI_NM |
7576 | 91.2k | 128U, // XOR_MM |
7577 | 91.2k | 128U, // XOR_MMR6 |
7578 | 91.2k | 128U, // XOR_NM |
7579 | 91.2k | 128U, // XOR_V |
7580 | 91.2k | 16U, // XORi |
7581 | 91.2k | 16U, // XORi64 |
7582 | 91.2k | 16U, // XORi_MM |
7583 | 91.2k | 0U, // XorRxRxRy16 |
7584 | 91.2k | 0U, // YIELD |
7585 | 91.2k | 0U, // YIELD_NM |
7586 | 91.2k | }; |
7587 | | |
7588 | | // Emit the opcode for the instruction. |
7589 | 91.2k | uint64_t Bits = 0; |
7590 | 91.2k | Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0; |
7591 | 91.2k | Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32; |
7592 | 91.2k | MnemonicBitsInfo MBI = { |
7593 | 91.2k | #ifndef CAPSTONE_DIET |
7594 | 91.2k | AsmStrs+(Bits & 16383)-1, |
7595 | | #else |
7596 | | NULL, |
7597 | | #endif // CAPSTONE_DIET |
7598 | 91.2k | Bits |
7599 | 91.2k | }; |
7600 | 91.2k | return MBI; |
7601 | 91.2k | } |
7602 | | |
7603 | | /// printInstruction - This method is automatically generated by tablegen |
7604 | | /// from the instruction set description. |
7605 | 91.2k | static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { |
7606 | 91.2k | SStream_concat0(O, ""); |
7607 | 91.2k | MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O); |
7608 | | |
7609 | 91.2k | SStream_concat0(O, MnemonicInfo.first); |
7610 | | |
7611 | 91.2k | uint64_t Bits = MnemonicInfo.second; |
7612 | 91.2k | CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction."); |
7613 | | |
7614 | | // Fragment 0 encoded into 5 bits for 20 unique commands. |
7615 | 91.2k | switch ((Bits >> 14) & 31) { |
7616 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7617 | 1.10k | case 0: |
7618 | | // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... |
7619 | 1.10k | return; |
7620 | 0 | break; |
7621 | 79.8k | case 1: |
7622 | | // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro... |
7623 | 79.8k | printOperand(MI, 0, O); |
7624 | 79.8k | break; |
7625 | 1.18k | case 2: |
7626 | | // B_MMR6_Pseudo, B_MM_Pseudo, B16_MM, BAL, BALC, BALC_MMR6, BC, BC16_MMR... |
7627 | 1.18k | printBranchOperand(MI, Address, 0, O); |
7628 | 1.18k | break; |
7629 | 2.75k | case 3: |
7630 | | // CTTC1, MTTACX, MTTACX_NM, MTTC0, MTTC0_NM, MTTC1, MTTGPR, MTTGPR_NM, M... |
7631 | 2.75k | printOperand(MI, 1, O); |
7632 | 2.75k | SStream_concat0(O, ", "); |
7633 | 2.75k | break; |
7634 | 1.34k | case 4: |
7635 | | // LWM_MM, SWM_MM, LWM16_MM, LWM16_MMR6, LWM32_MM, SWM16_MM, SWM16_MMR6, ... |
7636 | 1.34k | printRegisterList(MI, 0, O); |
7637 | 1.34k | SStream_concat0(O, ", "); |
7638 | 1.34k | printMemOperand(MI, 1, O); |
7639 | 1.34k | return; |
7640 | 0 | break; |
7641 | 0 | case 5: |
7642 | | // SelBeqZ, SelBneZ, SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZ... |
7643 | 0 | printOperand(MI, 3, O); |
7644 | 0 | break; |
7645 | 1.14k | case 6: |
7646 | | // AND16_MM, AND16_MMR6, LSA_MMR6, MTHC1_D32, MTHC1_D32_MM, MTHC1_D64, MT... |
7647 | 1.14k | printOperand(MI, 2, O); |
7648 | 1.14k | SStream_concat0(O, ", "); |
7649 | 1.14k | break; |
7650 | 0 | case 7: |
7651 | | // BALC16_NM, BALC_NM |
7652 | 0 | printPCRel(MI, Address, 0, O); |
7653 | 0 | return; |
7654 | 0 | break; |
7655 | 152 | case 8: |
7656 | | // BREAK, BREAK_MM, BREAK_MMR6, HYPCALL, HYPCALL_MM, SDBBP_MM, SYSCALL_MM... |
7657 | 152 | printUImm_10_0(MI, 0, O); |
7658 | 152 | break; |
7659 | 143 | case 9: |
7660 | | // BREAK16_MM, BREAK16_MMR6, SDBBP16_MM, SDBBP16_MMR6 |
7661 | 143 | printUImm_4_0(MI, 0, O); |
7662 | 143 | return; |
7663 | 0 | break; |
7664 | 538 | case 10: |
7665 | | // CACHE, CACHEE, CACHEE_MM, CACHE_MM, CACHE_MMR6, CACHE_R6, PREF, PREFE,... |
7666 | 538 | printUImm_5_0(MI, 2, O); |
7667 | 538 | SStream_concat0(O, ", "); |
7668 | 538 | break; |
7669 | 275 | case 11: |
7670 | | // CACHE_NM, PREF_NM, PREFs9_NM, SYNC, SYNC_MM, SYNC_MMR6, SYNC_NM |
7671 | 275 | printUImm_5_0(MI, 0, O); |
7672 | 275 | break; |
7673 | 0 | case 12: |
7674 | | // FCMP_D32, FCMP_D32_MM, FCMP_D64, FCMP_S32, FCMP_S32_MM |
7675 | 0 | printFCCOperand(MI, 2, O); |
7676 | 0 | break; |
7677 | 2.07k | case 13: |
7678 | | // J, JAL, JALS_MM, JALX, JALX_MM, JAL_MM, J_MM |
7679 | 2.07k | printJumpOperand(MI, 0, O); |
7680 | 2.07k | return; |
7681 | 0 | break; |
7682 | 0 | case 14: |
7683 | | // Jal16, JalB16 |
7684 | 0 | printUImm_26_0(MI, 0, O); |
7685 | 0 | break; |
7686 | 0 | case 15: |
7687 | | // RESTOREJRC16_NM, SAVE16_NM |
7688 | 0 | printUImm_8_0(MI, 0, O); |
7689 | 0 | printNanoMipsRegisterList(MI, 1, O); |
7690 | 0 | return; |
7691 | 0 | break; |
7692 | 0 | case 16: |
7693 | | // RESTOREJRC_NM, RESTORE_NM, SAVE_NM |
7694 | 0 | printUImm_12_0(MI, 0, O); |
7695 | 0 | printNanoMipsRegisterList(MI, 1, O); |
7696 | 0 | return; |
7697 | 0 | break; |
7698 | 233 | case 17: |
7699 | | // SDBBP, SDBBP_MMR6, SDBBP_R6, SYSCALL |
7700 | 233 | printUImm_20_0(MI, 0, O); |
7701 | 233 | return; |
7702 | 0 | break; |
7703 | 313 | case 18: |
7704 | | // SIGRIE, SIGRIE_MMR6 |
7705 | 313 | printUImm_16_0(MI, 0, O); |
7706 | 313 | return; |
7707 | 0 | break; |
7708 | 211 | case 19: |
7709 | | // SYNCI, SYNCI_MM, SYNCI_MMR6, SYNCI_NM, SYNCIs9_NM |
7710 | 211 | printMemOperand(MI, 0, O); |
7711 | 211 | return; |
7712 | 0 | break; |
7713 | 91.2k | } |
7714 | | |
7715 | | |
7716 | | // Fragment 1 encoded into 5 bits for 18 unique commands. |
7717 | 85.8k | switch ((Bits >> 19) & 31) { |
7718 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7719 | 77.2k | case 0: |
7720 | | // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro... |
7721 | 77.2k | SStream_concat0(O, ", "); |
7722 | 77.2k | break; |
7723 | 3.47k | case 1: |
7724 | | // B_MMR6_Pseudo, B_MM_Pseudo, Constant32, JalOneReg, MFTDSP, MFTDSP_NM, ... |
7725 | 3.47k | return; |
7726 | 0 | break; |
7727 | 1.61k | case 2: |
7728 | | // CTTC1, MTTACX, MTTACX_NM, MTTC0, MTTC0_NM, MTTC1, MTTGPR, MTTGPR_NM, M... |
7729 | 1.61k | printOperand(MI, 0, O); |
7730 | 1.61k | break; |
7731 | 0 | case 3: |
7732 | | // LwConstant32 |
7733 | 0 | SStream_concat0(O, ", 1f\n\tb\t2f\n\t.align\t2\n1: \t.word\t"); |
7734 | 0 | printOperand(MI, 1, O); |
7735 | 0 | SStream_concat0(O, "\n2:"); |
7736 | 0 | return; |
7737 | 0 | break; |
7738 | 265 | case 4: |
7739 | | // MultRxRyRz16, MultuRxRyRz16, SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImm... |
7740 | 265 | printOperand(MI, 2, O); |
7741 | 265 | break; |
7742 | 0 | case 5: |
7743 | | // SelBeqZ, SelBneZ |
7744 | 0 | SStream_concat0(O, ", .+4\n\t\n\tmove "); |
7745 | 0 | printOperand(MI, 1, O); |
7746 | 0 | SStream_concat0(O, ", "); |
7747 | 0 | printOperand(MI, 2, O); |
7748 | 0 | return; |
7749 | 0 | break; |
7750 | 769 | case 6: |
7751 | | // AND16_MM, AND16_MMR6, LSA_MMR6, OR16_MM, OR16_MMR6, PREFX_MM, XOR16_MM... |
7752 | 769 | printOperand(MI, 1, O); |
7753 | 769 | break; |
7754 | 0 | case 7: |
7755 | | // AddiuRxPcImmX16 |
7756 | 0 | SStream_concat0(O, ", $pc, "); |
7757 | 0 | printOperand(MI, 1, O); |
7758 | 0 | return; |
7759 | 0 | break; |
7760 | 0 | case 8: |
7761 | | // AddiuSpImm16, Bimm16 |
7762 | 0 | SStream_concat0(O, " # 16 bit inst"); |
7763 | 0 | return; |
7764 | 0 | break; |
7765 | 0 | case 9: |
7766 | | // Bteqz16, Btnez16 |
7767 | 0 | SStream_concat0(O, " # 16 bit inst"); |
7768 | 0 | return; |
7769 | 0 | break; |
7770 | 502 | case 10: |
7771 | | // CACHE, CACHEE, CACHEE_MM, CACHE_MM, CACHE_MMR6, CACHE_R6, PREF, PREFE,... |
7772 | 502 | printMemOperand(MI, 0, O); |
7773 | 502 | return; |
7774 | 0 | break; |
7775 | 0 | case 11: |
7776 | | // FCMP_D32, FCMP_D32_MM, FCMP_D64 |
7777 | 0 | SStream_concat0(O, ".d\t"); |
7778 | 0 | printOperand(MI, 0, O); |
7779 | 0 | SStream_concat0(O, ", "); |
7780 | 0 | printOperand(MI, 1, O); |
7781 | 0 | return; |
7782 | 0 | break; |
7783 | 0 | case 12: |
7784 | | // FCMP_S32, FCMP_S32_MM |
7785 | 0 | SStream_concat0(O, ".s\t"); |
7786 | 0 | printOperand(MI, 0, O); |
7787 | 0 | SStream_concat0(O, ", "); |
7788 | 0 | printOperand(MI, 1, O); |
7789 | 0 | return; |
7790 | 0 | break; |
7791 | 693 | case 13: |
7792 | | // INSERT_B, INSERT_D, INSERT_H, INSERT_W, INSVE_B, INSVE_D, INSVE_H, INS... |
7793 | 693 | SStream_concat1(O, '['); |
7794 | 693 | break; |
7795 | 0 | case 14: |
7796 | | // Jal16 |
7797 | 0 | SStream_concat0(O, "\n\tnop"); |
7798 | 0 | return; |
7799 | 0 | break; |
7800 | 0 | case 15: |
7801 | | // JalB16 |
7802 | 0 | SStream_concat0(O, "\t# branch\n\tnop"); |
7803 | 0 | return; |
7804 | 0 | break; |
7805 | 0 | case 16: |
7806 | | // SAA, SAAD |
7807 | 0 | SStream_concat0(O, ", ("); |
7808 | 0 | printOperand(MI, 1, O); |
7809 | 0 | SStream_concat1(O, ')'); |
7810 | 0 | return; |
7811 | 0 | break; |
7812 | 1.28k | case 17: |
7813 | | // SC, SC64, SC64_R6, SCD, SCD_R6, SCE, SCE_MM, SC_MM, SC_MMR6, SC_NM, SC... |
7814 | 1.28k | printMemOperand(MI, 2, O); |
7815 | 1.28k | return; |
7816 | 0 | break; |
7817 | 85.8k | } |
7818 | | |
7819 | | |
7820 | | // Fragment 2 encoded into 5 bits for 30 unique commands. |
7821 | 80.6k | switch ((Bits >> 24) & 31) { |
7822 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7823 | 46.8k | case 0: |
7824 | | // ABSMacro, ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro... |
7825 | 46.8k | printOperand(MI, 1, O); |
7826 | 46.8k | break; |
7827 | 1.99k | case 1: |
7828 | | // CTTC1, MTTACX, MTTACX_NM, MTTC1, MTTGPR, MTTGPR_NM, MTTHC1, MTTHI, MTT... |
7829 | 1.99k | return; |
7830 | 0 | break; |
7831 | 3.43k | case 2: |
7832 | | // GotPrologue16, AddiuRxRxImm16, AddiuRxRxImmX16, AndRxRxRy16, BINSLI_B,... |
7833 | 3.43k | printOperand(MI, 2, O); |
7834 | 3.43k | break; |
7835 | 17.4k | case 3: |
7836 | | // LDMacro, LOAD_ACC128, LOAD_ACC64, LOAD_ACC64DSP, LOAD_CCOND_DSP, LoadA... |
7837 | 17.4k | printMemOperand(MI, 1, O); |
7838 | 17.4k | break; |
7839 | 627 | case 4: |
7840 | | // MTTC0, MTTC0_NM, DMTC0, DMTC2, DMTGC0, FORK, FORK_NM, LSA_MMR6, MTC0, ... |
7841 | 627 | SStream_concat0(O, ", "); |
7842 | 627 | break; |
7843 | 0 | case 5: |
7844 | | // MultRxRyRz16, MultuRxRyRz16 |
7845 | 0 | SStream_concat0(O, "\n\tmflo\t"); |
7846 | 0 | printOperand(MI, 0, O); |
7847 | 0 | return; |
7848 | 0 | break; |
7849 | 0 | case 6: |
7850 | | // PseudoLA_NM, PseudoLI_NM, LI48_NM |
7851 | 0 | printUImm_32_0(MI, 1, O); |
7852 | 0 | return; |
7853 | 0 | break; |
7854 | 0 | case 7: |
7855 | | // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt... |
7856 | 0 | printOperand(MI, 4, O); |
7857 | 0 | break; |
7858 | 0 | case 8: |
7859 | | // SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16, SltuRxRyRz... |
7860 | 0 | SStream_concat0(O, "\n\tmove\t"); |
7861 | 0 | printOperand(MI, 0, O); |
7862 | 0 | SStream_concat0(O, ", $t8"); |
7863 | 0 | return; |
7864 | 0 | break; |
7865 | 0 | case 9: |
7866 | | // ALUIPC_NM |
7867 | 0 | printHi20PCRel(MI, Address, 1, O); |
7868 | 0 | return; |
7869 | 0 | break; |
7870 | 0 | case 10: |
7871 | | // AddiuRxRyOffMemX16, LEA_ADDIU_NM, LEA_ADDiu, LEA_ADDiu64, LEA_ADDiu_MM |
7872 | 0 | printMemOperandEA(MI, 1, O); |
7873 | 0 | return; |
7874 | 0 | break; |
7875 | 0 | case 11: |
7876 | | // BBIT0, BBIT032, BBIT1, BBIT132 |
7877 | 0 | printUImm_5_0(MI, 1, O); |
7878 | 0 | SStream_concat0(O, ", "); |
7879 | 0 | printBranchOperand(MI, Address, 2, O); |
7880 | 0 | return; |
7881 | 0 | break; |
7882 | 8.27k | case 12: |
7883 | | // BC1EQZ, BC1EQZC_MMR6, BC1F, BC1FL, BC1F_MM, BC1NEZ, BC1NEZC_MMR6, BC1T... |
7884 | 8.27k | printBranchOperand(MI, Address, 1, O); |
7885 | 8.27k | break; |
7886 | 44 | case 13: |
7887 | | // BEQIC_NM, BGEIC_NM, BGEIUC_NM, BLTIC_NM, BLTIUC_NM, BNEIC_NM, LI16_NM,... |
7888 | 44 | printUImm_7_0(MI, 1, O); |
7889 | 44 | break; |
7890 | 153 | case 14: |
7891 | | // BREAK, BREAK_MM, BREAK_MMR6, RDDSP, WRDSP |
7892 | 153 | printUImm_10_0(MI, 1, O); |
7893 | 153 | return; |
7894 | 0 | break; |
7895 | 238 | case 15: |
7896 | | // DMFC2_OCTEON, DMTC2_OCTEON, LUI_MMR6, LUi, LUi64, LUi_MM |
7897 | 238 | printUImm_16_0(MI, 1, O); |
7898 | 238 | return; |
7899 | 0 | break; |
7900 | 229 | case 16: |
7901 | | // GINVT, GINVT_MMR6, GINVT_NM |
7902 | 229 | printUImm_2_0(MI, 1, O); |
7903 | 229 | return; |
7904 | 0 | break; |
7905 | 19 | case 17: |
7906 | | // INSERT_B |
7907 | 19 | printUImm_4_0(MI, 3, O); |
7908 | 19 | SStream_concat0(O, "], "); |
7909 | 19 | printOperand(MI, 2, O); |
7910 | 19 | return; |
7911 | 0 | break; |
7912 | 67 | case 18: |
7913 | | // INSERT_D |
7914 | 67 | printUImm_1_0(MI, 3, O); |
7915 | 67 | SStream_concat0(O, "], "); |
7916 | 67 | printOperand(MI, 2, O); |
7917 | 67 | return; |
7918 | 0 | break; |
7919 | 22 | case 19: |
7920 | | // INSERT_H |
7921 | 22 | printUImm_3_0(MI, 3, O); |
7922 | 22 | SStream_concat0(O, "], "); |
7923 | 22 | printOperand(MI, 2, O); |
7924 | 22 | return; |
7925 | 0 | break; |
7926 | 66 | case 20: |
7927 | | // INSERT_W |
7928 | 66 | printUImm_2_0(MI, 3, O); |
7929 | 66 | SStream_concat0(O, "], "); |
7930 | 66 | printOperand(MI, 2, O); |
7931 | 66 | return; |
7932 | 0 | break; |
7933 | 202 | case 21: |
7934 | | // INSVE_B |
7935 | 202 | printUImm_4_0(MI, 2, O); |
7936 | 202 | SStream_concat0(O, "], "); |
7937 | 202 | printOperand(MI, 3, O); |
7938 | 202 | SStream_concat1(O, '['); |
7939 | 202 | printUImm_0_0(MI, 4, O); |
7940 | 202 | SStream_concat1(O, ']'); |
7941 | 202 | return; |
7942 | 0 | break; |
7943 | 82 | case 22: |
7944 | | // INSVE_D |
7945 | 82 | printUImm_1_0(MI, 2, O); |
7946 | 82 | SStream_concat0(O, "], "); |
7947 | 82 | printOperand(MI, 3, O); |
7948 | 82 | SStream_concat1(O, '['); |
7949 | 82 | printUImm_0_0(MI, 4, O); |
7950 | 82 | SStream_concat1(O, ']'); |
7951 | 82 | return; |
7952 | 0 | break; |
7953 | 72 | case 23: |
7954 | | // INSVE_H |
7955 | 72 | printUImm_3_0(MI, 2, O); |
7956 | 72 | SStream_concat0(O, "], "); |
7957 | 72 | printOperand(MI, 3, O); |
7958 | 72 | SStream_concat1(O, '['); |
7959 | 72 | printUImm_0_0(MI, 4, O); |
7960 | 72 | SStream_concat1(O, ']'); |
7961 | 72 | return; |
7962 | 0 | break; |
7963 | 163 | case 24: |
7964 | | // INSVE_W |
7965 | 163 | printUImm_2_0(MI, 2, O); |
7966 | 163 | SStream_concat0(O, "], "); |
7967 | 163 | printOperand(MI, 3, O); |
7968 | 163 | SStream_concat1(O, '['); |
7969 | 163 | printUImm_0_0(MI, 4, O); |
7970 | 163 | SStream_concat1(O, ']'); |
7971 | 163 | return; |
7972 | 0 | break; |
7973 | 0 | case 25: |
7974 | | // LAPC32_NM, LAPC48_NM, LWPC_NM, SWPC_NM |
7975 | 0 | printPCRel(MI, Address, 1, O); |
7976 | 0 | return; |
7977 | 0 | break; |
7978 | 0 | case 26: |
7979 | | // LUI_NM |
7980 | 0 | printHi20(MI, 1, O); |
7981 | 0 | return; |
7982 | 0 | break; |
7983 | 311 | case 27: |
7984 | | // LWP_MM, SWP_MM |
7985 | 311 | printMemOperand(MI, 2, O); |
7986 | 311 | return; |
7987 | 0 | break; |
7988 | 36 | case 28: |
7989 | | // PREFX_MM |
7990 | 36 | SStream_concat1(O, '('); |
7991 | 36 | printOperand(MI, 0, O); |
7992 | 36 | SStream_concat1(O, ')'); |
7993 | 36 | return; |
7994 | 0 | break; |
7995 | 314 | case 29: |
7996 | | // REPL_QB, REPL_QB_MM |
7997 | 314 | printUImm_8_0(MI, 1, O); |
7998 | 314 | return; |
7999 | 0 | break; |
8000 | 80.6k | } |
8001 | | |
8002 | | |
8003 | | // Fragment 3 encoded into 5 bits for 19 unique commands. |
8004 | 76.6k | switch ((Bits >> 29) & 31) { |
8005 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8006 | 38.2k | case 0: |
8007 | | // ABSMacro, CFTC1, JalTwoReg, LDMacro, LOAD_ACC128, LOAD_ACC64, LOAD_ACC... |
8008 | 38.2k | return; |
8009 | 0 | break; |
8010 | 34.8k | case 1: |
8011 | | // ALIGN_NM, BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro, BGEU, BG... |
8012 | 34.8k | SStream_concat0(O, ", "); |
8013 | 34.8k | break; |
8014 | 0 | case 2: |
8015 | | // BteqzT8CmpX16, BteqzT8CmpiX16, BteqzT8SltX16, BteqzT8SltiX16, BteqzT8S... |
8016 | 0 | SStream_concat0(O, "\n\tbteqz\t"); |
8017 | 0 | printBranchOperand(MI, Address, 2, O); |
8018 | 0 | return; |
8019 | 0 | break; |
8020 | 0 | case 3: |
8021 | | // BtnezT8CmpX16, BtnezT8CmpiX16, BtnezT8SltX16, BtnezT8SltiX16, BtnezT8S... |
8022 | 0 | SStream_concat0(O, "\n\tbtnez\t"); |
8023 | 0 | printBranchOperand(MI, Address, 2, O); |
8024 | 0 | return; |
8025 | 0 | break; |
8026 | 0 | case 4: |
8027 | | // GotPrologue16 |
8028 | 0 | SStream_concat0(O, "\n\taddiu\t"); |
8029 | 0 | printOperand(MI, 1, O); |
8030 | 0 | SStream_concat0(O, ", $pc, "); |
8031 | 0 | printOperand(MI, 3, O); |
8032 | 0 | SStream_concat0(O, "\n "); |
8033 | 0 | return; |
8034 | 0 | break; |
8035 | 507 | case 5: |
8036 | | // MTTC0, MTTC0_NM, DMTC0, DMTC2, DMTGC0, MTC0, MTC0_MMR6, MTC2, MTGC0, M... |
8037 | 507 | printUImm_3_0(MI, 2, O); |
8038 | 507 | return; |
8039 | 0 | break; |
8040 | 0 | case 6: |
8041 | | // SelTBteqZCmp, SelTBteqZCmpi, SelTBteqZSlt, SelTBteqZSlti, SelTBteqZSlt... |
8042 | 0 | SStream_concat0(O, "\n\tbteqz\t.+4\n\tmove "); |
8043 | 0 | printOperand(MI, 1, O); |
8044 | 0 | SStream_concat0(O, ", "); |
8045 | 0 | printOperand(MI, 2, O); |
8046 | 0 | return; |
8047 | 0 | break; |
8048 | 0 | case 7: |
8049 | | // SelTBtneZCmp, SelTBtneZCmpi, SelTBtneZSlt, SelTBtneZSlti, SelTBtneZSlt... |
8050 | 0 | SStream_concat0(O, "\n\tbtnez\t.+4\n\tmove "); |
8051 | 0 | printOperand(MI, 1, O); |
8052 | 0 | SStream_concat0(O, ", "); |
8053 | 0 | printOperand(MI, 2, O); |
8054 | 0 | return; |
8055 | 0 | break; |
8056 | 0 | case 8: |
8057 | | // AddiuRxRxImm16, LwRxPcTcp16 |
8058 | 0 | SStream_concat0(O, "\t# 16 bit inst"); |
8059 | 0 | return; |
8060 | 0 | break; |
8061 | 0 | case 9: |
8062 | | // BeqzRxImm16, BnezRxImm16 |
8063 | 0 | SStream_concat0(O, " # 16 bit inst"); |
8064 | 0 | return; |
8065 | 0 | break; |
8066 | 2.18k | case 10: |
8067 | | // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_H, COPY_U_W, ... |
8068 | 2.18k | SStream_concat1(O, '['); |
8069 | 2.18k | break; |
8070 | 0 | case 11: |
8071 | | // CmpiRxImm16, LiRxImm16, SltiRxImm16, SltiuRxImm16 |
8072 | 0 | SStream_concat0(O, " \t# 16 bit inst"); |
8073 | 0 | return; |
8074 | 0 | break; |
8075 | 0 | case 12: |
8076 | | // DSLL64_32 |
8077 | 0 | SStream_concat0(O, ", 32"); |
8078 | 0 | return; |
8079 | 0 | break; |
8080 | 18 | case 13: |
8081 | | // FORK, FORK_NM |
8082 | 18 | printOperand(MI, 2, O); |
8083 | 18 | return; |
8084 | 0 | break; |
8085 | 711 | case 14: |
8086 | | // LBUX, LBUX_MM, LDXC1, LDXC164, LHX, LHX_MM, LUXC1, LUXC164, LUXC1_MM, ... |
8087 | 711 | SStream_concat1(O, '('); |
8088 | 711 | printOperand(MI, 1, O); |
8089 | 711 | SStream_concat1(O, ')'); |
8090 | 711 | return; |
8091 | 0 | break; |
8092 | 67 | case 15: |
8093 | | // LSA_MMR6 |
8094 | 67 | printOperand(MI, 0, O); |
8095 | 67 | SStream_concat0(O, ", "); |
8096 | 67 | printUImm_2_1(MI, 3, O); |
8097 | 67 | return; |
8098 | 0 | break; |
8099 | 35 | case 16: |
8100 | | // MTTR, MTTR_NM |
8101 | 35 | printUImm_1_0(MI, 2, O); |
8102 | 35 | SStream_concat0(O, ", "); |
8103 | 35 | printUImm_3_0(MI, 3, O); |
8104 | 35 | SStream_concat0(O, ", "); |
8105 | 35 | printUImm_1_0(MI, 4, O); |
8106 | 35 | return; |
8107 | 0 | break; |
8108 | 0 | case 17: |
8109 | | // SCWP_NM |
8110 | 0 | printMemOperand(MI, 3, O); |
8111 | 0 | return; |
8112 | 0 | break; |
8113 | 0 | case 18: |
8114 | | // SLL64_32, SLL64_64 |
8115 | 0 | SStream_concat0(O, ", 0"); |
8116 | 0 | return; |
8117 | 0 | break; |
8118 | 76.6k | } |
8119 | | |
8120 | | |
8121 | | // Fragment 4 encoded into 5 bits for 24 unique commands. |
8122 | 37.0k | switch ((Bits >> 34) & 31) { |
8123 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8124 | 19.5k | case 0: |
8125 | | // ALIGN_NM, DMULImmMacro, DMULMacro, DMULOMacro, DMULOUMacro, DROL, DROL... |
8126 | 19.5k | printOperand(MI, 2, O); |
8127 | 19.5k | break; |
8128 | 6.26k | case 1: |
8129 | | // BEQLImmMacro, BGE, BGEImmMacro, BGEL, BGELImmMacro, BGEU, BGEUImmMacro... |
8130 | 6.26k | printBranchOperand(MI, Address, 2, O); |
8131 | 6.26k | return; |
8132 | 0 | break; |
8133 | 797 | case 2: |
8134 | | // MFTC0, MFTC0_NM, BCLRI_B, BNEGI_B, BSETI_B, COPY_S_H, COPY_U_H, DMFC0,... |
8135 | 797 | printUImm_3_0(MI, 2, O); |
8136 | 797 | break; |
8137 | 0 | case 3: |
8138 | | // PseudoADDIU_NM, ADDIU48_NM |
8139 | 0 | printUImm_32_0(MI, 2, O); |
8140 | 0 | return; |
8141 | 0 | break; |
8142 | 2.30k | case 4: |
8143 | | // PseudoANDI_NM, ADDIU_NM, ANDI16_NM, ANDI_MMR6, ANDi, ANDi64, ANDi_MM, ... |
8144 | 2.30k | printUImm_16_0(MI, 2, O); |
8145 | 2.30k | return; |
8146 | 0 | break; |
8147 | 557 | case 5: |
8148 | | // ADDIUR1SP_NM, ANDI_B, NORI_B, ORI_B, RDHWR, RDHWR64, RDHWR_MM, SHF_B, ... |
8149 | 557 | printUImm_8_0(MI, 2, O); |
8150 | 557 | return; |
8151 | 0 | break; |
8152 | 2.53k | case 6: |
8153 | | // ADDIUR2_NM, ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, APPEND, APPEND_MMR2, B... |
8154 | 2.53k | printUImm_5_0(MI, 2, O); |
8155 | 2.53k | break; |
8156 | 553 | case 7: |
8157 | | // BALIGN, BALIGN_MMR2, COPY_S_W, COPY_U_W, SPLATI_W |
8158 | 553 | printUImm_2_0(MI, 2, O); |
8159 | 553 | break; |
8160 | 247 | case 8: |
8161 | | // BCLRI_D, BNEGI_D, BSETI_D, DEXT, DEXT64_32, DINS, DROTR, DSLL, DSRA, D... |
8162 | 247 | printUImm_6_0(MI, 2, O); |
8163 | 247 | break; |
8164 | 1.17k | case 9: |
8165 | | // BCLRI_H, BNEGI_H, BSETI_H, COPY_S_B, COPY_U_B, SAT_S_H, SAT_U_H, SHLL_... |
8166 | 1.17k | printUImm_4_0(MI, 2, O); |
8167 | 1.17k | break; |
8168 | 184 | case 10: |
8169 | | // BINSLI_B, BINSRI_B, SLDI_H |
8170 | 184 | printUImm_3_0(MI, 3, O); |
8171 | 184 | break; |
8172 | 73 | case 11: |
8173 | | // BINSLI_D, BINSRI_D |
8174 | 73 | printUImm_6_0(MI, 3, O); |
8175 | 73 | return; |
8176 | 0 | break; |
8177 | 89 | case 12: |
8178 | | // BINSLI_H, BINSRI_H, SLDI_B |
8179 | 89 | printUImm_4_0(MI, 3, O); |
8180 | 89 | break; |
8181 | 75 | case 13: |
8182 | | // BINSLI_W, BINSRI_W |
8183 | 75 | printUImm_5_0(MI, 3, O); |
8184 | 75 | return; |
8185 | 0 | break; |
8186 | 1.80k | case 14: |
8187 | | // BINSL_B, BINSL_D, BINSL_H, BINSL_W, BINSR_B, BINSR_D, BINSR_H, BINSR_W... |
8188 | 1.80k | printOperand(MI, 3, O); |
8189 | 1.80k | break; |
8190 | 118 | case 15: |
8191 | | // BMNZI_B, BMZI_B, BSELI_B |
8192 | 118 | printUImm_8_0(MI, 3, O); |
8193 | 118 | return; |
8194 | 0 | break; |
8195 | 184 | case 16: |
8196 | | // COPY_S_D, MFTR, MFTR_NM, SPLATI_D |
8197 | 184 | printUImm_1_0(MI, 2, O); |
8198 | 184 | break; |
8199 | 0 | case 17: |
8200 | | // DEXTU, DINSU |
8201 | 0 | printUImm_5_32(MI, 2, O); |
8202 | 0 | SStream_concat0(O, ", "); |
8203 | 0 | break; |
8204 | 34 | case 18: |
8205 | | // FADD_S_MMR6, FDIV_S_MMR6, FMUL_S_MMR6, FSUB_S_MMR6 |
8206 | 34 | printOperand(MI, 1, O); |
8207 | 34 | return; |
8208 | 0 | break; |
8209 | 0 | case 19: |
8210 | | // LLWP_NM |
8211 | 0 | printMemOperand(MI, 2, O); |
8212 | 0 | return; |
8213 | 0 | break; |
8214 | 0 | case 20: |
8215 | | // MOVEBALC_NM |
8216 | 0 | printPCRel(MI, Address, 2, O); |
8217 | 0 | return; |
8218 | 0 | break; |
8219 | 35 | case 21: |
8220 | | // SLDI_D |
8221 | 35 | printUImm_1_0(MI, 3, O); |
8222 | 35 | SStream_concat1(O, ']'); |
8223 | 35 | return; |
8224 | 0 | break; |
8225 | 76 | case 22: |
8226 | | // SLDI_W |
8227 | 76 | printUImm_2_0(MI, 3, O); |
8228 | 76 | SStream_concat1(O, ']'); |
8229 | 76 | return; |
8230 | 0 | break; |
8231 | 380 | case 23: |
8232 | | // TEQ, TGE, TGEU, TLT, TLTU, TNE |
8233 | 380 | printUImm_10_0(MI, 2, O); |
8234 | 380 | return; |
8235 | 0 | break; |
8236 | 37.0k | } |
8237 | | |
8238 | | |
8239 | | // Fragment 5 encoded into 3 bits for 5 unique commands. |
8240 | 27.1k | switch ((Bits >> 39) & 7) { |
8241 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8242 | 3.23k | case 0: |
8243 | | // ALIGN_NM, ALIGN, ALIGN_MMR6, CINS, CINS32, CINS64_32, CINS_i32, DALIGN... |
8244 | 3.23k | SStream_concat0(O, ", "); |
8245 | 3.23k | break; |
8246 | 21.8k | case 1: |
8247 | | // DMULImmMacro, DMULMacro, DMULOMacro, DMULOUMacro, DROL, DROLImm, DROR,... |
8248 | 21.8k | return; |
8249 | 0 | break; |
8250 | 2.07k | case 2: |
8251 | | // COPY_S_B, COPY_S_D, COPY_S_H, COPY_S_W, COPY_U_B, COPY_U_H, COPY_U_W, ... |
8252 | 2.07k | SStream_concat1(O, ']'); |
8253 | 2.07k | return; |
8254 | 0 | break; |
8255 | 0 | case 3: |
8256 | | // DEXTU |
8257 | 0 | printUImm_5_1(MI, 3, O); |
8258 | 0 | return; |
8259 | 0 | break; |
8260 | 0 | case 4: |
8261 | | // DINSU |
8262 | 0 | printUImm_6_0(MI, 3, O); |
8263 | 0 | return; |
8264 | 0 | break; |
8265 | 27.1k | } |
8266 | | |
8267 | | |
8268 | | // Fragment 6 encoded into 4 bits for 10 unique commands. |
8269 | 3.23k | switch ((Bits >> 42) & 15) { |
8270 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8271 | 2.02k | case 0: |
8272 | | // ALIGN_NM, MADD_D32, MADD_D32_MM, MADD_D64, MADD_S, MADD_S_MM, MOVEPREV... |
8273 | 2.02k | printOperand(MI, 3, O); |
8274 | 2.02k | return; |
8275 | 0 | break; |
8276 | 177 | case 1: |
8277 | | // ALIGN, ALIGN_MMR6, LSA_NM |
8278 | 177 | printUImm_2_0(MI, 3, O); |
8279 | 177 | return; |
8280 | 0 | break; |
8281 | 0 | case 2: |
8282 | | // CINS, CINS32, CINS64_32, CINS_i32, EXTS, EXTS32, EXTW_NM, ROTX_NM |
8283 | 0 | printUImm_5_0(MI, 3, O); |
8284 | 0 | break; |
8285 | 80 | case 3: |
8286 | | // DALIGN, MFTR, MFTR_NM |
8287 | 80 | printUImm_3_0(MI, 3, O); |
8288 | 80 | break; |
8289 | 0 | case 4: |
8290 | | // DEXT |
8291 | 0 | printUImm_6_1(MI, 3, O); |
8292 | 0 | return; |
8293 | 0 | break; |
8294 | 147 | case 5: |
8295 | | // DEXT64_32, EXT, EXT_MM, EXT_MMR6, EXT_NM |
8296 | 147 | printUImm_5_1(MI, 3, O); |
8297 | 147 | return; |
8298 | 0 | break; |
8299 | 0 | case 6: |
8300 | | // DEXTM |
8301 | 0 | printUImm_5_33(MI, 3, O); |
8302 | 0 | return; |
8303 | 0 | break; |
8304 | 146 | case 7: |
8305 | | // DINS, INS, INS_MM, INS_MMR6, INS_NM |
8306 | 146 | printUImm_6_0(MI, 3, O); |
8307 | 146 | return; |
8308 | 0 | break; |
8309 | 0 | case 8: |
8310 | | // DINSM |
8311 | 0 | printUImm_6_2(MI, 3, O); |
8312 | 0 | return; |
8313 | 0 | break; |
8314 | 655 | case 9: |
8315 | | // DLSA, DLSA_R6, LSA, LSA_R6 |
8316 | 655 | printUImm_2_1(MI, 3, O); |
8317 | 655 | return; |
8318 | 0 | break; |
8319 | 3.23k | } |
8320 | | |
8321 | | |
8322 | | // Fragment 7 encoded into 1 bits for 2 unique commands. |
8323 | 80 | if ((Bits >> 46) & 1) { |
8324 | | // MFTR, MFTR_NM, ROTX_NM |
8325 | 80 | SStream_concat0(O, ", "); |
8326 | 80 | printUImm_1_0(MI, 4, O); |
8327 | 80 | return; |
8328 | 80 | } else { |
8329 | | // CINS, CINS32, CINS64_32, CINS_i32, DALIGN, EXTS, EXTS32, EXTW_NM |
8330 | 0 | return; |
8331 | 0 | } |
8332 | | |
8333 | 80 | } |
8334 | | |
8335 | | |
8336 | | /// getRegisterName - This method is automatically generated by tblgen |
8337 | | /// from the register set description. This returns the assembler name |
8338 | | /// for the specified register. |
8339 | 86.0k | static const char *getRegisterName(unsigned RegNo) { |
8340 | 86.0k | #ifndef CAPSTONE_DIET |
8341 | 86.0k | CS_ASSERT_RET_VAL(RegNo && RegNo < 635 && "Invalid register number!", NULL); |
8342 | | |
8343 | 86.0k | static const char AsmStrs[] = { |
8344 | 86.0k | /* 0 */ "f10\0" |
8345 | 86.0k | /* 4 */ "watchhi10\0" |
8346 | 86.0k | /* 14 */ "watchlo10\0" |
8347 | 86.0k | /* 24 */ "w10\0" |
8348 | 86.0k | /* 28 */ "f20\0" |
8349 | 86.0k | /* 32 */ "DSPOutFlag20\0" |
8350 | 86.0k | /* 45 */ "w20\0" |
8351 | 86.0k | /* 49 */ "f30\0" |
8352 | 86.0k | /* 53 */ "w30\0" |
8353 | 86.0k | /* 57 */ "a0\0" |
8354 | 86.0k | /* 60 */ "ac0\0" |
8355 | 86.0k | /* 64 */ "fcc0\0" |
8356 | 86.0k | /* 69 */ "vpeconf0\0" |
8357 | 86.0k | /* 78 */ "mvpconf0\0" |
8358 | 86.0k | /* 87 */ "srsconf0\0" |
8359 | 86.0k | /* 96 */ "watchhi0\0" |
8360 | 86.0k | /* 105 */ "k0\0" |
8361 | 86.0k | /* 108 */ "mpl0\0" |
8362 | 86.0k | /* 113 */ "perfctl0\0" |
8363 | 86.0k | /* 122 */ "segctl0\0" |
8364 | 86.0k | /* 130 */ "guestctl0\0" |
8365 | 86.0k | /* 140 */ "watchlo0\0" |
8366 | 86.0k | /* 149 */ "entrylo0\0" |
8367 | 86.0k | /* 158 */ "p0\0" |
8368 | 86.0k | /* 161 */ "s0\0" |
8369 | 86.0k | /* 164 */ "perfcnt0\0" |
8370 | 86.0k | /* 173 */ "w0\0" |
8371 | 86.0k | /* 176 */ "f11\0" |
8372 | 86.0k | /* 180 */ "watchhi11\0" |
8373 | 86.0k | /* 190 */ "watchlo11\0" |
8374 | 86.0k | /* 200 */ "w11\0" |
8375 | 86.0k | /* 204 */ "f21\0" |
8376 | 86.0k | /* 208 */ "DSPOutFlag21\0" |
8377 | 86.0k | /* 221 */ "w21\0" |
8378 | 86.0k | /* 225 */ "f31\0" |
8379 | 86.0k | /* 229 */ "w31\0" |
8380 | 86.0k | /* 233 */ "usertracedata1\0" |
8381 | 86.0k | /* 248 */ "ac1\0" |
8382 | 86.0k | /* 252 */ "fcc1\0" |
8383 | 86.0k | /* 257 */ "vpeconf1\0" |
8384 | 86.0k | /* 266 */ "mvpconf1\0" |
8385 | 86.0k | /* 275 */ "srsconf1\0" |
8386 | 86.0k | /* 284 */ "config1\0" |
8387 | 86.0k | /* 292 */ "kscratch1\0" |
8388 | 86.0k | /* 302 */ "watchhi1\0" |
8389 | 86.0k | /* 311 */ "k1\0" |
8390 | 86.0k | /* 314 */ "mpl1\0" |
8391 | 86.0k | /* 319 */ "perfctl1\0" |
8392 | 86.0k | /* 328 */ "segctl1\0" |
8393 | 86.0k | /* 336 */ "guestctl1\0" |
8394 | 86.0k | /* 346 */ "watchlo1\0" |
8395 | 86.0k | /* 355 */ "entrylo1\0" |
8396 | 86.0k | /* 364 */ "p1\0" |
8397 | 86.0k | /* 367 */ "s1\0" |
8398 | 86.0k | /* 370 */ "perfcnt1\0" |
8399 | 86.0k | /* 379 */ "w1\0" |
8400 | 86.0k | /* 382 */ "f12\0" |
8401 | 86.0k | /* 386 */ "watchhi12\0" |
8402 | 86.0k | /* 396 */ "watchlo12\0" |
8403 | 86.0k | /* 406 */ "w12\0" |
8404 | 86.0k | /* 410 */ "f22\0" |
8405 | 86.0k | /* 414 */ "DSPOutFlag22\0" |
8406 | 86.0k | /* 427 */ "w22\0" |
8407 | 86.0k | /* 431 */ "usertracedata2\0" |
8408 | 86.0k | /* 446 */ "ac2\0" |
8409 | 86.0k | /* 450 */ "fcc2\0" |
8410 | 86.0k | /* 455 */ "srsconf2\0" |
8411 | 86.0k | /* 464 */ "config2\0" |
8412 | 86.0k | /* 472 */ "debug2\0" |
8413 | 86.0k | /* 479 */ "kscratch2\0" |
8414 | 86.0k | /* 489 */ "watchhi2\0" |
8415 | 86.0k | /* 498 */ "tracecontrol2\0" |
8416 | 86.0k | /* 512 */ "mpl2\0" |
8417 | 86.0k | /* 517 */ "perfctl2\0" |
8418 | 86.0k | /* 526 */ "segctl2\0" |
8419 | 86.0k | /* 534 */ "guestctl2\0" |
8420 | 86.0k | /* 544 */ "watchlo2\0" |
8421 | 86.0k | /* 553 */ "srsmap2\0" |
8422 | 86.0k | /* 561 */ "s2\0" |
8423 | 86.0k | /* 564 */ "perfcnt2\0" |
8424 | 86.0k | /* 573 */ "w2\0" |
8425 | 86.0k | /* 576 */ "f13\0" |
8426 | 86.0k | /* 580 */ "watchhi13\0" |
8427 | 86.0k | /* 590 */ "watchlo13\0" |
8428 | 86.0k | /* 600 */ "w13\0" |
8429 | 86.0k | /* 604 */ "f23\0" |
8430 | 86.0k | /* 608 */ "DSPOutFlag23\0" |
8431 | 86.0k | /* 621 */ "w23\0" |
8432 | 86.0k | /* 625 */ "a3\0" |
8433 | 86.0k | /* 628 */ "ac3\0" |
8434 | 86.0k | /* 632 */ "fcc3\0" |
8435 | 86.0k | /* 637 */ "srsconf3\0" |
8436 | 86.0k | /* 646 */ "config3\0" |
8437 | 86.0k | /* 654 */ "kscratch3\0" |
8438 | 86.0k | /* 664 */ "watchhi3\0" |
8439 | 86.0k | /* 673 */ "tracecontrol3\0" |
8440 | 86.0k | /* 687 */ "perfctl3\0" |
8441 | 86.0k | /* 696 */ "guestctl3\0" |
8442 | 86.0k | /* 706 */ "watchlo3\0" |
8443 | 86.0k | /* 715 */ "s3\0" |
8444 | 86.0k | /* 718 */ "perfcnt3\0" |
8445 | 86.0k | /* 727 */ "w3\0" |
8446 | 86.0k | /* 730 */ "f14\0" |
8447 | 86.0k | /* 734 */ "watchhi14\0" |
8448 | 86.0k | /* 744 */ "watchlo14\0" |
8449 | 86.0k | /* 754 */ "w14\0" |
8450 | 86.0k | /* 758 */ "f24\0" |
8451 | 86.0k | /* 762 */ "w24\0" |
8452 | 86.0k | /* 766 */ "a4\0" |
8453 | 86.0k | /* 769 */ "fcc4\0" |
8454 | 86.0k | /* 774 */ "srsconf4\0" |
8455 | 86.0k | /* 783 */ "config4\0" |
8456 | 86.0k | /* 791 */ "kscratch4\0" |
8457 | 86.0k | /* 801 */ "watchhi4\0" |
8458 | 86.0k | /* 810 */ "perfctl4\0" |
8459 | 86.0k | /* 819 */ "watchlo4\0" |
8460 | 86.0k | /* 828 */ "s4\0" |
8461 | 86.0k | /* 831 */ "perfcnt4\0" |
8462 | 86.0k | /* 840 */ "w4\0" |
8463 | 86.0k | /* 843 */ "f15\0" |
8464 | 86.0k | /* 847 */ "watchhi15\0" |
8465 | 86.0k | /* 857 */ "watchlo15\0" |
8466 | 86.0k | /* 867 */ "w15\0" |
8467 | 86.0k | /* 871 */ "f25\0" |
8468 | 86.0k | /* 875 */ "w25\0" |
8469 | 86.0k | /* 879 */ "a5\0" |
8470 | 86.0k | /* 882 */ "fcc5\0" |
8471 | 86.0k | /* 887 */ "f5\0" |
8472 | 86.0k | /* 890 */ "config5\0" |
8473 | 86.0k | /* 898 */ "kscratch5\0" |
8474 | 86.0k | /* 908 */ "watchhi5\0" |
8475 | 86.0k | /* 917 */ "perfctl5\0" |
8476 | 86.0k | /* 926 */ "watchlo5\0" |
8477 | 86.0k | /* 935 */ "s5\0" |
8478 | 86.0k | /* 938 */ "perfcnt5\0" |
8479 | 86.0k | /* 947 */ "w5\0" |
8480 | 86.0k | /* 950 */ "f16\0" |
8481 | 86.0k | /* 954 */ "w16\0" |
8482 | 86.0k | /* 958 */ "f26\0" |
8483 | 86.0k | /* 962 */ "w26\0" |
8484 | 86.0k | /* 966 */ "a6\0" |
8485 | 86.0k | /* 969 */ "fcc6\0" |
8486 | 86.0k | /* 974 */ "f6\0" |
8487 | 86.0k | /* 977 */ "kscratch6\0" |
8488 | 86.0k | /* 987 */ "watchhi6\0" |
8489 | 86.0k | /* 996 */ "perfctl6\0" |
8490 | 86.0k | /* 1005 */ "watchlo6\0" |
8491 | 86.0k | /* 1014 */ "s6\0" |
8492 | 86.0k | /* 1017 */ "perfcnt6\0" |
8493 | 86.0k | /* 1026 */ "w6\0" |
8494 | 86.0k | /* 1029 */ "f17\0" |
8495 | 86.0k | /* 1033 */ "w17\0" |
8496 | 86.0k | /* 1037 */ "f27\0" |
8497 | 86.0k | /* 1041 */ "w27\0" |
8498 | 86.0k | /* 1045 */ "a7\0" |
8499 | 86.0k | /* 1048 */ "fcc7\0" |
8500 | 86.0k | /* 1053 */ "f7\0" |
8501 | 86.0k | /* 1056 */ "watchhi7\0" |
8502 | 86.0k | /* 1065 */ "perfctl7\0" |
8503 | 86.0k | /* 1074 */ "watchlo7\0" |
8504 | 86.0k | /* 1083 */ "s7\0" |
8505 | 86.0k | /* 1086 */ "perfcnt7\0" |
8506 | 86.0k | /* 1095 */ "w7\0" |
8507 | 86.0k | /* 1098 */ "f18\0" |
8508 | 86.0k | /* 1102 */ "w18\0" |
8509 | 86.0k | /* 1106 */ "f28\0" |
8510 | 86.0k | /* 1110 */ "w28\0" |
8511 | 86.0k | /* 1114 */ "f8\0" |
8512 | 86.0k | /* 1117 */ "watchhi8\0" |
8513 | 86.0k | /* 1126 */ "watchlo8\0" |
8514 | 86.0k | /* 1135 */ "t8\0" |
8515 | 86.0k | /* 1138 */ "w8\0" |
8516 | 86.0k | /* 1141 */ "DSPOutFlag16_19\0" |
8517 | 86.0k | /* 1157 */ "f19\0" |
8518 | 86.0k | /* 1161 */ "w19\0" |
8519 | 86.0k | /* 1165 */ "f29\0" |
8520 | 86.0k | /* 1169 */ "w29\0" |
8521 | 86.0k | /* 1173 */ "f9\0" |
8522 | 86.0k | /* 1176 */ "watchhi9\0" |
8523 | 86.0k | /* 1185 */ "watchlo9\0" |
8524 | 86.0k | /* 1194 */ "t9\0" |
8525 | 86.0k | /* 1197 */ "w9\0" |
8526 | 86.0k | /* 1200 */ "DSPEFI\0" |
8527 | 86.0k | /* 1207 */ "hwrena\0" |
8528 | 86.0k | /* 1214 */ "ra\0" |
8529 | 86.0k | /* 1217 */ "bevva\0" |
8530 | 86.0k | /* 1223 */ "hwr_cc\0" |
8531 | 86.0k | /* 1230 */ "tracedbpc\0" |
8532 | 86.0k | /* 1240 */ "traceibpc\0" |
8533 | 86.0k | /* 1250 */ "nestedepc\0" |
8534 | 86.0k | /* 1260 */ "errorepc\0" |
8535 | 86.0k | /* 1269 */ "nestedexc\0" |
8536 | 86.0k | /* 1279 */ "wired\0" |
8537 | 86.0k | /* 1285 */ "memorymapid\0" |
8538 | 86.0k | /* 1297 */ "prid\0" |
8539 | 86.0k | /* 1302 */ "debugcontextid\0" |
8540 | 86.0k | /* 1317 */ "pwfield\0" |
8541 | 86.0k | /* 1325 */ "tcbind\0" |
8542 | 86.0k | /* 1332 */ "DSPCCond\0" |
8543 | 86.0k | /* 1341 */ "tcschedule\0" |
8544 | 86.0k | /* 1352 */ "vpeschedule\0" |
8545 | 86.0k | /* 1364 */ "compare\0" |
8546 | 86.0k | /* 1372 */ "ebase\0" |
8547 | 86.0k | /* 1378 */ "cdmmbase\0" |
8548 | 86.0k | /* 1387 */ "cmgcrbase\0" |
8549 | 86.0k | /* 1397 */ "pwbase\0" |
8550 | 86.0k | /* 1404 */ "cause\0" |
8551 | 86.0k | /* 1410 */ "desave\0" |
8552 | 86.0k | /* 1417 */ "pwsize\0" |
8553 | 86.0k | /* 1424 */ "DSPOutFlag\0" |
8554 | 86.0k | /* 1435 */ "xcontextconfig\0" |
8555 | 86.0k | /* 1450 */ "debug\0" |
8556 | 86.0k | /* 1456 */ "ddatahi\0" |
8557 | 86.0k | /* 1464 */ "idatahi\0" |
8558 | 86.0k | /* 1472 */ "dtaghi\0" |
8559 | 86.0k | /* 1479 */ "itaghi\0" |
8560 | 86.0k | /* 1486 */ "entryhi\0" |
8561 | 86.0k | /* 1494 */ "maari\0" |
8562 | 86.0k | /* 1500 */ "tcschefback\0" |
8563 | 86.0k | /* 1512 */ "vpeschefback\0" |
8564 | 86.0k | /* 1525 */ "pagemask\0" |
8565 | 86.0k | /* 1534 */ "yqmask\0" |
8566 | 86.0k | /* 1541 */ "userlocal\0" |
8567 | 86.0k | /* 1551 */ "tracecontrol\0" |
8568 | 86.0k | /* 1564 */ "vpecontrol\0" |
8569 | 86.0k | /* 1575 */ "mvpcontrol\0" |
8570 | 86.0k | /* 1586 */ "view_ipl\0" |
8571 | 86.0k | /* 1595 */ "view_ripl\0" |
8572 | 86.0k | /* 1605 */ "errctl\0" |
8573 | 86.0k | /* 1612 */ "srsctl\0" |
8574 | 86.0k | /* 1619 */ "intctl\0" |
8575 | 86.0k | /* 1626 */ "pwctl\0" |
8576 | 86.0k | /* 1632 */ "random\0" |
8577 | 86.0k | /* 1639 */ "hwr_cpunum\0" |
8578 | 86.0k | /* 1650 */ "pagegrain\0" |
8579 | 86.0k | /* 1660 */ "ddatalo\0" |
8580 | 86.0k | /* 1668 */ "idatalo\0" |
8581 | 86.0k | /* 1676 */ "dtaglo\0" |
8582 | 86.0k | /* 1683 */ "itaglo\0" |
8583 | 86.0k | /* 1690 */ "zero\0" |
8584 | 86.0k | /* 1695 */ "srsmap\0" |
8585 | 86.0k | /* 1702 */ "hwr_synci_step\0" |
8586 | 86.0k | /* 1717 */ "fp\0" |
8587 | 86.0k | /* 1720 */ "gp\0" |
8588 | 86.0k | /* 1723 */ "badinstrp\0" |
8589 | 86.0k | /* 1733 */ "sp\0" |
8590 | 86.0k | /* 1736 */ "maar\0" |
8591 | 86.0k | /* 1741 */ "lladdr\0" |
8592 | 86.0k | /* 1748 */ "badvaddr\0" |
8593 | 86.0k | /* 1757 */ "globalnumber\0" |
8594 | 86.0k | /* 1770 */ "cacheerr\0" |
8595 | 86.0k | /* 1779 */ "hwr_ccres\0" |
8596 | 86.0k | /* 1789 */ "DSPPos\0" |
8597 | 86.0k | /* 1796 */ "tcstatus\0" |
8598 | 86.0k | /* 1805 */ "at\0" |
8599 | 86.0k | /* 1808 */ "gtoffset\0" |
8600 | 86.0k | /* 1817 */ "tchalt\0" |
8601 | 86.0k | /* 1824 */ "DSPSCount\0" |
8602 | 86.0k | /* 1834 */ "count\0" |
8603 | 86.0k | /* 1840 */ "tcopt\0" |
8604 | 86.0k | /* 1846 */ "vpeopt\0" |
8605 | 86.0k | /* 1853 */ "tcrestart\0" |
8606 | 86.0k | /* 1863 */ "badinst\0" |
8607 | 86.0k | /* 1871 */ "guestctl0ext\0" |
8608 | 86.0k | /* 1884 */ "tccontext\0" |
8609 | 86.0k | /* 1894 */ "xcontext\0" |
8610 | 86.0k | /* 1903 */ "index\0" |
8611 | 86.0k | /* 1909 */ "badinstrx\0" |
8612 | 86.0k | /* 1919 */ "DSPCarry\0" |
8613 | 86.0k | }; |
8614 | 86.0k | static const uint16_t RegAsmOffset[] = { |
8615 | 86.0k | 178, 1805, 1332, 1919, 1200, 1424, 1789, 1824, 1717, 1717, 1720, 1720, 384, 178, |
8616 | 86.0k | 2, 952, 732, 845, 578, 1031, 1237, 1214, 1214, 1733, 1733, 1690, 1690, 732, |
8617 | 86.0k | 845, 952, 1031, 60, 248, 446, 628, 178, 2, 178, 384, 578, 732, 845, |
8618 | 86.0k | 952, 1031, 1100, 1155, 2, 178, 384, 578, 732, 845, 952, 1031, 1100, 1155, |
8619 | 86.0k | 2, 178, 384, 578, 732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, |
8620 | 86.0k | 731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, |
8621 | 86.0k | 1107, 1166, 50, 226, 1, 177, 383, 577, 731, 844, 951, 1030, 1099, 1154, |
8622 | 86.0k | 29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, 1, 177, |
8623 | 86.0k | 383, 577, 731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, |
8624 | 86.0k | 959, 1038, 1107, 1166, 50, 226, 75, 461, 780, 974, 1114, 0, 382, 730, |
8625 | 86.0k | 950, 1098, 28, 410, 758, 958, 1106, 49, 32, 208, 414, 608, 75, 263, |
8626 | 86.0k | 461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, 382, 576, 730, 843, |
8627 | 86.0k | 950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, 958, 1037, 1106, 1165, |
8628 | 86.0k | 49, 225, 64, 252, 450, 632, 769, 882, 969, 1048, 2, 178, 384, 578, |
8629 | 86.0k | 732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, 731, 844, 951, 1030, |
8630 | 86.0k | 1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, |
8631 | 86.0k | 1717, 75, 263, 461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, 382, |
8632 | 86.0k | 576, 730, 843, 950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, 958, |
8633 | 86.0k | 1037, 1106, 1165, 49, 225, 1720, 60, 248, 446, 628, 1639, 1702, 1223, 1779, |
8634 | 86.0k | 732, 845, 952, 1031, 1100, 1155, 1, 177, 383, 577, 731, 844, 951, 1030, |
8635 | 86.0k | 1099, 1154, 29, 205, 411, 605, 759, 872, 959, 1038, 1107, 1166, 50, 226, |
8636 | 86.0k | 959, 1038, 60, 248, 446, 628, 108, 314, 512, 1100, 1155, 1, 177, 383, |
8637 | 86.0k | 577, 731, 844, 951, 1030, 1099, 1154, 29, 205, 411, 605, 759, 872, 959, |
8638 | 86.0k | 1038, 1107, 1166, 50, 226, 158, 364, 558, 1214, 951, 1030, 1099, 1154, 29, |
8639 | 86.0k | 205, 411, 605, 1733, 1100, 1155, 1, 177, 383, 577, 731, 844, 759, 872, |
8640 | 86.0k | 384, 578, 173, 379, 573, 727, 840, 947, 1026, 1095, 1138, 1197, 24, 200, |
8641 | 86.0k | 406, 600, 754, 867, 954, 1033, 1102, 1161, 45, 221, 427, 621, 762, 875, |
8642 | 86.0k | 962, 1041, 1110, 1169, 53, 229, 1690, 57, 245, 443, 625, 766, 879, 966, |
8643 | 86.0k | 1045, 1863, 1723, 1909, 1748, 1217, 1770, 1404, 1378, 1387, 1364, 1443, 1886, 1436, |
8644 | 86.0k | 1834, 1456, 1660, 1450, 1302, 1255, 1410, 1472, 1676, 1372, 1486, 1256, 1605, 1260, |
8645 | 86.0k | 1757, 1808, 1207, 1464, 1668, 1903, 1619, 1479, 1683, 1741, 1736, 1494, 1285, 1575, |
8646 | 86.0k | 1250, 1269, 1650, 1525, 1297, 1397, 1626, 1317, 1417, 1632, 1612, 1695, 1798, 1325, |
8647 | 86.0k | 1884, 1817, 1840, 1853, 1341, 1500, 1796, 1551, 1230, 1240, 1541, 1586, 1595, 1576, |
8648 | 86.0k | 1564, 1846, 1352, 1512, 1279, 1894, 1435, 1534, 105, 311, 161, 367, 561, 715, |
8649 | 86.0k | 828, 935, 1014, 1083, 170, 376, 570, 724, 837, 944, 1135, 1194, 732, 845, |
8650 | 86.0k | 952, 1031, 60, 284, 464, 646, 783, 890, 472, 149, 355, 130, 336, 534, |
8651 | 86.0k | 696, 292, 479, 654, 791, 898, 977, 78, 266, 164, 370, 564, 718, 831, |
8652 | 86.0k | 938, 1017, 1086, 113, 319, 517, 687, 810, 917, 996, 1065, 122, 328, 526, |
8653 | 86.0k | 87, 275, 455, 637, 774, 553, 498, 673, 233, 431, 69, 257, 96, 302, |
8654 | 86.0k | 489, 664, 801, 908, 987, 1056, 1117, 1176, 4, 180, 386, 580, 734, 847, |
8655 | 86.0k | 140, 346, 544, 706, 819, 926, 1005, 1074, 1126, 1185, 14, 190, 396, 590, |
8656 | 86.0k | 744, 857, 75, 263, 461, 643, 780, 887, 974, 1053, 1114, 1173, 0, 176, |
8657 | 86.0k | 382, 576, 730, 843, 950, 1029, 1098, 1157, 28, 204, 410, 604, 758, 871, |
8658 | 86.0k | 958, 1037, 1106, 1165, 49, 225, 1141, 1461, 959, 1038, 1665, 951, 1030, 1099, |
8659 | 86.0k | 1154, 29, 205, 411, 605, 1100, 1155, 1, 177, 383, 577, 731, 844, 759, |
8660 | 86.0k | 872, 384, 578, 1871, |
8661 | 86.0k | }; |
8662 | | |
8663 | 86.0k | CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) && |
8664 | 86.0k | "Invalid alt name index for register!", NULL); |
8665 | 86.0k | return AsmStrs+RegAsmOffset[RegNo-1]; |
8666 | | #else |
8667 | | return NULL; |
8668 | | #endif // CAPSTONE_DIET |
8669 | 86.0k | } |
8670 | | #ifdef PRINT_ALIAS_INSTR |
8671 | | #undef PRINT_ALIAS_INSTR |
8672 | | |
8673 | 96.6k | static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { |
8674 | 96.6k | #ifndef CAPSTONE_DIET |
8675 | 96.6k | static const PatternsForOpcode OpToPatterns[] = { |
8676 | 96.6k | {Mips_MFTACX, 0, 1 }, |
8677 | 96.6k | {Mips_MFTACX_NM, 1, 1 }, |
8678 | 96.6k | {Mips_MFTC0, 2, 1 }, |
8679 | 96.6k | {Mips_MFTC0_NM, 3, 1 }, |
8680 | 96.6k | {Mips_MFTHI, 4, 1 }, |
8681 | 96.6k | {Mips_MFTHI_NM, 5, 1 }, |
8682 | 96.6k | {Mips_MFTLO, 6, 1 }, |
8683 | 96.6k | {Mips_MFTLO_NM, 7, 1 }, |
8684 | 96.6k | {Mips_MTTACX, 8, 1 }, |
8685 | 96.6k | {Mips_MTTACX_NM, 9, 1 }, |
8686 | 96.6k | {Mips_MTTC0, 10, 1 }, |
8687 | 96.6k | {Mips_MTTC0_NM, 11, 1 }, |
8688 | 96.6k | {Mips_MTTHI, 12, 1 }, |
8689 | 96.6k | {Mips_MTTHI_NM, 13, 1 }, |
8690 | 96.6k | {Mips_MTTLO, 14, 1 }, |
8691 | 96.6k | {Mips_MTTLO_NM, 15, 1 }, |
8692 | 96.6k | {Mips_NORImm, 16, 1 }, |
8693 | 96.6k | {Mips_NORImm64, 17, 1 }, |
8694 | 96.6k | {Mips_SLTImm64, 18, 1 }, |
8695 | 96.6k | {Mips_SLTUImm64, 19, 1 }, |
8696 | 96.6k | {Mips_ADDIUGP48_NM, 20, 1 }, |
8697 | 96.6k | {Mips_ADDIUGPB_NM, 21, 1 }, |
8698 | 96.6k | {Mips_ADDIUGPW_NM, 22, 1 }, |
8699 | 96.6k | {Mips_ADDIUPC, 23, 1 }, |
8700 | 96.6k | {Mips_ADDIUPC_MMR6, 24, 1 }, |
8701 | 96.6k | {Mips_ADDu, 25, 1 }, |
8702 | 96.6k | {Mips_BC1F, 26, 1 }, |
8703 | 96.6k | {Mips_BC1FL, 27, 1 }, |
8704 | 96.6k | {Mips_BC1F_MM, 28, 1 }, |
8705 | 96.6k | {Mips_BC1T, 29, 1 }, |
8706 | 96.6k | {Mips_BC1TL, 30, 1 }, |
8707 | 96.6k | {Mips_BC1T_MM, 31, 1 }, |
8708 | 96.6k | {Mips_BEQC16_NM, 32, 1 }, |
8709 | 96.6k | {Mips_BEQC_NM, 33, 2 }, |
8710 | 96.6k | {Mips_BEQL, 35, 1 }, |
8711 | 96.6k | {Mips_BGEZAL, 36, 1 }, |
8712 | 96.6k | {Mips_BGEZAL_MM, 37, 1 }, |
8713 | 96.6k | {Mips_BNEC16_NM, 38, 1 }, |
8714 | 96.6k | {Mips_BNEC_NM, 39, 2 }, |
8715 | 96.6k | {Mips_BNEL, 41, 1 }, |
8716 | 96.6k | {Mips_BREAK, 42, 2 }, |
8717 | 96.6k | {Mips_BREAK_MM, 44, 2 }, |
8718 | 96.6k | {Mips_C_EQ_D32, 46, 1 }, |
8719 | 96.6k | {Mips_C_EQ_D32_MM, 47, 1 }, |
8720 | 96.6k | {Mips_C_EQ_D64, 48, 1 }, |
8721 | 96.6k | {Mips_C_EQ_D64_MM, 49, 1 }, |
8722 | 96.6k | {Mips_C_EQ_S, 50, 1 }, |
8723 | 96.6k | {Mips_C_EQ_S_MM, 51, 1 }, |
8724 | 96.6k | {Mips_C_F_D32, 52, 1 }, |
8725 | 96.6k | {Mips_C_F_D32_MM, 53, 1 }, |
8726 | 96.6k | {Mips_C_F_D64, 54, 1 }, |
8727 | 96.6k | {Mips_C_F_D64_MM, 55, 1 }, |
8728 | 96.6k | {Mips_C_F_S, 56, 1 }, |
8729 | 96.6k | {Mips_C_F_S_MM, 57, 1 }, |
8730 | 96.6k | {Mips_C_LE_D32, 58, 1 }, |
8731 | 96.6k | {Mips_C_LE_D32_MM, 59, 1 }, |
8732 | 96.6k | {Mips_C_LE_D64, 60, 1 }, |
8733 | 96.6k | {Mips_C_LE_D64_MM, 61, 1 }, |
8734 | 96.6k | {Mips_C_LE_S, 62, 1 }, |
8735 | 96.6k | {Mips_C_LE_S_MM, 63, 1 }, |
8736 | 96.6k | {Mips_C_LT_D32, 64, 1 }, |
8737 | 96.6k | {Mips_C_LT_D32_MM, 65, 1 }, |
8738 | 96.6k | {Mips_C_LT_D64, 66, 1 }, |
8739 | 96.6k | {Mips_C_LT_D64_MM, 67, 1 }, |
8740 | 96.6k | {Mips_C_LT_S, 68, 1 }, |
8741 | 96.6k | {Mips_C_LT_S_MM, 69, 1 }, |
8742 | 96.6k | {Mips_C_NGE_D32, 70, 1 }, |
8743 | 96.6k | {Mips_C_NGE_D32_MM, 71, 1 }, |
8744 | 96.6k | {Mips_C_NGE_D64, 72, 1 }, |
8745 | 96.6k | {Mips_C_NGE_D64_MM, 73, 1 }, |
8746 | 96.6k | {Mips_C_NGE_S, 74, 1 }, |
8747 | 96.6k | {Mips_C_NGE_S_MM, 75, 1 }, |
8748 | 96.6k | {Mips_C_NGLE_D32, 76, 1 }, |
8749 | 96.6k | {Mips_C_NGLE_D32_MM, 77, 1 }, |
8750 | 96.6k | {Mips_C_NGLE_D64, 78, 1 }, |
8751 | 96.6k | {Mips_C_NGLE_D64_MM, 79, 1 }, |
8752 | 96.6k | {Mips_C_NGLE_S, 80, 1 }, |
8753 | 96.6k | {Mips_C_NGLE_S_MM, 81, 1 }, |
8754 | 96.6k | {Mips_C_NGL_D32, 82, 1 }, |
8755 | 96.6k | {Mips_C_NGL_D32_MM, 83, 1 }, |
8756 | 96.6k | {Mips_C_NGL_D64, 84, 1 }, |
8757 | 96.6k | {Mips_C_NGL_D64_MM, 85, 1 }, |
8758 | 96.6k | {Mips_C_NGL_S, 86, 1 }, |
8759 | 96.6k | {Mips_C_NGL_S_MM, 87, 1 }, |
8760 | 96.6k | {Mips_C_NGT_D32, 88, 1 }, |
8761 | 96.6k | {Mips_C_NGT_D32_MM, 89, 1 }, |
8762 | 96.6k | {Mips_C_NGT_D64, 90, 1 }, |
8763 | 96.6k | {Mips_C_NGT_D64_MM, 91, 1 }, |
8764 | 96.6k | {Mips_C_NGT_S, 92, 1 }, |
8765 | 96.6k | {Mips_C_NGT_S_MM, 93, 1 }, |
8766 | 96.6k | {Mips_C_OLE_D32, 94, 1 }, |
8767 | 96.6k | {Mips_C_OLE_D32_MM, 95, 1 }, |
8768 | 96.6k | {Mips_C_OLE_D64, 96, 1 }, |
8769 | 96.6k | {Mips_C_OLE_D64_MM, 97, 1 }, |
8770 | 96.6k | {Mips_C_OLE_S, 98, 1 }, |
8771 | 96.6k | {Mips_C_OLE_S_MM, 99, 1 }, |
8772 | 96.6k | {Mips_C_OLT_D32, 100, 1 }, |
8773 | 96.6k | {Mips_C_OLT_D32_MM, 101, 1 }, |
8774 | 96.6k | {Mips_C_OLT_D64, 102, 1 }, |
8775 | 96.6k | {Mips_C_OLT_D64_MM, 103, 1 }, |
8776 | 96.6k | {Mips_C_OLT_S, 104, 1 }, |
8777 | 96.6k | {Mips_C_OLT_S_MM, 105, 1 }, |
8778 | 96.6k | {Mips_C_SEQ_D32, 106, 1 }, |
8779 | 96.6k | {Mips_C_SEQ_D32_MM, 107, 1 }, |
8780 | 96.6k | {Mips_C_SEQ_D64, 108, 1 }, |
8781 | 96.6k | {Mips_C_SEQ_D64_MM, 109, 1 }, |
8782 | 96.6k | {Mips_C_SEQ_S, 110, 1 }, |
8783 | 96.6k | {Mips_C_SEQ_S_MM, 111, 1 }, |
8784 | 96.6k | {Mips_C_SF_D32, 112, 1 }, |
8785 | 96.6k | {Mips_C_SF_D32_MM, 113, 1 }, |
8786 | 96.6k | {Mips_C_SF_D64, 114, 1 }, |
8787 | 96.6k | {Mips_C_SF_D64_MM, 115, 1 }, |
8788 | 96.6k | {Mips_C_SF_S, 116, 1 }, |
8789 | 96.6k | {Mips_C_SF_S_MM, 117, 1 }, |
8790 | 96.6k | {Mips_C_UEQ_D32, 118, 1 }, |
8791 | 96.6k | {Mips_C_UEQ_D32_MM, 119, 1 }, |
8792 | 96.6k | {Mips_C_UEQ_D64, 120, 1 }, |
8793 | 96.6k | {Mips_C_UEQ_D64_MM, 121, 1 }, |
8794 | 96.6k | {Mips_C_UEQ_S, 122, 1 }, |
8795 | 96.6k | {Mips_C_UEQ_S_MM, 123, 1 }, |
8796 | 96.6k | {Mips_C_ULE_D32, 124, 1 }, |
8797 | 96.6k | {Mips_C_ULE_D32_MM, 125, 1 }, |
8798 | 96.6k | {Mips_C_ULE_D64, 126, 1 }, |
8799 | 96.6k | {Mips_C_ULE_D64_MM, 127, 1 }, |
8800 | 96.6k | {Mips_C_ULE_S, 128, 1 }, |
8801 | 96.6k | {Mips_C_ULE_S_MM, 129, 1 }, |
8802 | 96.6k | {Mips_C_ULT_D32, 130, 1 }, |
8803 | 96.6k | {Mips_C_ULT_D32_MM, 131, 1 }, |
8804 | 96.6k | {Mips_C_ULT_D64, 132, 1 }, |
8805 | 96.6k | {Mips_C_ULT_D64_MM, 133, 1 }, |
8806 | 96.6k | {Mips_C_ULT_S, 134, 1 }, |
8807 | 96.6k | {Mips_C_ULT_S_MM, 135, 1 }, |
8808 | 96.6k | {Mips_C_UN_D32, 136, 1 }, |
8809 | 96.6k | {Mips_C_UN_D32_MM, 137, 1 }, |
8810 | 96.6k | {Mips_C_UN_D64, 138, 1 }, |
8811 | 96.6k | {Mips_C_UN_D64_MM, 139, 1 }, |
8812 | 96.6k | {Mips_C_UN_S, 140, 1 }, |
8813 | 96.6k | {Mips_C_UN_S_MM, 141, 1 }, |
8814 | 96.6k | {Mips_DADDu, 142, 1 }, |
8815 | 96.6k | {Mips_DI, 143, 1 }, |
8816 | 96.6k | {Mips_DIV, 144, 1 }, |
8817 | 96.6k | {Mips_DIVU, 145, 1 }, |
8818 | 96.6k | {Mips_DI_MM, 146, 1 }, |
8819 | 96.6k | {Mips_DI_MMR6, 147, 1 }, |
8820 | 96.6k | {Mips_DI_NM, 148, 1 }, |
8821 | 96.6k | {Mips_DMT, 149, 1 }, |
8822 | 96.6k | {Mips_DMT_NM, 150, 1 }, |
8823 | 96.6k | {Mips_DSUB, 151, 2 }, |
8824 | 96.6k | {Mips_DSUBu, 153, 2 }, |
8825 | 96.6k | {Mips_DVPE, 155, 1 }, |
8826 | 96.6k | {Mips_DVPE_NM, 156, 1 }, |
8827 | 96.6k | {Mips_EI, 157, 1 }, |
8828 | 96.6k | {Mips_EI_MM, 158, 1 }, |
8829 | 96.6k | {Mips_EI_MMR6, 159, 1 }, |
8830 | 96.6k | {Mips_EI_NM, 160, 1 }, |
8831 | 96.6k | {Mips_EMT, 161, 1 }, |
8832 | 96.6k | {Mips_EMT_NM, 162, 1 }, |
8833 | 96.6k | {Mips_EVPE, 163, 1 }, |
8834 | 96.6k | {Mips_EVPE_NM, 164, 1 }, |
8835 | 96.6k | {Mips_HYPCALL, 165, 1 }, |
8836 | 96.6k | {Mips_HYPCALL_MM, 166, 1 }, |
8837 | 96.6k | {Mips_JALR, 167, 1 }, |
8838 | 96.6k | {Mips_JALR64, 168, 1 }, |
8839 | 96.6k | {Mips_JALRCHB_NM, 169, 1 }, |
8840 | 96.6k | {Mips_JALRC_HB_MMR6, 170, 1 }, |
8841 | 96.6k | {Mips_JALRC_MMR6, 171, 1 }, |
8842 | 96.6k | {Mips_JALR_HB, 172, 1 }, |
8843 | 96.6k | {Mips_JALR_HB64, 173, 1 }, |
8844 | 96.6k | {Mips_JIALC, 174, 1 }, |
8845 | 96.6k | {Mips_JIALC64, 175, 1 }, |
8846 | 96.6k | {Mips_JIC, 176, 1 }, |
8847 | 96.6k | {Mips_JIC64, 177, 1 }, |
8848 | 96.6k | {Mips_MFC0_NM, 178, 1 }, |
8849 | 96.6k | {Mips_MFHC0_NM, 179, 1 }, |
8850 | 96.6k | {Mips_MOVE16_MM, 180, 1 }, |
8851 | 96.6k | {Mips_MTC0_NM, 181, 1 }, |
8852 | 96.6k | {Mips_MTHC0_NM, 182, 1 }, |
8853 | 96.6k | {Mips_Move32R16, 183, 1 }, |
8854 | 96.6k | {Mips_NOR_NM, 184, 1 }, |
8855 | 96.6k | {Mips_OR, 185, 1 }, |
8856 | 96.6k | {Mips_OR64, 186, 1 }, |
8857 | 96.6k | {Mips_RDHWR, 187, 1 }, |
8858 | 96.6k | {Mips_RDHWR64, 188, 1 }, |
8859 | 96.6k | {Mips_RDHWR_MM, 189, 1 }, |
8860 | 96.6k | {Mips_RDHWR_MMR6, 190, 1 }, |
8861 | 96.6k | {Mips_RESTOREJRC16_NM, 191, 1 }, |
8862 | 96.6k | {Mips_RESTOREJRC_NM, 192, 1 }, |
8863 | 96.6k | {Mips_RESTORE_NM, 193, 1 }, |
8864 | 96.6k | {Mips_ROTX_NM, 194, 3 }, |
8865 | 96.6k | {Mips_SAVE16_NM, 197, 1 }, |
8866 | 96.6k | {Mips_SAVE_NM, 198, 1 }, |
8867 | 96.6k | {Mips_SDBBP, 199, 1 }, |
8868 | 96.6k | {Mips_SDBBP_MMR6, 200, 1 }, |
8869 | 96.6k | {Mips_SDBBP_R6, 201, 1 }, |
8870 | 96.6k | {Mips_SIGRIE, 202, 1 }, |
8871 | 96.6k | {Mips_SIGRIE_MMR6, 203, 1 }, |
8872 | 96.6k | {Mips_SLL, 204, 1 }, |
8873 | 96.6k | {Mips_SLL_MM, 205, 1 }, |
8874 | 96.6k | {Mips_SLL_MMR6, 206, 1 }, |
8875 | 96.6k | {Mips_SUB, 207, 2 }, |
8876 | 96.6k | {Mips_SUBU_MMR6, 209, 2 }, |
8877 | 96.6k | {Mips_SUB_MM, 211, 2 }, |
8878 | 96.6k | {Mips_SUB_MMR6, 213, 2 }, |
8879 | 96.6k | {Mips_SUBu, 215, 2 }, |
8880 | 96.6k | {Mips_SUBu_MM, 217, 2 }, |
8881 | 96.6k | {Mips_SWSP_MM, 219, 1 }, |
8882 | 96.6k | {Mips_SYNC, 220, 1 }, |
8883 | 96.6k | {Mips_SYNC_MM, 221, 1 }, |
8884 | 96.6k | {Mips_SYNC_MMR6, 222, 1 }, |
8885 | 96.6k | {Mips_SYNC_NM, 223, 6 }, |
8886 | 96.6k | {Mips_SYSCALL, 229, 1 }, |
8887 | 96.6k | {Mips_SYSCALL_MM, 230, 1 }, |
8888 | 96.6k | {Mips_TEQ, 231, 1 }, |
8889 | 96.6k | {Mips_TEQ_MM, 232, 1 }, |
8890 | 96.6k | {Mips_TGE, 233, 1 }, |
8891 | 96.6k | {Mips_TGEU, 234, 1 }, |
8892 | 96.6k | {Mips_TGEU_MM, 235, 1 }, |
8893 | 96.6k | {Mips_TGE_MM, 236, 1 }, |
8894 | 96.6k | {Mips_TLT, 237, 1 }, |
8895 | 96.6k | {Mips_TLTU, 238, 1 }, |
8896 | 96.6k | {Mips_TLTU_MM, 239, 1 }, |
8897 | 96.6k | {Mips_TLT_MM, 240, 1 }, |
8898 | 96.6k | {Mips_TNE, 241, 1 }, |
8899 | 96.6k | {Mips_TNE_MM, 242, 1 }, |
8900 | 96.6k | {Mips_WAIT_MM, 243, 1 }, |
8901 | 96.6k | {Mips_WAIT_NM, 244, 1 }, |
8902 | 96.6k | {Mips_WRDSP, 245, 1 }, |
8903 | 96.6k | {Mips_WRDSP_MM, 246, 1 }, |
8904 | 96.6k | {Mips_YIELD, 247, 1 }, |
8905 | 96.6k | {Mips_YIELD_NM, 248, 1 }, |
8906 | 96.6k | {0}, }; |
8907 | | |
8908 | 96.6k | static const AliasPattern Patterns[] = { |
8909 | | // Mips_MFTACX - 0 |
8910 | 96.6k | {0, 0, 2, 5 }, |
8911 | | // Mips_MFTACX_NM - 1 |
8912 | 96.6k | {0, 5, 2, 4 }, |
8913 | | // Mips_MFTC0 - 2 |
8914 | 96.6k | {10, 9, 3, 6 }, |
8915 | | // Mips_MFTC0_NM - 3 |
8916 | 96.6k | {10, 15, 3, 5 }, |
8917 | | // Mips_MFTHI - 4 |
8918 | 96.6k | {23, 20, 2, 5 }, |
8919 | | // Mips_MFTHI_NM - 5 |
8920 | 96.6k | {23, 25, 2, 4 }, |
8921 | | // Mips_MFTLO - 6 |
8922 | 96.6k | {32, 29, 2, 5 }, |
8923 | | // Mips_MFTLO_NM - 7 |
8924 | 96.6k | {32, 34, 2, 4 }, |
8925 | | // Mips_MTTACX - 8 |
8926 | 96.6k | {41, 38, 2, 5 }, |
8927 | | // Mips_MTTACX_NM - 9 |
8928 | 96.6k | {41, 43, 2, 4 }, |
8929 | | // Mips_MTTC0 - 10 |
8930 | 96.6k | {51, 47, 3, 6 }, |
8931 | | // Mips_MTTC0_NM - 11 |
8932 | 96.6k | {51, 53, 3, 5 }, |
8933 | | // Mips_MTTHI - 12 |
8934 | 96.6k | {64, 58, 2, 5 }, |
8935 | | // Mips_MTTHI_NM - 13 |
8936 | 96.6k | {64, 63, 2, 4 }, |
8937 | | // Mips_MTTLO - 14 |
8938 | 96.6k | {73, 67, 2, 5 }, |
8939 | | // Mips_MTTLO_NM - 15 |
8940 | 96.6k | {73, 72, 2, 4 }, |
8941 | | // Mips_NORImm - 16 |
8942 | 96.6k | {82, 76, 3, 3 }, |
8943 | | // Mips_NORImm64 - 17 |
8944 | 96.6k | {82, 79, 3, 3 }, |
8945 | | // Mips_SLTImm64 - 18 |
8946 | 96.6k | {93, 82, 3, 3 }, |
8947 | | // Mips_SLTUImm64 - 19 |
8948 | 96.6k | {104, 85, 3, 3 }, |
8949 | | // Mips_ADDIUGP48_NM - 20 |
8950 | 96.6k | {116, 88, 3, 3 }, |
8951 | | // Mips_ADDIUGPB_NM - 21 |
8952 | 96.6k | {137, 91, 3, 3 }, |
8953 | | // Mips_ADDIUGPW_NM - 22 |
8954 | 96.6k | {156, 94, 3, 3 }, |
8955 | | // Mips_ADDIUPC - 23 |
8956 | 96.6k | {175, 97, 2, 3 }, |
8957 | | // Mips_ADDIUPC_MMR6 - 24 |
8958 | 96.6k | {175, 100, 2, 3 }, |
8959 | | // Mips_ADDu - 25 |
8960 | 96.6k | {187, 103, 3, 7 }, |
8961 | | // Mips_BC1F - 26 |
8962 | 96.6k | {199, 110, 2, 6 }, |
8963 | | // Mips_BC1FL - 27 |
8964 | 96.6k | {209, 116, 2, 7 }, |
8965 | | // Mips_BC1F_MM - 28 |
8966 | 96.6k | {199, 123, 2, 4 }, |
8967 | | // Mips_BC1T - 29 |
8968 | 96.6k | {220, 127, 2, 6 }, |
8969 | | // Mips_BC1TL - 30 |
8970 | 96.6k | {230, 133, 2, 7 }, |
8971 | | // Mips_BC1T_MM - 31 |
8972 | 96.6k | {220, 140, 2, 4 }, |
8973 | | // Mips_BEQC16_NM - 32 |
8974 | 96.6k | {241, 144, 3, 3 }, |
8975 | | // Mips_BEQC_NM - 33 |
8976 | 96.6k | {259, 147, 3, 3 }, |
8977 | 96.6k | {274, 150, 3, 3 }, |
8978 | | // Mips_BEQL - 35 |
8979 | 96.6k | {289, 153, 3, 6 }, |
8980 | | // Mips_BGEZAL - 36 |
8981 | 96.6k | {304, 159, 2, 6 }, |
8982 | | // Mips_BGEZAL_MM - 37 |
8983 | 96.6k | {304, 165, 2, 3 }, |
8984 | | // Mips_BNEC16_NM - 38 |
8985 | 96.6k | {313, 168, 3, 3 }, |
8986 | | // Mips_BNEC_NM - 39 |
8987 | 96.6k | {331, 171, 3, 3 }, |
8988 | 96.6k | {346, 174, 3, 3 }, |
8989 | | // Mips_BNEL - 41 |
8990 | 96.6k | {361, 177, 3, 6 }, |
8991 | | // Mips_BREAK - 42 |
8992 | 96.6k | {376, 183, 2, 5 }, |
8993 | 96.6k | {382, 188, 2, 5 }, |
8994 | | // Mips_BREAK_MM - 44 |
8995 | 96.6k | {376, 193, 2, 3 }, |
8996 | 96.6k | {382, 196, 2, 3 }, |
8997 | | // Mips_C_EQ_D32 - 46 |
8998 | 96.6k | {393, 199, 3, 9 }, |
8999 | | // Mips_C_EQ_D32_MM - 47 |
9000 | 96.6k | {393, 208, 3, 7 }, |
9001 | | // Mips_C_EQ_D64 - 48 |
9002 | 96.6k | {393, 215, 3, 9 }, |
9003 | | // Mips_C_EQ_D64_MM - 49 |
9004 | 96.6k | {393, 224, 3, 7 }, |
9005 | | // Mips_C_EQ_S - 50 |
9006 | 96.6k | {407, 231, 3, 8 }, |
9007 | | // Mips_C_EQ_S_MM - 51 |
9008 | 96.6k | {407, 239, 3, 6 }, |
9009 | | // Mips_C_F_D32 - 52 |
9010 | 96.6k | {421, 245, 3, 9 }, |
9011 | | // Mips_C_F_D32_MM - 53 |
9012 | 96.6k | {421, 254, 3, 7 }, |
9013 | | // Mips_C_F_D64 - 54 |
9014 | 96.6k | {421, 261, 3, 9 }, |
9015 | | // Mips_C_F_D64_MM - 55 |
9016 | 96.6k | {421, 270, 3, 7 }, |
9017 | | // Mips_C_F_S - 56 |
9018 | 96.6k | {434, 277, 3, 8 }, |
9019 | | // Mips_C_F_S_MM - 57 |
9020 | 96.6k | {434, 285, 3, 6 }, |
9021 | | // Mips_C_LE_D32 - 58 |
9022 | 96.6k | {447, 291, 3, 9 }, |
9023 | | // Mips_C_LE_D32_MM - 59 |
9024 | 96.6k | {447, 300, 3, 7 }, |
9025 | | // Mips_C_LE_D64 - 60 |
9026 | 96.6k | {447, 307, 3, 9 }, |
9027 | | // Mips_C_LE_D64_MM - 61 |
9028 | 96.6k | {447, 316, 3, 7 }, |
9029 | | // Mips_C_LE_S - 62 |
9030 | 96.6k | {461, 323, 3, 8 }, |
9031 | | // Mips_C_LE_S_MM - 63 |
9032 | 96.6k | {461, 331, 3, 6 }, |
9033 | | // Mips_C_LT_D32 - 64 |
9034 | 96.6k | {475, 337, 3, 9 }, |
9035 | | // Mips_C_LT_D32_MM - 65 |
9036 | 96.6k | {475, 346, 3, 7 }, |
9037 | | // Mips_C_LT_D64 - 66 |
9038 | 96.6k | {475, 353, 3, 9 }, |
9039 | | // Mips_C_LT_D64_MM - 67 |
9040 | 96.6k | {475, 362, 3, 7 }, |
9041 | | // Mips_C_LT_S - 68 |
9042 | 96.6k | {489, 369, 3, 8 }, |
9043 | | // Mips_C_LT_S_MM - 69 |
9044 | 96.6k | {489, 377, 3, 6 }, |
9045 | | // Mips_C_NGE_D32 - 70 |
9046 | 96.6k | {503, 383, 3, 9 }, |
9047 | | // Mips_C_NGE_D32_MM - 71 |
9048 | 96.6k | {503, 392, 3, 7 }, |
9049 | | // Mips_C_NGE_D64 - 72 |
9050 | 96.6k | {503, 399, 3, 9 }, |
9051 | | // Mips_C_NGE_D64_MM - 73 |
9052 | 96.6k | {503, 408, 3, 7 }, |
9053 | | // Mips_C_NGE_S - 74 |
9054 | 96.6k | {518, 415, 3, 8 }, |
9055 | | // Mips_C_NGE_S_MM - 75 |
9056 | 96.6k | {518, 423, 3, 6 }, |
9057 | | // Mips_C_NGLE_D32 - 76 |
9058 | 96.6k | {533, 429, 3, 9 }, |
9059 | | // Mips_C_NGLE_D32_MM - 77 |
9060 | 96.6k | {533, 438, 3, 7 }, |
9061 | | // Mips_C_NGLE_D64 - 78 |
9062 | 96.6k | {533, 445, 3, 9 }, |
9063 | | // Mips_C_NGLE_D64_MM - 79 |
9064 | 96.6k | {533, 454, 3, 7 }, |
9065 | | // Mips_C_NGLE_S - 80 |
9066 | 96.6k | {549, 461, 3, 8 }, |
9067 | | // Mips_C_NGLE_S_MM - 81 |
9068 | 96.6k | {549, 469, 3, 6 }, |
9069 | | // Mips_C_NGL_D32 - 82 |
9070 | 96.6k | {565, 475, 3, 9 }, |
9071 | | // Mips_C_NGL_D32_MM - 83 |
9072 | 96.6k | {565, 484, 3, 7 }, |
9073 | | // Mips_C_NGL_D64 - 84 |
9074 | 96.6k | {565, 491, 3, 9 }, |
9075 | | // Mips_C_NGL_D64_MM - 85 |
9076 | 96.6k | {565, 500, 3, 7 }, |
9077 | | // Mips_C_NGL_S - 86 |
9078 | 96.6k | {580, 507, 3, 8 }, |
9079 | | // Mips_C_NGL_S_MM - 87 |
9080 | 96.6k | {580, 515, 3, 6 }, |
9081 | | // Mips_C_NGT_D32 - 88 |
9082 | 96.6k | {595, 521, 3, 9 }, |
9083 | | // Mips_C_NGT_D32_MM - 89 |
9084 | 96.6k | {595, 530, 3, 7 }, |
9085 | | // Mips_C_NGT_D64 - 90 |
9086 | 96.6k | {595, 537, 3, 9 }, |
9087 | | // Mips_C_NGT_D64_MM - 91 |
9088 | 96.6k | {595, 546, 3, 7 }, |
9089 | | // Mips_C_NGT_S - 92 |
9090 | 96.6k | {610, 553, 3, 8 }, |
9091 | | // Mips_C_NGT_S_MM - 93 |
9092 | 96.6k | {610, 561, 3, 6 }, |
9093 | | // Mips_C_OLE_D32 - 94 |
9094 | 96.6k | {625, 567, 3, 9 }, |
9095 | | // Mips_C_OLE_D32_MM - 95 |
9096 | 96.6k | {625, 576, 3, 7 }, |
9097 | | // Mips_C_OLE_D64 - 96 |
9098 | 96.6k | {625, 583, 3, 9 }, |
9099 | | // Mips_C_OLE_D64_MM - 97 |
9100 | 96.6k | {625, 592, 3, 7 }, |
9101 | | // Mips_C_OLE_S - 98 |
9102 | 96.6k | {640, 599, 3, 8 }, |
9103 | | // Mips_C_OLE_S_MM - 99 |
9104 | 96.6k | {640, 607, 3, 6 }, |
9105 | | // Mips_C_OLT_D32 - 100 |
9106 | 96.6k | {655, 613, 3, 9 }, |
9107 | | // Mips_C_OLT_D32_MM - 101 |
9108 | 96.6k | {655, 622, 3, 7 }, |
9109 | | // Mips_C_OLT_D64 - 102 |
9110 | 96.6k | {655, 629, 3, 9 }, |
9111 | | // Mips_C_OLT_D64_MM - 103 |
9112 | 96.6k | {655, 638, 3, 7 }, |
9113 | | // Mips_C_OLT_S - 104 |
9114 | 96.6k | {670, 645, 3, 8 }, |
9115 | | // Mips_C_OLT_S_MM - 105 |
9116 | 96.6k | {670, 653, 3, 6 }, |
9117 | | // Mips_C_SEQ_D32 - 106 |
9118 | 96.6k | {685, 659, 3, 9 }, |
9119 | | // Mips_C_SEQ_D32_MM - 107 |
9120 | 96.6k | {685, 668, 3, 7 }, |
9121 | | // Mips_C_SEQ_D64 - 108 |
9122 | 96.6k | {685, 675, 3, 9 }, |
9123 | | // Mips_C_SEQ_D64_MM - 109 |
9124 | 96.6k | {685, 684, 3, 7 }, |
9125 | | // Mips_C_SEQ_S - 110 |
9126 | 96.6k | {700, 691, 3, 8 }, |
9127 | | // Mips_C_SEQ_S_MM - 111 |
9128 | 96.6k | {700, 699, 3, 6 }, |
9129 | | // Mips_C_SF_D32 - 112 |
9130 | 96.6k | {715, 705, 3, 9 }, |
9131 | | // Mips_C_SF_D32_MM - 113 |
9132 | 96.6k | {715, 714, 3, 7 }, |
9133 | | // Mips_C_SF_D64 - 114 |
9134 | 96.6k | {715, 721, 3, 9 }, |
9135 | | // Mips_C_SF_D64_MM - 115 |
9136 | 96.6k | {715, 730, 3, 7 }, |
9137 | | // Mips_C_SF_S - 116 |
9138 | 96.6k | {729, 737, 3, 8 }, |
9139 | | // Mips_C_SF_S_MM - 117 |
9140 | 96.6k | {729, 745, 3, 6 }, |
9141 | | // Mips_C_UEQ_D32 - 118 |
9142 | 96.6k | {743, 751, 3, 9 }, |
9143 | | // Mips_C_UEQ_D32_MM - 119 |
9144 | 96.6k | {743, 760, 3, 7 }, |
9145 | | // Mips_C_UEQ_D64 - 120 |
9146 | 96.6k | {743, 767, 3, 9 }, |
9147 | | // Mips_C_UEQ_D64_MM - 121 |
9148 | 96.6k | {743, 776, 3, 7 }, |
9149 | | // Mips_C_UEQ_S - 122 |
9150 | 96.6k | {758, 783, 3, 8 }, |
9151 | | // Mips_C_UEQ_S_MM - 123 |
9152 | 96.6k | {758, 791, 3, 6 }, |
9153 | | // Mips_C_ULE_D32 - 124 |
9154 | 96.6k | {773, 797, 3, 9 }, |
9155 | | // Mips_C_ULE_D32_MM - 125 |
9156 | 96.6k | {773, 806, 3, 7 }, |
9157 | | // Mips_C_ULE_D64 - 126 |
9158 | 96.6k | {773, 813, 3, 9 }, |
9159 | | // Mips_C_ULE_D64_MM - 127 |
9160 | 96.6k | {773, 822, 3, 7 }, |
9161 | | // Mips_C_ULE_S - 128 |
9162 | 96.6k | {788, 829, 3, 8 }, |
9163 | | // Mips_C_ULE_S_MM - 129 |
9164 | 96.6k | {788, 837, 3, 6 }, |
9165 | | // Mips_C_ULT_D32 - 130 |
9166 | 96.6k | {803, 843, 3, 9 }, |
9167 | | // Mips_C_ULT_D32_MM - 131 |
9168 | 96.6k | {803, 852, 3, 7 }, |
9169 | | // Mips_C_ULT_D64 - 132 |
9170 | 96.6k | {803, 859, 3, 9 }, |
9171 | | // Mips_C_ULT_D64_MM - 133 |
9172 | 96.6k | {803, 868, 3, 7 }, |
9173 | | // Mips_C_ULT_S - 134 |
9174 | 96.6k | {818, 875, 3, 8 }, |
9175 | | // Mips_C_ULT_S_MM - 135 |
9176 | 96.6k | {818, 883, 3, 6 }, |
9177 | | // Mips_C_UN_D32 - 136 |
9178 | 96.6k | {833, 889, 3, 9 }, |
9179 | | // Mips_C_UN_D32_MM - 137 |
9180 | 96.6k | {833, 898, 3, 7 }, |
9181 | | // Mips_C_UN_D64 - 138 |
9182 | 96.6k | {833, 905, 3, 9 }, |
9183 | | // Mips_C_UN_D64_MM - 139 |
9184 | 96.6k | {833, 914, 3, 7 }, |
9185 | | // Mips_C_UN_S - 140 |
9186 | 96.6k | {847, 921, 3, 8 }, |
9187 | | // Mips_C_UN_S_MM - 141 |
9188 | 96.6k | {847, 929, 3, 6 }, |
9189 | | // Mips_DADDu - 142 |
9190 | 96.6k | {187, 935, 3, 5 }, |
9191 | | // Mips_DI - 143 |
9192 | 96.6k | {861, 940, 1, 5 }, |
9193 | | // Mips_DIV - 144 |
9194 | 96.6k | {864, 945, 3, 5 }, |
9195 | | // Mips_DIVU - 145 |
9196 | 96.6k | {875, 950, 3, 5 }, |
9197 | | // Mips_DI_MM - 146 |
9198 | 96.6k | {861, 955, 1, 2 }, |
9199 | | // Mips_DI_MMR6 - 147 |
9200 | 96.6k | {861, 957, 1, 3 }, |
9201 | | // Mips_DI_NM - 148 |
9202 | 96.6k | {861, 960, 1, 2 }, |
9203 | | // Mips_DMT - 149 |
9204 | 96.6k | {887, 962, 1, 4 }, |
9205 | | // Mips_DMT_NM - 150 |
9206 | 96.6k | {887, 966, 1, 3 }, |
9207 | | // Mips_DSUB - 151 |
9208 | 96.6k | {891, 969, 3, 6 }, |
9209 | 96.6k | {903, 975, 3, 6 }, |
9210 | | // Mips_DSUBu - 153 |
9211 | 96.6k | {911, 981, 3, 6 }, |
9212 | 96.6k | {924, 987, 3, 6 }, |
9213 | | // Mips_DVPE - 155 |
9214 | 96.6k | {933, 993, 1, 4 }, |
9215 | | // Mips_DVPE_NM - 156 |
9216 | 96.6k | {933, 997, 1, 3 }, |
9217 | | // Mips_EI - 157 |
9218 | 96.6k | {938, 1000, 1, 5 }, |
9219 | | // Mips_EI_MM - 158 |
9220 | 96.6k | {938, 1005, 1, 2 }, |
9221 | | // Mips_EI_MMR6 - 159 |
9222 | 96.6k | {938, 1007, 1, 3 }, |
9223 | | // Mips_EI_NM - 160 |
9224 | 96.6k | {938, 1010, 1, 2 }, |
9225 | | // Mips_EMT - 161 |
9226 | 96.6k | {941, 1012, 1, 4 }, |
9227 | | // Mips_EMT_NM - 162 |
9228 | 96.6k | {941, 1016, 1, 3 }, |
9229 | | // Mips_EVPE - 163 |
9230 | 96.6k | {945, 1019, 1, 4 }, |
9231 | | // Mips_EVPE_NM - 164 |
9232 | 96.6k | {945, 1023, 1, 3 }, |
9233 | | // Mips_HYPCALL - 165 |
9234 | 96.6k | {950, 1026, 1, 6 }, |
9235 | | // Mips_HYPCALL_MM - 166 |
9236 | 96.6k | {950, 1032, 1, 4 }, |
9237 | | // Mips_JALR - 167 |
9238 | 96.6k | {958, 1036, 2, 6 }, |
9239 | | // Mips_JALR64 - 168 |
9240 | 96.6k | {958, 1042, 2, 4 }, |
9241 | | // Mips_JALRCHB_NM - 169 |
9242 | 96.6k | {964, 1046, 2, 3 }, |
9243 | | // Mips_JALRC_HB_MMR6 - 170 |
9244 | 96.6k | {974, 1049, 2, 4 }, |
9245 | | // Mips_JALRC_MMR6 - 171 |
9246 | 96.6k | {986, 1053, 2, 4 }, |
9247 | | // Mips_JALR_HB - 172 |
9248 | 96.6k | {995, 1057, 2, 6 }, |
9249 | | // Mips_JALR_HB64 - 173 |
9250 | 96.6k | {995, 1063, 2, 5 }, |
9251 | | // Mips_JIALC - 174 |
9252 | 96.6k | {1006, 1068, 2, 6 }, |
9253 | | // Mips_JIALC64 - 175 |
9254 | 96.6k | {1006, 1074, 2, 4 }, |
9255 | | // Mips_JIC - 176 |
9256 | 96.6k | {1015, 1078, 2, 5 }, |
9257 | | // Mips_JIC64 - 177 |
9258 | 96.6k | {1015, 1083, 2, 4 }, |
9259 | | // Mips_MFC0_NM - 178 |
9260 | 96.6k | {1022, 1087, 3, 4 }, |
9261 | | // Mips_MFHC0_NM - 179 |
9262 | 96.6k | {1034, 1091, 3, 4 }, |
9263 | | // Mips_MOVE16_MM - 180 |
9264 | 96.6k | {1047, 1095, 2, 3 }, |
9265 | | // Mips_MTC0_NM - 181 |
9266 | 96.6k | {1051, 1098, 3, 4 }, |
9267 | | // Mips_MTHC0_NM - 182 |
9268 | 96.6k | {1063, 1102, 3, 4 }, |
9269 | | // Mips_Move32R16 - 183 |
9270 | 96.6k | {1047, 1106, 2, 3 }, |
9271 | | // Mips_NOR_NM - 184 |
9272 | 96.6k | {1076, 1109, 3, 4 }, |
9273 | | // Mips_OR - 185 |
9274 | 96.6k | {187, 1113, 3, 7 }, |
9275 | | // Mips_OR64 - 186 |
9276 | 96.6k | {187, 1120, 3, 5 }, |
9277 | | // Mips_RDHWR - 187 |
9278 | 96.6k | {1087, 1125, 3, 6 }, |
9279 | | // Mips_RDHWR64 - 188 |
9280 | 96.6k | {1087, 1131, 3, 4 }, |
9281 | | // Mips_RDHWR_MM - 189 |
9282 | 96.6k | {1087, 1135, 3, 5 }, |
9283 | | // Mips_RDHWR_MMR6 - 190 |
9284 | 96.6k | {1087, 1140, 3, 5 }, |
9285 | | // Mips_RESTOREJRC16_NM - 191 |
9286 | 96.6k | {1100, 1145, 2, 2 }, |
9287 | | // Mips_RESTOREJRC_NM - 192 |
9288 | 96.6k | {1117, 1147, 2, 2 }, |
9289 | | // Mips_RESTORE_NM - 193 |
9290 | 96.6k | {1134, 1149, 2, 2 }, |
9291 | | // Mips_ROTX_NM - 194 |
9292 | 96.6k | {1147, 1151, 5, 6 }, |
9293 | 96.6k | {1162, 1157, 5, 6 }, |
9294 | 96.6k | {1177, 1163, 5, 6 }, |
9295 | | // Mips_SAVE16_NM - 197 |
9296 | 96.6k | {1193, 1169, 2, 2 }, |
9297 | | // Mips_SAVE_NM - 198 |
9298 | 96.6k | {1203, 1171, 2, 2 }, |
9299 | | // Mips_SDBBP - 199 |
9300 | 96.6k | {1213, 1173, 1, 5 }, |
9301 | | // Mips_SDBBP_MMR6 - 200 |
9302 | 96.6k | {1213, 1178, 1, 3 }, |
9303 | | // Mips_SDBBP_R6 - 201 |
9304 | 96.6k | {1213, 1181, 1, 4 }, |
9305 | | // Mips_SIGRIE - 202 |
9306 | 96.6k | {1219, 1185, 1, 4 }, |
9307 | | // Mips_SIGRIE_MMR6 - 203 |
9308 | 96.6k | {1219, 1189, 1, 3 }, |
9309 | | // Mips_SLL - 204 |
9310 | 96.6k | {1047, 1192, 3, 6 }, |
9311 | | // Mips_SLL_MM - 205 |
9312 | 96.6k | {1047, 1198, 3, 4 }, |
9313 | | // Mips_SLL_MMR6 - 206 |
9314 | 96.6k | {1047, 1202, 3, 5 }, |
9315 | | // Mips_SUB - 207 |
9316 | 96.6k | {1226, 1207, 3, 6 }, |
9317 | 96.6k | {1237, 1213, 3, 6 }, |
9318 | | // Mips_SUBU_MMR6 - 209 |
9319 | 96.6k | {1244, 1219, 3, 5 }, |
9320 | 96.6k | {1256, 1224, 3, 5 }, |
9321 | | // Mips_SUB_MM - 211 |
9322 | 96.6k | {1226, 1229, 3, 5 }, |
9323 | 96.6k | {1237, 1234, 3, 5 }, |
9324 | | // Mips_SUB_MMR6 - 213 |
9325 | 96.6k | {1226, 1239, 3, 5 }, |
9326 | 96.6k | {1237, 1244, 3, 5 }, |
9327 | | // Mips_SUBu - 215 |
9328 | 96.6k | {1244, 1249, 3, 6 }, |
9329 | 96.6k | {1256, 1255, 3, 6 }, |
9330 | | // Mips_SUBu_MM - 217 |
9331 | 96.6k | {1244, 1261, 3, 5 }, |
9332 | 96.6k | {1256, 1266, 3, 5 }, |
9333 | | // Mips_SWSP_MM - 219 |
9334 | 96.6k | {1264, 1271, 3, 2 }, |
9335 | | // Mips_SYNC - 220 |
9336 | 96.6k | {1276, 1273, 1, 5 }, |
9337 | | // Mips_SYNC_MM - 221 |
9338 | 96.6k | {1276, 1278, 1, 2 }, |
9339 | | // Mips_SYNC_MMR6 - 222 |
9340 | 96.6k | {1276, 1280, 1, 3 }, |
9341 | | // Mips_SYNC_NM - 223 |
9342 | 96.6k | {1276, 1283, 1, 2 }, |
9343 | 96.6k | {1281, 1285, 1, 2 }, |
9344 | 96.6k | {1290, 1287, 1, 2 }, |
9345 | 96.6k | {1298, 1289, 1, 2 }, |
9346 | 96.6k | {1311, 1291, 1, 2 }, |
9347 | 96.6k | {1324, 1293, 1, 2 }, |
9348 | | // Mips_SYSCALL - 229 |
9349 | 96.6k | {1333, 1295, 1, 4 }, |
9350 | | // Mips_SYSCALL_MM - 230 |
9351 | 96.6k | {1333, 1299, 1, 2 }, |
9352 | | // Mips_TEQ - 231 |
9353 | 96.6k | {1341, 1301, 3, 7 }, |
9354 | | // Mips_TEQ_MM - 232 |
9355 | 96.6k | {1341, 1308, 3, 4 }, |
9356 | | // Mips_TGE - 233 |
9357 | 96.6k | {1352, 1312, 3, 7 }, |
9358 | | // Mips_TGEU - 234 |
9359 | 96.6k | {1363, 1319, 3, 7 }, |
9360 | | // Mips_TGEU_MM - 235 |
9361 | 96.6k | {1363, 1326, 3, 4 }, |
9362 | | // Mips_TGE_MM - 236 |
9363 | 96.6k | {1352, 1330, 3, 4 }, |
9364 | | // Mips_TLT - 237 |
9365 | 96.6k | {1375, 1334, 3, 7 }, |
9366 | | // Mips_TLTU - 238 |
9367 | 96.6k | {1386, 1341, 3, 7 }, |
9368 | | // Mips_TLTU_MM - 239 |
9369 | 96.6k | {1386, 1348, 3, 4 }, |
9370 | | // Mips_TLT_MM - 240 |
9371 | 96.6k | {1375, 1352, 3, 4 }, |
9372 | | // Mips_TNE - 241 |
9373 | 96.6k | {1398, 1356, 3, 7 }, |
9374 | | // Mips_TNE_MM - 242 |
9375 | 96.6k | {1398, 1363, 3, 4 }, |
9376 | | // Mips_WAIT_MM - 243 |
9377 | 96.6k | {1409, 1367, 1, 2 }, |
9378 | | // Mips_WAIT_NM - 244 |
9379 | 96.6k | {1409, 1369, 1, 2 }, |
9380 | | // Mips_WRDSP - 245 |
9381 | 96.6k | {1414, 1371, 2, 4 }, |
9382 | | // Mips_WRDSP_MM - 246 |
9383 | 96.6k | {1414, 1375, 2, 4 }, |
9384 | | // Mips_YIELD - 247 |
9385 | 96.6k | {1423, 1379, 2, 5 }, |
9386 | | // Mips_YIELD_NM - 248 |
9387 | 96.6k | {1423, 1384, 2, 4 }, |
9388 | 96.6k | {0}, }; |
9389 | | |
9390 | 96.6k | static const AliasPatternCond Conds[] = { |
9391 | | // (MFTACX GPR32Opnd:$rt, AC0) - 0 |
9392 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9393 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9394 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9395 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9396 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9397 | | // (MFTACX_NM GPRNM32Opnd:$rt, AC0) - 5 |
9398 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9399 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9400 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9401 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9402 | | // (MFTC0 GPR32Opnd:$rd, COP0Opnd:$rt, 0) - 9 |
9403 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9404 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
9405 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9406 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9407 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9408 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9409 | | // (MFTC0_NM GPRNM32Opnd:$rd, COP0Opnd:$rt, 0) - 15 |
9410 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9411 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
9412 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9413 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9414 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9415 | | // (MFTHI GPR32Opnd:$rt, AC0) - 20 |
9416 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9417 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9418 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9419 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9420 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9421 | | // (MFTHI_NM GPRNM32Opnd:$rt, AC0) - 25 |
9422 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9423 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9424 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9425 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9426 | | // (MFTLO GPR32Opnd:$rt, AC0) - 29 |
9427 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9428 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9429 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9430 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9431 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9432 | | // (MFTLO_NM GPRNM32Opnd:$rt, AC0) - 34 |
9433 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9434 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9435 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9436 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9437 | | // (MTTACX AC0, GPR32Opnd:$rt) - 38 |
9438 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9439 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9440 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9441 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9442 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9443 | | // (MTTACX_NM AC0, GPRNM32Opnd:$rt) - 43 |
9444 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9445 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9446 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9447 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9448 | | // (MTTC0 COP0Opnd:$rt, GPR32Opnd:$rd, 0) - 47 |
9449 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
9450 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9451 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9452 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9453 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9454 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9455 | | // (MTTC0_NM COP0Opnd:$rt, GPRNM32Opnd:$rd, 0) - 53 |
9456 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
9457 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9458 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9459 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9460 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9461 | | // (MTTHI AC0, GPR32Opnd:$rt) - 58 |
9462 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9463 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9464 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9465 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9466 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9467 | | // (MTTHI_NM AC0, GPRNM32Opnd:$rt) - 63 |
9468 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9469 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9470 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9471 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9472 | | // (MTTLO AC0, GPR32Opnd:$rt) - 67 |
9473 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9474 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9475 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9476 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9477 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9478 | | // (MTTLO_NM AC0, GPRNM32Opnd:$rt) - 72 |
9479 | 96.6k | {AliasPatternCond_K_Reg, Mips_AC0}, |
9480 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9481 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9482 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
9483 | | // (NORImm GPR32Opnd:$rs, GPR32Opnd:$rs, simm32_relaxed:$imm) - 76 |
9484 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9485 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
9486 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
9487 | | // (NORImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 79 |
9488 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
9489 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
9490 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
9491 | | // (SLTImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 82 |
9492 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
9493 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
9494 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
9495 | | // (SLTUImm64 GPR64Opnd:$rs, GPR64Opnd:$rs, imm64:$imm) - 85 |
9496 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
9497 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
9498 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
9499 | | // (ADDIUGP48_NM GPRNM48Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$addr) - 88 |
9500 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9501 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID}, |
9502 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9503 | | // (ADDIUGPB_NM GPRNM32Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$offset) - 91 |
9504 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9505 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID}, |
9506 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9507 | | // (ADDIUGPW_NM GPRNM32Opnd:$rt, GPRNMGPOpnd:$rs, sym32_gp_nm:$offset) - 94 |
9508 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9509 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNMGPRegClassID}, |
9510 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9511 | | // (ADDIUPC GPR32Opnd:$rd, simm19_lsl2:$imm) - 97 |
9512 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9513 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9514 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
9515 | | // (ADDIUPC_MMR6 GPR32Opnd:$rd, simm19_lsl2:$imm) - 100 |
9516 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9517 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9518 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
9519 | | // (ADDu GPR32Opnd:$dst, GPR32Opnd:$src, ZERO) - 103 |
9520 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9521 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9522 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
9523 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9524 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
9525 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9526 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9527 | | // (BC1F FCC0, brtarget:$offset) - 110 |
9528 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9529 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9530 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9531 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9532 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9533 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9534 | | // (BC1FL FCC0, brtarget:$offset) - 116 |
9535 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9536 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9537 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
9538 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9539 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9540 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9541 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9542 | | // (BC1F_MM FCC0, brtarget:$offset) - 123 |
9543 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9544 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9545 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9546 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9547 | | // (BC1T FCC0, brtarget:$offset) - 127 |
9548 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9549 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9550 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9551 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9552 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9553 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9554 | | // (BC1TL FCC0, brtarget:$offset) - 133 |
9555 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9556 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9557 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
9558 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9559 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9560 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9561 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9562 | | // (BC1T_MM FCC0, brtarget:$offset) - 140 |
9563 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9564 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9565 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9566 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9567 | | // (BEQC16_NM GPRNM16R3Opnd:$rs, GPRNM16R3Opnd:$rt, brtarget4s1_nm:$offset) - 144 |
9568 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID}, |
9569 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID}, |
9570 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9571 | | // (BEQC_NM GPRNM32Opnd:$rt, ZERO_NM, brtarget14_nm:$offset) - 147 |
9572 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9573 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
9574 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9575 | | // (BEQC_NM ZERO_NM, GPRNM32Opnd:$rt, brtarget14_nm:$offset) - 150 |
9576 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
9577 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9578 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9579 | | // (BEQL GPR32Opnd:$rs, ZERO, brtarget:$offset) - 153 |
9580 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9581 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
9582 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9583 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
9584 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9585 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9586 | | // (BGEZAL ZERO, brtarget:$offset) - 159 |
9587 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
9588 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9589 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9590 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9591 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9592 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9593 | | // (BGEZAL_MM ZERO, brtarget_mm:$offset) - 165 |
9594 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
9595 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9596 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9597 | | // (BNEC16_NM GPRNM16R3Opnd:$rs, GPRNM16R3Opnd:$rt, brtarget4s1_nm:$offset) - 168 |
9598 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID}, |
9599 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM3RegClassID}, |
9600 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9601 | | // (BNEC_NM GPRNM32Opnd:$rt, ZERO_NM, brtarget14_nm:$offset) - 171 |
9602 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9603 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
9604 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9605 | | // (BNEC_NM ZERO_NM, GPRNM32Opnd:$rt, brtarget14_nm:$offset) - 174 |
9606 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
9607 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
9608 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
9609 | | // (BNEL GPR32Opnd:$rs, ZERO, brtarget:$offset) - 177 |
9610 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
9611 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
9612 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9613 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
9614 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9615 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9616 | | // (BREAK 0, 0) - 183 |
9617 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9618 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9619 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9620 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9621 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9622 | | // (BREAK uimm10:$imm, 0) - 188 |
9623 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
9624 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9625 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9626 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9627 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
9628 | | // (BREAK_MM 0, 0) - 193 |
9629 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9630 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9631 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9632 | | // (BREAK_MM uimm10:$imm, 0) - 196 |
9633 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
9634 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
9635 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9636 | | // (C_EQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 199 |
9637 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9638 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9639 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9640 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9641 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9642 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9643 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9644 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9645 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9646 | | // (C_EQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 208 |
9647 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9648 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9649 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9650 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9651 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9652 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9653 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9654 | | // (C_EQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 215 |
9655 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9656 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9657 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9658 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9659 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9660 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9661 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9662 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9663 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9664 | | // (C_EQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 224 |
9665 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9666 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9667 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9668 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9669 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9670 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9671 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9672 | | // (C_EQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 231 |
9673 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9674 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9675 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9676 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9677 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9678 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9679 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9680 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9681 | | // (C_EQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 239 |
9682 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9683 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9684 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9685 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9686 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9687 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9688 | | // (C_F_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 245 |
9689 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9690 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9691 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9692 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9693 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9694 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9695 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9696 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9697 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9698 | | // (C_F_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 254 |
9699 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9700 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9701 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9702 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9703 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9704 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9705 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9706 | | // (C_F_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 261 |
9707 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9708 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9709 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9710 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9711 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9712 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9713 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9714 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9715 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9716 | | // (C_F_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 270 |
9717 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9718 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9719 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9720 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9721 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9722 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9723 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9724 | | // (C_F_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 277 |
9725 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9726 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9727 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9728 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9729 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9730 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9731 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9732 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9733 | | // (C_F_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 285 |
9734 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9735 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9736 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9737 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9738 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9739 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9740 | | // (C_LE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 291 |
9741 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9742 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9743 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9744 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9745 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9746 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9747 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9748 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9749 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9750 | | // (C_LE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 300 |
9751 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9752 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9753 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9754 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9755 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9756 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9757 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9758 | | // (C_LE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 307 |
9759 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9760 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9761 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9762 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9763 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9764 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9765 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9766 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9767 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9768 | | // (C_LE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 316 |
9769 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9770 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9771 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9772 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9773 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9774 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9775 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9776 | | // (C_LE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 323 |
9777 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9778 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9779 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9780 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9781 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9782 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9783 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9784 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9785 | | // (C_LE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 331 |
9786 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9787 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9788 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9789 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9790 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9791 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9792 | | // (C_LT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 337 |
9793 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9794 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9795 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9796 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9797 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9798 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9799 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9800 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9801 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9802 | | // (C_LT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 346 |
9803 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9804 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9805 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9806 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9807 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9808 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9809 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9810 | | // (C_LT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 353 |
9811 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9812 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9813 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9814 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9815 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9816 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9817 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9818 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9819 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9820 | | // (C_LT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 362 |
9821 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9822 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9823 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9824 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9825 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9826 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9827 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9828 | | // (C_LT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 369 |
9829 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9830 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9831 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9832 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9833 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9834 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9835 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9836 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9837 | | // (C_LT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 377 |
9838 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9839 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9840 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9841 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9842 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9843 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9844 | | // (C_NGE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 383 |
9845 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9846 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9847 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9848 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9849 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9850 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9851 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9852 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9853 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9854 | | // (C_NGE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 392 |
9855 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9856 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9857 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9858 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9859 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9860 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9861 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9862 | | // (C_NGE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 399 |
9863 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9864 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9865 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9866 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9867 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9868 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9869 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9870 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9871 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9872 | | // (C_NGE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 408 |
9873 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9874 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9875 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9876 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9877 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9878 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9879 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9880 | | // (C_NGE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 415 |
9881 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9882 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9883 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9884 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9885 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9886 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9887 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9888 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9889 | | // (C_NGE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 423 |
9890 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9891 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9892 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9893 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9894 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9895 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9896 | | // (C_NGLE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 429 |
9897 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9898 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9899 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9900 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9901 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9902 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9903 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9904 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9905 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9906 | | // (C_NGLE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 438 |
9907 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9908 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9909 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9910 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9911 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9912 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9913 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9914 | | // (C_NGLE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 445 |
9915 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9916 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9917 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9918 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9919 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9920 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9921 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9922 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9923 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9924 | | // (C_NGLE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 454 |
9925 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9926 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9927 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9928 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9929 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9930 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9931 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9932 | | // (C_NGLE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 461 |
9933 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9934 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9935 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9936 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9937 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9938 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9939 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9940 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9941 | | // (C_NGLE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 469 |
9942 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9943 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9944 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9945 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9946 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9947 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9948 | | // (C_NGL_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 475 |
9949 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9950 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9951 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9952 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9953 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9954 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9955 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9956 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9957 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9958 | | // (C_NGL_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 484 |
9959 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9960 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9961 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
9962 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9963 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
9964 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9965 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9966 | | // (C_NGL_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 491 |
9967 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9968 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9969 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9970 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9971 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9972 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9973 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9974 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9975 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9976 | | // (C_NGL_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 500 |
9977 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9978 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9979 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
9980 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9981 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
9982 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9983 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9984 | | // (C_NGL_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 507 |
9985 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9986 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9987 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9988 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
9989 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9990 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
9991 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
9992 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
9993 | | // (C_NGL_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 515 |
9994 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
9995 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9996 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
9997 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
9998 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
9999 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10000 | | // (C_NGT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 521 |
10001 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10002 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10003 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10004 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10005 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10006 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10007 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10008 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10009 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10010 | | // (C_NGT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 530 |
10011 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10012 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10013 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10014 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10015 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10016 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10017 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10018 | | // (C_NGT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 537 |
10019 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10020 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10021 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10022 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10023 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10024 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10025 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10026 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10027 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10028 | | // (C_NGT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 546 |
10029 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10030 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10031 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10032 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10033 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10034 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10035 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10036 | | // (C_NGT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 553 |
10037 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10038 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10039 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10040 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10041 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10042 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10043 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10044 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10045 | | // (C_NGT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 561 |
10046 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10047 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10048 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10049 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10050 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10051 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10052 | | // (C_OLE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 567 |
10053 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10054 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10055 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10056 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10057 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10058 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10059 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10060 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10061 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10062 | | // (C_OLE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 576 |
10063 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10064 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10065 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10066 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10067 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10068 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10069 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10070 | | // (C_OLE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 583 |
10071 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10072 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10073 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10074 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10075 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10076 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10077 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10078 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10079 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10080 | | // (C_OLE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 592 |
10081 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10082 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10083 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10084 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10085 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10086 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10087 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10088 | | // (C_OLE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 599 |
10089 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10090 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10091 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10092 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10093 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10094 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10095 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10096 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10097 | | // (C_OLE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 607 |
10098 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10099 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10100 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10101 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10102 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10103 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10104 | | // (C_OLT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 613 |
10105 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10106 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10107 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10108 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10109 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10110 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10111 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10112 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10113 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10114 | | // (C_OLT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 622 |
10115 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10116 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10117 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10118 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10119 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10120 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10121 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10122 | | // (C_OLT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 629 |
10123 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10124 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10125 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10126 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10127 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10128 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10129 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10130 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10131 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10132 | | // (C_OLT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 638 |
10133 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10134 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10135 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10136 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10137 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10138 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10139 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10140 | | // (C_OLT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 645 |
10141 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10142 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10143 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10144 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10145 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10146 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10147 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10148 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10149 | | // (C_OLT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 653 |
10150 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10151 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10152 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10153 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10154 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10155 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10156 | | // (C_SEQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 659 |
10157 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10158 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10159 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10160 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10161 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10162 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10163 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10164 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10165 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10166 | | // (C_SEQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 668 |
10167 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10168 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10169 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10170 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10171 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10172 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10173 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10174 | | // (C_SEQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 675 |
10175 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10176 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10177 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10178 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10179 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10180 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10181 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10182 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10183 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10184 | | // (C_SEQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 684 |
10185 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10186 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10187 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10188 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10189 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10190 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10191 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10192 | | // (C_SEQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 691 |
10193 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10194 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10195 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10196 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10197 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10198 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10199 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10200 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10201 | | // (C_SEQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 699 |
10202 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10203 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10204 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10205 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10206 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10207 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10208 | | // (C_SF_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 705 |
10209 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10210 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10211 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10212 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10213 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10214 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10215 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10216 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10217 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10218 | | // (C_SF_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 714 |
10219 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10220 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10221 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10222 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10223 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10224 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10225 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10226 | | // (C_SF_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 721 |
10227 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10228 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10229 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10230 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10231 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10232 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10233 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10234 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10235 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10236 | | // (C_SF_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 730 |
10237 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10238 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10239 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10240 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10241 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10242 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10243 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10244 | | // (C_SF_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 737 |
10245 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10246 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10247 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10248 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10249 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10250 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10251 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10252 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10253 | | // (C_SF_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 745 |
10254 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10255 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10256 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10257 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10258 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10259 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10260 | | // (C_UEQ_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 751 |
10261 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10262 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10263 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10264 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10265 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10266 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10267 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10268 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10269 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10270 | | // (C_UEQ_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 760 |
10271 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10272 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10273 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10274 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10275 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10276 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10277 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10278 | | // (C_UEQ_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 767 |
10279 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10280 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10281 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10282 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10283 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10284 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10285 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10286 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10287 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10288 | | // (C_UEQ_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 776 |
10289 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10290 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10291 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10292 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10293 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10294 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10295 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10296 | | // (C_UEQ_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 783 |
10297 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10298 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10299 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10300 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10301 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10302 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10303 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10304 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10305 | | // (C_UEQ_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 791 |
10306 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10307 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10308 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10309 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10310 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10311 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10312 | | // (C_ULE_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 797 |
10313 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10314 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10315 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10316 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10317 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10318 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10319 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10320 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10321 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10322 | | // (C_ULE_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 806 |
10323 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10324 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10325 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10326 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10327 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10328 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10329 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10330 | | // (C_ULE_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 813 |
10331 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10332 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10333 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10334 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10335 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10336 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10337 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10338 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10339 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10340 | | // (C_ULE_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 822 |
10341 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10342 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10343 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10344 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10345 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10346 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10347 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10348 | | // (C_ULE_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 829 |
10349 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10350 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10351 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10352 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10353 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10354 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10355 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10356 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10357 | | // (C_ULE_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 837 |
10358 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10359 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10360 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10361 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10362 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10363 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10364 | | // (C_ULT_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 843 |
10365 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10366 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10367 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10368 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10369 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10370 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10371 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10372 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10373 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10374 | | // (C_ULT_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 852 |
10375 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10376 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10377 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10378 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10379 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10380 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10381 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10382 | | // (C_ULT_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 859 |
10383 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10384 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10385 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10386 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10387 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10388 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10389 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10390 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10391 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10392 | | // (C_ULT_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 868 |
10393 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10394 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10395 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10396 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10397 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10398 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10399 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10400 | | // (C_ULT_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 875 |
10401 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10402 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10403 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10404 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10405 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10406 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10407 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10408 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10409 | | // (C_ULT_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 883 |
10410 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10411 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10412 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10413 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10414 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10415 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10416 | | // (C_UN_D32 FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 889 |
10417 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10418 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10419 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10420 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10421 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10422 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10423 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10424 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10425 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10426 | | // (C_UN_D32_MM FCC0, AFGR64Opnd:$fs, AFGR64Opnd:$ft) - 898 |
10427 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10428 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10429 | 96.6k | {AliasPatternCond_K_RegClass, Mips_AFGR64RegClassID}, |
10430 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10431 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureFP64Bit}, |
10432 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10433 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10434 | | // (C_UN_D64 FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 905 |
10435 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10436 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10437 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10438 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10439 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10440 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10441 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10442 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10443 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10444 | | // (C_UN_D64_MM FCC0, FGR64Opnd:$fs, FGR64Opnd:$ft) - 914 |
10445 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10446 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10447 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR64RegClassID}, |
10448 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10449 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureFP64Bit}, |
10450 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10451 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10452 | | // (C_UN_S FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 921 |
10453 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10454 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10455 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10456 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10457 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10458 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10459 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10460 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10461 | | // (C_UN_S_MM FCC0, FGR32Opnd:$fs, FGR32Opnd:$ft) - 929 |
10462 | 96.6k | {AliasPatternCond_K_Reg, Mips_FCC0}, |
10463 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10464 | 96.6k | {AliasPatternCond_K_RegClass, Mips_FGR32RegClassID}, |
10465 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10466 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10467 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureSoftFloat}, |
10468 | | // (DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64) - 935 |
10469 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10470 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10471 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10472 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
10473 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10474 | | // (DI ZERO) - 940 |
10475 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10476 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10477 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r2}, |
10478 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10479 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10480 | | // (DIV GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt) - 945 |
10481 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10482 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10483 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10484 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10485 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10486 | | // (DIVU GPR32Opnd:$rs, GPR32Opnd:$rs, GPR32Opnd:$rt) - 950 |
10487 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10488 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10489 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10490 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10491 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10492 | | // (DI_MM ZERO) - 955 |
10493 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10494 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10495 | | // (DI_MMR6 ZERO) - 957 |
10496 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10497 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10498 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10499 | | // (DI_NM ZERO_NM) - 960 |
10500 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10501 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10502 | | // (DMT ZERO) - 962 |
10503 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10504 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10505 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10506 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10507 | | // (DMT_NM ZERO_NM) - 966 |
10508 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10509 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10510 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10511 | | // (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs) - 969 |
10512 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10513 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10514 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10515 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10516 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips3}, |
10517 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10518 | | // (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt) - 975 |
10519 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10520 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10521 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10522 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10523 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips3}, |
10524 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10525 | | // (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs) - 981 |
10526 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10527 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10528 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10529 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10530 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips3}, |
10531 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10532 | | // (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt) - 987 |
10533 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10534 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10535 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10536 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10537 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips3}, |
10538 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10539 | | // (DVPE ZERO) - 993 |
10540 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10541 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10542 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10543 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10544 | | // (DVPE_NM ZERO_NM) - 997 |
10545 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10546 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10547 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10548 | | // (EI ZERO) - 1000 |
10549 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10550 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10551 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r2}, |
10552 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10553 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10554 | | // (EI_MM ZERO) - 1005 |
10555 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10556 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10557 | | // (EI_MMR6 ZERO) - 1007 |
10558 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10559 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10560 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10561 | | // (EI_NM ZERO_NM) - 1010 |
10562 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10563 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10564 | | // (EMT ZERO) - 1012 |
10565 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10566 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10567 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10568 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10569 | | // (EMT_NM ZERO_NM) - 1016 |
10570 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10571 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10572 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10573 | | // (EVPE ZERO) - 1019 |
10574 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10575 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10576 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10577 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10578 | | // (EVPE_NM ZERO_NM) - 1023 |
10579 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10580 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10581 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
10582 | | // (HYPCALL 0) - 1026 |
10583 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10584 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10585 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r5}, |
10586 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureVirt}, |
10587 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10588 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10589 | | // (HYPCALL_MM 0) - 1032 |
10590 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10591 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10592 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r5}, |
10593 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureVirt}, |
10594 | | // (JALR ZERO, GPR32Opnd:$rs) - 1036 |
10595 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10596 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10597 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10598 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
10599 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10600 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10601 | | // (JALR64 ZERO_64, GPR64Opnd:$rs) - 1042 |
10602 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10603 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10604 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10605 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips64r6}, |
10606 | | // (JALRCHB_NM ZERO_NM, GPRNM32Opnd:$rs) - 1046 |
10607 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10608 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10609 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10610 | | // (JALRC_HB_MMR6 RA, GPR32Opnd:$rs) - 1049 |
10611 | 96.6k | {AliasPatternCond_K_Reg, Mips_RA}, |
10612 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10613 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10614 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10615 | | // (JALRC_MMR6 RA, GPR32Opnd:$rs) - 1053 |
10616 | 96.6k | {AliasPatternCond_K_Reg, Mips_RA}, |
10617 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10618 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10619 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10620 | | // (JALR_HB RA, GPR32Opnd:$rs) - 1057 |
10621 | 96.6k | {AliasPatternCond_K_Reg, Mips_RA}, |
10622 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10623 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10624 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32}, |
10625 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10626 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10627 | | // (JALR_HB64 RA_64, GPR64Opnd:$rs) - 1063 |
10628 | 96.6k | {AliasPatternCond_K_Reg, Mips_RA_64}, |
10629 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10630 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10631 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips64}, |
10632 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10633 | | // (JIALC GPR32Opnd:$rs, 0) - 1068 |
10634 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10635 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10636 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10637 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
10638 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10639 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10640 | | // (JIALC64 GPR64Opnd:$rs, 0) - 1074 |
10641 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10642 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10643 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10644 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips64r6}, |
10645 | | // (JIC GPR32Opnd:$rs, 0) - 1078 |
10646 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10647 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10648 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10649 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
10650 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10651 | | // (JIC64 GPR64Opnd:$rs, 0) - 1083 |
10652 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10653 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10654 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10655 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips64r6}, |
10656 | | // (MFC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1087 |
10657 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10658 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
10659 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10660 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10661 | | // (MFHC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1091 |
10662 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10663 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
10664 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10665 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10666 | | // (MOVE16_MM ZERO, ZERO) - 1095 |
10667 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10668 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10669 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10670 | | // (MTC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1098 |
10671 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10672 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
10673 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10674 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10675 | | // (MTHC0_NM GPRNM32Opnd:$rt, COP0Opnd:$c0s, 0) - 1102 |
10676 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10677 | 96.6k | {AliasPatternCond_K_RegClass, Mips_COP0RegClassID}, |
10678 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10679 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10680 | | // (Move32R16 ZERO, S0) - 1106 |
10681 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10682 | 96.6k | {AliasPatternCond_K_Reg, Mips_S0}, |
10683 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips16}, |
10684 | | // (NOR_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, ZERO_NM) - 1109 |
10685 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10686 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10687 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
10688 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10689 | | // (OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO) - 1113 |
10690 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10691 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10692 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10693 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10694 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureGP64Bit}, |
10695 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10696 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10697 | | // (OR64 GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64) - 1120 |
10698 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10699 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10700 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_64}, |
10701 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
10702 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10703 | | // (RDHWR GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1125 |
10704 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10705 | 96.6k | {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID}, |
10706 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10707 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10708 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10709 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10710 | | // (RDHWR64 GPR64Opnd:$rt, HWRegsOpnd:$rs, 0) - 1131 |
10711 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR64RegClassID}, |
10712 | 96.6k | {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID}, |
10713 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10714 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureGP64Bit}, |
10715 | | // (RDHWR_MM GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1135 |
10716 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10717 | 96.6k | {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID}, |
10718 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10719 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10720 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10721 | | // (RDHWR_MMR6 GPR32Opnd:$rt, HWRegsOpnd:$rs, 0) - 1140 |
10722 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10723 | 96.6k | {AliasPatternCond_K_RegClass, Mips_HWRegsRegClassID}, |
10724 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10725 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10726 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10727 | | // (RESTOREJRC16_NM uimm8s4_nm:$adj, 0) - 1145 |
10728 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
10729 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10730 | | // (RESTOREJRC_NM uimm12s3_nm:$adj, 0) - 1147 |
10731 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
10732 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10733 | | // (RESTORE_NM uimm12s3_nm:$adj, 0) - 1149 |
10734 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
10735 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10736 | | // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 7, 8, 1) - 1151 |
10737 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10738 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10739 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)7}, |
10740 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)8}, |
10741 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)1}, |
10742 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10743 | | // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 15, 16, 0) - 1157 |
10744 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10745 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10746 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)15}, |
10747 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)16}, |
10748 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10749 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10750 | | // (ROTX_NM GPRNM32Opnd:$rt, GPRNM32Opnd:$rs, 8, 24, 0) - 1163 |
10751 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10752 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
10753 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)8}, |
10754 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)24}, |
10755 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10756 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10757 | | // (SAVE16_NM uimm8s4_nm:$adj, 0) - 1169 |
10758 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
10759 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10760 | | // (SAVE_NM uimm12s3_nm:$adj, 0) - 1171 |
10761 | 96.6k | {AliasPatternCond_K_Ignore, 0}, |
10762 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10763 | | // (SDBBP 0) - 1173 |
10764 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10765 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10766 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32}, |
10767 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10768 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips64r6}, |
10769 | | // (SDBBP_MMR6 0) - 1178 |
10770 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10771 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10772 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10773 | | // (SDBBP_R6 0) - 1181 |
10774 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10775 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10776 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10777 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10778 | | // (SIGRIE 0) - 1185 |
10779 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10780 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10781 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10782 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10783 | | // (SIGRIE_MMR6 0) - 1189 |
10784 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10785 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10786 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10787 | | // (SLL ZERO, ZERO, 0) - 1192 |
10788 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10789 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10790 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10791 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10792 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10793 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10794 | | // (SLL_MM ZERO, ZERO, 0) - 1198 |
10795 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10796 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10797 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10798 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10799 | | // (SLL_MMR6 ZERO, ZERO, 0) - 1202 |
10800 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10801 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10802 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10803 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10804 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10805 | | // (SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1207 |
10806 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10807 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10808 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10809 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10810 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10811 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10812 | | // (SUB GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1213 |
10813 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10814 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10815 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10816 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10817 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10818 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10819 | | // (SUBU_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1219 |
10820 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10821 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10822 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10823 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10824 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10825 | | // (SUBU_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1224 |
10826 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10827 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10828 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10829 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10830 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10831 | | // (SUB_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1229 |
10832 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10833 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10834 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10835 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10836 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10837 | | // (SUB_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1234 |
10838 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10839 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10840 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10841 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10842 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10843 | | // (SUB_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1239 |
10844 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10845 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10846 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10847 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10848 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10849 | | // (SUB_MMR6 GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1244 |
10850 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10851 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10852 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10853 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10854 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10855 | | // (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1249 |
10856 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10857 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10858 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10859 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10860 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10861 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10862 | | // (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1255 |
10863 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10864 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10865 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10866 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10867 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10868 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10869 | | // (SUBu_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs) - 1261 |
10870 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10871 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10872 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10873 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10874 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10875 | | // (SUBu_MM GPR32Opnd:$rt, ZERO, GPR32Opnd:$rt) - 1266 |
10876 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10877 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
10878 | 96.6k | {AliasPatternCond_K_TiedReg, 0}, |
10879 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10880 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips32r6}, |
10881 | | // (SWSP_MM GPR32Opnd:$rt, mem_mm_sp_imm5_lsl2:$offset) - 1271 |
10882 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10883 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10884 | | // (SYNC 0) - 1273 |
10885 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10886 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10887 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10888 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10889 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10890 | | // (SYNC_MM 0) - 1278 |
10891 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10892 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10893 | | // (SYNC_MMR6 0) - 1280 |
10894 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10895 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10896 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips32r6}, |
10897 | | // (SYNC_NM 0) - 1283 |
10898 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10899 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10900 | | // (SYNC_NM 4) - 1285 |
10901 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)4}, |
10902 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10903 | | // (SYNC_NM 16) - 1287 |
10904 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)16}, |
10905 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10906 | | // (SYNC_NM 17) - 1289 |
10907 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)17}, |
10908 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10909 | | // (SYNC_NM 18) - 1291 |
10910 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)18}, |
10911 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10912 | | // (SYNC_NM 19) - 1293 |
10913 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)19}, |
10914 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
10915 | | // (SYSCALL 0) - 1295 |
10916 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10917 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10918 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10919 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10920 | | // (SYSCALL_MM 0) - 1299 |
10921 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10922 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10923 | | // (TEQ GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1301 |
10924 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10925 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10926 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10927 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10928 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10929 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10930 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10931 | | // (TEQ_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1308 |
10932 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10933 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10934 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10935 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10936 | | // (TGE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1312 |
10937 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10938 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10939 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10940 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10941 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10942 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10943 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10944 | | // (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1319 |
10945 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10946 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10947 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10948 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10949 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10950 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10951 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10952 | | // (TGEU_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1326 |
10953 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10954 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10955 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10956 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10957 | | // (TGE_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1330 |
10958 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10959 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10960 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10961 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10962 | | // (TLT GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1334 |
10963 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10964 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10965 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10966 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10967 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10968 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10969 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10970 | | // (TLTU GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1341 |
10971 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10972 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10973 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10974 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10975 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10976 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10977 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10978 | | // (TLTU_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1348 |
10979 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10980 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10981 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10982 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10983 | | // (TLT_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1352 |
10984 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10985 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10986 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10987 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
10988 | | // (TNE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1356 |
10989 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10990 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10991 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
10992 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMips16}, |
10993 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMips2}, |
10994 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
10995 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
10996 | | // (TNE_MM GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 1363 |
10997 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10998 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
10999 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
11000 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
11001 | | // (WAIT_MM 0) - 1367 |
11002 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
11003 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
11004 | | // (WAIT_NM 0) - 1369 |
11005 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)0}, |
11006 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
11007 | | // (WRDSP GPR32Opnd:$rt, 31) - 1371 |
11008 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
11009 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)31}, |
11010 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureDSP}, |
11011 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
11012 | | // (WRDSP_MM GPR32Opnd:$rt, 31) - 1375 |
11013 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
11014 | 96.6k | {AliasPatternCond_K_Imm, (uint32_t)31}, |
11015 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureDSP}, |
11016 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMicroMips}, |
11017 | | // (YIELD ZERO, GPR32Opnd:$rs) - 1379 |
11018 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO}, |
11019 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPR32RegClassID}, |
11020 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
11021 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureMicroMips}, |
11022 | 96.6k | {AliasPatternCond_K_NegFeature, Mips_FeatureNanoMips}, |
11023 | | // (YIELD_NM ZERO_NM, GPRNM32Opnd:$rs) - 1384 |
11024 | 96.6k | {AliasPatternCond_K_Reg, Mips_ZERO_NM}, |
11025 | 96.6k | {AliasPatternCond_K_RegClass, Mips_GPRNM32RegClassID}, |
11026 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureNanoMips}, |
11027 | 96.6k | {AliasPatternCond_K_Feature, Mips_FeatureMT}, |
11028 | 96.6k | {0}, }; |
11029 | | |
11030 | 96.6k | static const char AsmStrings[] = |
11031 | 96.6k | /* 0 */ "mftacx $\x01\0" |
11032 | 96.6k | /* 10 */ "mftc0 $\x01, $\x02\0" |
11033 | 96.6k | /* 23 */ "mfthi $\x01\0" |
11034 | 96.6k | /* 32 */ "mftlo $\x01\0" |
11035 | 96.6k | /* 41 */ "mttacx $\x02\0" |
11036 | 96.6k | /* 51 */ "mttc0 $\x02, $\x01\0" |
11037 | 96.6k | /* 64 */ "mtthi $\x02\0" |
11038 | 96.6k | /* 73 */ "mttlo $\x02\0" |
11039 | 96.6k | /* 82 */ "nor $\x01, $\x03\0" |
11040 | 96.6k | /* 93 */ "slt $\x01, $\x03\0" |
11041 | 96.6k | /* 104 */ "sltu $\x01, $\x03\0" |
11042 | 96.6k | /* 116 */ "addiu.b32 $\x01, $\x02, $\x03\0" |
11043 | 96.6k | /* 137 */ "addiu.b $\x01, $\x02, $\x03\0" |
11044 | 96.6k | /* 156 */ "addiu.w $\x01, $\x02, $\x03\0" |
11045 | 96.6k | /* 175 */ "lapc $\x01, $\x02\0" |
11046 | 96.6k | /* 187 */ "move $\x01, $\x02\0" |
11047 | 96.6k | /* 199 */ "bc1f $\xFF\x02\x01\0" |
11048 | 96.6k | /* 209 */ "bc1fl $\xFF\x02\x01\0" |
11049 | 96.6k | /* 220 */ "bc1t $\xFF\x02\x01\0" |
11050 | 96.6k | /* 230 */ "bc1tl $\xFF\x02\x01\0" |
11051 | 96.6k | /* 241 */ "beqc $\x02, $\x01, $\xFF\x03\x01\0" |
11052 | 96.6k | /* 259 */ "beqzc $\x01, $\xFF\x03\x01\0" |
11053 | 96.6k | /* 274 */ "beqzc $\x02, $\xFF\x03\x01\0" |
11054 | 96.6k | /* 289 */ "beqzl $\x01, $\xFF\x03\x01\0" |
11055 | 96.6k | /* 304 */ "bal $\xFF\x02\x01\0" |
11056 | 96.6k | /* 313 */ "bnec $\x02, $\x01, $\xFF\x03\x01\0" |
11057 | 96.6k | /* 331 */ "bnezc $\x01, $\xFF\x03\x01\0" |
11058 | 96.6k | /* 346 */ "bnezc $\x02, $\xFF\x03\x01\0" |
11059 | 96.6k | /* 361 */ "bnezl $\x01, $\xFF\x03\x01\0" |
11060 | 96.6k | /* 376 */ "break\0" |
11061 | 96.6k | /* 382 */ "break $\xFF\x01\x02\0" |
11062 | 96.6k | /* 393 */ "c.eq.d $\x02, $\x03\0" |
11063 | 96.6k | /* 407 */ "c.eq.s $\x02, $\x03\0" |
11064 | 96.6k | /* 421 */ "c.f.d $\x02, $\x03\0" |
11065 | 96.6k | /* 434 */ "c.f.s $\x02, $\x03\0" |
11066 | 96.6k | /* 447 */ "c.le.d $\x02, $\x03\0" |
11067 | 96.6k | /* 461 */ "c.le.s $\x02, $\x03\0" |
11068 | 96.6k | /* 475 */ "c.lt.d $\x02, $\x03\0" |
11069 | 96.6k | /* 489 */ "c.lt.s $\x02, $\x03\0" |
11070 | 96.6k | /* 503 */ "c.nge.d $\x02, $\x03\0" |
11071 | 96.6k | /* 518 */ "c.nge.s $\x02, $\x03\0" |
11072 | 96.6k | /* 533 */ "c.ngle.d $\x02, $\x03\0" |
11073 | 96.6k | /* 549 */ "c.ngle.s $\x02, $\x03\0" |
11074 | 96.6k | /* 565 */ "c.ngl.d $\x02, $\x03\0" |
11075 | 96.6k | /* 580 */ "c.ngl.s $\x02, $\x03\0" |
11076 | 96.6k | /* 595 */ "c.ngt.d $\x02, $\x03\0" |
11077 | 96.6k | /* 610 */ "c.ngt.s $\x02, $\x03\0" |
11078 | 96.6k | /* 625 */ "c.ole.d $\x02, $\x03\0" |
11079 | 96.6k | /* 640 */ "c.ole.s $\x02, $\x03\0" |
11080 | 96.6k | /* 655 */ "c.olt.d $\x02, $\x03\0" |
11081 | 96.6k | /* 670 */ "c.olt.s $\x02, $\x03\0" |
11082 | 96.6k | /* 685 */ "c.seq.d $\x02, $\x03\0" |
11083 | 96.6k | /* 700 */ "c.seq.s $\x02, $\x03\0" |
11084 | 96.6k | /* 715 */ "c.sf.d $\x02, $\x03\0" |
11085 | 96.6k | /* 729 */ "c.sf.s $\x02, $\x03\0" |
11086 | 96.6k | /* 743 */ "c.ueq.d $\x02, $\x03\0" |
11087 | 96.6k | /* 758 */ "c.ueq.s $\x02, $\x03\0" |
11088 | 96.6k | /* 773 */ "c.ule.d $\x02, $\x03\0" |
11089 | 96.6k | /* 788 */ "c.ule.s $\x02, $\x03\0" |
11090 | 96.6k | /* 803 */ "c.ult.d $\x02, $\x03\0" |
11091 | 96.6k | /* 818 */ "c.ult.s $\x02, $\x03\0" |
11092 | 96.6k | /* 833 */ "c.un.d $\x02, $\x03\0" |
11093 | 96.6k | /* 847 */ "c.un.s $\x02, $\x03\0" |
11094 | 96.6k | /* 861 */ "di\0" |
11095 | 96.6k | /* 864 */ "div $\x01, $\x03\0" |
11096 | 96.6k | /* 875 */ "divu $\x01, $\x03\0" |
11097 | 96.6k | /* 887 */ "dmt\0" |
11098 | 96.6k | /* 891 */ "dneg $\x01, $\x03\0" |
11099 | 96.6k | /* 903 */ "dneg $\x01\0" |
11100 | 96.6k | /* 911 */ "dnegu $\x01, $\x03\0" |
11101 | 96.6k | /* 924 */ "dnegu $\x01\0" |
11102 | 96.6k | /* 933 */ "dvpe\0" |
11103 | 96.6k | /* 938 */ "ei\0" |
11104 | 96.6k | /* 941 */ "emt\0" |
11105 | 96.6k | /* 945 */ "evpe\0" |
11106 | 96.6k | /* 950 */ "hypcall\0" |
11107 | 96.6k | /* 958 */ "jr $\x02\0" |
11108 | 96.6k | /* 964 */ "jrc.hb $\x02\0" |
11109 | 96.6k | /* 974 */ "jalrc.hb $\x02\0" |
11110 | 96.6k | /* 986 */ "jalrc $\x02\0" |
11111 | 96.6k | /* 995 */ "jalr.hb $\x02\0" |
11112 | 96.6k | /* 1006 */ "jalrc $\x01\0" |
11113 | 96.6k | /* 1015 */ "jrc $\x01\0" |
11114 | 96.6k | /* 1022 */ "mfc0 $\x01, $\x02\0" |
11115 | 96.6k | /* 1034 */ "mfhc0 $\x01, $\x02\0" |
11116 | 96.6k | /* 1047 */ "nop\0" |
11117 | 96.6k | /* 1051 */ "mtc0 $\x01, $\x02\0" |
11118 | 96.6k | /* 1063 */ "mthc0 $\x01, $\x02\0" |
11119 | 96.6k | /* 1076 */ "not $\x01, $\x02\0" |
11120 | 96.6k | /* 1087 */ "rdhwr $\x01, $\x02\0" |
11121 | 96.6k | /* 1100 */ "restore.jrc $\xFF\x01\x03\0" |
11122 | 96.6k | /* 1117 */ "restore.jrc $\xFF\x01\x04\0" |
11123 | 96.6k | /* 1134 */ "restore $\xFF\x01\x04\0" |
11124 | 96.6k | /* 1147 */ "bitrevb $\x01, $\x02\0" |
11125 | 96.6k | /* 1162 */ "bitrevh $\x01, $\x02\0" |
11126 | 96.6k | /* 1177 */ "byterevh $\x01, $\x02\0" |
11127 | 96.6k | /* 1193 */ "save $\xFF\x01\x03\0" |
11128 | 96.6k | /* 1203 */ "save $\xFF\x01\x04\0" |
11129 | 96.6k | /* 1213 */ "sdbbp\0" |
11130 | 96.6k | /* 1219 */ "sigrie\0" |
11131 | 96.6k | /* 1226 */ "neg $\x01, $\x03\0" |
11132 | 96.6k | /* 1237 */ "neg $\x01\0" |
11133 | 96.6k | /* 1244 */ "negu $\x01, $\x03\0" |
11134 | 96.6k | /* 1256 */ "negu $\x01\0" |
11135 | 96.6k | /* 1264 */ "sw $\x01, $\xFF\x02\x05\0" |
11136 | 96.6k | /* 1276 */ "sync\0" |
11137 | 96.6k | /* 1281 */ "sync_wmb\0" |
11138 | 96.6k | /* 1290 */ "sync_mb\0" |
11139 | 96.6k | /* 1298 */ "sync_acquire\0" |
11140 | 96.6k | /* 1311 */ "sync_release\0" |
11141 | 96.6k | /* 1324 */ "sync_rmb\0" |
11142 | 96.6k | /* 1333 */ "syscall\0" |
11143 | 96.6k | /* 1341 */ "teq $\x01, $\x02\0" |
11144 | 96.6k | /* 1352 */ "tge $\x01, $\x02\0" |
11145 | 96.6k | /* 1363 */ "tgeu $\x01, $\x02\0" |
11146 | 96.6k | /* 1375 */ "tlt $\x01, $\x02\0" |
11147 | 96.6k | /* 1386 */ "tltu $\x01, $\x02\0" |
11148 | 96.6k | /* 1398 */ "tne $\x01, $\x02\0" |
11149 | 96.6k | /* 1409 */ "wait\0" |
11150 | 96.6k | /* 1414 */ "wrdsp $\x01\0" |
11151 | 96.6k | /* 1423 */ "yield $\x02\0" |
11152 | 96.6k | ; |
11153 | | |
11154 | 96.6k | #ifndef NDEBUG |
11155 | | //static struct SortCheck { |
11156 | | // SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) { |
11157 | | // assert(std::is_sorted( |
11158 | | // OpToPatterns.begin(), OpToPatterns.end(), |
11159 | | // [](const PatternsForOpcode &L, const //PatternsForOpcode &R) { |
11160 | | // return L.Opcode < R.Opcode; |
11161 | | // }) && |
11162 | | // "tablegen failed to sort opcode patterns"); |
11163 | | // } |
11164 | | //} sortCheckVar(OpToPatterns); |
11165 | 96.6k | #endif |
11166 | | |
11167 | 96.6k | AliasMatchingData M = { |
11168 | 96.6k | OpToPatterns, |
11169 | 96.6k | Patterns, |
11170 | 96.6k | Conds, |
11171 | 96.6k | AsmStrings, |
11172 | 96.6k | NULL, |
11173 | 96.6k | }; |
11174 | 96.6k | const char *AsmString = matchAliasPatterns(MI, &M); |
11175 | 96.6k | if (!AsmString) return false; |
11176 | | |
11177 | 3.90k | unsigned I = 0; |
11178 | 19.5k | while (AsmString[I] != ' ' && AsmString[I] != '\t' && |
11179 | 16.9k | AsmString[I] != '$' && AsmString[I] != '\0') |
11180 | 15.6k | ++I; |
11181 | 3.90k | SStream_concat1(OS, '\t'); |
11182 | 3.90k | char *substr = malloc(I+1); |
11183 | 3.90k | memcpy(substr, AsmString, I); |
11184 | 3.90k | substr[I] = '\0'; |
11185 | 3.90k | SStream_concat0(OS, substr); |
11186 | 3.90k | free(substr); |
11187 | 3.90k | if (AsmString[I] != '\0') { |
11188 | 2.68k | if (AsmString[I] == ' ' || AsmString[I] == '\t') { |
11189 | 2.68k | SStream_concat1(OS, '\t'); |
11190 | 2.68k | ++I; |
11191 | 2.68k | } |
11192 | 8.18k | do { |
11193 | 8.18k | if (AsmString[I] == '$') { |
11194 | 4.52k | ++I; |
11195 | 4.52k | if (AsmString[I] == (char)0xff) { |
11196 | 1.24k | ++I; |
11197 | 1.24k | int OpIdx = AsmString[I++] - 1; |
11198 | 1.24k | int PrintMethodIdx = AsmString[I++] - 1; |
11199 | 1.24k | printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS); |
11200 | 1.24k | } else |
11201 | 3.27k | printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS); |
11202 | 4.52k | } else { |
11203 | 3.66k | SStream_concat1(OS, AsmString[I++]); |
11204 | 3.66k | } |
11205 | 8.18k | } while (AsmString[I] != '\0'); |
11206 | 2.68k | } |
11207 | | |
11208 | 3.90k | return true; |
11209 | | #else |
11210 | | return false; |
11211 | | #endif // CAPSTONE_DIET |
11212 | 96.6k | } |
11213 | | |
11214 | | static void printCustomAliasOperand( |
11215 | | MCInst *MI, uint64_t Address, unsigned OpIdx, |
11216 | | unsigned PrintMethodIdx, |
11217 | 1.24k | SStream *OS) { |
11218 | 1.24k | #ifndef CAPSTONE_DIET |
11219 | 1.24k | switch (PrintMethodIdx) { |
11220 | 0 | default: |
11221 | 0 | CS_ASSERT_RET(0 && "Unknown PrintMethod kind"); |
11222 | 0 | break; |
11223 | 321 | case 0: |
11224 | 321 | printBranchOperand(MI, Address, OpIdx, OS); |
11225 | 321 | break; |
11226 | 197 | case 1: |
11227 | 197 | printUImm_10_0(MI, OpIdx, OS); |
11228 | 197 | break; |
11229 | 0 | case 2: |
11230 | 0 | printUImm_8_0(MI, OpIdx, OS); |
11231 | 0 | break; |
11232 | 0 | case 3: |
11233 | 0 | printUImm_12_0(MI, OpIdx, OS); |
11234 | 0 | break; |
11235 | 724 | case 4: |
11236 | 724 | printMemOperand(MI, OpIdx, OS); |
11237 | 724 | break; |
11238 | 1.24k | } |
11239 | 1.24k | #endif // CAPSTONE_DIET |
11240 | 1.24k | } |
11241 | | |
11242 | | #endif // PRINT_ALIAS_INSTR |