Coverage Report

Created: 2026-02-26 07:11

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
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#endif
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38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
42
#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.3k
{
50
10.3k
  uint8_t Imm =
51
10.3k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.3k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
4.34k
  case 0:
56
4.34k
    SStream_concat0(O, "eq");
57
4.34k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
4.34k
    break;
59
1.19k
  case 1:
60
1.19k
    SStream_concat0(O, "lt");
61
1.19k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.19k
    break;
63
414
  case 2:
64
414
    SStream_concat0(O, "le");
65
414
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
414
    break;
67
71
  case 3:
68
71
    SStream_concat0(O, "unord");
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71
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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71
    break;
71
370
  case 4:
72
370
    SStream_concat0(O, "neq");
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370
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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370
    break;
75
34
  case 5:
76
34
    SStream_concat0(O, "nlt");
77
34
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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34
    break;
79
194
  case 6:
80
194
    SStream_concat0(O, "nle");
81
194
    op_addAvxCC(MI, X86_AVX_CC_NLE);
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194
    break;
83
354
  case 7:
84
354
    SStream_concat0(O, "ord");
85
354
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
354
    break;
87
67
  case 8:
88
67
    SStream_concat0(O, "eq_uq");
89
67
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
67
    break;
91
116
  case 9:
92
116
    SStream_concat0(O, "nge");
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116
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
116
    break;
95
15
  case 0xa:
96
15
    SStream_concat0(O, "ngt");
97
15
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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15
    break;
99
626
  case 0xb:
100
626
    SStream_concat0(O, "false");
101
626
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
626
    break;
103
129
  case 0xc:
104
129
    SStream_concat0(O, "neq_oq");
105
129
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
129
    break;
107
173
  case 0xd:
108
173
    SStream_concat0(O, "ge");
109
173
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
173
    break;
111
60
  case 0xe:
112
60
    SStream_concat0(O, "gt");
113
60
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
60
    break;
115
126
  case 0xf:
116
126
    SStream_concat0(O, "true");
117
126
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
126
    break;
119
260
  case 0x10:
120
260
    SStream_concat0(O, "eq_os");
121
260
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
260
    break;
123
184
  case 0x11:
124
184
    SStream_concat0(O, "lt_oq");
125
184
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
184
    break;
127
113
  case 0x12:
128
113
    SStream_concat0(O, "le_oq");
129
113
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
113
    break;
131
37
  case 0x13:
132
37
    SStream_concat0(O, "unord_s");
133
37
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
37
    break;
135
79
  case 0x14:
136
79
    SStream_concat0(O, "neq_us");
137
79
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
79
    break;
139
106
  case 0x15:
140
106
    SStream_concat0(O, "nlt_uq");
141
106
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
106
    break;
143
89
  case 0x16:
144
89
    SStream_concat0(O, "nle_uq");
145
89
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
89
    break;
147
141
  case 0x17:
148
141
    SStream_concat0(O, "ord_s");
149
141
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
141
    break;
151
187
  case 0x18:
152
187
    SStream_concat0(O, "eq_us");
153
187
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
187
    break;
155
135
  case 0x19:
156
135
    SStream_concat0(O, "nge_uq");
157
135
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
135
    break;
159
9
  case 0x1a:
160
9
    SStream_concat0(O, "ngt_uq");
161
9
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
9
    break;
163
289
  case 0x1b:
164
289
    SStream_concat0(O, "false_os");
165
289
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
289
    break;
167
312
  case 0x1c:
168
312
    SStream_concat0(O, "neq_os");
169
312
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
312
    break;
171
53
  case 0x1d:
172
53
    SStream_concat0(O, "ge_oq");
173
53
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
53
    break;
175
25
  case 0x1e:
176
25
    SStream_concat0(O, "gt_oq");
177
25
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
25
    break;
179
11
  case 0x1f:
180
11
    SStream_concat0(O, "true_us");
181
11
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
11
    break;
183
10.3k
  }
184
185
10.3k
  MI->popcode_adjust = Imm + 1;
186
10.3k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.27k
{
190
2.27k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.27k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
790
  case 0:
195
790
    SStream_concat0(O, "lt");
196
790
    op_addXopCC(MI, X86_XOP_CC_LT);
197
790
    break;
198
100
  case 1:
199
100
    SStream_concat0(O, "le");
200
100
    op_addXopCC(MI, X86_XOP_CC_LE);
201
100
    break;
202
386
  case 2:
203
386
    SStream_concat0(O, "gt");
204
386
    op_addXopCC(MI, X86_XOP_CC_GT);
205
386
    break;
206
46
  case 3:
207
46
    SStream_concat0(O, "ge");
208
46
    op_addXopCC(MI, X86_XOP_CC_GE);
209
46
    break;
210
169
  case 4:
211
169
    SStream_concat0(O, "eq");
212
169
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
169
    break;
214
256
  case 5:
215
256
    SStream_concat0(O, "neq");
216
256
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
256
    break;
218
413
  case 6:
219
413
    SStream_concat0(O, "false");
220
413
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
413
    break;
222
118
  case 7:
223
118
    SStream_concat0(O, "true");
224
118
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
118
    break;
226
2.27k
  }
227
2.27k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.41k
{
231
2.41k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.41k
  switch (Imm) {
233
1.62k
  case 0:
234
1.62k
    SStream_concat0(O, "{rn-sae}");
235
1.62k
    op_addAvxSae(MI);
236
1.62k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.62k
    break;
238
408
  case 1:
239
408
    SStream_concat0(O, "{rd-sae}");
240
408
    op_addAvxSae(MI);
241
408
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
408
    break;
243
302
  case 2:
244
302
    SStream_concat0(O, "{ru-sae}");
245
302
    op_addAvxSae(MI);
246
302
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
302
    break;
248
75
  case 3:
249
75
    SStream_concat0(O, "{rz-sae}");
250
75
    op_addAvxSae(MI);
251
75
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
75
    break;
253
0
  default:
254
0
    break; // never reach
255
2.41k
  }
256
2.41k
}
257
#endif