Coverage Report

Created: 2026-03-03 06:14

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
7
//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
36
#endif
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38
#include <string.h>
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40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
3.37k
{
50
3.37k
  uint8_t Imm =
51
3.37k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
3.37k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
1.07k
  case 0:
56
1.07k
    SStream_concat0(O, "eq");
57
1.07k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
1.07k
    break;
59
479
  case 1:
60
479
    SStream_concat0(O, "lt");
61
479
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
479
    break;
63
217
  case 2:
64
217
    SStream_concat0(O, "le");
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217
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
217
    break;
67
12
  case 3:
68
12
    SStream_concat0(O, "unord");
69
12
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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12
    break;
71
1
  case 4:
72
1
    SStream_concat0(O, "neq");
73
1
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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1
    break;
75
9
  case 5:
76
9
    SStream_concat0(O, "nlt");
77
9
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
9
    break;
79
19
  case 6:
80
19
    SStream_concat0(O, "nle");
81
19
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
19
    break;
83
96
  case 7:
84
96
    SStream_concat0(O, "ord");
85
96
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
96
    break;
87
34
  case 8:
88
34
    SStream_concat0(O, "eq_uq");
89
34
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
34
    break;
91
2
  case 9:
92
2
    SStream_concat0(O, "nge");
93
2
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
2
    break;
95
0
  case 0xa:
96
0
    SStream_concat0(O, "ngt");
97
0
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
0
    break;
99
577
  case 0xb:
100
577
    SStream_concat0(O, "false");
101
577
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
577
    break;
103
39
  case 0xc:
104
39
    SStream_concat0(O, "neq_oq");
105
39
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
39
    break;
107
14
  case 0xd:
108
14
    SStream_concat0(O, "ge");
109
14
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
14
    break;
111
0
  case 0xe:
112
0
    SStream_concat0(O, "gt");
113
0
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
0
    break;
115
41
  case 0xf:
116
41
    SStream_concat0(O, "true");
117
41
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
41
    break;
119
240
  case 0x10:
120
240
    SStream_concat0(O, "eq_os");
121
240
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
240
    break;
123
36
  case 0x11:
124
36
    SStream_concat0(O, "lt_oq");
125
36
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
36
    break;
127
20
  case 0x12:
128
20
    SStream_concat0(O, "le_oq");
129
20
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
20
    break;
131
5
  case 0x13:
132
5
    SStream_concat0(O, "unord_s");
133
5
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
5
    break;
135
25
  case 0x14:
136
25
    SStream_concat0(O, "neq_us");
137
25
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
25
    break;
139
37
  case 0x15:
140
37
    SStream_concat0(O, "nlt_uq");
141
37
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
37
    break;
143
0
  case 0x16:
144
0
    SStream_concat0(O, "nle_uq");
145
0
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
0
    break;
147
10
  case 0x17:
148
10
    SStream_concat0(O, "ord_s");
149
10
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
10
    break;
151
99
  case 0x18:
152
99
    SStream_concat0(O, "eq_us");
153
99
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
99
    break;
155
42
  case 0x19:
156
42
    SStream_concat0(O, "nge_uq");
157
42
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
42
    break;
159
9
  case 0x1a:
160
9
    SStream_concat0(O, "ngt_uq");
161
9
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
9
    break;
163
145
  case 0x1b:
164
145
    SStream_concat0(O, "false_os");
165
145
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
145
    break;
167
50
  case 0x1c:
168
50
    SStream_concat0(O, "neq_os");
169
50
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
50
    break;
171
31
  case 0x1d:
172
31
    SStream_concat0(O, "ge_oq");
173
31
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
31
    break;
175
4
  case 0x1e:
176
4
    SStream_concat0(O, "gt_oq");
177
4
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
4
    break;
179
9
  case 0x1f:
180
9
    SStream_concat0(O, "true_us");
181
9
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
9
    break;
183
3.37k
  }
184
185
3.37k
  MI->popcode_adjust = Imm + 1;
186
3.37k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.17k
{
190
1.17k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.17k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
96
  case 0:
195
96
    SStream_concat0(O, "lt");
196
96
    op_addXopCC(MI, X86_XOP_CC_LT);
197
96
    break;
198
83
  case 1:
199
83
    SStream_concat0(O, "le");
200
83
    op_addXopCC(MI, X86_XOP_CC_LE);
201
83
    break;
202
199
  case 2:
203
199
    SStream_concat0(O, "gt");
204
199
    op_addXopCC(MI, X86_XOP_CC_GT);
205
199
    break;
206
255
  case 3:
207
255
    SStream_concat0(O, "ge");
208
255
    op_addXopCC(MI, X86_XOP_CC_GE);
209
255
    break;
210
6
  case 4:
211
6
    SStream_concat0(O, "eq");
212
6
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
6
    break;
214
35
  case 5:
215
35
    SStream_concat0(O, "neq");
216
35
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
35
    break;
218
408
  case 6:
219
408
    SStream_concat0(O, "false");
220
408
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
408
    break;
222
95
  case 7:
223
95
    SStream_concat0(O, "true");
224
95
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
95
    break;
226
1.17k
  }
227
1.17k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.09k
{
231
1.09k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.09k
  switch (Imm) {
233
645
  case 0:
234
645
    SStream_concat0(O, "{rn-sae}");
235
645
    op_addAvxSae(MI);
236
645
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
645
    break;
238
313
  case 1:
239
313
    SStream_concat0(O, "{rd-sae}");
240
313
    op_addAvxSae(MI);
241
313
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
313
    break;
243
39
  case 2:
244
39
    SStream_concat0(O, "{ru-sae}");
245
39
    op_addAvxSae(MI);
246
39
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
39
    break;
248
95
  case 3:
249
95
    SStream_concat0(O, "{rz-sae}");
250
95
    op_addAvxSae(MI);
251
95
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
95
    break;
253
0
  default:
254
0
    break; // never reach
255
1.09k
  }
256
1.09k
}
257
#endif