Coverage Report

Created: 2026-03-13 06:50

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
7.76k
{
50
7.76k
  uint8_t Imm =
51
7.76k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
7.76k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
3.29k
  case 0:
56
3.29k
    SStream_concat0(O, "eq");
57
3.29k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
3.29k
    break;
59
1.21k
  case 1:
60
1.21k
    SStream_concat0(O, "lt");
61
1.21k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.21k
    break;
63
424
  case 2:
64
424
    SStream_concat0(O, "le");
65
424
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
424
    break;
67
84
  case 3:
68
84
    SStream_concat0(O, "unord");
69
84
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
84
    break;
71
38
  case 4:
72
38
    SStream_concat0(O, "neq");
73
38
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
38
    break;
75
138
  case 5:
76
138
    SStream_concat0(O, "nlt");
77
138
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
138
    break;
79
256
  case 6:
80
256
    SStream_concat0(O, "nle");
81
256
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
256
    break;
83
211
  case 7:
84
211
    SStream_concat0(O, "ord");
85
211
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
211
    break;
87
56
  case 8:
88
56
    SStream_concat0(O, "eq_uq");
89
56
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
56
    break;
91
9
  case 9:
92
9
    SStream_concat0(O, "nge");
93
9
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
9
    break;
95
56
  case 0xa:
96
56
    SStream_concat0(O, "ngt");
97
56
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
56
    break;
99
511
  case 0xb:
100
511
    SStream_concat0(O, "false");
101
511
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
511
    break;
103
33
  case 0xc:
104
33
    SStream_concat0(O, "neq_oq");
105
33
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
33
    break;
107
16
  case 0xd:
108
16
    SStream_concat0(O, "ge");
109
16
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
16
    break;
111
7
  case 0xe:
112
7
    SStream_concat0(O, "gt");
113
7
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
7
    break;
115
25
  case 0xf:
116
25
    SStream_concat0(O, "true");
117
25
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
25
    break;
119
629
  case 0x10:
120
629
    SStream_concat0(O, "eq_os");
121
629
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
629
    break;
123
36
  case 0x11:
124
36
    SStream_concat0(O, "lt_oq");
125
36
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
36
    break;
127
79
  case 0x12:
128
79
    SStream_concat0(O, "le_oq");
129
79
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
79
    break;
131
28
  case 0x13:
132
28
    SStream_concat0(O, "unord_s");
133
28
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
28
    break;
135
12
  case 0x14:
136
12
    SStream_concat0(O, "neq_us");
137
12
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
12
    break;
139
67
  case 0x15:
140
67
    SStream_concat0(O, "nlt_uq");
141
67
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
67
    break;
143
21
  case 0x16:
144
21
    SStream_concat0(O, "nle_uq");
145
21
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
21
    break;
147
10
  case 0x17:
148
10
    SStream_concat0(O, "ord_s");
149
10
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
10
    break;
151
59
  case 0x18:
152
59
    SStream_concat0(O, "eq_us");
153
59
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
59
    break;
155
103
  case 0x19:
156
103
    SStream_concat0(O, "nge_uq");
157
103
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
103
    break;
159
33
  case 0x1a:
160
33
    SStream_concat0(O, "ngt_uq");
161
33
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
33
    break;
163
100
  case 0x1b:
164
100
    SStream_concat0(O, "false_os");
165
100
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
100
    break;
167
74
  case 0x1c:
168
74
    SStream_concat0(O, "neq_os");
169
74
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
74
    break;
171
39
  case 0x1d:
172
39
    SStream_concat0(O, "ge_oq");
173
39
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
39
    break;
175
85
  case 0x1e:
176
85
    SStream_concat0(O, "gt_oq");
177
85
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
85
    break;
179
20
  case 0x1f:
180
20
    SStream_concat0(O, "true_us");
181
20
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
20
    break;
183
7.76k
  }
184
185
7.76k
  MI->popcode_adjust = Imm + 1;
186
7.76k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.79k
{
190
1.79k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.79k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
207
  case 0:
195
207
    SStream_concat0(O, "lt");
196
207
    op_addXopCC(MI, X86_XOP_CC_LT);
197
207
    break;
198
69
  case 1:
199
69
    SStream_concat0(O, "le");
200
69
    op_addXopCC(MI, X86_XOP_CC_LE);
201
69
    break;
202
377
  case 2:
203
377
    SStream_concat0(O, "gt");
204
377
    op_addXopCC(MI, X86_XOP_CC_GT);
205
377
    break;
206
194
  case 3:
207
194
    SStream_concat0(O, "ge");
208
194
    op_addXopCC(MI, X86_XOP_CC_GE);
209
194
    break;
210
114
  case 4:
211
114
    SStream_concat0(O, "eq");
212
114
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
114
    break;
214
36
  case 5:
215
36
    SStream_concat0(O, "neq");
216
36
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
36
    break;
218
673
  case 6:
219
673
    SStream_concat0(O, "false");
220
673
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
673
    break;
222
125
  case 7:
223
125
    SStream_concat0(O, "true");
224
125
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
125
    break;
226
1.79k
  }
227
1.79k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.07k
{
231
2.07k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.07k
  switch (Imm) {
233
1.33k
  case 0:
234
1.33k
    SStream_concat0(O, "{rn-sae}");
235
1.33k
    op_addAvxSae(MI);
236
1.33k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.33k
    break;
238
359
  case 1:
239
359
    SStream_concat0(O, "{rd-sae}");
240
359
    op_addAvxSae(MI);
241
359
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
359
    break;
243
92
  case 2:
244
92
    SStream_concat0(O, "{ru-sae}");
245
92
    op_addAvxSae(MI);
246
92
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
92
    break;
248
293
  case 3:
249
293
    SStream_concat0(O, "{rz-sae}");
250
293
    op_addAvxSae(MI);
251
293
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
293
    break;
253
0
  default:
254
0
    break; // never reach
255
2.07k
  }
256
2.07k
}
257
#endif