Coverage Report

Created: 2026-04-12 06:30

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
36
#endif
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38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
5.93k
{
50
5.93k
  uint8_t Imm =
51
5.93k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
5.93k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.90k
  case 0:
56
2.90k
    SStream_concat0(O, "eq");
57
2.90k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.90k
    break;
59
960
  case 1:
60
960
    SStream_concat0(O, "lt");
61
960
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
960
    break;
63
314
  case 2:
64
314
    SStream_concat0(O, "le");
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314
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
314
    break;
67
91
  case 3:
68
91
    SStream_concat0(O, "unord");
69
91
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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91
    break;
71
31
  case 4:
72
31
    SStream_concat0(O, "neq");
73
31
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
31
    break;
75
25
  case 5:
76
25
    SStream_concat0(O, "nlt");
77
25
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
25
    break;
79
115
  case 6:
80
115
    SStream_concat0(O, "nle");
81
115
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
115
    break;
83
12
  case 7:
84
12
    SStream_concat0(O, "ord");
85
12
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
12
    break;
87
50
  case 8:
88
50
    SStream_concat0(O, "eq_uq");
89
50
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
50
    break;
91
194
  case 9:
92
194
    SStream_concat0(O, "nge");
93
194
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
194
    break;
95
5
  case 0xa:
96
5
    SStream_concat0(O, "ngt");
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5
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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5
    break;
99
195
  case 0xb:
100
195
    SStream_concat0(O, "false");
101
195
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
195
    break;
103
36
  case 0xc:
104
36
    SStream_concat0(O, "neq_oq");
105
36
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
36
    break;
107
3
  case 0xd:
108
3
    SStream_concat0(O, "ge");
109
3
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
3
    break;
111
3
  case 0xe:
112
3
    SStream_concat0(O, "gt");
113
3
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
3
    break;
115
15
  case 0xf:
116
15
    SStream_concat0(O, "true");
117
15
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
15
    break;
119
186
  case 0x10:
120
186
    SStream_concat0(O, "eq_os");
121
186
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
186
    break;
123
42
  case 0x11:
124
42
    SStream_concat0(O, "lt_oq");
125
42
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
42
    break;
127
44
  case 0x12:
128
44
    SStream_concat0(O, "le_oq");
129
44
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
44
    break;
131
7
  case 0x13:
132
7
    SStream_concat0(O, "unord_s");
133
7
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
7
    break;
135
28
  case 0x14:
136
28
    SStream_concat0(O, "neq_us");
137
28
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
28
    break;
139
206
  case 0x15:
140
206
    SStream_concat0(O, "nlt_uq");
141
206
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
206
    break;
143
11
  case 0x16:
144
11
    SStream_concat0(O, "nle_uq");
145
11
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
11
    break;
147
7
  case 0x17:
148
7
    SStream_concat0(O, "ord_s");
149
7
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
7
    break;
151
18
  case 0x18:
152
18
    SStream_concat0(O, "eq_us");
153
18
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
18
    break;
155
45
  case 0x19:
156
45
    SStream_concat0(O, "nge_uq");
157
45
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
45
    break;
159
97
  case 0x1a:
160
97
    SStream_concat0(O, "ngt_uq");
161
97
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
97
    break;
163
73
  case 0x1b:
164
73
    SStream_concat0(O, "false_os");
165
73
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
73
    break;
167
12
  case 0x1c:
168
12
    SStream_concat0(O, "neq_os");
169
12
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
12
    break;
171
11
  case 0x1d:
172
11
    SStream_concat0(O, "ge_oq");
173
11
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
11
    break;
175
4
  case 0x1e:
176
4
    SStream_concat0(O, "gt_oq");
177
4
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
4
    break;
179
188
  case 0x1f:
180
188
    SStream_concat0(O, "true_us");
181
188
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
188
    break;
183
5.93k
  }
184
185
5.93k
  MI->popcode_adjust = Imm + 1;
186
5.93k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.52k
{
190
1.52k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.52k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
300
  case 0:
195
300
    SStream_concat0(O, "lt");
196
300
    op_addXopCC(MI, X86_XOP_CC_LT);
197
300
    break;
198
59
  case 1:
199
59
    SStream_concat0(O, "le");
200
59
    op_addXopCC(MI, X86_XOP_CC_LE);
201
59
    break;
202
377
  case 2:
203
377
    SStream_concat0(O, "gt");
204
377
    op_addXopCC(MI, X86_XOP_CC_GT);
205
377
    break;
206
196
  case 3:
207
196
    SStream_concat0(O, "ge");
208
196
    op_addXopCC(MI, X86_XOP_CC_GE);
209
196
    break;
210
71
  case 4:
211
71
    SStream_concat0(O, "eq");
212
71
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
71
    break;
214
25
  case 5:
215
25
    SStream_concat0(O, "neq");
216
25
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
25
    break;
218
418
  case 6:
219
418
    SStream_concat0(O, "false");
220
418
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
418
    break;
222
81
  case 7:
223
81
    SStream_concat0(O, "true");
224
81
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
81
    break;
226
1.52k
  }
227
1.52k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.57k
{
231
1.57k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.57k
  switch (Imm) {
233
1.14k
  case 0:
234
1.14k
    SStream_concat0(O, "{rn-sae}");
235
1.14k
    op_addAvxSae(MI);
236
1.14k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.14k
    break;
238
231
  case 1:
239
231
    SStream_concat0(O, "{rd-sae}");
240
231
    op_addAvxSae(MI);
241
231
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
231
    break;
243
50
  case 2:
244
50
    SStream_concat0(O, "{ru-sae}");
245
50
    op_addAvxSae(MI);
246
50
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
50
    break;
248
145
  case 3:
249
145
    SStream_concat0(O, "{rz-sae}");
250
145
    op_addAvxSae(MI);
251
145
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
145
    break;
253
0
  default:
254
0
    break; // never reach
255
1.57k
  }
256
1.57k
}
257
#endif