Coverage Report

Created: 2026-05-30 06:22

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
7
//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
7.60k
{
50
7.60k
  uint8_t Imm =
51
7.60k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
7.60k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.51k
  case 0:
56
2.51k
    SStream_concat0(O, "eq");
57
2.51k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.51k
    break;
59
1.05k
  case 1:
60
1.05k
    SStream_concat0(O, "lt");
61
1.05k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.05k
    break;
63
440
  case 2:
64
440
    SStream_concat0(O, "le");
65
440
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
440
    break;
67
62
  case 3:
68
62
    SStream_concat0(O, "unord");
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62
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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62
    break;
71
89
  case 4:
72
89
    SStream_concat0(O, "neq");
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89
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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89
    break;
75
74
  case 5:
76
74
    SStream_concat0(O, "nlt");
77
74
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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74
    break;
79
92
  case 6:
80
92
    SStream_concat0(O, "nle");
81
92
    op_addAvxCC(MI, X86_AVX_CC_NLE);
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92
    break;
83
57
  case 7:
84
57
    SStream_concat0(O, "ord");
85
57
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
57
    break;
87
236
  case 8:
88
236
    SStream_concat0(O, "eq_uq");
89
236
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
236
    break;
91
281
  case 9:
92
281
    SStream_concat0(O, "nge");
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281
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
281
    break;
95
96
  case 0xa:
96
96
    SStream_concat0(O, "ngt");
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96
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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96
    break;
99
777
  case 0xb:
100
777
    SStream_concat0(O, "false");
101
777
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
777
    break;
103
3
  case 0xc:
104
3
    SStream_concat0(O, "neq_oq");
105
3
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
3
    break;
107
65
  case 0xd:
108
65
    SStream_concat0(O, "ge");
109
65
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
65
    break;
111
8
  case 0xe:
112
8
    SStream_concat0(O, "gt");
113
8
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
8
    break;
115
35
  case 0xf:
116
35
    SStream_concat0(O, "true");
117
35
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
35
    break;
119
126
  case 0x10:
120
126
    SStream_concat0(O, "eq_os");
121
126
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
126
    break;
123
181
  case 0x11:
124
181
    SStream_concat0(O, "lt_oq");
125
181
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
181
    break;
127
67
  case 0x12:
128
67
    SStream_concat0(O, "le_oq");
129
67
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
67
    break;
131
9
  case 0x13:
132
9
    SStream_concat0(O, "unord_s");
133
9
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
9
    break;
135
163
  case 0x14:
136
163
    SStream_concat0(O, "neq_us");
137
163
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
163
    break;
139
591
  case 0x15:
140
591
    SStream_concat0(O, "nlt_uq");
141
591
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
591
    break;
143
37
  case 0x16:
144
37
    SStream_concat0(O, "nle_uq");
145
37
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
37
    break;
147
17
  case 0x17:
148
17
    SStream_concat0(O, "ord_s");
149
17
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
17
    break;
151
24
  case 0x18:
152
24
    SStream_concat0(O, "eq_us");
153
24
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
24
    break;
155
28
  case 0x19:
156
28
    SStream_concat0(O, "nge_uq");
157
28
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
28
    break;
159
114
  case 0x1a:
160
114
    SStream_concat0(O, "ngt_uq");
161
114
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
114
    break;
163
14
  case 0x1b:
164
14
    SStream_concat0(O, "false_os");
165
14
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
14
    break;
167
64
  case 0x1c:
168
64
    SStream_concat0(O, "neq_os");
169
64
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
64
    break;
171
125
  case 0x1d:
172
125
    SStream_concat0(O, "ge_oq");
173
125
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
125
    break;
175
129
  case 0x1e:
176
129
    SStream_concat0(O, "gt_oq");
177
129
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
129
    break;
179
25
  case 0x1f:
180
25
    SStream_concat0(O, "true_us");
181
25
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
25
    break;
183
7.60k
  }
184
185
7.60k
  MI->popcode_adjust = Imm + 1;
186
7.60k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.03k
{
190
2.03k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.03k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
392
  case 0:
195
392
    SStream_concat0(O, "lt");
196
392
    op_addXopCC(MI, X86_XOP_CC_LT);
197
392
    break;
198
312
  case 1:
199
312
    SStream_concat0(O, "le");
200
312
    op_addXopCC(MI, X86_XOP_CC_LE);
201
312
    break;
202
656
  case 2:
203
656
    SStream_concat0(O, "gt");
204
656
    op_addXopCC(MI, X86_XOP_CC_GT);
205
656
    break;
206
245
  case 3:
207
245
    SStream_concat0(O, "ge");
208
245
    op_addXopCC(MI, X86_XOP_CC_GE);
209
245
    break;
210
68
  case 4:
211
68
    SStream_concat0(O, "eq");
212
68
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
68
    break;
214
210
  case 5:
215
210
    SStream_concat0(O, "neq");
216
210
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
210
    break;
218
10
  case 6:
219
10
    SStream_concat0(O, "false");
220
10
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
10
    break;
222
139
  case 7:
223
139
    SStream_concat0(O, "true");
224
139
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
139
    break;
226
2.03k
  }
227
2.03k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.72k
{
231
1.72k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.72k
  switch (Imm) {
233
1.17k
  case 0:
234
1.17k
    SStream_concat0(O, "{rn-sae}");
235
1.17k
    op_addAvxSae(MI);
236
1.17k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.17k
    break;
238
76
  case 1:
239
76
    SStream_concat0(O, "{rd-sae}");
240
76
    op_addAvxSae(MI);
241
76
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
76
    break;
243
160
  case 2:
244
160
    SStream_concat0(O, "{ru-sae}");
245
160
    op_addAvxSae(MI);
246
160
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
160
    break;
248
315
  case 3:
249
315
    SStream_concat0(O, "{rz-sae}");
250
315
    op_addAvxSae(MI);
251
315
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
315
    break;
253
0
  default:
254
0
    break; // never reach
255
1.72k
  }
256
1.72k
}
257
#endif