Coverage Report

Created: 2026-06-15 06:41

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
5.05k
{
50
5.05k
  uint8_t Imm =
51
5.05k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
5.05k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
1.95k
  case 0:
56
1.95k
    SStream_concat0(O, "eq");
57
1.95k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
1.95k
    break;
59
538
  case 1:
60
538
    SStream_concat0(O, "lt");
61
538
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
538
    break;
63
370
  case 2:
64
370
    SStream_concat0(O, "le");
65
370
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
370
    break;
67
48
  case 3:
68
48
    SStream_concat0(O, "unord");
69
48
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
48
    break;
71
62
  case 4:
72
62
    SStream_concat0(O, "neq");
73
62
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
62
    break;
75
65
  case 5:
76
65
    SStream_concat0(O, "nlt");
77
65
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
65
    break;
79
232
  case 6:
80
232
    SStream_concat0(O, "nle");
81
232
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
232
    break;
83
53
  case 7:
84
53
    SStream_concat0(O, "ord");
85
53
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
53
    break;
87
258
  case 8:
88
258
    SStream_concat0(O, "eq_uq");
89
258
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
258
    break;
91
280
  case 9:
92
280
    SStream_concat0(O, "nge");
93
280
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
280
    break;
95
33
  case 0xa:
96
33
    SStream_concat0(O, "ngt");
97
33
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
33
    break;
99
131
  case 0xb:
100
131
    SStream_concat0(O, "false");
101
131
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
131
    break;
103
19
  case 0xc:
104
19
    SStream_concat0(O, "neq_oq");
105
19
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
19
    break;
107
36
  case 0xd:
108
36
    SStream_concat0(O, "ge");
109
36
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
36
    break;
111
1
  case 0xe:
112
1
    SStream_concat0(O, "gt");
113
1
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
1
    break;
115
18
  case 0xf:
116
18
    SStream_concat0(O, "true");
117
18
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
18
    break;
119
36
  case 0x10:
120
36
    SStream_concat0(O, "eq_os");
121
36
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
36
    break;
123
165
  case 0x11:
124
165
    SStream_concat0(O, "lt_oq");
125
165
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
165
    break;
127
70
  case 0x12:
128
70
    SStream_concat0(O, "le_oq");
129
70
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
70
    break;
131
3
  case 0x13:
132
3
    SStream_concat0(O, "unord_s");
133
3
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
3
    break;
135
134
  case 0x14:
136
134
    SStream_concat0(O, "neq_us");
137
134
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
134
    break;
139
154
  case 0x15:
140
154
    SStream_concat0(O, "nlt_uq");
141
154
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
154
    break;
143
28
  case 0x16:
144
28
    SStream_concat0(O, "nle_uq");
145
28
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
28
    break;
147
17
  case 0x17:
148
17
    SStream_concat0(O, "ord_s");
149
17
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
17
    break;
151
11
  case 0x18:
152
11
    SStream_concat0(O, "eq_us");
153
11
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
11
    break;
155
15
  case 0x19:
156
15
    SStream_concat0(O, "nge_uq");
157
15
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
15
    break;
159
117
  case 0x1a:
160
117
    SStream_concat0(O, "ngt_uq");
161
117
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
117
    break;
163
9
  case 0x1b:
164
9
    SStream_concat0(O, "false_os");
165
9
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
9
    break;
167
12
  case 0x1c:
168
12
    SStream_concat0(O, "neq_os");
169
12
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
12
    break;
171
52
  case 0x1d:
172
52
    SStream_concat0(O, "ge_oq");
173
52
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
52
    break;
175
111
  case 0x1e:
176
111
    SStream_concat0(O, "gt_oq");
177
111
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
111
    break;
179
23
  case 0x1f:
180
23
    SStream_concat0(O, "true_us");
181
23
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
23
    break;
183
5.05k
  }
184
185
5.05k
  MI->popcode_adjust = Imm + 1;
186
5.05k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.32k
{
190
1.32k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.32k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
303
  case 0:
195
303
    SStream_concat0(O, "lt");
196
303
    op_addXopCC(MI, X86_XOP_CC_LT);
197
303
    break;
198
195
  case 1:
199
195
    SStream_concat0(O, "le");
200
195
    op_addXopCC(MI, X86_XOP_CC_LE);
201
195
    break;
202
439
  case 2:
203
439
    SStream_concat0(O, "gt");
204
439
    op_addXopCC(MI, X86_XOP_CC_GT);
205
439
    break;
206
154
  case 3:
207
154
    SStream_concat0(O, "ge");
208
154
    op_addXopCC(MI, X86_XOP_CC_GE);
209
154
    break;
210
24
  case 4:
211
24
    SStream_concat0(O, "eq");
212
24
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
24
    break;
214
44
  case 5:
215
44
    SStream_concat0(O, "neq");
216
44
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
44
    break;
218
3
  case 6:
219
3
    SStream_concat0(O, "false");
220
3
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
3
    break;
222
163
  case 7:
223
163
    SStream_concat0(O, "true");
224
163
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
163
    break;
226
1.32k
  }
227
1.32k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.92k
{
231
1.92k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.92k
  switch (Imm) {
233
1.05k
  case 0:
234
1.05k
    SStream_concat0(O, "{rn-sae}");
235
1.05k
    op_addAvxSae(MI);
236
1.05k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.05k
    break;
238
87
  case 1:
239
87
    SStream_concat0(O, "{rd-sae}");
240
87
    op_addAvxSae(MI);
241
87
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
87
    break;
243
65
  case 2:
244
65
    SStream_concat0(O, "{ru-sae}");
245
65
    op_addAvxSae(MI);
246
65
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
65
    break;
248
711
  case 3:
249
711
    SStream_concat0(O, "{rz-sae}");
250
711
    op_addAvxSae(MI);
251
711
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
711
    break;
253
0
  default:
254
0
    break; // never reach
255
1.92k
  }
256
1.92k
}
257
#endif