Coverage Report

Created: 2026-08-14 06:51

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
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40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
7.24k
{
50
7.24k
  uint8_t Imm =
51
7.24k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
7.24k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.81k
  case 0:
56
2.81k
    SStream_concat0(O, "eq");
57
2.81k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.81k
    break;
59
415
  case 1:
60
415
    SStream_concat0(O, "lt");
61
415
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
415
    break;
63
487
  case 2:
64
487
    SStream_concat0(O, "le");
65
487
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
487
    break;
67
123
  case 3:
68
123
    SStream_concat0(O, "unord");
69
123
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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123
    break;
71
13
  case 4:
72
13
    SStream_concat0(O, "neq");
73
13
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
13
    break;
75
5
  case 5:
76
5
    SStream_concat0(O, "nlt");
77
5
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
5
    break;
79
87
  case 6:
80
87
    SStream_concat0(O, "nle");
81
87
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
87
    break;
83
99
  case 7:
84
99
    SStream_concat0(O, "ord");
85
99
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
99
    break;
87
60
  case 8:
88
60
    SStream_concat0(O, "eq_uq");
89
60
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
60
    break;
91
239
  case 9:
92
239
    SStream_concat0(O, "nge");
93
239
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
239
    break;
95
156
  case 0xa:
96
156
    SStream_concat0(O, "ngt");
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156
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
156
    break;
99
470
  case 0xb:
100
470
    SStream_concat0(O, "false");
101
470
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
470
    break;
103
45
  case 0xc:
104
45
    SStream_concat0(O, "neq_oq");
105
45
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
45
    break;
107
35
  case 0xd:
108
35
    SStream_concat0(O, "ge");
109
35
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
35
    break;
111
56
  case 0xe:
112
56
    SStream_concat0(O, "gt");
113
56
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
56
    break;
115
8
  case 0xf:
116
8
    SStream_concat0(O, "true");
117
8
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
8
    break;
119
12
  case 0x10:
120
12
    SStream_concat0(O, "eq_os");
121
12
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
12
    break;
123
157
  case 0x11:
124
157
    SStream_concat0(O, "lt_oq");
125
157
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
157
    break;
127
119
  case 0x12:
128
119
    SStream_concat0(O, "le_oq");
129
119
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
119
    break;
131
241
  case 0x13:
132
241
    SStream_concat0(O, "unord_s");
133
241
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
241
    break;
135
121
  case 0x14:
136
121
    SStream_concat0(O, "neq_us");
137
121
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
121
    break;
139
592
  case 0x15:
140
592
    SStream_concat0(O, "nlt_uq");
141
592
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
592
    break;
143
37
  case 0x16:
144
37
    SStream_concat0(O, "nle_uq");
145
37
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
37
    break;
147
12
  case 0x17:
148
12
    SStream_concat0(O, "ord_s");
149
12
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
12
    break;
151
287
  case 0x18:
152
287
    SStream_concat0(O, "eq_us");
153
287
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
287
    break;
155
27
  case 0x19:
156
27
    SStream_concat0(O, "nge_uq");
157
27
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
27
    break;
159
120
  case 0x1a:
160
120
    SStream_concat0(O, "ngt_uq");
161
120
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
120
    break;
163
99
  case 0x1b:
164
99
    SStream_concat0(O, "false_os");
165
99
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
99
    break;
167
70
  case 0x1c:
168
70
    SStream_concat0(O, "neq_os");
169
70
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
70
    break;
171
124
  case 0x1d:
172
124
    SStream_concat0(O, "ge_oq");
173
124
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
124
    break;
175
10
  case 0x1e:
176
10
    SStream_concat0(O, "gt_oq");
177
10
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
10
    break;
179
104
  case 0x1f:
180
104
    SStream_concat0(O, "true_us");
181
104
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
104
    break;
183
7.24k
  }
184
185
7.24k
  MI->popcode_adjust = Imm + 1;
186
7.24k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.85k
{
190
1.85k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.85k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
336
  case 0:
195
336
    SStream_concat0(O, "lt");
196
336
    op_addXopCC(MI, X86_XOP_CC_LT);
197
336
    break;
198
12
  case 1:
199
12
    SStream_concat0(O, "le");
200
12
    op_addXopCC(MI, X86_XOP_CC_LE);
201
12
    break;
202
354
  case 2:
203
354
    SStream_concat0(O, "gt");
204
354
    op_addXopCC(MI, X86_XOP_CC_GT);
205
354
    break;
206
242
  case 3:
207
242
    SStream_concat0(O, "ge");
208
242
    op_addXopCC(MI, X86_XOP_CC_GE);
209
242
    break;
210
21
  case 4:
211
21
    SStream_concat0(O, "eq");
212
21
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
21
    break;
214
192
  case 5:
215
192
    SStream_concat0(O, "neq");
216
192
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
192
    break;
218
671
  case 6:
219
671
    SStream_concat0(O, "false");
220
671
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
671
    break;
222
22
  case 7:
223
22
    SStream_concat0(O, "true");
224
22
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
22
    break;
226
1.85k
  }
227
1.85k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.03k
{
231
2.03k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.03k
  switch (Imm) {
233
1.75k
  case 0:
234
1.75k
    SStream_concat0(O, "{rn-sae}");
235
1.75k
    op_addAvxSae(MI);
236
1.75k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.75k
    break;
238
28
  case 1:
239
28
    SStream_concat0(O, "{rd-sae}");
240
28
    op_addAvxSae(MI);
241
28
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
28
    break;
243
102
  case 2:
244
102
    SStream_concat0(O, "{ru-sae}");
245
102
    op_addAvxSae(MI);
246
102
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
102
    break;
248
148
  case 3:
249
148
    SStream_concat0(O, "{rz-sae}");
250
148
    op_addAvxSae(MI);
251
148
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
148
    break;
253
0
  default:
254
0
    break; // never reach
255
2.03k
  }
256
2.03k
}
257
#endif