Coverage Report

Created: 2026-08-31 06:58

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
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#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.3k
{
50
10.3k
  uint8_t Imm =
51
10.3k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.3k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
3.71k
  case 0:
56
3.71k
    SStream_concat0(O, "eq");
57
3.71k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
3.71k
    break;
59
531
  case 1:
60
531
    SStream_concat0(O, "lt");
61
531
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
531
    break;
63
789
  case 2:
64
789
    SStream_concat0(O, "le");
65
789
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
789
    break;
67
135
  case 3:
68
135
    SStream_concat0(O, "unord");
69
135
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
135
    break;
71
251
  case 4:
72
251
    SStream_concat0(O, "neq");
73
251
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
251
    break;
75
17
  case 5:
76
17
    SStream_concat0(O, "nlt");
77
17
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
17
    break;
79
97
  case 6:
80
97
    SStream_concat0(O, "nle");
81
97
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
97
    break;
83
161
  case 7:
84
161
    SStream_concat0(O, "ord");
85
161
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
161
    break;
87
115
  case 8:
88
115
    SStream_concat0(O, "eq_uq");
89
115
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
115
    break;
91
136
  case 9:
92
136
    SStream_concat0(O, "nge");
93
136
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
136
    break;
95
162
  case 0xa:
96
162
    SStream_concat0(O, "ngt");
97
162
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
162
    break;
99
1.17k
  case 0xb:
100
1.17k
    SStream_concat0(O, "false");
101
1.17k
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
1.17k
    break;
103
37
  case 0xc:
104
37
    SStream_concat0(O, "neq_oq");
105
37
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
37
    break;
107
69
  case 0xd:
108
69
    SStream_concat0(O, "ge");
109
69
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
69
    break;
111
29
  case 0xe:
112
29
    SStream_concat0(O, "gt");
113
29
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
29
    break;
115
85
  case 0xf:
116
85
    SStream_concat0(O, "true");
117
85
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
85
    break;
119
34
  case 0x10:
120
34
    SStream_concat0(O, "eq_os");
121
34
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
34
    break;
123
330
  case 0x11:
124
330
    SStream_concat0(O, "lt_oq");
125
330
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
330
    break;
127
237
  case 0x12:
128
237
    SStream_concat0(O, "le_oq");
129
237
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
237
    break;
131
175
  case 0x13:
132
175
    SStream_concat0(O, "unord_s");
133
175
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
175
    break;
135
63
  case 0x14:
136
63
    SStream_concat0(O, "neq_us");
137
63
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
63
    break;
139
617
  case 0x15:
140
617
    SStream_concat0(O, "nlt_uq");
141
617
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
617
    break;
143
79
  case 0x16:
144
79
    SStream_concat0(O, "nle_uq");
145
79
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
79
    break;
147
18
  case 0x17:
148
18
    SStream_concat0(O, "ord_s");
149
18
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
18
    break;
151
500
  case 0x18:
152
500
    SStream_concat0(O, "eq_us");
153
500
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
500
    break;
155
49
  case 0x19:
156
49
    SStream_concat0(O, "nge_uq");
157
49
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
49
    break;
159
75
  case 0x1a:
160
75
    SStream_concat0(O, "ngt_uq");
161
75
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
75
    break;
163
112
  case 0x1b:
164
112
    SStream_concat0(O, "false_os");
165
112
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
112
    break;
167
72
  case 0x1c:
168
72
    SStream_concat0(O, "neq_os");
169
72
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
72
    break;
171
213
  case 0x1d:
172
213
    SStream_concat0(O, "ge_oq");
173
213
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
213
    break;
175
34
  case 0x1e:
176
34
    SStream_concat0(O, "gt_oq");
177
34
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
34
    break;
179
226
  case 0x1f:
180
226
    SStream_concat0(O, "true_us");
181
226
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
226
    break;
183
10.3k
  }
184
185
10.3k
  MI->popcode_adjust = Imm + 1;
186
10.3k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.52k
{
190
2.52k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.52k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
376
  case 0:
195
376
    SStream_concat0(O, "lt");
196
376
    op_addXopCC(MI, X86_XOP_CC_LT);
197
376
    break;
198
44
  case 1:
199
44
    SStream_concat0(O, "le");
200
44
    op_addXopCC(MI, X86_XOP_CC_LE);
201
44
    break;
202
572
  case 2:
203
572
    SStream_concat0(O, "gt");
204
572
    op_addXopCC(MI, X86_XOP_CC_GT);
205
572
    break;
206
191
  case 3:
207
191
    SStream_concat0(O, "ge");
208
191
    op_addXopCC(MI, X86_XOP_CC_GE);
209
191
    break;
210
49
  case 4:
211
49
    SStream_concat0(O, "eq");
212
49
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
49
    break;
214
262
  case 5:
215
262
    SStream_concat0(O, "neq");
216
262
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
262
    break;
218
980
  case 6:
219
980
    SStream_concat0(O, "false");
220
980
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
980
    break;
222
48
  case 7:
223
48
    SStream_concat0(O, "true");
224
48
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
48
    break;
226
2.52k
  }
227
2.52k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
3.08k
{
231
3.08k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
3.08k
  switch (Imm) {
233
2.67k
  case 0:
234
2.67k
    SStream_concat0(O, "{rn-sae}");
235
2.67k
    op_addAvxSae(MI);
236
2.67k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.67k
    break;
238
31
  case 1:
239
31
    SStream_concat0(O, "{rd-sae}");
240
31
    op_addAvxSae(MI);
241
31
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
31
    break;
243
206
  case 2:
244
206
    SStream_concat0(O, "{ru-sae}");
245
206
    op_addAvxSae(MI);
246
206
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
206
    break;
248
181
  case 3:
249
181
    SStream_concat0(O, "{rz-sae}");
250
181
    op_addAvxSae(MI);
251
181
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
181
    break;
253
0
  default:
254
0
    break; // never reach
255
3.08k
  }
256
3.08k
}
257
#endif