Coverage Report

Created: 2026-09-03 07:09

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
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40
#include "../../utils.h"
41
#include "../../MCInst.h"
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#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.2k
{
50
10.2k
  uint8_t Imm =
51
10.2k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.2k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
3.74k
  case 0:
56
3.74k
    SStream_concat0(O, "eq");
57
3.74k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
3.74k
    break;
59
376
  case 1:
60
376
    SStream_concat0(O, "lt");
61
376
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
376
    break;
63
647
  case 2:
64
647
    SStream_concat0(O, "le");
65
647
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
647
    break;
67
116
  case 3:
68
116
    SStream_concat0(O, "unord");
69
116
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
116
    break;
71
299
  case 4:
72
299
    SStream_concat0(O, "neq");
73
299
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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299
    break;
75
27
  case 5:
76
27
    SStream_concat0(O, "nlt");
77
27
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
27
    break;
79
189
  case 6:
80
189
    SStream_concat0(O, "nle");
81
189
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
189
    break;
83
86
  case 7:
84
86
    SStream_concat0(O, "ord");
85
86
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
86
    break;
87
121
  case 8:
88
121
    SStream_concat0(O, "eq_uq");
89
121
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
121
    break;
91
265
  case 9:
92
265
    SStream_concat0(O, "nge");
93
265
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
265
    break;
95
235
  case 0xa:
96
235
    SStream_concat0(O, "ngt");
97
235
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
235
    break;
99
936
  case 0xb:
100
936
    SStream_concat0(O, "false");
101
936
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
936
    break;
103
10
  case 0xc:
104
10
    SStream_concat0(O, "neq_oq");
105
10
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
10
    break;
107
50
  case 0xd:
108
50
    SStream_concat0(O, "ge");
109
50
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
50
    break;
111
21
  case 0xe:
112
21
    SStream_concat0(O, "gt");
113
21
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
21
    break;
115
116
  case 0xf:
116
116
    SStream_concat0(O, "true");
117
116
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
116
    break;
119
65
  case 0x10:
120
65
    SStream_concat0(O, "eq_os");
121
65
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
65
    break;
123
212
  case 0x11:
124
212
    SStream_concat0(O, "lt_oq");
125
212
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
212
    break;
127
199
  case 0x12:
128
199
    SStream_concat0(O, "le_oq");
129
199
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
199
    break;
131
161
  case 0x13:
132
161
    SStream_concat0(O, "unord_s");
133
161
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
161
    break;
135
155
  case 0x14:
136
155
    SStream_concat0(O, "neq_us");
137
155
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
155
    break;
139
823
  case 0x15:
140
823
    SStream_concat0(O, "nlt_uq");
141
823
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
823
    break;
143
100
  case 0x16:
144
100
    SStream_concat0(O, "nle_uq");
145
100
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
100
    break;
147
27
  case 0x17:
148
27
    SStream_concat0(O, "ord_s");
149
27
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
27
    break;
151
518
  case 0x18:
152
518
    SStream_concat0(O, "eq_us");
153
518
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
518
    break;
155
9
  case 0x19:
156
9
    SStream_concat0(O, "nge_uq");
157
9
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
9
    break;
159
188
  case 0x1a:
160
188
    SStream_concat0(O, "ngt_uq");
161
188
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
188
    break;
163
70
  case 0x1b:
164
70
    SStream_concat0(O, "false_os");
165
70
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
70
    break;
167
120
  case 0x1c:
168
120
    SStream_concat0(O, "neq_os");
169
120
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
120
    break;
171
208
  case 0x1d:
172
208
    SStream_concat0(O, "ge_oq");
173
208
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
208
    break;
175
35
  case 0x1e:
176
35
    SStream_concat0(O, "gt_oq");
177
35
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
35
    break;
179
144
  case 0x1f:
180
144
    SStream_concat0(O, "true_us");
181
144
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
144
    break;
183
10.2k
  }
184
185
10.2k
  MI->popcode_adjust = Imm + 1;
186
10.2k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.40k
{
190
2.40k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.40k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
302
  case 0:
195
302
    SStream_concat0(O, "lt");
196
302
    op_addXopCC(MI, X86_XOP_CC_LT);
197
302
    break;
198
61
  case 1:
199
61
    SStream_concat0(O, "le");
200
61
    op_addXopCC(MI, X86_XOP_CC_LE);
201
61
    break;
202
636
  case 2:
203
636
    SStream_concat0(O, "gt");
204
636
    op_addXopCC(MI, X86_XOP_CC_GT);
205
636
    break;
206
280
  case 3:
207
280
    SStream_concat0(O, "ge");
208
280
    op_addXopCC(MI, X86_XOP_CC_GE);
209
280
    break;
210
28
  case 4:
211
28
    SStream_concat0(O, "eq");
212
28
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
28
    break;
214
154
  case 5:
215
154
    SStream_concat0(O, "neq");
216
154
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
154
    break;
218
879
  case 6:
219
879
    SStream_concat0(O, "false");
220
879
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
879
    break;
222
65
  case 7:
223
65
    SStream_concat0(O, "true");
224
65
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
65
    break;
226
2.40k
  }
227
2.40k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.74k
{
231
2.74k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.74k
  switch (Imm) {
233
2.44k
  case 0:
234
2.44k
    SStream_concat0(O, "{rn-sae}");
235
2.44k
    op_addAvxSae(MI);
236
2.44k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.44k
    break;
238
35
  case 1:
239
35
    SStream_concat0(O, "{rd-sae}");
240
35
    op_addAvxSae(MI);
241
35
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
35
    break;
243
208
  case 2:
244
208
    SStream_concat0(O, "{ru-sae}");
245
208
    op_addAvxSae(MI);
246
208
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
208
    break;
248
54
  case 3:
249
54
    SStream_concat0(O, "{rz-sae}");
250
54
    op_addAvxSae(MI);
251
54
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
54
    break;
253
0
  default:
254
0
    break; // never reach
255
2.74k
  }
256
2.74k
}
257
#endif