Coverage Report

Created: 2026-09-28 06:34

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
6.34k
{
50
6.34k
  uint8_t Imm =
51
6.34k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
6.34k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.98k
  case 0:
56
2.98k
    SStream_concat0(O, "eq");
57
2.98k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.98k
    break;
59
421
  case 1:
60
421
    SStream_concat0(O, "lt");
61
421
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
421
    break;
63
299
  case 2:
64
299
    SStream_concat0(O, "le");
65
299
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
299
    break;
67
34
  case 3:
68
34
    SStream_concat0(O, "unord");
69
34
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
34
    break;
71
140
  case 4:
72
140
    SStream_concat0(O, "neq");
73
140
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
140
    break;
75
52
  case 5:
76
52
    SStream_concat0(O, "nlt");
77
52
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
52
    break;
79
56
  case 6:
80
56
    SStream_concat0(O, "nle");
81
56
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
56
    break;
83
8
  case 7:
84
8
    SStream_concat0(O, "ord");
85
8
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
8
    break;
87
63
  case 8:
88
63
    SStream_concat0(O, "eq_uq");
89
63
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
63
    break;
91
20
  case 9:
92
20
    SStream_concat0(O, "nge");
93
20
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
20
    break;
95
126
  case 0xa:
96
126
    SStream_concat0(O, "ngt");
97
126
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
126
    break;
99
890
  case 0xb:
100
890
    SStream_concat0(O, "false");
101
890
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
890
    break;
103
10
  case 0xc:
104
10
    SStream_concat0(O, "neq_oq");
105
10
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
10
    break;
107
9
  case 0xd:
108
9
    SStream_concat0(O, "ge");
109
9
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
9
    break;
111
5
  case 0xe:
112
5
    SStream_concat0(O, "gt");
113
5
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
5
    break;
115
73
  case 0xf:
116
73
    SStream_concat0(O, "true");
117
73
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
73
    break;
119
89
  case 0x10:
120
89
    SStream_concat0(O, "eq_os");
121
89
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
89
    break;
123
103
  case 0x11:
124
103
    SStream_concat0(O, "lt_oq");
125
103
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
103
    break;
127
30
  case 0x12:
128
30
    SStream_concat0(O, "le_oq");
129
30
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
30
    break;
131
12
  case 0x13:
132
12
    SStream_concat0(O, "unord_s");
133
12
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
12
    break;
135
10
  case 0x14:
136
10
    SStream_concat0(O, "neq_us");
137
10
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
10
    break;
139
401
  case 0x15:
140
401
    SStream_concat0(O, "nlt_uq");
141
401
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
401
    break;
143
16
  case 0x16:
144
16
    SStream_concat0(O, "nle_uq");
145
16
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
16
    break;
147
10
  case 0x17:
148
10
    SStream_concat0(O, "ord_s");
149
10
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
10
    break;
151
271
  case 0x18:
152
271
    SStream_concat0(O, "eq_us");
153
271
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
271
    break;
155
4
  case 0x19:
156
4
    SStream_concat0(O, "nge_uq");
157
4
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
4
    break;
159
19
  case 0x1a:
160
19
    SStream_concat0(O, "ngt_uq");
161
19
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
19
    break;
163
61
  case 0x1b:
164
61
    SStream_concat0(O, "false_os");
165
61
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
61
    break;
167
21
  case 0x1c:
168
21
    SStream_concat0(O, "neq_os");
169
21
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
21
    break;
171
61
  case 0x1d:
172
61
    SStream_concat0(O, "ge_oq");
173
61
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
61
    break;
175
0
  case 0x1e:
176
0
    SStream_concat0(O, "gt_oq");
177
0
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
0
    break;
179
48
  case 0x1f:
180
48
    SStream_concat0(O, "true_us");
181
48
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
48
    break;
183
6.34k
  }
184
185
6.34k
  MI->popcode_adjust = Imm + 1;
186
6.34k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.91k
{
190
1.91k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.91k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
245
  case 0:
195
245
    SStream_concat0(O, "lt");
196
245
    op_addXopCC(MI, X86_XOP_CC_LT);
197
245
    break;
198
30
  case 1:
199
30
    SStream_concat0(O, "le");
200
30
    op_addXopCC(MI, X86_XOP_CC_LE);
201
30
    break;
202
824
  case 2:
203
824
    SStream_concat0(O, "gt");
204
824
    op_addXopCC(MI, X86_XOP_CC_GT);
205
824
    break;
206
20
  case 3:
207
20
    SStream_concat0(O, "ge");
208
20
    op_addXopCC(MI, X86_XOP_CC_GE);
209
20
    break;
210
20
  case 4:
211
20
    SStream_concat0(O, "eq");
212
20
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
20
    break;
214
107
  case 5:
215
107
    SStream_concat0(O, "neq");
216
107
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
107
    break;
218
645
  case 6:
219
645
    SStream_concat0(O, "false");
220
645
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
645
    break;
222
19
  case 7:
223
19
    SStream_concat0(O, "true");
224
19
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
19
    break;
226
1.91k
  }
227
1.91k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.70k
{
231
1.70k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.70k
  switch (Imm) {
233
1.47k
  case 0:
234
1.47k
    SStream_concat0(O, "{rn-sae}");
235
1.47k
    op_addAvxSae(MI);
236
1.47k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.47k
    break;
238
120
  case 1:
239
120
    SStream_concat0(O, "{rd-sae}");
240
120
    op_addAvxSae(MI);
241
120
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
120
    break;
243
94
  case 2:
244
94
    SStream_concat0(O, "{ru-sae}");
245
94
    op_addAvxSae(MI);
246
94
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
94
    break;
248
12
  case 3:
249
12
    SStream_concat0(O, "{rz-sae}");
250
12
    op_addAvxSae(MI);
251
12
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
12
    break;
253
0
  default:
254
0
    break; // never reach
255
1.70k
  }
256
1.70k
}
257
#endif