Coverage Report

Created: 2026-10-17 07:17

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.5k
{
50
10.5k
  uint8_t Imm =
51
10.5k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.5k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
4.98k
  case 0:
56
4.98k
    SStream_concat0(O, "eq");
57
4.98k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
4.98k
    break;
59
776
  case 1:
60
776
    SStream_concat0(O, "lt");
61
776
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
776
    break;
63
669
  case 2:
64
669
    SStream_concat0(O, "le");
65
669
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
669
    break;
67
213
  case 3:
68
213
    SStream_concat0(O, "unord");
69
213
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
213
    break;
71
63
  case 4:
72
63
    SStream_concat0(O, "neq");
73
63
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
63
    break;
75
190
  case 5:
76
190
    SStream_concat0(O, "nlt");
77
190
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
190
    break;
79
222
  case 6:
80
222
    SStream_concat0(O, "nle");
81
222
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
222
    break;
83
28
  case 7:
84
28
    SStream_concat0(O, "ord");
85
28
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
28
    break;
87
118
  case 8:
88
118
    SStream_concat0(O, "eq_uq");
89
118
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
118
    break;
91
84
  case 9:
92
84
    SStream_concat0(O, "nge");
93
84
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
84
    break;
95
74
  case 0xa:
96
74
    SStream_concat0(O, "ngt");
97
74
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
74
    break;
99
800
  case 0xb:
100
800
    SStream_concat0(O, "false");
101
800
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
800
    break;
103
107
  case 0xc:
104
107
    SStream_concat0(O, "neq_oq");
105
107
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
107
    break;
107
76
  case 0xd:
108
76
    SStream_concat0(O, "ge");
109
76
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
76
    break;
111
31
  case 0xe:
112
31
    SStream_concat0(O, "gt");
113
31
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
31
    break;
115
330
  case 0xf:
116
330
    SStream_concat0(O, "true");
117
330
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
330
    break;
119
219
  case 0x10:
120
219
    SStream_concat0(O, "eq_os");
121
219
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
219
    break;
123
504
  case 0x11:
124
504
    SStream_concat0(O, "lt_oq");
125
504
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
504
    break;
127
94
  case 0x12:
128
94
    SStream_concat0(O, "le_oq");
129
94
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
94
    break;
131
211
  case 0x13:
132
211
    SStream_concat0(O, "unord_s");
133
211
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
211
    break;
135
25
  case 0x14:
136
25
    SStream_concat0(O, "neq_us");
137
25
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
25
    break;
139
300
  case 0x15:
140
300
    SStream_concat0(O, "nlt_uq");
141
300
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
300
    break;
143
31
  case 0x16:
144
31
    SStream_concat0(O, "nle_uq");
145
31
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
31
    break;
147
52
  case 0x17:
148
52
    SStream_concat0(O, "ord_s");
149
52
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
52
    break;
151
46
  case 0x18:
152
46
    SStream_concat0(O, "eq_us");
153
46
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
46
    break;
155
2
  case 0x19:
156
2
    SStream_concat0(O, "nge_uq");
157
2
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
2
    break;
159
34
  case 0x1a:
160
34
    SStream_concat0(O, "ngt_uq");
161
34
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
34
    break;
163
51
  case 0x1b:
164
51
    SStream_concat0(O, "false_os");
165
51
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
51
    break;
167
2
  case 0x1c:
168
2
    SStream_concat0(O, "neq_os");
169
2
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
2
    break;
171
97
  case 0x1d:
172
97
    SStream_concat0(O, "ge_oq");
173
97
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
97
    break;
175
12
  case 0x1e:
176
12
    SStream_concat0(O, "gt_oq");
177
12
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
12
    break;
179
118
  case 0x1f:
180
118
    SStream_concat0(O, "true_us");
181
118
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
118
    break;
183
10.5k
  }
184
185
10.5k
  MI->popcode_adjust = Imm + 1;
186
10.5k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
2.34k
{
190
2.34k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
2.34k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
539
  case 0:
195
539
    SStream_concat0(O, "lt");
196
539
    op_addXopCC(MI, X86_XOP_CC_LT);
197
539
    break;
198
78
  case 1:
199
78
    SStream_concat0(O, "le");
200
78
    op_addXopCC(MI, X86_XOP_CC_LE);
201
78
    break;
202
466
  case 2:
203
466
    SStream_concat0(O, "gt");
204
466
    op_addXopCC(MI, X86_XOP_CC_GT);
205
466
    break;
206
26
  case 3:
207
26
    SStream_concat0(O, "ge");
208
26
    op_addXopCC(MI, X86_XOP_CC_GE);
209
26
    break;
210
9
  case 4:
211
9
    SStream_concat0(O, "eq");
212
9
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
9
    break;
214
80
  case 5:
215
80
    SStream_concat0(O, "neq");
216
80
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
80
    break;
218
66
  case 6:
219
66
    SStream_concat0(O, "false");
220
66
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
66
    break;
222
1.07k
  case 7:
223
1.07k
    SStream_concat0(O, "true");
224
1.07k
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
1.07k
    break;
226
2.34k
  }
227
2.34k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
3.92k
{
231
3.92k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
3.92k
  switch (Imm) {
233
2.19k
  case 0:
234
2.19k
    SStream_concat0(O, "{rn-sae}");
235
2.19k
    op_addAvxSae(MI);
236
2.19k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.19k
    break;
238
1.45k
  case 1:
239
1.45k
    SStream_concat0(O, "{rd-sae}");
240
1.45k
    op_addAvxSae(MI);
241
1.45k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
1.45k
    break;
243
270
  case 2:
244
270
    SStream_concat0(O, "{ru-sae}");
245
270
    op_addAvxSae(MI);
246
270
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
270
    break;
248
12
  case 3:
249
12
    SStream_concat0(O, "{rz-sae}");
250
12
    op_addAvxSae(MI);
251
12
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
12
    break;
253
0
  default:
254
0
    break; // never reach
255
3.92k
  }
256
3.92k
}
257
#endif