Coverage Report

Created: 2023-09-25 06:24

/src/capstonenext/arch/M68K/M68KDisassembler.c
Line
Count
Source (jump to first uncovered line)
1
/* ======================================================================== */
2
/* ========================= LICENSING & COPYRIGHT ======================== */
3
/* ======================================================================== */
4
/*
5
 *                                  MUSASHI
6
 *                                Version 3.4
7
 *
8
 * A portable Motorola M680x0 processor emulation engine.
9
 * Copyright 1998-2001 Karl Stenerud.  All rights reserved.
10
 *
11
 * Permission is hereby granted, free of charge, to any person obtaining a copy
12
 * of this software and associated documentation files (the "Software"), to deal
13
 * in the Software without restriction, including without limitation the rights
14
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
15
 * copies of the Software, and to permit persons to whom the Software is
16
 * furnished to do so, subject to the following conditions:
17
 *
18
 * The above copyright notice and this permission notice shall be included in
19
 * all copies or substantial portions of the Software.
20
21
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27
 * THE SOFTWARE.
28
 */
29
30
/* The code below is based on MUSASHI but has been heavily modified for Capstone by
31
 * Daniel Collin <daniel@collin.com> 2015-2019 */
32
33
/* ======================================================================== */
34
/* ================================ INCLUDES ============================== */
35
/* ======================================================================== */
36
37
#include <stdlib.h>
38
#include <stdio.h>
39
#include <string.h>
40
41
#include "../../cs_priv.h"
42
#include "../../utils.h"
43
44
#include "../../MCInst.h"
45
#include "../../MCInstrDesc.h"
46
#include "../../MCRegisterInfo.h"
47
#include "M68KInstPrinter.h"
48
#include "M68KDisassembler.h"
49
50
/* ======================================================================== */
51
/* ============================ GENERAL DEFINES =========================== */
52
/* ======================================================================== */
53
54
/* Bit Isolation Functions */
55
7.38k
#define BIT_0(A)  ((A) & 0x00000001)
56
#define BIT_1(A)  ((A) & 0x00000002)
57
#define BIT_2(A)  ((A) & 0x00000004)
58
0
#define BIT_3(A)  ((A) & 0x00000008)
59
#define BIT_4(A)  ((A) & 0x00000010)
60
1.90k
#define BIT_5(A)  ((A) & 0x00000020)
61
9.97k
#define BIT_6(A)  ((A) & 0x00000040)
62
9.97k
#define BIT_7(A)  ((A) & 0x00000080)
63
23.9k
#define BIT_8(A)  ((A) & 0x00000100)
64
#define BIT_9(A)  ((A) & 0x00000200)
65
1.01k
#define BIT_A(A)  ((A) & 0x00000400)
66
24.4k
#define BIT_B(A)  ((A) & 0x00000800)
67
#define BIT_C(A)  ((A) & 0x00001000)
68
#define BIT_D(A)  ((A) & 0x00002000)
69
#define BIT_E(A)  ((A) & 0x00004000)
70
30.3k
#define BIT_F(A)  ((A) & 0x00008000)
71
#define BIT_10(A) ((A) & 0x00010000)
72
#define BIT_11(A) ((A) & 0x00020000)
73
#define BIT_12(A) ((A) & 0x00040000)
74
#define BIT_13(A) ((A) & 0x00080000)
75
#define BIT_14(A) ((A) & 0x00100000)
76
#define BIT_15(A) ((A) & 0x00200000)
77
#define BIT_16(A) ((A) & 0x00400000)
78
#define BIT_17(A) ((A) & 0x00800000)
79
#define BIT_18(A) ((A) & 0x01000000)
80
#define BIT_19(A) ((A) & 0x02000000)
81
#define BIT_1A(A) ((A) & 0x04000000)
82
#define BIT_1B(A) ((A) & 0x08000000)
83
#define BIT_1C(A) ((A) & 0x10000000)
84
#define BIT_1D(A) ((A) & 0x20000000)
85
#define BIT_1E(A) ((A) & 0x40000000)
86
1.62k
#define BIT_1F(A) ((A) & 0x80000000)
87
88
/* These are the CPU types understood by this disassembler */
89
130k
#define TYPE_68000 1
90
0
#define TYPE_68010 2
91
0
#define TYPE_68020 4
92
0
#define TYPE_68030 8
93
234k
#define TYPE_68040 16
94
95
#define M68000_ONLY   TYPE_68000
96
97
#define M68010_ONLY   TYPE_68010
98
#define M68010_LESS   (TYPE_68000 | TYPE_68010)
99
#define M68010_PLUS   (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
100
101
#define M68020_ONLY   TYPE_68020
102
#define M68020_LESS   (TYPE_68010 | TYPE_68020)
103
#define M68020_PLUS   (TYPE_68020 | TYPE_68030 | TYPE_68040)
104
105
#define M68030_ONLY   TYPE_68030
106
#define M68030_LESS   (TYPE_68010 | TYPE_68020 | TYPE_68030)
107
#define M68030_PLUS   (TYPE_68030 | TYPE_68040)
108
109
#define M68040_PLUS   TYPE_68040
110
111
enum {
112
  M68K_CPU_TYPE_INVALID,
113
  M68K_CPU_TYPE_68000,
114
  M68K_CPU_TYPE_68010,
115
  M68K_CPU_TYPE_68EC020,
116
  M68K_CPU_TYPE_68020,
117
  M68K_CPU_TYPE_68030,  /* Supported by disassembler ONLY */
118
  M68K_CPU_TYPE_68040   /* Supported by disassembler ONLY */
119
};
120
121
/* Extension word formats */
122
13.9k
#define EXT_8BIT_DISPLACEMENT(A)          ((A)&0xff)
123
23.9k
#define EXT_FULL(A)                       BIT_8(A)
124
#define EXT_EFFECTIVE_ZERO(A)             (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
125
9.97k
#define EXT_BASE_REGISTER_PRESENT(A)      (!BIT_7(A))
126
9.97k
#define EXT_INDEX_REGISTER_PRESENT(A)     (!BIT_6(A))
127
20.0k
#define EXT_INDEX_REGISTER(A)             (((A)>>12)&7)
128
#define EXT_INDEX_PRE_POST(A)             (EXT_INDEX_PRESENT(A) && (A)&3)
129
#define EXT_INDEX_PRE(A)                  (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
130
#define EXT_INDEX_POST(A)                 (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
131
33.2k
#define EXT_INDEX_SCALE(A)                (((A)>>9)&3)
132
20.0k
#define EXT_INDEX_LONG(A)                 BIT_B(A)
133
20.0k
#define EXT_INDEX_AR(A)                   BIT_F(A)
134
9.97k
#define EXT_BASE_DISPLACEMENT_PRESENT(A)  (((A)&0x30) > 0x10)
135
#define EXT_BASE_DISPLACEMENT_WORD(A)     (((A)&0x30) == 0x20)
136
4.46k
#define EXT_BASE_DISPLACEMENT_LONG(A)     (((A)&0x30) == 0x30)
137
9.97k
#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
138
#define EXT_OUTER_DISPLACEMENT_WORD(A)    (((A)&3) == 2 && ((A)&0x47) < 0x44)
139
3.00k
#define EXT_OUTER_DISPLACEMENT_LONG(A)    (((A)&3) == 3 && ((A)&0x47) < 0x44)
140
141
#define IS_BITSET(val,b) ((val) & (1 << (b)))
142
26.3k
#define BITFIELD_MASK(sb,eb)  (((1 << ((sb) + 1))-1) & (~((1 << (eb))-1)))
143
26.3k
#define BITFIELD(val,sb,eb) ((BITFIELD_MASK(sb,eb) & (val)) >> (eb))
144
145
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
146
147
static unsigned int m68k_read_disassembler_16(const m68k_info *info, const uint64_t addr)
148
870k
{
149
870k
  const uint16_t v0 = info->code[addr + 0];
150
870k
  const uint16_t v1 = info->code[addr + 1];
151
870k
  return (v0 << 8) | v1;
152
870k
}
153
154
static unsigned int m68k_read_disassembler_32(const m68k_info *info, const uint64_t addr)
155
383k
{
156
383k
  const uint32_t v0 = info->code[addr + 0];
157
383k
  const uint32_t v1 = info->code[addr + 1];
158
383k
  const uint32_t v2 = info->code[addr + 2];
159
383k
  const uint32_t v3 = info->code[addr + 3];
160
383k
  return (v0 << 24) | (v1 << 16) | (v2 << 8) | v3;
161
383k
}
162
163
static uint64_t m68k_read_disassembler_64(const m68k_info *info, const uint64_t addr)
164
225
{
165
225
  const uint64_t v0 = info->code[addr + 0];
166
225
  const uint64_t v1 = info->code[addr + 1];
167
225
  const uint64_t v2 = info->code[addr + 2];
168
225
  const uint64_t v3 = info->code[addr + 3];
169
225
  const uint64_t v4 = info->code[addr + 4];
170
225
  const uint64_t v5 = info->code[addr + 5];
171
225
  const uint64_t v6 = info->code[addr + 6];
172
225
  const uint64_t v7 = info->code[addr + 7];
173
225
  return (v0 << 56) | (v1 << 48) | (v2 << 40) | (v3 << 32) | (v4 << 24) | (v5 << 16) | (v6 << 8) | v7;
174
225
}
175
176
static unsigned int m68k_read_safe_16(const m68k_info *info, const uint64_t address)
177
872k
{
178
872k
  const uint64_t addr = (address - info->baseAddress) & info->address_mask;
179
872k
  if (info->code_len < addr + 2) {
180
1.45k
    return 0xaaaa;
181
1.45k
  }
182
870k
  return m68k_read_disassembler_16(info, addr);
183
872k
}
184
185
static unsigned int m68k_read_safe_32(const m68k_info *info, const uint64_t address)
186
387k
{
187
387k
  const uint64_t addr = (address - info->baseAddress) & info->address_mask;
188
387k
  if (info->code_len < addr + 4) {
189
4.04k
    return 0xaaaaaaaa;
190
4.04k
  }
191
383k
  return m68k_read_disassembler_32(info, addr);
192
387k
}
193
194
static uint64_t m68k_read_safe_64(const m68k_info *info, const uint64_t address)
195
231
{
196
231
  const uint64_t addr = (address - info->baseAddress) & info->address_mask;
197
231
  if (info->code_len < addr + 8) {
198
6
    return 0xaaaaaaaaaaaaaaaaLL;
199
6
  }
200
225
  return m68k_read_disassembler_64(info, addr);
201
231
}
202
203
/* ======================================================================== */
204
/* =============================== PROTOTYPES ============================= */
205
/* ======================================================================== */
206
207
/* make signed integers 100% portably */
208
static int make_int_8(int value);
209
static int make_int_16(int value);
210
211
/* Stuff to build the opcode handler jump table */
212
static void d68000_invalid(m68k_info *info);
213
static int instruction_is_valid(m68k_info *info, const unsigned int word_check);
214
215
typedef struct {
216
  void (*instruction)(m68k_info *info);   /* handler function */
217
  uint16_t word2_mask;                  /* mask the 2nd word */
218
  uint16_t word2_match;                 /* what to match after masking */
219
} instruction_struct;
220
221
/* ======================================================================== */
222
/* ================================= DATA ================================= */
223
/* ======================================================================== */
224
225
static const instruction_struct g_instruction_table[0x10000];
226
227
/* used by ops like asr, ror, addq, etc */
228
static const uint32_t g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
229
230
static const uint32_t g_5bit_data_table[32] = {
231
  32,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
232
  16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
233
};
234
235
static const m68k_insn s_branch_lut[] = {
236
  M68K_INS_INVALID, M68K_INS_INVALID, M68K_INS_BHI, M68K_INS_BLS,
237
  M68K_INS_BCC, M68K_INS_BCS, M68K_INS_BNE, M68K_INS_BEQ,
238
  M68K_INS_BVC, M68K_INS_BVS, M68K_INS_BPL, M68K_INS_BMI,
239
  M68K_INS_BGE, M68K_INS_BLT, M68K_INS_BGT, M68K_INS_BLE,
240
};
241
242
static const m68k_insn s_dbcc_lut[] = {
243
  M68K_INS_DBT, M68K_INS_DBF, M68K_INS_DBHI, M68K_INS_DBLS,
244
  M68K_INS_DBCC, M68K_INS_DBCS, M68K_INS_DBNE, M68K_INS_DBEQ,
245
  M68K_INS_DBVC, M68K_INS_DBVS, M68K_INS_DBPL, M68K_INS_DBMI,
246
  M68K_INS_DBGE, M68K_INS_DBLT, M68K_INS_DBGT, M68K_INS_DBLE,
247
};
248
249
static const m68k_insn s_scc_lut[] = {
250
  M68K_INS_ST, M68K_INS_SF, M68K_INS_SHI, M68K_INS_SLS,
251
  M68K_INS_SCC, M68K_INS_SCS, M68K_INS_SNE, M68K_INS_SEQ,
252
  M68K_INS_SVC, M68K_INS_SVS, M68K_INS_SPL, M68K_INS_SMI,
253
  M68K_INS_SGE, M68K_INS_SLT, M68K_INS_SGT, M68K_INS_SLE,
254
};
255
256
static const m68k_insn s_trap_lut[] = {
257
  M68K_INS_TRAPT, M68K_INS_TRAPF, M68K_INS_TRAPHI, M68K_INS_TRAPLS,
258
  M68K_INS_TRAPCC, M68K_INS_TRAPCS, M68K_INS_TRAPNE, M68K_INS_TRAPEQ,
259
  M68K_INS_TRAPVC, M68K_INS_TRAPVS, M68K_INS_TRAPPL, M68K_INS_TRAPMI,
260
  M68K_INS_TRAPGE, M68K_INS_TRAPLT, M68K_INS_TRAPGT, M68K_INS_TRAPLE,
261
};
262
263
/* ======================================================================== */
264
/* =========================== UTILITY FUNCTIONS ========================== */
265
/* ======================================================================== */
266
267
#define LIMIT_CPU_TYPES(info, ALLOWED_CPU_TYPES)  \
268
83.2k
  do {           \
269
83.2k
    if (!(info->type & ALLOWED_CPU_TYPES)) { \
270
22.7k
      d68000_invalid(info);   \
271
22.7k
      return;       \
272
22.7k
    }          \
273
83.2k
  } while (0)
274
275
27.0k
static unsigned int peek_imm_8(const m68k_info *info)  { return (m68k_read_safe_16((info), (info)->pc)&0xff); }
276
845k
static unsigned int peek_imm_16(const m68k_info *info) { return m68k_read_safe_16((info), (info)->pc); }
277
387k
static unsigned int peek_imm_32(const m68k_info *info) { return m68k_read_safe_32((info), (info)->pc); }
278
231
static unsigned long long peek_imm_64(const m68k_info *info) { return m68k_read_safe_64((info), (info)->pc); }
279
280
27.0k
static unsigned int read_imm_8(m68k_info *info)  { const unsigned int value = peek_imm_8(info);  (info)->pc+=2; return value; }
281
479k
static unsigned int read_imm_16(m68k_info *info) { const unsigned int value = peek_imm_16(info); (info)->pc+=2; return value; }
282
20.4k
static unsigned int read_imm_32(m68k_info *info) { const unsigned int value = peek_imm_32(info); (info)->pc+=4; return value; }
283
231
static unsigned long long read_imm_64(m68k_info *info) { const unsigned long long value = peek_imm_64(info); (info)->pc+=8; return value; }
284
285
/* Fake a split interface */
286
#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
287
#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
288
#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
289
290
#define get_imm_str_s8() get_imm_str_s(0)
291
#define get_imm_str_s16() get_imm_str_s(1)
292
#define get_imm_str_s32() get_imm_str_s(2)
293
294
#define get_imm_str_u8() get_imm_str_u(0)
295
#define get_imm_str_u16() get_imm_str_u(1)
296
#define get_imm_str_u32() get_imm_str_u(2)
297
298
299
/* 100% portable signed int generators */
300
static int make_int_8(int value)
301
21.7k
{
302
21.7k
  return (value & 0x80) ? value | ~0xff : value & 0xff;
303
21.7k
}
304
305
static int make_int_16(int value)
306
6.14k
{
307
6.14k
  return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
308
6.14k
}
309
310
static void get_with_index_address_mode(m68k_info *info, cs_m68k_op* op, uint32_t instruction, uint32_t size, bool is_pc)
311
23.9k
{
312
23.9k
  uint32_t extension = read_imm_16(info);
313
314
23.9k
  op->address_mode = M68K_AM_AREGI_INDEX_BASE_DISP;
315
316
23.9k
  if (EXT_FULL(extension)) {
317
9.97k
    uint32_t preindex;
318
9.97k
    uint32_t postindex;
319
320
9.97k
    op->mem.base_reg = M68K_REG_INVALID;
321
9.97k
    op->mem.index_reg = M68K_REG_INVALID;
322
323
    /* Not sure how to deal with this?
324
       if (EXT_EFFECTIVE_ZERO(extension)) {
325
       strcpy(mode, "0");
326
       break;
327
       }
328
     */
329
330
9.97k
    op->mem.in_disp = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32(info) : read_imm_16(info)) : 0;
331
9.97k
    op->mem.out_disp = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32(info) : read_imm_16(info)) : 0;
332
333
9.97k
    if (EXT_BASE_REGISTER_PRESENT(extension)) {
334
5.78k
      if (is_pc) {
335
815
        op->mem.base_reg = M68K_REG_PC;
336
4.97k
      } else {
337
4.97k
        op->mem.base_reg = M68K_REG_A0 + (instruction & 7);
338
4.97k
      }
339
5.78k
    }
340
341
9.97k
    if (EXT_INDEX_REGISTER_PRESENT(extension)) {
342
6.09k
      if (EXT_INDEX_AR(extension)) {
343
2.60k
        op->mem.index_reg = M68K_REG_A0 + EXT_INDEX_REGISTER(extension);
344
3.49k
      } else {
345
3.49k
        op->mem.index_reg = M68K_REG_D0 + EXT_INDEX_REGISTER(extension);
346
3.49k
      }
347
348
6.09k
      op->mem.index_size = EXT_INDEX_LONG(extension) ? 1 : 0;
349
350
6.09k
      if (EXT_INDEX_SCALE(extension)) {
351
4.35k
        op->mem.scale = 1 << EXT_INDEX_SCALE(extension);
352
4.35k
      }
353
6.09k
    }
354
355
9.97k
    preindex = (extension & 7) > 0 && (extension & 7) < 4;
356
9.97k
    postindex = (extension & 7) > 4;
357
358
9.97k
    if (preindex) {
359
3.98k
      op->address_mode = is_pc ? M68K_AM_PC_MEMI_PRE_INDEX : M68K_AM_MEMI_PRE_INDEX;
360
5.99k
    } else if (postindex) {
361
2.99k
      op->address_mode = is_pc ? M68K_AM_PC_MEMI_POST_INDEX : M68K_AM_MEMI_POST_INDEX;
362
2.99k
    }
363
364
9.97k
    return;
365
9.97k
  }
366
367
13.9k
  op->mem.index_reg = (EXT_INDEX_AR(extension) ? M68K_REG_A0 : M68K_REG_D0) + EXT_INDEX_REGISTER(extension);
368
13.9k
  op->mem.index_size = EXT_INDEX_LONG(extension) ? 1 : 0;
369
370
13.9k
  if (EXT_8BIT_DISPLACEMENT(extension) == 0) {
371
1.40k
    if (is_pc) {
372
132
      op->mem.base_reg = M68K_REG_PC;
373
132
      op->address_mode = M68K_AM_PCI_INDEX_BASE_DISP;
374
1.27k
    } else {
375
1.27k
      op->mem.base_reg = M68K_REG_A0 + (instruction & 7);
376
1.27k
    }
377
12.5k
  } else {
378
12.5k
    if (is_pc) {
379
1.50k
      op->mem.base_reg = M68K_REG_PC;
380
1.50k
      op->address_mode = M68K_AM_PCI_INDEX_8_BIT_DISP;
381
11.0k
    } else {
382
11.0k
      op->mem.base_reg = M68K_REG_A0 + (instruction & 7);
383
11.0k
      op->address_mode = M68K_AM_AREGI_INDEX_8_BIT_DISP;
384
11.0k
    }
385
386
12.5k
    op->mem.disp = (int8_t)(extension & 0xff);
387
12.5k
  }
388
389
13.9k
  if (EXT_INDEX_SCALE(extension)) {
390
8.86k
    op->mem.scale = 1 << EXT_INDEX_SCALE(extension);
391
8.86k
  }
392
13.9k
}
393
394
/* Make string of effective address mode */
395
static void get_ea_mode_op(m68k_info *info, cs_m68k_op* op, uint32_t instruction, uint32_t size)
396
231k
{
397
  // default to memory
398
399
231k
  op->type = M68K_OP_MEM;
400
401
231k
  switch (instruction & 0x3f) {
402
73.9k
    case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
403
      /* data register direct */
404
73.9k
      op->address_mode = M68K_AM_REG_DIRECT_DATA;
405
73.9k
      op->reg = M68K_REG_D0 + (instruction & 7);
406
73.9k
      op->type = M68K_OP_REG;
407
73.9k
      break;
408
409
10.0k
    case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
410
      /* address register direct */
411
10.0k
      op->address_mode = M68K_AM_REG_DIRECT_ADDR;
412
10.0k
      op->reg = M68K_REG_A0 + (instruction & 7);
413
10.0k
      op->type = M68K_OP_REG;
414
10.0k
      break;
415
416
27.8k
    case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
417
      /* address register indirect */
418
27.8k
      op->address_mode = M68K_AM_REGI_ADDR;
419
27.8k
      op->reg = M68K_REG_A0 + (instruction & 7);
420
27.8k
      break;
421
422
26.0k
    case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
423
      /* address register indirect with postincrement */
424
26.0k
      op->address_mode = M68K_AM_REGI_ADDR_POST_INC;
425
26.0k
      op->reg = M68K_REG_A0 + (instruction & 7);
426
26.0k
      break;
427
428
39.9k
    case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
429
      /* address register indirect with predecrement */
430
39.9k
      op->address_mode = M68K_AM_REGI_ADDR_PRE_DEC;
431
39.9k
      op->reg = M68K_REG_A0 + (instruction & 7);
432
39.9k
      break;
433
434
15.6k
    case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
435
      /* address register indirect with displacement*/
436
15.6k
      op->address_mode = M68K_AM_REGI_ADDR_DISP;
437
15.6k
      op->mem.base_reg = M68K_REG_A0 + (instruction & 7);
438
15.6k
      op->mem.disp = (int16_t)read_imm_16(info);
439
15.6k
      break;
440
441
21.1k
    case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
442
      /* address register indirect with index */
443
21.1k
      get_with_index_address_mode(info, op, instruction, size, false);
444
21.1k
      break;
445
446
4.54k
    case 0x38:
447
      /* absolute short address */
448
4.54k
      op->address_mode = M68K_AM_ABSOLUTE_DATA_SHORT;
449
4.54k
      op->imm = read_imm_16(info);
450
4.54k
      break;
451
452
1.86k
    case 0x39:
453
      /* absolute long address */
454
1.86k
      op->address_mode = M68K_AM_ABSOLUTE_DATA_LONG;
455
1.86k
      op->imm = read_imm_32(info);
456
1.86k
      break;
457
458
2.99k
    case 0x3a:
459
      /* program counter with displacement */
460
2.99k
      op->address_mode = M68K_AM_PCI_DISP;
461
2.99k
      op->mem.disp = (int16_t)read_imm_16(info);
462
2.99k
      break;
463
464
2.78k
    case 0x3b:
465
      /* program counter with index */
466
2.78k
      get_with_index_address_mode(info, op, instruction, size, true);
467
2.78k
      break;
468
469
4.28k
    case 0x3c:
470
4.28k
      op->address_mode = M68K_AM_IMMEDIATE;
471
4.28k
      op->type = M68K_OP_IMM;
472
473
4.28k
      if (size == 1)
474
557
        op->imm = read_imm_8(info) & 0xff;
475
3.72k
      else if (size == 2)
476
1.41k
        op->imm = read_imm_16(info) & 0xffff;
477
2.31k
      else if (size == 4)
478
2.08k
        op->imm = read_imm_32(info);
479
231
      else
480
231
        op->imm = read_imm_64(info);
481
482
4.28k
      break;
483
484
599
    default:
485
599
      break;
486
231k
  }
487
231k
}
488
489
static void set_insn_group(m68k_info *info, m68k_group_type group)
490
69.6k
{
491
69.6k
  info->groups[info->groups_count++] = (uint8_t)group;
492
69.6k
}
493
494
static cs_m68k* build_init_op(m68k_info *info, int opcode, int count, int size)
495
349k
{
496
349k
  cs_m68k* ext;
497
498
349k
  MCInst_setOpcode(info->inst, opcode);
499
500
349k
  ext = &info->extension;
501
502
349k
  ext->op_count = (uint8_t)count;
503
349k
  ext->op_size.type = M68K_SIZE_TYPE_CPU;
504
349k
  ext->op_size.cpu_size = size;
505
506
349k
  return ext;
507
349k
}
508
509
static void build_re_gen_1(m68k_info *info, bool isDreg, int opcode, uint8_t size)
510
26.8k
{
511
26.8k
  cs_m68k_op* op0;
512
26.8k
  cs_m68k_op* op1;
513
26.8k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
514
515
26.8k
  op0 = &ext->operands[0];
516
26.8k
  op1 = &ext->operands[1];
517
518
26.8k
  if (isDreg) {
519
26.8k
    op0->address_mode = M68K_AM_REG_DIRECT_DATA;
520
26.8k
    op0->reg = M68K_REG_D0 + ((info->ir >> 9 ) & 7);
521
26.8k
  } else {
522
0
    op0->address_mode = M68K_AM_REG_DIRECT_ADDR;
523
0
    op0->reg = M68K_REG_A0 + ((info->ir >> 9 ) & 7);
524
0
  }
525
526
26.8k
  get_ea_mode_op(info, op1, info->ir, size);
527
26.8k
}
528
529
static void build_re_1(m68k_info *info, int opcode, uint8_t size)
530
26.8k
{
531
26.8k
  build_re_gen_1(info, true, opcode, size);
532
26.8k
}
533
534
static void build_er_gen_1(m68k_info *info, bool isDreg, int opcode, uint8_t size)
535
29.2k
{
536
29.2k
  cs_m68k_op* op0;
537
29.2k
  cs_m68k_op* op1;
538
29.2k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
539
540
29.2k
  op0 = &ext->operands[0];
541
29.2k
  op1 = &ext->operands[1];
542
543
29.2k
  get_ea_mode_op(info, op0, info->ir, size);
544
545
29.2k
  if (isDreg) {
546
29.2k
    op1->address_mode = M68K_AM_REG_DIRECT_DATA;
547
29.2k
    op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
548
29.2k
  } else {
549
0
    op1->address_mode = M68K_AM_REG_DIRECT_ADDR;
550
0
    op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
551
0
  }
552
29.2k
}
553
554
static void build_rr(m68k_info *info, int opcode, uint8_t size, int imm)
555
5.82k
{
556
5.82k
  cs_m68k_op* op0;
557
5.82k
  cs_m68k_op* op1;
558
5.82k
  cs_m68k_op* op2;
559
5.82k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
560
561
5.82k
  op0 = &ext->operands[0];
562
5.82k
  op1 = &ext->operands[1];
563
5.82k
  op2 = &ext->operands[2];
564
565
5.82k
  op0->address_mode = M68K_AM_REG_DIRECT_DATA;
566
5.82k
  op0->reg = M68K_REG_D0 + (info->ir & 7);
567
568
5.82k
  op1->address_mode = M68K_AM_REG_DIRECT_DATA;
569
5.82k
  op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
570
571
5.82k
  if (imm > 0) {
572
1.88k
    ext->op_count = 3;
573
1.88k
    op2->type = M68K_OP_IMM;
574
1.88k
    op2->address_mode = M68K_AM_IMMEDIATE;
575
1.88k
    op2->imm = imm;
576
1.88k
  }
577
5.82k
}
578
579
static void build_r(m68k_info *info, int opcode, uint8_t size)
580
8.24k
{
581
8.24k
  cs_m68k_op* op0;
582
8.24k
  cs_m68k_op* op1;
583
8.24k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
584
585
8.24k
  op0 = &ext->operands[0];
586
8.24k
  op1 = &ext->operands[1];
587
588
8.24k
  op0->address_mode = M68K_AM_REG_DIRECT_DATA;
589
8.24k
  op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
590
591
8.24k
  op1->address_mode = M68K_AM_REG_DIRECT_DATA;
592
8.24k
  op1->reg = M68K_REG_D0 + (info->ir & 7);
593
8.24k
}
594
595
static void build_imm_ea(m68k_info *info, int opcode, uint8_t size, int imm)
596
35.4k
{
597
35.4k
  cs_m68k_op* op0;
598
35.4k
  cs_m68k_op* op1;
599
35.4k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
600
601
35.4k
  op0 = &ext->operands[0];
602
35.4k
  op1 = &ext->operands[1];
603
604
35.4k
  op0->type = M68K_OP_IMM;
605
35.4k
  op0->address_mode = M68K_AM_IMMEDIATE;
606
35.4k
  op0->imm = imm;
607
608
35.4k
  get_ea_mode_op(info, op1, info->ir, size);
609
35.4k
}
610
611
static void build_3bit_d(m68k_info *info, int opcode, int size)
612
9.59k
{
613
9.59k
  cs_m68k_op* op0;
614
9.59k
  cs_m68k_op* op1;
615
9.59k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
616
617
9.59k
  op0 = &ext->operands[0];
618
9.59k
  op1 = &ext->operands[1];
619
620
9.59k
  op0->type = M68K_OP_IMM;
621
9.59k
  op0->address_mode = M68K_AM_IMMEDIATE;
622
9.59k
  op0->imm = g_3bit_qdata_table[(info->ir >> 9) & 7];
623
624
9.59k
  op1->address_mode = M68K_AM_REG_DIRECT_DATA;
625
9.59k
  op1->reg = M68K_REG_D0 + (info->ir & 7);
626
9.59k
}
627
628
static void build_3bit_ea(m68k_info *info, int opcode, int size)
629
11.9k
{
630
11.9k
  cs_m68k_op* op0;
631
11.9k
  cs_m68k_op* op1;
632
11.9k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
633
634
11.9k
  op0 = &ext->operands[0];
635
11.9k
  op1 = &ext->operands[1];
636
637
11.9k
  op0->type = M68K_OP_IMM;
638
11.9k
  op0->address_mode = M68K_AM_IMMEDIATE;
639
11.9k
  op0->imm = g_3bit_qdata_table[(info->ir >> 9) & 7];
640
641
11.9k
  get_ea_mode_op(info, op1, info->ir, size);
642
11.9k
}
643
644
static void build_mm(m68k_info *info, int opcode, uint8_t size, int imm)
645
6.11k
{
646
6.11k
  cs_m68k_op* op0;
647
6.11k
  cs_m68k_op* op1;
648
6.11k
  cs_m68k_op* op2;
649
6.11k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
650
651
6.11k
  op0 = &ext->operands[0];
652
6.11k
  op1 = &ext->operands[1];
653
6.11k
  op2 = &ext->operands[2];
654
655
6.11k
  op0->address_mode = M68K_AM_REGI_ADDR_PRE_DEC;
656
6.11k
  op0->reg = M68K_REG_A0 + (info->ir & 7);
657
658
6.11k
  op1->address_mode = M68K_AM_REGI_ADDR_PRE_DEC;
659
6.11k
  op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
660
661
6.11k
  if (imm > 0) {
662
2.87k
    ext->op_count = 3;
663
2.87k
    op2->type = M68K_OP_IMM;
664
2.87k
    op2->address_mode = M68K_AM_IMMEDIATE;
665
2.87k
    op2->imm = imm;
666
2.87k
  }
667
6.11k
}
668
669
static void build_ea(m68k_info *info, int opcode, uint8_t size)
670
19.3k
{
671
19.3k
  cs_m68k* ext = build_init_op(info, opcode, 1, size);
672
19.3k
  get_ea_mode_op(info, &ext->operands[0], info->ir, size);
673
19.3k
}
674
675
static void build_ea_a(m68k_info *info, int opcode, uint8_t size)
676
14.8k
{
677
14.8k
  cs_m68k_op* op0;
678
14.8k
  cs_m68k_op* op1;
679
14.8k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
680
681
14.8k
  op0 = &ext->operands[0];
682
14.8k
  op1 = &ext->operands[1];
683
684
14.8k
  get_ea_mode_op(info, op0, info->ir, size);
685
686
14.8k
  op1->address_mode = M68K_AM_REG_DIRECT_ADDR;
687
14.8k
  op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
688
14.8k
}
689
690
static void build_ea_ea(m68k_info *info, int opcode, int size)
691
33.7k
{
692
33.7k
  cs_m68k_op* op0;
693
33.7k
  cs_m68k_op* op1;
694
33.7k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
695
696
33.7k
  op0 = &ext->operands[0];
697
33.7k
  op1 = &ext->operands[1];
698
699
33.7k
  get_ea_mode_op(info, op0, info->ir, size);
700
33.7k
  get_ea_mode_op(info, op1, (((info->ir>>9) & 7) | ((info->ir>>3) & 0x38)), size);
701
33.7k
}
702
703
static void build_pi_pi(m68k_info *info, int opcode, int size)
704
2.10k
{
705
2.10k
  cs_m68k_op* op0;
706
2.10k
  cs_m68k_op* op1;
707
2.10k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
708
709
2.10k
  op0 = &ext->operands[0];
710
2.10k
  op1 = &ext->operands[1];
711
712
2.10k
  op0->address_mode = M68K_AM_REGI_ADDR_POST_INC;
713
2.10k
  op0->reg = M68K_REG_A0 + (info->ir & 7);
714
715
2.10k
  op1->address_mode = M68K_AM_REGI_ADDR_POST_INC;
716
2.10k
  op1->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
717
2.10k
}
718
719
static void build_imm_special_reg(m68k_info *info, int opcode, int imm, int size, m68k_reg reg)
720
1.08k
{
721
1.08k
  cs_m68k_op* op0;
722
1.08k
  cs_m68k_op* op1;
723
1.08k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
724
725
1.08k
  op0 = &ext->operands[0];
726
1.08k
  op1 = &ext->operands[1];
727
728
1.08k
  op0->type = M68K_OP_IMM;
729
1.08k
  op0->address_mode = M68K_AM_IMMEDIATE;
730
1.08k
  op0->imm = imm;
731
732
1.08k
  op1->address_mode = M68K_AM_NONE;
733
1.08k
  op1->reg = reg;
734
1.08k
}
735
736
static void build_relative_branch(m68k_info *info, int opcode, int size, int displacement)
737
24.3k
{
738
24.3k
  cs_m68k_op* op;
739
24.3k
  cs_m68k* ext = build_init_op(info, opcode, 1, size);
740
741
24.3k
  op = &ext->operands[0];
742
743
24.3k
  op->type = M68K_OP_BR_DISP;
744
24.3k
  op->address_mode = M68K_AM_BRANCH_DISPLACEMENT;
745
24.3k
  op->br_disp.disp = displacement;
746
24.3k
  op->br_disp.disp_size = size;
747
748
24.3k
  set_insn_group(info, M68K_GRP_JUMP);
749
24.3k
  set_insn_group(info, M68K_GRP_BRANCH_RELATIVE);
750
24.3k
}
751
752
static void build_absolute_jump_with_immediate(m68k_info *info, int opcode, int size, int immediate)
753
5.74k
{
754
5.74k
  cs_m68k_op* op;
755
5.74k
  cs_m68k* ext = build_init_op(info, opcode, 1, size);
756
757
5.74k
  op = &ext->operands[0];
758
759
5.74k
  op->type = M68K_OP_IMM;
760
5.74k
  op->address_mode = M68K_AM_IMMEDIATE;
761
5.74k
  op->imm = immediate;
762
763
5.74k
  set_insn_group(info, M68K_GRP_JUMP);
764
5.74k
}
765
766
static void build_bcc(m68k_info *info, int size, int displacement)
767
18.3k
{
768
18.3k
  build_relative_branch(info, s_branch_lut[(info->ir >> 8) & 0xf], size, displacement);
769
18.3k
}
770
771
static void build_trap(m68k_info *info, int size, int immediate)
772
1.15k
{
773
1.15k
  build_absolute_jump_with_immediate(info, s_trap_lut[(info->ir >> 8) & 0xf], size, immediate);
774
1.15k
}
775
776
static void build_dbxx(m68k_info *info, int opcode, int size, int displacement)
777
1.04k
{
778
1.04k
  cs_m68k_op* op0;
779
1.04k
  cs_m68k_op* op1;
780
1.04k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
781
782
1.04k
  op0 = &ext->operands[0];
783
1.04k
  op1 = &ext->operands[1];
784
785
1.04k
  op0->address_mode = M68K_AM_REG_DIRECT_DATA;
786
1.04k
  op0->reg = M68K_REG_D0 + (info->ir & 7);
787
788
1.04k
  op1->type = M68K_OP_BR_DISP;
789
1.04k
  op1->address_mode = M68K_AM_BRANCH_DISPLACEMENT;
790
1.04k
  op1->br_disp.disp = displacement;
791
1.04k
  op1->br_disp.disp_size = M68K_OP_BR_DISP_SIZE_LONG;
792
793
1.04k
  set_insn_group(info, M68K_GRP_JUMP);
794
1.04k
  set_insn_group(info, M68K_GRP_BRANCH_RELATIVE);
795
1.04k
}
796
797
static void build_dbcc(m68k_info *info, int size, int displacement)
798
468
{
799
468
  build_dbxx(info, s_dbcc_lut[(info->ir >> 8) & 0xf], size, displacement);
800
468
}
801
802
static void build_d_d_ea(m68k_info *info, int opcode, int size)
803
392
{
804
392
  cs_m68k_op* op0;
805
392
  cs_m68k_op* op1;
806
392
  cs_m68k_op* op2;
807
392
  uint32_t extension = read_imm_16(info);
808
392
  cs_m68k* ext = build_init_op(info, opcode, 3, size);
809
810
392
  op0 = &ext->operands[0];
811
392
  op1 = &ext->operands[1];
812
392
  op2 = &ext->operands[2];
813
814
392
  op0->address_mode = M68K_AM_REG_DIRECT_DATA;
815
392
  op0->reg = M68K_REG_D0 + (extension & 7);
816
817
392
  op1->address_mode = M68K_AM_REG_DIRECT_DATA;
818
392
  op1->reg = M68K_REG_D0 + ((extension >> 6) & 7);
819
820
392
  get_ea_mode_op(info, op2, info->ir, size);
821
392
}
822
823
static void build_bitfield_ins(m68k_info *info, int opcode, int has_d_arg)
824
1.90k
{
825
1.90k
  uint8_t offset;
826
1.90k
  uint8_t width;
827
1.90k
  cs_m68k_op* op_ea;
828
1.90k
  cs_m68k_op* op1;
829
1.90k
  cs_m68k* ext = build_init_op(info, opcode, 1, 0);
830
1.90k
  uint32_t extension = read_imm_16(info);
831
832
1.90k
  op_ea = &ext->operands[0];
833
1.90k
  op1 = &ext->operands[1];
834
835
1.90k
  if (BIT_B(extension))
836
1.06k
    offset = (extension >> 6) & 7;
837
839
  else
838
839
    offset = (extension >> 6) & 31;
839
840
1.90k
  if (BIT_5(extension))
841
843
    width = extension & 7;
842
1.06k
  else
843
1.06k
    width = (uint8_t)g_5bit_data_table[extension & 31];
844
845
1.90k
  if (has_d_arg) {
846
873
    ext->op_count = 2;
847
873
    op1->address_mode = M68K_AM_REG_DIRECT_DATA;
848
873
    op1->reg = M68K_REG_D0 + ((extension >> 12) & 7);
849
873
  }
850
851
1.90k
  get_ea_mode_op(info, op_ea, info->ir, 1);
852
853
1.90k
  op_ea->mem.bitfield = 1;
854
1.90k
  op_ea->mem.width = width;
855
1.90k
  op_ea->mem.offset = offset;
856
1.90k
}
857
858
static void build_d(m68k_info *info, int opcode, int size)
859
2.03k
{
860
2.03k
  cs_m68k* ext = build_init_op(info, opcode, 1, size);
861
2.03k
  cs_m68k_op* op;
862
863
2.03k
  op = &ext->operands[0];
864
865
2.03k
  op->address_mode = M68K_AM_REG_DIRECT_DATA;
866
2.03k
  op->reg = M68K_REG_D0 + (info->ir & 7);
867
2.03k
}
868
869
static uint16_t reverse_bits(uint32_t v)
870
1.05k
{
871
1.05k
  uint32_t r = v; // r will be reversed bits of v; first get LSB of v
872
1.05k
  uint32_t s = 16 - 1; // extra shift needed at end
873
874
12.7k
  for (v >>= 1; v; v >>= 1) {
875
11.7k
    r <<= 1;
876
11.7k
    r |= v & 1;
877
11.7k
    s--;
878
11.7k
  }
879
880
1.05k
  return r <<= s; // shift when v's highest bits are zero
881
1.05k
}
882
883
static uint8_t reverse_bits_8(uint32_t v)
884
1.79k
{
885
1.79k
  uint32_t r = v; // r will be reversed bits of v; first get LSB of v
886
1.79k
  uint32_t s = 8 - 1; // extra shift needed at end
887
888
6.38k
  for (v >>= 1; v; v >>= 1) {
889
4.59k
    r <<= 1;
890
4.59k
    r |= v & 1;
891
4.59k
    s--;
892
4.59k
  }
893
894
1.79k
  return r <<= s; // shift when v's highest bits are zero
895
1.79k
}
896
897
898
static void build_movem_re(m68k_info *info, int opcode, int size)
899
2.93k
{
900
2.93k
  cs_m68k_op* op0;
901
2.93k
  cs_m68k_op* op1;
902
2.93k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
903
904
2.93k
  op0 = &ext->operands[0];
905
2.93k
  op1 = &ext->operands[1];
906
907
2.93k
  op0->type = M68K_OP_REG_BITS;
908
2.93k
  op0->register_bits = read_imm_16(info);
909
910
2.93k
  get_ea_mode_op(info, op1, info->ir, size);
911
912
2.93k
  if (op1->address_mode == M68K_AM_REGI_ADDR_PRE_DEC)
913
1.05k
    op0->register_bits = reverse_bits(op0->register_bits);
914
2.93k
}
915
916
static void build_movem_er(m68k_info *info, int opcode, int size)
917
1.53k
{
918
1.53k
  cs_m68k_op* op0;
919
1.53k
  cs_m68k_op* op1;
920
1.53k
  cs_m68k* ext = build_init_op(info, opcode, 2, size);
921
922
1.53k
  op0 = &ext->operands[0];
923
1.53k
  op1 = &ext->operands[1];
924
925
1.53k
  op1->type = M68K_OP_REG_BITS;
926
1.53k
  op1->register_bits = read_imm_16(info);
927
928
1.53k
  get_ea_mode_op(info, op0, info->ir, size);
929
1.53k
}
930
931
static void build_imm(m68k_info *info, int opcode, int data)
932
52.6k
{
933
52.6k
  cs_m68k_op* op;
934
52.6k
  cs_m68k* ext = build_init_op(info, opcode, 1, 0);
935
936
52.6k
  MCInst_setOpcode(info->inst, opcode);
937
938
52.6k
  op = &ext->operands[0];
939
940
52.6k
  op->type = M68K_OP_IMM;
941
52.6k
  op->address_mode = M68K_AM_IMMEDIATE;
942
52.6k
  op->imm = data;
943
52.6k
}
944
945
static void build_illegal(m68k_info *info, int data)
946
228
{
947
228
  build_imm(info, M68K_INS_ILLEGAL, data);
948
228
}
949
950
static void build_invalid(m68k_info *info, int data)
951
52.3k
{
952
52.3k
  build_imm(info, M68K_INS_INVALID, data);
953
52.3k
}
954
955
static void build_cas2(m68k_info *info, int size)
956
2.22k
{
957
2.22k
  uint32_t word3;
958
2.22k
  uint32_t extension;
959
2.22k
  cs_m68k_op* op0;
960
2.22k
  cs_m68k_op* op1;
961
2.22k
  cs_m68k_op* op2;
962
2.22k
  cs_m68k* ext = build_init_op(info, M68K_INS_CAS2, 3, size);
963
2.22k
  int reg_0, reg_1;
964
965
  /* cas2 is the only 3 words instruction, word2 and word3 have the same motif bits to check */
966
2.22k
  word3 = peek_imm_32(info) & 0xffff;
967
2.22k
  if (!instruction_is_valid(info, word3))
968
598
    return;
969
970
1.62k
  op0 = &ext->operands[0];
971
1.62k
  op1 = &ext->operands[1];
972
1.62k
  op2 = &ext->operands[2];
973
974
1.62k
  extension = read_imm_32(info);
975
976
1.62k
  op0->address_mode = M68K_AM_NONE;
977
1.62k
  op0->type = M68K_OP_REG_PAIR;
978
1.62k
  op0->reg_pair.reg_0 = ((extension >> 16) & 7) + M68K_REG_D0;
979
1.62k
  op0->reg_pair.reg_1 = (extension & 7) + M68K_REG_D0;
980
981
1.62k
  op1->address_mode = M68K_AM_NONE;
982
1.62k
  op1->type = M68K_OP_REG_PAIR;
983
1.62k
  op1->reg_pair.reg_0 = ((extension >> 22) & 7) + M68K_REG_D0;
984
1.62k
  op1->reg_pair.reg_1 = ((extension >> 6) & 7) + M68K_REG_D0;
985
986
1.62k
  reg_0 = (extension >> 28) & 7;
987
1.62k
  reg_1 = (extension >> 12) & 7;
988
989
1.62k
  op2->address_mode = M68K_AM_NONE;
990
1.62k
  op2->type = M68K_OP_REG_PAIR;
991
1.62k
  op2->reg_pair.reg_0 = reg_0 + (BIT_1F(extension) ? 8 : 0) + M68K_REG_D0;
992
1.62k
  op2->reg_pair.reg_1 = reg_1 + (BIT_F(extension) ? 8 : 0) + M68K_REG_D0;
993
1.62k
}
994
995
static void build_chk2_cmp2(m68k_info *info, int size)
996
756
{
997
756
  cs_m68k_op* op0;
998
756
  cs_m68k_op* op1;
999
756
  cs_m68k* ext = build_init_op(info, M68K_INS_CHK2, 2, size);
1000
1001
756
  uint32_t extension = read_imm_16(info);
1002
1003
756
  if (BIT_B(extension))
1004
272
    MCInst_setOpcode(info->inst, M68K_INS_CHK2);
1005
484
  else
1006
484
    MCInst_setOpcode(info->inst, M68K_INS_CMP2);
1007
1008
756
  op0 = &ext->operands[0];
1009
756
  op1 = &ext->operands[1];
1010
1011
756
  get_ea_mode_op(info, op0, info->ir, size);
1012
1013
756
  op1->address_mode = M68K_AM_NONE;
1014
756
  op1->type = M68K_OP_REG;
1015
756
  op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7);
1016
756
}
1017
1018
static void build_move16(m68k_info *info, int data[2], int modes[2])
1019
1.29k
{
1020
1.29k
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE16, 2, 0);
1021
1.29k
  int i;
1022
1023
3.89k
  for (i = 0; i < 2; ++i) {
1024
2.59k
    cs_m68k_op* op = &ext->operands[i];
1025
2.59k
    const int d = data[i];
1026
2.59k
    const int m = modes[i];
1027
1028
2.59k
    op->type = M68K_OP_MEM;
1029
1030
2.59k
    if (m == M68K_AM_REGI_ADDR_POST_INC || m == M68K_AM_REG_DIRECT_ADDR) {
1031
1.46k
      op->address_mode = m;
1032
1.46k
      op->reg = M68K_REG_A0 + d;
1033
1.46k
    } else {
1034
1.12k
      op->address_mode = m;
1035
1.12k
      op->imm = d;
1036
1.12k
    }
1037
2.59k
  }
1038
1.29k
}
1039
1040
static void build_link(m68k_info *info, int disp, int size)
1041
512
{
1042
512
  cs_m68k_op* op0;
1043
512
  cs_m68k_op* op1;
1044
512
  cs_m68k* ext = build_init_op(info, M68K_INS_LINK, 2, size);
1045
1046
512
  op0 = &ext->operands[0];
1047
512
  op1 = &ext->operands[1];
1048
1049
512
  op0->address_mode = M68K_AM_NONE;
1050
512
  op0->reg = M68K_REG_A0 + (info->ir & 7);
1051
1052
512
  op1->address_mode = M68K_AM_IMMEDIATE;
1053
512
  op1->type = M68K_OP_IMM;
1054
512
  op1->imm = disp;
1055
512
}
1056
1057
static void build_cpush_cinv(m68k_info *info, int op_offset)
1058
1.72k
{
1059
1.72k
  cs_m68k_op* op0;
1060
1.72k
  cs_m68k_op* op1;
1061
1.72k
  cs_m68k* ext = build_init_op(info, M68K_INS_INVALID, 2, 0);
1062
1063
1.72k
  switch ((info->ir >> 3) & 3) { // scope
1064
    // Invalid
1065
462
    case 0:
1066
462
      d68000_invalid(info);
1067
462
      return;
1068
      // Line
1069
323
    case 1:
1070
323
      MCInst_setOpcode(info->inst, op_offset + 0);
1071
323
      break;
1072
      // Page
1073
557
    case 2:
1074
557
      MCInst_setOpcode(info->inst, op_offset + 1);
1075
557
      break;
1076
      // All
1077
384
    case 3:
1078
384
      ext->op_count = 1;
1079
384
      MCInst_setOpcode(info->inst, op_offset + 2);
1080
384
      break;
1081
1.72k
  }
1082
1083
1.26k
  op0 = &ext->operands[0];
1084
1.26k
  op1 = &ext->operands[1];
1085
1086
1.26k
  op0->address_mode = M68K_AM_IMMEDIATE;
1087
1.26k
  op0->type = M68K_OP_IMM;
1088
1.26k
  op0->imm = (info->ir >> 6) & 3;
1089
1090
1.26k
  op1->type = M68K_OP_MEM;
1091
1.26k
  op1->address_mode = M68K_AM_REG_DIRECT_ADDR;
1092
1.26k
  op1->imm = M68K_REG_A0 + (info->ir & 7);
1093
1.26k
}
1094
1095
static void build_movep_re(m68k_info *info, int size)
1096
977
{
1097
977
  cs_m68k_op* op0;
1098
977
  cs_m68k_op* op1;
1099
977
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVEP, 2, size);
1100
1101
977
  op0 = &ext->operands[0];
1102
977
  op1 = &ext->operands[1];
1103
1104
977
  op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
1105
1106
977
  op1->address_mode = M68K_AM_REGI_ADDR_DISP;
1107
977
  op1->type = M68K_OP_MEM;
1108
977
  op1->mem.base_reg = M68K_REG_A0 + (info->ir & 7);
1109
977
  op1->mem.disp = (int16_t)read_imm_16(info);
1110
977
}
1111
1112
static void build_movep_er(m68k_info *info, int size)
1113
2.13k
{
1114
2.13k
  cs_m68k_op* op0;
1115
2.13k
  cs_m68k_op* op1;
1116
2.13k
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVEP, 2, size);
1117
1118
2.13k
  op0 = &ext->operands[0];
1119
2.13k
  op1 = &ext->operands[1];
1120
1121
2.13k
  op0->address_mode = M68K_AM_REGI_ADDR_DISP;
1122
2.13k
  op0->type = M68K_OP_MEM;
1123
2.13k
  op0->mem.base_reg = M68K_REG_A0 + (info->ir & 7);
1124
2.13k
  op0->mem.disp = (int16_t)read_imm_16(info);
1125
1126
2.13k
  op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
1127
2.13k
}
1128
1129
static void build_moves(m68k_info *info, int size)
1130
532
{
1131
532
  cs_m68k_op* op0;
1132
532
  cs_m68k_op* op1;
1133
532
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVES, 2, size);
1134
532
  uint32_t extension = read_imm_16(info);
1135
1136
532
  op0 = &ext->operands[0];
1137
532
  op1 = &ext->operands[1];
1138
1139
532
  if (BIT_B(extension)) {
1140
333
    op0->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7);
1141
333
    get_ea_mode_op(info, op1, info->ir, size);
1142
333
  } else {
1143
199
    get_ea_mode_op(info, op0, info->ir, size);
1144
199
    op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7);
1145
199
  }
1146
532
}
1147
1148
static void build_er_1(m68k_info *info, int opcode, uint8_t size)
1149
29.2k
{
1150
29.2k
  build_er_gen_1(info, true, opcode, size);
1151
29.2k
}
1152
1153
/* ======================================================================== */
1154
/* ========================= INSTRUCTION HANDLERS ========================= */
1155
/* ======================================================================== */
1156
/* Instruction handler function names follow this convention:
1157
 *
1158
 * d68000_NAME_EXTENSIONS(void)
1159
 * where NAME is the name of the opcode it handles and EXTENSIONS are any
1160
 * extensions for special instances of that opcode.
1161
 *
1162
 * Examples:
1163
 *   d68000_add_er_8(): add opcode, from effective address to register,
1164
 *                      size = byte
1165
 *
1166
 *   d68000_asr_s_8(): arithmetic shift right, static count, size = byte
1167
 *
1168
 *
1169
 * Common extensions:
1170
 * 8   : size = byte
1171
 * 16  : size = word
1172
 * 32  : size = long
1173
 * rr  : register to register
1174
 * mm  : memory to memory
1175
 * r   : register
1176
 * s   : static
1177
 * er  : effective address -> register
1178
 * re  : register -> effective address
1179
 * ea  : using effective address mode of operation
1180
 * d   : data register direct
1181
 * a   : address register direct
1182
 * ai  : address register indirect
1183
 * pi  : address register indirect with postincrement
1184
 * pd  : address register indirect with predecrement
1185
 * di  : address register indirect with displacement
1186
 * ix  : address register indirect with index
1187
 * aw  : absolute word
1188
 * al  : absolute long
1189
 */
1190
1191
1192
static void d68000_invalid(m68k_info *info)
1193
24.9k
{
1194
24.9k
  build_invalid(info, info->ir);
1195
24.9k
}
1196
1197
static void d68000_illegal(m68k_info *info)
1198
228
{
1199
228
  build_illegal(info, info->ir);
1200
228
}
1201
1202
static void d68000_1010(m68k_info *info)
1203
12.8k
{
1204
12.8k
  build_invalid(info, info->ir);
1205
12.8k
}
1206
1207
static void d68000_1111(m68k_info *info)
1208
14.6k
{
1209
14.6k
  build_invalid(info, info->ir);
1210
14.6k
}
1211
1212
static void d68000_abcd_rr(m68k_info *info)
1213
420
{
1214
420
  build_rr(info, M68K_INS_ABCD, 1, 0);
1215
420
}
1216
1217
static void d68000_abcd_mm(m68k_info *info)
1218
485
{
1219
485
  build_mm(info, M68K_INS_ABCD, 1, 0);
1220
485
}
1221
1222
static void d68000_add_er_8(m68k_info *info)
1223
976
{
1224
976
  build_er_1(info, M68K_INS_ADD, 1);
1225
976
}
1226
1227
static void d68000_add_er_16(m68k_info *info)
1228
892
{
1229
892
  build_er_1(info, M68K_INS_ADD, 2);
1230
892
}
1231
1232
static void d68000_add_er_32(m68k_info *info)
1233
755
{
1234
755
  build_er_1(info, M68K_INS_ADD, 4);
1235
755
}
1236
1237
static void d68000_add_re_8(m68k_info *info)
1238
653
{
1239
653
  build_re_1(info, M68K_INS_ADD, 1);
1240
653
}
1241
1242
static void d68000_add_re_16(m68k_info *info)
1243
527
{
1244
527
  build_re_1(info, M68K_INS_ADD, 2);
1245
527
}
1246
1247
static void d68000_add_re_32(m68k_info *info)
1248
622
{
1249
622
  build_re_1(info, M68K_INS_ADD, 4);
1250
622
}
1251
1252
static void d68000_adda_16(m68k_info *info)
1253
2.82k
{
1254
2.82k
  build_ea_a(info, M68K_INS_ADDA, 2);
1255
2.82k
}
1256
1257
static void d68000_adda_32(m68k_info *info)
1258
2.90k
{
1259
2.90k
  build_ea_a(info, M68K_INS_ADDA, 4);
1260
2.90k
}
1261
1262
static void d68000_addi_8(m68k_info *info)
1263
955
{
1264
955
  build_imm_ea(info, M68K_INS_ADDI, 1, read_imm_8(info));
1265
955
}
1266
1267
static void d68000_addi_16(m68k_info *info)
1268
454
{
1269
454
  build_imm_ea(info, M68K_INS_ADDI, 2, read_imm_16(info));
1270
454
}
1271
1272
static void d68000_addi_32(m68k_info *info)
1273
365
{
1274
365
  build_imm_ea(info, M68K_INS_ADDI, 4, read_imm_32(info));
1275
365
}
1276
1277
static void d68000_addq_8(m68k_info *info)
1278
1.41k
{
1279
1.41k
  build_3bit_ea(info, M68K_INS_ADDQ, 1);
1280
1.41k
}
1281
1282
static void d68000_addq_16(m68k_info *info)
1283
4.80k
{
1284
4.80k
  build_3bit_ea(info, M68K_INS_ADDQ, 2);
1285
4.80k
}
1286
1287
static void d68000_addq_32(m68k_info *info)
1288
619
{
1289
619
  build_3bit_ea(info, M68K_INS_ADDQ, 4);
1290
619
}
1291
1292
static void d68000_addx_rr_8(m68k_info *info)
1293
533
{
1294
533
  build_rr(info, M68K_INS_ADDX, 1, 0);
1295
533
}
1296
1297
static void d68000_addx_rr_16(m68k_info *info)
1298
305
{
1299
305
  build_rr(info, M68K_INS_ADDX, 2, 0);
1300
305
}
1301
1302
static void d68000_addx_rr_32(m68k_info *info)
1303
386
{
1304
386
  build_rr(info, M68K_INS_ADDX, 4, 0);
1305
386
}
1306
1307
static void d68000_addx_mm_8(m68k_info *info)
1308
574
{
1309
574
  build_mm(info, M68K_INS_ADDX, 1, 0);
1310
574
}
1311
1312
static void d68000_addx_mm_16(m68k_info *info)
1313
460
{
1314
460
  build_mm(info, M68K_INS_ADDX, 2, 0);
1315
460
}
1316
1317
static void d68000_addx_mm_32(m68k_info *info)
1318
296
{
1319
296
  build_mm(info, M68K_INS_ADDX, 4, 0);
1320
296
}
1321
1322
static void d68000_and_er_8(m68k_info *info)
1323
964
{
1324
964
  build_er_1(info, M68K_INS_AND, 1);
1325
964
}
1326
1327
static void d68000_and_er_16(m68k_info *info)
1328
956
{
1329
956
  build_er_1(info, M68K_INS_AND, 2);
1330
956
}
1331
1332
static void d68000_and_er_32(m68k_info *info)
1333
921
{
1334
921
  build_er_1(info, M68K_INS_AND, 4);
1335
921
}
1336
1337
static void d68000_and_re_8(m68k_info *info)
1338
544
{
1339
544
  build_re_1(info, M68K_INS_AND, 1);
1340
544
}
1341
1342
static void d68000_and_re_16(m68k_info *info)
1343
679
{
1344
679
  build_re_1(info, M68K_INS_AND, 2);
1345
679
}
1346
1347
static void d68000_and_re_32(m68k_info *info)
1348
552
{
1349
552
  build_re_1(info, M68K_INS_AND, 4);
1350
552
}
1351
1352
static void d68000_andi_8(m68k_info *info)
1353
933
{
1354
933
  build_imm_ea(info, M68K_INS_ANDI, 1, read_imm_8(info));
1355
933
}
1356
1357
static void d68000_andi_16(m68k_info *info)
1358
751
{
1359
751
  build_imm_ea(info, M68K_INS_ANDI, 2, read_imm_16(info));
1360
751
}
1361
1362
static void d68000_andi_32(m68k_info *info)
1363
536
{
1364
536
  build_imm_ea(info, M68K_INS_ANDI, 4, read_imm_32(info));
1365
536
}
1366
1367
static void d68000_andi_to_ccr(m68k_info *info)
1368
84
{
1369
84
  build_imm_special_reg(info, M68K_INS_ANDI, read_imm_8(info), 1, M68K_REG_CCR);
1370
84
}
1371
1372
static void d68000_andi_to_sr(m68k_info *info)
1373
86
{
1374
86
  build_imm_special_reg(info, M68K_INS_ANDI, read_imm_16(info), 2, M68K_REG_SR);
1375
86
}
1376
1377
static void d68000_asr_s_8(m68k_info *info)
1378
578
{
1379
578
  build_3bit_d(info, M68K_INS_ASR, 1);
1380
578
}
1381
1382
static void d68000_asr_s_16(m68k_info *info)
1383
480
{
1384
480
  build_3bit_d(info, M68K_INS_ASR, 2);
1385
480
}
1386
1387
static void d68000_asr_s_32(m68k_info *info)
1388
546
{
1389
546
  build_3bit_d(info, M68K_INS_ASR, 4);
1390
546
}
1391
1392
static void d68000_asr_r_8(m68k_info *info)
1393
329
{
1394
329
  build_r(info, M68K_INS_ASR, 1);
1395
329
}
1396
1397
static void d68000_asr_r_16(m68k_info *info)
1398
436
{
1399
436
  build_r(info, M68K_INS_ASR, 2);
1400
436
}
1401
1402
static void d68000_asr_r_32(m68k_info *info)
1403
257
{
1404
257
  build_r(info, M68K_INS_ASR, 4);
1405
257
}
1406
1407
static void d68000_asr_ea(m68k_info *info)
1408
465
{
1409
465
  build_ea(info, M68K_INS_ASR, 2);
1410
465
}
1411
1412
static void d68000_asl_s_8(m68k_info *info)
1413
504
{
1414
504
  build_3bit_d(info, M68K_INS_ASL, 1);
1415
504
}
1416
1417
static void d68000_asl_s_16(m68k_info *info)
1418
112
{
1419
112
  build_3bit_d(info, M68K_INS_ASL, 2);
1420
112
}
1421
1422
static void d68000_asl_s_32(m68k_info *info)
1423
299
{
1424
299
  build_3bit_d(info, M68K_INS_ASL, 4);
1425
299
}
1426
1427
static void d68000_asl_r_8(m68k_info *info)
1428
303
{
1429
303
  build_r(info, M68K_INS_ASL, 1);
1430
303
}
1431
1432
static void d68000_asl_r_16(m68k_info *info)
1433
441
{
1434
441
  build_r(info, M68K_INS_ASL, 2);
1435
441
}
1436
1437
static void d68000_asl_r_32(m68k_info *info)
1438
273
{
1439
273
  build_r(info, M68K_INS_ASL, 4);
1440
273
}
1441
1442
static void d68000_asl_ea(m68k_info *info)
1443
434
{
1444
434
  build_ea(info, M68K_INS_ASL, 2);
1445
434
}
1446
1447
static void d68000_bcc_8(m68k_info *info)
1448
17.1k
{
1449
17.1k
  build_bcc(info, 1, make_int_8(info->ir));
1450
17.1k
}
1451
1452
static void d68000_bcc_16(m68k_info *info)
1453
1.05k
{
1454
1.05k
  build_bcc(info, 2, make_int_16(read_imm_16(info)));
1455
1.05k
}
1456
1457
static void d68020_bcc_32(m68k_info *info)
1458
496
{
1459
496
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1460
237
  build_bcc(info, 4, read_imm_32(info));
1461
237
}
1462
1463
static void d68000_bchg_r(m68k_info *info)
1464
2.13k
{
1465
2.13k
  build_re_1(info, M68K_INS_BCHG, 1);
1466
2.13k
}
1467
1468
static void d68000_bchg_s(m68k_info *info)
1469
226
{
1470
226
  build_imm_ea(info, M68K_INS_BCHG, 1, read_imm_8(info));
1471
226
}
1472
1473
static void d68000_bclr_r(m68k_info *info)
1474
1.61k
{
1475
1.61k
  build_re_1(info, M68K_INS_BCLR, 1);
1476
1.61k
}
1477
1478
static void d68000_bclr_s(m68k_info *info)
1479
48
{
1480
48
  build_imm_ea(info, M68K_INS_BCLR, 1, read_imm_8(info));
1481
48
}
1482
1483
static void d68010_bkpt(m68k_info *info)
1484
1.84k
{
1485
1.84k
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1486
854
  build_absolute_jump_with_immediate(info, M68K_INS_BKPT, 0, info->ir & 7);
1487
854
}
1488
1489
static void d68020_bfchg(m68k_info *info)
1490
578
{
1491
578
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1492
332
  build_bitfield_ins(info, M68K_INS_BFCHG, false);
1493
332
}
1494
1495
1496
static void d68020_bfclr(m68k_info *info)
1497
430
{
1498
430
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1499
214
  build_bitfield_ins(info, M68K_INS_BFCLR, false);
1500
214
}
1501
1502
static void d68020_bfexts(m68k_info *info)
1503
481
{
1504
481
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1505
314
  build_bitfield_ins(info, M68K_INS_BFEXTS, true);
1506
314
}
1507
1508
static void d68020_bfextu(m68k_info *info)
1509
594
{
1510
594
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1511
239
  build_bitfield_ins(info, M68K_INS_BFEXTU, true);
1512
239
}
1513
1514
static void d68020_bfffo(m68k_info *info)
1515
530
{
1516
530
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1517
214
  build_bitfield_ins(info, M68K_INS_BFFFO, true);
1518
214
}
1519
1520
static void d68020_bfins(m68k_info *info)
1521
378
{
1522
378
  cs_m68k* ext = &info->extension;
1523
378
  cs_m68k_op temp;
1524
1525
378
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1526
106
  build_bitfield_ins(info, M68K_INS_BFINS, true);
1527
1528
  // a bit hacky but we need to flip the args on only this instruction
1529
1530
106
  temp = ext->operands[0];
1531
106
  ext->operands[0] = ext->operands[1];
1532
106
  ext->operands[1] = temp;
1533
106
}
1534
1535
static void d68020_bfset(m68k_info *info)
1536
623
{
1537
623
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1538
415
  build_bitfield_ins(info, M68K_INS_BFSET, false);
1539
415
}
1540
1541
static void d68020_bftst(m68k_info *info)
1542
72
{
1543
72
  build_bitfield_ins(info, M68K_INS_BFTST, false);
1544
72
}
1545
1546
static void d68000_bra_8(m68k_info *info)
1547
3.02k
{
1548
3.02k
  build_relative_branch(info, M68K_INS_BRA, 1, make_int_8(info->ir));
1549
3.02k
}
1550
1551
static void d68000_bra_16(m68k_info *info)
1552
576
{
1553
576
  build_relative_branch(info, M68K_INS_BRA, 2, make_int_16(read_imm_16(info)));
1554
576
}
1555
1556
static void d68020_bra_32(m68k_info *info)
1557
477
{
1558
477
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1559
233
  build_relative_branch(info, M68K_INS_BRA, 4, read_imm_32(info));
1560
233
}
1561
1562
static void d68000_bset_r(m68k_info *info)
1563
2.66k
{
1564
2.66k
  build_re_1(info, M68K_INS_BSET, 1);
1565
2.66k
}
1566
1567
static void d68000_bset_s(m68k_info *info)
1568
288
{
1569
288
  build_imm_ea(info, M68K_INS_BSET, 1, read_imm_8(info));
1570
288
}
1571
1572
static void d68000_bsr_8(m68k_info *info)
1573
1.61k
{
1574
1.61k
  build_relative_branch(info, M68K_INS_BSR, 1, make_int_8(info->ir));
1575
1.61k
}
1576
1577
static void d68000_bsr_16(m68k_info *info)
1578
448
{
1579
448
  build_relative_branch(info, M68K_INS_BSR, 2, make_int_16(read_imm_16(info)));
1580
448
}
1581
1582
static void d68020_bsr_32(m68k_info *info)
1583
327
{
1584
327
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1585
93
  build_relative_branch(info, M68K_INS_BSR, 4, read_imm_32(info));
1586
93
}
1587
1588
static void d68000_btst_r(m68k_info *info)
1589
5.50k
{
1590
5.50k
  build_re_1(info, M68K_INS_BTST, 4);
1591
5.50k
}
1592
1593
static void d68000_btst_s(m68k_info *info)
1594
380
{
1595
380
  build_imm_ea(info, M68K_INS_BTST, 1, read_imm_8(info));
1596
380
}
1597
1598
static void d68020_callm(m68k_info *info)
1599
224
{
1600
224
  LIMIT_CPU_TYPES(info, M68020_ONLY);
1601
0
  build_imm_ea(info, M68K_INS_CALLM, 0, read_imm_8(info));
1602
0
}
1603
1604
static void d68020_cas_8(m68k_info *info)
1605
242
{
1606
242
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1607
109
  build_d_d_ea(info, M68K_INS_CAS, 1);
1608
109
}
1609
1610
static void d68020_cas_16(m68k_info *info)
1611
319
{
1612
319
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1613
212
  build_d_d_ea(info, M68K_INS_CAS, 2);
1614
212
}
1615
1616
static void d68020_cas_32(m68k_info *info)
1617
234
{
1618
234
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1619
71
  build_d_d_ea(info, M68K_INS_CAS, 4);
1620
71
}
1621
1622
static void d68020_cas2_16(m68k_info *info)
1623
222
{
1624
222
  build_cas2(info, 2);
1625
222
}
1626
1627
static void d68020_cas2_32(m68k_info *info)
1628
2.00k
{
1629
2.00k
  build_cas2(info, 4);
1630
2.00k
}
1631
1632
static void d68000_chk_16(m68k_info *info)
1633
433
{
1634
433
  build_er_1(info, M68K_INS_CHK, 2);
1635
433
}
1636
1637
static void d68020_chk_32(m68k_info *info)
1638
1.34k
{
1639
1.34k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1640
862
  build_er_1(info, M68K_INS_CHK, 4);
1641
862
}
1642
1643
static void d68020_chk2_cmp2_8(m68k_info *info)
1644
491
{
1645
491
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1646
385
  build_chk2_cmp2(info, 1);
1647
385
}
1648
1649
static void d68020_chk2_cmp2_16(m68k_info *info)
1650
157
{
1651
157
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1652
87
  build_chk2_cmp2(info, 2);
1653
87
}
1654
1655
static void d68020_chk2_cmp2_32(m68k_info *info)
1656
395
{
1657
395
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1658
284
  build_chk2_cmp2(info, 4);
1659
284
}
1660
1661
static void d68040_cinv(m68k_info *info)
1662
1.05k
{
1663
1.05k
  LIMIT_CPU_TYPES(info, M68040_PLUS);
1664
597
  build_cpush_cinv(info, M68K_INS_CINVL);
1665
597
}
1666
1667
static void d68000_clr_8(m68k_info *info)
1668
334
{
1669
334
  build_ea(info, M68K_INS_CLR, 1);
1670
334
}
1671
1672
static void d68000_clr_16(m68k_info *info)
1673
966
{
1674
966
  build_ea(info, M68K_INS_CLR, 2);
1675
966
}
1676
1677
static void d68000_clr_32(m68k_info *info)
1678
368
{
1679
368
  build_ea(info, M68K_INS_CLR, 4);
1680
368
}
1681
1682
static void d68000_cmp_8(m68k_info *info)
1683
962
{
1684
962
  build_er_1(info, M68K_INS_CMP, 1);
1685
962
}
1686
1687
static void d68000_cmp_16(m68k_info *info)
1688
1.04k
{
1689
1.04k
  build_er_1(info, M68K_INS_CMP, 2);
1690
1.04k
}
1691
1692
static void d68000_cmp_32(m68k_info *info)
1693
2.29k
{
1694
2.29k
  build_er_1(info, M68K_INS_CMP, 4);
1695
2.29k
}
1696
1697
static void d68000_cmpa_16(m68k_info *info)
1698
790
{
1699
790
  build_ea_a(info, M68K_INS_CMPA, 2);
1700
790
}
1701
1702
static void d68000_cmpa_32(m68k_info *info)
1703
765
{
1704
765
  build_ea_a(info, M68K_INS_CMPA, 4);
1705
765
}
1706
1707
static void d68000_cmpi_8(m68k_info *info)
1708
453
{
1709
453
  build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info));
1710
453
}
1711
1712
static void d68020_cmpi_pcdi_8(m68k_info *info)
1713
447
{
1714
447
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1715
361
  build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info));
1716
361
}
1717
1718
static void d68020_cmpi_pcix_8(m68k_info *info)
1719
356
{
1720
356
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1721
84
  build_imm_ea(info, M68K_INS_CMPI, 1, read_imm_8(info));
1722
84
}
1723
1724
static void d68000_cmpi_16(m68k_info *info)
1725
670
{
1726
670
  build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info));
1727
670
}
1728
1729
static void d68020_cmpi_pcdi_16(m68k_info *info)
1730
349
{
1731
349
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1732
230
  build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info));
1733
230
}
1734
1735
static void d68020_cmpi_pcix_16(m68k_info *info)
1736
265
{
1737
265
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1738
115
  build_imm_ea(info, M68K_INS_CMPI, 2, read_imm_16(info));
1739
115
}
1740
1741
static void d68000_cmpi_32(m68k_info *info)
1742
419
{
1743
419
  build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info));
1744
419
}
1745
1746
static void d68020_cmpi_pcdi_32(m68k_info *info)
1747
217
{
1748
217
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1749
119
  build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info));
1750
119
}
1751
1752
static void d68020_cmpi_pcix_32(m68k_info *info)
1753
408
{
1754
408
  LIMIT_CPU_TYPES(info, M68010_PLUS);
1755
100
  build_imm_ea(info, M68K_INS_CMPI, 4, read_imm_32(info));
1756
100
}
1757
1758
static void d68000_cmpm_8(m68k_info *info)
1759
515
{
1760
515
  build_pi_pi(info, M68K_INS_CMPM, 1);
1761
515
}
1762
1763
static void d68000_cmpm_16(m68k_info *info)
1764
1.08k
{
1765
1.08k
  build_pi_pi(info, M68K_INS_CMPM, 2);
1766
1.08k
}
1767
1768
static void d68000_cmpm_32(m68k_info *info)
1769
514
{
1770
514
  build_pi_pi(info, M68K_INS_CMPM, 4);
1771
514
}
1772
1773
static void make_cpbcc_operand(cs_m68k_op* op, int size, int displacement)
1774
5.44k
{
1775
5.44k
  op->address_mode = M68K_AM_BRANCH_DISPLACEMENT;
1776
5.44k
  op->type = M68K_OP_BR_DISP;
1777
5.44k
  op->br_disp.disp = displacement;
1778
5.44k
  op->br_disp.disp_size = size;
1779
5.44k
}
1780
1781
static void d68020_cpbcc_16(m68k_info *info)
1782
2.92k
{
1783
2.92k
  cs_m68k_op* op0;
1784
2.92k
  cs_m68k* ext;
1785
2.92k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1786
1787
  // FNOP is a special case of FBF
1788
2.29k
  if (info->ir == 0xf280 && peek_imm_16(info) == 0) {
1789
243
    MCInst_setOpcode(info->inst, M68K_INS_FNOP);
1790
243
    info->pc += 2;
1791
243
    return;
1792
243
  }
1793
1794
  // these are all in row with the extension so just doing a add here is fine
1795
2.05k
  info->inst->Opcode += (info->ir & 0x2f);
1796
1797
2.05k
  ext = build_init_op(info, M68K_INS_FBF, 1, 2);
1798
2.05k
  op0 = &ext->operands[0];
1799
1800
2.05k
  make_cpbcc_operand(op0, M68K_OP_BR_DISP_SIZE_WORD, make_int_16(read_imm_16(info)));
1801
1802
2.05k
  set_insn_group(info, M68K_GRP_JUMP);
1803
2.05k
  set_insn_group(info, M68K_GRP_BRANCH_RELATIVE);
1804
2.05k
}
1805
1806
static void d68020_cpbcc_32(m68k_info *info)
1807
4.00k
{
1808
4.00k
  cs_m68k* ext;
1809
4.00k
  cs_m68k_op* op0;
1810
1811
4.00k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1812
1813
  // these are all in row with the extension so just doing a add here is fine
1814
2.42k
  info->inst->Opcode += (info->ir & 0x2f);
1815
1816
2.42k
  ext = build_init_op(info, M68K_INS_FBF, 1, 4);
1817
2.42k
  op0 = &ext->operands[0];
1818
1819
2.42k
  make_cpbcc_operand(op0, M68K_OP_BR_DISP_SIZE_LONG, read_imm_32(info));
1820
1821
2.42k
  set_insn_group(info, M68K_GRP_JUMP);
1822
2.42k
  set_insn_group(info, M68K_GRP_BRANCH_RELATIVE);
1823
2.42k
}
1824
1825
static void d68020_cpdbcc(m68k_info *info)
1826
1.50k
{
1827
1.50k
  cs_m68k* ext;
1828
1.50k
  cs_m68k_op* op0;
1829
1.50k
  cs_m68k_op* op1;
1830
1.50k
  uint32_t ext1, ext2;
1831
1832
1.50k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1833
1834
971
  ext1 = read_imm_16(info);
1835
971
  ext2 = read_imm_16(info);
1836
1837
  // these are all in row with the extension so just doing a add here is fine
1838
971
  info->inst->Opcode += (ext1 & 0x2f);
1839
1840
971
  ext = build_init_op(info, M68K_INS_FDBF, 2, 0);
1841
971
  op0 = &ext->operands[0];
1842
971
  op1 = &ext->operands[1];
1843
1844
971
  op0->reg = M68K_REG_D0 + (info->ir & 7);
1845
1846
971
  make_cpbcc_operand(op1, M68K_OP_BR_DISP_SIZE_WORD, make_int_16(ext2) + 2);
1847
1848
971
  set_insn_group(info, M68K_GRP_JUMP);
1849
971
  set_insn_group(info, M68K_GRP_BRANCH_RELATIVE);
1850
971
}
1851
1852
static void fmove_fpcr(m68k_info *info, uint32_t extension)
1853
2.31k
{
1854
2.31k
  cs_m68k_op* special;
1855
2.31k
  cs_m68k_op* op_ea;
1856
1857
2.31k
  int regsel = (extension >> 10) & 0x7;
1858
2.31k
  int dir = (extension >> 13) & 0x1;
1859
1860
2.31k
  cs_m68k* ext = build_init_op(info, M68K_INS_FMOVE, 2, 4);
1861
1862
2.31k
  special = &ext->operands[0];
1863
2.31k
  op_ea = &ext->operands[1];
1864
1865
2.31k
  if (!dir) {
1866
1.13k
    cs_m68k_op* t = special;
1867
1.13k
    special = op_ea;
1868
1.13k
    op_ea = t;
1869
1.13k
  }
1870
1871
2.31k
  get_ea_mode_op(info, op_ea, info->ir, 4);
1872
1873
2.31k
  if (regsel & 4)
1874
845
    special->reg = M68K_REG_FPCR;
1875
1.46k
  else if (regsel & 2)
1876
356
    special->reg = M68K_REG_FPSR;
1877
1.11k
  else if (regsel & 1)
1878
277
    special->reg = M68K_REG_FPIAR;
1879
2.31k
}
1880
1881
static void fmovem(m68k_info *info, uint32_t extension)
1882
3.25k
{
1883
3.25k
  cs_m68k_op* op_reglist;
1884
3.25k
  cs_m68k_op* op_ea;
1885
3.25k
  int dir = (extension >> 13) & 0x1;
1886
3.25k
  int mode = (extension >> 11) & 0x3;
1887
3.25k
  uint32_t reglist = extension & 0xff;
1888
3.25k
  cs_m68k* ext = build_init_op(info, M68K_INS_FMOVEM, 2, 0);
1889
1890
3.25k
  op_reglist = &ext->operands[0];
1891
3.25k
  op_ea = &ext->operands[1];
1892
1893
  // flip args around
1894
1895
3.25k
  if (!dir) {
1896
834
    cs_m68k_op* t = op_reglist;
1897
834
    op_reglist = op_ea;
1898
834
    op_ea = t;
1899
834
  }
1900
1901
3.25k
  get_ea_mode_op(info, op_ea, info->ir, 0);
1902
1903
3.25k
  switch (mode) {
1904
118
    case 1 : // Dynamic list in dn register
1905
118
      op_reglist->reg = M68K_REG_D0 + ((reglist >> 4) & 7);
1906
118
      break;
1907
1908
893
    case 0 :
1909
893
      op_reglist->address_mode = M68K_AM_NONE;
1910
893
      op_reglist->type = M68K_OP_REG_BITS;
1911
893
      op_reglist->register_bits = reglist << 16;
1912
893
      break;
1913
1914
1.79k
    case 2 : // Static list
1915
1.79k
      op_reglist->address_mode = M68K_AM_NONE;
1916
1.79k
      op_reglist->type = M68K_OP_REG_BITS;
1917
1.79k
      op_reglist->register_bits = ((uint32_t)reverse_bits_8(reglist)) << 16;
1918
1.79k
      break;
1919
3.25k
  }
1920
3.25k
}
1921
1922
static void d68020_cpgen(m68k_info *info)
1923
23.0k
{
1924
23.0k
  cs_m68k *ext;
1925
23.0k
  cs_m68k_op* op0;
1926
23.0k
  cs_m68k_op* op1;
1927
23.0k
  bool supports_single_op;
1928
23.0k
  uint32_t next;
1929
23.0k
  int rm, src, dst, opmode;
1930
1931
1932
23.0k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
1933
1934
21.7k
  supports_single_op = true;
1935
1936
21.7k
  next = read_imm_16(info);
1937
1938
21.7k
  rm = (next >> 14) & 0x1;
1939
21.7k
  src = (next >> 10) & 0x7;
1940
21.7k
  dst = (next >> 7) & 0x7;
1941
21.7k
  opmode = next & 0x3f;
1942
1943
  // special handling for fmovecr
1944
1945
21.7k
  if (BITFIELD(info->ir, 5, 0) == 0 && BITFIELD(next, 15, 10) == 0x17) {
1946
535
    cs_m68k_op* op0;
1947
535
    cs_m68k_op* op1;
1948
535
    cs_m68k* ext = build_init_op(info, M68K_INS_FMOVECR, 2, 0);
1949
1950
535
    op0 = &ext->operands[0];
1951
535
    op1 = &ext->operands[1];
1952
1953
535
    op0->address_mode = M68K_AM_IMMEDIATE;
1954
535
    op0->type = M68K_OP_IMM;
1955
535
    op0->imm = next & 0x3f;
1956
1957
535
    op1->reg = M68K_REG_FP0 + ((next >> 7) & 7);
1958
1959
535
    return;
1960
535
  }
1961
1962
  // deal with extended move stuff
1963
1964
21.2k
  switch ((next >> 13) & 0x7) {
1965
    // fmovem fpcr
1966
1.13k
    case 0x4: // FMOVEM ea, FPCR
1967
2.31k
    case 0x5: // FMOVEM FPCR, ea
1968
2.31k
      fmove_fpcr(info, next);
1969
2.31k
      return;
1970
1971
    // fmovem list
1972
834
    case 0x6:
1973
3.25k
    case 0x7:
1974
3.25k
      fmovem(info, next);
1975
3.25k
      return;
1976
21.2k
  }
1977
1978
  // See comment bellow on why this is being done
1979
1980
15.6k
  if ((next >> 6) & 1)
1981
6.75k
    opmode &= ~4;
1982
1983
  // special handling of some instructions here
1984
1985
15.6k
  switch (opmode) {
1986
1.69k
    case 0x00: MCInst_setOpcode(info->inst, M68K_INS_FMOVE); supports_single_op = false; break;
1987
838
    case 0x01: MCInst_setOpcode(info->inst, M68K_INS_FINT); break;
1988
218
    case 0x02: MCInst_setOpcode(info->inst, M68K_INS_FSINH); break;
1989
360
    case 0x03: MCInst_setOpcode(info->inst, M68K_INS_FINTRZ); break;
1990
110
    case 0x04: MCInst_setOpcode(info->inst, M68K_INS_FSQRT); break;
1991
110
    case 0x06: MCInst_setOpcode(info->inst, M68K_INS_FLOGNP1); break;
1992
540
    case 0x08: MCInst_setOpcode(info->inst, M68K_INS_FETOXM1); break;
1993
306
    case 0x09: MCInst_setOpcode(info->inst, M68K_INS_FATANH); break;
1994
161
    case 0x0a: MCInst_setOpcode(info->inst, M68K_INS_FATAN); break;
1995
143
    case 0x0c: MCInst_setOpcode(info->inst, M68K_INS_FASIN); break;
1996
361
    case 0x0d: MCInst_setOpcode(info->inst, M68K_INS_FATANH); break;
1997
270
    case 0x0e: MCInst_setOpcode(info->inst, M68K_INS_FSIN); break;
1998
152
    case 0x0f: MCInst_setOpcode(info->inst, M68K_INS_FTAN); break;
1999
597
    case 0x10: MCInst_setOpcode(info->inst, M68K_INS_FETOX); break;
2000
447
    case 0x11: MCInst_setOpcode(info->inst, M68K_INS_FTWOTOX); break;
2001
538
    case 0x12: MCInst_setOpcode(info->inst, M68K_INS_FTENTOX); break;
2002
788
    case 0x14: MCInst_setOpcode(info->inst, M68K_INS_FLOGN); break;
2003
226
    case 0x15: MCInst_setOpcode(info->inst, M68K_INS_FLOG10); break;
2004
90
    case 0x16: MCInst_setOpcode(info->inst, M68K_INS_FLOG2); break;
2005
431
    case 0x18: MCInst_setOpcode(info->inst, M68K_INS_FABS); break;
2006
398
    case 0x19: MCInst_setOpcode(info->inst, M68K_INS_FCOSH); break;
2007
129
    case 0x1a: MCInst_setOpcode(info->inst, M68K_INS_FNEG); break;
2008
363
    case 0x1c: MCInst_setOpcode(info->inst, M68K_INS_FACOS); break;
2009
399
    case 0x1d: MCInst_setOpcode(info->inst, M68K_INS_FCOS); break;
2010
324
    case 0x1e: MCInst_setOpcode(info->inst, M68K_INS_FGETEXP); break;
2011
216
    case 0x1f: MCInst_setOpcode(info->inst, M68K_INS_FGETMAN); break;
2012
285
    case 0x20: MCInst_setOpcode(info->inst, M68K_INS_FDIV); supports_single_op = false; break;
2013
339
    case 0x21: MCInst_setOpcode(info->inst, M68K_INS_FMOD); supports_single_op = false; break;
2014
903
    case 0x22: MCInst_setOpcode(info->inst, M68K_INS_FADD); supports_single_op = false; break;
2015
485
    case 0x23: MCInst_setOpcode(info->inst, M68K_INS_FMUL); supports_single_op = false; break;
2016
469
    case 0x24: MCInst_setOpcode(info->inst, M68K_INS_FSGLDIV); supports_single_op = false; break;
2017
88
    case 0x25: MCInst_setOpcode(info->inst, M68K_INS_FREM); break;
2018
325
    case 0x26: MCInst_setOpcode(info->inst, M68K_INS_FSCALE); break;
2019
234
    case 0x27: MCInst_setOpcode(info->inst, M68K_INS_FSGLMUL); break;
2020
164
    case 0x28: MCInst_setOpcode(info->inst, M68K_INS_FSUB); supports_single_op = false; break;
2021
240
    case 0x38: MCInst_setOpcode(info->inst, M68K_INS_FCMP); supports_single_op = false; break;
2022
748
    case 0x3a: MCInst_setOpcode(info->inst, M68K_INS_FTST); break;
2023
1.20k
    default:
2024
1.20k
      break;
2025
15.6k
  }
2026
2027
  // Some trickery here! It's not documented but if bit 6 is set this is a s/d opcode and then
2028
  // if bit 2 is set it's a d. As we already have set our opcode in the code above we can just
2029
  // offset it as the following 2 op codes (if s/d is supported) will always be directly after it
2030
2031
15.6k
  if ((next >> 6) & 1) {
2032
6.75k
    if ((next >> 2) & 1)
2033
3.29k
      info->inst->Opcode += 2;
2034
3.46k
    else
2035
3.46k
      info->inst->Opcode += 1;
2036
6.75k
  }
2037
2038
15.6k
  ext = &info->extension;
2039
2040
15.6k
  ext->op_count = 2;
2041
15.6k
  ext->op_size.type = M68K_SIZE_TYPE_CPU;
2042
15.6k
  ext->op_size.cpu_size = 0;
2043
2044
  // Special case - adjust direction of fmove
2045
15.6k
  if ((opmode == 0x00) && ((next >> 13) & 0x1) != 0) {
2046
443
    op0 = &ext->operands[1];
2047
443
    op1 = &ext->operands[0];
2048
15.2k
  } else {
2049
15.2k
    op0 = &ext->operands[0];
2050
15.2k
    op1 = &ext->operands[1];
2051
15.2k
  }
2052
2053
15.6k
  if (rm == 0 && supports_single_op && src == dst) {
2054
2.37k
    ext->op_count = 1;
2055
2.37k
    op0->reg = M68K_REG_FP0 + dst;
2056
2.37k
    return;
2057
2.37k
  }
2058
2059
13.3k
  if (rm == 1) {
2060
5.66k
    switch (src) {
2061
913
      case 0x00 :
2062
913
        ext->op_size.cpu_size = M68K_CPU_SIZE_LONG;
2063
913
        get_ea_mode_op(info, op0, info->ir, 4);
2064
913
        break;
2065
2066
716
      case 0x06 :
2067
716
        ext->op_size.cpu_size = M68K_CPU_SIZE_BYTE;
2068
716
        get_ea_mode_op(info, op0, info->ir, 1);
2069
716
        break;
2070
2071
491
      case 0x04 :
2072
491
        ext->op_size.cpu_size = M68K_CPU_SIZE_WORD;
2073
491
        get_ea_mode_op(info, op0, info->ir, 2);
2074
491
        break;
2075
2076
1.08k
      case 0x01 :
2077
1.08k
        ext->op_size.type = M68K_SIZE_TYPE_FPU;
2078
1.08k
        ext->op_size.fpu_size = M68K_FPU_SIZE_SINGLE;
2079
1.08k
        get_ea_mode_op(info, op0, info->ir, 4);
2080
1.08k
        op0->type = M68K_OP_FP_SINGLE;
2081
1.08k
        break;
2082
2083
1.19k
      case 0x05:
2084
1.19k
        ext->op_size.type = M68K_SIZE_TYPE_FPU;
2085
1.19k
        ext->op_size.fpu_size = M68K_FPU_SIZE_DOUBLE;
2086
1.19k
        get_ea_mode_op(info, op0, info->ir, 8);
2087
1.19k
        op0->type = M68K_OP_FP_DOUBLE;
2088
1.19k
        break;
2089
2090
1.26k
      default :
2091
1.26k
        ext->op_size.type = M68K_SIZE_TYPE_FPU;
2092
1.26k
        ext->op_size.fpu_size = M68K_FPU_SIZE_EXTENDED;
2093
1.26k
        break;
2094
5.66k
    }
2095
7.66k
  } else {
2096
7.66k
    op0->reg = M68K_REG_FP0 + src;
2097
7.66k
  }
2098
2099
13.3k
  op1->reg = M68K_REG_FP0 + dst;
2100
13.3k
}
2101
2102
static void d68020_cprestore(m68k_info *info)
2103
1.51k
{
2104
1.51k
  cs_m68k* ext;
2105
1.51k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2106
2107
960
  ext = build_init_op(info, M68K_INS_FRESTORE, 1, 0);
2108
960
  get_ea_mode_op(info, &ext->operands[0], info->ir, 1);
2109
960
}
2110
2111
static void d68020_cpsave(m68k_info *info)
2112
1.66k
{
2113
1.66k
  cs_m68k* ext;
2114
2115
1.66k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2116
2117
1.02k
  ext = build_init_op(info, M68K_INS_FSAVE, 1, 0);
2118
1.02k
  get_ea_mode_op(info, &ext->operands[0], info->ir, 1);
2119
1.02k
}
2120
2121
static void d68020_cpscc(m68k_info *info)
2122
1.70k
{
2123
1.70k
  cs_m68k* ext;
2124
2125
1.70k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2126
1.02k
  ext = build_init_op(info, M68K_INS_FSF, 1, 1);
2127
2128
  // these are all in row with the extension so just doing a add here is fine
2129
1.02k
  info->inst->Opcode += (read_imm_16(info) & 0x2f);
2130
2131
1.02k
  get_ea_mode_op(info, &ext->operands[0], info->ir, 1);
2132
1.02k
}
2133
2134
static void d68020_cptrapcc_0(m68k_info *info)
2135
635
{
2136
635
  uint32_t extension1;
2137
635
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2138
2139
293
  extension1 = read_imm_16(info);
2140
2141
293
  build_init_op(info, M68K_INS_FTRAPF, 0, 0);
2142
2143
  // these are all in row with the extension so just doing a add here is fine
2144
293
  info->inst->Opcode += (extension1 & 0x2f);
2145
293
}
2146
2147
static void d68020_cptrapcc_16(m68k_info *info)
2148
519
{
2149
519
  uint32_t extension1, extension2;
2150
519
  cs_m68k_op* op0;
2151
519
  cs_m68k* ext;
2152
2153
519
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2154
2155
291
  extension1 = read_imm_16(info);
2156
291
  extension2 = read_imm_16(info);
2157
2158
291
  ext = build_init_op(info, M68K_INS_FTRAPF, 1, 2);
2159
2160
  // these are all in row with the extension so just doing a add here is fine
2161
291
  info->inst->Opcode += (extension1 & 0x2f);
2162
2163
291
  op0 = &ext->operands[0];
2164
2165
291
  op0->address_mode = M68K_AM_IMMEDIATE;
2166
291
  op0->type = M68K_OP_IMM;
2167
291
  op0->imm = extension2;
2168
291
}
2169
2170
static void d68020_cptrapcc_32(m68k_info *info)
2171
489
{
2172
489
  uint32_t extension1, extension2;
2173
489
  cs_m68k* ext;
2174
489
  cs_m68k_op* op0;
2175
2176
489
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2177
2178
281
  extension1 = read_imm_16(info);
2179
281
  extension2 = read_imm_32(info);
2180
2181
281
  ext = build_init_op(info, M68K_INS_FTRAPF, 1, 2);
2182
2183
  // these are all in row with the extension so just doing a add here is fine
2184
281
  info->inst->Opcode += (extension1 & 0x2f);
2185
2186
281
  op0 = &ext->operands[0];
2187
2188
281
  op0->address_mode = M68K_AM_IMMEDIATE;
2189
281
  op0->type = M68K_OP_IMM;
2190
281
  op0->imm = extension2;
2191
281
}
2192
2193
static void d68040_cpush(m68k_info *info)
2194
1.50k
{
2195
1.50k
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2196
1.12k
  build_cpush_cinv(info, M68K_INS_CPUSHL);
2197
1.12k
}
2198
2199
static void d68000_dbra(m68k_info *info)
2200
573
{
2201
573
  build_dbxx(info, M68K_INS_DBRA, 0, make_int_16(read_imm_16(info)));
2202
573
}
2203
2204
static void d68000_dbcc(m68k_info *info)
2205
468
{
2206
468
  build_dbcc(info, 0, make_int_16(read_imm_16(info)));
2207
468
}
2208
2209
static void d68000_divs(m68k_info *info)
2210
1.92k
{
2211
1.92k
  build_er_1(info, M68K_INS_DIVS, 2);
2212
1.92k
}
2213
2214
static void d68000_divu(m68k_info *info)
2215
1.32k
{
2216
1.32k
  build_er_1(info, M68K_INS_DIVU, 2);
2217
1.32k
}
2218
2219
static void d68020_divl(m68k_info *info)
2220
507
{
2221
507
  uint32_t extension, insn_signed;
2222
507
  cs_m68k* ext;
2223
507
  cs_m68k_op* op0;
2224
507
  cs_m68k_op* op1;
2225
507
  uint32_t reg_0, reg_1;
2226
2227
507
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2228
2229
380
  extension = read_imm_16(info);
2230
380
  insn_signed = 0;
2231
2232
380
  if (BIT_B((extension)))
2233
153
    insn_signed = 1;
2234
2235
380
  ext = build_init_op(info, insn_signed ? M68K_INS_DIVS : M68K_INS_DIVU, 2, 4);
2236
2237
380
  op0 = &ext->operands[0];
2238
380
  op1 = &ext->operands[1];
2239
2240
380
  get_ea_mode_op(info, op0, info->ir, 4);
2241
2242
380
  reg_0 = extension & 7;
2243
380
  reg_1 = (extension >> 12) & 7;
2244
2245
380
  op1->address_mode = M68K_AM_NONE;
2246
380
  op1->type = M68K_OP_REG_PAIR;
2247
380
  op1->reg_pair.reg_0 = reg_0 + M68K_REG_D0;
2248
380
  op1->reg_pair.reg_1 = reg_1 + M68K_REG_D0;
2249
2250
380
  if ((reg_0 == reg_1) || !BIT_A(extension)) {
2251
288
    op1->type = M68K_OP_REG;
2252
288
    op1->reg = M68K_REG_D0 + reg_1;
2253
288
  }
2254
380
}
2255
2256
static void d68000_eor_8(m68k_info *info)
2257
959
{
2258
959
  build_re_1(info, M68K_INS_EOR, 1);
2259
959
}
2260
2261
static void d68000_eor_16(m68k_info *info)
2262
872
{
2263
872
  build_re_1(info, M68K_INS_EOR, 2);
2264
872
}
2265
2266
static void d68000_eor_32(m68k_info *info)
2267
1.86k
{
2268
1.86k
  build_re_1(info, M68K_INS_EOR, 4);
2269
1.86k
}
2270
2271
static void d68000_eori_8(m68k_info *info)
2272
432
{
2273
432
  build_imm_ea(info, M68K_INS_EORI, 1, read_imm_8(info));
2274
432
}
2275
2276
static void d68000_eori_16(m68k_info *info)
2277
340
{
2278
340
  build_imm_ea(info, M68K_INS_EORI, 2, read_imm_16(info));
2279
340
}
2280
2281
static void d68000_eori_32(m68k_info *info)
2282
312
{
2283
312
  build_imm_ea(info, M68K_INS_EORI, 4, read_imm_32(info));
2284
312
}
2285
2286
static void d68000_eori_to_ccr(m68k_info *info)
2287
100
{
2288
100
  build_imm_special_reg(info, M68K_INS_EORI, read_imm_8(info), 1, M68K_REG_CCR);
2289
100
}
2290
2291
static void d68000_eori_to_sr(m68k_info *info)
2292
227
{
2293
227
  build_imm_special_reg(info, M68K_INS_EORI, read_imm_16(info), 2, M68K_REG_SR);
2294
227
}
2295
2296
static void d68000_exg_dd(m68k_info *info)
2297
381
{
2298
381
  build_r(info, M68K_INS_EXG, 4);
2299
381
}
2300
2301
static void d68000_exg_aa(m68k_info *info)
2302
378
{
2303
378
  cs_m68k_op* op0;
2304
378
  cs_m68k_op* op1;
2305
378
  cs_m68k* ext = build_init_op(info, M68K_INS_EXG, 2, 4);
2306
2307
378
  op0 = &ext->operands[0];
2308
378
  op1 = &ext->operands[1];
2309
2310
378
  op0->address_mode = M68K_AM_NONE;
2311
378
  op0->reg = M68K_REG_A0 + ((info->ir >> 9) & 7);
2312
2313
378
  op1->address_mode = M68K_AM_NONE;
2314
378
  op1->reg = M68K_REG_A0 + (info->ir & 7);
2315
378
}
2316
2317
static void d68000_exg_da(m68k_info *info)
2318
543
{
2319
543
  cs_m68k_op* op0;
2320
543
  cs_m68k_op* op1;
2321
543
  cs_m68k* ext = build_init_op(info, M68K_INS_EXG, 2, 4);
2322
2323
543
  op0 = &ext->operands[0];
2324
543
  op1 = &ext->operands[1];
2325
2326
543
  op0->address_mode = M68K_AM_NONE;
2327
543
  op0->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
2328
2329
543
  op1->address_mode = M68K_AM_NONE;
2330
543
  op1->reg = M68K_REG_A0 + (info->ir & 7);
2331
543
}
2332
2333
static void d68000_ext_16(m68k_info *info)
2334
670
{
2335
670
  build_d(info, M68K_INS_EXT, 2);
2336
670
}
2337
2338
static void d68000_ext_32(m68k_info *info)
2339
256
{
2340
256
  build_d(info, M68K_INS_EXT, 4);
2341
256
}
2342
2343
static void d68020_extb_32(m68k_info *info)
2344
640
{
2345
640
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2346
359
  build_d(info, M68K_INS_EXTB, 4);
2347
359
}
2348
2349
static void d68000_jmp(m68k_info *info)
2350
252
{
2351
252
  cs_m68k* ext = build_init_op(info, M68K_INS_JMP, 1, 0);
2352
252
  set_insn_group(info, M68K_GRP_JUMP);
2353
252
  get_ea_mode_op(info, &ext->operands[0], info->ir, 4);
2354
252
}
2355
2356
static void d68000_jsr(m68k_info *info)
2357
484
{
2358
484
  cs_m68k* ext = build_init_op(info, M68K_INS_JSR, 1, 0);
2359
484
  set_insn_group(info, M68K_GRP_JUMP);
2360
484
  get_ea_mode_op(info, &ext->operands[0], info->ir, 4);
2361
484
}
2362
2363
static void d68000_lea(m68k_info *info)
2364
812
{
2365
812
  build_ea_a(info, M68K_INS_LEA, 4);
2366
812
}
2367
2368
static void d68000_link_16(m68k_info *info)
2369
279
{
2370
279
  build_link(info, read_imm_16(info), 2);
2371
279
}
2372
2373
static void d68020_link_32(m68k_info *info)
2374
450
{
2375
450
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2376
233
  build_link(info, read_imm_32(info), 4);
2377
233
}
2378
2379
static void d68000_lsr_s_8(m68k_info *info)
2380
601
{
2381
601
  build_3bit_d(info, M68K_INS_LSR, 1);
2382
601
}
2383
2384
static void d68000_lsr_s_16(m68k_info *info)
2385
340
{
2386
340
  build_3bit_d(info, M68K_INS_LSR, 2);
2387
340
}
2388
2389
static void d68000_lsr_s_32(m68k_info *info)
2390
462
{
2391
462
  build_3bit_d(info, M68K_INS_LSR, 4);
2392
462
}
2393
2394
static void d68000_lsr_r_8(m68k_info *info)
2395
120
{
2396
120
  build_r(info, M68K_INS_LSR, 1);
2397
120
}
2398
2399
static void d68000_lsr_r_16(m68k_info *info)
2400
210
{
2401
210
  build_r(info, M68K_INS_LSR, 2);
2402
210
}
2403
2404
static void d68000_lsr_r_32(m68k_info *info)
2405
710
{
2406
710
  build_r(info, M68K_INS_LSR, 4);
2407
710
}
2408
2409
static void d68000_lsr_ea(m68k_info *info)
2410
737
{
2411
737
  build_ea(info, M68K_INS_LSR, 2);
2412
737
}
2413
2414
static void d68000_lsl_s_8(m68k_info *info)
2415
553
{
2416
553
  build_3bit_d(info, M68K_INS_LSL, 1);
2417
553
}
2418
2419
static void d68000_lsl_s_16(m68k_info *info)
2420
328
{
2421
328
  build_3bit_d(info, M68K_INS_LSL, 2);
2422
328
}
2423
2424
static void d68000_lsl_s_32(m68k_info *info)
2425
655
{
2426
655
  build_3bit_d(info, M68K_INS_LSL, 4);
2427
655
}
2428
2429
static void d68000_lsl_r_8(m68k_info *info)
2430
369
{
2431
369
  build_r(info, M68K_INS_LSL, 1);
2432
369
}
2433
2434
static void d68000_lsl_r_16(m68k_info *info)
2435
638
{
2436
638
  build_r(info, M68K_INS_LSL, 2);
2437
638
}
2438
2439
static void d68000_lsl_r_32(m68k_info *info)
2440
281
{
2441
281
  build_r(info, M68K_INS_LSL, 4);
2442
281
}
2443
2444
static void d68000_lsl_ea(m68k_info *info)
2445
558
{
2446
558
  build_ea(info, M68K_INS_LSL, 2);
2447
558
}
2448
2449
static void d68000_move_8(m68k_info *info)
2450
9.45k
{
2451
9.45k
  build_ea_ea(info, M68K_INS_MOVE, 1);
2452
9.45k
}
2453
2454
static void d68000_move_16(m68k_info *info)
2455
8.92k
{
2456
8.92k
  build_ea_ea(info, M68K_INS_MOVE, 2);
2457
8.92k
}
2458
2459
static void d68000_move_32(m68k_info *info)
2460
15.3k
{
2461
15.3k
  build_ea_ea(info, M68K_INS_MOVE, 4);
2462
15.3k
}
2463
2464
static void d68000_movea_16(m68k_info *info)
2465
1.96k
{
2466
1.96k
  build_ea_a(info, M68K_INS_MOVEA, 2);
2467
1.96k
}
2468
2469
static void d68000_movea_32(m68k_info *info)
2470
2.60k
{
2471
2.60k
  build_ea_a(info, M68K_INS_MOVEA, 4);
2472
2.60k
}
2473
2474
static void d68000_move_to_ccr(m68k_info *info)
2475
117
{
2476
117
  cs_m68k_op* op0;
2477
117
  cs_m68k_op* op1;
2478
117
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2);
2479
2480
117
  op0 = &ext->operands[0];
2481
117
  op1 = &ext->operands[1];
2482
2483
117
  get_ea_mode_op(info, op0, info->ir, 1);
2484
2485
117
  op1->address_mode = M68K_AM_NONE;
2486
117
  op1->reg = M68K_REG_CCR;
2487
117
}
2488
2489
static void d68010_move_fr_ccr(m68k_info *info)
2490
1.11k
{
2491
1.11k
  cs_m68k_op* op0;
2492
1.11k
  cs_m68k_op* op1;
2493
1.11k
  cs_m68k* ext;
2494
2495
1.11k
  LIMIT_CPU_TYPES(info, M68010_PLUS);
2496
2497
570
  ext = build_init_op(info, M68K_INS_MOVE, 2, 2);
2498
2499
570
  op0 = &ext->operands[0];
2500
570
  op1 = &ext->operands[1];
2501
2502
570
  op0->address_mode = M68K_AM_NONE;
2503
570
  op0->reg = M68K_REG_CCR;
2504
2505
570
  get_ea_mode_op(info, op1, info->ir, 1);
2506
570
}
2507
2508
static void d68000_move_fr_sr(m68k_info *info)
2509
593
{
2510
593
  cs_m68k_op* op0;
2511
593
  cs_m68k_op* op1;
2512
593
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2);
2513
2514
593
  op0 = &ext->operands[0];
2515
593
  op1 = &ext->operands[1];
2516
2517
593
  op0->address_mode = M68K_AM_NONE;
2518
593
  op0->reg = M68K_REG_SR;
2519
2520
593
  get_ea_mode_op(info, op1, info->ir, 2);
2521
593
}
2522
2523
static void d68000_move_to_sr(m68k_info *info)
2524
450
{
2525
450
  cs_m68k_op* op0;
2526
450
  cs_m68k_op* op1;
2527
450
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 2);
2528
2529
450
  op0 = &ext->operands[0];
2530
450
  op1 = &ext->operands[1];
2531
2532
450
  get_ea_mode_op(info, op0, info->ir, 2);
2533
2534
450
  op1->address_mode = M68K_AM_NONE;
2535
450
  op1->reg = M68K_REG_SR;
2536
450
}
2537
2538
static void d68000_move_fr_usp(m68k_info *info)
2539
373
{
2540
373
  cs_m68k_op* op0;
2541
373
  cs_m68k_op* op1;
2542
373
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 0);
2543
2544
373
  op0 = &ext->operands[0];
2545
373
  op1 = &ext->operands[1];
2546
2547
373
  op0->address_mode = M68K_AM_NONE;
2548
373
  op0->reg = M68K_REG_USP;
2549
2550
373
  op1->address_mode = M68K_AM_NONE;
2551
373
  op1->reg = M68K_REG_A0 + (info->ir & 7);
2552
373
}
2553
2554
static void d68000_move_to_usp(m68k_info *info)
2555
522
{
2556
522
  cs_m68k_op* op0;
2557
522
  cs_m68k_op* op1;
2558
522
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVE, 2, 0);
2559
2560
522
  op0 = &ext->operands[0];
2561
522
  op1 = &ext->operands[1];
2562
2563
522
  op0->address_mode = M68K_AM_NONE;
2564
522
  op0->reg = M68K_REG_A0 + (info->ir & 7);
2565
2566
522
  op1->address_mode = M68K_AM_NONE;
2567
522
  op1->reg = M68K_REG_USP;
2568
522
}
2569
2570
static void d68010_movec(m68k_info *info)
2571
7.63k
{
2572
7.63k
  uint32_t extension;
2573
7.63k
  m68k_reg reg;
2574
7.63k
  cs_m68k* ext;
2575
7.63k
  cs_m68k_op* op0;
2576
7.63k
  cs_m68k_op* op1;
2577
2578
2579
7.63k
  LIMIT_CPU_TYPES(info, M68010_PLUS);
2580
2581
7.38k
  extension = read_imm_16(info);
2582
7.38k
  reg = M68K_REG_INVALID;
2583
2584
7.38k
  ext = build_init_op(info, M68K_INS_MOVEC, 2, 0);
2585
2586
7.38k
  op0 = &ext->operands[0];
2587
7.38k
  op1 = &ext->operands[1];
2588
2589
7.38k
  switch (extension & 0xfff) {
2590
261
    case 0x000: reg = M68K_REG_SFC; break;
2591
198
    case 0x001: reg = M68K_REG_DFC; break;
2592
126
    case 0x800: reg = M68K_REG_USP; break;
2593
98
    case 0x801: reg = M68K_REG_VBR; break;
2594
228
    case 0x002: reg = M68K_REG_CACR; break;
2595
218
    case 0x802: reg = M68K_REG_CAAR; break;
2596
1.00k
    case 0x803: reg = M68K_REG_MSP; break;
2597
224
    case 0x804: reg = M68K_REG_ISP; break;
2598
388
    case 0x003: reg = M68K_REG_TC; break;
2599
121
    case 0x004: reg = M68K_REG_ITT0; break;
2600
473
    case 0x005: reg = M68K_REG_ITT1; break;
2601
430
    case 0x006: reg = M68K_REG_DTT0; break;
2602
272
    case 0x007: reg = M68K_REG_DTT1; break;
2603
610
    case 0x805: reg = M68K_REG_MMUSR; break;
2604
332
    case 0x806: reg = M68K_REG_URP; break;
2605
484
    case 0x807: reg = M68K_REG_SRP; break;
2606
7.38k
  }
2607
2608
7.38k
  if (BIT_0(info->ir)) {
2609
2.24k
    op0->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7);
2610
2.24k
    op1->reg = reg;
2611
5.13k
  } else {
2612
5.13k
    op0->reg = reg;
2613
5.13k
    op1->reg = (BIT_F(extension) ? M68K_REG_A0 : M68K_REG_D0) + ((extension >> 12) & 7);
2614
5.13k
  }
2615
7.38k
}
2616
2617
static void d68000_movem_pd_16(m68k_info *info)
2618
691
{
2619
691
  build_movem_re(info, M68K_INS_MOVEM, 2);
2620
691
}
2621
2622
static void d68000_movem_pd_32(m68k_info *info)
2623
359
{
2624
359
  build_movem_re(info, M68K_INS_MOVEM, 4);
2625
359
}
2626
2627
static void d68000_movem_er_16(m68k_info *info)
2628
585
{
2629
585
  build_movem_er(info, M68K_INS_MOVEM, 2);
2630
585
}
2631
2632
static void d68000_movem_er_32(m68k_info *info)
2633
946
{
2634
946
  build_movem_er(info, M68K_INS_MOVEM, 4);
2635
946
}
2636
2637
static void d68000_movem_re_16(m68k_info *info)
2638
1.17k
{
2639
1.17k
  build_movem_re(info, M68K_INS_MOVEM, 2);
2640
1.17k
}
2641
2642
static void d68000_movem_re_32(m68k_info *info)
2643
707
{
2644
707
  build_movem_re(info, M68K_INS_MOVEM, 4);
2645
707
}
2646
2647
static void d68000_movep_re_16(m68k_info *info)
2648
660
{
2649
660
  build_movep_re(info, 2);
2650
660
}
2651
2652
static void d68000_movep_re_32(m68k_info *info)
2653
317
{
2654
317
  build_movep_re(info, 4);
2655
317
}
2656
2657
static void d68000_movep_er_16(m68k_info *info)
2658
1.34k
{
2659
1.34k
  build_movep_er(info, 2);
2660
1.34k
}
2661
2662
static void d68000_movep_er_32(m68k_info *info)
2663
797
{
2664
797
  build_movep_er(info, 4);
2665
797
}
2666
2667
static void d68010_moves_8(m68k_info *info)
2668
368
{
2669
368
  LIMIT_CPU_TYPES(info, M68010_PLUS);
2670
215
  build_moves(info, 1);
2671
215
}
2672
2673
static void d68010_moves_16(m68k_info *info)
2674
299
{
2675
  //uint32_t extension;
2676
299
  LIMIT_CPU_TYPES(info, M68010_PLUS);
2677
178
  build_moves(info, 2);
2678
178
}
2679
2680
static void d68010_moves_32(m68k_info *info)
2681
277
{
2682
277
  LIMIT_CPU_TYPES(info, M68010_PLUS);
2683
139
  build_moves(info, 4);
2684
139
}
2685
2686
static void d68000_moveq(m68k_info *info)
2687
11.8k
{
2688
11.8k
  cs_m68k_op* op0;
2689
11.8k
  cs_m68k_op* op1;
2690
2691
11.8k
  cs_m68k* ext = build_init_op(info, M68K_INS_MOVEQ, 2, 0);
2692
2693
11.8k
  op0 = &ext->operands[0];
2694
11.8k
  op1 = &ext->operands[1];
2695
2696
11.8k
  op0->type = M68K_OP_IMM;
2697
11.8k
  op0->address_mode = M68K_AM_IMMEDIATE;
2698
11.8k
  op0->imm = (info->ir & 0xff);
2699
2700
11.8k
  op1->address_mode = M68K_AM_REG_DIRECT_DATA;
2701
11.8k
  op1->reg = M68K_REG_D0 + ((info->ir >> 9) & 7);
2702
11.8k
}
2703
2704
static void d68040_move16_pi_pi(m68k_info *info)
2705
395
{
2706
395
  int data[] = { info->ir & 7, (read_imm_16(info) >> 12) & 7 };
2707
395
  int modes[] = { M68K_AM_REGI_ADDR_POST_INC, M68K_AM_REGI_ADDR_POST_INC };
2708
2709
395
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2710
2711
170
  build_move16(info, data, modes);
2712
170
}
2713
2714
static void d68040_move16_pi_al(m68k_info *info)
2715
801
{
2716
801
  int data[] = { info->ir & 7, read_imm_32(info) };
2717
801
  int modes[] = { M68K_AM_REGI_ADDR_POST_INC, M68K_AM_ABSOLUTE_DATA_LONG };
2718
2719
801
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2720
2721
450
  build_move16(info, data, modes);
2722
450
}
2723
2724
static void d68040_move16_al_pi(m68k_info *info)
2725
470
{
2726
470
  int data[] = { read_imm_32(info), info->ir & 7 };
2727
470
  int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG, M68K_AM_REGI_ADDR_POST_INC };
2728
2729
470
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2730
2731
328
  build_move16(info, data, modes);
2732
328
}
2733
2734
static void d68040_move16_ai_al(m68k_info *info)
2735
369
{
2736
369
  int data[] = { info->ir & 7, read_imm_32(info) };
2737
369
  int modes[] = { M68K_AM_REG_DIRECT_ADDR, M68K_AM_ABSOLUTE_DATA_LONG };
2738
2739
369
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2740
2741
268
  build_move16(info, data, modes);
2742
268
}
2743
2744
static void d68040_move16_al_ai(m68k_info *info)
2745
201
{
2746
201
  int data[] = { read_imm_32(info), info->ir & 7 };
2747
201
  int modes[] = { M68K_AM_ABSOLUTE_DATA_LONG, M68K_AM_REG_DIRECT_ADDR };
2748
2749
201
  LIMIT_CPU_TYPES(info, M68040_PLUS);
2750
2751
82
  build_move16(info, data, modes);
2752
82
}
2753
2754
static void d68000_muls(m68k_info *info)
2755
1.56k
{
2756
1.56k
  build_er_1(info, M68K_INS_MULS, 2);
2757
1.56k
}
2758
2759
static void d68000_mulu(m68k_info *info)
2760
1.95k
{
2761
1.95k
  build_er_1(info, M68K_INS_MULU, 2);
2762
1.95k
}
2763
2764
static void d68020_mull(m68k_info *info)
2765
908
{
2766
908
  uint32_t extension, insn_signed;
2767
908
  cs_m68k* ext;
2768
908
  cs_m68k_op* op0;
2769
908
  cs_m68k_op* op1;
2770
908
  uint32_t reg_0, reg_1;
2771
2772
908
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2773
2774
830
  extension = read_imm_16(info);
2775
830
  insn_signed = 0;
2776
2777
830
  if (BIT_B((extension)))
2778
430
    insn_signed = 1;
2779
2780
830
  ext = build_init_op(info, insn_signed ? M68K_INS_MULS : M68K_INS_MULU, 2, 4);
2781
2782
830
  op0 = &ext->operands[0];
2783
830
  op1 = &ext->operands[1];
2784
2785
830
  get_ea_mode_op(info, op0, info->ir, 4);
2786
2787
830
  reg_0 = extension & 7;
2788
830
  reg_1 = (extension >> 12) & 7;
2789
2790
830
  op1->address_mode = M68K_AM_NONE;
2791
830
  op1->type = M68K_OP_REG_PAIR;
2792
830
  op1->reg_pair.reg_0 = reg_0 + M68K_REG_D0;
2793
830
  op1->reg_pair.reg_1 = reg_1 + M68K_REG_D0;
2794
2795
830
  if (!BIT_A(extension)) {
2796
486
    op1->type = M68K_OP_REG;
2797
486
    op1->reg = M68K_REG_D0 + reg_1;
2798
486
  }
2799
830
}
2800
2801
static void d68000_nbcd(m68k_info *info)
2802
815
{
2803
815
  build_ea(info, M68K_INS_NBCD, 1);
2804
815
}
2805
2806
static void d68000_neg_8(m68k_info *info)
2807
453
{
2808
453
  build_ea(info, M68K_INS_NEG, 1);
2809
453
}
2810
2811
static void d68000_neg_16(m68k_info *info)
2812
724
{
2813
724
  build_ea(info, M68K_INS_NEG, 2);
2814
724
}
2815
2816
static void d68000_neg_32(m68k_info *info)
2817
552
{
2818
552
  build_ea(info, M68K_INS_NEG, 4);
2819
552
}
2820
2821
static void d68000_negx_8(m68k_info *info)
2822
550
{
2823
550
  build_ea(info, M68K_INS_NEGX, 1);
2824
550
}
2825
2826
static void d68000_negx_16(m68k_info *info)
2827
738
{
2828
738
  build_ea(info, M68K_INS_NEGX, 2);
2829
738
}
2830
2831
static void d68000_negx_32(m68k_info *info)
2832
514
{
2833
514
  build_ea(info, M68K_INS_NEGX, 4);
2834
514
}
2835
2836
static void d68000_nop(m68k_info *info)
2837
72
{
2838
72
  MCInst_setOpcode(info->inst, M68K_INS_NOP);
2839
72
}
2840
2841
static void d68000_not_8(m68k_info *info)
2842
459
{
2843
459
  build_ea(info, M68K_INS_NOT, 1);
2844
459
}
2845
2846
static void d68000_not_16(m68k_info *info)
2847
1.02k
{
2848
1.02k
  build_ea(info, M68K_INS_NOT, 2);
2849
1.02k
}
2850
2851
static void d68000_not_32(m68k_info *info)
2852
320
{
2853
320
  build_ea(info, M68K_INS_NOT, 4);
2854
320
}
2855
2856
static void d68000_or_er_8(m68k_info *info)
2857
1.65k
{
2858
1.65k
  build_er_1(info, M68K_INS_OR, 1);
2859
1.65k
}
2860
2861
static void d68000_or_er_16(m68k_info *info)
2862
645
{
2863
645
  build_er_1(info, M68K_INS_OR, 2);
2864
645
}
2865
2866
static void d68000_or_er_32(m68k_info *info)
2867
2.84k
{
2868
2.84k
  build_er_1(info, M68K_INS_OR, 4);
2869
2.84k
}
2870
2871
static void d68000_or_re_8(m68k_info *info)
2872
693
{
2873
693
  build_re_1(info, M68K_INS_OR, 1);
2874
693
}
2875
2876
static void d68000_or_re_16(m68k_info *info)
2877
785
{
2878
785
  build_re_1(info, M68K_INS_OR, 2);
2879
785
}
2880
2881
static void d68000_or_re_32(m68k_info *info)
2882
1.44k
{
2883
1.44k
  build_re_1(info, M68K_INS_OR, 4);
2884
1.44k
}
2885
2886
static void d68000_ori_8(m68k_info *info)
2887
21.1k
{
2888
21.1k
  build_imm_ea(info, M68K_INS_ORI, 1, read_imm_8(info));
2889
21.1k
}
2890
2891
static void d68000_ori_16(m68k_info *info)
2892
1.96k
{
2893
1.96k
  build_imm_ea(info, M68K_INS_ORI, 2, read_imm_16(info));
2894
1.96k
}
2895
2896
static void d68000_ori_32(m68k_info *info)
2897
2.18k
{
2898
2.18k
  build_imm_ea(info, M68K_INS_ORI, 4, read_imm_32(info));
2899
2.18k
}
2900
2901
static void d68000_ori_to_ccr(m68k_info *info)
2902
228
{
2903
228
  build_imm_special_reg(info, M68K_INS_ORI, read_imm_8(info), 1, M68K_REG_CCR);
2904
228
}
2905
2906
static void d68000_ori_to_sr(m68k_info *info)
2907
364
{
2908
364
  build_imm_special_reg(info, M68K_INS_ORI, read_imm_16(info), 2, M68K_REG_SR);
2909
364
}
2910
2911
static void d68020_pack_rr(m68k_info *info)
2912
810
{
2913
810
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2914
555
  build_rr(info, M68K_INS_PACK, 0, read_imm_16(info));
2915
555
}
2916
2917
static void d68020_pack_mm(m68k_info *info)
2918
1.64k
{
2919
1.64k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
2920
899
  build_mm(info, M68K_INS_PACK, 0, read_imm_16(info));
2921
899
}
2922
2923
static void d68000_pea(m68k_info *info)
2924
342
{
2925
342
  build_ea(info, M68K_INS_PEA, 4);
2926
342
}
2927
2928
static void d68000_reset(m68k_info *info)
2929
296
{
2930
296
  MCInst_setOpcode(info->inst, M68K_INS_RESET);
2931
296
}
2932
2933
static void d68000_ror_s_8(m68k_info *info)
2934
480
{
2935
480
  build_3bit_d(info, M68K_INS_ROR, 1);
2936
480
}
2937
2938
static void d68000_ror_s_16(m68k_info *info)
2939
430
{
2940
430
  build_3bit_d(info, M68K_INS_ROR, 2);
2941
430
}
2942
2943
static void d68000_ror_s_32(m68k_info *info)
2944
294
{
2945
294
  build_3bit_d(info, M68K_INS_ROR, 4);
2946
294
}
2947
2948
static void d68000_ror_r_8(m68k_info *info)
2949
169
{
2950
169
  build_r(info, M68K_INS_ROR, 1);
2951
169
}
2952
2953
static void d68000_ror_r_16(m68k_info *info)
2954
278
{
2955
278
  build_r(info, M68K_INS_ROR, 2);
2956
278
}
2957
2958
static void d68000_ror_r_32(m68k_info *info)
2959
245
{
2960
245
  build_r(info, M68K_INS_ROR, 4);
2961
245
}
2962
2963
static void d68000_ror_ea(m68k_info *info)
2964
572
{
2965
572
  build_ea(info, M68K_INS_ROR, 2);
2966
572
}
2967
2968
static void d68000_rol_s_8(m68k_info *info)
2969
380
{
2970
380
  build_3bit_d(info, M68K_INS_ROL, 1);
2971
380
}
2972
2973
static void d68000_rol_s_16(m68k_info *info)
2974
312
{
2975
312
  build_3bit_d(info, M68K_INS_ROL, 2);
2976
312
}
2977
2978
static void d68000_rol_s_32(m68k_info *info)
2979
330
{
2980
330
  build_3bit_d(info, M68K_INS_ROL, 4);
2981
330
}
2982
2983
static void d68000_rol_r_8(m68k_info *info)
2984
280
{
2985
280
  build_r(info, M68K_INS_ROL, 1);
2986
280
}
2987
2988
static void d68000_rol_r_16(m68k_info *info)
2989
401
{
2990
401
  build_r(info, M68K_INS_ROL, 2);
2991
401
}
2992
2993
static void d68000_rol_r_32(m68k_info *info)
2994
328
{
2995
328
  build_r(info, M68K_INS_ROL, 4);
2996
328
}
2997
2998
static void d68000_rol_ea(m68k_info *info)
2999
815
{
3000
815
  build_ea(info, M68K_INS_ROL, 2);
3001
815
}
3002
3003
static void d68000_roxr_s_8(m68k_info *info)
3004
358
{
3005
358
  build_3bit_d(info, M68K_INS_ROXR, 1);
3006
358
}
3007
3008
static void d68000_roxr_s_16(m68k_info *info)
3009
242
{
3010
242
  build_3bit_d(info, M68K_INS_ROXR, 2);
3011
242
}
3012
3013
static void d68000_roxr_s_32(m68k_info *info)
3014
346
{
3015
346
  build_3bit_d(info, M68K_INS_ROXR, 4);
3016
346
}
3017
3018
static void d68000_roxr_r_8(m68k_info *info)
3019
148
{
3020
148
  build_3bit_d(info, M68K_INS_ROXR, 4);
3021
148
}
3022
3023
static void d68000_roxr_r_16(m68k_info *info)
3024
519
{
3025
519
  build_r(info, M68K_INS_ROXR, 2);
3026
519
}
3027
3028
static void d68000_roxr_r_32(m68k_info *info)
3029
283
{
3030
283
  build_r(info, M68K_INS_ROXR, 4);
3031
283
}
3032
3033
static void d68000_roxr_ea(m68k_info *info)
3034
1.08k
{
3035
1.08k
  build_ea(info, M68K_INS_ROXR, 2);
3036
1.08k
}
3037
3038
static void d68000_roxl_s_8(m68k_info *info)
3039
338
{
3040
338
  build_3bit_d(info, M68K_INS_ROXL, 1);
3041
338
}
3042
3043
static void d68000_roxl_s_16(m68k_info *info)
3044
239
{
3045
239
  build_3bit_d(info, M68K_INS_ROXL, 2);
3046
239
}
3047
3048
static void d68000_roxl_s_32(m68k_info *info)
3049
235
{
3050
235
  build_3bit_d(info, M68K_INS_ROXL, 4);
3051
235
}
3052
3053
static void d68000_roxl_r_8(m68k_info *info)
3054
340
{
3055
340
  build_r(info, M68K_INS_ROXL, 1);
3056
340
}
3057
3058
static void d68000_roxl_r_16(m68k_info *info)
3059
341
{
3060
341
  build_r(info, M68K_INS_ROXL, 2);
3061
341
}
3062
3063
static void d68000_roxl_r_32(m68k_info *info)
3064
313
{
3065
313
  build_r(info, M68K_INS_ROXL, 4);
3066
313
}
3067
3068
static void d68000_roxl_ea(m68k_info *info)
3069
876
{
3070
876
  build_ea(info, M68K_INS_ROXL, 2);
3071
876
}
3072
3073
static void d68010_rtd(m68k_info *info)
3074
803
{
3075
803
  set_insn_group(info, M68K_GRP_RET);
3076
803
  LIMIT_CPU_TYPES(info, M68010_PLUS);
3077
530
  build_absolute_jump_with_immediate(info, M68K_INS_RTD, 0, read_imm_16(info));
3078
530
}
3079
3080
static void d68000_rte(m68k_info *info)
3081
123
{
3082
123
  set_insn_group(info, M68K_GRP_IRET);
3083
123
  MCInst_setOpcode(info->inst, M68K_INS_RTE);
3084
123
}
3085
3086
static void d68020_rtm(m68k_info *info)
3087
110
{
3088
110
  cs_m68k* ext;
3089
110
  cs_m68k_op* op;
3090
3091
110
  set_insn_group(info, M68K_GRP_RET);
3092
3093
110
  LIMIT_CPU_TYPES(info, M68020_ONLY);
3094
3095
0
  build_absolute_jump_with_immediate(info, M68K_INS_RTM, 0, 0);
3096
3097
0
  ext = &info->extension;
3098
0
  op = &ext->operands[0];
3099
3100
0
  op->address_mode = M68K_AM_NONE;
3101
0
  op->type = M68K_OP_REG;
3102
3103
0
  if (BIT_3(info->ir)) {
3104
0
    op->reg = M68K_REG_A0 + (info->ir & 7);
3105
0
  } else {
3106
0
    op->reg = M68K_REG_D0 + (info->ir & 7);
3107
0
  }
3108
0
}
3109
3110
static void d68000_rtr(m68k_info *info)
3111
140
{
3112
140
  set_insn_group(info, M68K_GRP_RET);
3113
140
  MCInst_setOpcode(info->inst, M68K_INS_RTR);
3114
140
}
3115
3116
static void d68000_rts(m68k_info *info)
3117
215
{
3118
215
  set_insn_group(info, M68K_GRP_RET);
3119
215
  MCInst_setOpcode(info->inst, M68K_INS_RTS);
3120
215
}
3121
3122
static void d68000_sbcd_rr(m68k_info *info)
3123
669
{
3124
669
  build_rr(info, M68K_INS_SBCD, 1, 0);
3125
669
}
3126
3127
static void d68000_sbcd_mm(m68k_info *info)
3128
944
{
3129
944
  build_mm(info, M68K_INS_SBCD, 0, read_imm_16(info));
3130
944
}
3131
3132
static void d68000_scc(m68k_info *info)
3133
1.84k
{
3134
1.84k
  cs_m68k* ext = build_init_op(info, s_scc_lut[(info->ir >> 8) & 0xf], 1, 1);
3135
1.84k
  get_ea_mode_op(info, &ext->operands[0], info->ir, 1);
3136
1.84k
}
3137
3138
static void d68000_stop(m68k_info *info)
3139
650
{
3140
650
  build_absolute_jump_with_immediate(info, M68K_INS_STOP, 0, read_imm_16(info));
3141
650
}
3142
3143
static void d68000_sub_er_8(m68k_info *info)
3144
1.45k
{
3145
1.45k
  build_er_1(info, M68K_INS_SUB, 1);
3146
1.45k
}
3147
3148
static void d68000_sub_er_16(m68k_info *info)
3149
598
{
3150
598
  build_er_1(info, M68K_INS_SUB, 2);
3151
598
}
3152
3153
static void d68000_sub_er_32(m68k_info *info)
3154
4.16k
{
3155
4.16k
  build_er_1(info, M68K_INS_SUB, 4);
3156
4.16k
}
3157
3158
static void d68000_sub_re_8(m68k_info *info)
3159
421
{
3160
421
  build_re_1(info, M68K_INS_SUB, 1);
3161
421
}
3162
3163
static void d68000_sub_re_16(m68k_info *info)
3164
679
{
3165
679
  build_re_1(info, M68K_INS_SUB, 2);
3166
679
}
3167
3168
static void d68000_sub_re_32(m68k_info *info)
3169
3.64k
{
3170
3.64k
  build_re_1(info, M68K_INS_SUB, 4);
3171
3.64k
}
3172
3173
static void d68000_suba_16(m68k_info *info)
3174
1.12k
{
3175
1.12k
  build_ea_a(info, M68K_INS_SUBA, 2);
3176
1.12k
}
3177
3178
static void d68000_suba_32(m68k_info *info)
3179
1.02k
{
3180
1.02k
  build_ea_a(info, M68K_INS_SUBA, 4);
3181
1.02k
}
3182
3183
static void d68000_subi_8(m68k_info *info)
3184
740
{
3185
740
  build_imm_ea(info, M68K_INS_SUBI, 1, read_imm_8(info));
3186
740
}
3187
3188
static void d68000_subi_16(m68k_info *info)
3189
450
{
3190
450
  build_imm_ea(info, M68K_INS_SUBI, 2, read_imm_16(info));
3191
450
}
3192
3193
static void d68000_subi_32(m68k_info *info)
3194
417
{
3195
417
  build_imm_ea(info, M68K_INS_SUBI, 4, read_imm_32(info));
3196
417
}
3197
3198
static void d68000_subq_8(m68k_info *info)
3199
772
{
3200
772
  build_3bit_ea(info, M68K_INS_SUBQ, 1);
3201
772
}
3202
3203
static void d68000_subq_16(m68k_info *info)
3204
3.52k
{
3205
3.52k
  build_3bit_ea(info, M68K_INS_SUBQ, 2);
3206
3.52k
}
3207
3208
static void d68000_subq_32(m68k_info *info)
3209
823
{
3210
823
  build_3bit_ea(info, M68K_INS_SUBQ, 4);
3211
823
}
3212
3213
static void d68000_subx_rr_8(m68k_info *info)
3214
521
{
3215
521
  build_rr(info, M68K_INS_SUBX, 1, 0);
3216
521
}
3217
3218
static void d68000_subx_rr_16(m68k_info *info)
3219
374
{
3220
374
  build_rr(info, M68K_INS_SUBX, 2, 0);
3221
374
}
3222
3223
static void d68000_subx_rr_32(m68k_info *info)
3224
390
{
3225
390
  build_rr(info, M68K_INS_SUBX, 4, 0);
3226
390
}
3227
3228
static void d68000_subx_mm_8(m68k_info *info)
3229
396
{
3230
396
  build_mm(info, M68K_INS_SUBX, 1, 0);
3231
396
}
3232
3233
static void d68000_subx_mm_16(m68k_info *info)
3234
482
{
3235
482
  build_mm(info, M68K_INS_SUBX, 2, 0);
3236
482
}
3237
3238
static void d68000_subx_mm_32(m68k_info *info)
3239
288
{
3240
288
  build_mm(info, M68K_INS_SUBX, 4, 0);
3241
288
}
3242
3243
static void d68000_swap(m68k_info *info)
3244
753
{
3245
753
  build_d(info, M68K_INS_SWAP, 0);
3246
753
}
3247
3248
static void d68000_tas(m68k_info *info)
3249
554
{
3250
554
  build_ea(info, M68K_INS_TAS, 1);
3251
554
}
3252
3253
static void d68000_trap(m68k_info *info)
3254
2.55k
{
3255
2.55k
  build_absolute_jump_with_immediate(info, M68K_INS_TRAP, 0, info->ir&0xf);
3256
2.55k
}
3257
3258
static void d68020_trapcc_0(m68k_info *info)
3259
738
{
3260
738
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3261
386
  build_trap(info, 0, 0);
3262
3263
386
  info->extension.op_count = 0;
3264
386
}
3265
3266
static void d68020_trapcc_16(m68k_info *info)
3267
638
{
3268
638
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3269
440
  build_trap(info, 2, read_imm_16(info));
3270
440
}
3271
3272
static void d68020_trapcc_32(m68k_info *info)
3273
541
{
3274
541
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3275
332
  build_trap(info, 4, read_imm_32(info));
3276
332
}
3277
3278
static void d68000_trapv(m68k_info *info)
3279
213
{
3280
213
  MCInst_setOpcode(info->inst, M68K_INS_TRAPV);
3281
213
}
3282
3283
static void d68000_tst_8(m68k_info *info)
3284
639
{
3285
639
  build_ea(info, M68K_INS_TST, 1);
3286
639
}
3287
3288
static void d68020_tst_pcdi_8(m68k_info *info)
3289
717
{
3290
717
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3291
358
  build_ea(info, M68K_INS_TST, 1);
3292
358
}
3293
3294
static void d68020_tst_pcix_8(m68k_info *info)
3295
357
{
3296
357
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3297
238
  build_ea(info, M68K_INS_TST, 1);
3298
238
}
3299
3300
static void d68020_tst_i_8(m68k_info *info)
3301
490
{
3302
490
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3303
251
  build_ea(info, M68K_INS_TST, 1);
3304
251
}
3305
3306
static void d68000_tst_16(m68k_info *info)
3307
563
{
3308
563
  build_ea(info, M68K_INS_TST, 2);
3309
563
}
3310
3311
static void d68020_tst_a_16(m68k_info *info)
3312
1.40k
{
3313
1.40k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3314
766
  build_ea(info, M68K_INS_TST, 2);
3315
766
}
3316
3317
static void d68020_tst_pcdi_16(m68k_info *info)
3318
649
{
3319
649
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3320
397
  build_ea(info, M68K_INS_TST, 2);
3321
397
}
3322
3323
static void d68020_tst_pcix_16(m68k_info *info)
3324
505
{
3325
505
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3326
236
  build_ea(info, M68K_INS_TST, 2);
3327
236
}
3328
3329
static void d68020_tst_i_16(m68k_info *info)
3330
382
{
3331
382
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3332
261
  build_ea(info, M68K_INS_TST, 2);
3333
261
}
3334
3335
static void d68000_tst_32(m68k_info *info)
3336
383
{
3337
383
  build_ea(info, M68K_INS_TST, 4);
3338
383
}
3339
3340
static void d68020_tst_a_32(m68k_info *info)
3341
156
{
3342
156
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3343
86
  build_ea(info, M68K_INS_TST, 4);
3344
86
}
3345
3346
static void d68020_tst_pcdi_32(m68k_info *info)
3347
231
{
3348
231
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3349
152
  build_ea(info, M68K_INS_TST, 4);
3350
152
}
3351
3352
static void d68020_tst_pcix_32(m68k_info *info)
3353
912
{
3354
912
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3355
497
  build_ea(info, M68K_INS_TST, 4);
3356
497
}
3357
3358
static void d68020_tst_i_32(m68k_info *info)
3359
474
{
3360
474
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3361
220
  build_ea(info, M68K_INS_TST, 4);
3362
220
}
3363
3364
static void d68000_unlk(m68k_info *info)
3365
293
{
3366
293
  cs_m68k_op* op;
3367
293
  cs_m68k* ext = build_init_op(info, M68K_INS_UNLK, 1, 0);
3368
3369
293
  op = &ext->operands[0];
3370
3371
293
  op->address_mode = M68K_AM_REG_DIRECT_ADDR;
3372
293
  op->reg = M68K_REG_A0 + (info->ir & 7);
3373
293
}
3374
3375
static void d68020_unpk_rr(m68k_info *info)
3376
2.56k
{
3377
2.56k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3378
1.66k
  build_rr(info, M68K_INS_UNPK, 0, read_imm_16(info));
3379
1.66k
}
3380
3381
static void d68020_unpk_mm(m68k_info *info)
3382
1.94k
{
3383
1.94k
  LIMIT_CPU_TYPES(info, M68020_PLUS);
3384
1.29k
  build_mm(info, M68K_INS_UNPK, 0, read_imm_16(info));
3385
1.29k
}
3386
3387
/* This table is auto-generated. Look in contrib/m68k_instruction_tbl_gen for more info */
3388
#include "M68KInstructionTable.inc"
3389
3390
static int instruction_is_valid(m68k_info *info, const unsigned int word_check)
3391
367k
{
3392
367k
  const unsigned int instruction = info->ir;
3393
367k
  const instruction_struct *i = &g_instruction_table[instruction];
3394
3395
367k
  if ( (i->word2_mask && ((word_check & i->word2_mask) != i->word2_match)) ||
3396
367k
    (i->instruction == d68000_invalid) ) {
3397
1.72k
    d68000_invalid(info);
3398
1.72k
    return 0;
3399
1.72k
  }
3400
3401
365k
  return 1;
3402
367k
}
3403
3404
static int exists_reg_list(uint16_t *regs, uint8_t count, m68k_reg reg)
3405
459k
{
3406
459k
  uint8_t i;
3407
3408
646k
  for (i = 0; i < count; ++i) {
3409
194k
    if (regs[i] == (uint16_t)reg)
3410
8.27k
      return 1;
3411
194k
  }
3412
3413
451k
  return 0;
3414
459k
}
3415
3416
static void add_reg_to_rw_list(m68k_info *info, m68k_reg reg, int write)
3417
490k
{
3418
490k
  if (reg == M68K_REG_INVALID)
3419
31.2k
    return;
3420
3421
459k
  if (write)
3422
268k
  {
3423
268k
    if (exists_reg_list(info->regs_write, info->regs_write_count, reg))
3424
4.33k
      return;
3425
3426
264k
    info->regs_write[info->regs_write_count] = (uint16_t)reg;
3427
264k
    info->regs_write_count++;
3428
264k
  }
3429
190k
  else
3430
190k
  {
3431
190k
    if (exists_reg_list(info->regs_read, info->regs_read_count, reg))
3432
3.94k
      return;
3433
3434
186k
    info->regs_read[info->regs_read_count] = (uint16_t)reg;
3435
186k
    info->regs_read_count++;
3436
186k
  }
3437
459k
}
3438
3439
static void update_am_reg_list(m68k_info *info, cs_m68k_op *op, int write)
3440
149k
{
3441
149k
  switch (op->address_mode) {
3442
1.23k
    case M68K_AM_REG_DIRECT_ADDR:
3443
1.23k
    case M68K_AM_REG_DIRECT_DATA:
3444
1.23k
      add_reg_to_rw_list(info, op->reg, write);
3445
1.23k
      break;
3446
3447
27.1k
    case M68K_AM_REGI_ADDR_POST_INC:
3448
66.7k
    case M68K_AM_REGI_ADDR_PRE_DEC:
3449
66.7k
      add_reg_to_rw_list(info, op->reg, 1);
3450
66.7k
      break;
3451
3452
27.8k
    case M68K_AM_REGI_ADDR:
3453
46.4k
    case M68K_AM_REGI_ADDR_DISP:
3454
46.4k
      add_reg_to_rw_list(info, op->reg, 0);
3455
46.4k
      break;
3456
3457
11.0k
    case M68K_AM_AREGI_INDEX_8_BIT_DISP:
3458
15.3k
    case M68K_AM_AREGI_INDEX_BASE_DISP:
3459
17.8k
    case M68K_AM_MEMI_POST_INDEX:
3460
21.3k
    case M68K_AM_MEMI_PRE_INDEX:
3461
22.8k
    case M68K_AM_PCI_INDEX_8_BIT_DISP:
3462
22.9k
    case M68K_AM_PCI_INDEX_BASE_DISP:
3463
23.4k
    case M68K_AM_PC_MEMI_PRE_INDEX:
3464
23.9k
    case M68K_AM_PC_MEMI_POST_INDEX:
3465
23.9k
      add_reg_to_rw_list(info, op->mem.index_reg, 0);
3466
23.9k
      add_reg_to_rw_list(info, op->mem.base_reg, 0);
3467
23.9k
      break;
3468
3469
    // no register(s) in the other addressing modes
3470
11.0k
    default:
3471
11.0k
      break;
3472
149k
  }
3473
149k
}
3474
3475
static void update_bits_range(m68k_info *info, m68k_reg reg_start, uint8_t bits, int write)
3476
21.4k
{
3477
21.4k
  int i;
3478
3479
192k
  for (i = 0; i < 8; ++i) {
3480
171k
    if (bits & (1 << i)) {
3481
37.1k
      add_reg_to_rw_list(info, reg_start + i, write);
3482
37.1k
    }
3483
171k
  }
3484
21.4k
}
3485
3486
static void update_reg_list_regbits(m68k_info *info, cs_m68k_op *op, int write)
3487
7.14k
{
3488
7.14k
  uint32_t bits = op->register_bits;
3489
7.14k
  update_bits_range(info, M68K_REG_D0, bits & 0xff, write);
3490
7.14k
  update_bits_range(info, M68K_REG_A0, (bits >> 8) & 0xff, write);
3491
7.14k
  update_bits_range(info, M68K_REG_FP0, (bits >> 16) & 0xff, write);
3492
7.14k
}
3493
3494
static void update_op_reg_list(m68k_info *info, cs_m68k_op *op, int write)
3495
613k
{
3496
613k
  switch ((int)op->type) {
3497
280k
    case M68K_OP_REG:
3498
280k
      add_reg_to_rw_list(info, op->reg, write);
3499
280k
      break;
3500
3501
149k
    case M68K_OP_MEM:
3502
149k
      update_am_reg_list(info, op, write);
3503
149k
      break;
3504
3505
7.14k
    case M68K_OP_REG_BITS:
3506
7.14k
      update_reg_list_regbits(info, op, write);
3507
7.14k
      break;
3508
3509
5.32k
    case M68K_OP_REG_PAIR:
3510
5.32k
      add_reg_to_rw_list(info, op->reg_pair.reg_0, write);
3511
5.32k
      add_reg_to_rw_list(info, op->reg_pair.reg_1, write);
3512
5.32k
      break;
3513
613k
  }
3514
613k
}
3515
3516
static void build_regs_read_write_counts(m68k_info *info)
3517
364k
{
3518
364k
  int i;
3519
3520
364k
  if (!info->extension.op_count)
3521
1.98k
    return;
3522
3523
362k
  if (info->extension.op_count == 1) {
3524
117k
    update_op_reg_list(info, &info->extension.operands[0], 1);
3525
244k
  } else {
3526
    // first operand is always read
3527
244k
    update_op_reg_list(info, &info->extension.operands[0], 0);
3528
3529
    // remaning write
3530
496k
    for (i = 1; i < info->extension.op_count; ++i)
3531
251k
      update_op_reg_list(info, &info->extension.operands[i], 1);
3532
244k
  }
3533
362k
}
3534
3535
static void m68k_setup_internals(m68k_info* info, MCInst* inst, unsigned int pc, unsigned int cpu_type)
3536
365k
{
3537
365k
  info->inst = inst;
3538
365k
  info->pc = pc;
3539
365k
  info->ir = 0;
3540
365k
  info->type = cpu_type;
3541
365k
  info->address_mask = 0xffffffff;
3542
3543
365k
  switch(info->type) {
3544
130k
    case M68K_CPU_TYPE_68000:
3545
130k
      info->type = TYPE_68000;
3546
130k
      info->address_mask = 0x00ffffff;
3547
130k
      break;
3548
0
    case M68K_CPU_TYPE_68010:
3549
0
      info->type = TYPE_68010;
3550
0
      info->address_mask = 0x00ffffff;
3551
0
      break;
3552
0
    case M68K_CPU_TYPE_68EC020:
3553
0
      info->type = TYPE_68020;
3554
0
      info->address_mask = 0x00ffffff;
3555
0
      break;
3556
0
    case M68K_CPU_TYPE_68020:
3557
0
      info->type = TYPE_68020;
3558
0
      info->address_mask = 0xffffffff;
3559
0
      break;
3560
0
    case M68K_CPU_TYPE_68030:
3561
0
      info->type = TYPE_68030;
3562
0
      info->address_mask = 0xffffffff;
3563
0
      break;
3564
234k
    case M68K_CPU_TYPE_68040:
3565
234k
      info->type = TYPE_68040;
3566
234k
      info->address_mask = 0xffffffff;
3567
234k
      break;
3568
0
    default:
3569
0
      info->address_mask = 0;
3570
0
      return;
3571
365k
  }
3572
365k
}
3573
3574
/* ======================================================================== */
3575
/* ================================= API ================================== */
3576
/* ======================================================================== */
3577
3578
/* Disasemble one instruction at pc and store in str_buff */
3579
static unsigned int m68k_disassemble(m68k_info *info, uint64_t pc)
3580
365k
{
3581
365k
  MCInst *inst = info->inst;
3582
365k
  cs_m68k* ext = &info->extension;
3583
365k
  int i;
3584
365k
  unsigned int size;
3585
3586
365k
  inst->Opcode = M68K_INS_INVALID;
3587
3588
365k
  memset(ext, 0, sizeof(cs_m68k));
3589
365k
  ext->op_size.type = M68K_SIZE_TYPE_CPU;
3590
3591
1.82M
  for (i = 0; i < M68K_OPERAND_COUNT; ++i)
3592
1.46M
    ext->operands[i].type = M68K_OP_REG;
3593
3594
365k
  info->ir = peek_imm_16(info);
3595
365k
  if (instruction_is_valid(info, peek_imm_32(info) & 0xffff)) {
3596
364k
    info->ir = read_imm_16(info);
3597
364k
    g_instruction_table[info->ir].instruction(info);
3598
364k
  }
3599
3600
365k
  size = info->pc - (unsigned int)pc;
3601
365k
  info->pc = (unsigned int)pc;
3602
3603
365k
  return size;
3604
365k
}
3605
3606
bool M68K_getInstruction(csh ud, const uint8_t* code, size_t code_len, MCInst* instr, uint16_t* size, uint64_t address, void* inst_info)
3607
366k
{
3608
#ifdef M68K_DEBUG
3609
  SStream ss;
3610
#endif
3611
366k
  int s;
3612
366k
  int cpu_type = M68K_CPU_TYPE_68000;
3613
366k
  cs_struct* handle = instr->csh;
3614
366k
  m68k_info *info = (m68k_info*)handle->printer_info;
3615
3616
  // code len has to be at least 2 bytes to be valid m68k
3617
3618
366k
  if (code_len < 2) {
3619
1.32k
    *size = 0;
3620
1.32k
    return false;
3621
1.32k
  }
3622
3623
365k
  if (instr->flat_insn->detail) {
3624
365k
    memset(instr->flat_insn->detail, 0, offsetof(cs_detail, m68k)+sizeof(cs_m68k));
3625
365k
  }
3626
3627
365k
  info->groups_count = 0;
3628
365k
  info->regs_read_count = 0;
3629
365k
  info->regs_write_count = 0;
3630
365k
  info->code = code;
3631
365k
  info->code_len = code_len;
3632
365k
  info->baseAddress = address;
3633
3634
365k
  if (handle->mode & CS_MODE_M68K_010)
3635
0
    cpu_type = M68K_CPU_TYPE_68010;
3636
365k
  if (handle->mode & CS_MODE_M68K_020)
3637
0
    cpu_type = M68K_CPU_TYPE_68020;
3638
365k
  if (handle->mode & CS_MODE_M68K_030)
3639
0
    cpu_type = M68K_CPU_TYPE_68030;
3640
365k
  if (handle->mode & CS_MODE_M68K_040)
3641
234k
    cpu_type = M68K_CPU_TYPE_68040;
3642
365k
  if (handle->mode & CS_MODE_M68K_060)
3643
0
    cpu_type = M68K_CPU_TYPE_68040; // 060 = 040 for now
3644
3645
365k
  m68k_setup_internals(info, instr, (unsigned int)address, cpu_type);
3646
365k
  s = m68k_disassemble(info, address);
3647
3648
365k
  if (s == 0) {
3649
1.12k
    *size = 2;
3650
1.12k
    return false;
3651
1.12k
  }
3652
3653
364k
  build_regs_read_write_counts(info);
3654
3655
#ifdef M68K_DEBUG
3656
  SStream_Init(&ss);
3657
  M68K_printInst(instr, &ss, info);
3658
#endif
3659
3660
  // Make sure we always stay within range
3661
364k
  if (s > (int)code_len)
3662
1.57k
    *size = (uint16_t)code_len;
3663
362k
  else
3664
362k
    *size = (uint16_t)s;
3665
3666
364k
  return true;
3667
365k
}
3668