/* Capstone Disassembly Engine, http://www.capstone-engine.org */

/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */

/*    Rot127 <unisono@quyllur.org> 2022-2023 */

/* Automatically translated source file from LLVM. */

/* LLVM-commit: 464bda7750a3ba9e23823fc707d7e7b6fc38438d */

/* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */

/* Only small edits allowed. */

/* For multiple similar edits, please create a Patch for the translator. */

/* Capstone's C++ file translator: */

/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

//===- ARMDisassembler.cpp - Disassembler for ARM/Thumb ISA ---------------===//

//

// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

// See https://llvm.org/LICENSE.txt for license information.

// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

//

//===----------------------------------------------------------------------===//

#include <capstone/platform.h>

#include <stdio.h>

#include <stdlib.h>

#include <string.h>

#include "../../LEB128.h"

#include "../../MCDisassembler.h"

#include "../../MCFixedLenDisassembler.h"

#include "../../MCInst.h"

#include "../../MCInstrDesc.h"

#include "../../MCRegisterInfo.h"

#include "../../MathExtras.h"

#include "../../cs_priv.h"

#include "../../utils.h"

#include "ARMLinkage.h"

#include "ARMAddressingModes.h"

#include "ARMBaseInfo.h"

#include "ARMDisassemblerExtension.h"

#include "ARMMapping.h"

#define GET_INSTRINFO_MC_DESC

#include "ARMGenInstrInfo.inc"

#define CONCAT(a, b) CONCAT_(a, b)

#define CONCAT_(a, b) a##_##b

#define DEBUG_TYPE "arm-disassembler"

// Handles the condition code status of instructions in IT blocks

;

;

/// ARM disassembler for all ARM platforms.;

static DecodeStatus getInstruction(csh ud, const uint8_t *Bytes, size_t ByteLen,

           MCInst *MI, uint16_t *Size, uint64_t Address,

           void *Info);

DecodeStatus getARMInstruction(csh ud, const uint8_t *Bytes, size_t ByteLen,

             MCInst *MI, uint16_t *Size, uint64_t Address,

             void *Info);

DecodeStatus getThumbInstruction(csh ud, const uint8_t *Bytes, size_t ByteLen,

         MCInst *MI, uint16_t *Size, uint64_t Address,

         void *Info);

DecodeStatus AddThumbPredicate(MCInst *);

void UpdateThumbVFPPredicate(DecodeStatus, MCInst *);

;

// end anonymous namespace

// Forward declare these because the autogenerated code will reference them.

// Definitions are further down.

static DecodeStatus DecodeGPRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodetGPROddRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodetGPREvenRegisterClass(MCInst *Inst, unsigned RegNo,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus

DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst *Inst, unsigned RegNo,

          uint64_t Address, const void *Decoder);

static DecodeStatus DecodeGPRnopcRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeGPRnospRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeGPRwithZRnospRegisterClass(MCInst *Inst,

                 unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodetGPRRegisterClass(MCInst *Inst, unsigned RegNo,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodetcGPRRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecoderGPRRegisterClass(MCInst *Inst, unsigned RegNo,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeGPRspRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeHPRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeSPRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeDPRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeDPR_8RegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeSPR_8RegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst *Inst, unsigned RegNo,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeQPRRegisterClass(MCInst *Inst, unsigned RegNo,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeMQPRRegisterClass(MCInst *Inst, unsigned RegNo,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeMQQPRRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst *Inst, unsigned RegNo,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeDPairRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst *Inst, unsigned RegNo,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodePredicateOperand(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeCCOutOperand(MCInst *Inst, unsigned Val,

               uint64_t Address, const void *Decoder);

static DecodeStatus DecodeRegListOperand(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeSPRRegListOperand(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeDPRRegListOperand(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeBitfieldMaskOperand(MCInst *Inst, unsigned Insn,

                uint64_t Address,

                const void *Decoder);

static DecodeStatus DecodeCopMemInstruction(MCInst *Inst, unsigned Insn,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeSORegMemOperand(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeAddrMode3Instruction(MCInst *Inst, unsigned Insn,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeTSBInstruction(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeSORegImmOperand(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeSORegRegOperand(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst *Inst,

                unsigned Insn,

                uint64_t Adddress,

                const void *Decoder);

static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeArmMOVTWInstruction(MCInst *Inst, unsigned Insn,

                uint64_t Address,

                const void *Decoder);

static DecodeStatus DecodeSMLAInstruction(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeHINTInstruction(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeCPSInstruction(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeTSTInstruction(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeSETPANInstruction(MCInst *Inst, unsigned Insn,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeT2HintSpaceInstruction(MCInst *Inst, unsigned Insn,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeAddrModeImm12Operand(MCInst *Inst, unsigned Val,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeAddrMode5Operand(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeAddrMode5FP16Operand(MCInst *Inst, unsigned Val,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeAddrMode7Operand(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeT2BInstruction(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeBranchImmInstruction(MCInst *Inst, unsigned Insn,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeAddrMode6Operand(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeVLDST1Instruction(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeVLDST2Instruction(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeVLDST3Instruction(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeVLDST4Instruction(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeVLDInstruction(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeVSTInstruction(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeVLD1DupInstruction(MCInst *Inst, unsigned Val,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeVLD2DupInstruction(MCInst *Inst, unsigned Val,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeVLD3DupInstruction(MCInst *Inst, unsigned Val,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeVLD4DupInstruction(MCInst *Inst, unsigned Val,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeVMOVModImmInstruction(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeMVEModImmInstruction(MCInst *Inst, unsigned Val,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeMVEVADCInstruction(MCInst *Inst, unsigned Insn,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeVSHLMaxInstruction(MCInst *Inst, unsigned Val,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeShiftRight8Imm(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeShiftRight16Imm(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeShiftRight32Imm(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeShiftRight64Imm(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeTBLInstruction(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodePostIdxReg(MCInst *Inst, unsigned Insn,

             uint64_t Address, const void *Decoder);

static DecodeStatus DecodeMveAddrModeRQ(MCInst *Inst, unsigned Insn,

          uint64_t Address, const void *Decoder);

#define DECLARE_DecodeMveAddrModeQ(shift) \

  static DecodeStatus CONCAT(DecodeMveAddrModeQ, shift)( \

    MCInst * Inst, unsigned Insn, uint64_t Address, \

    const void *Decoder);

DECLARE_DecodeMveAddrModeQ(2) DECLARE_DecodeMveAddrModeQ(3)

  static DecodeStatus

  DecodeCoprocessor(MCInst *Inst, unsigned Insn, uint64_t Address,

        const void *Decoder);

static DecodeStatus DecodeMemBarrierOption(MCInst *Inst, unsigned Insn,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeInstSyncBarrierOption(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeMSRMask(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeBankedReg(MCInst *Inst, unsigned Insn,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeDoubleRegLoad(MCInst *Inst, unsigned Insn,

          uint64_t Address, const void *Decoder);

static DecodeStatus DecodeDoubleRegStore(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeLDRPreImm(MCInst *Inst, unsigned Insn,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeLDRPreReg(MCInst *Inst, unsigned Insn,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeSTRPreImm(MCInst *Inst, unsigned Insn,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeSTRPreReg(MCInst *Inst, unsigned Insn,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeVLD1LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVLD2LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVLD3LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVLD4LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVST1LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVST2LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVST3LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVST4LN(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeVMOVSRR(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeVMOVRRS(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeSwap(MCInst *Inst, unsigned Insn, uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeVCVTD(MCInst *Inst, unsigned Insn, uint64_t Address,

        const void *Decoder);

static DecodeStatus DecodeVCVTQ(MCInst *Inst, unsigned Insn, uint64_t Address,

        const void *Decoder);

static DecodeStatus DecodeVCVTImmOperand(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeNEONComplexLane64Instruction(MCInst *Inst,

                   unsigned Val,

                   uint64_t Address,

                   const void *Decoder);

static DecodeStatus DecodeThumbAddSpecialReg(MCInst *Inst, uint16_t Insn,

               uint64_t Address,

               const void *Decoder);

static DecodeStatus DecodeThumbBROperand(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2BROperand(MCInst *Inst, unsigned Val,

              uint64_t Address, const void *Decoder);

static DecodeStatus DecodeThumbCmpBROperand(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeThumbAddrModeRR(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbAddrModeIS(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbAddrModePC(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbAddrModeSP(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeT2AddrModeSOReg(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Val,

              uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2LoadImm8(MCInst *Inst, unsigned Insn,

             uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2LoadImm12(MCInst *Inst, unsigned Insn,

              uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2LoadT(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeT2LoadLabel(MCInst *Inst, unsigned Insn,

              uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2Imm8S4(MCInst *Inst, unsigned Val, uint64_t Address,

           const void *Decoder);

static DecodeStatus DecodeT2Imm7S4(MCInst *Inst, unsigned Val, uint64_t Address,

           const void *Decoder);

static DecodeStatus DecodeT2AddrModeImm8s4(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeT2AddrModeImm7s4(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeT2Imm8(MCInst *Inst, unsigned Val, uint64_t Address,

         const void *Decoder);

#define DECLARE_DecodeT2Imm7(shift) \

  static DecodeStatus CONCAT(DecodeT2Imm7, shift)(MCInst * Inst, \

              unsigned Val, \

              uint64_t Address, \

              const void *Decoder);

DECLARE_DecodeT2Imm7(0) DECLARE_DecodeT2Imm7(1) DECLARE_DecodeT2Imm7(2)

  static DecodeStatus

  DecodeT2AddrModeImm8(MCInst *Inst, unsigned Val, uint64_t Address,

           const void *Decoder);

#define DECLARE_DecodeTAddrModeImm7(shift) \

  static DecodeStatus CONCAT(DecodeTAddrModeImm7, shift)( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

DECLARE_DecodeTAddrModeImm7(0) DECLARE_DecodeTAddrModeImm7(1)

#define DECLARE_DecodeT2AddrModeImm7(shift, WriteBack) \

  static DecodeStatus CONCAT(DecodeT2AddrModeImm7, \

           CONCAT(shift, WriteBack))( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

  DECLARE_DecodeT2AddrModeImm7(0, 0) DECLARE_DecodeT2AddrModeImm7(1, 0)

    DECLARE_DecodeT2AddrModeImm7(2, 0)

      DECLARE_DecodeT2AddrModeImm7(0, 1)

        DECLARE_DecodeT2AddrModeImm7(1, 1)

          DECLARE_DecodeT2AddrModeImm7(2, 1)

            static DecodeStatus

  DecodeThumbAddSPImm(MCInst *Inst, uint16_t Val, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeThumbAddSPReg(MCInst *Inst, uint16_t Insn,

          uint64_t Address, const void *Decoder);

static DecodeStatus DecodeThumbCPS(MCInst *Inst, uint16_t Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeQADDInstruction(MCInst *Inst, unsigned Insn,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbBLXOffset(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2AddrModeImm12(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbTableBranch(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeThumb2BCCInstruction(MCInst *Inst, unsigned Val,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeT2SOImm(MCInst *Inst, unsigned Val, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeThumbBCCTargetOperand(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeThumbBLTargetOperand(MCInst *Inst, unsigned Val,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeIT(MCInst *Inst, unsigned Val, uint64_t Address,

           const void *Decoder);

static DecodeStatus DecodeT2LDRDPreInstruction(MCInst *Inst, unsigned Insn,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeT2STRDPreInstruction(MCInst *Inst, unsigned Insn,

                 uint64_t Address,

                 const void *Decoder);

static DecodeStatus DecodeT2Adr(MCInst *Inst, unsigned Val, uint64_t Address,

        const void *Decoder);

static DecodeStatus DecodeT2LdStPre(MCInst *Inst, unsigned Val,

            uint64_t Address, const void *Decoder);

static DecodeStatus DecodeT2ShifterImmOperand(MCInst *Inst, unsigned Val,

                uint64_t Address,

                const void *Decoder);

static DecodeStatus DecodeLDR(MCInst *Inst, unsigned Val, uint64_t Address,

            const void *Decoder);

static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst *Inst, unsigned Val,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeForVMRSandVMSR(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

#define DECLARE_DecodeBFLabelOperand(isSigned, isNeg, zeroPermitted, size) \

  static DecodeStatus CONCAT( \

    DecodeBFLabelOperand, \

    CONCAT(isSigned, CONCAT(isNeg, CONCAT(zeroPermitted, size))))( \

    MCInst * Inst, unsigned val, uint64_t Address, \

    const void *Decoder);

DECLARE_DecodeBFLabelOperand(false, false, false,

           4) DECLARE_DecodeBFLabelOperand(true, false, true,

                   18)

  DECLARE_DecodeBFLabelOperand(true, false, true, 12)

    DECLARE_DecodeBFLabelOperand(true, false, true, 16)

      DECLARE_DecodeBFLabelOperand(false, true, true, 11)

        DECLARE_DecodeBFLabelOperand(false, false, true,

                   11)

          static DecodeStatus

  DecodeBFAfterTargetOperand(MCInst *Inst, unsigned val, uint64_t Address,

           const void *Decoder);

static DecodeStatus DecodePredNoALOperand(MCInst *Inst, unsigned Val,

            uint64_t Address,

            const void *Decoder);

static DecodeStatus DecodeLOLoop(MCInst *Inst, unsigned Insn, uint64_t Address,

         const void *Decoder);

static DecodeStatus DecodeLongShiftOperand(MCInst *Inst, unsigned Val,

             uint64_t Address,

             const void *Decoder);

static DecodeStatus DecodeVSCCLRM(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeVPTMaskOperand(MCInst *Inst, unsigned Val,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeVpredROperand(MCInst *Inst, unsigned Val,

          uint64_t Address, const void *Decoder);

static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst *Inst,

                  unsigned Val,

                  uint64_t Address,

                  const void *Decoder);

static DecodeStatus DecodeRestrictedSPredicateOperand(MCInst *Inst,

                  unsigned Val,

                  uint64_t Address,

                  const void *Decoder);

static DecodeStatus DecodeRestrictedUPredicateOperand(MCInst *Inst,

                  unsigned Val,

                  uint64_t Address,

                  const void *Decoder);

static DecodeStatus DecodeRestrictedFPPredicateOperand(MCInst *Inst,

                   unsigned Val,

                   uint64_t Address,

                   const void *Decoder);

#define DECLARE_DecodeVSTRVLDR_SYSREG(Writeback) \

  static DecodeStatus CONCAT(DecodeVSTRVLDR_SYSREG, Writeback)( \

    MCInst * Inst, unsigned Insn, uint64_t Address, \

    const void *Decoder);

DECLARE_DecodeVSTRVLDR_SYSREG(false) DECLARE_DecodeVSTRVLDR_SYSREG(true)

#define DECLARE_DecodeMVE_MEM_1_pre(shift) \

  static DecodeStatus CONCAT(DecodeMVE_MEM_1_pre, shift)( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

  DECLARE_DecodeMVE_MEM_1_pre(0) DECLARE_DecodeMVE_MEM_1_pre(1)

#define DECLARE_DecodeMVE_MEM_2_pre(shift) \

  static DecodeStatus CONCAT(DecodeMVE_MEM_2_pre, shift)( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

    DECLARE_DecodeMVE_MEM_2_pre(0) DECLARE_DecodeMVE_MEM_2_pre(

      1) DECLARE_DecodeMVE_MEM_2_pre(2)

#define DECLARE_DecodeMVE_MEM_3_pre(shift) \

  static DecodeStatus CONCAT(DecodeMVE_MEM_3_pre, shift)( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

      DECLARE_DecodeMVE_MEM_3_pre(

        2) DECLARE_DecodeMVE_MEM_3_pre(3)

#define DECLARE_DecodePowerTwoOperand(MinLog, MaxLog) \

  static DecodeStatus CONCAT(DecodePowerTwoOperand, \

           CONCAT(MinLog, MaxLog))( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

        DECLARE_DecodePowerTwoOperand(0, 3)

#define DECLARE_DecodeMVEPairVectorIndexOperand(start) \

  static DecodeStatus CONCAT(DecodeMVEPairVectorIndexOperand, start)( \

    MCInst * Inst, unsigned Val, uint64_t Address, \

    const void *Decoder);

          DECLARE_DecodeMVEPairVectorIndexOperand(

            2)

            DECLARE_DecodeMVEPairVectorIndexOperand(

              0)

              static DecodeStatus

  DecodeMVEVMOVQtoDReg(MCInst *Inst, unsigned Insn, uint64_t Address,

           const void *Decoder);

static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeMVEVCVTt1fp(MCInst *Inst, unsigned Insn,

              uint64_t Address, const void *Decoder);

typedef DecodeStatus OperandDecoder(MCInst *Inst, unsigned Val,

            uint64_t Address, const void *Decoder);

#define DECLARE_DecodeMVEVCMP(scalar, predicate_decoder) \

  static DecodeStatus CONCAT(DecodeMVEVCMP, \

           CONCAT(scalar, predicate_decoder))( \

    MCInst * Inst, unsigned Insn, uint64_t Address, \

    const void *Decoder);

DECLARE_DecodeMVEVCMP(false, DecodeRestrictedIPredicateOperand) DECLARE_DecodeMVEVCMP(

  false, DecodeRestrictedUPredicateOperand)

  DECLARE_DecodeMVEVCMP(false, DecodeRestrictedSPredicateOperand)

    DECLARE_DecodeMVEVCMP(true, DecodeRestrictedIPredicateOperand)

      DECLARE_DecodeMVEVCMP(true,

                DecodeRestrictedUPredicateOperand)

        DECLARE_DecodeMVEVCMP(

          true, DecodeRestrictedSPredicateOperand)

          DECLARE_DecodeMVEVCMP(

            false,

            DecodeRestrictedFPPredicateOperand)

            DECLARE_DecodeMVEVCMP(

              true,

              DecodeRestrictedFPPredicateOperand)

              static DecodeStatus

  DecodeMveVCTP(MCInst *Inst, unsigned Insn, uint64_t Address,

          const void *Decoder);

static DecodeStatus DecodeMVEVPNOT(MCInst *Inst, unsigned Insn,

           uint64_t Address, const void *Decoder);

static DecodeStatus DecodeMVEOverlappingLongShift(MCInst *Inst, unsigned Insn,

              uint64_t Address,

              const void *Decoder);

static DecodeStatus DecodeT2AddSubSPImm(MCInst *Inst, unsigned Insn,

          uint64_t Address, const void *Decoder);

#include "ARMGenDisassemblerTables.inc"

// Post-decoding checks

static DecodeStatus checkDecodedInstruction(MCInst *MI, uint32_t Insn,

              DecodeStatus Result)

{

  switch (MCInst_getOpcode(MI)) {

  case ARM_HVC: {

    // HVC is undefined if condition = 0xf otherwise upredictable

    // if condition != 0xe

    uint32_t Cond = (Insn >> 28) & 0xF;

    if (Cond == 0xF)

      return MCDisassembler_Fail;

    if (Cond != 0xE)

      return MCDisassembler_SoftFail;

    return Result;

  }

  case ARM_t2ADDri:

  case ARM_t2ADDri12:

  case ARM_t2ADDrr:

  case ARM_t2ADDrs:

  case ARM_t2SUBri:

  case ARM_t2SUBri12:

  case ARM_t2SUBrr:

  case ARM_t2SUBrs:

    if (MCOperand_getReg(MCInst_getOperand(MI, (0))) == ARM_SP &&

        MCOperand_getReg(MCInst_getOperand(MI, (1))) != ARM_SP)

      return MCDisassembler_SoftFail;

    return Result;

  default:

    return Result;

  }

}

static DecodeStatus getInstruction(csh ud, const uint8_t *Bytes,

           size_t BytesLen, MCInst *MI, uint16_t *Size,

           uint64_t Address, void *Info)

{

  DecodeStatus Result = MCDisassembler_Fail;

  if (MI->csh->mode & CS_MODE_THUMB)

    Result = getThumbInstruction(ud, Bytes, BytesLen, MI, Size,

               Address, Info);

  else

    Result = getARMInstruction(ud, Bytes, BytesLen, MI, Size,

             Address, Info);

  MCInst_handleWriteback(MI, ARMInsts, ARR_SIZE(ARMInsts));

  return Result;

}

static inline uint32_t endianSensitiveOpcode32(MCInst *MI, const uint8_t *Bytes)

{

  uint32_t Insn;

  if (MODE_IS_BIG_ENDIAN(MI->csh->mode))

    Insn = (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) |

           ((uint32_t)Bytes[0] << 24);

  else

    Insn = ((uint32_t)Bytes[3] << 24) | (Bytes[2] << 16) |

           (Bytes[1] << 8) | (Bytes[0] << 0);

  return Insn;

}

static inline uint16_t endianSensitiveOpcode16(MCInst *MI, const uint8_t *Bytes)

{

  uint16_t Insn;

  if (MODE_IS_BIG_ENDIAN(MI->csh->mode))

    Insn = (Bytes[0] << 8) | Bytes[1];

  else

    Insn = (Bytes[1] << 8) | Bytes[0];

  return Insn;

}

DecodeStatus getARMInstruction(csh ud, const uint8_t *Bytes, size_t BytesLen,

             MCInst *MI, uint16_t *Size, uint64_t Address,

             void *Info)

{

  // We want to read exactly 4 bytes of data.

  if (BytesLen < 4) {

    *Size = 0;

    return MCDisassembler_Fail;

  }

  // Encoded as a 32-bit word in the stream.

  uint32_t Insn = endianSensitiveOpcode32(MI, Bytes);

  // Calling the auto-generated decoder function.

  DecodeStatus Result =

    decodeInstruction_4(DecoderTableARM32, MI, Insn, Address);

  if (Result != MCDisassembler_Fail) {

    *Size = 4;

    return checkDecodedInstruction(MI, Insn, Result);

  }

  typedef struct DecodeTable {

    const uint8_t *P;

    bool DecodePred;

  } DecodeTable;

  const DecodeTable Tables[] = {

    { DecoderTableVFP32, false },

    { DecoderTableVFPV832, false },

    { DecoderTableNEONData32, true },

    { DecoderTableNEONLoadStore32, true },

    { DecoderTableNEONDup32, true },

    { DecoderTablev8NEON32, false },

    { DecoderTablev8Crypto32, false },

  };

  for (int i = 0; i < (sizeof(Tables) / sizeof(Tables[0])); ++i) {

    MCInst_clear(MI);

    DecodeTable Table = Tables[i];

    Result = decodeInstruction_4(Table.P, MI, Insn, Address);

    if (Result != MCDisassembler_Fail) {

      *Size = 4;

      // Add a fake predicate operand, because we share these instruction

      // definitions with Thumb2 where these instructions are predicable.

      if (Table.DecodePred &&

          !DecodePredicateOperand(MI, 0xE, Address, Table.P))

        return MCDisassembler_Fail;

      return Result;

    }

  }

  Result = decodeInstruction_4(DecoderTableCoProc32, MI, Insn, Address);

  if (Result != MCDisassembler_Fail) {

    *Size = 4;

    return checkDecodedInstruction(MI, Insn, Result);

  }

  *Size = 4;

  return MCDisassembler_Fail;

}

extern const MCInstrDesc ARMInsts[];

/// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the

/// immediate Value in the MCInst.  The immediate Value has had any PC

/// adjustment made by the caller.  If the instruction is a branch instruction

/// then isBranch is true, else false.  If the getOpInfo() function was set as

/// part of the setupForSymbolicDisassembly() call then that function is called

/// to get any symbolic information at the Address for this instruction.  If

/// that returns non-zero then the symbolic information it returns is used to

/// create an MCExpr and that is added as an operand to the MCInst.  If

/// getOpInfo() returns zero and isBranch is true then a symbol look up for

/// Value is done and if a symbol is found an MCExpr is created with that, else

/// an MCExpr with Value is created.  This function returns true if it adds an

/// operand to the MCInst and false otherwise.

static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value,

             bool isBranch, uint64_t InstSize,

             MCInst *MI, const void *Decoder)

{

  // FIXME: Does it make sense for value to be negative?

  // return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address,

  //         isBranch, /*Offset=*/0, /*OpSize=*/0,

  //         InstSize);

  return false;

}

/// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being

/// referenced by a load instruction with the base register that is the Pc.

/// These can often be values in a literal pool near the Address of the

/// instruction.  The Address of the instruction and its immediate Value are

/// used as a possible literal pool entry.  The SymbolLookUp call back will

/// return the name of a symbol referenced by the literal pool's entry if

/// the referenced address is that of a symbol.  Or it will return a pointer to

/// a literal 'C' string if the referenced address of the literal pool's entry

/// is an address into a section with 'C' string literals.

static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value,

              const void *Decoder)

{

  // Decoder->tryAddingPcLoadReferenceComment(Value, Address);

}

// Thumb1 instructions don't have explicit S bits.  Rather, they

// implicitly set CPSR.  Since it's not represented in the encoding, the

// auto-generated decoder won't inject the CPSR operand.  We need to fix

// that as a post-pass.

static void AddThumb1SBit(MCInst *MI, bool InITBlock)

{

  const MCOperandInfo *OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo;

  unsigned short NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands;

  unsigned i;

  for (i = 0; i < NumOps; ++i) {

    if (i == MCInst_getNumOperands(MI))

      break;

    if (MCOperandInfo_isOptionalDef(&OpInfo[i]) &&

        OpInfo[i].RegClass == ARM_CCRRegClassID) {

      if (i > 0 && MCOperandInfo_isPredicate(&OpInfo[i - 1]))

        continue;

      MCInst_insert0(MI, i,

               MCOperand_CreateReg1(

                 MI, (InITBlock ? 0 : ARM_CPSR)));

      return;

    }

  }

  MCInst_insert0(MI, i,

           MCOperand_CreateReg1(MI, (InITBlock ? 0 : ARM_CPSR)));

}

static bool isVectorPredicable(unsigned Opcode)

{

  const MCOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;

  unsigned short NumOps = ARMInsts[Opcode].NumOperands;

  for (unsigned i = 0; i < NumOps; ++i) {

    if (ARM_isVpred(OpInfo[i].OperandType))

      return true;

  }

  return false;

}

// Most Thumb instructions don't have explicit predicates in the

// encoding, but rather get their predicates from IT context.  We need

// to fix up the predicate operands using this context information as a

// post-pass.

DecodeStatus AddThumbPredicate(MCInst *MI)

{

  DecodeStatus S = MCDisassembler_Success;

  // A few instructions actually have predicates encoded in them.  Don't

  // try to overwrite it if we're seeing one of those.

  switch (MCInst_getOpcode(MI)) {

  case ARM_tBcc:

  case ARM_t2Bcc:

  case ARM_tCBZ:

  case ARM_tCBNZ:

  case ARM_tCPS:

  case ARM_t2CPS3p:

  case ARM_t2CPS2p:

  case ARM_t2CPS1p:

  case ARM_t2CSEL:

  case ARM_t2CSINC:

  case ARM_t2CSINV:

  case ARM_t2CSNEG:

  case ARM_tMOVSr:

  case ARM_tSETEND:

    // Some instructions (mostly conditional branches) are not

    // allowed in IT blocks.

    if (ITBlock_instrInITBlock(&(MI->csh->ITBlock)))

      S = MCDisassembler_SoftFail;

    else

      return MCDisassembler_Success;

    break;

  case ARM_t2HINT:

    if (MCOperand_getImm(MCInst_getOperand(MI, (0))) == 0x10 &&

        (ARM_getFeatureBits(MI->csh->mode, ARM_FeatureRAS)) != 0)

      S = MCDisassembler_SoftFail;

    break;

  case ARM_tB:

  case ARM_t2B:

  case ARM_t2TBB:

  case ARM_t2TBH:

    // Some instructions (mostly unconditional branches) can

    // only appears at the end of, or outside of, an IT.

    if (ITBlock_instrInITBlock(&(MI->csh->ITBlock)) &&

        !ITBlock_instrLastInITBlock(&(MI->csh->ITBlock)))

      S = MCDisassembler_SoftFail;

    break;

  default:

    break;

  }

  // Warn on non-VPT predicable instruction in a VPT block and a VPT

  // predicable instruction in an IT block

  if ((!isVectorPredicable(MCInst_getOpcode(MI)) &&

       VPTBlock_instrInVPTBlock(&(MI->csh->VPTBlock))) ||

      (isVectorPredicable(MCInst_getOpcode(MI)) &&

       ITBlock_instrInITBlock(&(MI->csh->ITBlock))))

    S = MCDisassembler_SoftFail;

  // If we're in an IT/VPT block, base the predicate on that.  Otherwise,

  // assume a predicate of AL.

  unsigned CC = ARMCC_AL;

  unsigned VCC = ARMVCC_None;

  if (ITBlock_instrInITBlock(&(MI->csh->ITBlock))) {

    CC = ITBlock_getITCC(&(MI->csh->ITBlock));

    ITBlock_advanceITState(&(MI->csh->ITBlock));

  } else if (VPTBlock_instrInVPTBlock(&(MI->csh->VPTBlock))) {

    VCC = VPTBlock_getVPTPred(&(MI->csh->VPTBlock));

    VPTBlock_advanceVPTState(&(MI->csh->VPTBlock));

  }

  const MCOperandInfo *OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo;

  unsigned short NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands;

  unsigned i;

  for (i = 0; i < NumOps; ++i) {

    if (MCOperandInfo_isPredicate(&OpInfo[i]) ||

        i == MCInst_getNumOperands(MI))

      break;

  }

  if (MCInst_isPredicable(&ARMInsts[MCInst_getOpcode(MI)])) {

    MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, (CC)));

    if (CC == ARMCC_AL)

      MCInst_insert0(MI, i + 1,

               MCOperand_CreateReg1(MI, (0)));

    else

      MCInst_insert0(MI, i + 1,

               MCOperand_CreateReg1(MI, (ARM_CPSR)));

  } else if (CC != ARMCC_AL) {

    Check(&S, MCDisassembler_SoftFail);

  }

  unsigned VCCPos;

  for (VCCPos = 0; VCCPos < NumOps; ++VCCPos) {

    if (ARM_isVpred(OpInfo[VCCPos].OperandType) ||

        VCCPos == MCInst_getNumOperands(MI))

      break;

  }

  if (isVectorPredicable(MCInst_getOpcode(MI))) {

    MCInst_insert0(MI, VCCPos, MCOperand_CreateImm1(MI, (VCC)));

    if (VCC == ARMVCC_None)

      MCInst_insert0(MI, VCCPos + 1,

               MCOperand_CreateReg1(MI, (0)));

    else

      MCInst_insert0(MI, VCCPos + 1,

               MCOperand_CreateReg1(MI, (ARM_P0)));

    MCInst_insert0(MI, VCCPos + 2, MCOperand_CreateReg1(MI, (0)));

    if (OpInfo[VCCPos].OperandType == ARM_OP_VPRED_R) {

      int TiedOp = MCOperandInfo_getOperandConstraint(

        &ARMInsts[MCInst_getOpcode(MI)], VCCPos + 3,

        MCOI_TIED_TO);

      assert(TiedOp >= 0 &&

             "Inactive register in vpred_r is not tied to an output!");

      // Copy the operand to ensure it's not invalidated when MI grows.

      MCOperand Op = *MCInst_getOperand(MI, TiedOp);

      MCInst_insert0(MI, VCCPos + 3, &Op);

    }

  } else if (VCC != ARMVCC_None) {

    Check(&S, MCDisassembler_SoftFail);

  }

  return S;

}

// Thumb VFP instructions are a special case.  Because we share their

// encodings between ARM and Thumb modes, and they are predicable in ARM

// mode, the auto-generated decoder will give them an (incorrect)

// predicate operand.  We need to rewrite these operands based on the IT

// context as a post-pass.

void UpdateThumbVFPPredicate(DecodeStatus S, MCInst *MI)

{

  unsigned CC;

  CC = ITBlock_getITCC(&(MI->csh->ITBlock));

  if (CC == 0xF)

    CC = ARMCC_AL;

  if (ITBlock_instrInITBlock(&(MI->csh->ITBlock)))

    ITBlock_advanceITState(&(MI->csh->ITBlock));

  else if (VPTBlock_instrInVPTBlock(&(MI->csh->VPTBlock))) {

    CC = VPTBlock_getVPTPred(&(MI->csh->VPTBlock));

    VPTBlock_advanceVPTState(&(MI->csh->VPTBlock));

  }

  const MCOperandInfo *OpInfo = ARMInsts[MCInst_getOpcode(MI)].OpInfo;

  unsigned short NumOps = ARMInsts[MCInst_getOpcode(MI)].NumOperands;

  for (unsigned i = 0; i < NumOps; ++i) {

    if (MCOperandInfo_isPredicate(&OpInfo[i])) {

      if (CC != ARMCC_AL &&

          !MCInst_isPredicable(

            &ARMInsts[MCInst_getOpcode(MI)]))

        Check(&S, MCDisassembler_SoftFail);

      MCOperand_setImm(MCInst_getOperand(MI, i), CC);

      if (CC == ARMCC_AL)

        MCOperand_setReg(MCInst_getOperand(MI, i + 1),

             0);

      else

        MCOperand_setReg(MCInst_getOperand(MI, i + 1),

             ARM_CPSR);

      return;

    }

  }

}

DecodeStatus getThumbInstruction(csh ud, const uint8_t *Bytes, size_t BytesLen,

         MCInst *MI, uint16_t *Size, uint64_t Address,

         void *Info)

{

  // We want to read exactly 2 bytes of data.

  if (BytesLen < 2) {

    *Size = 0;

    return MCDisassembler_Fail;

  }

  uint16_t Insn16 = endianSensitiveOpcode16(MI, Bytes);

  DecodeStatus Result =

    decodeInstruction_2(DecoderTableThumb16, MI, Insn16, Address);

  if (Result != MCDisassembler_Fail) {

    *Size = 2;

    Check(&Result, AddThumbPredicate(MI));

    return Result;

  }

  Result = decodeInstruction_2(DecoderTableThumbSBit16, MI, Insn16,

             Address);

  if (Result) {

    *Size = 2;

    bool InITBlock = ITBlock_instrInITBlock(&(MI->csh->ITBlock));

    Check(&Result, AddThumbPredicate(MI));

    AddThumb1SBit(MI, InITBlock);

    return Result;

  }

  Result = decodeInstruction_2(DecoderTableThumb216, MI, Insn16, Address);

  if (Result != MCDisassembler_Fail) {

    *Size = 2;

    // Nested IT blocks are UNPREDICTABLE.  Must be checked before we add

    // the Thumb predicate.

    if (MCInst_getOpcode(MI) == ARM_t2IT &&

        ITBlock_instrInITBlock(&(MI->csh->ITBlock)))

      Result = MCDisassembler_SoftFail;

    Check(&Result, AddThumbPredicate(MI));

    // If we find an IT instruction, we need to parse its condition

    // code and mask operands so that we can apply them correctly

    // to the subsequent instructions.

    if (MCInst_getOpcode(MI) == ARM_t2IT) {

      unsigned Firstcond =

        MCOperand_getImm(MCInst_getOperand(MI, (0)));

      unsigned Mask =

        MCOperand_getImm(MCInst_getOperand(MI, (1)));

      ITBlock_setITState(&(MI->csh->ITBlock), (char)Firstcond,

             (char)Mask);

      // An IT instruction that would give a 'NV' predicate is

      // unpredictable. if (Firstcond == ARMCC_AL && !isPowerOf2_32(Mask))

      //  SStream_concat0(CS, "unpredictable IT predicate sequence");

    }

    return Result;

  }

  // We want to read exactly 4 bytes of data.

  if (BytesLen < 4) {

    *Size = 0;

    return MCDisassembler_Fail;

  }

  uint32_t Insn32 = (uint32_t)Insn16 << 16 |

        endianSensitiveOpcode16(MI, Bytes + 2);

  Result = decodeInstruction_4(DecoderTableMVE32, MI, Insn32, Address);

  if (Result != MCDisassembler_Fail) {

    *Size = 4;

    // Nested VPT blocks are UNPREDICTABLE. Must be checked before we add

    // the VPT predicate.

    if (isVPTOpcode(MCInst_getOpcode(MI)) &&

        VPTBlock_instrInVPTBlock(&(MI->csh->VPTBlock)))

      Result = MCDisassembler_SoftFail;

    Check(&Result, AddThumbPredicate(MI));

    if (isVPTOpcode(MCInst_getOpcode(MI))) {

      unsigned Mask =

        MCOperand_getImm(MCInst_getOperand(MI, (0)));

      VPTBlock_setVPTState(&(MI->csh->VPTBlock), Mask);

    }