/src/capstonev5/arch/AArch64/AArch64GenAsmWriter.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /* Capstone Disassembly Engine, http://www.capstone-engine.org */ |
2 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */ |
3 | | |
4 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
5 | | |* *| |
6 | | |* Assembly Writer Source Fragment *| |
7 | | |* *| |
8 | | |* Automatically generated file, do not edit! *| |
9 | | |* *| |
10 | | \*===----------------------------------------------------------------------===*/ |
11 | | |
12 | | /// getMnemonic - This method is automatically generated by tablegen |
13 | | /// from the instruction set description. |
14 | 414k | static uint64_t getMnemonic(MCInst *MI, SStream *O, unsigned int opcode) { |
15 | | |
16 | 414k | #ifdef __GNUC__ |
17 | 414k | #pragma GCC diagnostic push |
18 | 414k | #pragma GCC diagnostic ignored "-Woverlength-strings" |
19 | 414k | #endif |
20 | | |
21 | 414k | #ifndef CAPSTONE_DIET |
22 | 414k | static const char AsmStrs[] = { |
23 | 414k | /* 0 */ "sha1su0\t\0" |
24 | 414k | /* 9 */ "sha512su0\t\0" |
25 | 414k | /* 20 */ "sha256su0\t\0" |
26 | 414k | /* 31 */ "st64bv0\t\0" |
27 | 414k | /* 40 */ "ld1\t\0" |
28 | 414k | /* 45 */ "trn1\t\0" |
29 | 414k | /* 51 */ "zip1\t\0" |
30 | 414k | /* 57 */ "uzp1\t\0" |
31 | 414k | /* 63 */ "dcps1\t\0" |
32 | 414k | /* 70 */ "sm3ss1\t\0" |
33 | 414k | /* 78 */ "st1\t\0" |
34 | 414k | /* 83 */ "sha1su1\t\0" |
35 | 414k | /* 92 */ "sha512su1\t\0" |
36 | 414k | /* 103 */ "sha256su1\t\0" |
37 | 414k | /* 114 */ "sm3partw1\t\0" |
38 | 414k | /* 125 */ "rax1\t\0" |
39 | 414k | /* 131 */ "rev32\t\0" |
40 | 414k | /* 138 */ "ld2\t\0" |
41 | 414k | /* 143 */ "sha512h2\t\0" |
42 | 414k | /* 153 */ "sha256h2\t\0" |
43 | 414k | /* 163 */ "sabal2\t\0" |
44 | 414k | /* 171 */ "uabal2\t\0" |
45 | 414k | /* 179 */ "sqdmlal2\t\0" |
46 | 414k | /* 189 */ "fmlal2\t\0" |
47 | 414k | /* 197 */ "smlal2\t\0" |
48 | 414k | /* 205 */ "umlal2\t\0" |
49 | 414k | /* 213 */ "ssubl2\t\0" |
50 | 414k | /* 221 */ "usubl2\t\0" |
51 | 414k | /* 229 */ "sabdl2\t\0" |
52 | 414k | /* 237 */ "uabdl2\t\0" |
53 | 414k | /* 245 */ "saddl2\t\0" |
54 | 414k | /* 253 */ "uaddl2\t\0" |
55 | 414k | /* 261 */ "sshll2\t\0" |
56 | 414k | /* 269 */ "ushll2\t\0" |
57 | 414k | /* 277 */ "sqdmull2\t\0" |
58 | 414k | /* 287 */ "pmull2\t\0" |
59 | 414k | /* 295 */ "smull2\t\0" |
60 | 414k | /* 303 */ "umull2\t\0" |
61 | 414k | /* 311 */ "sqdmlsl2\t\0" |
62 | 414k | /* 321 */ "fmlsl2\t\0" |
63 | 414k | /* 329 */ "smlsl2\t\0" |
64 | 414k | /* 337 */ "umlsl2\t\0" |
65 | 414k | /* 345 */ "fcvtl2\t\0" |
66 | 414k | /* 353 */ "rsubhn2\t\0" |
67 | 414k | /* 362 */ "raddhn2\t\0" |
68 | 414k | /* 371 */ "sqshrn2\t\0" |
69 | 414k | /* 380 */ "uqshrn2\t\0" |
70 | 414k | /* 389 */ "sqrshrn2\t\0" |
71 | 414k | /* 399 */ "uqrshrn2\t\0" |
72 | 414k | /* 409 */ "trn2\t\0" |
73 | 414k | /* 415 */ "bfcvtn2\t\0" |
74 | 414k | /* 424 */ "sqxtn2\t\0" |
75 | 414k | /* 432 */ "uqxtn2\t\0" |
76 | 414k | /* 440 */ "sqshrun2\t\0" |
77 | 414k | /* 450 */ "sqrshrun2\t\0" |
78 | 414k | /* 461 */ "sqxtun2\t\0" |
79 | 414k | /* 470 */ "fcvtxn2\t\0" |
80 | 414k | /* 479 */ "zip2\t\0" |
81 | 414k | /* 485 */ "uzp2\t\0" |
82 | 414k | /* 491 */ "dcps2\t\0" |
83 | 414k | /* 498 */ "st2\t\0" |
84 | 414k | /* 503 */ "ssubw2\t\0" |
85 | 414k | /* 511 */ "usubw2\t\0" |
86 | 414k | /* 519 */ "saddw2\t\0" |
87 | 414k | /* 527 */ "uaddw2\t\0" |
88 | 414k | /* 535 */ "sm3partw2\t\0" |
89 | 414k | /* 546 */ "ld3\t\0" |
90 | 414k | /* 551 */ "eor3\t\0" |
91 | 414k | /* 557 */ "dcps3\t\0" |
92 | 414k | /* 564 */ "st3\t\0" |
93 | 414k | /* 569 */ "rev64\t\0" |
94 | 414k | /* 576 */ "ld4\t\0" |
95 | 414k | /* 581 */ "st4\t\0" |
96 | 414k | /* 586 */ "setf16\t\0" |
97 | 414k | /* 594 */ "rev16\t\0" |
98 | 414k | /* 601 */ "setf8\t\0" |
99 | 414k | /* 608 */ "sm3tt1a\t\0" |
100 | 414k | /* 617 */ "sm3tt2a\t\0" |
101 | 414k | /* 626 */ "braa\t\0" |
102 | 414k | /* 632 */ "ldraa\t\0" |
103 | 414k | /* 639 */ "blraa\t\0" |
104 | 414k | /* 646 */ "saba\t\0" |
105 | 414k | /* 652 */ "uaba\t\0" |
106 | 414k | /* 658 */ "pacda\t\0" |
107 | 414k | /* 665 */ "ldadda\t\0" |
108 | 414k | /* 673 */ "fadda\t\0" |
109 | 414k | /* 680 */ "autda\t\0" |
110 | 414k | /* 687 */ "pacga\t\0" |
111 | 414k | /* 694 */ "addha\t\0" |
112 | 414k | /* 701 */ "pacia\t\0" |
113 | 414k | /* 708 */ "autia\t\0" |
114 | 414k | /* 715 */ "brka\t\0" |
115 | 414k | /* 721 */ "fcmla\t\0" |
116 | 414k | /* 728 */ "fmla\t\0" |
117 | 414k | /* 734 */ "bfmmla\t\0" |
118 | 414k | /* 742 */ "usmmla\t\0" |
119 | 414k | /* 750 */ "ummla\t\0" |
120 | 414k | /* 757 */ "fnmla\t\0" |
121 | 414k | /* 764 */ "ldsmina\t\0" |
122 | 414k | /* 773 */ "ldumina\t\0" |
123 | 414k | /* 782 */ "brkpa\t\0" |
124 | 414k | /* 789 */ "bfmopa\t\0" |
125 | 414k | /* 797 */ "usmopa\t\0" |
126 | 414k | /* 805 */ "sumopa\t\0" |
127 | 414k | /* 813 */ "caspa\t\0" |
128 | 414k | /* 820 */ "swpa\t\0" |
129 | 414k | /* 826 */ "fexpa\t\0" |
130 | 414k | /* 833 */ "ldclra\t\0" |
131 | 414k | /* 841 */ "ldeora\t\0" |
132 | 414k | /* 849 */ "srsra\t\0" |
133 | 414k | /* 856 */ "ursra\t\0" |
134 | 414k | /* 863 */ "ssra\t\0" |
135 | 414k | /* 869 */ "usra\t\0" |
136 | 414k | /* 875 */ "casa\t\0" |
137 | 414k | /* 881 */ "ldseta\t\0" |
138 | 414k | /* 889 */ "frinta\t\0" |
139 | 414k | /* 897 */ "clasta\t\0" |
140 | 414k | /* 905 */ "addva\t\0" |
141 | 414k | /* 912 */ "mova\t\0" |
142 | 414k | /* 918 */ "ldsmaxa\t\0" |
143 | 414k | /* 927 */ "ldumaxa\t\0" |
144 | 414k | /* 936 */ "pacdza\t\0" |
145 | 414k | /* 944 */ "autdza\t\0" |
146 | 414k | /* 952 */ "paciza\t\0" |
147 | 414k | /* 960 */ "autiza\t\0" |
148 | 414k | /* 968 */ "ld1b\t\0" |
149 | 414k | /* 974 */ "ldff1b\t\0" |
150 | 414k | /* 982 */ "ldnf1b\t\0" |
151 | 414k | /* 990 */ "ldnt1b\t\0" |
152 | 414k | /* 998 */ "stnt1b\t\0" |
153 | 414k | /* 1006 */ "st1b\t\0" |
154 | 414k | /* 1012 */ "sm3tt1b\t\0" |
155 | 414k | /* 1021 */ "crc32b\t\0" |
156 | 414k | /* 1029 */ "ld2b\t\0" |
157 | 414k | /* 1035 */ "st2b\t\0" |
158 | 414k | /* 1041 */ "sm3tt2b\t\0" |
159 | 414k | /* 1050 */ "ld3b\t\0" |
160 | 414k | /* 1056 */ "st3b\t\0" |
161 | 414k | /* 1062 */ "ld64b\t\0" |
162 | 414k | /* 1069 */ "st64b\t\0" |
163 | 414k | /* 1076 */ "ld4b\t\0" |
164 | 414k | /* 1082 */ "st4b\t\0" |
165 | 414k | /* 1088 */ "ldaddab\t\0" |
166 | 414k | /* 1097 */ "ldsminab\t\0" |
167 | 414k | /* 1107 */ "lduminab\t\0" |
168 | 414k | /* 1117 */ "swpab\t\0" |
169 | 414k | /* 1124 */ "brab\t\0" |
170 | 414k | /* 1130 */ "ldrab\t\0" |
171 | 414k | /* 1137 */ "blrab\t\0" |
172 | 414k | /* 1144 */ "ldclrab\t\0" |
173 | 414k | /* 1153 */ "ldeorab\t\0" |
174 | 414k | /* 1162 */ "casab\t\0" |
175 | 414k | /* 1169 */ "ldsetab\t\0" |
176 | 414k | /* 1178 */ "ldsmaxab\t\0" |
177 | 414k | /* 1188 */ "ldumaxab\t\0" |
178 | 414k | /* 1198 */ "crc32cb\t\0" |
179 | 414k | /* 1207 */ "sqdecb\t\0" |
180 | 414k | /* 1215 */ "uqdecb\t\0" |
181 | 414k | /* 1223 */ "sqincb\t\0" |
182 | 414k | /* 1231 */ "uqincb\t\0" |
183 | 414k | /* 1239 */ "pacdb\t\0" |
184 | 414k | /* 1246 */ "ldaddb\t\0" |
185 | 414k | /* 1254 */ "autdb\t\0" |
186 | 414k | /* 1261 */ "prfb\t\0" |
187 | 414k | /* 1267 */ "flogb\t\0" |
188 | 414k | /* 1274 */ "pacib\t\0" |
189 | 414k | /* 1281 */ "autib\t\0" |
190 | 414k | /* 1288 */ "brkb\t\0" |
191 | 414k | /* 1294 */ "sabalb\t\0" |
192 | 414k | /* 1302 */ "uabalb\t\0" |
193 | 414k | /* 1310 */ "ldaddalb\t\0" |
194 | 414k | /* 1320 */ "sqdmlalb\t\0" |
195 | 414k | /* 1330 */ "bfmlalb\t\0" |
196 | 414k | /* 1339 */ "smlalb\t\0" |
197 | 414k | /* 1347 */ "umlalb\t\0" |
198 | 414k | /* 1355 */ "ldsminalb\t\0" |
199 | 414k | /* 1366 */ "lduminalb\t\0" |
200 | 414k | /* 1377 */ "swpalb\t\0" |
201 | 414k | /* 1385 */ "ldclralb\t\0" |
202 | 414k | /* 1395 */ "ldeoralb\t\0" |
203 | 414k | /* 1405 */ "casalb\t\0" |
204 | 414k | /* 1413 */ "ldsetalb\t\0" |
205 | 414k | /* 1423 */ "ldsmaxalb\t\0" |
206 | 414k | /* 1434 */ "ldumaxalb\t\0" |
207 | 414k | /* 1445 */ "ssublb\t\0" |
208 | 414k | /* 1453 */ "usublb\t\0" |
209 | 414k | /* 1461 */ "sbclb\t\0" |
210 | 414k | /* 1468 */ "adclb\t\0" |
211 | 414k | /* 1475 */ "sabdlb\t\0" |
212 | 414k | /* 1483 */ "uabdlb\t\0" |
213 | 414k | /* 1491 */ "ldaddlb\t\0" |
214 | 414k | /* 1500 */ "saddlb\t\0" |
215 | 414k | /* 1508 */ "uaddlb\t\0" |
216 | 414k | /* 1516 */ "sshllb\t\0" |
217 | 414k | /* 1524 */ "ushllb\t\0" |
218 | 414k | /* 1532 */ "sqdmullb\t\0" |
219 | 414k | /* 1542 */ "pmullb\t\0" |
220 | 414k | /* 1550 */ "smullb\t\0" |
221 | 414k | /* 1558 */ "umullb\t\0" |
222 | 414k | /* 1566 */ "ldsminlb\t\0" |
223 | 414k | /* 1576 */ "lduminlb\t\0" |
224 | 414k | /* 1586 */ "swplb\t\0" |
225 | 414k | /* 1593 */ "ldclrlb\t\0" |
226 | 414k | /* 1602 */ "ldeorlb\t\0" |
227 | 414k | /* 1611 */ "caslb\t\0" |
228 | 414k | /* 1618 */ "sqdmlslb\t\0" |
229 | 414k | /* 1628 */ "fmlslb\t\0" |
230 | 414k | /* 1636 */ "smlslb\t\0" |
231 | 414k | /* 1644 */ "umlslb\t\0" |
232 | 414k | /* 1652 */ "ldsetlb\t\0" |
233 | 414k | /* 1661 */ "ldsmaxlb\t\0" |
234 | 414k | /* 1671 */ "ldumaxlb\t\0" |
235 | 414k | /* 1681 */ "dmb\t\0" |
236 | 414k | /* 1686 */ "rsubhnb\t\0" |
237 | 414k | /* 1695 */ "raddhnb\t\0" |
238 | 414k | /* 1704 */ "ldsminb\t\0" |
239 | 414k | /* 1713 */ "lduminb\t\0" |
240 | 414k | /* 1722 */ "sqshrnb\t\0" |
241 | 414k | /* 1731 */ "uqshrnb\t\0" |
242 | 414k | /* 1740 */ "sqrshrnb\t\0" |
243 | 414k | /* 1750 */ "uqrshrnb\t\0" |
244 | 414k | /* 1760 */ "sqxtnb\t\0" |
245 | 414k | /* 1768 */ "uqxtnb\t\0" |
246 | 414k | /* 1776 */ "sqshrunb\t\0" |
247 | 414k | /* 1786 */ "sqrshrunb\t\0" |
248 | 414k | /* 1797 */ "sqxtunb\t\0" |
249 | 414k | /* 1806 */ "ld1rob\t\0" |
250 | 414k | /* 1814 */ "brkpb\t\0" |
251 | 414k | /* 1821 */ "swpb\t\0" |
252 | 414k | /* 1827 */ "ld1rqb\t\0" |
253 | 414k | /* 1835 */ "ld1rb\t\0" |
254 | 414k | /* 1842 */ "ldarb\t\0" |
255 | 414k | /* 1849 */ "ldlarb\t\0" |
256 | 414k | /* 1857 */ "ldrb\t\0" |
257 | 414k | /* 1863 */ "ldclrb\t\0" |
258 | 414k | /* 1871 */ "stllrb\t\0" |
259 | 414k | /* 1879 */ "stlrb\t\0" |
260 | 414k | /* 1886 */ "ldeorb\t\0" |
261 | 414k | /* 1894 */ "ldaprb\t\0" |
262 | 414k | /* 1902 */ "ldtrb\t\0" |
263 | 414k | /* 1909 */ "strb\t\0" |
264 | 414k | /* 1915 */ "sttrb\t\0" |
265 | 414k | /* 1922 */ "ldurb\t\0" |
266 | 414k | /* 1929 */ "stlurb\t\0" |
267 | 414k | /* 1937 */ "ldapurb\t\0" |
268 | 414k | /* 1946 */ "sturb\t\0" |
269 | 414k | /* 1953 */ "ldaxrb\t\0" |
270 | 414k | /* 1961 */ "ldxrb\t\0" |
271 | 414k | /* 1968 */ "stlxrb\t\0" |
272 | 414k | /* 1976 */ "stxrb\t\0" |
273 | 414k | /* 1983 */ "ld1sb\t\0" |
274 | 414k | /* 1990 */ "ldff1sb\t\0" |
275 | 414k | /* 1999 */ "ldnf1sb\t\0" |
276 | 414k | /* 2008 */ "ldnt1sb\t\0" |
277 | 414k | /* 2017 */ "casb\t\0" |
278 | 414k | /* 2023 */ "dsb\t\0" |
279 | 414k | /* 2028 */ "isb\t\0" |
280 | 414k | /* 2033 */ "fmsb\t\0" |
281 | 414k | /* 2039 */ "fnmsb\t\0" |
282 | 414k | /* 2046 */ "ld1rsb\t\0" |
283 | 414k | /* 2054 */ "ldrsb\t\0" |
284 | 414k | /* 2061 */ "ldtrsb\t\0" |
285 | 414k | /* 2069 */ "ldursb\t\0" |
286 | 414k | /* 2077 */ "ldapursb\t\0" |
287 | 414k | /* 2087 */ "tsb\t\0" |
288 | 414k | /* 2092 */ "ldsetb\t\0" |
289 | 414k | /* 2100 */ "ssubltb\t\0" |
290 | 414k | /* 2109 */ "cntb\t\0" |
291 | 414k | /* 2115 */ "eortb\t\0" |
292 | 414k | /* 2122 */ "clastb\t\0" |
293 | 414k | /* 2130 */ "sxtb\t\0" |
294 | 414k | /* 2136 */ "uxtb\t\0" |
295 | 414k | /* 2142 */ "fsub\t\0" |
296 | 414k | /* 2148 */ "shsub\t\0" |
297 | 414k | /* 2155 */ "uhsub\t\0" |
298 | 414k | /* 2162 */ "fmsub\t\0" |
299 | 414k | /* 2169 */ "fnmsub\t\0" |
300 | 414k | /* 2177 */ "sqsub\t\0" |
301 | 414k | /* 2184 */ "uqsub\t\0" |
302 | 414k | /* 2191 */ "revb\t\0" |
303 | 414k | /* 2197 */ "ssubwb\t\0" |
304 | 414k | /* 2205 */ "usubwb\t\0" |
305 | 414k | /* 2213 */ "saddwb\t\0" |
306 | 414k | /* 2221 */ "uaddwb\t\0" |
307 | 414k | /* 2229 */ "ldsmaxb\t\0" |
308 | 414k | /* 2238 */ "ldumaxb\t\0" |
309 | 414k | /* 2247 */ "pacdzb\t\0" |
310 | 414k | /* 2255 */ "autdzb\t\0" |
311 | 414k | /* 2263 */ "pacizb\t\0" |
312 | 414k | /* 2271 */ "autizb\t\0" |
313 | 414k | /* 2279 */ "sha1c\t\0" |
314 | 414k | /* 2286 */ "sbc\t\0" |
315 | 414k | /* 2291 */ "adc\t\0" |
316 | 414k | /* 2296 */ "bic\t\0" |
317 | 414k | /* 2301 */ "aesimc\t\0" |
318 | 414k | /* 2309 */ "aesmc\t\0" |
319 | 414k | /* 2316 */ "csinc\t\0" |
320 | 414k | /* 2323 */ "hvc\t\0" |
321 | 414k | /* 2328 */ "svc\t\0" |
322 | 414k | /* 2333 */ "ld1d\t\0" |
323 | 414k | /* 2339 */ "ldff1d\t\0" |
324 | 414k | /* 2347 */ "ldnf1d\t\0" |
325 | 414k | /* 2355 */ "ldnt1d\t\0" |
326 | 414k | /* 2363 */ "stnt1d\t\0" |
327 | 414k | /* 2371 */ "st1d\t\0" |
328 | 414k | /* 2377 */ "ld2d\t\0" |
329 | 414k | /* 2383 */ "st2d\t\0" |
330 | 414k | /* 2389 */ "ld3d\t\0" |
331 | 414k | /* 2395 */ "st3d\t\0" |
332 | 414k | /* 2401 */ "ld4d\t\0" |
333 | 414k | /* 2407 */ "st4d\t\0" |
334 | 414k | /* 2413 */ "fmad\t\0" |
335 | 414k | /* 2419 */ "fnmad\t\0" |
336 | 414k | /* 2426 */ "ftmad\t\0" |
337 | 414k | /* 2433 */ "fabd\t\0" |
338 | 414k | /* 2439 */ "sabd\t\0" |
339 | 414k | /* 2445 */ "uabd\t\0" |
340 | 414k | /* 2451 */ "xpacd\t\0" |
341 | 414k | /* 2458 */ "sqdecd\t\0" |
342 | 414k | /* 2466 */ "uqdecd\t\0" |
343 | 414k | /* 2474 */ "sqincd\t\0" |
344 | 414k | /* 2482 */ "uqincd\t\0" |
345 | 414k | /* 2490 */ "fcadd\t\0" |
346 | 414k | /* 2497 */ "sqcadd\t\0" |
347 | 414k | /* 2505 */ "ldadd\t\0" |
348 | 414k | /* 2512 */ "fadd\t\0" |
349 | 414k | /* 2518 */ "srhadd\t\0" |
350 | 414k | /* 2526 */ "urhadd\t\0" |
351 | 414k | /* 2534 */ "shadd\t\0" |
352 | 414k | /* 2541 */ "uhadd\t\0" |
353 | 414k | /* 2548 */ "fmadd\t\0" |
354 | 414k | /* 2555 */ "fnmadd\t\0" |
355 | 414k | /* 2563 */ "usqadd\t\0" |
356 | 414k | /* 2571 */ "suqadd\t\0" |
357 | 414k | /* 2579 */ "prfd\t\0" |
358 | 414k | /* 2585 */ "nand\t\0" |
359 | 414k | /* 2591 */ "ld1rod\t\0" |
360 | 414k | /* 2599 */ "ld1rqd\t\0" |
361 | 414k | /* 2607 */ "ld1rd\t\0" |
362 | 414k | /* 2614 */ "asrd\t\0" |
363 | 414k | /* 2620 */ "aesd\t\0" |
364 | 414k | /* 2626 */ "cntd\t\0" |
365 | 414k | /* 2632 */ "revd\t\0" |
366 | 414k | /* 2638 */ "sm4e\t\0" |
367 | 414k | /* 2644 */ "splice\t\0" |
368 | 414k | /* 2652 */ "facge\t\0" |
369 | 414k | /* 2659 */ "whilege\t\0" |
370 | 414k | /* 2668 */ "fcmge\t\0" |
371 | 414k | /* 2675 */ "cmpge\t\0" |
372 | 414k | /* 2682 */ "fscale\t\0" |
373 | 414k | /* 2690 */ "whilele\t\0" |
374 | 414k | /* 2699 */ "fcmle\t\0" |
375 | 414k | /* 2706 */ "cmple\t\0" |
376 | 414k | /* 2713 */ "fcmne\t\0" |
377 | 414k | /* 2720 */ "ctermne\t\0" |
378 | 414k | /* 2729 */ "cmpne\t\0" |
379 | 414k | /* 2736 */ "frecpe\t\0" |
380 | 414k | /* 2744 */ "urecpe\t\0" |
381 | 414k | /* 2752 */ "fccmpe\t\0" |
382 | 414k | /* 2760 */ "fcmpe\t\0" |
383 | 414k | /* 2767 */ "aese\t\0" |
384 | 414k | /* 2773 */ "pfalse\t\0" |
385 | 414k | /* 2781 */ "frsqrte\t\0" |
386 | 414k | /* 2790 */ "ursqrte\t\0" |
387 | 414k | /* 2799 */ "ptrue\t\0" |
388 | 414k | /* 2806 */ "udf\t\0" |
389 | 414k | /* 2811 */ "bif\t\0" |
390 | 414k | /* 2816 */ "rmif\t\0" |
391 | 414k | /* 2822 */ "scvtf\t\0" |
392 | 414k | /* 2829 */ "ucvtf\t\0" |
393 | 414k | /* 2836 */ "st2g\t\0" |
394 | 414k | /* 2842 */ "stz2g\t\0" |
395 | 414k | /* 2849 */ "subg\t\0" |
396 | 414k | /* 2855 */ "addg\t\0" |
397 | 414k | /* 2861 */ "ldg\t\0" |
398 | 414k | /* 2866 */ "fneg\t\0" |
399 | 414k | /* 2872 */ "sqneg\t\0" |
400 | 414k | /* 2879 */ "csneg\t\0" |
401 | 414k | /* 2886 */ "histseg\t\0" |
402 | 414k | /* 2895 */ "irg\t\0" |
403 | 414k | /* 2900 */ "stg\t\0" |
404 | 414k | /* 2905 */ "stzg\t\0" |
405 | 414k | /* 2911 */ "sha1h\t\0" |
406 | 414k | /* 2918 */ "ld1h\t\0" |
407 | 414k | /* 2924 */ "ldff1h\t\0" |
408 | 414k | /* 2932 */ "ldnf1h\t\0" |
409 | 414k | /* 2940 */ "ldnt1h\t\0" |
410 | 414k | /* 2948 */ "stnt1h\t\0" |
411 | 414k | /* 2956 */ "st1h\t\0" |
412 | 414k | /* 2962 */ "sha512h\t\0" |
413 | 414k | /* 2971 */ "crc32h\t\0" |
414 | 414k | /* 2979 */ "ld2h\t\0" |
415 | 414k | /* 2985 */ "st2h\t\0" |
416 | 414k | /* 2991 */ "ld3h\t\0" |
417 | 414k | /* 2997 */ "st3h\t\0" |
418 | 414k | /* 3003 */ "ld4h\t\0" |
419 | 414k | /* 3009 */ "st4h\t\0" |
420 | 414k | /* 3015 */ "sha256h\t\0" |
421 | 414k | /* 3024 */ "ldaddah\t\0" |
422 | 414k | /* 3033 */ "sqrdcmlah\t\0" |
423 | 414k | /* 3044 */ "sqrdmlah\t\0" |
424 | 414k | /* 3054 */ "ldsminah\t\0" |
425 | 414k | /* 3064 */ "lduminah\t\0" |
426 | 414k | /* 3074 */ "swpah\t\0" |
427 | 414k | /* 3081 */ "ldclrah\t\0" |
428 | 414k | /* 3090 */ "ldeorah\t\0" |
429 | 414k | /* 3099 */ "casah\t\0" |
430 | 414k | /* 3106 */ "ldsetah\t\0" |
431 | 414k | /* 3115 */ "ldsmaxah\t\0" |
432 | 414k | /* 3125 */ "ldumaxah\t\0" |
433 | 414k | /* 3135 */ "crc32ch\t\0" |
434 | 414k | /* 3144 */ "sqdech\t\0" |
435 | 414k | /* 3152 */ "uqdech\t\0" |
436 | 414k | /* 3160 */ "sqinch\t\0" |
437 | 414k | /* 3168 */ "uqinch\t\0" |
438 | 414k | /* 3176 */ "nmatch\t\0" |
439 | 414k | /* 3184 */ "ldaddh\t\0" |
440 | 414k | /* 3192 */ "prfh\t\0" |
441 | 414k | /* 3198 */ "ldaddalh\t\0" |
442 | 414k | /* 3208 */ "ldsminalh\t\0" |
443 | 414k | /* 3219 */ "lduminalh\t\0" |
444 | 414k | /* 3230 */ "swpalh\t\0" |
445 | 414k | /* 3238 */ "ldclralh\t\0" |
446 | 414k | /* 3248 */ "ldeoralh\t\0" |
447 | 414k | /* 3258 */ "casalh\t\0" |
448 | 414k | /* 3266 */ "ldsetalh\t\0" |
449 | 414k | /* 3276 */ "ldsmaxalh\t\0" |
450 | 414k | /* 3287 */ "ldumaxalh\t\0" |
451 | 414k | /* 3298 */ "ldaddlh\t\0" |
452 | 414k | /* 3307 */ "ldsminlh\t\0" |
453 | 414k | /* 3317 */ "lduminlh\t\0" |
454 | 414k | /* 3327 */ "swplh\t\0" |
455 | 414k | /* 3334 */ "ldclrlh\t\0" |
456 | 414k | /* 3343 */ "ldeorlh\t\0" |
457 | 414k | /* 3352 */ "caslh\t\0" |
458 | 414k | /* 3359 */ "ldsetlh\t\0" |
459 | 414k | /* 3368 */ "sqdmulh\t\0" |
460 | 414k | /* 3377 */ "sqrdmulh\t\0" |
461 | 414k | /* 3387 */ "smulh\t\0" |
462 | 414k | /* 3394 */ "umulh\t\0" |
463 | 414k | /* 3401 */ "ldsmaxlh\t\0" |
464 | 414k | /* 3411 */ "ldumaxlh\t\0" |
465 | 414k | /* 3421 */ "ldsminh\t\0" |
466 | 414k | /* 3430 */ "lduminh\t\0" |
467 | 414k | /* 3439 */ "ld1roh\t\0" |
468 | 414k | /* 3447 */ "swph\t\0" |
469 | 414k | /* 3453 */ "ld1rqh\t\0" |
470 | 414k | /* 3461 */ "ld1rh\t\0" |
471 | 414k | /* 3468 */ "ldarh\t\0" |
472 | 414k | /* 3475 */ "ldlarh\t\0" |
473 | 414k | /* 3483 */ "ldrh\t\0" |
474 | 414k | /* 3489 */ "ldclrh\t\0" |
475 | 414k | /* 3497 */ "stllrh\t\0" |
476 | 414k | /* 3505 */ "stlrh\t\0" |
477 | 414k | /* 3512 */ "ldeorh\t\0" |
478 | 414k | /* 3520 */ "ldaprh\t\0" |
479 | 414k | /* 3528 */ "ldtrh\t\0" |
480 | 414k | /* 3535 */ "strh\t\0" |
481 | 414k | /* 3541 */ "sttrh\t\0" |
482 | 414k | /* 3548 */ "ldurh\t\0" |
483 | 414k | /* 3555 */ "stlurh\t\0" |
484 | 414k | /* 3563 */ "ldapurh\t\0" |
485 | 414k | /* 3572 */ "sturh\t\0" |
486 | 414k | /* 3579 */ "ldaxrh\t\0" |
487 | 414k | /* 3587 */ "ldxrh\t\0" |
488 | 414k | /* 3594 */ "stlxrh\t\0" |
489 | 414k | /* 3602 */ "stxrh\t\0" |
490 | 414k | /* 3609 */ "ld1sh\t\0" |
491 | 414k | /* 3616 */ "ldff1sh\t\0" |
492 | 414k | /* 3625 */ "ldnf1sh\t\0" |
493 | 414k | /* 3634 */ "ldnt1sh\t\0" |
494 | 414k | /* 3643 */ "cash\t\0" |
495 | 414k | /* 3649 */ "sqrdmlsh\t\0" |
496 | 414k | /* 3659 */ "ld1rsh\t\0" |
497 | 414k | /* 3667 */ "ldrsh\t\0" |
498 | 414k | /* 3674 */ "ldtrsh\t\0" |
499 | 414k | /* 3682 */ "ldursh\t\0" |
500 | 414k | /* 3690 */ "ldapursh\t\0" |
501 | 414k | /* 3700 */ "ldseth\t\0" |
502 | 414k | /* 3708 */ "cnth\t\0" |
503 | 414k | /* 3714 */ "sxth\t\0" |
504 | 414k | /* 3720 */ "uxth\t\0" |
505 | 414k | /* 3726 */ "revh\t\0" |
506 | 414k | /* 3732 */ "ldsmaxh\t\0" |
507 | 414k | /* 3741 */ "ldumaxh\t\0" |
508 | 414k | /* 3750 */ "xpaci\t\0" |
509 | 414k | /* 3757 */ "whilehi\t\0" |
510 | 414k | /* 3766 */ "punpkhi\t\0" |
511 | 414k | /* 3775 */ "sunpkhi\t\0" |
512 | 414k | /* 3784 */ "uunpkhi\t\0" |
513 | 414k | /* 3793 */ "cmhi\t\0" |
514 | 414k | /* 3799 */ "cmphi\t\0" |
515 | 414k | /* 3806 */ "sli\t\0" |
516 | 414k | /* 3811 */ "gmi\t\0" |
517 | 414k | /* 3816 */ "mvni\t\0" |
518 | 414k | /* 3822 */ "sri\t\0" |
519 | 414k | /* 3827 */ "frinti\t\0" |
520 | 414k | /* 3835 */ "movi\t\0" |
521 | 414k | /* 3841 */ "brk\t\0" |
522 | 414k | /* 3846 */ "movk\t\0" |
523 | 414k | /* 3852 */ "sabal\t\0" |
524 | 414k | /* 3859 */ "uabal\t\0" |
525 | 414k | /* 3866 */ "ldaddal\t\0" |
526 | 414k | /* 3875 */ "sqdmlal\t\0" |
527 | 414k | /* 3884 */ "fmlal\t\0" |
528 | 414k | /* 3891 */ "smlal\t\0" |
529 | 414k | /* 3898 */ "umlal\t\0" |
530 | 414k | /* 3905 */ "ldsminal\t\0" |
531 | 414k | /* 3915 */ "lduminal\t\0" |
532 | 414k | /* 3925 */ "caspal\t\0" |
533 | 414k | /* 3933 */ "swpal\t\0" |
534 | 414k | /* 3940 */ "ldclral\t\0" |
535 | 414k | /* 3949 */ "ldeoral\t\0" |
536 | 414k | /* 3958 */ "casal\t\0" |
537 | 414k | /* 3965 */ "ldsetal\t\0" |
538 | 414k | /* 3974 */ "ldsmaxal\t\0" |
539 | 414k | /* 3984 */ "ldumaxal\t\0" |
540 | 414k | /* 3994 */ "tbl\t\0" |
541 | 414k | /* 3999 */ "smsubl\t\0" |
542 | 414k | /* 4007 */ "umsubl\t\0" |
543 | 414k | /* 4015 */ "ssubl\t\0" |
544 | 414k | /* 4022 */ "usubl\t\0" |
545 | 414k | /* 4029 */ "sabdl\t\0" |
546 | 414k | /* 4036 */ "uabdl\t\0" |
547 | 414k | /* 4043 */ "ldaddl\t\0" |
548 | 414k | /* 4051 */ "smaddl\t\0" |
549 | 414k | /* 4059 */ "umaddl\t\0" |
550 | 414k | /* 4067 */ "saddl\t\0" |
551 | 414k | /* 4074 */ "uaddl\t\0" |
552 | 414k | /* 4081 */ "tcancel\t\0" |
553 | 414k | /* 4090 */ "fcsel\t\0" |
554 | 414k | /* 4097 */ "psel\t\0" |
555 | 414k | /* 4103 */ "ftssel\t\0" |
556 | 414k | /* 4111 */ "sqshl\t\0" |
557 | 414k | /* 4118 */ "uqshl\t\0" |
558 | 414k | /* 4125 */ "sqrshl\t\0" |
559 | 414k | /* 4133 */ "uqrshl\t\0" |
560 | 414k | /* 4141 */ "srshl\t\0" |
561 | 414k | /* 4148 */ "urshl\t\0" |
562 | 414k | /* 4155 */ "sshl\t\0" |
563 | 414k | /* 4161 */ "ushl\t\0" |
564 | 414k | /* 4167 */ "sshll\t\0" |
565 | 414k | /* 4174 */ "ushll\t\0" |
566 | 414k | /* 4181 */ "sqdmull\t\0" |
567 | 414k | /* 4190 */ "pmull\t\0" |
568 | 414k | /* 4197 */ "smull\t\0" |
569 | 414k | /* 4204 */ "umull\t\0" |
570 | 414k | /* 4211 */ "ldsminl\t\0" |
571 | 414k | /* 4220 */ "lduminl\t\0" |
572 | 414k | /* 4229 */ "addpl\t\0" |
573 | 414k | /* 4236 */ "caspl\t\0" |
574 | 414k | /* 4243 */ "swpl\t\0" |
575 | 414k | /* 4249 */ "ldclrl\t\0" |
576 | 414k | /* 4257 */ "ldeorl\t\0" |
577 | 414k | /* 4265 */ "casl\t\0" |
578 | 414k | /* 4271 */ "nbsl\t\0" |
579 | 414k | /* 4277 */ "sqdmlsl\t\0" |
580 | 414k | /* 4286 */ "fmlsl\t\0" |
581 | 414k | /* 4293 */ "smlsl\t\0" |
582 | 414k | /* 4300 */ "umlsl\t\0" |
583 | 414k | /* 4307 */ "sysl\t\0" |
584 | 414k | /* 4313 */ "ldsetl\t\0" |
585 | 414k | /* 4321 */ "fcvtl\t\0" |
586 | 414k | /* 4328 */ "fmul\t\0" |
587 | 414k | /* 4334 */ "fnmul\t\0" |
588 | 414k | /* 4341 */ "pmul\t\0" |
589 | 414k | /* 4347 */ "ftsmul\t\0" |
590 | 414k | /* 4355 */ "addvl\t\0" |
591 | 414k | /* 4362 */ "rdvl\t\0" |
592 | 414k | /* 4368 */ "ldsmaxl\t\0" |
593 | 414k | /* 4377 */ "ldumaxl\t\0" |
594 | 414k | /* 4386 */ "sha1m\t\0" |
595 | 414k | /* 4393 */ "sbfm\t\0" |
596 | 414k | /* 4399 */ "ubfm\t\0" |
597 | 414k | /* 4405 */ "prfm\t\0" |
598 | 414k | /* 4411 */ "ldgm\t\0" |
599 | 414k | /* 4417 */ "stgm\t\0" |
600 | 414k | /* 4423 */ "stzgm\t\0" |
601 | 414k | /* 4430 */ "fminnm\t\0" |
602 | 414k | /* 4438 */ "fmaxnm\t\0" |
603 | 414k | /* 4446 */ "dupm\t\0" |
604 | 414k | /* 4452 */ "frintm\t\0" |
605 | 414k | /* 4460 */ "prfum\t\0" |
606 | 414k | /* 4467 */ "bsl1n\t\0" |
607 | 414k | /* 4474 */ "bsl2n\t\0" |
608 | 414k | /* 4481 */ "rsubhn\t\0" |
609 | 414k | /* 4489 */ "raddhn\t\0" |
610 | 414k | /* 4497 */ "fmin\t\0" |
611 | 414k | /* 4503 */ "ldsmin\t\0" |
612 | 414k | /* 4511 */ "ldumin\t\0" |
613 | 414k | /* 4519 */ "brkn\t\0" |
614 | 414k | /* 4525 */ "ccmn\t\0" |
615 | 414k | /* 4531 */ "eon\t\0" |
616 | 414k | /* 4536 */ "sqshrn\t\0" |
617 | 414k | /* 4544 */ "uqshrn\t\0" |
618 | 414k | /* 4552 */ "sqrshrn\t\0" |
619 | 414k | /* 4561 */ "uqrshrn\t\0" |
620 | 414k | /* 4570 */ "orn\t\0" |
621 | 414k | /* 4575 */ "frintn\t\0" |
622 | 414k | /* 4583 */ "bfcvtn\t\0" |
623 | 414k | /* 4591 */ "sqxtn\t\0" |
624 | 414k | /* 4598 */ "uqxtn\t\0" |
625 | 414k | /* 4605 */ "sqshrun\t\0" |
626 | 414k | /* 4614 */ "sqrshrun\t\0" |
627 | 414k | /* 4624 */ "sqxtun\t\0" |
628 | 414k | /* 4632 */ "movn\t\0" |
629 | 414k | /* 4638 */ "fcvtxn\t\0" |
630 | 414k | /* 4646 */ "whilelo\t\0" |
631 | 414k | /* 4655 */ "punpklo\t\0" |
632 | 414k | /* 4664 */ "sunpklo\t\0" |
633 | 414k | /* 4673 */ "uunpklo\t\0" |
634 | 414k | /* 4682 */ "cmplo\t\0" |
635 | 414k | /* 4689 */ "zero\t\0" |
636 | 414k | /* 4695 */ "fcmuo\t\0" |
637 | 414k | /* 4702 */ "sha1p\t\0" |
638 | 414k | /* 4709 */ "subp\t\0" |
639 | 414k | /* 4715 */ "sqdecp\t\0" |
640 | 414k | /* 4723 */ "uqdecp\t\0" |
641 | 414k | /* 4731 */ "sqincp\t\0" |
642 | 414k | /* 4739 */ "uqincp\t\0" |
643 | 414k | /* 4747 */ "faddp\t\0" |
644 | 414k | /* 4754 */ "ldp\t\0" |
645 | 414k | /* 4759 */ "bdep\t\0" |
646 | 414k | /* 4765 */ "stgp\t\0" |
647 | 414k | /* 4771 */ "sadalp\t\0" |
648 | 414k | /* 4779 */ "uadalp\t\0" |
649 | 414k | /* 4787 */ "saddlp\t\0" |
650 | 414k | /* 4795 */ "uaddlp\t\0" |
651 | 414k | /* 4803 */ "sclamp\t\0" |
652 | 414k | /* 4811 */ "uclamp\t\0" |
653 | 414k | /* 4819 */ "fccmp\t\0" |
654 | 414k | /* 4826 */ "fcmp\t\0" |
655 | 414k | /* 4832 */ "fminnmp\t\0" |
656 | 414k | /* 4841 */ "fmaxnmp\t\0" |
657 | 414k | /* 4850 */ "ldnp\t\0" |
658 | 414k | /* 4856 */ "fminp\t\0" |
659 | 414k | /* 4863 */ "sminp\t\0" |
660 | 414k | /* 4870 */ "uminp\t\0" |
661 | 414k | /* 4877 */ "stnp\t\0" |
662 | 414k | /* 4883 */ "adrp\t\0" |
663 | 414k | /* 4889 */ "bgrp\t\0" |
664 | 414k | /* 4895 */ "casp\t\0" |
665 | 414k | /* 4901 */ "cntp\t\0" |
666 | 414k | /* 4907 */ "frintp\t\0" |
667 | 414k | /* 4915 */ "stp\t\0" |
668 | 414k | /* 4920 */ "fdup\t\0" |
669 | 414k | /* 4926 */ "swp\t\0" |
670 | 414k | /* 4931 */ "ldaxp\t\0" |
671 | 414k | /* 4938 */ "fmaxp\t\0" |
672 | 414k | /* 4945 */ "smaxp\t\0" |
673 | 414k | /* 4952 */ "umaxp\t\0" |
674 | 414k | /* 4959 */ "ldxp\t\0" |
675 | 414k | /* 4965 */ "stlxp\t\0" |
676 | 414k | /* 4972 */ "stxp\t\0" |
677 | 414k | /* 4978 */ "fcmeq\t\0" |
678 | 414k | /* 4985 */ "ctermeq\t\0" |
679 | 414k | /* 4994 */ "cmpeq\t\0" |
680 | 414k | /* 5001 */ "ld1r\t\0" |
681 | 414k | /* 5007 */ "ld2r\t\0" |
682 | 414k | /* 5013 */ "ld3r\t\0" |
683 | 414k | /* 5019 */ "ld4r\t\0" |
684 | 414k | /* 5025 */ "ldar\t\0" |
685 | 414k | /* 5031 */ "ldlar\t\0" |
686 | 414k | /* 5038 */ "xar\t\0" |
687 | 414k | /* 5043 */ "fsubr\t\0" |
688 | 414k | /* 5050 */ "shsubr\t\0" |
689 | 414k | /* 5058 */ "uhsubr\t\0" |
690 | 414k | /* 5066 */ "sqsubr\t\0" |
691 | 414k | /* 5074 */ "uqsubr\t\0" |
692 | 414k | /* 5082 */ "adr\t\0" |
693 | 414k | /* 5087 */ "ldr\t\0" |
694 | 414k | /* 5092 */ "rdffr\t\0" |
695 | 414k | /* 5099 */ "wrffr\t\0" |
696 | 414k | /* 5106 */ "srshr\t\0" |
697 | 414k | /* 5113 */ "urshr\t\0" |
698 | 414k | /* 5120 */ "sshr\t\0" |
699 | 414k | /* 5126 */ "ushr\t\0" |
700 | 414k | /* 5132 */ "blr\t\0" |
701 | 414k | /* 5137 */ "ldclr\t\0" |
702 | 414k | /* 5144 */ "sqshlr\t\0" |
703 | 414k | /* 5152 */ "uqshlr\t\0" |
704 | 414k | /* 5160 */ "sqrshlr\t\0" |
705 | 414k | /* 5169 */ "uqrshlr\t\0" |
706 | 414k | /* 5178 */ "srshlr\t\0" |
707 | 414k | /* 5186 */ "urshlr\t\0" |
708 | 414k | /* 5194 */ "stllr\t\0" |
709 | 414k | /* 5201 */ "lslr\t\0" |
710 | 414k | /* 5207 */ "stlr\t\0" |
711 | 414k | /* 5213 */ "ldeor\t\0" |
712 | 414k | /* 5220 */ "nor\t\0" |
713 | 414k | /* 5225 */ "ror\t\0" |
714 | 414k | /* 5230 */ "ldapr\t\0" |
715 | 414k | /* 5237 */ "orr\t\0" |
716 | 414k | /* 5242 */ "asrr\t\0" |
717 | 414k | /* 5248 */ "lsrr\t\0" |
718 | 414k | /* 5254 */ "asr\t\0" |
719 | 414k | /* 5259 */ "lsr\t\0" |
720 | 414k | /* 5264 */ "msr\t\0" |
721 | 414k | /* 5269 */ "insr\t\0" |
722 | 414k | /* 5275 */ "ldtr\t\0" |
723 | 414k | /* 5281 */ "str\t\0" |
724 | 414k | /* 5286 */ "sttr\t\0" |
725 | 414k | /* 5292 */ "extr\t\0" |
726 | 414k | /* 5298 */ "ldur\t\0" |
727 | 414k | /* 5304 */ "stlur\t\0" |
728 | 414k | /* 5311 */ "ldapur\t\0" |
729 | 414k | /* 5319 */ "stur\t\0" |
730 | 414k | /* 5325 */ "fdivr\t\0" |
731 | 414k | /* 5332 */ "sdivr\t\0" |
732 | 414k | /* 5339 */ "udivr\t\0" |
733 | 414k | /* 5346 */ "whilewr\t\0" |
734 | 414k | /* 5355 */ "ldaxr\t\0" |
735 | 414k | /* 5362 */ "ldxr\t\0" |
736 | 414k | /* 5368 */ "stlxr\t\0" |
737 | 414k | /* 5375 */ "stxr\t\0" |
738 | 414k | /* 5381 */ "cas\t\0" |
739 | 414k | /* 5386 */ "brkas\t\0" |
740 | 414k | /* 5393 */ "brkpas\t\0" |
741 | 414k | /* 5401 */ "fcvtas\t\0" |
742 | 414k | /* 5409 */ "fabs\t\0" |
743 | 414k | /* 5415 */ "sqabs\t\0" |
744 | 414k | /* 5422 */ "brkbs\t\0" |
745 | 414k | /* 5429 */ "brkpbs\t\0" |
746 | 414k | /* 5437 */ "subs\t\0" |
747 | 414k | /* 5443 */ "sbcs\t\0" |
748 | 414k | /* 5449 */ "adcs\t\0" |
749 | 414k | /* 5455 */ "bics\t\0" |
750 | 414k | /* 5461 */ "adds\t\0" |
751 | 414k | /* 5467 */ "nands\t\0" |
752 | 414k | /* 5474 */ "ptrues\t\0" |
753 | 414k | /* 5482 */ "whilehs\t\0" |
754 | 414k | /* 5491 */ "cmhs\t\0" |
755 | 414k | /* 5497 */ "cmphs\t\0" |
756 | 414k | /* 5504 */ "cls\t\0" |
757 | 414k | /* 5509 */ "whilels\t\0" |
758 | 414k | /* 5518 */ "fmls\t\0" |
759 | 414k | /* 5524 */ "fnmls\t\0" |
760 | 414k | /* 5531 */ "cmpls\t\0" |
761 | 414k | /* 5538 */ "fcvtms\t\0" |
762 | 414k | /* 5546 */ "ins\t\0" |
763 | 414k | /* 5551 */ "brkns\t\0" |
764 | 414k | /* 5558 */ "orns\t\0" |
765 | 414k | /* 5564 */ "fcvtns\t\0" |
766 | 414k | /* 5572 */ "subps\t\0" |
767 | 414k | /* 5579 */ "frecps\t\0" |
768 | 414k | /* 5587 */ "bfmops\t\0" |
769 | 414k | /* 5595 */ "usmops\t\0" |
770 | 414k | /* 5603 */ "sumops\t\0" |
771 | 414k | /* 5611 */ "fcvtps\t\0" |
772 | 414k | /* 5619 */ "rdffrs\t\0" |
773 | 414k | /* 5627 */ "mrs\t\0" |
774 | 414k | /* 5632 */ "eors\t\0" |
775 | 414k | /* 5638 */ "nors\t\0" |
776 | 414k | /* 5644 */ "orrs\t\0" |
777 | 414k | /* 5650 */ "frsqrts\t\0" |
778 | 414k | /* 5659 */ "sys\t\0" |
779 | 414k | /* 5664 */ "fcvtzs\t\0" |
780 | 414k | /* 5672 */ "fjcvtzs\t\0" |
781 | 414k | /* 5681 */ "sqdmlalbt\t\0" |
782 | 414k | /* 5692 */ "ssublbt\t\0" |
783 | 414k | /* 5701 */ "saddlbt\t\0" |
784 | 414k | /* 5710 */ "sqdmlslbt\t\0" |
785 | 414k | /* 5721 */ "eorbt\t\0" |
786 | 414k | /* 5728 */ "compact\t\0" |
787 | 414k | /* 5737 */ "wfet\t\0" |
788 | 414k | /* 5743 */ "ret\t\0" |
789 | 414k | /* 5748 */ "ldset\t\0" |
790 | 414k | /* 5755 */ "facgt\t\0" |
791 | 414k | /* 5762 */ "whilegt\t\0" |
792 | 414k | /* 5771 */ "fcmgt\t\0" |
793 | 414k | /* 5778 */ "cmpgt\t\0" |
794 | 414k | /* 5785 */ "rbit\t\0" |
795 | 414k | /* 5791 */ "wfit\t\0" |
796 | 414k | /* 5797 */ "sabalt\t\0" |
797 | 414k | /* 5805 */ "uabalt\t\0" |
798 | 414k | /* 5813 */ "sqdmlalt\t\0" |
799 | 414k | /* 5823 */ "bfmlalt\t\0" |
800 | 414k | /* 5832 */ "smlalt\t\0" |
801 | 414k | /* 5840 */ "umlalt\t\0" |
802 | 414k | /* 5848 */ "ssublt\t\0" |
803 | 414k | /* 5856 */ "usublt\t\0" |
804 | 414k | /* 5864 */ "sbclt\t\0" |
805 | 414k | /* 5871 */ "adclt\t\0" |
806 | 414k | /* 5878 */ "sabdlt\t\0" |
807 | 414k | /* 5886 */ "uabdlt\t\0" |
808 | 414k | /* 5894 */ "saddlt\t\0" |
809 | 414k | /* 5902 */ "uaddlt\t\0" |
810 | 414k | /* 5910 */ "whilelt\t\0" |
811 | 414k | /* 5919 */ "hlt\t\0" |
812 | 414k | /* 5924 */ "sshllt\t\0" |
813 | 414k | /* 5932 */ "ushllt\t\0" |
814 | 414k | /* 5940 */ "sqdmullt\t\0" |
815 | 414k | /* 5950 */ "pmullt\t\0" |
816 | 414k | /* 5958 */ "smullt\t\0" |
817 | 414k | /* 5966 */ "umullt\t\0" |
818 | 414k | /* 5974 */ "fcmlt\t\0" |
819 | 414k | /* 5981 */ "cmplt\t\0" |
820 | 414k | /* 5988 */ "sqdmlslt\t\0" |
821 | 414k | /* 5998 */ "fmlslt\t\0" |
822 | 414k | /* 6006 */ "smlslt\t\0" |
823 | 414k | /* 6014 */ "umlslt\t\0" |
824 | 414k | /* 6022 */ "fcvtlt\t\0" |
825 | 414k | /* 6030 */ "histcnt\t\0" |
826 | 414k | /* 6039 */ "rsubhnt\t\0" |
827 | 414k | /* 6048 */ "raddhnt\t\0" |
828 | 414k | /* 6057 */ "hint\t\0" |
829 | 414k | /* 6063 */ "sqshrnt\t\0" |
830 | 414k | /* 6072 */ "uqshrnt\t\0" |
831 | 414k | /* 6081 */ "sqrshrnt\t\0" |
832 | 414k | /* 6091 */ "uqrshrnt\t\0" |
833 | 414k | /* 6101 */ "bfcvtnt\t\0" |
834 | 414k | /* 6110 */ "sqxtnt\t\0" |
835 | 414k | /* 6118 */ "uqxtnt\t\0" |
836 | 414k | /* 6126 */ "sqshrunt\t\0" |
837 | 414k | /* 6136 */ "sqrshrunt\t\0" |
838 | 414k | /* 6147 */ "sqxtunt\t\0" |
839 | 414k | /* 6156 */ "fcvtxnt\t\0" |
840 | 414k | /* 6165 */ "cdot\t\0" |
841 | 414k | /* 6171 */ "bfdot\t\0" |
842 | 414k | /* 6178 */ "usdot\t\0" |
843 | 414k | /* 6185 */ "sudot\t\0" |
844 | 414k | /* 6192 */ "cnot\t\0" |
845 | 414k | /* 6198 */ "tstart\t\0" |
846 | 414k | /* 6206 */ "fsqrt\t\0" |
847 | 414k | /* 6213 */ "ptest\t\0" |
848 | 414k | /* 6220 */ "ttest\t\0" |
849 | 414k | /* 6227 */ "pfirst\t\0" |
850 | 414k | /* 6235 */ "cmtst\t\0" |
851 | 414k | /* 6242 */ "bfcvt\t\0" |
852 | 414k | /* 6249 */ "ssubwt\t\0" |
853 | 414k | /* 6257 */ "usubwt\t\0" |
854 | 414k | /* 6265 */ "saddwt\t\0" |
855 | 414k | /* 6273 */ "uaddwt\t\0" |
856 | 414k | /* 6281 */ "bext\t\0" |
857 | 414k | /* 6287 */ "pnext\t\0" |
858 | 414k | /* 6294 */ "fcvtau\t\0" |
859 | 414k | /* 6302 */ "sqshlu\t\0" |
860 | 414k | /* 6310 */ "fcvtmu\t\0" |
861 | 414k | /* 6318 */ "fcvtnu\t\0" |
862 | 414k | /* 6326 */ "fcvtpu\t\0" |
863 | 414k | /* 6334 */ "fcvtzu\t\0" |
864 | 414k | /* 6342 */ "st64bv\t\0" |
865 | 414k | /* 6350 */ "faddv\t\0" |
866 | 414k | /* 6357 */ "saddv\t\0" |
867 | 414k | /* 6364 */ "uaddv\t\0" |
868 | 414k | /* 6371 */ "andv\t\0" |
869 | 414k | /* 6377 */ "rev\t\0" |
870 | 414k | /* 6382 */ "fdiv\t\0" |
871 | 414k | /* 6388 */ "sdiv\t\0" |
872 | 414k | /* 6394 */ "udiv\t\0" |
873 | 414k | /* 6400 */ "saddlv\t\0" |
874 | 414k | /* 6408 */ "uaddlv\t\0" |
875 | 414k | /* 6416 */ "fminnmv\t\0" |
876 | 414k | /* 6425 */ "fmaxnmv\t\0" |
877 | 414k | /* 6434 */ "fminv\t\0" |
878 | 414k | /* 6441 */ "sminv\t\0" |
879 | 414k | /* 6448 */ "uminv\t\0" |
880 | 414k | /* 6455 */ "csinv\t\0" |
881 | 414k | /* 6462 */ "fmov\t\0" |
882 | 414k | /* 6468 */ "smov\t\0" |
883 | 414k | /* 6474 */ "umov\t\0" |
884 | 414k | /* 6480 */ "eorv\t\0" |
885 | 414k | /* 6486 */ "fmaxv\t\0" |
886 | 414k | /* 6493 */ "smaxv\t\0" |
887 | 414k | /* 6500 */ "umaxv\t\0" |
888 | 414k | /* 6507 */ "ld1w\t\0" |
889 | 414k | /* 6513 */ "ldff1w\t\0" |
890 | 414k | /* 6521 */ "ldnf1w\t\0" |
891 | 414k | /* 6529 */ "ldnt1w\t\0" |
892 | 414k | /* 6537 */ "stnt1w\t\0" |
893 | 414k | /* 6545 */ "st1w\t\0" |
894 | 414k | /* 6551 */ "crc32w\t\0" |
895 | 414k | /* 6559 */ "ld2w\t\0" |
896 | 414k | /* 6565 */ "st2w\t\0" |
897 | 414k | /* 6571 */ "ld3w\t\0" |
898 | 414k | /* 6577 */ "st3w\t\0" |
899 | 414k | /* 6583 */ "ld4w\t\0" |
900 | 414k | /* 6589 */ "st4w\t\0" |
901 | 414k | /* 6595 */ "ssubw\t\0" |
902 | 414k | /* 6602 */ "usubw\t\0" |
903 | 414k | /* 6609 */ "crc32cw\t\0" |
904 | 414k | /* 6618 */ "sqdecw\t\0" |
905 | 414k | /* 6626 */ "uqdecw\t\0" |
906 | 414k | /* 6634 */ "sqincw\t\0" |
907 | 414k | /* 6642 */ "uqincw\t\0" |
908 | 414k | /* 6650 */ "saddw\t\0" |
909 | 414k | /* 6657 */ "uaddw\t\0" |
910 | 414k | /* 6664 */ "prfw\t\0" |
911 | 414k | /* 6670 */ "ld1row\t\0" |
912 | 414k | /* 6678 */ "ld1rqw\t\0" |
913 | 414k | /* 6686 */ "ld1rw\t\0" |
914 | 414k | /* 6693 */ "whilerw\t\0" |
915 | 414k | /* 6702 */ "ld1sw\t\0" |
916 | 414k | /* 6709 */ "ldff1sw\t\0" |
917 | 414k | /* 6718 */ "ldnf1sw\t\0" |
918 | 414k | /* 6727 */ "ldnt1sw\t\0" |
919 | 414k | /* 6736 */ "ldpsw\t\0" |
920 | 414k | /* 6743 */ "ld1rsw\t\0" |
921 | 414k | /* 6751 */ "ldrsw\t\0" |
922 | 414k | /* 6758 */ "ldtrsw\t\0" |
923 | 414k | /* 6766 */ "ldursw\t\0" |
924 | 414k | /* 6774 */ "ldapursw\t\0" |
925 | 414k | /* 6784 */ "cntw\t\0" |
926 | 414k | /* 6790 */ "sxtw\t\0" |
927 | 414k | /* 6796 */ "uxtw\t\0" |
928 | 414k | /* 6802 */ "revw\t\0" |
929 | 414k | /* 6808 */ "crc32x\t\0" |
930 | 414k | /* 6816 */ "frint32x\t\0" |
931 | 414k | /* 6826 */ "frint64x\t\0" |
932 | 414k | /* 6836 */ "bcax\t\0" |
933 | 414k | /* 6842 */ "fmax\t\0" |
934 | 414k | /* 6848 */ "ldsmax\t\0" |
935 | 414k | /* 6856 */ "ldumax\t\0" |
936 | 414k | /* 6864 */ "tbx\t\0" |
937 | 414k | /* 6869 */ "crc32cx\t\0" |
938 | 414k | /* 6878 */ "index\t\0" |
939 | 414k | /* 6885 */ "clrex\t\0" |
940 | 414k | /* 6892 */ "movprfx\t\0" |
941 | 414k | /* 6901 */ "fmulx\t\0" |
942 | 414k | /* 6908 */ "frecpx\t\0" |
943 | 414k | /* 6916 */ "frintx\t\0" |
944 | 414k | /* 6924 */ "fcvtx\t\0" |
945 | 414k | /* 6931 */ "sm4ekey\t\0" |
946 | 414k | /* 6940 */ "fcpy\t\0" |
947 | 414k | /* 6946 */ "frint32z\t\0" |
948 | 414k | /* 6956 */ "frint64z\t\0" |
949 | 414k | /* 6966 */ "braaz\t\0" |
950 | 414k | /* 6973 */ "blraaz\t\0" |
951 | 414k | /* 6981 */ "brabz\t\0" |
952 | 414k | /* 6988 */ "blrabz\t\0" |
953 | 414k | /* 6996 */ "cbz\t\0" |
954 | 414k | /* 7001 */ "tbz\t\0" |
955 | 414k | /* 7006 */ "clz\t\0" |
956 | 414k | /* 7011 */ "cbnz\t\0" |
957 | 414k | /* 7017 */ "tbnz\t\0" |
958 | 414k | /* 7023 */ "frintz\t\0" |
959 | 414k | /* 7031 */ "movz\t\0" |
960 | 414k | /* 7037 */ ".tlsdesccall \0" |
961 | 414k | /* 7051 */ "# XRay Function Patchable RET.\0" |
962 | 414k | /* 7082 */ "b.\0" |
963 | 414k | /* 7085 */ "bc.\0" |
964 | 414k | /* 7089 */ "# XRay Typed Event Log.\0" |
965 | 414k | /* 7113 */ "# XRay Custom Event Log.\0" |
966 | 414k | /* 7138 */ "# XRay Function Enter.\0" |
967 | 414k | /* 7161 */ "# XRay Tail Call Exit.\0" |
968 | 414k | /* 7184 */ "# XRay Function Exit.\0" |
969 | 414k | /* 7206 */ "hint\t#10\0" |
970 | 414k | /* 7215 */ "hint\t#30\0" |
971 | 414k | /* 7224 */ "hint\t#31\0" |
972 | 414k | /* 7233 */ "hint\t#12\0" |
973 | 414k | /* 7242 */ "hint\t#14\0" |
974 | 414k | /* 7251 */ "hint\t#24\0" |
975 | 414k | /* 7260 */ "hint\t#25\0" |
976 | 414k | /* 7269 */ "hint\t#26\0" |
977 | 414k | /* 7278 */ "hint\t#7\0" |
978 | 414k | /* 7286 */ "hint\t#27\0" |
979 | 414k | /* 7295 */ "hint\t#8\0" |
980 | 414k | /* 7303 */ "hint\t#28\0" |
981 | 414k | /* 7312 */ "hint\t#29\0" |
982 | 414k | /* 7321 */ "LIFETIME_END\0" |
983 | 414k | /* 7334 */ "PSEUDO_PROBE\0" |
984 | 414k | /* 7347 */ "BUNDLE\0" |
985 | 414k | /* 7354 */ "DBG_VALUE\0" |
986 | 414k | /* 7364 */ "DBG_INSTR_REF\0" |
987 | 414k | /* 7378 */ "DBG_PHI\0" |
988 | 414k | /* 7386 */ "DBG_LABEL\0" |
989 | 414k | /* 7396 */ "LIFETIME_START\0" |
990 | 414k | /* 7411 */ "DBG_VALUE_LIST\0" |
991 | 414k | /* 7426 */ "cpyfe\t[\0" |
992 | 414k | /* 7434 */ "setge\t[\0" |
993 | 414k | /* 7442 */ "sete\t[\0" |
994 | 414k | /* 7449 */ "cpye\t[\0" |
995 | 414k | /* 7456 */ "cpyfm\t[\0" |
996 | 414k | /* 7464 */ "setgm\t[\0" |
997 | 414k | /* 7472 */ "setm\t[\0" |
998 | 414k | /* 7479 */ "cpym\t[\0" |
999 | 414k | /* 7486 */ "cpyfen\t[\0" |
1000 | 414k | /* 7495 */ "setgen\t[\0" |
1001 | 414k | /* 7504 */ "seten\t[\0" |
1002 | 414k | /* 7512 */ "cpyen\t[\0" |
1003 | 414k | /* 7520 */ "cpyfmn\t[\0" |
1004 | 414k | /* 7529 */ "setgmn\t[\0" |
1005 | 414k | /* 7538 */ "setmn\t[\0" |
1006 | 414k | /* 7546 */ "cpymn\t[\0" |
1007 | 414k | /* 7554 */ "cpyfpn\t[\0" |
1008 | 414k | /* 7563 */ "setgpn\t[\0" |
1009 | 414k | /* 7572 */ "setpn\t[\0" |
1010 | 414k | /* 7580 */ "cpypn\t[\0" |
1011 | 414k | /* 7588 */ "cpyfern\t[\0" |
1012 | 414k | /* 7598 */ "cpyern\t[\0" |
1013 | 414k | /* 7607 */ "cpyfmrn\t[\0" |
1014 | 414k | /* 7617 */ "cpymrn\t[\0" |
1015 | 414k | /* 7626 */ "cpyfprn\t[\0" |
1016 | 414k | /* 7636 */ "cpyprn\t[\0" |
1017 | 414k | /* 7645 */ "cpyfetrn\t[\0" |
1018 | 414k | /* 7656 */ "cpyetrn\t[\0" |
1019 | 414k | /* 7666 */ "cpyfmtrn\t[\0" |
1020 | 414k | /* 7677 */ "cpymtrn\t[\0" |
1021 | 414k | /* 7687 */ "cpyfptrn\t[\0" |
1022 | 414k | /* 7698 */ "cpyptrn\t[\0" |
1023 | 414k | /* 7708 */ "cpyfertrn\t[\0" |
1024 | 414k | /* 7720 */ "cpyertrn\t[\0" |
1025 | 414k | /* 7731 */ "cpyfmrtrn\t[\0" |
1026 | 414k | /* 7743 */ "cpymrtrn\t[\0" |
1027 | 414k | /* 7754 */ "cpyfprtrn\t[\0" |
1028 | 414k | /* 7766 */ "cpyprtrn\t[\0" |
1029 | 414k | /* 7777 */ "cpyfewtrn\t[\0" |
1030 | 414k | /* 7789 */ "cpyewtrn\t[\0" |
1031 | 414k | /* 7800 */ "cpyfmwtrn\t[\0" |
1032 | 414k | /* 7812 */ "cpymwtrn\t[\0" |
1033 | 414k | /* 7823 */ "cpyfpwtrn\t[\0" |
1034 | 414k | /* 7835 */ "cpypwtrn\t[\0" |
1035 | 414k | /* 7846 */ "cpyfetn\t[\0" |
1036 | 414k | /* 7856 */ "setgetn\t[\0" |
1037 | 414k | /* 7866 */ "setetn\t[\0" |
1038 | 414k | /* 7875 */ "cpyetn\t[\0" |
1039 | 414k | /* 7884 */ "cpyfmtn\t[\0" |
1040 | 414k | /* 7894 */ "setgmtn\t[\0" |
1041 | 414k | /* 7904 */ "setmtn\t[\0" |
1042 | 414k | /* 7913 */ "cpymtn\t[\0" |
1043 | 414k | /* 7922 */ "cpyfptn\t[\0" |
1044 | 414k | /* 7932 */ "setgptn\t[\0" |
1045 | 414k | /* 7942 */ "setptn\t[\0" |
1046 | 414k | /* 7951 */ "cpyptn\t[\0" |
1047 | 414k | /* 7960 */ "cpyfertn\t[\0" |
1048 | 414k | /* 7971 */ "cpyertn\t[\0" |
1049 | 414k | /* 7981 */ "cpyfmrtn\t[\0" |
1050 | 414k | /* 7992 */ "cpymrtn\t[\0" |
1051 | 414k | /* 8002 */ "cpyfprtn\t[\0" |
1052 | 414k | /* 8013 */ "cpyprtn\t[\0" |
1053 | 414k | /* 8023 */ "cpyfewtn\t[\0" |
1054 | 414k | /* 8034 */ "cpyewtn\t[\0" |
1055 | 414k | /* 8044 */ "cpyfmwtn\t[\0" |
1056 | 414k | /* 8055 */ "cpymwtn\t[\0" |
1057 | 414k | /* 8065 */ "cpyfpwtn\t[\0" |
1058 | 414k | /* 8076 */ "cpypwtn\t[\0" |
1059 | 414k | /* 8086 */ "cpyfewn\t[\0" |
1060 | 414k | /* 8096 */ "cpyewn\t[\0" |
1061 | 414k | /* 8105 */ "cpyfmwn\t[\0" |
1062 | 414k | /* 8115 */ "cpymwn\t[\0" |
1063 | 414k | /* 8124 */ "cpyfpwn\t[\0" |
1064 | 414k | /* 8134 */ "cpypwn\t[\0" |
1065 | 414k | /* 8143 */ "cpyfetwn\t[\0" |
1066 | 414k | /* 8154 */ "cpyetwn\t[\0" |
1067 | 414k | /* 8164 */ "cpyfmtwn\t[\0" |
1068 | 414k | /* 8175 */ "cpymtwn\t[\0" |
1069 | 414k | /* 8185 */ "cpyfptwn\t[\0" |
1070 | 414k | /* 8196 */ "cpyptwn\t[\0" |
1071 | 414k | /* 8206 */ "cpyfertwn\t[\0" |
1072 | 414k | /* 8218 */ "cpyertwn\t[\0" |
1073 | 414k | /* 8229 */ "cpyfmrtwn\t[\0" |
1074 | 414k | /* 8241 */ "cpymrtwn\t[\0" |
1075 | 414k | /* 8252 */ "cpyfprtwn\t[\0" |
1076 | 414k | /* 8264 */ "cpyprtwn\t[\0" |
1077 | 414k | /* 8275 */ "cpyfewtwn\t[\0" |
1078 | 414k | /* 8287 */ "cpyewtwn\t[\0" |
1079 | 414k | /* 8298 */ "cpyfmwtwn\t[\0" |
1080 | 414k | /* 8310 */ "cpymwtwn\t[\0" |
1081 | 414k | /* 8321 */ "cpyfpwtwn\t[\0" |
1082 | 414k | /* 8333 */ "cpypwtwn\t[\0" |
1083 | 414k | /* 8344 */ "cpyfp\t[\0" |
1084 | 414k | /* 8352 */ "setgp\t[\0" |
1085 | 414k | /* 8360 */ "setp\t[\0" |
1086 | 414k | /* 8367 */ "cpyp\t[\0" |
1087 | 414k | /* 8374 */ "cpyfet\t[\0" |
1088 | 414k | /* 8383 */ "setget\t[\0" |
1089 | 414k | /* 8392 */ "setet\t[\0" |
1090 | 414k | /* 8400 */ "cpyet\t[\0" |
1091 | 414k | /* 8408 */ "cpyfmt\t[\0" |
1092 | 414k | /* 8417 */ "setgmt\t[\0" |
1093 | 414k | /* 8426 */ "setmt\t[\0" |
1094 | 414k | /* 8434 */ "cpymt\t[\0" |
1095 | 414k | /* 8442 */ "cpyfpt\t[\0" |
1096 | 414k | /* 8451 */ "setgpt\t[\0" |
1097 | 414k | /* 8460 */ "setpt\t[\0" |
1098 | 414k | /* 8468 */ "cpypt\t[\0" |
1099 | 414k | /* 8476 */ "cpyfert\t[\0" |
1100 | 414k | /* 8486 */ "cpyert\t[\0" |
1101 | 414k | /* 8495 */ "cpyfmrt\t[\0" |
1102 | 414k | /* 8505 */ "cpymrt\t[\0" |
1103 | 414k | /* 8514 */ "cpyfprt\t[\0" |
1104 | 414k | /* 8524 */ "cpyprt\t[\0" |
1105 | 414k | /* 8533 */ "cpyfewt\t[\0" |
1106 | 414k | /* 8543 */ "cpyewt\t[\0" |
1107 | 414k | /* 8552 */ "cpyfmwt\t[\0" |
1108 | 414k | /* 8562 */ "cpymwt\t[\0" |
1109 | 414k | /* 8571 */ "cpyfpwt\t[\0" |
1110 | 414k | /* 8581 */ "cpypwt\t[\0" |
1111 | 414k | /* 8590 */ "eretaa\0" |
1112 | 414k | /* 8597 */ "eretab\0" |
1113 | 414k | /* 8604 */ "sb\0" |
1114 | 414k | /* 8607 */ "xaflag\0" |
1115 | 414k | /* 8614 */ "axflag\0" |
1116 | 414k | /* 8621 */ "brb\tinj\0" |
1117 | 414k | /* 8629 */ "# FEntry call\0" |
1118 | 414k | /* 8643 */ "brb\tiall\0" |
1119 | 414k | /* 8652 */ "setffr\0" |
1120 | 414k | /* 8659 */ "drps\0" |
1121 | 414k | /* 8664 */ "eret\0" |
1122 | 414k | /* 8669 */ "tcommit\0" |
1123 | 414k | /* 8677 */ "cfinv\0" |
1124 | 414k | /* 8683 */ "ld1b\t{\0" |
1125 | 414k | /* 8690 */ "st1b\t{\0" |
1126 | 414k | /* 8697 */ "ld1d\t{\0" |
1127 | 414k | /* 8704 */ "st1d\t{\0" |
1128 | 414k | /* 8711 */ "ld1h\t{\0" |
1129 | 414k | /* 8718 */ "st1h\t{\0" |
1130 | 414k | /* 8725 */ "ld1q\t{\0" |
1131 | 414k | /* 8732 */ "st1q\t{\0" |
1132 | 414k | /* 8739 */ "ld1w\t{\0" |
1133 | 414k | /* 8746 */ "st1w\t{\0" |
1134 | 414k | }; |
1135 | 414k | #endif |
1136 | | |
1137 | 414k | #ifdef __GNUC__ |
1138 | 414k | #pragma GCC diagnostic pop |
1139 | 414k | #endif |
1140 | | |
1141 | 414k | static const uint32_t OpInfo0[] = { |
1142 | 414k | 0U, // PHI |
1143 | 414k | 0U, // INLINEASM |
1144 | 414k | 0U, // INLINEASM_BR |
1145 | 414k | 0U, // CFI_INSTRUCTION |
1146 | 414k | 0U, // EH_LABEL |
1147 | 414k | 0U, // GC_LABEL |
1148 | 414k | 0U, // ANNOTATION_LABEL |
1149 | 414k | 0U, // KILL |
1150 | 414k | 0U, // EXTRACT_SUBREG |
1151 | 414k | 0U, // INSERT_SUBREG |
1152 | 414k | 0U, // IMPLICIT_DEF |
1153 | 414k | 0U, // SUBREG_TO_REG |
1154 | 414k | 0U, // COPY_TO_REGCLASS |
1155 | 414k | 7355U, // DBG_VALUE |
1156 | 414k | 7412U, // DBG_VALUE_LIST |
1157 | 414k | 7365U, // DBG_INSTR_REF |
1158 | 414k | 7379U, // DBG_PHI |
1159 | 414k | 7387U, // DBG_LABEL |
1160 | 414k | 0U, // REG_SEQUENCE |
1161 | 414k | 0U, // COPY |
1162 | 414k | 7348U, // BUNDLE |
1163 | 414k | 7397U, // LIFETIME_START |
1164 | 414k | 7322U, // LIFETIME_END |
1165 | 414k | 7335U, // PSEUDO_PROBE |
1166 | 414k | 0U, // ARITH_FENCE |
1167 | 414k | 0U, // STACKMAP |
1168 | 414k | 8630U, // FENTRY_CALL |
1169 | 414k | 0U, // PATCHPOINT |
1170 | 414k | 0U, // LOAD_STACK_GUARD |
1171 | 414k | 0U, // PREALLOCATED_SETUP |
1172 | 414k | 0U, // PREALLOCATED_ARG |
1173 | 414k | 0U, // STATEPOINT |
1174 | 414k | 0U, // LOCAL_ESCAPE |
1175 | 414k | 0U, // FAULTING_OP |
1176 | 414k | 0U, // PATCHABLE_OP |
1177 | 414k | 7139U, // PATCHABLE_FUNCTION_ENTER |
1178 | 414k | 7052U, // PATCHABLE_RET |
1179 | 414k | 7185U, // PATCHABLE_FUNCTION_EXIT |
1180 | 414k | 7162U, // PATCHABLE_TAIL_CALL |
1181 | 414k | 7114U, // PATCHABLE_EVENT_CALL |
1182 | 414k | 7090U, // PATCHABLE_TYPED_EVENT_CALL |
1183 | 414k | 0U, // ICALL_BRANCH_FUNNEL |
1184 | 414k | 0U, // G_ASSERT_SEXT |
1185 | 414k | 0U, // G_ASSERT_ZEXT |
1186 | 414k | 0U, // G_ASSERT_ALIGN |
1187 | 414k | 0U, // G_ADD |
1188 | 414k | 0U, // G_SUB |
1189 | 414k | 0U, // G_MUL |
1190 | 414k | 0U, // G_SDIV |
1191 | 414k | 0U, // G_UDIV |
1192 | 414k | 0U, // G_SREM |
1193 | 414k | 0U, // G_UREM |
1194 | 414k | 0U, // G_SDIVREM |
1195 | 414k | 0U, // G_UDIVREM |
1196 | 414k | 0U, // G_AND |
1197 | 414k | 0U, // G_OR |
1198 | 414k | 0U, // G_XOR |
1199 | 414k | 0U, // G_IMPLICIT_DEF |
1200 | 414k | 0U, // G_PHI |
1201 | 414k | 0U, // G_FRAME_INDEX |
1202 | 414k | 0U, // G_GLOBAL_VALUE |
1203 | 414k | 0U, // G_EXTRACT |
1204 | 414k | 0U, // G_UNMERGE_VALUES |
1205 | 414k | 0U, // G_INSERT |
1206 | 414k | 0U, // G_MERGE_VALUES |
1207 | 414k | 0U, // G_BUILD_VECTOR |
1208 | 414k | 0U, // G_BUILD_VECTOR_TRUNC |
1209 | 414k | 0U, // G_CONCAT_VECTORS |
1210 | 414k | 0U, // G_PTRTOINT |
1211 | 414k | 0U, // G_INTTOPTR |
1212 | 414k | 0U, // G_BITCAST |
1213 | 414k | 0U, // G_FREEZE |
1214 | 414k | 0U, // G_INTRINSIC_TRUNC |
1215 | 414k | 0U, // G_INTRINSIC_ROUND |
1216 | 414k | 0U, // G_INTRINSIC_LRINT |
1217 | 414k | 0U, // G_INTRINSIC_ROUNDEVEN |
1218 | 414k | 0U, // G_READCYCLECOUNTER |
1219 | 414k | 0U, // G_LOAD |
1220 | 414k | 0U, // G_SEXTLOAD |
1221 | 414k | 0U, // G_ZEXTLOAD |
1222 | 414k | 0U, // G_INDEXED_LOAD |
1223 | 414k | 0U, // G_INDEXED_SEXTLOAD |
1224 | 414k | 0U, // G_INDEXED_ZEXTLOAD |
1225 | 414k | 0U, // G_STORE |
1226 | 414k | 0U, // G_INDEXED_STORE |
1227 | 414k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
1228 | 414k | 0U, // G_ATOMIC_CMPXCHG |
1229 | 414k | 0U, // G_ATOMICRMW_XCHG |
1230 | 414k | 0U, // G_ATOMICRMW_ADD |
1231 | 414k | 0U, // G_ATOMICRMW_SUB |
1232 | 414k | 0U, // G_ATOMICRMW_AND |
1233 | 414k | 0U, // G_ATOMICRMW_NAND |
1234 | 414k | 0U, // G_ATOMICRMW_OR |
1235 | 414k | 0U, // G_ATOMICRMW_XOR |
1236 | 414k | 0U, // G_ATOMICRMW_MAX |
1237 | 414k | 0U, // G_ATOMICRMW_MIN |
1238 | 414k | 0U, // G_ATOMICRMW_UMAX |
1239 | 414k | 0U, // G_ATOMICRMW_UMIN |
1240 | 414k | 0U, // G_ATOMICRMW_FADD |
1241 | 414k | 0U, // G_ATOMICRMW_FSUB |
1242 | 414k | 0U, // G_FENCE |
1243 | 414k | 0U, // G_BRCOND |
1244 | 414k | 0U, // G_BRINDIRECT |
1245 | 414k | 0U, // G_INTRINSIC |
1246 | 414k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
1247 | 414k | 0U, // G_ANYEXT |
1248 | 414k | 0U, // G_TRUNC |
1249 | 414k | 0U, // G_CONSTANT |
1250 | 414k | 0U, // G_FCONSTANT |
1251 | 414k | 0U, // G_VASTART |
1252 | 414k | 0U, // G_VAARG |
1253 | 414k | 0U, // G_SEXT |
1254 | 414k | 0U, // G_SEXT_INREG |
1255 | 414k | 0U, // G_ZEXT |
1256 | 414k | 0U, // G_SHL |
1257 | 414k | 0U, // G_LSHR |
1258 | 414k | 0U, // G_ASHR |
1259 | 414k | 0U, // G_FSHL |
1260 | 414k | 0U, // G_FSHR |
1261 | 414k | 0U, // G_ROTR |
1262 | 414k | 0U, // G_ROTL |
1263 | 414k | 0U, // G_ICMP |
1264 | 414k | 0U, // G_FCMP |
1265 | 414k | 0U, // G_SELECT |
1266 | 414k | 0U, // G_UADDO |
1267 | 414k | 0U, // G_UADDE |
1268 | 414k | 0U, // G_USUBO |
1269 | 414k | 0U, // G_USUBE |
1270 | 414k | 0U, // G_SADDO |
1271 | 414k | 0U, // G_SADDE |
1272 | 414k | 0U, // G_SSUBO |
1273 | 414k | 0U, // G_SSUBE |
1274 | 414k | 0U, // G_UMULO |
1275 | 414k | 0U, // G_SMULO |
1276 | 414k | 0U, // G_UMULH |
1277 | 414k | 0U, // G_SMULH |
1278 | 414k | 0U, // G_UADDSAT |
1279 | 414k | 0U, // G_SADDSAT |
1280 | 414k | 0U, // G_USUBSAT |
1281 | 414k | 0U, // G_SSUBSAT |
1282 | 414k | 0U, // G_USHLSAT |
1283 | 414k | 0U, // G_SSHLSAT |
1284 | 414k | 0U, // G_SMULFIX |
1285 | 414k | 0U, // G_UMULFIX |
1286 | 414k | 0U, // G_SMULFIXSAT |
1287 | 414k | 0U, // G_UMULFIXSAT |
1288 | 414k | 0U, // G_SDIVFIX |
1289 | 414k | 0U, // G_UDIVFIX |
1290 | 414k | 0U, // G_SDIVFIXSAT |
1291 | 414k | 0U, // G_UDIVFIXSAT |
1292 | 414k | 0U, // G_FADD |
1293 | 414k | 0U, // G_FSUB |
1294 | 414k | 0U, // G_FMUL |
1295 | 414k | 0U, // G_FMA |
1296 | 414k | 0U, // G_FMAD |
1297 | 414k | 0U, // G_FDIV |
1298 | 414k | 0U, // G_FREM |
1299 | 414k | 0U, // G_FPOW |
1300 | 414k | 0U, // G_FPOWI |
1301 | 414k | 0U, // G_FEXP |
1302 | 414k | 0U, // G_FEXP2 |
1303 | 414k | 0U, // G_FLOG |
1304 | 414k | 0U, // G_FLOG2 |
1305 | 414k | 0U, // G_FLOG10 |
1306 | 414k | 0U, // G_FNEG |
1307 | 414k | 0U, // G_FPEXT |
1308 | 414k | 0U, // G_FPTRUNC |
1309 | 414k | 0U, // G_FPTOSI |
1310 | 414k | 0U, // G_FPTOUI |
1311 | 414k | 0U, // G_SITOFP |
1312 | 414k | 0U, // G_UITOFP |
1313 | 414k | 0U, // G_FABS |
1314 | 414k | 0U, // G_FCOPYSIGN |
1315 | 414k | 0U, // G_FCANONICALIZE |
1316 | 414k | 0U, // G_FMINNUM |
1317 | 414k | 0U, // G_FMAXNUM |
1318 | 414k | 0U, // G_FMINNUM_IEEE |
1319 | 414k | 0U, // G_FMAXNUM_IEEE |
1320 | 414k | 0U, // G_FMINIMUM |
1321 | 414k | 0U, // G_FMAXIMUM |
1322 | 414k | 0U, // G_PTR_ADD |
1323 | 414k | 0U, // G_PTRMASK |
1324 | 414k | 0U, // G_SMIN |
1325 | 414k | 0U, // G_SMAX |
1326 | 414k | 0U, // G_UMIN |
1327 | 414k | 0U, // G_UMAX |
1328 | 414k | 0U, // G_ABS |
1329 | 414k | 0U, // G_LROUND |
1330 | 414k | 0U, // G_LLROUND |
1331 | 414k | 0U, // G_BR |
1332 | 414k | 0U, // G_BRJT |
1333 | 414k | 0U, // G_INSERT_VECTOR_ELT |
1334 | 414k | 0U, // G_EXTRACT_VECTOR_ELT |
1335 | 414k | 0U, // G_SHUFFLE_VECTOR |
1336 | 414k | 0U, // G_CTTZ |
1337 | 414k | 0U, // G_CTTZ_ZERO_UNDEF |
1338 | 414k | 0U, // G_CTLZ |
1339 | 414k | 0U, // G_CTLZ_ZERO_UNDEF |
1340 | 414k | 0U, // G_CTPOP |
1341 | 414k | 0U, // G_BSWAP |
1342 | 414k | 0U, // G_BITREVERSE |
1343 | 414k | 0U, // G_FCEIL |
1344 | 414k | 0U, // G_FCOS |
1345 | 414k | 0U, // G_FSIN |
1346 | 414k | 0U, // G_FSQRT |
1347 | 414k | 0U, // G_FFLOOR |
1348 | 414k | 0U, // G_FRINT |
1349 | 414k | 0U, // G_FNEARBYINT |
1350 | 414k | 0U, // G_ADDRSPACE_CAST |
1351 | 414k | 0U, // G_BLOCK_ADDR |
1352 | 414k | 0U, // G_JUMP_TABLE |
1353 | 414k | 0U, // G_DYN_STACKALLOC |
1354 | 414k | 0U, // G_STRICT_FADD |
1355 | 414k | 0U, // G_STRICT_FSUB |
1356 | 414k | 0U, // G_STRICT_FMUL |
1357 | 414k | 0U, // G_STRICT_FDIV |
1358 | 414k | 0U, // G_STRICT_FREM |
1359 | 414k | 0U, // G_STRICT_FMA |
1360 | 414k | 0U, // G_STRICT_FSQRT |
1361 | 414k | 0U, // G_READ_REGISTER |
1362 | 414k | 0U, // G_WRITE_REGISTER |
1363 | 414k | 0U, // G_MEMCPY |
1364 | 414k | 0U, // G_MEMCPY_INLINE |
1365 | 414k | 0U, // G_MEMMOVE |
1366 | 414k | 0U, // G_MEMSET |
1367 | 414k | 0U, // G_BZERO |
1368 | 414k | 0U, // G_VECREDUCE_SEQ_FADD |
1369 | 414k | 0U, // G_VECREDUCE_SEQ_FMUL |
1370 | 414k | 0U, // G_VECREDUCE_FADD |
1371 | 414k | 0U, // G_VECREDUCE_FMUL |
1372 | 414k | 0U, // G_VECREDUCE_FMAX |
1373 | 414k | 0U, // G_VECREDUCE_FMIN |
1374 | 414k | 0U, // G_VECREDUCE_ADD |
1375 | 414k | 0U, // G_VECREDUCE_MUL |
1376 | 414k | 0U, // G_VECREDUCE_AND |
1377 | 414k | 0U, // G_VECREDUCE_OR |
1378 | 414k | 0U, // G_VECREDUCE_XOR |
1379 | 414k | 0U, // G_VECREDUCE_SMAX |
1380 | 414k | 0U, // G_VECREDUCE_SMIN |
1381 | 414k | 0U, // G_VECREDUCE_UMAX |
1382 | 414k | 0U, // G_VECREDUCE_UMIN |
1383 | 414k | 0U, // G_SBFX |
1384 | 414k | 0U, // G_UBFX |
1385 | 414k | 0U, // ABS_ZPmZ_UNDEF_B |
1386 | 414k | 0U, // ABS_ZPmZ_UNDEF_D |
1387 | 414k | 0U, // ABS_ZPmZ_UNDEF_H |
1388 | 414k | 0U, // ABS_ZPmZ_UNDEF_S |
1389 | 414k | 0U, // ADDSWrr |
1390 | 414k | 0U, // ADDSXrr |
1391 | 414k | 0U, // ADDWrr |
1392 | 414k | 0U, // ADDXrr |
1393 | 414k | 0U, // ADD_ZPZZ_UNDEF_B |
1394 | 414k | 0U, // ADD_ZPZZ_UNDEF_D |
1395 | 414k | 0U, // ADD_ZPZZ_UNDEF_H |
1396 | 414k | 0U, // ADD_ZPZZ_UNDEF_S |
1397 | 414k | 0U, // ADD_ZPZZ_ZERO_B |
1398 | 414k | 0U, // ADD_ZPZZ_ZERO_D |
1399 | 414k | 0U, // ADD_ZPZZ_ZERO_H |
1400 | 414k | 0U, // ADD_ZPZZ_ZERO_S |
1401 | 414k | 0U, // ADDlowTLS |
1402 | 414k | 0U, // ADJCALLSTACKDOWN |
1403 | 414k | 0U, // ADJCALLSTACKUP |
1404 | 414k | 0U, // AESIMCrrTied |
1405 | 414k | 0U, // AESMCrrTied |
1406 | 414k | 0U, // ANDSWrr |
1407 | 414k | 0U, // ANDSXrr |
1408 | 414k | 0U, // ANDWrr |
1409 | 414k | 0U, // ANDXrr |
1410 | 414k | 0U, // ASRD_ZPZI_ZERO_B |
1411 | 414k | 0U, // ASRD_ZPZI_ZERO_D |
1412 | 414k | 0U, // ASRD_ZPZI_ZERO_H |
1413 | 414k | 0U, // ASRD_ZPZI_ZERO_S |
1414 | 414k | 0U, // ASR_ZPZI_UNDEF_B |
1415 | 414k | 0U, // ASR_ZPZI_UNDEF_D |
1416 | 414k | 0U, // ASR_ZPZI_UNDEF_H |
1417 | 414k | 0U, // ASR_ZPZI_UNDEF_S |
1418 | 414k | 0U, // ASR_ZPZZ_UNDEF_B |
1419 | 414k | 0U, // ASR_ZPZZ_UNDEF_D |
1420 | 414k | 0U, // ASR_ZPZZ_UNDEF_H |
1421 | 414k | 0U, // ASR_ZPZZ_UNDEF_S |
1422 | 414k | 0U, // ASR_ZPZZ_ZERO_B |
1423 | 414k | 0U, // ASR_ZPZZ_ZERO_D |
1424 | 414k | 0U, // ASR_ZPZZ_ZERO_H |
1425 | 414k | 0U, // ASR_ZPZZ_ZERO_S |
1426 | 414k | 0U, // BICSWrr |
1427 | 414k | 0U, // BICSXrr |
1428 | 414k | 0U, // BICWrr |
1429 | 414k | 0U, // BICXrr |
1430 | 414k | 0U, // BLRNoIP |
1431 | 414k | 0U, // BLR_BTI |
1432 | 414k | 0U, // BLR_RVMARKER |
1433 | 414k | 0U, // BSPv16i8 |
1434 | 414k | 0U, // BSPv8i8 |
1435 | 414k | 0U, // CATCHRET |
1436 | 414k | 0U, // CLEANUPRET |
1437 | 414k | 0U, // CLS_ZPmZ_UNDEF_B |
1438 | 414k | 0U, // CLS_ZPmZ_UNDEF_D |
1439 | 414k | 0U, // CLS_ZPmZ_UNDEF_H |
1440 | 414k | 0U, // CLS_ZPmZ_UNDEF_S |
1441 | 414k | 0U, // CLZ_ZPmZ_UNDEF_B |
1442 | 414k | 0U, // CLZ_ZPmZ_UNDEF_D |
1443 | 414k | 0U, // CLZ_ZPmZ_UNDEF_H |
1444 | 414k | 0U, // CLZ_ZPmZ_UNDEF_S |
1445 | 414k | 0U, // CMP_SWAP_128 |
1446 | 414k | 0U, // CMP_SWAP_128_ACQUIRE |
1447 | 414k | 0U, // CMP_SWAP_128_MONOTONIC |
1448 | 414k | 0U, // CMP_SWAP_128_RELEASE |
1449 | 414k | 0U, // CMP_SWAP_16 |
1450 | 414k | 0U, // CMP_SWAP_32 |
1451 | 414k | 0U, // CMP_SWAP_64 |
1452 | 414k | 0U, // CMP_SWAP_8 |
1453 | 414k | 0U, // CNOT_ZPmZ_UNDEF_B |
1454 | 414k | 0U, // CNOT_ZPmZ_UNDEF_D |
1455 | 414k | 0U, // CNOT_ZPmZ_UNDEF_H |
1456 | 414k | 0U, // CNOT_ZPmZ_UNDEF_S |
1457 | 414k | 0U, // CNT_ZPmZ_UNDEF_B |
1458 | 414k | 0U, // CNT_ZPmZ_UNDEF_D |
1459 | 414k | 0U, // CNT_ZPmZ_UNDEF_H |
1460 | 414k | 0U, // CNT_ZPmZ_UNDEF_S |
1461 | 414k | 0U, // CompilerBarrier |
1462 | 414k | 0U, // EMITBKEY |
1463 | 414k | 0U, // EONWrr |
1464 | 414k | 0U, // EONXrr |
1465 | 414k | 0U, // EORWrr |
1466 | 414k | 0U, // EORXrr |
1467 | 414k | 0U, // F128CSEL |
1468 | 414k | 0U, // FABD_ZPZZ_UNDEF_D |
1469 | 414k | 0U, // FABD_ZPZZ_UNDEF_H |
1470 | 414k | 0U, // FABD_ZPZZ_UNDEF_S |
1471 | 414k | 0U, // FABD_ZPZZ_ZERO_D |
1472 | 414k | 0U, // FABD_ZPZZ_ZERO_H |
1473 | 414k | 0U, // FABD_ZPZZ_ZERO_S |
1474 | 414k | 0U, // FABS_ZPmZ_UNDEF_D |
1475 | 414k | 0U, // FABS_ZPmZ_UNDEF_H |
1476 | 414k | 0U, // FABS_ZPmZ_UNDEF_S |
1477 | 414k | 0U, // FADD_ZPZI_UNDEF_D |
1478 | 414k | 0U, // FADD_ZPZI_UNDEF_H |
1479 | 414k | 0U, // FADD_ZPZI_UNDEF_S |
1480 | 414k | 0U, // FADD_ZPZI_ZERO_D |
1481 | 414k | 0U, // FADD_ZPZI_ZERO_H |
1482 | 414k | 0U, // FADD_ZPZI_ZERO_S |
1483 | 414k | 0U, // FADD_ZPZZ_UNDEF_D |
1484 | 414k | 0U, // FADD_ZPZZ_UNDEF_H |
1485 | 414k | 0U, // FADD_ZPZZ_UNDEF_S |
1486 | 414k | 0U, // FADD_ZPZZ_ZERO_D |
1487 | 414k | 0U, // FADD_ZPZZ_ZERO_H |
1488 | 414k | 0U, // FADD_ZPZZ_ZERO_S |
1489 | 414k | 0U, // FCVTZS_ZPmZ_DtoD_UNDEF |
1490 | 414k | 0U, // FCVTZS_ZPmZ_DtoS_UNDEF |
1491 | 414k | 0U, // FCVTZS_ZPmZ_HtoD_UNDEF |
1492 | 414k | 0U, // FCVTZS_ZPmZ_HtoH_UNDEF |
1493 | 414k | 0U, // FCVTZS_ZPmZ_HtoS_UNDEF |
1494 | 414k | 0U, // FCVTZS_ZPmZ_StoD_UNDEF |
1495 | 414k | 0U, // FCVTZS_ZPmZ_StoS_UNDEF |
1496 | 414k | 0U, // FCVTZU_ZPmZ_DtoD_UNDEF |
1497 | 414k | 0U, // FCVTZU_ZPmZ_DtoS_UNDEF |
1498 | 414k | 0U, // FCVTZU_ZPmZ_HtoD_UNDEF |
1499 | 414k | 0U, // FCVTZU_ZPmZ_HtoH_UNDEF |
1500 | 414k | 0U, // FCVTZU_ZPmZ_HtoS_UNDEF |
1501 | 414k | 0U, // FCVTZU_ZPmZ_StoD_UNDEF |
1502 | 414k | 0U, // FCVTZU_ZPmZ_StoS_UNDEF |
1503 | 414k | 0U, // FCVT_ZPmZ_DtoH_UNDEF |
1504 | 414k | 0U, // FCVT_ZPmZ_DtoS_UNDEF |
1505 | 414k | 0U, // FCVT_ZPmZ_HtoD_UNDEF |
1506 | 414k | 0U, // FCVT_ZPmZ_HtoS_UNDEF |
1507 | 414k | 0U, // FCVT_ZPmZ_StoD_UNDEF |
1508 | 414k | 0U, // FCVT_ZPmZ_StoH_UNDEF |
1509 | 414k | 0U, // FDIVR_ZPZZ_ZERO_D |
1510 | 414k | 0U, // FDIVR_ZPZZ_ZERO_H |
1511 | 414k | 0U, // FDIVR_ZPZZ_ZERO_S |
1512 | 414k | 0U, // FDIV_ZPZZ_UNDEF_D |
1513 | 414k | 0U, // FDIV_ZPZZ_UNDEF_H |
1514 | 414k | 0U, // FDIV_ZPZZ_UNDEF_S |
1515 | 414k | 0U, // FDIV_ZPZZ_ZERO_D |
1516 | 414k | 0U, // FDIV_ZPZZ_ZERO_H |
1517 | 414k | 0U, // FDIV_ZPZZ_ZERO_S |
1518 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_D |
1519 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_H |
1520 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_S |
1521 | 414k | 0U, // FMAXNM_ZPZI_ZERO_D |
1522 | 414k | 0U, // FMAXNM_ZPZI_ZERO_H |
1523 | 414k | 0U, // FMAXNM_ZPZI_ZERO_S |
1524 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_D |
1525 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_H |
1526 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_S |
1527 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_D |
1528 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_H |
1529 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_S |
1530 | 414k | 0U, // FMAX_ZPZI_UNDEF_D |
1531 | 414k | 0U, // FMAX_ZPZI_UNDEF_H |
1532 | 414k | 0U, // FMAX_ZPZI_UNDEF_S |
1533 | 414k | 0U, // FMAX_ZPZI_ZERO_D |
1534 | 414k | 0U, // FMAX_ZPZI_ZERO_H |
1535 | 414k | 0U, // FMAX_ZPZI_ZERO_S |
1536 | 414k | 0U, // FMAX_ZPZZ_UNDEF_D |
1537 | 414k | 0U, // FMAX_ZPZZ_UNDEF_H |
1538 | 414k | 0U, // FMAX_ZPZZ_UNDEF_S |
1539 | 414k | 0U, // FMAX_ZPZZ_ZERO_D |
1540 | 414k | 0U, // FMAX_ZPZZ_ZERO_H |
1541 | 414k | 0U, // FMAX_ZPZZ_ZERO_S |
1542 | 414k | 0U, // FMINNM_ZPZI_UNDEF_D |
1543 | 414k | 0U, // FMINNM_ZPZI_UNDEF_H |
1544 | 414k | 0U, // FMINNM_ZPZI_UNDEF_S |
1545 | 414k | 0U, // FMINNM_ZPZI_ZERO_D |
1546 | 414k | 0U, // FMINNM_ZPZI_ZERO_H |
1547 | 414k | 0U, // FMINNM_ZPZI_ZERO_S |
1548 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_D |
1549 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_H |
1550 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_S |
1551 | 414k | 0U, // FMINNM_ZPZZ_ZERO_D |
1552 | 414k | 0U, // FMINNM_ZPZZ_ZERO_H |
1553 | 414k | 0U, // FMINNM_ZPZZ_ZERO_S |
1554 | 414k | 0U, // FMIN_ZPZI_UNDEF_D |
1555 | 414k | 0U, // FMIN_ZPZI_UNDEF_H |
1556 | 414k | 0U, // FMIN_ZPZI_UNDEF_S |
1557 | 414k | 0U, // FMIN_ZPZI_ZERO_D |
1558 | 414k | 0U, // FMIN_ZPZI_ZERO_H |
1559 | 414k | 0U, // FMIN_ZPZI_ZERO_S |
1560 | 414k | 0U, // FMIN_ZPZZ_UNDEF_D |
1561 | 414k | 0U, // FMIN_ZPZZ_UNDEF_H |
1562 | 414k | 0U, // FMIN_ZPZZ_UNDEF_S |
1563 | 414k | 0U, // FMIN_ZPZZ_ZERO_D |
1564 | 414k | 0U, // FMIN_ZPZZ_ZERO_H |
1565 | 414k | 0U, // FMIN_ZPZZ_ZERO_S |
1566 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_D |
1567 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_H |
1568 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_S |
1569 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_D |
1570 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_H |
1571 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_S |
1572 | 414k | 0U, // FMOVD0 |
1573 | 414k | 0U, // FMOVH0 |
1574 | 414k | 0U, // FMOVS0 |
1575 | 414k | 0U, // FMULX_ZPZZ_ZERO_D |
1576 | 414k | 0U, // FMULX_ZPZZ_ZERO_H |
1577 | 414k | 0U, // FMULX_ZPZZ_ZERO_S |
1578 | 414k | 0U, // FMUL_ZPZI_UNDEF_D |
1579 | 414k | 0U, // FMUL_ZPZI_UNDEF_H |
1580 | 414k | 0U, // FMUL_ZPZI_UNDEF_S |
1581 | 414k | 0U, // FMUL_ZPZI_ZERO_D |
1582 | 414k | 0U, // FMUL_ZPZI_ZERO_H |
1583 | 414k | 0U, // FMUL_ZPZI_ZERO_S |
1584 | 414k | 0U, // FMUL_ZPZZ_UNDEF_D |
1585 | 414k | 0U, // FMUL_ZPZZ_UNDEF_H |
1586 | 414k | 0U, // FMUL_ZPZZ_UNDEF_S |
1587 | 414k | 0U, // FMUL_ZPZZ_ZERO_D |
1588 | 414k | 0U, // FMUL_ZPZZ_ZERO_H |
1589 | 414k | 0U, // FMUL_ZPZZ_ZERO_S |
1590 | 414k | 0U, // FNEG_ZPmZ_UNDEF_D |
1591 | 414k | 0U, // FNEG_ZPmZ_UNDEF_H |
1592 | 414k | 0U, // FNEG_ZPmZ_UNDEF_S |
1593 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_D |
1594 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_H |
1595 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_S |
1596 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_D |
1597 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_H |
1598 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_S |
1599 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_D |
1600 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_H |
1601 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_S |
1602 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_D |
1603 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_H |
1604 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_S |
1605 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_D |
1606 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_H |
1607 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_S |
1608 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_D |
1609 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_H |
1610 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_S |
1611 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_D |
1612 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_H |
1613 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_S |
1614 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_D |
1615 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_H |
1616 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_S |
1617 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_D |
1618 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_H |
1619 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_S |
1620 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_D |
1621 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_H |
1622 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_S |
1623 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_D |
1624 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_H |
1625 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_S |
1626 | 414k | 0U, // FSUBR_ZPZI_UNDEF_D |
1627 | 414k | 0U, // FSUBR_ZPZI_UNDEF_H |
1628 | 414k | 0U, // FSUBR_ZPZI_UNDEF_S |
1629 | 414k | 0U, // FSUBR_ZPZI_ZERO_D |
1630 | 414k | 0U, // FSUBR_ZPZI_ZERO_H |
1631 | 414k | 0U, // FSUBR_ZPZI_ZERO_S |
1632 | 414k | 0U, // FSUBR_ZPZZ_ZERO_D |
1633 | 414k | 0U, // FSUBR_ZPZZ_ZERO_H |
1634 | 414k | 0U, // FSUBR_ZPZZ_ZERO_S |
1635 | 414k | 0U, // FSUB_ZPZI_UNDEF_D |
1636 | 414k | 0U, // FSUB_ZPZI_UNDEF_H |
1637 | 414k | 0U, // FSUB_ZPZI_UNDEF_S |
1638 | 414k | 0U, // FSUB_ZPZI_ZERO_D |
1639 | 414k | 0U, // FSUB_ZPZI_ZERO_H |
1640 | 414k | 0U, // FSUB_ZPZI_ZERO_S |
1641 | 414k | 0U, // FSUB_ZPZZ_UNDEF_D |
1642 | 414k | 0U, // FSUB_ZPZZ_UNDEF_H |
1643 | 414k | 0U, // FSUB_ZPZZ_UNDEF_S |
1644 | 414k | 0U, // FSUB_ZPZZ_ZERO_D |
1645 | 414k | 0U, // FSUB_ZPZZ_ZERO_H |
1646 | 414k | 0U, // FSUB_ZPZZ_ZERO_S |
1647 | 414k | 0U, // GLD1B_D |
1648 | 414k | 0U, // GLD1B_D_IMM |
1649 | 414k | 0U, // GLD1B_D_SXTW |
1650 | 414k | 0U, // GLD1B_D_UXTW |
1651 | 414k | 0U, // GLD1B_S_IMM |
1652 | 414k | 0U, // GLD1B_S_SXTW |
1653 | 414k | 0U, // GLD1B_S_UXTW |
1654 | 414k | 0U, // GLD1D |
1655 | 414k | 0U, // GLD1D_IMM |
1656 | 414k | 0U, // GLD1D_SCALED |
1657 | 414k | 0U, // GLD1D_SXTW |
1658 | 414k | 0U, // GLD1D_SXTW_SCALED |
1659 | 414k | 0U, // GLD1D_UXTW |
1660 | 414k | 0U, // GLD1D_UXTW_SCALED |
1661 | 414k | 0U, // GLD1H_D |
1662 | 414k | 0U, // GLD1H_D_IMM |
1663 | 414k | 0U, // GLD1H_D_SCALED |
1664 | 414k | 0U, // GLD1H_D_SXTW |
1665 | 414k | 0U, // GLD1H_D_SXTW_SCALED |
1666 | 414k | 0U, // GLD1H_D_UXTW |
1667 | 414k | 0U, // GLD1H_D_UXTW_SCALED |
1668 | 414k | 0U, // GLD1H_S_IMM |
1669 | 414k | 0U, // GLD1H_S_SXTW |
1670 | 414k | 0U, // GLD1H_S_SXTW_SCALED |
1671 | 414k | 0U, // GLD1H_S_UXTW |
1672 | 414k | 0U, // GLD1H_S_UXTW_SCALED |
1673 | 414k | 0U, // GLD1SB_D |
1674 | 414k | 0U, // GLD1SB_D_IMM |
1675 | 414k | 0U, // GLD1SB_D_SXTW |
1676 | 414k | 0U, // GLD1SB_D_UXTW |
1677 | 414k | 0U, // GLD1SB_S_IMM |
1678 | 414k | 0U, // GLD1SB_S_SXTW |
1679 | 414k | 0U, // GLD1SB_S_UXTW |
1680 | 414k | 0U, // GLD1SH_D |
1681 | 414k | 0U, // GLD1SH_D_IMM |
1682 | 414k | 0U, // GLD1SH_D_SCALED |
1683 | 414k | 0U, // GLD1SH_D_SXTW |
1684 | 414k | 0U, // GLD1SH_D_SXTW_SCALED |
1685 | 414k | 0U, // GLD1SH_D_UXTW |
1686 | 414k | 0U, // GLD1SH_D_UXTW_SCALED |
1687 | 414k | 0U, // GLD1SH_S_IMM |
1688 | 414k | 0U, // GLD1SH_S_SXTW |
1689 | 414k | 0U, // GLD1SH_S_SXTW_SCALED |
1690 | 414k | 0U, // GLD1SH_S_UXTW |
1691 | 414k | 0U, // GLD1SH_S_UXTW_SCALED |
1692 | 414k | 0U, // GLD1SW_D |
1693 | 414k | 0U, // GLD1SW_D_IMM |
1694 | 414k | 0U, // GLD1SW_D_SCALED |
1695 | 414k | 0U, // GLD1SW_D_SXTW |
1696 | 414k | 0U, // GLD1SW_D_SXTW_SCALED |
1697 | 414k | 0U, // GLD1SW_D_UXTW |
1698 | 414k | 0U, // GLD1SW_D_UXTW_SCALED |
1699 | 414k | 0U, // GLD1W_D |
1700 | 414k | 0U, // GLD1W_D_IMM |
1701 | 414k | 0U, // GLD1W_D_SCALED |
1702 | 414k | 0U, // GLD1W_D_SXTW |
1703 | 414k | 0U, // GLD1W_D_SXTW_SCALED |
1704 | 414k | 0U, // GLD1W_D_UXTW |
1705 | 414k | 0U, // GLD1W_D_UXTW_SCALED |
1706 | 414k | 0U, // GLD1W_IMM |
1707 | 414k | 0U, // GLD1W_SXTW |
1708 | 414k | 0U, // GLD1W_SXTW_SCALED |
1709 | 414k | 0U, // GLD1W_UXTW |
1710 | 414k | 0U, // GLD1W_UXTW_SCALED |
1711 | 414k | 0U, // GLDFF1B_D |
1712 | 414k | 0U, // GLDFF1B_D_IMM |
1713 | 414k | 0U, // GLDFF1B_D_SXTW |
1714 | 414k | 0U, // GLDFF1B_D_UXTW |
1715 | 414k | 0U, // GLDFF1B_S_IMM |
1716 | 414k | 0U, // GLDFF1B_S_SXTW |
1717 | 414k | 0U, // GLDFF1B_S_UXTW |
1718 | 414k | 0U, // GLDFF1D |
1719 | 414k | 0U, // GLDFF1D_IMM |
1720 | 414k | 0U, // GLDFF1D_SCALED |
1721 | 414k | 0U, // GLDFF1D_SXTW |
1722 | 414k | 0U, // GLDFF1D_SXTW_SCALED |
1723 | 414k | 0U, // GLDFF1D_UXTW |
1724 | 414k | 0U, // GLDFF1D_UXTW_SCALED |
1725 | 414k | 0U, // GLDFF1H_D |
1726 | 414k | 0U, // GLDFF1H_D_IMM |
1727 | 414k | 0U, // GLDFF1H_D_SCALED |
1728 | 414k | 0U, // GLDFF1H_D_SXTW |
1729 | 414k | 0U, // GLDFF1H_D_SXTW_SCALED |
1730 | 414k | 0U, // GLDFF1H_D_UXTW |
1731 | 414k | 0U, // GLDFF1H_D_UXTW_SCALED |
1732 | 414k | 0U, // GLDFF1H_S_IMM |
1733 | 414k | 0U, // GLDFF1H_S_SXTW |
1734 | 414k | 0U, // GLDFF1H_S_SXTW_SCALED |
1735 | 414k | 0U, // GLDFF1H_S_UXTW |
1736 | 414k | 0U, // GLDFF1H_S_UXTW_SCALED |
1737 | 414k | 0U, // GLDFF1SB_D |
1738 | 414k | 0U, // GLDFF1SB_D_IMM |
1739 | 414k | 0U, // GLDFF1SB_D_SXTW |
1740 | 414k | 0U, // GLDFF1SB_D_UXTW |
1741 | 414k | 0U, // GLDFF1SB_S_IMM |
1742 | 414k | 0U, // GLDFF1SB_S_SXTW |
1743 | 414k | 0U, // GLDFF1SB_S_UXTW |
1744 | 414k | 0U, // GLDFF1SH_D |
1745 | 414k | 0U, // GLDFF1SH_D_IMM |
1746 | 414k | 0U, // GLDFF1SH_D_SCALED |
1747 | 414k | 0U, // GLDFF1SH_D_SXTW |
1748 | 414k | 0U, // GLDFF1SH_D_SXTW_SCALED |
1749 | 414k | 0U, // GLDFF1SH_D_UXTW |
1750 | 414k | 0U, // GLDFF1SH_D_UXTW_SCALED |
1751 | 414k | 0U, // GLDFF1SH_S_IMM |
1752 | 414k | 0U, // GLDFF1SH_S_SXTW |
1753 | 414k | 0U, // GLDFF1SH_S_SXTW_SCALED |
1754 | 414k | 0U, // GLDFF1SH_S_UXTW |
1755 | 414k | 0U, // GLDFF1SH_S_UXTW_SCALED |
1756 | 414k | 0U, // GLDFF1SW_D |
1757 | 414k | 0U, // GLDFF1SW_D_IMM |
1758 | 414k | 0U, // GLDFF1SW_D_SCALED |
1759 | 414k | 0U, // GLDFF1SW_D_SXTW |
1760 | 414k | 0U, // GLDFF1SW_D_SXTW_SCALED |
1761 | 414k | 0U, // GLDFF1SW_D_UXTW |
1762 | 414k | 0U, // GLDFF1SW_D_UXTW_SCALED |
1763 | 414k | 0U, // GLDFF1W_D |
1764 | 414k | 0U, // GLDFF1W_D_IMM |
1765 | 414k | 0U, // GLDFF1W_D_SCALED |
1766 | 414k | 0U, // GLDFF1W_D_SXTW |
1767 | 414k | 0U, // GLDFF1W_D_SXTW_SCALED |
1768 | 414k | 0U, // GLDFF1W_D_UXTW |
1769 | 414k | 0U, // GLDFF1W_D_UXTW_SCALED |
1770 | 414k | 0U, // GLDFF1W_IMM |
1771 | 414k | 0U, // GLDFF1W_SXTW |
1772 | 414k | 0U, // GLDFF1W_SXTW_SCALED |
1773 | 414k | 0U, // GLDFF1W_UXTW |
1774 | 414k | 0U, // GLDFF1W_UXTW_SCALED |
1775 | 414k | 0U, // G_ADD_LOW |
1776 | 414k | 0U, // G_DUP |
1777 | 414k | 0U, // G_DUPLANE16 |
1778 | 414k | 0U, // G_DUPLANE32 |
1779 | 414k | 0U, // G_DUPLANE64 |
1780 | 414k | 0U, // G_DUPLANE8 |
1781 | 414k | 0U, // G_EXT |
1782 | 414k | 0U, // G_FCMEQ |
1783 | 414k | 0U, // G_FCMEQZ |
1784 | 414k | 0U, // G_FCMGE |
1785 | 414k | 0U, // G_FCMGEZ |
1786 | 414k | 0U, // G_FCMGT |
1787 | 414k | 0U, // G_FCMGTZ |
1788 | 414k | 0U, // G_FCMLEZ |
1789 | 414k | 0U, // G_FCMLTZ |
1790 | 414k | 0U, // G_REV16 |
1791 | 414k | 0U, // G_REV32 |
1792 | 414k | 0U, // G_REV64 |
1793 | 414k | 0U, // G_SITOF |
1794 | 414k | 0U, // G_TRN1 |
1795 | 414k | 0U, // G_TRN2 |
1796 | 414k | 0U, // G_UITOF |
1797 | 414k | 0U, // G_UZP1 |
1798 | 414k | 0U, // G_UZP2 |
1799 | 414k | 0U, // G_VASHR |
1800 | 414k | 0U, // G_VLSHR |
1801 | 414k | 0U, // G_ZIP1 |
1802 | 414k | 0U, // G_ZIP2 |
1803 | 414k | 0U, // HOM_Epilog |
1804 | 414k | 0U, // HOM_Prolog |
1805 | 414k | 0U, // HWASAN_CHECK_MEMACCESS |
1806 | 414k | 0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES |
1807 | 414k | 0U, // IRGstack |
1808 | 414k | 0U, // JumpTableDest16 |
1809 | 414k | 0U, // JumpTableDest32 |
1810 | 414k | 0U, // JumpTableDest8 |
1811 | 414k | 0U, // LD1B_D_IMM |
1812 | 414k | 0U, // LD1B_H_IMM |
1813 | 414k | 0U, // LD1B_IMM |
1814 | 414k | 0U, // LD1B_S_IMM |
1815 | 414k | 0U, // LD1D_IMM |
1816 | 414k | 0U, // LD1H_D_IMM |
1817 | 414k | 0U, // LD1H_IMM |
1818 | 414k | 0U, // LD1H_S_IMM |
1819 | 414k | 0U, // LD1SB_D_IMM |
1820 | 414k | 0U, // LD1SB_H_IMM |
1821 | 414k | 0U, // LD1SB_S_IMM |
1822 | 414k | 0U, // LD1SH_D_IMM |
1823 | 414k | 0U, // LD1SH_S_IMM |
1824 | 414k | 0U, // LD1SW_D_IMM |
1825 | 414k | 0U, // LD1W_D_IMM |
1826 | 414k | 0U, // LD1W_IMM |
1827 | 414k | 0U, // LDFF1B |
1828 | 414k | 0U, // LDFF1B_D |
1829 | 414k | 0U, // LDFF1B_H |
1830 | 414k | 0U, // LDFF1B_S |
1831 | 414k | 0U, // LDFF1D |
1832 | 414k | 0U, // LDFF1H |
1833 | 414k | 0U, // LDFF1H_D |
1834 | 414k | 0U, // LDFF1H_S |
1835 | 414k | 0U, // LDFF1SB_D |
1836 | 414k | 0U, // LDFF1SB_H |
1837 | 414k | 0U, // LDFF1SB_S |
1838 | 414k | 0U, // LDFF1SH_D |
1839 | 414k | 0U, // LDFF1SH_S |
1840 | 414k | 0U, // LDFF1SW_D |
1841 | 414k | 0U, // LDFF1W |
1842 | 414k | 0U, // LDFF1W_D |
1843 | 414k | 0U, // LDNF1B_D_IMM |
1844 | 414k | 0U, // LDNF1B_H_IMM |
1845 | 414k | 0U, // LDNF1B_IMM |
1846 | 414k | 0U, // LDNF1B_S_IMM |
1847 | 414k | 0U, // LDNF1D_IMM |
1848 | 414k | 0U, // LDNF1H_D_IMM |
1849 | 414k | 0U, // LDNF1H_IMM |
1850 | 414k | 0U, // LDNF1H_S_IMM |
1851 | 414k | 0U, // LDNF1SB_D_IMM |
1852 | 414k | 0U, // LDNF1SB_H_IMM |
1853 | 414k | 0U, // LDNF1SB_S_IMM |
1854 | 414k | 0U, // LDNF1SH_D_IMM |
1855 | 414k | 0U, // LDNF1SH_S_IMM |
1856 | 414k | 0U, // LDNF1SW_D_IMM |
1857 | 414k | 0U, // LDNF1W_D_IMM |
1858 | 414k | 0U, // LDNF1W_IMM |
1859 | 414k | 0U, // LDR_ZZXI |
1860 | 414k | 0U, // LDR_ZZZXI |
1861 | 414k | 0U, // LDR_ZZZZXI |
1862 | 414k | 0U, // LOADgot |
1863 | 414k | 0U, // LSL_ZPZI_UNDEF_B |
1864 | 414k | 0U, // LSL_ZPZI_UNDEF_D |
1865 | 414k | 0U, // LSL_ZPZI_UNDEF_H |
1866 | 414k | 0U, // LSL_ZPZI_UNDEF_S |
1867 | 414k | 0U, // LSL_ZPZZ_UNDEF_B |
1868 | 414k | 0U, // LSL_ZPZZ_UNDEF_D |
1869 | 414k | 0U, // LSL_ZPZZ_UNDEF_H |
1870 | 414k | 0U, // LSL_ZPZZ_UNDEF_S |
1871 | 414k | 0U, // LSL_ZPZZ_ZERO_B |
1872 | 414k | 0U, // LSL_ZPZZ_ZERO_D |
1873 | 414k | 0U, // LSL_ZPZZ_ZERO_H |
1874 | 414k | 0U, // LSL_ZPZZ_ZERO_S |
1875 | 414k | 0U, // LSR_ZPZI_UNDEF_B |
1876 | 414k | 0U, // LSR_ZPZI_UNDEF_D |
1877 | 414k | 0U, // LSR_ZPZI_UNDEF_H |
1878 | 414k | 0U, // LSR_ZPZI_UNDEF_S |
1879 | 414k | 0U, // LSR_ZPZZ_UNDEF_B |
1880 | 414k | 0U, // LSR_ZPZZ_UNDEF_D |
1881 | 414k | 0U, // LSR_ZPZZ_UNDEF_H |
1882 | 414k | 0U, // LSR_ZPZZ_UNDEF_S |
1883 | 414k | 0U, // LSR_ZPZZ_ZERO_B |
1884 | 414k | 0U, // LSR_ZPZZ_ZERO_D |
1885 | 414k | 0U, // LSR_ZPZZ_ZERO_H |
1886 | 414k | 0U, // LSR_ZPZZ_ZERO_S |
1887 | 414k | 0U, // MOPSMemoryCopyPseudo |
1888 | 414k | 0U, // MOPSMemoryMovePseudo |
1889 | 414k | 0U, // MOPSMemorySetPseudo |
1890 | 414k | 0U, // MOPSMemorySetTaggingPseudo |
1891 | 414k | 0U, // MOVMCSym |
1892 | 414k | 0U, // MOVaddr |
1893 | 414k | 0U, // MOVaddrBA |
1894 | 414k | 0U, // MOVaddrCP |
1895 | 414k | 0U, // MOVaddrEXT |
1896 | 414k | 0U, // MOVaddrJT |
1897 | 414k | 0U, // MOVaddrTLS |
1898 | 414k | 0U, // MOVbaseTLS |
1899 | 414k | 0U, // MOVi32imm |
1900 | 414k | 0U, // MOVi64imm |
1901 | 414k | 0U, // MUL_ZPZZ_UNDEF_B |
1902 | 414k | 0U, // MUL_ZPZZ_UNDEF_D |
1903 | 414k | 0U, // MUL_ZPZZ_UNDEF_H |
1904 | 414k | 0U, // MUL_ZPZZ_UNDEF_S |
1905 | 414k | 0U, // NEG_ZPmZ_UNDEF_B |
1906 | 414k | 0U, // NEG_ZPmZ_UNDEF_D |
1907 | 414k | 0U, // NEG_ZPmZ_UNDEF_H |
1908 | 414k | 0U, // NEG_ZPmZ_UNDEF_S |
1909 | 414k | 0U, // NOT_ZPmZ_UNDEF_B |
1910 | 414k | 0U, // NOT_ZPmZ_UNDEF_D |
1911 | 414k | 0U, // NOT_ZPmZ_UNDEF_H |
1912 | 414k | 0U, // NOT_ZPmZ_UNDEF_S |
1913 | 414k | 0U, // ORNWrr |
1914 | 414k | 0U, // ORNXrr |
1915 | 414k | 0U, // ORRWrr |
1916 | 414k | 0U, // ORRXrr |
1917 | 414k | 0U, // RDFFR_P |
1918 | 414k | 0U, // RDFFR_PPz |
1919 | 414k | 0U, // RET_ReallyLR |
1920 | 414k | 0U, // SABD_ZPZZ_UNDEF_B |
1921 | 414k | 0U, // SABD_ZPZZ_UNDEF_D |
1922 | 414k | 0U, // SABD_ZPZZ_UNDEF_H |
1923 | 414k | 0U, // SABD_ZPZZ_UNDEF_S |
1924 | 414k | 0U, // SCVTF_ZPmZ_DtoD_UNDEF |
1925 | 414k | 0U, // SCVTF_ZPmZ_DtoH_UNDEF |
1926 | 414k | 0U, // SCVTF_ZPmZ_DtoS_UNDEF |
1927 | 414k | 0U, // SCVTF_ZPmZ_HtoH_UNDEF |
1928 | 414k | 0U, // SCVTF_ZPmZ_StoD_UNDEF |
1929 | 414k | 0U, // SCVTF_ZPmZ_StoH_UNDEF |
1930 | 414k | 0U, // SCVTF_ZPmZ_StoS_UNDEF |
1931 | 414k | 0U, // SDIV_ZPZZ_UNDEF_D |
1932 | 414k | 0U, // SDIV_ZPZZ_UNDEF_S |
1933 | 414k | 0U, // SEH_AddFP |
1934 | 414k | 0U, // SEH_EpilogEnd |
1935 | 414k | 0U, // SEH_EpilogStart |
1936 | 414k | 0U, // SEH_Nop |
1937 | 414k | 0U, // SEH_PrologEnd |
1938 | 414k | 0U, // SEH_SaveFPLR |
1939 | 414k | 0U, // SEH_SaveFPLR_X |
1940 | 414k | 0U, // SEH_SaveFReg |
1941 | 414k | 0U, // SEH_SaveFRegP |
1942 | 414k | 0U, // SEH_SaveFRegP_X |
1943 | 414k | 0U, // SEH_SaveFReg_X |
1944 | 414k | 0U, // SEH_SaveReg |
1945 | 414k | 0U, // SEH_SaveRegP |
1946 | 414k | 0U, // SEH_SaveRegP_X |
1947 | 414k | 0U, // SEH_SaveReg_X |
1948 | 414k | 0U, // SEH_SetFP |
1949 | 414k | 0U, // SEH_StackAlloc |
1950 | 414k | 0U, // SMAX_ZPZZ_UNDEF_B |
1951 | 414k | 0U, // SMAX_ZPZZ_UNDEF_D |
1952 | 414k | 0U, // SMAX_ZPZZ_UNDEF_H |
1953 | 414k | 0U, // SMAX_ZPZZ_UNDEF_S |
1954 | 414k | 0U, // SMIN_ZPZZ_UNDEF_B |
1955 | 414k | 0U, // SMIN_ZPZZ_UNDEF_D |
1956 | 414k | 0U, // SMIN_ZPZZ_UNDEF_H |
1957 | 414k | 0U, // SMIN_ZPZZ_UNDEF_S |
1958 | 414k | 0U, // SMULH_ZPZZ_UNDEF_B |
1959 | 414k | 0U, // SMULH_ZPZZ_UNDEF_D |
1960 | 414k | 0U, // SMULH_ZPZZ_UNDEF_H |
1961 | 414k | 0U, // SMULH_ZPZZ_UNDEF_S |
1962 | 414k | 0U, // SPACE |
1963 | 414k | 0U, // SQABS_ZPmZ_UNDEF_B |
1964 | 414k | 0U, // SQABS_ZPmZ_UNDEF_D |
1965 | 414k | 0U, // SQABS_ZPmZ_UNDEF_H |
1966 | 414k | 0U, // SQABS_ZPmZ_UNDEF_S |
1967 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_B |
1968 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_D |
1969 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_H |
1970 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_S |
1971 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_B |
1972 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_D |
1973 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_H |
1974 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_S |
1975 | 414k | 0U, // SQSHLU_ZPZI_ZERO_B |
1976 | 414k | 0U, // SQSHLU_ZPZI_ZERO_D |
1977 | 414k | 0U, // SQSHLU_ZPZI_ZERO_H |
1978 | 414k | 0U, // SQSHLU_ZPZI_ZERO_S |
1979 | 414k | 0U, // SQSHL_ZPZI_ZERO_B |
1980 | 414k | 0U, // SQSHL_ZPZI_ZERO_D |
1981 | 414k | 0U, // SQSHL_ZPZI_ZERO_H |
1982 | 414k | 0U, // SQSHL_ZPZI_ZERO_S |
1983 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_B |
1984 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_D |
1985 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_H |
1986 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_S |
1987 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_B |
1988 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_D |
1989 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_H |
1990 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_S |
1991 | 414k | 0U, // SRSHR_ZPZI_ZERO_B |
1992 | 414k | 0U, // SRSHR_ZPZI_ZERO_D |
1993 | 414k | 0U, // SRSHR_ZPZI_ZERO_H |
1994 | 414k | 0U, // SRSHR_ZPZI_ZERO_S |
1995 | 414k | 0U, // STGloop |
1996 | 414k | 0U, // STGloop_wback |
1997 | 414k | 0U, // STR_ZZXI |
1998 | 414k | 0U, // STR_ZZZXI |
1999 | 414k | 0U, // STR_ZZZZXI |
2000 | 414k | 0U, // STZGloop |
2001 | 414k | 0U, // STZGloop_wback |
2002 | 414k | 0U, // SUBR_ZPZZ_ZERO_B |
2003 | 414k | 0U, // SUBR_ZPZZ_ZERO_D |
2004 | 414k | 0U, // SUBR_ZPZZ_ZERO_H |
2005 | 414k | 0U, // SUBR_ZPZZ_ZERO_S |
2006 | 414k | 0U, // SUBSWrr |
2007 | 414k | 0U, // SUBSXrr |
2008 | 414k | 0U, // SUBWrr |
2009 | 414k | 0U, // SUBXrr |
2010 | 414k | 0U, // SUB_ZPZZ_UNDEF_B |
2011 | 414k | 0U, // SUB_ZPZZ_UNDEF_D |
2012 | 414k | 0U, // SUB_ZPZZ_UNDEF_H |
2013 | 414k | 0U, // SUB_ZPZZ_UNDEF_S |
2014 | 414k | 0U, // SUB_ZPZZ_ZERO_B |
2015 | 414k | 0U, // SUB_ZPZZ_ZERO_D |
2016 | 414k | 0U, // SUB_ZPZZ_ZERO_H |
2017 | 414k | 0U, // SUB_ZPZZ_ZERO_S |
2018 | 414k | 0U, // SXTB_ZPmZ_UNDEF_D |
2019 | 414k | 0U, // SXTB_ZPmZ_UNDEF_H |
2020 | 414k | 0U, // SXTB_ZPmZ_UNDEF_S |
2021 | 414k | 0U, // SXTH_ZPmZ_UNDEF_D |
2022 | 414k | 0U, // SXTH_ZPmZ_UNDEF_S |
2023 | 414k | 0U, // SXTW_ZPmZ_UNDEF_D |
2024 | 414k | 0U, // SpeculationBarrierISBDSBEndBB |
2025 | 414k | 0U, // SpeculationBarrierSBEndBB |
2026 | 414k | 0U, // SpeculationSafeValueW |
2027 | 414k | 0U, // SpeculationSafeValueX |
2028 | 414k | 0U, // StoreSwiftAsyncContext |
2029 | 414k | 0U, // TAGPstack |
2030 | 414k | 0U, // TCRETURNdi |
2031 | 414k | 0U, // TCRETURNri |
2032 | 414k | 0U, // TCRETURNriALL |
2033 | 414k | 0U, // TCRETURNriBTI |
2034 | 414k | 23422U, // TLSDESCCALL |
2035 | 414k | 0U, // TLSDESC_CALLSEQ |
2036 | 414k | 0U, // UABD_ZPZZ_UNDEF_B |
2037 | 414k | 0U, // UABD_ZPZZ_UNDEF_D |
2038 | 414k | 0U, // UABD_ZPZZ_UNDEF_H |
2039 | 414k | 0U, // UABD_ZPZZ_UNDEF_S |
2040 | 414k | 0U, // UCVTF_ZPmZ_DtoD_UNDEF |
2041 | 414k | 0U, // UCVTF_ZPmZ_DtoH_UNDEF |
2042 | 414k | 0U, // UCVTF_ZPmZ_DtoS_UNDEF |
2043 | 414k | 0U, // UCVTF_ZPmZ_HtoH_UNDEF |
2044 | 414k | 0U, // UCVTF_ZPmZ_StoD_UNDEF |
2045 | 414k | 0U, // UCVTF_ZPmZ_StoH_UNDEF |
2046 | 414k | 0U, // UCVTF_ZPmZ_StoS_UNDEF |
2047 | 414k | 0U, // UDIV_ZPZZ_UNDEF_D |
2048 | 414k | 0U, // UDIV_ZPZZ_UNDEF_S |
2049 | 414k | 0U, // UMAX_ZPZZ_UNDEF_B |
2050 | 414k | 0U, // UMAX_ZPZZ_UNDEF_D |
2051 | 414k | 0U, // UMAX_ZPZZ_UNDEF_H |
2052 | 414k | 0U, // UMAX_ZPZZ_UNDEF_S |
2053 | 414k | 0U, // UMIN_ZPZZ_UNDEF_B |
2054 | 414k | 0U, // UMIN_ZPZZ_UNDEF_D |
2055 | 414k | 0U, // UMIN_ZPZZ_UNDEF_H |
2056 | 414k | 0U, // UMIN_ZPZZ_UNDEF_S |
2057 | 414k | 0U, // UMULH_ZPZZ_UNDEF_B |
2058 | 414k | 0U, // UMULH_ZPZZ_UNDEF_D |
2059 | 414k | 0U, // UMULH_ZPZZ_UNDEF_H |
2060 | 414k | 0U, // UMULH_ZPZZ_UNDEF_S |
2061 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_B |
2062 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_D |
2063 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_H |
2064 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_S |
2065 | 414k | 0U, // UQSHL_ZPZI_ZERO_B |
2066 | 414k | 0U, // UQSHL_ZPZI_ZERO_D |
2067 | 414k | 0U, // UQSHL_ZPZI_ZERO_H |
2068 | 414k | 0U, // UQSHL_ZPZI_ZERO_S |
2069 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_B |
2070 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_D |
2071 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_H |
2072 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_S |
2073 | 414k | 0U, // URECPE_ZPmZ_UNDEF_S |
2074 | 414k | 0U, // URSHL_ZPZZ_UNDEF_B |
2075 | 414k | 0U, // URSHL_ZPZZ_UNDEF_D |
2076 | 414k | 0U, // URSHL_ZPZZ_UNDEF_H |
2077 | 414k | 0U, // URSHL_ZPZZ_UNDEF_S |
2078 | 414k | 0U, // URSHR_ZPZI_ZERO_B |
2079 | 414k | 0U, // URSHR_ZPZI_ZERO_D |
2080 | 414k | 0U, // URSHR_ZPZI_ZERO_H |
2081 | 414k | 0U, // URSHR_ZPZI_ZERO_S |
2082 | 414k | 0U, // URSQRTE_ZPmZ_UNDEF_S |
2083 | 414k | 0U, // UXTB_ZPmZ_UNDEF_D |
2084 | 414k | 0U, // UXTB_ZPmZ_UNDEF_H |
2085 | 414k | 0U, // UXTB_ZPmZ_UNDEF_S |
2086 | 414k | 0U, // UXTH_ZPmZ_UNDEF_D |
2087 | 414k | 0U, // UXTH_ZPmZ_UNDEF_S |
2088 | 414k | 0U, // UXTW_ZPmZ_UNDEF_D |
2089 | 414k | 2135331U, // ABS_ZPmZ_B |
2090 | 414k | 2151715U, // ABS_ZPmZ_D |
2091 | 414k | 272700707U, // ABS_ZPmZ_H |
2092 | 414k | 2184483U, // ABS_ZPmZ_S |
2093 | 414k | 543266083U, // ABSv16i8 |
2094 | 414k | 807425315U, // ABSv1i64 |
2095 | 414k | 545363235U, // ABSv2i32 |
2096 | 414k | 547460387U, // ABSv2i64 |
2097 | 414k | 549557539U, // ABSv4i16 |
2098 | 414k | 551654691U, // ABSv4i32 |
2099 | 414k | 553751843U, // ABSv8i16 |
2100 | 414k | 555848995U, // ABSv8i8 |
2101 | 414k | 1075889597U, // ADCLB_ZZZ_D |
2102 | 414k | 1344357821U, // ADCLB_ZZZ_S |
2103 | 414k | 1075894000U, // ADCLT_ZZZ_D |
2104 | 414k | 1344362224U, // ADCLT_ZZZ_S |
2105 | 414k | 807425354U, // ADCSWr |
2106 | 414k | 807425354U, // ADCSXr |
2107 | 414k | 807422196U, // ADCWr |
2108 | 414k | 807422196U, // ADCXr |
2109 | 414k | 807422760U, // ADDG |
2110 | 414k | 1631699639U, // ADDHA_MPPZ_D |
2111 | 414k | 1633796791U, // ADDHA_MPPZ_S |
2112 | 414k | 1881179809U, // ADDHNB_ZZZ_B |
2113 | 414k | 2172716705U, // ADDHNB_ZZZ_H |
2114 | 414k | 2418099873U, // ADDHNB_ZZZ_S |
2115 | 414k | 2686490530U, // ADDHNT_ZZZ_B |
2116 | 414k | 2174818210U, // ADDHNT_ZZZ_H |
2117 | 414k | 1075926946U, // ADDHNT_ZZZ_S |
2118 | 414k | 545362315U, // ADDHNv2i64_v2i32 |
2119 | 414k | 2967601516U, // ADDHNv2i64_v4i32 |
2120 | 414k | 549556619U, // ADDHNv4i32_v4i16 |
2121 | 414k | 2969698668U, // ADDHNv4i32_v8i16 |
2122 | 414k | 2959212908U, // ADDHNv8i16_v16i8 |
2123 | 414k | 555848075U, // ADDHNv8i16_v8i8 |
2124 | 414k | 807424134U, // ADDPL_XXI |
2125 | 414k | 3223360141U, // ADDP_ZPmZ_B |
2126 | 414k | 3223376525U, // ADDP_ZPmZ_D |
2127 | 414k | 3519091341U, // ADDP_ZPmZ_H |
2128 | 414k | 3223409293U, // ADDP_ZPmZ_S |
2129 | 414k | 543265421U, // ADDPv16i8 |
2130 | 414k | 545362573U, // ADDPv2i32 |
2131 | 414k | 547459725U, // ADDPv2i64 |
2132 | 414k | 538989197U, // ADDPv2i64p |
2133 | 414k | 549556877U, // ADDPv4i16 |
2134 | 414k | 551654029U, // ADDPv4i32 |
2135 | 414k | 553751181U, // ADDPv8i16 |
2136 | 414k | 555848333U, // ADDPv8i8 |
2137 | 414k | 807425366U, // ADDSWri |
2138 | 414k | 807425366U, // ADDSWrs |
2139 | 414k | 807425366U, // ADDSWrx |
2140 | 414k | 807425366U, // ADDSXri |
2141 | 414k | 807425366U, // ADDSXrs |
2142 | 414k | 807425366U, // ADDSXrx |
2143 | 414k | 807425366U, // ADDSXrx64 |
2144 | 414k | 1631699850U, // ADDVA_MPPZ_D |
2145 | 414k | 1633797002U, // ADDVA_MPPZ_S |
2146 | 414k | 807424260U, // ADDVL_XXI |
2147 | 414k | 538990800U, // ADDVv16i8v |
2148 | 414k | 538990800U, // ADDVv4i16v |
2149 | 414k | 538990800U, // ADDVv4i32v |
2150 | 414k | 538990800U, // ADDVv8i16v |
2151 | 414k | 538990800U, // ADDVv8i8v |
2152 | 414k | 807422397U, // ADDWri |
2153 | 414k | 807422397U, // ADDWrs |
2154 | 414k | 807422397U, // ADDWrx |
2155 | 414k | 807422397U, // ADDXri |
2156 | 414k | 807422397U, // ADDXrs |
2157 | 414k | 807422397U, // ADDXrx |
2158 | 414k | 807422397U, // ADDXrx64 |
2159 | 414k | 3760228797U, // ADD_ZI_B |
2160 | 414k | 2418067901U, // ADD_ZI_D |
2161 | 414k | 2179008957U, // ADD_ZI_H |
2162 | 414k | 4028713405U, // ADD_ZI_S |
2163 | 414k | 3223357885U, // ADD_ZPmZ_B |
2164 | 414k | 3223374269U, // ADD_ZPmZ_D |
2165 | 414k | 3519089085U, // ADD_ZPmZ_H |
2166 | 414k | 3223407037U, // ADD_ZPmZ_S |
2167 | 414k | 3760228797U, // ADD_ZZZ_B |
2168 | 414k | 2418067901U, // ADD_ZZZ_D |
2169 | 414k | 2179008957U, // ADD_ZZZ_H |
2170 | 414k | 4028713405U, // ADD_ZZZ_S |
2171 | 414k | 543263165U, // ADDv16i8 |
2172 | 414k | 807422397U, // ADDv1i64 |
2173 | 414k | 545360317U, // ADDv2i32 |
2174 | 414k | 547457469U, // ADDv2i64 |
2175 | 414k | 549554621U, // ADDv4i16 |
2176 | 414k | 551651773U, // ADDv4i32 |
2177 | 414k | 553748925U, // ADDv8i16 |
2178 | 414k | 555846077U, // ADDv8i8 |
2179 | 414k | 807424987U, // ADR |
2180 | 414k | 2118420U, // ADRP |
2181 | 414k | 2449527771U, // ADR_LSL_ZZZ_D_0 |
2182 | 414k | 2449527771U, // ADR_LSL_ZZZ_D_1 |
2183 | 414k | 2449527771U, // ADR_LSL_ZZZ_D_2 |
2184 | 414k | 2449527771U, // ADR_LSL_ZZZ_D_3 |
2185 | 414k | 4060173275U, // ADR_LSL_ZZZ_S_0 |
2186 | 414k | 4060173275U, // ADR_LSL_ZZZ_S_1 |
2187 | 414k | 4060173275U, // ADR_LSL_ZZZ_S_2 |
2188 | 414k | 4060173275U, // ADR_LSL_ZZZ_S_3 |
2189 | 414k | 2449527771U, // ADR_SXTW_ZZZ_D_0 |
2190 | 414k | 2449527771U, // ADR_SXTW_ZZZ_D_1 |
2191 | 414k | 2449527771U, // ADR_SXTW_ZZZ_D_2 |
2192 | 414k | 2449527771U, // ADR_SXTW_ZZZ_D_3 |
2193 | 414k | 2449527771U, // ADR_UXTW_ZZZ_D_0 |
2194 | 414k | 2449527771U, // ADR_UXTW_ZZZ_D_1 |
2195 | 414k | 2449527771U, // ADR_UXTW_ZZZ_D_2 |
2196 | 414k | 2449527771U, // ADR_UXTW_ZZZ_D_3 |
2197 | 414k | 3760228925U, // AESD_ZZZ_B |
2198 | 414k | 2959215165U, // AESDrr |
2199 | 414k | 3760229072U, // AESE_ZZZ_B |
2200 | 414k | 2959215312U, // AESErr |
2201 | 414k | 3760228606U, // AESIMC_ZZ_B |
2202 | 414k | 543262974U, // AESIMCrr |
2203 | 414k | 3760228614U, // AESMC_ZZ_B |
2204 | 414k | 543262982U, // AESMCrr |
2205 | 414k | 807425373U, // ANDSWri |
2206 | 414k | 807425373U, // ANDSWrs |
2207 | 414k | 807425373U, // ANDSXri |
2208 | 414k | 807425373U, // ANDSXrs |
2209 | 414k | 3223360861U, // ANDS_PPzPP |
2210 | 414k | 153828U, // ANDV_VPZ_B |
2211 | 414k | 1646434532U, // ANDV_VPZ_D |
2212 | 414k | 1648548068U, // ANDV_VPZ_H |
2213 | 414k | 1638078692U, // ANDV_VPZ_S |
2214 | 414k | 807422491U, // ANDWri |
2215 | 414k | 807422491U, // ANDWrs |
2216 | 414k | 807422491U, // ANDXri |
2217 | 414k | 807422491U, // ANDXrs |
2218 | 414k | 3223357979U, // AND_PPzPP |
2219 | 414k | 2418067995U, // AND_ZI |
2220 | 414k | 3223357979U, // AND_ZPmZ_B |
2221 | 414k | 3223374363U, // AND_ZPmZ_D |
2222 | 414k | 3519089179U, // AND_ZPmZ_H |
2223 | 414k | 3223407131U, // AND_ZPmZ_S |
2224 | 414k | 2418067995U, // AND_ZZZ |
2225 | 414k | 543263259U, // ANDv16i8 |
2226 | 414k | 555846171U, // ANDv8i8 |
2227 | 414k | 3223358007U, // ASRD_ZPmI_B |
2228 | 414k | 3223374391U, // ASRD_ZPmI_D |
2229 | 414k | 3519089207U, // ASRD_ZPmI_H |
2230 | 414k | 3223407159U, // ASRD_ZPmI_S |
2231 | 414k | 3223360635U, // ASRR_ZPmZ_B |
2232 | 414k | 3223377019U, // ASRR_ZPmZ_D |
2233 | 414k | 3519091835U, // ASRR_ZPmZ_H |
2234 | 414k | 3223409787U, // ASRR_ZPmZ_S |
2235 | 414k | 807425159U, // ASRVWr |
2236 | 414k | 807425159U, // ASRVXr |
2237 | 414k | 3223360647U, // ASR_WIDE_ZPmZ_B |
2238 | 414k | 3519091847U, // ASR_WIDE_ZPmZ_H |
2239 | 414k | 3223409799U, // ASR_WIDE_ZPmZ_S |
2240 | 414k | 3760231559U, // ASR_WIDE_ZZZ_B |
2241 | 414k | 2179011719U, // ASR_WIDE_ZZZ_H |
2242 | 414k | 4028716167U, // ASR_WIDE_ZZZ_S |
2243 | 414k | 3223360647U, // ASR_ZPmI_B |
2244 | 414k | 3223377031U, // ASR_ZPmI_D |
2245 | 414k | 3519091847U, // ASR_ZPmI_H |
2246 | 414k | 3223409799U, // ASR_ZPmI_S |
2247 | 414k | 3223360647U, // ASR_ZPmZ_B |
2248 | 414k | 3223377031U, // ASR_ZPmZ_D |
2249 | 414k | 3519091847U, // ASR_ZPmZ_H |
2250 | 414k | 3223409799U, // ASR_ZPmZ_S |
2251 | 414k | 3760231559U, // ASR_ZZI_B |
2252 | 414k | 2418070663U, // ASR_ZZI_D |
2253 | 414k | 2179011719U, // ASR_ZZI_H |
2254 | 414k | 4028716167U, // ASR_ZZI_S |
2255 | 414k | 270746281U, // AUTDA |
2256 | 414k | 270746855U, // AUTDB |
2257 | 414k | 213937U, // AUTDZA |
2258 | 414k | 215248U, // AUTDZB |
2259 | 414k | 270746309U, // AUTIA |
2260 | 414k | 7234U, // AUTIA1716 |
2261 | 414k | 7313U, // AUTIASP |
2262 | 414k | 7304U, // AUTIAZ |
2263 | 414k | 270746882U, // AUTIB |
2264 | 414k | 7243U, // AUTIB1716 |
2265 | 414k | 7225U, // AUTIBSP |
2266 | 414k | 7216U, // AUTIBZ |
2267 | 414k | 213953U, // AUTIZA |
2268 | 414k | 215264U, // AUTIZB |
2269 | 414k | 8615U, // AXFLAG |
2270 | 414k | 230348U, // B |
2271 | 414k | 543267509U, // BCAX |
2272 | 414k | 2418072245U, // BCAX_ZZZZ |
2273 | 414k | 252846U, // BCcc |
2274 | 414k | 3760231064U, // BDEP_ZZZ_B |
2275 | 414k | 2418070168U, // BDEP_ZZZ_D |
2276 | 414k | 2179011224U, // BDEP_ZZZ_H |
2277 | 414k | 4028715672U, // BDEP_ZZZ_S |
2278 | 414k | 3760232586U, // BEXT_ZZZ_B |
2279 | 414k | 2418071690U, // BEXT_ZZZ_D |
2280 | 414k | 2179012746U, // BEXT_ZZZ_H |
2281 | 414k | 4028717194U, // BEXT_ZZZ_S |
2282 | 414k | 2961315868U, // BF16DOTlanev4bf16 |
2283 | 414k | 2967607324U, // BF16DOTlanev8bf16 |
2284 | 414k | 807426147U, // BFCVT |
2285 | 414k | 549556712U, // BFCVTN |
2286 | 414k | 2969698720U, // BFCVTN2 |
2287 | 414k | 541136854U, // BFCVTNT_ZPmZ |
2288 | 414k | 541136995U, // BFCVT_ZPmZ |
2289 | 414k | 2686539804U, // BFDOT_ZZI |
2290 | 414k | 2686539804U, // BFDOT_ZZZ |
2291 | 414k | 2961315868U, // BFDOTv4bf16 |
2292 | 414k | 2967607324U, // BFDOTv8bf16 |
2293 | 414k | 2967602483U, // BFMLALB |
2294 | 414k | 2967602483U, // BFMLALBIdx |
2295 | 414k | 2967606976U, // BFMLALT |
2296 | 414k | 2967606976U, // BFMLALTIdx |
2297 | 414k | 2967601887U, // BFMMLA |
2298 | 414k | 2686534963U, // BFMMLA_B_ZZI |
2299 | 414k | 2686534963U, // BFMMLA_B_ZZZ |
2300 | 414k | 2686539456U, // BFMMLA_T_ZZI |
2301 | 414k | 2686539456U, // BFMMLA_T_ZZZ |
2302 | 414k | 2686534367U, // BFMMLA_ZZZ |
2303 | 414k | 270553387U, // BFMWri |
2304 | 414k | 270553387U, // BFMXri |
2305 | 414k | 3760231194U, // BGRP_ZZZ_B |
2306 | 414k | 2418070298U, // BGRP_ZZZ_D |
2307 | 414k | 2179011354U, // BGRP_ZZZ_H |
2308 | 414k | 4028715802U, // BGRP_ZZZ_S |
2309 | 414k | 807425360U, // BICSWrs |
2310 | 414k | 807425360U, // BICSXrs |
2311 | 414k | 3223360848U, // BICS_PPzPP |
2312 | 414k | 807422201U, // BICWrs |
2313 | 414k | 807422201U, // BICXrs |
2314 | 414k | 3223357689U, // BIC_PPzPP |
2315 | 414k | 3223357689U, // BIC_ZPmZ_B |
2316 | 414k | 3223374073U, // BIC_ZPmZ_D |
2317 | 414k | 3519088889U, // BIC_ZPmZ_H |
2318 | 414k | 3223406841U, // BIC_ZPmZ_S |
2319 | 414k | 2418067705U, // BIC_ZZZ |
2320 | 414k | 543262969U, // BICv16i8 |
2321 | 414k | 813828345U, // BICv2i32 |
2322 | 414k | 818022649U, // BICv4i16 |
2323 | 414k | 820119801U, // BICv4i32 |
2324 | 414k | 822216953U, // BICv8i16 |
2325 | 414k | 555845881U, // BICv8i8 |
2326 | 414k | 2959215356U, // BIFv16i8 |
2327 | 414k | 2971798268U, // BIFv8i8 |
2328 | 414k | 2959218331U, // BITv16i8 |
2329 | 414k | 2971801243U, // BITv8i8 |
2330 | 414k | 233372U, // BL |
2331 | 414k | 21517U, // BLR |
2332 | 414k | 807420544U, // BLRAA |
2333 | 414k | 23358U, // BLRAAZ |
2334 | 414k | 807421042U, // BLRAB |
2335 | 414k | 23373U, // BLRABZ |
2336 | 414k | 21431U, // BR |
2337 | 414k | 807420531U, // BRAA |
2338 | 414k | 23351U, // BRAAZ |
2339 | 414k | 807421029U, // BRAB |
2340 | 414k | 23366U, // BRABZ |
2341 | 414k | 8644U, // BRB_IALL |
2342 | 414k | 8622U, // BRB_INJ |
2343 | 414k | 265986U, // BRK |
2344 | 414k | 3223360779U, // BRKAS_PPzP |
2345 | 414k | 2130636U, // BRKA_PPmP |
2346 | 414k | 3223356108U, // BRKA_PPzP |
2347 | 414k | 3223360815U, // BRKBS_PPzP |
2348 | 414k | 2131209U, // BRKB_PPmP |
2349 | 414k | 3223356681U, // BRKB_PPzP |
2350 | 414k | 3223360944U, // BRKNS_PPzP |
2351 | 414k | 3223359912U, // BRKN_PPzP |
2352 | 414k | 3223360786U, // BRKPAS_PPzPP |
2353 | 414k | 3223356175U, // BRKPA_PPzPP |
2354 | 414k | 3223360822U, // BRKPBS_PPzPP |
2355 | 414k | 3223357207U, // BRKPB_PPzPP |
2356 | 414k | 2418069876U, // BSL1N_ZZZZ |
2357 | 414k | 2418069883U, // BSL2N_ZZZZ |
2358 | 414k | 2418069681U, // BSL_ZZZZ |
2359 | 414k | 2959216817U, // BSLv16i8 |
2360 | 414k | 2971799729U, // BSLv8i8 |
2361 | 414k | 252843U, // Bcc |
2362 | 414k | 3760228796U, // CADD_ZZI_B |
2363 | 414k | 2418067900U, // CADD_ZZI_D |
2364 | 414k | 2179008956U, // CADD_ZZI_H |
2365 | 414k | 4028713404U, // CADD_ZZI_S |
2366 | 414k | 270746763U, // CASAB |
2367 | 414k | 270748700U, // CASAH |
2368 | 414k | 270747006U, // CASALB |
2369 | 414k | 270748859U, // CASALH |
2370 | 414k | 270749559U, // CASALW |
2371 | 414k | 270749559U, // CASALX |
2372 | 414k | 270746476U, // CASAW |
2373 | 414k | 270746476U, // CASAX |
2374 | 414k | 270747618U, // CASB |
2375 | 414k | 270749244U, // CASH |
2376 | 414k | 270747212U, // CASLB |
2377 | 414k | 270748953U, // CASLH |
2378 | 414k | 270749866U, // CASLW |
2379 | 414k | 270749866U, // CASLX |
2380 | 414k | 282454U, // CASPALW |
2381 | 414k | 298838U, // CASPALX |
2382 | 414k | 279342U, // CASPAW |
2383 | 414k | 295726U, // CASPAX |
2384 | 414k | 282765U, // CASPLW |
2385 | 414k | 299149U, // CASPLX |
2386 | 414k | 283424U, // CASPW |
2387 | 414k | 299808U, // CASPX |
2388 | 414k | 270750982U, // CASW |
2389 | 414k | 270750982U, // CASX |
2390 | 414k | 1075862372U, // CBNZW |
2391 | 414k | 1075862372U, // CBNZX |
2392 | 414k | 1075862357U, // CBZW |
2393 | 414k | 1075862357U, // CBZX |
2394 | 414k | 807424430U, // CCMNWi |
2395 | 414k | 807424430U, // CCMNWr |
2396 | 414k | 807424430U, // CCMNXi |
2397 | 414k | 807424430U, // CCMNXr |
2398 | 414k | 807424725U, // CCMPWi |
2399 | 414k | 807424725U, // CCMPWr |
2400 | 414k | 807424725U, // CCMPXi |
2401 | 414k | 807424725U, // CCMPXr |
2402 | 414k | 2686507030U, // CDOT_ZZZI_D |
2403 | 414k | 1344362518U, // CDOT_ZZZI_S |
2404 | 414k | 2686507030U, // CDOT_ZZZ_D |
2405 | 414k | 1344362518U, // CDOT_ZZZ_S |
2406 | 414k | 8678U, // CFINV |
2407 | 414k | 3223339906U, // CLASTA_RPZ_B |
2408 | 414k | 3223339906U, // CLASTA_RPZ_D |
2409 | 414k | 3223339906U, // CLASTA_RPZ_H |
2410 | 414k | 3223339906U, // CLASTA_RPZ_S |
2411 | 414k | 3223339906U, // CLASTA_VPZ_B |
2412 | 414k | 3223339906U, // CLASTA_VPZ_D |
2413 | 414k | 3223339906U, // CLASTA_VPZ_H |
2414 | 414k | 3223339906U, // CLASTA_VPZ_S |
2415 | 414k | 3223356290U, // CLASTA_ZPZ_B |
2416 | 414k | 3223372674U, // CLASTA_ZPZ_D |
2417 | 414k | 2176910210U, // CLASTA_ZPZ_H |
2418 | 414k | 3223405442U, // CLASTA_ZPZ_S |
2419 | 414k | 3223341131U, // CLASTB_RPZ_B |
2420 | 414k | 3223341131U, // CLASTB_RPZ_D |
2421 | 414k | 3223341131U, // CLASTB_RPZ_H |
2422 | 414k | 3223341131U, // CLASTB_RPZ_S |
2423 | 414k | 3223341131U, // CLASTB_VPZ_B |
2424 | 414k | 3223341131U, // CLASTB_VPZ_D |
2425 | 414k | 3223341131U, // CLASTB_VPZ_H |
2426 | 414k | 3223341131U, // CLASTB_VPZ_S |
2427 | 414k | 3223357515U, // CLASTB_ZPZ_B |
2428 | 414k | 3223373899U, // CLASTB_ZPZ_D |
2429 | 414k | 2176911435U, // CLASTB_ZPZ_H |
2430 | 414k | 3223406667U, // CLASTB_ZPZ_S |
2431 | 414k | 23270U, // CLREX |
2432 | 414k | 807425409U, // CLSWr |
2433 | 414k | 807425409U, // CLSXr |
2434 | 414k | 2135425U, // CLS_ZPmZ_B |
2435 | 414k | 2151809U, // CLS_ZPmZ_D |
2436 | 414k | 272700801U, // CLS_ZPmZ_H |
2437 | 414k | 2184577U, // CLS_ZPmZ_S |
2438 | 414k | 543266177U, // CLSv16i8 |
2439 | 414k | 545363329U, // CLSv2i32 |
2440 | 414k | 549557633U, // CLSv4i16 |
2441 | 414k | 551654785U, // CLSv4i32 |
2442 | 414k | 553751937U, // CLSv8i16 |
2443 | 414k | 555849089U, // CLSv8i8 |
2444 | 414k | 807426911U, // CLZWr |
2445 | 414k | 807426911U, // CLZXr |
2446 | 414k | 2136927U, // CLZ_ZPmZ_B |
2447 | 414k | 2153311U, // CLZ_ZPmZ_D |
2448 | 414k | 272702303U, // CLZ_ZPmZ_H |
2449 | 414k | 2186079U, // CLZ_ZPmZ_S |
2450 | 414k | 543267679U, // CLZv16i8 |
2451 | 414k | 545364831U, // CLZv2i32 |
2452 | 414k | 549559135U, // CLZv4i16 |
2453 | 414k | 551656287U, // CLZv4i32 |
2454 | 414k | 553753439U, // CLZv8i16 |
2455 | 414k | 555850591U, // CLZv8i8 |
2456 | 414k | 543265652U, // CMEQv16i8 |
2457 | 414k | 543265652U, // CMEQv16i8rz |
2458 | 414k | 807424884U, // CMEQv1i64 |
2459 | 414k | 807424884U, // CMEQv1i64rz |
2460 | 414k | 545362804U, // CMEQv2i32 |
2461 | 414k | 545362804U, // CMEQv2i32rz |
2462 | 414k | 547459956U, // CMEQv2i64 |
2463 | 414k | 547459956U, // CMEQv2i64rz |
2464 | 414k | 549557108U, // CMEQv4i16 |
2465 | 414k | 549557108U, // CMEQv4i16rz |
2466 | 414k | 551654260U, // CMEQv4i32 |
2467 | 414k | 551654260U, // CMEQv4i32rz |
2468 | 414k | 553751412U, // CMEQv8i16 |
2469 | 414k | 553751412U, // CMEQv8i16rz |
2470 | 414k | 555848564U, // CMEQv8i8 |
2471 | 414k | 555848564U, // CMEQv8i8rz |
2472 | 414k | 543263342U, // CMGEv16i8 |
2473 | 414k | 543263342U, // CMGEv16i8rz |
2474 | 414k | 807422574U, // CMGEv1i64 |
2475 | 414k | 807422574U, // CMGEv1i64rz |
2476 | 414k | 545360494U, // CMGEv2i32 |
2477 | 414k | 545360494U, // CMGEv2i32rz |
2478 | 414k | 547457646U, // CMGEv2i64 |
2479 | 414k | 547457646U, // CMGEv2i64rz |
2480 | 414k | 549554798U, // CMGEv4i16 |
2481 | 414k | 549554798U, // CMGEv4i16rz |
2482 | 414k | 551651950U, // CMGEv4i32 |
2483 | 414k | 551651950U, // CMGEv4i32rz |
2484 | 414k | 553749102U, // CMGEv8i16 |
2485 | 414k | 553749102U, // CMGEv8i16rz |
2486 | 414k | 555846254U, // CMGEv8i8 |
2487 | 414k | 555846254U, // CMGEv8i8rz |
2488 | 414k | 543266445U, // CMGTv16i8 |
2489 | 414k | 543266445U, // CMGTv16i8rz |
2490 | 414k | 807425677U, // CMGTv1i64 |
2491 | 414k | 807425677U, // CMGTv1i64rz |
2492 | 414k | 545363597U, // CMGTv2i32 |
2493 | 414k | 545363597U, // CMGTv2i32rz |
2494 | 414k | 547460749U, // CMGTv2i64 |
2495 | 414k | 547460749U, // CMGTv2i64rz |
2496 | 414k | 549557901U, // CMGTv4i16 |
2497 | 414k | 549557901U, // CMGTv4i16rz |
2498 | 414k | 551655053U, // CMGTv4i32 |
2499 | 414k | 551655053U, // CMGTv4i32rz |
2500 | 414k | 553752205U, // CMGTv8i16 |
2501 | 414k | 553752205U, // CMGTv8i16rz |
2502 | 414k | 555849357U, // CMGTv8i8 |
2503 | 414k | 555849357U, // CMGTv8i8rz |
2504 | 414k | 543264466U, // CMHIv16i8 |
2505 | 414k | 807423698U, // CMHIv1i64 |
2506 | 414k | 545361618U, // CMHIv2i32 |
2507 | 414k | 547458770U, // CMHIv2i64 |
2508 | 414k | 549555922U, // CMHIv4i16 |
2509 | 414k | 551653074U, // CMHIv4i32 |
2510 | 414k | 553750226U, // CMHIv8i16 |
2511 | 414k | 555847378U, // CMHIv8i8 |
2512 | 414k | 543266164U, // CMHSv16i8 |
2513 | 414k | 807425396U, // CMHSv1i64 |
2514 | 414k | 545363316U, // CMHSv2i32 |
2515 | 414k | 547460468U, // CMHSv2i64 |
2516 | 414k | 549557620U, // CMHSv4i16 |
2517 | 414k | 551654772U, // CMHSv4i32 |
2518 | 414k | 553751924U, // CMHSv8i16 |
2519 | 414k | 555849076U, // CMHSv8i8 |
2520 | 414k | 2185298643U, // CMLA_ZZZI_H |
2521 | 414k | 1344357075U, // CMLA_ZZZI_S |
2522 | 414k | 1344307923U, // CMLA_ZZZ_B |
2523 | 414k | 1075888851U, // CMLA_ZZZ_D |
2524 | 414k | 2185298643U, // CMLA_ZZZ_H |
2525 | 414k | 1344357075U, // CMLA_ZZZ_S |
2526 | 414k | 543263373U, // CMLEv16i8rz |
2527 | 414k | 807422605U, // CMLEv1i64rz |
2528 | 414k | 545360525U, // CMLEv2i32rz |
2529 | 414k | 547457677U, // CMLEv2i64rz |
2530 | 414k | 549554829U, // CMLEv4i16rz |
2531 | 414k | 551651981U, // CMLEv4i32rz |
2532 | 414k | 553749133U, // CMLEv8i16rz |
2533 | 414k | 555846285U, // CMLEv8i8rz |
2534 | 414k | 543266648U, // CMLTv16i8rz |
2535 | 414k | 807425880U, // CMLTv1i64rz |
2536 | 414k | 545363800U, // CMLTv2i32rz |
2537 | 414k | 547460952U, // CMLTv2i64rz |
2538 | 414k | 549558104U, // CMLTv4i16rz |
2539 | 414k | 551655256U, // CMLTv4i32rz |
2540 | 414k | 553752408U, // CMLTv8i16rz |
2541 | 414k | 555849560U, // CMLTv8i8rz |
2542 | 414k | 3223360387U, // CMPEQ_PPzZI_B |
2543 | 414k | 3223376771U, // CMPEQ_PPzZI_D |
2544 | 414k | 1640043395U, // CMPEQ_PPzZI_H |
2545 | 414k | 3223409539U, // CMPEQ_PPzZI_S |
2546 | 414k | 3223360387U, // CMPEQ_PPzZZ_B |
2547 | 414k | 3223376771U, // CMPEQ_PPzZZ_D |
2548 | 414k | 1640043395U, // CMPEQ_PPzZZ_H |
2549 | 414k | 3223409539U, // CMPEQ_PPzZZ_S |
2550 | 414k | 3223360387U, // CMPEQ_WIDE_PPzZZ_B |
2551 | 414k | 1640043395U, // CMPEQ_WIDE_PPzZZ_H |
2552 | 414k | 3223409539U, // CMPEQ_WIDE_PPzZZ_S |
2553 | 414k | 3223358068U, // CMPGE_PPzZI_B |
2554 | 414k | 3223374452U, // CMPGE_PPzZI_D |
2555 | 414k | 1640041076U, // CMPGE_PPzZI_H |
2556 | 414k | 3223407220U, // CMPGE_PPzZI_S |
2557 | 414k | 3223358068U, // CMPGE_PPzZZ_B |
2558 | 414k | 3223374452U, // CMPGE_PPzZZ_D |
2559 | 414k | 1640041076U, // CMPGE_PPzZZ_H |
2560 | 414k | 3223407220U, // CMPGE_PPzZZ_S |
2561 | 414k | 3223358068U, // CMPGE_WIDE_PPzZZ_B |
2562 | 414k | 1640041076U, // CMPGE_WIDE_PPzZZ_H |
2563 | 414k | 3223407220U, // CMPGE_WIDE_PPzZZ_S |
2564 | 414k | 3223361171U, // CMPGT_PPzZI_B |
2565 | 414k | 3223377555U, // CMPGT_PPzZI_D |
2566 | 414k | 1640044179U, // CMPGT_PPzZI_H |
2567 | 414k | 3223410323U, // CMPGT_PPzZI_S |
2568 | 414k | 3223361171U, // CMPGT_PPzZZ_B |
2569 | 414k | 3223377555U, // CMPGT_PPzZZ_D |
2570 | 414k | 1640044179U, // CMPGT_PPzZZ_H |
2571 | 414k | 3223410323U, // CMPGT_PPzZZ_S |
2572 | 414k | 3223361171U, // CMPGT_WIDE_PPzZZ_B |
2573 | 414k | 1640044179U, // CMPGT_WIDE_PPzZZ_H |
2574 | 414k | 3223410323U, // CMPGT_WIDE_PPzZZ_S |
2575 | 414k | 3223359192U, // CMPHI_PPzZI_B |
2576 | 414k | 3223375576U, // CMPHI_PPzZI_D |
2577 | 414k | 1640042200U, // CMPHI_PPzZI_H |
2578 | 414k | 3223408344U, // CMPHI_PPzZI_S |
2579 | 414k | 3223359192U, // CMPHI_PPzZZ_B |
2580 | 414k | 3223375576U, // CMPHI_PPzZZ_D |
2581 | 414k | 1640042200U, // CMPHI_PPzZZ_H |
2582 | 414k | 3223408344U, // CMPHI_PPzZZ_S |
2583 | 414k | 3223359192U, // CMPHI_WIDE_PPzZZ_B |
2584 | 414k | 1640042200U, // CMPHI_WIDE_PPzZZ_H |
2585 | 414k | 3223408344U, // CMPHI_WIDE_PPzZZ_S |
2586 | 414k | 3223360890U, // CMPHS_PPzZI_B |
2587 | 414k | 3223377274U, // CMPHS_PPzZI_D |
2588 | 414k | 1640043898U, // CMPHS_PPzZI_H |
2589 | 414k | 3223410042U, // CMPHS_PPzZI_S |
2590 | 414k | 3223360890U, // CMPHS_PPzZZ_B |
2591 | 414k | 3223377274U, // CMPHS_PPzZZ_D |
2592 | 414k | 1640043898U, // CMPHS_PPzZZ_H |
2593 | 414k | 3223410042U, // CMPHS_PPzZZ_S |
2594 | 414k | 3223360890U, // CMPHS_WIDE_PPzZZ_B |
2595 | 414k | 1640043898U, // CMPHS_WIDE_PPzZZ_H |
2596 | 414k | 3223410042U, // CMPHS_WIDE_PPzZZ_S |
2597 | 414k | 3223358099U, // CMPLE_PPzZI_B |
2598 | 414k | 3223374483U, // CMPLE_PPzZI_D |
2599 | 414k | 1640041107U, // CMPLE_PPzZI_H |
2600 | 414k | 3223407251U, // CMPLE_PPzZI_S |
2601 | 414k | 3223358099U, // CMPLE_WIDE_PPzZZ_B |
2602 | 414k | 1640041107U, // CMPLE_WIDE_PPzZZ_H |
2603 | 414k | 3223407251U, // CMPLE_WIDE_PPzZZ_S |
2604 | 414k | 3223360075U, // CMPLO_PPzZI_B |
2605 | 414k | 3223376459U, // CMPLO_PPzZI_D |
2606 | 414k | 1640043083U, // CMPLO_PPzZI_H |
2607 | 414k | 3223409227U, // CMPLO_PPzZI_S |
2608 | 414k | 3223360075U, // CMPLO_WIDE_PPzZZ_B |
2609 | 414k | 1640043083U, // CMPLO_WIDE_PPzZZ_H |
2610 | 414k | 3223409227U, // CMPLO_WIDE_PPzZZ_S |
2611 | 414k | 3223360924U, // CMPLS_PPzZI_B |
2612 | 414k | 3223377308U, // CMPLS_PPzZI_D |
2613 | 414k | 1640043932U, // CMPLS_PPzZI_H |
2614 | 414k | 3223410076U, // CMPLS_PPzZI_S |
2615 | 414k | 3223360924U, // CMPLS_WIDE_PPzZZ_B |
2616 | 414k | 1640043932U, // CMPLS_WIDE_PPzZZ_H |
2617 | 414k | 3223410076U, // CMPLS_WIDE_PPzZZ_S |
2618 | 414k | 3223361374U, // CMPLT_PPzZI_B |
2619 | 414k | 3223377758U, // CMPLT_PPzZI_D |
2620 | 414k | 1640044382U, // CMPLT_PPzZI_H |
2621 | 414k | 3223410526U, // CMPLT_PPzZI_S |
2622 | 414k | 3223361374U, // CMPLT_WIDE_PPzZZ_B |
2623 | 414k | 1640044382U, // CMPLT_WIDE_PPzZZ_H |
2624 | 414k | 3223410526U, // CMPLT_WIDE_PPzZZ_S |
2625 | 414k | 3223358122U, // CMPNE_PPzZI_B |
2626 | 414k | 3223374506U, // CMPNE_PPzZI_D |
2627 | 414k | 1640041130U, // CMPNE_PPzZI_H |
2628 | 414k | 3223407274U, // CMPNE_PPzZI_S |
2629 | 414k | 3223358122U, // CMPNE_PPzZZ_B |
2630 | 414k | 3223374506U, // CMPNE_PPzZZ_D |
2631 | 414k | 1640041130U, // CMPNE_PPzZZ_H |
2632 | 414k | 3223407274U, // CMPNE_PPzZZ_S |
2633 | 414k | 3223358122U, // CMPNE_WIDE_PPzZZ_B |
2634 | 414k | 1640041130U, // CMPNE_WIDE_PPzZZ_H |
2635 | 414k | 3223407274U, // CMPNE_WIDE_PPzZZ_S |
2636 | 414k | 543266908U, // CMTSTv16i8 |
2637 | 414k | 807426140U, // CMTSTv1i64 |
2638 | 414k | 545364060U, // CMTSTv2i32 |
2639 | 414k | 547461212U, // CMTSTv2i64 |
2640 | 414k | 549558364U, // CMTSTv4i16 |
2641 | 414k | 551655516U, // CMTSTv4i32 |
2642 | 414k | 553752668U, // CMTSTv8i16 |
2643 | 414k | 555849820U, // CMTSTv8i8 |
2644 | 414k | 2136113U, // CNOT_ZPmZ_B |
2645 | 414k | 2152497U, // CNOT_ZPmZ_D |
2646 | 414k | 272701489U, // CNOT_ZPmZ_H |
2647 | 414k | 2185265U, // CNOT_ZPmZ_S |
2648 | 414k | 1881163838U, // CNTB_XPiI |
2649 | 414k | 1881164355U, // CNTD_XPiI |
2650 | 414k | 1881165437U, // CNTH_XPiI |
2651 | 414k | 3223343910U, // CNTP_XPP_B |
2652 | 414k | 3223343910U, // CNTP_XPP_D |
2653 | 414k | 3223343910U, // CNTP_XPP_H |
2654 | 414k | 3223343910U, // CNTP_XPP_S |
2655 | 414k | 1881168513U, // CNTW_XPiI |
2656 | 414k | 2135955U, // CNT_ZPmZ_B |
2657 | 414k | 2152339U, // CNT_ZPmZ_D |
2658 | 414k | 272701331U, // CNT_ZPmZ_H |
2659 | 414k | 2185107U, // CNT_ZPmZ_S |
2660 | 414k | 543266707U, // CNTv16i8 |
2661 | 414k | 555849619U, // CNTv8i8 |
2662 | 414k | 3223377505U, // COMPACT_ZPZ_D |
2663 | 414k | 3223410273U, // COMPACT_ZPZ_S |
2664 | 414k | 318746U, // CPYE |
2665 | 414k | 318809U, // CPYEN |
2666 | 414k | 318895U, // CPYERN |
2667 | 414k | 319783U, // CPYERT |
2668 | 414k | 319268U, // CPYERTN |
2669 | 414k | 319017U, // CPYERTRN |
2670 | 414k | 319515U, // CPYERTWN |
2671 | 414k | 319697U, // CPYET |
2672 | 414k | 319172U, // CPYETN |
2673 | 414k | 318953U, // CPYETRN |
2674 | 414k | 319451U, // CPYETWN |
2675 | 414k | 319393U, // CPYEWN |
2676 | 414k | 319840U, // CPYEWT |
2677 | 414k | 319331U, // CPYEWTN |
2678 | 414k | 319086U, // CPYEWTRN |
2679 | 414k | 319584U, // CPYEWTWN |
2680 | 414k | 318723U, // CPYFE |
2681 | 414k | 318783U, // CPYFEN |
2682 | 414k | 318885U, // CPYFERN |
2683 | 414k | 319773U, // CPYFERT |
2684 | 414k | 319257U, // CPYFERTN |
2685 | 414k | 319005U, // CPYFERTRN |
2686 | 414k | 319503U, // CPYFERTWN |
2687 | 414k | 319671U, // CPYFET |
2688 | 414k | 319143U, // CPYFETN |
2689 | 414k | 318942U, // CPYFETRN |
2690 | 414k | 319440U, // CPYFETWN |
2691 | 414k | 319383U, // CPYFEWN |
2692 | 414k | 319830U, // CPYFEWT |
2693 | 414k | 319320U, // CPYFEWTN |
2694 | 414k | 319074U, // CPYFEWTRN |
2695 | 414k | 319572U, // CPYFEWTWN |
2696 | 414k | 318753U, // CPYFM |
2697 | 414k | 318817U, // CPYFMN |
2698 | 414k | 318904U, // CPYFMRN |
2699 | 414k | 319792U, // CPYFMRT |
2700 | 414k | 319278U, // CPYFMRTN |
2701 | 414k | 319028U, // CPYFMRTRN |
2702 | 414k | 319526U, // CPYFMRTWN |
2703 | 414k | 319705U, // CPYFMT |
2704 | 414k | 319181U, // CPYFMTN |
2705 | 414k | 318963U, // CPYFMTRN |
2706 | 414k | 319461U, // CPYFMTWN |
2707 | 414k | 319402U, // CPYFMWN |
2708 | 414k | 319849U, // CPYFMWT |
2709 | 414k | 319341U, // CPYFMWTN |
2710 | 414k | 319097U, // CPYFMWTRN |
2711 | 414k | 319595U, // CPYFMWTWN |
2712 | 414k | 319641U, // CPYFP |
2713 | 414k | 318851U, // CPYFPN |
2714 | 414k | 318923U, // CPYFPRN |
2715 | 414k | 319811U, // CPYFPRT |
2716 | 414k | 319299U, // CPYFPRTN |
2717 | 414k | 319051U, // CPYFPRTRN |
2718 | 414k | 319549U, // CPYFPRTWN |
2719 | 414k | 319739U, // CPYFPT |
2720 | 414k | 319219U, // CPYFPTN |
2721 | 414k | 318984U, // CPYFPTRN |
2722 | 414k | 319482U, // CPYFPTWN |
2723 | 414k | 319421U, // CPYFPWN |
2724 | 414k | 319868U, // CPYFPWT |
2725 | 414k | 319362U, // CPYFPWTN |
2726 | 414k | 319120U, // CPYFPWTRN |
2727 | 414k | 319618U, // CPYFPWTWN |
2728 | 414k | 318776U, // CPYM |
2729 | 414k | 318843U, // CPYMN |
2730 | 414k | 318914U, // CPYMRN |
2731 | 414k | 319802U, // CPYMRT |
2732 | 414k | 319289U, // CPYMRTN |
2733 | 414k | 319040U, // CPYMRTRN |
2734 | 414k | 319538U, // CPYMRTWN |
2735 | 414k | 319731U, // CPYMT |
2736 | 414k | 319210U, // CPYMTN |
2737 | 414k | 318974U, // CPYMTRN |
2738 | 414k | 319472U, // CPYMTWN |
2739 | 414k | 319412U, // CPYMWN |
2740 | 414k | 319859U, // CPYMWT |
2741 | 414k | 319352U, // CPYMWTN |
2742 | 414k | 319109U, // CPYMWTRN |
2743 | 414k | 319607U, // CPYMWTWN |
2744 | 414k | 319664U, // CPYP |
2745 | 414k | 318877U, // CPYPN |
2746 | 414k | 318933U, // CPYPRN |
2747 | 414k | 319821U, // CPYPRT |
2748 | 414k | 319310U, // CPYPRTN |
2749 | 414k | 319063U, // CPYPRTRN |
2750 | 414k | 319561U, // CPYPRTWN |
2751 | 414k | 319765U, // CPYPT |
2752 | 414k | 319248U, // CPYPTN |
2753 | 414k | 318995U, // CPYPTRN |
2754 | 414k | 319493U, // CPYPTWN |
2755 | 414k | 319431U, // CPYPWN |
2756 | 414k | 319878U, // CPYPWT |
2757 | 414k | 319373U, // CPYPWTN |
2758 | 414k | 319132U, // CPYPWTRN |
2759 | 414k | 319630U, // CPYPWTWN |
2760 | 414k | 2136862U, // CPY_ZPmI_B |
2761 | 414k | 2153246U, // CPY_ZPmI_D |
2762 | 414k | 2151750430U, // CPY_ZPmI_H |
2763 | 414k | 2186014U, // CPY_ZPmI_S |
2764 | 414k | 2136862U, // CPY_ZPmR_B |
2765 | 414k | 2153246U, // CPY_ZPmR_D |
2766 | 414k | 2420185886U, // CPY_ZPmR_H |
2767 | 414k | 2186014U, // CPY_ZPmR_S |
2768 | 414k | 2136862U, // CPY_ZPmV_B |
2769 | 414k | 2153246U, // CPY_ZPmV_D |
2770 | 414k | 2420185886U, // CPY_ZPmV_H |
2771 | 414k | 2186014U, // CPY_ZPmV_S |
2772 | 414k | 3223362334U, // CPY_ZPzI_B |
2773 | 414k | 3223378718U, // CPY_ZPzI_D |
2774 | 414k | 1640045342U, // CPY_ZPzI_H |
2775 | 414k | 3223411486U, // CPY_ZPzI_S |
2776 | 414k | 807420926U, // CRC32Brr |
2777 | 414k | 807421103U, // CRC32CBrr |
2778 | 414k | 807423040U, // CRC32CHrr |
2779 | 414k | 807426514U, // CRC32CWrr |
2780 | 414k | 807426774U, // CRC32CXrr |
2781 | 414k | 807422876U, // CRC32Hrr |
2782 | 414k | 807426456U, // CRC32Wrr |
2783 | 414k | 807426713U, // CRC32Xrr |
2784 | 414k | 807423996U, // CSELWr |
2785 | 414k | 807423996U, // CSELXr |
2786 | 414k | 807422221U, // CSINCWr |
2787 | 414k | 807422221U, // CSINCXr |
2788 | 414k | 807426360U, // CSINVWr |
2789 | 414k | 807426360U, // CSINVXr |
2790 | 414k | 807422784U, // CSNEGWr |
2791 | 414k | 807422784U, // CSNEGXr |
2792 | 414k | 807424890U, // CTERMEQ_WW |
2793 | 414k | 807424890U, // CTERMEQ_XX |
2794 | 414k | 807422625U, // CTERMNE_WW |
2795 | 414k | 807422625U, // CTERMNE_XX |
2796 | 414k | 262208U, // DCPS1 |
2797 | 414k | 262636U, // DCPS2 |
2798 | 414k | 262702U, // DCPS3 |
2799 | 414k | 2686469306U, // DECB_XPiI |
2800 | 414k | 2686470557U, // DECD_XPiI |
2801 | 414k | 2686503325U, // DECD_ZPiI |
2802 | 414k | 2686471243U, // DECH_XPiI |
2803 | 414k | 39914571U, // DECH_ZPiI |
2804 | 414k | 3760214638U, // DECP_XP_B |
2805 | 414k | 2418037358U, // DECP_XP_D |
2806 | 414k | 1881166446U, // DECP_XP_H |
2807 | 414k | 4028650094U, // DECP_XP_S |
2808 | 414k | 1075892846U, // DECP_ZP_D |
2809 | 414k | 1648431726U, // DECP_ZP_H |
2810 | 414k | 1344361070U, // DECP_ZP_S |
2811 | 414k | 2686474717U, // DECW_XPiI |
2812 | 414k | 2686540253U, // DECW_ZPiI |
2813 | 414k | 329362U, // DMB |
2814 | 414k | 8660U, // DRPS |
2815 | 414k | 329704U, // DSB |
2816 | 414k | 346088U, // DSBnXS |
2817 | 414k | 2954940767U, // DUPM_ZI |
2818 | 414k | 3223360314U, // DUP_ZI_B |
2819 | 414k | 3491812154U, // DUP_ZI_D |
2820 | 414k | 42013498U, // DUP_ZI_H |
2821 | 414k | 3760280378U, // DUP_ZI_S |
2822 | 414k | 807441210U, // DUP_ZR_B |
2823 | 414k | 807457594U, // DUP_ZR_D |
2824 | 414k | 1654723386U, // DUP_ZR_H |
2825 | 414k | 807490362U, // DUP_ZR_S |
2826 | 414k | 3760231226U, // DUP_ZZI_B |
2827 | 414k | 2418070330U, // DUP_ZZI_D |
2828 | 414k | 4058059578U, // DUP_ZZI_H |
2829 | 414k | 4073034554U, // DUP_ZZI_Q |
2830 | 414k | 4028715834U, // DUP_ZZI_S |
2831 | 414k | 538990912U, // DUPi16 |
2832 | 414k | 538990912U, // DUPi32 |
2833 | 414k | 538990912U, // DUPi64 |
2834 | 414k | 538990912U, // DUPi8 |
2835 | 414k | 811701050U, // DUPv16i8gpr |
2836 | 414k | 543265594U, // DUPv16i8lane |
2837 | 414k | 813798202U, // DUPv2i32gpr |
2838 | 414k | 545362746U, // DUPv2i32lane |
2839 | 414k | 815895354U, // DUPv2i64gpr |
2840 | 414k | 547459898U, // DUPv2i64lane |
2841 | 414k | 817992506U, // DUPv4i16gpr |
2842 | 414k | 549557050U, // DUPv4i16lane |
2843 | 414k | 820089658U, // DUPv4i32gpr |
2844 | 414k | 551654202U, // DUPv4i32lane |
2845 | 414k | 822186810U, // DUPv8i16gpr |
2846 | 414k | 553751354U, // DUPv8i16lane |
2847 | 414k | 824283962U, // DUPv8i8gpr |
2848 | 414k | 555848506U, // DUPv8i8lane |
2849 | 414k | 807424436U, // EONWrs |
2850 | 414k | 807424436U, // EONXrs |
2851 | 414k | 543261224U, // EOR3 |
2852 | 414k | 2418065960U, // EOR3_ZZZZ |
2853 | 414k | 1344312922U, // EORBT_ZZZ_B |
2854 | 414k | 1075893850U, // EORBT_ZZZ_D |
2855 | 414k | 2185303642U, // EORBT_ZZZ_H |
2856 | 414k | 1344362074U, // EORBT_ZZZ_S |
2857 | 414k | 3223361025U, // EORS_PPzPP |
2858 | 414k | 1344309316U, // EORTB_ZZZ_B |
2859 | 414k | 1075890244U, // EORTB_ZZZ_D |
2860 | 414k | 2185300036U, // EORTB_ZZZ_H |
2861 | 414k | 1344358468U, // EORTB_ZZZ_S |
2862 | 414k | 153937U, // EORV_VPZ_B |
2863 | 414k | 1646434641U, // EORV_VPZ_D |
2864 | 414k | 1648548177U, // EORV_VPZ_H |
2865 | 414k | 1638078801U, // EORV_VPZ_S |
2866 | 414k | 807425120U, // EORWri |
2867 | 414k | 807425120U, // EORWrs |
2868 | 414k | 807425120U, // EORXri |
2869 | 414k | 807425120U, // EORXrs |
2870 | 414k | 3223360608U, // EOR_PPzPP |
2871 | 414k | 2418070624U, // EOR_ZI |
2872 | 414k | 3223360608U, // EOR_ZPmZ_B |
2873 | 414k | 3223376992U, // EOR_ZPmZ_D |
2874 | 414k | 3519091808U, // EOR_ZPmZ_H |
2875 | 414k | 3223409760U, // EOR_ZPmZ_S |
2876 | 414k | 2418070624U, // EOR_ZZZ |
2877 | 414k | 543265888U, // EORv16i8 |
2878 | 414k | 555848800U, // EORv8i8 |
2879 | 414k | 8665U, // ERET |
2880 | 414k | 8591U, // ERETAA |
2881 | 414k | 8598U, // ERETAB |
2882 | 414k | 3223356305U, // EXTRACT_ZPMXI_H_B |
2883 | 414k | 3223372689U, // EXTRACT_ZPMXI_H_D |
2884 | 414k | 3519087505U, // EXTRACT_ZPMXI_H_H |
2885 | 414k | 3519382417U, // EXTRACT_ZPMXI_H_Q |
2886 | 414k | 3223405457U, // EXTRACT_ZPMXI_H_S |
2887 | 414k | 3223356305U, // EXTRACT_ZPMXI_V_B |
2888 | 414k | 3223372689U, // EXTRACT_ZPMXI_V_D |
2889 | 414k | 3519087505U, // EXTRACT_ZPMXI_V_H |
2890 | 414k | 3519382417U, // EXTRACT_ZPMXI_V_Q |
2891 | 414k | 3223405457U, // EXTRACT_ZPMXI_V_S |
2892 | 414k | 807425197U, // EXTRWrri |
2893 | 414k | 807425197U, // EXTRXrri |
2894 | 414k | 3760232587U, // EXT_ZZI |
2895 | 414k | 2136203U, // EXT_ZZI_B |
2896 | 414k | 543266955U, // EXTv16i8 |
2897 | 414k | 555849867U, // EXTv8i8 |
2898 | 414k | 807422338U, // FABD16 |
2899 | 414k | 807422338U, // FABD32 |
2900 | 414k | 807422338U, // FABD64 |
2901 | 414k | 3223374210U, // FABD_ZPmZ_D |
2902 | 414k | 3519089026U, // FABD_ZPmZ_H |
2903 | 414k | 3223406978U, // FABD_ZPmZ_S |
2904 | 414k | 545360258U, // FABDv2f32 |
2905 | 414k | 547457410U, // FABDv2f64 |
2906 | 414k | 549554562U, // FABDv4f16 |
2907 | 414k | 551651714U, // FABDv4f32 |
2908 | 414k | 553748866U, // FABDv8f16 |
2909 | 414k | 807425314U, // FABSDr |
2910 | 414k | 807425314U, // FABSHr |
2911 | 414k | 807425314U, // FABSSr |
2912 | 414k | 2151714U, // FABS_ZPmZ_D |
2913 | 414k | 272700706U, // FABS_ZPmZ_H |
2914 | 414k | 2184482U, // FABS_ZPmZ_S |
2915 | 414k | 545363234U, // FABSv2f32 |
2916 | 414k | 547460386U, // FABSv2f64 |
2917 | 414k | 549557538U, // FABSv4f16 |
2918 | 414k | 551654690U, // FABSv4f32 |
2919 | 414k | 553751842U, // FABSv8f16 |
2920 | 414k | 807422557U, // FACGE16 |
2921 | 414k | 807422557U, // FACGE32 |
2922 | 414k | 807422557U, // FACGE64 |
2923 | 414k | 3223374429U, // FACGE_PPzZZ_D |
2924 | 414k | 1640041053U, // FACGE_PPzZZ_H |
2925 | 414k | 3223407197U, // FACGE_PPzZZ_S |
2926 | 414k | 545360477U, // FACGEv2f32 |
2927 | 414k | 547457629U, // FACGEv2f64 |
2928 | 414k | 549554781U, // FACGEv4f16 |
2929 | 414k | 551651933U, // FACGEv4f32 |
2930 | 414k | 553749085U, // FACGEv8f16 |
2931 | 414k | 807425660U, // FACGT16 |
2932 | 414k | 807425660U, // FACGT32 |
2933 | 414k | 807425660U, // FACGT64 |
2934 | 414k | 3223377532U, // FACGT_PPzZZ_D |
2935 | 414k | 1640044156U, // FACGT_PPzZZ_H |
2936 | 414k | 3223410300U, // FACGT_PPzZZ_S |
2937 | 414k | 545363580U, // FACGTv2f32 |
2938 | 414k | 547460732U, // FACGTv2f64 |
2939 | 414k | 549557884U, // FACGTv4f16 |
2940 | 414k | 551655036U, // FACGTv4f32 |
2941 | 414k | 553752188U, // FACGTv8f16 |
2942 | 414k | 48399010U, // FADDA_VPZ_D |
2943 | 414k | 2197996194U, // FADDA_VPZ_H |
2944 | 414k | 52626082U, // FADDA_VPZ_S |
2945 | 414k | 807422417U, // FADDDrr |
2946 | 414k | 807422417U, // FADDHrr |
2947 | 414k | 3223376524U, // FADDP_ZPmZZ_D |
2948 | 414k | 3519091340U, // FADDP_ZPmZZ_H |
2949 | 414k | 3223409292U, // FADDP_ZPmZZ_S |
2950 | 414k | 545362572U, // FADDPv2f32 |
2951 | 414k | 547459724U, // FADDPv2f64 |
2952 | 414k | 538989196U, // FADDPv2i16p |
2953 | 414k | 538989196U, // FADDPv2i32p |
2954 | 414k | 538989196U, // FADDPv2i64p |
2955 | 414k | 549556876U, // FADDPv4f16 |
2956 | 414k | 551654028U, // FADDPv4f32 |
2957 | 414k | 553751180U, // FADDPv8f16 |
2958 | 414k | 807422417U, // FADDSrr |
2959 | 414k | 1646434511U, // FADDV_VPZ_D |
2960 | 414k | 1648548047U, // FADDV_VPZ_H |
2961 | 414k | 1638078671U, // FADDV_VPZ_S |
2962 | 414k | 3223374289U, // FADD_ZPmI_D |
2963 | 414k | 3519089105U, // FADD_ZPmI_H |
2964 | 414k | 3223407057U, // FADD_ZPmI_S |
2965 | 414k | 3223374289U, // FADD_ZPmZ_D |
2966 | 414k | 3519089105U, // FADD_ZPmZ_H |
2967 | 414k | 3223407057U, // FADD_ZPmZ_S |
2968 | 414k | 2418067921U, // FADD_ZZZ_D |
2969 | 414k | 2179008977U, // FADD_ZZZ_H |
2970 | 414k | 4028713425U, // FADD_ZZZ_S |
2971 | 414k | 545360337U, // FADDv2f32 |
2972 | 414k | 547457489U, // FADDv2f64 |
2973 | 414k | 549554641U, // FADDv4f16 |
2974 | 414k | 551651793U, // FADDv4f32 |
2975 | 414k | 553748945U, // FADDv8f16 |
2976 | 414k | 3223374267U, // FCADD_ZPmZ_D |
2977 | 414k | 3519089083U, // FCADD_ZPmZ_H |
2978 | 414k | 3223407035U, // FCADD_ZPmZ_S |
2979 | 414k | 545360315U, // FCADDv2f32 |
2980 | 414k | 547457467U, // FCADDv2f64 |
2981 | 414k | 549554619U, // FCADDv4f16 |
2982 | 414k | 551651771U, // FCADDv4f32 |
2983 | 414k | 553748923U, // FCADDv8f16 |
2984 | 414k | 807424724U, // FCCMPDrr |
2985 | 414k | 807422657U, // FCCMPEDrr |
2986 | 414k | 807422657U, // FCCMPEHrr |
2987 | 414k | 807422657U, // FCCMPESrr |
2988 | 414k | 807424724U, // FCCMPHrr |
2989 | 414k | 807424724U, // FCCMPSrr |
2990 | 414k | 807424883U, // FCMEQ16 |
2991 | 414k | 807424883U, // FCMEQ32 |
2992 | 414k | 807424883U, // FCMEQ64 |
2993 | 414k | 3223376755U, // FCMEQ_PPzZ0_D |
2994 | 414k | 1640043379U, // FCMEQ_PPzZ0_H |
2995 | 414k | 3223409523U, // FCMEQ_PPzZ0_S |
2996 | 414k | 3223376755U, // FCMEQ_PPzZZ_D |
2997 | 414k | 1640043379U, // FCMEQ_PPzZZ_H |
2998 | 414k | 3223409523U, // FCMEQ_PPzZZ_S |
2999 | 414k | 807424883U, // FCMEQv1i16rz |
3000 | 414k | 807424883U, // FCMEQv1i32rz |
3001 | 414k | 807424883U, // FCMEQv1i64rz |
3002 | 414k | 545362803U, // FCMEQv2f32 |
3003 | 414k | 547459955U, // FCMEQv2f64 |
3004 | 414k | 545362803U, // FCMEQv2i32rz |
3005 | 414k | 547459955U, // FCMEQv2i64rz |
3006 | 414k | 549557107U, // FCMEQv4f16 |
3007 | 414k | 551654259U, // FCMEQv4f32 |
3008 | 414k | 549557107U, // FCMEQv4i16rz |
3009 | 414k | 551654259U, // FCMEQv4i32rz |
3010 | 414k | 553751411U, // FCMEQv8f16 |
3011 | 414k | 553751411U, // FCMEQv8i16rz |
3012 | 414k | 807422573U, // FCMGE16 |
3013 | 414k | 807422573U, // FCMGE32 |
3014 | 414k | 807422573U, // FCMGE64 |
3015 | 414k | 3223374445U, // FCMGE_PPzZ0_D |
3016 | 414k | 1640041069U, // FCMGE_PPzZ0_H |
3017 | 414k | 3223407213U, // FCMGE_PPzZ0_S |
3018 | 414k | 3223374445U, // FCMGE_PPzZZ_D |
3019 | 414k | 1640041069U, // FCMGE_PPzZZ_H |
3020 | 414k | 3223407213U, // FCMGE_PPzZZ_S |
3021 | 414k | 807422573U, // FCMGEv1i16rz |
3022 | 414k | 807422573U, // FCMGEv1i32rz |
3023 | 414k | 807422573U, // FCMGEv1i64rz |
3024 | 414k | 545360493U, // FCMGEv2f32 |
3025 | 414k | 547457645U, // FCMGEv2f64 |
3026 | 414k | 545360493U, // FCMGEv2i32rz |
3027 | 414k | 547457645U, // FCMGEv2i64rz |
3028 | 414k | 549554797U, // FCMGEv4f16 |
3029 | 414k | 551651949U, // FCMGEv4f32 |
3030 | 414k | 549554797U, // FCMGEv4i16rz |
3031 | 414k | 551651949U, // FCMGEv4i32rz |
3032 | 414k | 553749101U, // FCMGEv8f16 |
3033 | 414k | 553749101U, // FCMGEv8i16rz |
3034 | 414k | 807425676U, // FCMGT16 |
3035 | 414k | 807425676U, // FCMGT32 |
3036 | 414k | 807425676U, // FCMGT64 |
3037 | 414k | 3223377548U, // FCMGT_PPzZ0_D |
3038 | 414k | 1640044172U, // FCMGT_PPzZ0_H |
3039 | 414k | 3223410316U, // FCMGT_PPzZ0_S |
3040 | 414k | 3223377548U, // FCMGT_PPzZZ_D |
3041 | 414k | 1640044172U, // FCMGT_PPzZZ_H |
3042 | 414k | 3223410316U, // FCMGT_PPzZZ_S |
3043 | 414k | 807425676U, // FCMGTv1i16rz |
3044 | 414k | 807425676U, // FCMGTv1i32rz |
3045 | 414k | 807425676U, // FCMGTv1i64rz |
3046 | 414k | 545363596U, // FCMGTv2f32 |
3047 | 414k | 547460748U, // FCMGTv2f64 |
3048 | 414k | 545363596U, // FCMGTv2i32rz |
3049 | 414k | 547460748U, // FCMGTv2i64rz |
3050 | 414k | 549557900U, // FCMGTv4f16 |
3051 | 414k | 551655052U, // FCMGTv4f32 |
3052 | 414k | 549557900U, // FCMGTv4i16rz |
3053 | 414k | 551655052U, // FCMGTv4i32rz |
3054 | 414k | 553752204U, // FCMGTv8f16 |
3055 | 414k | 553752204U, // FCMGTv8i16rz |
3056 | 414k | 3223372498U, // FCMLA_ZPmZZ_D |
3057 | 414k | 3519087314U, // FCMLA_ZPmZZ_H |
3058 | 414k | 3223405266U, // FCMLA_ZPmZZ_S |
3059 | 414k | 2185298642U, // FCMLA_ZZZI_H |
3060 | 414k | 1344357074U, // FCMLA_ZZZI_S |
3061 | 414k | 2961310418U, // FCMLAv2f32 |
3062 | 414k | 2963407570U, // FCMLAv2f64 |
3063 | 414k | 2965504722U, // FCMLAv4f16 |
3064 | 414k | 2965504722U, // FCMLAv4f16_indexed |
3065 | 414k | 2967601874U, // FCMLAv4f32 |
3066 | 414k | 2967601874U, // FCMLAv4f32_indexed |
3067 | 414k | 2969699026U, // FCMLAv8f16 |
3068 | 414k | 2969699026U, // FCMLAv8f16_indexed |
3069 | 414k | 3223374476U, // FCMLE_PPzZ0_D |
3070 | 414k | 1640041100U, // FCMLE_PPzZ0_H |
3071 | 414k | 3223407244U, // FCMLE_PPzZ0_S |
3072 | 414k | 807422604U, // FCMLEv1i16rz |
3073 | 414k | 807422604U, // FCMLEv1i32rz |
3074 | 414k | 807422604U, // FCMLEv1i64rz |
3075 | 414k | 545360524U, // FCMLEv2i32rz |
3076 | 414k | 547457676U, // FCMLEv2i64rz |
3077 | 414k | 549554828U, // FCMLEv4i16rz |
3078 | 414k | 551651980U, // FCMLEv4i32rz |
3079 | 414k | 553749132U, // FCMLEv8i16rz |
3080 | 414k | 3223377751U, // FCMLT_PPzZ0_D |
3081 | 414k | 1640044375U, // FCMLT_PPzZ0_H |
3082 | 414k | 3223410519U, // FCMLT_PPzZ0_S |
3083 | 414k | 807425879U, // FCMLTv1i16rz |
3084 | 414k | 807425879U, // FCMLTv1i32rz |
3085 | 414k | 807425879U, // FCMLTv1i64rz |
3086 | 414k | 545363799U, // FCMLTv2i32rz |
3087 | 414k | 547460951U, // FCMLTv2i64rz |
3088 | 414k | 549558103U, // FCMLTv4i16rz |
3089 | 414k | 551655255U, // FCMLTv4i32rz |
3090 | 414k | 553752407U, // FCMLTv8i16rz |
3091 | 414k | 3223374490U, // FCMNE_PPzZ0_D |
3092 | 414k | 1640041114U, // FCMNE_PPzZ0_H |
3093 | 414k | 3223407258U, // FCMNE_PPzZ0_S |
3094 | 414k | 3223374490U, // FCMNE_PPzZZ_D |
3095 | 414k | 1640041114U, // FCMNE_PPzZZ_H |
3096 | 414k | 3223407258U, // FCMNE_PPzZZ_S |
3097 | 414k | 54547163U, // FCMPDri |
3098 | 414k | 807424731U, // FCMPDrr |
3099 | 414k | 54545097U, // FCMPEDri |
3100 | 414k | 807422665U, // FCMPEDrr |
3101 | 414k | 54545097U, // FCMPEHri |
3102 | 414k | 807422665U, // FCMPEHrr |
3103 | 414k | 54545097U, // FCMPESri |
3104 | 414k | 807422665U, // FCMPESrr |
3105 | 414k | 54547163U, // FCMPHri |
3106 | 414k | 807424731U, // FCMPHrr |
3107 | 414k | 54547163U, // FCMPSri |
3108 | 414k | 807424731U, // FCMPSrr |
3109 | 414k | 3223376472U, // FCMUO_PPzZZ_D |
3110 | 414k | 1640043096U, // FCMUO_PPzZZ_H |
3111 | 414k | 3223409240U, // FCMUO_PPzZZ_S |
3112 | 414k | 2153245U, // FCPY_ZPmI_D |
3113 | 414k | 272702237U, // FCPY_ZPmI_H |
3114 | 414k | 2186013U, // FCPY_ZPmI_S |
3115 | 414k | 807423995U, // FCSELDrrr |
3116 | 414k | 807423995U, // FCSELHrrr |
3117 | 414k | 807423995U, // FCSELSrrr |
3118 | 414k | 807425306U, // FCVTASUWDr |
3119 | 414k | 807425306U, // FCVTASUWHr |
3120 | 414k | 807425306U, // FCVTASUWSr |
3121 | 414k | 807425306U, // FCVTASUXDr |
3122 | 414k | 807425306U, // FCVTASUXHr |
3123 | 414k | 807425306U, // FCVTASUXSr |
3124 | 414k | 807425306U, // FCVTASv1f16 |
3125 | 414k | 807425306U, // FCVTASv1i32 |
3126 | 414k | 807425306U, // FCVTASv1i64 |
3127 | 414k | 545363226U, // FCVTASv2f32 |
3128 | 414k | 547460378U, // FCVTASv2f64 |
3129 | 414k | 549557530U, // FCVTASv4f16 |
3130 | 414k | 551654682U, // FCVTASv4f32 |
3131 | 414k | 553751834U, // FCVTASv8f16 |
3132 | 414k | 807426199U, // FCVTAUUWDr |
3133 | 414k | 807426199U, // FCVTAUUWHr |
3134 | 414k | 807426199U, // FCVTAUUWSr |
3135 | 414k | 807426199U, // FCVTAUUXDr |
3136 | 414k | 807426199U, // FCVTAUUXHr |
3137 | 414k | 807426199U, // FCVTAUUXSr |
3138 | 414k | 807426199U, // FCVTAUv1f16 |
3139 | 414k | 807426199U, // FCVTAUv1i32 |
3140 | 414k | 807426199U, // FCVTAUv1i64 |
3141 | 414k | 545364119U, // FCVTAUv2f32 |
3142 | 414k | 547461271U, // FCVTAUv2f64 |
3143 | 414k | 549558423U, // FCVTAUv4f16 |
3144 | 414k | 551655575U, // FCVTAUv4f32 |
3145 | 414k | 553752727U, // FCVTAUv8f16 |
3146 | 414k | 807426148U, // FCVTDHr |
3147 | 414k | 807426148U, // FCVTDSr |
3148 | 414k | 807426148U, // FCVTHDr |
3149 | 414k | 807426148U, // FCVTHSr |
3150 | 414k | 2185095U, // FCVTLT_ZPmZ_HtoS |
3151 | 414k | 2152327U, // FCVTLT_ZPmZ_StoD |
3152 | 414k | 547459298U, // FCVTLv2i32 |
3153 | 414k | 551653602U, // FCVTLv4i16 |
3154 | 414k | 547455322U, // FCVTLv4i32 |
3155 | 414k | 551649626U, // FCVTLv8i16 |
3156 | 414k | 807425443U, // FCVTMSUWDr |
3157 | 414k | 807425443U, // FCVTMSUWHr |
3158 | 414k | 807425443U, // FCVTMSUWSr |
3159 | 414k | 807425443U, // FCVTMSUXDr |
3160 | 414k | 807425443U, // FCVTMSUXHr |
3161 | 414k | 807425443U, // FCVTMSUXSr |
3162 | 414k | 807425443U, // FCVTMSv1f16 |
3163 | 414k | 807425443U, // FCVTMSv1i32 |
3164 | 414k | 807425443U, // FCVTMSv1i64 |
3165 | 414k | 545363363U, // FCVTMSv2f32 |
3166 | 414k | 547460515U, // FCVTMSv2f64 |
3167 | 414k | 549557667U, // FCVTMSv4f16 |
3168 | 414k | 551654819U, // FCVTMSv4f32 |
3169 | 414k | 553751971U, // FCVTMSv8f16 |
3170 | 414k | 807426215U, // FCVTMUUWDr |
3171 | 414k | 807426215U, // FCVTMUUWHr |
3172 | 414k | 807426215U, // FCVTMUUWSr |
3173 | 414k | 807426215U, // FCVTMUUXDr |
3174 | 414k | 807426215U, // FCVTMUUXHr |
3175 | 414k | 807426215U, // FCVTMUUXSr |
3176 | 414k | 807426215U, // FCVTMUv1f16 |
3177 | 414k | 807426215U, // FCVTMUv1i32 |
3178 | 414k | 807426215U, // FCVTMUv1i64 |
3179 | 414k | 545364135U, // FCVTMUv2f32 |
3180 | 414k | 547461287U, // FCVTMUv2f64 |
3181 | 414k | 549558439U, // FCVTMUv4f16 |
3182 | 414k | 551655591U, // FCVTMUv4f32 |
3183 | 414k | 553752743U, // FCVTMUv8f16 |
3184 | 414k | 807425469U, // FCVTNSUWDr |
3185 | 414k | 807425469U, // FCVTNSUWHr |
3186 | 414k | 807425469U, // FCVTNSUWSr |
3187 | 414k | 807425469U, // FCVTNSUXDr |
3188 | 414k | 807425469U, // FCVTNSUXHr |
3189 | 414k | 807425469U, // FCVTNSUXSr |
3190 | 414k | 807425469U, // FCVTNSv1f16 |
3191 | 414k | 807425469U, // FCVTNSv1i32 |
3192 | 414k | 807425469U, // FCVTNSv1i64 |
3193 | 414k | 545363389U, // FCVTNSv2f32 |
3194 | 414k | 547460541U, // FCVTNSv2f64 |
3195 | 414k | 549557693U, // FCVTNSv4f16 |
3196 | 414k | 551654845U, // FCVTNSv4f32 |
3197 | 414k | 553751997U, // FCVTNSv8f16 |
3198 | 414k | 2185175U, // FCVTNT_ZPmZ_DtoS |
3199 | 414k | 541136855U, // FCVTNT_ZPmZ_StoH |
3200 | 414k | 807426223U, // FCVTNUUWDr |
3201 | 414k | 807426223U, // FCVTNUUWHr |
3202 | 414k | 807426223U, // FCVTNUUWSr |
3203 | 414k | 807426223U, // FCVTNUUXDr |
3204 | 414k | 807426223U, // FCVTNUUXHr |
3205 | 414k | 807426223U, // FCVTNUUXSr |
3206 | 414k | 807426223U, // FCVTNUv1f16 |
3207 | 414k | 807426223U, // FCVTNUv1i32 |
3208 | 414k | 807426223U, // FCVTNUv1i64 |
3209 | 414k | 545364143U, // FCVTNUv2f32 |
3210 | 414k | 547461295U, // FCVTNUv2f64 |
3211 | 414k | 549558447U, // FCVTNUv4f16 |
3212 | 414k | 551655599U, // FCVTNUv4f32 |
3213 | 414k | 553752751U, // FCVTNUv8f16 |
3214 | 414k | 545362409U, // FCVTNv2i32 |
3215 | 414k | 549556713U, // FCVTNv4i16 |
3216 | 414k | 2967601569U, // FCVTNv4i32 |
3217 | 414k | 2969698721U, // FCVTNv8i16 |
3218 | 414k | 807425516U, // FCVTPSUWDr |
3219 | 414k | 807425516U, // FCVTPSUWHr |
3220 | 414k | 807425516U, // FCVTPSUWSr |
3221 | 414k | 807425516U, // FCVTPSUXDr |
3222 | 414k | 807425516U, // FCVTPSUXHr |
3223 | 414k | 807425516U, // FCVTPSUXSr |
3224 | 414k | 807425516U, // FCVTPSv1f16 |
3225 | 414k | 807425516U, // FCVTPSv1i32 |
3226 | 414k | 807425516U, // FCVTPSv1i64 |
3227 | 414k | 545363436U, // FCVTPSv2f32 |
3228 | 414k | 547460588U, // FCVTPSv2f64 |
3229 | 414k | 549557740U, // FCVTPSv4f16 |
3230 | 414k | 551654892U, // FCVTPSv4f32 |
3231 | 414k | 553752044U, // FCVTPSv8f16 |
3232 | 414k | 807426231U, // FCVTPUUWDr |
3233 | 414k | 807426231U, // FCVTPUUWHr |
3234 | 414k | 807426231U, // FCVTPUUWSr |
3235 | 414k | 807426231U, // FCVTPUUXDr |
3236 | 414k | 807426231U, // FCVTPUUXHr |
3237 | 414k | 807426231U, // FCVTPUUXSr |
3238 | 414k | 807426231U, // FCVTPUv1f16 |
3239 | 414k | 807426231U, // FCVTPUv1i32 |
3240 | 414k | 807426231U, // FCVTPUv1i64 |
3241 | 414k | 545364151U, // FCVTPUv2f32 |
3242 | 414k | 547461303U, // FCVTPUv2f64 |
3243 | 414k | 549558455U, // FCVTPUv4f16 |
3244 | 414k | 551655607U, // FCVTPUv4f32 |
3245 | 414k | 553752759U, // FCVTPUv8f16 |
3246 | 414k | 807426148U, // FCVTSDr |
3247 | 414k | 807426148U, // FCVTSHr |
3248 | 414k | 2185229U, // FCVTXNT_ZPmZ_DtoS |
3249 | 414k | 807424543U, // FCVTXNv1i64 |
3250 | 414k | 545362463U, // FCVTXNv2f32 |
3251 | 414k | 2967601623U, // FCVTXNv4f32 |
3252 | 414k | 2185997U, // FCVTX_ZPmZ_DtoS |
3253 | 414k | 807425569U, // FCVTZSSWDri |
3254 | 414k | 807425569U, // FCVTZSSWHri |
3255 | 414k | 807425569U, // FCVTZSSWSri |
3256 | 414k | 807425569U, // FCVTZSSXDri |
3257 | 414k | 807425569U, // FCVTZSSXHri |
3258 | 414k | 807425569U, // FCVTZSSXSri |
3259 | 414k | 807425569U, // FCVTZSUWDr |
3260 | 414k | 807425569U, // FCVTZSUWHr |
3261 | 414k | 807425569U, // FCVTZSUWSr |
3262 | 414k | 807425569U, // FCVTZSUXDr |
3263 | 414k | 807425569U, // FCVTZSUXHr |
3264 | 414k | 807425569U, // FCVTZSUXSr |
3265 | 414k | 2151969U, // FCVTZS_ZPmZ_DtoD |
3266 | 414k | 2184737U, // FCVTZS_ZPmZ_DtoS |
3267 | 414k | 2151969U, // FCVTZS_ZPmZ_HtoD |
3268 | 414k | 272700961U, // FCVTZS_ZPmZ_HtoH |
3269 | 414k | 2184737U, // FCVTZS_ZPmZ_HtoS |
3270 | 414k | 2151969U, // FCVTZS_ZPmZ_StoD |
3271 | 414k | 2184737U, // FCVTZS_ZPmZ_StoS |
3272 | 414k | 807425569U, // FCVTZSd |
3273 | 414k | 807425569U, // FCVTZSh |
3274 | 414k | 807425569U, // FCVTZSs |
3275 | 414k | 807425569U, // FCVTZSv1f16 |
3276 | 414k | 807425569U, // FCVTZSv1i32 |
3277 | 414k | 807425569U, // FCVTZSv1i64 |
3278 | 414k | 545363489U, // FCVTZSv2f32 |
3279 | 414k | 547460641U, // FCVTZSv2f64 |
3280 | 414k | 545363489U, // FCVTZSv2i32_shift |
3281 | 414k | 547460641U, // FCVTZSv2i64_shift |
3282 | 414k | 549557793U, // FCVTZSv4f16 |
3283 | 414k | 551654945U, // FCVTZSv4f32 |
3284 | 414k | 549557793U, // FCVTZSv4i16_shift |
3285 | 414k | 551654945U, // FCVTZSv4i32_shift |
3286 | 414k | 553752097U, // FCVTZSv8f16 |
3287 | 414k | 553752097U, // FCVTZSv8i16_shift |
3288 | 414k | 807426239U, // FCVTZUSWDri |
3289 | 414k | 807426239U, // FCVTZUSWHri |
3290 | 414k | 807426239U, // FCVTZUSWSri |
3291 | 414k | 807426239U, // FCVTZUSXDri |
3292 | 414k | 807426239U, // FCVTZUSXHri |
3293 | 414k | 807426239U, // FCVTZUSXSri |
3294 | 414k | 807426239U, // FCVTZUUWDr |
3295 | 414k | 807426239U, // FCVTZUUWHr |
3296 | 414k | 807426239U, // FCVTZUUWSr |
3297 | 414k | 807426239U, // FCVTZUUXDr |
3298 | 414k | 807426239U, // FCVTZUUXHr |
3299 | 414k | 807426239U, // FCVTZUUXSr |
3300 | 414k | 2152639U, // FCVTZU_ZPmZ_DtoD |
3301 | 414k | 2185407U, // FCVTZU_ZPmZ_DtoS |
3302 | 414k | 2152639U, // FCVTZU_ZPmZ_HtoD |
3303 | 414k | 272701631U, // FCVTZU_ZPmZ_HtoH |
3304 | 414k | 2185407U, // FCVTZU_ZPmZ_HtoS |
3305 | 414k | 2152639U, // FCVTZU_ZPmZ_StoD |
3306 | 414k | 2185407U, // FCVTZU_ZPmZ_StoS |
3307 | 414k | 807426239U, // FCVTZUd |
3308 | 414k | 807426239U, // FCVTZUh |
3309 | 414k | 807426239U, // FCVTZUs |
3310 | 414k | 807426239U, // FCVTZUv1f16 |
3311 | 414k | 807426239U, // FCVTZUv1i32 |
3312 | 414k | 807426239U, // FCVTZUv1i64 |
3313 | 414k | 545364159U, // FCVTZUv2f32 |
3314 | 414k | 547461311U, // FCVTZUv2f64 |
3315 | 414k | 545364159U, // FCVTZUv2i32_shift |
3316 | 414k | 547461311U, // FCVTZUv2i64_shift |
3317 | 414k | 549558463U, // FCVTZUv4f16 |
3318 | 414k | 551655615U, // FCVTZUv4f32 |
3319 | 414k | 549558463U, // FCVTZUv4i16_shift |
3320 | 414k | 551655615U, // FCVTZUv4i32_shift |
3321 | 414k | 553752767U, // FCVTZUv8f16 |
3322 | 414k | 553752767U, // FCVTZUv8i16_shift |
3323 | 414k | 541136996U, // FCVT_ZPmZ_DtoH |
3324 | 414k | 2185316U, // FCVT_ZPmZ_DtoS |
3325 | 414k | 2152548U, // FCVT_ZPmZ_HtoD |
3326 | 414k | 2185316U, // FCVT_ZPmZ_HtoS |
3327 | 414k | 2152548U, // FCVT_ZPmZ_StoD |
3328 | 414k | 541136996U, // FCVT_ZPmZ_StoH |
3329 | 414k | 807426287U, // FDIVDrr |
3330 | 414k | 807426287U, // FDIVHrr |
3331 | 414k | 3223377102U, // FDIVR_ZPmZ_D |
3332 | 414k | 3519091918U, // FDIVR_ZPmZ_H |
3333 | 414k | 3223409870U, // FDIVR_ZPmZ_S |
3334 | 414k | 807426287U, // FDIVSrr |
3335 | 414k | 3223378159U, // FDIV_ZPmZ_D |
3336 | 414k | 3519092975U, // FDIV_ZPmZ_H |
3337 | 414k | 3223410927U, // FDIV_ZPmZ_S |
3338 | 414k | 545364207U, // FDIVv2f32 |
3339 | 414k | 547461359U, // FDIVv2f64 |
3340 | 414k | 549558511U, // FDIVv4f16 |
3341 | 414k | 551655663U, // FDIVv4f32 |
3342 | 414k | 553752815U, // FDIVv8f16 |
3343 | 414k | 807457593U, // FDUP_ZI_D |
3344 | 414k | 56693561U, // FDUP_ZI_H |
3345 | 414k | 807490361U, // FDUP_ZI_S |
3346 | 414k | 2418066235U, // FEXPA_ZZ_D |
3347 | 414k | 1642136379U, // FEXPA_ZZ_H |
3348 | 414k | 4028711739U, // FEXPA_ZZ_S |
3349 | 414k | 807425577U, // FJCVTZS |
3350 | 414k | 2147572U, // FLOGB_ZPmZ_D |
3351 | 414k | 272696564U, // FLOGB_ZPmZ_H |
3352 | 414k | 2180340U, // FLOGB_ZPmZ_S |
3353 | 414k | 807422453U, // FMADDDrrr |
3354 | 414k | 807422453U, // FMADDHrrr |
3355 | 414k | 807422453U, // FMADDSrrr |
3356 | 414k | 3223374190U, // FMAD_ZPmZZ_D |
3357 | 414k | 3519089006U, // FMAD_ZPmZZ_H |
3358 | 414k | 3223406958U, // FMAD_ZPmZZ_S |
3359 | 414k | 807426747U, // FMAXDrr |
3360 | 414k | 807426747U, // FMAXHrr |
3361 | 414k | 807424343U, // FMAXNMDrr |
3362 | 414k | 807424343U, // FMAXNMHrr |
3363 | 414k | 3223376618U, // FMAXNMP_ZPmZZ_D |
3364 | 414k | 3519091434U, // FMAXNMP_ZPmZZ_H |
3365 | 414k | 3223409386U, // FMAXNMP_ZPmZZ_S |
3366 | 414k | 545362666U, // FMAXNMPv2f32 |
3367 | 414k | 547459818U, // FMAXNMPv2f64 |
3368 | 414k | 538989290U, // FMAXNMPv2i16p |
3369 | 414k | 538989290U, // FMAXNMPv2i32p |
3370 | 414k | 538989290U, // FMAXNMPv2i64p |
3371 | 414k | 549556970U, // FMAXNMPv4f16 |
3372 | 414k | 551654122U, // FMAXNMPv4f32 |
3373 | 414k | 553751274U, // FMAXNMPv8f16 |
3374 | 414k | 807424343U, // FMAXNMSrr |
3375 | 414k | 1646434586U, // FMAXNMV_VPZ_D |
3376 | 414k | 1648548122U, // FMAXNMV_VPZ_H |
3377 | 414k | 1638078746U, // FMAXNMV_VPZ_S |
3378 | 414k | 538990874U, // FMAXNMVv4i16v |
3379 | 414k | 538990874U, // FMAXNMVv4i32v |
3380 | 414k | 538990874U, // FMAXNMVv8i16v |
3381 | 414k | 3223376215U, // FMAXNM_ZPmI_D |
3382 | 414k | 3519091031U, // FMAXNM_ZPmI_H |
3383 | 414k | 3223408983U, // FMAXNM_ZPmI_S |
3384 | 414k | 3223376215U, // FMAXNM_ZPmZ_D |
3385 | 414k | 3519091031U, // FMAXNM_ZPmZ_H |
3386 | 414k | 3223408983U, // FMAXNM_ZPmZ_S |
3387 | 414k | 545362263U, // FMAXNMv2f32 |
3388 | 414k | 547459415U, // FMAXNMv2f64 |
3389 | 414k | 549556567U, // FMAXNMv4f16 |
3390 | 414k | 551653719U, // FMAXNMv4f32 |
3391 | 414k | 553750871U, // FMAXNMv8f16 |
3392 | 414k | 3223376715U, // FMAXP_ZPmZZ_D |
3393 | 414k | 3519091531U, // FMAXP_ZPmZZ_H |
3394 | 414k | 3223409483U, // FMAXP_ZPmZZ_S |
3395 | 414k | 545362763U, // FMAXPv2f32 |
3396 | 414k | 547459915U, // FMAXPv2f64 |
3397 | 414k | 538989387U, // FMAXPv2i16p |
3398 | 414k | 538989387U, // FMAXPv2i32p |
3399 | 414k | 538989387U, // FMAXPv2i64p |
3400 | 414k | 549557067U, // FMAXPv4f16 |
3401 | 414k | 551654219U, // FMAXPv4f32 |
3402 | 414k | 553751371U, // FMAXPv8f16 |
3403 | 414k | 807426747U, // FMAXSrr |
3404 | 414k | 1646434647U, // FMAXV_VPZ_D |
3405 | 414k | 1648548183U, // FMAXV_VPZ_H |
3406 | 414k | 1638078807U, // FMAXV_VPZ_S |
3407 | 414k | 538990935U, // FMAXVv4i16v |
3408 | 414k | 538990935U, // FMAXVv4i32v |
3409 | 414k | 538990935U, // FMAXVv8i16v |
3410 | 414k | 3223378619U, // FMAX_ZPmI_D |
3411 | 414k | 3519093435U, // FMAX_ZPmI_H |
3412 | 414k | 3223411387U, // FMAX_ZPmI_S |
3413 | 414k | 3223378619U, // FMAX_ZPmZ_D |
3414 | 414k | 3519093435U, // FMAX_ZPmZ_H |
3415 | 414k | 3223411387U, // FMAX_ZPmZ_S |
3416 | 414k | 545364667U, // FMAXv2f32 |
3417 | 414k | 547461819U, // FMAXv2f64 |
3418 | 414k | 549558971U, // FMAXv4f16 |
3419 | 414k | 551656123U, // FMAXv4f32 |
3420 | 414k | 553753275U, // FMAXv8f16 |
3421 | 414k | 807424402U, // FMINDrr |
3422 | 414k | 807424402U, // FMINHrr |
3423 | 414k | 807424335U, // FMINNMDrr |
3424 | 414k | 807424335U, // FMINNMHrr |
3425 | 414k | 3223376609U, // FMINNMP_ZPmZZ_D |
3426 | 414k | 3519091425U, // FMINNMP_ZPmZZ_H |
3427 | 414k | 3223409377U, // FMINNMP_ZPmZZ_S |
3428 | 414k | 545362657U, // FMINNMPv2f32 |
3429 | 414k | 547459809U, // FMINNMPv2f64 |
3430 | 414k | 538989281U, // FMINNMPv2i16p |
3431 | 414k | 538989281U, // FMINNMPv2i32p |
3432 | 414k | 538989281U, // FMINNMPv2i64p |
3433 | 414k | 549556961U, // FMINNMPv4f16 |
3434 | 414k | 551654113U, // FMINNMPv4f32 |
3435 | 414k | 553751265U, // FMINNMPv8f16 |
3436 | 414k | 807424335U, // FMINNMSrr |
3437 | 414k | 1646434577U, // FMINNMV_VPZ_D |
3438 | 414k | 1648548113U, // FMINNMV_VPZ_H |
3439 | 414k | 1638078737U, // FMINNMV_VPZ_S |
3440 | 414k | 538990865U, // FMINNMVv4i16v |
3441 | 414k | 538990865U, // FMINNMVv4i32v |
3442 | 414k | 538990865U, // FMINNMVv8i16v |
3443 | 414k | 3223376207U, // FMINNM_ZPmI_D |
3444 | 414k | 3519091023U, // FMINNM_ZPmI_H |
3445 | 414k | 3223408975U, // FMINNM_ZPmI_S |
3446 | 414k | 3223376207U, // FMINNM_ZPmZ_D |
3447 | 414k | 3519091023U, // FMINNM_ZPmZ_H |
3448 | 414k | 3223408975U, // FMINNM_ZPmZ_S |
3449 | 414k | 545362255U, // FMINNMv2f32 |
3450 | 414k | 547459407U, // FMINNMv2f64 |
3451 | 414k | 549556559U, // FMINNMv4f16 |
3452 | 414k | 551653711U, // FMINNMv4f32 |
3453 | 414k | 553750863U, // FMINNMv8f16 |
3454 | 414k | 3223376633U, // FMINP_ZPmZZ_D |
3455 | 414k | 3519091449U, // FMINP_ZPmZZ_H |
3456 | 414k | 3223409401U, // FMINP_ZPmZZ_S |
3457 | 414k | 545362681U, // FMINPv2f32 |
3458 | 414k | 547459833U, // FMINPv2f64 |
3459 | 414k | 538989305U, // FMINPv2i16p |
3460 | 414k | 538989305U, // FMINPv2i32p |
3461 | 414k | 538989305U, // FMINPv2i64p |
3462 | 414k | 549556985U, // FMINPv4f16 |
3463 | 414k | 551654137U, // FMINPv4f32 |
3464 | 414k | 553751289U, // FMINPv8f16 |
3465 | 414k | 807424402U, // FMINSrr |
3466 | 414k | 1646434595U, // FMINV_VPZ_D |
3467 | 414k | 1648548131U, // FMINV_VPZ_H |
3468 | 414k | 1638078755U, // FMINV_VPZ_S |
3469 | 414k | 538990883U, // FMINVv4i16v |
3470 | 414k | 538990883U, // FMINVv4i32v |
3471 | 414k | 538990883U, // FMINVv8i16v |
3472 | 414k | 3223376274U, // FMIN_ZPmI_D |
3473 | 414k | 3519091090U, // FMIN_ZPmI_H |
3474 | 414k | 3223409042U, // FMIN_ZPmI_S |
3475 | 414k | 3223376274U, // FMIN_ZPmZ_D |
3476 | 414k | 3519091090U, // FMIN_ZPmZ_H |
3477 | 414k | 3223409042U, // FMIN_ZPmZ_S |
3478 | 414k | 545362322U, // FMINv2f32 |
3479 | 414k | 547459474U, // FMINv2f64 |
3480 | 414k | 549556626U, // FMINv4f16 |
3481 | 414k | 551653778U, // FMINv4f32 |
3482 | 414k | 553750930U, // FMINv8f16 |
3483 | 414k | 2961309886U, // FMLAL2lanev4f16 |
3484 | 414k | 2967601342U, // FMLAL2lanev8f16 |
3485 | 414k | 2961309886U, // FMLAL2v4f16 |
3486 | 414k | 2967601342U, // FMLAL2v8f16 |
3487 | 414k | 2686534964U, // FMLALB_ZZZI_SHH |
3488 | 414k | 2686534964U, // FMLALB_ZZZ_SHH |
3489 | 414k | 2686539457U, // FMLALT_ZZZI_SHH |
3490 | 414k | 2686539457U, // FMLALT_ZZZ_SHH |
3491 | 414k | 2961313581U, // FMLALlanev4f16 |
3492 | 414k | 2967605037U, // FMLALlanev8f16 |
3493 | 414k | 2961313581U, // FMLALv4f16 |
3494 | 414k | 2967605037U, // FMLALv8f16 |
3495 | 414k | 3223372505U, // FMLA_ZPmZZ_D |
3496 | 414k | 3519087321U, // FMLA_ZPmZZ_H |
3497 | 414k | 3223405273U, // FMLA_ZPmZZ_S |
3498 | 414k | 1075888857U, // FMLA_ZZZI_D |
3499 | 414k | 2185298649U, // FMLA_ZZZI_H |
3500 | 414k | 1344357081U, // FMLA_ZZZI_S |
3501 | 414k | 270746329U, // FMLAv1i16_indexed |
3502 | 414k | 270746329U, // FMLAv1i32_indexed |
3503 | 414k | 270746329U, // FMLAv1i64_indexed |
3504 | 414k | 2961310425U, // FMLAv2f32 |
3505 | 414k | 2963407577U, // FMLAv2f64 |
3506 | 414k | 2961310425U, // FMLAv2i32_indexed |
3507 | 414k | 2963407577U, // FMLAv2i64_indexed |
3508 | 414k | 2965504729U, // FMLAv4f16 |
3509 | 414k | 2967601881U, // FMLAv4f32 |
3510 | 414k | 2965504729U, // FMLAv4i16_indexed |
3511 | 414k | 2967601881U, // FMLAv4i32_indexed |
3512 | 414k | 2969699033U, // FMLAv8f16 |
3513 | 414k | 2969699033U, // FMLAv8i16_indexed |
3514 | 414k | 2961310018U, // FMLSL2lanev4f16 |
3515 | 414k | 2967601474U, // FMLSL2lanev8f16 |
3516 | 414k | 2961310018U, // FMLSL2v4f16 |
3517 | 414k | 2967601474U, // FMLSL2v8f16 |
3518 | 414k | 2686535261U, // FMLSLB_ZZZI_SHH |
3519 | 414k | 2686535261U, // FMLSLB_ZZZ_SHH |
3520 | 414k | 2686539631U, // FMLSLT_ZZZI_SHH |
3521 | 414k | 2686539631U, // FMLSLT_ZZZ_SHH |
3522 | 414k | 2961313983U, // FMLSLlanev4f16 |
3523 | 414k | 2967605439U, // FMLSLlanev8f16 |
3524 | 414k | 2961313983U, // FMLSLv4f16 |
3525 | 414k | 2967605439U, // FMLSLv8f16 |
3526 | 414k | 3223377295U, // FMLS_ZPmZZ_D |
3527 | 414k | 3519092111U, // FMLS_ZPmZZ_H |
3528 | 414k | 3223410063U, // FMLS_ZPmZZ_S |
3529 | 414k | 1075893647U, // FMLS_ZZZI_D |
3530 | 414k | 2185303439U, // FMLS_ZZZI_H |
3531 | 414k | 1344361871U, // FMLS_ZZZI_S |
3532 | 414k | 270751119U, // FMLSv1i16_indexed |
3533 | 414k | 270751119U, // FMLSv1i32_indexed |
3534 | 414k | 270751119U, // FMLSv1i64_indexed |
3535 | 414k | 2961315215U, // FMLSv2f32 |
3536 | 414k | 2963412367U, // FMLSv2f64 |
3537 | 414k | 2961315215U, // FMLSv2i32_indexed |
3538 | 414k | 2963412367U, // FMLSv2i64_indexed |
3539 | 414k | 2965509519U, // FMLSv4f16 |
3540 | 414k | 2967606671U, // FMLSv4f32 |
3541 | 414k | 2965509519U, // FMLSv4i16_indexed |
3542 | 414k | 2967606671U, // FMLSv4i32_indexed |
3543 | 414k | 2969703823U, // FMLSv8f16 |
3544 | 414k | 2969703823U, // FMLSv8i16_indexed |
3545 | 414k | 1075888864U, // FMMLA_ZZZ_D |
3546 | 414k | 1344357088U, // FMMLA_ZZZ_S |
3547 | 414k | 2168570647U, // FMOPA_MPPZZ_D |
3548 | 414k | 2170667799U, // FMOPA_MPPZZ_S |
3549 | 414k | 2168575445U, // FMOPS_MPPZZ_D |
3550 | 414k | 2170672597U, // FMOPS_MPPZZ_S |
3551 | 414k | 538990911U, // FMOVDXHighr |
3552 | 414k | 807426367U, // FMOVDXr |
3553 | 414k | 807426367U, // FMOVDi |
3554 | 414k | 807426367U, // FMOVDr |
3555 | 414k | 807426367U, // FMOVHWr |
3556 | 414k | 807426367U, // FMOVHXr |
3557 | 414k | 807426367U, // FMOVHi |
3558 | 414k | 807426367U, // FMOVHr |
3559 | 414k | 807426367U, // FMOVSWr |
3560 | 414k | 807426367U, // FMOVSi |
3561 | 414k | 807426367U, // FMOVSr |
3562 | 414k | 807426367U, // FMOVWHr |
3563 | 414k | 807426367U, // FMOVWSr |
3564 | 414k | 864131391U, // FMOVXDHighr |
3565 | 414k | 807426367U, // FMOVXDr |
3566 | 414k | 807426367U, // FMOVXHr |
3567 | 414k | 813799743U, // FMOVv2f32_ns |
3568 | 414k | 815896895U, // FMOVv2f64_ns |
3569 | 414k | 817994047U, // FMOVv4f16_ns |
3570 | 414k | 820091199U, // FMOVv4f32_ns |
3571 | 414k | 822188351U, // FMOVv8f16_ns |
3572 | 414k | 3223373810U, // FMSB_ZPmZZ_D |
3573 | 414k | 3519088626U, // FMSB_ZPmZZ_H |
3574 | 414k | 3223406578U, // FMSB_ZPmZZ_S |
3575 | 414k | 807422067U, // FMSUBDrrr |
3576 | 414k | 807422067U, // FMSUBHrrr |
3577 | 414k | 807422067U, // FMSUBSrrr |
3578 | 414k | 807424233U, // FMULDrr |
3579 | 414k | 807424233U, // FMULHrr |
3580 | 414k | 807424233U, // FMULSrr |
3581 | 414k | 807426806U, // FMULX16 |
3582 | 414k | 807426806U, // FMULX32 |
3583 | 414k | 807426806U, // FMULX64 |
3584 | 414k | 3223378678U, // FMULX_ZPmZ_D |
3585 | 414k | 3519093494U, // FMULX_ZPmZ_H |
3586 | 414k | 3223411446U, // FMULX_ZPmZ_S |
3587 | 414k | 807426806U, // FMULXv1i16_indexed |
3588 | 414k | 807426806U, // FMULXv1i32_indexed |
3589 | 414k | 807426806U, // FMULXv1i64_indexed |
3590 | 414k | 545364726U, // FMULXv2f32 |
3591 | 414k | 547461878U, // FMULXv2f64 |
3592 | 414k | 545364726U, // FMULXv2i32_indexed |
3593 | 414k | 547461878U, // FMULXv2i64_indexed |
3594 | 414k | 549559030U, // FMULXv4f16 |
3595 | 414k | 551656182U, // FMULXv4f32 |
3596 | 414k | 549559030U, // FMULXv4i16_indexed |
3597 | 414k | 551656182U, // FMULXv4i32_indexed |
3598 | 414k | 553753334U, // FMULXv8f16 |
3599 | 414k | 553753334U, // FMULXv8i16_indexed |
3600 | 414k | 3223376105U, // FMUL_ZPmI_D |
3601 | 414k | 3519090921U, // FMUL_ZPmI_H |
3602 | 414k | 3223408873U, // FMUL_ZPmI_S |
3603 | 414k | 3223376105U, // FMUL_ZPmZ_D |
3604 | 414k | 3519090921U, // FMUL_ZPmZ_H |
3605 | 414k | 3223408873U, // FMUL_ZPmZ_S |
3606 | 414k | 2418069737U, // FMUL_ZZZI_D |
3607 | 414k | 2179010793U, // FMUL_ZZZI_H |
3608 | 414k | 4028715241U, // FMUL_ZZZI_S |
3609 | 414k | 2418069737U, // FMUL_ZZZ_D |
3610 | 414k | 2179010793U, // FMUL_ZZZ_H |
3611 | 414k | 4028715241U, // FMUL_ZZZ_S |
3612 | 414k | 807424233U, // FMULv1i16_indexed |
3613 | 414k | 807424233U, // FMULv1i32_indexed |
3614 | 414k | 807424233U, // FMULv1i64_indexed |
3615 | 414k | 545362153U, // FMULv2f32 |
3616 | 414k | 547459305U, // FMULv2f64 |
3617 | 414k | 545362153U, // FMULv2i32_indexed |
3618 | 414k | 547459305U, // FMULv2i64_indexed |
3619 | 414k | 549556457U, // FMULv4f16 |
3620 | 414k | 551653609U, // FMULv4f32 |
3621 | 414k | 549556457U, // FMULv4i16_indexed |
3622 | 414k | 551653609U, // FMULv4i32_indexed |
3623 | 414k | 553750761U, // FMULv8f16 |
3624 | 414k | 553750761U, // FMULv8i16_indexed |
3625 | 414k | 807422771U, // FNEGDr |
3626 | 414k | 807422771U, // FNEGHr |
3627 | 414k | 807422771U, // FNEGSr |
3628 | 414k | 2149171U, // FNEG_ZPmZ_D |
3629 | 414k | 272698163U, // FNEG_ZPmZ_H |
3630 | 414k | 2181939U, // FNEG_ZPmZ_S |
3631 | 414k | 545360691U, // FNEGv2f32 |
3632 | 414k | 547457843U, // FNEGv2f64 |
3633 | 414k | 549554995U, // FNEGv4f16 |
3634 | 414k | 551652147U, // FNEGv4f32 |
3635 | 414k | 553749299U, // FNEGv8f16 |
3636 | 414k | 807422460U, // FNMADDDrrr |
3637 | 414k | 807422460U, // FNMADDHrrr |
3638 | 414k | 807422460U, // FNMADDSrrr |
3639 | 414k | 3223374196U, // FNMAD_ZPmZZ_D |
3640 | 414k | 3519089012U, // FNMAD_ZPmZZ_H |
3641 | 414k | 3223406964U, // FNMAD_ZPmZZ_S |
3642 | 414k | 3223372534U, // FNMLA_ZPmZZ_D |
3643 | 414k | 3519087350U, // FNMLA_ZPmZZ_H |
3644 | 414k | 3223405302U, // FNMLA_ZPmZZ_S |
3645 | 414k | 3223377301U, // FNMLS_ZPmZZ_D |
3646 | 414k | 3519092117U, // FNMLS_ZPmZZ_H |
3647 | 414k | 3223410069U, // FNMLS_ZPmZZ_S |
3648 | 414k | 3223373816U, // FNMSB_ZPmZZ_D |
3649 | 414k | 3519088632U, // FNMSB_ZPmZZ_H |
3650 | 414k | 3223406584U, // FNMSB_ZPmZZ_S |
3651 | 414k | 807422074U, // FNMSUBDrrr |
3652 | 414k | 807422074U, // FNMSUBHrrr |
3653 | 414k | 807422074U, // FNMSUBSrrr |
3654 | 414k | 807424239U, // FNMULDrr |
3655 | 414k | 807424239U, // FNMULHrr |
3656 | 414k | 807424239U, // FNMULSrr |
3657 | 414k | 2418068145U, // FRECPE_ZZ_D |
3658 | 414k | 1642138289U, // FRECPE_ZZ_H |
3659 | 414k | 4028713649U, // FRECPE_ZZ_S |
3660 | 414k | 807422641U, // FRECPEv1f16 |
3661 | 414k | 807422641U, // FRECPEv1i32 |
3662 | 414k | 807422641U, // FRECPEv1i64 |
3663 | 414k | 545360561U, // FRECPEv2f32 |
3664 | 414k | 547457713U, // FRECPEv2f64 |
3665 | 414k | 549554865U, // FRECPEv4f16 |
3666 | 414k | 551652017U, // FRECPEv4f32 |
3667 | 414k | 553749169U, // FRECPEv8f16 |
3668 | 414k | 807425484U, // FRECPS16 |
3669 | 414k | 807425484U, // FRECPS32 |
3670 | 414k | 807425484U, // FRECPS64 |
3671 | 414k | 2418070988U, // FRECPS_ZZZ_D |
3672 | 414k | 2179012044U, // FRECPS_ZZZ_H |
3673 | 414k | 4028716492U, // FRECPS_ZZZ_S |
3674 | 414k | 545363404U, // FRECPSv2f32 |
3675 | 414k | 547460556U, // FRECPSv2f64 |
3676 | 414k | 549557708U, // FRECPSv4f16 |
3677 | 414k | 551654860U, // FRECPSv4f32 |
3678 | 414k | 553752012U, // FRECPSv8f16 |
3679 | 414k | 2153213U, // FRECPX_ZPmZ_D |
3680 | 414k | 272702205U, // FRECPX_ZPmZ_H |
3681 | 414k | 2185981U, // FRECPX_ZPmZ_S |
3682 | 414k | 807426813U, // FRECPXv1f16 |
3683 | 414k | 807426813U, // FRECPXv1i32 |
3684 | 414k | 807426813U, // FRECPXv1i64 |
3685 | 414k | 807426721U, // FRINT32XDr |
3686 | 414k | 807426721U, // FRINT32XSr |
3687 | 414k | 545364641U, // FRINT32Xv2f32 |
3688 | 414k | 547461793U, // FRINT32Xv2f64 |
3689 | 414k | 551656097U, // FRINT32Xv4f32 |
3690 | 414k | 807426851U, // FRINT32ZDr |
3691 | 414k | 807426851U, // FRINT32ZSr |
3692 | 414k | 545364771U, // FRINT32Zv2f32 |
3693 | 414k | 547461923U, // FRINT32Zv2f64 |
3694 | 414k | 551656227U, // FRINT32Zv4f32 |
3695 | 414k | 807426731U, // FRINT64XDr |
3696 | 414k | 807426731U, // FRINT64XSr |
3697 | 414k | 545364651U, // FRINT64Xv2f32 |
3698 | 414k | 547461803U, // FRINT64Xv2f64 |
3699 | 414k | 551656107U, // FRINT64Xv4f32 |
3700 | 414k | 807426861U, // FRINT64ZDr |
3701 | 414k | 807426861U, // FRINT64ZSr |
3702 | 414k | 545364781U, // FRINT64Zv2f32 |
3703 | 414k | 547461933U, // FRINT64Zv2f64 |
3704 | 414k | 551656237U, // FRINT64Zv4f32 |
3705 | 414k | 807420794U, // FRINTADr |
3706 | 414k | 807420794U, // FRINTAHr |
3707 | 414k | 807420794U, // FRINTASr |
3708 | 414k | 2147194U, // FRINTA_ZPmZ_D |
3709 | 414k | 272696186U, // FRINTA_ZPmZ_H |
3710 | 414k | 2179962U, // FRINTA_ZPmZ_S |
3711 | 414k | 545358714U, // FRINTAv2f32 |
3712 | 414k | 547455866U, // FRINTAv2f64 |
3713 | 414k | 549553018U, // FRINTAv4f16 |
3714 | 414k | 551650170U, // FRINTAv4f32 |
3715 | 414k | 553747322U, // FRINTAv8f16 |
3716 | 414k | 807423732U, // FRINTIDr |
3717 | 414k | 807423732U, // FRINTIHr |
3718 | 414k | 807423732U, // FRINTISr |
3719 | 414k | 2150132U, // FRINTI_ZPmZ_D |
3720 | 414k | 272699124U, // FRINTI_ZPmZ_H |
3721 | 414k | 2182900U, // FRINTI_ZPmZ_S |
3722 | 414k | 545361652U, // FRINTIv2f32 |
3723 | 414k | 547458804U, // FRINTIv2f64 |
3724 | 414k | 549555956U, // FRINTIv4f16 |
3725 | 414k | 551653108U, // FRINTIv4f32 |
3726 | 414k | 553750260U, // FRINTIv8f16 |
3727 | 414k | 807424357U, // FRINTMDr |
3728 | 414k | 807424357U, // FRINTMHr |
3729 | 414k | 807424357U, // FRINTMSr |
3730 | 414k | 2150757U, // FRINTM_ZPmZ_D |
3731 | 414k | 272699749U, // FRINTM_ZPmZ_H |
3732 | 414k | 2183525U, // FRINTM_ZPmZ_S |
3733 | 414k | 545362277U, // FRINTMv2f32 |
3734 | 414k | 547459429U, // FRINTMv2f64 |
3735 | 414k | 549556581U, // FRINTMv4f16 |
3736 | 414k | 551653733U, // FRINTMv4f32 |
3737 | 414k | 553750885U, // FRINTMv8f16 |
3738 | 414k | 807424480U, // FRINTNDr |
3739 | 414k | 807424480U, // FRINTNHr |
3740 | 414k | 807424480U, // FRINTNSr |
3741 | 414k | 2150880U, // FRINTN_ZPmZ_D |
3742 | 414k | 272699872U, // FRINTN_ZPmZ_H |
3743 | 414k | 2183648U, // FRINTN_ZPmZ_S |
3744 | 414k | 545362400U, // FRINTNv2f32 |
3745 | 414k | 547459552U, // FRINTNv2f64 |
3746 | 414k | 549556704U, // FRINTNv4f16 |
3747 | 414k | 551653856U, // FRINTNv4f32 |
3748 | 414k | 553751008U, // FRINTNv8f16 |
3749 | 414k | 807424812U, // FRINTPDr |
3750 | 414k | 807424812U, // FRINTPHr |
3751 | 414k | 807424812U, // FRINTPSr |
3752 | 414k | 2151212U, // FRINTP_ZPmZ_D |
3753 | 414k | 272700204U, // FRINTP_ZPmZ_H |
3754 | 414k | 2183980U, // FRINTP_ZPmZ_S |
3755 | 414k | 545362732U, // FRINTPv2f32 |
3756 | 414k | 547459884U, // FRINTPv2f64 |
3757 | 414k | 549557036U, // FRINTPv4f16 |
3758 | 414k | 551654188U, // FRINTPv4f32 |
3759 | 414k | 553751340U, // FRINTPv8f16 |
3760 | 414k | 807426821U, // FRINTXDr |
3761 | 414k | 807426821U, // FRINTXHr |
3762 | 414k | 807426821U, // FRINTXSr |
3763 | 414k | 2153221U, // FRINTX_ZPmZ_D |
3764 | 414k | 272702213U, // FRINTX_ZPmZ_H |
3765 | 414k | 2185989U, // FRINTX_ZPmZ_S |
3766 | 414k | 545364741U, // FRINTXv2f32 |
3767 | 414k | 547461893U, // FRINTXv2f64 |
3768 | 414k | 549559045U, // FRINTXv4f16 |
3769 | 414k | 551656197U, // FRINTXv4f32 |
3770 | 414k | 553753349U, // FRINTXv8f16 |
3771 | 414k | 807426928U, // FRINTZDr |
3772 | 414k | 807426928U, // FRINTZHr |
3773 | 414k | 807426928U, // FRINTZSr |
3774 | 414k | 2153328U, // FRINTZ_ZPmZ_D |
3775 | 414k | 272702320U, // FRINTZ_ZPmZ_H |
3776 | 414k | 2186096U, // FRINTZ_ZPmZ_S |
3777 | 414k | 545364848U, // FRINTZv2f32 |
3778 | 414k | 547462000U, // FRINTZv2f64 |
3779 | 414k | 549559152U, // FRINTZv4f16 |
3780 | 414k | 551656304U, // FRINTZv4f32 |
3781 | 414k | 553753456U, // FRINTZv8f16 |
3782 | 414k | 2418068190U, // FRSQRTE_ZZ_D |
3783 | 414k | 1642138334U, // FRSQRTE_ZZ_H |
3784 | 414k | 4028713694U, // FRSQRTE_ZZ_S |
3785 | 414k | 807422686U, // FRSQRTEv1f16 |
3786 | 414k | 807422686U, // FRSQRTEv1i32 |
3787 | 414k | 807422686U, // FRSQRTEv1i64 |
3788 | 414k | 545360606U, // FRSQRTEv2f32 |
3789 | 414k | 547457758U, // FRSQRTEv2f64 |
3790 | 414k | 549554910U, // FRSQRTEv4f16 |
3791 | 414k | 551652062U, // FRSQRTEv4f32 |
3792 | 414k | 553749214U, // FRSQRTEv8f16 |
3793 | 414k | 807425555U, // FRSQRTS16 |
3794 | 414k | 807425555U, // FRSQRTS32 |
3795 | 414k | 807425555U, // FRSQRTS64 |
3796 | 414k | 2418071059U, // FRSQRTS_ZZZ_D |
3797 | 414k | 2179012115U, // FRSQRTS_ZZZ_H |
3798 | 414k | 4028716563U, // FRSQRTS_ZZZ_S |
3799 | 414k | 545363475U, // FRSQRTSv2f32 |
3800 | 414k | 547460627U, // FRSQRTSv2f64 |
3801 | 414k | 549557779U, // FRSQRTSv4f16 |
3802 | 414k | 551654931U, // FRSQRTSv4f32 |
3803 | 414k | 553752083U, // FRSQRTSv8f16 |
3804 | 414k | 3223374459U, // FSCALE_ZPmZ_D |
3805 | 414k | 3519089275U, // FSCALE_ZPmZ_H |
3806 | 414k | 3223407227U, // FSCALE_ZPmZ_S |
3807 | 414k | 807426111U, // FSQRTDr |
3808 | 414k | 807426111U, // FSQRTHr |
3809 | 414k | 807426111U, // FSQRTSr |
3810 | 414k | 2152511U, // FSQRT_ZPmZ_D |
3811 | 414k | 272701503U, // FSQRT_ZPmZ_H |
3812 | 414k | 2185279U, // FSQRT_ZPmZ_S |
3813 | 414k | 545364031U, // FSQRTv2f32 |
3814 | 414k | 547461183U, // FSQRTv2f64 |
3815 | 414k | 549558335U, // FSQRTv4f16 |
3816 | 414k | 551655487U, // FSQRTv4f32 |
3817 | 414k | 553752639U, // FSQRTv8f16 |
3818 | 414k | 807422047U, // FSUBDrr |
3819 | 414k | 807422047U, // FSUBHrr |
3820 | 414k | 3223376820U, // FSUBR_ZPmI_D |
3821 | 414k | 3519091636U, // FSUBR_ZPmI_H |
3822 | 414k | 3223409588U, // FSUBR_ZPmI_S |
3823 | 414k | 3223376820U, // FSUBR_ZPmZ_D |
3824 | 414k | 3519091636U, // FSUBR_ZPmZ_H |
3825 | 414k | 3223409588U, // FSUBR_ZPmZ_S |
3826 | 414k | 807422047U, // FSUBSrr |
3827 | 414k | 3223373919U, // FSUB_ZPmI_D |
3828 | 414k | 3519088735U, // FSUB_ZPmI_H |
3829 | 414k | 3223406687U, // FSUB_ZPmI_S |
3830 | 414k | 3223373919U, // FSUB_ZPmZ_D |
3831 | 414k | 3519088735U, // FSUB_ZPmZ_H |
3832 | 414k | 3223406687U, // FSUB_ZPmZ_S |
3833 | 414k | 2418067551U, // FSUB_ZZZ_D |
3834 | 414k | 2179008607U, // FSUB_ZZZ_H |
3835 | 414k | 4028713055U, // FSUB_ZZZ_S |
3836 | 414k | 545359967U, // FSUBv2f32 |
3837 | 414k | 547457119U, // FSUBv2f64 |
3838 | 414k | 549554271U, // FSUBv4f16 |
3839 | 414k | 551651423U, // FSUBv4f32 |
3840 | 414k | 553748575U, // FSUBv8f16 |
3841 | 414k | 2418067835U, // FTMAD_ZZI_D |
3842 | 414k | 2179008891U, // FTMAD_ZZI_H |
3843 | 414k | 4028713339U, // FTMAD_ZZI_S |
3844 | 414k | 2418069756U, // FTSMUL_ZZZ_D |
3845 | 414k | 2179010812U, // FTSMUL_ZZZ_H |
3846 | 414k | 4028715260U, // FTSMUL_ZZZ_S |
3847 | 414k | 2418069512U, // FTSSEL_ZZZ_D |
3848 | 414k | 2179010568U, // FTSSEL_ZZZ_H |
3849 | 414k | 4028715016U, // FTSSEL_ZZZ_S |
3850 | 414k | 1134937033U, // GLD1B_D_IMM_REAL |
3851 | 414k | 329630665U, // GLD1B_D_REAL |
3852 | 414k | 329630665U, // GLD1B_D_SXTW_REAL |
3853 | 414k | 329630665U, // GLD1B_D_UXTW_REAL |
3854 | 414k | 1403388873U, // GLD1B_S_IMM_REAL |
3855 | 414k | 329647049U, // GLD1B_S_SXTW_REAL |
3856 | 414k | 329647049U, // GLD1B_S_UXTW_REAL |
3857 | 414k | 1134938398U, // GLD1D_IMM_REAL |
3858 | 414k | 329632030U, // GLD1D_REAL |
3859 | 414k | 329632030U, // GLD1D_SCALED_REAL |
3860 | 414k | 329632030U, // GLD1D_SXTW_REAL |
3861 | 414k | 329632030U, // GLD1D_SXTW_SCALED_REAL |
3862 | 414k | 329632030U, // GLD1D_UXTW_REAL |
3863 | 414k | 329632030U, // GLD1D_UXTW_SCALED_REAL |
3864 | 414k | 1134938983U, // GLD1H_D_IMM_REAL |
3865 | 414k | 329632615U, // GLD1H_D_REAL |
3866 | 414k | 329632615U, // GLD1H_D_SCALED_REAL |
3867 | 414k | 329632615U, // GLD1H_D_SXTW_REAL |
3868 | 414k | 329632615U, // GLD1H_D_SXTW_SCALED_REAL |
3869 | 414k | 329632615U, // GLD1H_D_UXTW_REAL |
3870 | 414k | 329632615U, // GLD1H_D_UXTW_SCALED_REAL |
3871 | 414k | 1403390823U, // GLD1H_S_IMM_REAL |
3872 | 414k | 329648999U, // GLD1H_S_SXTW_REAL |
3873 | 414k | 329648999U, // GLD1H_S_SXTW_SCALED_REAL |
3874 | 414k | 329648999U, // GLD1H_S_UXTW_REAL |
3875 | 414k | 329648999U, // GLD1H_S_UXTW_SCALED_REAL |
3876 | 414k | 1134938048U, // GLD1SB_D_IMM_REAL |
3877 | 414k | 329631680U, // GLD1SB_D_REAL |
3878 | 414k | 329631680U, // GLD1SB_D_SXTW_REAL |
3879 | 414k | 329631680U, // GLD1SB_D_UXTW_REAL |
3880 | 414k | 1403389888U, // GLD1SB_S_IMM_REAL |
3881 | 414k | 329648064U, // GLD1SB_S_SXTW_REAL |
3882 | 414k | 329648064U, // GLD1SB_S_UXTW_REAL |
3883 | 414k | 1134939674U, // GLD1SH_D_IMM_REAL |
3884 | 414k | 329633306U, // GLD1SH_D_REAL |
3885 | 414k | 329633306U, // GLD1SH_D_SCALED_REAL |
3886 | 414k | 329633306U, // GLD1SH_D_SXTW_REAL |
3887 | 414k | 329633306U, // GLD1SH_D_SXTW_SCALED_REAL |
3888 | 414k | 329633306U, // GLD1SH_D_UXTW_REAL |
3889 | 414k | 329633306U, // GLD1SH_D_UXTW_SCALED_REAL |
3890 | 414k | 1403391514U, // GLD1SH_S_IMM_REAL |
3891 | 414k | 329649690U, // GLD1SH_S_SXTW_REAL |
3892 | 414k | 329649690U, // GLD1SH_S_SXTW_SCALED_REAL |
3893 | 414k | 329649690U, // GLD1SH_S_UXTW_REAL |
3894 | 414k | 329649690U, // GLD1SH_S_UXTW_SCALED_REAL |
3895 | 414k | 1134942767U, // GLD1SW_D_IMM_REAL |
3896 | 414k | 329636399U, // GLD1SW_D_REAL |
3897 | 414k | 329636399U, // GLD1SW_D_SCALED_REAL |
3898 | 414k | 329636399U, // GLD1SW_D_SXTW_REAL |
3899 | 414k | 329636399U, // GLD1SW_D_SXTW_SCALED_REAL |
3900 | 414k | 329636399U, // GLD1SW_D_UXTW_REAL |
3901 | 414k | 329636399U, // GLD1SW_D_UXTW_SCALED_REAL |
3902 | 414k | 1134942572U, // GLD1W_D_IMM_REAL |
3903 | 414k | 329636204U, // GLD1W_D_REAL |
3904 | 414k | 329636204U, // GLD1W_D_SCALED_REAL |
3905 | 414k | 329636204U, // GLD1W_D_SXTW_REAL |
3906 | 414k | 329636204U, // GLD1W_D_SXTW_SCALED_REAL |
3907 | 414k | 329636204U, // GLD1W_D_UXTW_REAL |
3908 | 414k | 329636204U, // GLD1W_D_UXTW_SCALED_REAL |
3909 | 414k | 1403394412U, // GLD1W_IMM_REAL |
3910 | 414k | 329652588U, // GLD1W_SXTW_REAL |
3911 | 414k | 329652588U, // GLD1W_SXTW_SCALED_REAL |
3912 | 414k | 329652588U, // GLD1W_UXTW_REAL |
3913 | 414k | 329652588U, // GLD1W_UXTW_SCALED_REAL |
3914 | 414k | 1134937039U, // GLDFF1B_D_IMM_REAL |
3915 | 414k | 329630671U, // GLDFF1B_D_REAL |
3916 | 414k | 329630671U, // GLDFF1B_D_SXTW_REAL |
3917 | 414k | 329630671U, // GLDFF1B_D_UXTW_REAL |
3918 | 414k | 1403388879U, // GLDFF1B_S_IMM_REAL |
3919 | 414k | 329647055U, // GLDFF1B_S_SXTW_REAL |
3920 | 414k | 329647055U, // GLDFF1B_S_UXTW_REAL |
3921 | 414k | 1134938404U, // GLDFF1D_IMM_REAL |
3922 | 414k | 329632036U, // GLDFF1D_REAL |
3923 | 414k | 329632036U, // GLDFF1D_SCALED_REAL |
3924 | 414k | 329632036U, // GLDFF1D_SXTW_REAL |
3925 | 414k | 329632036U, // GLDFF1D_SXTW_SCALED_REAL |
3926 | 414k | 329632036U, // GLDFF1D_UXTW_REAL |
3927 | 414k | 329632036U, // GLDFF1D_UXTW_SCALED_REAL |
3928 | 414k | 1134938989U, // GLDFF1H_D_IMM_REAL |
3929 | 414k | 329632621U, // GLDFF1H_D_REAL |
3930 | 414k | 329632621U, // GLDFF1H_D_SCALED_REAL |
3931 | 414k | 329632621U, // GLDFF1H_D_SXTW_REAL |
3932 | 414k | 329632621U, // GLDFF1H_D_SXTW_SCALED_REAL |
3933 | 414k | 329632621U, // GLDFF1H_D_UXTW_REAL |
3934 | 414k | 329632621U, // GLDFF1H_D_UXTW_SCALED_REAL |
3935 | 414k | 1403390829U, // GLDFF1H_S_IMM_REAL |
3936 | 414k | 329649005U, // GLDFF1H_S_SXTW_REAL |
3937 | 414k | 329649005U, // GLDFF1H_S_SXTW_SCALED_REAL |
3938 | 414k | 329649005U, // GLDFF1H_S_UXTW_REAL |
3939 | 414k | 329649005U, // GLDFF1H_S_UXTW_SCALED_REAL |
3940 | 414k | 1134938055U, // GLDFF1SB_D_IMM_REAL |
3941 | 414k | 329631687U, // GLDFF1SB_D_REAL |
3942 | 414k | 329631687U, // GLDFF1SB_D_SXTW_REAL |
3943 | 414k | 329631687U, // GLDFF1SB_D_UXTW_REAL |
3944 | 414k | 1403389895U, // GLDFF1SB_S_IMM_REAL |
3945 | 414k | 329648071U, // GLDFF1SB_S_SXTW_REAL |
3946 | 414k | 329648071U, // GLDFF1SB_S_UXTW_REAL |
3947 | 414k | 1134939681U, // GLDFF1SH_D_IMM_REAL |
3948 | 414k | 329633313U, // GLDFF1SH_D_REAL |
3949 | 414k | 329633313U, // GLDFF1SH_D_SCALED_REAL |
3950 | 414k | 329633313U, // GLDFF1SH_D_SXTW_REAL |
3951 | 414k | 329633313U, // GLDFF1SH_D_SXTW_SCALED_REAL |
3952 | 414k | 329633313U, // GLDFF1SH_D_UXTW_REAL |
3953 | 414k | 329633313U, // GLDFF1SH_D_UXTW_SCALED_REAL |
3954 | 414k | 1403391521U, // GLDFF1SH_S_IMM_REAL |
3955 | 414k | 329649697U, // GLDFF1SH_S_SXTW_REAL |
3956 | 414k | 329649697U, // GLDFF1SH_S_SXTW_SCALED_REAL |
3957 | 414k | 329649697U, // GLDFF1SH_S_UXTW_REAL |
3958 | 414k | 329649697U, // GLDFF1SH_S_UXTW_SCALED_REAL |
3959 | 414k | 1134942774U, // GLDFF1SW_D_IMM_REAL |
3960 | 414k | 329636406U, // GLDFF1SW_D_REAL |
3961 | 414k | 329636406U, // GLDFF1SW_D_SCALED_REAL |
3962 | 414k | 329636406U, // GLDFF1SW_D_SXTW_REAL |
3963 | 414k | 329636406U, // GLDFF1SW_D_SXTW_SCALED_REAL |
3964 | 414k | 329636406U, // GLDFF1SW_D_UXTW_REAL |
3965 | 414k | 329636406U, // GLDFF1SW_D_UXTW_SCALED_REAL |
3966 | 414k | 1134942578U, // GLDFF1W_D_IMM_REAL |
3967 | 414k | 329636210U, // GLDFF1W_D_REAL |
3968 | 414k | 329636210U, // GLDFF1W_D_SCALED_REAL |
3969 | 414k | 329636210U, // GLDFF1W_D_SXTW_REAL |
3970 | 414k | 329636210U, // GLDFF1W_D_SXTW_SCALED_REAL |
3971 | 414k | 329636210U, // GLDFF1W_D_UXTW_REAL |
3972 | 414k | 329636210U, // GLDFF1W_D_UXTW_SCALED_REAL |
3973 | 414k | 1403394418U, // GLDFF1W_IMM_REAL |
3974 | 414k | 329652594U, // GLDFF1W_SXTW_REAL |
3975 | 414k | 329652594U, // GLDFF1W_SXTW_SCALED_REAL |
3976 | 414k | 329652594U, // GLDFF1W_UXTW_REAL |
3977 | 414k | 329652594U, // GLDFF1W_UXTW_SCALED_REAL |
3978 | 414k | 807423716U, // GMI |
3979 | 414k | 415658U, // HINT |
3980 | 414k | 3223377807U, // HISTCNT_ZPzZZ_D |
3981 | 414k | 3223410575U, // HISTCNT_ZPzZZ_S |
3982 | 414k | 3760229191U, // HISTSEG_ZZZ |
3983 | 414k | 268064U, // HLT |
3984 | 414k | 264468U, // HVC |
3985 | 414k | 2686469322U, // INCB_XPiI |
3986 | 414k | 2686470573U, // INCD_XPiI |
3987 | 414k | 2686503341U, // INCD_ZPiI |
3988 | 414k | 2686471259U, // INCH_XPiI |
3989 | 414k | 39914587U, // INCH_ZPiI |
3990 | 414k | 3760214654U, // INCP_XP_B |
3991 | 414k | 2418037374U, // INCP_XP_D |
3992 | 414k | 1881166462U, // INCP_XP_H |
3993 | 414k | 4028650110U, // INCP_XP_S |
3994 | 414k | 1075892862U, // INCP_ZP_D |
3995 | 414k | 1648431742U, // INCP_ZP_H |
3996 | 414k | 1344361086U, // INCP_ZP_S |
3997 | 414k | 2686474733U, // INCW_XPiI |
3998 | 414k | 2686540269U, // INCW_ZPiI |
3999 | 414k | 1075878623U, // INDEX_II_B |
4000 | 414k | 807459551U, // INDEX_II_D |
4001 | 414k | 1405164255U, // INDEX_II_H |
4002 | 414k | 807492319U, // INDEX_II_S |
4003 | 414k | 1075878623U, // INDEX_IR_B |
4004 | 414k | 807459551U, // INDEX_IR_D |
4005 | 414k | 331422431U, // INDEX_IR_H |
4006 | 414k | 807492319U, // INDEX_IR_S |
4007 | 414k | 807443167U, // INDEX_RI_B |
4008 | 414k | 807459551U, // INDEX_RI_D |
4009 | 414k | 2191596255U, // INDEX_RI_H |
4010 | 414k | 807492319U, // INDEX_RI_S |
4011 | 414k | 807443167U, // INDEX_RR_B |
4012 | 414k | 807459551U, // INDEX_RR_D |
4013 | 414k | 2191596255U, // INDEX_RR_H |
4014 | 414k | 807492319U, // INDEX_RR_S |
4015 | 414k | 1676051345U, // INSERT_MXIPZ_H_B |
4016 | 414k | 1676051345U, // INSERT_MXIPZ_H_D |
4017 | 414k | 1676051345U, // INSERT_MXIPZ_H_H |
4018 | 414k | 1676051345U, // INSERT_MXIPZ_H_Q |
4019 | 414k | 1676051345U, // INSERT_MXIPZ_H_S |
4020 | 414k | 1676067729U, // INSERT_MXIPZ_V_B |
4021 | 414k | 1676067729U, // INSERT_MXIPZ_V_D |
4022 | 414k | 1676067729U, // INSERT_MXIPZ_V_H |
4023 | 414k | 1676067729U, // INSERT_MXIPZ_V_Q |
4024 | 414k | 1676067729U, // INSERT_MXIPZ_V_S |
4025 | 414k | 270570646U, // INSR_ZR_B |
4026 | 414k | 270587030U, // INSR_ZR_D |
4027 | 414k | 1677792406U, // INSR_ZR_H |
4028 | 414k | 270619798U, // INSR_ZR_S |
4029 | 414k | 1881183382U, // INSR_ZV_B |
4030 | 414k | 2149635222U, // INSR_ZV_D |
4031 | 414k | 1661015190U, // INSR_ZV_H |
4032 | 414k | 2418103446U, // INSR_ZV_S |
4033 | 414k | 2485261739U, // INSvi16gpr |
4034 | 414k | 2753697195U, // INSvi16lane |
4035 | 414k | 2487358891U, // INSvi32gpr |
4036 | 414k | 2755794347U, // INSvi32lane |
4037 | 414k | 2474775979U, // INSvi64gpr |
4038 | 414k | 2743211435U, // INSvi64lane |
4039 | 414k | 2489456043U, // INSvi8gpr |
4040 | 414k | 2757891499U, // INSvi8lane |
4041 | 414k | 807422800U, // IRG |
4042 | 414k | 329709U, // ISB |
4043 | 414k | 3223339907U, // LASTA_RPZ_B |
4044 | 414k | 3223339907U, // LASTA_RPZ_D |
4045 | 414k | 3223339907U, // LASTA_RPZ_H |
4046 | 414k | 3223339907U, // LASTA_RPZ_S |
4047 | 414k | 3223339907U, // LASTA_VPZ_B |
4048 | 414k | 3223339907U, // LASTA_VPZ_D |
4049 | 414k | 3223339907U, // LASTA_VPZ_H |
4050 | 414k | 3223339907U, // LASTA_VPZ_S |
4051 | 414k | 3223341132U, // LASTB_RPZ_B |
4052 | 414k | 3223341132U, // LASTB_RPZ_D |
4053 | 414k | 3223341132U, // LASTB_RPZ_H |
4054 | 414k | 3223341132U, // LASTB_RPZ_S |
4055 | 414k | 3223341132U, // LASTB_VPZ_B |
4056 | 414k | 3223341132U, // LASTB_VPZ_D |
4057 | 414k | 3223341132U, // LASTB_VPZ_H |
4058 | 414k | 3223341132U, // LASTB_VPZ_S |
4059 | 414k | 329712585U, // LD1B |
4060 | 414k | 329630665U, // LD1B_D |
4061 | 414k | 329630665U, // LD1B_D_IMM_REAL |
4062 | 414k | 329728969U, // LD1B_H |
4063 | 414k | 329728969U, // LD1B_H_IMM_REAL |
4064 | 414k | 329712585U, // LD1B_IMM_REAL |
4065 | 414k | 329647049U, // LD1B_S |
4066 | 414k | 329647049U, // LD1B_S_IMM_REAL |
4067 | 414k | 329632030U, // LD1D |
4068 | 414k | 329632030U, // LD1D_IMM_REAL |
4069 | 414k | 491561U, // LD1Fourv16b |
4070 | 414k | 76005417U, // LD1Fourv16b_POST |
4071 | 414k | 524329U, // LD1Fourv1d |
4072 | 414k | 78135337U, // LD1Fourv1d_POST |
4073 | 414k | 557097U, // LD1Fourv2d |
4074 | 414k | 76070953U, // LD1Fourv2d_POST |
4075 | 414k | 589865U, // LD1Fourv2s |
4076 | 414k | 78200873U, // LD1Fourv2s_POST |
4077 | 414k | 622633U, // LD1Fourv4h |
4078 | 414k | 78233641U, // LD1Fourv4h_POST |
4079 | 414k | 655401U, // LD1Fourv4s |
4080 | 414k | 76169257U, // LD1Fourv4s_POST |
4081 | 414k | 688169U, // LD1Fourv8b |
4082 | 414k | 78299177U, // LD1Fourv8b_POST |
4083 | 414k | 720937U, // LD1Fourv8h |
4084 | 414k | 76234793U, // LD1Fourv8h_POST |
4085 | 414k | 329730919U, // LD1H |
4086 | 414k | 329632615U, // LD1H_D |
4087 | 414k | 329632615U, // LD1H_D_IMM_REAL |
4088 | 414k | 329730919U, // LD1H_IMM_REAL |
4089 | 414k | 329648999U, // LD1H_S |
4090 | 414k | 329648999U, // LD1H_S_IMM_REAL |
4091 | 414k | 491561U, // LD1Onev16b |
4092 | 414k | 80199721U, // LD1Onev16b_POST |
4093 | 414k | 524329U, // LD1Onev1d |
4094 | 414k | 82329641U, // LD1Onev1d_POST |
4095 | 414k | 557097U, // LD1Onev2d |
4096 | 414k | 80265257U, // LD1Onev2d_POST |
4097 | 414k | 589865U, // LD1Onev2s |
4098 | 414k | 82395177U, // LD1Onev2s_POST |
4099 | 414k | 622633U, // LD1Onev4h |
4100 | 414k | 82427945U, // LD1Onev4h_POST |
4101 | 414k | 655401U, // LD1Onev4s |
4102 | 414k | 80363561U, // LD1Onev4s_POST |
4103 | 414k | 688169U, // LD1Onev8b |
4104 | 414k | 82493481U, // LD1Onev8b_POST |
4105 | 414k | 720937U, // LD1Onev8h |
4106 | 414k | 80429097U, // LD1Onev8h_POST |
4107 | 414k | 329631532U, // LD1RB_D_IMM |
4108 | 414k | 329729836U, // LD1RB_H_IMM |
4109 | 414k | 329713452U, // LD1RB_IMM |
4110 | 414k | 329647916U, // LD1RB_S_IMM |
4111 | 414k | 329632304U, // LD1RD_IMM |
4112 | 414k | 329633158U, // LD1RH_D_IMM |
4113 | 414k | 329731462U, // LD1RH_IMM |
4114 | 414k | 329649542U, // LD1RH_S_IMM |
4115 | 414k | 329713423U, // LD1RO_B |
4116 | 414k | 329713423U, // LD1RO_B_IMM |
4117 | 414k | 329632288U, // LD1RO_D |
4118 | 414k | 329632288U, // LD1RO_D_IMM |
4119 | 414k | 329731440U, // LD1RO_H |
4120 | 414k | 329731440U, // LD1RO_H_IMM |
4121 | 414k | 329652751U, // LD1RO_W |
4122 | 414k | 329652751U, // LD1RO_W_IMM |
4123 | 414k | 329713444U, // LD1RQ_B |
4124 | 414k | 329713444U, // LD1RQ_B_IMM |
4125 | 414k | 329632296U, // LD1RQ_D |
4126 | 414k | 329632296U, // LD1RQ_D_IMM |
4127 | 414k | 329731454U, // LD1RQ_H |
4128 | 414k | 329731454U, // LD1RQ_H_IMM |
4129 | 414k | 329652759U, // LD1RQ_W |
4130 | 414k | 329652759U, // LD1RQ_W_IMM |
4131 | 414k | 329631743U, // LD1RSB_D_IMM |
4132 | 414k | 329730047U, // LD1RSB_H_IMM |
4133 | 414k | 329648127U, // LD1RSB_S_IMM |
4134 | 414k | 329633356U, // LD1RSH_D_IMM |
4135 | 414k | 329649740U, // LD1RSH_S_IMM |
4136 | 414k | 329636440U, // LD1RSW_IMM |
4137 | 414k | 329636383U, // LD1RW_D_IMM |
4138 | 414k | 329652767U, // LD1RW_IMM |
4139 | 414k | 496522U, // LD1Rv16b |
4140 | 414k | 84398986U, // LD1Rv16b_POST |
4141 | 414k | 529290U, // LD1Rv1d |
4142 | 414k | 82334602U, // LD1Rv1d_POST |
4143 | 414k | 562058U, // LD1Rv2d |
4144 | 414k | 82367370U, // LD1Rv2d_POST |
4145 | 414k | 594826U, // LD1Rv2s |
4146 | 414k | 86594442U, // LD1Rv2s_POST |
4147 | 414k | 627594U, // LD1Rv4h |
4148 | 414k | 88724362U, // LD1Rv4h_POST |
4149 | 414k | 660362U, // LD1Rv4s |
4150 | 414k | 86659978U, // LD1Rv4s_POST |
4151 | 414k | 693130U, // LD1Rv8b |
4152 | 414k | 84595594U, // LD1Rv8b_POST |
4153 | 414k | 725898U, // LD1Rv8h |
4154 | 414k | 88822666U, // LD1Rv8h_POST |
4155 | 414k | 329631680U, // LD1SB_D |
4156 | 414k | 329631680U, // LD1SB_D_IMM_REAL |
4157 | 414k | 329729984U, // LD1SB_H |
4158 | 414k | 329729984U, // LD1SB_H_IMM_REAL |
4159 | 414k | 329648064U, // LD1SB_S |
4160 | 414k | 329648064U, // LD1SB_S_IMM_REAL |
4161 | 414k | 329633306U, // LD1SH_D |
4162 | 414k | 329633306U, // LD1SH_D_IMM_REAL |
4163 | 414k | 329649690U, // LD1SH_S |
4164 | 414k | 329649690U, // LD1SH_S_IMM_REAL |
4165 | 414k | 329636399U, // LD1SW_D |
4166 | 414k | 329636399U, // LD1SW_D_IMM_REAL |
4167 | 414k | 491561U, // LD1Threev16b |
4168 | 414k | 90685481U, // LD1Threev16b_POST |
4169 | 414k | 524329U, // LD1Threev1d |
4170 | 414k | 92815401U, // LD1Threev1d_POST |
4171 | 414k | 557097U, // LD1Threev2d |
4172 | 414k | 90751017U, // LD1Threev2d_POST |
4173 | 414k | 589865U, // LD1Threev2s |
4174 | 414k | 92880937U, // LD1Threev2s_POST |
4175 | 414k | 622633U, // LD1Threev4h |
4176 | 414k | 92913705U, // LD1Threev4h_POST |
4177 | 414k | 655401U, // LD1Threev4s |
4178 | 414k | 90849321U, // LD1Threev4s_POST |
4179 | 414k | 688169U, // LD1Threev8b |
4180 | 414k | 92979241U, // LD1Threev8b_POST |
4181 | 414k | 720937U, // LD1Threev8h |
4182 | 414k | 90914857U, // LD1Threev8h_POST |
4183 | 414k | 491561U, // LD1Twov16b |
4184 | 414k | 78102569U, // LD1Twov16b_POST |
4185 | 414k | 524329U, // LD1Twov1d |
4186 | 414k | 80232489U, // LD1Twov1d_POST |
4187 | 414k | 557097U, // LD1Twov2d |
4188 | 414k | 78168105U, // LD1Twov2d_POST |
4189 | 414k | 589865U, // LD1Twov2s |
4190 | 414k | 80298025U, // LD1Twov2s_POST |
4191 | 414k | 622633U, // LD1Twov4h |
4192 | 414k | 80330793U, // LD1Twov4h_POST |
4193 | 414k | 655401U, // LD1Twov4s |
4194 | 414k | 78266409U, // LD1Twov4s_POST |
4195 | 414k | 688169U, // LD1Twov8b |
4196 | 414k | 80396329U, // LD1Twov8b_POST |
4197 | 414k | 720937U, // LD1Twov8h |
4198 | 414k | 78331945U, // LD1Twov8h_POST |
4199 | 414k | 329652588U, // LD1W |
4200 | 414k | 329636204U, // LD1W_D |
4201 | 414k | 329636204U, // LD1W_D_IMM_REAL |
4202 | 414k | 329652588U, // LD1W_IMM_REAL |
4203 | 414k | 3047596524U, // LD1_MXIPXX_H_B |
4204 | 414k | 3047596538U, // LD1_MXIPXX_H_D |
4205 | 414k | 3047596552U, // LD1_MXIPXX_H_H |
4206 | 414k | 3047596566U, // LD1_MXIPXX_H_Q |
4207 | 414k | 3047596580U, // LD1_MXIPXX_H_S |
4208 | 414k | 3047612908U, // LD1_MXIPXX_V_B |
4209 | 414k | 3047612922U, // LD1_MXIPXX_V_D |
4210 | 414k | 3047612936U, // LD1_MXIPXX_V_H |
4211 | 414k | 3047612950U, // LD1_MXIPXX_V_Q |
4212 | 414k | 3047612964U, // LD1_MXIPXX_V_S |
4213 | 414k | 97222697U, // LD1i16 |
4214 | 414k | 99336233U, // LD1i16_POST |
4215 | 414k | 97255465U, // LD1i32 |
4216 | 414k | 101466153U, // LD1i32_POST |
4217 | 414k | 97288233U, // LD1i64 |
4218 | 414k | 103596073U, // LD1i64_POST |
4219 | 414k | 97321001U, // LD1i8 |
4220 | 414k | 105725993U, // LD1i8_POST |
4221 | 414k | 329712646U, // LD2B |
4222 | 414k | 329712646U, // LD2B_IMM |
4223 | 414k | 329632074U, // LD2D |
4224 | 414k | 329632074U, // LD2D_IMM |
4225 | 414k | 329730980U, // LD2H |
4226 | 414k | 329730980U, // LD2H_IMM |
4227 | 414k | 496528U, // LD2Rv16b |
4228 | 414k | 88593296U, // LD2Rv16b_POST |
4229 | 414k | 529296U, // LD2Rv1d |
4230 | 414k | 80237456U, // LD2Rv1d_POST |
4231 | 414k | 562064U, // LD2Rv2d |
4232 | 414k | 80270224U, // LD2Rv2d_POST |
4233 | 414k | 594832U, // LD2Rv2s |
4234 | 414k | 82400144U, // LD2Rv2s_POST |
4235 | 414k | 627600U, // LD2Rv4h |
4236 | 414k | 86627216U, // LD2Rv4h_POST |
4237 | 414k | 660368U, // LD2Rv4s |
4238 | 414k | 82465680U, // LD2Rv4s_POST |
4239 | 414k | 693136U, // LD2Rv8b |
4240 | 414k | 88789904U, // LD2Rv8b_POST |
4241 | 414k | 725904U, // LD2Rv8h |
4242 | 414k | 86725520U, // LD2Rv8h_POST |
4243 | 414k | 491659U, // LD2Twov16b |
4244 | 414k | 78102667U, // LD2Twov16b_POST |
4245 | 414k | 557195U, // LD2Twov2d |
4246 | 414k | 78168203U, // LD2Twov2d_POST |
4247 | 414k | 589963U, // LD2Twov2s |
4248 | 414k | 80298123U, // LD2Twov2s_POST |
4249 | 414k | 622731U, // LD2Twov4h |
4250 | 414k | 80330891U, // LD2Twov4h_POST |
4251 | 414k | 655499U, // LD2Twov4s |
4252 | 414k | 78266507U, // LD2Twov4s_POST |
4253 | 414k | 688267U, // LD2Twov8b |
4254 | 414k | 80396427U, // LD2Twov8b_POST |
4255 | 414k | 721035U, // LD2Twov8h |
4256 | 414k | 78332043U, // LD2Twov8h_POST |
4257 | 414k | 329652640U, // LD2W |
4258 | 414k | 329652640U, // LD2W_IMM |
4259 | 414k | 97222795U, // LD2i16 |
4260 | 414k | 101433483U, // LD2i16_POST |
4261 | 414k | 97255563U, // LD2i32 |
4262 | 414k | 103563403U, // LD2i32_POST |
4263 | 414k | 97288331U, // LD2i64 |
4264 | 414k | 107790475U, // LD2i64_POST |
4265 | 414k | 97321099U, // LD2i8 |
4266 | 414k | 99434635U, // LD2i8_POST |
4267 | 414k | 329712667U, // LD3B |
4268 | 414k | 329712667U, // LD3B_IMM |
4269 | 414k | 329632086U, // LD3D |
4270 | 414k | 329632086U, // LD3D_IMM |
4271 | 414k | 329730992U, // LD3H |
4272 | 414k | 329730992U, // LD3H_IMM |
4273 | 414k | 496534U, // LD3Rv16b |
4274 | 414k | 109564822U, // LD3Rv16b_POST |
4275 | 414k | 529302U, // LD3Rv1d |
4276 | 414k | 92820374U, // LD3Rv1d_POST |
4277 | 414k | 562070U, // LD3Rv2d |
4278 | 414k | 92853142U, // LD3Rv2d_POST |
4279 | 414k | 594838U, // LD3Rv2s |
4280 | 414k | 111760278U, // LD3Rv2s_POST |
4281 | 414k | 627606U, // LD3Rv4h |
4282 | 414k | 113890198U, // LD3Rv4h_POST |
4283 | 414k | 660374U, // LD3Rv4s |
4284 | 414k | 111825814U, // LD3Rv4s_POST |
4285 | 414k | 693142U, // LD3Rv8b |
4286 | 414k | 109761430U, // LD3Rv8b_POST |
4287 | 414k | 725910U, // LD3Rv8h |
4288 | 414k | 113988502U, // LD3Rv8h_POST |
4289 | 414k | 492067U, // LD3Threev16b |
4290 | 414k | 90685987U, // LD3Threev16b_POST |
4291 | 414k | 557603U, // LD3Threev2d |
4292 | 414k | 90751523U, // LD3Threev2d_POST |
4293 | 414k | 590371U, // LD3Threev2s |
4294 | 414k | 92881443U, // LD3Threev2s_POST |
4295 | 414k | 623139U, // LD3Threev4h |
4296 | 414k | 92914211U, // LD3Threev4h_POST |
4297 | 414k | 655907U, // LD3Threev4s |
4298 | 414k | 90849827U, // LD3Threev4s_POST |
4299 | 414k | 688675U, // LD3Threev8b |
4300 | 414k | 92979747U, // LD3Threev8b_POST |
4301 | 414k | 721443U, // LD3Threev8h |
4302 | 414k | 90915363U, // LD3Threev8h_POST |
4303 | 414k | 329652652U, // LD3W |
4304 | 414k | 329652652U, // LD3W_IMM |
4305 | 414k | 97223203U, // LD3i16 |
4306 | 414k | 116113955U, // LD3i16_POST |
4307 | 414k | 97255971U, // LD3i32 |
4308 | 414k | 118243875U, // LD3i32_POST |
4309 | 414k | 97288739U, // LD3i64 |
4310 | 414k | 120373795U, // LD3i64_POST |
4311 | 414k | 97321507U, // LD3i8 |
4312 | 414k | 122503715U, // LD3i8_POST |
4313 | 414k | 329712693U, // LD4B |
4314 | 414k | 329712693U, // LD4B_IMM |
4315 | 414k | 329632098U, // LD4D |
4316 | 414k | 329632098U, // LD4D_IMM |
4317 | 414k | 492097U, // LD4Fourv16b |
4318 | 414k | 76005953U, // LD4Fourv16b_POST |
4319 | 414k | 557633U, // LD4Fourv2d |
4320 | 414k | 76071489U, // LD4Fourv2d_POST |
4321 | 414k | 590401U, // LD4Fourv2s |
4322 | 414k | 78201409U, // LD4Fourv2s_POST |
4323 | 414k | 623169U, // LD4Fourv4h |
4324 | 414k | 78234177U, // LD4Fourv4h_POST |
4325 | 414k | 655937U, // LD4Fourv4s |
4326 | 414k | 76169793U, // LD4Fourv4s_POST |
4327 | 414k | 688705U, // LD4Fourv8b |
4328 | 414k | 78299713U, // LD4Fourv8b_POST |
4329 | 414k | 721473U, // LD4Fourv8h |
4330 | 414k | 76235329U, // LD4Fourv8h_POST |
4331 | 414k | 329731004U, // LD4H |
4332 | 414k | 329731004U, // LD4H_IMM |
4333 | 414k | 496540U, // LD4Rv16b |
4334 | 414k | 86496156U, // LD4Rv16b_POST |
4335 | 414k | 529308U, // LD4Rv1d |
4336 | 414k | 78140316U, // LD4Rv1d_POST |
4337 | 414k | 562076U, // LD4Rv2d |
4338 | 414k | 78173084U, // LD4Rv2d_POST |
4339 | 414k | 594844U, // LD4Rv2s |
4340 | 414k | 80303004U, // LD4Rv2s_POST |
4341 | 414k | 627612U, // LD4Rv4h |
4342 | 414k | 82432924U, // LD4Rv4h_POST |
4343 | 414k | 660380U, // LD4Rv4s |
4344 | 414k | 80368540U, // LD4Rv4s_POST |
4345 | 414k | 693148U, // LD4Rv8b |
4346 | 414k | 86692764U, // LD4Rv8b_POST |
4347 | 414k | 725916U, // LD4Rv8h |
4348 | 414k | 82531228U, // LD4Rv8h_POST |
4349 | 414k | 329652664U, // LD4W |
4350 | 414k | 329652664U, // LD4W_IMM |
4351 | 414k | 97223233U, // LD4i16 |
4352 | 414k | 103531073U, // LD4i16_POST |
4353 | 414k | 97256001U, // LD4i32 |
4354 | 414k | 107758145U, // LD4i32_POST |
4355 | 414k | 97288769U, // LD4i64 |
4356 | 414k | 124568129U, // LD4i64_POST |
4357 | 414k | 97321537U, // LD4i8 |
4358 | 414k | 101532225U, // LD4i8_POST |
4359 | 414k | 885799U, // LD64B |
4360 | 414k | 3223536705U, // LDADDAB |
4361 | 414k | 3223538641U, // LDADDAH |
4362 | 414k | 3223536927U, // LDADDALB |
4363 | 414k | 3223538815U, // LDADDALH |
4364 | 414k | 3223539483U, // LDADDALW |
4365 | 414k | 3223539483U, // LDADDALX |
4366 | 414k | 3223536282U, // LDADDAW |
4367 | 414k | 3223536282U, // LDADDAX |
4368 | 414k | 3223536863U, // LDADDB |
4369 | 414k | 3223538801U, // LDADDH |
4370 | 414k | 3223537108U, // LDADDLB |
4371 | 414k | 3223538915U, // LDADDLH |
4372 | 414k | 3223539660U, // LDADDLW |
4373 | 414k | 3223539660U, // LDADDLX |
4374 | 414k | 3223538122U, // LDADDW |
4375 | 414k | 3223538122U, // LDADDX |
4376 | 414k | 838879079U, // LDAPRB |
4377 | 414k | 838880705U, // LDAPRH |
4378 | 414k | 838882415U, // LDAPRW |
4379 | 414k | 838882415U, // LDAPRX |
4380 | 414k | 838879122U, // LDAPURBi |
4381 | 414k | 838880748U, // LDAPURHi |
4382 | 414k | 838879262U, // LDAPURSBWi |
4383 | 414k | 838879262U, // LDAPURSBXi |
4384 | 414k | 838880875U, // LDAPURSHWi |
4385 | 414k | 838880875U, // LDAPURSHXi |
4386 | 414k | 838883959U, // LDAPURSWi |
4387 | 414k | 838882496U, // LDAPURXi |
4388 | 414k | 838882496U, // LDAPURi |
4389 | 414k | 838879027U, // LDARB |
4390 | 414k | 838880653U, // LDARH |
4391 | 414k | 838882210U, // LDARW |
4392 | 414k | 838882210U, // LDARX |
4393 | 414k | 807424836U, // LDAXPW |
4394 | 414k | 807424836U, // LDAXPX |
4395 | 414k | 838879138U, // LDAXRB |
4396 | 414k | 838880764U, // LDAXRH |
4397 | 414k | 838882540U, // LDAXRW |
4398 | 414k | 838882540U, // LDAXRX |
4399 | 414k | 3223536761U, // LDCLRAB |
4400 | 414k | 3223538698U, // LDCLRAH |
4401 | 414k | 3223537002U, // LDCLRALB |
4402 | 414k | 3223538855U, // LDCLRALH |
4403 | 414k | 3223539557U, // LDCLRALW |
4404 | 414k | 3223539557U, // LDCLRALX |
4405 | 414k | 3223536450U, // LDCLRAW |
4406 | 414k | 3223536450U, // LDCLRAX |
4407 | 414k | 3223537480U, // LDCLRB |
4408 | 414k | 3223539106U, // LDCLRH |
4409 | 414k | 3223537210U, // LDCLRLB |
4410 | 414k | 3223538951U, // LDCLRLH |
4411 | 414k | 3223539866U, // LDCLRLW |
4412 | 414k | 3223539866U, // LDCLRLX |
4413 | 414k | 3223540754U, // LDCLRW |
4414 | 414k | 3223540754U, // LDCLRX |
4415 | 414k | 3223536770U, // LDEORAB |
4416 | 414k | 3223538707U, // LDEORAH |
4417 | 414k | 3223537012U, // LDEORALB |
4418 | 414k | 3223538865U, // LDEORALH |
4419 | 414k | 3223539566U, // LDEORALW |
4420 | 414k | 3223539566U, // LDEORALX |
4421 | 414k | 3223536458U, // LDEORAW |
4422 | 414k | 3223536458U, // LDEORAX |
4423 | 414k | 3223537503U, // LDEORB |
4424 | 414k | 3223539129U, // LDEORH |
4425 | 414k | 3223537219U, // LDEORLB |
4426 | 414k | 3223538960U, // LDEORLH |
4427 | 414k | 3223539874U, // LDEORLW |
4428 | 414k | 3223539874U, // LDEORLX |
4429 | 414k | 3223540830U, // LDEORW |
4430 | 414k | 3223540830U, // LDEORX |
4431 | 414k | 329630671U, // LDFF1B_D_REAL |
4432 | 414k | 329728975U, // LDFF1B_H_REAL |
4433 | 414k | 329712591U, // LDFF1B_REAL |
4434 | 414k | 329647055U, // LDFF1B_S_REAL |
4435 | 414k | 329632036U, // LDFF1D_REAL |
4436 | 414k | 329632621U, // LDFF1H_D_REAL |
4437 | 414k | 329730925U, // LDFF1H_REAL |
4438 | 414k | 329649005U, // LDFF1H_S_REAL |
4439 | 414k | 329631687U, // LDFF1SB_D_REAL |
4440 | 414k | 329729991U, // LDFF1SB_H_REAL |
4441 | 414k | 329648071U, // LDFF1SB_S_REAL |
4442 | 414k | 329633313U, // LDFF1SH_D_REAL |
4443 | 414k | 329649697U, // LDFF1SH_S_REAL |
4444 | 414k | 329636406U, // LDFF1SW_D_REAL |
4445 | 414k | 329636210U, // LDFF1W_D_REAL |
4446 | 414k | 329652594U, // LDFF1W_REAL |
4447 | 414k | 302205742U, // LDG |
4448 | 414k | 838881596U, // LDGM |
4449 | 414k | 838879034U, // LDLARB |
4450 | 414k | 838880660U, // LDLARH |
4451 | 414k | 838882216U, // LDLARW |
4452 | 414k | 838882216U, // LDLARX |
4453 | 414k | 329630679U, // LDNF1B_D_IMM_REAL |
4454 | 414k | 329728983U, // LDNF1B_H_IMM_REAL |
4455 | 414k | 329712599U, // LDNF1B_IMM_REAL |
4456 | 414k | 329647063U, // LDNF1B_S_IMM_REAL |
4457 | 414k | 329632044U, // LDNF1D_IMM_REAL |
4458 | 414k | 329632629U, // LDNF1H_D_IMM_REAL |
4459 | 414k | 329730933U, // LDNF1H_IMM_REAL |
4460 | 414k | 329649013U, // LDNF1H_S_IMM_REAL |
4461 | 414k | 329631696U, // LDNF1SB_D_IMM_REAL |
4462 | 414k | 329730000U, // LDNF1SB_H_IMM_REAL |
4463 | 414k | 329648080U, // LDNF1SB_S_IMM_REAL |
4464 | 414k | 329633322U, // LDNF1SH_D_IMM_REAL |
4465 | 414k | 329649706U, // LDNF1SH_S_IMM_REAL |
4466 | 414k | 329636415U, // LDNF1SW_D_IMM_REAL |
4467 | 414k | 329636218U, // LDNF1W_D_IMM_REAL |
4468 | 414k | 329652602U, // LDNF1W_IMM_REAL |
4469 | 414k | 807424755U, // LDNPDi |
4470 | 414k | 807424755U, // LDNPQi |
4471 | 414k | 807424755U, // LDNPSi |
4472 | 414k | 807424755U, // LDNPWi |
4473 | 414k | 807424755U, // LDNPXi |
4474 | 414k | 329712607U, // LDNT1B_ZRI |
4475 | 414k | 329712607U, // LDNT1B_ZRR |
4476 | 414k | 1134937055U, // LDNT1B_ZZR_D_REAL |
4477 | 414k | 1403388895U, // LDNT1B_ZZR_S_REAL |
4478 | 414k | 329632052U, // LDNT1D_ZRI |
4479 | 414k | 329632052U, // LDNT1D_ZRR |
4480 | 414k | 1134938420U, // LDNT1D_ZZR_D_REAL |
4481 | 414k | 329730941U, // LDNT1H_ZRI |
4482 | 414k | 329730941U, // LDNT1H_ZRR |
4483 | 414k | 1134939005U, // LDNT1H_ZZR_D_REAL |
4484 | 414k | 1403390845U, // LDNT1H_ZZR_S_REAL |
4485 | 414k | 1134938073U, // LDNT1SB_ZZR_D_REAL |
4486 | 414k | 1403389913U, // LDNT1SB_ZZR_S_REAL |
4487 | 414k | 1134939699U, // LDNT1SH_ZZR_D_REAL |
4488 | 414k | 1403391539U, // LDNT1SH_ZZR_S_REAL |
4489 | 414k | 1134942792U, // LDNT1SW_ZZR_D_REAL |
4490 | 414k | 329652610U, // LDNT1W_ZRI |
4491 | 414k | 329652610U, // LDNT1W_ZRR |
4492 | 414k | 1134942594U, // LDNT1W_ZZR_D_REAL |
4493 | 414k | 1403394434U, // LDNT1W_ZZR_S_REAL |
4494 | 414k | 807424659U, // LDPDi |
4495 | 414k | 270750355U, // LDPDpost |
4496 | 414k | 270750355U, // LDPDpre |
4497 | 414k | 807424659U, // LDPQi |
4498 | 414k | 270750355U, // LDPQpost |
4499 | 414k | 270750355U, // LDPQpre |
4500 | 414k | 807426641U, // LDPSWi |
4501 | 414k | 270752337U, // LDPSWpost |
4502 | 414k | 270752337U, // LDPSWpre |
4503 | 414k | 807424659U, // LDPSi |
4504 | 414k | 270750355U, // LDPSpost |
4505 | 414k | 270750355U, // LDPSpre |
4506 | 414k | 807424659U, // LDPWi |
4507 | 414k | 270750355U, // LDPWpost |
4508 | 414k | 270750355U, // LDPWpre |
4509 | 414k | 807424659U, // LDPXi |
4510 | 414k | 270750355U, // LDPXpost |
4511 | 414k | 270750355U, // LDPXpre |
4512 | 414k | 838877817U, // LDRAAindexed |
4513 | 414k | 302203513U, // LDRAAwriteback |
4514 | 414k | 838878315U, // LDRABindexed |
4515 | 414k | 302204011U, // LDRABwriteback |
4516 | 414k | 302204738U, // LDRBBpost |
4517 | 414k | 302204738U, // LDRBBpre |
4518 | 414k | 838879042U, // LDRBBroW |
4519 | 414k | 838879042U, // LDRBBroX |
4520 | 414k | 838879042U, // LDRBBui |
4521 | 414k | 302207968U, // LDRBpost |
4522 | 414k | 302207968U, // LDRBpre |
4523 | 414k | 838882272U, // LDRBroW |
4524 | 414k | 838882272U, // LDRBroX |
4525 | 414k | 838882272U, // LDRBui |
4526 | 414k | 1075860448U, // LDRDl |
4527 | 414k | 302207968U, // LDRDpost |
4528 | 414k | 302207968U, // LDRDpre |
4529 | 414k | 838882272U, // LDRDroW |
4530 | 414k | 838882272U, // LDRDroX |
4531 | 414k | 838882272U, // LDRDui |
4532 | 414k | 302206364U, // LDRHHpost |
4533 | 414k | 302206364U, // LDRHHpre |
4534 | 414k | 838880668U, // LDRHHroW |
4535 | 414k | 838880668U, // LDRHHroX |
4536 | 414k | 838880668U, // LDRHHui |
4537 | 414k | 302207968U, // LDRHpost |
4538 | 414k | 302207968U, // LDRHpre |
4539 | 414k | 838882272U, // LDRHroW |
4540 | 414k | 838882272U, // LDRHroX |
4541 | 414k | 838882272U, // LDRHui |
4542 | 414k | 1075860448U, // LDRQl |
4543 | 414k | 302207968U, // LDRQpost |
4544 | 414k | 302207968U, // LDRQpre |
4545 | 414k | 838882272U, // LDRQroW |
4546 | 414k | 838882272U, // LDRQroX |
4547 | 414k | 838882272U, // LDRQui |
4548 | 414k | 302204935U, // LDRSBWpost |
4549 | 414k | 302204935U, // LDRSBWpre |
4550 | 414k | 838879239U, // LDRSBWroW |
4551 | 414k | 838879239U, // LDRSBWroX |
4552 | 414k | 838879239U, // LDRSBWui |
4553 | 414k | 302204935U, // LDRSBXpost |
4554 | 414k | 302204935U, // LDRSBXpre |
4555 | 414k | 838879239U, // LDRSBXroW |
4556 | 414k | 838879239U, // LDRSBXroX |
4557 | 414k | 838879239U, // LDRSBXui |
4558 | 414k | 302206548U, // LDRSHWpost |
4559 | 414k | 302206548U, // LDRSHWpre |
4560 | 414k | 838880852U, // LDRSHWroW |
4561 | 414k | 838880852U, // LDRSHWroX |
4562 | 414k | 838880852U, // LDRSHWui |
4563 | 414k | 302206548U, // LDRSHXpost |
4564 | 414k | 302206548U, // LDRSHXpre |
4565 | 414k | 838880852U, // LDRSHXroW |
4566 | 414k | 838880852U, // LDRSHXroX |
4567 | 414k | 838880852U, // LDRSHXui |
4568 | 414k | 1075862112U, // LDRSWl |
4569 | 414k | 302209632U, // LDRSWpost |
4570 | 414k | 302209632U, // LDRSWpre |
4571 | 414k | 838883936U, // LDRSWroW |
4572 | 414k | 838883936U, // LDRSWroX |
4573 | 414k | 838883936U, // LDRSWui |
4574 | 414k | 1075860448U, // LDRSl |
4575 | 414k | 302207968U, // LDRSpost |
4576 | 414k | 302207968U, // LDRSpre |
4577 | 414k | 838882272U, // LDRSroW |
4578 | 414k | 838882272U, // LDRSroX |
4579 | 414k | 838882272U, // LDRSui |
4580 | 414k | 1075860448U, // LDRWl |
4581 | 414k | 302207968U, // LDRWpost |
4582 | 414k | 302207968U, // LDRWpre |
4583 | 414k | 838882272U, // LDRWroW |
4584 | 414k | 838882272U, // LDRWroX |
4585 | 414k | 838882272U, // LDRWui |
4586 | 414k | 1075860448U, // LDRXl |
4587 | 414k | 302207968U, // LDRXpost |
4588 | 414k | 302207968U, // LDRXpre |
4589 | 414k | 838882272U, // LDRXroW |
4590 | 414k | 838882272U, // LDRXroX |
4591 | 414k | 838882272U, // LDRXui |
4592 | 414k | 839767008U, // LDR_PXI |
4593 | 414k | 922592U, // LDR_ZA |
4594 | 414k | 839767008U, // LDR_ZXI |
4595 | 414k | 3223536786U, // LDSETAB |
4596 | 414k | 3223538723U, // LDSETAH |
4597 | 414k | 3223537030U, // LDSETALB |
4598 | 414k | 3223538883U, // LDSETALH |
4599 | 414k | 3223539582U, // LDSETALW |
4600 | 414k | 3223539582U, // LDSETALX |
4601 | 414k | 3223536498U, // LDSETAW |
4602 | 414k | 3223536498U, // LDSETAX |
4603 | 414k | 3223537709U, // LDSETB |
4604 | 414k | 3223539317U, // LDSETH |
4605 | 414k | 3223537269U, // LDSETLB |
4606 | 414k | 3223538976U, // LDSETLH |
4607 | 414k | 3223539930U, // LDSETLW |
4608 | 414k | 3223539930U, // LDSETLX |
4609 | 414k | 3223541365U, // LDSETW |
4610 | 414k | 3223541365U, // LDSETX |
4611 | 414k | 3223536795U, // LDSMAXAB |
4612 | 414k | 3223538732U, // LDSMAXAH |
4613 | 414k | 3223537040U, // LDSMAXALB |
4614 | 414k | 3223538893U, // LDSMAXALH |
4615 | 414k | 3223539591U, // LDSMAXALW |
4616 | 414k | 3223539591U, // LDSMAXALX |
4617 | 414k | 3223536535U, // LDSMAXAW |
4618 | 414k | 3223536535U, // LDSMAXAX |
4619 | 414k | 3223537846U, // LDSMAXB |
4620 | 414k | 3223539349U, // LDSMAXH |
4621 | 414k | 3223537278U, // LDSMAXLB |
4622 | 414k | 3223539018U, // LDSMAXLH |
4623 | 414k | 3223539985U, // LDSMAXLW |
4624 | 414k | 3223539985U, // LDSMAXLX |
4625 | 414k | 3223542465U, // LDSMAXW |
4626 | 414k | 3223542465U, // LDSMAXX |
4627 | 414k | 3223536714U, // LDSMINAB |
4628 | 414k | 3223538671U, // LDSMINAH |
4629 | 414k | 3223536972U, // LDSMINALB |
4630 | 414k | 3223538825U, // LDSMINALH |
4631 | 414k | 3223539522U, // LDSMINALW |
4632 | 414k | 3223539522U, // LDSMINALX |
4633 | 414k | 3223536381U, // LDSMINAW |
4634 | 414k | 3223536381U, // LDSMINAX |
4635 | 414k | 3223537321U, // LDSMINB |
4636 | 414k | 3223539038U, // LDSMINH |
4637 | 414k | 3223537183U, // LDSMINLB |
4638 | 414k | 3223538924U, // LDSMINLH |
4639 | 414k | 3223539828U, // LDSMINLW |
4640 | 414k | 3223539828U, // LDSMINLX |
4641 | 414k | 3223540120U, // LDSMINW |
4642 | 414k | 3223540120U, // LDSMINX |
4643 | 414k | 838879087U, // LDTRBi |
4644 | 414k | 838880713U, // LDTRHi |
4645 | 414k | 838879246U, // LDTRSBWi |
4646 | 414k | 838879246U, // LDTRSBXi |
4647 | 414k | 838880859U, // LDTRSHWi |
4648 | 414k | 838880859U, // LDTRSHXi |
4649 | 414k | 838883943U, // LDTRSWi |
4650 | 414k | 838882460U, // LDTRWi |
4651 | 414k | 838882460U, // LDTRXi |
4652 | 414k | 3223536805U, // LDUMAXAB |
4653 | 414k | 3223538742U, // LDUMAXAH |
4654 | 414k | 3223537051U, // LDUMAXALB |
4655 | 414k | 3223538904U, // LDUMAXALH |
4656 | 414k | 3223539601U, // LDUMAXALW |
4657 | 414k | 3223539601U, // LDUMAXALX |
4658 | 414k | 3223536544U, // LDUMAXAW |
4659 | 414k | 3223536544U, // LDUMAXAX |
4660 | 414k | 3223537855U, // LDUMAXB |
4661 | 414k | 3223539358U, // LDUMAXH |
4662 | 414k | 3223537288U, // LDUMAXLB |
4663 | 414k | 3223539028U, // LDUMAXLH |
4664 | 414k | 3223539994U, // LDUMAXLW |
4665 | 414k | 3223539994U, // LDUMAXLX |
4666 | 414k | 3223542473U, // LDUMAXW |
4667 | 414k | 3223542473U, // LDUMAXX |
4668 | 414k | 3223536724U, // LDUMINAB |
4669 | 414k | 3223538681U, // LDUMINAH |
4670 | 414k | 3223536983U, // LDUMINALB |
4671 | 414k | 3223538836U, // LDUMINALH |
4672 | 414k | 3223539532U, // LDUMINALW |
4673 | 414k | 3223539532U, // LDUMINALX |
4674 | 414k | 3223536390U, // LDUMINAW |
4675 | 414k | 3223536390U, // LDUMINAX |
4676 | 414k | 3223537330U, // LDUMINB |
4677 | 414k | 3223539047U, // LDUMINH |
4678 | 414k | 3223537193U, // LDUMINLB |
4679 | 414k | 3223538934U, // LDUMINLH |
4680 | 414k | 3223539837U, // LDUMINLW |
4681 | 414k | 3223539837U, // LDUMINLX |
4682 | 414k | 3223540128U, // LDUMINW |
4683 | 414k | 3223540128U, // LDUMINX |
4684 | 414k | 838879107U, // LDURBBi |
4685 | 414k | 838882483U, // LDURBi |
4686 | 414k | 838882483U, // LDURDi |
4687 | 414k | 838880733U, // LDURHHi |
4688 | 414k | 838882483U, // LDURHi |
4689 | 414k | 838882483U, // LDURQi |
4690 | 414k | 838879254U, // LDURSBWi |
4691 | 414k | 838879254U, // LDURSBXi |
4692 | 414k | 838880867U, // LDURSHWi |
4693 | 414k | 838880867U, // LDURSHXi |
4694 | 414k | 838883951U, // LDURSWi |
4695 | 414k | 838882483U, // LDURSi |
4696 | 414k | 838882483U, // LDURWi |
4697 | 414k | 838882483U, // LDURXi |
4698 | 414k | 807424864U, // LDXPW |
4699 | 414k | 807424864U, // LDXPX |
4700 | 414k | 838879146U, // LDXRB |
4701 | 414k | 838880772U, // LDXRH |
4702 | 414k | 838882547U, // LDXRW |
4703 | 414k | 838882547U, // LDXRX |
4704 | 414k | 3223360594U, // LSLR_ZPmZ_B |
4705 | 414k | 3223376978U, // LSLR_ZPmZ_D |
4706 | 414k | 3519091794U, // LSLR_ZPmZ_H |
4707 | 414k | 3223409746U, // LSLR_ZPmZ_S |
4708 | 414k | 807424186U, // LSLVWr |
4709 | 414k | 807424186U, // LSLVXr |
4710 | 414k | 3223359674U, // LSL_WIDE_ZPmZ_B |
4711 | 414k | 3519090874U, // LSL_WIDE_ZPmZ_H |
4712 | 414k | 3223408826U, // LSL_WIDE_ZPmZ_S |
4713 | 414k | 3760230586U, // LSL_WIDE_ZZZ_B |
4714 | 414k | 2179010746U, // LSL_WIDE_ZZZ_H |
4715 | 414k | 4028715194U, // LSL_WIDE_ZZZ_S |
4716 | 414k | 3223359674U, // LSL_ZPmI_B |
4717 | 414k | 3223376058U, // LSL_ZPmI_D |
4718 | 414k | 3519090874U, // LSL_ZPmI_H |
4719 | 414k | 3223408826U, // LSL_ZPmI_S |
4720 | 414k | 3223359674U, // LSL_ZPmZ_B |
4721 | 414k | 3223376058U, // LSL_ZPmZ_D |
4722 | 414k | 3519090874U, // LSL_ZPmZ_H |
4723 | 414k | 3223408826U, // LSL_ZPmZ_S |
4724 | 414k | 3760230586U, // LSL_ZZI_B |
4725 | 414k | 2418069690U, // LSL_ZZI_D |
4726 | 414k | 2179010746U, // LSL_ZZI_H |
4727 | 414k | 4028715194U, // LSL_ZZI_S |
4728 | 414k | 3223360641U, // LSRR_ZPmZ_B |
4729 | 414k | 3223377025U, // LSRR_ZPmZ_D |
4730 | 414k | 3519091841U, // LSRR_ZPmZ_H |
4731 | 414k | 3223409793U, // LSRR_ZPmZ_S |
4732 | 414k | 807425164U, // LSRVWr |
4733 | 414k | 807425164U, // LSRVXr |
4734 | 414k | 3223360652U, // LSR_WIDE_ZPmZ_B |
4735 | 414k | 3519091852U, // LSR_WIDE_ZPmZ_H |
4736 | 414k | 3223409804U, // LSR_WIDE_ZPmZ_S |
4737 | 414k | 3760231564U, // LSR_WIDE_ZZZ_B |
4738 | 414k | 2179011724U, // LSR_WIDE_ZZZ_H |
4739 | 414k | 4028716172U, // LSR_WIDE_ZZZ_S |
4740 | 414k | 3223360652U, // LSR_ZPmI_B |
4741 | 414k | 3223377036U, // LSR_ZPmI_D |
4742 | 414k | 3519091852U, // LSR_ZPmI_H |
4743 | 414k | 3223409804U, // LSR_ZPmI_S |
4744 | 414k | 3223360652U, // LSR_ZPmZ_B |
4745 | 414k | 3223377036U, // LSR_ZPmZ_D |
4746 | 414k | 3519091852U, // LSR_ZPmZ_H |
4747 | 414k | 3223409804U, // LSR_ZPmZ_S |
4748 | 414k | 3760231564U, // LSR_ZZI_B |
4749 | 414k | 2418070668U, // LSR_ZZI_D |
4750 | 414k | 2179011724U, // LSR_ZZI_H |
4751 | 414k | 4028716172U, // LSR_ZZI_S |
4752 | 414k | 807422454U, // MADDWrrr |
4753 | 414k | 807422454U, // MADDXrrr |
4754 | 414k | 3223357807U, // MAD_ZPmZZ_B |
4755 | 414k | 3223374191U, // MAD_ZPmZZ_D |
4756 | 414k | 3519089007U, // MAD_ZPmZZ_H |
4757 | 414k | 3223406959U, // MAD_ZPmZZ_S |
4758 | 414k | 3223358570U, // MATCH_PPzZZ_B |
4759 | 414k | 1640041578U, // MATCH_PPzZZ_H |
4760 | 414k | 3223356116U, // MLA_ZPmZZ_B |
4761 | 414k | 3223372500U, // MLA_ZPmZZ_D |
4762 | 414k | 3519087316U, // MLA_ZPmZZ_H |
4763 | 414k | 3223405268U, // MLA_ZPmZZ_S |
4764 | 414k | 1075888852U, // MLA_ZZZI_D |
4765 | 414k | 2185298644U, // MLA_ZZZI_H |
4766 | 414k | 1344357076U, // MLA_ZZZI_S |
4767 | 414k | 2959213268U, // MLAv16i8 |
4768 | 414k | 2961310420U, // MLAv2i32 |
4769 | 414k | 2961310420U, // MLAv2i32_indexed |
4770 | 414k | 2965504724U, // MLAv4i16 |
4771 | 414k | 2965504724U, // MLAv4i16_indexed |
4772 | 414k | 2967601876U, // MLAv4i32 |
4773 | 414k | 2967601876U, // MLAv4i32_indexed |
4774 | 414k | 2969699028U, // MLAv8i16 |
4775 | 414k | 2969699028U, // MLAv8i16_indexed |
4776 | 414k | 2971796180U, // MLAv8i8 |
4777 | 414k | 3223360912U, // MLS_ZPmZZ_B |
4778 | 414k | 3223377296U, // MLS_ZPmZZ_D |
4779 | 414k | 3519092112U, // MLS_ZPmZZ_H |
4780 | 414k | 3223410064U, // MLS_ZPmZZ_S |
4781 | 414k | 1075893648U, // MLS_ZZZI_D |
4782 | 414k | 2185303440U, // MLS_ZZZI_H |
4783 | 414k | 1344361872U, // MLS_ZZZI_S |
4784 | 414k | 2959218064U, // MLSv16i8 |
4785 | 414k | 2961315216U, // MLSv2i32 |
4786 | 414k | 2961315216U, // MLSv2i32_indexed |
4787 | 414k | 2965509520U, // MLSv4i16 |
4788 | 414k | 2965509520U, // MLSv4i16_indexed |
4789 | 414k | 2967606672U, // MLSv4i32 |
4790 | 414k | 2967606672U, // MLSv4i32_indexed |
4791 | 414k | 2969703824U, // MLSv8i16 |
4792 | 414k | 2969703824U, // MLSv8i16_indexed |
4793 | 414k | 2971800976U, // MLSv8i8 |
4794 | 414k | 941323U, // MOPSSETGE |
4795 | 414k | 941384U, // MOPSSETGEN |
4796 | 414k | 942272U, // MOPSSETGET |
4797 | 414k | 941745U, // MOPSSETGETN |
4798 | 414k | 3491778300U, // MOVID |
4799 | 414k | 3764489980U, // MOVIv16b_ns |
4800 | 414k | 3500248828U, // MOVIv2d_ns |
4801 | 414k | 3766587132U, // MOVIv2i32 |
4802 | 414k | 3766587132U, // MOVIv2s_msl |
4803 | 414k | 3770781436U, // MOVIv4i16 |
4804 | 414k | 3772878588U, // MOVIv4i32 |
4805 | 414k | 3772878588U, // MOVIv4s_msl |
4806 | 414k | 3777072892U, // MOVIv8b_ns |
4807 | 414k | 3774975740U, // MOVIv8i16 |
4808 | 414k | 807423751U, // MOVKWi |
4809 | 414k | 807423751U, // MOVKXi |
4810 | 414k | 3760214553U, // MOVNWi |
4811 | 414k | 3760214553U, // MOVNXi |
4812 | 414k | 2136813U, // MOVPRFX_ZPmZ_B |
4813 | 414k | 2153197U, // MOVPRFX_ZPmZ_D |
4814 | 414k | 272702189U, // MOVPRFX_ZPmZ_H |
4815 | 414k | 2185965U, // MOVPRFX_ZPmZ_S |
4816 | 414k | 3223362285U, // MOVPRFX_ZPzZ_B |
4817 | 414k | 3223378669U, // MOVPRFX_ZPzZ_D |
4818 | 414k | 1640045293U, // MOVPRFX_ZPzZ_H |
4819 | 414k | 3223411437U, // MOVPRFX_ZPzZ_S |
4820 | 414k | 3224230637U, // MOVPRFX_ZZ |
4821 | 414k | 3760216952U, // MOVZWi |
4822 | 414k | 3760216952U, // MOVZXi |
4823 | 414k | 4028651004U, // MRS |
4824 | 414k | 3223357427U, // MSB_ZPmZZ_B |
4825 | 414k | 3223373811U, // MSB_ZPmZZ_D |
4826 | 414k | 3519088627U, // MSB_ZPmZZ_H |
4827 | 414k | 3223406579U, // MSB_ZPmZZ_S |
4828 | 414k | 955537U, // MSR |
4829 | 414k | 971921U, // MSRpstateImm1 |
4830 | 414k | 971921U, // MSRpstateImm4 |
4831 | 414k | 988305U, // MSRpstatesvcrImm1 |
4832 | 414k | 807422068U, // MSUBWrrr |
4833 | 414k | 807422068U, // MSUBXrrr |
4834 | 414k | 3760230634U, // MUL_ZI_B |
4835 | 414k | 2418069738U, // MUL_ZI_D |
4836 | 414k | 2179010794U, // MUL_ZI_H |
4837 | 414k | 4028715242U, // MUL_ZI_S |
4838 | 414k | 3223359722U, // MUL_ZPmZ_B |
4839 | 414k | 3223376106U, // MUL_ZPmZ_D |
4840 | 414k | 3519090922U, // MUL_ZPmZ_H |
4841 | 414k | 3223408874U, // MUL_ZPmZ_S |
4842 | 414k | 2418069738U, // MUL_ZZZI_D |
4843 | 414k | 2179010794U, // MUL_ZZZI_H |
4844 | 414k | 4028715242U, // MUL_ZZZI_S |
4845 | 414k | 3760230634U, // MUL_ZZZ_B |
4846 | 414k | 2418069738U, // MUL_ZZZ_D |
4847 | 414k | 2179010794U, // MUL_ZZZ_H |
4848 | 414k | 4028715242U, // MUL_ZZZ_S |
4849 | 414k | 543265002U, // MULv16i8 |
4850 | 414k | 545362154U, // MULv2i32 |
4851 | 414k | 545362154U, // MULv2i32_indexed |
4852 | 414k | 549556458U, // MULv4i16 |
4853 | 414k | 549556458U, // MULv4i16_indexed |
4854 | 414k | 551653610U, // MULv4i32 |
4855 | 414k | 551653610U, // MULv4i32_indexed |
4856 | 414k | 553750762U, // MULv8i16 |
4857 | 414k | 553750762U, // MULv8i16_indexed |
4858 | 414k | 555847914U, // MULv8i8 |
4859 | 414k | 3766587113U, // MVNIv2i32 |
4860 | 414k | 3766587113U, // MVNIv2s_msl |
4861 | 414k | 3770781417U, // MVNIv4i16 |
4862 | 414k | 3772878569U, // MVNIv4i32 |
4863 | 414k | 3772878569U, // MVNIv4s_msl |
4864 | 414k | 3774975721U, // MVNIv8i16 |
4865 | 414k | 3223360860U, // NANDS_PPzPP |
4866 | 414k | 3223357978U, // NAND_PPzPP |
4867 | 414k | 2418069680U, // NBSL_ZZZZ |
4868 | 414k | 2132788U, // NEG_ZPmZ_B |
4869 | 414k | 2149172U, // NEG_ZPmZ_D |
4870 | 414k | 272698164U, // NEG_ZPmZ_H |
4871 | 414k | 2181940U, // NEG_ZPmZ_S |
4872 | 414k | 543263540U, // NEGv16i8 |
4873 | 414k | 807422772U, // NEGv1i64 |
4874 | 414k | 545360692U, // NEGv2i32 |
4875 | 414k | 547457844U, // NEGv2i64 |
4876 | 414k | 549554996U, // NEGv4i16 |
4877 | 414k | 551652148U, // NEGv4i32 |
4878 | 414k | 553749300U, // NEGv8i16 |
4879 | 414k | 555846452U, // NEGv8i8 |
4880 | 414k | 3223358569U, // NMATCH_PPzZZ_B |
4881 | 414k | 1640041577U, // NMATCH_PPzZZ_H |
4882 | 414k | 3223361031U, // NORS_PPzPP |
4883 | 414k | 3223360613U, // NOR_PPzPP |
4884 | 414k | 2136114U, // NOT_ZPmZ_B |
4885 | 414k | 2152498U, // NOT_ZPmZ_D |
4886 | 414k | 272701490U, // NOT_ZPmZ_H |
4887 | 414k | 2185266U, // NOT_ZPmZ_S |
4888 | 414k | 543266866U, // NOTv16i8 |
4889 | 414k | 555849778U, // NOTv8i8 |
4890 | 414k | 3223360951U, // ORNS_PPzPP |
4891 | 414k | 807424475U, // ORNWrs |
4892 | 414k | 807424475U, // ORNXrs |
4893 | 414k | 3223359963U, // ORN_PPzPP |
4894 | 414k | 543265243U, // ORNv16i8 |
4895 | 414k | 555848155U, // ORNv8i8 |
4896 | 414k | 3223361037U, // ORRS_PPzPP |
4897 | 414k | 807425142U, // ORRWri |
4898 | 414k | 807425142U, // ORRWrs |
4899 | 414k | 807425142U, // ORRXri |
4900 | 414k | 807425142U, // ORRXrs |
4901 | 414k | 3223360630U, // ORR_PPzPP |
4902 | 414k | 2418070646U, // ORR_ZI |
4903 | 414k | 3223360630U, // ORR_ZPmZ_B |
4904 | 414k | 3223377014U, // ORR_ZPmZ_D |
4905 | 414k | 3519091830U, // ORR_ZPmZ_H |
4906 | 414k | 3223409782U, // ORR_ZPmZ_S |
4907 | 414k | 2418070646U, // ORR_ZZZ |
4908 | 414k | 543265910U, // ORRv16i8 |
4909 | 414k | 813831286U, // ORRv2i32 |
4910 | 414k | 818025590U, // ORRv4i16 |
4911 | 414k | 820122742U, // ORRv4i32 |
4912 | 414k | 822219894U, // ORRv8i16 |
4913 | 414k | 555848822U, // ORRv8i8 |
4914 | 414k | 153938U, // ORV_VPZ_B |
4915 | 414k | 1646434642U, // ORV_VPZ_D |
4916 | 414k | 1648548178U, // ORV_VPZ_H |
4917 | 414k | 1638078802U, // ORV_VPZ_S |
4918 | 414k | 270746259U, // PACDA |
4919 | 414k | 270746840U, // PACDB |
4920 | 414k | 213929U, // PACDZA |
4921 | 414k | 215240U, // PACDZB |
4922 | 414k | 807420592U, // PACGA |
4923 | 414k | 270746302U, // PACIA |
4924 | 414k | 7296U, // PACIA1716 |
4925 | 414k | 7261U, // PACIASP |
4926 | 414k | 7252U, // PACIAZ |
4927 | 414k | 270746875U, // PACIB |
4928 | 414k | 7207U, // PACIB1716 |
4929 | 414k | 7287U, // PACIBSP |
4930 | 414k | 7270U, // PACIBZ |
4931 | 414k | 213945U, // PACIZA |
4932 | 414k | 215256U, // PACIZB |
4933 | 414k | 35542U, // PFALSE |
4934 | 414k | 3223361620U, // PFIRST_B |
4935 | 414k | 4028679687U, // PMULLB_ZZZ_D |
4936 | 414k | 2273379847U, // PMULLB_ZZZ_H |
4937 | 414k | 128288263U, // PMULLB_ZZZ_Q |
4938 | 414k | 4028684095U, // PMULLT_ZZZ_D |
4939 | 414k | 2273384255U, // PMULLT_ZZZ_H |
4940 | 414k | 128292671U, // PMULLT_ZZZ_Q |
4941 | 414k | 553746720U, // PMULLv16i8 |
4942 | 414k | 130125919U, // PMULLv1i64 |
4943 | 414k | 398557472U, // PMULLv2i64 |
4944 | 414k | 553750623U, // PMULLv8i8 |
4945 | 414k | 3760230646U, // PMUL_ZZZ_B |
4946 | 414k | 543265014U, // PMULv16i8 |
4947 | 414k | 555847926U, // PMULv8i8 |
4948 | 414k | 3223361680U, // PNEXT_B |
4949 | 414k | 3223378064U, // PNEXT_D |
4950 | 414k | 2176915600U, // PNEXT_H |
4951 | 414k | 3223410832U, // PNEXT_S |
4952 | 414k | 2184135918U, // PRFB_D_PZI |
4953 | 414k | 2215593198U, // PRFB_D_SCALED |
4954 | 414k | 2215593198U, // PRFB_D_SXTW_SCALED |
4955 | 414k | 2215593198U, // PRFB_D_UXTW_SCALED |
4956 | 414k | 2215593198U, // PRFB_PRI |
4957 | 414k | 2215593198U, // PRFB_PRR |
4958 | 414k | 2175747310U, // PRFB_S_PZI |
4959 | 414k | 2215593198U, // PRFB_S_SXTW_SCALED |
4960 | 414k | 2215593198U, // PRFB_S_UXTW_SCALED |
4961 | 414k | 2184137236U, // PRFD_D_PZI |
4962 | 414k | 2215594516U, // PRFD_D_SCALED |
4963 | 414k | 2215594516U, // PRFD_D_SXTW_SCALED |
4964 | 414k | 2215594516U, // PRFD_D_UXTW_SCALED |
4965 | 414k | 2215594516U, // PRFD_PRI |
4966 | 414k | 2215594516U, // PRFD_PRR |
4967 | 414k | 2175748628U, // PRFD_S_PZI |
4968 | 414k | 2215594516U, // PRFD_S_SXTW_SCALED |
4969 | 414k | 2215594516U, // PRFD_S_UXTW_SCALED |
4970 | 414k | 2184137849U, // PRFH_D_PZI |
4971 | 414k | 2215595129U, // PRFH_D_SCALED |
4972 | 414k | 2215595129U, // PRFH_D_SXTW_SCALED |
4973 | 414k | 2215595129U, // PRFH_D_UXTW_SCALED |
4974 | 414k | 2215595129U, // PRFH_PRI |
4975 | 414k | 2215595129U, // PRFH_PRR |
4976 | 414k | 2175749241U, // PRFH_S_PZI |
4977 | 414k | 2215595129U, // PRFH_S_SXTW_SCALED |
4978 | 414k | 2215595129U, // PRFH_S_UXTW_SCALED |
4979 | 414k | 1076859190U, // PRFMl |
4980 | 414k | 839881014U, // PRFMroW |
4981 | 414k | 839881014U, // PRFMroX |
4982 | 414k | 839881014U, // PRFMui |
4983 | 414k | 2215598601U, // PRFS_PRR |
4984 | 414k | 839881069U, // PRFUMi |
4985 | 414k | 2184141321U, // PRFW_D_PZI |
4986 | 414k | 2215598601U, // PRFW_D_SCALED |
4987 | 414k | 2215598601U, // PRFW_D_SXTW_SCALED |
4988 | 414k | 2215598601U, // PRFW_D_UXTW_SCALED |
4989 | 414k | 2215598601U, // PRFW_PRI |
4990 | 414k | 2175752713U, // PRFW_S_PZI |
4991 | 414k | 2215598601U, // PRFW_S_SXTW_SCALED |
4992 | 414k | 2215598601U, // PRFW_S_UXTW_SCALED |
4993 | 414k | 3224227842U, // PSEL_PPPRI_B |
4994 | 414k | 3224227842U, // PSEL_PPPRI_D |
4995 | 414k | 3224227842U, // PSEL_PPPRI_H |
4996 | 414k | 3224227842U, // PSEL_PPPRI_S |
4997 | 414k | 3761100870U, // PTEST_PP |
4998 | 414k | 1881183587U, // PTRUES_B |
4999 | 414k | 1881199971U, // PTRUES_D |
5000 | 414k | 132191587U, // PTRUES_H |
5001 | 414k | 1881232739U, // PTRUES_S |
5002 | 414k | 1881180912U, // PTRUE_B |
5003 | 414k | 1881197296U, // PTRUE_D |
5004 | 414k | 132188912U, // PTRUE_H |
5005 | 414k | 1881230064U, // PTRUE_S |
5006 | 414k | 1736511159U, // PUNPKHI_PP |
5007 | 414k | 1736512048U, // PUNPKLO_PP |
5008 | 414k | 1881179808U, // RADDHNB_ZZZ_B |
5009 | 414k | 2172716704U, // RADDHNB_ZZZ_H |
5010 | 414k | 2418099872U, // RADDHNB_ZZZ_S |
5011 | 414k | 2686490529U, // RADDHNT_ZZZ_B |
5012 | 414k | 2174818209U, // RADDHNT_ZZZ_H |
5013 | 414k | 1075926945U, // RADDHNT_ZZZ_S |
5014 | 414k | 545362314U, // RADDHNv2i64_v2i32 |
5015 | 414k | 2967601515U, // RADDHNv2i64_v4i32 |
5016 | 414k | 549556618U, // RADDHNv4i32_v4i16 |
5017 | 414k | 2969698667U, // RADDHNv4i32_v8i16 |
5018 | 414k | 2959212907U, // RADDHNv8i16_v16i8 |
5019 | 414k | 555848074U, // RADDHNv8i16_v8i8 |
5020 | 414k | 547455102U, // RAX1 |
5021 | 414k | 2418065534U, // RAX1_ZZZ_D |
5022 | 414k | 807425690U, // RBITWr |
5023 | 414k | 807425690U, // RBITXr |
5024 | 414k | 2135706U, // RBIT_ZPmZ_B |
5025 | 414k | 2152090U, // RBIT_ZPmZ_D |
5026 | 414k | 272701082U, // RBIT_ZPmZ_H |
5027 | 414k | 2184858U, // RBIT_ZPmZ_S |
5028 | 414k | 543266458U, // RBITv16i8 |
5029 | 414k | 555849370U, // RBITv8i8 |
5030 | 414k | 3223361012U, // RDFFRS_PPz |
5031 | 414k | 3223360485U, // RDFFR_PPz_REAL |
5032 | 414k | 37861U, // RDFFR_P_REAL |
5033 | 414k | 807424267U, // RDVLI_XI |
5034 | 414k | 22128U, // RET |
5035 | 414k | 8592U, // RETAA |
5036 | 414k | 8599U, // RETAB |
5037 | 414k | 807420499U, // REV16Wr |
5038 | 414k | 807420499U, // REV16Xr |
5039 | 414k | 543261267U, // REV16v16i8 |
5040 | 414k | 555844179U, // REV16v8i8 |
5041 | 414k | 807420036U, // REV32Xr |
5042 | 414k | 543260804U, // REV32v16i8 |
5043 | 414k | 549552260U, // REV32v4i16 |
5044 | 414k | 553746564U, // REV32v8i16 |
5045 | 414k | 555843716U, // REV32v8i8 |
5046 | 414k | 543261242U, // REV64v16i8 |
5047 | 414k | 545358394U, // REV64v2i32 |
5048 | 414k | 549552698U, // REV64v4i16 |
5049 | 414k | 551649850U, // REV64v4i32 |
5050 | 414k | 553747002U, // REV64v8i16 |
5051 | 414k | 555844154U, // REV64v8i8 |
5052 | 414k | 2148496U, // REVB_ZPmZ_D |
5053 | 414k | 272697488U, // REVB_ZPmZ_H |
5054 | 414k | 2181264U, // REVB_ZPmZ_S |
5055 | 414k | 541428297U, // REVD_ZPmZ |
5056 | 414k | 2150031U, // REVH_ZPmZ_D |
5057 | 414k | 2182799U, // REVH_ZPmZ_S |
5058 | 414k | 2153107U, // REVW_ZPmZ_D |
5059 | 414k | 807426282U, // REVWr |
5060 | 414k | 807426282U, // REVXr |
5061 | 414k | 3760232682U, // REV_PP_B |
5062 | 414k | 2418071786U, // REV_PP_D |
5063 | 414k | 1642141930U, // REV_PP_H |
5064 | 414k | 4028717290U, // REV_PP_S |
5065 | 414k | 3760232682U, // REV_ZZ_B |
5066 | 414k | 2418071786U, // REV_ZZ_D |
5067 | 414k | 1642141930U, // REV_ZZ_H |
5068 | 414k | 4028717290U, // REV_ZZ_S |
5069 | 414k | 807422721U, // RMIF |
5070 | 414k | 807425130U, // RORVWr |
5071 | 414k | 807425130U, // RORVXr |
5072 | 414k | 1881179855U, // RSHRNB_ZZI_B |
5073 | 414k | 2172716751U, // RSHRNB_ZZI_H |
5074 | 414k | 2418099919U, // RSHRNB_ZZI_S |
5075 | 414k | 2686490564U, // RSHRNT_ZZI_B |
5076 | 414k | 2174818244U, // RSHRNT_ZZI_H |
5077 | 414k | 1075926980U, // RSHRNT_ZZI_S |
5078 | 414k | 2959212936U, // RSHRNv16i8_shift |
5079 | 414k | 545362379U, // RSHRNv2i32_shift |
5080 | 414k | 549556683U, // RSHRNv4i16_shift |
5081 | 414k | 2967601544U, // RSHRNv4i32_shift |
5082 | 414k | 2969698696U, // RSHRNv8i16_shift |
5083 | 414k | 555848139U, // RSHRNv8i8_shift |
5084 | 414k | 1881179799U, // RSUBHNB_ZZZ_B |
5085 | 414k | 2172716695U, // RSUBHNB_ZZZ_H |
5086 | 414k | 2418099863U, // RSUBHNB_ZZZ_S |
5087 | 414k | 2686490520U, // RSUBHNT_ZZZ_B |
5088 | 414k | 2174818200U, // RSUBHNT_ZZZ_H |
5089 | 414k | 1075926936U, // RSUBHNT_ZZZ_S |
5090 | 414k | 545362306U, // RSUBHNv2i64_v2i32 |
5091 | 414k | 2967601506U, // RSUBHNv2i64_v4i32 |
5092 | 414k | 549556610U, // RSUBHNv4i32_v4i16 |
5093 | 414k | 2969698658U, // RSUBHNv4i32_v8i16 |
5094 | 414k | 2959212898U, // RSUBHNv8i16_v16i8 |
5095 | 414k | 555848066U, // RSUBHNv8i16_v8i8 |
5096 | 414k | 1344324879U, // SABALB_ZZZ_D |
5097 | 414k | 2281768207U, // SABALB_ZZZ_H |
5098 | 414k | 2686534927U, // SABALB_ZZZ_S |
5099 | 414k | 1344329382U, // SABALT_ZZZ_D |
5100 | 414k | 2281772710U, // SABALT_ZZZ_H |
5101 | 414k | 2686539430U, // SABALT_ZZZ_S |
5102 | 414k | 2969698468U, // SABALv16i8_v8i16 |
5103 | 414k | 2963410701U, // SABALv2i32_v2i64 |
5104 | 414k | 2967605005U, // SABALv4i16_v4i32 |
5105 | 414k | 2963407012U, // SABALv4i32_v2i64 |
5106 | 414k | 2967601316U, // SABALv8i16_v4i32 |
5107 | 414k | 2969702157U, // SABALv8i8_v8i16 |
5108 | 414k | 1344307847U, // SABA_ZZZ_B |
5109 | 414k | 1075888775U, // SABA_ZZZ_D |
5110 | 414k | 2185298567U, // SABA_ZZZ_H |
5111 | 414k | 1344356999U, // SABA_ZZZ_S |
5112 | 414k | 2959213191U, // SABAv16i8 |
5113 | 414k | 2961310343U, // SABAv2i32 |
5114 | 414k | 2965504647U, // SABAv4i16 |
5115 | 414k | 2967601799U, // SABAv4i32 |
5116 | 414k | 2969698951U, // SABAv8i16 |
5117 | 414k | 2971796103U, // SABAv8i8 |
5118 | 414k | 4028679620U, // SABDLB_ZZZ_D |
5119 | 414k | 2273379780U, // SABDLB_ZZZ_H |
5120 | 414k | 1881228740U, // SABDLB_ZZZ_S |
5121 | 414k | 4028684023U, // SABDLT_ZZZ_D |
5122 | 414k | 2273384183U, // SABDLT_ZZZ_H |
5123 | 414k | 1881233143U, // SABDLT_ZZZ_S |
5124 | 414k | 553746662U, // SABDLv16i8_v8i16 |
5125 | 414k | 547459006U, // SABDLv2i32_v2i64 |
5126 | 414k | 551653310U, // SABDLv4i16_v4i32 |
5127 | 414k | 547455206U, // SABDLv4i32_v2i64 |
5128 | 414k | 551649510U, // SABDLv8i16_v4i32 |
5129 | 414k | 553750462U, // SABDLv8i8_v8i16 |
5130 | 414k | 3223357832U, // SABD_ZPmZ_B |
5131 | 414k | 3223374216U, // SABD_ZPmZ_D |
5132 | 414k | 3519089032U, // SABD_ZPmZ_H |
5133 | 414k | 3223406984U, // SABD_ZPmZ_S |
5134 | 414k | 543263112U, // SABDv16i8 |
5135 | 414k | 545360264U, // SABDv2i32 |
5136 | 414k | 549554568U, // SABDv4i16 |
5137 | 414k | 551651720U, // SABDv4i32 |
5138 | 414k | 553748872U, // SABDv8i16 |
5139 | 414k | 555846024U, // SABDv8i8 |
5140 | 414k | 3223376548U, // SADALP_ZPmZ_D |
5141 | 414k | 3519091364U, // SADALP_ZPmZ_H |
5142 | 414k | 3223409316U, // SADALP_ZPmZ_S |
5143 | 414k | 2969703076U, // SADALPv16i8_v8i16 |
5144 | 414k | 3089240740U, // SADALPv2i32_v1i64 |
5145 | 414k | 2961314468U, // SADALPv4i16_v2i32 |
5146 | 414k | 2963411620U, // SADALPv4i32_v2i64 |
5147 | 414k | 2967605924U, // SADALPv8i16_v4i32 |
5148 | 414k | 2965508772U, // SADALPv8i8_v4i16 |
5149 | 414k | 4028683846U, // SADDLBT_ZZZ_D |
5150 | 414k | 2273384006U, // SADDLBT_ZZZ_H |
5151 | 414k | 1881232966U, // SADDLBT_ZZZ_S |
5152 | 414k | 4028679645U, // SADDLB_ZZZ_D |
5153 | 414k | 2273379805U, // SADDLB_ZZZ_H |
5154 | 414k | 1881228765U, // SADDLB_ZZZ_S |
5155 | 414k | 553751220U, // SADDLPv16i8_v8i16 |
5156 | 414k | 673288884U, // SADDLPv2i32_v1i64 |
5157 | 414k | 545362612U, // SADDLPv4i16_v2i32 |
5158 | 414k | 547459764U, // SADDLPv4i32_v2i64 |
5159 | 414k | 551654068U, // SADDLPv8i16_v4i32 |
5160 | 414k | 549556916U, // SADDLPv8i8_v4i16 |
5161 | 414k | 4028684039U, // SADDLT_ZZZ_D |
5162 | 414k | 2273384199U, // SADDLT_ZZZ_H |
5163 | 414k | 1881233159U, // SADDLT_ZZZ_S |
5164 | 414k | 538990849U, // SADDLVv16i8v |
5165 | 414k | 538990849U, // SADDLVv4i16v |
5166 | 414k | 538990849U, // SADDLVv4i32v |
5167 | 414k | 538990849U, // SADDLVv8i16v |
5168 | 414k | 538990849U, // SADDLVv8i8v |
5169 | 414k | 553746678U, // SADDLv16i8_v8i16 |
5170 | 414k | 547459044U, // SADDLv2i32_v2i64 |
5171 | 414k | 551653348U, // SADDLv4i16_v4i32 |
5172 | 414k | 547455222U, // SADDLv4i32_v2i64 |
5173 | 414k | 551649526U, // SADDLv8i16_v4i32 |
5174 | 414k | 553750500U, // SADDLv8i8_v8i16 |
5175 | 414k | 1745000662U, // SADDV_VPZ_B |
5176 | 414k | 1648531670U, // SADDV_VPZ_H |
5177 | 414k | 1638045910U, // SADDV_VPZ_S |
5178 | 414k | 2418067622U, // SADDWB_ZZZ_D |
5179 | 414k | 2179008678U, // SADDWB_ZZZ_H |
5180 | 414k | 4028713126U, // SADDWB_ZZZ_S |
5181 | 414k | 2418071674U, // SADDWT_ZZZ_D |
5182 | 414k | 2179012730U, // SADDWT_ZZZ_H |
5183 | 414k | 4028717178U, // SADDWT_ZZZ_S |
5184 | 414k | 553746952U, // SADDWv16i8_v8i16 |
5185 | 414k | 547461627U, // SADDWv2i32_v2i64 |
5186 | 414k | 551655931U, // SADDWv4i16_v4i32 |
5187 | 414k | 547455496U, // SADDWv4i32_v2i64 |
5188 | 414k | 551649800U, // SADDWv8i16_v4i32 |
5189 | 414k | 553753083U, // SADDWv8i8_v8i16 |
5190 | 414k | 8605U, // SB |
5191 | 414k | 1075889590U, // SBCLB_ZZZ_D |
5192 | 414k | 1344357814U, // SBCLB_ZZZ_S |
5193 | 414k | 1075893993U, // SBCLT_ZZZ_D |
5194 | 414k | 1344362217U, // SBCLT_ZZZ_S |
5195 | 414k | 807425348U, // SBCSWr |
5196 | 414k | 807425348U, // SBCSXr |
5197 | 414k | 807422191U, // SBCWr |
5198 | 414k | 807422191U, // SBCXr |
5199 | 414k | 807424298U, // SBFMWri |
5200 | 414k | 807424298U, // SBFMXri |
5201 | 414k | 3760231108U, // SCLAMP_ZZZ_B |
5202 | 414k | 2418070212U, // SCLAMP_ZZZ_D |
5203 | 414k | 2179011268U, // SCLAMP_ZZZ_H |
5204 | 414k | 4028715716U, // SCLAMP_ZZZ_S |
5205 | 414k | 807422727U, // SCVTFSWDri |
5206 | 414k | 807422727U, // SCVTFSWHri |
5207 | 414k | 807422727U, // SCVTFSWSri |
5208 | 414k | 807422727U, // SCVTFSXDri |
5209 | 414k | 807422727U, // SCVTFSXHri |
5210 | 414k | 807422727U, // SCVTFSXSri |
5211 | 414k | 807422727U, // SCVTFUWDri |
5212 | 414k | 807422727U, // SCVTFUWHri |
5213 | 414k | 807422727U, // SCVTFUWSri |
5214 | 414k | 807422727U, // SCVTFUXDri |
5215 | 414k | 807422727U, // SCVTFUXHri |
5216 | 414k | 807422727U, // SCVTFUXSri |
5217 | 414k | 2149127U, // SCVTF_ZPmZ_DtoD |
5218 | 414k | 541133575U, // SCVTF_ZPmZ_DtoH |
5219 | 414k | 2181895U, // SCVTF_ZPmZ_DtoS |
5220 | 414k | 272698119U, // SCVTF_ZPmZ_HtoH |
5221 | 414k | 2149127U, // SCVTF_ZPmZ_StoD |
5222 | 414k | 541133575U, // SCVTF_ZPmZ_StoH |
5223 | 414k | 2181895U, // SCVTF_ZPmZ_StoS |
5224 | 414k | 807422727U, // SCVTFd |
5225 | 414k | 807422727U, // SCVTFh |
5226 | 414k | 807422727U, // SCVTFs |
5227 | 414k | 807422727U, // SCVTFv1i16 |
5228 | 414k | 807422727U, // SCVTFv1i32 |
5229 | 414k | 807422727U, // SCVTFv1i64 |
5230 | 414k | 545360647U, // SCVTFv2f32 |
5231 | 414k | 547457799U, // SCVTFv2f64 |
5232 | 414k | 545360647U, // SCVTFv2i32_shift |
5233 | 414k | 547457799U, // SCVTFv2i64_shift |
5234 | 414k | 549554951U, // SCVTFv4f16 |
5235 | 414k | 551652103U, // SCVTFv4f32 |
5236 | 414k | 549554951U, // SCVTFv4i16_shift |
5237 | 414k | 551652103U, // SCVTFv4i32_shift |
5238 | 414k | 553749255U, // SCVTFv8f16 |
5239 | 414k | 553749255U, // SCVTFv8i16_shift |
5240 | 414k | 3223377109U, // SDIVR_ZPmZ_D |
5241 | 414k | 3223409877U, // SDIVR_ZPmZ_S |
5242 | 414k | 807426293U, // SDIVWr |
5243 | 414k | 807426293U, // SDIVXr |
5244 | 414k | 3223378165U, // SDIV_ZPmZ_D |
5245 | 414k | 3223410933U, // SDIV_ZPmZ_S |
5246 | 414k | 2686507044U, // SDOT_ZZZI_D |
5247 | 414k | 1344362532U, // SDOT_ZZZI_S |
5248 | 414k | 2686507044U, // SDOT_ZZZ_D |
5249 | 414k | 1344362532U, // SDOT_ZZZ_S |
5250 | 414k | 2967607332U, // SDOTlanev16i8 |
5251 | 414k | 2961315876U, // SDOTlanev8i8 |
5252 | 414k | 2967607332U, // SDOTv16i8 |
5253 | 414k | 2961315876U, // SDOTv8i8 |
5254 | 414k | 3223359485U, // SEL_PPPP |
5255 | 414k | 3223359485U, // SEL_ZPZZ_B |
5256 | 414k | 3223375869U, // SEL_ZPZZ_D |
5257 | 414k | 2176913405U, // SEL_ZPZZ_H |
5258 | 414k | 3223408637U, // SEL_ZPZZ_S |
5259 | 414k | 941331U, // SETE |
5260 | 414k | 941393U, // SETEN |
5261 | 414k | 942281U, // SETET |
5262 | 414k | 941755U, // SETETN |
5263 | 414k | 16971U, // SETF16 |
5264 | 414k | 16986U, // SETF8 |
5265 | 414k | 8653U, // SETFFR |
5266 | 414k | 941353U, // SETGM |
5267 | 414k | 941418U, // SETGMN |
5268 | 414k | 942306U, // SETGMT |
5269 | 414k | 941783U, // SETGMTN |
5270 | 414k | 942241U, // SETGP |
5271 | 414k | 941452U, // SETGPN |
5272 | 414k | 942340U, // SETGPT |
5273 | 414k | 941821U, // SETGPTN |
5274 | 414k | 941361U, // SETM |
5275 | 414k | 941427U, // SETMN |
5276 | 414k | 942315U, // SETMT |
5277 | 414k | 941793U, // SETMTN |
5278 | 414k | 942249U, // SETP |
5279 | 414k | 941461U, // SETPN |
5280 | 414k | 942349U, // SETPT |
5281 | 414k | 941831U, // SETPTN |
5282 | 414k | 270747880U, // SHA1Crrr |
5283 | 414k | 807422816U, // SHA1Hrr |
5284 | 414k | 270749987U, // SHA1Mrrr |
5285 | 414k | 270750303U, // SHA1Prrr |
5286 | 414k | 2967601153U, // SHA1SU0rrr |
5287 | 414k | 2967601236U, // SHA1SU1rr |
5288 | 414k | 270745754U, // SHA256H2rrr |
5289 | 414k | 270748616U, // SHA256Hrrr |
5290 | 414k | 2967601173U, // SHA256SU0rr |
5291 | 414k | 2967601256U, // SHA256SU1rrr |
5292 | 414k | 270748563U, // SHA512H |
5293 | 414k | 270745744U, // SHA512H2 |
5294 | 414k | 2963406858U, // SHA512SU0 |
5295 | 414k | 2963406941U, // SHA512SU1 |
5296 | 414k | 3223357927U, // SHADD_ZPmZ_B |
5297 | 414k | 3223374311U, // SHADD_ZPmZ_D |
5298 | 414k | 3519089127U, // SHADD_ZPmZ_H |
5299 | 414k | 3223407079U, // SHADD_ZPmZ_S |
5300 | 414k | 543263207U, // SHADDv16i8 |
5301 | 414k | 545360359U, // SHADDv2i32 |
5302 | 414k | 549554663U, // SHADDv4i16 |
5303 | 414k | 551651815U, // SHADDv4i32 |
5304 | 414k | 553748967U, // SHADDv8i16 |
5305 | 414k | 555846119U, // SHADDv8i8 |
5306 | 414k | 553746695U, // SHLLv16i8 |
5307 | 414k | 547459145U, // SHLLv2i32 |
5308 | 414k | 551653449U, // SHLLv4i16 |
5309 | 414k | 547455239U, // SHLLv4i32 |
5310 | 414k | 551649543U, // SHLLv8i16 |
5311 | 414k | 553750601U, // SHLLv8i8 |
5312 | 414k | 807424018U, // SHLd |
5313 | 414k | 543264786U, // SHLv16i8_shift |
5314 | 414k | 545361938U, // SHLv2i32_shift |
5315 | 414k | 547459090U, // SHLv2i64_shift |
5316 | 414k | 549556242U, // SHLv4i16_shift |
5317 | 414k | 551653394U, // SHLv4i32_shift |
5318 | 414k | 553750546U, // SHLv8i16_shift |
5319 | 414k | 555847698U, // SHLv8i8_shift |
5320 | 414k | 1881179837U, // SHRNB_ZZI_B |
5321 | 414k | 2172716733U, // SHRNB_ZZI_H |
5322 | 414k | 2418099901U, // SHRNB_ZZI_S |
5323 | 414k | 2686490546U, // SHRNT_ZZI_B |
5324 | 414k | 2174818226U, // SHRNT_ZZI_H |
5325 | 414k | 1075926962U, // SHRNT_ZZI_S |
5326 | 414k | 2959212918U, // SHRNv16i8_shift |
5327 | 414k | 545362363U, // SHRNv2i32_shift |
5328 | 414k | 549556667U, // SHRNv4i16_shift |
5329 | 414k | 2967601526U, // SHRNv4i32_shift |
5330 | 414k | 2969698678U, // SHRNv8i16_shift |
5331 | 414k | 555848123U, // SHRNv8i8_shift |
5332 | 414k | 3223360443U, // SHSUBR_ZPmZ_B |
5333 | 414k | 3223376827U, // SHSUBR_ZPmZ_D |
5334 | 414k | 3519091643U, // SHSUBR_ZPmZ_H |
5335 | 414k | 3223409595U, // SHSUBR_ZPmZ_S |
5336 | 414k | 3223357541U, // SHSUB_ZPmZ_B |
5337 | 414k | 3223373925U, // SHSUB_ZPmZ_D |
5338 | 414k | 3519088741U, // SHSUB_ZPmZ_H |
5339 | 414k | 3223406693U, // SHSUB_ZPmZ_S |
5340 | 414k | 543262821U, // SHSUBv16i8 |
5341 | 414k | 545359973U, // SHSUBv2i32 |
5342 | 414k | 549554277U, // SHSUBv4i16 |
5343 | 414k | 551651429U, // SHSUBv4i32 |
5344 | 414k | 553748581U, // SHSUBv8i16 |
5345 | 414k | 555845733U, // SHSUBv8i8 |
5346 | 414k | 1344311007U, // SLI_ZZI_B |
5347 | 414k | 1075891935U, // SLI_ZZI_D |
5348 | 414k | 2185301727U, // SLI_ZZI_H |
5349 | 414k | 1344360159U, // SLI_ZZI_S |
5350 | 414k | 270749407U, // SLId |
5351 | 414k | 2959216351U, // SLIv16i8_shift |
5352 | 414k | 2961313503U, // SLIv2i32_shift |
5353 | 414k | 2963410655U, // SLIv2i64_shift |
5354 | 414k | 2965507807U, // SLIv4i16_shift |
5355 | 414k | 2967604959U, // SLIv4i32_shift |
5356 | 414k | 2969702111U, // SLIv8i16_shift |
5357 | 414k | 2971799263U, // SLIv8i8_shift |
5358 | 414k | 2967601267U, // SM3PARTW1 |
5359 | 414k | 2967601688U, // SM3PARTW2 |
5360 | 414k | 551649351U, // SM3SS1 |
5361 | 414k | 2967601761U, // SM3TT1A |
5362 | 414k | 2967602165U, // SM3TT1B |
5363 | 414k | 2967601770U, // SM3TT2A |
5364 | 414k | 2967602194U, // SM3TT2B |
5365 | 414k | 2967603791U, // SM4E |
5366 | 414k | 4028717844U, // SM4EKEY_ZZZ_S |
5367 | 414k | 551656212U, // SM4ENCKEY |
5368 | 414k | 4028713551U, // SM4E_ZZZ_S |
5369 | 414k | 807423956U, // SMADDLrrr |
5370 | 414k | 3223360338U, // SMAXP_ZPmZ_B |
5371 | 414k | 3223376722U, // SMAXP_ZPmZ_D |
5372 | 414k | 3519091538U, // SMAXP_ZPmZ_H |
5373 | 414k | 3223409490U, // SMAXP_ZPmZ_S |
5374 | 414k | 543265618U, // SMAXPv16i8 |
5375 | 414k | 545362770U, // SMAXPv2i32 |
5376 | 414k | 549557074U, // SMAXPv4i16 |
5377 | 414k | 551654226U, // SMAXPv4i32 |
5378 | 414k | 553751378U, // SMAXPv8i16 |
5379 | 414k | 555848530U, // SMAXPv8i8 |
5380 | 414k | 153950U, // SMAXV_VPZ_B |
5381 | 414k | 1646434654U, // SMAXV_VPZ_D |
5382 | 414k | 1648548190U, // SMAXV_VPZ_H |
5383 | 414k | 1638078814U, // SMAXV_VPZ_S |
5384 | 414k | 538990942U, // SMAXVv16i8v |
5385 | 414k | 538990942U, // SMAXVv4i16v |
5386 | 414k | 538990942U, // SMAXVv4i32v |
5387 | 414k | 538990942U, // SMAXVv8i16v |
5388 | 414k | 538990942U, // SMAXVv8i8v |
5389 | 414k | 3760233155U, // SMAX_ZI_B |
5390 | 414k | 2418072259U, // SMAX_ZI_D |
5391 | 414k | 2179013315U, // SMAX_ZI_H |
5392 | 414k | 4028717763U, // SMAX_ZI_S |
5393 | 414k | 3223362243U, // SMAX_ZPmZ_B |
5394 | 414k | 3223378627U, // SMAX_ZPmZ_D |
5395 | 414k | 3519093443U, // SMAX_ZPmZ_H |
5396 | 414k | 3223411395U, // SMAX_ZPmZ_S |
5397 | 414k | 543267523U, // SMAXv16i8 |
5398 | 414k | 545364675U, // SMAXv2i32 |
5399 | 414k | 549558979U, // SMAXv4i16 |
5400 | 414k | 551656131U, // SMAXv4i32 |
5401 | 414k | 553753283U, // SMAXv8i16 |
5402 | 414k | 555850435U, // SMAXv8i8 |
5403 | 414k | 264456U, // SMC |
5404 | 414k | 3223360256U, // SMINP_ZPmZ_B |
5405 | 414k | 3223376640U, // SMINP_ZPmZ_D |
5406 | 414k | 3519091456U, // SMINP_ZPmZ_H |
5407 | 414k | 3223409408U, // SMINP_ZPmZ_S |
5408 | 414k | 543265536U, // SMINPv16i8 |
5409 | 414k | 545362688U, // SMINPv2i32 |
5410 | 414k | 549556992U, // SMINPv4i16 |
5411 | 414k | 551654144U, // SMINPv4i32 |
5412 | 414k | 553751296U, // SMINPv8i16 |
5413 | 414k | 555848448U, // SMINPv8i8 |
5414 | 414k | 153898U, // SMINV_VPZ_B |
5415 | 414k | 1646434602U, // SMINV_VPZ_D |
5416 | 414k | 1648548138U, // SMINV_VPZ_H |
5417 | 414k | 1638078762U, // SMINV_VPZ_S |
5418 | 414k | 538990890U, // SMINVv16i8v |
5419 | 414k | 538990890U, // SMINVv4i16v |
5420 | 414k | 538990890U, // SMINVv4i32v |
5421 | 414k | 538990890U, // SMINVv8i16v |
5422 | 414k | 538990890U, // SMINVv8i8v |
5423 | 414k | 3760230810U, // SMIN_ZI_B |
5424 | 414k | 2418069914U, // SMIN_ZI_D |
5425 | 414k | 2179010970U, // SMIN_ZI_H |
5426 | 414k | 4028715418U, // SMIN_ZI_S |
5427 | 414k | 3223359898U, // SMIN_ZPmZ_B |
5428 | 414k | 3223376282U, // SMIN_ZPmZ_D |
5429 | 414k | 3519091098U, // SMIN_ZPmZ_H |
5430 | 414k | 3223409050U, // SMIN_ZPmZ_S |
5431 | 414k | 543265178U, // SMINv16i8 |
5432 | 414k | 545362330U, // SMINv2i32 |
5433 | 414k | 549556634U, // SMINv4i16 |
5434 | 414k | 551653786U, // SMINv4i32 |
5435 | 414k | 553750938U, // SMINv8i16 |
5436 | 414k | 555848090U, // SMINv8i8 |
5437 | 414k | 1344324924U, // SMLALB_ZZZI_D |
5438 | 414k | 2686534972U, // SMLALB_ZZZI_S |
5439 | 414k | 1344324924U, // SMLALB_ZZZ_D |
5440 | 414k | 2281768252U, // SMLALB_ZZZ_H |
5441 | 414k | 2686534972U, // SMLALB_ZZZ_S |
5442 | 414k | 1344329417U, // SMLALT_ZZZI_D |
5443 | 414k | 2686539465U, // SMLALT_ZZZI_S |
5444 | 414k | 1344329417U, // SMLALT_ZZZ_D |
5445 | 414k | 2281772745U, // SMLALT_ZZZ_H |
5446 | 414k | 2686539465U, // SMLALT_ZZZ_S |
5447 | 414k | 2969698502U, // SMLALv16i8_v8i16 |
5448 | 414k | 2963410740U, // SMLALv2i32_indexed |
5449 | 414k | 2963410740U, // SMLALv2i32_v2i64 |
5450 | 414k | 2967605044U, // SMLALv4i16_indexed |
5451 | 414k | 2967605044U, // SMLALv4i16_v4i32 |
5452 | 414k | 2963407046U, // SMLALv4i32_indexed |
5453 | 414k | 2963407046U, // SMLALv4i32_v2i64 |
5454 | 414k | 2967601350U, // SMLALv8i16_indexed |
5455 | 414k | 2967601350U, // SMLALv8i16_v4i32 |
5456 | 414k | 2969702196U, // SMLALv8i8_v8i16 |
5457 | 414k | 1344325221U, // SMLSLB_ZZZI_D |
5458 | 414k | 2686535269U, // SMLSLB_ZZZI_S |
5459 | 414k | 1344325221U, // SMLSLB_ZZZ_D |
5460 | 414k | 2281768549U, // SMLSLB_ZZZ_H |
5461 | 414k | 2686535269U, // SMLSLB_ZZZ_S |
5462 | 414k | 1344329591U, // SMLSLT_ZZZI_D |
5463 | 414k | 2686539639U, // SMLSLT_ZZZI_S |
5464 | 414k | 1344329591U, // SMLSLT_ZZZ_D |
5465 | 414k | 2281772919U, // SMLSLT_ZZZ_H |
5466 | 414k | 2686539639U, // SMLSLT_ZZZ_S |
5467 | 414k | 2969698634U, // SMLSLv16i8_v8i16 |
5468 | 414k | 2963411142U, // SMLSLv2i32_indexed |
5469 | 414k | 2963411142U, // SMLSLv2i32_v2i64 |
5470 | 414k | 2967605446U, // SMLSLv4i16_indexed |
5471 | 414k | 2967605446U, // SMLSLv4i16_v4i32 |
5472 | 414k | 2963407178U, // SMLSLv4i32_indexed |
5473 | 414k | 2963407178U, // SMLSLv4i32_v2i64 |
5474 | 414k | 2967601482U, // SMLSLv8i16_indexed |
5475 | 414k | 2967601482U, // SMLSLv8i16_v4i32 |
5476 | 414k | 2969702598U, // SMLSLv8i8_v8i16 |
5477 | 414k | 2967601896U, // SMMLA |
5478 | 414k | 1344357096U, // SMMLA_ZZZ |
5479 | 414k | 138527519U, // SMOPA_MPPZZ_D |
5480 | 414k | 140624671U, // SMOPA_MPPZZ_S |
5481 | 414k | 138532317U, // SMOPS_MPPZZ_D |
5482 | 414k | 140629469U, // SMOPS_MPPZZ_S |
5483 | 414k | 538990917U, // SMOVvi16to32 |
5484 | 414k | 538990917U, // SMOVvi16to32_idx0 |
5485 | 414k | 538990917U, // SMOVvi16to64 |
5486 | 414k | 538990917U, // SMOVvi16to64_idx0 |
5487 | 414k | 538990917U, // SMOVvi32to64 |
5488 | 414k | 538990917U, // SMOVvi32to64_idx0 |
5489 | 414k | 538990917U, // SMOVvi8to32 |
5490 | 414k | 538990917U, // SMOVvi8to32_idx0 |
5491 | 414k | 538990917U, // SMOVvi8to64 |
5492 | 414k | 538990917U, // SMOVvi8to64_idx0 |
5493 | 414k | 807423904U, // SMSUBLrrr |
5494 | 414k | 3223358780U, // SMULH_ZPmZ_B |
5495 | 414k | 3223375164U, // SMULH_ZPmZ_D |
5496 | 414k | 3519089980U, // SMULH_ZPmZ_H |
5497 | 414k | 3223407932U, // SMULH_ZPmZ_S |
5498 | 414k | 3760229692U, // SMULH_ZZZ_B |
5499 | 414k | 2418068796U, // SMULH_ZZZ_D |
5500 | 414k | 2179009852U, // SMULH_ZZZ_H |
5501 | 414k | 4028714300U, // SMULH_ZZZ_S |
5502 | 414k | 807423292U, // SMULHrr |
5503 | 414k | 4028679695U, // SMULLB_ZZZI_D |
5504 | 414k | 1881228815U, // SMULLB_ZZZI_S |
5505 | 414k | 4028679695U, // SMULLB_ZZZ_D |
5506 | 414k | 2273379855U, // SMULLB_ZZZ_H |
5507 | 414k | 1881228815U, // SMULLB_ZZZ_S |
5508 | 414k | 4028684103U, // SMULLT_ZZZI_D |
5509 | 414k | 1881233223U, // SMULLT_ZZZI_S |
5510 | 414k | 4028684103U, // SMULLT_ZZZ_D |
5511 | 414k | 2273384263U, // SMULLT_ZZZ_H |
5512 | 414k | 1881233223U, // SMULLT_ZZZ_S |
5513 | 414k | 553746728U, // SMULLv16i8_v8i16 |
5514 | 414k | 547459174U, // SMULLv2i32_indexed |
5515 | 414k | 547459174U, // SMULLv2i32_v2i64 |
5516 | 414k | 551653478U, // SMULLv4i16_indexed |
5517 | 414k | 551653478U, // SMULLv4i16_v4i32 |
5518 | 414k | 547455272U, // SMULLv4i32_indexed |
5519 | 414k | 547455272U, // SMULLv4i32_v2i64 |
5520 | 414k | 551649576U, // SMULLv8i16_indexed |
5521 | 414k | 551649576U, // SMULLv8i16_v4i32 |
5522 | 414k | 553750630U, // SMULLv8i8_v8i16 |
5523 | 414k | 3223358037U, // SPLICE_ZPZZ_B |
5524 | 414k | 3223374421U, // SPLICE_ZPZZ_D |
5525 | 414k | 2176911957U, // SPLICE_ZPZZ_H |
5526 | 414k | 3223407189U, // SPLICE_ZPZZ_S |
5527 | 414k | 3223358037U, // SPLICE_ZPZ_B |
5528 | 414k | 3223374421U, // SPLICE_ZPZ_D |
5529 | 414k | 2176911957U, // SPLICE_ZPZ_H |
5530 | 414k | 3223407189U, // SPLICE_ZPZ_S |
5531 | 414k | 2135336U, // SQABS_ZPmZ_B |
5532 | 414k | 2151720U, // SQABS_ZPmZ_D |
5533 | 414k | 272700712U, // SQABS_ZPmZ_H |
5534 | 414k | 2184488U, // SQABS_ZPmZ_S |
5535 | 414k | 543266088U, // SQABSv16i8 |
5536 | 414k | 807425320U, // SQABSv1i16 |
5537 | 414k | 807425320U, // SQABSv1i32 |
5538 | 414k | 807425320U, // SQABSv1i64 |
5539 | 414k | 807425320U, // SQABSv1i8 |
5540 | 414k | 545363240U, // SQABSv2i32 |
5541 | 414k | 547460392U, // SQABSv2i64 |
5542 | 414k | 549557544U, // SQABSv4i16 |
5543 | 414k | 551654696U, // SQABSv4i32 |
5544 | 414k | 553751848U, // SQABSv8i16 |
5545 | 414k | 555849000U, // SQABSv8i8 |
5546 | 414k | 3760228869U, // SQADD_ZI_B |
5547 | 414k | 2418067973U, // SQADD_ZI_D |
5548 | 414k | 2179009029U, // SQADD_ZI_H |
5549 | 414k | 4028713477U, // SQADD_ZI_S |
5550 | 414k | 3223357957U, // SQADD_ZPmZ_B |
5551 | 414k | 3223374341U, // SQADD_ZPmZ_D |
5552 | 414k | 3519089157U, // SQADD_ZPmZ_H |
5553 | 414k | 3223407109U, // SQADD_ZPmZ_S |
5554 | 414k | 3760228869U, // SQADD_ZZZ_B |
5555 | 414k | 2418067973U, // SQADD_ZZZ_D |
5556 | 414k | 2179009029U, // SQADD_ZZZ_H |
5557 | 414k | 4028713477U, // SQADD_ZZZ_S |
5558 | 414k | 543263237U, // SQADDv16i8 |
5559 | 414k | 807422469U, // SQADDv1i16 |
5560 | 414k | 807422469U, // SQADDv1i32 |
5561 | 414k | 807422469U, // SQADDv1i64 |
5562 | 414k | 807422469U, // SQADDv1i8 |
5563 | 414k | 545360389U, // SQADDv2i32 |
5564 | 414k | 547457541U, // SQADDv2i64 |
5565 | 414k | 549554693U, // SQADDv4i16 |
5566 | 414k | 551651845U, // SQADDv4i32 |
5567 | 414k | 553748997U, // SQADDv8i16 |
5568 | 414k | 555846149U, // SQADDv8i8 |
5569 | 414k | 3760228802U, // SQCADD_ZZI_B |
5570 | 414k | 2418067906U, // SQCADD_ZZI_D |
5571 | 414k | 2179008962U, // SQCADD_ZZI_H |
5572 | 414k | 4028713410U, // SQCADD_ZZI_S |
5573 | 414k | 2686469304U, // SQDECB_XPiI |
5574 | 414k | 807421112U, // SQDECB_XPiWdI |
5575 | 414k | 2686470555U, // SQDECD_XPiI |
5576 | 414k | 807422363U, // SQDECD_XPiWdI |
5577 | 414k | 2686503323U, // SQDECD_ZPiI |
5578 | 414k | 2686471241U, // SQDECH_XPiI |
5579 | 414k | 807423049U, // SQDECH_XPiWdI |
5580 | 414k | 39914569U, // SQDECH_ZPiI |
5581 | 414k | 3760214636U, // SQDECP_XPWd_B |
5582 | 414k | 2418037356U, // SQDECP_XPWd_D |
5583 | 414k | 1881166444U, // SQDECP_XPWd_H |
5584 | 414k | 4028650092U, // SQDECP_XPWd_S |
5585 | 414k | 3760214636U, // SQDECP_XP_B |
5586 | 414k | 2418037356U, // SQDECP_XP_D |
5587 | 414k | 1881166444U, // SQDECP_XP_H |
5588 | 414k | 4028650092U, // SQDECP_XP_S |
5589 | 414k | 1075892844U, // SQDECP_ZP_D |
5590 | 414k | 1648431724U, // SQDECP_ZP_H |
5591 | 414k | 1344361068U, // SQDECP_ZP_S |
5592 | 414k | 2686474715U, // SQDECW_XPiI |
5593 | 414k | 807426523U, // SQDECW_XPiWdI |
5594 | 414k | 2686540251U, // SQDECW_ZPiI |
5595 | 414k | 1344329266U, // SQDMLALBT_ZZZ_D |
5596 | 414k | 2281772594U, // SQDMLALBT_ZZZ_H |
5597 | 414k | 2686539314U, // SQDMLALBT_ZZZ_S |
5598 | 414k | 1344324905U, // SQDMLALB_ZZZI_D |
5599 | 414k | 2686534953U, // SQDMLALB_ZZZI_S |
5600 | 414k | 1344324905U, // SQDMLALB_ZZZ_D |
5601 | 414k | 2281768233U, // SQDMLALB_ZZZ_H |
5602 | 414k | 2686534953U, // SQDMLALB_ZZZ_S |
5603 | 414k | 1344329398U, // SQDMLALT_ZZZI_D |
5604 | 414k | 2686539446U, // SQDMLALT_ZZZI_S |
5605 | 414k | 1344329398U, // SQDMLALT_ZZZ_D |
5606 | 414k | 2281772726U, // SQDMLALT_ZZZ_H |
5607 | 414k | 2686539446U, // SQDMLALT_ZZZ_S |
5608 | 414k | 270749476U, // SQDMLALi16 |
5609 | 414k | 270749476U, // SQDMLALi32 |
5610 | 414k | 270749476U, // SQDMLALv1i32_indexed |
5611 | 414k | 270749476U, // SQDMLALv1i64_indexed |
5612 | 414k | 2963410724U, // SQDMLALv2i32_indexed |
5613 | 414k | 2963410724U, // SQDMLALv2i32_v2i64 |
5614 | 414k | 2967605028U, // SQDMLALv4i16_indexed |
5615 | 414k | 2967605028U, // SQDMLALv4i16_v4i32 |
5616 | 414k | 2963407028U, // SQDMLALv4i32_indexed |
5617 | 414k | 2963407028U, // SQDMLALv4i32_v2i64 |
5618 | 414k | 2967601332U, // SQDMLALv8i16_indexed |
5619 | 414k | 2967601332U, // SQDMLALv8i16_v4i32 |
5620 | 414k | 1344329295U, // SQDMLSLBT_ZZZ_D |
5621 | 414k | 2281772623U, // SQDMLSLBT_ZZZ_H |
5622 | 414k | 2686539343U, // SQDMLSLBT_ZZZ_S |
5623 | 414k | 1344325203U, // SQDMLSLB_ZZZI_D |
5624 | 414k | 2686535251U, // SQDMLSLB_ZZZI_S |
5625 | 414k | 1344325203U, // SQDMLSLB_ZZZ_D |
5626 | 414k | 2281768531U, // SQDMLSLB_ZZZ_H |
5627 | 414k | 2686535251U, // SQDMLSLB_ZZZ_S |
5628 | 414k | 1344329573U, // SQDMLSLT_ZZZI_D |
5629 | 414k | 2686539621U, // SQDMLSLT_ZZZI_S |
5630 | 414k | 1344329573U, // SQDMLSLT_ZZZ_D |
5631 | 414k | 2281772901U, // SQDMLSLT_ZZZ_H |
5632 | 414k | 2686539621U, // SQDMLSLT_ZZZ_S |
5633 | 414k | 270749878U, // SQDMLSLi16 |
5634 | 414k | 270749878U, // SQDMLSLi32 |
5635 | 414k | 270749878U, // SQDMLSLv1i32_indexed |
5636 | 414k | 270749878U, // SQDMLSLv1i64_indexed |
5637 | 414k | 2963411126U, // SQDMLSLv2i32_indexed |
5638 | 414k | 2963411126U, // SQDMLSLv2i32_v2i64 |
5639 | 414k | 2967605430U, // SQDMLSLv4i16_indexed |
5640 | 414k | 2967605430U, // SQDMLSLv4i16_v4i32 |
5641 | 414k | 2963407160U, // SQDMLSLv4i32_indexed |
5642 | 414k | 2963407160U, // SQDMLSLv4i32_v2i64 |
5643 | 414k | 2967601464U, // SQDMLSLv8i16_indexed |
5644 | 414k | 2967601464U, // SQDMLSLv8i16_v4i32 |
5645 | 414k | 2418068777U, // SQDMULH_ZZZI_D |
5646 | 414k | 2179009833U, // SQDMULH_ZZZI_H |
5647 | 414k | 4028714281U, // SQDMULH_ZZZI_S |
5648 | 414k | 3760229673U, // SQDMULH_ZZZ_B |
5649 | 414k | 2418068777U, // SQDMULH_ZZZ_D |
5650 | 414k | 2179009833U, // SQDMULH_ZZZ_H |
5651 | 414k | 4028714281U, // SQDMULH_ZZZ_S |
5652 | 414k | 807423273U, // SQDMULHv1i16 |
5653 | 414k | 807423273U, // SQDMULHv1i16_indexed |
5654 | 414k | 807423273U, // SQDMULHv1i32 |
5655 | 414k | 807423273U, // SQDMULHv1i32_indexed |
5656 | 414k | 545361193U, // SQDMULHv2i32 |
5657 | 414k | 545361193U, // SQDMULHv2i32_indexed |
5658 | 414k | 549555497U, // SQDMULHv4i16 |
5659 | 414k | 549555497U, // SQDMULHv4i16_indexed |
5660 | 414k | 551652649U, // SQDMULHv4i32 |
5661 | 414k | 551652649U, // SQDMULHv4i32_indexed |
5662 | 414k | 553749801U, // SQDMULHv8i16 |
5663 | 414k | 553749801U, // SQDMULHv8i16_indexed |
5664 | 414k | 4028679677U, // SQDMULLB_ZZZI_D |
5665 | 414k | 1881228797U, // SQDMULLB_ZZZI_S |
5666 | 414k | 4028679677U, // SQDMULLB_ZZZ_D |
5667 | 414k | 2273379837U, // SQDMULLB_ZZZ_H |
5668 | 414k | 1881228797U, // SQDMULLB_ZZZ_S |
5669 | 414k | 4028684085U, // SQDMULLT_ZZZI_D |
5670 | 414k | 1881233205U, // SQDMULLT_ZZZI_S |
5671 | 414k | 4028684085U, // SQDMULLT_ZZZ_D |
5672 | 414k | 2273384245U, // SQDMULLT_ZZZ_H |
5673 | 414k | 1881233205U, // SQDMULLT_ZZZ_S |
5674 | 414k | 807424086U, // SQDMULLi16 |
5675 | 414k | 807424086U, // SQDMULLi32 |
5676 | 414k | 807424086U, // SQDMULLv1i32_indexed |
5677 | 414k | 807424086U, // SQDMULLv1i64_indexed |
5678 | 414k | 547459158U, // SQDMULLv2i32_indexed |
5679 | 414k | 547459158U, // SQDMULLv2i32_v2i64 |
5680 | 414k | 551653462U, // SQDMULLv4i16_indexed |
5681 | 414k | 551653462U, // SQDMULLv4i16_v4i32 |
5682 | 414k | 547455254U, // SQDMULLv4i32_indexed |
5683 | 414k | 547455254U, // SQDMULLv4i32_v2i64 |
5684 | 414k | 551649558U, // SQDMULLv8i16_indexed |
5685 | 414k | 551649558U, // SQDMULLv8i16_v4i32 |
5686 | 414k | 2686469320U, // SQINCB_XPiI |
5687 | 414k | 807421128U, // SQINCB_XPiWdI |
5688 | 414k | 2686470571U, // SQINCD_XPiI |
5689 | 414k | 807422379U, // SQINCD_XPiWdI |
5690 | 414k | 2686503339U, // SQINCD_ZPiI |
5691 | 414k | 2686471257U, // SQINCH_XPiI |
5692 | 414k | 807423065U, // SQINCH_XPiWdI |
5693 | 414k | 39914585U, // SQINCH_ZPiI |
5694 | 414k | 3760214652U, // SQINCP_XPWd_B |
5695 | 414k | 2418037372U, // SQINCP_XPWd_D |
5696 | 414k | 1881166460U, // SQINCP_XPWd_H |
5697 | 414k | 4028650108U, // SQINCP_XPWd_S |
5698 | 414k | 3760214652U, // SQINCP_XP_B |
5699 | 414k | 2418037372U, // SQINCP_XP_D |
5700 | 414k | 1881166460U, // SQINCP_XP_H |
5701 | 414k | 4028650108U, // SQINCP_XP_S |
5702 | 414k | 1075892860U, // SQINCP_ZP_D |
5703 | 414k | 1648431740U, // SQINCP_ZP_H |
5704 | 414k | 1344361084U, // SQINCP_ZP_S |
5705 | 414k | 2686474731U, // SQINCW_XPiI |
5706 | 414k | 807426539U, // SQINCW_XPiWdI |
5707 | 414k | 2686540267U, // SQINCW_ZPiI |
5708 | 414k | 2132793U, // SQNEG_ZPmZ_B |
5709 | 414k | 2149177U, // SQNEG_ZPmZ_D |
5710 | 414k | 272698169U, // SQNEG_ZPmZ_H |
5711 | 414k | 2181945U, // SQNEG_ZPmZ_S |
5712 | 414k | 543263545U, // SQNEGv16i8 |
5713 | 414k | 807422777U, // SQNEGv1i16 |
5714 | 414k | 807422777U, // SQNEGv1i32 |
5715 | 414k | 807422777U, // SQNEGv1i64 |
5716 | 414k | 807422777U, // SQNEGv1i8 |
5717 | 414k | 545360697U, // SQNEGv2i32 |
5718 | 414k | 547457849U, // SQNEGv2i64 |
5719 | 414k | 549555001U, // SQNEGv4i16 |
5720 | 414k | 551652153U, // SQNEGv4i32 |
5721 | 414k | 553749305U, // SQNEGv8i16 |
5722 | 414k | 555846457U, // SQNEGv8i8 |
5723 | 414k | 2185300954U, // SQRDCMLAH_ZZZI_H |
5724 | 414k | 1344359386U, // SQRDCMLAH_ZZZI_S |
5725 | 414k | 1344310234U, // SQRDCMLAH_ZZZ_B |
5726 | 414k | 1075891162U, // SQRDCMLAH_ZZZ_D |
5727 | 414k | 2185300954U, // SQRDCMLAH_ZZZ_H |
5728 | 414k | 1344359386U, // SQRDCMLAH_ZZZ_S |
5729 | 414k | 1075891173U, // SQRDMLAH_ZZZI_D |
5730 | 414k | 2185300965U, // SQRDMLAH_ZZZI_H |
5731 | 414k | 1344359397U, // SQRDMLAH_ZZZI_S |
5732 | 414k | 1344310245U, // SQRDMLAH_ZZZ_B |
5733 | 414k | 1075891173U, // SQRDMLAH_ZZZ_D |
5734 | 414k | 2185300965U, // SQRDMLAH_ZZZ_H |
5735 | 414k | 1344359397U, // SQRDMLAH_ZZZ_S |
5736 | 414k | 270748645U, // SQRDMLAHi16_indexed |
5737 | 414k | 270748645U, // SQRDMLAHi32_indexed |
5738 | 414k | 270748645U, // SQRDMLAHv1i16 |
5739 | 414k | 270748645U, // SQRDMLAHv1i32 |
5740 | 414k | 2961312741U, // SQRDMLAHv2i32 |
5741 | 414k | 2961312741U, // SQRDMLAHv2i32_indexed |
5742 | 414k | 2965507045U, // SQRDMLAHv4i16 |
5743 | 414k | 2965507045U, // SQRDMLAHv4i16_indexed |
5744 | 414k | 2967604197U, // SQRDMLAHv4i32 |
5745 | 414k | 2967604197U, // SQRDMLAHv4i32_indexed |
5746 | 414k | 2969701349U, // SQRDMLAHv8i16 |
5747 | 414k | 2969701349U, // SQRDMLAHv8i16_indexed |
5748 | 414k | 1075891778U, // SQRDMLSH_ZZZI_D |
5749 | 414k | 2185301570U, // SQRDMLSH_ZZZI_H |
5750 | 414k | 1344360002U, // SQRDMLSH_ZZZI_S |
5751 | 414k | 1344310850U, // SQRDMLSH_ZZZ_B |
5752 | 414k | 1075891778U, // SQRDMLSH_ZZZ_D |
5753 | 414k | 2185301570U, // SQRDMLSH_ZZZ_H |
5754 | 414k | 1344360002U, // SQRDMLSH_ZZZ_S |
5755 | 414k | 270749250U, // SQRDMLSHi16_indexed |
5756 | 414k | 270749250U, // SQRDMLSHi32_indexed |
5757 | 414k | 270749250U, // SQRDMLSHv1i16 |
5758 | 414k | 270749250U, // SQRDMLSHv1i32 |
5759 | 414k | 2961313346U, // SQRDMLSHv2i32 |
5760 | 414k | 2961313346U, // SQRDMLSHv2i32_indexed |
5761 | 414k | 2965507650U, // SQRDMLSHv4i16 |
5762 | 414k | 2965507650U, // SQRDMLSHv4i16_indexed |
5763 | 414k | 2967604802U, // SQRDMLSHv4i32 |
5764 | 414k | 2967604802U, // SQRDMLSHv4i32_indexed |
5765 | 414k | 2969701954U, // SQRDMLSHv8i16 |
5766 | 414k | 2969701954U, // SQRDMLSHv8i16_indexed |
5767 | 414k | 2418068786U, // SQRDMULH_ZZZI_D |
5768 | 414k | 2179009842U, // SQRDMULH_ZZZI_H |
5769 | 414k | 4028714290U, // SQRDMULH_ZZZI_S |
5770 | 414k | 3760229682U, // SQRDMULH_ZZZ_B |
5771 | 414k | 2418068786U, // SQRDMULH_ZZZ_D |
5772 | 414k | 2179009842U, // SQRDMULH_ZZZ_H |
5773 | 414k | 4028714290U, // SQRDMULH_ZZZ_S |
5774 | 414k | 807423282U, // SQRDMULHv1i16 |
5775 | 414k | 807423282U, // SQRDMULHv1i16_indexed |
5776 | 414k | 807423282U, // SQRDMULHv1i32 |
5777 | 414k | 807423282U, // SQRDMULHv1i32_indexed |
5778 | 414k | 545361202U, // SQRDMULHv2i32 |
5779 | 414k | 545361202U, // SQRDMULHv2i32_indexed |
5780 | 414k | 549555506U, // SQRDMULHv4i16 |
5781 | 414k | 549555506U, // SQRDMULHv4i16_indexed |
5782 | 414k | 551652658U, // SQRDMULHv4i32 |
5783 | 414k | 551652658U, // SQRDMULHv4i32_indexed |
5784 | 414k | 553749810U, // SQRDMULHv8i16 |
5785 | 414k | 553749810U, // SQRDMULHv8i16_indexed |
5786 | 414k | 3223360553U, // SQRSHLR_ZPmZ_B |
5787 | 414k | 3223376937U, // SQRSHLR_ZPmZ_D |
5788 | 414k | 3519091753U, // SQRSHLR_ZPmZ_H |
5789 | 414k | 3223409705U, // SQRSHLR_ZPmZ_S |
5790 | 414k | 3223359518U, // SQRSHL_ZPmZ_B |
5791 | 414k | 3223375902U, // SQRSHL_ZPmZ_D |
5792 | 414k | 3519090718U, // SQRSHL_ZPmZ_H |
5793 | 414k | 3223408670U, // SQRSHL_ZPmZ_S |
5794 | 414k | 543264798U, // SQRSHLv16i8 |
5795 | 414k | 807424030U, // SQRSHLv1i16 |
5796 | 414k | 807424030U, // SQRSHLv1i32 |
5797 | 414k | 807424030U, // SQRSHLv1i64 |
5798 | 414k | 807424030U, // SQRSHLv1i8 |
5799 | 414k | 545361950U, // SQRSHLv2i32 |
5800 | 414k | 547459102U, // SQRSHLv2i64 |
5801 | 414k | 549556254U, // SQRSHLv4i16 |
5802 | 414k | 551653406U, // SQRSHLv4i32 |
5803 | 414k | 553750558U, // SQRSHLv8i16 |
5804 | 414k | 555847710U, // SQRSHLv8i8 |
5805 | 414k | 1881179853U, // SQRSHRNB_ZZI_B |
5806 | 414k | 2172716749U, // SQRSHRNB_ZZI_H |
5807 | 414k | 2418099917U, // SQRSHRNB_ZZI_S |
5808 | 414k | 2686490562U, // SQRSHRNT_ZZI_B |
5809 | 414k | 2174818242U, // SQRSHRNT_ZZI_H |
5810 | 414k | 1075926978U, // SQRSHRNT_ZZI_S |
5811 | 414k | 807424457U, // SQRSHRNb |
5812 | 414k | 807424457U, // SQRSHRNh |
5813 | 414k | 807424457U, // SQRSHRNs |
5814 | 414k | 2959212934U, // SQRSHRNv16i8_shift |
5815 | 414k | 545362377U, // SQRSHRNv2i32_shift |
5816 | 414k | 549556681U, // SQRSHRNv4i16_shift |
5817 | 414k | 2967601542U, // SQRSHRNv4i32_shift |
5818 | 414k | 2969698694U, // SQRSHRNv8i16_shift |
5819 | 414k | 555848137U, // SQRSHRNv8i8_shift |
5820 | 414k | 1881179899U, // SQRSHRUNB_ZZI_B |
5821 | 414k | 2172716795U, // SQRSHRUNB_ZZI_H |
5822 | 414k | 2418099963U, // SQRSHRUNB_ZZI_S |
5823 | 414k | 2686490617U, // SQRSHRUNT_ZZI_B |
5824 | 414k | 2174818297U, // SQRSHRUNT_ZZI_H |
5825 | 414k | 1075927033U, // SQRSHRUNT_ZZI_S |
5826 | 414k | 807424519U, // SQRSHRUNb |
5827 | 414k | 807424519U, // SQRSHRUNh |
5828 | 414k | 807424519U, // SQRSHRUNs |
5829 | 414k | 2959212995U, // SQRSHRUNv16i8_shift |
5830 | 414k | 545362439U, // SQRSHRUNv2i32_shift |
5831 | 414k | 549556743U, // SQRSHRUNv4i16_shift |
5832 | 414k | 2967601603U, // SQRSHRUNv4i32_shift |
5833 | 414k | 2969698755U, // SQRSHRUNv8i16_shift |
5834 | 414k | 555848199U, // SQRSHRUNv8i8_shift |
5835 | 414k | 3223360537U, // SQSHLR_ZPmZ_B |
5836 | 414k | 3223376921U, // SQSHLR_ZPmZ_D |
5837 | 414k | 3519091737U, // SQSHLR_ZPmZ_H |
5838 | 414k | 3223409689U, // SQSHLR_ZPmZ_S |
5839 | 414k | 3223361695U, // SQSHLU_ZPmI_B |
5840 | 414k | 3223378079U, // SQSHLU_ZPmI_D |
5841 | 414k | 3519092895U, // SQSHLU_ZPmI_H |
5842 | 414k | 3223410847U, // SQSHLU_ZPmI_S |
5843 | 414k | 807426207U, // SQSHLUb |
5844 | 414k | 807426207U, // SQSHLUd |
5845 | 414k | 807426207U, // SQSHLUh |
5846 | 414k | 807426207U, // SQSHLUs |
5847 | 414k | 543266975U, // SQSHLUv16i8_shift |
5848 | 414k | 545364127U, // SQSHLUv2i32_shift |
5849 | 414k | 547461279U, // SQSHLUv2i64_shift |
5850 | 414k | 549558431U, // SQSHLUv4i16_shift |
5851 | 414k | 551655583U, // SQSHLUv4i32_shift |
5852 | 414k | 553752735U, // SQSHLUv8i16_shift |
5853 | 414k | 555849887U, // SQSHLUv8i8_shift |
5854 | 414k | 3223359504U, // SQSHL_ZPmI_B |
5855 | 414k | 3223375888U, // SQSHL_ZPmI_D |
5856 | 414k | 3519090704U, // SQSHL_ZPmI_H |
5857 | 414k | 3223408656U, // SQSHL_ZPmI_S |
5858 | 414k | 3223359504U, // SQSHL_ZPmZ_B |
5859 | 414k | 3223375888U, // SQSHL_ZPmZ_D |
5860 | 414k | 3519090704U, // SQSHL_ZPmZ_H |
5861 | 414k | 3223408656U, // SQSHL_ZPmZ_S |
5862 | 414k | 807424016U, // SQSHLb |
5863 | 414k | 807424016U, // SQSHLd |
5864 | 414k | 807424016U, // SQSHLh |
5865 | 414k | 807424016U, // SQSHLs |
5866 | 414k | 543264784U, // SQSHLv16i8 |
5867 | 414k | 543264784U, // SQSHLv16i8_shift |
5868 | 414k | 807424016U, // SQSHLv1i16 |
5869 | 414k | 807424016U, // SQSHLv1i32 |
5870 | 414k | 807424016U, // SQSHLv1i64 |
5871 | 414k | 807424016U, // SQSHLv1i8 |
5872 | 414k | 545361936U, // SQSHLv2i32 |
5873 | 414k | 545361936U, // SQSHLv2i32_shift |
5874 | 414k | 547459088U, // SQSHLv2i64 |
5875 | 414k | 547459088U, // SQSHLv2i64_shift |
5876 | 414k | 549556240U, // SQSHLv4i16 |
5877 | 414k | 549556240U, // SQSHLv4i16_shift |
5878 | 414k | 551653392U, // SQSHLv4i32 |
5879 | 414k | 551653392U, // SQSHLv4i32_shift |
5880 | 414k | 553750544U, // SQSHLv8i16 |
5881 | 414k | 553750544U, // SQSHLv8i16_shift |
5882 | 414k | 555847696U, // SQSHLv8i8 |
5883 | 414k | 555847696U, // SQSHLv8i8_shift |
5884 | 414k | 1881179835U, // SQSHRNB_ZZI_B |
5885 | 414k | 2172716731U, // SQSHRNB_ZZI_H |
5886 | 414k | 2418099899U, // SQSHRNB_ZZI_S |
5887 | 414k | 2686490544U, // SQSHRNT_ZZI_B |
5888 | 414k | 2174818224U, // SQSHRNT_ZZI_H |
5889 | 414k | 1075926960U, // SQSHRNT_ZZI_S |
5890 | 414k | 807424441U, // SQSHRNb |
5891 | 414k | 807424441U, // SQSHRNh |
5892 | 414k | 807424441U, // SQSHRNs |
5893 | 414k | 2959212916U, // SQSHRNv16i8_shift |
5894 | 414k | 545362361U, // SQSHRNv2i32_shift |
5895 | 414k | 549556665U, // SQSHRNv4i16_shift |
5896 | 414k | 2967601524U, // SQSHRNv4i32_shift |
5897 | 414k | 2969698676U, // SQSHRNv8i16_shift |
5898 | 414k | 555848121U, // SQSHRNv8i8_shift |
5899 | 414k | 1881179889U, // SQSHRUNB_ZZI_B |
5900 | 414k | 2172716785U, // SQSHRUNB_ZZI_H |
5901 | 414k | 2418099953U, // SQSHRUNB_ZZI_S |
5902 | 414k | 2686490607U, // SQSHRUNT_ZZI_B |
5903 | 414k | 2174818287U, // SQSHRUNT_ZZI_H |
5904 | 414k | 1075927023U, // SQSHRUNT_ZZI_S |
5905 | 414k | 807424510U, // SQSHRUNb |
5906 | 414k | 807424510U, // SQSHRUNh |
5907 | 414k | 807424510U, // SQSHRUNs |
5908 | 414k | 2959212985U, // SQSHRUNv16i8_shift |
5909 | 414k | 545362430U, // SQSHRUNv2i32_shift |
5910 | 414k | 549556734U, // SQSHRUNv4i16_shift |
5911 | 414k | 2967601593U, // SQSHRUNv4i32_shift |
5912 | 414k | 2969698745U, // SQSHRUNv8i16_shift |
5913 | 414k | 555848190U, // SQSHRUNv8i8_shift |
5914 | 414k | 3223360459U, // SQSUBR_ZPmZ_B |
5915 | 414k | 3223376843U, // SQSUBR_ZPmZ_D |
5916 | 414k | 3519091659U, // SQSUBR_ZPmZ_H |
5917 | 414k | 3223409611U, // SQSUBR_ZPmZ_S |
5918 | 414k | 3760228482U, // SQSUB_ZI_B |
5919 | 414k | 2418067586U, // SQSUB_ZI_D |
5920 | 414k | 2179008642U, // SQSUB_ZI_H |
5921 | 414k | 4028713090U, // SQSUB_ZI_S |
5922 | 414k | 3223357570U, // SQSUB_ZPmZ_B |
5923 | 414k | 3223373954U, // SQSUB_ZPmZ_D |
5924 | 414k | 3519088770U, // SQSUB_ZPmZ_H |
5925 | 414k | 3223406722U, // SQSUB_ZPmZ_S |
5926 | 414k | 3760228482U, // SQSUB_ZZZ_B |
5927 | 414k | 2418067586U, // SQSUB_ZZZ_D |
5928 | 414k | 2179008642U, // SQSUB_ZZZ_H |
5929 | 414k | 4028713090U, // SQSUB_ZZZ_S |
5930 | 414k | 543262850U, // SQSUBv16i8 |
5931 | 414k | 807422082U, // SQSUBv1i16 |
5932 | 414k | 807422082U, // SQSUBv1i32 |
5933 | 414k | 807422082U, // SQSUBv1i64 |
5934 | 414k | 807422082U, // SQSUBv1i8 |
5935 | 414k | 545360002U, // SQSUBv2i32 |
5936 | 414k | 547457154U, // SQSUBv2i64 |
5937 | 414k | 549554306U, // SQSUBv4i16 |
5938 | 414k | 551651458U, // SQSUBv4i32 |
5939 | 414k | 553748610U, // SQSUBv8i16 |
5940 | 414k | 555845762U, // SQSUBv8i8 |
5941 | 414k | 1881179873U, // SQXTNB_ZZ_B |
5942 | 414k | 1635845857U, // SQXTNB_ZZ_H |
5943 | 414k | 2418099937U, // SQXTNB_ZZ_S |
5944 | 414k | 2686490591U, // SQXTNT_ZZ_B |
5945 | 414k | 1637947359U, // SQXTNT_ZZ_H |
5946 | 414k | 1075927007U, // SQXTNT_ZZ_S |
5947 | 414k | 2959212969U, // SQXTNv16i8 |
5948 | 414k | 807424496U, // SQXTNv1i16 |
5949 | 414k | 807424496U, // SQXTNv1i32 |
5950 | 414k | 807424496U, // SQXTNv1i8 |
5951 | 414k | 545362416U, // SQXTNv2i32 |
5952 | 414k | 549556720U, // SQXTNv4i16 |
5953 | 414k | 2967601577U, // SQXTNv4i32 |
5954 | 414k | 2969698729U, // SQXTNv8i16 |
5955 | 414k | 555848176U, // SQXTNv8i8 |
5956 | 414k | 1881179910U, // SQXTUNB_ZZ_B |
5957 | 414k | 1635845894U, // SQXTUNB_ZZ_H |
5958 | 414k | 2418099974U, // SQXTUNB_ZZ_S |
5959 | 414k | 2686490628U, // SQXTUNT_ZZ_B |
5960 | 414k | 1637947396U, // SQXTUNT_ZZ_H |
5961 | 414k | 1075927044U, // SQXTUNT_ZZ_S |
5962 | 414k | 2959213006U, // SQXTUNv16i8 |
5963 | 414k | 807424529U, // SQXTUNv1i16 |
5964 | 414k | 807424529U, // SQXTUNv1i32 |
5965 | 414k | 807424529U, // SQXTUNv1i8 |
5966 | 414k | 545362449U, // SQXTUNv2i32 |
5967 | 414k | 549556753U, // SQXTUNv4i16 |
5968 | 414k | 2967601614U, // SQXTUNv4i32 |
5969 | 414k | 2969698766U, // SQXTUNv8i16 |
5970 | 414k | 555848209U, // SQXTUNv8i8 |
5971 | 414k | 3223357911U, // SRHADD_ZPmZ_B |
5972 | 414k | 3223374295U, // SRHADD_ZPmZ_D |
5973 | 414k | 3519089111U, // SRHADD_ZPmZ_H |
5974 | 414k | 3223407063U, // SRHADD_ZPmZ_S |
5975 | 414k | 543263191U, // SRHADDv16i8 |
5976 | 414k | 545360343U, // SRHADDv2i32 |
5977 | 414k | 549554647U, // SRHADDv4i16 |
5978 | 414k | 551651799U, // SRHADDv4i32 |
5979 | 414k | 553748951U, // SRHADDv8i16 |
5980 | 414k | 555846103U, // SRHADDv8i8 |
5981 | 414k | 1344311023U, // SRI_ZZI_B |
5982 | 414k | 1075891951U, // SRI_ZZI_D |
5983 | 414k | 2185301743U, // SRI_ZZI_H |
5984 | 414k | 1344360175U, // SRI_ZZI_S |
5985 | 414k | 270749423U, // SRId |
5986 | 414k | 2959216367U, // SRIv16i8_shift |
5987 | 414k | 2961313519U, // SRIv2i32_shift |
5988 | 414k | 2963410671U, // SRIv2i64_shift |
5989 | 414k | 2965507823U, // SRIv4i16_shift |
5990 | 414k | 2967604975U, // SRIv4i32_shift |
5991 | 414k | 2969702127U, // SRIv8i16_shift |
5992 | 414k | 2971799279U, // SRIv8i8_shift |
5993 | 414k | 3223360571U, // SRSHLR_ZPmZ_B |
5994 | 414k | 3223376955U, // SRSHLR_ZPmZ_D |
5995 | 414k | 3519091771U, // SRSHLR_ZPmZ_H |
5996 | 414k | 3223409723U, // SRSHLR_ZPmZ_S |
5997 | 414k | 3223359534U, // SRSHL_ZPmZ_B |
5998 | 414k | 3223375918U, // SRSHL_ZPmZ_D |
5999 | 414k | 3519090734U, // SRSHL_ZPmZ_H |
6000 | 414k | 3223408686U, // SRSHL_ZPmZ_S |
6001 | 414k | 543264814U, // SRSHLv16i8 |
6002 | 414k | 807424046U, // SRSHLv1i64 |
6003 | 414k | 545361966U, // SRSHLv2i32 |
6004 | 414k | 547459118U, // SRSHLv2i64 |
6005 | 414k | 549556270U, // SRSHLv4i16 |
6006 | 414k | 551653422U, // SRSHLv4i32 |
6007 | 414k | 553750574U, // SRSHLv8i16 |
6008 | 414k | 555847726U, // SRSHLv8i8 |
6009 | 414k | 3223360499U, // SRSHR_ZPmI_B |
6010 | 414k | 3223376883U, // SRSHR_ZPmI_D |
6011 | 414k | 3519091699U, // SRSHR_ZPmI_H |
6012 | 414k | 3223409651U, // SRSHR_ZPmI_S |
6013 | 414k | 807425011U, // SRSHRd |
6014 | 414k | 543265779U, // SRSHRv16i8_shift |
6015 | 414k | 545362931U, // SRSHRv2i32_shift |
6016 | 414k | 547460083U, // SRSHRv2i64_shift |
6017 | 414k | 549557235U, // SRSHRv4i16_shift |
6018 | 414k | 551654387U, // SRSHRv4i32_shift |
6019 | 414k | 553751539U, // SRSHRv8i16_shift |
6020 | 414k | 555848691U, // SRSHRv8i8_shift |
6021 | 414k | 1344308050U, // SRSRA_ZZI_B |
6022 | 414k | 1075888978U, // SRSRA_ZZI_D |
6023 | 414k | 2185298770U, // SRSRA_ZZI_H |
6024 | 414k | 1344357202U, // SRSRA_ZZI_S |
6025 | 414k | 270746450U, // SRSRAd |
6026 | 414k | 2959213394U, // SRSRAv16i8_shift |
6027 | 414k | 2961310546U, // SRSRAv2i32_shift |
6028 | 414k | 2963407698U, // SRSRAv2i64_shift |
6029 | 414k | 2965504850U, // SRSRAv4i16_shift |
6030 | 414k | 2967602002U, // SRSRAv4i32_shift |
6031 | 414k | 2969699154U, // SRSRAv8i16_shift |
6032 | 414k | 2971796306U, // SRSRAv8i8_shift |
6033 | 414k | 4028679661U, // SSHLLB_ZZI_D |
6034 | 414k | 2273379821U, // SSHLLB_ZZI_H |
6035 | 414k | 1881228781U, // SSHLLB_ZZI_S |
6036 | 414k | 4028684069U, // SSHLLT_ZZI_D |
6037 | 414k | 2273384229U, // SSHLLT_ZZI_H |
6038 | 414k | 1881233189U, // SSHLLT_ZZI_S |
6039 | 414k | 553746694U, // SSHLLv16i8_shift |
6040 | 414k | 547459144U, // SSHLLv2i32_shift |
6041 | 414k | 551653448U, // SSHLLv4i16_shift |
6042 | 414k | 547455238U, // SSHLLv4i32_shift |
6043 | 414k | 551649542U, // SSHLLv8i16_shift |
6044 | 414k | 553750600U, // SSHLLv8i8_shift |
6045 | 414k | 543264828U, // SSHLv16i8 |
6046 | 414k | 807424060U, // SSHLv1i64 |
6047 | 414k | 545361980U, // SSHLv2i32 |
6048 | 414k | 547459132U, // SSHLv2i64 |
6049 | 414k | 549556284U, // SSHLv4i16 |
6050 | 414k | 551653436U, // SSHLv4i32 |
6051 | 414k | 553750588U, // SSHLv8i16 |
6052 | 414k | 555847740U, // SSHLv8i8 |
6053 | 414k | 807425025U, // SSHRd |
6054 | 414k | 543265793U, // SSHRv16i8_shift |
6055 | 414k | 545362945U, // SSHRv2i32_shift |
6056 | 414k | 547460097U, // SSHRv2i64_shift |
6057 | 414k | 549557249U, // SSHRv4i16_shift |
6058 | 414k | 551654401U, // SSHRv4i32_shift |
6059 | 414k | 553751553U, // SSHRv8i16_shift |
6060 | 414k | 555848705U, // SSHRv8i8_shift |
6061 | 414k | 1344308064U, // SSRA_ZZI_B |
6062 | 414k | 1075888992U, // SSRA_ZZI_D |
6063 | 414k | 2185298784U, // SSRA_ZZI_H |
6064 | 414k | 1344357216U, // SSRA_ZZI_S |
6065 | 414k | 270746464U, // SSRAd |
6066 | 414k | 2959213408U, // SSRAv16i8_shift |
6067 | 414k | 2961310560U, // SSRAv2i32_shift |
6068 | 414k | 2963407712U, // SSRAv2i64_shift |
6069 | 414k | 2965504864U, // SSRAv4i16_shift |
6070 | 414k | 2967602016U, // SSRAv4i32_shift |
6071 | 414k | 2969699168U, // SSRAv8i16_shift |
6072 | 414k | 2971796320U, // SSRAv8i8_shift |
6073 | 414k | 1107674095U, // SST1B_D_IMM |
6074 | 414k | 302367727U, // SST1B_D_REAL |
6075 | 414k | 302367727U, // SST1B_D_SXTW |
6076 | 414k | 302367727U, // SST1B_D_UXTW |
6077 | 414k | 1376125935U, // SST1B_S_IMM |
6078 | 414k | 302384111U, // SST1B_S_SXTW |
6079 | 414k | 302384111U, // SST1B_S_UXTW |
6080 | 414k | 1107675460U, // SST1D_IMM |
6081 | 414k | 302369092U, // SST1D_REAL |
6082 | 414k | 302369092U, // SST1D_SCALED_SCALED_REAL |
6083 | 414k | 302369092U, // SST1D_SXTW |
6084 | 414k | 302369092U, // SST1D_SXTW_SCALED |
6085 | 414k | 302369092U, // SST1D_UXTW |
6086 | 414k | 302369092U, // SST1D_UXTW_SCALED |
6087 | 414k | 1107676045U, // SST1H_D_IMM |
6088 | 414k | 302369677U, // SST1H_D_REAL |
6089 | 414k | 302369677U, // SST1H_D_SCALED_SCALED_REAL |
6090 | 414k | 302369677U, // SST1H_D_SXTW |
6091 | 414k | 302369677U, // SST1H_D_SXTW_SCALED |
6092 | 414k | 302369677U, // SST1H_D_UXTW |
6093 | 414k | 302369677U, // SST1H_D_UXTW_SCALED |
6094 | 414k | 1376127885U, // SST1H_S_IMM |
6095 | 414k | 302386061U, // SST1H_S_SXTW |
6096 | 414k | 302386061U, // SST1H_S_SXTW_SCALED |
6097 | 414k | 302386061U, // SST1H_S_UXTW |
6098 | 414k | 302386061U, // SST1H_S_UXTW_SCALED |
6099 | 414k | 1107679634U, // SST1W_D_IMM |
6100 | 414k | 302373266U, // SST1W_D_REAL |
6101 | 414k | 302373266U, // SST1W_D_SCALED_SCALED_REAL |
6102 | 414k | 302373266U, // SST1W_D_SXTW |
6103 | 414k | 302373266U, // SST1W_D_SXTW_SCALED |
6104 | 414k | 302373266U, // SST1W_D_UXTW |
6105 | 414k | 302373266U, // SST1W_D_UXTW_SCALED |
6106 | 414k | 1376131474U, // SST1W_IMM |
6107 | 414k | 302389650U, // SST1W_SXTW |
6108 | 414k | 302389650U, // SST1W_SXTW_SCALED |
6109 | 414k | 302389650U, // SST1W_UXTW |
6110 | 414k | 302389650U, // SST1W_UXTW_SCALED |
6111 | 414k | 4028683837U, // SSUBLBT_ZZZ_D |
6112 | 414k | 2273383997U, // SSUBLBT_ZZZ_H |
6113 | 414k | 1881232957U, // SSUBLBT_ZZZ_S |
6114 | 414k | 4028679590U, // SSUBLB_ZZZ_D |
6115 | 414k | 2273379750U, // SSUBLB_ZZZ_H |
6116 | 414k | 1881228710U, // SSUBLB_ZZZ_S |
6117 | 414k | 4028680245U, // SSUBLTB_ZZZ_D |
6118 | 414k | 2273380405U, // SSUBLTB_ZZZ_H |
6119 | 414k | 1881229365U, // SSUBLTB_ZZZ_S |
6120 | 414k | 4028683993U, // SSUBLT_ZZZ_D |
6121 | 414k | 2273384153U, // SSUBLT_ZZZ_H |
6122 | 414k | 1881233113U, // SSUBLT_ZZZ_S |
6123 | 414k | 553746646U, // SSUBLv16i8_v8i16 |
6124 | 414k | 547458992U, // SSUBLv2i32_v2i64 |
6125 | 414k | 551653296U, // SSUBLv4i16_v4i32 |
6126 | 414k | 547455190U, // SSUBLv4i32_v2i64 |
6127 | 414k | 551649494U, // SSUBLv8i16_v4i32 |
6128 | 414k | 553750448U, // SSUBLv8i8_v8i16 |
6129 | 414k | 2418067606U, // SSUBWB_ZZZ_D |
6130 | 414k | 2179008662U, // SSUBWB_ZZZ_H |
6131 | 414k | 4028713110U, // SSUBWB_ZZZ_S |
6132 | 414k | 2418071658U, // SSUBWT_ZZZ_D |
6133 | 414k | 2179012714U, // SSUBWT_ZZZ_H |
6134 | 414k | 4028717162U, // SSUBWT_ZZZ_S |
6135 | 414k | 553746936U, // SSUBWv16i8_v8i16 |
6136 | 414k | 547461572U, // SSUBWv2i32_v2i64 |
6137 | 414k | 551655876U, // SSUBWv4i16_v4i32 |
6138 | 414k | 547455480U, // SSUBWv4i32_v2i64 |
6139 | 414k | 551649784U, // SSUBWv8i16_v4i32 |
6140 | 414k | 553753028U, // SSUBWv8i8_v8i16 |
6141 | 414k | 302449647U, // ST1B |
6142 | 414k | 302367727U, // ST1B_D |
6143 | 414k | 302367727U, // ST1B_D_IMM |
6144 | 414k | 302466031U, // ST1B_H |
6145 | 414k | 302466031U, // ST1B_H_IMM |
6146 | 414k | 302449647U, // ST1B_IMM |
6147 | 414k | 302384111U, // ST1B_S |
6148 | 414k | 302384111U, // ST1B_S_IMM |
6149 | 414k | 302369092U, // ST1D |
6150 | 414k | 302369092U, // ST1D_IMM |
6151 | 414k | 491599U, // ST1Fourv16b |
6152 | 414k | 76005455U, // ST1Fourv16b_POST |
6153 | 414k | 524367U, // ST1Fourv1d |
6154 | 414k | 78135375U, // ST1Fourv1d_POST |
6155 | 414k | 557135U, // ST1Fourv2d |
6156 | 414k | 76070991U, // ST1Fourv2d_POST |
6157 | 414k | 589903U, // ST1Fourv2s |
6158 | 414k | 78200911U, // ST1Fourv2s_POST |
6159 | 414k | 622671U, // ST1Fourv4h |
6160 | 414k | 78233679U, // ST1Fourv4h_POST |
6161 | 414k | 655439U, // ST1Fourv4s |
6162 | 414k | 76169295U, // ST1Fourv4s_POST |
6163 | 414k | 688207U, // ST1Fourv8b |
6164 | 414k | 78299215U, // ST1Fourv8b_POST |
6165 | 414k | 720975U, // ST1Fourv8h |
6166 | 414k | 76234831U, // ST1Fourv8h_POST |
6167 | 414k | 302467981U, // ST1H |
6168 | 414k | 302369677U, // ST1H_D |
6169 | 414k | 302369677U, // ST1H_D_IMM |
6170 | 414k | 302467981U, // ST1H_IMM |
6171 | 414k | 302386061U, // ST1H_S |
6172 | 414k | 302386061U, // ST1H_S_IMM |
6173 | 414k | 491599U, // ST1Onev16b |
6174 | 414k | 80199759U, // ST1Onev16b_POST |
6175 | 414k | 524367U, // ST1Onev1d |
6176 | 414k | 82329679U, // ST1Onev1d_POST |
6177 | 414k | 557135U, // ST1Onev2d |
6178 | 414k | 80265295U, // ST1Onev2d_POST |
6179 | 414k | 589903U, // ST1Onev2s |
6180 | 414k | 82395215U, // ST1Onev2s_POST |
6181 | 414k | 622671U, // ST1Onev4h |
6182 | 414k | 82427983U, // ST1Onev4h_POST |
6183 | 414k | 655439U, // ST1Onev4s |
6184 | 414k | 80363599U, // ST1Onev4s_POST |
6185 | 414k | 688207U, // ST1Onev8b |
6186 | 414k | 82493519U, // ST1Onev8b_POST |
6187 | 414k | 720975U, // ST1Onev8h |
6188 | 414k | 80429135U, // ST1Onev8h_POST |
6189 | 414k | 491599U, // ST1Threev16b |
6190 | 414k | 90685519U, // ST1Threev16b_POST |
6191 | 414k | 524367U, // ST1Threev1d |
6192 | 414k | 92815439U, // ST1Threev1d_POST |
6193 | 414k | 557135U, // ST1Threev2d |
6194 | 414k | 90751055U, // ST1Threev2d_POST |
6195 | 414k | 589903U, // ST1Threev2s |
6196 | 414k | 92880975U, // ST1Threev2s_POST |
6197 | 414k | 622671U, // ST1Threev4h |
6198 | 414k | 92913743U, // ST1Threev4h_POST |
6199 | 414k | 655439U, // ST1Threev4s |
6200 | 414k | 90849359U, // ST1Threev4s_POST |
6201 | 414k | 688207U, // ST1Threev8b |
6202 | 414k | 92979279U, // ST1Threev8b_POST |
6203 | 414k | 720975U, // ST1Threev8h |
6204 | 414k | 90914895U, // ST1Threev8h_POST |
6205 | 414k | 491599U, // ST1Twov16b |
6206 | 414k | 78102607U, // ST1Twov16b_POST |
6207 | 414k | 524367U, // ST1Twov1d |
6208 | 414k | 80232527U, // ST1Twov1d_POST |
6209 | 414k | 557135U, // ST1Twov2d |
6210 | 414k | 78168143U, // ST1Twov2d_POST |
6211 | 414k | 589903U, // ST1Twov2s |
6212 | 414k | 80298063U, // ST1Twov2s_POST |
6213 | 414k | 622671U, // ST1Twov4h |
6214 | 414k | 80330831U, // ST1Twov4h_POST |
6215 | 414k | 655439U, // ST1Twov4s |
6216 | 414k | 78266447U, // ST1Twov4s_POST |
6217 | 414k | 688207U, // ST1Twov8b |
6218 | 414k | 80396367U, // ST1Twov8b_POST |
6219 | 414k | 720975U, // ST1Twov8h |
6220 | 414k | 78331983U, // ST1Twov8h_POST |
6221 | 414k | 302389650U, // ST1W |
6222 | 414k | 302373266U, // ST1W_D |
6223 | 414k | 302373266U, // ST1W_D_IMM |
6224 | 414k | 302389650U, // ST1W_IMM |
6225 | 414k | 1168548339U, // ST1_MXIPXX_H_B |
6226 | 414k | 1168548353U, // ST1_MXIPXX_H_D |
6227 | 414k | 1168548367U, // ST1_MXIPXX_H_H |
6228 | 414k | 1168548381U, // ST1_MXIPXX_H_Q |
6229 | 414k | 1168548395U, // ST1_MXIPXX_H_S |
6230 | 414k | 1168564723U, // ST1_MXIPXX_V_B |
6231 | 414k | 1168564737U, // ST1_MXIPXX_V_D |
6232 | 414k | 1168564751U, // ST1_MXIPXX_V_H |
6233 | 414k | 1168564765U, // ST1_MXIPXX_V_Q |
6234 | 414k | 1168564779U, // ST1_MXIPXX_V_S |
6235 | 414k | 1032271U, // ST1i16 |
6236 | 414k | 1407942735U, // ST1i16_POST |
6237 | 414k | 1048655U, // ST1i32 |
6238 | 414k | 1676410959U, // ST1i32_POST |
6239 | 414k | 1065039U, // ST1i64 |
6240 | 414k | 1944879183U, // ST1i64_POST |
6241 | 414k | 1081423U, // ST1i8 |
6242 | 414k | 2213347407U, // ST1i8_POST |
6243 | 414k | 302449676U, // ST2B |
6244 | 414k | 302449676U, // ST2B_IMM |
6245 | 414k | 302369104U, // ST2D |
6246 | 414k | 302369104U, // ST2D_IMM |
6247 | 414k | 838880021U, // ST2GOffset |
6248 | 414k | 302205717U, // ST2GPostIndex |
6249 | 414k | 302205717U, // ST2GPreIndex |
6250 | 414k | 302468010U, // ST2H |
6251 | 414k | 302468010U, // ST2H_IMM |
6252 | 414k | 492019U, // ST2Twov16b |
6253 | 414k | 78103027U, // ST2Twov16b_POST |
6254 | 414k | 557555U, // ST2Twov2d |
6255 | 414k | 78168563U, // ST2Twov2d_POST |
6256 | 414k | 590323U, // ST2Twov2s |
6257 | 414k | 80298483U, // ST2Twov2s_POST |
6258 | 414k | 623091U, // ST2Twov4h |
6259 | 414k | 80331251U, // ST2Twov4h_POST |
6260 | 414k | 655859U, // ST2Twov4s |
6261 | 414k | 78266867U, // ST2Twov4s_POST |
6262 | 414k | 688627U, // ST2Twov8b |
6263 | 414k | 80396787U, // ST2Twov8b_POST |
6264 | 414k | 721395U, // ST2Twov8h |
6265 | 414k | 78332403U, // ST2Twov8h_POST |
6266 | 414k | 302389670U, // ST2W |
6267 | 414k | 302389670U, // ST2W_IMM |
6268 | 414k | 1032691U, // ST2i16 |
6269 | 414k | 1676378611U, // ST2i16_POST |
6270 | 414k | 1049075U, // ST2i32 |
6271 | 414k | 1944846835U, // ST2i32_POST |
6272 | 414k | 1065459U, // ST2i64 |
6273 | 414k | 2481750515U, // ST2i64_POST |
6274 | 414k | 1081843U, // ST2i8 |
6275 | 414k | 1408041459U, // ST2i8_POST |
6276 | 414k | 302449697U, // ST3B |
6277 | 414k | 302449697U, // ST3B_IMM |
6278 | 414k | 302369116U, // ST3D |
6279 | 414k | 302369116U, // ST3D_IMM |
6280 | 414k | 302468022U, // ST3H |
6281 | 414k | 302468022U, // ST3H_IMM |
6282 | 414k | 492085U, // ST3Threev16b |
6283 | 414k | 90686005U, // ST3Threev16b_POST |
6284 | 414k | 557621U, // ST3Threev2d |
6285 | 414k | 90751541U, // ST3Threev2d_POST |
6286 | 414k | 590389U, // ST3Threev2s |
6287 | 414k | 92881461U, // ST3Threev2s_POST |
6288 | 414k | 623157U, // ST3Threev4h |
6289 | 414k | 92914229U, // ST3Threev4h_POST |
6290 | 414k | 655925U, // ST3Threev4s |
6291 | 414k | 90849845U, // ST3Threev4s_POST |
6292 | 414k | 688693U, // ST3Threev8b |
6293 | 414k | 92979765U, // ST3Threev8b_POST |
6294 | 414k | 721461U, // ST3Threev8h |
6295 | 414k | 90915381U, // ST3Threev8h_POST |
6296 | 414k | 302389682U, // ST3W |
6297 | 414k | 302389682U, // ST3W_IMM |
6298 | 414k | 1032757U, // ST3i16 |
6299 | 414k | 2750120501U, // ST3i16_POST |
6300 | 414k | 1049141U, // ST3i32 |
6301 | 414k | 3018588725U, // ST3i32_POST |
6302 | 414k | 1065525U, // ST3i64 |
6303 | 414k | 3287056949U, // ST3i64_POST |
6304 | 414k | 1081909U, // ST3i8 |
6305 | 414k | 3555525173U, // ST3i8_POST |
6306 | 414k | 302449723U, // ST4B |
6307 | 414k | 302449723U, // ST4B_IMM |
6308 | 414k | 302369128U, // ST4D |
6309 | 414k | 302369128U, // ST4D_IMM |
6310 | 414k | 492102U, // ST4Fourv16b |
6311 | 414k | 76005958U, // ST4Fourv16b_POST |
6312 | 414k | 557638U, // ST4Fourv2d |
6313 | 414k | 76071494U, // ST4Fourv2d_POST |
6314 | 414k | 590406U, // ST4Fourv2s |
6315 | 414k | 78201414U, // ST4Fourv2s_POST |
6316 | 414k | 623174U, // ST4Fourv4h |
6317 | 414k | 78234182U, // ST4Fourv4h_POST |
6318 | 414k | 655942U, // ST4Fourv4s |
6319 | 414k | 76169798U, // ST4Fourv4s_POST |
6320 | 414k | 688710U, // ST4Fourv8b |
6321 | 414k | 78299718U, // ST4Fourv8b_POST |
6322 | 414k | 721478U, // ST4Fourv8h |
6323 | 414k | 76235334U, // ST4Fourv8h_POST |
6324 | 414k | 302468034U, // ST4H |
6325 | 414k | 302468034U, // ST4H_IMM |
6326 | 414k | 302389694U, // ST4W |
6327 | 414k | 302389694U, // ST4W_IMM |
6328 | 414k | 1032774U, // ST4i16 |
6329 | 414k | 1944814150U, // ST4i16_POST |
6330 | 414k | 1049158U, // ST4i32 |
6331 | 414k | 2481717830U, // ST4i32_POST |
6332 | 414k | 1065542U, // ST4i64 |
6333 | 414k | 3823927878U, // ST4i64_POST |
6334 | 414k | 1081926U, // ST4i8 |
6335 | 414k | 1676476998U, // ST4i8_POST |
6336 | 414k | 885806U, // ST64B |
6337 | 414k | 4028651719U, // ST64BV |
6338 | 414k | 4028645408U, // ST64BV0 |
6339 | 414k | 838881602U, // STGM |
6340 | 414k | 838880085U, // STGOffset |
6341 | 414k | 807424670U, // STGPi |
6342 | 414k | 302205781U, // STGPostIndex |
6343 | 414k | 270750366U, // STGPpost |
6344 | 414k | 270750366U, // STGPpre |
6345 | 414k | 302205781U, // STGPreIndex |
6346 | 414k | 838879056U, // STLLRB |
6347 | 414k | 838880682U, // STLLRH |
6348 | 414k | 838882379U, // STLLRW |
6349 | 414k | 838882379U, // STLLRX |
6350 | 414k | 838879064U, // STLRB |
6351 | 414k | 838880690U, // STLRH |
6352 | 414k | 838882392U, // STLRW |
6353 | 414k | 838882392U, // STLRX |
6354 | 414k | 838879114U, // STLURBi |
6355 | 414k | 838880740U, // STLURHi |
6356 | 414k | 838882489U, // STLURWi |
6357 | 414k | 838882489U, // STLURXi |
6358 | 414k | 807424870U, // STLXPW |
6359 | 414k | 807424870U, // STLXPX |
6360 | 414k | 807421873U, // STLXRB |
6361 | 414k | 807423499U, // STLXRH |
6362 | 414k | 807425273U, // STLXRW |
6363 | 414k | 807425273U, // STLXRX |
6364 | 414k | 807424782U, // STNPDi |
6365 | 414k | 807424782U, // STNPQi |
6366 | 414k | 807424782U, // STNPSi |
6367 | 414k | 807424782U, // STNPWi |
6368 | 414k | 807424782U, // STNPXi |
6369 | 414k | 302449639U, // STNT1B_ZRI |
6370 | 414k | 302449639U, // STNT1B_ZRR |
6371 | 414k | 1107674087U, // STNT1B_ZZR_D_REAL |
6372 | 414k | 1376125927U, // STNT1B_ZZR_S_REAL |
6373 | 414k | 302369084U, // STNT1D_ZRI |
6374 | 414k | 302369084U, // STNT1D_ZRR |
6375 | 414k | 1107675452U, // STNT1D_ZZR_D_REAL |
6376 | 414k | 302467973U, // STNT1H_ZRI |
6377 | 414k | 302467973U, // STNT1H_ZRR |
6378 | 414k | 1107676037U, // STNT1H_ZZR_D_REAL |
6379 | 414k | 1376127877U, // STNT1H_ZZR_S_REAL |
6380 | 414k | 302389642U, // STNT1W_ZRI |
6381 | 414k | 302389642U, // STNT1W_ZRR |
6382 | 414k | 1107679626U, // STNT1W_ZZR_D_REAL |
6383 | 414k | 1376131466U, // STNT1W_ZZR_S_REAL |
6384 | 414k | 807424820U, // STPDi |
6385 | 414k | 270750516U, // STPDpost |
6386 | 414k | 270750516U, // STPDpre |
6387 | 414k | 807424820U, // STPQi |
6388 | 414k | 270750516U, // STPQpost |
6389 | 414k | 270750516U, // STPQpre |
6390 | 414k | 807424820U, // STPSi |
6391 | 414k | 270750516U, // STPSpost |
6392 | 414k | 270750516U, // STPSpre |
6393 | 414k | 807424820U, // STPWi |
6394 | 414k | 270750516U, // STPWpost |
6395 | 414k | 270750516U, // STPWpre |
6396 | 414k | 807424820U, // STPXi |
6397 | 414k | 270750516U, // STPXpost |
6398 | 414k | 270750516U, // STPXpre |
6399 | 414k | 302204790U, // STRBBpost |
6400 | 414k | 302204790U, // STRBBpre |
6401 | 414k | 838879094U, // STRBBroW |
6402 | 414k | 838879094U, // STRBBroX |
6403 | 414k | 838879094U, // STRBBui |
6404 | 414k | 302208162U, // STRBpost |
6405 | 414k | 302208162U, // STRBpre |
6406 | 414k | 838882466U, // STRBroW |
6407 | 414k | 838882466U, // STRBroX |
6408 | 414k | 838882466U, // STRBui |
6409 | 414k | 302208162U, // STRDpost |
6410 | 414k | 302208162U, // STRDpre |
6411 | 414k | 838882466U, // STRDroW |
6412 | 414k | 838882466U, // STRDroX |
6413 | 414k | 838882466U, // STRDui |
6414 | 414k | 302206416U, // STRHHpost |
6415 | 414k | 302206416U, // STRHHpre |
6416 | 414k | 838880720U, // STRHHroW |
6417 | 414k | 838880720U, // STRHHroX |
6418 | 414k | 838880720U, // STRHHui |
6419 | 414k | 302208162U, // STRHpost |
6420 | 414k | 302208162U, // STRHpre |
6421 | 414k | 838882466U, // STRHroW |
6422 | 414k | 838882466U, // STRHroX |
6423 | 414k | 838882466U, // STRHui |
6424 | 414k | 302208162U, // STRQpost |
6425 | 414k | 302208162U, // STRQpre |
6426 | 414k | 838882466U, // STRQroW |
6427 | 414k | 838882466U, // STRQroX |
6428 | 414k | 838882466U, // STRQui |
6429 | 414k | 302208162U, // STRSpost |
6430 | 414k | 302208162U, // STRSpre |
6431 | 414k | 838882466U, // STRSroW |
6432 | 414k | 838882466U, // STRSroX |
6433 | 414k | 838882466U, // STRSui |
6434 | 414k | 302208162U, // STRWpost |
6435 | 414k | 302208162U, // STRWpre |
6436 | 414k | 838882466U, // STRWroW |
6437 | 414k | 838882466U, // STRWroX |
6438 | 414k | 838882466U, // STRWui |
6439 | 414k | 302208162U, // STRXpost |
6440 | 414k | 302208162U, // STRXpre |
6441 | 414k | 838882466U, // STRXroW |
6442 | 414k | 838882466U, // STRXroX |
6443 | 414k | 838882466U, // STRXui |
6444 | 414k | 839767202U, // STR_PXI |
6445 | 414k | 922786U, // STR_ZA |
6446 | 414k | 839767202U, // STR_ZXI |
6447 | 414k | 838879100U, // STTRBi |
6448 | 414k | 838880726U, // STTRHi |
6449 | 414k | 838882471U, // STTRWi |
6450 | 414k | 838882471U, // STTRXi |
6451 | 414k | 838879131U, // STURBBi |
6452 | 414k | 838882504U, // STURBi |
6453 | 414k | 838882504U, // STURDi |
6454 | 414k | 838880757U, // STURHHi |
6455 | 414k | 838882504U, // STURHi |
6456 | 414k | 838882504U, // STURQi |
6457 | 414k | 838882504U, // STURSi |
6458 | 414k | 838882504U, // STURWi |
6459 | 414k | 838882504U, // STURXi |
6460 | 414k | 807424877U, // STXPW |
6461 | 414k | 807424877U, // STXPX |
6462 | 414k | 807421881U, // STXRB |
6463 | 414k | 807423507U, // STXRH |
6464 | 414k | 807425280U, // STXRW |
6465 | 414k | 807425280U, // STXRX |
6466 | 414k | 838880027U, // STZ2GOffset |
6467 | 414k | 302205723U, // STZ2GPostIndex |
6468 | 414k | 302205723U, // STZ2GPreIndex |
6469 | 414k | 838881608U, // STZGM |
6470 | 414k | 838880090U, // STZGOffset |
6471 | 414k | 302205786U, // STZGPostIndex |
6472 | 414k | 302205786U, // STZGPreIndex |
6473 | 414k | 807422754U, // SUBG |
6474 | 414k | 1881179800U, // SUBHNB_ZZZ_B |
6475 | 414k | 2172716696U, // SUBHNB_ZZZ_H |
6476 | 414k | 2418099864U, // SUBHNB_ZZZ_S |
6477 | 414k | 2686490521U, // SUBHNT_ZZZ_B |
6478 | 414k | 2174818201U, // SUBHNT_ZZZ_H |
6479 | 414k | 1075926937U, // SUBHNT_ZZZ_S |
6480 | 414k | 545362307U, // SUBHNv2i64_v2i32 |
6481 | 414k | 2967601507U, // SUBHNv2i64_v4i32 |
6482 | 414k | 549556611U, // SUBHNv4i32_v4i16 |
6483 | 414k | 2969698659U, // SUBHNv4i32_v8i16 |
6484 | 414k | 2959212899U, // SUBHNv8i16_v16i8 |
6485 | 414k | 555848067U, // SUBHNv8i16_v8i8 |
6486 | 414k | 807424614U, // SUBP |
6487 | 414k | 807425477U, // SUBPS |
6488 | 414k | 3760231349U, // SUBR_ZI_B |
6489 | 414k | 2418070453U, // SUBR_ZI_D |
6490 | 414k | 2179011509U, // SUBR_ZI_H |
6491 | 414k | 4028715957U, // SUBR_ZI_S |
6492 | 414k | 3223360437U, // SUBR_ZPmZ_B |
6493 | 414k | 3223376821U, // SUBR_ZPmZ_D |
6494 | 414k | 3519091637U, // SUBR_ZPmZ_H |
6495 | 414k | 3223409589U, // SUBR_ZPmZ_S |
6496 | 414k | 807425342U, // SUBSWri |
6497 | 414k | 807425342U, // SUBSWrs |
6498 | 414k | 807425342U, // SUBSWrx |
6499 | 414k | 807425342U, // SUBSXri |
6500 | 414k | 807425342U, // SUBSXrs |
6501 | 414k | 807425342U, // SUBSXrx |
6502 | 414k | 807425342U, // SUBSXrx64 |
6503 | 414k | 807422048U, // SUBWri |
6504 | 414k | 807422048U, // SUBWrs |
6505 | 414k | 807422048U, // SUBWrx |
6506 | 414k | 807422048U, // SUBXri |
6507 | 414k | 807422048U, // SUBXrs |
6508 | 414k | 807422048U, // SUBXrx |
6509 | 414k | 807422048U, // SUBXrx64 |
6510 | 414k | 3760228448U, // SUB_ZI_B |
6511 | 414k | 2418067552U, // SUB_ZI_D |
6512 | 414k | 2179008608U, // SUB_ZI_H |
6513 | 414k | 4028713056U, // SUB_ZI_S |
6514 | 414k | 3223357536U, // SUB_ZPmZ_B |
6515 | 414k | 3223373920U, // SUB_ZPmZ_D |
6516 | 414k | 3519088736U, // SUB_ZPmZ_H |
6517 | 414k | 3223406688U, // SUB_ZPmZ_S |
6518 | 414k | 3760228448U, // SUB_ZZZ_B |
6519 | 414k | 2418067552U, // SUB_ZZZ_D |
6520 | 414k | 2179008608U, // SUB_ZZZ_H |
6521 | 414k | 4028713056U, // SUB_ZZZ_S |
6522 | 414k | 543262816U, // SUBv16i8 |
6523 | 414k | 807422048U, // SUBv1i64 |
6524 | 414k | 545359968U, // SUBv2i32 |
6525 | 414k | 547457120U, // SUBv2i64 |
6526 | 414k | 549554272U, // SUBv4i16 |
6527 | 414k | 551651424U, // SUBv4i32 |
6528 | 414k | 553748576U, // SUBv8i16 |
6529 | 414k | 555845728U, // SUBv8i8 |
6530 | 414k | 1344362538U, // SUDOT_ZZZI |
6531 | 414k | 2967607338U, // SUDOTlanev16i8 |
6532 | 414k | 2961315882U, // SUDOTlanev8i8 |
6533 | 414k | 138527526U, // SUMOPA_MPPZZ_D |
6534 | 414k | 140624678U, // SUMOPA_MPPZZ_S |
6535 | 414k | 138532324U, // SUMOPS_MPPZZ_D |
6536 | 414k | 140629476U, // SUMOPS_MPPZZ_S |
6537 | 414k | 4028681920U, // SUNPKHI_ZZ_D |
6538 | 414k | 1736511168U, // SUNPKHI_ZZ_H |
6539 | 414k | 1881231040U, // SUNPKHI_ZZ_S |
6540 | 414k | 4028682809U, // SUNPKLO_ZZ_D |
6541 | 414k | 1736512057U, // SUNPKLO_ZZ_H |
6542 | 414k | 1881231929U, // SUNPKLO_ZZ_S |
6543 | 414k | 3223357964U, // SUQADD_ZPmZ_B |
6544 | 414k | 3223374348U, // SUQADD_ZPmZ_D |
6545 | 414k | 3519089164U, // SUQADD_ZPmZ_H |
6546 | 414k | 3223407116U, // SUQADD_ZPmZ_S |
6547 | 414k | 2959215116U, // SUQADDv16i8 |
6548 | 414k | 270748172U, // SUQADDv1i16 |
6549 | 414k | 270748172U, // SUQADDv1i32 |
6550 | 414k | 270748172U, // SUQADDv1i64 |
6551 | 414k | 270748172U, // SUQADDv1i8 |
6552 | 414k | 2961312268U, // SUQADDv2i32 |
6553 | 414k | 2963409420U, // SUQADDv2i64 |
6554 | 414k | 2965506572U, // SUQADDv4i16 |
6555 | 414k | 2967603724U, // SUQADDv4i32 |
6556 | 414k | 2969700876U, // SUQADDv8i16 |
6557 | 414k | 2971798028U, // SUQADDv8i8 |
6558 | 414k | 264473U, // SVC |
6559 | 414k | 3223536734U, // SWPAB |
6560 | 414k | 3223538691U, // SWPAH |
6561 | 414k | 3223536994U, // SWPALB |
6562 | 414k | 3223538847U, // SWPALH |
6563 | 414k | 3223539550U, // SWPALW |
6564 | 414k | 3223539550U, // SWPALX |
6565 | 414k | 3223536437U, // SWPAW |
6566 | 414k | 3223536437U, // SWPAX |
6567 | 414k | 3223537438U, // SWPB |
6568 | 414k | 3223539064U, // SWPH |
6569 | 414k | 3223537203U, // SWPLB |
6570 | 414k | 3223538944U, // SWPLH |
6571 | 414k | 3223539860U, // SWPLW |
6572 | 414k | 3223539860U, // SWPLX |
6573 | 414k | 3223540543U, // SWPW |
6574 | 414k | 3223540543U, // SWPX |
6575 | 414k | 2148435U, // SXTB_ZPmZ_D |
6576 | 414k | 272697427U, // SXTB_ZPmZ_H |
6577 | 414k | 2181203U, // SXTB_ZPmZ_S |
6578 | 414k | 2150019U, // SXTH_ZPmZ_D |
6579 | 414k | 2182787U, // SXTH_ZPmZ_S |
6580 | 414k | 2153095U, // SXTW_ZPmZ_D |
6581 | 414k | 807424212U, // SYSLxt |
6582 | 414k | 2119196U, // SYSxt |
6583 | 414k | 2133915U, // TBL_ZZZZ_B |
6584 | 414k | 270585755U, // TBL_ZZZZ_D |
6585 | 414k | 142675867U, // TBL_ZZZZ_H |
6586 | 414k | 539053979U, // TBL_ZZZZ_S |
6587 | 414k | 2133915U, // TBL_ZZZ_B |
6588 | 414k | 270585755U, // TBL_ZZZ_D |
6589 | 414k | 142675867U, // TBL_ZZZ_H |
6590 | 414k | 539053979U, // TBL_ZZZ_S |
6591 | 414k | 811700123U, // TBLv16i8Four |
6592 | 414k | 811700123U, // TBLv16i8One |
6593 | 414k | 811700123U, // TBLv16i8Three |
6594 | 414k | 811700123U, // TBLv16i8Two |
6595 | 414k | 824283035U, // TBLv8i8Four |
6596 | 414k | 824283035U, // TBLv8i8One |
6597 | 414k | 824283035U, // TBLv8i8Three |
6598 | 414k | 824283035U, // TBLv8i8Two |
6599 | 414k | 807426922U, // TBNZW |
6600 | 414k | 807426922U, // TBNZX |
6601 | 414k | 1344314065U, // TBX_ZZZ_B |
6602 | 414k | 1075894993U, // TBX_ZZZ_D |
6603 | 414k | 2185304785U, // TBX_ZZZ_H |
6604 | 414k | 1344363217U, // TBX_ZZZ_S |
6605 | 414k | 1080171217U, // TBXv16i8Four |
6606 | 414k | 1080171217U, // TBXv16i8One |
6607 | 414k | 1080171217U, // TBXv16i8Three |
6608 | 414k | 1080171217U, // TBXv16i8Two |
6609 | 414k | 1092754129U, // TBXv8i8Four |
6610 | 414k | 1092754129U, // TBXv8i8One |
6611 | 414k | 1092754129U, // TBXv8i8Three |
6612 | 414k | 1092754129U, // TBXv8i8Two |
6613 | 414k | 807426906U, // TBZW |
6614 | 414k | 807426906U, // TBZX |
6615 | 414k | 266226U, // TCANCEL |
6616 | 414k | 8670U, // TCOMMIT |
6617 | 414k | 3760226350U, // TRN1_PPP_B |
6618 | 414k | 2418065454U, // TRN1_PPP_D |
6619 | 414k | 2179006510U, // TRN1_PPP_H |
6620 | 414k | 4028710958U, // TRN1_PPP_S |
6621 | 414k | 3760226350U, // TRN1_ZZZ_B |
6622 | 414k | 2418065454U, // TRN1_ZZZ_D |
6623 | 414k | 2179006510U, // TRN1_ZZZ_H |
6624 | 414k | 2193981486U, // TRN1_ZZZ_Q |
6625 | 414k | 4028710958U, // TRN1_ZZZ_S |
6626 | 414k | 543260718U, // TRN1v16i8 |
6627 | 414k | 545357870U, // TRN1v2i32 |
6628 | 414k | 547455022U, // TRN1v2i64 |
6629 | 414k | 549552174U, // TRN1v4i16 |
6630 | 414k | 551649326U, // TRN1v4i32 |
6631 | 414k | 553746478U, // TRN1v8i16 |
6632 | 414k | 555843630U, // TRN1v8i8 |
6633 | 414k | 3760226714U, // TRN2_PPP_B |
6634 | 414k | 2418065818U, // TRN2_PPP_D |
6635 | 414k | 2179006874U, // TRN2_PPP_H |
6636 | 414k | 4028711322U, // TRN2_PPP_S |
6637 | 414k | 3760226714U, // TRN2_ZZZ_B |
6638 | 414k | 2418065818U, // TRN2_ZZZ_D |
6639 | 414k | 2179006874U, // TRN2_ZZZ_H |
6640 | 414k | 2193981850U, // TRN2_ZZZ_Q |
6641 | 414k | 4028711322U, // TRN2_ZZZ_S |
6642 | 414k | 543261082U, // TRN2v16i8 |
6643 | 414k | 545358234U, // TRN2v2i32 |
6644 | 414k | 547455386U, // TRN2v2i64 |
6645 | 414k | 549552538U, // TRN2v4i16 |
6646 | 414k | 551649690U, // TRN2v4i32 |
6647 | 414k | 553746842U, // TRN2v8i16 |
6648 | 414k | 555843994U, // TRN2v8i8 |
6649 | 414k | 329768U, // TSB |
6650 | 414k | 22583U, // TSTART |
6651 | 414k | 22605U, // TTEST |
6652 | 414k | 1344324887U, // UABALB_ZZZ_D |
6653 | 414k | 2281768215U, // UABALB_ZZZ_H |
6654 | 414k | 2686534935U, // UABALB_ZZZ_S |
6655 | 414k | 1344329390U, // UABALT_ZZZ_D |
6656 | 414k | 2281772718U, // UABALT_ZZZ_H |
6657 | 414k | 2686539438U, // UABALT_ZZZ_S |
6658 | 414k | 2969698476U, // UABALv16i8_v8i16 |
6659 | 414k | 2963410708U, // UABALv2i32_v2i64 |
6660 | 414k | 2967605012U, // UABALv4i16_v4i32 |
6661 | 414k | 2963407020U, // UABALv4i32_v2i64 |
6662 | 414k | 2967601324U, // UABALv8i16_v4i32 |
6663 | 414k | 2969702164U, // UABALv8i8_v8i16 |
6664 | 414k | 1344307853U, // UABA_ZZZ_B |
6665 | 414k | 1075888781U, // UABA_ZZZ_D |
6666 | 414k | 2185298573U, // UABA_ZZZ_H |
6667 | 414k | 1344357005U, // UABA_ZZZ_S |
6668 | 414k | 2959213197U, // UABAv16i8 |
6669 | 414k | 2961310349U, // UABAv2i32 |
6670 | 414k | 2965504653U, // UABAv4i16 |
6671 | 414k | 2967601805U, // UABAv4i32 |
6672 | 414k | 2969698957U, // UABAv8i16 |
6673 | 414k | 2971796109U, // UABAv8i8 |
6674 | 414k | 4028679628U, // UABDLB_ZZZ_D |
6675 | 414k | 2273379788U, // UABDLB_ZZZ_H |
6676 | 414k | 1881228748U, // UABDLB_ZZZ_S |
6677 | 414k | 4028684031U, // UABDLT_ZZZ_D |
6678 | 414k | 2273384191U, // UABDLT_ZZZ_H |
6679 | 414k | 1881233151U, // UABDLT_ZZZ_S |
6680 | 414k | 553746670U, // UABDLv16i8_v8i16 |
6681 | 414k | 547459013U, // UABDLv2i32_v2i64 |
6682 | 414k | 551653317U, // UABDLv4i16_v4i32 |
6683 | 414k | 547455214U, // UABDLv4i32_v2i64 |
6684 | 414k | 551649518U, // UABDLv8i16_v4i32 |
6685 | 414k | 553750469U, // UABDLv8i8_v8i16 |
6686 | 414k | 3223357838U, // UABD_ZPmZ_B |
6687 | 414k | 3223374222U, // UABD_ZPmZ_D |
6688 | 414k | 3519089038U, // UABD_ZPmZ_H |
6689 | 414k | 3223406990U, // UABD_ZPmZ_S |
6690 | 414k | 543263118U, // UABDv16i8 |
6691 | 414k | 545360270U, // UABDv2i32 |
6692 | 414k | 549554574U, // UABDv4i16 |
6693 | 414k | 551651726U, // UABDv4i32 |
6694 | 414k | 553748878U, // UABDv8i16 |
6695 | 414k | 555846030U, // UABDv8i8 |
6696 | 414k | 3223376556U, // UADALP_ZPmZ_D |
6697 | 414k | 3519091372U, // UADALP_ZPmZ_H |
6698 | 414k | 3223409324U, // UADALP_ZPmZ_S |
6699 | 414k | 2969703084U, // UADALPv16i8_v8i16 |
6700 | 414k | 3089240748U, // UADALPv2i32_v1i64 |
6701 | 414k | 2961314476U, // UADALPv4i16_v2i32 |
6702 | 414k | 2963411628U, // UADALPv4i32_v2i64 |
6703 | 414k | 2967605932U, // UADALPv8i16_v4i32 |
6704 | 414k | 2965508780U, // UADALPv8i8_v4i16 |
6705 | 414k | 4028679653U, // UADDLB_ZZZ_D |
6706 | 414k | 2273379813U, // UADDLB_ZZZ_H |
6707 | 414k | 1881228773U, // UADDLB_ZZZ_S |
6708 | 414k | 553751228U, // UADDLPv16i8_v8i16 |
6709 | 414k | 673288892U, // UADDLPv2i32_v1i64 |
6710 | 414k | 545362620U, // UADDLPv4i16_v2i32 |
6711 | 414k | 547459772U, // UADDLPv4i32_v2i64 |
6712 | 414k | 551654076U, // UADDLPv8i16_v4i32 |
6713 | 414k | 549556924U, // UADDLPv8i8_v4i16 |
6714 | 414k | 4028684047U, // UADDLT_ZZZ_D |
6715 | 414k | 2273384207U, // UADDLT_ZZZ_H |
6716 | 414k | 1881233167U, // UADDLT_ZZZ_S |
6717 | 414k | 538990857U, // UADDLVv16i8v |
6718 | 414k | 538990857U, // UADDLVv4i16v |
6719 | 414k | 538990857U, // UADDLVv4i32v |
6720 | 414k | 538990857U, // UADDLVv8i16v |
6721 | 414k | 538990857U, // UADDLVv8i8v |
6722 | 414k | 553746686U, // UADDLv16i8_v8i16 |
6723 | 414k | 547459051U, // UADDLv2i32_v2i64 |
6724 | 414k | 551653355U, // UADDLv4i16_v4i32 |
6725 | 414k | 547455230U, // UADDLv4i32_v2i64 |
6726 | 414k | 551649534U, // UADDLv8i16_v4i32 |
6727 | 414k | 553750507U, // UADDLv8i8_v8i16 |
6728 | 414k | 1745000669U, // UADDV_VPZ_B |
6729 | 414k | 1646434525U, // UADDV_VPZ_D |
6730 | 414k | 1648531677U, // UADDV_VPZ_H |
6731 | 414k | 1638045917U, // UADDV_VPZ_S |
6732 | 414k | 2418067630U, // UADDWB_ZZZ_D |
6733 | 414k | 2179008686U, // UADDWB_ZZZ_H |
6734 | 414k | 4028713134U, // UADDWB_ZZZ_S |
6735 | 414k | 2418071682U, // UADDWT_ZZZ_D |
6736 | 414k | 2179012738U, // UADDWT_ZZZ_H |
6737 | 414k | 4028717186U, // UADDWT_ZZZ_S |
6738 | 414k | 553746960U, // UADDWv16i8_v8i16 |
6739 | 414k | 547461634U, // UADDWv2i32_v2i64 |
6740 | 414k | 551655938U, // UADDWv4i16_v4i32 |
6741 | 414k | 547455504U, // UADDWv4i32_v2i64 |
6742 | 414k | 551649808U, // UADDWv8i16_v4i32 |
6743 | 414k | 553753090U, // UADDWv8i8_v8i16 |
6744 | 414k | 807424304U, // UBFMWri |
6745 | 414k | 807424304U, // UBFMXri |
6746 | 414k | 3760231116U, // UCLAMP_ZZZ_B |
6747 | 414k | 2418070220U, // UCLAMP_ZZZ_D |
6748 | 414k | 2179011276U, // UCLAMP_ZZZ_H |
6749 | 414k | 4028715724U, // UCLAMP_ZZZ_S |
6750 | 414k | 807422734U, // UCVTFSWDri |
6751 | 414k | 807422734U, // UCVTFSWHri |
6752 | 414k | 807422734U, // UCVTFSWSri |
6753 | 414k | 807422734U, // UCVTFSXDri |
6754 | 414k | 807422734U, // UCVTFSXHri |
6755 | 414k | 807422734U, // UCVTFSXSri |
6756 | 414k | 807422734U, // UCVTFUWDri |
6757 | 414k | 807422734U, // UCVTFUWHri |
6758 | 414k | 807422734U, // UCVTFUWSri |
6759 | 414k | 807422734U, // UCVTFUXDri |
6760 | 414k | 807422734U, // UCVTFUXHri |
6761 | 414k | 807422734U, // UCVTFUXSri |
6762 | 414k | 2149134U, // UCVTF_ZPmZ_DtoD |
6763 | 414k | 541133582U, // UCVTF_ZPmZ_DtoH |
6764 | 414k | 2181902U, // UCVTF_ZPmZ_DtoS |
6765 | 414k | 272698126U, // UCVTF_ZPmZ_HtoH |
6766 | 414k | 2149134U, // UCVTF_ZPmZ_StoD |
6767 | 414k | 541133582U, // UCVTF_ZPmZ_StoH |
6768 | 414k | 2181902U, // UCVTF_ZPmZ_StoS |
6769 | 414k | 807422734U, // UCVTFd |
6770 | 414k | 807422734U, // UCVTFh |
6771 | 414k | 807422734U, // UCVTFs |
6772 | 414k | 807422734U, // UCVTFv1i16 |
6773 | 414k | 807422734U, // UCVTFv1i32 |
6774 | 414k | 807422734U, // UCVTFv1i64 |
6775 | 414k | 545360654U, // UCVTFv2f32 |
6776 | 414k | 547457806U, // UCVTFv2f64 |
6777 | 414k | 545360654U, // UCVTFv2i32_shift |
6778 | 414k | 547457806U, // UCVTFv2i64_shift |
6779 | 414k | 549554958U, // UCVTFv4f16 |
6780 | 414k | 551652110U, // UCVTFv4f32 |
6781 | 414k | 549554958U, // UCVTFv4i16_shift |
6782 | 414k | 551652110U, // UCVTFv4i32_shift |
6783 | 414k | 553749262U, // UCVTFv8f16 |
6784 | 414k | 553749262U, // UCVTFv8i16_shift |
6785 | 414k | 19191U, // UDF |
6786 | 414k | 3223377116U, // UDIVR_ZPmZ_D |
6787 | 414k | 3223409884U, // UDIVR_ZPmZ_S |
6788 | 414k | 807426299U, // UDIVWr |
6789 | 414k | 807426299U, // UDIVXr |
6790 | 414k | 3223378171U, // UDIV_ZPmZ_D |
6791 | 414k | 3223410939U, // UDIV_ZPmZ_S |
6792 | 414k | 2686507051U, // UDOT_ZZZI_D |
6793 | 414k | 1344362539U, // UDOT_ZZZI_S |
6794 | 414k | 2686507051U, // UDOT_ZZZ_D |
6795 | 414k | 1344362539U, // UDOT_ZZZ_S |
6796 | 414k | 2967607339U, // UDOTlanev16i8 |
6797 | 414k | 2961315883U, // UDOTlanev8i8 |
6798 | 414k | 2967607339U, // UDOTv16i8 |
6799 | 414k | 2961315883U, // UDOTv8i8 |
6800 | 414k | 3223357934U, // UHADD_ZPmZ_B |
6801 | 414k | 3223374318U, // UHADD_ZPmZ_D |
6802 | 414k | 3519089134U, // UHADD_ZPmZ_H |
6803 | 414k | 3223407086U, // UHADD_ZPmZ_S |
6804 | 414k | 543263214U, // UHADDv16i8 |
6805 | 414k | 545360366U, // UHADDv2i32 |
6806 | 414k | 549554670U, // UHADDv4i16 |
6807 | 414k | 551651822U, // UHADDv4i32 |
6808 | 414k | 553748974U, // UHADDv8i16 |
6809 | 414k | 555846126U, // UHADDv8i8 |
6810 | 414k | 3223360451U, // UHSUBR_ZPmZ_B |
6811 | 414k | 3223376835U, // UHSUBR_ZPmZ_D |
6812 | 414k | 3519091651U, // UHSUBR_ZPmZ_H |
6813 | 414k | 3223409603U, // UHSUBR_ZPmZ_S |
6814 | 414k | 3223357548U, // UHSUB_ZPmZ_B |
6815 | 414k | 3223373932U, // UHSUB_ZPmZ_D |
6816 | 414k | 3519088748U, // UHSUB_ZPmZ_H |
6817 | 414k | 3223406700U, // UHSUB_ZPmZ_S |
6818 | 414k | 543262828U, // UHSUBv16i8 |
6819 | 414k | 545359980U, // UHSUBv2i32 |
6820 | 414k | 549554284U, // UHSUBv4i16 |
6821 | 414k | 551651436U, // UHSUBv4i32 |
6822 | 414k | 553748588U, // UHSUBv8i16 |
6823 | 414k | 555845740U, // UHSUBv8i8 |
6824 | 414k | 807423964U, // UMADDLrrr |
6825 | 414k | 3223360345U, // UMAXP_ZPmZ_B |
6826 | 414k | 3223376729U, // UMAXP_ZPmZ_D |
6827 | 414k | 3519091545U, // UMAXP_ZPmZ_H |
6828 | 414k | 3223409497U, // UMAXP_ZPmZ_S |
6829 | 414k | 543265625U, // UMAXPv16i8 |
6830 | 414k | 545362777U, // UMAXPv2i32 |
6831 | 414k | 549557081U, // UMAXPv4i16 |
6832 | 414k | 551654233U, // UMAXPv4i32 |
6833 | 414k | 553751385U, // UMAXPv8i16 |
6834 | 414k | 555848537U, // UMAXPv8i8 |
6835 | 414k | 153957U, // UMAXV_VPZ_B |
6836 | 414k | 1646434661U, // UMAXV_VPZ_D |
6837 | 414k | 1648548197U, // UMAXV_VPZ_H |
6838 | 414k | 1638078821U, // UMAXV_VPZ_S |
6839 | 414k | 538990949U, // UMAXVv16i8v |
6840 | 414k | 538990949U, // UMAXVv4i16v |
6841 | 414k | 538990949U, // UMAXVv4i32v |
6842 | 414k | 538990949U, // UMAXVv8i16v |
6843 | 414k | 538990949U, // UMAXVv8i8v |
6844 | 414k | 3760233163U, // UMAX_ZI_B |
6845 | 414k | 2418072267U, // UMAX_ZI_D |
6846 | 414k | 2179013323U, // UMAX_ZI_H |
6847 | 414k | 4028717771U, // UMAX_ZI_S |
6848 | 414k | 3223362251U, // UMAX_ZPmZ_B |
6849 | 414k | 3223378635U, // UMAX_ZPmZ_D |
6850 | 414k | 3519093451U, // UMAX_ZPmZ_H |
6851 | 414k | 3223411403U, // UMAX_ZPmZ_S |
6852 | 414k | 543267531U, // UMAXv16i8 |
6853 | 414k | 545364683U, // UMAXv2i32 |
6854 | 414k | 549558987U, // UMAXv4i16 |
6855 | 414k | 551656139U, // UMAXv4i32 |
6856 | 414k | 553753291U, // UMAXv8i16 |
6857 | 414k | 555850443U, // UMAXv8i8 |
6858 | 414k | 3223360263U, // UMINP_ZPmZ_B |
6859 | 414k | 3223376647U, // UMINP_ZPmZ_D |
6860 | 414k | 3519091463U, // UMINP_ZPmZ_H |
6861 | 414k | 3223409415U, // UMINP_ZPmZ_S |
6862 | 414k | 543265543U, // UMINPv16i8 |
6863 | 414k | 545362695U, // UMINPv2i32 |
6864 | 414k | 549556999U, // UMINPv4i16 |
6865 | 414k | 551654151U, // UMINPv4i32 |
6866 | 414k | 553751303U, // UMINPv8i16 |
6867 | 414k | 555848455U, // UMINPv8i8 |
6868 | 414k | 153905U, // UMINV_VPZ_B |
6869 | 414k | 1646434609U, // UMINV_VPZ_D |
6870 | 414k | 1648548145U, // UMINV_VPZ_H |
6871 | 414k | 1638078769U, // UMINV_VPZ_S |
6872 | 414k | 538990897U, // UMINVv16i8v |
6873 | 414k | 538990897U, // UMINVv4i16v |
6874 | 414k | 538990897U, // UMINVv4i32v |
6875 | 414k | 538990897U, // UMINVv8i16v |
6876 | 414k | 538990897U, // UMINVv8i8v |
6877 | 414k | 3760230818U, // UMIN_ZI_B |
6878 | 414k | 2418069922U, // UMIN_ZI_D |
6879 | 414k | 2179010978U, // UMIN_ZI_H |
6880 | 414k | 4028715426U, // UMIN_ZI_S |
6881 | 414k | 3223359906U, // UMIN_ZPmZ_B |
6882 | 414k | 3223376290U, // UMIN_ZPmZ_D |
6883 | 414k | 3519091106U, // UMIN_ZPmZ_H |
6884 | 414k | 3223409058U, // UMIN_ZPmZ_S |
6885 | 414k | 543265186U, // UMINv16i8 |
6886 | 414k | 545362338U, // UMINv2i32 |
6887 | 414k | 549556642U, // UMINv4i16 |
6888 | 414k | 551653794U, // UMINv4i32 |
6889 | 414k | 553750946U, // UMINv8i16 |
6890 | 414k | 555848098U, // UMINv8i8 |
6891 | 414k | 1344324932U, // UMLALB_ZZZI_D |
6892 | 414k | 2686534980U, // UMLALB_ZZZI_S |
6893 | 414k | 1344324932U, // UMLALB_ZZZ_D |
6894 | 414k | 2281768260U, // UMLALB_ZZZ_H |
6895 | 414k | 2686534980U, // UMLALB_ZZZ_S |
6896 | 414k | 1344329425U, // UMLALT_ZZZI_D |
6897 | 414k | 2686539473U, // UMLALT_ZZZI_S |
6898 | 414k | 1344329425U, // UMLALT_ZZZ_D |
6899 | 414k | 2281772753U, // UMLALT_ZZZ_H |
6900 | 414k | 2686539473U, // UMLALT_ZZZ_S |
6901 | 414k | 2969698510U, // UMLALv16i8_v8i16 |
6902 | 414k | 2963410747U, // UMLALv2i32_indexed |
6903 | 414k | 2963410747U, // UMLALv2i32_v2i64 |
6904 | 414k | 2967605051U, // UMLALv4i16_indexed |
6905 | 414k | 2967605051U, // UMLALv4i16_v4i32 |
6906 | 414k | 2963407054U, // UMLALv4i32_indexed |
6907 | 414k | 2963407054U, // UMLALv4i32_v2i64 |
6908 | 414k | 2967601358U, // UMLALv8i16_indexed |
6909 | 414k | 2967601358U, // UMLALv8i16_v4i32 |
6910 | 414k | 2969702203U, // UMLALv8i8_v8i16 |
6911 | 414k | 1344325229U, // UMLSLB_ZZZI_D |
6912 | 414k | 2686535277U, // UMLSLB_ZZZI_S |
6913 | 414k | 1344325229U, // UMLSLB_ZZZ_D |
6914 | 414k | 2281768557U, // UMLSLB_ZZZ_H |
6915 | 414k | 2686535277U, // UMLSLB_ZZZ_S |
6916 | 414k | 1344329599U, // UMLSLT_ZZZI_D |
6917 | 414k | 2686539647U, // UMLSLT_ZZZI_S |
6918 | 414k | 1344329599U, // UMLSLT_ZZZ_D |
6919 | 414k | 2281772927U, // UMLSLT_ZZZ_H |
6920 | 414k | 2686539647U, // UMLSLT_ZZZ_S |
6921 | 414k | 2969698642U, // UMLSLv16i8_v8i16 |
6922 | 414k | 2963411149U, // UMLSLv2i32_indexed |
6923 | 414k | 2963411149U, // UMLSLv2i32_v2i64 |
6924 | 414k | 2967605453U, // UMLSLv4i16_indexed |
6925 | 414k | 2967605453U, // UMLSLv4i16_v4i32 |
6926 | 414k | 2963407186U, // UMLSLv4i32_indexed |
6927 | 414k | 2963407186U, // UMLSLv4i32_v2i64 |
6928 | 414k | 2967601490U, // UMLSLv8i16_indexed |
6929 | 414k | 2967601490U, // UMLSLv8i16_v4i32 |
6930 | 414k | 2969702605U, // UMLSLv8i8_v8i16 |
6931 | 414k | 2967601903U, // UMMLA |
6932 | 414k | 1344357103U, // UMMLA_ZZZ |
6933 | 414k | 138527527U, // UMOPA_MPPZZ_D |
6934 | 414k | 140624679U, // UMOPA_MPPZZ_S |
6935 | 414k | 138532325U, // UMOPS_MPPZZ_D |
6936 | 414k | 140629477U, // UMOPS_MPPZZ_S |
6937 | 414k | 538990923U, // UMOVvi16 |
6938 | 414k | 538990923U, // UMOVvi16_idx0 |
6939 | 414k | 538990923U, // UMOVvi32 |
6940 | 414k | 538990923U, // UMOVvi32_idx0 |
6941 | 414k | 538990923U, // UMOVvi64 |
6942 | 414k | 538990923U, // UMOVvi64_idx0 |
6943 | 414k | 538990923U, // UMOVvi8 |
6944 | 414k | 538990923U, // UMOVvi8_idx0 |
6945 | 414k | 807423912U, // UMSUBLrrr |
6946 | 414k | 3223358787U, // UMULH_ZPmZ_B |
6947 | 414k | 3223375171U, // UMULH_ZPmZ_D |
6948 | 414k | 3519089987U, // UMULH_ZPmZ_H |
6949 | 414k | 3223407939U, // UMULH_ZPmZ_S |
6950 | 414k | 3760229699U, // UMULH_ZZZ_B |
6951 | 414k | 2418068803U, // UMULH_ZZZ_D |
6952 | 414k | 2179009859U, // UMULH_ZZZ_H |
6953 | 414k | 4028714307U, // UMULH_ZZZ_S |
6954 | 414k | 807423299U, // UMULHrr |
6955 | 414k | 4028679703U, // UMULLB_ZZZI_D |
6956 | 414k | 1881228823U, // UMULLB_ZZZI_S |
6957 | 414k | 4028679703U, // UMULLB_ZZZ_D |
6958 | 414k | 2273379863U, // UMULLB_ZZZ_H |
6959 | 414k | 1881228823U, // UMULLB_ZZZ_S |
6960 | 414k | 4028684111U, // UMULLT_ZZZI_D |
6961 | 414k | 1881233231U, // UMULLT_ZZZI_S |
6962 | 414k | 4028684111U, // UMULLT_ZZZ_D |
6963 | 414k | 2273384271U, // UMULLT_ZZZ_H |
6964 | 414k | 1881233231U, // UMULLT_ZZZ_S |
6965 | 414k | 553746736U, // UMULLv16i8_v8i16 |
6966 | 414k | 547459181U, // UMULLv2i32_indexed |
6967 | 414k | 547459181U, // UMULLv2i32_v2i64 |
6968 | 414k | 551653485U, // UMULLv4i16_indexed |
6969 | 414k | 551653485U, // UMULLv4i16_v4i32 |
6970 | 414k | 547455280U, // UMULLv4i32_indexed |
6971 | 414k | 547455280U, // UMULLv4i32_v2i64 |
6972 | 414k | 551649584U, // UMULLv8i16_indexed |
6973 | 414k | 551649584U, // UMULLv8i16_v4i32 |
6974 | 414k | 553750637U, // UMULLv8i8_v8i16 |
6975 | 414k | 3760228877U, // UQADD_ZI_B |
6976 | 414k | 2418067981U, // UQADD_ZI_D |
6977 | 414k | 2179009037U, // UQADD_ZI_H |
6978 | 414k | 4028713485U, // UQADD_ZI_S |
6979 | 414k | 3223357965U, // UQADD_ZPmZ_B |
6980 | 414k | 3223374349U, // UQADD_ZPmZ_D |
6981 | 414k | 3519089165U, // UQADD_ZPmZ_H |
6982 | 414k | 3223407117U, // UQADD_ZPmZ_S |
6983 | 414k | 3760228877U, // UQADD_ZZZ_B |
6984 | 414k | 2418067981U, // UQADD_ZZZ_D |
6985 | 414k | 2179009037U, // UQADD_ZZZ_H |
6986 | 414k | 4028713485U, // UQADD_ZZZ_S |
6987 | 414k | 543263245U, // UQADDv16i8 |
6988 | 414k | 807422477U, // UQADDv1i16 |
6989 | 414k | 807422477U, // UQADDv1i32 |
6990 | 414k | 807422477U, // UQADDv1i64 |
6991 | 414k | 807422477U, // UQADDv1i8 |
6992 | 414k | 545360397U, // UQADDv2i32 |
6993 | 414k | 547457549U, // UQADDv2i64 |
6994 | 414k | 549554701U, // UQADDv4i16 |
6995 | 414k | 551651853U, // UQADDv4i32 |
6996 | 414k | 553749005U, // UQADDv8i16 |
6997 | 414k | 555846157U, // UQADDv8i8 |
6998 | 414k | 2686469312U, // UQDECB_WPiI |
6999 | 414k | 2686469312U, // UQDECB_XPiI |
7000 | 414k | 2686470563U, // UQDECD_WPiI |
7001 | 414k | 2686470563U, // UQDECD_XPiI |
7002 | 414k | 2686503331U, // UQDECD_ZPiI |
7003 | 414k | 2686471249U, // UQDECH_WPiI |
7004 | 414k | 2686471249U, // UQDECH_XPiI |
7005 | 414k | 39914577U, // UQDECH_ZPiI |
7006 | 414k | 3760214644U, // UQDECP_WP_B |
7007 | 414k | 2418037364U, // UQDECP_WP_D |
7008 | 414k | 1881166452U, // UQDECP_WP_H |
7009 | 414k | 4028650100U, // UQDECP_WP_S |
7010 | 414k | 3760214644U, // UQDECP_XP_B |
7011 | 414k | 2418037364U, // UQDECP_XP_D |
7012 | 414k | 1881166452U, // UQDECP_XP_H |
7013 | 414k | 4028650100U, // UQDECP_XP_S |
7014 | 414k | 1075892852U, // UQDECP_ZP_D |
7015 | 414k | 1648431732U, // UQDECP_ZP_H |
7016 | 414k | 1344361076U, // UQDECP_ZP_S |
7017 | 414k | 2686474723U, // UQDECW_WPiI |
7018 | 414k | 2686474723U, // UQDECW_XPiI |
7019 | 414k | 2686540259U, // UQDECW_ZPiI |
7020 | 414k | 2686469328U, // UQINCB_WPiI |
7021 | 414k | 2686469328U, // UQINCB_XPiI |
7022 | 414k | 2686470579U, // UQINCD_WPiI |
7023 | 414k | 2686470579U, // UQINCD_XPiI |
7024 | 414k | 2686503347U, // UQINCD_ZPiI |
7025 | 414k | 2686471265U, // UQINCH_WPiI |
7026 | 414k | 2686471265U, // UQINCH_XPiI |
7027 | 414k | 39914593U, // UQINCH_ZPiI |
7028 | 414k | 3760214660U, // UQINCP_WP_B |
7029 | 414k | 2418037380U, // UQINCP_WP_D |
7030 | 414k | 1881166468U, // UQINCP_WP_H |
7031 | 414k | 4028650116U, // UQINCP_WP_S |
7032 | 414k | 3760214660U, // UQINCP_XP_B |
7033 | 414k | 2418037380U, // UQINCP_XP_D |
7034 | 414k | 1881166468U, // UQINCP_XP_H |
7035 | 414k | 4028650116U, // UQINCP_XP_S |
7036 | 414k | 1075892868U, // UQINCP_ZP_D |
7037 | 414k | 1648431748U, // UQINCP_ZP_H |
7038 | 414k | 1344361092U, // UQINCP_ZP_S |
7039 | 414k | 2686474739U, // UQINCW_WPiI |
7040 | 414k | 2686474739U, // UQINCW_XPiI |
7041 | 414k | 2686540275U, // UQINCW_ZPiI |
7042 | 414k | 3223360562U, // UQRSHLR_ZPmZ_B |
7043 | 414k | 3223376946U, // UQRSHLR_ZPmZ_D |
7044 | 414k | 3519091762U, // UQRSHLR_ZPmZ_H |
7045 | 414k | 3223409714U, // UQRSHLR_ZPmZ_S |
7046 | 414k | 3223359526U, // UQRSHL_ZPmZ_B |
7047 | 414k | 3223375910U, // UQRSHL_ZPmZ_D |
7048 | 414k | 3519090726U, // UQRSHL_ZPmZ_H |
7049 | 414k | 3223408678U, // UQRSHL_ZPmZ_S |
7050 | 414k | 543264806U, // UQRSHLv16i8 |
7051 | 414k | 807424038U, // UQRSHLv1i16 |
7052 | 414k | 807424038U, // UQRSHLv1i32 |
7053 | 414k | 807424038U, // UQRSHLv1i64 |
7054 | 414k | 807424038U, // UQRSHLv1i8 |
7055 | 414k | 545361958U, // UQRSHLv2i32 |
7056 | 414k | 547459110U, // UQRSHLv2i64 |
7057 | 414k | 549556262U, // UQRSHLv4i16 |
7058 | 414k | 551653414U, // UQRSHLv4i32 |
7059 | 414k | 553750566U, // UQRSHLv8i16 |
7060 | 414k | 555847718U, // UQRSHLv8i8 |
7061 | 414k | 1881179863U, // UQRSHRNB_ZZI_B |
7062 | 414k | 2172716759U, // UQRSHRNB_ZZI_H |
7063 | 414k | 2418099927U, // UQRSHRNB_ZZI_S |
7064 | 414k | 2686490572U, // UQRSHRNT_ZZI_B |
7065 | 414k | 2174818252U, // UQRSHRNT_ZZI_H |
7066 | 414k | 1075926988U, // UQRSHRNT_ZZI_S |
7067 | 414k | 807424466U, // UQRSHRNb |
7068 | 414k | 807424466U, // UQRSHRNh |
7069 | 414k | 807424466U, // UQRSHRNs |
7070 | 414k | 2959212944U, // UQRSHRNv16i8_shift |
7071 | 414k | 545362386U, // UQRSHRNv2i32_shift |
7072 | 414k | 549556690U, // UQRSHRNv4i16_shift |
7073 | 414k | 2967601552U, // UQRSHRNv4i32_shift |
7074 | 414k | 2969698704U, // UQRSHRNv8i16_shift |
7075 | 414k | 555848146U, // UQRSHRNv8i8_shift |
7076 | 414k | 3223360545U, // UQSHLR_ZPmZ_B |
7077 | 414k | 3223376929U, // UQSHLR_ZPmZ_D |
7078 | 414k | 3519091745U, // UQSHLR_ZPmZ_H |
7079 | 414k | 3223409697U, // UQSHLR_ZPmZ_S |
7080 | 414k | 3223359511U, // UQSHL_ZPmI_B |
7081 | 414k | 3223375895U, // UQSHL_ZPmI_D |
7082 | 414k | 3519090711U, // UQSHL_ZPmI_H |
7083 | 414k | 3223408663U, // UQSHL_ZPmI_S |
7084 | 414k | 3223359511U, // UQSHL_ZPmZ_B |
7085 | 414k | 3223375895U, // UQSHL_ZPmZ_D |
7086 | 414k | 3519090711U, // UQSHL_ZPmZ_H |
7087 | 414k | 3223408663U, // UQSHL_ZPmZ_S |
7088 | 414k | 807424023U, // UQSHLb |
7089 | 414k | 807424023U, // UQSHLd |
7090 | 414k | 807424023U, // UQSHLh |
7091 | 414k | 807424023U, // UQSHLs |
7092 | 414k | 543264791U, // UQSHLv16i8 |
7093 | 414k | 543264791U, // UQSHLv16i8_shift |
7094 | 414k | 807424023U, // UQSHLv1i16 |
7095 | 414k | 807424023U, // UQSHLv1i32 |
7096 | 414k | 807424023U, // UQSHLv1i64 |
7097 | 414k | 807424023U, // UQSHLv1i8 |
7098 | 414k | 545361943U, // UQSHLv2i32 |
7099 | 414k | 545361943U, // UQSHLv2i32_shift |
7100 | 414k | 547459095U, // UQSHLv2i64 |
7101 | 414k | 547459095U, // UQSHLv2i64_shift |
7102 | 414k | 549556247U, // UQSHLv4i16 |
7103 | 414k | 549556247U, // UQSHLv4i16_shift |
7104 | 414k | 551653399U, // UQSHLv4i32 |
7105 | 414k | 551653399U, // UQSHLv4i32_shift |
7106 | 414k | 553750551U, // UQSHLv8i16 |
7107 | 414k | 553750551U, // UQSHLv8i16_shift |
7108 | 414k | 555847703U, // UQSHLv8i8 |
7109 | 414k | 555847703U, // UQSHLv8i8_shift |
7110 | 414k | 1881179844U, // UQSHRNB_ZZI_B |
7111 | 414k | 2172716740U, // UQSHRNB_ZZI_H |
7112 | 414k | 2418099908U, // UQSHRNB_ZZI_S |
7113 | 414k | 2686490553U, // UQSHRNT_ZZI_B |
7114 | 414k | 2174818233U, // UQSHRNT_ZZI_H |
7115 | 414k | 1075926969U, // UQSHRNT_ZZI_S |
7116 | 414k | 807424449U, // UQSHRNb |
7117 | 414k | 807424449U, // UQSHRNh |
7118 | 414k | 807424449U, // UQSHRNs |
7119 | 414k | 2959212925U, // UQSHRNv16i8_shift |
7120 | 414k | 545362369U, // UQSHRNv2i32_shift |
7121 | 414k | 549556673U, // UQSHRNv4i16_shift |
7122 | 414k | 2967601533U, // UQSHRNv4i32_shift |
7123 | 414k | 2969698685U, // UQSHRNv8i16_shift |
7124 | 414k | 555848129U, // UQSHRNv8i8_shift |
7125 | 414k | 3223360467U, // UQSUBR_ZPmZ_B |
7126 | 414k | 3223376851U, // UQSUBR_ZPmZ_D |
7127 | 414k | 3519091667U, // UQSUBR_ZPmZ_H |
7128 | 414k | 3223409619U, // UQSUBR_ZPmZ_S |
7129 | 414k | 3760228489U, // UQSUB_ZI_B |
7130 | 414k | 2418067593U, // UQSUB_ZI_D |
7131 | 414k | 2179008649U, // UQSUB_ZI_H |
7132 | 414k | 4028713097U, // UQSUB_ZI_S |
7133 | 414k | 3223357577U, // UQSUB_ZPmZ_B |
7134 | 414k | 3223373961U, // UQSUB_ZPmZ_D |
7135 | 414k | 3519088777U, // UQSUB_ZPmZ_H |
7136 | 414k | 3223406729U, // UQSUB_ZPmZ_S |
7137 | 414k | 3760228489U, // UQSUB_ZZZ_B |
7138 | 414k | 2418067593U, // UQSUB_ZZZ_D |
7139 | 414k | 2179008649U, // UQSUB_ZZZ_H |
7140 | 414k | 4028713097U, // UQSUB_ZZZ_S |
7141 | 414k | 543262857U, // UQSUBv16i8 |
7142 | 414k | 807422089U, // UQSUBv1i16 |
7143 | 414k | 807422089U, // UQSUBv1i32 |
7144 | 414k | 807422089U, // UQSUBv1i64 |
7145 | 414k | 807422089U, // UQSUBv1i8 |
7146 | 414k | 545360009U, // UQSUBv2i32 |
7147 | 414k | 547457161U, // UQSUBv2i64 |
7148 | 414k | 549554313U, // UQSUBv4i16 |
7149 | 414k | 551651465U, // UQSUBv4i32 |
7150 | 414k | 553748617U, // UQSUBv8i16 |
7151 | 414k | 555845769U, // UQSUBv8i8 |
7152 | 414k | 1881179881U, // UQXTNB_ZZ_B |
7153 | 414k | 1635845865U, // UQXTNB_ZZ_H |
7154 | 414k | 2418099945U, // UQXTNB_ZZ_S |
7155 | 414k | 2686490599U, // UQXTNT_ZZ_B |
7156 | 414k | 1637947367U, // UQXTNT_ZZ_H |
7157 | 414k | 1075927015U, // UQXTNT_ZZ_S |
7158 | 414k | 2959212977U, // UQXTNv16i8 |
7159 | 414k | 807424503U, // UQXTNv1i16 |
7160 | 414k | 807424503U, // UQXTNv1i32 |
7161 | 414k | 807424503U, // UQXTNv1i8 |
7162 | 414k | 545362423U, // UQXTNv2i32 |
7163 | 414k | 549556727U, // UQXTNv4i16 |
7164 | 414k | 2967601585U, // UQXTNv4i32 |
7165 | 414k | 2969698737U, // UQXTNv8i16 |
7166 | 414k | 555848183U, // UQXTNv8i8 |
7167 | 414k | 2181817U, // URECPE_ZPmZ_S |
7168 | 414k | 545360569U, // URECPEv2i32 |
7169 | 414k | 551652025U, // URECPEv4i32 |
7170 | 414k | 3223357919U, // URHADD_ZPmZ_B |
7171 | 414k | 3223374303U, // URHADD_ZPmZ_D |
7172 | 414k | 3519089119U, // URHADD_ZPmZ_H |
7173 | 414k | 3223407071U, // URHADD_ZPmZ_S |
7174 | 414k | 543263199U, // URHADDv16i8 |
7175 | 414k | 545360351U, // URHADDv2i32 |
7176 | 414k | 549554655U, // URHADDv4i16 |
7177 | 414k | 551651807U, // URHADDv4i32 |
7178 | 414k | 553748959U, // URHADDv8i16 |
7179 | 414k | 555846111U, // URHADDv8i8 |
7180 | 414k | 3223360579U, // URSHLR_ZPmZ_B |
7181 | 414k | 3223376963U, // URSHLR_ZPmZ_D |
7182 | 414k | 3519091779U, // URSHLR_ZPmZ_H |
7183 | 414k | 3223409731U, // URSHLR_ZPmZ_S |
7184 | 414k | 3223359541U, // URSHL_ZPmZ_B |
7185 | 414k | 3223375925U, // URSHL_ZPmZ_D |
7186 | 414k | 3519090741U, // URSHL_ZPmZ_H |
7187 | 414k | 3223408693U, // URSHL_ZPmZ_S |
7188 | 414k | 543264821U, // URSHLv16i8 |
7189 | 414k | 807424053U, // URSHLv1i64 |
7190 | 414k | 545361973U, // URSHLv2i32 |
7191 | 414k | 547459125U, // URSHLv2i64 |
7192 | 414k | 549556277U, // URSHLv4i16 |
7193 | 414k | 551653429U, // URSHLv4i32 |
7194 | 414k | 553750581U, // URSHLv8i16 |
7195 | 414k | 555847733U, // URSHLv8i8 |
7196 | 414k | 3223360506U, // URSHR_ZPmI_B |
7197 | 414k | 3223376890U, // URSHR_ZPmI_D |
7198 | 414k | 3519091706U, // URSHR_ZPmI_H |
7199 | 414k | 3223409658U, // URSHR_ZPmI_S |
7200 | 414k | 807425018U, // URSHRd |
7201 | 414k | 543265786U, // URSHRv16i8_shift |
7202 | 414k | 545362938U, // URSHRv2i32_shift |
7203 | 414k | 547460090U, // URSHRv2i64_shift |
7204 | 414k | 549557242U, // URSHRv4i16_shift |
7205 | 414k | 551654394U, // URSHRv4i32_shift |
7206 | 414k | 553751546U, // URSHRv8i16_shift |
7207 | 414k | 555848698U, // URSHRv8i8_shift |
7208 | 414k | 2181863U, // URSQRTE_ZPmZ_S |
7209 | 414k | 545360615U, // URSQRTEv2i32 |
7210 | 414k | 551652071U, // URSQRTEv4i32 |
7211 | 414k | 1344308057U, // URSRA_ZZI_B |
7212 | 414k | 1075888985U, // URSRA_ZZI_D |
7213 | 414k | 2185298777U, // URSRA_ZZI_H |
7214 | 414k | 1344357209U, // URSRA_ZZI_S |
7215 | 414k | 270746457U, // URSRAd |
7216 | 414k | 2959213401U, // URSRAv16i8_shift |
7217 | 414k | 2961310553U, // URSRAv2i32_shift |
7218 | 414k | 2963407705U, // URSRAv2i64_shift |
7219 | 414k | 2965504857U, // URSRAv4i16_shift |
7220 | 414k | 2967602009U, // URSRAv4i32_shift |
7221 | 414k | 2969699161U, // URSRAv8i16_shift |
7222 | 414k | 2971796313U, // URSRAv8i8_shift |
7223 | 414k | 1344362531U, // USDOT_ZZZ |
7224 | 414k | 1344362531U, // USDOT_ZZZI |
7225 | 414k | 2967607331U, // USDOTlanev16i8 |
7226 | 414k | 2961315875U, // USDOTlanev8i8 |
7227 | 414k | 2967607331U, // USDOTv16i8 |
7228 | 414k | 2961315875U, // USDOTv8i8 |
7229 | 414k | 4028679669U, // USHLLB_ZZI_D |
7230 | 414k | 2273379829U, // USHLLB_ZZI_H |
7231 | 414k | 1881228789U, // USHLLB_ZZI_S |
7232 | 414k | 4028684077U, // USHLLT_ZZI_D |
7233 | 414k | 2273384237U, // USHLLT_ZZI_H |
7234 | 414k | 1881233197U, // USHLLT_ZZI_S |
7235 | 414k | 553746702U, // USHLLv16i8_shift |
7236 | 414k | 547459151U, // USHLLv2i32_shift |
7237 | 414k | 551653455U, // USHLLv4i16_shift |
7238 | 414k | 547455246U, // USHLLv4i32_shift |
7239 | 414k | 551649550U, // USHLLv8i16_shift |
7240 | 414k | 553750607U, // USHLLv8i8_shift |
7241 | 414k | 543264834U, // USHLv16i8 |
7242 | 414k | 807424066U, // USHLv1i64 |
7243 | 414k | 545361986U, // USHLv2i32 |
7244 | 414k | 547459138U, // USHLv2i64 |
7245 | 414k | 549556290U, // USHLv4i16 |
7246 | 414k | 551653442U, // USHLv4i32 |
7247 | 414k | 553750594U, // USHLv8i16 |
7248 | 414k | 555847746U, // USHLv8i8 |
7249 | 414k | 807425031U, // USHRd |
7250 | 414k | 543265799U, // USHRv16i8_shift |
7251 | 414k | 545362951U, // USHRv2i32_shift |
7252 | 414k | 547460103U, // USHRv2i64_shift |
7253 | 414k | 549557255U, // USHRv4i16_shift |
7254 | 414k | 551654407U, // USHRv4i32_shift |
7255 | 414k | 553751559U, // USHRv8i16_shift |
7256 | 414k | 555848711U, // USHRv8i8_shift |
7257 | 414k | 2967601895U, // USMMLA |
7258 | 414k | 1344357095U, // USMMLA_ZZZ |
7259 | 414k | 138527518U, // USMOPA_MPPZZ_D |
7260 | 414k | 140624670U, // USMOPA_MPPZZ_S |
7261 | 414k | 138532316U, // USMOPS_MPPZZ_D |
7262 | 414k | 140629468U, // USMOPS_MPPZZ_S |
7263 | 414k | 3223357956U, // USQADD_ZPmZ_B |
7264 | 414k | 3223374340U, // USQADD_ZPmZ_D |
7265 | 414k | 3519089156U, // USQADD_ZPmZ_H |
7266 | 414k | 3223407108U, // USQADD_ZPmZ_S |
7267 | 414k | 2959215108U, // USQADDv16i8 |
7268 | 414k | 270748164U, // USQADDv1i16 |
7269 | 414k | 270748164U, // USQADDv1i32 |
7270 | 414k | 270748164U, // USQADDv1i64 |
7271 | 414k | 270748164U, // USQADDv1i8 |
7272 | 414k | 2961312260U, // USQADDv2i32 |
7273 | 414k | 2963409412U, // USQADDv2i64 |
7274 | 414k | 2965506564U, // USQADDv4i16 |
7275 | 414k | 2967603716U, // USQADDv4i32 |
7276 | 414k | 2969700868U, // USQADDv8i16 |
7277 | 414k | 2971798020U, // USQADDv8i8 |
7278 | 414k | 1344308070U, // USRA_ZZI_B |
7279 | 414k | 1075888998U, // USRA_ZZI_D |
7280 | 414k | 2185298790U, // USRA_ZZI_H |
7281 | 414k | 1344357222U, // USRA_ZZI_S |
7282 | 414k | 270746470U, // USRAd |
7283 | 414k | 2959213414U, // USRAv16i8_shift |
7284 | 414k | 2961310566U, // USRAv2i32_shift |
7285 | 414k | 2963407718U, // USRAv2i64_shift |
7286 | 414k | 2965504870U, // USRAv4i16_shift |
7287 | 414k | 2967602022U, // USRAv4i32_shift |
7288 | 414k | 2969699174U, // USRAv8i16_shift |
7289 | 414k | 2971796326U, // USRAv8i8_shift |
7290 | 414k | 4028679598U, // USUBLB_ZZZ_D |
7291 | 414k | 2273379758U, // USUBLB_ZZZ_H |
7292 | 414k | 1881228718U, // USUBLB_ZZZ_S |
7293 | 414k | 4028684001U, // USUBLT_ZZZ_D |
7294 | 414k | 2273384161U, // USUBLT_ZZZ_H |
7295 | 414k | 1881233121U, // USUBLT_ZZZ_S |
7296 | 414k | 553746654U, // USUBLv16i8_v8i16 |
7297 | 414k | 547458999U, // USUBLv2i32_v2i64 |
7298 | 414k | 551653303U, // USUBLv4i16_v4i32 |
7299 | 414k | 547455198U, // USUBLv4i32_v2i64 |
7300 | 414k | 551649502U, // USUBLv8i16_v4i32 |
7301 | 414k | 553750455U, // USUBLv8i8_v8i16 |
7302 | 414k | 2418067614U, // USUBWB_ZZZ_D |
7303 | 414k | 2179008670U, // USUBWB_ZZZ_H |
7304 | 414k | 4028713118U, // USUBWB_ZZZ_S |
7305 | 414k | 2418071666U, // USUBWT_ZZZ_D |
7306 | 414k | 2179012722U, // USUBWT_ZZZ_H |
7307 | 414k | 4028717170U, // USUBWT_ZZZ_S |
7308 | 414k | 553746944U, // USUBWv16i8_v8i16 |
7309 | 414k | 547461579U, // USUBWv2i32_v2i64 |
7310 | 414k | 551655883U, // USUBWv4i16_v4i32 |
7311 | 414k | 547455488U, // USUBWv4i32_v2i64 |
7312 | 414k | 551649792U, // USUBWv8i16_v4i32 |
7313 | 414k | 553753035U, // USUBWv8i8_v8i16 |
7314 | 414k | 4028681929U, // UUNPKHI_ZZ_D |
7315 | 414k | 1736511177U, // UUNPKHI_ZZ_H |
7316 | 414k | 1881231049U, // UUNPKHI_ZZ_S |
7317 | 414k | 4028682818U, // UUNPKLO_ZZ_D |
7318 | 414k | 1736512066U, // UUNPKLO_ZZ_H |
7319 | 414k | 1881231938U, // UUNPKLO_ZZ_S |
7320 | 414k | 2148441U, // UXTB_ZPmZ_D |
7321 | 414k | 272697433U, // UXTB_ZPmZ_H |
7322 | 414k | 2181209U, // UXTB_ZPmZ_S |
7323 | 414k | 2150025U, // UXTH_ZPmZ_D |
7324 | 414k | 2182793U, // UXTH_ZPmZ_S |
7325 | 414k | 2153101U, // UXTW_ZPmZ_D |
7326 | 414k | 3760226362U, // UZP1_PPP_B |
7327 | 414k | 2418065466U, // UZP1_PPP_D |
7328 | 414k | 2179006522U, // UZP1_PPP_H |
7329 | 414k | 4028710970U, // UZP1_PPP_S |
7330 | 414k | 3760226362U, // UZP1_ZZZ_B |
7331 | 414k | 2418065466U, // UZP1_ZZZ_D |
7332 | 414k | 2179006522U, // UZP1_ZZZ_H |
7333 | 414k | 2193981498U, // UZP1_ZZZ_Q |
7334 | 414k | 4028710970U, // UZP1_ZZZ_S |
7335 | 414k | 543260730U, // UZP1v16i8 |
7336 | 414k | 545357882U, // UZP1v2i32 |
7337 | 414k | 547455034U, // UZP1v2i64 |
7338 | 414k | 549552186U, // UZP1v4i16 |
7339 | 414k | 551649338U, // UZP1v4i32 |
7340 | 414k | 553746490U, // UZP1v8i16 |
7341 | 414k | 555843642U, // UZP1v8i8 |
7342 | 414k | 3760226790U, // UZP2_PPP_B |
7343 | 414k | 2418065894U, // UZP2_PPP_D |
7344 | 414k | 2179006950U, // UZP2_PPP_H |
7345 | 414k | 4028711398U, // UZP2_PPP_S |
7346 | 414k | 3760226790U, // UZP2_ZZZ_B |
7347 | 414k | 2418065894U, // UZP2_ZZZ_D |
7348 | 414k | 2179006950U, // UZP2_ZZZ_H |
7349 | 414k | 2193981926U, // UZP2_ZZZ_Q |
7350 | 414k | 4028711398U, // UZP2_ZZZ_S |
7351 | 414k | 543261158U, // UZP2v16i8 |
7352 | 414k | 545358310U, // UZP2v2i32 |
7353 | 414k | 547455462U, // UZP2v2i64 |
7354 | 414k | 549552614U, // UZP2v4i16 |
7355 | 414k | 551649766U, // UZP2v4i32 |
7356 | 414k | 553746918U, // UZP2v8i16 |
7357 | 414k | 555844070U, // UZP2v8i8 |
7358 | 414k | 22122U, // WFET |
7359 | 414k | 22176U, // WFIT |
7360 | 414k | 807438948U, // WHILEGE_PWW_B |
7361 | 414k | 807455332U, // WHILEGE_PWW_D |
7362 | 414k | 2191592036U, // WHILEGE_PWW_H |
7363 | 414k | 807488100U, // WHILEGE_PWW_S |
7364 | 414k | 807438948U, // WHILEGE_PXX_B |
7365 | 414k | 807455332U, // WHILEGE_PXX_D |
7366 | 414k | 2191592036U, // WHILEGE_PXX_H |
7367 | 414k | 807488100U, // WHILEGE_PXX_S |
7368 | 414k | 807442051U, // WHILEGT_PWW_B |
7369 | 414k | 807458435U, // WHILEGT_PWW_D |
7370 | 414k | 2191595139U, // WHILEGT_PWW_H |
7371 | 414k | 807491203U, // WHILEGT_PWW_S |
7372 | 414k | 807442051U, // WHILEGT_PXX_B |
7373 | 414k | 807458435U, // WHILEGT_PXX_D |
7374 | 414k | 2191595139U, // WHILEGT_PXX_H |
7375 | 414k | 807491203U, // WHILEGT_PXX_S |
7376 | 414k | 807440046U, // WHILEHI_PWW_B |
7377 | 414k | 807456430U, // WHILEHI_PWW_D |
7378 | 414k | 2191593134U, // WHILEHI_PWW_H |
7379 | 414k | 807489198U, // WHILEHI_PWW_S |
7380 | 414k | 807440046U, // WHILEHI_PXX_B |
7381 | 414k | 807456430U, // WHILEHI_PXX_D |
7382 | 414k | 2191593134U, // WHILEHI_PXX_H |
7383 | 414k | 807489198U, // WHILEHI_PXX_S |
7384 | 414k | 807441771U, // WHILEHS_PWW_B |
7385 | 414k | 807458155U, // WHILEHS_PWW_D |
7386 | 414k | 2191594859U, // WHILEHS_PWW_H |
7387 | 414k | 807490923U, // WHILEHS_PWW_S |
7388 | 414k | 807441771U, // WHILEHS_PXX_B |
7389 | 414k | 807458155U, // WHILEHS_PXX_D |
7390 | 414k | 2191594859U, // WHILEHS_PXX_H |
7391 | 414k | 807490923U, // WHILEHS_PXX_S |
7392 | 414k | 807438979U, // WHILELE_PWW_B |
7393 | 414k | 807455363U, // WHILELE_PWW_D |
7394 | 414k | 2191592067U, // WHILELE_PWW_H |
7395 | 414k | 807488131U, // WHILELE_PWW_S |
7396 | 414k | 807438979U, // WHILELE_PXX_B |
7397 | 414k | 807455363U, // WHILELE_PXX_D |
7398 | 414k | 2191592067U, // WHILELE_PXX_H |
7399 | 414k | 807488131U, // WHILELE_PXX_S |
7400 | 414k | 807440935U, // WHILELO_PWW_B |
7401 | 414k | 807457319U, // WHILELO_PWW_D |
7402 | 414k | 2191594023U, // WHILELO_PWW_H |
7403 | 414k | 807490087U, // WHILELO_PWW_S |
7404 | 414k | 807440935U, // WHILELO_PXX_B |
7405 | 414k | 807457319U, // WHILELO_PXX_D |
7406 | 414k | 2191594023U, // WHILELO_PXX_H |
7407 | 414k | 807490087U, // WHILELO_PXX_S |
7408 | 414k | 807441798U, // WHILELS_PWW_B |
7409 | 414k | 807458182U, // WHILELS_PWW_D |
7410 | 414k | 2191594886U, // WHILELS_PWW_H |
7411 | 414k | 807490950U, // WHILELS_PWW_S |
7412 | 414k | 807441798U, // WHILELS_PXX_B |
7413 | 414k | 807458182U, // WHILELS_PXX_D |
7414 | 414k | 2191594886U, // WHILELS_PXX_H |
7415 | 414k | 807490950U, // WHILELS_PXX_S |
7416 | 414k | 807442199U, // WHILELT_PWW_B |
7417 | 414k | 807458583U, // WHILELT_PWW_D |
7418 | 414k | 2191595287U, // WHILELT_PWW_H |
7419 | 414k | 807491351U, // WHILELT_PWW_S |
7420 | 414k | 807442199U, // WHILELT_PXX_B |
7421 | 414k | 807458583U, // WHILELT_PXX_D |
7422 | 414k | 2191595287U, // WHILELT_PXX_H |
7423 | 414k | 807491351U, // WHILELT_PXX_S |
7424 | 414k | 807442982U, // WHILERW_PXX_B |
7425 | 414k | 807459366U, // WHILERW_PXX_D |
7426 | 414k | 2191596070U, // WHILERW_PXX_H |
7427 | 414k | 807492134U, // WHILERW_PXX_S |
7428 | 414k | 807441635U, // WHILEWR_PXX_B |
7429 | 414k | 807458019U, // WHILEWR_PXX_D |
7430 | 414k | 2191594723U, // WHILEWR_PXX_H |
7431 | 414k | 807490787U, // WHILEWR_PXX_S |
7432 | 414k | 37868U, // WRFFR |
7433 | 414k | 8608U, // XAFLAG |
7434 | 414k | 547460015U, // XAR |
7435 | 414k | 3760231343U, // XAR_ZZZI_B |
7436 | 414k | 2418070447U, // XAR_ZZZI_D |
7437 | 414k | 2179011503U, // XAR_ZZZI_H |
7438 | 414k | 4028715951U, // XAR_ZZZI_S |
7439 | 414k | 18836U, // XPACD |
7440 | 414k | 20135U, // XPACI |
7441 | 414k | 7279U, // XPACLRI |
7442 | 414k | 2959212971U, // XTNv16i8 |
7443 | 414k | 545362418U, // XTNv2i32 |
7444 | 414k | 549556722U, // XTNv4i16 |
7445 | 414k | 2967601579U, // XTNv4i32 |
7446 | 414k | 2969698731U, // XTNv8i16 |
7447 | 414k | 555848178U, // XTNv8i8 |
7448 | 414k | 1102418U, // ZERO_M |
7449 | 414k | 3760226356U, // ZIP1_PPP_B |
7450 | 414k | 2418065460U, // ZIP1_PPP_D |
7451 | 414k | 2179006516U, // ZIP1_PPP_H |
7452 | 414k | 4028710964U, // ZIP1_PPP_S |
7453 | 414k | 3760226356U, // ZIP1_ZZZ_B |
7454 | 414k | 2418065460U, // ZIP1_ZZZ_D |
7455 | 414k | 2179006516U, // ZIP1_ZZZ_H |
7456 | 414k | 2193981492U, // ZIP1_ZZZ_Q |
7457 | 414k | 4028710964U, // ZIP1_ZZZ_S |
7458 | 414k | 543260724U, // ZIP1v16i8 |
7459 | 414k | 545357876U, // ZIP1v2i32 |
7460 | 414k | 547455028U, // ZIP1v2i64 |
7461 | 414k | 549552180U, // ZIP1v4i16 |
7462 | 414k | 551649332U, // ZIP1v4i32 |
7463 | 414k | 553746484U, // ZIP1v8i16 |
7464 | 414k | 555843636U, // ZIP1v8i8 |
7465 | 414k | 3760226784U, // ZIP2_PPP_B |
7466 | 414k | 2418065888U, // ZIP2_PPP_D |
7467 | 414k | 2179006944U, // ZIP2_PPP_H |
7468 | 414k | 4028711392U, // ZIP2_PPP_S |
7469 | 414k | 3760226784U, // ZIP2_ZZZ_B |
7470 | 414k | 2418065888U, // ZIP2_ZZZ_D |
7471 | 414k | 2179006944U, // ZIP2_ZZZ_H |
7472 | 414k | 2193981920U, // ZIP2_ZZZ_Q |
7473 | 414k | 4028711392U, // ZIP2_ZZZ_S |
7474 | 414k | 543261152U, // ZIP2v16i8 |
7475 | 414k | 545358304U, // ZIP2v2i32 |
7476 | 414k | 547455456U, // ZIP2v2i64 |
7477 | 414k | 549552608U, // ZIP2v4i16 |
7478 | 414k | 551649760U, // ZIP2v4i32 |
7479 | 414k | 553746912U, // ZIP2v8i16 |
7480 | 414k | 555844064U, // ZIP2v8i8 |
7481 | 414k | 138532308U, // anonymous_13987 |
7482 | 414k | 138532309U, // anonymous_13988 |
7483 | 414k | 138527510U, // anonymous_5384 |
7484 | 414k | 138527511U, // anonymous_5385 |
7485 | 414k | }; |
7486 | | |
7487 | 414k | static const uint32_t OpInfo1[] = { |
7488 | 414k | 0U, // PHI |
7489 | 414k | 0U, // INLINEASM |
7490 | 414k | 0U, // INLINEASM_BR |
7491 | 414k | 0U, // CFI_INSTRUCTION |
7492 | 414k | 0U, // EH_LABEL |
7493 | 414k | 0U, // GC_LABEL |
7494 | 414k | 0U, // ANNOTATION_LABEL |
7495 | 414k | 0U, // KILL |
7496 | 414k | 0U, // EXTRACT_SUBREG |
7497 | 414k | 0U, // INSERT_SUBREG |
7498 | 414k | 0U, // IMPLICIT_DEF |
7499 | 414k | 0U, // SUBREG_TO_REG |
7500 | 414k | 0U, // COPY_TO_REGCLASS |
7501 | 414k | 0U, // DBG_VALUE |
7502 | 414k | 0U, // DBG_VALUE_LIST |
7503 | 414k | 0U, // DBG_INSTR_REF |
7504 | 414k | 0U, // DBG_PHI |
7505 | 414k | 0U, // DBG_LABEL |
7506 | 414k | 0U, // REG_SEQUENCE |
7507 | 414k | 0U, // COPY |
7508 | 414k | 0U, // BUNDLE |
7509 | 414k | 0U, // LIFETIME_START |
7510 | 414k | 0U, // LIFETIME_END |
7511 | 414k | 0U, // PSEUDO_PROBE |
7512 | 414k | 0U, // ARITH_FENCE |
7513 | 414k | 0U, // STACKMAP |
7514 | 414k | 0U, // FENTRY_CALL |
7515 | 414k | 0U, // PATCHPOINT |
7516 | 414k | 0U, // LOAD_STACK_GUARD |
7517 | 414k | 0U, // PREALLOCATED_SETUP |
7518 | 414k | 0U, // PREALLOCATED_ARG |
7519 | 414k | 0U, // STATEPOINT |
7520 | 414k | 0U, // LOCAL_ESCAPE |
7521 | 414k | 0U, // FAULTING_OP |
7522 | 414k | 0U, // PATCHABLE_OP |
7523 | 414k | 0U, // PATCHABLE_FUNCTION_ENTER |
7524 | 414k | 0U, // PATCHABLE_RET |
7525 | 414k | 0U, // PATCHABLE_FUNCTION_EXIT |
7526 | 414k | 0U, // PATCHABLE_TAIL_CALL |
7527 | 414k | 0U, // PATCHABLE_EVENT_CALL |
7528 | 414k | 0U, // PATCHABLE_TYPED_EVENT_CALL |
7529 | 414k | 0U, // ICALL_BRANCH_FUNNEL |
7530 | 414k | 0U, // G_ASSERT_SEXT |
7531 | 414k | 0U, // G_ASSERT_ZEXT |
7532 | 414k | 0U, // G_ASSERT_ALIGN |
7533 | 414k | 0U, // G_ADD |
7534 | 414k | 0U, // G_SUB |
7535 | 414k | 0U, // G_MUL |
7536 | 414k | 0U, // G_SDIV |
7537 | 414k | 0U, // G_UDIV |
7538 | 414k | 0U, // G_SREM |
7539 | 414k | 0U, // G_UREM |
7540 | 414k | 0U, // G_SDIVREM |
7541 | 414k | 0U, // G_UDIVREM |
7542 | 414k | 0U, // G_AND |
7543 | 414k | 0U, // G_OR |
7544 | 414k | 0U, // G_XOR |
7545 | 414k | 0U, // G_IMPLICIT_DEF |
7546 | 414k | 0U, // G_PHI |
7547 | 414k | 0U, // G_FRAME_INDEX |
7548 | 414k | 0U, // G_GLOBAL_VALUE |
7549 | 414k | 0U, // G_EXTRACT |
7550 | 414k | 0U, // G_UNMERGE_VALUES |
7551 | 414k | 0U, // G_INSERT |
7552 | 414k | 0U, // G_MERGE_VALUES |
7553 | 414k | 0U, // G_BUILD_VECTOR |
7554 | 414k | 0U, // G_BUILD_VECTOR_TRUNC |
7555 | 414k | 0U, // G_CONCAT_VECTORS |
7556 | 414k | 0U, // G_PTRTOINT |
7557 | 414k | 0U, // G_INTTOPTR |
7558 | 414k | 0U, // G_BITCAST |
7559 | 414k | 0U, // G_FREEZE |
7560 | 414k | 0U, // G_INTRINSIC_TRUNC |
7561 | 414k | 0U, // G_INTRINSIC_ROUND |
7562 | 414k | 0U, // G_INTRINSIC_LRINT |
7563 | 414k | 0U, // G_INTRINSIC_ROUNDEVEN |
7564 | 414k | 0U, // G_READCYCLECOUNTER |
7565 | 414k | 0U, // G_LOAD |
7566 | 414k | 0U, // G_SEXTLOAD |
7567 | 414k | 0U, // G_ZEXTLOAD |
7568 | 414k | 0U, // G_INDEXED_LOAD |
7569 | 414k | 0U, // G_INDEXED_SEXTLOAD |
7570 | 414k | 0U, // G_INDEXED_ZEXTLOAD |
7571 | 414k | 0U, // G_STORE |
7572 | 414k | 0U, // G_INDEXED_STORE |
7573 | 414k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
7574 | 414k | 0U, // G_ATOMIC_CMPXCHG |
7575 | 414k | 0U, // G_ATOMICRMW_XCHG |
7576 | 414k | 0U, // G_ATOMICRMW_ADD |
7577 | 414k | 0U, // G_ATOMICRMW_SUB |
7578 | 414k | 0U, // G_ATOMICRMW_AND |
7579 | 414k | 0U, // G_ATOMICRMW_NAND |
7580 | 414k | 0U, // G_ATOMICRMW_OR |
7581 | 414k | 0U, // G_ATOMICRMW_XOR |
7582 | 414k | 0U, // G_ATOMICRMW_MAX |
7583 | 414k | 0U, // G_ATOMICRMW_MIN |
7584 | 414k | 0U, // G_ATOMICRMW_UMAX |
7585 | 414k | 0U, // G_ATOMICRMW_UMIN |
7586 | 414k | 0U, // G_ATOMICRMW_FADD |
7587 | 414k | 0U, // G_ATOMICRMW_FSUB |
7588 | 414k | 0U, // G_FENCE |
7589 | 414k | 0U, // G_BRCOND |
7590 | 414k | 0U, // G_BRINDIRECT |
7591 | 414k | 0U, // G_INTRINSIC |
7592 | 414k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
7593 | 414k | 0U, // G_ANYEXT |
7594 | 414k | 0U, // G_TRUNC |
7595 | 414k | 0U, // G_CONSTANT |
7596 | 414k | 0U, // G_FCONSTANT |
7597 | 414k | 0U, // G_VASTART |
7598 | 414k | 0U, // G_VAARG |
7599 | 414k | 0U, // G_SEXT |
7600 | 414k | 0U, // G_SEXT_INREG |
7601 | 414k | 0U, // G_ZEXT |
7602 | 414k | 0U, // G_SHL |
7603 | 414k | 0U, // G_LSHR |
7604 | 414k | 0U, // G_ASHR |
7605 | 414k | 0U, // G_FSHL |
7606 | 414k | 0U, // G_FSHR |
7607 | 414k | 0U, // G_ROTR |
7608 | 414k | 0U, // G_ROTL |
7609 | 414k | 0U, // G_ICMP |
7610 | 414k | 0U, // G_FCMP |
7611 | 414k | 0U, // G_SELECT |
7612 | 414k | 0U, // G_UADDO |
7613 | 414k | 0U, // G_UADDE |
7614 | 414k | 0U, // G_USUBO |
7615 | 414k | 0U, // G_USUBE |
7616 | 414k | 0U, // G_SADDO |
7617 | 414k | 0U, // G_SADDE |
7618 | 414k | 0U, // G_SSUBO |
7619 | 414k | 0U, // G_SSUBE |
7620 | 414k | 0U, // G_UMULO |
7621 | 414k | 0U, // G_SMULO |
7622 | 414k | 0U, // G_UMULH |
7623 | 414k | 0U, // G_SMULH |
7624 | 414k | 0U, // G_UADDSAT |
7625 | 414k | 0U, // G_SADDSAT |
7626 | 414k | 0U, // G_USUBSAT |
7627 | 414k | 0U, // G_SSUBSAT |
7628 | 414k | 0U, // G_USHLSAT |
7629 | 414k | 0U, // G_SSHLSAT |
7630 | 414k | 0U, // G_SMULFIX |
7631 | 414k | 0U, // G_UMULFIX |
7632 | 414k | 0U, // G_SMULFIXSAT |
7633 | 414k | 0U, // G_UMULFIXSAT |
7634 | 414k | 0U, // G_SDIVFIX |
7635 | 414k | 0U, // G_UDIVFIX |
7636 | 414k | 0U, // G_SDIVFIXSAT |
7637 | 414k | 0U, // G_UDIVFIXSAT |
7638 | 414k | 0U, // G_FADD |
7639 | 414k | 0U, // G_FSUB |
7640 | 414k | 0U, // G_FMUL |
7641 | 414k | 0U, // G_FMA |
7642 | 414k | 0U, // G_FMAD |
7643 | 414k | 0U, // G_FDIV |
7644 | 414k | 0U, // G_FREM |
7645 | 414k | 0U, // G_FPOW |
7646 | 414k | 0U, // G_FPOWI |
7647 | 414k | 0U, // G_FEXP |
7648 | 414k | 0U, // G_FEXP2 |
7649 | 414k | 0U, // G_FLOG |
7650 | 414k | 0U, // G_FLOG2 |
7651 | 414k | 0U, // G_FLOG10 |
7652 | 414k | 0U, // G_FNEG |
7653 | 414k | 0U, // G_FPEXT |
7654 | 414k | 0U, // G_FPTRUNC |
7655 | 414k | 0U, // G_FPTOSI |
7656 | 414k | 0U, // G_FPTOUI |
7657 | 414k | 0U, // G_SITOFP |
7658 | 414k | 0U, // G_UITOFP |
7659 | 414k | 0U, // G_FABS |
7660 | 414k | 0U, // G_FCOPYSIGN |
7661 | 414k | 0U, // G_FCANONICALIZE |
7662 | 414k | 0U, // G_FMINNUM |
7663 | 414k | 0U, // G_FMAXNUM |
7664 | 414k | 0U, // G_FMINNUM_IEEE |
7665 | 414k | 0U, // G_FMAXNUM_IEEE |
7666 | 414k | 0U, // G_FMINIMUM |
7667 | 414k | 0U, // G_FMAXIMUM |
7668 | 414k | 0U, // G_PTR_ADD |
7669 | 414k | 0U, // G_PTRMASK |
7670 | 414k | 0U, // G_SMIN |
7671 | 414k | 0U, // G_SMAX |
7672 | 414k | 0U, // G_UMIN |
7673 | 414k | 0U, // G_UMAX |
7674 | 414k | 0U, // G_ABS |
7675 | 414k | 0U, // G_LROUND |
7676 | 414k | 0U, // G_LLROUND |
7677 | 414k | 0U, // G_BR |
7678 | 414k | 0U, // G_BRJT |
7679 | 414k | 0U, // G_INSERT_VECTOR_ELT |
7680 | 414k | 0U, // G_EXTRACT_VECTOR_ELT |
7681 | 414k | 0U, // G_SHUFFLE_VECTOR |
7682 | 414k | 0U, // G_CTTZ |
7683 | 414k | 0U, // G_CTTZ_ZERO_UNDEF |
7684 | 414k | 0U, // G_CTLZ |
7685 | 414k | 0U, // G_CTLZ_ZERO_UNDEF |
7686 | 414k | 0U, // G_CTPOP |
7687 | 414k | 0U, // G_BSWAP |
7688 | 414k | 0U, // G_BITREVERSE |
7689 | 414k | 0U, // G_FCEIL |
7690 | 414k | 0U, // G_FCOS |
7691 | 414k | 0U, // G_FSIN |
7692 | 414k | 0U, // G_FSQRT |
7693 | 414k | 0U, // G_FFLOOR |
7694 | 414k | 0U, // G_FRINT |
7695 | 414k | 0U, // G_FNEARBYINT |
7696 | 414k | 0U, // G_ADDRSPACE_CAST |
7697 | 414k | 0U, // G_BLOCK_ADDR |
7698 | 414k | 0U, // G_JUMP_TABLE |
7699 | 414k | 0U, // G_DYN_STACKALLOC |
7700 | 414k | 0U, // G_STRICT_FADD |
7701 | 414k | 0U, // G_STRICT_FSUB |
7702 | 414k | 0U, // G_STRICT_FMUL |
7703 | 414k | 0U, // G_STRICT_FDIV |
7704 | 414k | 0U, // G_STRICT_FREM |
7705 | 414k | 0U, // G_STRICT_FMA |
7706 | 414k | 0U, // G_STRICT_FSQRT |
7707 | 414k | 0U, // G_READ_REGISTER |
7708 | 414k | 0U, // G_WRITE_REGISTER |
7709 | 414k | 0U, // G_MEMCPY |
7710 | 414k | 0U, // G_MEMCPY_INLINE |
7711 | 414k | 0U, // G_MEMMOVE |
7712 | 414k | 0U, // G_MEMSET |
7713 | 414k | 0U, // G_BZERO |
7714 | 414k | 0U, // G_VECREDUCE_SEQ_FADD |
7715 | 414k | 0U, // G_VECREDUCE_SEQ_FMUL |
7716 | 414k | 0U, // G_VECREDUCE_FADD |
7717 | 414k | 0U, // G_VECREDUCE_FMUL |
7718 | 414k | 0U, // G_VECREDUCE_FMAX |
7719 | 414k | 0U, // G_VECREDUCE_FMIN |
7720 | 414k | 0U, // G_VECREDUCE_ADD |
7721 | 414k | 0U, // G_VECREDUCE_MUL |
7722 | 414k | 0U, // G_VECREDUCE_AND |
7723 | 414k | 0U, // G_VECREDUCE_OR |
7724 | 414k | 0U, // G_VECREDUCE_XOR |
7725 | 414k | 0U, // G_VECREDUCE_SMAX |
7726 | 414k | 0U, // G_VECREDUCE_SMIN |
7727 | 414k | 0U, // G_VECREDUCE_UMAX |
7728 | 414k | 0U, // G_VECREDUCE_UMIN |
7729 | 414k | 0U, // G_SBFX |
7730 | 414k | 0U, // G_UBFX |
7731 | 414k | 0U, // ABS_ZPmZ_UNDEF_B |
7732 | 414k | 0U, // ABS_ZPmZ_UNDEF_D |
7733 | 414k | 0U, // ABS_ZPmZ_UNDEF_H |
7734 | 414k | 0U, // ABS_ZPmZ_UNDEF_S |
7735 | 414k | 0U, // ADDSWrr |
7736 | 414k | 0U, // ADDSXrr |
7737 | 414k | 0U, // ADDWrr |
7738 | 414k | 0U, // ADDXrr |
7739 | 414k | 0U, // ADD_ZPZZ_UNDEF_B |
7740 | 414k | 0U, // ADD_ZPZZ_UNDEF_D |
7741 | 414k | 0U, // ADD_ZPZZ_UNDEF_H |
7742 | 414k | 0U, // ADD_ZPZZ_UNDEF_S |
7743 | 414k | 0U, // ADD_ZPZZ_ZERO_B |
7744 | 414k | 0U, // ADD_ZPZZ_ZERO_D |
7745 | 414k | 0U, // ADD_ZPZZ_ZERO_H |
7746 | 414k | 0U, // ADD_ZPZZ_ZERO_S |
7747 | 414k | 0U, // ADDlowTLS |
7748 | 414k | 0U, // ADJCALLSTACKDOWN |
7749 | 414k | 0U, // ADJCALLSTACKUP |
7750 | 414k | 0U, // AESIMCrrTied |
7751 | 414k | 0U, // AESMCrrTied |
7752 | 414k | 0U, // ANDSWrr |
7753 | 414k | 0U, // ANDSXrr |
7754 | 414k | 0U, // ANDWrr |
7755 | 414k | 0U, // ANDXrr |
7756 | 414k | 0U, // ASRD_ZPZI_ZERO_B |
7757 | 414k | 0U, // ASRD_ZPZI_ZERO_D |
7758 | 414k | 0U, // ASRD_ZPZI_ZERO_H |
7759 | 414k | 0U, // ASRD_ZPZI_ZERO_S |
7760 | 414k | 0U, // ASR_ZPZI_UNDEF_B |
7761 | 414k | 0U, // ASR_ZPZI_UNDEF_D |
7762 | 414k | 0U, // ASR_ZPZI_UNDEF_H |
7763 | 414k | 0U, // ASR_ZPZI_UNDEF_S |
7764 | 414k | 0U, // ASR_ZPZZ_UNDEF_B |
7765 | 414k | 0U, // ASR_ZPZZ_UNDEF_D |
7766 | 414k | 0U, // ASR_ZPZZ_UNDEF_H |
7767 | 414k | 0U, // ASR_ZPZZ_UNDEF_S |
7768 | 414k | 0U, // ASR_ZPZZ_ZERO_B |
7769 | 414k | 0U, // ASR_ZPZZ_ZERO_D |
7770 | 414k | 0U, // ASR_ZPZZ_ZERO_H |
7771 | 414k | 0U, // ASR_ZPZZ_ZERO_S |
7772 | 414k | 0U, // BICSWrr |
7773 | 414k | 0U, // BICSXrr |
7774 | 414k | 0U, // BICWrr |
7775 | 414k | 0U, // BICXrr |
7776 | 414k | 0U, // BLRNoIP |
7777 | 414k | 0U, // BLR_BTI |
7778 | 414k | 0U, // BLR_RVMARKER |
7779 | 414k | 0U, // BSPv16i8 |
7780 | 414k | 0U, // BSPv8i8 |
7781 | 414k | 0U, // CATCHRET |
7782 | 414k | 0U, // CLEANUPRET |
7783 | 414k | 0U, // CLS_ZPmZ_UNDEF_B |
7784 | 414k | 0U, // CLS_ZPmZ_UNDEF_D |
7785 | 414k | 0U, // CLS_ZPmZ_UNDEF_H |
7786 | 414k | 0U, // CLS_ZPmZ_UNDEF_S |
7787 | 414k | 0U, // CLZ_ZPmZ_UNDEF_B |
7788 | 414k | 0U, // CLZ_ZPmZ_UNDEF_D |
7789 | 414k | 0U, // CLZ_ZPmZ_UNDEF_H |
7790 | 414k | 0U, // CLZ_ZPmZ_UNDEF_S |
7791 | 414k | 0U, // CMP_SWAP_128 |
7792 | 414k | 0U, // CMP_SWAP_128_ACQUIRE |
7793 | 414k | 0U, // CMP_SWAP_128_MONOTONIC |
7794 | 414k | 0U, // CMP_SWAP_128_RELEASE |
7795 | 414k | 0U, // CMP_SWAP_16 |
7796 | 414k | 0U, // CMP_SWAP_32 |
7797 | 414k | 0U, // CMP_SWAP_64 |
7798 | 414k | 0U, // CMP_SWAP_8 |
7799 | 414k | 0U, // CNOT_ZPmZ_UNDEF_B |
7800 | 414k | 0U, // CNOT_ZPmZ_UNDEF_D |
7801 | 414k | 0U, // CNOT_ZPmZ_UNDEF_H |
7802 | 414k | 0U, // CNOT_ZPmZ_UNDEF_S |
7803 | 414k | 0U, // CNT_ZPmZ_UNDEF_B |
7804 | 414k | 0U, // CNT_ZPmZ_UNDEF_D |
7805 | 414k | 0U, // CNT_ZPmZ_UNDEF_H |
7806 | 414k | 0U, // CNT_ZPmZ_UNDEF_S |
7807 | 414k | 0U, // CompilerBarrier |
7808 | 414k | 0U, // EMITBKEY |
7809 | 414k | 0U, // EONWrr |
7810 | 414k | 0U, // EONXrr |
7811 | 414k | 0U, // EORWrr |
7812 | 414k | 0U, // EORXrr |
7813 | 414k | 0U, // F128CSEL |
7814 | 414k | 0U, // FABD_ZPZZ_UNDEF_D |
7815 | 414k | 0U, // FABD_ZPZZ_UNDEF_H |
7816 | 414k | 0U, // FABD_ZPZZ_UNDEF_S |
7817 | 414k | 0U, // FABD_ZPZZ_ZERO_D |
7818 | 414k | 0U, // FABD_ZPZZ_ZERO_H |
7819 | 414k | 0U, // FABD_ZPZZ_ZERO_S |
7820 | 414k | 0U, // FABS_ZPmZ_UNDEF_D |
7821 | 414k | 0U, // FABS_ZPmZ_UNDEF_H |
7822 | 414k | 0U, // FABS_ZPmZ_UNDEF_S |
7823 | 414k | 0U, // FADD_ZPZI_UNDEF_D |
7824 | 414k | 0U, // FADD_ZPZI_UNDEF_H |
7825 | 414k | 0U, // FADD_ZPZI_UNDEF_S |
7826 | 414k | 0U, // FADD_ZPZI_ZERO_D |
7827 | 414k | 0U, // FADD_ZPZI_ZERO_H |
7828 | 414k | 0U, // FADD_ZPZI_ZERO_S |
7829 | 414k | 0U, // FADD_ZPZZ_UNDEF_D |
7830 | 414k | 0U, // FADD_ZPZZ_UNDEF_H |
7831 | 414k | 0U, // FADD_ZPZZ_UNDEF_S |
7832 | 414k | 0U, // FADD_ZPZZ_ZERO_D |
7833 | 414k | 0U, // FADD_ZPZZ_ZERO_H |
7834 | 414k | 0U, // FADD_ZPZZ_ZERO_S |
7835 | 414k | 0U, // FCVTZS_ZPmZ_DtoD_UNDEF |
7836 | 414k | 0U, // FCVTZS_ZPmZ_DtoS_UNDEF |
7837 | 414k | 0U, // FCVTZS_ZPmZ_HtoD_UNDEF |
7838 | 414k | 0U, // FCVTZS_ZPmZ_HtoH_UNDEF |
7839 | 414k | 0U, // FCVTZS_ZPmZ_HtoS_UNDEF |
7840 | 414k | 0U, // FCVTZS_ZPmZ_StoD_UNDEF |
7841 | 414k | 0U, // FCVTZS_ZPmZ_StoS_UNDEF |
7842 | 414k | 0U, // FCVTZU_ZPmZ_DtoD_UNDEF |
7843 | 414k | 0U, // FCVTZU_ZPmZ_DtoS_UNDEF |
7844 | 414k | 0U, // FCVTZU_ZPmZ_HtoD_UNDEF |
7845 | 414k | 0U, // FCVTZU_ZPmZ_HtoH_UNDEF |
7846 | 414k | 0U, // FCVTZU_ZPmZ_HtoS_UNDEF |
7847 | 414k | 0U, // FCVTZU_ZPmZ_StoD_UNDEF |
7848 | 414k | 0U, // FCVTZU_ZPmZ_StoS_UNDEF |
7849 | 414k | 0U, // FCVT_ZPmZ_DtoH_UNDEF |
7850 | 414k | 0U, // FCVT_ZPmZ_DtoS_UNDEF |
7851 | 414k | 0U, // FCVT_ZPmZ_HtoD_UNDEF |
7852 | 414k | 0U, // FCVT_ZPmZ_HtoS_UNDEF |
7853 | 414k | 0U, // FCVT_ZPmZ_StoD_UNDEF |
7854 | 414k | 0U, // FCVT_ZPmZ_StoH_UNDEF |
7855 | 414k | 0U, // FDIVR_ZPZZ_ZERO_D |
7856 | 414k | 0U, // FDIVR_ZPZZ_ZERO_H |
7857 | 414k | 0U, // FDIVR_ZPZZ_ZERO_S |
7858 | 414k | 0U, // FDIV_ZPZZ_UNDEF_D |
7859 | 414k | 0U, // FDIV_ZPZZ_UNDEF_H |
7860 | 414k | 0U, // FDIV_ZPZZ_UNDEF_S |
7861 | 414k | 0U, // FDIV_ZPZZ_ZERO_D |
7862 | 414k | 0U, // FDIV_ZPZZ_ZERO_H |
7863 | 414k | 0U, // FDIV_ZPZZ_ZERO_S |
7864 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_D |
7865 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_H |
7866 | 414k | 0U, // FMAXNM_ZPZI_UNDEF_S |
7867 | 414k | 0U, // FMAXNM_ZPZI_ZERO_D |
7868 | 414k | 0U, // FMAXNM_ZPZI_ZERO_H |
7869 | 414k | 0U, // FMAXNM_ZPZI_ZERO_S |
7870 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_D |
7871 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_H |
7872 | 414k | 0U, // FMAXNM_ZPZZ_UNDEF_S |
7873 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_D |
7874 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_H |
7875 | 414k | 0U, // FMAXNM_ZPZZ_ZERO_S |
7876 | 414k | 0U, // FMAX_ZPZI_UNDEF_D |
7877 | 414k | 0U, // FMAX_ZPZI_UNDEF_H |
7878 | 414k | 0U, // FMAX_ZPZI_UNDEF_S |
7879 | 414k | 0U, // FMAX_ZPZI_ZERO_D |
7880 | 414k | 0U, // FMAX_ZPZI_ZERO_H |
7881 | 414k | 0U, // FMAX_ZPZI_ZERO_S |
7882 | 414k | 0U, // FMAX_ZPZZ_UNDEF_D |
7883 | 414k | 0U, // FMAX_ZPZZ_UNDEF_H |
7884 | 414k | 0U, // FMAX_ZPZZ_UNDEF_S |
7885 | 414k | 0U, // FMAX_ZPZZ_ZERO_D |
7886 | 414k | 0U, // FMAX_ZPZZ_ZERO_H |
7887 | 414k | 0U, // FMAX_ZPZZ_ZERO_S |
7888 | 414k | 0U, // FMINNM_ZPZI_UNDEF_D |
7889 | 414k | 0U, // FMINNM_ZPZI_UNDEF_H |
7890 | 414k | 0U, // FMINNM_ZPZI_UNDEF_S |
7891 | 414k | 0U, // FMINNM_ZPZI_ZERO_D |
7892 | 414k | 0U, // FMINNM_ZPZI_ZERO_H |
7893 | 414k | 0U, // FMINNM_ZPZI_ZERO_S |
7894 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_D |
7895 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_H |
7896 | 414k | 0U, // FMINNM_ZPZZ_UNDEF_S |
7897 | 414k | 0U, // FMINNM_ZPZZ_ZERO_D |
7898 | 414k | 0U, // FMINNM_ZPZZ_ZERO_H |
7899 | 414k | 0U, // FMINNM_ZPZZ_ZERO_S |
7900 | 414k | 0U, // FMIN_ZPZI_UNDEF_D |
7901 | 414k | 0U, // FMIN_ZPZI_UNDEF_H |
7902 | 414k | 0U, // FMIN_ZPZI_UNDEF_S |
7903 | 414k | 0U, // FMIN_ZPZI_ZERO_D |
7904 | 414k | 0U, // FMIN_ZPZI_ZERO_H |
7905 | 414k | 0U, // FMIN_ZPZI_ZERO_S |
7906 | 414k | 0U, // FMIN_ZPZZ_UNDEF_D |
7907 | 414k | 0U, // FMIN_ZPZZ_UNDEF_H |
7908 | 414k | 0U, // FMIN_ZPZZ_UNDEF_S |
7909 | 414k | 0U, // FMIN_ZPZZ_ZERO_D |
7910 | 414k | 0U, // FMIN_ZPZZ_ZERO_H |
7911 | 414k | 0U, // FMIN_ZPZZ_ZERO_S |
7912 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_D |
7913 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_H |
7914 | 414k | 0U, // FMLA_ZPZZZ_UNDEF_S |
7915 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_D |
7916 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_H |
7917 | 414k | 0U, // FMLS_ZPZZZ_UNDEF_S |
7918 | 414k | 0U, // FMOVD0 |
7919 | 414k | 0U, // FMOVH0 |
7920 | 414k | 0U, // FMOVS0 |
7921 | 414k | 0U, // FMULX_ZPZZ_ZERO_D |
7922 | 414k | 0U, // FMULX_ZPZZ_ZERO_H |
7923 | 414k | 0U, // FMULX_ZPZZ_ZERO_S |
7924 | 414k | 0U, // FMUL_ZPZI_UNDEF_D |
7925 | 414k | 0U, // FMUL_ZPZI_UNDEF_H |
7926 | 414k | 0U, // FMUL_ZPZI_UNDEF_S |
7927 | 414k | 0U, // FMUL_ZPZI_ZERO_D |
7928 | 414k | 0U, // FMUL_ZPZI_ZERO_H |
7929 | 414k | 0U, // FMUL_ZPZI_ZERO_S |
7930 | 414k | 0U, // FMUL_ZPZZ_UNDEF_D |
7931 | 414k | 0U, // FMUL_ZPZZ_UNDEF_H |
7932 | 414k | 0U, // FMUL_ZPZZ_UNDEF_S |
7933 | 414k | 0U, // FMUL_ZPZZ_ZERO_D |
7934 | 414k | 0U, // FMUL_ZPZZ_ZERO_H |
7935 | 414k | 0U, // FMUL_ZPZZ_ZERO_S |
7936 | 414k | 0U, // FNEG_ZPmZ_UNDEF_D |
7937 | 414k | 0U, // FNEG_ZPmZ_UNDEF_H |
7938 | 414k | 0U, // FNEG_ZPmZ_UNDEF_S |
7939 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_D |
7940 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_H |
7941 | 414k | 0U, // FNMLA_ZPZZZ_UNDEF_S |
7942 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_D |
7943 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_H |
7944 | 414k | 0U, // FNMLS_ZPZZZ_UNDEF_S |
7945 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_D |
7946 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_H |
7947 | 414k | 0U, // FRECPX_ZPmZ_UNDEF_S |
7948 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_D |
7949 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_H |
7950 | 414k | 0U, // FRINTA_ZPmZ_UNDEF_S |
7951 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_D |
7952 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_H |
7953 | 414k | 0U, // FRINTI_ZPmZ_UNDEF_S |
7954 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_D |
7955 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_H |
7956 | 414k | 0U, // FRINTM_ZPmZ_UNDEF_S |
7957 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_D |
7958 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_H |
7959 | 414k | 0U, // FRINTN_ZPmZ_UNDEF_S |
7960 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_D |
7961 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_H |
7962 | 414k | 0U, // FRINTP_ZPmZ_UNDEF_S |
7963 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_D |
7964 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_H |
7965 | 414k | 0U, // FRINTX_ZPmZ_UNDEF_S |
7966 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_D |
7967 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_H |
7968 | 414k | 0U, // FRINTZ_ZPmZ_UNDEF_S |
7969 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_D |
7970 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_H |
7971 | 414k | 0U, // FSQRT_ZPmZ_UNDEF_S |
7972 | 414k | 0U, // FSUBR_ZPZI_UNDEF_D |
7973 | 414k | 0U, // FSUBR_ZPZI_UNDEF_H |
7974 | 414k | 0U, // FSUBR_ZPZI_UNDEF_S |
7975 | 414k | 0U, // FSUBR_ZPZI_ZERO_D |
7976 | 414k | 0U, // FSUBR_ZPZI_ZERO_H |
7977 | 414k | 0U, // FSUBR_ZPZI_ZERO_S |
7978 | 414k | 0U, // FSUBR_ZPZZ_ZERO_D |
7979 | 414k | 0U, // FSUBR_ZPZZ_ZERO_H |
7980 | 414k | 0U, // FSUBR_ZPZZ_ZERO_S |
7981 | 414k | 0U, // FSUB_ZPZI_UNDEF_D |
7982 | 414k | 0U, // FSUB_ZPZI_UNDEF_H |
7983 | 414k | 0U, // FSUB_ZPZI_UNDEF_S |
7984 | 414k | 0U, // FSUB_ZPZI_ZERO_D |
7985 | 414k | 0U, // FSUB_ZPZI_ZERO_H |
7986 | 414k | 0U, // FSUB_ZPZI_ZERO_S |
7987 | 414k | 0U, // FSUB_ZPZZ_UNDEF_D |
7988 | 414k | 0U, // FSUB_ZPZZ_UNDEF_H |
7989 | 414k | 0U, // FSUB_ZPZZ_UNDEF_S |
7990 | 414k | 0U, // FSUB_ZPZZ_ZERO_D |
7991 | 414k | 0U, // FSUB_ZPZZ_ZERO_H |
7992 | 414k | 0U, // FSUB_ZPZZ_ZERO_S |
7993 | 414k | 0U, // GLD1B_D |
7994 | 414k | 0U, // GLD1B_D_IMM |
7995 | 414k | 0U, // GLD1B_D_SXTW |
7996 | 414k | 0U, // GLD1B_D_UXTW |
7997 | 414k | 0U, // GLD1B_S_IMM |
7998 | 414k | 0U, // GLD1B_S_SXTW |
7999 | 414k | 0U, // GLD1B_S_UXTW |
8000 | 414k | 0U, // GLD1D |
8001 | 414k | 0U, // GLD1D_IMM |
8002 | 414k | 0U, // GLD1D_SCALED |
8003 | 414k | 0U, // GLD1D_SXTW |
8004 | 414k | 0U, // GLD1D_SXTW_SCALED |
8005 | 414k | 0U, // GLD1D_UXTW |
8006 | 414k | 0U, // GLD1D_UXTW_SCALED |
8007 | 414k | 0U, // GLD1H_D |
8008 | 414k | 0U, // GLD1H_D_IMM |
8009 | 414k | 0U, // GLD1H_D_SCALED |
8010 | 414k | 0U, // GLD1H_D_SXTW |
8011 | 414k | 0U, // GLD1H_D_SXTW_SCALED |
8012 | 414k | 0U, // GLD1H_D_UXTW |
8013 | 414k | 0U, // GLD1H_D_UXTW_SCALED |
8014 | 414k | 0U, // GLD1H_S_IMM |
8015 | 414k | 0U, // GLD1H_S_SXTW |
8016 | 414k | 0U, // GLD1H_S_SXTW_SCALED |
8017 | 414k | 0U, // GLD1H_S_UXTW |
8018 | 414k | 0U, // GLD1H_S_UXTW_SCALED |
8019 | 414k | 0U, // GLD1SB_D |
8020 | 414k | 0U, // GLD1SB_D_IMM |
8021 | 414k | 0U, // GLD1SB_D_SXTW |
8022 | 414k | 0U, // GLD1SB_D_UXTW |
8023 | 414k | 0U, // GLD1SB_S_IMM |
8024 | 414k | 0U, // GLD1SB_S_SXTW |
8025 | 414k | 0U, // GLD1SB_S_UXTW |
8026 | 414k | 0U, // GLD1SH_D |
8027 | 414k | 0U, // GLD1SH_D_IMM |
8028 | 414k | 0U, // GLD1SH_D_SCALED |
8029 | 414k | 0U, // GLD1SH_D_SXTW |
8030 | 414k | 0U, // GLD1SH_D_SXTW_SCALED |
8031 | 414k | 0U, // GLD1SH_D_UXTW |
8032 | 414k | 0U, // GLD1SH_D_UXTW_SCALED |
8033 | 414k | 0U, // GLD1SH_S_IMM |
8034 | 414k | 0U, // GLD1SH_S_SXTW |
8035 | 414k | 0U, // GLD1SH_S_SXTW_SCALED |
8036 | 414k | 0U, // GLD1SH_S_UXTW |
8037 | 414k | 0U, // GLD1SH_S_UXTW_SCALED |
8038 | 414k | 0U, // GLD1SW_D |
8039 | 414k | 0U, // GLD1SW_D_IMM |
8040 | 414k | 0U, // GLD1SW_D_SCALED |
8041 | 414k | 0U, // GLD1SW_D_SXTW |
8042 | 414k | 0U, // GLD1SW_D_SXTW_SCALED |
8043 | 414k | 0U, // GLD1SW_D_UXTW |
8044 | 414k | 0U, // GLD1SW_D_UXTW_SCALED |
8045 | 414k | 0U, // GLD1W_D |
8046 | 414k | 0U, // GLD1W_D_IMM |
8047 | 414k | 0U, // GLD1W_D_SCALED |
8048 | 414k | 0U, // GLD1W_D_SXTW |
8049 | 414k | 0U, // GLD1W_D_SXTW_SCALED |
8050 | 414k | 0U, // GLD1W_D_UXTW |
8051 | 414k | 0U, // GLD1W_D_UXTW_SCALED |
8052 | 414k | 0U, // GLD1W_IMM |
8053 | 414k | 0U, // GLD1W_SXTW |
8054 | 414k | 0U, // GLD1W_SXTW_SCALED |
8055 | 414k | 0U, // GLD1W_UXTW |
8056 | 414k | 0U, // GLD1W_UXTW_SCALED |
8057 | 414k | 0U, // GLDFF1B_D |
8058 | 414k | 0U, // GLDFF1B_D_IMM |
8059 | 414k | 0U, // GLDFF1B_D_SXTW |
8060 | 414k | 0U, // GLDFF1B_D_UXTW |
8061 | 414k | 0U, // GLDFF1B_S_IMM |
8062 | 414k | 0U, // GLDFF1B_S_SXTW |
8063 | 414k | 0U, // GLDFF1B_S_UXTW |
8064 | 414k | 0U, // GLDFF1D |
8065 | 414k | 0U, // GLDFF1D_IMM |
8066 | 414k | 0U, // GLDFF1D_SCALED |
8067 | 414k | 0U, // GLDFF1D_SXTW |
8068 | 414k | 0U, // GLDFF1D_SXTW_SCALED |
8069 | 414k | 0U, // GLDFF1D_UXTW |
8070 | 414k | 0U, // GLDFF1D_UXTW_SCALED |
8071 | 414k | 0U, // GLDFF1H_D |
8072 | 414k | 0U, // GLDFF1H_D_IMM |
8073 | 414k | 0U, // GLDFF1H_D_SCALED |
8074 | 414k | 0U, // GLDFF1H_D_SXTW |
8075 | 414k | 0U, // GLDFF1H_D_SXTW_SCALED |
8076 | 414k | 0U, // GLDFF1H_D_UXTW |
8077 | 414k | 0U, // GLDFF1H_D_UXTW_SCALED |
8078 | 414k | 0U, // GLDFF1H_S_IMM |
8079 | 414k | 0U, // GLDFF1H_S_SXTW |
8080 | 414k | 0U, // GLDFF1H_S_SXTW_SCALED |
8081 | 414k | 0U, // GLDFF1H_S_UXTW |
8082 | 414k | 0U, // GLDFF1H_S_UXTW_SCALED |
8083 | 414k | 0U, // GLDFF1SB_D |
8084 | 414k | 0U, // GLDFF1SB_D_IMM |
8085 | 414k | 0U, // GLDFF1SB_D_SXTW |
8086 | 414k | 0U, // GLDFF1SB_D_UXTW |
8087 | 414k | 0U, // GLDFF1SB_S_IMM |
8088 | 414k | 0U, // GLDFF1SB_S_SXTW |
8089 | 414k | 0U, // GLDFF1SB_S_UXTW |
8090 | 414k | 0U, // GLDFF1SH_D |
8091 | 414k | 0U, // GLDFF1SH_D_IMM |
8092 | 414k | 0U, // GLDFF1SH_D_SCALED |
8093 | 414k | 0U, // GLDFF1SH_D_SXTW |
8094 | 414k | 0U, // GLDFF1SH_D_SXTW_SCALED |
8095 | 414k | 0U, // GLDFF1SH_D_UXTW |
8096 | 414k | 0U, // GLDFF1SH_D_UXTW_SCALED |
8097 | 414k | 0U, // GLDFF1SH_S_IMM |
8098 | 414k | 0U, // GLDFF1SH_S_SXTW |
8099 | 414k | 0U, // GLDFF1SH_S_SXTW_SCALED |
8100 | 414k | 0U, // GLDFF1SH_S_UXTW |
8101 | 414k | 0U, // GLDFF1SH_S_UXTW_SCALED |
8102 | 414k | 0U, // GLDFF1SW_D |
8103 | 414k | 0U, // GLDFF1SW_D_IMM |
8104 | 414k | 0U, // GLDFF1SW_D_SCALED |
8105 | 414k | 0U, // GLDFF1SW_D_SXTW |
8106 | 414k | 0U, // GLDFF1SW_D_SXTW_SCALED |
8107 | 414k | 0U, // GLDFF1SW_D_UXTW |
8108 | 414k | 0U, // GLDFF1SW_D_UXTW_SCALED |
8109 | 414k | 0U, // GLDFF1W_D |
8110 | 414k | 0U, // GLDFF1W_D_IMM |
8111 | 414k | 0U, // GLDFF1W_D_SCALED |
8112 | 414k | 0U, // GLDFF1W_D_SXTW |
8113 | 414k | 0U, // GLDFF1W_D_SXTW_SCALED |
8114 | 414k | 0U, // GLDFF1W_D_UXTW |
8115 | 414k | 0U, // GLDFF1W_D_UXTW_SCALED |
8116 | 414k | 0U, // GLDFF1W_IMM |
8117 | 414k | 0U, // GLDFF1W_SXTW |
8118 | 414k | 0U, // GLDFF1W_SXTW_SCALED |
8119 | 414k | 0U, // GLDFF1W_UXTW |
8120 | 414k | 0U, // GLDFF1W_UXTW_SCALED |
8121 | 414k | 0U, // G_ADD_LOW |
8122 | 414k | 0U, // G_DUP |
8123 | 414k | 0U, // G_DUPLANE16 |
8124 | 414k | 0U, // G_DUPLANE32 |
8125 | 414k | 0U, // G_DUPLANE64 |
8126 | 414k | 0U, // G_DUPLANE8 |
8127 | 414k | 0U, // G_EXT |
8128 | 414k | 0U, // G_FCMEQ |
8129 | 414k | 0U, // G_FCMEQZ |
8130 | 414k | 0U, // G_FCMGE |
8131 | 414k | 0U, // G_FCMGEZ |
8132 | 414k | 0U, // G_FCMGT |
8133 | 414k | 0U, // G_FCMGTZ |
8134 | 414k | 0U, // G_FCMLEZ |
8135 | 414k | 0U, // G_FCMLTZ |
8136 | 414k | 0U, // G_REV16 |
8137 | 414k | 0U, // G_REV32 |
8138 | 414k | 0U, // G_REV64 |
8139 | 414k | 0U, // G_SITOF |
8140 | 414k | 0U, // G_TRN1 |
8141 | 414k | 0U, // G_TRN2 |
8142 | 414k | 0U, // G_UITOF |
8143 | 414k | 0U, // G_UZP1 |
8144 | 414k | 0U, // G_UZP2 |
8145 | 414k | 0U, // G_VASHR |
8146 | 414k | 0U, // G_VLSHR |
8147 | 414k | 0U, // G_ZIP1 |
8148 | 414k | 0U, // G_ZIP2 |
8149 | 414k | 0U, // HOM_Epilog |
8150 | 414k | 0U, // HOM_Prolog |
8151 | 414k | 0U, // HWASAN_CHECK_MEMACCESS |
8152 | 414k | 0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES |
8153 | 414k | 0U, // IRGstack |
8154 | 414k | 0U, // JumpTableDest16 |
8155 | 414k | 0U, // JumpTableDest32 |
8156 | 414k | 0U, // JumpTableDest8 |
8157 | 414k | 0U, // LD1B_D_IMM |
8158 | 414k | 0U, // LD1B_H_IMM |
8159 | 414k | 0U, // LD1B_IMM |
8160 | 414k | 0U, // LD1B_S_IMM |
8161 | 414k | 0U, // LD1D_IMM |
8162 | 414k | 0U, // LD1H_D_IMM |
8163 | 414k | 0U, // LD1H_IMM |
8164 | 414k | 0U, // LD1H_S_IMM |
8165 | 414k | 0U, // LD1SB_D_IMM |
8166 | 414k | 0U, // LD1SB_H_IMM |
8167 | 414k | 0U, // LD1SB_S_IMM |
8168 | 414k | 0U, // LD1SH_D_IMM |
8169 | 414k | 0U, // LD1SH_S_IMM |
8170 | 414k | 0U, // LD1SW_D_IMM |
8171 | 414k | 0U, // LD1W_D_IMM |
8172 | 414k | 0U, // LD1W_IMM |
8173 | 414k | 0U, // LDFF1B |
8174 | 414k | 0U, // LDFF1B_D |
8175 | 414k | 0U, // LDFF1B_H |
8176 | 414k | 0U, // LDFF1B_S |
8177 | 414k | 0U, // LDFF1D |
8178 | 414k | 0U, // LDFF1H |
8179 | 414k | 0U, // LDFF1H_D |
8180 | 414k | 0U, // LDFF1H_S |
8181 | 414k | 0U, // LDFF1SB_D |
8182 | 414k | 0U, // LDFF1SB_H |
8183 | 414k | 0U, // LDFF1SB_S |
8184 | 414k | 0U, // LDFF1SH_D |
8185 | 414k | 0U, // LDFF1SH_S |
8186 | 414k | 0U, // LDFF1SW_D |
8187 | 414k | 0U, // LDFF1W |
8188 | 414k | 0U, // LDFF1W_D |
8189 | 414k | 0U, // LDNF1B_D_IMM |
8190 | 414k | 0U, // LDNF1B_H_IMM |
8191 | 414k | 0U, // LDNF1B_IMM |
8192 | 414k | 0U, // LDNF1B_S_IMM |
8193 | 414k | 0U, // LDNF1D_IMM |
8194 | 414k | 0U, // LDNF1H_D_IMM |
8195 | 414k | 0U, // LDNF1H_IMM |
8196 | 414k | 0U, // LDNF1H_S_IMM |
8197 | 414k | 0U, // LDNF1SB_D_IMM |
8198 | 414k | 0U, // LDNF1SB_H_IMM |
8199 | 414k | 0U, // LDNF1SB_S_IMM |
8200 | 414k | 0U, // LDNF1SH_D_IMM |
8201 | 414k | 0U, // LDNF1SH_S_IMM |
8202 | 414k | 0U, // LDNF1SW_D_IMM |
8203 | 414k | 0U, // LDNF1W_D_IMM |
8204 | 414k | 0U, // LDNF1W_IMM |
8205 | 414k | 0U, // LDR_ZZXI |
8206 | 414k | 0U, // LDR_ZZZXI |
8207 | 414k | 0U, // LDR_ZZZZXI |
8208 | 414k | 0U, // LOADgot |
8209 | 414k | 0U, // LSL_ZPZI_UNDEF_B |
8210 | 414k | 0U, // LSL_ZPZI_UNDEF_D |
8211 | 414k | 0U, // LSL_ZPZI_UNDEF_H |
8212 | 414k | 0U, // LSL_ZPZI_UNDEF_S |
8213 | 414k | 0U, // LSL_ZPZZ_UNDEF_B |
8214 | 414k | 0U, // LSL_ZPZZ_UNDEF_D |
8215 | 414k | 0U, // LSL_ZPZZ_UNDEF_H |
8216 | 414k | 0U, // LSL_ZPZZ_UNDEF_S |
8217 | 414k | 0U, // LSL_ZPZZ_ZERO_B |
8218 | 414k | 0U, // LSL_ZPZZ_ZERO_D |
8219 | 414k | 0U, // LSL_ZPZZ_ZERO_H |
8220 | 414k | 0U, // LSL_ZPZZ_ZERO_S |
8221 | 414k | 0U, // LSR_ZPZI_UNDEF_B |
8222 | 414k | 0U, // LSR_ZPZI_UNDEF_D |
8223 | 414k | 0U, // LSR_ZPZI_UNDEF_H |
8224 | 414k | 0U, // LSR_ZPZI_UNDEF_S |
8225 | 414k | 0U, // LSR_ZPZZ_UNDEF_B |
8226 | 414k | 0U, // LSR_ZPZZ_UNDEF_D |
8227 | 414k | 0U, // LSR_ZPZZ_UNDEF_H |
8228 | 414k | 0U, // LSR_ZPZZ_UNDEF_S |
8229 | 414k | 0U, // LSR_ZPZZ_ZERO_B |
8230 | 414k | 0U, // LSR_ZPZZ_ZERO_D |
8231 | 414k | 0U, // LSR_ZPZZ_ZERO_H |
8232 | 414k | 0U, // LSR_ZPZZ_ZERO_S |
8233 | 414k | 0U, // MOPSMemoryCopyPseudo |
8234 | 414k | 0U, // MOPSMemoryMovePseudo |
8235 | 414k | 0U, // MOPSMemorySetPseudo |
8236 | 414k | 0U, // MOPSMemorySetTaggingPseudo |
8237 | 414k | 0U, // MOVMCSym |
8238 | 414k | 0U, // MOVaddr |
8239 | 414k | 0U, // MOVaddrBA |
8240 | 414k | 0U, // MOVaddrCP |
8241 | 414k | 0U, // MOVaddrEXT |
8242 | 414k | 0U, // MOVaddrJT |
8243 | 414k | 0U, // MOVaddrTLS |
8244 | 414k | 0U, // MOVbaseTLS |
8245 | 414k | 0U, // MOVi32imm |
8246 | 414k | 0U, // MOVi64imm |
8247 | 414k | 0U, // MUL_ZPZZ_UNDEF_B |
8248 | 414k | 0U, // MUL_ZPZZ_UNDEF_D |
8249 | 414k | 0U, // MUL_ZPZZ_UNDEF_H |
8250 | 414k | 0U, // MUL_ZPZZ_UNDEF_S |
8251 | 414k | 0U, // NEG_ZPmZ_UNDEF_B |
8252 | 414k | 0U, // NEG_ZPmZ_UNDEF_D |
8253 | 414k | 0U, // NEG_ZPmZ_UNDEF_H |
8254 | 414k | 0U, // NEG_ZPmZ_UNDEF_S |
8255 | 414k | 0U, // NOT_ZPmZ_UNDEF_B |
8256 | 414k | 0U, // NOT_ZPmZ_UNDEF_D |
8257 | 414k | 0U, // NOT_ZPmZ_UNDEF_H |
8258 | 414k | 0U, // NOT_ZPmZ_UNDEF_S |
8259 | 414k | 0U, // ORNWrr |
8260 | 414k | 0U, // ORNXrr |
8261 | 414k | 0U, // ORRWrr |
8262 | 414k | 0U, // ORRXrr |
8263 | 414k | 0U, // RDFFR_P |
8264 | 414k | 0U, // RDFFR_PPz |
8265 | 414k | 0U, // RET_ReallyLR |
8266 | 414k | 0U, // SABD_ZPZZ_UNDEF_B |
8267 | 414k | 0U, // SABD_ZPZZ_UNDEF_D |
8268 | 414k | 0U, // SABD_ZPZZ_UNDEF_H |
8269 | 414k | 0U, // SABD_ZPZZ_UNDEF_S |
8270 | 414k | 0U, // SCVTF_ZPmZ_DtoD_UNDEF |
8271 | 414k | 0U, // SCVTF_ZPmZ_DtoH_UNDEF |
8272 | 414k | 0U, // SCVTF_ZPmZ_DtoS_UNDEF |
8273 | 414k | 0U, // SCVTF_ZPmZ_HtoH_UNDEF |
8274 | 414k | 0U, // SCVTF_ZPmZ_StoD_UNDEF |
8275 | 414k | 0U, // SCVTF_ZPmZ_StoH_UNDEF |
8276 | 414k | 0U, // SCVTF_ZPmZ_StoS_UNDEF |
8277 | 414k | 0U, // SDIV_ZPZZ_UNDEF_D |
8278 | 414k | 0U, // SDIV_ZPZZ_UNDEF_S |
8279 | 414k | 0U, // SEH_AddFP |
8280 | 414k | 0U, // SEH_EpilogEnd |
8281 | 414k | 0U, // SEH_EpilogStart |
8282 | 414k | 0U, // SEH_Nop |
8283 | 414k | 0U, // SEH_PrologEnd |
8284 | 414k | 0U, // SEH_SaveFPLR |
8285 | 414k | 0U, // SEH_SaveFPLR_X |
8286 | 414k | 0U, // SEH_SaveFReg |
8287 | 414k | 0U, // SEH_SaveFRegP |
8288 | 414k | 0U, // SEH_SaveFRegP_X |
8289 | 414k | 0U, // SEH_SaveFReg_X |
8290 | 414k | 0U, // SEH_SaveReg |
8291 | 414k | 0U, // SEH_SaveRegP |
8292 | 414k | 0U, // SEH_SaveRegP_X |
8293 | 414k | 0U, // SEH_SaveReg_X |
8294 | 414k | 0U, // SEH_SetFP |
8295 | 414k | 0U, // SEH_StackAlloc |
8296 | 414k | 0U, // SMAX_ZPZZ_UNDEF_B |
8297 | 414k | 0U, // SMAX_ZPZZ_UNDEF_D |
8298 | 414k | 0U, // SMAX_ZPZZ_UNDEF_H |
8299 | 414k | 0U, // SMAX_ZPZZ_UNDEF_S |
8300 | 414k | 0U, // SMIN_ZPZZ_UNDEF_B |
8301 | 414k | 0U, // SMIN_ZPZZ_UNDEF_D |
8302 | 414k | 0U, // SMIN_ZPZZ_UNDEF_H |
8303 | 414k | 0U, // SMIN_ZPZZ_UNDEF_S |
8304 | 414k | 0U, // SMULH_ZPZZ_UNDEF_B |
8305 | 414k | 0U, // SMULH_ZPZZ_UNDEF_D |
8306 | 414k | 0U, // SMULH_ZPZZ_UNDEF_H |
8307 | 414k | 0U, // SMULH_ZPZZ_UNDEF_S |
8308 | 414k | 0U, // SPACE |
8309 | 414k | 0U, // SQABS_ZPmZ_UNDEF_B |
8310 | 414k | 0U, // SQABS_ZPmZ_UNDEF_D |
8311 | 414k | 0U, // SQABS_ZPmZ_UNDEF_H |
8312 | 414k | 0U, // SQABS_ZPmZ_UNDEF_S |
8313 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_B |
8314 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_D |
8315 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_H |
8316 | 414k | 0U, // SQNEG_ZPmZ_UNDEF_S |
8317 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_B |
8318 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_D |
8319 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_H |
8320 | 414k | 0U, // SQRSHL_ZPZZ_UNDEF_S |
8321 | 414k | 0U, // SQSHLU_ZPZI_ZERO_B |
8322 | 414k | 0U, // SQSHLU_ZPZI_ZERO_D |
8323 | 414k | 0U, // SQSHLU_ZPZI_ZERO_H |
8324 | 414k | 0U, // SQSHLU_ZPZI_ZERO_S |
8325 | 414k | 0U, // SQSHL_ZPZI_ZERO_B |
8326 | 414k | 0U, // SQSHL_ZPZI_ZERO_D |
8327 | 414k | 0U, // SQSHL_ZPZI_ZERO_H |
8328 | 414k | 0U, // SQSHL_ZPZI_ZERO_S |
8329 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_B |
8330 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_D |
8331 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_H |
8332 | 414k | 0U, // SQSHL_ZPZZ_UNDEF_S |
8333 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_B |
8334 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_D |
8335 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_H |
8336 | 414k | 0U, // SRSHL_ZPZZ_UNDEF_S |
8337 | 414k | 0U, // SRSHR_ZPZI_ZERO_B |
8338 | 414k | 0U, // SRSHR_ZPZI_ZERO_D |
8339 | 414k | 0U, // SRSHR_ZPZI_ZERO_H |
8340 | 414k | 0U, // SRSHR_ZPZI_ZERO_S |
8341 | 414k | 0U, // STGloop |
8342 | 414k | 0U, // STGloop_wback |
8343 | 414k | 0U, // STR_ZZXI |
8344 | 414k | 0U, // STR_ZZZXI |
8345 | 414k | 0U, // STR_ZZZZXI |
8346 | 414k | 0U, // STZGloop |
8347 | 414k | 0U, // STZGloop_wback |
8348 | 414k | 0U, // SUBR_ZPZZ_ZERO_B |
8349 | 414k | 0U, // SUBR_ZPZZ_ZERO_D |
8350 | 414k | 0U, // SUBR_ZPZZ_ZERO_H |
8351 | 414k | 0U, // SUBR_ZPZZ_ZERO_S |
8352 | 414k | 0U, // SUBSWrr |
8353 | 414k | 0U, // SUBSXrr |
8354 | 414k | 0U, // SUBWrr |
8355 | 414k | 0U, // SUBXrr |
8356 | 414k | 0U, // SUB_ZPZZ_UNDEF_B |
8357 | 414k | 0U, // SUB_ZPZZ_UNDEF_D |
8358 | 414k | 0U, // SUB_ZPZZ_UNDEF_H |
8359 | 414k | 0U, // SUB_ZPZZ_UNDEF_S |
8360 | 414k | 0U, // SUB_ZPZZ_ZERO_B |
8361 | 414k | 0U, // SUB_ZPZZ_ZERO_D |
8362 | 414k | 0U, // SUB_ZPZZ_ZERO_H |
8363 | 414k | 0U, // SUB_ZPZZ_ZERO_S |
8364 | 414k | 0U, // SXTB_ZPmZ_UNDEF_D |
8365 | 414k | 0U, // SXTB_ZPmZ_UNDEF_H |
8366 | 414k | 0U, // SXTB_ZPmZ_UNDEF_S |
8367 | 414k | 0U, // SXTH_ZPmZ_UNDEF_D |
8368 | 414k | 0U, // SXTH_ZPmZ_UNDEF_S |
8369 | 414k | 0U, // SXTW_ZPmZ_UNDEF_D |
8370 | 414k | 0U, // SpeculationBarrierISBDSBEndBB |
8371 | 414k | 0U, // SpeculationBarrierSBEndBB |
8372 | 414k | 0U, // SpeculationSafeValueW |
8373 | 414k | 0U, // SpeculationSafeValueX |
8374 | 414k | 0U, // StoreSwiftAsyncContext |
8375 | 414k | 0U, // TAGPstack |
8376 | 414k | 0U, // TCRETURNdi |
8377 | 414k | 0U, // TCRETURNri |
8378 | 414k | 0U, // TCRETURNriALL |
8379 | 414k | 0U, // TCRETURNriBTI |
8380 | 414k | 0U, // TLSDESCCALL |
8381 | 414k | 0U, // TLSDESC_CALLSEQ |
8382 | 414k | 0U, // UABD_ZPZZ_UNDEF_B |
8383 | 414k | 0U, // UABD_ZPZZ_UNDEF_D |
8384 | 414k | 0U, // UABD_ZPZZ_UNDEF_H |
8385 | 414k | 0U, // UABD_ZPZZ_UNDEF_S |
8386 | 414k | 0U, // UCVTF_ZPmZ_DtoD_UNDEF |
8387 | 414k | 0U, // UCVTF_ZPmZ_DtoH_UNDEF |
8388 | 414k | 0U, // UCVTF_ZPmZ_DtoS_UNDEF |
8389 | 414k | 0U, // UCVTF_ZPmZ_HtoH_UNDEF |
8390 | 414k | 0U, // UCVTF_ZPmZ_StoD_UNDEF |
8391 | 414k | 0U, // UCVTF_ZPmZ_StoH_UNDEF |
8392 | 414k | 0U, // UCVTF_ZPmZ_StoS_UNDEF |
8393 | 414k | 0U, // UDIV_ZPZZ_UNDEF_D |
8394 | 414k | 0U, // UDIV_ZPZZ_UNDEF_S |
8395 | 414k | 0U, // UMAX_ZPZZ_UNDEF_B |
8396 | 414k | 0U, // UMAX_ZPZZ_UNDEF_D |
8397 | 414k | 0U, // UMAX_ZPZZ_UNDEF_H |
8398 | 414k | 0U, // UMAX_ZPZZ_UNDEF_S |
8399 | 414k | 0U, // UMIN_ZPZZ_UNDEF_B |
8400 | 414k | 0U, // UMIN_ZPZZ_UNDEF_D |
8401 | 414k | 0U, // UMIN_ZPZZ_UNDEF_H |
8402 | 414k | 0U, // UMIN_ZPZZ_UNDEF_S |
8403 | 414k | 0U, // UMULH_ZPZZ_UNDEF_B |
8404 | 414k | 0U, // UMULH_ZPZZ_UNDEF_D |
8405 | 414k | 0U, // UMULH_ZPZZ_UNDEF_H |
8406 | 414k | 0U, // UMULH_ZPZZ_UNDEF_S |
8407 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_B |
8408 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_D |
8409 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_H |
8410 | 414k | 0U, // UQRSHL_ZPZZ_UNDEF_S |
8411 | 414k | 0U, // UQSHL_ZPZI_ZERO_B |
8412 | 414k | 0U, // UQSHL_ZPZI_ZERO_D |
8413 | 414k | 0U, // UQSHL_ZPZI_ZERO_H |
8414 | 414k | 0U, // UQSHL_ZPZI_ZERO_S |
8415 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_B |
8416 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_D |
8417 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_H |
8418 | 414k | 0U, // UQSHL_ZPZZ_UNDEF_S |
8419 | 414k | 0U, // URECPE_ZPmZ_UNDEF_S |
8420 | 414k | 0U, // URSHL_ZPZZ_UNDEF_B |
8421 | 414k | 0U, // URSHL_ZPZZ_UNDEF_D |
8422 | 414k | 0U, // URSHL_ZPZZ_UNDEF_H |
8423 | 414k | 0U, // URSHL_ZPZZ_UNDEF_S |
8424 | 414k | 0U, // URSHR_ZPZI_ZERO_B |
8425 | 414k | 0U, // URSHR_ZPZI_ZERO_D |
8426 | 414k | 0U, // URSHR_ZPZI_ZERO_H |
8427 | 414k | 0U, // URSHR_ZPZI_ZERO_S |
8428 | 414k | 0U, // URSQRTE_ZPmZ_UNDEF_S |
8429 | 414k | 0U, // UXTB_ZPmZ_UNDEF_D |
8430 | 414k | 0U, // UXTB_ZPmZ_UNDEF_H |
8431 | 414k | 0U, // UXTB_ZPmZ_UNDEF_S |
8432 | 414k | 0U, // UXTH_ZPmZ_UNDEF_D |
8433 | 414k | 0U, // UXTH_ZPmZ_UNDEF_S |
8434 | 414k | 0U, // UXTW_ZPmZ_UNDEF_D |
8435 | 414k | 0U, // ABS_ZPmZ_B |
8436 | 414k | 8U, // ABS_ZPmZ_D |
8437 | 414k | 0U, // ABS_ZPmZ_H |
8438 | 414k | 16U, // ABS_ZPmZ_S |
8439 | 414k | 24U, // ABSv16i8 |
8440 | 414k | 32U, // ABSv1i64 |
8441 | 414k | 40U, // ABSv2i32 |
8442 | 414k | 48U, // ABSv2i64 |
8443 | 414k | 56U, // ABSv4i16 |
8444 | 414k | 64U, // ABSv4i32 |
8445 | 414k | 72U, // ABSv8i16 |
8446 | 414k | 80U, // ABSv8i8 |
8447 | 414k | 1112U, // ADCLB_ZZZ_D |
8448 | 414k | 2136U, // ADCLB_ZZZ_S |
8449 | 414k | 1112U, // ADCLT_ZZZ_D |
8450 | 414k | 2136U, // ADCLT_ZZZ_S |
8451 | 414k | 3160U, // ADCSWr |
8452 | 414k | 3160U, // ADCSXr |
8453 | 414k | 3160U, // ADCWr |
8454 | 414k | 3160U, // ADCXr |
8455 | 414k | 135256U, // ADDG |
8456 | 414k | 0U, // ADDHA_MPPZ_D |
8457 | 414k | 0U, // ADDHA_MPPZ_S |
8458 | 414k | 5208U, // ADDHNB_ZZZ_B |
8459 | 414k | 96U, // ADDHNB_ZZZ_H |
8460 | 414k | 6232U, // ADDHNB_ZZZ_S |
8461 | 414k | 7256U, // ADDHNT_ZZZ_B |
8462 | 414k | 16U, // ADDHNT_ZZZ_H |
8463 | 414k | 1112U, // ADDHNT_ZZZ_S |
8464 | 414k | 270440U, // ADDHNv2i64_v2i32 |
8465 | 414k | 271464U, // ADDHNv2i64_v4i32 |
8466 | 414k | 401520U, // ADDHNv4i32_v4i16 |
8467 | 414k | 402544U, // ADDHNv4i32_v8i16 |
8468 | 414k | 533624U, // ADDHNv8i16_v16i8 |
8469 | 414k | 532600U, // ADDHNv8i16_v8i8 |
8470 | 414k | 3160U, // ADDPL_XXI |
8471 | 414k | 8530048U, // ADDP_ZPmZ_B |
8472 | 414k | 16914560U, // ADDP_ZPmZ_D |
8473 | 414k | 25832584U, // ADDP_ZPmZ_H |
8474 | 414k | 33697920U, // ADDP_ZPmZ_S |
8475 | 414k | 794768U, // ADDPv16i8 |
8476 | 414k | 925848U, // ADDPv2i32 |
8477 | 414k | 270440U, // ADDPv2i64 |
8478 | 414k | 48U, // ADDPv2i64p |
8479 | 414k | 1056928U, // ADDPv4i16 |
8480 | 414k | 401520U, // ADDPv4i32 |
8481 | 414k | 532600U, // ADDPv8i16 |
8482 | 414k | 1188008U, // ADDPv8i8 |
8483 | 414k | 13400U, // ADDSWri |
8484 | 414k | 14424U, // ADDSWrs |
8485 | 414k | 15448U, // ADDSWrx |
8486 | 414k | 13400U, // ADDSXri |
8487 | 414k | 14424U, // ADDSXrs |
8488 | 414k | 15448U, // ADDSXrx |
8489 | 414k | 1313880U, // ADDSXrx64 |
8490 | 414k | 0U, // ADDVA_MPPZ_D |
8491 | 414k | 0U, // ADDVA_MPPZ_S |
8492 | 414k | 3160U, // ADDVL_XXI |
8493 | 414k | 24U, // ADDVv16i8v |
8494 | 414k | 56U, // ADDVv4i16v |
8495 | 414k | 64U, // ADDVv4i32v |
8496 | 414k | 72U, // ADDVv8i16v |
8497 | 414k | 80U, // ADDVv8i8v |
8498 | 414k | 13400U, // ADDWri |
8499 | 414k | 14424U, // ADDWrs |
8500 | 414k | 15448U, // ADDWrx |
8501 | 414k | 13400U, // ADDXri |
8502 | 414k | 14424U, // ADDXrs |
8503 | 414k | 15448U, // ADDXrx |
8504 | 414k | 1313880U, // ADDXrx64 |
8505 | 414k | 16472U, // ADD_ZI_B |
8506 | 414k | 17496U, // ADD_ZI_D |
8507 | 414k | 176U, // ADD_ZI_H |
8508 | 414k | 18520U, // ADD_ZI_S |
8509 | 414k | 8530048U, // ADD_ZPmZ_B |
8510 | 414k | 16914560U, // ADD_ZPmZ_D |
8511 | 414k | 25832584U, // ADD_ZPmZ_H |
8512 | 414k | 33697920U, // ADD_ZPmZ_S |
8513 | 414k | 10328U, // ADD_ZZZ_B |
8514 | 414k | 6232U, // ADD_ZZZ_D |
8515 | 414k | 136U, // ADD_ZZZ_H |
8516 | 414k | 12376U, // ADD_ZZZ_S |
8517 | 414k | 794768U, // ADDv16i8 |
8518 | 414k | 3160U, // ADDv1i64 |
8519 | 414k | 925848U, // ADDv2i32 |
8520 | 414k | 270440U, // ADDv2i64 |
8521 | 414k | 1056928U, // ADDv4i16 |
8522 | 414k | 401520U, // ADDv4i32 |
8523 | 414k | 532600U, // ADDv8i16 |
8524 | 414k | 1188008U, // ADDv8i8 |
8525 | 414k | 32U, // ADR |
8526 | 414k | 1U, // ADRP |
8527 | 414k | 19544U, // ADR_LSL_ZZZ_D_0 |
8528 | 414k | 20568U, // ADR_LSL_ZZZ_D_1 |
8529 | 414k | 21592U, // ADR_LSL_ZZZ_D_2 |
8530 | 414k | 22616U, // ADR_LSL_ZZZ_D_3 |
8531 | 414k | 23640U, // ADR_LSL_ZZZ_S_0 |
8532 | 414k | 24664U, // ADR_LSL_ZZZ_S_1 |
8533 | 414k | 25688U, // ADR_LSL_ZZZ_S_2 |
8534 | 414k | 26712U, // ADR_LSL_ZZZ_S_3 |
8535 | 414k | 27736U, // ADR_SXTW_ZZZ_D_0 |
8536 | 414k | 28760U, // ADR_SXTW_ZZZ_D_1 |
8537 | 414k | 29784U, // ADR_SXTW_ZZZ_D_2 |
8538 | 414k | 30808U, // ADR_SXTW_ZZZ_D_3 |
8539 | 414k | 31832U, // ADR_UXTW_ZZZ_D_0 |
8540 | 414k | 32856U, // ADR_UXTW_ZZZ_D_1 |
8541 | 414k | 33880U, // ADR_UXTW_ZZZ_D_2 |
8542 | 414k | 34904U, // ADR_UXTW_ZZZ_D_3 |
8543 | 414k | 10328U, // AESD_ZZZ_B |
8544 | 414k | 24U, // AESDrr |
8545 | 414k | 10328U, // AESE_ZZZ_B |
8546 | 414k | 24U, // AESErr |
8547 | 414k | 32U, // AESIMC_ZZ_B |
8548 | 414k | 24U, // AESIMCrr |
8549 | 414k | 32U, // AESMC_ZZ_B |
8550 | 414k | 24U, // AESMCrr |
8551 | 414k | 35928U, // ANDSWri |
8552 | 414k | 14424U, // ANDSWrs |
8553 | 414k | 36952U, // ANDSXri |
8554 | 414k | 14424U, // ANDSXrs |
8555 | 414k | 8530104U, // ANDS_PPzPP |
8556 | 414k | 0U, // ANDV_VPZ_B |
8557 | 414k | 0U, // ANDV_VPZ_D |
8558 | 414k | 0U, // ANDV_VPZ_H |
8559 | 414k | 0U, // ANDV_VPZ_S |
8560 | 414k | 35928U, // ANDWri |
8561 | 414k | 14424U, // ANDWrs |
8562 | 414k | 36952U, // ANDXri |
8563 | 414k | 14424U, // ANDXrs |
8564 | 414k | 8530104U, // AND_PPzPP |
8565 | 414k | 36952U, // AND_ZI |
8566 | 414k | 8530048U, // AND_ZPmZ_B |
8567 | 414k | 16914560U, // AND_ZPmZ_D |
8568 | 414k | 25832584U, // AND_ZPmZ_H |
8569 | 414k | 33697920U, // AND_ZPmZ_S |
8570 | 414k | 6232U, // AND_ZZZ |
8571 | 414k | 794768U, // ANDv16i8 |
8572 | 414k | 1188008U, // ANDv8i8 |
8573 | 414k | 141440U, // ASRD_ZPmI_B |
8574 | 414k | 137344U, // ASRD_ZPmI_D |
8575 | 414k | 1453192U, // ASRD_ZPmI_H |
8576 | 414k | 143488U, // ASRD_ZPmI_S |
8577 | 414k | 8530048U, // ASRR_ZPmZ_B |
8578 | 414k | 16914560U, // ASRR_ZPmZ_D |
8579 | 414k | 25832584U, // ASRR_ZPmZ_H |
8580 | 414k | 33697920U, // ASRR_ZPmZ_S |
8581 | 414k | 3160U, // ASRVWr |
8582 | 414k | 3160U, // ASRVXr |
8583 | 414k | 16918656U, // ASR_WIDE_ZPmZ_B |
8584 | 414k | 1584264U, // ASR_WIDE_ZPmZ_H |
8585 | 414k | 16920704U, // ASR_WIDE_ZPmZ_S |
8586 | 414k | 6232U, // ASR_WIDE_ZZZ_B |
8587 | 414k | 192U, // ASR_WIDE_ZZZ_H |
8588 | 414k | 6232U, // ASR_WIDE_ZZZ_S |
8589 | 414k | 141440U, // ASR_ZPmI_B |
8590 | 414k | 137344U, // ASR_ZPmI_D |
8591 | 414k | 1453192U, // ASR_ZPmI_H |
8592 | 414k | 143488U, // ASR_ZPmI_S |
8593 | 414k | 8530048U, // ASR_ZPmZ_B |
8594 | 414k | 16914560U, // ASR_ZPmZ_D |
8595 | 414k | 25832584U, // ASR_ZPmZ_H |
8596 | 414k | 33697920U, // ASR_ZPmZ_S |
8597 | 414k | 3160U, // ASR_ZZI_B |
8598 | 414k | 3160U, // ASR_ZZI_D |
8599 | 414k | 200U, // ASR_ZZI_H |
8600 | 414k | 3160U, // ASR_ZZI_S |
8601 | 414k | 33U, // AUTDA |
8602 | 414k | 33U, // AUTDB |
8603 | 414k | 0U, // AUTDZA |
8604 | 414k | 0U, // AUTDZB |
8605 | 414k | 33U, // AUTIA |
8606 | 414k | 0U, // AUTIA1716 |
8607 | 414k | 0U, // AUTIASP |
8608 | 414k | 0U, // AUTIAZ |
8609 | 414k | 33U, // AUTIB |
8610 | 414k | 0U, // AUTIB1716 |
8611 | 414k | 0U, // AUTIBSP |
8612 | 414k | 0U, // AUTIBZ |
8613 | 414k | 0U, // AUTIZA |
8614 | 414k | 0U, // AUTIZB |
8615 | 414k | 0U, // AXFLAG |
8616 | 414k | 0U, // B |
8617 | 414k | 580526224U, // BCAX |
8618 | 414k | 16914520U, // BCAX_ZZZZ |
8619 | 414k | 0U, // BCcc |
8620 | 414k | 10328U, // BDEP_ZZZ_B |
8621 | 414k | 6232U, // BDEP_ZZZ_D |
8622 | 414k | 136U, // BDEP_ZZZ_H |
8623 | 414k | 12376U, // BDEP_ZZZ_S |
8624 | 414k | 10328U, // BEXT_ZZZ_B |
8625 | 414k | 6232U, // BEXT_ZZZ_D |
8626 | 414k | 136U, // BEXT_ZZZ_H |
8627 | 414k | 12376U, // BEXT_ZZZ_S |
8628 | 414k | 1844384U, // BF16DOTlanev4bf16 |
8629 | 414k | 1844344U, // BF16DOTlanev8bf16 |
8630 | 414k | 32U, // BFCVT |
8631 | 414k | 64U, // BFCVTN |
8632 | 414k | 64U, // BFCVTN2 |
8633 | 414k | 1U, // BFCVTNT_ZPmZ |
8634 | 414k | 1U, // BFCVT_ZPmZ |
8635 | 414k | 27139160U, // BFDOT_ZZI |
8636 | 414k | 7256U, // BFDOT_ZZZ |
8637 | 414k | 1057952U, // BFDOTv4bf16 |
8638 | 414k | 533624U, // BFDOTv8bf16 |
8639 | 414k | 533624U, // BFMLALB |
8640 | 414k | 52438136U, // BFMLALBIdx |
8641 | 414k | 533624U, // BFMLALT |
8642 | 414k | 52438136U, // BFMLALTIdx |
8643 | 414k | 533624U, // BFMMLA |
8644 | 414k | 27139160U, // BFMMLA_B_ZZI |
8645 | 414k | 7256U, // BFMMLA_B_ZZZ |
8646 | 414k | 27139160U, // BFMMLA_T_ZZI |
8647 | 414k | 7256U, // BFMMLA_T_ZZZ |
8648 | 414k | 7256U, // BFMMLA_ZZZ |
8649 | 414k | 58889305U, // BFMWri |
8650 | 414k | 58889305U, // BFMXri |
8651 | 414k | 10328U, // BGRP_ZZZ_B |
8652 | 414k | 6232U, // BGRP_ZZZ_D |
8653 | 414k | 136U, // BGRP_ZZZ_H |
8654 | 414k | 12376U, // BGRP_ZZZ_S |
8655 | 414k | 14424U, // BICSWrs |
8656 | 414k | 14424U, // BICSXrs |
8657 | 414k | 8530104U, // BICS_PPzPP |
8658 | 414k | 14424U, // BICWrs |
8659 | 414k | 14424U, // BICXrs |
8660 | 414k | 8530104U, // BIC_PPzPP |
8661 | 414k | 8530048U, // BIC_ZPmZ_B |
8662 | 414k | 16914560U, // BIC_ZPmZ_D |
8663 | 414k | 25832584U, // BIC_ZPmZ_H |
8664 | 414k | 33697920U, // BIC_ZPmZ_S |
8665 | 414k | 6232U, // BIC_ZZZ |
8666 | 414k | 794768U, // BICv16i8 |
8667 | 414k | 1U, // BICv2i32 |
8668 | 414k | 1U, // BICv4i16 |
8669 | 414k | 1U, // BICv4i32 |
8670 | 414k | 1U, // BICv8i16 |
8671 | 414k | 1188008U, // BICv8i8 |
8672 | 414k | 795792U, // BIFv16i8 |
8673 | 414k | 1189032U, // BIFv8i8 |
8674 | 414k | 795792U, // BITv16i8 |
8675 | 414k | 1189032U, // BITv8i8 |
8676 | 414k | 0U, // BL |
8677 | 414k | 0U, // BLR |
8678 | 414k | 32U, // BLRAA |
8679 | 414k | 0U, // BLRAAZ |
8680 | 414k | 32U, // BLRAB |
8681 | 414k | 0U, // BLRABZ |
8682 | 414k | 0U, // BR |
8683 | 414k | 32U, // BRAA |
8684 | 414k | 0U, // BRAAZ |
8685 | 414k | 32U, // BRAB |
8686 | 414k | 0U, // BRABZ |
8687 | 414k | 0U, // BRB_IALL |
8688 | 414k | 0U, // BRB_INJ |
8689 | 414k | 0U, // BRK |
8690 | 414k | 10424U, // BRKAS_PPzP |
8691 | 414k | 0U, // BRKA_PPmP |
8692 | 414k | 10424U, // BRKA_PPzP |
8693 | 414k | 10424U, // BRKBS_PPzP |
8694 | 414k | 0U, // BRKB_PPmP |
8695 | 414k | 10424U, // BRKB_PPzP |
8696 | 414k | 8530104U, // BRKNS_PPzP |
8697 | 414k | 8530104U, // BRKN_PPzP |
8698 | 414k | 8530104U, // BRKPAS_PPzPP |
8699 | 414k | 8530104U, // BRKPA_PPzPP |
8700 | 414k | 8530104U, // BRKPBS_PPzPP |
8701 | 414k | 8530104U, // BRKPB_PPzPP |
8702 | 414k | 16914520U, // BSL1N_ZZZZ |
8703 | 414k | 16914520U, // BSL2N_ZZZZ |
8704 | 414k | 16914520U, // BSL_ZZZZ |
8705 | 414k | 795792U, // BSLv16i8 |
8706 | 414k | 1189032U, // BSLv8i8 |
8707 | 414k | 0U, // Bcc |
8708 | 414k | 67250264U, // CADD_ZZI_B |
8709 | 414k | 67246168U, // CADD_ZZI_D |
8710 | 414k | 2239624U, // CADD_ZZI_H |
8711 | 414k | 67252312U, // CADD_ZZI_S |
8712 | 414k | 2397393U, // CASAB |
8713 | 414k | 2397393U, // CASAH |
8714 | 414k | 2397393U, // CASALB |
8715 | 414k | 2397393U, // CASALH |
8716 | 414k | 2397393U, // CASALW |
8717 | 414k | 2397393U, // CASALX |
8718 | 414k | 2397393U, // CASAW |
8719 | 414k | 2397393U, // CASAX |
8720 | 414k | 2397393U, // CASB |
8721 | 414k | 2397393U, // CASH |
8722 | 414k | 2397393U, // CASLB |
8723 | 414k | 2397393U, // CASLH |
8724 | 414k | 2397393U, // CASLW |
8725 | 414k | 2397393U, // CASLX |
8726 | 414k | 0U, // CASPALW |
8727 | 414k | 0U, // CASPALX |
8728 | 414k | 0U, // CASPAW |
8729 | 414k | 0U, // CASPAX |
8730 | 414k | 0U, // CASPLW |
8731 | 414k | 0U, // CASPLX |
8732 | 414k | 0U, // CASPW |
8733 | 414k | 0U, // CASPX |
8734 | 414k | 2397393U, // CASW |
8735 | 414k | 2397393U, // CASX |
8736 | 414k | 1U, // CBNZW |
8737 | 414k | 1U, // CBNZX |
8738 | 414k | 1U, // CBZW |
8739 | 414k | 1U, // CBZX |
8740 | 414k | 75631704U, // CCMNWi |
8741 | 414k | 75631704U, // CCMNWr |
8742 | 414k | 75631704U, // CCMNXi |
8743 | 414k | 75631704U, // CCMNXr |
8744 | 414k | 75631704U, // CCMPWi |
8745 | 414k | 75631704U, // CCMPWr |
8746 | 414k | 75631704U, // CCMPXi |
8747 | 414k | 75631704U, // CCMPXr |
8748 | 414k | 1159601240U, // CDOT_ZZZI_D |
8749 | 414k | 92444673U, // CDOT_ZZZI_S |
8750 | 414k | 100801624U, // CDOT_ZZZ_D |
8751 | 414k | 2501633U, // CDOT_ZZZ_S |
8752 | 414k | 0U, // CFINV |
8753 | 414k | 8522840U, // CLASTA_RPZ_B |
8754 | 414k | 16911448U, // CLASTA_RPZ_D |
8755 | 414k | 109186136U, // CLASTA_RPZ_H |
8756 | 414k | 33688664U, // CLASTA_RPZ_S |
8757 | 414k | 8522840U, // CLASTA_VPZ_B |
8758 | 414k | 16911448U, // CLASTA_VPZ_D |
8759 | 414k | 109186136U, // CLASTA_VPZ_H |
8760 | 414k | 33688664U, // CLASTA_VPZ_S |
8761 | 414k | 8530008U, // CLASTA_ZPZ_B |
8762 | 414k | 16914520U, // CLASTA_ZPZ_D |
8763 | 414k | 25832584U, // CLASTA_ZPZ_H |
8764 | 414k | 33697880U, // CLASTA_ZPZ_S |
8765 | 414k | 8522840U, // CLASTB_RPZ_B |
8766 | 414k | 16911448U, // CLASTB_RPZ_D |
8767 | 414k | 109186136U, // CLASTB_RPZ_H |
8768 | 414k | 33688664U, // CLASTB_RPZ_S |
8769 | 414k | 8522840U, // CLASTB_VPZ_B |
8770 | 414k | 16911448U, // CLASTB_VPZ_D |
8771 | 414k | 109186136U, // CLASTB_VPZ_H |
8772 | 414k | 33688664U, // CLASTB_VPZ_S |
8773 | 414k | 8530008U, // CLASTB_ZPZ_B |
8774 | 414k | 16914520U, // CLASTB_ZPZ_D |
8775 | 414k | 25832584U, // CLASTB_ZPZ_H |
8776 | 414k | 33697880U, // CLASTB_ZPZ_S |
8777 | 414k | 0U, // CLREX |
8778 | 414k | 32U, // CLSWr |
8779 | 414k | 32U, // CLSXr |
8780 | 414k | 0U, // CLS_ZPmZ_B |
8781 | 414k | 8U, // CLS_ZPmZ_D |
8782 | 414k | 0U, // CLS_ZPmZ_H |
8783 | 414k | 16U, // CLS_ZPmZ_S |
8784 | 414k | 24U, // CLSv16i8 |
8785 | 414k | 40U, // CLSv2i32 |
8786 | 414k | 56U, // CLSv4i16 |
8787 | 414k | 64U, // CLSv4i32 |
8788 | 414k | 72U, // CLSv8i16 |
8789 | 414k | 80U, // CLSv8i8 |
8790 | 414k | 32U, // CLZWr |
8791 | 414k | 32U, // CLZXr |
8792 | 414k | 0U, // CLZ_ZPmZ_B |
8793 | 414k | 8U, // CLZ_ZPmZ_D |
8794 | 414k | 0U, // CLZ_ZPmZ_H |
8795 | 414k | 16U, // CLZ_ZPmZ_S |
8796 | 414k | 24U, // CLZv16i8 |
8797 | 414k | 40U, // CLZv2i32 |
8798 | 414k | 56U, // CLZv4i16 |
8799 | 414k | 64U, // CLZv4i32 |
8800 | 414k | 72U, // CLZv8i16 |
8801 | 414k | 80U, // CLZv8i8 |
8802 | 414k | 794768U, // CMEQv16i8 |
8803 | 414k | 216U, // CMEQv16i8rz |
8804 | 414k | 3160U, // CMEQv1i64 |
8805 | 414k | 224U, // CMEQv1i64rz |
8806 | 414k | 925848U, // CMEQv2i32 |
8807 | 414k | 232U, // CMEQv2i32rz |
8808 | 414k | 270440U, // CMEQv2i64 |
8809 | 414k | 240U, // CMEQv2i64rz |
8810 | 414k | 1056928U, // CMEQv4i16 |
8811 | 414k | 248U, // CMEQv4i16rz |
8812 | 414k | 401520U, // CMEQv4i32 |
8813 | 414k | 256U, // CMEQv4i32rz |
8814 | 414k | 532600U, // CMEQv8i16 |
8815 | 414k | 264U, // CMEQv8i16rz |
8816 | 414k | 1188008U, // CMEQv8i8 |
8817 | 414k | 272U, // CMEQv8i8rz |
8818 | 414k | 794768U, // CMGEv16i8 |
8819 | 414k | 216U, // CMGEv16i8rz |
8820 | 414k | 3160U, // CMGEv1i64 |
8821 | 414k | 224U, // CMGEv1i64rz |
8822 | 414k | 925848U, // CMGEv2i32 |
8823 | 414k | 232U, // CMGEv2i32rz |
8824 | 414k | 270440U, // CMGEv2i64 |
8825 | 414k | 240U, // CMGEv2i64rz |
8826 | 414k | 1056928U, // CMGEv4i16 |
8827 | 414k | 248U, // CMGEv4i16rz |
8828 | 414k | 401520U, // CMGEv4i32 |
8829 | 414k | 256U, // CMGEv4i32rz |
8830 | 414k | 532600U, // CMGEv8i16 |
8831 | 414k | 264U, // CMGEv8i16rz |
8832 | 414k | 1188008U, // CMGEv8i8 |
8833 | 414k | 272U, // CMGEv8i8rz |
8834 | 414k | 794768U, // CMGTv16i8 |
8835 | 414k | 216U, // CMGTv16i8rz |
8836 | 414k | 3160U, // CMGTv1i64 |
8837 | 414k | 224U, // CMGTv1i64rz |
8838 | 414k | 925848U, // CMGTv2i32 |
8839 | 414k | 232U, // CMGTv2i32rz |
8840 | 414k | 270440U, // CMGTv2i64 |
8841 | 414k | 240U, // CMGTv2i64rz |
8842 | 414k | 1056928U, // CMGTv4i16 |
8843 | 414k | 248U, // CMGTv4i16rz |
8844 | 414k | 401520U, // CMGTv4i32 |
8845 | 414k | 256U, // CMGTv4i32rz |
8846 | 414k | 532600U, // CMGTv8i16 |
8847 | 414k | 264U, // CMGTv8i16rz |
8848 | 414k | 1188008U, // CMGTv8i8 |
8849 | 414k | 272U, // CMGTv8i8rz |
8850 | 414k | 794768U, // CMHIv16i8 |
8851 | 414k | 3160U, // CMHIv1i64 |
8852 | 414k | 925848U, // CMHIv2i32 |
8853 | 414k | 270440U, // CMHIv2i64 |
8854 | 414k | 1056928U, // CMHIv4i16 |
8855 | 414k | 401520U, // CMHIv4i32 |
8856 | 414k | 532600U, // CMHIv8i16 |
8857 | 414k | 1188008U, // CMHIv8i8 |
8858 | 414k | 794768U, // CMHSv16i8 |
8859 | 414k | 3160U, // CMHSv1i64 |
8860 | 414k | 925848U, // CMHSv2i32 |
8861 | 414k | 270440U, // CMHSv2i64 |
8862 | 414k | 1056928U, // CMHSv4i16 |
8863 | 414k | 401520U, // CMHSv4i32 |
8864 | 414k | 532600U, // CMHSv8i16 |
8865 | 414k | 1188008U, // CMHSv8i8 |
8866 | 414k | 92444952U, // CMLA_ZZZI_H |
8867 | 414k | 1159596120U, // CMLA_ZZZI_S |
8868 | 414k | 2501633U, // CMLA_ZZZ_B |
8869 | 414k | 100795480U, // CMLA_ZZZ_D |
8870 | 414k | 2501912U, // CMLA_ZZZ_H |
8871 | 414k | 100796504U, // CMLA_ZZZ_S |
8872 | 414k | 216U, // CMLEv16i8rz |
8873 | 414k | 224U, // CMLEv1i64rz |
8874 | 414k | 232U, // CMLEv2i32rz |
8875 | 414k | 240U, // CMLEv2i64rz |
8876 | 414k | 248U, // CMLEv4i16rz |
8877 | 414k | 256U, // CMLEv4i32rz |
8878 | 414k | 264U, // CMLEv8i16rz |
8879 | 414k | 272U, // CMLEv8i8rz |
8880 | 414k | 216U, // CMLTv16i8rz |
8881 | 414k | 224U, // CMLTv1i64rz |
8882 | 414k | 232U, // CMLTv2i32rz |
8883 | 414k | 240U, // CMLTv2i64rz |
8884 | 414k | 248U, // CMLTv4i16rz |
8885 | 414k | 256U, // CMLTv4i32rz |
8886 | 414k | 264U, // CMLTv8i16rz |
8887 | 414k | 272U, // CMLTv8i8rz |
8888 | 414k | 141496U, // CMPEQ_PPzZI_B |
8889 | 414k | 137400U, // CMPEQ_PPzZI_D |
8890 | 414k | 1453193U, // CMPEQ_PPzZI_H |
8891 | 414k | 143544U, // CMPEQ_PPzZI_S |
8892 | 414k | 8530104U, // CMPEQ_PPzZZ_B |
8893 | 414k | 16914616U, // CMPEQ_PPzZZ_D |
8894 | 414k | 25832585U, // CMPEQ_PPzZZ_H |
8895 | 414k | 33697976U, // CMPEQ_PPzZZ_S |
8896 | 414k | 16918712U, // CMPEQ_WIDE_PPzZZ_B |
8897 | 414k | 1584265U, // CMPEQ_WIDE_PPzZZ_H |
8898 | 414k | 16920760U, // CMPEQ_WIDE_PPzZZ_S |
8899 | 414k | 141496U, // CMPGE_PPzZI_B |
8900 | 414k | 137400U, // CMPGE_PPzZI_D |
8901 | 414k | 1453193U, // CMPGE_PPzZI_H |
8902 | 414k | 143544U, // CMPGE_PPzZI_S |
8903 | 414k | 8530104U, // CMPGE_PPzZZ_B |
8904 | 414k | 16914616U, // CMPGE_PPzZZ_D |
8905 | 414k | 25832585U, // CMPGE_PPzZZ_H |
8906 | 414k | 33697976U, // CMPGE_PPzZZ_S |
8907 | 414k | 16918712U, // CMPGE_WIDE_PPzZZ_B |
8908 | 414k | 1584265U, // CMPGE_WIDE_PPzZZ_H |
8909 | 414k | 16920760U, // CMPGE_WIDE_PPzZZ_S |
8910 | 414k | 141496U, // CMPGT_PPzZI_B |
8911 | 414k | 137400U, // CMPGT_PPzZI_D |
8912 | 414k | 1453193U, // CMPGT_PPzZI_H |
8913 | 414k | 143544U, // CMPGT_PPzZI_S |
8914 | 414k | 8530104U, // CMPGT_PPzZZ_B |
8915 | 414k | 16914616U, // CMPGT_PPzZZ_D |
8916 | 414k | 25832585U, // CMPGT_PPzZZ_H |
8917 | 414k | 33697976U, // CMPGT_PPzZZ_S |
8918 | 414k | 16918712U, // CMPGT_WIDE_PPzZZ_B |
8919 | 414k | 1584265U, // CMPGT_WIDE_PPzZZ_H |
8920 | 414k | 16920760U, // CMPGT_WIDE_PPzZZ_S |
8921 | 414k | 117582008U, // CMPHI_PPzZI_B |
8922 | 414k | 117577912U, // CMPHI_PPzZI_D |
8923 | 414k | 2632841U, // CMPHI_PPzZI_H |
8924 | 414k | 117584056U, // CMPHI_PPzZI_S |
8925 | 414k | 8530104U, // CMPHI_PPzZZ_B |
8926 | 414k | 16914616U, // CMPHI_PPzZZ_D |
8927 | 414k | 25832585U, // CMPHI_PPzZZ_H |
8928 | 414k | 33697976U, // CMPHI_PPzZZ_S |
8929 | 414k | 16918712U, // CMPHI_WIDE_PPzZZ_B |
8930 | 414k | 1584265U, // CMPHI_WIDE_PPzZZ_H |
8931 | 414k | 16920760U, // CMPHI_WIDE_PPzZZ_S |
8932 | 414k | 117582008U, // CMPHS_PPzZI_B |
8933 | 414k | 117577912U, // CMPHS_PPzZI_D |
8934 | 414k | 2632841U, // CMPHS_PPzZI_H |
8935 | 414k | 117584056U, // CMPHS_PPzZI_S |
8936 | 414k | 8530104U, // CMPHS_PPzZZ_B |
8937 | 414k | 16914616U, // CMPHS_PPzZZ_D |
8938 | 414k | 25832585U, // CMPHS_PPzZZ_H |
8939 | 414k | 33697976U, // CMPHS_PPzZZ_S |
8940 | 414k | 16918712U, // CMPHS_WIDE_PPzZZ_B |
8941 | 414k | 1584265U, // CMPHS_WIDE_PPzZZ_H |
8942 | 414k | 16920760U, // CMPHS_WIDE_PPzZZ_S |
8943 | 414k | 141496U, // CMPLE_PPzZI_B |
8944 | 414k | 137400U, // CMPLE_PPzZI_D |
8945 | 414k | 1453193U, // CMPLE_PPzZI_H |
8946 | 414k | 143544U, // CMPLE_PPzZI_S |
8947 | 414k | 16918712U, // CMPLE_WIDE_PPzZZ_B |
8948 | 414k | 1584265U, // CMPLE_WIDE_PPzZZ_H |
8949 | 414k | 16920760U, // CMPLE_WIDE_PPzZZ_S |
8950 | 414k | 117582008U, // CMPLO_PPzZI_B |
8951 | 414k | 117577912U, // CMPLO_PPzZI_D |
8952 | 414k | 2632841U, // CMPLO_PPzZI_H |
8953 | 414k | 117584056U, // CMPLO_PPzZI_S |
8954 | 414k | 16918712U, // CMPLO_WIDE_PPzZZ_B |
8955 | 414k | 1584265U, // CMPLO_WIDE_PPzZZ_H |
8956 | 414k | 16920760U, // CMPLO_WIDE_PPzZZ_S |
8957 | 414k | 117582008U, // CMPLS_PPzZI_B |
8958 | 414k | 117577912U, // CMPLS_PPzZI_D |
8959 | 414k | 2632841U, // CMPLS_PPzZI_H |
8960 | 414k | 117584056U, // CMPLS_PPzZI_S |
8961 | 414k | 16918712U, // CMPLS_WIDE_PPzZZ_B |
8962 | 414k | 1584265U, // CMPLS_WIDE_PPzZZ_H |
8963 | 414k | 16920760U, // CMPLS_WIDE_PPzZZ_S |
8964 | 414k | 141496U, // CMPLT_PPzZI_B |
8965 | 414k | 137400U, // CMPLT_PPzZI_D |
8966 | 414k | 1453193U, // CMPLT_PPzZI_H |
8967 | 414k | 143544U, // CMPLT_PPzZI_S |
8968 | 414k | 16918712U, // CMPLT_WIDE_PPzZZ_B |
8969 | 414k | 1584265U, // CMPLT_WIDE_PPzZZ_H |
8970 | 414k | 16920760U, // CMPLT_WIDE_PPzZZ_S |
8971 | 414k | 141496U, // CMPNE_PPzZI_B |
8972 | 414k | 137400U, // CMPNE_PPzZI_D |
8973 | 414k | 1453193U, // CMPNE_PPzZI_H |
8974 | 414k | 143544U, // CMPNE_PPzZI_S |
8975 | 414k | 8530104U, // CMPNE_PPzZZ_B |
8976 | 414k | 16914616U, // CMPNE_PPzZZ_D |
8977 | 414k | 25832585U, // CMPNE_PPzZZ_H |
8978 | 414k | 33697976U, // CMPNE_PPzZZ_S |
8979 | 414k | 16918712U, // CMPNE_WIDE_PPzZZ_B |
8980 | 414k | 1584265U, // CMPNE_WIDE_PPzZZ_H |
8981 | 414k | 16920760U, // CMPNE_WIDE_PPzZZ_S |
8982 | 414k | 794768U, // CMTSTv16i8 |
8983 | 414k | 3160U, // CMTSTv1i64 |
8984 | 414k | 925848U, // CMTSTv2i32 |
8985 | 414k | 270440U, // CMTSTv2i64 |
8986 | 414k | 1056928U, // CMTSTv4i16 |
8987 | 414k | 401520U, // CMTSTv4i32 |
8988 | 414k | 532600U, // CMTSTv8i16 |
8989 | 414k | 1188008U, // CMTSTv8i8 |
8990 | 414k | 0U, // CNOT_ZPmZ_B |
8991 | 414k | 8U, // CNOT_ZPmZ_D |
8992 | 414k | 0U, // CNOT_ZPmZ_H |
8993 | 414k | 16U, // CNOT_ZPmZ_S |
8994 | 414k | 289U, // CNTB_XPiI |
8995 | 414k | 289U, // CNTD_XPiI |
8996 | 414k | 289U, // CNTH_XPiI |
8997 | 414k | 10328U, // CNTP_XPP_B |
8998 | 414k | 6232U, // CNTP_XPP_D |
8999 | 414k | 5208U, // CNTP_XPP_H |
9000 | 414k | 12376U, // CNTP_XPP_S |
9001 | 414k | 289U, // CNTW_XPiI |
9002 | 414k | 0U, // CNT_ZPmZ_B |
9003 | 414k | 8U, // CNT_ZPmZ_D |
9004 | 414k | 0U, // CNT_ZPmZ_H |
9005 | 414k | 16U, // CNT_ZPmZ_S |
9006 | 414k | 24U, // CNTv16i8 |
9007 | 414k | 80U, // CNTv8i8 |
9008 | 414k | 6232U, // COMPACT_ZPZ_D |
9009 | 414k | 12376U, // COMPACT_ZPZ_S |
9010 | 414k | 0U, // CPYE |
9011 | 414k | 0U, // CPYEN |
9012 | 414k | 0U, // CPYERN |
9013 | 414k | 0U, // CPYERT |
9014 | 414k | 0U, // CPYERTN |
9015 | 414k | 0U, // CPYERTRN |
9016 | 414k | 0U, // CPYERTWN |
9017 | 414k | 0U, // CPYET |
9018 | 414k | 0U, // CPYETN |
9019 | 414k | 0U, // CPYETRN |
9020 | 414k | 0U, // CPYETWN |
9021 | 414k | 0U, // CPYEWN |
9022 | 414k | 0U, // CPYEWT |
9023 | 414k | 0U, // CPYEWTN |
9024 | 414k | 0U, // CPYEWTRN |
9025 | 414k | 0U, // CPYEWTWN |
9026 | 414k | 0U, // CPYFE |
9027 | 414k | 0U, // CPYFEN |
9028 | 414k | 0U, // CPYFERN |
9029 | 414k | 0U, // CPYFERT |
9030 | 414k | 0U, // CPYFERTN |
9031 | 414k | 0U, // CPYFERTRN |
9032 | 414k | 0U, // CPYFERTWN |
9033 | 414k | 0U, // CPYFET |
9034 | 414k | 0U, // CPYFETN |
9035 | 414k | 0U, // CPYFETRN |
9036 | 414k | 0U, // CPYFETWN |
9037 | 414k | 0U, // CPYFEWN |
9038 | 414k | 0U, // CPYFEWT |
9039 | 414k | 0U, // CPYFEWTN |
9040 | 414k | 0U, // CPYFEWTRN |
9041 | 414k | 0U, // CPYFEWTWN |
9042 | 414k | 0U, // CPYFM |
9043 | 414k | 0U, // CPYFMN |
9044 | 414k | 0U, // CPYFMRN |
9045 | 414k | 0U, // CPYFMRT |
9046 | 414k | 0U, // CPYFMRTN |
9047 | 414k | 0U, // CPYFMRTRN |
9048 | 414k | 0U, // CPYFMRTWN |
9049 | 414k | 0U, // CPYFMT |
9050 | 414k | 0U, // CPYFMTN |
9051 | 414k | 0U, // CPYFMTRN |
9052 | 414k | 0U, // CPYFMTWN |
9053 | 414k | 0U, // CPYFMWN |
9054 | 414k | 0U, // CPYFMWT |
9055 | 414k | 0U, // CPYFMWTN |
9056 | 414k | 0U, // CPYFMWTRN |
9057 | 414k | 0U, // CPYFMWTWN |
9058 | 414k | 0U, // CPYFP |
9059 | 414k | 0U, // CPYFPN |
9060 | 414k | 0U, // CPYFPRN |
9061 | 414k | 0U, // CPYFPRT |
9062 | 414k | 0U, // CPYFPRTN |
9063 | 414k | 0U, // CPYFPRTRN |
9064 | 414k | 0U, // CPYFPRTWN |
9065 | 414k | 0U, // CPYFPT |
9066 | 414k | 0U, // CPYFPTN |
9067 | 414k | 0U, // CPYFPTRN |
9068 | 414k | 0U, // CPYFPTWN |
9069 | 414k | 0U, // CPYFPWN |
9070 | 414k | 0U, // CPYFPWT |
9071 | 414k | 0U, // CPYFPWTN |
9072 | 414k | 0U, // CPYFPWTRN |
9073 | 414k | 0U, // CPYFPWTWN |
9074 | 414k | 0U, // CPYM |
9075 | 414k | 0U, // CPYMN |
9076 | 414k | 0U, // CPYMRN |
9077 | 414k | 0U, // CPYMRT |
9078 | 414k | 0U, // CPYMRTN |
9079 | 414k | 0U, // CPYMRTRN |
9080 | 414k | 0U, // CPYMRTWN |
9081 | 414k | 0U, // CPYMT |
9082 | 414k | 0U, // CPYMTN |
9083 | 414k | 0U, // CPYMTRN |
9084 | 414k | 0U, // CPYMTWN |
9085 | 414k | 0U, // CPYMWN |
9086 | 414k | 0U, // CPYMWT |
9087 | 414k | 0U, // CPYMWTN |
9088 | 414k | 0U, // CPYMWTRN |
9089 | 414k | 0U, // CPYMWTWN |
9090 | 414k | 0U, // CPYP |
9091 | 414k | 0U, // CPYPN |
9092 | 414k | 0U, // CPYPRN |
9093 | 414k | 0U, // CPYPRT |
9094 | 414k | 0U, // CPYPRTN |
9095 | 414k | 0U, // CPYPRTRN |
9096 | 414k | 0U, // CPYPRTWN |
9097 | 414k | 0U, // CPYPT |
9098 | 414k | 0U, // CPYPTN |
9099 | 414k | 0U, // CPYPTRN |
9100 | 414k | 0U, // CPYPTWN |
9101 | 414k | 0U, // CPYPWN |
9102 | 414k | 0U, // CPYPWT |
9103 | 414k | 0U, // CPYPWTN |
9104 | 414k | 0U, // CPYPWTRN |
9105 | 414k | 0U, // CPYPWTWN |
9106 | 414k | 296U, // CPY_ZPmI_B |
9107 | 414k | 304U, // CPY_ZPmI_D |
9108 | 414k | 1U, // CPY_ZPmI_H |
9109 | 414k | 312U, // CPY_ZPmI_S |
9110 | 414k | 320U, // CPY_ZPmR_B |
9111 | 414k | 320U, // CPY_ZPmR_D |
9112 | 414k | 1U, // CPY_ZPmR_H |
9113 | 414k | 320U, // CPY_ZPmR_S |
9114 | 414k | 320U, // CPY_ZPmV_B |
9115 | 414k | 320U, // CPY_ZPmV_D |
9116 | 414k | 1U, // CPY_ZPmV_H |
9117 | 414k | 320U, // CPY_ZPmV_S |
9118 | 414k | 40120U, // CPY_ZPzI_B |
9119 | 414k | 41144U, // CPY_ZPzI_D |
9120 | 414k | 329U, // CPY_ZPzI_H |
9121 | 414k | 42168U, // CPY_ZPzI_S |
9122 | 414k | 3160U, // CRC32Brr |
9123 | 414k | 3160U, // CRC32CBrr |
9124 | 414k | 3160U, // CRC32CHrr |
9125 | 414k | 3160U, // CRC32CWrr |
9126 | 414k | 3160U, // CRC32CXrr |
9127 | 414k | 3160U, // CRC32Hrr |
9128 | 414k | 3160U, // CRC32Wrr |
9129 | 414k | 3160U, // CRC32Xrr |
9130 | 414k | 75631704U, // CSELWr |
9131 | 414k | 75631704U, // CSELXr |
9132 | 414k | 75631704U, // CSINCWr |
9133 | 414k | 75631704U, // CSINCXr |
9134 | 414k | 75631704U, // CSINVWr |
9135 | 414k | 75631704U, // CSINVXr |
9136 | 414k | 75631704U, // CSNEGWr |
9137 | 414k | 75631704U, // CSNEGXr |
9138 | 414k | 32U, // CTERMEQ_WW |
9139 | 414k | 32U, // CTERMEQ_XX |
9140 | 414k | 32U, // CTERMNE_WW |
9141 | 414k | 32U, // CTERMNE_XX |
9142 | 414k | 0U, // DCPS1 |
9143 | 414k | 0U, // DCPS2 |
9144 | 414k | 0U, // DCPS3 |
9145 | 414k | 1U, // DECB_XPiI |
9146 | 414k | 1U, // DECD_XPiI |
9147 | 414k | 1U, // DECD_ZPiI |
9148 | 414k | 1U, // DECH_XPiI |
9149 | 414k | 0U, // DECH_ZPiI |
9150 | 414k | 32U, // DECP_XP_B |
9151 | 414k | 32U, // DECP_XP_D |
9152 | 414k | 32U, // DECP_XP_H |
9153 | 414k | 32U, // DECP_XP_S |
9154 | 414k | 32U, // DECP_ZP_D |
9155 | 414k | 0U, // DECP_ZP_H |
9156 | 414k | 32U, // DECP_ZP_S |
9157 | 414k | 1U, // DECW_XPiI |
9158 | 414k | 1U, // DECW_ZPiI |
9159 | 414k | 0U, // DMB |
9160 | 414k | 0U, // DRPS |
9161 | 414k | 0U, // DSB |
9162 | 414k | 0U, // DSBnXS |
9163 | 414k | 1U, // DUPM_ZI |
9164 | 414k | 1U, // DUP_ZI_B |
9165 | 414k | 1U, // DUP_ZI_D |
9166 | 414k | 0U, // DUP_ZI_H |
9167 | 414k | 1U, // DUP_ZI_S |
9168 | 414k | 32U, // DUP_ZR_B |
9169 | 414k | 32U, // DUP_ZR_D |
9170 | 414k | 0U, // DUP_ZR_H |
9171 | 414k | 32U, // DUP_ZR_S |
9172 | 414k | 336U, // DUP_ZZI_B |
9173 | 414k | 336U, // DUP_ZZI_D |
9174 | 414k | 1U, // DUP_ZZI_H |
9175 | 414k | 1U, // DUP_ZZI_Q |
9176 | 414k | 336U, // DUP_ZZI_S |
9177 | 414k | 43352U, // DUPi16 |
9178 | 414k | 43360U, // DUPi32 |
9179 | 414k | 43368U, // DUPi64 |
9180 | 414k | 43376U, // DUPi8 |
9181 | 414k | 32U, // DUPv16i8gpr |
9182 | 414k | 43376U, // DUPv16i8lane |
9183 | 414k | 32U, // DUPv2i32gpr |
9184 | 414k | 43360U, // DUPv2i32lane |
9185 | 414k | 32U, // DUPv2i64gpr |
9186 | 414k | 43368U, // DUPv2i64lane |
9187 | 414k | 32U, // DUPv4i16gpr |
9188 | 414k | 43352U, // DUPv4i16lane |
9189 | 414k | 32U, // DUPv4i32gpr |
9190 | 414k | 43360U, // DUPv4i32lane |
9191 | 414k | 32U, // DUPv8i16gpr |
9192 | 414k | 43352U, // DUPv8i16lane |
9193 | 414k | 32U, // DUPv8i8gpr |
9194 | 414k | 43376U, // DUPv8i8lane |
9195 | 414k | 14424U, // EONWrs |
9196 | 414k | 14424U, // EONXrs |
9197 | 414k | 580526224U, // EOR3 |
9198 | 414k | 16914520U, // EOR3_ZZZZ |
9199 | 414k | 1U, // EORBT_ZZZ_B |
9200 | 414k | 1112U, // EORBT_ZZZ_D |
9201 | 414k | 280U, // EORBT_ZZZ_H |
9202 | 414k | 2136U, // EORBT_ZZZ_S |
9203 | 414k | 8530104U, // EORS_PPzPP |
9204 | 414k | 1U, // EORTB_ZZZ_B |
9205 | 414k | 1112U, // EORTB_ZZZ_D |
9206 | 414k | 280U, // EORTB_ZZZ_H |
9207 | 414k | 2136U, // EORTB_ZZZ_S |
9208 | 414k | 0U, // EORV_VPZ_B |
9209 | 414k | 0U, // EORV_VPZ_D |
9210 | 414k | 0U, // EORV_VPZ_H |
9211 | 414k | 0U, // EORV_VPZ_S |
9212 | 414k | 35928U, // EORWri |
9213 | 414k | 14424U, // EORWrs |
9214 | 414k | 36952U, // EORXri |
9215 | 414k | 14424U, // EORXrs |
9216 | 414k | 8530104U, // EOR_PPzPP |
9217 | 414k | 36952U, // EOR_ZI |
9218 | 414k | 8530048U, // EOR_ZPmZ_B |
9219 | 414k | 16914560U, // EOR_ZPmZ_D |
9220 | 414k | 25832584U, // EOR_ZPmZ_H |
9221 | 414k | 33697920U, // EOR_ZPmZ_S |
9222 | 414k | 6232U, // EOR_ZZZ |
9223 | 414k | 794768U, // EORv16i8 |
9224 | 414k | 1188008U, // EORv8i8 |
9225 | 414k | 0U, // ERET |
9226 | 414k | 0U, // ERETAA |
9227 | 414k | 0U, // ERETAB |
9228 | 414k | 44160U, // EXTRACT_ZPMXI_H_B |
9229 | 414k | 44160U, // EXTRACT_ZPMXI_H_D |
9230 | 414k | 376U, // EXTRACT_ZPMXI_H_H |
9231 | 414k | 376U, // EXTRACT_ZPMXI_H_Q |
9232 | 414k | 44160U, // EXTRACT_ZPMXI_H_S |
9233 | 414k | 45184U, // EXTRACT_ZPMXI_V_B |
9234 | 414k | 45184U, // EXTRACT_ZPMXI_V_D |
9235 | 414k | 384U, // EXTRACT_ZPMXI_V_H |
9236 | 414k | 384U, // EXTRACT_ZPMXI_V_Q |
9237 | 414k | 45184U, // EXTRACT_ZPMXI_V_S |
9238 | 414k | 134232U, // EXTRWrri |
9239 | 414k | 134232U, // EXTRXrri |
9240 | 414k | 117581912U, // EXT_ZZI |
9241 | 414k | 394U, // EXT_ZZI_B |
9242 | 414k | 1712272U, // EXTv16i8 |
9243 | 414k | 2760872U, // EXTv8i8 |
9244 | 414k | 3160U, // FABD16 |
9245 | 414k | 3160U, // FABD32 |
9246 | 414k | 3160U, // FABD64 |
9247 | 414k | 16914560U, // FABD_ZPmZ_D |
9248 | 414k | 25832584U, // FABD_ZPmZ_H |
9249 | 414k | 33697920U, // FABD_ZPmZ_S |
9250 | 414k | 925848U, // FABDv2f32 |
9251 | 414k | 270440U, // FABDv2f64 |
9252 | 414k | 1056928U, // FABDv4f16 |
9253 | 414k | 401520U, // FABDv4f32 |
9254 | 414k | 532600U, // FABDv8f16 |
9255 | 414k | 32U, // FABSDr |
9256 | 414k | 32U, // FABSHr |
9257 | 414k | 32U, // FABSSr |
9258 | 414k | 8U, // FABS_ZPmZ_D |
9259 | 414k | 0U, // FABS_ZPmZ_H |
9260 | 414k | 16U, // FABS_ZPmZ_S |
9261 | 414k | 40U, // FABSv2f32 |
9262 | 414k | 48U, // FABSv2f64 |
9263 | 414k | 56U, // FABSv4f16 |
9264 | 414k | 64U, // FABSv4f32 |
9265 | 414k | 72U, // FABSv8f16 |
9266 | 414k | 3160U, // FACGE16 |
9267 | 414k | 3160U, // FACGE32 |
9268 | 414k | 3160U, // FACGE64 |
9269 | 414k | 16914616U, // FACGE_PPzZZ_D |
9270 | 414k | 25832585U, // FACGE_PPzZZ_H |
9271 | 414k | 33697976U, // FACGE_PPzZZ_S |
9272 | 414k | 925848U, // FACGEv2f32 |
9273 | 414k | 270440U, // FACGEv2f64 |
9274 | 414k | 1056928U, // FACGEv4f16 |
9275 | 414k | 401520U, // FACGEv4f32 |
9276 | 414k | 532600U, // FACGEv8f16 |
9277 | 414k | 3160U, // FACGT16 |
9278 | 414k | 3160U, // FACGT32 |
9279 | 414k | 3160U, // FACGT64 |
9280 | 414k | 16914616U, // FACGT_PPzZZ_D |
9281 | 414k | 25832585U, // FACGT_PPzZZ_H |
9282 | 414k | 33697976U, // FACGT_PPzZZ_S |
9283 | 414k | 925848U, // FACGTv2f32 |
9284 | 414k | 270440U, // FACGTv2f64 |
9285 | 414k | 1056928U, // FACGTv4f16 |
9286 | 414k | 401520U, // FACGTv4f32 |
9287 | 414k | 532600U, // FACGTv8f16 |
9288 | 414k | 0U, // FADDA_VPZ_D |
9289 | 414k | 280U, // FADDA_VPZ_H |
9290 | 414k | 0U, // FADDA_VPZ_S |
9291 | 414k | 3160U, // FADDDrr |
9292 | 414k | 3160U, // FADDHrr |
9293 | 414k | 16914560U, // FADDP_ZPmZZ_D |
9294 | 414k | 25832584U, // FADDP_ZPmZZ_H |
9295 | 414k | 33697920U, // FADDP_ZPmZZ_S |
9296 | 414k | 925848U, // FADDPv2f32 |
9297 | 414k | 270440U, // FADDPv2f64 |
9298 | 414k | 400U, // FADDPv2i16p |
9299 | 414k | 40U, // FADDPv2i32p |
9300 | 414k | 48U, // FADDPv2i64p |
9301 | 414k | 1056928U, // FADDPv4f16 |
9302 | 414k | 401520U, // FADDPv4f32 |
9303 | 414k | 532600U, // FADDPv8f16 |
9304 | 414k | 3160U, // FADDSrr |
9305 | 414k | 0U, // FADDV_VPZ_D |
9306 | 414k | 0U, // FADDV_VPZ_H |
9307 | 414k | 0U, // FADDV_VPZ_S |
9308 | 414k | 125966464U, // FADD_ZPmI_D |
9309 | 414k | 2894984U, // FADD_ZPmI_H |
9310 | 414k | 125972608U, // FADD_ZPmI_S |
9311 | 414k | 16914560U, // FADD_ZPmZ_D |
9312 | 414k | 25832584U, // FADD_ZPmZ_H |
9313 | 414k | 33697920U, // FADD_ZPmZ_S |
9314 | 414k | 6232U, // FADD_ZZZ_D |
9315 | 414k | 136U, // FADD_ZZZ_H |
9316 | 414k | 12376U, // FADD_ZZZ_S |
9317 | 414k | 925848U, // FADDv2f32 |
9318 | 414k | 270440U, // FADDv2f64 |
9319 | 414k | 1056928U, // FADDv4f16 |
9320 | 414k | 401520U, // FADDv4f32 |
9321 | 414k | 532600U, // FADDv8f16 |
9322 | 414k | 1627527296U, // FCADD_ZPmZ_D |
9323 | 414k | 2232036488U, // FCADD_ZPmZ_H |
9324 | 414k | 1644310656U, // FCADD_ZPmZ_S |
9325 | 414k | 70131864U, // FCADDv2f32 |
9326 | 414k | 70262888U, // FCADDv2f64 |
9327 | 414k | 70394016U, // FCADDv4f16 |
9328 | 414k | 70525040U, // FCADDv4f32 |
9329 | 414k | 70656120U, // FCADDv8f16 |
9330 | 414k | 75631704U, // FCCMPDrr |
9331 | 414k | 75631704U, // FCCMPEDrr |
9332 | 414k | 75631704U, // FCCMPEHrr |
9333 | 414k | 75631704U, // FCCMPESrr |
9334 | 414k | 75631704U, // FCCMPHrr |
9335 | 414k | 75631704U, // FCCMPSrr |
9336 | 414k | 3160U, // FCMEQ16 |
9337 | 414k | 3160U, // FCMEQ32 |
9338 | 414k | 3160U, // FCMEQ64 |
9339 | 414k | 3676344U, // FCMEQ_PPzZ0_D |
9340 | 414k | 46217U, // FCMEQ_PPzZ0_H |
9341 | 414k | 3682488U, // FCMEQ_PPzZ0_S |
9342 | 414k | 16914616U, // FCMEQ_PPzZZ_D |
9343 | 414k | 25832585U, // FCMEQ_PPzZZ_H |
9344 | 414k | 33697976U, // FCMEQ_PPzZZ_S |
9345 | 414k | 408U, // FCMEQv1i16rz |
9346 | 414k | 408U, // FCMEQv1i32rz |
9347 | 414k | 408U, // FCMEQv1i64rz |
9348 | 414k | 925848U, // FCMEQv2f32 |
9349 | 414k | 270440U, // FCMEQv2f64 |
9350 | 414k | 416U, // FCMEQv2i32rz |
9351 | 414k | 424U, // FCMEQv2i64rz |
9352 | 414k | 1056928U, // FCMEQv4f16 |
9353 | 414k | 401520U, // FCMEQv4f32 |
9354 | 414k | 432U, // FCMEQv4i16rz |
9355 | 414k | 440U, // FCMEQv4i32rz |
9356 | 414k | 532600U, // FCMEQv8f16 |
9357 | 414k | 448U, // FCMEQv8i16rz |
9358 | 414k | 3160U, // FCMGE16 |
9359 | 414k | 3160U, // FCMGE32 |
9360 | 414k | 3160U, // FCMGE64 |
9361 | 414k | 3676344U, // FCMGE_PPzZ0_D |
9362 | 414k | 46217U, // FCMGE_PPzZ0_H |
9363 | 414k | 3682488U, // FCMGE_PPzZ0_S |
9364 | 414k | 16914616U, // FCMGE_PPzZZ_D |
9365 | 414k | 25832585U, // FCMGE_PPzZZ_H |
9366 | 414k | 33697976U, // FCMGE_PPzZZ_S |
9367 | 414k | 408U, // FCMGEv1i16rz |
9368 | 414k | 408U, // FCMGEv1i32rz |
9369 | 414k | 408U, // FCMGEv1i64rz |
9370 | 414k | 925848U, // FCMGEv2f32 |
9371 | 414k | 270440U, // FCMGEv2f64 |
9372 | 414k | 416U, // FCMGEv2i32rz |
9373 | 414k | 424U, // FCMGEv2i64rz |
9374 | 414k | 1056928U, // FCMGEv4f16 |
9375 | 414k | 401520U, // FCMGEv4f32 |
9376 | 414k | 432U, // FCMGEv4i16rz |
9377 | 414k | 440U, // FCMGEv4i32rz |
9378 | 414k | 532600U, // FCMGEv8f16 |
9379 | 414k | 448U, // FCMGEv8i16rz |
9380 | 414k | 3160U, // FCMGT16 |
9381 | 414k | 3160U, // FCMGT32 |
9382 | 414k | 3160U, // FCMGT64 |
9383 | 414k | 3676344U, // FCMGT_PPzZ0_D |
9384 | 414k | 46217U, // FCMGT_PPzZ0_H |
9385 | 414k | 3682488U, // FCMGT_PPzZ0_S |
9386 | 414k | 16914616U, // FCMGT_PPzZZ_D |
9387 | 414k | 25832585U, // FCMGT_PPzZZ_H |
9388 | 414k | 33697976U, // FCMGT_PPzZZ_S |
9389 | 414k | 408U, // FCMGTv1i16rz |
9390 | 414k | 408U, // FCMGTv1i32rz |
9391 | 414k | 408U, // FCMGTv1i64rz |
9392 | 414k | 925848U, // FCMGTv2f32 |
9393 | 414k | 270440U, // FCMGTv2f64 |
9394 | 414k | 416U, // FCMGTv2i32rz |
9395 | 414k | 424U, // FCMGTv2i64rz |
9396 | 414k | 1056928U, // FCMGTv4f16 |
9397 | 414k | 401520U, // FCMGTv4f32 |
9398 | 414k | 432U, // FCMGTv4i16rz |
9399 | 414k | 440U, // FCMGTv4i32rz |
9400 | 414k | 532600U, // FCMGTv8f16 |
9401 | 414k | 448U, // FCMGTv8i16rz |
9402 | 414k | 1744962688U, // FCMLA_ZPmZZ_D |
9403 | 414k | 1161440536U, // FCMLA_ZPmZZ_H |
9404 | 414k | 1753352320U, // FCMLA_ZPmZZ_S |
9405 | 414k | 92444952U, // FCMLA_ZZZI_H |
9406 | 414k | 1159596120U, // FCMLA_ZZZI_S |
9407 | 414k | 103687320U, // FCMLAv2f32 |
9408 | 414k | 103818344U, // FCMLAv2f64 |
9409 | 414k | 103949472U, // FCMLAv4f16 |
9410 | 414k | 1663050912U, // FCMLAv4f16_indexed |
9411 | 414k | 104080496U, // FCMLAv4f32 |
9412 | 414k | 1664885872U, // FCMLAv4f32_indexed |
9413 | 414k | 104211576U, // FCMLAv8f16 |
9414 | 414k | 1663050872U, // FCMLAv8f16_indexed |
9415 | 414k | 3676344U, // FCMLE_PPzZ0_D |
9416 | 414k | 46217U, // FCMLE_PPzZ0_H |
9417 | 414k | 3682488U, // FCMLE_PPzZ0_S |
9418 | 414k | 408U, // FCMLEv1i16rz |
9419 | 414k | 408U, // FCMLEv1i32rz |
9420 | 414k | 408U, // FCMLEv1i64rz |
9421 | 414k | 416U, // FCMLEv2i32rz |
9422 | 414k | 424U, // FCMLEv2i64rz |
9423 | 414k | 432U, // FCMLEv4i16rz |
9424 | 414k | 440U, // FCMLEv4i32rz |
9425 | 414k | 448U, // FCMLEv8i16rz |
9426 | 414k | 3676344U, // FCMLT_PPzZ0_D |
9427 | 414k | 46217U, // FCMLT_PPzZ0_H |
9428 | 414k | 3682488U, // FCMLT_PPzZ0_S |
9429 | 414k | 408U, // FCMLTv1i16rz |
9430 | 414k | 408U, // FCMLTv1i32rz |
9431 | 414k | 408U, // FCMLTv1i64rz |
9432 | 414k | 416U, // FCMLTv2i32rz |
9433 | 414k | 424U, // FCMLTv2i64rz |
9434 | 414k | 432U, // FCMLTv4i16rz |
9435 | 414k | 440U, // FCMLTv4i32rz |
9436 | 414k | 448U, // FCMLTv8i16rz |
9437 | 414k | 3676344U, // FCMNE_PPzZ0_D |
9438 | 414k | 46217U, // FCMNE_PPzZ0_H |
9439 | 414k | 3682488U, // FCMNE_PPzZ0_S |
9440 | 414k | 16914616U, // FCMNE_PPzZZ_D |
9441 | 414k | 25832585U, // FCMNE_PPzZZ_H |
9442 | 414k | 33697976U, // FCMNE_PPzZZ_S |
9443 | 414k | 0U, // FCMPDri |
9444 | 414k | 32U, // FCMPDrr |
9445 | 414k | 0U, // FCMPEDri |
9446 | 414k | 32U, // FCMPEDrr |
9447 | 414k | 0U, // FCMPEHri |
9448 | 414k | 32U, // FCMPEHrr |
9449 | 414k | 0U, // FCMPESri |
9450 | 414k | 32U, // FCMPESrr |
9451 | 414k | 0U, // FCMPHri |
9452 | 414k | 32U, // FCMPHrr |
9453 | 414k | 0U, // FCMPSri |
9454 | 414k | 32U, // FCMPSrr |
9455 | 414k | 16914616U, // FCMUO_PPzZZ_D |
9456 | 414k | 25832585U, // FCMUO_PPzZZ_H |
9457 | 414k | 33697976U, // FCMUO_PPzZZ_S |
9458 | 414k | 456U, // FCPY_ZPmI_D |
9459 | 414k | 2U, // FCPY_ZPmI_H |
9460 | 414k | 456U, // FCPY_ZPmI_S |
9461 | 414k | 75631704U, // FCSELDrrr |
9462 | 414k | 75631704U, // FCSELHrrr |
9463 | 414k | 75631704U, // FCSELSrrr |
9464 | 414k | 32U, // FCVTASUWDr |
9465 | 414k | 32U, // FCVTASUWHr |
9466 | 414k | 32U, // FCVTASUWSr |
9467 | 414k | 32U, // FCVTASUXDr |
9468 | 414k | 32U, // FCVTASUXHr |
9469 | 414k | 32U, // FCVTASUXSr |
9470 | 414k | 32U, // FCVTASv1f16 |
9471 | 414k | 32U, // FCVTASv1i32 |
9472 | 414k | 32U, // FCVTASv1i64 |
9473 | 414k | 40U, // FCVTASv2f32 |
9474 | 414k | 48U, // FCVTASv2f64 |
9475 | 414k | 56U, // FCVTASv4f16 |
9476 | 414k | 64U, // FCVTASv4f32 |
9477 | 414k | 72U, // FCVTASv8f16 |
9478 | 414k | 32U, // FCVTAUUWDr |
9479 | 414k | 32U, // FCVTAUUWHr |
9480 | 414k | 32U, // FCVTAUUWSr |
9481 | 414k | 32U, // FCVTAUUXDr |
9482 | 414k | 32U, // FCVTAUUXHr |
9483 | 414k | 32U, // FCVTAUUXSr |
9484 | 414k | 32U, // FCVTAUv1f16 |
9485 | 414k | 32U, // FCVTAUv1i32 |
9486 | 414k | 32U, // FCVTAUv1i64 |
9487 | 414k | 40U, // FCVTAUv2f32 |
9488 | 414k | 48U, // FCVTAUv2f64 |
9489 | 414k | 56U, // FCVTAUv4f16 |
9490 | 414k | 64U, // FCVTAUv4f32 |
9491 | 414k | 72U, // FCVTAUv8f16 |
9492 | 414k | 32U, // FCVTDHr |
9493 | 414k | 32U, // FCVTDSr |
9494 | 414k | 32U, // FCVTHDr |
9495 | 414k | 32U, // FCVTHSr |
9496 | 414k | 280U, // FCVTLT_ZPmZ_HtoS |
9497 | 414k | 16U, // FCVTLT_ZPmZ_StoD |
9498 | 414k | 40U, // FCVTLv2i32 |
9499 | 414k | 56U, // FCVTLv4i16 |
9500 | 414k | 64U, // FCVTLv4i32 |
9501 | 414k | 72U, // FCVTLv8i16 |
9502 | 414k | 32U, // FCVTMSUWDr |
9503 | 414k | 32U, // FCVTMSUWHr |
9504 | 414k | 32U, // FCVTMSUWSr |
9505 | 414k | 32U, // FCVTMSUXDr |
9506 | 414k | 32U, // FCVTMSUXHr |
9507 | 414k | 32U, // FCVTMSUXSr |
9508 | 414k | 32U, // FCVTMSv1f16 |
9509 | 414k | 32U, // FCVTMSv1i32 |
9510 | 414k | 32U, // FCVTMSv1i64 |
9511 | 414k | 40U, // FCVTMSv2f32 |
9512 | 414k | 48U, // FCVTMSv2f64 |
9513 | 414k | 56U, // FCVTMSv4f16 |
9514 | 414k | 64U, // FCVTMSv4f32 |
9515 | 414k | 72U, // FCVTMSv8f16 |
9516 | 414k | 32U, // FCVTMUUWDr |
9517 | 414k | 32U, // FCVTMUUWHr |
9518 | 414k | 32U, // FCVTMUUWSr |
9519 | 414k | 32U, // FCVTMUUXDr |
9520 | 414k | 32U, // FCVTMUUXHr |
9521 | 414k | 32U, // FCVTMUUXSr |
9522 | 414k | 32U, // FCVTMUv1f16 |
9523 | 414k | 32U, // FCVTMUv1i32 |
9524 | 414k | 32U, // FCVTMUv1i64 |
9525 | 414k | 40U, // FCVTMUv2f32 |
9526 | 414k | 48U, // FCVTMUv2f64 |
9527 | 414k | 56U, // FCVTMUv4f16 |
9528 | 414k | 64U, // FCVTMUv4f32 |
9529 | 414k | 72U, // FCVTMUv8f16 |
9530 | 414k | 32U, // FCVTNSUWDr |
9531 | 414k | 32U, // FCVTNSUWHr |
9532 | 414k | 32U, // FCVTNSUWSr |
9533 | 414k | 32U, // FCVTNSUXDr |
9534 | 414k | 32U, // FCVTNSUXHr |
9535 | 414k | 32U, // FCVTNSUXSr |
9536 | 414k | 32U, // FCVTNSv1f16 |
9537 | 414k | 32U, // FCVTNSv1i32 |
9538 | 414k | 32U, // FCVTNSv1i64 |
9539 | 414k | 40U, // FCVTNSv2f32 |
9540 | 414k | 48U, // FCVTNSv2f64 |
9541 | 414k | 56U, // FCVTNSv4f16 |
9542 | 414k | 64U, // FCVTNSv4f32 |
9543 | 414k | 72U, // FCVTNSv8f16 |
9544 | 414k | 8U, // FCVTNT_ZPmZ_DtoS |
9545 | 414k | 1U, // FCVTNT_ZPmZ_StoH |
9546 | 414k | 32U, // FCVTNUUWDr |
9547 | 414k | 32U, // FCVTNUUWHr |
9548 | 414k | 32U, // FCVTNUUWSr |
9549 | 414k | 32U, // FCVTNUUXDr |
9550 | 414k | 32U, // FCVTNUUXHr |
9551 | 414k | 32U, // FCVTNUUXSr |
9552 | 414k | 32U, // FCVTNUv1f16 |
9553 | 414k | 32U, // FCVTNUv1i32 |
9554 | 414k | 32U, // FCVTNUv1i64 |
9555 | 414k | 40U, // FCVTNUv2f32 |
9556 | 414k | 48U, // FCVTNUv2f64 |
9557 | 414k | 56U, // FCVTNUv4f16 |
9558 | 414k | 64U, // FCVTNUv4f32 |
9559 | 414k | 72U, // FCVTNUv8f16 |
9560 | 414k | 48U, // FCVTNv2i32 |
9561 | 414k | 64U, // FCVTNv4i16 |
9562 | 414k | 48U, // FCVTNv4i32 |
9563 | 414k | 64U, // FCVTNv8i16 |
9564 | 414k | 32U, // FCVTPSUWDr |
9565 | 414k | 32U, // FCVTPSUWHr |
9566 | 414k | 32U, // FCVTPSUWSr |
9567 | 414k | 32U, // FCVTPSUXDr |
9568 | 414k | 32U, // FCVTPSUXHr |
9569 | 414k | 32U, // FCVTPSUXSr |
9570 | 414k | 32U, // FCVTPSv1f16 |
9571 | 414k | 32U, // FCVTPSv1i32 |
9572 | 414k | 32U, // FCVTPSv1i64 |
9573 | 414k | 40U, // FCVTPSv2f32 |
9574 | 414k | 48U, // FCVTPSv2f64 |
9575 | 414k | 56U, // FCVTPSv4f16 |
9576 | 414k | 64U, // FCVTPSv4f32 |
9577 | 414k | 72U, // FCVTPSv8f16 |
9578 | 414k | 32U, // FCVTPUUWDr |
9579 | 414k | 32U, // FCVTPUUWHr |
9580 | 414k | 32U, // FCVTPUUWSr |
9581 | 414k | 32U, // FCVTPUUXDr |
9582 | 414k | 32U, // FCVTPUUXHr |
9583 | 414k | 32U, // FCVTPUUXSr |
9584 | 414k | 32U, // FCVTPUv1f16 |
9585 | 414k | 32U, // FCVTPUv1i32 |
9586 | 414k | 32U, // FCVTPUv1i64 |
9587 | 414k | 40U, // FCVTPUv2f32 |
9588 | 414k | 48U, // FCVTPUv2f64 |
9589 | 414k | 56U, // FCVTPUv4f16 |
9590 | 414k | 64U, // FCVTPUv4f32 |
9591 | 414k | 72U, // FCVTPUv8f16 |
9592 | 414k | 32U, // FCVTSDr |
9593 | 414k | 32U, // FCVTSHr |
9594 | 414k | 8U, // FCVTXNT_ZPmZ_DtoS |
9595 | 414k | 32U, // FCVTXNv1i64 |
9596 | 414k | 48U, // FCVTXNv2f32 |
9597 | 414k | 48U, // FCVTXNv4f32 |
9598 | 414k | 8U, // FCVTX_ZPmZ_DtoS |
9599 | 414k | 3160U, // FCVTZSSWDri |
9600 | 414k | 3160U, // FCVTZSSWHri |
9601 | 414k | 3160U, // FCVTZSSWSri |
9602 | 414k | 3160U, // FCVTZSSXDri |
9603 | 414k | 3160U, // FCVTZSSXHri |
9604 | 414k | 3160U, // FCVTZSSXSri |
9605 | 414k | 32U, // FCVTZSUWDr |
9606 | 414k | 32U, // FCVTZSUWHr |
9607 | 414k | 32U, // FCVTZSUWSr |
9608 | 414k | 32U, // FCVTZSUXDr |
9609 | 414k | 32U, // FCVTZSUXHr |
9610 | 414k | 32U, // FCVTZSUXSr |
9611 | 414k | 8U, // FCVTZS_ZPmZ_DtoD |
9612 | 414k | 8U, // FCVTZS_ZPmZ_DtoS |
9613 | 414k | 280U, // FCVTZS_ZPmZ_HtoD |
9614 | 414k | 0U, // FCVTZS_ZPmZ_HtoH |
9615 | 414k | 280U, // FCVTZS_ZPmZ_HtoS |
9616 | 414k | 16U, // FCVTZS_ZPmZ_StoD |
9617 | 414k | 16U, // FCVTZS_ZPmZ_StoS |
9618 | 414k | 3160U, // FCVTZSd |
9619 | 414k | 3160U, // FCVTZSh |
9620 | 414k | 3160U, // FCVTZSs |
9621 | 414k | 32U, // FCVTZSv1f16 |
9622 | 414k | 32U, // FCVTZSv1i32 |
9623 | 414k | 32U, // FCVTZSv1i64 |
9624 | 414k | 40U, // FCVTZSv2f32 |
9625 | 414k | 48U, // FCVTZSv2f64 |
9626 | 414k | 3224U, // FCVTZSv2i32_shift |
9627 | 414k | 3176U, // FCVTZSv2i64_shift |
9628 | 414k | 56U, // FCVTZSv4f16 |
9629 | 414k | 64U, // FCVTZSv4f32 |
9630 | 414k | 3232U, // FCVTZSv4i16_shift |
9631 | 414k | 3184U, // FCVTZSv4i32_shift |
9632 | 414k | 72U, // FCVTZSv8f16 |
9633 | 414k | 3192U, // FCVTZSv8i16_shift |
9634 | 414k | 3160U, // FCVTZUSWDri |
9635 | 414k | 3160U, // FCVTZUSWHri |
9636 | 414k | 3160U, // FCVTZUSWSri |
9637 | 414k | 3160U, // FCVTZUSXDri |
9638 | 414k | 3160U, // FCVTZUSXHri |
9639 | 414k | 3160U, // FCVTZUSXSri |
9640 | 414k | 32U, // FCVTZUUWDr |
9641 | 414k | 32U, // FCVTZUUWHr |
9642 | 414k | 32U, // FCVTZUUWSr |
9643 | 414k | 32U, // FCVTZUUXDr |
9644 | 414k | 32U, // FCVTZUUXHr |
9645 | 414k | 32U, // FCVTZUUXSr |
9646 | 414k | 8U, // FCVTZU_ZPmZ_DtoD |
9647 | 414k | 8U, // FCVTZU_ZPmZ_DtoS |
9648 | 414k | 280U, // FCVTZU_ZPmZ_HtoD |
9649 | 414k | 0U, // FCVTZU_ZPmZ_HtoH |
9650 | 414k | 280U, // FCVTZU_ZPmZ_HtoS |
9651 | 414k | 16U, // FCVTZU_ZPmZ_StoD |
9652 | 414k | 16U, // FCVTZU_ZPmZ_StoS |
9653 | 414k | 3160U, // FCVTZUd |
9654 | 414k | 3160U, // FCVTZUh |
9655 | 414k | 3160U, // FCVTZUs |
9656 | 414k | 32U, // FCVTZUv1f16 |
9657 | 414k | 32U, // FCVTZUv1i32 |
9658 | 414k | 32U, // FCVTZUv1i64 |
9659 | 414k | 40U, // FCVTZUv2f32 |
9660 | 414k | 48U, // FCVTZUv2f64 |
9661 | 414k | 3224U, // FCVTZUv2i32_shift |
9662 | 414k | 3176U, // FCVTZUv2i64_shift |
9663 | 414k | 56U, // FCVTZUv4f16 |
9664 | 414k | 64U, // FCVTZUv4f32 |
9665 | 414k | 3232U, // FCVTZUv4i16_shift |
9666 | 414k | 3184U, // FCVTZUv4i32_shift |
9667 | 414k | 72U, // FCVTZUv8f16 |
9668 | 414k | 3192U, // FCVTZUv8i16_shift |
9669 | 414k | 2U, // FCVT_ZPmZ_DtoH |
9670 | 414k | 8U, // FCVT_ZPmZ_DtoS |
9671 | 414k | 280U, // FCVT_ZPmZ_HtoD |
9672 | 414k | 280U, // FCVT_ZPmZ_HtoS |
9673 | 414k | 16U, // FCVT_ZPmZ_StoD |
9674 | 414k | 1U, // FCVT_ZPmZ_StoH |
9675 | 414k | 3160U, // FDIVDrr |
9676 | 414k | 3160U, // FDIVHrr |
9677 | 414k | 16914560U, // FDIVR_ZPmZ_D |
9678 | 414k | 25832584U, // FDIVR_ZPmZ_H |
9679 | 414k | 33697920U, // FDIVR_ZPmZ_S |
9680 | 414k | 3160U, // FDIVSrr |
9681 | 414k | 16914560U, // FDIV_ZPmZ_D |
9682 | 414k | 25832584U, // FDIV_ZPmZ_H |
9683 | 414k | 33697920U, // FDIV_ZPmZ_S |
9684 | 414k | 925848U, // FDIVv2f32 |
9685 | 414k | 270440U, // FDIVv2f64 |
9686 | 414k | 1056928U, // FDIVv4f16 |
9687 | 414k | 401520U, // FDIVv4f32 |
9688 | 414k | 532600U, // FDIVv8f16 |
9689 | 414k | 2U, // FDUP_ZI_D |
9690 | 414k | 0U, // FDUP_ZI_H |
9691 | 414k | 2U, // FDUP_ZI_S |
9692 | 414k | 32U, // FEXPA_ZZ_D |
9693 | 414k | 0U, // FEXPA_ZZ_H |
9694 | 414k | 32U, // FEXPA_ZZ_S |
9695 | 414k | 32U, // FJCVTZS |
9696 | 414k | 8U, // FLOGB_ZPmZ_D |
9697 | 414k | 0U, // FLOGB_ZPmZ_H |
9698 | 414k | 16U, // FLOGB_ZPmZ_S |
9699 | 414k | 134232U, // FMADDDrrr |
9700 | 414k | 134232U, // FMADDHrrr |
9701 | 414k | 134232U, // FMADDSrrr |
9702 | 414k | 134349952U, // FMAD_ZPmZZ_D |
9703 | 414k | 28978456U, // FMAD_ZPmZZ_H |
9704 | 414k | 142739584U, // FMAD_ZPmZZ_S |
9705 | 414k | 3160U, // FMAXDrr |
9706 | 414k | 3160U, // FMAXHrr |
9707 | 414k | 3160U, // FMAXNMDrr |
9708 | 414k | 3160U, // FMAXNMHrr |
9709 | 414k | 16914560U, // FMAXNMP_ZPmZZ_D |
9710 | 414k | 25832584U, // FMAXNMP_ZPmZZ_H |
9711 | 414k | 33697920U, // FMAXNMP_ZPmZZ_S |
9712 | 414k | 925848U, // FMAXNMPv2f32 |
9713 | 414k | 270440U, // FMAXNMPv2f64 |
9714 | 414k | 400U, // FMAXNMPv2i16p |
9715 | 414k | 40U, // FMAXNMPv2i32p |
9716 | 414k | 48U, // FMAXNMPv2i64p |
9717 | 414k | 1056928U, // FMAXNMPv4f16 |
9718 | 414k | 401520U, // FMAXNMPv4f32 |
9719 | 414k | 532600U, // FMAXNMPv8f16 |
9720 | 414k | 3160U, // FMAXNMSrr |
9721 | 414k | 0U, // FMAXNMV_VPZ_D |
9722 | 414k | 0U, // FMAXNMV_VPZ_H |
9723 | 414k | 0U, // FMAXNMV_VPZ_S |
9724 | 414k | 56U, // FMAXNMVv4i16v |
9725 | 414k | 64U, // FMAXNMVv4i32v |
9726 | 414k | 72U, // FMAXNMVv8i16v |
9727 | 414k | 151132288U, // FMAXNM_ZPmI_D |
9728 | 414k | 4074632U, // FMAXNM_ZPmI_H |
9729 | 414k | 151138432U, // FMAXNM_ZPmI_S |
9730 | 414k | 16914560U, // FMAXNM_ZPmZ_D |
9731 | 414k | 25832584U, // FMAXNM_ZPmZ_H |
9732 | 414k | 33697920U, // FMAXNM_ZPmZ_S |
9733 | 414k | 925848U, // FMAXNMv2f32 |
9734 | 414k | 270440U, // FMAXNMv2f64 |
9735 | 414k | 1056928U, // FMAXNMv4f16 |
9736 | 414k | 401520U, // FMAXNMv4f32 |
9737 | 414k | 532600U, // FMAXNMv8f16 |
9738 | 414k | 16914560U, // FMAXP_ZPmZZ_D |
9739 | 414k | 25832584U, // FMAXP_ZPmZZ_H |
9740 | 414k | 33697920U, // FMAXP_ZPmZZ_S |
9741 | 414k | 925848U, // FMAXPv2f32 |
9742 | 414k | 270440U, // FMAXPv2f64 |
9743 | 414k | 400U, // FMAXPv2i16p |
9744 | 414k | 40U, // FMAXPv2i32p |
9745 | 414k | 48U, // FMAXPv2i64p |
9746 | 414k | 1056928U, // FMAXPv4f16 |
9747 | 414k | 401520U, // FMAXPv4f32 |
9748 | 414k | 532600U, // FMAXPv8f16 |
9749 | 414k | 3160U, // FMAXSrr |
9750 | 414k | 0U, // FMAXV_VPZ_D |
9751 | 414k | 0U, // FMAXV_VPZ_H |
9752 | 414k | 0U, // FMAXV_VPZ_S |
9753 | 414k | 56U, // FMAXVv4i16v |
9754 | 414k | 64U, // FMAXVv4i32v |
9755 | 414k | 72U, // FMAXVv8i16v |
9756 | 414k | 151132288U, // FMAX_ZPmI_D |
9757 | 414k | 4074632U, // FMAX_ZPmI_H |
9758 | 414k | 151138432U, // FMAX_ZPmI_S |
9759 | 414k | 16914560U, // FMAX_ZPmZ_D |
9760 | 414k | 25832584U, // FMAX_ZPmZ_H |
9761 | 414k | 33697920U, // FMAX_ZPmZ_S |
9762 | 414k | 925848U, // FMAXv2f32 |
9763 | 414k | 270440U, // FMAXv2f64 |
9764 | 414k | 1056928U, // FMAXv4f16 |
9765 | 414k | 401520U, // FMAXv4f32 |
9766 | 414k | 532600U, // FMAXv8f16 |
9767 | 414k | 3160U, // FMINDrr |
9768 | 414k | 3160U, // FMINHrr |
9769 | 414k | 3160U, // FMINNMDrr |
9770 | 414k | 3160U, // FMINNMHrr |
9771 | 414k | 16914560U, // FMINNMP_ZPmZZ_D |
9772 | 414k | 25832584U, // FMINNMP_ZPmZZ_H |
9773 | 414k | 33697920U, // FMINNMP_ZPmZZ_S |
9774 | 414k | 925848U, // FMINNMPv2f32 |
9775 | 414k | 270440U, // FMINNMPv2f64 |
9776 | 414k | 400U, // FMINNMPv2i16p |
9777 | 414k | 40U, // FMINNMPv2i32p |
9778 | 414k | 48U, // FMINNMPv2i64p |
9779 | 414k | 1056928U, // FMINNMPv4f16 |
9780 | 414k | 401520U, // FMINNMPv4f32 |
9781 | 414k | 532600U, // FMINNMPv8f16 |
9782 | 414k | 3160U, // FMINNMSrr |
9783 | 414k | 0U, // FMINNMV_VPZ_D |
9784 | 414k | 0U, // FMINNMV_VPZ_H |
9785 | 414k | 0U, // FMINNMV_VPZ_S |
9786 | 414k | 56U, // FMINNMVv4i16v |
9787 | 414k | 64U, // FMINNMVv4i32v |
9788 | 414k | 72U, // FMINNMVv8i16v |
9789 | 414k | 151132288U, // FMINNM_ZPmI_D |
9790 | 414k | 4074632U, // FMINNM_ZPmI_H |
9791 | 414k | 151138432U, // FMINNM_ZPmI_S |
9792 | 414k | 16914560U, // FMINNM_ZPmZ_D |
9793 | 414k | 25832584U, // FMINNM_ZPmZ_H |
9794 | 414k | 33697920U, // FMINNM_ZPmZ_S |
9795 | 414k | 925848U, // FMINNMv2f32 |
9796 | 414k | 270440U, // FMINNMv2f64 |
9797 | 414k | 1056928U, // FMINNMv4f16 |
9798 | 414k | 401520U, // FMINNMv4f32 |
9799 | 414k | 532600U, // FMINNMv8f16 |
9800 | 414k | 16914560U, // FMINP_ZPmZZ_D |
9801 | 414k | 25832584U, // FMINP_ZPmZZ_H |
9802 | 414k | 33697920U, // FMINP_ZPmZZ_S |
9803 | 414k | 925848U, // FMINPv2f32 |
9804 | 414k | 270440U, // FMINPv2f64 |
9805 | 414k | 400U, // FMINPv2i16p |
9806 | 414k | 40U, // FMINPv2i32p |
9807 | 414k | 48U, // FMINPv2i64p |
9808 | 414k | 1056928U, // FMINPv4f16 |
9809 | 414k | 401520U, // FMINPv4f32 |
9810 | 414k | 532600U, // FMINPv8f16 |
9811 | 414k | 3160U, // FMINSrr |
9812 | 414k | 0U, // FMINV_VPZ_D |
9813 | 414k | 0U, // FMINV_VPZ_H |
9814 | 414k | 0U, // FMINV_VPZ_S |
9815 | 414k | 56U, // FMINVv4i16v |
9816 | 414k | 64U, // FMINVv4i32v |
9817 | 414k | 72U, // FMINVv8i16v |
9818 | 414k | 151132288U, // FMIN_ZPmI_D |
9819 | 414k | 4074632U, // FMIN_ZPmI_H |
9820 | 414k | 151138432U, // FMIN_ZPmI_S |
9821 | 414k | 16914560U, // FMIN_ZPmZ_D |
9822 | 414k | 25832584U, // FMIN_ZPmZ_H |
9823 | 414k | 33697920U, // FMIN_ZPmZ_S |
9824 | 414k | 925848U, // FMINv2f32 |
9825 | 414k | 270440U, // FMINv2f64 |
9826 | 414k | 1056928U, // FMINv4f16 |
9827 | 414k | 401520U, // FMINv4f32 |
9828 | 414k | 532600U, // FMINv8f16 |
9829 | 414k | 47568U, // FMLAL2lanev4f16 |
9830 | 414k | 52438176U, // FMLAL2lanev8f16 |
9831 | 414k | 48592U, // FMLAL2v4f16 |
9832 | 414k | 1057952U, // FMLAL2v8f16 |
9833 | 414k | 27139160U, // FMLALB_ZZZI_SHH |
9834 | 414k | 7256U, // FMLALB_ZZZ_SHH |
9835 | 414k | 27139160U, // FMLALT_ZZZI_SHH |
9836 | 414k | 7256U, // FMLALT_ZZZ_SHH |
9837 | 414k | 47568U, // FMLALlanev4f16 |
9838 | 414k | 52438176U, // FMLALlanev8f16 |
9839 | 414k | 48592U, // FMLALv4f16 |
9840 | 414k | 1057952U, // FMLALv8f16 |
9841 | 414k | 134349952U, // FMLA_ZPmZZ_D |
9842 | 414k | 28978456U, // FMLA_ZPmZZ_H |
9843 | 414k | 142739584U, // FMLA_ZPmZZ_S |
9844 | 414k | 27133016U, // FMLA_ZZZI_D |
9845 | 414k | 39192U, // FMLA_ZZZI_H |
9846 | 414k | 27134040U, // FMLA_ZZZI_S |
9847 | 414k | 52438105U, // FMLAv1i16_indexed |
9848 | 414k | 54273113U, // FMLAv1i32_indexed |
9849 | 414k | 54535257U, // FMLAv1i64_indexed |
9850 | 414k | 926872U, // FMLAv2f32 |
9851 | 414k | 271464U, // FMLAv2f64 |
9852 | 414k | 54273176U, // FMLAv2i32_indexed |
9853 | 414k | 54535272U, // FMLAv2i64_indexed |
9854 | 414k | 1057952U, // FMLAv4f16 |
9855 | 414k | 402544U, // FMLAv4f32 |
9856 | 414k | 52438176U, // FMLAv4i16_indexed |
9857 | 414k | 54273136U, // FMLAv4i32_indexed |
9858 | 414k | 533624U, // FMLAv8f16 |
9859 | 414k | 52438136U, // FMLAv8i16_indexed |
9860 | 414k | 47568U, // FMLSL2lanev4f16 |
9861 | 414k | 52438176U, // FMLSL2lanev8f16 |
9862 | 414k | 48592U, // FMLSL2v4f16 |
9863 | 414k | 1057952U, // FMLSL2v8f16 |
9864 | 414k | 27139160U, // FMLSLB_ZZZI_SHH |
9865 | 414k | 7256U, // FMLSLB_ZZZ_SHH |
9866 | 414k | 27139160U, // FMLSLT_ZZZI_SHH |
9867 | 414k | 7256U, // FMLSLT_ZZZ_SHH |
9868 | 414k | 47568U, // FMLSLlanev4f16 |
9869 | 414k | 52438176U, // FMLSLlanev8f16 |
9870 | 414k | 48592U, // FMLSLv4f16 |
9871 | 414k | 1057952U, // FMLSLv8f16 |
9872 | 414k | 134349952U, // FMLS_ZPmZZ_D |
9873 | 414k | 28978456U, // FMLS_ZPmZZ_H |
9874 | 414k | 142739584U, // FMLS_ZPmZZ_S |
9875 | 414k | 27133016U, // FMLS_ZZZI_D |
9876 | 414k | 39192U, // FMLS_ZZZI_H |
9877 | 414k | 27134040U, // FMLS_ZZZI_S |
9878 | 414k | 52438105U, // FMLSv1i16_indexed |
9879 | 414k | 54273113U, // FMLSv1i32_indexed |
9880 | 414k | 54535257U, // FMLSv1i64_indexed |
9881 | 414k | 926872U, // FMLSv2f32 |
9882 | 414k | 271464U, // FMLSv2f64 |
9883 | 414k | 54273176U, // FMLSv2i32_indexed |
9884 | 414k | 54535272U, // FMLSv2i64_indexed |
9885 | 414k | 1057952U, // FMLSv4f16 |
9886 | 414k | 402544U, // FMLSv4f32 |
9887 | 414k | 52438176U, // FMLSv4i16_indexed |
9888 | 414k | 54273136U, // FMLSv4i32_indexed |
9889 | 414k | 533624U, // FMLSv8f16 |
9890 | 414k | 52438136U, // FMLSv8i16_indexed |
9891 | 414k | 1112U, // FMMLA_ZZZ_D |
9892 | 414k | 2136U, // FMMLA_ZZZ_S |
9893 | 414k | 472U, // FMOPA_MPPZZ_D |
9894 | 414k | 480U, // FMOPA_MPPZZ_S |
9895 | 414k | 472U, // FMOPS_MPPZZ_D |
9896 | 414k | 480U, // FMOPS_MPPZZ_S |
9897 | 414k | 43368U, // FMOVDXHighr |
9898 | 414k | 32U, // FMOVDXr |
9899 | 414k | 2U, // FMOVDi |
9900 | 414k | 32U, // FMOVDr |
9901 | 414k | 32U, // FMOVHWr |
9902 | 414k | 32U, // FMOVHXr |
9903 | 414k | 2U, // FMOVHi |
9904 | 414k | 32U, // FMOVHr |
9905 | 414k | 32U, // FMOVSWr |
9906 | 414k | 2U, // FMOVSi |
9907 | 414k | 32U, // FMOVSr |
9908 | 414k | 32U, // FMOVWHr |
9909 | 414k | 32U, // FMOVWSr |
9910 | 414k | 32U, // FMOVXDHighr |
9911 | 414k | 32U, // FMOVXDr |
9912 | 414k | 32U, // FMOVXHr |
9913 | 414k | 2U, // FMOVv2f32_ns |
9914 | 414k | 2U, // FMOVv2f64_ns |
9915 | 414k | 2U, // FMOVv4f16_ns |
9916 | 414k | 2U, // FMOVv4f32_ns |
9917 | 414k | 2U, // FMOVv8f16_ns |
9918 | 414k | 134349952U, // FMSB_ZPmZZ_D |
9919 | 414k | 28978456U, // FMSB_ZPmZZ_H |
9920 | 414k | 142739584U, // FMSB_ZPmZZ_S |
9921 | 414k | 134232U, // FMSUBDrrr |
9922 | 414k | 134232U, // FMSUBHrrr |
9923 | 414k | 134232U, // FMSUBSrrr |
9924 | 414k | 3160U, // FMULDrr |
9925 | 414k | 3160U, // FMULHrr |
9926 | 414k | 3160U, // FMULSrr |
9927 | 414k | 3160U, // FMULX16 |
9928 | 414k | 3160U, // FMULX32 |
9929 | 414k | 3160U, // FMULX64 |
9930 | 414k | 16914560U, // FMULX_ZPmZ_D |
9931 | 414k | 25832584U, // FMULX_ZPmZ_H |
9932 | 414k | 33697920U, // FMULX_ZPmZ_S |
9933 | 414k | 161488984U, // FMULXv1i16_indexed |
9934 | 414k | 163323992U, // FMULXv1i32_indexed |
9935 | 414k | 163586136U, // FMULXv1i64_indexed |
9936 | 414k | 925848U, // FMULXv2f32 |
9937 | 414k | 270440U, // FMULXv2f64 |
9938 | 414k | 163324056U, // FMULXv2i32_indexed |
9939 | 414k | 163586152U, // FMULXv2i64_indexed |
9940 | 414k | 1056928U, // FMULXv4f16 |
9941 | 414k | 401520U, // FMULXv4f32 |
9942 | 414k | 161489056U, // FMULXv4i16_indexed |
9943 | 414k | 163324016U, // FMULXv4i32_indexed |
9944 | 414k | 532600U, // FMULXv8f16 |
9945 | 414k | 161489016U, // FMULXv8i16_indexed |
9946 | 414k | 167909504U, // FMUL_ZPmI_D |
9947 | 414k | 4336776U, // FMUL_ZPmI_H |
9948 | 414k | 167915648U, // FMUL_ZPmI_S |
9949 | 414k | 16914560U, // FMUL_ZPmZ_D |
9950 | 414k | 25832584U, // FMUL_ZPmZ_H |
9951 | 414k | 33697920U, // FMUL_ZPmZ_S |
9952 | 414k | 4462680U, // FMUL_ZZZI_D |
9953 | 414k | 49288U, // FMUL_ZZZI_H |
9954 | 414k | 4468824U, // FMUL_ZZZI_S |
9955 | 414k | 6232U, // FMUL_ZZZ_D |
9956 | 414k | 136U, // FMUL_ZZZ_H |
9957 | 414k | 12376U, // FMUL_ZZZ_S |
9958 | 414k | 161488984U, // FMULv1i16_indexed |
9959 | 414k | 163323992U, // FMULv1i32_indexed |
9960 | 414k | 163586136U, // FMULv1i64_indexed |
9961 | 414k | 925848U, // FMULv2f32 |
9962 | 414k | 270440U, // FMULv2f64 |
9963 | 414k | 163324056U, // FMULv2i32_indexed |
9964 | 414k | 163586152U, // FMULv2i64_indexed |
9965 | 414k | 1056928U, // FMULv4f16 |
9966 | 414k | 401520U, // FMULv4f32 |
9967 | 414k | 161489056U, // FMULv4i16_indexed |
9968 | 414k | 163324016U, // FMULv4i32_indexed |
9969 | 414k | 532600U, // FMULv8f16 |
9970 | 414k | 161489016U, // FMULv8i16_indexed |
9971 | 414k | 32U, // FNEGDr |
9972 | 414k | 32U, // FNEGHr |
9973 | 414k | 32U, // FNEGSr |
9974 | 414k | 8U, // FNEG_ZPmZ_D |
9975 | 414k | 0U, // FNEG_ZPmZ_H |
9976 | 414k | 16U, // FNEG_ZPmZ_S |
9977 | 414k | 40U, // FNEGv2f32 |
9978 | 414k | 48U, // FNEGv2f64 |
9979 | 414k | 56U, // FNEGv4f16 |
9980 | 414k | 64U, // FNEGv4f32 |
9981 | 414k | 72U, // FNEGv8f16 |
9982 | 414k | 134232U, // FNMADDDrrr |
9983 | 414k | 134232U, // FNMADDHrrr |
9984 | 414k | 134232U, // FNMADDSrrr |
9985 | 414k | 134349952U, // FNMAD_ZPmZZ_D |
9986 | 414k | 28978456U, // FNMAD_ZPmZZ_H |
9987 | 414k | 142739584U, // FNMAD_ZPmZZ_S |
9988 | 414k | 134349952U, // FNMLA_ZPmZZ_D |
9989 | 414k | 28978456U, // FNMLA_ZPmZZ_H |
9990 | 414k | 142739584U, // FNMLA_ZPmZZ_S |
9991 | 414k | 134349952U, // FNMLS_ZPmZZ_D |
9992 | 414k | 28978456U, // FNMLS_ZPmZZ_H |
9993 | 414k | 142739584U, // FNMLS_ZPmZZ_S |
9994 | 414k | 134349952U, // FNMSB_ZPmZZ_D |
9995 | 414k | 28978456U, // FNMSB_ZPmZZ_H |
9996 | 414k | 142739584U, // FNMSB_ZPmZZ_S |
9997 | 414k | 134232U, // FNMSUBDrrr |
9998 | 414k | 134232U, // FNMSUBHrrr |
9999 | 414k | 134232U, // FNMSUBSrrr |
10000 | 414k | 3160U, // FNMULDrr |
10001 | 414k | 3160U, // FNMULHrr |
10002 | 414k | 3160U, // FNMULSrr |
10003 | 414k | 32U, // FRECPE_ZZ_D |
10004 | 414k | 0U, // FRECPE_ZZ_H |
10005 | 414k | 32U, // FRECPE_ZZ_S |
10006 | 414k | 32U, // FRECPEv1f16 |
10007 | 414k | 32U, // FRECPEv1i32 |
10008 | 414k | 32U, // FRECPEv1i64 |
10009 | 414k | 40U, // FRECPEv2f32 |
10010 | 414k | 48U, // FRECPEv2f64 |
10011 | 414k | 56U, // FRECPEv4f16 |
10012 | 414k | 64U, // FRECPEv4f32 |
10013 | 414k | 72U, // FRECPEv8f16 |
10014 | 414k | 3160U, // FRECPS16 |
10015 | 414k | 3160U, // FRECPS32 |
10016 | 414k | 3160U, // FRECPS64 |
10017 | 414k | 6232U, // FRECPS_ZZZ_D |
10018 | 414k | 136U, // FRECPS_ZZZ_H |
10019 | 414k | 12376U, // FRECPS_ZZZ_S |
10020 | 414k | 925848U, // FRECPSv2f32 |
10021 | 414k | 270440U, // FRECPSv2f64 |
10022 | 414k | 1056928U, // FRECPSv4f16 |
10023 | 414k | 401520U, // FRECPSv4f32 |
10024 | 414k | 532600U, // FRECPSv8f16 |
10025 | 414k | 8U, // FRECPX_ZPmZ_D |
10026 | 414k | 0U, // FRECPX_ZPmZ_H |
10027 | 414k | 16U, // FRECPX_ZPmZ_S |
10028 | 414k | 32U, // FRECPXv1f16 |
10029 | 414k | 32U, // FRECPXv1i32 |
10030 | 414k | 32U, // FRECPXv1i64 |
10031 | 414k | 32U, // FRINT32XDr |
10032 | 414k | 32U, // FRINT32XSr |
10033 | 414k | 40U, // FRINT32Xv2f32 |
10034 | 414k | 48U, // FRINT32Xv2f64 |
10035 | 414k | 64U, // FRINT32Xv4f32 |
10036 | 414k | 32U, // FRINT32ZDr |
10037 | 414k | 32U, // FRINT32ZSr |
10038 | 414k | 40U, // FRINT32Zv2f32 |
10039 | 414k | 48U, // FRINT32Zv2f64 |
10040 | 414k | 64U, // FRINT32Zv4f32 |
10041 | 414k | 32U, // FRINT64XDr |
10042 | 414k | 32U, // FRINT64XSr |
10043 | 414k | 40U, // FRINT64Xv2f32 |
10044 | 414k | 48U, // FRINT64Xv2f64 |
10045 | 414k | 64U, // FRINT64Xv4f32 |
10046 | 414k | 32U, // FRINT64ZDr |
10047 | 414k | 32U, // FRINT64ZSr |
10048 | 414k | 40U, // FRINT64Zv2f32 |
10049 | 414k | 48U, // FRINT64Zv2f64 |
10050 | 414k | 64U, // FRINT64Zv4f32 |
10051 | 414k | 32U, // FRINTADr |
10052 | 414k | 32U, // FRINTAHr |
10053 | 414k | 32U, // FRINTASr |
10054 | 414k | 8U, // FRINTA_ZPmZ_D |
10055 | 414k | 0U, // FRINTA_ZPmZ_H |
10056 | 414k | 16U, // FRINTA_ZPmZ_S |
10057 | 414k | 40U, // FRINTAv2f32 |
10058 | 414k | 48U, // FRINTAv2f64 |
10059 | 414k | 56U, // FRINTAv4f16 |
10060 | 414k | 64U, // FRINTAv4f32 |
10061 | 414k | 72U, // FRINTAv8f16 |
10062 | 414k | 32U, // FRINTIDr |
10063 | 414k | 32U, // FRINTIHr |
10064 | 414k | 32U, // FRINTISr |
10065 | 414k | 8U, // FRINTI_ZPmZ_D |
10066 | 414k | 0U, // FRINTI_ZPmZ_H |
10067 | 414k | 16U, // FRINTI_ZPmZ_S |
10068 | 414k | 40U, // FRINTIv2f32 |
10069 | 414k | 48U, // FRINTIv2f64 |
10070 | 414k | 56U, // FRINTIv4f16 |
10071 | 414k | 64U, // FRINTIv4f32 |
10072 | 414k | 72U, // FRINTIv8f16 |
10073 | 414k | 32U, // FRINTMDr |
10074 | 414k | 32U, // FRINTMHr |
10075 | 414k | 32U, // FRINTMSr |
10076 | 414k | 8U, // FRINTM_ZPmZ_D |
10077 | 414k | 0U, // FRINTM_ZPmZ_H |
10078 | 414k | 16U, // FRINTM_ZPmZ_S |
10079 | 414k | 40U, // FRINTMv2f32 |
10080 | 414k | 48U, // FRINTMv2f64 |
10081 | 414k | 56U, // FRINTMv4f16 |
10082 | 414k | 64U, // FRINTMv4f32 |
10083 | 414k | 72U, // FRINTMv8f16 |
10084 | 414k | 32U, // FRINTNDr |
10085 | 414k | 32U, // FRINTNHr |
10086 | 414k | 32U, // FRINTNSr |
10087 | 414k | 8U, // FRINTN_ZPmZ_D |
10088 | 414k | 0U, // FRINTN_ZPmZ_H |
10089 | 414k | 16U, // FRINTN_ZPmZ_S |
10090 | 414k | 40U, // FRINTNv2f32 |
10091 | 414k | 48U, // FRINTNv2f64 |
10092 | 414k | 56U, // FRINTNv4f16 |
10093 | 414k | 64U, // FRINTNv4f32 |
10094 | 414k | 72U, // FRINTNv8f16 |
10095 | 414k | 32U, // FRINTPDr |
10096 | 414k | 32U, // FRINTPHr |
10097 | 414k | 32U, // FRINTPSr |
10098 | 414k | 8U, // FRINTP_ZPmZ_D |
10099 | 414k | 0U, // FRINTP_ZPmZ_H |
10100 | 414k | 16U, // FRINTP_ZPmZ_S |
10101 | 414k | 40U, // FRINTPv2f32 |
10102 | 414k | 48U, // FRINTPv2f64 |
10103 | 414k | 56U, // FRINTPv4f16 |
10104 | 414k | 64U, // FRINTPv4f32 |
10105 | 414k | 72U, // FRINTPv8f16 |
10106 | 414k | 32U, // FRINTXDr |
10107 | 414k | 32U, // FRINTXHr |
10108 | 414k | 32U, // FRINTXSr |
10109 | 414k | 8U, // FRINTX_ZPmZ_D |
10110 | 414k | 0U, // FRINTX_ZPmZ_H |
10111 | 414k | 16U, // FRINTX_ZPmZ_S |
10112 | 414k | 40U, // FRINTXv2f32 |
10113 | 414k | 48U, // FRINTXv2f64 |
10114 | 414k | 56U, // FRINTXv4f16 |
10115 | 414k | 64U, // FRINTXv4f32 |
10116 | 414k | 72U, // FRINTXv8f16 |
10117 | 414k | 32U, // FRINTZDr |
10118 | 414k | 32U, // FRINTZHr |
10119 | 414k | 32U, // FRINTZSr |
10120 | 414k | 8U, // FRINTZ_ZPmZ_D |
10121 | 414k | 0U, // FRINTZ_ZPmZ_H |
10122 | 414k | 16U, // FRINTZ_ZPmZ_S |
10123 | 414k | 40U, // FRINTZv2f32 |
10124 | 414k | 48U, // FRINTZv2f64 |
10125 | 414k | 56U, // FRINTZv4f16 |
10126 | 414k | 64U, // FRINTZv4f32 |
10127 | 414k | 72U, // FRINTZv8f16 |
10128 | 414k | 32U, // FRSQRTE_ZZ_D |
10129 | 414k | 0U, // FRSQRTE_ZZ_H |
10130 | 414k | 32U, // FRSQRTE_ZZ_S |
10131 | 414k | 32U, // FRSQRTEv1f16 |
10132 | 414k | 32U, // FRSQRTEv1i32 |
10133 | 414k | 32U, // FRSQRTEv1i64 |
10134 | 414k | 40U, // FRSQRTEv2f32 |
10135 | 414k | 48U, // FRSQRTEv2f64 |
10136 | 414k | 56U, // FRSQRTEv4f16 |
10137 | 414k | 64U, // FRSQRTEv4f32 |
10138 | 414k | 72U, // FRSQRTEv8f16 |
10139 | 414k | 3160U, // FRSQRTS16 |
10140 | 414k | 3160U, // FRSQRTS32 |
10141 | 414k | 3160U, // FRSQRTS64 |
10142 | 414k | 6232U, // FRSQRTS_ZZZ_D |
10143 | 414k | 136U, // FRSQRTS_ZZZ_H |
10144 | 414k | 12376U, // FRSQRTS_ZZZ_S |
10145 | 414k | 925848U, // FRSQRTSv2f32 |
10146 | 414k | 270440U, // FRSQRTSv2f64 |
10147 | 414k | 1056928U, // FRSQRTSv4f16 |
10148 | 414k | 401520U, // FRSQRTSv4f32 |
10149 | 414k | 532600U, // FRSQRTSv8f16 |
10150 | 414k | 16914560U, // FSCALE_ZPmZ_D |
10151 | 414k | 25832584U, // FSCALE_ZPmZ_H |
10152 | 414k | 33697920U, // FSCALE_ZPmZ_S |
10153 | 414k | 32U, // FSQRTDr |
10154 | 414k | 32U, // FSQRTHr |
10155 | 414k | 32U, // FSQRTSr |
10156 | 414k | 8U, // FSQRT_ZPmZ_D |
10157 | 414k | 0U, // FSQRT_ZPmZ_H |
10158 | 414k | 16U, // FSQRT_ZPmZ_S |
10159 | 414k | 40U, // FSQRTv2f32 |
10160 | 414k | 48U, // FSQRTv2f64 |
10161 | 414k | 56U, // FSQRTv4f16 |
10162 | 414k | 64U, // FSQRTv4f32 |
10163 | 414k | 72U, // FSQRTv8f16 |
10164 | 414k | 3160U, // FSUBDrr |
10165 | 414k | 3160U, // FSUBHrr |
10166 | 414k | 125966464U, // FSUBR_ZPmI_D |
10167 | 414k | 2894984U, // FSUBR_ZPmI_H |
10168 | 414k | 125972608U, // FSUBR_ZPmI_S |
10169 | 414k | 16914560U, // FSUBR_ZPmZ_D |
10170 | 414k | 25832584U, // FSUBR_ZPmZ_H |
10171 | 414k | 33697920U, // FSUBR_ZPmZ_S |
10172 | 414k | 3160U, // FSUBSrr |
10173 | 414k | 125966464U, // FSUB_ZPmI_D |
10174 | 414k | 2894984U, // FSUB_ZPmI_H |
10175 | 414k | 125972608U, // FSUB_ZPmI_S |
10176 | 414k | 16914560U, // FSUB_ZPmZ_D |
10177 | 414k | 25832584U, // FSUB_ZPmZ_H |
10178 | 414k | 33697920U, // FSUB_ZPmZ_S |
10179 | 414k | 6232U, // FSUB_ZZZ_D |
10180 | 414k | 136U, // FSUB_ZZZ_H |
10181 | 414k | 12376U, // FSUB_ZZZ_S |
10182 | 414k | 925848U, // FSUBv2f32 |
10183 | 414k | 270440U, // FSUBv2f64 |
10184 | 414k | 1056928U, // FSUBv4f16 |
10185 | 414k | 401520U, // FSUBv4f32 |
10186 | 414k | 532600U, // FSUBv8f16 |
10187 | 414k | 137304U, // FTMAD_ZZI_D |
10188 | 414k | 1453192U, // FTMAD_ZZI_H |
10189 | 414k | 143448U, // FTMAD_ZZI_S |
10190 | 414k | 6232U, // FTSMUL_ZZZ_D |
10191 | 414k | 136U, // FTSMUL_ZZZ_H |
10192 | 414k | 12376U, // FTSMUL_ZZZ_S |
10193 | 414k | 6232U, // FTSSEL_ZZZ_D |
10194 | 414k | 136U, // FTSSEL_ZZZ_H |
10195 | 414k | 12376U, // FTSSEL_ZZZ_S |
10196 | 414k | 2397272U, // GLD1B_D_IMM_REAL |
10197 | 414k | 50265U, // GLD1B_D_REAL |
10198 | 414k | 51289U, // GLD1B_D_SXTW_REAL |
10199 | 414k | 52313U, // GLD1B_D_UXTW_REAL |
10200 | 414k | 2397272U, // GLD1B_S_IMM_REAL |
10201 | 414k | 53337U, // GLD1B_S_SXTW_REAL |
10202 | 414k | 54361U, // GLD1B_S_UXTW_REAL |
10203 | 414k | 2414680U, // GLD1D_IMM_REAL |
10204 | 414k | 50265U, // GLD1D_REAL |
10205 | 414k | 56409U, // GLD1D_SCALED_REAL |
10206 | 414k | 51289U, // GLD1D_SXTW_REAL |
10207 | 414k | 57433U, // GLD1D_SXTW_SCALED_REAL |
10208 | 414k | 52313U, // GLD1D_UXTW_REAL |
10209 | 414k | 58457U, // GLD1D_UXTW_SCALED_REAL |
10210 | 414k | 2418776U, // GLD1H_D_IMM_REAL |
10211 | 414k | 50265U, // GLD1H_D_REAL |
10212 | 414k | 60505U, // GLD1H_D_SCALED_REAL |
10213 | 414k | 51289U, // GLD1H_D_SXTW_REAL |
10214 | 414k | 61529U, // GLD1H_D_SXTW_SCALED_REAL |
10215 | 414k | 52313U, // GLD1H_D_UXTW_REAL |
10216 | 414k | 62553U, // GLD1H_D_UXTW_SCALED_REAL |
10217 | 414k | 2418776U, // GLD1H_S_IMM_REAL |
10218 | 414k | 53337U, // GLD1H_S_SXTW_REAL |
10219 | 414k | 63577U, // GLD1H_S_SXTW_SCALED_REAL |
10220 | 414k | 54361U, // GLD1H_S_UXTW_REAL |
10221 | 414k | 64601U, // GLD1H_S_UXTW_SCALED_REAL |
10222 | 414k | 2397272U, // GLD1SB_D_IMM_REAL |
10223 | 414k | 50265U, // GLD1SB_D_REAL |
10224 | 414k | 51289U, // GLD1SB_D_SXTW_REAL |
10225 | 414k | 52313U, // GLD1SB_D_UXTW_REAL |
10226 | 414k | 2397272U, // GLD1SB_S_IMM_REAL |
10227 | 414k | 53337U, // GLD1SB_S_SXTW_REAL |
10228 | 414k | 54361U, // GLD1SB_S_UXTW_REAL |
10229 | 414k | 2418776U, // GLD1SH_D_IMM_REAL |
10230 | 414k | 50265U, // GLD1SH_D_REAL |
10231 | 414k | 60505U, // GLD1SH_D_SCALED_REAL |
10232 | 414k | 51289U, // GLD1SH_D_SXTW_REAL |
10233 | 414k | 61529U, // GLD1SH_D_SXTW_SCALED_REAL |
10234 | 414k | 52313U, // GLD1SH_D_UXTW_REAL |
10235 | 414k | 62553U, // GLD1SH_D_UXTW_SCALED_REAL |
10236 | 414k | 2418776U, // GLD1SH_S_IMM_REAL |
10237 | 414k | 53337U, // GLD1SH_S_SXTW_REAL |
10238 | 414k | 63577U, // GLD1SH_S_SXTW_SCALED_REAL |
10239 | 414k | 54361U, // GLD1SH_S_UXTW_REAL |
10240 | 414k | 64601U, // GLD1SH_S_UXTW_SCALED_REAL |
10241 | 414k | 2424920U, // GLD1SW_D_IMM_REAL |
10242 | 414k | 50265U, // GLD1SW_D_REAL |
10243 | 414k | 66649U, // GLD1SW_D_SCALED_REAL |
10244 | 414k | 51289U, // GLD1SW_D_SXTW_REAL |
10245 | 414k | 67673U, // GLD1SW_D_SXTW_SCALED_REAL |
10246 | 414k | 52313U, // GLD1SW_D_UXTW_REAL |
10247 | 414k | 68697U, // GLD1SW_D_UXTW_SCALED_REAL |
10248 | 414k | 2424920U, // GLD1W_D_IMM_REAL |
10249 | 414k | 50265U, // GLD1W_D_REAL |
10250 | 414k | 66649U, // GLD1W_D_SCALED_REAL |
10251 | 414k | 51289U, // GLD1W_D_SXTW_REAL |
10252 | 414k | 67673U, // GLD1W_D_SXTW_SCALED_REAL |
10253 | 414k | 52313U, // GLD1W_D_UXTW_REAL |
10254 | 414k | 68697U, // GLD1W_D_UXTW_SCALED_REAL |
10255 | 414k | 2424920U, // GLD1W_IMM_REAL |
10256 | 414k | 53337U, // GLD1W_SXTW_REAL |
10257 | 414k | 69721U, // GLD1W_SXTW_SCALED_REAL |
10258 | 414k | 54361U, // GLD1W_UXTW_REAL |
10259 | 414k | 70745U, // GLD1W_UXTW_SCALED_REAL |
10260 | 414k | 2397272U, // GLDFF1B_D_IMM_REAL |
10261 | 414k | 50265U, // GLDFF1B_D_REAL |
10262 | 414k | 51289U, // GLDFF1B_D_SXTW_REAL |
10263 | 414k | 52313U, // GLDFF1B_D_UXTW_REAL |
10264 | 414k | 2397272U, // GLDFF1B_S_IMM_REAL |
10265 | 414k | 53337U, // GLDFF1B_S_SXTW_REAL |
10266 | 414k | 54361U, // GLDFF1B_S_UXTW_REAL |
10267 | 414k | 2414680U, // GLDFF1D_IMM_REAL |
10268 | 414k | 50265U, // GLDFF1D_REAL |
10269 | 414k | 56409U, // GLDFF1D_SCALED_REAL |
10270 | 414k | 51289U, // GLDFF1D_SXTW_REAL |
10271 | 414k | 57433U, // GLDFF1D_SXTW_SCALED_REAL |
10272 | 414k | 52313U, // GLDFF1D_UXTW_REAL |
10273 | 414k | 58457U, // GLDFF1D_UXTW_SCALED_REAL |
10274 | 414k | 2418776U, // GLDFF1H_D_IMM_REAL |
10275 | 414k | 50265U, // GLDFF1H_D_REAL |
10276 | 414k | 60505U, // GLDFF1H_D_SCALED_REAL |
10277 | 414k | 51289U, // GLDFF1H_D_SXTW_REAL |
10278 | 414k | 61529U, // GLDFF1H_D_SXTW_SCALED_REAL |
10279 | 414k | 52313U, // GLDFF1H_D_UXTW_REAL |
10280 | 414k | 62553U, // GLDFF1H_D_UXTW_SCALED_REAL |
10281 | 414k | 2418776U, // GLDFF1H_S_IMM_REAL |
10282 | 414k | 53337U, // GLDFF1H_S_SXTW_REAL |
10283 | 414k | 63577U, // GLDFF1H_S_SXTW_SCALED_REAL |
10284 | 414k | 54361U, // GLDFF1H_S_UXTW_REAL |
10285 | 414k | 64601U, // GLDFF1H_S_UXTW_SCALED_REAL |
10286 | 414k | 2397272U, // GLDFF1SB_D_IMM_REAL |
10287 | 414k | 50265U, // GLDFF1SB_D_REAL |
10288 | 414k | 51289U, // GLDFF1SB_D_SXTW_REAL |
10289 | 414k | 52313U, // GLDFF1SB_D_UXTW_REAL |
10290 | 414k | 2397272U, // GLDFF1SB_S_IMM_REAL |
10291 | 414k | 53337U, // GLDFF1SB_S_SXTW_REAL |
10292 | 414k | 54361U, // GLDFF1SB_S_UXTW_REAL |
10293 | 414k | 2418776U, // GLDFF1SH_D_IMM_REAL |
10294 | 414k | 50265U, // GLDFF1SH_D_REAL |
10295 | 414k | 60505U, // GLDFF1SH_D_SCALED_REAL |
10296 | 414k | 51289U, // GLDFF1SH_D_SXTW_REAL |
10297 | 414k | 61529U, // GLDFF1SH_D_SXTW_SCALED_REAL |
10298 | 414k | 52313U, // GLDFF1SH_D_UXTW_REAL |
10299 | 414k | 62553U, // GLDFF1SH_D_UXTW_SCALED_REAL |
10300 | 414k | 2418776U, // GLDFF1SH_S_IMM_REAL |
10301 | 414k | 53337U, // GLDFF1SH_S_SXTW_REAL |
10302 | 414k | 63577U, // GLDFF1SH_S_SXTW_SCALED_REAL |
10303 | 414k | 54361U, // GLDFF1SH_S_UXTW_REAL |
10304 | 414k | 64601U, // GLDFF1SH_S_UXTW_SCALED_REAL |
10305 | 414k | 2424920U, // GLDFF1SW_D_IMM_REAL |
10306 | 414k | 50265U, // GLDFF1SW_D_REAL |
10307 | 414k | 66649U, // GLDFF1SW_D_SCALED_REAL |
10308 | 414k | 51289U, // GLDFF1SW_D_SXTW_REAL |
10309 | 414k | 67673U, // GLDFF1SW_D_SXTW_SCALED_REAL |
10310 | 414k | 52313U, // GLDFF1SW_D_UXTW_REAL |
10311 | 414k | 68697U, // GLDFF1SW_D_UXTW_SCALED_REAL |
10312 | 414k | 2424920U, // GLDFF1W_D_IMM_REAL |
10313 | 414k | 50265U, // GLDFF1W_D_REAL |
10314 | 414k | 66649U, // GLDFF1W_D_SCALED_REAL |
10315 | 414k | 51289U, // GLDFF1W_D_SXTW_REAL |
10316 | 414k | 67673U, // GLDFF1W_D_SXTW_SCALED_REAL |
10317 | 414k | 52313U, // GLDFF1W_D_UXTW_REAL |
10318 | 414k | 68697U, // GLDFF1W_D_UXTW_SCALED_REAL |
10319 | 414k | 2424920U, // GLDFF1W_IMM_REAL |
10320 | 414k | 53337U, // GLDFF1W_SXTW_REAL |
10321 | 414k | 69721U, // GLDFF1W_SXTW_SCALED_REAL |
10322 | 414k | 54361U, // GLDFF1W_UXTW_REAL |
10323 | 414k | 70745U, // GLDFF1W_UXTW_SCALED_REAL |
10324 | 414k | 3160U, // GMI |
10325 | 414k | 0U, // HINT |
10326 | 414k | 16914616U, // HISTCNT_ZPzZZ_D |
10327 | 414k | 33697976U, // HISTCNT_ZPzZZ_S |
10328 | 414k | 10328U, // HISTSEG_ZZZ |
10329 | 414k | 0U, // HLT |
10330 | 414k | 0U, // HVC |
10331 | 414k | 1U, // INCB_XPiI |
10332 | 414k | 1U, // INCD_XPiI |
10333 | 414k | 1U, // INCD_ZPiI |
10334 | 414k | 1U, // INCH_XPiI |
10335 | 414k | 0U, // INCH_ZPiI |
10336 | 414k | 32U, // INCP_XP_B |
10337 | 414k | 32U, // INCP_XP_D |
10338 | 414k | 32U, // INCP_XP_H |
10339 | 414k | 32U, // INCP_XP_S |
10340 | 414k | 32U, // INCP_ZP_D |
10341 | 414k | 0U, // INCP_ZP_H |
10342 | 414k | 32U, // INCP_ZP_S |
10343 | 414k | 1U, // INCW_XPiI |
10344 | 414k | 1U, // INCW_ZPiI |
10345 | 414k | 490U, // INDEX_II_B |
10346 | 414k | 3160U, // INDEX_II_D |
10347 | 414k | 2U, // INDEX_II_H |
10348 | 414k | 3160U, // INDEX_II_S |
10349 | 414k | 202U, // INDEX_IR_B |
10350 | 414k | 3160U, // INDEX_IR_D |
10351 | 414k | 33U, // INDEX_IR_H |
10352 | 414k | 3160U, // INDEX_IR_S |
10353 | 414k | 71768U, // INDEX_RI_B |
10354 | 414k | 3160U, // INDEX_RI_D |
10355 | 414k | 496U, // INDEX_RI_H |
10356 | 414k | 3160U, // INDEX_RI_S |
10357 | 414k | 3160U, // INDEX_RR_B |
10358 | 414k | 3160U, // INDEX_RR_D |
10359 | 414k | 200U, // INDEX_RR_H |
10360 | 414k | 3160U, // INDEX_RR_S |
10361 | 414k | 506U, // INSERT_MXIPZ_H_B |
10362 | 414k | 474U, // INSERT_MXIPZ_H_D |
10363 | 414k | 514U, // INSERT_MXIPZ_H_H |
10364 | 414k | 522U, // INSERT_MXIPZ_H_Q |
10365 | 414k | 482U, // INSERT_MXIPZ_H_S |
10366 | 414k | 506U, // INSERT_MXIPZ_V_B |
10367 | 414k | 474U, // INSERT_MXIPZ_V_D |
10368 | 414k | 514U, // INSERT_MXIPZ_V_H |
10369 | 414k | 522U, // INSERT_MXIPZ_V_Q |
10370 | 414k | 482U, // INSERT_MXIPZ_V_S |
10371 | 414k | 33U, // INSR_ZR_B |
10372 | 414k | 33U, // INSR_ZR_D |
10373 | 414k | 0U, // INSR_ZR_H |
10374 | 414k | 33U, // INSR_ZR_S |
10375 | 414k | 2U, // INSR_ZV_B |
10376 | 414k | 2U, // INSR_ZV_D |
10377 | 414k | 0U, // INSR_ZV_H |
10378 | 414k | 2U, // INSR_ZV_S |
10379 | 414k | 1U, // INSvi16gpr |
10380 | 414k | 39258U, // INSvi16lane |
10381 | 414k | 1U, // INSvi32gpr |
10382 | 414k | 39266U, // INSvi32lane |
10383 | 414k | 1U, // INSvi64gpr |
10384 | 414k | 39274U, // INSvi64lane |
10385 | 414k | 1U, // INSvi8gpr |
10386 | 414k | 39282U, // INSvi8lane |
10387 | 414k | 3160U, // IRG |
10388 | 414k | 0U, // ISB |
10389 | 414k | 10328U, // LASTA_RPZ_B |
10390 | 414k | 6232U, // LASTA_RPZ_D |
10391 | 414k | 5208U, // LASTA_RPZ_H |
10392 | 414k | 12376U, // LASTA_RPZ_S |
10393 | 414k | 10328U, // LASTA_VPZ_B |
10394 | 414k | 6232U, // LASTA_VPZ_D |
10395 | 414k | 5208U, // LASTA_VPZ_H |
10396 | 414k | 12376U, // LASTA_VPZ_S |
10397 | 414k | 10328U, // LASTB_RPZ_B |
10398 | 414k | 6232U, // LASTB_RPZ_D |
10399 | 414k | 5208U, // LASTB_RPZ_H |
10400 | 414k | 12376U, // LASTB_RPZ_S |
10401 | 414k | 10328U, // LASTB_VPZ_B |
10402 | 414k | 6232U, // LASTB_VPZ_D |
10403 | 414k | 5208U, // LASTB_VPZ_H |
10404 | 414k | 12376U, // LASTB_VPZ_S |
10405 | 414k | 72793U, // LD1B |
10406 | 414k | 72793U, // LD1B_D |
10407 | 414k | 4625497U, // LD1B_D_IMM_REAL |
10408 | 414k | 72793U, // LD1B_H |
10409 | 414k | 4625497U, // LD1B_H_IMM_REAL |
10410 | 414k | 4625497U, // LD1B_IMM_REAL |
10411 | 414k | 72793U, // LD1B_S |
10412 | 414k | 4625497U, // LD1B_S_IMM_REAL |
10413 | 414k | 73817U, // LD1D |
10414 | 414k | 4625497U, // LD1D_IMM_REAL |
10415 | 414k | 0U, // LD1Fourv16b |
10416 | 414k | 0U, // LD1Fourv16b_POST |
10417 | 414k | 0U, // LD1Fourv1d |
10418 | 414k | 0U, // LD1Fourv1d_POST |
10419 | 414k | 0U, // LD1Fourv2d |
10420 | 414k | 0U, // LD1Fourv2d_POST |
10421 | 414k | 0U, // LD1Fourv2s |
10422 | 414k | 0U, // LD1Fourv2s_POST |
10423 | 414k | 0U, // LD1Fourv4h |
10424 | 414k | 0U, // LD1Fourv4h_POST |
10425 | 414k | 0U, // LD1Fourv4s |
10426 | 414k | 0U, // LD1Fourv4s_POST |
10427 | 414k | 0U, // LD1Fourv8b |
10428 | 414k | 0U, // LD1Fourv8b_POST |
10429 | 414k | 0U, // LD1Fourv8h |
10430 | 414k | 0U, // LD1Fourv8h_POST |
10431 | 414k | 74841U, // LD1H |
10432 | 414k | 74841U, // LD1H_D |
10433 | 414k | 4625497U, // LD1H_D_IMM_REAL |
10434 | 414k | 4625497U, // LD1H_IMM_REAL |
10435 | 414k | 74841U, // LD1H_S |
10436 | 414k | 4625497U, // LD1H_S_IMM_REAL |
10437 | 414k | 0U, // LD1Onev16b |
10438 | 414k | 0U, // LD1Onev16b_POST |
10439 | 414k | 0U, // LD1Onev1d |
10440 | 414k | 0U, // LD1Onev1d_POST |
10441 | 414k | 0U, // LD1Onev2d |
10442 | 414k | 0U, // LD1Onev2d_POST |
10443 | 414k | 0U, // LD1Onev2s |
10444 | 414k | 0U, // LD1Onev2s_POST |
10445 | 414k | 0U, // LD1Onev4h |
10446 | 414k | 0U, // LD1Onev4h_POST |
10447 | 414k | 0U, // LD1Onev4s |
10448 | 414k | 0U, // LD1Onev4s_POST |
10449 | 414k | 0U, // LD1Onev8b |
10450 | 414k | 0U, // LD1Onev8b_POST |
10451 | 414k | 0U, // LD1Onev8h |
10452 | 414k | 0U, // LD1Onev8h_POST |
10453 | 414k | 2397273U, // LD1RB_D_IMM |
10454 | 414k | 2397273U, // LD1RB_H_IMM |
10455 | 414k | 2397273U, // LD1RB_IMM |
10456 | 414k | 2397273U, // LD1RB_S_IMM |
10457 | 414k | 2414681U, // LD1RD_IMM |
10458 | 414k | 2418777U, // LD1RH_D_IMM |
10459 | 414k | 2418777U, // LD1RH_IMM |
10460 | 414k | 2418777U, // LD1RH_S_IMM |
10461 | 414k | 72793U, // LD1RO_B |
10462 | 414k | 75865U, // LD1RO_B_IMM |
10463 | 414k | 73817U, // LD1RO_D |
10464 | 414k | 75865U, // LD1RO_D_IMM |
10465 | 414k | 74841U, // LD1RO_H |
10466 | 414k | 75865U, // LD1RO_H_IMM |
10467 | 414k | 76889U, // LD1RO_W |
10468 | 414k | 75865U, // LD1RO_W_IMM |
10469 | 414k | 72793U, // LD1RQ_B |
10470 | 414k | 2437209U, // LD1RQ_B_IMM |
10471 | 414k | 73817U, // LD1RQ_D |
10472 | 414k | 2437209U, // LD1RQ_D_IMM |
10473 | 414k | 74841U, // LD1RQ_H |
10474 | 414k | 2437209U, // LD1RQ_H_IMM |
10475 | 414k | 76889U, // LD1RQ_W |
10476 | 414k | 2437209U, // LD1RQ_W_IMM |
10477 | 414k | 2397273U, // LD1RSB_D_IMM |
10478 | 414k | 2397273U, // LD1RSB_H_IMM |
10479 | 414k | 2397273U, // LD1RSB_S_IMM |
10480 | 414k | 2418777U, // LD1RSH_D_IMM |
10481 | 414k | 2418777U, // LD1RSH_S_IMM |
10482 | 414k | 2424921U, // LD1RSW_IMM |
10483 | 414k | 2424921U, // LD1RW_D_IMM |
10484 | 414k | 2424921U, // LD1RW_IMM |
10485 | 414k | 0U, // LD1Rv16b |
10486 | 414k | 0U, // LD1Rv16b_POST |
10487 | 414k | 0U, // LD1Rv1d |
10488 | 414k | 0U, // LD1Rv1d_POST |
10489 | 414k | 0U, // LD1Rv2d |
10490 | 414k | 0U, // LD1Rv2d_POST |
10491 | 414k | 0U, // LD1Rv2s |
10492 | 414k | 0U, // LD1Rv2s_POST |
10493 | 414k | 0U, // LD1Rv4h |
10494 | 414k | 0U, // LD1Rv4h_POST |
10495 | 414k | 0U, // LD1Rv4s |
10496 | 414k | 0U, // LD1Rv4s_POST |
10497 | 414k | 0U, // LD1Rv8b |
10498 | 414k | 0U, // LD1Rv8b_POST |
10499 | 414k | 0U, // LD1Rv8h |
10500 | 414k | 0U, // LD1Rv8h_POST |
10501 | 414k | 72793U, // LD1SB_D |
10502 | 414k | 4625497U, // LD1SB_D_IMM_REAL |
10503 | 414k | 72793U, // LD1SB_H |
10504 | 414k | 4625497U, // LD1SB_H_IMM_REAL |
10505 | 414k | 72793U, // LD1SB_S |
10506 | 414k | 4625497U, // LD1SB_S_IMM_REAL |
10507 | 414k | 74841U, // LD1SH_D |
10508 | 414k | 4625497U, // LD1SH_D_IMM_REAL |
10509 | 414k | 74841U, // LD1SH_S |
10510 | 414k | 4625497U, // LD1SH_S_IMM_REAL |
10511 | 414k | 76889U, // LD1SW_D |
10512 | 414k | 4625497U, // LD1SW_D_IMM_REAL |
10513 | 414k | 0U, // LD1Threev16b |
10514 | 414k | 0U, // LD1Threev16b_POST |
10515 | 414k | 0U, // LD1Threev1d |
10516 | 414k | 0U, // LD1Threev1d_POST |
10517 | 414k | 0U, // LD1Threev2d |
10518 | 414k | 0U, // LD1Threev2d_POST |
10519 | 414k | 0U, // LD1Threev2s |
10520 | 414k | 0U, // LD1Threev2s_POST |
10521 | 414k | 0U, // LD1Threev4h |
10522 | 414k | 0U, // LD1Threev4h_POST |
10523 | 414k | 0U, // LD1Threev4s |
10524 | 414k | 0U, // LD1Threev4s_POST |
10525 | 414k | 0U, // LD1Threev8b |
10526 | 414k | 0U, // LD1Threev8b_POST |
10527 | 414k | 0U, // LD1Threev8h |
10528 | 414k | 0U, // LD1Threev8h_POST |
10529 | 414k | 0U, // LD1Twov16b |
10530 | 414k | 0U, // LD1Twov16b_POST |
10531 | 414k | 0U, // LD1Twov1d |
10532 | 414k | 0U, // LD1Twov1d_POST |
10533 | 414k | 0U, // LD1Twov2d |
10534 | 414k | 0U, // LD1Twov2d_POST |
10535 | 414k | 0U, // LD1Twov2s |
10536 | 414k | 0U, // LD1Twov2s_POST |
10537 | 414k | 0U, // LD1Twov4h |
10538 | 414k | 0U, // LD1Twov4h_POST |
10539 | 414k | 0U, // LD1Twov4s |
10540 | 414k | 0U, // LD1Twov4s_POST |
10541 | 414k | 0U, // LD1Twov8b |
10542 | 414k | 0U, // LD1Twov8b_POST |
10543 | 414k | 0U, // LD1Twov8h |
10544 | 414k | 0U, // LD1Twov8h_POST |
10545 | 414k | 76889U, // LD1W |
10546 | 414k | 76889U, // LD1W_D |
10547 | 414k | 4625497U, // LD1W_D_IMM_REAL |
10548 | 414k | 4625497U, // LD1W_IMM_REAL |
10549 | 414k | 530U, // LD1_MXIPXX_H_B |
10550 | 414k | 538U, // LD1_MXIPXX_H_D |
10551 | 414k | 546U, // LD1_MXIPXX_H_H |
10552 | 414k | 554U, // LD1_MXIPXX_H_Q |
10553 | 414k | 562U, // LD1_MXIPXX_H_S |
10554 | 414k | 530U, // LD1_MXIPXX_V_B |
10555 | 414k | 538U, // LD1_MXIPXX_V_D |
10556 | 414k | 546U, // LD1_MXIPXX_V_H |
10557 | 414k | 554U, // LD1_MXIPXX_V_Q |
10558 | 414k | 562U, // LD1_MXIPXX_V_S |
10559 | 414k | 0U, // LD1i16 |
10560 | 414k | 0U, // LD1i16_POST |
10561 | 414k | 0U, // LD1i32 |
10562 | 414k | 0U, // LD1i32_POST |
10563 | 414k | 0U, // LD1i64 |
10564 | 414k | 0U, // LD1i64_POST |
10565 | 414k | 0U, // LD1i8 |
10566 | 414k | 0U, // LD1i8_POST |
10567 | 414k | 72793U, // LD2B |
10568 | 414k | 4647001U, // LD2B_IMM |
10569 | 414k | 73817U, // LD2D |
10570 | 414k | 4647001U, // LD2D_IMM |
10571 | 414k | 74841U, // LD2H |
10572 | 414k | 4647001U, // LD2H_IMM |
10573 | 414k | 0U, // LD2Rv16b |
10574 | 414k | 0U, // LD2Rv16b_POST |
10575 | 414k | 0U, // LD2Rv1d |
10576 | 414k | 0U, // LD2Rv1d_POST |
10577 | 414k | 0U, // LD2Rv2d |
10578 | 414k | 0U, // LD2Rv2d_POST |
10579 | 414k | 0U, // LD2Rv2s |
10580 | 414k | 0U, // LD2Rv2s_POST |
10581 | 414k | 0U, // LD2Rv4h |
10582 | 414k | 0U, // LD2Rv4h_POST |
10583 | 414k | 0U, // LD2Rv4s |
10584 | 414k | 0U, // LD2Rv4s_POST |
10585 | 414k | 0U, // LD2Rv8b |
10586 | 414k | 0U, // LD2Rv8b_POST |
10587 | 414k | 0U, // LD2Rv8h |
10588 | 414k | 0U, // LD2Rv8h_POST |
10589 | 414k | 0U, // LD2Twov16b |
10590 | 414k | 0U, // LD2Twov16b_POST |
10591 | 414k | 0U, // LD2Twov2d |
10592 | 414k | 0U, // LD2Twov2d_POST |
10593 | 414k | 0U, // LD2Twov2s |
10594 | 414k | 0U, // LD2Twov2s_POST |
10595 | 414k | 0U, // LD2Twov4h |
10596 | 414k | 0U, // LD2Twov4h_POST |
10597 | 414k | 0U, // LD2Twov4s |
10598 | 414k | 0U, // LD2Twov4s_POST |
10599 | 414k | 0U, // LD2Twov8b |
10600 | 414k | 0U, // LD2Twov8b_POST |
10601 | 414k | 0U, // LD2Twov8h |
10602 | 414k | 0U, // LD2Twov8h_POST |
10603 | 414k | 76889U, // LD2W |
10604 | 414k | 4647001U, // LD2W_IMM |
10605 | 414k | 0U, // LD2i16 |
10606 | 414k | 0U, // LD2i16_POST |
10607 | 414k | 0U, // LD2i32 |
10608 | 414k | 0U, // LD2i32_POST |
10609 | 414k | 0U, // LD2i64 |
10610 | 414k | 0U, // LD2i64_POST |
10611 | 414k | 0U, // LD2i8 |
10612 | 414k | 0U, // LD2i8_POST |
10613 | 414k | 72793U, // LD3B |
10614 | 414k | 78937U, // LD3B_IMM |
10615 | 414k | 73817U, // LD3D |
10616 | 414k | 78937U, // LD3D_IMM |
10617 | 414k | 74841U, // LD3H |
10618 | 414k | 78937U, // LD3H_IMM |
10619 | 414k | 0U, // LD3Rv16b |
10620 | 414k | 0U, // LD3Rv16b_POST |
10621 | 414k | 0U, // LD3Rv1d |
10622 | 414k | 0U, // LD3Rv1d_POST |
10623 | 414k | 0U, // LD3Rv2d |
10624 | 414k | 0U, // LD3Rv2d_POST |
10625 | 414k | 0U, // LD3Rv2s |
10626 | 414k | 0U, // LD3Rv2s_POST |
10627 | 414k | 0U, // LD3Rv4h |
10628 | 414k | 0U, // LD3Rv4h_POST |
10629 | 414k | 0U, // LD3Rv4s |
10630 | 414k | 0U, // LD3Rv4s_POST |
10631 | 414k | 0U, // LD3Rv8b |
10632 | 414k | 0U, // LD3Rv8b_POST |
10633 | 414k | 0U, // LD3Rv8h |
10634 | 414k | 0U, // LD3Rv8h_POST |
10635 | 414k | 0U, // LD3Threev16b |
10636 | 414k | 0U, // LD3Threev16b_POST |
10637 | 414k | 0U, // LD3Threev2d |
10638 | 414k | 0U, // LD3Threev2d_POST |
10639 | 414k | 0U, // LD3Threev2s |
10640 | 414k | 0U, // LD3Threev2s_POST |
10641 | 414k | 0U, // LD3Threev4h |
10642 | 414k | 0U, // LD3Threev4h_POST |
10643 | 414k | 0U, // LD3Threev4s |
10644 | 414k | 0U, // LD3Threev4s_POST |
10645 | 414k | 0U, // LD3Threev8b |
10646 | 414k | 0U, // LD3Threev8b_POST |
10647 | 414k | 0U, // LD3Threev8h |
10648 | 414k | 0U, // LD3Threev8h_POST |
10649 | 414k | 76889U, // LD3W |
10650 | 414k | 78937U, // LD3W_IMM |
10651 | 414k | 0U, // LD3i16 |
10652 | 414k | 0U, // LD3i16_POST |
10653 | 414k | 0U, // LD3i32 |
10654 | 414k | 0U, // LD3i32_POST |
10655 | 414k | 0U, // LD3i64 |
10656 | 414k | 0U, // LD3i64_POST |
10657 | 414k | 0U, // LD3i8 |
10658 | 414k | 0U, // LD3i8_POST |
10659 | 414k | 72793U, // LD4B |
10660 | 414k | 4653145U, // LD4B_IMM |
10661 | 414k | 73817U, // LD4D |
10662 | 414k | 4653145U, // LD4D_IMM |
10663 | 414k | 0U, // LD4Fourv16b |
10664 | 414k | 0U, // LD4Fourv16b_POST |
10665 | 414k | 0U, // LD4Fourv2d |
10666 | 414k | 0U, // LD4Fourv2d_POST |
10667 | 414k | 0U, // LD4Fourv2s |
10668 | 414k | 0U, // LD4Fourv2s_POST |
10669 | 414k | 0U, // LD4Fourv4h |
10670 | 414k | 0U, // LD4Fourv4h_POST |
10671 | 414k | 0U, // LD4Fourv4s |
10672 | 414k | 0U, // LD4Fourv4s_POST |
10673 | 414k | 0U, // LD4Fourv8b |
10674 | 414k | 0U, // LD4Fourv8b_POST |
10675 | 414k | 0U, // LD4Fourv8h |
10676 | 414k | 0U, // LD4Fourv8h_POST |
10677 | 414k | 74841U, // LD4H |
10678 | 414k | 4653145U, // LD4H_IMM |
10679 | 414k | 0U, // LD4Rv16b |
10680 | 414k | 0U, // LD4Rv16b_POST |
10681 | 414k | 0U, // LD4Rv1d |
10682 | 414k | 0U, // LD4Rv1d_POST |
10683 | 414k | 0U, // LD4Rv2d |
10684 | 414k | 0U, // LD4Rv2d_POST |
10685 | 414k | 0U, // LD4Rv2s |
10686 | 414k | 0U, // LD4Rv2s_POST |
10687 | 414k | 0U, // LD4Rv4h |
10688 | 414k | 0U, // LD4Rv4h_POST |
10689 | 414k | 0U, // LD4Rv4s |
10690 | 414k | 0U, // LD4Rv4s_POST |
10691 | 414k | 0U, // LD4Rv8b |
10692 | 414k | 0U, // LD4Rv8b_POST |
10693 | 414k | 0U, // LD4Rv8h |
10694 | 414k | 0U, // LD4Rv8h_POST |
10695 | 414k | 76889U, // LD4W |
10696 | 414k | 4653145U, // LD4W_IMM |
10697 | 414k | 0U, // LD4i16 |
10698 | 414k | 0U, // LD4i16_POST |
10699 | 414k | 0U, // LD4i32 |
10700 | 414k | 0U, // LD4i32_POST |
10701 | 414k | 0U, // LD4i64 |
10702 | 414k | 0U, // LD4i64_POST |
10703 | 414k | 0U, // LD4i8 |
10704 | 414k | 0U, // LD4i8_POST |
10705 | 414k | 0U, // LD64B |
10706 | 414k | 2U, // LDADDAB |
10707 | 414k | 2U, // LDADDAH |
10708 | 414k | 2U, // LDADDALB |
10709 | 414k | 2U, // LDADDALH |
10710 | 414k | 2U, // LDADDALW |
10711 | 414k | 2U, // LDADDALX |
10712 | 414k | 2U, // LDADDAW |
10713 | 414k | 2U, // LDADDAX |
10714 | 414k | 2U, // LDADDB |
10715 | 414k | 2U, // LDADDH |
10716 | 414k | 2U, // LDADDLB |
10717 | 414k | 2U, // LDADDLH |
10718 | 414k | 2U, // LDADDLW |
10719 | 414k | 2U, // LDADDLX |
10720 | 414k | 2U, // LDADDW |
10721 | 414k | 2U, // LDADDX |
10722 | 414k | 568U, // LDAPRB |
10723 | 414k | 568U, // LDAPRH |
10724 | 414k | 568U, // LDAPRW |
10725 | 414k | 568U, // LDAPRX |
10726 | 414k | 2362456U, // LDAPURBi |
10727 | 414k | 2362456U, // LDAPURHi |
10728 | 414k | 2362456U, // LDAPURSBWi |
10729 | 414k | 2362456U, // LDAPURSBXi |
10730 | 414k | 2362456U, // LDAPURSHWi |
10731 | 414k | 2362456U, // LDAPURSHXi |
10732 | 414k | 2362456U, // LDAPURSWi |
10733 | 414k | 2362456U, // LDAPURXi |
10734 | 414k | 2362456U, // LDAPURi |
10735 | 414k | 568U, // LDARB |
10736 | 414k | 568U, // LDARH |
10737 | 414k | 568U, // LDARW |
10738 | 414k | 568U, // LDARX |
10739 | 414k | 2362576U, // LDAXPW |
10740 | 414k | 2362576U, // LDAXPX |
10741 | 414k | 568U, // LDAXRB |
10742 | 414k | 568U, // LDAXRH |
10743 | 414k | 568U, // LDAXRW |
10744 | 414k | 568U, // LDAXRX |
10745 | 414k | 2U, // LDCLRAB |
10746 | 414k | 2U, // LDCLRAH |
10747 | 414k | 2U, // LDCLRALB |
10748 | 414k | 2U, // LDCLRALH |
10749 | 414k | 2U, // LDCLRALW |
10750 | 414k | 2U, // LDCLRALX |
10751 | 414k | 2U, // LDCLRAW |
10752 | 414k | 2U, // LDCLRAX |
10753 | 414k | 2U, // LDCLRB |
10754 | 414k | 2U, // LDCLRH |
10755 | 414k | 2U, // LDCLRLB |
10756 | 414k | 2U, // LDCLRLH |
10757 | 414k | 2U, // LDCLRLW |
10758 | 414k | 2U, // LDCLRLX |
10759 | 414k | 2U, // LDCLRW |
10760 | 414k | 2U, // LDCLRX |
10761 | 414k | 2U, // LDEORAB |
10762 | 414k | 2U, // LDEORAH |
10763 | 414k | 2U, // LDEORALB |
10764 | 414k | 2U, // LDEORALH |
10765 | 414k | 2U, // LDEORALW |
10766 | 414k | 2U, // LDEORALX |
10767 | 414k | 2U, // LDEORAW |
10768 | 414k | 2U, // LDEORAX |
10769 | 414k | 2U, // LDEORB |
10770 | 414k | 2U, // LDEORH |
10771 | 414k | 2U, // LDEORLB |
10772 | 414k | 2U, // LDEORLH |
10773 | 414k | 2U, // LDEORLW |
10774 | 414k | 2U, // LDEORLX |
10775 | 414k | 2U, // LDEORW |
10776 | 414k | 2U, // LDEORX |
10777 | 414k | 72793U, // LDFF1B_D_REAL |
10778 | 414k | 72793U, // LDFF1B_H_REAL |
10779 | 414k | 72793U, // LDFF1B_REAL |
10780 | 414k | 72793U, // LDFF1B_S_REAL |
10781 | 414k | 73817U, // LDFF1D_REAL |
10782 | 414k | 74841U, // LDFF1H_D_REAL |
10783 | 414k | 74841U, // LDFF1H_REAL |
10784 | 414k | 74841U, // LDFF1H_S_REAL |
10785 | 414k | 72793U, // LDFF1SB_D_REAL |
10786 | 414k | 72793U, // LDFF1SB_H_REAL |
10787 | 414k | 72793U, // LDFF1SB_S_REAL |
10788 | 414k | 74841U, // LDFF1SH_D_REAL |
10789 | 414k | 74841U, // LDFF1SH_S_REAL |
10790 | 414k | 76889U, // LDFF1SW_D_REAL |
10791 | 414k | 76889U, // LDFF1W_D_REAL |
10792 | 414k | 76889U, // LDFF1W_REAL |
10793 | 414k | 2437209U, // LDG |
10794 | 414k | 568U, // LDGM |
10795 | 414k | 568U, // LDLARB |
10796 | 414k | 568U, // LDLARH |
10797 | 414k | 568U, // LDLARW |
10798 | 414k | 568U, // LDLARX |
10799 | 414k | 4625497U, // LDNF1B_D_IMM_REAL |
10800 | 414k | 4625497U, // LDNF1B_H_IMM_REAL |
10801 | 414k | 4625497U, // LDNF1B_IMM_REAL |
10802 | 414k | 4625497U, // LDNF1B_S_IMM_REAL |
10803 | 414k | 4625497U, // LDNF1D_IMM_REAL |
10804 | 414k | 4625497U, // LDNF1H_D_IMM_REAL |
10805 | 414k | 4625497U, // LDNF1H_IMM_REAL |
10806 | 414k | 4625497U, // LDNF1H_S_IMM_REAL |
10807 | 414k | 4625497U, // LDNF1SB_D_IMM_REAL |
10808 | 414k | 4625497U, // LDNF1SB_H_IMM_REAL |
10809 | 414k | 4625497U, // LDNF1SB_S_IMM_REAL |
10810 | 414k | 4625497U, // LDNF1SH_D_IMM_REAL |
10811 | 414k | 4625497U, // LDNF1SH_S_IMM_REAL |
10812 | 414k | 4625497U, // LDNF1SW_D_IMM_REAL |
10813 | 414k | 4625497U, // LDNF1W_D_IMM_REAL |
10814 | 414k | 4625497U, // LDNF1W_IMM_REAL |
10815 | 414k | 176295120U, // LDNPDi |
10816 | 414k | 184683728U, // LDNPQi |
10817 | 414k | 193072336U, // LDNPSi |
10818 | 414k | 193072336U, // LDNPWi |
10819 | 414k | 176295120U, // LDNPXi |
10820 | 414k | 4625497U, // LDNT1B_ZRI |
10821 | 414k | 72793U, // LDNT1B_ZRR |
10822 | 414k | 2397272U, // LDNT1B_ZZR_D_REAL |
10823 | 414k | 2397272U, // LDNT1B_ZZR_S_REAL |
10824 | 414k | 4625497U, // LDNT1D_ZRI |
10825 | 414k | 73817U, // LDNT1D_ZRR |
10826 | 414k | 2397272U, // LDNT1D_ZZR_D_REAL |
10827 | 414k | 4625497U, // LDNT1H_ZRI |
10828 | 414k | 74841U, // LDNT1H_ZRR |
10829 | 414k | 2397272U, // LDNT1H_ZZR_D_REAL |
10830 | 414k | 2397272U, // LDNT1H_ZZR_S_REAL |
10831 | 414k | 2397272U, // LDNT1SB_ZZR_D_REAL |
10832 | 414k | 2397272U, // LDNT1SB_ZZR_S_REAL |
10833 | 414k | 2397272U, // LDNT1SH_ZZR_D_REAL |
10834 | 414k | 2397272U, // LDNT1SH_ZZR_S_REAL |
10835 | 414k | 2397272U, // LDNT1SW_ZZR_D_REAL |
10836 | 414k | 4625497U, // LDNT1W_ZRI |
10837 | 414k | 76889U, // LDNT1W_ZRR |
10838 | 414k | 2397272U, // LDNT1W_ZZR_D_REAL |
10839 | 414k | 2397272U, // LDNT1W_ZZR_S_REAL |
10840 | 414k | 176295120U, // LDPDi |
10841 | 414k | 206083281U, // LDPDpost |
10842 | 414k | 2885850321U, // LDPDpre |
10843 | 414k | 184683728U, // LDPQi |
10844 | 414k | 214471889U, // LDPQpost |
10845 | 414k | 2894238929U, // LDPQpre |
10846 | 414k | 193072336U, // LDPSWi |
10847 | 414k | 222860497U, // LDPSWpost |
10848 | 414k | 2902627537U, // LDPSWpre |
10849 | 414k | 193072336U, // LDPSi |
10850 | 414k | 222860497U, // LDPSpost |
10851 | 414k | 2902627537U, // LDPSpre |
10852 | 414k | 193072336U, // LDPWi |
10853 | 414k | 222860497U, // LDPWpost |
10854 | 414k | 2902627537U, // LDPWpre |
10855 | 414k | 176295120U, // LDPXi |
10856 | 414k | 206083281U, // LDPXpost |
10857 | 414k | 2885850321U, // LDPXpre |
10858 | 414k | 79960U, // LDRAAindexed |
10859 | 414k | 4905049U, // LDRAAwriteback |
10860 | 414k | 79960U, // LDRABindexed |
10861 | 414k | 4905049U, // LDRABwriteback |
10862 | 414k | 38465U, // LDRBBpost |
10863 | 414k | 4887641U, // LDRBBpre |
10864 | 414k | 226626648U, // LDRBBroW |
10865 | 414k | 235015256U, // LDRBBroX |
10866 | 414k | 80984U, // LDRBBui |
10867 | 414k | 38465U, // LDRBpost |
10868 | 414k | 4887641U, // LDRBpre |
10869 | 414k | 226626648U, // LDRBroW |
10870 | 414k | 235015256U, // LDRBroX |
10871 | 414k | 80984U, // LDRBui |
10872 | 414k | 1U, // LDRDl |
10873 | 414k | 38465U, // LDRDpost |
10874 | 414k | 4887641U, // LDRDpre |
10875 | 414k | 243403864U, // LDRDroW |
10876 | 414k | 251792472U, // LDRDroX |
10877 | 414k | 82008U, // LDRDui |
10878 | 414k | 38465U, // LDRHHpost |
10879 | 414k | 4887641U, // LDRHHpre |
10880 | 414k | 260181080U, // LDRHHroW |
10881 | 414k | 268569688U, // LDRHHroX |
10882 | 414k | 83032U, // LDRHHui |
10883 | 414k | 38465U, // LDRHpost |
10884 | 414k | 4887641U, // LDRHpre |
10885 | 414k | 260181080U, // LDRHroW |
10886 | 414k | 268569688U, // LDRHroX |
10887 | 414k | 83032U, // LDRHui |
10888 | 414k | 1U, // LDRQl |
10889 | 414k | 38465U, // LDRQpost |
10890 | 414k | 4887641U, // LDRQpre |
10891 | 414k | 276958296U, // LDRQroW |
10892 | 414k | 285346904U, // LDRQroX |
10893 | 414k | 84056U, // LDRQui |
10894 | 414k | 38465U, // LDRSBWpost |
10895 | 414k | 4887641U, // LDRSBWpre |
10896 | 414k | 226626648U, // LDRSBWroW |
10897 | 414k | 235015256U, // LDRSBWroX |
10898 | 414k | 80984U, // LDRSBWui |
10899 | 414k | 38465U, // LDRSBXpost |
10900 | 414k | 4887641U, // LDRSBXpre |
10901 | 414k | 226626648U, // LDRSBXroW |
10902 | 414k | 235015256U, // LDRSBXroX |
10903 | 414k | 80984U, // LDRSBXui |
10904 | 414k | 38465U, // LDRSHWpost |
10905 | 414k | 4887641U, // LDRSHWpre |
10906 | 414k | 260181080U, // LDRSHWroW |
10907 | 414k | 268569688U, // LDRSHWroX |
10908 | 414k | 83032U, // LDRSHWui |
10909 | 414k | 38465U, // LDRSHXpost |
10910 | 414k | 4887641U, // LDRSHXpre |
10911 | 414k | 260181080U, // LDRSHXroW |
10912 | 414k | 268569688U, // LDRSHXroX |
10913 | 414k | 83032U, // LDRSHXui |
10914 | 414k | 1U, // LDRSWl |
10915 | 414k | 38465U, // LDRSWpost |
10916 | 414k | 4887641U, // LDRSWpre |
10917 | 414k | 293735512U, // LDRSWroW |
10918 | 414k | 302124120U, // LDRSWroX |
10919 | 414k | 85080U, // LDRSWui |
10920 | 414k | 1U, // LDRSl |
10921 | 414k | 38465U, // LDRSpost |
10922 | 414k | 4887641U, // LDRSpre |
10923 | 414k | 293735512U, // LDRSroW |
10924 | 414k | 302124120U, // LDRSroX |
10925 | 414k | 85080U, // LDRSui |
10926 | 414k | 1U, // LDRWl |
10927 | 414k | 38465U, // LDRWpost |
10928 | 414k | 4887641U, // LDRWpre |
10929 | 414k | 293735512U, // LDRWroW |
10930 | 414k | 302124120U, // LDRWroX |
10931 | 414k | 85080U, // LDRWui |
10932 | 414k | 1U, // LDRXl |
10933 | 414k | 38465U, // LDRXpost |
10934 | 414k | 4887641U, // LDRXpre |
10935 | 414k | 243403864U, // LDRXroW |
10936 | 414k | 251792472U, // LDRXroX |
10937 | 414k | 82008U, // LDRXui |
10938 | 414k | 4590680U, // LDR_PXI |
10939 | 414k | 0U, // LDR_ZA |
10940 | 414k | 4590680U, // LDR_ZXI |
10941 | 414k | 2U, // LDSETAB |
10942 | 414k | 2U, // LDSETAH |
10943 | 414k | 2U, // LDSETALB |
10944 | 414k | 2U, // LDSETALH |
10945 | 414k | 2U, // LDSETALW |
10946 | 414k | 2U, // LDSETALX |
10947 | 414k | 2U, // LDSETAW |
10948 | 414k | 2U, // LDSETAX |
10949 | 414k | 2U, // LDSETB |
10950 | 414k | 2U, // LDSETH |
10951 | 414k | 2U, // LDSETLB |
10952 | 414k | 2U, // LDSETLH |
10953 | 414k | 2U, // LDSETLW |
10954 | 414k | 2U, // LDSETLX |
10955 | 414k | 2U, // LDSETW |
10956 | 414k | 2U, // LDSETX |
10957 | 414k | 2U, // LDSMAXAB |
10958 | 414k | 2U, // LDSMAXAH |
10959 | 414k | 2U, // LDSMAXALB |
10960 | 414k | 2U, // LDSMAXALH |
10961 | 414k | 2U, // LDSMAXALW |
10962 | 414k | 2U, // LDSMAXALX |
10963 | 414k | 2U, // LDSMAXAW |
10964 | 414k | 2U, // LDSMAXAX |
10965 | 414k | 2U, // LDSMAXB |
10966 | 414k | 2U, // LDSMAXH |
10967 | 414k | 2U, // LDSMAXLB |
10968 | 414k | 2U, // LDSMAXLH |
10969 | 414k | 2U, // LDSMAXLW |
10970 | 414k | 2U, // LDSMAXLX |
10971 | 414k | 2U, // LDSMAXW |
10972 | 414k | 2U, // LDSMAXX |
10973 | 414k | 2U, // LDSMINAB |
10974 | 414k | 2U, // LDSMINAH |
10975 | 414k | 2U, // LDSMINALB |
10976 | 414k | 2U, // LDSMINALH |
10977 | 414k | 2U, // LDSMINALW |
10978 | 414k | 2U, // LDSMINALX |
10979 | 414k | 2U, // LDSMINAW |
10980 | 414k | 2U, // LDSMINAX |
10981 | 414k | 2U, // LDSMINB |
10982 | 414k | 2U, // LDSMINH |
10983 | 414k | 2U, // LDSMINLB |
10984 | 414k | 2U, // LDSMINLH |
10985 | 414k | 2U, // LDSMINLW |
10986 | 414k | 2U, // LDSMINLX |
10987 | 414k | 2U, // LDSMINW |
10988 | 414k | 2U, // LDSMINX |
10989 | 414k | 2362456U, // LDTRBi |
10990 | 414k | 2362456U, // LDTRHi |
10991 | 414k | 2362456U, // LDTRSBWi |
10992 | 414k | 2362456U, // LDTRSBXi |
10993 | 414k | 2362456U, // LDTRSHWi |
10994 | 414k | 2362456U, // LDTRSHXi |
10995 | 414k | 2362456U, // LDTRSWi |
10996 | 414k | 2362456U, // LDTRWi |
10997 | 414k | 2362456U, // LDTRXi |
10998 | 414k | 2U, // LDUMAXAB |
10999 | 414k | 2U, // LDUMAXAH |
11000 | 414k | 2U, // LDUMAXALB |
11001 | 414k | 2U, // LDUMAXALH |
11002 | 414k | 2U, // LDUMAXALW |
11003 | 414k | 2U, // LDUMAXALX |
11004 | 414k | 2U, // LDUMAXAW |
11005 | 414k | 2U, // LDUMAXAX |
11006 | 414k | 2U, // LDUMAXB |
11007 | 414k | 2U, // LDUMAXH |
11008 | 414k | 2U, // LDUMAXLB |
11009 | 414k | 2U, // LDUMAXLH |
11010 | 414k | 2U, // LDUMAXLW |
11011 | 414k | 2U, // LDUMAXLX |
11012 | 414k | 2U, // LDUMAXW |
11013 | 414k | 2U, // LDUMAXX |
11014 | 414k | 2U, // LDUMINAB |
11015 | 414k | 2U, // LDUMINAH |
11016 | 414k | 2U, // LDUMINALB |
11017 | 414k | 2U, // LDUMINALH |
11018 | 414k | 2U, // LDUMINALW |
11019 | 414k | 2U, // LDUMINALX |
11020 | 414k | 2U, // LDUMINAW |
11021 | 414k | 2U, // LDUMINAX |
11022 | 414k | 2U, // LDUMINB |
11023 | 414k | 2U, // LDUMINH |
11024 | 414k | 2U, // LDUMINLB |
11025 | 414k | 2U, // LDUMINLH |
11026 | 414k | 2U, // LDUMINLW |
11027 | 414k | 2U, // LDUMINLX |
11028 | 414k | 2U, // LDUMINW |
11029 | 414k | 2U, // LDUMINX |
11030 | 414k | 2362456U, // LDURBBi |
11031 | 414k | 2362456U, // LDURBi |
11032 | 414k | 2362456U, // LDURDi |
11033 | 414k | 2362456U, // LDURHHi |
11034 | 414k | 2362456U, // LDURHi |
11035 | 414k | 2362456U, // LDURQi |
11036 | 414k | 2362456U, // LDURSBWi |
11037 | 414k | 2362456U, // LDURSBXi |
11038 | 414k | 2362456U, // LDURSHWi |
11039 | 414k | 2362456U, // LDURSHXi |
11040 | 414k | 2362456U, // LDURSWi |
11041 | 414k | 2362456U, // LDURSi |
11042 | 414k | 2362456U, // LDURWi |
11043 | 414k | 2362456U, // LDURXi |
11044 | 414k | 2362576U, // LDXPW |
11045 | 414k | 2362576U, // LDXPX |
11046 | 414k | 568U, // LDXRB |
11047 | 414k | 568U, // LDXRH |
11048 | 414k | 568U, // LDXRW |
11049 | 414k | 568U, // LDXRX |
11050 | 414k | 8530048U, // LSLR_ZPmZ_B |
11051 | 414k | 16914560U, // LSLR_ZPmZ_D |
11052 | 414k | 25832584U, // LSLR_ZPmZ_H |
11053 | 414k | 33697920U, // LSLR_ZPmZ_S |
11054 | 414k | 3160U, // LSLVWr |
11055 | 414k | 3160U, // LSLVXr |
11056 | 414k | 16918656U, // LSL_WIDE_ZPmZ_B |
11057 | 414k | 1584264U, // LSL_WIDE_ZPmZ_H |
11058 | 414k | 16920704U, // LSL_WIDE_ZPmZ_S |
11059 | 414k | 6232U, // LSL_WIDE_ZZZ_B |
11060 | 414k | 192U, // LSL_WIDE_ZZZ_H |
11061 | 414k | 6232U, // LSL_WIDE_ZZZ_S |
11062 | 414k | 141440U, // LSL_ZPmI_B |
11063 | 414k | 137344U, // LSL_ZPmI_D |
11064 | 414k | 1453192U, // LSL_ZPmI_H |
11065 | 414k | 143488U, // LSL_ZPmI_S |
11066 | 414k | 8530048U, // LSL_ZPmZ_B |
11067 | 414k | 16914560U, // LSL_ZPmZ_D |
11068 | 414k | 25832584U, // LSL_ZPmZ_H |
11069 | 414k | 33697920U, // LSL_ZPmZ_S |
11070 | 414k | 3160U, // LSL_ZZI_B |
11071 | 414k | 3160U, // LSL_ZZI_D |
11072 | 414k | 200U, // LSL_ZZI_H |
11073 | 414k | 3160U, // LSL_ZZI_S |
11074 | 414k | 8530048U, // LSRR_ZPmZ_B |
11075 | 414k | 16914560U, // LSRR_ZPmZ_D |
11076 | 414k | 25832584U, // LSRR_ZPmZ_H |
11077 | 414k | 33697920U, // LSRR_ZPmZ_S |
11078 | 414k | 3160U, // LSRVWr |
11079 | 414k | 3160U, // LSRVXr |
11080 | 414k | 16918656U, // LSR_WIDE_ZPmZ_B |
11081 | 414k | 1584264U, // LSR_WIDE_ZPmZ_H |
11082 | 414k | 16920704U, // LSR_WIDE_ZPmZ_S |
11083 | 414k | 6232U, // LSR_WIDE_ZZZ_B |
11084 | 414k | 192U, // LSR_WIDE_ZZZ_H |
11085 | 414k | 6232U, // LSR_WIDE_ZZZ_S |
11086 | 414k | 141440U, // LSR_ZPmI_B |
11087 | 414k | 137344U, // LSR_ZPmI_D |
11088 | 414k | 1453192U, // LSR_ZPmI_H |
11089 | 414k | 143488U, // LSR_ZPmI_S |
11090 | 414k | 8530048U, // LSR_ZPmZ_B |
11091 | 414k | 16914560U, // LSR_ZPmZ_D |
11092 | 414k | 25832584U, // LSR_ZPmZ_H |
11093 | 414k | 33697920U, // LSR_ZPmZ_S |
11094 | 414k | 3160U, // LSR_ZZI_B |
11095 | 414k | 3160U, // LSR_ZZI_D |
11096 | 414k | 200U, // LSR_ZZI_H |
11097 | 414k | 3160U, // LSR_ZZI_S |
11098 | 414k | 134232U, // MADDWrrr |
11099 | 414k | 134232U, // MADDXrrr |
11100 | 414k | 86144U, // MAD_ZPmZZ_B |
11101 | 414k | 134349952U, // MAD_ZPmZZ_D |
11102 | 414k | 28978456U, // MAD_ZPmZZ_H |
11103 | 414k | 142739584U, // MAD_ZPmZZ_S |
11104 | 414k | 8530104U, // MATCH_PPzZZ_B |
11105 | 414k | 25832585U, // MATCH_PPzZZ_H |
11106 | 414k | 86144U, // MLA_ZPmZZ_B |
11107 | 414k | 134349952U, // MLA_ZPmZZ_D |
11108 | 414k | 28978456U, // MLA_ZPmZZ_H |
11109 | 414k | 142739584U, // MLA_ZPmZZ_S |
11110 | 414k | 27133016U, // MLA_ZZZI_D |
11111 | 414k | 39192U, // MLA_ZZZI_H |
11112 | 414k | 27134040U, // MLA_ZZZI_S |
11113 | 414k | 795792U, // MLAv16i8 |
11114 | 414k | 926872U, // MLAv2i32 |
11115 | 414k | 54273176U, // MLAv2i32_indexed |
11116 | 414k | 1057952U, // MLAv4i16 |
11117 | 414k | 52438176U, // MLAv4i16_indexed |
11118 | 414k | 402544U, // MLAv4i32 |
11119 | 414k | 54273136U, // MLAv4i32_indexed |
11120 | 414k | 533624U, // MLAv8i16 |
11121 | 414k | 52438136U, // MLAv8i16_indexed |
11122 | 414k | 1189032U, // MLAv8i8 |
11123 | 414k | 86144U, // MLS_ZPmZZ_B |
11124 | 414k | 134349952U, // MLS_ZPmZZ_D |
11125 | 414k | 28978456U, // MLS_ZPmZZ_H |
11126 | 414k | 142739584U, // MLS_ZPmZZ_S |
11127 | 414k | 27133016U, // MLS_ZZZI_D |
11128 | 414k | 39192U, // MLS_ZZZI_H |
11129 | 414k | 27134040U, // MLS_ZZZI_S |
11130 | 414k | 795792U, // MLSv16i8 |
11131 | 414k | 926872U, // MLSv2i32 |
11132 | 414k | 54273176U, // MLSv2i32_indexed |
11133 | 414k | 1057952U, // MLSv4i16 |
11134 | 414k | 52438176U, // MLSv4i16_indexed |
11135 | 414k | 402544U, // MLSv4i32 |
11136 | 414k | 54273136U, // MLSv4i32_indexed |
11137 | 414k | 533624U, // MLSv8i16 |
11138 | 414k | 52438136U, // MLSv8i16_indexed |
11139 | 414k | 1189032U, // MLSv8i8 |
11140 | 414k | 0U, // MOPSSETGE |
11141 | 414k | 0U, // MOPSSETGEN |
11142 | 414k | 0U, // MOPSSETGET |
11143 | 414k | 0U, // MOPSSETGETN |
11144 | 414k | 2U, // MOVID |
11145 | 414k | 34U, // MOVIv16b_ns |
11146 | 414k | 2U, // MOVIv2d_ns |
11147 | 414k | 586U, // MOVIv2i32 |
11148 | 414k | 586U, // MOVIv2s_msl |
11149 | 414k | 586U, // MOVIv4i16 |
11150 | 414k | 586U, // MOVIv4i32 |
11151 | 414k | 586U, // MOVIv4s_msl |
11152 | 414k | 34U, // MOVIv8b_ns |
11153 | 414k | 586U, // MOVIv8i16 |
11154 | 414k | 1U, // MOVKWi |
11155 | 414k | 1U, // MOVKXi |
11156 | 414k | 586U, // MOVNWi |
11157 | 414k | 586U, // MOVNXi |
11158 | 414k | 0U, // MOVPRFX_ZPmZ_B |
11159 | 414k | 8U, // MOVPRFX_ZPmZ_D |
11160 | 414k | 0U, // MOVPRFX_ZPmZ_H |
11161 | 414k | 16U, // MOVPRFX_ZPmZ_S |
11162 | 414k | 10424U, // MOVPRFX_ZPzZ_B |
11163 | 414k | 6328U, // MOVPRFX_ZPzZ_D |
11164 | 414k | 137U, // MOVPRFX_ZPzZ_H |
11165 | 414k | 12472U, // MOVPRFX_ZPzZ_S |
11166 | 414k | 32U, // MOVPRFX_ZZ |
11167 | 414k | 586U, // MOVZWi |
11168 | 414k | 586U, // MOVZXi |
11169 | 414k | 2U, // MRS |
11170 | 414k | 86144U, // MSB_ZPmZZ_B |
11171 | 414k | 134349952U, // MSB_ZPmZZ_D |
11172 | 414k | 28978456U, // MSB_ZPmZZ_H |
11173 | 414k | 142739584U, // MSB_ZPmZZ_S |
11174 | 414k | 0U, // MSR |
11175 | 414k | 0U, // MSRpstateImm1 |
11176 | 414k | 0U, // MSRpstateImm4 |
11177 | 414k | 0U, // MSRpstatesvcrImm1 |
11178 | 414k | 134232U, // MSUBWrrr |
11179 | 414k | 134232U, // MSUBXrrr |
11180 | 414k | 3160U, // MUL_ZI_B |
11181 | 414k | 3160U, // MUL_ZI_D |
11182 | 414k | 200U, // MUL_ZI_H |
11183 | 414k | 3160U, // MUL_ZI_S |
11184 | 414k | 8530048U, // MUL_ZPmZ_B |
11185 | 414k | 16914560U, // MUL_ZPmZ_D |
11186 | 414k | 25832584U, // MUL_ZPmZ_H |
11187 | 414k | 33697920U, // MUL_ZPmZ_S |
11188 | 414k | 4462680U, // MUL_ZZZI_D |
11189 | 414k | 49288U, // MUL_ZZZI_H |
11190 | 414k | 4468824U, // MUL_ZZZI_S |
11191 | 414k | 10328U, // MUL_ZZZ_B |
11192 | 414k | 6232U, // MUL_ZZZ_D |
11193 | 414k | 136U, // MUL_ZZZ_H |
11194 | 414k | 12376U, // MUL_ZZZ_S |
11195 | 414k | 794768U, // MULv16i8 |
11196 | 414k | 925848U, // MULv2i32 |
11197 | 414k | 163324056U, // MULv2i32_indexed |
11198 | 414k | 1056928U, // MULv4i16 |
11199 | 414k | 161489056U, // MULv4i16_indexed |
11200 | 414k | 401520U, // MULv4i32 |
11201 | 414k | 163324016U, // MULv4i32_indexed |
11202 | 414k | 532600U, // MULv8i16 |
11203 | 414k | 161489016U, // MULv8i16_indexed |
11204 | 414k | 1188008U, // MULv8i8 |
11205 | 414k | 586U, // MVNIv2i32 |
11206 | 414k | 586U, // MVNIv2s_msl |
11207 | 414k | 586U, // MVNIv4i16 |
11208 | 414k | 586U, // MVNIv4i32 |
11209 | 414k | 586U, // MVNIv4s_msl |
11210 | 414k | 586U, // MVNIv8i16 |
11211 | 414k | 8530104U, // NANDS_PPzPP |
11212 | 414k | 8530104U, // NAND_PPzPP |
11213 | 414k | 16914520U, // NBSL_ZZZZ |
11214 | 414k | 0U, // NEG_ZPmZ_B |
11215 | 414k | 8U, // NEG_ZPmZ_D |
11216 | 414k | 0U, // NEG_ZPmZ_H |
11217 | 414k | 16U, // NEG_ZPmZ_S |
11218 | 414k | 24U, // NEGv16i8 |
11219 | 414k | 32U, // NEGv1i64 |
11220 | 414k | 40U, // NEGv2i32 |
11221 | 414k | 48U, // NEGv2i64 |
11222 | 414k | 56U, // NEGv4i16 |
11223 | 414k | 64U, // NEGv4i32 |
11224 | 414k | 72U, // NEGv8i16 |
11225 | 414k | 80U, // NEGv8i8 |
11226 | 414k | 8530104U, // NMATCH_PPzZZ_B |
11227 | 414k | 25832585U, // NMATCH_PPzZZ_H |
11228 | 414k | 8530104U, // NORS_PPzPP |
11229 | 414k | 8530104U, // NOR_PPzPP |
11230 | 414k | 0U, // NOT_ZPmZ_B |
11231 | 414k | 8U, // NOT_ZPmZ_D |
11232 | 414k | 0U, // NOT_ZPmZ_H |
11233 | 414k | 16U, // NOT_ZPmZ_S |
11234 | 414k | 24U, // NOTv16i8 |
11235 | 414k | 80U, // NOTv8i8 |
11236 | 414k | 8530104U, // ORNS_PPzPP |
11237 | 414k | 14424U, // ORNWrs |
11238 | 414k | 14424U, // ORNXrs |
11239 | 414k | 8530104U, // ORN_PPzPP |
11240 | 414k | 794768U, // ORNv16i8 |
11241 | 414k | 1188008U, // ORNv8i8 |
11242 | 414k | 8530104U, // ORRS_PPzPP |
11243 | 414k | 35928U, // ORRWri |
11244 | 414k | 14424U, // ORRWrs |
11245 | 414k | 36952U, // ORRXri |
11246 | 414k | 14424U, // ORRXrs |
11247 | 414k | 8530104U, // ORR_PPzPP |
11248 | 414k | 36952U, // ORR_ZI |
11249 | 414k | 8530048U, // ORR_ZPmZ_B |
11250 | 414k | 16914560U, // ORR_ZPmZ_D |
11251 | 414k | 25832584U, // ORR_ZPmZ_H |
11252 | 414k | 33697920U, // ORR_ZPmZ_S |
11253 | 414k | 6232U, // ORR_ZZZ |
11254 | 414k | 794768U, // ORRv16i8 |
11255 | 414k | 1U, // ORRv2i32 |
11256 | 414k | 1U, // ORRv4i16 |
11257 | 414k | 1U, // ORRv4i32 |
11258 | 414k | 1U, // ORRv8i16 |
11259 | 414k | 1188008U, // ORRv8i8 |
11260 | 414k | 0U, // ORV_VPZ_B |
11261 | 414k | 0U, // ORV_VPZ_D |
11262 | 414k | 0U, // ORV_VPZ_H |
11263 | 414k | 0U, // ORV_VPZ_S |
11264 | 414k | 33U, // PACDA |
11265 | 414k | 33U, // PACDB |
11266 | 414k | 0U, // PACDZA |
11267 | 414k | 0U, // PACDZB |
11268 | 414k | 3160U, // PACGA |
11269 | 414k | 33U, // PACIA |
11270 | 414k | 0U, // PACIA1716 |
11271 | 414k | 0U, // PACIASP |
11272 | 414k | 0U, // PACIAZ |
11273 | 414k | 33U, // PACIB |
11274 | 414k | 0U, // PACIB1716 |
11275 | 414k | 0U, // PACIBSP |
11276 | 414k | 0U, // PACIBZ |
11277 | 414k | 0U, // PACIZA |
11278 | 414k | 0U, // PACIZB |
11279 | 414k | 0U, // PFALSE |
11280 | 414k | 10328U, // PFIRST_B |
11281 | 414k | 12376U, // PMULLB_ZZZ_D |
11282 | 414k | 592U, // PMULLB_ZZZ_H |
11283 | 414k | 0U, // PMULLB_ZZZ_Q |
11284 | 414k | 12376U, // PMULLT_ZZZ_D |
11285 | 414k | 592U, // PMULLT_ZZZ_H |
11286 | 414k | 0U, // PMULLT_ZZZ_Q |
11287 | 414k | 794768U, // PMULLv16i8 |
11288 | 414k | 3U, // PMULLv1i64 |
11289 | 414k | 3U, // PMULLv2i64 |
11290 | 414k | 1188008U, // PMULLv8i8 |
11291 | 414k | 10328U, // PMUL_ZZZ_B |
11292 | 414k | 794768U, // PMULv16i8 |
11293 | 414k | 1188008U, // PMULv8i8 |
11294 | 414k | 10328U, // PNEXT_B |
11295 | 414k | 6232U, // PNEXT_D |
11296 | 414k | 136U, // PNEXT_H |
11297 | 414k | 12376U, // PNEXT_S |
11298 | 414k | 87360U, // PRFB_D_PZI |
11299 | 414k | 600U, // PRFB_D_SCALED |
11300 | 414k | 608U, // PRFB_D_SXTW_SCALED |
11301 | 414k | 616U, // PRFB_D_UXTW_SCALED |
11302 | 414k | 88384U, // PRFB_PRI |
11303 | 414k | 624U, // PRFB_PRR |
11304 | 414k | 87360U, // PRFB_S_PZI |
11305 | 414k | 632U, // PRFB_S_SXTW_SCALED |
11306 | 414k | 640U, // PRFB_S_UXTW_SCALED |
11307 | 414k | 648U, // PRFD_D_PZI |
11308 | 414k | 656U, // PRFD_D_SCALED |
11309 | 414k | 664U, // PRFD_D_SXTW_SCALED |
11310 | 414k | 672U, // PRFD_D_UXTW_SCALED |
11311 | 414k | 88384U, // PRFD_PRI |
11312 | 414k | 680U, // PRFD_PRR |
11313 | 414k | 648U, // PRFD_S_PZI |
11314 | 414k | 688U, // PRFD_S_SXTW_SCALED |
11315 | 414k | 696U, // PRFD_S_UXTW_SCALED |
11316 | 414k | 704U, // PRFH_D_PZI |
11317 | 414k | 712U, // PRFH_D_SCALED |
11318 | 414k | 720U, // PRFH_D_SXTW_SCALED |
11319 | 414k | 728U, // PRFH_D_UXTW_SCALED |
11320 | 414k | 88384U, // PRFH_PRI |
11321 | 414k | 736U, // PRFH_PRR |
11322 | 414k | 704U, // PRFH_S_PZI |
11323 | 414k | 744U, // PRFH_S_SXTW_SCALED |
11324 | 414k | 752U, // PRFH_S_UXTW_SCALED |
11325 | 414k | 1U, // PRFMl |
11326 | 414k | 243403864U, // PRFMroW |
11327 | 414k | 251792472U, // PRFMroX |
11328 | 414k | 82008U, // PRFMui |
11329 | 414k | 760U, // PRFS_PRR |
11330 | 414k | 2362456U, // PRFUMi |
11331 | 414k | 768U, // PRFW_D_PZI |
11332 | 414k | 776U, // PRFW_D_SCALED |
11333 | 414k | 784U, // PRFW_D_SXTW_SCALED |
11334 | 414k | 792U, // PRFW_D_UXTW_SCALED |
11335 | 414k | 88384U, // PRFW_PRI |
11336 | 414k | 768U, // PRFW_S_PZI |
11337 | 414k | 800U, // PRFW_S_SXTW_SCALED |
11338 | 414k | 808U, // PRFW_S_UXTW_SCALED |
11339 | 414k | 4991064U, // PSEL_PPPRI_B |
11340 | 414k | 4986968U, // PSEL_PPPRI_D |
11341 | 414k | 4985944U, // PSEL_PPPRI_H |
11342 | 414k | 4993112U, // PSEL_PPPRI_S |
11343 | 414k | 32U, // PTEST_PP |
11344 | 414k | 33U, // PTRUES_B |
11345 | 414k | 33U, // PTRUES_D |
11346 | 414k | 0U, // PTRUES_H |
11347 | 414k | 33U, // PTRUES_S |
11348 | 414k | 33U, // PTRUE_B |
11349 | 414k | 33U, // PTRUE_D |
11350 | 414k | 0U, // PTRUE_H |
11351 | 414k | 33U, // PTRUE_S |
11352 | 414k | 0U, // PUNPKHI_PP |
11353 | 414k | 0U, // PUNPKLO_PP |
11354 | 414k | 5208U, // RADDHNB_ZZZ_B |
11355 | 414k | 96U, // RADDHNB_ZZZ_H |
11356 | 414k | 6232U, // RADDHNB_ZZZ_S |
11357 | 414k | 7256U, // RADDHNT_ZZZ_B |
11358 | 414k | 16U, // RADDHNT_ZZZ_H |
11359 | 414k | 1112U, // RADDHNT_ZZZ_S |
11360 | 414k | 270440U, // RADDHNv2i64_v2i32 |
11361 | 414k | 271464U, // RADDHNv2i64_v4i32 |
11362 | 414k | 401520U, // RADDHNv4i32_v4i16 |
11363 | 414k | 402544U, // RADDHNv4i32_v8i16 |
11364 | 414k | 533624U, // RADDHNv8i16_v16i8 |
11365 | 414k | 532600U, // RADDHNv8i16_v8i8 |
11366 | 414k | 270440U, // RAX1 |
11367 | 414k | 6232U, // RAX1_ZZZ_D |
11368 | 414k | 32U, // RBITWr |
11369 | 414k | 32U, // RBITXr |
11370 | 414k | 0U, // RBIT_ZPmZ_B |
11371 | 414k | 8U, // RBIT_ZPmZ_D |
11372 | 414k | 0U, // RBIT_ZPmZ_H |
11373 | 414k | 16U, // RBIT_ZPmZ_S |
11374 | 414k | 24U, // RBITv16i8 |
11375 | 414k | 80U, // RBITv8i8 |
11376 | 414k | 816U, // RDFFRS_PPz |
11377 | 414k | 816U, // RDFFR_PPz_REAL |
11378 | 414k | 0U, // RDFFR_P_REAL |
11379 | 414k | 32U, // RDVLI_XI |
11380 | 414k | 0U, // RET |
11381 | 414k | 0U, // RETAA |
11382 | 414k | 0U, // RETAB |
11383 | 414k | 32U, // REV16Wr |
11384 | 414k | 32U, // REV16Xr |
11385 | 414k | 24U, // REV16v16i8 |
11386 | 414k | 80U, // REV16v8i8 |
11387 | 414k | 32U, // REV32Xr |
11388 | 414k | 24U, // REV32v16i8 |
11389 | 414k | 56U, // REV32v4i16 |
11390 | 414k | 72U, // REV32v8i16 |
11391 | 414k | 80U, // REV32v8i8 |
11392 | 414k | 24U, // REV64v16i8 |
11393 | 414k | 40U, // REV64v2i32 |
11394 | 414k | 56U, // REV64v4i16 |
11395 | 414k | 64U, // REV64v4i32 |
11396 | 414k | 72U, // REV64v8i16 |
11397 | 414k | 80U, // REV64v8i8 |
11398 | 414k | 8U, // REVB_ZPmZ_D |
11399 | 414k | 0U, // REVB_ZPmZ_H |
11400 | 414k | 16U, // REVB_ZPmZ_S |
11401 | 414k | 3U, // REVD_ZPmZ |
11402 | 414k | 8U, // REVH_ZPmZ_D |
11403 | 414k | 16U, // REVH_ZPmZ_S |
11404 | 414k | 8U, // REVW_ZPmZ_D |
11405 | 414k | 32U, // REVWr |
11406 | 414k | 32U, // REVXr |
11407 | 414k | 32U, // REV_PP_B |
11408 | 414k | 32U, // REV_PP_D |
11409 | 414k | 0U, // REV_PP_H |
11410 | 414k | 32U, // REV_PP_S |
11411 | 414k | 32U, // REV_ZZ_B |
11412 | 414k | 32U, // REV_ZZ_D |
11413 | 414k | 0U, // REV_ZZ_H |
11414 | 414k | 32U, // REV_ZZ_S |
11415 | 414k | 3160U, // RMIF |
11416 | 414k | 3160U, // RORVWr |
11417 | 414k | 3160U, // RORVXr |
11418 | 414k | 3160U, // RSHRNB_ZZI_B |
11419 | 414k | 200U, // RSHRNB_ZZI_H |
11420 | 414k | 3160U, // RSHRNB_ZZI_S |
11421 | 414k | 37976U, // RSHRNT_ZZI_B |
11422 | 414k | 320U, // RSHRNT_ZZI_H |
11423 | 414k | 37976U, // RSHRNT_ZZI_S |
11424 | 414k | 38008U, // RSHRNv16i8_shift |
11425 | 414k | 3176U, // RSHRNv2i32_shift |
11426 | 414k | 3184U, // RSHRNv4i16_shift |
11427 | 414k | 37992U, // RSHRNv4i32_shift |
11428 | 414k | 38000U, // RSHRNv8i16_shift |
11429 | 414k | 3192U, // RSHRNv8i8_shift |
11430 | 414k | 5208U, // RSUBHNB_ZZZ_B |
11431 | 414k | 96U, // RSUBHNB_ZZZ_H |
11432 | 414k | 6232U, // RSUBHNB_ZZZ_S |
11433 | 414k | 7256U, // RSUBHNT_ZZZ_B |
11434 | 414k | 16U, // RSUBHNT_ZZZ_H |
11435 | 414k | 1112U, // RSUBHNT_ZZZ_S |
11436 | 414k | 270440U, // RSUBHNv2i64_v2i32 |
11437 | 414k | 271464U, // RSUBHNv2i64_v4i32 |
11438 | 414k | 401520U, // RSUBHNv4i32_v4i16 |
11439 | 414k | 402544U, // RSUBHNv4i32_v8i16 |
11440 | 414k | 533624U, // RSUBHNv8i16_v16i8 |
11441 | 414k | 532600U, // RSUBHNv8i16_v8i8 |
11442 | 414k | 2136U, // SABALB_ZZZ_D |
11443 | 414k | 0U, // SABALB_ZZZ_H |
11444 | 414k | 7256U, // SABALB_ZZZ_S |
11445 | 414k | 2136U, // SABALT_ZZZ_D |
11446 | 414k | 0U, // SABALT_ZZZ_H |
11447 | 414k | 7256U, // SABALT_ZZZ_S |
11448 | 414k | 795792U, // SABALv16i8_v8i16 |
11449 | 414k | 926872U, // SABALv2i32_v2i64 |
11450 | 414k | 1057952U, // SABALv4i16_v4i32 |
11451 | 414k | 402544U, // SABALv4i32_v2i64 |
11452 | 414k | 533624U, // SABALv8i16_v4i32 |
11453 | 414k | 1189032U, // SABALv8i8_v8i16 |
11454 | 414k | 1U, // SABA_ZZZ_B |
11455 | 414k | 1112U, // SABA_ZZZ_D |
11456 | 414k | 280U, // SABA_ZZZ_H |
11457 | 414k | 2136U, // SABA_ZZZ_S |
11458 | 414k | 795792U, // SABAv16i8 |
11459 | 414k | 926872U, // SABAv2i32 |
11460 | 414k | 1057952U, // SABAv4i16 |
11461 | 414k | 402544U, // SABAv4i32 |
11462 | 414k | 533624U, // SABAv8i16 |
11463 | 414k | 1189032U, // SABAv8i8 |
11464 | 414k | 12376U, // SABDLB_ZZZ_D |
11465 | 414k | 592U, // SABDLB_ZZZ_H |
11466 | 414k | 5208U, // SABDLB_ZZZ_S |
11467 | 414k | 12376U, // SABDLT_ZZZ_D |
11468 | 414k | 592U, // SABDLT_ZZZ_H |
11469 | 414k | 5208U, // SABDLT_ZZZ_S |
11470 | 414k | 794768U, // SABDLv16i8_v8i16 |
11471 | 414k | 925848U, // SABDLv2i32_v2i64 |
11472 | 414k | 1056928U, // SABDLv4i16_v4i32 |
11473 | 414k | 401520U, // SABDLv4i32_v2i64 |
11474 | 414k | 532600U, // SABDLv8i16_v4i32 |
11475 | 414k | 1188008U, // SABDLv8i8_v8i16 |
11476 | 414k | 8530048U, // SABD_ZPmZ_B |
11477 | 414k | 16914560U, // SABD_ZPmZ_D |
11478 | 414k | 25832584U, // SABD_ZPmZ_H |
11479 | 414k | 33697920U, // SABD_ZPmZ_S |
11480 | 414k | 794768U, // SABDv16i8 |
11481 | 414k | 925848U, // SABDv2i32 |
11482 | 414k | 1056928U, // SABDv4i16 |
11483 | 414k | 401520U, // SABDv4i32 |
11484 | 414k | 532600U, // SABDv8i16 |
11485 | 414k | 1188008U, // SABDv8i8 |
11486 | 414k | 2176U, // SADALP_ZPmZ_D |
11487 | 414k | 0U, // SADALP_ZPmZ_H |
11488 | 414k | 7296U, // SADALP_ZPmZ_S |
11489 | 414k | 24U, // SADALPv16i8_v8i16 |
11490 | 414k | 40U, // SADALPv2i32_v1i64 |
11491 | 414k | 56U, // SADALPv4i16_v2i32 |
11492 | 414k | 64U, // SADALPv4i32_v2i64 |
11493 | 414k | 72U, // SADALPv8i16_v4i32 |
11494 | 414k | 80U, // SADALPv8i8_v4i16 |
11495 | 414k | 12376U, // SADDLBT_ZZZ_D |
11496 | 414k | 592U, // SADDLBT_ZZZ_H |
11497 | 414k | 5208U, // SADDLBT_ZZZ_S |
11498 | 414k | 12376U, // SADDLB_ZZZ_D |
11499 | 414k | 592U, // SADDLB_ZZZ_H |
11500 | 414k | 5208U, // SADDLB_ZZZ_S |
11501 | 414k | 24U, // SADDLPv16i8_v8i16 |
11502 | 414k | 40U, // SADDLPv2i32_v1i64 |
11503 | 414k | 56U, // SADDLPv4i16_v2i32 |
11504 | 414k | 64U, // SADDLPv4i32_v2i64 |
11505 | 414k | 72U, // SADDLPv8i16_v4i32 |
11506 | 414k | 80U, // SADDLPv8i8_v4i16 |
11507 | 414k | 12376U, // SADDLT_ZZZ_D |
11508 | 414k | 592U, // SADDLT_ZZZ_H |
11509 | 414k | 5208U, // SADDLT_ZZZ_S |
11510 | 414k | 24U, // SADDLVv16i8v |
11511 | 414k | 56U, // SADDLVv4i16v |
11512 | 414k | 64U, // SADDLVv4i32v |
11513 | 414k | 72U, // SADDLVv8i16v |
11514 | 414k | 80U, // SADDLVv8i8v |
11515 | 414k | 794768U, // SADDLv16i8_v8i16 |
11516 | 414k | 925848U, // SADDLv2i32_v2i64 |
11517 | 414k | 1056928U, // SADDLv4i16_v4i32 |
11518 | 414k | 401520U, // SADDLv4i32_v2i64 |
11519 | 414k | 532600U, // SADDLv8i16_v4i32 |
11520 | 414k | 1188008U, // SADDLv8i8_v8i16 |
11521 | 414k | 0U, // SADDV_VPZ_B |
11522 | 414k | 0U, // SADDV_VPZ_H |
11523 | 414k | 0U, // SADDV_VPZ_S |
11524 | 414k | 12376U, // SADDWB_ZZZ_D |
11525 | 414k | 592U, // SADDWB_ZZZ_H |
11526 | 414k | 5208U, // SADDWB_ZZZ_S |
11527 | 414k | 12376U, // SADDWT_ZZZ_D |
11528 | 414k | 592U, // SADDWT_ZZZ_H |
11529 | 414k | 5208U, // SADDWT_ZZZ_S |
11530 | 414k | 794744U, // SADDWv16i8_v8i16 |
11531 | 414k | 925800U, // SADDWv2i32_v2i64 |
11532 | 414k | 1056880U, // SADDWv4i16_v4i32 |
11533 | 414k | 401512U, // SADDWv4i32_v2i64 |
11534 | 414k | 532592U, // SADDWv8i16_v4i32 |
11535 | 414k | 1187960U, // SADDWv8i8_v8i16 |
11536 | 414k | 0U, // SB |
11537 | 414k | 1112U, // SBCLB_ZZZ_D |
11538 | 414k | 2136U, // SBCLB_ZZZ_S |
11539 | 414k | 1112U, // SBCLT_ZZZ_D |
11540 | 414k | 2136U, // SBCLT_ZZZ_S |
11541 | 414k | 3160U, // SBCSWr |
11542 | 414k | 3160U, // SBCSXr |
11543 | 414k | 3160U, // SBCWr |
11544 | 414k | 3160U, // SBCXr |
11545 | 414k | 134232U, // SBFMWri |
11546 | 414k | 134232U, // SBFMXri |
11547 | 414k | 10328U, // SCLAMP_ZZZ_B |
11548 | 414k | 6232U, // SCLAMP_ZZZ_D |
11549 | 414k | 136U, // SCLAMP_ZZZ_H |
11550 | 414k | 12376U, // SCLAMP_ZZZ_S |
11551 | 414k | 3160U, // SCVTFSWDri |
11552 | 414k | 3160U, // SCVTFSWHri |
11553 | 414k | 3160U, // SCVTFSWSri |
11554 | 414k | 3160U, // SCVTFSXDri |
11555 | 414k | 3160U, // SCVTFSXHri |
11556 | 414k | 3160U, // SCVTFSXSri |
11557 | 414k | 32U, // SCVTFUWDri |
11558 | 414k | 32U, // SCVTFUWHri |
11559 | 414k | 32U, // SCVTFUWSri |
11560 | 414k | 32U, // SCVTFUXDri |
11561 | 414k | 32U, // SCVTFUXHri |
11562 | 414k | 32U, // SCVTFUXSri |
11563 | 414k | 8U, // SCVTF_ZPmZ_DtoD |
11564 | 414k | 2U, // SCVTF_ZPmZ_DtoH |
11565 | 414k | 8U, // SCVTF_ZPmZ_DtoS |
11566 | 414k | 0U, // SCVTF_ZPmZ_HtoH |
11567 | 414k | 16U, // SCVTF_ZPmZ_StoD |
11568 | 414k | 1U, // SCVTF_ZPmZ_StoH |
11569 | 414k | 16U, // SCVTF_ZPmZ_StoS |
11570 | 414k | 3160U, // SCVTFd |
11571 | 414k | 3160U, // SCVTFh |
11572 | 414k | 3160U, // SCVTFs |
11573 | 414k | 32U, // SCVTFv1i16 |
11574 | 414k | 32U, // SCVTFv1i32 |
11575 | 414k | 32U, // SCVTFv1i64 |
11576 | 414k | 40U, // SCVTFv2f32 |
11577 | 414k | 48U, // SCVTFv2f64 |
11578 | 414k | 3224U, // SCVTFv2i32_shift |
11579 | 414k | 3176U, // SCVTFv2i64_shift |
11580 | 414k | 56U, // SCVTFv4f16 |
11581 | 414k | 64U, // SCVTFv4f32 |
11582 | 414k | 3232U, // SCVTFv4i16_shift |
11583 | 414k | 3184U, // SCVTFv4i32_shift |
11584 | 414k | 72U, // SCVTFv8f16 |
11585 | 414k | 3192U, // SCVTFv8i16_shift |
11586 | 414k | 16914560U, // SDIVR_ZPmZ_D |
11587 | 414k | 33697920U, // SDIVR_ZPmZ_S |
11588 | 414k | 3160U, // SDIVWr |
11589 | 414k | 3160U, // SDIVXr |
11590 | 414k | 16914560U, // SDIV_ZPmZ_D |
11591 | 414k | 33697920U, // SDIV_ZPmZ_S |
11592 | 414k | 27139160U, // SDOT_ZZZI_D |
11593 | 414k | 38913U, // SDOT_ZZZI_S |
11594 | 414k | 7256U, // SDOT_ZZZ_D |
11595 | 414k | 1U, // SDOT_ZZZ_S |
11596 | 414k | 5121168U, // SDOTlanev16i8 |
11597 | 414k | 5121192U, // SDOTlanev8i8 |
11598 | 414k | 795792U, // SDOTv16i8 |
11599 | 414k | 1189032U, // SDOTv8i8 |
11600 | 414k | 8530008U, // SEL_PPPP |
11601 | 414k | 8530008U, // SEL_ZPZZ_B |
11602 | 414k | 16914520U, // SEL_ZPZZ_D |
11603 | 414k | 25832584U, // SEL_ZPZZ_H |
11604 | 414k | 33697880U, // SEL_ZPZZ_S |
11605 | 414k | 0U, // SETE |
11606 | 414k | 0U, // SETEN |
11607 | 414k | 0U, // SETET |
11608 | 414k | 0U, // SETETN |
11609 | 414k | 0U, // SETF16 |
11610 | 414k | 0U, // SETF8 |
11611 | 414k | 0U, // SETFFR |
11612 | 414k | 0U, // SETGM |
11613 | 414k | 0U, // SETGMN |
11614 | 414k | 0U, // SETGMT |
11615 | 414k | 0U, // SETGMTN |
11616 | 414k | 0U, // SETGP |
11617 | 414k | 0U, // SETGPN |
11618 | 414k | 0U, // SETGPT |
11619 | 414k | 0U, // SETGPTN |
11620 | 414k | 0U, // SETM |
11621 | 414k | 0U, // SETMN |
11622 | 414k | 0U, // SETMT |
11623 | 414k | 0U, // SETMTN |
11624 | 414k | 0U, // SETP |
11625 | 414k | 0U, // SETPN |
11626 | 414k | 0U, // SETPT |
11627 | 414k | 0U, // SETPTN |
11628 | 414k | 402521U, // SHA1Crrr |
11629 | 414k | 32U, // SHA1Hrr |
11630 | 414k | 402521U, // SHA1Mrrr |
11631 | 414k | 402521U, // SHA1Prrr |
11632 | 414k | 402544U, // SHA1SU0rrr |
11633 | 414k | 64U, // SHA1SU1rr |
11634 | 414k | 402521U, // SHA256H2rrr |
11635 | 414k | 402521U, // SHA256Hrrr |
11636 | 414k | 64U, // SHA256SU0rr |
11637 | 414k | 402544U, // SHA256SU1rrr |
11638 | 414k | 271449U, // SHA512H |
11639 | 414k | 271449U, // SHA512H2 |
11640 | 414k | 48U, // SHA512SU0 |
11641 | 414k | 271464U, // SHA512SU1 |
11642 | 414k | 8530048U, // SHADD_ZPmZ_B |
11643 | 414k | 16914560U, // SHADD_ZPmZ_D |
11644 | 414k | 25832584U, // SHADD_ZPmZ_H |
11645 | 414k | 33697920U, // SHADD_ZPmZ_S |
11646 | 414k | 794768U, // SHADDv16i8 |
11647 | 414k | 925848U, // SHADDv2i32 |
11648 | 414k | 1056928U, // SHADDv4i16 |
11649 | 414k | 401520U, // SHADDv4i32 |
11650 | 414k | 532600U, // SHADDv8i16 |
11651 | 414k | 1188008U, // SHADDv8i8 |
11652 | 414k | 824U, // SHLLv16i8 |
11653 | 414k | 832U, // SHLLv2i32 |
11654 | 414k | 840U, // SHLLv4i16 |
11655 | 414k | 848U, // SHLLv4i32 |
11656 | 414k | 856U, // SHLLv8i16 |
11657 | 414k | 864U, // SHLLv8i8 |
11658 | 414k | 3160U, // SHLd |
11659 | 414k | 3216U, // SHLv16i8_shift |
11660 | 414k | 3224U, // SHLv2i32_shift |
11661 | 414k | 3176U, // SHLv2i64_shift |
11662 | 414k | 3232U, // SHLv4i16_shift |
11663 | 414k | 3184U, // SHLv4i32_shift |
11664 | 414k | 3192U, // SHLv8i16_shift |
11665 | 414k | 3240U, // SHLv8i8_shift |
11666 | 414k | 3160U, // SHRNB_ZZI_B |
11667 | 414k | 200U, // SHRNB_ZZI_H |
11668 | 414k | 3160U, // SHRNB_ZZI_S |
11669 | 414k | 37976U, // SHRNT_ZZI_B |
11670 | 414k | 320U, // SHRNT_ZZI_H |
11671 | 414k | 37976U, // SHRNT_ZZI_S |
11672 | 414k | 38008U, // SHRNv16i8_shift |
11673 | 414k | 3176U, // SHRNv2i32_shift |
11674 | 414k | 3184U, // SHRNv4i16_shift |
11675 | 414k | 37992U, // SHRNv4i32_shift |
11676 | 414k | 38000U, // SHRNv8i16_shift |
11677 | 414k | 3192U, // SHRNv8i8_shift |
11678 | 414k | 8530048U, // SHSUBR_ZPmZ_B |
11679 | 414k | 16914560U, // SHSUBR_ZPmZ_D |
11680 | 414k | 25832584U, // SHSUBR_ZPmZ_H |
11681 | 414k | 33697920U, // SHSUBR_ZPmZ_S |
11682 | 414k | 8530048U, // SHSUB_ZPmZ_B |
11683 | 414k | 16914560U, // SHSUB_ZPmZ_D |
11684 | 414k | 25832584U, // SHSUB_ZPmZ_H |
11685 | 414k | 33697920U, // SHSUB_ZPmZ_S |
11686 | 414k | 794768U, // SHSUBv16i8 |
11687 | 414k | 925848U, // SHSUBv2i32 |
11688 | 414k | 1056928U, // SHSUBv4i16 |
11689 | 414k | 401520U, // SHSUBv4i32 |
11690 | 414k | 532600U, // SHSUBv8i16 |
11691 | 414k | 1188008U, // SHSUBv8i8 |
11692 | 414k | 321U, // SLI_ZZI_B |
11693 | 414k | 37976U, // SLI_ZZI_D |
11694 | 414k | 320U, // SLI_ZZI_H |
11695 | 414k | 37976U, // SLI_ZZI_S |
11696 | 414k | 37977U, // SLId |
11697 | 414k | 38032U, // SLIv16i8_shift |
11698 | 414k | 38040U, // SLIv2i32_shift |
11699 | 414k | 37992U, // SLIv2i64_shift |
11700 | 414k | 38048U, // SLIv4i16_shift |
11701 | 414k | 38000U, // SLIv4i32_shift |
11702 | 414k | 38008U, // SLIv8i16_shift |
11703 | 414k | 38056U, // SLIv8i8_shift |
11704 | 414k | 402544U, // SM3PARTW1 |
11705 | 414k | 402544U, // SM3PARTW2 |
11706 | 414k | 3266584688U, // SM3SS1 |
11707 | 414k | 54273136U, // SM3TT1A |
11708 | 414k | 54273136U, // SM3TT1B |
11709 | 414k | 54273136U, // SM3TT2A |
11710 | 414k | 54273136U, // SM3TT2B |
11711 | 414k | 64U, // SM4E |
11712 | 414k | 12376U, // SM4EKEY_ZZZ_S |
11713 | 414k | 401520U, // SM4ENCKEY |
11714 | 414k | 12376U, // SM4E_ZZZ_S |
11715 | 414k | 134232U, // SMADDLrrr |
11716 | 414k | 8530048U, // SMAXP_ZPmZ_B |
11717 | 414k | 16914560U, // SMAXP_ZPmZ_D |
11718 | 414k | 25832584U, // SMAXP_ZPmZ_H |
11719 | 414k | 33697920U, // SMAXP_ZPmZ_S |
11720 | 414k | 794768U, // SMAXPv16i8 |
11721 | 414k | 925848U, // SMAXPv2i32 |
11722 | 414k | 1056928U, // SMAXPv4i16 |
11723 | 414k | 401520U, // SMAXPv4i32 |
11724 | 414k | 532600U, // SMAXPv8i16 |
11725 | 414k | 1188008U, // SMAXPv8i8 |
11726 | 414k | 0U, // SMAXV_VPZ_B |
11727 | 414k | 0U, // SMAXV_VPZ_D |
11728 | 414k | 0U, // SMAXV_VPZ_H |
11729 | 414k | 0U, // SMAXV_VPZ_S |
11730 | 414k | 24U, // SMAXVv16i8v |
11731 | 414k | 56U, // SMAXVv4i16v |
11732 | 414k | 64U, // SMAXVv4i32v |
11733 | 414k | 72U, // SMAXVv8i16v |
11734 | 414k | 80U, // SMAXVv8i8v |
11735 | 414k | 3160U, // SMAX_ZI_B |
11736 | 414k | 3160U, // SMAX_ZI_D |
11737 | 414k | 200U, // SMAX_ZI_H |
11738 | 414k | 3160U, // SMAX_ZI_S |
11739 | 414k | 8530048U, // SMAX_ZPmZ_B |
11740 | 414k | 16914560U, // SMAX_ZPmZ_D |
11741 | 414k | 25832584U, // SMAX_ZPmZ_H |
11742 | 414k | 33697920U, // SMAX_ZPmZ_S |
11743 | 414k | 794768U, // SMAXv16i8 |
11744 | 414k | 925848U, // SMAXv2i32 |
11745 | 414k | 1056928U, // SMAXv4i16 |
11746 | 414k | 401520U, // SMAXv4i32 |
11747 | 414k | 532600U, // SMAXv8i16 |
11748 | 414k | 1188008U, // SMAXv8i8 |
11749 | 414k | 0U, // SMC |
11750 | 414k | 8530048U, // SMINP_ZPmZ_B |
11751 | 414k | 16914560U, // SMINP_ZPmZ_D |
11752 | 414k | 25832584U, // SMINP_ZPmZ_H |
11753 | 414k | 33697920U, // SMINP_ZPmZ_S |
11754 | 414k | 794768U, // SMINPv16i8 |
11755 | 414k | 925848U, // SMINPv2i32 |
11756 | 414k | 1056928U, // SMINPv4i16 |
11757 | 414k | 401520U, // SMINPv4i32 |
11758 | 414k | 532600U, // SMINPv8i16 |
11759 | 414k | 1188008U, // SMINPv8i8 |
11760 | 414k | 0U, // SMINV_VPZ_B |
11761 | 414k | 0U, // SMINV_VPZ_D |
11762 | 414k | 0U, // SMINV_VPZ_H |
11763 | 414k | 0U, // SMINV_VPZ_S |
11764 | 414k | 24U, // SMINVv16i8v |
11765 | 414k | 56U, // SMINVv4i16v |
11766 | 414k | 64U, // SMINVv4i32v |
11767 | 414k | 72U, // SMINVv8i16v |
11768 | 414k | 80U, // SMINVv8i8v |
11769 | 414k | 3160U, // SMIN_ZI_B |
11770 | 414k | 3160U, // SMIN_ZI_D |
11771 | 414k | 200U, // SMIN_ZI_H |
11772 | 414k | 3160U, // SMIN_ZI_S |
11773 | 414k | 8530048U, // SMIN_ZPmZ_B |
11774 | 414k | 16914560U, // SMIN_ZPmZ_D |
11775 | 414k | 25832584U, // SMIN_ZPmZ_H |
11776 | 414k | 33697920U, // SMIN_ZPmZ_S |
11777 | 414k | 794768U, // SMINv16i8 |
11778 | 414k | 925848U, // SMINv2i32 |
11779 | 414k | 1056928U, // SMINv4i16 |
11780 | 414k | 401520U, // SMINv4i32 |
11781 | 414k | 532600U, // SMINv8i16 |
11782 | 414k | 1188008U, // SMINv8i8 |
11783 | 414k | 27134040U, // SMLALB_ZZZI_D |
11784 | 414k | 27139160U, // SMLALB_ZZZI_S |
11785 | 414k | 2136U, // SMLALB_ZZZ_D |
11786 | 414k | 0U, // SMLALB_ZZZ_H |
11787 | 414k | 7256U, // SMLALB_ZZZ_S |
11788 | 414k | 27134040U, // SMLALT_ZZZI_D |
11789 | 414k | 27139160U, // SMLALT_ZZZI_S |
11790 | 414k | 2136U, // SMLALT_ZZZ_D |
11791 | 414k | 0U, // SMLALT_ZZZ_H |
11792 | 414k | 7256U, // SMLALT_ZZZ_S |
11793 | 414k | 795792U, // SMLALv16i8_v8i16 |
11794 | 414k | 54273176U, // SMLALv2i32_indexed |
11795 | 414k | 926872U, // SMLALv2i32_v2i64 |
11796 | 414k | 52438176U, // SMLALv4i16_indexed |
11797 | 414k | 1057952U, // SMLALv4i16_v4i32 |
11798 | 414k | 54273136U, // SMLALv4i32_indexed |
11799 | 414k | 402544U, // SMLALv4i32_v2i64 |
11800 | 414k | 52438136U, // SMLALv8i16_indexed |
11801 | 414k | 533624U, // SMLALv8i16_v4i32 |
11802 | 414k | 1189032U, // SMLALv8i8_v8i16 |
11803 | 414k | 27134040U, // SMLSLB_ZZZI_D |
11804 | 414k | 27139160U, // SMLSLB_ZZZI_S |
11805 | 414k | 2136U, // SMLSLB_ZZZ_D |
11806 | 414k | 0U, // SMLSLB_ZZZ_H |
11807 | 414k | 7256U, // SMLSLB_ZZZ_S |
11808 | 414k | 27134040U, // SMLSLT_ZZZI_D |
11809 | 414k | 27139160U, // SMLSLT_ZZZI_S |
11810 | 414k | 2136U, // SMLSLT_ZZZ_D |
11811 | 414k | 0U, // SMLSLT_ZZZ_H |
11812 | 414k | 7256U, // SMLSLT_ZZZ_S |
11813 | 414k | 795792U, // SMLSLv16i8_v8i16 |
11814 | 414k | 54273176U, // SMLSLv2i32_indexed |
11815 | 414k | 926872U, // SMLSLv2i32_v2i64 |
11816 | 414k | 52438176U, // SMLSLv4i16_indexed |
11817 | 414k | 1057952U, // SMLSLv4i16_v4i32 |
11818 | 414k | 54273136U, // SMLSLv4i32_indexed |
11819 | 414k | 402544U, // SMLSLv4i32_v2i64 |
11820 | 414k | 52438136U, // SMLSLv8i16_indexed |
11821 | 414k | 533624U, // SMLSLv8i16_v4i32 |
11822 | 414k | 1189032U, // SMLSLv8i8_v8i16 |
11823 | 414k | 795792U, // SMMLA |
11824 | 414k | 1U, // SMMLA_ZZZ |
11825 | 414k | 0U, // SMOPA_MPPZZ_D |
11826 | 414k | 0U, // SMOPA_MPPZZ_S |
11827 | 414k | 0U, // SMOPS_MPPZZ_D |
11828 | 414k | 0U, // SMOPS_MPPZZ_S |
11829 | 414k | 43352U, // SMOVvi16to32 |
11830 | 414k | 43352U, // SMOVvi16to32_idx0 |
11831 | 414k | 43352U, // SMOVvi16to64 |
11832 | 414k | 43352U, // SMOVvi16to64_idx0 |
11833 | 414k | 43360U, // SMOVvi32to64 |
11834 | 414k | 43360U, // SMOVvi32to64_idx0 |
11835 | 414k | 43376U, // SMOVvi8to32 |
11836 | 414k | 43376U, // SMOVvi8to32_idx0 |
11837 | 414k | 43376U, // SMOVvi8to64 |
11838 | 414k | 43376U, // SMOVvi8to64_idx0 |
11839 | 414k | 134232U, // SMSUBLrrr |
11840 | 414k | 8530048U, // SMULH_ZPmZ_B |
11841 | 414k | 16914560U, // SMULH_ZPmZ_D |
11842 | 414k | 25832584U, // SMULH_ZPmZ_H |
11843 | 414k | 33697920U, // SMULH_ZPmZ_S |
11844 | 414k | 10328U, // SMULH_ZZZ_B |
11845 | 414k | 6232U, // SMULH_ZZZ_D |
11846 | 414k | 136U, // SMULH_ZZZ_H |
11847 | 414k | 12376U, // SMULH_ZZZ_S |
11848 | 414k | 3160U, // SMULHrr |
11849 | 414k | 4468824U, // SMULLB_ZZZI_D |
11850 | 414k | 4461656U, // SMULLB_ZZZI_S |
11851 | 414k | 12376U, // SMULLB_ZZZ_D |
11852 | 414k | 592U, // SMULLB_ZZZ_H |
11853 | 414k | 5208U, // SMULLB_ZZZ_S |
11854 | 414k | 4468824U, // SMULLT_ZZZI_D |
11855 | 414k | 4461656U, // SMULLT_ZZZI_S |
11856 | 414k | 12376U, // SMULLT_ZZZ_D |
11857 | 414k | 592U, // SMULLT_ZZZ_H |
11858 | 414k | 5208U, // SMULLT_ZZZ_S |
11859 | 414k | 794768U, // SMULLv16i8_v8i16 |
11860 | 414k | 163324056U, // SMULLv2i32_indexed |
11861 | 414k | 925848U, // SMULLv2i32_v2i64 |
11862 | 414k | 161489056U, // SMULLv4i16_indexed |
11863 | 414k | 1056928U, // SMULLv4i16_v4i32 |
11864 | 414k | 163324016U, // SMULLv4i32_indexed |
11865 | 414k | 401520U, // SMULLv4i32_v2i64 |
11866 | 414k | 161489016U, // SMULLv8i16_indexed |
11867 | 414k | 532600U, // SMULLv8i16_v4i32 |
11868 | 414k | 1188008U, // SMULLv8i8_v8i16 |
11869 | 414k | 89176U, // SPLICE_ZPZZ_B |
11870 | 414k | 90200U, // SPLICE_ZPZZ_D |
11871 | 414k | 872U, // SPLICE_ZPZZ_H |
11872 | 414k | 91224U, // SPLICE_ZPZZ_S |
11873 | 414k | 8530008U, // SPLICE_ZPZ_B |
11874 | 414k | 16914520U, // SPLICE_ZPZ_D |
11875 | 414k | 25832584U, // SPLICE_ZPZ_H |
11876 | 414k | 33697880U, // SPLICE_ZPZ_S |
11877 | 414k | 0U, // SQABS_ZPmZ_B |
11878 | 414k | 8U, // SQABS_ZPmZ_D |
11879 | 414k | 0U, // SQABS_ZPmZ_H |
11880 | 414k | 16U, // SQABS_ZPmZ_S |
11881 | 414k | 24U, // SQABSv16i8 |
11882 | 414k | 32U, // SQABSv1i16 |
11883 | 414k | 32U, // SQABSv1i32 |
11884 | 414k | 32U, // SQABSv1i64 |
11885 | 414k | 32U, // SQABSv1i8 |
11886 | 414k | 40U, // SQABSv2i32 |
11887 | 414k | 48U, // SQABSv2i64 |
11888 | 414k | 56U, // SQABSv4i16 |
11889 | 414k | 64U, // SQABSv4i32 |
11890 | 414k | 72U, // SQABSv8i16 |
11891 | 414k | 80U, // SQABSv8i8 |
11892 | 414k | 16472U, // SQADD_ZI_B |
11893 | 414k | 17496U, // SQADD_ZI_D |
11894 | 414k | 176U, // SQADD_ZI_H |
11895 | 414k | 18520U, // SQADD_ZI_S |
11896 | 414k | 8530048U, // SQADD_ZPmZ_B |
11897 | 414k | 16914560U, // SQADD_ZPmZ_D |
11898 | 414k | 25832584U, // SQADD_ZPmZ_H |
11899 | 414k | 33697920U, // SQADD_ZPmZ_S |
11900 | 414k | 10328U, // SQADD_ZZZ_B |
11901 | 414k | 6232U, // SQADD_ZZZ_D |
11902 | 414k | 136U, // SQADD_ZZZ_H |
11903 | 414k | 12376U, // SQADD_ZZZ_S |
11904 | 414k | 794768U, // SQADDv16i8 |
11905 | 414k | 3160U, // SQADDv1i16 |
11906 | 414k | 3160U, // SQADDv1i32 |
11907 | 414k | 3160U, // SQADDv1i64 |
11908 | 414k | 3160U, // SQADDv1i8 |
11909 | 414k | 925848U, // SQADDv2i32 |
11910 | 414k | 270440U, // SQADDv2i64 |
11911 | 414k | 1056928U, // SQADDv4i16 |
11912 | 414k | 401520U, // SQADDv4i32 |
11913 | 414k | 532600U, // SQADDv8i16 |
11914 | 414k | 1188008U, // SQADDv8i8 |
11915 | 414k | 67250264U, // SQCADD_ZZI_B |
11916 | 414k | 67246168U, // SQCADD_ZZI_D |
11917 | 414k | 2239624U, // SQCADD_ZZI_H |
11918 | 414k | 67252312U, // SQCADD_ZZI_S |
11919 | 414k | 1U, // SQDECB_XPiI |
11920 | 414k | 3U, // SQDECB_XPiWdI |
11921 | 414k | 1U, // SQDECD_XPiI |
11922 | 414k | 3U, // SQDECD_XPiWdI |
11923 | 414k | 1U, // SQDECD_ZPiI |
11924 | 414k | 1U, // SQDECH_XPiI |
11925 | 414k | 3U, // SQDECH_XPiWdI |
11926 | 414k | 0U, // SQDECH_ZPiI |
11927 | 414k | 92248U, // SQDECP_XPWd_B |
11928 | 414k | 92248U, // SQDECP_XPWd_D |
11929 | 414k | 92248U, // SQDECP_XPWd_H |
11930 | 414k | 92248U, // SQDECP_XPWd_S |
11931 | 414k | 32U, // SQDECP_XP_B |
11932 | 414k | 32U, // SQDECP_XP_D |
11933 | 414k | 32U, // SQDECP_XP_H |
11934 | 414k | 32U, // SQDECP_XP_S |
11935 | 414k | 32U, // SQDECP_ZP_D |
11936 | 414k | 0U, // SQDECP_ZP_H |
11937 | 414k | 32U, // SQDECP_ZP_S |
11938 | 414k | 1U, // SQDECW_XPiI |
11939 | 414k | 3U, // SQDECW_XPiWdI |
11940 | 414k | 1U, // SQDECW_ZPiI |
11941 | 414k | 2136U, // SQDMLALBT_ZZZ_D |
11942 | 414k | 0U, // SQDMLALBT_ZZZ_H |
11943 | 414k | 7256U, // SQDMLALBT_ZZZ_S |
11944 | 414k | 27134040U, // SQDMLALB_ZZZI_D |
11945 | 414k | 27139160U, // SQDMLALB_ZZZI_S |
11946 | 414k | 2136U, // SQDMLALB_ZZZ_D |
11947 | 414k | 0U, // SQDMLALB_ZZZ_H |
11948 | 414k | 7256U, // SQDMLALB_ZZZ_S |
11949 | 414k | 27134040U, // SQDMLALT_ZZZI_D |
11950 | 414k | 27139160U, // SQDMLALT_ZZZI_S |
11951 | 414k | 2136U, // SQDMLALT_ZZZ_D |
11952 | 414k | 0U, // SQDMLALT_ZZZ_H |
11953 | 414k | 7256U, // SQDMLALT_ZZZ_S |
11954 | 414k | 37977U, // SQDMLALi16 |
11955 | 414k | 37977U, // SQDMLALi32 |
11956 | 414k | 52438105U, // SQDMLALv1i32_indexed |
11957 | 414k | 54273113U, // SQDMLALv1i64_indexed |
11958 | 414k | 54273176U, // SQDMLALv2i32_indexed |
11959 | 414k | 926872U, // SQDMLALv2i32_v2i64 |
11960 | 414k | 52438176U, // SQDMLALv4i16_indexed |
11961 | 414k | 1057952U, // SQDMLALv4i16_v4i32 |
11962 | 414k | 54273136U, // SQDMLALv4i32_indexed |
11963 | 414k | 402544U, // SQDMLALv4i32_v2i64 |
11964 | 414k | 52438136U, // SQDMLALv8i16_indexed |
11965 | 414k | 533624U, // SQDMLALv8i16_v4i32 |
11966 | 414k | 2136U, // SQDMLSLBT_ZZZ_D |
11967 | 414k | 0U, // SQDMLSLBT_ZZZ_H |
11968 | 414k | 7256U, // SQDMLSLBT_ZZZ_S |
11969 | 414k | 27134040U, // SQDMLSLB_ZZZI_D |
11970 | 414k | 27139160U, // SQDMLSLB_ZZZI_S |
11971 | 414k | 2136U, // SQDMLSLB_ZZZ_D |
11972 | 414k | 0U, // SQDMLSLB_ZZZ_H |
11973 | 414k | 7256U, // SQDMLSLB_ZZZ_S |
11974 | 414k | 27134040U, // SQDMLSLT_ZZZI_D |
11975 | 414k | 27139160U, // SQDMLSLT_ZZZI_S |
11976 | 414k | 2136U, // SQDMLSLT_ZZZ_D |
11977 | 414k | 0U, // SQDMLSLT_ZZZ_H |
11978 | 414k | 7256U, // SQDMLSLT_ZZZ_S |
11979 | 414k | 37977U, // SQDMLSLi16 |
11980 | 414k | 37977U, // SQDMLSLi32 |
11981 | 414k | 52438105U, // SQDMLSLv1i32_indexed |
11982 | 414k | 54273113U, // SQDMLSLv1i64_indexed |
11983 | 414k | 54273176U, // SQDMLSLv2i32_indexed |
11984 | 414k | 926872U, // SQDMLSLv2i32_v2i64 |
11985 | 414k | 52438176U, // SQDMLSLv4i16_indexed |
11986 | 414k | 1057952U, // SQDMLSLv4i16_v4i32 |
11987 | 414k | 54273136U, // SQDMLSLv4i32_indexed |
11988 | 414k | 402544U, // SQDMLSLv4i32_v2i64 |
11989 | 414k | 52438136U, // SQDMLSLv8i16_indexed |
11990 | 414k | 533624U, // SQDMLSLv8i16_v4i32 |
11991 | 414k | 4462680U, // SQDMULH_ZZZI_D |
11992 | 414k | 49288U, // SQDMULH_ZZZI_H |
11993 | 414k | 4468824U, // SQDMULH_ZZZI_S |
11994 | 414k | 10328U, // SQDMULH_ZZZ_B |
11995 | 414k | 6232U, // SQDMULH_ZZZ_D |
11996 | 414k | 136U, // SQDMULH_ZZZ_H |
11997 | 414k | 12376U, // SQDMULH_ZZZ_S |
11998 | 414k | 3160U, // SQDMULHv1i16 |
11999 | 414k | 161488984U, // SQDMULHv1i16_indexed |
12000 | 414k | 3160U, // SQDMULHv1i32 |
12001 | 414k | 163323992U, // SQDMULHv1i32_indexed |
12002 | 414k | 925848U, // SQDMULHv2i32 |
12003 | 414k | 163324056U, // SQDMULHv2i32_indexed |
12004 | 414k | 1056928U, // SQDMULHv4i16 |
12005 | 414k | 161489056U, // SQDMULHv4i16_indexed |
12006 | 414k | 401520U, // SQDMULHv4i32 |
12007 | 414k | 163324016U, // SQDMULHv4i32_indexed |
12008 | 414k | 532600U, // SQDMULHv8i16 |
12009 | 414k | 161489016U, // SQDMULHv8i16_indexed |
12010 | 414k | 4468824U, // SQDMULLB_ZZZI_D |
12011 | 414k | 4461656U, // SQDMULLB_ZZZI_S |
12012 | 414k | 12376U, // SQDMULLB_ZZZ_D |
12013 | 414k | 592U, // SQDMULLB_ZZZ_H |
12014 | 414k | 5208U, // SQDMULLB_ZZZ_S |
12015 | 414k | 4468824U, // SQDMULLT_ZZZI_D |
12016 | 414k | 4461656U, // SQDMULLT_ZZZI_S |
12017 | 414k | 12376U, // SQDMULLT_ZZZ_D |
12018 | 414k | 592U, // SQDMULLT_ZZZ_H |
12019 | 414k | 5208U, // SQDMULLT_ZZZ_S |
12020 | 414k | 3160U, // SQDMULLi16 |
12021 | 414k | 3160U, // SQDMULLi32 |
12022 | 414k | 161488984U, // SQDMULLv1i32_indexed |
12023 | 414k | 163323992U, // SQDMULLv1i64_indexed |
12024 | 414k | 163324056U, // SQDMULLv2i32_indexed |
12025 | 414k | 925848U, // SQDMULLv2i32_v2i64 |
12026 | 414k | 161489056U, // SQDMULLv4i16_indexed |
12027 | 414k | 1056928U, // SQDMULLv4i16_v4i32 |
12028 | 414k | 163324016U, // SQDMULLv4i32_indexed |
12029 | 414k | 401520U, // SQDMULLv4i32_v2i64 |
12030 | 414k | 161489016U, // SQDMULLv8i16_indexed |
12031 | 414k | 532600U, // SQDMULLv8i16_v4i32 |
12032 | 414k | 1U, // SQINCB_XPiI |
12033 | 414k | 3U, // SQINCB_XPiWdI |
12034 | 414k | 1U, // SQINCD_XPiI |
12035 | 414k | 3U, // SQINCD_XPiWdI |
12036 | 414k | 1U, // SQINCD_ZPiI |
12037 | 414k | 1U, // SQINCH_XPiI |
12038 | 414k | 3U, // SQINCH_XPiWdI |
12039 | 414k | 0U, // SQINCH_ZPiI |
12040 | 414k | 92248U, // SQINCP_XPWd_B |
12041 | 414k | 92248U, // SQINCP_XPWd_D |
12042 | 414k | 92248U, // SQINCP_XPWd_H |
12043 | 414k | 92248U, // SQINCP_XPWd_S |
12044 | 414k | 32U, // SQINCP_XP_B |
12045 | 414k | 32U, // SQINCP_XP_D |
12046 | 414k | 32U, // SQINCP_XP_H |
12047 | 414k | 32U, // SQINCP_XP_S |
12048 | 414k | 32U, // SQINCP_ZP_D |
12049 | 414k | 0U, // SQINCP_ZP_H |
12050 | 414k | 32U, // SQINCP_ZP_S |
12051 | 414k | 1U, // SQINCW_XPiI |
12052 | 414k | 3U, // SQINCW_XPiWdI |
12053 | 414k | 1U, // SQINCW_ZPiI |
12054 | 414k | 0U, // SQNEG_ZPmZ_B |
12055 | 414k | 8U, // SQNEG_ZPmZ_D |
12056 | 414k | 0U, // SQNEG_ZPmZ_H |
12057 | 414k | 16U, // SQNEG_ZPmZ_S |
12058 | 414k | 24U, // SQNEGv16i8 |
12059 | 414k | 32U, // SQNEGv1i16 |
12060 | 414k | 32U, // SQNEGv1i32 |
12061 | 414k | 32U, // SQNEGv1i64 |
12062 | 414k | 32U, // SQNEGv1i8 |
12063 | 414k | 40U, // SQNEGv2i32 |
12064 | 414k | 48U, // SQNEGv2i64 |
12065 | 414k | 56U, // SQNEGv4i16 |
12066 | 414k | 64U, // SQNEGv4i32 |
12067 | 414k | 72U, // SQNEGv8i16 |
12068 | 414k | 80U, // SQNEGv8i8 |
12069 | 414k | 92444952U, // SQRDCMLAH_ZZZI_H |
12070 | 414k | 1159596120U, // SQRDCMLAH_ZZZI_S |
12071 | 414k | 2501633U, // SQRDCMLAH_ZZZ_B |
12072 | 414k | 100795480U, // SQRDCMLAH_ZZZ_D |
12073 | 414k | 2501912U, // SQRDCMLAH_ZZZ_H |
12074 | 414k | 100796504U, // SQRDCMLAH_ZZZ_S |
12075 | 414k | 27133016U, // SQRDMLAH_ZZZI_D |
12076 | 414k | 39192U, // SQRDMLAH_ZZZI_H |
12077 | 414k | 27134040U, // SQRDMLAH_ZZZI_S |
12078 | 414k | 1U, // SQRDMLAH_ZZZ_B |
12079 | 414k | 1112U, // SQRDMLAH_ZZZ_D |
12080 | 414k | 280U, // SQRDMLAH_ZZZ_H |
12081 | 414k | 2136U, // SQRDMLAH_ZZZ_S |
12082 | 414k | 52438105U, // SQRDMLAHi16_indexed |
12083 | 414k | 54273113U, // SQRDMLAHi32_indexed |
12084 | 414k | 37977U, // SQRDMLAHv1i16 |
12085 | 414k | 37977U, // SQRDMLAHv1i32 |
12086 | 414k | 926872U, // SQRDMLAHv2i32 |
12087 | 414k | 54273176U, // SQRDMLAHv2i32_indexed |
12088 | 414k | 1057952U, // SQRDMLAHv4i16 |
12089 | 414k | 52438176U, // SQRDMLAHv4i16_indexed |
12090 | 414k | 402544U, // SQRDMLAHv4i32 |
12091 | 414k | 54273136U, // SQRDMLAHv4i32_indexed |
12092 | 414k | 533624U, // SQRDMLAHv8i16 |
12093 | 414k | 52438136U, // SQRDMLAHv8i16_indexed |
12094 | 414k | 27133016U, // SQRDMLSH_ZZZI_D |
12095 | 414k | 39192U, // SQRDMLSH_ZZZI_H |
12096 | 414k | 27134040U, // SQRDMLSH_ZZZI_S |
12097 | 414k | 1U, // SQRDMLSH_ZZZ_B |
12098 | 414k | 1112U, // SQRDMLSH_ZZZ_D |
12099 | 414k | 280U, // SQRDMLSH_ZZZ_H |
12100 | 414k | 2136U, // SQRDMLSH_ZZZ_S |
12101 | 414k | 52438105U, // SQRDMLSHi16_indexed |
12102 | 414k | 54273113U, // SQRDMLSHi32_indexed |
12103 | 414k | 37977U, // SQRDMLSHv1i16 |
12104 | 414k | 37977U, // SQRDMLSHv1i32 |
12105 | 414k | 926872U, // SQRDMLSHv2i32 |
12106 | 414k | 54273176U, // SQRDMLSHv2i32_indexed |
12107 | 414k | 1057952U, // SQRDMLSHv4i16 |
12108 | 414k | 52438176U, // SQRDMLSHv4i16_indexed |
12109 | 414k | 402544U, // SQRDMLSHv4i32 |
12110 | 414k | 54273136U, // SQRDMLSHv4i32_indexed |
12111 | 414k | 533624U, // SQRDMLSHv8i16 |
12112 | 414k | 52438136U, // SQRDMLSHv8i16_indexed |
12113 | 414k | 4462680U, // SQRDMULH_ZZZI_D |
12114 | 414k | 49288U, // SQRDMULH_ZZZI_H |
12115 | 414k | 4468824U, // SQRDMULH_ZZZI_S |
12116 | 414k | 10328U, // SQRDMULH_ZZZ_B |
12117 | 414k | 6232U, // SQRDMULH_ZZZ_D |
12118 | 414k | 136U, // SQRDMULH_ZZZ_H |
12119 | 414k | 12376U, // SQRDMULH_ZZZ_S |
12120 | 414k | 3160U, // SQRDMULHv1i16 |
12121 | 414k | 161488984U, // SQRDMULHv1i16_indexed |
12122 | 414k | 3160U, // SQRDMULHv1i32 |
12123 | 414k | 163323992U, // SQRDMULHv1i32_indexed |
12124 | 414k | 925848U, // SQRDMULHv2i32 |
12125 | 414k | 163324056U, // SQRDMULHv2i32_indexed |
12126 | 414k | 1056928U, // SQRDMULHv4i16 |
12127 | 414k | 161489056U, // SQRDMULHv4i16_indexed |
12128 | 414k | 401520U, // SQRDMULHv4i32 |
12129 | 414k | 163324016U, // SQRDMULHv4i32_indexed |
12130 | 414k | 532600U, // SQRDMULHv8i16 |
12131 | 414k | 161489016U, // SQRDMULHv8i16_indexed |
12132 | 414k | 8530048U, // SQRSHLR_ZPmZ_B |
12133 | 414k | 16914560U, // SQRSHLR_ZPmZ_D |
12134 | 414k | 25832584U, // SQRSHLR_ZPmZ_H |
12135 | 414k | 33697920U, // SQRSHLR_ZPmZ_S |
12136 | 414k | 8530048U, // SQRSHL_ZPmZ_B |
12137 | 414k | 16914560U, // SQRSHL_ZPmZ_D |
12138 | 414k | 25832584U, // SQRSHL_ZPmZ_H |
12139 | 414k | 33697920U, // SQRSHL_ZPmZ_S |
12140 | 414k | 794768U, // SQRSHLv16i8 |
12141 | 414k | 3160U, // SQRSHLv1i16 |
12142 | 414k | 3160U, // SQRSHLv1i32 |
12143 | 414k | 3160U, // SQRSHLv1i64 |
12144 | 414k | 3160U, // SQRSHLv1i8 |
12145 | 414k | 925848U, // SQRSHLv2i32 |
12146 | 414k | 270440U, // SQRSHLv2i64 |
12147 | 414k | 1056928U, // SQRSHLv4i16 |
12148 | 414k | 401520U, // SQRSHLv4i32 |
12149 | 414k | 532600U, // SQRSHLv8i16 |
12150 | 414k | 1188008U, // SQRSHLv8i8 |
12151 | 414k | 3160U, // SQRSHRNB_ZZI_B |
12152 | 414k | 200U, // SQRSHRNB_ZZI_H |
12153 | 414k | 3160U, // SQRSHRNB_ZZI_S |
12154 | 414k | 37976U, // SQRSHRNT_ZZI_B |
12155 | 414k | 320U, // SQRSHRNT_ZZI_H |
12156 | 414k | 37976U, // SQRSHRNT_ZZI_S |
12157 | 414k | 3160U, // SQRSHRNb |
12158 | 414k | 3160U, // SQRSHRNh |
12159 | 414k | 3160U, // SQRSHRNs |
12160 | 414k | 38008U, // SQRSHRNv16i8_shift |
12161 | 414k | 3176U, // SQRSHRNv2i32_shift |
12162 | 414k | 3184U, // SQRSHRNv4i16_shift |
12163 | 414k | 37992U, // SQRSHRNv4i32_shift |
12164 | 414k | 38000U, // SQRSHRNv8i16_shift |
12165 | 414k | 3192U, // SQRSHRNv8i8_shift |
12166 | 414k | 3160U, // SQRSHRUNB_ZZI_B |
12167 | 414k | 200U, // SQRSHRUNB_ZZI_H |
12168 | 414k | 3160U, // SQRSHRUNB_ZZI_S |
12169 | 414k | 37976U, // SQRSHRUNT_ZZI_B |
12170 | 414k | 320U, // SQRSHRUNT_ZZI_H |
12171 | 414k | 37976U, // SQRSHRUNT_ZZI_S |
12172 | 414k | 3160U, // SQRSHRUNb |
12173 | 414k | 3160U, // SQRSHRUNh |
12174 | 414k | 3160U, // SQRSHRUNs |
12175 | 414k | 38008U, // SQRSHRUNv16i8_shift |
12176 | 414k | 3176U, // SQRSHRUNv2i32_shift |
12177 | 414k | 3184U, // SQRSHRUNv4i16_shift |
12178 | 414k | 37992U, // SQRSHRUNv4i32_shift |
12179 | 414k | 38000U, // SQRSHRUNv8i16_shift |
12180 | 414k | 3192U, // SQRSHRUNv8i8_shift |
12181 | 414k | 8530048U, // SQSHLR_ZPmZ_B |
12182 | 414k | 16914560U, // SQSHLR_ZPmZ_D |
12183 | 414k | 25832584U, // SQSHLR_ZPmZ_H |
12184 | 414k | 33697920U, // SQSHLR_ZPmZ_S |
12185 | 414k | 141440U, // SQSHLU_ZPmI_B |
12186 | 414k | 137344U, // SQSHLU_ZPmI_D |
12187 | 414k | 1453192U, // SQSHLU_ZPmI_H |
12188 | 414k | 143488U, // SQSHLU_ZPmI_S |
12189 | 414k | 3160U, // SQSHLUb |
12190 | 414k | 3160U, // SQSHLUd |
12191 | 414k | 3160U, // SQSHLUh |
12192 | 414k | 3160U, // SQSHLUs |
12193 | 414k | 3216U, // SQSHLUv16i8_shift |
12194 | 414k | 3224U, // SQSHLUv2i32_shift |
12195 | 414k | 3176U, // SQSHLUv2i64_shift |
12196 | 414k | 3232U, // SQSHLUv4i16_shift |
12197 | 414k | 3184U, // SQSHLUv4i32_shift |
12198 | 414k | 3192U, // SQSHLUv8i16_shift |
12199 | 414k | 3240U, // SQSHLUv8i8_shift |
12200 | 414k | 141440U, // SQSHL_ZPmI_B |
12201 | 414k | 137344U, // SQSHL_ZPmI_D |
12202 | 414k | 1453192U, // SQSHL_ZPmI_H |
12203 | 414k | 143488U, // SQSHL_ZPmI_S |
12204 | 414k | 8530048U, // SQSHL_ZPmZ_B |
12205 | 414k | 16914560U, // SQSHL_ZPmZ_D |
12206 | 414k | 25832584U, // SQSHL_ZPmZ_H |
12207 | 414k | 33697920U, // SQSHL_ZPmZ_S |
12208 | 414k | 3160U, // SQSHLb |
12209 | 414k | 3160U, // SQSHLd |
12210 | 414k | 3160U, // SQSHLh |
12211 | 414k | 3160U, // SQSHLs |
12212 | 414k | 794768U, // SQSHLv16i8 |
12213 | 414k | 3216U, // SQSHLv16i8_shift |
12214 | 414k | 3160U, // SQSHLv1i16 |
12215 | 414k | 3160U, // SQSHLv1i32 |
12216 | 414k | 3160U, // SQSHLv1i64 |
12217 | 414k | 3160U, // SQSHLv1i8 |
12218 | 414k | 925848U, // SQSHLv2i32 |
12219 | 414k | 3224U, // SQSHLv2i32_shift |
12220 | 414k | 270440U, // SQSHLv2i64 |
12221 | 414k | 3176U, // SQSHLv2i64_shift |
12222 | 414k | 1056928U, // SQSHLv4i16 |
12223 | 414k | 3232U, // SQSHLv4i16_shift |
12224 | 414k | 401520U, // SQSHLv4i32 |
12225 | 414k | 3184U, // SQSHLv4i32_shift |
12226 | 414k | 532600U, // SQSHLv8i16 |
12227 | 414k | 3192U, // SQSHLv8i16_shift |
12228 | 414k | 1188008U, // SQSHLv8i8 |
12229 | 414k | 3240U, // SQSHLv8i8_shift |
12230 | 414k | 3160U, // SQSHRNB_ZZI_B |
12231 | 414k | 200U, // SQSHRNB_ZZI_H |
12232 | 414k | 3160U, // SQSHRNB_ZZI_S |
12233 | 414k | 37976U, // SQSHRNT_ZZI_B |
12234 | 414k | 320U, // SQSHRNT_ZZI_H |
12235 | 414k | 37976U, // SQSHRNT_ZZI_S |
12236 | 414k | 3160U, // SQSHRNb |
12237 | 414k | 3160U, // SQSHRNh |
12238 | 414k | 3160U, // SQSHRNs |
12239 | 414k | 38008U, // SQSHRNv16i8_shift |
12240 | 414k | 3176U, // SQSHRNv2i32_shift |
12241 | 414k | 3184U, // SQSHRNv4i16_shift |
12242 | 414k | 37992U, // SQSHRNv4i32_shift |
12243 | 414k | 38000U, // SQSHRNv8i16_shift |
12244 | 414k | 3192U, // SQSHRNv8i8_shift |
12245 | 414k | 3160U, // SQSHRUNB_ZZI_B |
12246 | 414k | 200U, // SQSHRUNB_ZZI_H |
12247 | 414k | 3160U, // SQSHRUNB_ZZI_S |
12248 | 414k | 37976U, // SQSHRUNT_ZZI_B |
12249 | 414k | 320U, // SQSHRUNT_ZZI_H |
12250 | 414k | 37976U, // SQSHRUNT_ZZI_S |
12251 | 414k | 3160U, // SQSHRUNb |
12252 | 414k | 3160U, // SQSHRUNh |
12253 | 414k | 3160U, // SQSHRUNs |
12254 | 414k | 38008U, // SQSHRUNv16i8_shift |
12255 | 414k | 3176U, // SQSHRUNv2i32_shift |
12256 | 414k | 3184U, // SQSHRUNv4i16_shift |
12257 | 414k | 37992U, // SQSHRUNv4i32_shift |
12258 | 414k | 38000U, // SQSHRUNv8i16_shift |
12259 | 414k | 3192U, // SQSHRUNv8i8_shift |
12260 | 414k | 8530048U, // SQSUBR_ZPmZ_B |
12261 | 414k | 16914560U, // SQSUBR_ZPmZ_D |
12262 | 414k | 25832584U, // SQSUBR_ZPmZ_H |
12263 | 414k | 33697920U, // SQSUBR_ZPmZ_S |
12264 | 414k | 16472U, // SQSUB_ZI_B |
12265 | 414k | 17496U, // SQSUB_ZI_D |
12266 | 414k | 176U, // SQSUB_ZI_H |
12267 | 414k | 18520U, // SQSUB_ZI_S |
12268 | 414k | 8530048U, // SQSUB_ZPmZ_B |
12269 | 414k | 16914560U, // SQSUB_ZPmZ_D |
12270 | 414k | 25832584U, // SQSUB_ZPmZ_H |
12271 | 414k | 33697920U, // SQSUB_ZPmZ_S |
12272 | 414k | 10328U, // SQSUB_ZZZ_B |
12273 | 414k | 6232U, // SQSUB_ZZZ_D |
12274 | 414k | 136U, // SQSUB_ZZZ_H |
12275 | 414k | 12376U, // SQSUB_ZZZ_S |
12276 | 414k | 794768U, // SQSUBv16i8 |
12277 | 414k | 3160U, // SQSUBv1i16 |
12278 | 414k | 3160U, // SQSUBv1i32 |
12279 | 414k | 3160U, // SQSUBv1i64 |
12280 | 414k | 3160U, // SQSUBv1i8 |
12281 | 414k | 925848U, // SQSUBv2i32 |
12282 | 414k | 270440U, // SQSUBv2i64 |
12283 | 414k | 1056928U, // SQSUBv4i16 |
12284 | 414k | 401520U, // SQSUBv4i32 |
12285 | 414k | 532600U, // SQSUBv8i16 |
12286 | 414k | 1188008U, // SQSUBv8i8 |
12287 | 414k | 32U, // SQXTNB_ZZ_B |
12288 | 414k | 0U, // SQXTNB_ZZ_H |
12289 | 414k | 32U, // SQXTNB_ZZ_S |
12290 | 414k | 32U, // SQXTNT_ZZ_B |
12291 | 414k | 0U, // SQXTNT_ZZ_H |
12292 | 414k | 32U, // SQXTNT_ZZ_S |
12293 | 414k | 72U, // SQXTNv16i8 |
12294 | 414k | 32U, // SQXTNv1i16 |
12295 | 414k | 32U, // SQXTNv1i32 |
12296 | 414k | 32U, // SQXTNv1i8 |
12297 | 414k | 48U, // SQXTNv2i32 |
12298 | 414k | 64U, // SQXTNv4i16 |
12299 | 414k | 48U, // SQXTNv4i32 |
12300 | 414k | 64U, // SQXTNv8i16 |
12301 | 414k | 72U, // SQXTNv8i8 |
12302 | 414k | 32U, // SQXTUNB_ZZ_B |
12303 | 414k | 0U, // SQXTUNB_ZZ_H |
12304 | 414k | 32U, // SQXTUNB_ZZ_S |
12305 | 414k | 32U, // SQXTUNT_ZZ_B |
12306 | 414k | 0U, // SQXTUNT_ZZ_H |
12307 | 414k | 32U, // SQXTUNT_ZZ_S |
12308 | 414k | 72U, // SQXTUNv16i8 |
12309 | 414k | 32U, // SQXTUNv1i16 |
12310 | 414k | 32U, // SQXTUNv1i32 |
12311 | 414k | 32U, // SQXTUNv1i8 |
12312 | 414k | 48U, // SQXTUNv2i32 |
12313 | 414k | 64U, // SQXTUNv4i16 |
12314 | 414k | 48U, // SQXTUNv4i32 |
12315 | 414k | 64U, // SQXTUNv8i16 |
12316 | 414k | 72U, // SQXTUNv8i8 |
12317 | 414k | 8530048U, // SRHADD_ZPmZ_B |
12318 | 414k | 16914560U, // SRHADD_ZPmZ_D |
12319 | 414k | 25832584U, // SRHADD_ZPmZ_H |
12320 | 414k | 33697920U, // SRHADD_ZPmZ_S |
12321 | 414k | 794768U, // SRHADDv16i8 |
12322 | 414k | 925848U, // SRHADDv2i32 |
12323 | 414k | 1056928U, // SRHADDv4i16 |
12324 | 414k | 401520U, // SRHADDv4i32 |
12325 | 414k | 532600U, // SRHADDv8i16 |
12326 | 414k | 1188008U, // SRHADDv8i8 |
12327 | 414k | 321U, // SRI_ZZI_B |
12328 | 414k | 37976U, // SRI_ZZI_D |
12329 | 414k | 320U, // SRI_ZZI_H |
12330 | 414k | 37976U, // SRI_ZZI_S |
12331 | 414k | 37977U, // SRId |
12332 | 414k | 38032U, // SRIv16i8_shift |
12333 | 414k | 38040U, // SRIv2i32_shift |
12334 | 414k | 37992U, // SRIv2i64_shift |
12335 | 414k | 38048U, // SRIv4i16_shift |
12336 | 414k | 38000U, // SRIv4i32_shift |
12337 | 414k | 38008U, // SRIv8i16_shift |
12338 | 414k | 38056U, // SRIv8i8_shift |
12339 | 414k | 8530048U, // SRSHLR_ZPmZ_B |
12340 | 414k | 16914560U, // SRSHLR_ZPmZ_D |
12341 | 414k | 25832584U, // SRSHLR_ZPmZ_H |
12342 | 414k | 33697920U, // SRSHLR_ZPmZ_S |
12343 | 414k | 8530048U, // SRSHL_ZPmZ_B |
12344 | 414k | 16914560U, // SRSHL_ZPmZ_D |
12345 | 414k | 25832584U, // SRSHL_ZPmZ_H |
12346 | 414k | 33697920U, // SRSHL_ZPmZ_S |
12347 | 414k | 794768U, // SRSHLv16i8 |
12348 | 414k | 3160U, // SRSHLv1i64 |
12349 | 414k | 925848U, // SRSHLv2i32 |
12350 | 414k | 270440U, // SRSHLv2i64 |
12351 | 414k | 1056928U, // SRSHLv4i16 |
12352 | 414k | 401520U, // SRSHLv4i32 |
12353 | 414k | 532600U, // SRSHLv8i16 |
12354 | 414k | 1188008U, // SRSHLv8i8 |
12355 | 414k | 141440U, // SRSHR_ZPmI_B |
12356 | 414k | 137344U, // SRSHR_ZPmI_D |
12357 | 414k | 1453192U, // SRSHR_ZPmI_H |
12358 | 414k | 143488U, // SRSHR_ZPmI_S |
12359 | 414k | 3160U, // SRSHRd |
12360 | 414k | 3216U, // SRSHRv16i8_shift |
12361 | 414k | 3224U, // SRSHRv2i32_shift |
12362 | 414k | 3176U, // SRSHRv2i64_shift |
12363 | 414k | 3232U, // SRSHRv4i16_shift |
12364 | 414k | 3184U, // SRSHRv4i32_shift |
12365 | 414k | 3192U, // SRSHRv8i16_shift |
12366 | 414k | 3240U, // SRSHRv8i8_shift |
12367 | 414k | 321U, // SRSRA_ZZI_B |
12368 | 414k | 37976U, // SRSRA_ZZI_D |
12369 | 414k | 320U, // SRSRA_ZZI_H |
12370 | 414k | 37976U, // SRSRA_ZZI_S |
12371 | 414k | 37977U, // SRSRAd |
12372 | 414k | 38032U, // SRSRAv16i8_shift |
12373 | 414k | 38040U, // SRSRAv2i32_shift |
12374 | 414k | 37992U, // SRSRAv2i64_shift |
12375 | 414k | 38048U, // SRSRAv4i16_shift |
12376 | 414k | 38000U, // SRSRAv4i32_shift |
12377 | 414k | 38008U, // SRSRAv8i16_shift |
12378 | 414k | 38056U, // SRSRAv8i8_shift |
12379 | 414k | 3160U, // SSHLLB_ZZI_D |
12380 | 414k | 200U, // SSHLLB_ZZI_H |
12381 | 414k | 3160U, // SSHLLB_ZZI_S |
12382 | 414k | 3160U, // SSHLLT_ZZI_D |
12383 | 414k | 200U, // SSHLLT_ZZI_H |
12384 | 414k | 3160U, // SSHLLT_ZZI_S |
12385 | 414k | 3216U, // SSHLLv16i8_shift |
12386 | 414k | 3224U, // SSHLLv2i32_shift |
12387 | 414k | 3232U, // SSHLLv4i16_shift |
12388 | 414k | 3184U, // SSHLLv4i32_shift |
12389 | 414k | 3192U, // SSHLLv8i16_shift |
12390 | 414k | 3240U, // SSHLLv8i8_shift |
12391 | 414k | 794768U, // SSHLv16i8 |
12392 | 414k | 3160U, // SSHLv1i64 |
12393 | 414k | 925848U, // SSHLv2i32 |
12394 | 414k | 270440U, // SSHLv2i64 |
12395 | 414k | 1056928U, // SSHLv4i16 |
12396 | 414k | 401520U, // SSHLv4i32 |
12397 | 414k | 532600U, // SSHLv8i16 |
12398 | 414k | 1188008U, // SSHLv8i8 |
12399 | 414k | 3160U, // SSHRd |
12400 | 414k | 3216U, // SSHRv16i8_shift |
12401 | 414k | 3224U, // SSHRv2i32_shift |
12402 | 414k | 3176U, // SSHRv2i64_shift |
12403 | 414k | 3232U, // SSHRv4i16_shift |
12404 | 414k | 3184U, // SSHRv4i32_shift |
12405 | 414k | 3192U, // SSHRv8i16_shift |
12406 | 414k | 3240U, // SSHRv8i8_shift |
12407 | 414k | 321U, // SSRA_ZZI_B |
12408 | 414k | 37976U, // SSRA_ZZI_D |
12409 | 414k | 320U, // SSRA_ZZI_H |
12410 | 414k | 37976U, // SSRA_ZZI_S |
12411 | 414k | 37977U, // SSRAd |
12412 | 414k | 38032U, // SSRAv16i8_shift |
12413 | 414k | 38040U, // SSRAv2i32_shift |
12414 | 414k | 37992U, // SSRAv2i64_shift |
12415 | 414k | 38048U, // SSRAv4i16_shift |
12416 | 414k | 38000U, // SSRAv4i32_shift |
12417 | 414k | 38008U, // SSRAv8i16_shift |
12418 | 414k | 38056U, // SSRAv8i8_shift |
12419 | 414k | 2397272U, // SST1B_D_IMM |
12420 | 414k | 50265U, // SST1B_D_REAL |
12421 | 414k | 51289U, // SST1B_D_SXTW |
12422 | 414k | 52313U, // SST1B_D_UXTW |
12423 | 414k | 2397272U, // SST1B_S_IMM |
12424 | 414k | 53337U, // SST1B_S_SXTW |
12425 | 414k | 54361U, // SST1B_S_UXTW |
12426 | 414k | 2414680U, // SST1D_IMM |
12427 | 414k | 50265U, // SST1D_REAL |
12428 | 414k | 56409U, // SST1D_SCALED_SCALED_REAL |
12429 | 414k | 51289U, // SST1D_SXTW |
12430 | 414k | 57433U, // SST1D_SXTW_SCALED |
12431 | 414k | 52313U, // SST1D_UXTW |
12432 | 414k | 58457U, // SST1D_UXTW_SCALED |
12433 | 414k | 2418776U, // SST1H_D_IMM |
12434 | 414k | 50265U, // SST1H_D_REAL |
12435 | 414k | 60505U, // SST1H_D_SCALED_SCALED_REAL |
12436 | 414k | 51289U, // SST1H_D_SXTW |
12437 | 414k | 61529U, // SST1H_D_SXTW_SCALED |
12438 | 414k | 52313U, // SST1H_D_UXTW |
12439 | 414k | 62553U, // SST1H_D_UXTW_SCALED |
12440 | 414k | 2418776U, // SST1H_S_IMM |
12441 | 414k | 53337U, // SST1H_S_SXTW |
12442 | 414k | 63577U, // SST1H_S_SXTW_SCALED |
12443 | 414k | 54361U, // SST1H_S_UXTW |
12444 | 414k | 64601U, // SST1H_S_UXTW_SCALED |
12445 | 414k | 2424920U, // SST1W_D_IMM |
12446 | 414k | 50265U, // SST1W_D_REAL |
12447 | 414k | 66649U, // SST1W_D_SCALED_SCALED_REAL |
12448 | 414k | 51289U, // SST1W_D_SXTW |
12449 | 414k | 67673U, // SST1W_D_SXTW_SCALED |
12450 | 414k | 52313U, // SST1W_D_UXTW |
12451 | 414k | 68697U, // SST1W_D_UXTW_SCALED |
12452 | 414k | 2424920U, // SST1W_IMM |
12453 | 414k | 53337U, // SST1W_SXTW |
12454 | 414k | 69721U, // SST1W_SXTW_SCALED |
12455 | 414k | 54361U, // SST1W_UXTW |
12456 | 414k | 70745U, // SST1W_UXTW_SCALED |
12457 | 414k | 12376U, // SSUBLBT_ZZZ_D |
12458 | 414k | 592U, // SSUBLBT_ZZZ_H |
12459 | 414k | 5208U, // SSUBLBT_ZZZ_S |
12460 | 414k | 12376U, // SSUBLB_ZZZ_D |
12461 | 414k | 592U, // SSUBLB_ZZZ_H |
12462 | 414k | 5208U, // SSUBLB_ZZZ_S |
12463 | 414k | 12376U, // SSUBLTB_ZZZ_D |
12464 | 414k | 592U, // SSUBLTB_ZZZ_H |
12465 | 414k | 5208U, // SSUBLTB_ZZZ_S |
12466 | 414k | 12376U, // SSUBLT_ZZZ_D |
12467 | 414k | 592U, // SSUBLT_ZZZ_H |
12468 | 414k | 5208U, // SSUBLT_ZZZ_S |
12469 | 414k | 794768U, // SSUBLv16i8_v8i16 |
12470 | 414k | 925848U, // SSUBLv2i32_v2i64 |
12471 | 414k | 1056928U, // SSUBLv4i16_v4i32 |
12472 | 414k | 401520U, // SSUBLv4i32_v2i64 |
12473 | 414k | 532600U, // SSUBLv8i16_v4i32 |
12474 | 414k | 1188008U, // SSUBLv8i8_v8i16 |
12475 | 414k | 12376U, // SSUBWB_ZZZ_D |
12476 | 414k | 592U, // SSUBWB_ZZZ_H |
12477 | 414k | 5208U, // SSUBWB_ZZZ_S |
12478 | 414k | 12376U, // SSUBWT_ZZZ_D |
12479 | 414k | 592U, // SSUBWT_ZZZ_H |
12480 | 414k | 5208U, // SSUBWT_ZZZ_S |
12481 | 414k | 794744U, // SSUBWv16i8_v8i16 |
12482 | 414k | 925800U, // SSUBWv2i32_v2i64 |
12483 | 414k | 1056880U, // SSUBWv4i16_v4i32 |
12484 | 414k | 401512U, // SSUBWv4i32_v2i64 |
12485 | 414k | 532592U, // SSUBWv8i16_v4i32 |
12486 | 414k | 1187960U, // SSUBWv8i8_v8i16 |
12487 | 414k | 72793U, // ST1B |
12488 | 414k | 72793U, // ST1B_D |
12489 | 414k | 4625497U, // ST1B_D_IMM |
12490 | 414k | 72793U, // ST1B_H |
12491 | 414k | 4625497U, // ST1B_H_IMM |
12492 | 414k | 4625497U, // ST1B_IMM |
12493 | 414k | 72793U, // ST1B_S |
12494 | 414k | 4625497U, // ST1B_S_IMM |
12495 | 414k | 73817U, // ST1D |
12496 | 414k | 4625497U, // ST1D_IMM |
12497 | 414k | 0U, // ST1Fourv16b |
12498 | 414k | 0U, // ST1Fourv16b_POST |
12499 | 414k | 0U, // ST1Fourv1d |
12500 | 414k | 0U, // ST1Fourv1d_POST |
12501 | 414k | 0U, // ST1Fourv2d |
12502 | 414k | 0U, // ST1Fourv2d_POST |
12503 | 414k | 0U, // ST1Fourv2s |
12504 | 414k | 0U, // ST1Fourv2s_POST |
12505 | 414k | 0U, // ST1Fourv4h |
12506 | 414k | 0U, // ST1Fourv4h_POST |
12507 | 414k | 0U, // ST1Fourv4s |
12508 | 414k | 0U, // ST1Fourv4s_POST |
12509 | 414k | 0U, // ST1Fourv8b |
12510 | 414k | 0U, // ST1Fourv8b_POST |
12511 | 414k | 0U, // ST1Fourv8h |
12512 | 414k | 0U, // ST1Fourv8h_POST |
12513 | 414k | 74841U, // ST1H |
12514 | 414k | 74841U, // ST1H_D |
12515 | 414k | 4625497U, // ST1H_D_IMM |
12516 | 414k | 4625497U, // ST1H_IMM |
12517 | 414k | 74841U, // ST1H_S |
12518 | 414k | 4625497U, // ST1H_S_IMM |
12519 | 414k | 0U, // ST1Onev16b |
12520 | 414k | 0U, // ST1Onev16b_POST |
12521 | 414k | 0U, // ST1Onev1d |
12522 | 414k | 0U, // ST1Onev1d_POST |
12523 | 414k | 0U, // ST1Onev2d |
12524 | 414k | 0U, // ST1Onev2d_POST |
12525 | 414k | 0U, // ST1Onev2s |
12526 | 414k | 0U, // ST1Onev2s_POST |
12527 | 414k | 0U, // ST1Onev4h |
12528 | 414k | 0U, // ST1Onev4h_POST |
12529 | 414k | 0U, // ST1Onev4s |
12530 | 414k | 0U, // ST1Onev4s_POST |
12531 | 414k | 0U, // ST1Onev8b |
12532 | 414k | 0U, // ST1Onev8b_POST |
12533 | 414k | 0U, // ST1Onev8h |
12534 | 414k | 0U, // ST1Onev8h_POST |
12535 | 414k | 0U, // ST1Threev16b |
12536 | 414k | 0U, // ST1Threev16b_POST |
12537 | 414k | 0U, // ST1Threev1d |
12538 | 414k | 0U, // ST1Threev1d_POST |
12539 | 414k | 0U, // ST1Threev2d |
12540 | 414k | 0U, // ST1Threev2d_POST |
12541 | 414k | 0U, // ST1Threev2s |
12542 | 414k | 0U, // ST1Threev2s_POST |
12543 | 414k | 0U, // ST1Threev4h |
12544 | 414k | 0U, // ST1Threev4h_POST |
12545 | 414k | 0U, // ST1Threev4s |
12546 | 414k | 0U, // ST1Threev4s_POST |
12547 | 414k | 0U, // ST1Threev8b |
12548 | 414k | 0U, // ST1Threev8b_POST |
12549 | 414k | 0U, // ST1Threev8h |
12550 | 414k | 0U, // ST1Threev8h_POST |
12551 | 414k | 0U, // ST1Twov16b |
12552 | 414k | 0U, // ST1Twov16b_POST |
12553 | 414k | 0U, // ST1Twov1d |
12554 | 414k | 0U, // ST1Twov1d_POST |
12555 | 414k | 0U, // ST1Twov2d |
12556 | 414k | 0U, // ST1Twov2d_POST |
12557 | 414k | 0U, // ST1Twov2s |
12558 | 414k | 0U, // ST1Twov2s_POST |
12559 | 414k | 0U, // ST1Twov4h |
12560 | 414k | 0U, // ST1Twov4h_POST |
12561 | 414k | 0U, // ST1Twov4s |
12562 | 414k | 0U, // ST1Twov4s_POST |
12563 | 414k | 0U, // ST1Twov8b |
12564 | 414k | 0U, // ST1Twov8b_POST |
12565 | 414k | 0U, // ST1Twov8h |
12566 | 414k | 0U, // ST1Twov8h_POST |
12567 | 414k | 76889U, // ST1W |
12568 | 414k | 76889U, // ST1W_D |
12569 | 414k | 4625497U, // ST1W_D_IMM |
12570 | 414k | 4625497U, // ST1W_IMM |
12571 | 414k | 531U, // ST1_MXIPXX_H_B |
12572 | 414k | 539U, // ST1_MXIPXX_H_D |
12573 | 414k | 547U, // ST1_MXIPXX_H_H |
12574 | 414k | 555U, // ST1_MXIPXX_H_Q |
12575 | 414k | 563U, // ST1_MXIPXX_H_S |
12576 | 414k | 531U, // ST1_MXIPXX_V_B |
12577 | 414k | 539U, // ST1_MXIPXX_V_D |
12578 | 414k | 547U, // ST1_MXIPXX_V_H |
12579 | 414k | 555U, // ST1_MXIPXX_V_Q |
12580 | 414k | 563U, // ST1_MXIPXX_V_S |
12581 | 414k | 0U, // ST1i16 |
12582 | 414k | 3U, // ST1i16_POST |
12583 | 414k | 0U, // ST1i32 |
12584 | 414k | 3U, // ST1i32_POST |
12585 | 414k | 0U, // ST1i64 |
12586 | 414k | 3U, // ST1i64_POST |
12587 | 414k | 0U, // ST1i8 |
12588 | 414k | 3U, // ST1i8_POST |
12589 | 414k | 72793U, // ST2B |
12590 | 414k | 4647001U, // ST2B_IMM |
12591 | 414k | 73817U, // ST2D |
12592 | 414k | 4647001U, // ST2D_IMM |
12593 | 414k | 2363480U, // ST2GOffset |
12594 | 414k | 78401U, // ST2GPostIndex |
12595 | 414k | 4927577U, // ST2GPreIndex |
12596 | 414k | 74841U, // ST2H |
12597 | 414k | 4647001U, // ST2H_IMM |
12598 | 414k | 0U, // ST2Twov16b |
12599 | 414k | 0U, // ST2Twov16b_POST |
12600 | 414k | 0U, // ST2Twov2d |
12601 | 414k | 0U, // ST2Twov2d_POST |
12602 | 414k | 0U, // ST2Twov2s |
12603 | 414k | 0U, // ST2Twov2s_POST |
12604 | 414k | 0U, // ST2Twov4h |
12605 | 414k | 0U, // ST2Twov4h_POST |
12606 | 414k | 0U, // ST2Twov4s |
12607 | 414k | 0U, // ST2Twov4s_POST |
12608 | 414k | 0U, // ST2Twov8b |
12609 | 414k | 0U, // ST2Twov8b_POST |
12610 | 414k | 0U, // ST2Twov8h |
12611 | 414k | 0U, // ST2Twov8h_POST |
12612 | 414k | 76889U, // ST2W |
12613 | 414k | 4647001U, // ST2W_IMM |
12614 | 414k | 0U, // ST2i16 |
12615 | 414k | 3U, // ST2i16_POST |
12616 | 414k | 0U, // ST2i32 |
12617 | 414k | 3U, // ST2i32_POST |
12618 | 414k | 0U, // ST2i64 |
12619 | 414k | 3U, // ST2i64_POST |
12620 | 414k | 0U, // ST2i8 |
12621 | 414k | 3U, // ST2i8_POST |
12622 | 414k | 72793U, // ST3B |
12623 | 414k | 78937U, // ST3B_IMM |
12624 | 414k | 73817U, // ST3D |
12625 | 414k | 78937U, // ST3D_IMM |
12626 | 414k | 74841U, // ST3H |
12627 | 414k | 78937U, // ST3H_IMM |
12628 | 414k | 0U, // ST3Threev16b |
12629 | 414k | 0U, // ST3Threev16b_POST |
12630 | 414k | 0U, // ST3Threev2d |
12631 | 414k | 0U, // ST3Threev2d_POST |
12632 | 414k | 0U, // ST3Threev2s |
12633 | 414k | 0U, // ST3Threev2s_POST |
12634 | 414k | 0U, // ST3Threev4h |
12635 | 414k | 0U, // ST3Threev4h_POST |
12636 | 414k | 0U, // ST3Threev4s |
12637 | 414k | 0U, // ST3Threev4s_POST |
12638 | 414k | 0U, // ST3Threev8b |
12639 | 414k | 0U, // ST3Threev8b_POST |
12640 | 414k | 0U, // ST3Threev8h |
12641 | 414k | 0U, // ST3Threev8h_POST |
12642 | 414k | 76889U, // ST3W |
12643 | 414k | 78937U, // ST3W_IMM |
12644 | 414k | 0U, // ST3i16 |
12645 | 414k | 3U, // ST3i16_POST |
12646 | 414k | 0U, // ST3i32 |
12647 | 414k | 3U, // ST3i32_POST |
12648 | 414k | 0U, // ST3i64 |
12649 | 414k | 3U, // ST3i64_POST |
12650 | 414k | 0U, // ST3i8 |
12651 | 414k | 3U, // ST3i8_POST |
12652 | 414k | 72793U, // ST4B |
12653 | 414k | 4653145U, // ST4B_IMM |
12654 | 414k | 73817U, // ST4D |
12655 | 414k | 4653145U, // ST4D_IMM |
12656 | 414k | 0U, // ST4Fourv16b |
12657 | 414k | 0U, // ST4Fourv16b_POST |
12658 | 414k | 0U, // ST4Fourv2d |
12659 | 414k | 0U, // ST4Fourv2d_POST |
12660 | 414k | 0U, // ST4Fourv2s |
12661 | 414k | 0U, // ST4Fourv2s_POST |
12662 | 414k | 0U, // ST4Fourv4h |
12663 | 414k | 0U, // ST4Fourv4h_POST |
12664 | 414k | 0U, // ST4Fourv4s |
12665 | 414k | 0U, // ST4Fourv4s_POST |
12666 | 414k | 0U, // ST4Fourv8b |
12667 | 414k | 0U, // ST4Fourv8b_POST |
12668 | 414k | 0U, // ST4Fourv8h |
12669 | 414k | 0U, // ST4Fourv8h_POST |
12670 | 414k | 74841U, // ST4H |
12671 | 414k | 4653145U, // ST4H_IMM |
12672 | 414k | 76889U, // ST4W |
12673 | 414k | 4653145U, // ST4W_IMM |
12674 | 414k | 0U, // ST4i16 |
12675 | 414k | 3U, // ST4i16_POST |
12676 | 414k | 0U, // ST4i32 |
12677 | 414k | 3U, // ST4i32_POST |
12678 | 414k | 0U, // ST4i64 |
12679 | 414k | 3U, // ST4i64_POST |
12680 | 414k | 0U, // ST4i8 |
12681 | 414k | 3U, // ST4i8_POST |
12682 | 414k | 0U, // ST64B |
12683 | 414k | 3U, // ST64BV |
12684 | 414k | 3U, // ST64BV0 |
12685 | 414k | 568U, // STGM |
12686 | 414k | 2363480U, // STGOffset |
12687 | 414k | 184683728U, // STGPi |
12688 | 414k | 78401U, // STGPostIndex |
12689 | 414k | 214471889U, // STGPpost |
12690 | 414k | 2894238929U, // STGPpre |
12691 | 414k | 4927577U, // STGPreIndex |
12692 | 414k | 568U, // STLLRB |
12693 | 414k | 568U, // STLLRH |
12694 | 414k | 568U, // STLLRW |
12695 | 414k | 568U, // STLLRX |
12696 | 414k | 568U, // STLRB |
12697 | 414k | 568U, // STLRH |
12698 | 414k | 568U, // STLRW |
12699 | 414k | 568U, // STLRX |
12700 | 414k | 2362456U, // STLURBi |
12701 | 414k | 2362456U, // STLURHi |
12702 | 414k | 2362456U, // STLURWi |
12703 | 414k | 2362456U, // STLURXi |
12704 | 414k | 5246040U, // STLXPW |
12705 | 414k | 5246040U, // STLXPX |
12706 | 414k | 2362576U, // STLXRB |
12707 | 414k | 2362576U, // STLXRH |
12708 | 414k | 2362576U, // STLXRW |
12709 | 414k | 2362576U, // STLXRX |
12710 | 414k | 176295120U, // STNPDi |
12711 | 414k | 184683728U, // STNPQi |
12712 | 414k | 193072336U, // STNPSi |
12713 | 414k | 193072336U, // STNPWi |
12714 | 414k | 176295120U, // STNPXi |
12715 | 414k | 4625497U, // STNT1B_ZRI |
12716 | 414k | 72793U, // STNT1B_ZRR |
12717 | 414k | 2397272U, // STNT1B_ZZR_D_REAL |
12718 | 414k | 2397272U, // STNT1B_ZZR_S_REAL |
12719 | 414k | 4625497U, // STNT1D_ZRI |
12720 | 414k | 73817U, // STNT1D_ZRR |
12721 | 414k | 2397272U, // STNT1D_ZZR_D_REAL |
12722 | 414k | 4625497U, // STNT1H_ZRI |
12723 | 414k | 74841U, // STNT1H_ZRR |
12724 | 414k | 2397272U, // STNT1H_ZZR_D_REAL |
12725 | 414k | 2397272U, // STNT1H_ZZR_S_REAL |
12726 | 414k | 4625497U, // STNT1W_ZRI |
12727 | 414k | 76889U, // STNT1W_ZRR |
12728 | 414k | 2397272U, // STNT1W_ZZR_D_REAL |
12729 | 414k | 2397272U, // STNT1W_ZZR_S_REAL |
12730 | 414k | 176295120U, // STPDi |
12731 | 414k | 206083281U, // STPDpost |
12732 | 414k | 2885850321U, // STPDpre |
12733 | 414k | 184683728U, // STPQi |
12734 | 414k | 214471889U, // STPQpost |
12735 | 414k | 2894238929U, // STPQpre |
12736 | 414k | 193072336U, // STPSi |
12737 | 414k | 222860497U, // STPSpost |
12738 | 414k | 2902627537U, // STPSpre |
12739 | 414k | 193072336U, // STPWi |
12740 | 414k | 222860497U, // STPWpost |
12741 | 414k | 2902627537U, // STPWpre |
12742 | 414k | 176295120U, // STPXi |
12743 | 414k | 206083281U, // STPXpost |
12744 | 414k | 2885850321U, // STPXpre |
12745 | 414k | 38465U, // STRBBpost |
12746 | 414k | 4887641U, // STRBBpre |
12747 | 414k | 226626648U, // STRBBroW |
12748 | 414k | 235015256U, // STRBBroX |
12749 | 414k | 80984U, // STRBBui |
12750 | 414k | 38465U, // STRBpost |
12751 | 414k | 4887641U, // STRBpre |
12752 | 414k | 226626648U, // STRBroW |
12753 | 414k | 235015256U, // STRBroX |
12754 | 414k | 80984U, // STRBui |
12755 | 414k | 38465U, // STRDpost |
12756 | 414k | 4887641U, // STRDpre |
12757 | 414k | 243403864U, // STRDroW |
12758 | 414k | 251792472U, // STRDroX |
12759 | 414k | 82008U, // STRDui |
12760 | 414k | 38465U, // STRHHpost |
12761 | 414k | 4887641U, // STRHHpre |
12762 | 414k | 260181080U, // STRHHroW |
12763 | 414k | 268569688U, // STRHHroX |
12764 | 414k | 83032U, // STRHHui |
12765 | 414k | 38465U, // STRHpost |
12766 | 414k | 4887641U, // STRHpre |
12767 | 414k | 260181080U, // STRHroW |
12768 | 414k | 268569688U, // STRHroX |
12769 | 414k | 83032U, // STRHui |
12770 | 414k | 38465U, // STRQpost |
12771 | 414k | 4887641U, // STRQpre |
12772 | 414k | 276958296U, // STRQroW |
12773 | 414k | 285346904U, // STRQroX |
12774 | 414k | 84056U, // STRQui |
12775 | 414k | 38465U, // STRSpost |
12776 | 414k | 4887641U, // STRSpre |
12777 | 414k | 293735512U, // STRSroW |
12778 | 414k | 302124120U, // STRSroX |
12779 | 414k | 85080U, // STRSui |
12780 | 414k | 38465U, // STRWpost |
12781 | 414k | 4887641U, // STRWpre |
12782 | 414k | 293735512U, // STRWroW |
12783 | 414k | 302124120U, // STRWroX |
12784 | 414k | 85080U, // STRWui |
12785 | 414k | 38465U, // STRXpost |
12786 | 414k | 4887641U, // STRXpre |
12787 | 414k | 243403864U, // STRXroW |
12788 | 414k | 251792472U, // STRXroX |
12789 | 414k | 82008U, // STRXui |
12790 | 414k | 4590680U, // STR_PXI |
12791 | 414k | 0U, // STR_ZA |
12792 | 414k | 4590680U, // STR_ZXI |
12793 | 414k | 2362456U, // STTRBi |
12794 | 414k | 2362456U, // STTRHi |
12795 | 414k | 2362456U, // STTRWi |
12796 | 414k | 2362456U, // STTRXi |
12797 | 414k | 2362456U, // STURBBi |
12798 | 414k | 2362456U, // STURBi |
12799 | 414k | 2362456U, // STURDi |
12800 | 414k | 2362456U, // STURHHi |
12801 | 414k | 2362456U, // STURHi |
12802 | 414k | 2362456U, // STURQi |
12803 | 414k | 2362456U, // STURSi |
12804 | 414k | 2362456U, // STURWi |
12805 | 414k | 2362456U, // STURXi |
12806 | 414k | 5246040U, // STXPW |
12807 | 414k | 5246040U, // STXPX |
12808 | 414k | 2362576U, // STXRB |
12809 | 414k | 2362576U, // STXRH |
12810 | 414k | 2362576U, // STXRW |
12811 | 414k | 2362576U, // STXRX |
12812 | 414k | 2363480U, // STZ2GOffset |
12813 | 414k | 78401U, // STZ2GPostIndex |
12814 | 414k | 4927577U, // STZ2GPreIndex |
12815 | 414k | 568U, // STZGM |
12816 | 414k | 2363480U, // STZGOffset |
12817 | 414k | 78401U, // STZGPostIndex |
12818 | 414k | 4927577U, // STZGPreIndex |
12819 | 414k | 135256U, // SUBG |
12820 | 414k | 5208U, // SUBHNB_ZZZ_B |
12821 | 414k | 96U, // SUBHNB_ZZZ_H |
12822 | 414k | 6232U, // SUBHNB_ZZZ_S |
12823 | 414k | 7256U, // SUBHNT_ZZZ_B |
12824 | 414k | 16U, // SUBHNT_ZZZ_H |
12825 | 414k | 1112U, // SUBHNT_ZZZ_S |
12826 | 414k | 270440U, // SUBHNv2i64_v2i32 |
12827 | 414k | 271464U, // SUBHNv2i64_v4i32 |
12828 | 414k | 401520U, // SUBHNv4i32_v4i16 |
12829 | 414k | 402544U, // SUBHNv4i32_v8i16 |
12830 | 414k | 533624U, // SUBHNv8i16_v16i8 |
12831 | 414k | 532600U, // SUBHNv8i16_v8i8 |
12832 | 414k | 3160U, // SUBP |
12833 | 414k | 3160U, // SUBPS |
12834 | 414k | 16472U, // SUBR_ZI_B |
12835 | 414k | 17496U, // SUBR_ZI_D |
12836 | 414k | 176U, // SUBR_ZI_H |
12837 | 414k | 18520U, // SUBR_ZI_S |
12838 | 414k | 8530048U, // SUBR_ZPmZ_B |
12839 | 414k | 16914560U, // SUBR_ZPmZ_D |
12840 | 414k | 25832584U, // SUBR_ZPmZ_H |
12841 | 414k | 33697920U, // SUBR_ZPmZ_S |
12842 | 414k | 13400U, // SUBSWri |
12843 | 414k | 14424U, // SUBSWrs |
12844 | 414k | 15448U, // SUBSWrx |
12845 | 414k | 13400U, // SUBSXri |
12846 | 414k | 14424U, // SUBSXrs |
12847 | 414k | 15448U, // SUBSXrx |
12848 | 414k | 1313880U, // SUBSXrx64 |
12849 | 414k | 13400U, // SUBWri |
12850 | 414k | 14424U, // SUBWrs |
12851 | 414k | 15448U, // SUBWrx |
12852 | 414k | 13400U, // SUBXri |
12853 | 414k | 14424U, // SUBXrs |
12854 | 414k | 15448U, // SUBXrx |
12855 | 414k | 1313880U, // SUBXrx64 |
12856 | 414k | 16472U, // SUB_ZI_B |
12857 | 414k | 17496U, // SUB_ZI_D |
12858 | 414k | 176U, // SUB_ZI_H |
12859 | 414k | 18520U, // SUB_ZI_S |
12860 | 414k | 8530048U, // SUB_ZPmZ_B |
12861 | 414k | 16914560U, // SUB_ZPmZ_D |
12862 | 414k | 25832584U, // SUB_ZPmZ_H |
12863 | 414k | 33697920U, // SUB_ZPmZ_S |
12864 | 414k | 10328U, // SUB_ZZZ_B |
12865 | 414k | 6232U, // SUB_ZZZ_D |
12866 | 414k | 136U, // SUB_ZZZ_H |
12867 | 414k | 12376U, // SUB_ZZZ_S |
12868 | 414k | 794768U, // SUBv16i8 |
12869 | 414k | 3160U, // SUBv1i64 |
12870 | 414k | 925848U, // SUBv2i32 |
12871 | 414k | 270440U, // SUBv2i64 |
12872 | 414k | 1056928U, // SUBv4i16 |
12873 | 414k | 401520U, // SUBv4i32 |
12874 | 414k | 532600U, // SUBv8i16 |
12875 | 414k | 1188008U, // SUBv8i8 |
12876 | 414k | 38913U, // SUDOT_ZZZI |
12877 | 414k | 5121168U, // SUDOTlanev16i8 |
12878 | 414k | 5121192U, // SUDOTlanev8i8 |
12879 | 414k | 0U, // SUMOPA_MPPZZ_D |
12880 | 414k | 0U, // SUMOPA_MPPZZ_S |
12881 | 414k | 0U, // SUMOPS_MPPZZ_D |
12882 | 414k | 0U, // SUMOPS_MPPZZ_S |
12883 | 414k | 32U, // SUNPKHI_ZZ_D |
12884 | 414k | 0U, // SUNPKHI_ZZ_H |
12885 | 414k | 32U, // SUNPKHI_ZZ_S |
12886 | 414k | 32U, // SUNPKLO_ZZ_D |
12887 | 414k | 0U, // SUNPKLO_ZZ_H |
12888 | 414k | 32U, // SUNPKLO_ZZ_S |
12889 | 414k | 8530048U, // SUQADD_ZPmZ_B |
12890 | 414k | 16914560U, // SUQADD_ZPmZ_D |
12891 | 414k | 25832584U, // SUQADD_ZPmZ_H |
12892 | 414k | 33697920U, // SUQADD_ZPmZ_S |
12893 | 414k | 24U, // SUQADDv16i8 |
12894 | 414k | 33U, // SUQADDv1i16 |
12895 | 414k | 33U, // SUQADDv1i32 |
12896 | 414k | 33U, // SUQADDv1i64 |
12897 | 414k | 33U, // SUQADDv1i8 |
12898 | 414k | 40U, // SUQADDv2i32 |
12899 | 414k | 48U, // SUQADDv2i64 |
12900 | 414k | 56U, // SUQADDv4i16 |
12901 | 414k | 64U, // SUQADDv4i32 |
12902 | 414k | 72U, // SUQADDv8i16 |
12903 | 414k | 80U, // SUQADDv8i8 |
12904 | 414k | 0U, // SVC |
12905 | 414k | 2U, // SWPAB |
12906 | 414k | 2U, // SWPAH |
12907 | 414k | 2U, // SWPALB |
12908 | 414k | 2U, // SWPALH |
12909 | 414k | 2U, // SWPALW |
12910 | 414k | 2U, // SWPALX |
12911 | 414k | 2U, // SWPAW |
12912 | 414k | 2U, // SWPAX |
12913 | 414k | 2U, // SWPB |
12914 | 414k | 2U, // SWPH |
12915 | 414k | 2U, // SWPLB |
12916 | 414k | 2U, // SWPLH |
12917 | 414k | 2U, // SWPLW |
12918 | 414k | 2U, // SWPLX |
12919 | 414k | 2U, // SWPW |
12920 | 414k | 2U, // SWPX |
12921 | 414k | 8U, // SXTB_ZPmZ_D |
12922 | 414k | 0U, // SXTB_ZPmZ_H |
12923 | 414k | 16U, // SXTB_ZPmZ_S |
12924 | 414k | 8U, // SXTH_ZPmZ_D |
12925 | 414k | 16U, // SXTH_ZPmZ_S |
12926 | 414k | 8U, // SXTW_ZPmZ_D |
12927 | 414k | 93272U, // SYSLxt |
12928 | 414k | 4U, // SYSxt |
12929 | 414k | 594U, // TBL_ZZZZ_B |
12930 | 414k | 4U, // TBL_ZZZZ_D |
12931 | 414k | 0U, // TBL_ZZZZ_H |
12932 | 414k | 4U, // TBL_ZZZZ_S |
12933 | 414k | 594U, // TBL_ZZZ_B |
12934 | 414k | 4U, // TBL_ZZZ_D |
12935 | 414k | 0U, // TBL_ZZZ_H |
12936 | 414k | 4U, // TBL_ZZZ_S |
12937 | 414k | 28U, // TBLv16i8Four |
12938 | 414k | 28U, // TBLv16i8One |
12939 | 414k | 28U, // TBLv16i8Three |
12940 | 414k | 28U, // TBLv16i8Two |
12941 | 414k | 84U, // TBLv8i8Four |
12942 | 414k | 84U, // TBLv8i8One |
12943 | 414k | 84U, // TBLv8i8Three |
12944 | 414k | 84U, // TBLv8i8Two |
12945 | 414k | 94296U, // TBNZW |
12946 | 414k | 94296U, // TBNZX |
12947 | 414k | 1U, // TBX_ZZZ_B |
12948 | 414k | 1112U, // TBX_ZZZ_D |
12949 | 414k | 280U, // TBX_ZZZ_H |
12950 | 414k | 2136U, // TBX_ZZZ_S |
12951 | 414k | 28U, // TBXv16i8Four |
12952 | 414k | 28U, // TBXv16i8One |
12953 | 414k | 28U, // TBXv16i8Three |
12954 | 414k | 28U, // TBXv16i8Two |
12955 | 414k | 84U, // TBXv8i8Four |
12956 | 414k | 84U, // TBXv8i8One |
12957 | 414k | 84U, // TBXv8i8Three |
12958 | 414k | 84U, // TBXv8i8Two |
12959 | 414k | 94296U, // TBZW |
12960 | 414k | 94296U, // TBZX |
12961 | 414k | 0U, // TCANCEL |
12962 | 414k | 0U, // TCOMMIT |
12963 | 414k | 10328U, // TRN1_PPP_B |
12964 | 414k | 6232U, // TRN1_PPP_D |
12965 | 414k | 136U, // TRN1_PPP_H |
12966 | 414k | 12376U, // TRN1_PPP_S |
12967 | 414k | 10328U, // TRN1_ZZZ_B |
12968 | 414k | 6232U, // TRN1_ZZZ_D |
12969 | 414k | 136U, // TRN1_ZZZ_H |
12970 | 414k | 880U, // TRN1_ZZZ_Q |
12971 | 414k | 12376U, // TRN1_ZZZ_S |
12972 | 414k | 794768U, // TRN1v16i8 |
12973 | 414k | 925848U, // TRN1v2i32 |
12974 | 414k | 270440U, // TRN1v2i64 |
12975 | 414k | 1056928U, // TRN1v4i16 |
12976 | 414k | 401520U, // TRN1v4i32 |
12977 | 414k | 532600U, // TRN1v8i16 |
12978 | 414k | 1188008U, // TRN1v8i8 |
12979 | 414k | 10328U, // TRN2_PPP_B |
12980 | 414k | 6232U, // TRN2_PPP_D |
12981 | 414k | 136U, // TRN2_PPP_H |
12982 | 414k | 12376U, // TRN2_PPP_S |
12983 | 414k | 10328U, // TRN2_ZZZ_B |
12984 | 414k | 6232U, // TRN2_ZZZ_D |
12985 | 414k | 136U, // TRN2_ZZZ_H |
12986 | 414k | 880U, // TRN2_ZZZ_Q |
12987 | 414k | 12376U, // TRN2_ZZZ_S |
12988 | 414k | 794768U, // TRN2v16i8 |
12989 | 414k | 925848U, // TRN2v2i32 |
12990 | 414k | 270440U, // TRN2v2i64 |
12991 | 414k | 1056928U, // TRN2v4i16 |
12992 | 414k | 401520U, // TRN2v4i32 |
12993 | 414k | 532600U, // TRN2v8i16 |
12994 | 414k | 1188008U, // TRN2v8i8 |
12995 | 414k | 0U, // TSB |
12996 | 414k | 0U, // TSTART |
12997 | 414k | 0U, // TTEST |
12998 | 414k | 2136U, // UABALB_ZZZ_D |
12999 | 414k | 0U, // UABALB_ZZZ_H |
13000 | 414k | 7256U, // UABALB_ZZZ_S |
13001 | 414k | 2136U, // UABALT_ZZZ_D |
13002 | 414k | 0U, // UABALT_ZZZ_H |
13003 | 414k | 7256U, // UABALT_ZZZ_S |
13004 | 414k | 795792U, // UABALv16i8_v8i16 |
13005 | 414k | 926872U, // UABALv2i32_v2i64 |
13006 | 414k | 1057952U, // UABALv4i16_v4i32 |
13007 | 414k | 402544U, // UABALv4i32_v2i64 |
13008 | 414k | 533624U, // UABALv8i16_v4i32 |
13009 | 414k | 1189032U, // UABALv8i8_v8i16 |
13010 | 414k | 1U, // UABA_ZZZ_B |
13011 | 414k | 1112U, // UABA_ZZZ_D |
13012 | 414k | 280U, // UABA_ZZZ_H |
13013 | 414k | 2136U, // UABA_ZZZ_S |
13014 | 414k | 795792U, // UABAv16i8 |
13015 | 414k | 926872U, // UABAv2i32 |
13016 | 414k | 1057952U, // UABAv4i16 |
13017 | 414k | 402544U, // UABAv4i32 |
13018 | 414k | 533624U, // UABAv8i16 |
13019 | 414k | 1189032U, // UABAv8i8 |
13020 | 414k | 12376U, // UABDLB_ZZZ_D |
13021 | 414k | 592U, // UABDLB_ZZZ_H |
13022 | 414k | 5208U, // UABDLB_ZZZ_S |
13023 | 414k | 12376U, // UABDLT_ZZZ_D |
13024 | 414k | 592U, // UABDLT_ZZZ_H |
13025 | 414k | 5208U, // UABDLT_ZZZ_S |
13026 | 414k | 794768U, // UABDLv16i8_v8i16 |
13027 | 414k | 925848U, // UABDLv2i32_v2i64 |
13028 | 414k | 1056928U, // UABDLv4i16_v4i32 |
13029 | 414k | 401520U, // UABDLv4i32_v2i64 |
13030 | 414k | 532600U, // UABDLv8i16_v4i32 |
13031 | 414k | 1188008U, // UABDLv8i8_v8i16 |
13032 | 414k | 8530048U, // UABD_ZPmZ_B |
13033 | 414k | 16914560U, // UABD_ZPmZ_D |
13034 | 414k | 25832584U, // UABD_ZPmZ_H |
13035 | 414k | 33697920U, // UABD_ZPmZ_S |
13036 | 414k | 794768U, // UABDv16i8 |
13037 | 414k | 925848U, // UABDv2i32 |
13038 | 414k | 1056928U, // UABDv4i16 |
13039 | 414k | 401520U, // UABDv4i32 |
13040 | 414k | 532600U, // UABDv8i16 |
13041 | 414k | 1188008U, // UABDv8i8 |
13042 | 414k | 2176U, // UADALP_ZPmZ_D |
13043 | 414k | 0U, // UADALP_ZPmZ_H |
13044 | 414k | 7296U, // UADALP_ZPmZ_S |
13045 | 414k | 24U, // UADALPv16i8_v8i16 |
13046 | 414k | 40U, // UADALPv2i32_v1i64 |
13047 | 414k | 56U, // UADALPv4i16_v2i32 |
13048 | 414k | 64U, // UADALPv4i32_v2i64 |
13049 | 414k | 72U, // UADALPv8i16_v4i32 |
13050 | 414k | 80U, // UADALPv8i8_v4i16 |
13051 | 414k | 12376U, // UADDLB_ZZZ_D |
13052 | 414k | 592U, // UADDLB_ZZZ_H |
13053 | 414k | 5208U, // UADDLB_ZZZ_S |
13054 | 414k | 24U, // UADDLPv16i8_v8i16 |
13055 | 414k | 40U, // UADDLPv2i32_v1i64 |
13056 | 414k | 56U, // UADDLPv4i16_v2i32 |
13057 | 414k | 64U, // UADDLPv4i32_v2i64 |
13058 | 414k | 72U, // UADDLPv8i16_v4i32 |
13059 | 414k | 80U, // UADDLPv8i8_v4i16 |
13060 | 414k | 12376U, // UADDLT_ZZZ_D |
13061 | 414k | 592U, // UADDLT_ZZZ_H |
13062 | 414k | 5208U, // UADDLT_ZZZ_S |
13063 | 414k | 24U, // UADDLVv16i8v |
13064 | 414k | 56U, // UADDLVv4i16v |
13065 | 414k | 64U, // UADDLVv4i32v |
13066 | 414k | 72U, // UADDLVv8i16v |
13067 | 414k | 80U, // UADDLVv8i8v |
13068 | 414k | 794768U, // UADDLv16i8_v8i16 |
13069 | 414k | 925848U, // UADDLv2i32_v2i64 |
13070 | 414k | 1056928U, // UADDLv4i16_v4i32 |
13071 | 414k | 401520U, // UADDLv4i32_v2i64 |
13072 | 414k | 532600U, // UADDLv8i16_v4i32 |
13073 | 414k | 1188008U, // UADDLv8i8_v8i16 |
13074 | 414k | 0U, // UADDV_VPZ_B |
13075 | 414k | 0U, // UADDV_VPZ_D |
13076 | 414k | 0U, // UADDV_VPZ_H |
13077 | 414k | 0U, // UADDV_VPZ_S |
13078 | 414k | 12376U, // UADDWB_ZZZ_D |
13079 | 414k | 592U, // UADDWB_ZZZ_H |
13080 | 414k | 5208U, // UADDWB_ZZZ_S |
13081 | 414k | 12376U, // UADDWT_ZZZ_D |
13082 | 414k | 592U, // UADDWT_ZZZ_H |
13083 | 414k | 5208U, // UADDWT_ZZZ_S |
13084 | 414k | 794744U, // UADDWv16i8_v8i16 |
13085 | 414k | 925800U, // UADDWv2i32_v2i64 |
13086 | 414k | 1056880U, // UADDWv4i16_v4i32 |
13087 | 414k | 401512U, // UADDWv4i32_v2i64 |
13088 | 414k | 532592U, // UADDWv8i16_v4i32 |
13089 | 414k | 1187960U, // UADDWv8i8_v8i16 |
13090 | 414k | 134232U, // UBFMWri |
13091 | 414k | 134232U, // UBFMXri |
13092 | 414k | 10328U, // UCLAMP_ZZZ_B |
13093 | 414k | 6232U, // UCLAMP_ZZZ_D |
13094 | 414k | 136U, // UCLAMP_ZZZ_H |
13095 | 414k | 12376U, // UCLAMP_ZZZ_S |
13096 | 414k | 3160U, // UCVTFSWDri |
13097 | 414k | 3160U, // UCVTFSWHri |
13098 | 414k | 3160U, // UCVTFSWSri |
13099 | 414k | 3160U, // UCVTFSXDri |
13100 | 414k | 3160U, // UCVTFSXHri |
13101 | 414k | 3160U, // UCVTFSXSri |
13102 | 414k | 32U, // UCVTFUWDri |
13103 | 414k | 32U, // UCVTFUWHri |
13104 | 414k | 32U, // UCVTFUWSri |
13105 | 414k | 32U, // UCVTFUXDri |
13106 | 414k | 32U, // UCVTFUXHri |
13107 | 414k | 32U, // UCVTFUXSri |
13108 | 414k | 8U, // UCVTF_ZPmZ_DtoD |
13109 | 414k | 2U, // UCVTF_ZPmZ_DtoH |
13110 | 414k | 8U, // UCVTF_ZPmZ_DtoS |
13111 | 414k | 0U, // UCVTF_ZPmZ_HtoH |
13112 | 414k | 16U, // UCVTF_ZPmZ_StoD |
13113 | 414k | 1U, // UCVTF_ZPmZ_StoH |
13114 | 414k | 16U, // UCVTF_ZPmZ_StoS |
13115 | 414k | 3160U, // UCVTFd |
13116 | 414k | 3160U, // UCVTFh |
13117 | 414k | 3160U, // UCVTFs |
13118 | 414k | 32U, // UCVTFv1i16 |
13119 | 414k | 32U, // UCVTFv1i32 |
13120 | 414k | 32U, // UCVTFv1i64 |
13121 | 414k | 40U, // UCVTFv2f32 |
13122 | 414k | 48U, // UCVTFv2f64 |
13123 | 414k | 3224U, // UCVTFv2i32_shift |
13124 | 414k | 3176U, // UCVTFv2i64_shift |
13125 | 414k | 56U, // UCVTFv4f16 |
13126 | 414k | 64U, // UCVTFv4f32 |
13127 | 414k | 3232U, // UCVTFv4i16_shift |
13128 | 414k | 3184U, // UCVTFv4i32_shift |
13129 | 414k | 72U, // UCVTFv8f16 |
13130 | 414k | 3192U, // UCVTFv8i16_shift |
13131 | 414k | 0U, // UDF |
13132 | 414k | 16914560U, // UDIVR_ZPmZ_D |
13133 | 414k | 33697920U, // UDIVR_ZPmZ_S |
13134 | 414k | 3160U, // UDIVWr |
13135 | 414k | 3160U, // UDIVXr |
13136 | 414k | 16914560U, // UDIV_ZPmZ_D |
13137 | 414k | 33697920U, // UDIV_ZPmZ_S |
13138 | 414k | 27139160U, // UDOT_ZZZI_D |
13139 | 414k | 38913U, // UDOT_ZZZI_S |
13140 | 414k | 7256U, // UDOT_ZZZ_D |
13141 | 414k | 1U, // UDOT_ZZZ_S |
13142 | 414k | 5121168U, // UDOTlanev16i8 |
13143 | 414k | 5121192U, // UDOTlanev8i8 |
13144 | 414k | 795792U, // UDOTv16i8 |
13145 | 414k | 1189032U, // UDOTv8i8 |
13146 | 414k | 8530048U, // UHADD_ZPmZ_B |
13147 | 414k | 16914560U, // UHADD_ZPmZ_D |
13148 | 414k | 25832584U, // UHADD_ZPmZ_H |
13149 | 414k | 33697920U, // UHADD_ZPmZ_S |
13150 | 414k | 794768U, // UHADDv16i8 |
13151 | 414k | 925848U, // UHADDv2i32 |
13152 | 414k | 1056928U, // UHADDv4i16 |
13153 | 414k | 401520U, // UHADDv4i32 |
13154 | 414k | 532600U, // UHADDv8i16 |
13155 | 414k | 1188008U, // UHADDv8i8 |
13156 | 414k | 8530048U, // UHSUBR_ZPmZ_B |
13157 | 414k | 16914560U, // UHSUBR_ZPmZ_D |
13158 | 414k | 25832584U, // UHSUBR_ZPmZ_H |
13159 | 414k | 33697920U, // UHSUBR_ZPmZ_S |
13160 | 414k | 8530048U, // UHSUB_ZPmZ_B |
13161 | 414k | 16914560U, // UHSUB_ZPmZ_D |
13162 | 414k | 25832584U, // UHSUB_ZPmZ_H |
13163 | 414k | 33697920U, // UHSUB_ZPmZ_S |
13164 | 414k | 794768U, // UHSUBv16i8 |
13165 | 414k | 925848U, // UHSUBv2i32 |
13166 | 414k | 1056928U, // UHSUBv4i16 |
13167 | 414k | 401520U, // UHSUBv4i32 |
13168 | 414k | 532600U, // UHSUBv8i16 |
13169 | 414k | 1188008U, // UHSUBv8i8 |
13170 | 414k | 134232U, // UMADDLrrr |
13171 | 414k | 8530048U, // UMAXP_ZPmZ_B |
13172 | 414k | 16914560U, // UMAXP_ZPmZ_D |
13173 | 414k | 25832584U, // UMAXP_ZPmZ_H |
13174 | 414k | 33697920U, // UMAXP_ZPmZ_S |
13175 | 414k | 794768U, // UMAXPv16i8 |
13176 | 414k | 925848U, // UMAXPv2i32 |
13177 | 414k | 1056928U, // UMAXPv4i16 |
13178 | 414k | 401520U, // UMAXPv4i32 |
13179 | 414k | 532600U, // UMAXPv8i16 |
13180 | 414k | 1188008U, // UMAXPv8i8 |
13181 | 414k | 0U, // UMAXV_VPZ_B |
13182 | 414k | 0U, // UMAXV_VPZ_D |
13183 | 414k | 0U, // UMAXV_VPZ_H |
13184 | 414k | 0U, // UMAXV_VPZ_S |
13185 | 414k | 24U, // UMAXVv16i8v |
13186 | 414k | 56U, // UMAXVv4i16v |
13187 | 414k | 64U, // UMAXVv4i32v |
13188 | 414k | 72U, // UMAXVv8i16v |
13189 | 414k | 80U, // UMAXVv8i8v |
13190 | 414k | 95320U, // UMAX_ZI_B |
13191 | 414k | 95320U, // UMAX_ZI_D |
13192 | 414k | 392U, // UMAX_ZI_H |
13193 | 414k | 95320U, // UMAX_ZI_S |
13194 | 414k | 8530048U, // UMAX_ZPmZ_B |
13195 | 414k | 16914560U, // UMAX_ZPmZ_D |
13196 | 414k | 25832584U, // UMAX_ZPmZ_H |
13197 | 414k | 33697920U, // UMAX_ZPmZ_S |
13198 | 414k | 794768U, // UMAXv16i8 |
13199 | 414k | 925848U, // UMAXv2i32 |
13200 | 414k | 1056928U, // UMAXv4i16 |
13201 | 414k | 401520U, // UMAXv4i32 |
13202 | 414k | 532600U, // UMAXv8i16 |
13203 | 414k | 1188008U, // UMAXv8i8 |
13204 | 414k | 8530048U, // UMINP_ZPmZ_B |
13205 | 414k | 16914560U, // UMINP_ZPmZ_D |
13206 | 414k | 25832584U, // UMINP_ZPmZ_H |
13207 | 414k | 33697920U, // UMINP_ZPmZ_S |
13208 | 414k | 794768U, // UMINPv16i8 |
13209 | 414k | 925848U, // UMINPv2i32 |
13210 | 414k | 1056928U, // UMINPv4i16 |
13211 | 414k | 401520U, // UMINPv4i32 |
13212 | 414k | 532600U, // UMINPv8i16 |
13213 | 414k | 1188008U, // UMINPv8i8 |
13214 | 414k | 0U, // UMINV_VPZ_B |
13215 | 414k | 0U, // UMINV_VPZ_D |
13216 | 414k | 0U, // UMINV_VPZ_H |
13217 | 414k | 0U, // UMINV_VPZ_S |
13218 | 414k | 24U, // UMINVv16i8v |
13219 | 414k | 56U, // UMINVv4i16v |
13220 | 414k | 64U, // UMINVv4i32v |
13221 | 414k | 72U, // UMINVv8i16v |
13222 | 414k | 80U, // UMINVv8i8v |
13223 | 414k | 95320U, // UMIN_ZI_B |
13224 | 414k | 95320U, // UMIN_ZI_D |
13225 | 414k | 392U, // UMIN_ZI_H |
13226 | 414k | 95320U, // UMIN_ZI_S |
13227 | 414k | 8530048U, // UMIN_ZPmZ_B |
13228 | 414k | 16914560U, // UMIN_ZPmZ_D |
13229 | 414k | 25832584U, // UMIN_ZPmZ_H |
13230 | 414k | 33697920U, // UMIN_ZPmZ_S |
13231 | 414k | 794768U, // UMINv16i8 |
13232 | 414k | 925848U, // UMINv2i32 |
13233 | 414k | 1056928U, // UMINv4i16 |
13234 | 414k | 401520U, // UMINv4i32 |
13235 | 414k | 532600U, // UMINv8i16 |
13236 | 414k | 1188008U, // UMINv8i8 |
13237 | 414k | 27134040U, // UMLALB_ZZZI_D |
13238 | 414k | 27139160U, // UMLALB_ZZZI_S |
13239 | 414k | 2136U, // UMLALB_ZZZ_D |
13240 | 414k | 0U, // UMLALB_ZZZ_H |
13241 | 414k | 7256U, // UMLALB_ZZZ_S |
13242 | 414k | 27134040U, // UMLALT_ZZZI_D |
13243 | 414k | 27139160U, // UMLALT_ZZZI_S |
13244 | 414k | 2136U, // UMLALT_ZZZ_D |
13245 | 414k | 0U, // UMLALT_ZZZ_H |
13246 | 414k | 7256U, // UMLALT_ZZZ_S |
13247 | 414k | 795792U, // UMLALv16i8_v8i16 |
13248 | 414k | 54273176U, // UMLALv2i32_indexed |
13249 | 414k | 926872U, // UMLALv2i32_v2i64 |
13250 | 414k | 52438176U, // UMLALv4i16_indexed |
13251 | 414k | 1057952U, // UMLALv4i16_v4i32 |
13252 | 414k | 54273136U, // UMLALv4i32_indexed |
13253 | 414k | 402544U, // UMLALv4i32_v2i64 |
13254 | 414k | 52438136U, // UMLALv8i16_indexed |
13255 | 414k | 533624U, // UMLALv8i16_v4i32 |
13256 | 414k | 1189032U, // UMLALv8i8_v8i16 |
13257 | 414k | 27134040U, // UMLSLB_ZZZI_D |
13258 | 414k | 27139160U, // UMLSLB_ZZZI_S |
13259 | 414k | 2136U, // UMLSLB_ZZZ_D |
13260 | 414k | 0U, // UMLSLB_ZZZ_H |
13261 | 414k | 7256U, // UMLSLB_ZZZ_S |
13262 | 414k | 27134040U, // UMLSLT_ZZZI_D |
13263 | 414k | 27139160U, // UMLSLT_ZZZI_S |
13264 | 414k | 2136U, // UMLSLT_ZZZ_D |
13265 | 414k | 0U, // UMLSLT_ZZZ_H |
13266 | 414k | 7256U, // UMLSLT_ZZZ_S |
13267 | 414k | 795792U, // UMLSLv16i8_v8i16 |
13268 | 414k | 54273176U, // UMLSLv2i32_indexed |
13269 | 414k | 926872U, // UMLSLv2i32_v2i64 |
13270 | 414k | 52438176U, // UMLSLv4i16_indexed |
13271 | 414k | 1057952U, // UMLSLv4i16_v4i32 |
13272 | 414k | 54273136U, // UMLSLv4i32_indexed |
13273 | 414k | 402544U, // UMLSLv4i32_v2i64 |
13274 | 414k | 52438136U, // UMLSLv8i16_indexed |
13275 | 414k | 533624U, // UMLSLv8i16_v4i32 |
13276 | 414k | 1189032U, // UMLSLv8i8_v8i16 |
13277 | 414k | 795792U, // UMMLA |
13278 | 414k | 1U, // UMMLA_ZZZ |
13279 | 414k | 0U, // UMOPA_MPPZZ_D |
13280 | 414k | 0U, // UMOPA_MPPZZ_S |
13281 | 414k | 0U, // UMOPS_MPPZZ_D |
13282 | 414k | 0U, // UMOPS_MPPZZ_S |
13283 | 414k | 43352U, // UMOVvi16 |
13284 | 414k | 43352U, // UMOVvi16_idx0 |
13285 | 414k | 43360U, // UMOVvi32 |
13286 | 414k | 43360U, // UMOVvi32_idx0 |
13287 | 414k | 43368U, // UMOVvi64 |
13288 | 414k | 43368U, // UMOVvi64_idx0 |
13289 | 414k | 43376U, // UMOVvi8 |
13290 | 414k | 43376U, // UMOVvi8_idx0 |
13291 | 414k | 134232U, // UMSUBLrrr |
13292 | 414k | 8530048U, // UMULH_ZPmZ_B |
13293 | 414k | 16914560U, // UMULH_ZPmZ_D |
13294 | 414k | 25832584U, // UMULH_ZPmZ_H |
13295 | 414k | 33697920U, // UMULH_ZPmZ_S |
13296 | 414k | 10328U, // UMULH_ZZZ_B |
13297 | 414k | 6232U, // UMULH_ZZZ_D |
13298 | 414k | 136U, // UMULH_ZZZ_H |
13299 | 414k | 12376U, // UMULH_ZZZ_S |
13300 | 414k | 3160U, // UMULHrr |
13301 | 414k | 4468824U, // UMULLB_ZZZI_D |
13302 | 414k | 4461656U, // UMULLB_ZZZI_S |
13303 | 414k | 12376U, // UMULLB_ZZZ_D |
13304 | 414k | 592U, // UMULLB_ZZZ_H |
13305 | 414k | 5208U, // UMULLB_ZZZ_S |
13306 | 414k | 4468824U, // UMULLT_ZZZI_D |
13307 | 414k | 4461656U, // UMULLT_ZZZI_S |
13308 | 414k | 12376U, // UMULLT_ZZZ_D |
13309 | 414k | 592U, // UMULLT_ZZZ_H |
13310 | 414k | 5208U, // UMULLT_ZZZ_S |
13311 | 414k | 794768U, // UMULLv16i8_v8i16 |
13312 | 414k | 163324056U, // UMULLv2i32_indexed |
13313 | 414k | 925848U, // UMULLv2i32_v2i64 |
13314 | 414k | 161489056U, // UMULLv4i16_indexed |
13315 | 414k | 1056928U, // UMULLv4i16_v4i32 |
13316 | 414k | 163324016U, // UMULLv4i32_indexed |
13317 | 414k | 401520U, // UMULLv4i32_v2i64 |
13318 | 414k | 161489016U, // UMULLv8i16_indexed |
13319 | 414k | 532600U, // UMULLv8i16_v4i32 |
13320 | 414k | 1188008U, // UMULLv8i8_v8i16 |
13321 | 414k | 16472U, // UQADD_ZI_B |
13322 | 414k | 17496U, // UQADD_ZI_D |
13323 | 414k | 176U, // UQADD_ZI_H |
13324 | 414k | 18520U, // UQADD_ZI_S |
13325 | 414k | 8530048U, // UQADD_ZPmZ_B |
13326 | 414k | 16914560U, // UQADD_ZPmZ_D |
13327 | 414k | 25832584U, // UQADD_ZPmZ_H |
13328 | 414k | 33697920U, // UQADD_ZPmZ_S |
13329 | 414k | 10328U, // UQADD_ZZZ_B |
13330 | 414k | 6232U, // UQADD_ZZZ_D |
13331 | 414k | 136U, // UQADD_ZZZ_H |
13332 | 414k | 12376U, // UQADD_ZZZ_S |
13333 | 414k | 794768U, // UQADDv16i8 |
13334 | 414k | 3160U, // UQADDv1i16 |
13335 | 414k | 3160U, // UQADDv1i32 |
13336 | 414k | 3160U, // UQADDv1i64 |
13337 | 414k | 3160U, // UQADDv1i8 |
13338 | 414k | 925848U, // UQADDv2i32 |
13339 | 414k | 270440U, // UQADDv2i64 |
13340 | 414k | 1056928U, // UQADDv4i16 |
13341 | 414k | 401520U, // UQADDv4i32 |
13342 | 414k | 532600U, // UQADDv8i16 |
13343 | 414k | 1188008U, // UQADDv8i8 |
13344 | 414k | 1U, // UQDECB_WPiI |
13345 | 414k | 1U, // UQDECB_XPiI |
13346 | 414k | 1U, // UQDECD_WPiI |
13347 | 414k | 1U, // UQDECD_XPiI |
13348 | 414k | 1U, // UQDECD_ZPiI |
13349 | 414k | 1U, // UQDECH_WPiI |
13350 | 414k | 1U, // UQDECH_XPiI |
13351 | 414k | 0U, // UQDECH_ZPiI |
13352 | 414k | 32U, // UQDECP_WP_B |
13353 | 414k | 32U, // UQDECP_WP_D |
13354 | 414k | 32U, // UQDECP_WP_H |
13355 | 414k | 32U, // UQDECP_WP_S |
13356 | 414k | 32U, // UQDECP_XP_B |
13357 | 414k | 32U, // UQDECP_XP_D |
13358 | 414k | 32U, // UQDECP_XP_H |
13359 | 414k | 32U, // UQDECP_XP_S |
13360 | 414k | 32U, // UQDECP_ZP_D |
13361 | 414k | 0U, // UQDECP_ZP_H |
13362 | 414k | 32U, // UQDECP_ZP_S |
13363 | 414k | 1U, // UQDECW_WPiI |
13364 | 414k | 1U, // UQDECW_XPiI |
13365 | 414k | 1U, // UQDECW_ZPiI |
13366 | 414k | 1U, // UQINCB_WPiI |
13367 | 414k | 1U, // UQINCB_XPiI |
13368 | 414k | 1U, // UQINCD_WPiI |
13369 | 414k | 1U, // UQINCD_XPiI |
13370 | 414k | 1U, // UQINCD_ZPiI |
13371 | 414k | 1U, // UQINCH_WPiI |
13372 | 414k | 1U, // UQINCH_XPiI |
13373 | 414k | 0U, // UQINCH_ZPiI |
13374 | 414k | 32U, // UQINCP_WP_B |
13375 | 414k | 32U, // UQINCP_WP_D |
13376 | 414k | 32U, // UQINCP_WP_H |
13377 | 414k | 32U, // UQINCP_WP_S |
13378 | 414k | 32U, // UQINCP_XP_B |
13379 | 414k | 32U, // UQINCP_XP_D |
13380 | 414k | 32U, // UQINCP_XP_H |
13381 | 414k | 32U, // UQINCP_XP_S |
13382 | 414k | 32U, // UQINCP_ZP_D |
13383 | 414k | 0U, // UQINCP_ZP_H |
13384 | 414k | 32U, // UQINCP_ZP_S |
13385 | 414k | 1U, // UQINCW_WPiI |
13386 | 414k | 1U, // UQINCW_XPiI |
13387 | 414k | 1U, // UQINCW_ZPiI |
13388 | 414k | 8530048U, // UQRSHLR_ZPmZ_B |
13389 | 414k | 16914560U, // UQRSHLR_ZPmZ_D |
13390 | 414k | 25832584U, // UQRSHLR_ZPmZ_H |
13391 | 414k | 33697920U, // UQRSHLR_ZPmZ_S |
13392 | 414k | 8530048U, // UQRSHL_ZPmZ_B |
13393 | 414k | 16914560U, // UQRSHL_ZPmZ_D |
13394 | 414k | 25832584U, // UQRSHL_ZPmZ_H |
13395 | 414k | 33697920U, // UQRSHL_ZPmZ_S |
13396 | 414k | 794768U, // UQRSHLv16i8 |
13397 | 414k | 3160U, // UQRSHLv1i16 |
13398 | 414k | 3160U, // UQRSHLv1i32 |
13399 | 414k | 3160U, // UQRSHLv1i64 |
13400 | 414k | 3160U, // UQRSHLv1i8 |
13401 | 414k | 925848U, // UQRSHLv2i32 |
13402 | 414k | 270440U, // UQRSHLv2i64 |
13403 | 414k | 1056928U, // UQRSHLv4i16 |
13404 | 414k | 401520U, // UQRSHLv4i32 |
13405 | 414k | 532600U, // UQRSHLv8i16 |
13406 | 414k | 1188008U, // UQRSHLv8i8 |
13407 | 414k | 3160U, // UQRSHRNB_ZZI_B |
13408 | 414k | 200U, // UQRSHRNB_ZZI_H |
13409 | 414k | 3160U, // UQRSHRNB_ZZI_S |
13410 | 414k | 37976U, // UQRSHRNT_ZZI_B |
13411 | 414k | 320U, // UQRSHRNT_ZZI_H |
13412 | 414k | 37976U, // UQRSHRNT_ZZI_S |
13413 | 414k | 3160U, // UQRSHRNb |
13414 | 414k | 3160U, // UQRSHRNh |
13415 | 414k | 3160U, // UQRSHRNs |
13416 | 414k | 38008U, // UQRSHRNv16i8_shift |
13417 | 414k | 3176U, // UQRSHRNv2i32_shift |
13418 | 414k | 3184U, // UQRSHRNv4i16_shift |
13419 | 414k | 37992U, // UQRSHRNv4i32_shift |
13420 | 414k | 38000U, // UQRSHRNv8i16_shift |
13421 | 414k | 3192U, // UQRSHRNv8i8_shift |
13422 | 414k | 8530048U, // UQSHLR_ZPmZ_B |
13423 | 414k | 16914560U, // UQSHLR_ZPmZ_D |
13424 | 414k | 25832584U, // UQSHLR_ZPmZ_H |
13425 | 414k | 33697920U, // UQSHLR_ZPmZ_S |
13426 | 414k | 141440U, // UQSHL_ZPmI_B |
13427 | 414k | 137344U, // UQSHL_ZPmI_D |
13428 | 414k | 1453192U, // UQSHL_ZPmI_H |
13429 | 414k | 143488U, // UQSHL_ZPmI_S |
13430 | 414k | 8530048U, // UQSHL_ZPmZ_B |
13431 | 414k | 16914560U, // UQSHL_ZPmZ_D |
13432 | 414k | 25832584U, // UQSHL_ZPmZ_H |
13433 | 414k | 33697920U, // UQSHL_ZPmZ_S |
13434 | 414k | 3160U, // UQSHLb |
13435 | 414k | 3160U, // UQSHLd |
13436 | 414k | 3160U, // UQSHLh |
13437 | 414k | 3160U, // UQSHLs |
13438 | 414k | 794768U, // UQSHLv16i8 |
13439 | 414k | 3216U, // UQSHLv16i8_shift |
13440 | 414k | 3160U, // UQSHLv1i16 |
13441 | 414k | 3160U, // UQSHLv1i32 |
13442 | 414k | 3160U, // UQSHLv1i64 |
13443 | 414k | 3160U, // UQSHLv1i8 |
13444 | 414k | 925848U, // UQSHLv2i32 |
13445 | 414k | 3224U, // UQSHLv2i32_shift |
13446 | 414k | 270440U, // UQSHLv2i64 |
13447 | 414k | 3176U, // UQSHLv2i64_shift |
13448 | 414k | 1056928U, // UQSHLv4i16 |
13449 | 414k | 3232U, // UQSHLv4i16_shift |
13450 | 414k | 401520U, // UQSHLv4i32 |
13451 | 414k | 3184U, // UQSHLv4i32_shift |
13452 | 414k | 532600U, // UQSHLv8i16 |
13453 | 414k | 3192U, // UQSHLv8i16_shift |
13454 | 414k | 1188008U, // UQSHLv8i8 |
13455 | 414k | 3240U, // UQSHLv8i8_shift |
13456 | 414k | 3160U, // UQSHRNB_ZZI_B |
13457 | 414k | 200U, // UQSHRNB_ZZI_H |
13458 | 414k | 3160U, // UQSHRNB_ZZI_S |
13459 | 414k | 37976U, // UQSHRNT_ZZI_B |
13460 | 414k | 320U, // UQSHRNT_ZZI_H |
13461 | 414k | 37976U, // UQSHRNT_ZZI_S |
13462 | 414k | 3160U, // UQSHRNb |
13463 | 414k | 3160U, // UQSHRNh |
13464 | 414k | 3160U, // UQSHRNs |
13465 | 414k | 38008U, // UQSHRNv16i8_shift |
13466 | 414k | 3176U, // UQSHRNv2i32_shift |
13467 | 414k | 3184U, // UQSHRNv4i16_shift |
13468 | 414k | 37992U, // UQSHRNv4i32_shift |
13469 | 414k | 38000U, // UQSHRNv8i16_shift |
13470 | 414k | 3192U, // UQSHRNv8i8_shift |
13471 | 414k | 8530048U, // UQSUBR_ZPmZ_B |
13472 | 414k | 16914560U, // UQSUBR_ZPmZ_D |
13473 | 414k | 25832584U, // UQSUBR_ZPmZ_H |
13474 | 414k | 33697920U, // UQSUBR_ZPmZ_S |
13475 | 414k | 16472U, // UQSUB_ZI_B |
13476 | 414k | 17496U, // UQSUB_ZI_D |
13477 | 414k | 176U, // UQSUB_ZI_H |
13478 | 414k | 18520U, // UQSUB_ZI_S |
13479 | 414k | 8530048U, // UQSUB_ZPmZ_B |
13480 | 414k | 16914560U, // UQSUB_ZPmZ_D |
13481 | 414k | 25832584U, // UQSUB_ZPmZ_H |
13482 | 414k | 33697920U, // UQSUB_ZPmZ_S |
13483 | 414k | 10328U, // UQSUB_ZZZ_B |
13484 | 414k | 6232U, // UQSUB_ZZZ_D |
13485 | 414k | 136U, // UQSUB_ZZZ_H |
13486 | 414k | 12376U, // UQSUB_ZZZ_S |
13487 | 414k | 794768U, // UQSUBv16i8 |
13488 | 414k | 3160U, // UQSUBv1i16 |
13489 | 414k | 3160U, // UQSUBv1i32 |
13490 | 414k | 3160U, // UQSUBv1i64 |
13491 | 414k | 3160U, // UQSUBv1i8 |
13492 | 414k | 925848U, // UQSUBv2i32 |
13493 | 414k | 270440U, // UQSUBv2i64 |
13494 | 414k | 1056928U, // UQSUBv4i16 |
13495 | 414k | 401520U, // UQSUBv4i32 |
13496 | 414k | 532600U, // UQSUBv8i16 |
13497 | 414k | 1188008U, // UQSUBv8i8 |
13498 | 414k | 32U, // UQXTNB_ZZ_B |
13499 | 414k | 0U, // UQXTNB_ZZ_H |
13500 | 414k | 32U, // UQXTNB_ZZ_S |
13501 | 414k | 32U, // UQXTNT_ZZ_B |
13502 | 414k | 0U, // UQXTNT_ZZ_H |
13503 | 414k | 32U, // UQXTNT_ZZ_S |
13504 | 414k | 72U, // UQXTNv16i8 |
13505 | 414k | 32U, // UQXTNv1i16 |
13506 | 414k | 32U, // UQXTNv1i32 |
13507 | 414k | 32U, // UQXTNv1i8 |
13508 | 414k | 48U, // UQXTNv2i32 |
13509 | 414k | 64U, // UQXTNv4i16 |
13510 | 414k | 48U, // UQXTNv4i32 |
13511 | 414k | 64U, // UQXTNv8i16 |
13512 | 414k | 72U, // UQXTNv8i8 |
13513 | 414k | 16U, // URECPE_ZPmZ_S |
13514 | 414k | 40U, // URECPEv2i32 |
13515 | 414k | 64U, // URECPEv4i32 |
13516 | 414k | 8530048U, // URHADD_ZPmZ_B |
13517 | 414k | 16914560U, // URHADD_ZPmZ_D |
13518 | 414k | 25832584U, // URHADD_ZPmZ_H |
13519 | 414k | 33697920U, // URHADD_ZPmZ_S |
13520 | 414k | 794768U, // URHADDv16i8 |
13521 | 414k | 925848U, // URHADDv2i32 |
13522 | 414k | 1056928U, // URHADDv4i16 |
13523 | 414k | 401520U, // URHADDv4i32 |
13524 | 414k | 532600U, // URHADDv8i16 |
13525 | 414k | 1188008U, // URHADDv8i8 |
13526 | 414k | 8530048U, // URSHLR_ZPmZ_B |
13527 | 414k | 16914560U, // URSHLR_ZPmZ_D |
13528 | 414k | 25832584U, // URSHLR_ZPmZ_H |
13529 | 414k | 33697920U, // URSHLR_ZPmZ_S |
13530 | 414k | 8530048U, // URSHL_ZPmZ_B |
13531 | 414k | 16914560U, // URSHL_ZPmZ_D |
13532 | 414k | 25832584U, // URSHL_ZPmZ_H |
13533 | 414k | 33697920U, // URSHL_ZPmZ_S |
13534 | 414k | 794768U, // URSHLv16i8 |
13535 | 414k | 3160U, // URSHLv1i64 |
13536 | 414k | 925848U, // URSHLv2i32 |
13537 | 414k | 270440U, // URSHLv2i64 |
13538 | 414k | 1056928U, // URSHLv4i16 |
13539 | 414k | 401520U, // URSHLv4i32 |
13540 | 414k | 532600U, // URSHLv8i16 |
13541 | 414k | 1188008U, // URSHLv8i8 |
13542 | 414k | 141440U, // URSHR_ZPmI_B |
13543 | 414k | 137344U, // URSHR_ZPmI_D |
13544 | 414k | 1453192U, // URSHR_ZPmI_H |
13545 | 414k | 143488U, // URSHR_ZPmI_S |
13546 | 414k | 3160U, // URSHRd |
13547 | 414k | 3216U, // URSHRv16i8_shift |
13548 | 414k | 3224U, // URSHRv2i32_shift |
13549 | 414k | 3176U, // URSHRv2i64_shift |
13550 | 414k | 3232U, // URSHRv4i16_shift |
13551 | 414k | 3184U, // URSHRv4i32_shift |
13552 | 414k | 3192U, // URSHRv8i16_shift |
13553 | 414k | 3240U, // URSHRv8i8_shift |
13554 | 414k | 16U, // URSQRTE_ZPmZ_S |
13555 | 414k | 40U, // URSQRTEv2i32 |
13556 | 414k | 64U, // URSQRTEv4i32 |
13557 | 414k | 321U, // URSRA_ZZI_B |
13558 | 414k | 37976U, // URSRA_ZZI_D |
13559 | 414k | 320U, // URSRA_ZZI_H |
13560 | 414k | 37976U, // URSRA_ZZI_S |
13561 | 414k | 37977U, // URSRAd |
13562 | 414k | 38032U, // URSRAv16i8_shift |
13563 | 414k | 38040U, // URSRAv2i32_shift |
13564 | 414k | 37992U, // URSRAv2i64_shift |
13565 | 414k | 38048U, // URSRAv4i16_shift |
13566 | 414k | 38000U, // URSRAv4i32_shift |
13567 | 414k | 38008U, // URSRAv8i16_shift |
13568 | 414k | 38056U, // URSRAv8i8_shift |
13569 | 414k | 1U, // USDOT_ZZZ |
13570 | 414k | 38913U, // USDOT_ZZZI |
13571 | 414k | 5121168U, // USDOTlanev16i8 |
13572 | 414k | 5121192U, // USDOTlanev8i8 |
13573 | 414k | 795792U, // USDOTv16i8 |
13574 | 414k | 1189032U, // USDOTv8i8 |
13575 | 414k | 3160U, // USHLLB_ZZI_D |
13576 | 414k | 200U, // USHLLB_ZZI_H |
13577 | 414k | 3160U, // USHLLB_ZZI_S |
13578 | 414k | 3160U, // USHLLT_ZZI_D |
13579 | 414k | 200U, // USHLLT_ZZI_H |
13580 | 414k | 3160U, // USHLLT_ZZI_S |
13581 | 414k | 3216U, // USHLLv16i8_shift |
13582 | 414k | 3224U, // USHLLv2i32_shift |
13583 | 414k | 3232U, // USHLLv4i16_shift |
13584 | 414k | 3184U, // USHLLv4i32_shift |
13585 | 414k | 3192U, // USHLLv8i16_shift |
13586 | 414k | 3240U, // USHLLv8i8_shift |
13587 | 414k | 794768U, // USHLv16i8 |
13588 | 414k | 3160U, // USHLv1i64 |
13589 | 414k | 925848U, // USHLv2i32 |
13590 | 414k | 270440U, // USHLv2i64 |
13591 | 414k | 1056928U, // USHLv4i16 |
13592 | 414k | 401520U, // USHLv4i32 |
13593 | 414k | 532600U, // USHLv8i16 |
13594 | 414k | 1188008U, // USHLv8i8 |
13595 | 414k | 3160U, // USHRd |
13596 | 414k | 3216U, // USHRv16i8_shift |
13597 | 414k | 3224U, // USHRv2i32_shift |
13598 | 414k | 3176U, // USHRv2i64_shift |
13599 | 414k | 3232U, // USHRv4i16_shift |
13600 | 414k | 3184U, // USHRv4i32_shift |
13601 | 414k | 3192U, // USHRv8i16_shift |
13602 | 414k | 3240U, // USHRv8i8_shift |
13603 | 414k | 795792U, // USMMLA |
13604 | 414k | 1U, // USMMLA_ZZZ |
13605 | 414k | 0U, // USMOPA_MPPZZ_D |
13606 | 414k | 0U, // USMOPA_MPPZZ_S |
13607 | 414k | 0U, // USMOPS_MPPZZ_D |
13608 | 414k | 0U, // USMOPS_MPPZZ_S |
13609 | 414k | 8530048U, // USQADD_ZPmZ_B |
13610 | 414k | 16914560U, // USQADD_ZPmZ_D |
13611 | 414k | 25832584U, // USQADD_ZPmZ_H |
13612 | 414k | 33697920U, // USQADD_ZPmZ_S |
13613 | 414k | 24U, // USQADDv16i8 |
13614 | 414k | 33U, // USQADDv1i16 |
13615 | 414k | 33U, // USQADDv1i32 |
13616 | 414k | 33U, // USQADDv1i64 |
13617 | 414k | 33U, // USQADDv1i8 |
13618 | 414k | 40U, // USQADDv2i32 |
13619 | 414k | 48U, // USQADDv2i64 |
13620 | 414k | 56U, // USQADDv4i16 |
13621 | 414k | 64U, // USQADDv4i32 |
13622 | 414k | 72U, // USQADDv8i16 |
13623 | 414k | 80U, // USQADDv8i8 |
13624 | 414k | 321U, // USRA_ZZI_B |
13625 | 414k | 37976U, // USRA_ZZI_D |
13626 | 414k | 320U, // USRA_ZZI_H |
13627 | 414k | 37976U, // USRA_ZZI_S |
13628 | 414k | 37977U, // USRAd |
13629 | 414k | 38032U, // USRAv16i8_shift |
13630 | 414k | 38040U, // USRAv2i32_shift |
13631 | 414k | 37992U, // USRAv2i64_shift |
13632 | 414k | 38048U, // USRAv4i16_shift |
13633 | 414k | 38000U, // USRAv4i32_shift |
13634 | 414k | 38008U, // USRAv8i16_shift |
13635 | 414k | 38056U, // USRAv8i8_shift |
13636 | 414k | 12376U, // USUBLB_ZZZ_D |
13637 | 414k | 592U, // USUBLB_ZZZ_H |
13638 | 414k | 5208U, // USUBLB_ZZZ_S |
13639 | 414k | 12376U, // USUBLT_ZZZ_D |
13640 | 414k | 592U, // USUBLT_ZZZ_H |
13641 | 414k | 5208U, // USUBLT_ZZZ_S |
13642 | 414k | 794768U, // USUBLv16i8_v8i16 |
13643 | 414k | 925848U, // USUBLv2i32_v2i64 |
13644 | 414k | 1056928U, // USUBLv4i16_v4i32 |
13645 | 414k | 401520U, // USUBLv4i32_v2i64 |
13646 | 414k | 532600U, // USUBLv8i16_v4i32 |
13647 | 414k | 1188008U, // USUBLv8i8_v8i16 |
13648 | 414k | 12376U, // USUBWB_ZZZ_D |
13649 | 414k | 592U, // USUBWB_ZZZ_H |
13650 | 414k | 5208U, // USUBWB_ZZZ_S |
13651 | 414k | 12376U, // USUBWT_ZZZ_D |
13652 | 414k | 592U, // USUBWT_ZZZ_H |
13653 | 414k | 5208U, // USUBWT_ZZZ_S |
13654 | 414k | 794744U, // USUBWv16i8_v8i16 |
13655 | 414k | 925800U, // USUBWv2i32_v2i64 |
13656 | 414k | 1056880U, // USUBWv4i16_v4i32 |
13657 | 414k | 401512U, // USUBWv4i32_v2i64 |
13658 | 414k | 532592U, // USUBWv8i16_v4i32 |
13659 | 414k | 1187960U, // USUBWv8i8_v8i16 |
13660 | 414k | 32U, // UUNPKHI_ZZ_D |
13661 | 414k | 0U, // UUNPKHI_ZZ_H |
13662 | 414k | 32U, // UUNPKHI_ZZ_S |
13663 | 414k | 32U, // UUNPKLO_ZZ_D |
13664 | 414k | 0U, // UUNPKLO_ZZ_H |
13665 | 414k | 32U, // UUNPKLO_ZZ_S |
13666 | 414k | 8U, // UXTB_ZPmZ_D |
13667 | 414k | 0U, // UXTB_ZPmZ_H |
13668 | 414k | 16U, // UXTB_ZPmZ_S |
13669 | 414k | 8U, // UXTH_ZPmZ_D |
13670 | 414k | 16U, // UXTH_ZPmZ_S |
13671 | 414k | 8U, // UXTW_ZPmZ_D |
13672 | 414k | 10328U, // UZP1_PPP_B |
13673 | 414k | 6232U, // UZP1_PPP_D |
13674 | 414k | 136U, // UZP1_PPP_H |
13675 | 414k | 12376U, // UZP1_PPP_S |
13676 | 414k | 10328U, // UZP1_ZZZ_B |
13677 | 414k | 6232U, // UZP1_ZZZ_D |
13678 | 414k | 136U, // UZP1_ZZZ_H |
13679 | 414k | 880U, // UZP1_ZZZ_Q |
13680 | 414k | 12376U, // UZP1_ZZZ_S |
13681 | 414k | 794768U, // UZP1v16i8 |
13682 | 414k | 925848U, // UZP1v2i32 |
13683 | 414k | 270440U, // UZP1v2i64 |
13684 | 414k | 1056928U, // UZP1v4i16 |
13685 | 414k | 401520U, // UZP1v4i32 |
13686 | 414k | 532600U, // UZP1v8i16 |
13687 | 414k | 1188008U, // UZP1v8i8 |
13688 | 414k | 10328U, // UZP2_PPP_B |
13689 | 414k | 6232U, // UZP2_PPP_D |
13690 | 414k | 136U, // UZP2_PPP_H |
13691 | 414k | 12376U, // UZP2_PPP_S |
13692 | 414k | 10328U, // UZP2_ZZZ_B |
13693 | 414k | 6232U, // UZP2_ZZZ_D |
13694 | 414k | 136U, // UZP2_ZZZ_H |
13695 | 414k | 880U, // UZP2_ZZZ_Q |
13696 | 414k | 12376U, // UZP2_ZZZ_S |
13697 | 414k | 794768U, // UZP2v16i8 |
13698 | 414k | 925848U, // UZP2v2i32 |
13699 | 414k | 270440U, // UZP2v2i64 |
13700 | 414k | 1056928U, // UZP2v4i16 |
13701 | 414k | 401520U, // UZP2v4i32 |
13702 | 414k | 532600U, // UZP2v8i16 |
13703 | 414k | 1188008U, // UZP2v8i8 |
13704 | 414k | 0U, // WFET |
13705 | 414k | 0U, // WFIT |
13706 | 414k | 3160U, // WHILEGE_PWW_B |
13707 | 414k | 3160U, // WHILEGE_PWW_D |
13708 | 414k | 200U, // WHILEGE_PWW_H |
13709 | 414k | 3160U, // WHILEGE_PWW_S |
13710 | 414k | 3160U, // WHILEGE_PXX_B |
13711 | 414k | 3160U, // WHILEGE_PXX_D |
13712 | 414k | 200U, // WHILEGE_PXX_H |
13713 | 414k | 3160U, // WHILEGE_PXX_S |
13714 | 414k | 3160U, // WHILEGT_PWW_B |
13715 | 414k | 3160U, // WHILEGT_PWW_D |
13716 | 414k | 200U, // WHILEGT_PWW_H |
13717 | 414k | 3160U, // WHILEGT_PWW_S |
13718 | 414k | 3160U, // WHILEGT_PXX_B |
13719 | 414k | 3160U, // WHILEGT_PXX_D |
13720 | 414k | 200U, // WHILEGT_PXX_H |
13721 | 414k | 3160U, // WHILEGT_PXX_S |
13722 | 414k | 3160U, // WHILEHI_PWW_B |
13723 | 414k | 3160U, // WHILEHI_PWW_D |
13724 | 414k | 200U, // WHILEHI_PWW_H |
13725 | 414k | 3160U, // WHILEHI_PWW_S |
13726 | 414k | 3160U, // WHILEHI_PXX_B |
13727 | 414k | 3160U, // WHILEHI_PXX_D |
13728 | 414k | 200U, // WHILEHI_PXX_H |
13729 | 414k | 3160U, // WHILEHI_PXX_S |
13730 | 414k | 3160U, // WHILEHS_PWW_B |
13731 | 414k | 3160U, // WHILEHS_PWW_D |
13732 | 414k | 200U, // WHILEHS_PWW_H |
13733 | 414k | 3160U, // WHILEHS_PWW_S |
13734 | 414k | 3160U, // WHILEHS_PXX_B |
13735 | 414k | 3160U, // WHILEHS_PXX_D |
13736 | 414k | 200U, // WHILEHS_PXX_H |
13737 | 414k | 3160U, // WHILEHS_PXX_S |
13738 | 414k | 3160U, // WHILELE_PWW_B |
13739 | 414k | 3160U, // WHILELE_PWW_D |
13740 | 414k | 200U, // WHILELE_PWW_H |
13741 | 414k | 3160U, // WHILELE_PWW_S |
13742 | 414k | 3160U, // WHILELE_PXX_B |
13743 | 414k | 3160U, // WHILELE_PXX_D |
13744 | 414k | 200U, // WHILELE_PXX_H |
13745 | 414k | 3160U, // WHILELE_PXX_S |
13746 | 414k | 3160U, // WHILELO_PWW_B |
13747 | 414k | 3160U, // WHILELO_PWW_D |
13748 | 414k | 200U, // WHILELO_PWW_H |
13749 | 414k | 3160U, // WHILELO_PWW_S |
13750 | 414k | 3160U, // WHILELO_PXX_B |
13751 | 414k | 3160U, // WHILELO_PXX_D |
13752 | 414k | 200U, // WHILELO_PXX_H |
13753 | 414k | 3160U, // WHILELO_PXX_S |
13754 | 414k | 3160U, // WHILELS_PWW_B |
13755 | 414k | 3160U, // WHILELS_PWW_D |
13756 | 414k | 200U, // WHILELS_PWW_H |
13757 | 414k | 3160U, // WHILELS_PWW_S |
13758 | 414k | 3160U, // WHILELS_PXX_B |
13759 | 414k | 3160U, // WHILELS_PXX_D |
13760 | 414k | 200U, // WHILELS_PXX_H |
13761 | 414k | 3160U, // WHILELS_PXX_S |
13762 | 414k | 3160U, // WHILELT_PWW_B |
13763 | 414k | 3160U, // WHILELT_PWW_D |
13764 | 414k | 200U, // WHILELT_PWW_H |
13765 | 414k | 3160U, // WHILELT_PWW_S |
13766 | 414k | 3160U, // WHILELT_PXX_B |
13767 | 414k | 3160U, // WHILELT_PXX_D |
13768 | 414k | 200U, // WHILELT_PXX_H |
13769 | 414k | 3160U, // WHILELT_PXX_S |
13770 | 414k | 3160U, // WHILERW_PXX_B |
13771 | 414k | 3160U, // WHILERW_PXX_D |
13772 | 414k | 200U, // WHILERW_PXX_H |
13773 | 414k | 3160U, // WHILERW_PXX_S |
13774 | 414k | 3160U, // WHILEWR_PXX_B |
13775 | 414k | 3160U, // WHILEWR_PXX_D |
13776 | 414k | 200U, // WHILEWR_PXX_H |
13777 | 414k | 3160U, // WHILEWR_PXX_S |
13778 | 414k | 0U, // WRFFR |
13779 | 414k | 0U, // XAFLAG |
13780 | 414k | 3154024U, // XAR |
13781 | 414k | 141400U, // XAR_ZZZI_B |
13782 | 414k | 137304U, // XAR_ZZZI_D |
13783 | 414k | 1453192U, // XAR_ZZZI_H |
13784 | 414k | 143448U, // XAR_ZZZI_S |
13785 | 414k | 0U, // XPACD |
13786 | 414k | 0U, // XPACI |
13787 | 414k | 0U, // XPACLRI |
13788 | 414k | 72U, // XTNv16i8 |
13789 | 414k | 48U, // XTNv2i32 |
13790 | 414k | 64U, // XTNv4i16 |
13791 | 414k | 48U, // XTNv4i32 |
13792 | 414k | 64U, // XTNv8i16 |
13793 | 414k | 72U, // XTNv8i8 |
13794 | 414k | 0U, // ZERO_M |
13795 | 414k | 10328U, // ZIP1_PPP_B |
13796 | 414k | 6232U, // ZIP1_PPP_D |
13797 | 414k | 136U, // ZIP1_PPP_H |
13798 | 414k | 12376U, // ZIP1_PPP_S |
13799 | 414k | 10328U, // ZIP1_ZZZ_B |
13800 | 414k | 6232U, // ZIP1_ZZZ_D |
13801 | 414k | 136U, // ZIP1_ZZZ_H |
13802 | 414k | 880U, // ZIP1_ZZZ_Q |
13803 | 414k | 12376U, // ZIP1_ZZZ_S |
13804 | 414k | 794768U, // ZIP1v16i8 |
13805 | 414k | 925848U, // ZIP1v2i32 |
13806 | 414k | 270440U, // ZIP1v2i64 |
13807 | 414k | 1056928U, // ZIP1v4i16 |
13808 | 414k | 401520U, // ZIP1v4i32 |
13809 | 414k | 532600U, // ZIP1v8i16 |
13810 | 414k | 1188008U, // ZIP1v8i8 |
13811 | 414k | 10328U, // ZIP2_PPP_B |
13812 | 414k | 6232U, // ZIP2_PPP_D |
13813 | 414k | 136U, // ZIP2_PPP_H |
13814 | 414k | 12376U, // ZIP2_PPP_S |
13815 | 414k | 10328U, // ZIP2_ZZZ_B |
13816 | 414k | 6232U, // ZIP2_ZZZ_D |
13817 | 414k | 136U, // ZIP2_ZZZ_H |
13818 | 414k | 880U, // ZIP2_ZZZ_Q |
13819 | 414k | 12376U, // ZIP2_ZZZ_S |
13820 | 414k | 794768U, // ZIP2v16i8 |
13821 | 414k | 925848U, // ZIP2v2i32 |
13822 | 414k | 270440U, // ZIP2v2i64 |
13823 | 414k | 1056928U, // ZIP2v4i16 |
13824 | 414k | 401520U, // ZIP2v4i32 |
13825 | 414k | 532600U, // ZIP2v8i16 |
13826 | 414k | 1188008U, // ZIP2v8i8 |
13827 | 414k | 0U, // anonymous_13987 |
13828 | 414k | 0U, // anonymous_13988 |
13829 | 414k | 0U, // anonymous_5384 |
13830 | 414k | 0U, // anonymous_5385 |
13831 | 414k | }; |
13832 | | |
13833 | | // Emit the opcode for the instruction. |
13834 | 414k | uint64_t Bits = 0; |
13835 | 414k | Bits |= (uint64_t)OpInfo0[opcode] << 0; |
13836 | 414k | Bits |= (uint64_t)OpInfo1[opcode] << 32; |
13837 | 414k | #ifndef CAPSTONE_DIET |
13838 | 414k | SStream_concat0(O, AsmStrs+(Bits & 16383)-1); |
13839 | 414k | #endif |
13840 | 414k | return Bits; |
13841 | | |
13842 | 414k | } |
13843 | | /// printInstruction - This method is automatically generated by tablegen |
13844 | | /// from the instruction set description. |
13845 | | static void printInstruction(MCInst *MI, SStream *O) |
13846 | 106k | { |
13847 | 106k | unsigned int opcode = MCInst_getOpcode(MI); |
13848 | | // printf("opcode = %u\n", opcode); |
13849 | | |
13850 | | |
13851 | | |
13852 | 106k | uint64_t Bits = getMnemonic(MI, O, opcode); |
13853 | | |
13854 | | // Fragment 0 encoded into 7 bits for 68 unique commands. |
13855 | | // printf("Fragment 0: %"PRIu64"\n", ((Bits >> 14) & 127)); |
13856 | 106k | switch ((Bits >> 14) & 127) { |
13857 | 0 | default: // unreachable |
13858 | 8 | case 0: |
13859 | | // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... |
13860 | 8 | return; |
13861 | 0 | break; |
13862 | 51.8k | case 1: |
13863 | | // TLSDESCCALL, ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ... |
13864 | 51.8k | printOperand(MI, 0, O); |
13865 | 51.8k | break; |
13866 | 1.34k | case 2: |
13867 | | // ABS_ZPmZ_B, ADDHNB_ZZZ_B, ADDHNT_ZZZ_B, ADDP_ZPmZ_B, ADD_ZI_B, ADD_ZPm... |
13868 | 1.34k | printSVERegOp(MI, 0, O, 'b'); |
13869 | 1.34k | break; |
13870 | 1.66k | case 3: |
13871 | | // ABS_ZPmZ_D, ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDP_ZPmZ_D, ADD_ZI_D, ADD_ZPmZ_... |
13872 | 1.66k | printSVERegOp(MI, 0, O, 'd'); |
13873 | 1.66k | break; |
13874 | 2.18k | case 4: |
13875 | | // ABS_ZPmZ_H, ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADDP_ZPmZ_H, ADD_ZI_H, ADD_ZPm... |
13876 | 2.18k | printSVERegOp(MI, 0, O, 'h'); |
13877 | 2.18k | SStream_concat0(O, ", "); |
13878 | 2.18k | break; |
13879 | 1.54k | case 5: |
13880 | | // ABS_ZPmZ_S, ADCLB_ZZZ_S, ADCLT_ZZZ_S, ADDHNB_ZZZ_S, ADDHNT_ZZZ_S, ADDP... |
13881 | 1.54k | printSVERegOp(MI, 0, O, 's'); |
13882 | 1.54k | break; |
13883 | 4.59k | case 6: |
13884 | | // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... |
13885 | 4.59k | printVRegOperand(MI, 0, O); |
13886 | 4.59k | break; |
13887 | 864 | case 7: |
13888 | | // ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, FMOPA_MPPZZ_D,... |
13889 | 864 | printMatrixTile(MI, 0, O); |
13890 | 864 | SStream_concat0(O, ", "); |
13891 | 864 | printSVERegOp(MI, 1, O, 0); |
13892 | 864 | SStream_concat0(O, "/m, "); |
13893 | 864 | printSVERegOp(MI, 2, O, 0); |
13894 | 864 | SStream_concat0(O, "/m, "); |
13895 | 864 | break; |
13896 | 2.71k | case 8: |
13897 | | // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... |
13898 | 2.71k | printVRegOperand(MI, 1, O); |
13899 | 2.71k | break; |
13900 | 16 | case 9: |
13901 | | // ANDV_VPZ_B, EORV_VPZ_B, ORV_VPZ_B, SMAXV_VPZ_B, SMINV_VPZ_B, UMAXV_VPZ... |
13902 | 16 | printZPRasFPR(MI, 0, O, 8); |
13903 | 16 | SStream_concat0(O, ", "); |
13904 | 16 | printSVERegOp(MI, 1, O, 0); |
13905 | 16 | SStream_concat0(O, ", "); |
13906 | 16 | printSVERegOp(MI, 2, O, 'b'); |
13907 | 16 | return; |
13908 | 0 | break; |
13909 | 253 | case 10: |
13910 | | // ANDV_VPZ_D, EORV_VPZ_D, FADDA_VPZ_D, FADDV_VPZ_D, FMAXNMV_VPZ_D, FMAXV... |
13911 | 253 | printZPRasFPR(MI, 0, O, 64); |
13912 | 253 | SStream_concat0(O, ", "); |
13913 | 253 | printSVERegOp(MI, 1, O, 0); |
13914 | 253 | SStream_concat0(O, ", "); |
13915 | 253 | break; |
13916 | 5 | case 11: |
13917 | | // ANDV_VPZ_H, EORV_VPZ_H, FADDA_VPZ_H, FADDV_VPZ_H, FMAXNMV_VPZ_H, FMAXV... |
13918 | 5 | printZPRasFPR(MI, 0, O, 16); |
13919 | 5 | SStream_concat0(O, ", "); |
13920 | 5 | printSVERegOp(MI, 1, O, 0); |
13921 | 5 | SStream_concat0(O, ", "); |
13922 | 5 | break; |
13923 | 5 | case 12: |
13924 | | // ANDV_VPZ_S, EORV_VPZ_S, FADDA_VPZ_S, FADDV_VPZ_S, FMAXNMV_VPZ_S, FMAXV... |
13925 | 5 | printZPRasFPR(MI, 0, O, 32); |
13926 | 5 | SStream_concat0(O, ", "); |
13927 | 5 | printSVERegOp(MI, 1, O, 0); |
13928 | 5 | SStream_concat0(O, ", "); |
13929 | 5 | break; |
13930 | 9.34k | case 13: |
13931 | | // AUTDA, AUTDB, AUTDZA, AUTDZB, AUTIA, AUTIB, AUTIZA, AUTIZB, CASAB, CAS... |
13932 | 9.34k | printOperand(MI, 1, O); |
13933 | 9.34k | break; |
13934 | 2.26k | case 14: |
13935 | | // B, BL |
13936 | 2.26k | printAlignedLabel(MI, 0, O); |
13937 | 2.26k | return; |
13938 | 0 | break; |
13939 | 979 | case 15: |
13940 | | // BCcc, Bcc |
13941 | 979 | printCondCode(MI, 0, O); |
13942 | 979 | SStream_concat0(O, "\t"); |
13943 | 979 | printAlignedLabel(MI, 1, O); |
13944 | 979 | return; |
13945 | 0 | break; |
13946 | 11 | case 16: |
13947 | | // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL |
13948 | 11 | printImmHex(MI, 0, O); |
13949 | 11 | return; |
13950 | 0 | break; |
13951 | 14 | case 17: |
13952 | | // CASPALW, CASPAW, CASPLW, CASPW |
13953 | 14 | printGPRSeqPairsClassOperand(MI, 1, O, 32); |
13954 | 14 | SStream_concat0(O, ", "); |
13955 | 14 | printGPRSeqPairsClassOperand(MI, 2, O, 32); |
13956 | 14 | SStream_concat0(O, ", ["); |
13957 | 14 | set_mem_access(MI, true); |
13958 | 14 | printOperand(MI, 3, O); |
13959 | 14 | SStream_concat0(O, "]"); |
13960 | 14 | set_mem_access(MI, false); |
13961 | 14 | return; |
13962 | 0 | break; |
13963 | 7 | case 18: |
13964 | | // CASPALX, CASPAX, CASPLX, CASPX |
13965 | 7 | printGPRSeqPairsClassOperand(MI, 1, O, 64); |
13966 | 7 | SStream_concat0(O, ", "); |
13967 | 7 | printGPRSeqPairsClassOperand(MI, 2, O, 64); |
13968 | 7 | SStream_concat0(O, ", ["); |
13969 | 7 | set_mem_access(MI, true); |
13970 | 7 | printOperand(MI, 3, O); |
13971 | 7 | SStream_concat0(O, "]"); |
13972 | 7 | set_mem_access(MI, false); |
13973 | 7 | return; |
13974 | 0 | break; |
13975 | 47 | case 19: |
13976 | | // CPYE, CPYEN, CPYERN, CPYERT, CPYERTN, CPYERTRN, CPYERTWN, CPYET, CPYET... |
13977 | 47 | printOperand(MI, 3, O); |
13978 | 47 | SStream_concat0(O, "]!, ["); |
13979 | 47 | set_mem_access(MI, false); |
13980 | 47 | set_mem_access(MI, true); |
13981 | 47 | printOperand(MI, 4, O); |
13982 | 47 | SStream_concat0(O, "]!, "); |
13983 | 47 | set_mem_access(MI, false); |
13984 | 47 | printOperand(MI, 5, O); |
13985 | 47 | SStream_concat0(O, "!"); |
13986 | 47 | return; |
13987 | 0 | break; |
13988 | 185 | case 20: |
13989 | | // DMB, DSB, ISB, TSB |
13990 | 185 | printBarrierOption(MI, 0, O); |
13991 | 185 | return; |
13992 | 0 | break; |
13993 | 17 | case 21: |
13994 | | // DSBnXS |
13995 | 17 | printBarriernXSOption(MI, 0, O); |
13996 | 17 | return; |
13997 | 0 | break; |
13998 | 85 | case 22: |
13999 | | // DUP_ZZI_Q, EXTRACT_ZPMXI_H_Q, EXTRACT_ZPMXI_V_Q, PMULLB_ZZZ_Q, PMULLT_... |
14000 | 85 | printSVERegOp(MI, 0, O, 'q'); |
14001 | 85 | SStream_concat0(O, ", "); |
14002 | 85 | break; |
14003 | 2.73k | case 23: |
14004 | | // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ... |
14005 | 2.73k | printTypedVectorList(MI, 0, O, 0,'d'); |
14006 | 2.73k | SStream_concat0(O, ", "); |
14007 | 2.73k | printSVERegOp(MI, 1, O, 0); |
14008 | 2.73k | break; |
14009 | 1.91k | case 24: |
14010 | | // GLD1B_S_IMM_REAL, GLD1B_S_SXTW_REAL, GLD1B_S_UXTW_REAL, GLD1H_S_IMM_RE... |
14011 | 1.91k | printTypedVectorList(MI, 0, O, 0,'s'); |
14012 | 1.91k | SStream_concat0(O, ", "); |
14013 | 1.91k | printSVERegOp(MI, 1, O, 0); |
14014 | 1.91k | break; |
14015 | 341 | case 25: |
14016 | | // HINT |
14017 | 341 | printImm(MI, 0, O); |
14018 | 341 | return; |
14019 | 0 | break; |
14020 | 383 | case 26: |
14021 | | // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q... |
14022 | 383 | printMatrixTileVector(MI, 0, O, 0); |
14023 | 383 | SStream_concat0(O, "["); |
14024 | 383 | set_sme_index(MI, true); |
14025 | 383 | printOperand(MI, 1, O); |
14026 | 383 | SStream_concat0(O, ", "); |
14027 | 383 | printMatrixIndex(MI, 2, O); |
14028 | 383 | break; |
14029 | 937 | case 27: |
14030 | | // INSERT_MXIPZ_V_B, INSERT_MXIPZ_V_D, INSERT_MXIPZ_V_H, INSERT_MXIPZ_V_Q... |
14031 | 937 | printMatrixTileVector(MI, 0, O, 1); |
14032 | 937 | SStream_concat0(O, "["); |
14033 | 937 | set_sme_index(MI, true); |
14034 | 937 | printOperand(MI, 1, O); |
14035 | 937 | SStream_concat0(O, ", "); |
14036 | 937 | printMatrixIndex(MI, 2, O); |
14037 | 937 | break; |
14038 | 1.03k | case 28: |
14039 | | // LD1B, LD1B_IMM_REAL, LD1RB_IMM, LD1RO_B, LD1RO_B_IMM, LD1RQ_B, LD1RQ_B... |
14040 | 1.03k | printTypedVectorList(MI, 0, O, 0,'b'); |
14041 | 1.03k | SStream_concat0(O, ", "); |
14042 | 1.03k | printSVERegOp(MI, 1, O, 0); |
14043 | 1.03k | break; |
14044 | 768 | case 29: |
14045 | | // LD1B_H, LD1B_H_IMM_REAL, LD1H, LD1H_IMM_REAL, LD1RB_H_IMM, LD1RH_IMM, ... |
14046 | 768 | printTypedVectorList(MI, 0, O, 0,'h'); |
14047 | 768 | SStream_concat0(O, ", "); |
14048 | 768 | printSVERegOp(MI, 1, O, 0); |
14049 | 768 | break; |
14050 | 44 | case 30: |
14051 | | // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,... |
14052 | 44 | printTypedVectorList(MI, 0, O, 16, 'b'); |
14053 | 44 | SStream_concat0(O, ", ["); |
14054 | 44 | set_mem_access(MI, true); |
14055 | 44 | printOperand(MI, 1, O); |
14056 | 44 | SStream_concat0(O, "]"); |
14057 | 44 | set_mem_access(MI, false); |
14058 | 44 | return; |
14059 | 0 | break; |
14060 | 671 | case 31: |
14061 | | // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L... |
14062 | 671 | printTypedVectorList(MI, 1, O, 16, 'b'); |
14063 | 671 | SStream_concat0(O, ", ["); |
14064 | 671 | set_mem_access(MI, true); |
14065 | 671 | printOperand(MI, 2, O); |
14066 | 671 | SStream_concat0(O, "], "); |
14067 | 671 | set_mem_access(MI, false); |
14068 | 671 | break; |
14069 | 49 | case 32: |
14070 | | // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv... |
14071 | 49 | printTypedVectorList(MI, 0, O, 1, 'd'); |
14072 | 49 | SStream_concat0(O, ", ["); |
14073 | 49 | set_mem_access(MI, true); |
14074 | 49 | printOperand(MI, 1, O); |
14075 | 49 | SStream_concat0(O, "]"); |
14076 | 49 | set_mem_access(MI, false); |
14077 | 49 | return; |
14078 | 0 | break; |
14079 | 323 | case 33: |
14080 | | // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw... |
14081 | 323 | printTypedVectorList(MI, 1, O, 1, 'd'); |
14082 | 323 | SStream_concat0(O, ", ["); |
14083 | 323 | set_mem_access(MI, true); |
14084 | 323 | printOperand(MI, 2, O); |
14085 | 323 | SStream_concat0(O, "], "); |
14086 | 323 | set_mem_access(MI, false); |
14087 | 323 | break; |
14088 | 18 | case 34: |
14089 | | // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw... |
14090 | 18 | printTypedVectorList(MI, 0, O, 2, 'd'); |
14091 | 18 | SStream_concat0(O, ", ["); |
14092 | 18 | set_mem_access(MI, true); |
14093 | 18 | printOperand(MI, 1, O); |
14094 | 18 | SStream_concat0(O, "]"); |
14095 | 18 | set_mem_access(MI, false); |
14096 | 18 | return; |
14097 | 0 | break; |
14098 | 1.03k | case 35: |
14099 | | // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw... |
14100 | 1.03k | printTypedVectorList(MI, 1, O, 2, 'd'); |
14101 | 1.03k | SStream_concat0(O, ", ["); |
14102 | 1.03k | set_mem_access(MI, true); |
14103 | 1.03k | printOperand(MI, 2, O); |
14104 | 1.03k | SStream_concat0(O, "], "); |
14105 | 1.03k | set_mem_access(MI, false); |
14106 | 1.03k | break; |
14107 | 76 | case 36: |
14108 | | // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw... |
14109 | 76 | printTypedVectorList(MI, 0, O, 2, 's'); |
14110 | 76 | SStream_concat0(O, ", ["); |
14111 | 76 | set_mem_access(MI, true); |
14112 | 76 | printOperand(MI, 1, O); |
14113 | 76 | SStream_concat0(O, "]"); |
14114 | 76 | set_mem_access(MI, false); |
14115 | 76 | return; |
14116 | 0 | break; |
14117 | 460 | case 37: |
14118 | | // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw... |
14119 | 460 | printTypedVectorList(MI, 1, O, 2, 's'); |
14120 | 460 | SStream_concat0(O, ", ["); |
14121 | 460 | set_mem_access(MI, true); |
14122 | 460 | printOperand(MI, 2, O); |
14123 | 460 | SStream_concat0(O, "], "); |
14124 | 460 | set_mem_access(MI, false); |
14125 | 460 | break; |
14126 | 60 | case 38: |
14127 | | // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw... |
14128 | 60 | printTypedVectorList(MI, 0, O, 4, 'h'); |
14129 | 60 | SStream_concat0(O, ", ["); |
14130 | 60 | set_mem_access(MI, true); |
14131 | 60 | printOperand(MI, 1, O); |
14132 | 60 | SStream_concat0(O, "]"); |
14133 | 60 | set_mem_access(MI, false); |
14134 | 60 | return; |
14135 | 0 | break; |
14136 | 549 | case 39: |
14137 | | // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw... |
14138 | 549 | printTypedVectorList(MI, 1, O, 4, 'h'); |
14139 | 549 | SStream_concat0(O, ", ["); |
14140 | 549 | set_mem_access(MI, true); |
14141 | 549 | printOperand(MI, 2, O); |
14142 | 549 | SStream_concat0(O, "], "); |
14143 | 549 | set_mem_access(MI, false); |
14144 | 549 | break; |
14145 | 376 | case 40: |
14146 | | // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw... |
14147 | 376 | printTypedVectorList(MI, 0, O, 4, 's'); |
14148 | 376 | SStream_concat0(O, ", ["); |
14149 | 376 | set_mem_access(MI, true); |
14150 | 376 | printOperand(MI, 1, O); |
14151 | 376 | SStream_concat0(O, "]"); |
14152 | 376 | set_mem_access(MI, false); |
14153 | 376 | return; |
14154 | 0 | break; |
14155 | 568 | case 41: |
14156 | | // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw... |
14157 | 568 | printTypedVectorList(MI, 1, O, 4, 's'); |
14158 | 568 | SStream_concat0(O, ", ["); |
14159 | 568 | set_mem_access(MI, true); |
14160 | 568 | printOperand(MI, 2, O); |
14161 | 568 | SStream_concat0(O, "], "); |
14162 | 568 | set_mem_access(MI, false); |
14163 | 568 | break; |
14164 | 38 | case 42: |
14165 | | // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw... |
14166 | 38 | printTypedVectorList(MI, 0, O, 8, 'b'); |
14167 | 38 | SStream_concat0(O, ", ["); |
14168 | 38 | set_mem_access(MI, true); |
14169 | 38 | printOperand(MI, 1, O); |
14170 | 38 | SStream_concat0(O, "]"); |
14171 | 38 | set_mem_access(MI, false); |
14172 | 38 | return; |
14173 | 0 | break; |
14174 | 254 | case 43: |
14175 | | // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw... |
14176 | 254 | printTypedVectorList(MI, 1, O, 8, 'b'); |
14177 | 254 | SStream_concat0(O, ", ["); |
14178 | 254 | set_mem_access(MI, true); |
14179 | 254 | printOperand(MI, 2, O); |
14180 | 254 | SStream_concat0(O, "], "); |
14181 | 254 | set_mem_access(MI, false); |
14182 | 254 | break; |
14183 | 518 | case 44: |
14184 | | // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw... |
14185 | 518 | printTypedVectorList(MI, 0, O, 8, 'h'); |
14186 | 518 | SStream_concat0(O, ", ["); |
14187 | 518 | set_mem_access(MI, true); |
14188 | 518 | printOperand(MI, 1, O); |
14189 | 518 | SStream_concat0(O, "]"); |
14190 | 518 | set_mem_access(MI, false); |
14191 | 518 | return; |
14192 | 0 | break; |
14193 | 343 | case 45: |
14194 | | // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw... |
14195 | 343 | printTypedVectorList(MI, 1, O, 8, 'h'); |
14196 | 343 | SStream_concat0(O, ", ["); |
14197 | 343 | set_mem_access(MI, true); |
14198 | 343 | printOperand(MI, 2, O); |
14199 | 343 | SStream_concat0(O, "], "); |
14200 | 343 | set_mem_access(MI, false); |
14201 | 343 | break; |
14202 | 1.00k | case 46: |
14203 | | // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,... |
14204 | 1.00k | printTypedVectorList(MI, 1, O, 0, 'h'); |
14205 | 1.00k | printVectorIndex(MI, 2, O); |
14206 | 1.00k | SStream_concat0(O, ", ["); |
14207 | 1.00k | set_mem_access(MI, true); |
14208 | 1.00k | printOperand(MI, 3, O); |
14209 | 1.00k | break; |
14210 | 251 | case 47: |
14211 | | // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST |
14212 | 251 | printTypedVectorList(MI, 2, O, 0, 'h'); |
14213 | 251 | printVectorIndex(MI, 3, O); |
14214 | 251 | SStream_concat0(O, ", ["); |
14215 | 251 | set_mem_access(MI, true); |
14216 | 251 | printOperand(MI, 4, O); |
14217 | 251 | SStream_concat0(O, "], "); |
14218 | 251 | set_mem_access(MI, false); |
14219 | 251 | break; |
14220 | 300 | case 48: |
14221 | | // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,... |
14222 | 300 | printTypedVectorList(MI, 1, O, 0, 's'); |
14223 | 300 | printVectorIndex(MI, 2, O); |
14224 | 300 | SStream_concat0(O, ", ["); |
14225 | 300 | set_mem_access(MI, true); |
14226 | 300 | printOperand(MI, 3, O); |
14227 | 300 | break; |
14228 | 359 | case 49: |
14229 | | // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST |
14230 | 359 | printTypedVectorList(MI, 2, O, 0, 's'); |
14231 | 359 | printVectorIndex(MI, 3, O); |
14232 | 359 | SStream_concat0(O, ", ["); |
14233 | 359 | set_mem_access(MI, true); |
14234 | 359 | printOperand(MI, 4, O); |
14235 | 359 | SStream_concat0(O, "], "); |
14236 | 359 | set_mem_access(MI, false); |
14237 | 359 | break; |
14238 | 1.33k | case 50: |
14239 | | // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,... |
14240 | 1.33k | printTypedVectorList(MI, 1, O, 0, 'd'); |
14241 | 1.33k | printVectorIndex(MI, 2, O); |
14242 | 1.33k | SStream_concat0(O, ", ["); |
14243 | 1.33k | set_mem_access(MI, true); |
14244 | 1.33k | printOperand(MI, 3, O); |
14245 | 1.33k | break; |
14246 | 807 | case 51: |
14247 | | // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST |
14248 | 807 | printTypedVectorList(MI, 2, O, 0, 'd'); |
14249 | 807 | printVectorIndex(MI, 3, O); |
14250 | 807 | SStream_concat0(O, ", ["); |
14251 | 807 | set_mem_access(MI, true); |
14252 | 807 | printOperand(MI, 4, O); |
14253 | 807 | SStream_concat0(O, "], "); |
14254 | 807 | set_mem_access(MI, false); |
14255 | 807 | break; |
14256 | 841 | case 52: |
14257 | | // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_... |
14258 | 841 | printTypedVectorList(MI, 1, O, 0, 'b'); |
14259 | 841 | printVectorIndex(MI, 2, O); |
14260 | 841 | SStream_concat0(O, ", ["); |
14261 | 841 | set_mem_access(MI, true); |
14262 | 841 | printOperand(MI, 3, O); |
14263 | 841 | break; |
14264 | 870 | case 53: |
14265 | | // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST |
14266 | 870 | printTypedVectorList(MI, 2, O, 0, 'b'); |
14267 | 870 | printVectorIndex(MI, 3, O); |
14268 | 870 | SStream_concat0(O, ", ["); |
14269 | 870 | set_mem_access(MI, true); |
14270 | 870 | printOperand(MI, 4, O); |
14271 | 870 | SStream_concat0(O, "], "); |
14272 | 870 | set_mem_access(MI, false); |
14273 | 870 | break; |
14274 | 266 | case 54: |
14275 | | // LD64B, ST64B |
14276 | 266 | printGPR64x8(MI, 0, O); |
14277 | 266 | SStream_concat0(O, ", ["); |
14278 | 266 | set_mem_access(MI, true); |
14279 | 266 | printOperand(MI, 1, O); |
14280 | 266 | SStream_concat0(O, "]"); |
14281 | 266 | set_mem_access(MI, false); |
14282 | 266 | return; |
14283 | 0 | break; |
14284 | 415 | case 55: |
14285 | | // LDR_PXI, LDR_ZXI, MOVPRFX_ZZ, PSEL_PPPRI_B, PSEL_PPPRI_D, PSEL_PPPRI_H... |
14286 | 415 | printSVERegOp(MI, 0, O, 0); |
14287 | 415 | break; |
14288 | 66 | case 56: |
14289 | | // LDR_ZA, STR_ZA |
14290 | 66 | printMatrix(MI, 0, O, 0); |
14291 | 66 | SStream_concat0(O, "["); |
14292 | 66 | set_sme_index(MI, true); |
14293 | 66 | printOperand(MI, 1, O); |
14294 | 66 | SStream_concat0(O, ", "); |
14295 | 66 | printMatrixIndex(MI, 2, O); |
14296 | 66 | SStream_concat0(O, "], ["); |
14297 | 66 | set_mem_access(MI, false); |
14298 | 66 | set_mem_access(MI, true); |
14299 | 66 | printOperand(MI, 3, O); |
14300 | 66 | SStream_concat0(O, ", "); |
14301 | 66 | printOperand(MI, 4, O); |
14302 | 66 | SStream_concat0(O, ", mul vl]"); |
14303 | 66 | set_mem_access(MI, false); |
14304 | 66 | return; |
14305 | 0 | break; |
14306 | 5 | case 57: |
14307 | | // MOPSSETGE, MOPSSETGEN, MOPSSETGET, MOPSSETGETN, SETE, SETEN, SETET, SE... |
14308 | 5 | printOperand(MI, 2, O); |
14309 | 5 | SStream_concat0(O, "]!, "); |
14310 | 5 | set_mem_access(MI, false); |
14311 | 5 | printOperand(MI, 3, O); |
14312 | 5 | SStream_concat0(O, "!, "); |
14313 | 5 | printOperand(MI, 4, O); |
14314 | 5 | return; |
14315 | 0 | break; |
14316 | 613 | case 58: |
14317 | | // MSR |
14318 | 613 | printMSRSystemRegister(MI, 0, O); |
14319 | 613 | SStream_concat0(O, ", "); |
14320 | 613 | printOperand(MI, 1, O); |
14321 | 613 | return; |
14322 | 0 | break; |
14323 | 16 | case 59: |
14324 | | // MSRpstateImm1, MSRpstateImm4 |
14325 | 16 | printSystemPStateField(MI, 0, O); |
14326 | 16 | SStream_concat0(O, ", "); |
14327 | 16 | printOperand(MI, 1, O); |
14328 | 16 | return; |
14329 | 0 | break; |
14330 | 0 | case 60: |
14331 | | // MSRpstatesvcrImm1 |
14332 | 0 | printSVCROp(MI, 0, O); |
14333 | 0 | SStream_concat0(O, ", "); |
14334 | 0 | printOperand(MI, 1, O); |
14335 | 0 | return; |
14336 | 0 | break; |
14337 | 1.42k | case 61: |
14338 | | // PRFB_D_PZI, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRF... |
14339 | 1.42k | printPrefetchOp(MI, 0, O, true); |
14340 | 1.42k | SStream_concat0(O, ", "); |
14341 | 1.42k | printSVERegOp(MI, 1, O, 0); |
14342 | 1.42k | SStream_concat0(O, ", ["); |
14343 | 1.42k | set_mem_access(MI, true); |
14344 | 1.42k | break; |
14345 | 1.45k | case 62: |
14346 | | // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi |
14347 | 1.45k | printPrefetchOp(MI, 0, O, false); |
14348 | 1.45k | break; |
14349 | 650 | case 63: |
14350 | | // ST1i16, ST2i16, ST3i16, ST4i16 |
14351 | 650 | printTypedVectorList(MI, 0, O, 0, 'h'); |
14352 | 650 | printVectorIndex(MI, 1, O); |
14353 | 650 | SStream_concat0(O, ", ["); |
14354 | 650 | set_mem_access(MI, true); |
14355 | 650 | printOperand(MI, 2, O); |
14356 | 650 | SStream_concat0(O, "]"); |
14357 | 650 | set_mem_access(MI, false); |
14358 | 650 | return; |
14359 | 0 | break; |
14360 | 211 | case 64: |
14361 | | // ST1i32, ST2i32, ST3i32, ST4i32 |
14362 | 211 | printTypedVectorList(MI, 0, O, 0, 's'); |
14363 | 211 | printVectorIndex(MI, 1, O); |
14364 | 211 | SStream_concat0(O, ", ["); |
14365 | 211 | set_mem_access(MI, true); |
14366 | 211 | printOperand(MI, 2, O); |
14367 | 211 | SStream_concat0(O, "]"); |
14368 | 211 | set_mem_access(MI, false); |
14369 | 211 | return; |
14370 | 0 | break; |
14371 | 1.30k | case 65: |
14372 | | // ST1i64, ST2i64, ST3i64, ST4i64 |
14373 | 1.30k | printTypedVectorList(MI, 0, O, 0, 'd'); |
14374 | 1.30k | printVectorIndex(MI, 1, O); |
14375 | 1.30k | SStream_concat0(O, ", ["); |
14376 | 1.30k | set_mem_access(MI, true); |
14377 | 1.30k | printOperand(MI, 2, O); |
14378 | 1.30k | SStream_concat0(O, "]"); |
14379 | 1.30k | set_mem_access(MI, false); |
14380 | 1.30k | return; |
14381 | 0 | break; |
14382 | 880 | case 66: |
14383 | | // ST1i8, ST2i8, ST3i8, ST4i8 |
14384 | 880 | printTypedVectorList(MI, 0, O, 0, 'b'); |
14385 | 880 | printVectorIndex(MI, 1, O); |
14386 | 880 | SStream_concat0(O, ", ["); |
14387 | 880 | set_mem_access(MI, true); |
14388 | 880 | printOperand(MI, 2, O); |
14389 | 880 | SStream_concat0(O, "]"); |
14390 | 880 | set_mem_access(MI, false); |
14391 | 880 | return; |
14392 | 0 | break; |
14393 | 32 | case 67: |
14394 | | // ZERO_M |
14395 | 32 | printMatrixTileList(MI, 0, O); |
14396 | 32 | return; |
14397 | 0 | break; |
14398 | 106k | } |
14399 | | |
14400 | | |
14401 | | // Fragment 1 encoded into 7 bits for 69 unique commands. |
14402 | | // printf("Fragment 1: %"PRIu64"\n", ((Bits >> 21) & 127)); |
14403 | 97.5k | switch ((Bits >> 21) & 127) { |
14404 | 0 | default: // unreachable |
14405 | 8.66k | case 0: |
14406 | | // TLSDESCCALL, AUTDZA, AUTDZB, AUTIZA, AUTIZB, BLR, BLRAAZ, BLRABZ, BR, ... |
14407 | 8.66k | return; |
14408 | 0 | break; |
14409 | 43.8k | case 1: |
14410 | | // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, ABSv1i64, ADCLB_ZZZ_D, ADCLB_ZZZ_S... |
14411 | 43.8k | SStream_concat0(O, ", "); |
14412 | 43.8k | break; |
14413 | 32 | case 2: |
14414 | | // ABS_ZPmZ_H, BFCVTNT_ZPmZ, BFCVT_ZPmZ, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPm... |
14415 | 32 | printSVERegOp(MI, 2, O, 0); |
14416 | 32 | SStream_concat0(O, "/m, "); |
14417 | 32 | break; |
14418 | 403 | case 3: |
14419 | | // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM... |
14420 | 403 | SStream_concat0(O, ".16b, "); |
14421 | 403 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
14422 | 403 | break; |
14423 | 667 | case 4: |
14424 | | // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BF16DOTlanev4bf16, BF... |
14425 | 667 | SStream_concat0(O, ".2s, "); |
14426 | 667 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
14427 | 667 | break; |
14428 | 951 | case 5: |
14429 | | // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE... |
14430 | 951 | SStream_concat0(O, ".2d, "); |
14431 | 951 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
14432 | 951 | break; |
14433 | 1.74k | case 6: |
14434 | | // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BFCVTN, BICv4i16, CLS... |
14435 | 1.74k | SStream_concat0(O, ".4h, "); |
14436 | 1.74k | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
14437 | 1.74k | break; |
14438 | 1.35k | case 7: |
14439 | | // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BF16DOTlanev8bf16, BF... |
14440 | 1.35k | SStream_concat0(O, ".4s, "); |
14441 | 1.35k | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
14442 | 1.35k | break; |
14443 | 1.17k | case 8: |
14444 | | // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BFCVTN2, BICv8i16, CL... |
14445 | 1.17k | SStream_concat0(O, ".8h, "); |
14446 | 1.17k | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
14447 | 1.17k | break; |
14448 | 948 | case 9: |
14449 | | // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8... |
14450 | 948 | SStream_concat0(O, ".8b, "); |
14451 | 948 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
14452 | 948 | break; |
14453 | 81 | case 10: |
14454 | | // ADDHA_MPPZ_D, ADDVA_MPPZ_D, FMOPA_MPPZZ_D, FMOPS_MPPZZ_D |
14455 | 81 | printSVERegOp(MI, 3, O, 'd'); |
14456 | 81 | break; |
14457 | 87 | case 11: |
14458 | | // ADDHA_MPPZ_S, ADDVA_MPPZ_S, FMOPA_MPPZZ_S, FMOPS_MPPZZ_S |
14459 | 87 | printSVERegOp(MI, 3, O, 's'); |
14460 | 87 | break; |
14461 | 46 | case 12: |
14462 | | // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSHRNB_ZZI_H, RSUBHNB_ZZZ_H, SHRNB_ZZI_H,... |
14463 | 46 | printSVERegOp(MI, 1, O, 's'); |
14464 | 46 | break; |
14465 | 120 | case 13: |
14466 | | // ADDHNT_ZZZ_H, ANDV_VPZ_S, EORV_VPZ_S, FADDV_VPZ_S, FMAXNMV_VPZ_S, FMAX... |
14467 | 120 | printSVERegOp(MI, 2, O, 's'); |
14468 | 120 | break; |
14469 | 630 | case 14: |
14470 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... |
14471 | 630 | printSVERegOp(MI, 1, O, 0); |
14472 | 630 | break; |
14473 | 408 | case 15: |
14474 | | // ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_ZZI_H, BDEP_ZZZ_H, BEXT_ZZZ_H... |
14475 | 408 | printSVERegOp(MI, 1, O, 'h'); |
14476 | 408 | break; |
14477 | 15.7k | case 16: |
14478 | | // ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, ADR_LSL_ZZZ_D_2, ADR_LSL_ZZZ_D_3, AD... |
14479 | 15.7k | SStream_concat0(O, ", ["); |
14480 | 15.7k | set_mem_access(MI, true); |
14481 | 15.7k | break; |
14482 | 132 | case 17: |
14483 | | // ANDV_VPZ_D, EORV_VPZ_D, FADDV_VPZ_D, FMAXNMV_VPZ_D, FMAXV_VPZ_D, FMINN... |
14484 | 132 | printSVERegOp(MI, 2, O, 'd'); |
14485 | 132 | break; |
14486 | 98 | case 18: |
14487 | | // ANDV_VPZ_H, CMLA_ZZZI_H, CMLA_ZZZ_H, DECP_ZP_H, EORBT_ZZZ_H, EORTB_ZZZ... |
14488 | 98 | printSVERegOp(MI, 2, O, 'h'); |
14489 | 98 | break; |
14490 | 31 | case 19: |
14491 | | // DECH_ZPiI, INCH_ZPiI, SQDECH_ZPiI, SQINCH_ZPiI, UQDECH_ZPiI, UQINCH_ZP... |
14492 | 31 | printSVEPattern(MI, 2, O); |
14493 | 31 | SStream_concat0(O, ", mul "); |
14494 | 31 | printOperand(MI, 3, O); |
14495 | 31 | return; |
14496 | 0 | break; |
14497 | 0 | case 20: |
14498 | | // DUP_ZI_H |
14499 | 0 | printImm8OptLsl32(MI, 1, O); |
14500 | 0 | return; |
14501 | 0 | break; |
14502 | 135 | case 21: |
14503 | | // DUP_ZR_H, INDEX_RI_H, INDEX_RR_H, WHILEGE_PWW_H, WHILEGE_PXX_H, WHILEG... |
14504 | 135 | printOperand(MI, 1, O); |
14505 | 135 | break; |
14506 | 72 | case 22: |
14507 | | // DUP_ZZI_Q, TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, ZIP1_ZZZ_Q,... |
14508 | 72 | printSVERegOp(MI, 1, O, 'q'); |
14509 | 72 | break; |
14510 | 223 | case 23: |
14511 | | // FADDA_VPZ_D |
14512 | 223 | printZPRasFPR(MI, 2, O, 64); |
14513 | 223 | SStream_concat0(O, ", "); |
14514 | 223 | printSVERegOp(MI, 3, O, 'd'); |
14515 | 223 | return; |
14516 | 0 | break; |
14517 | 77 | case 24: |
14518 | | // FADDA_VPZ_H, INSR_ZV_H |
14519 | 77 | printZPRasFPR(MI, 2, O, 16); |
14520 | 77 | break; |
14521 | 5 | case 25: |
14522 | | // FADDA_VPZ_S |
14523 | 5 | printZPRasFPR(MI, 2, O, 32); |
14524 | 5 | SStream_concat0(O, ", "); |
14525 | 5 | printSVERegOp(MI, 3, O, 's'); |
14526 | 5 | return; |
14527 | 0 | break; |
14528 | 133 | case 26: |
14529 | | // FCMPDri, FCMPEDri, FCMPEHri, FCMPESri, FCMPHri, FCMPSri |
14530 | 133 | SStream_concat0(O, ", #0.0"); |
14531 | 133 | arm64_op_addFP(MI, 0); |
14532 | 133 | return; |
14533 | 0 | break; |
14534 | 0 | case 27: |
14535 | | // FDUP_ZI_H |
14536 | 0 | printFPImmOperand(MI, 1, O); |
14537 | 0 | return; |
14538 | 0 | break; |
14539 | 23 | case 28: |
14540 | | // FMOVXDHighr, INSvi64gpr, INSvi64lane |
14541 | 23 | SStream_concat0(O, ".d"); |
14542 | 23 | printVectorIndex(MI, 2, O); |
14543 | 23 | SStream_concat0(O, ", "); |
14544 | 23 | break; |
14545 | 5.70k | case 29: |
14546 | | // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ... |
14547 | 5.70k | SStream_concat0(O, "/z, ["); |
14548 | 5.70k | set_mem_access(MI, true); |
14549 | 5.70k | break; |
14550 | 330 | case 30: |
14551 | | // INDEX_II_H, INDEX_IR_H |
14552 | 330 | printSImm(MI, 1, O, 16); |
14553 | 330 | SStream_concat0(O, ", "); |
14554 | 330 | break; |
14555 | 1.90k | case 31: |
14556 | | // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q... |
14557 | 1.90k | SStream_concat0(O, "], "); |
14558 | 1.90k | set_mem_access(MI, false); |
14559 | 1.90k | break; |
14560 | 1.22k | case 32: |
14561 | | // INSR_ZR_H, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRFB... |
14562 | 1.22k | printOperand(MI, 2, O); |
14563 | 1.22k | break; |
14564 | 0 | case 33: |
14565 | | // INSvi16gpr, INSvi16lane |
14566 | 0 | SStream_concat0(O, ".h"); |
14567 | 0 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H); |
14568 | 0 | printVectorIndex(MI, 2, O); |
14569 | 0 | SStream_concat0(O, ", "); |
14570 | 0 | break; |
14571 | 0 | case 34: |
14572 | | // INSvi32gpr, INSvi32lane |
14573 | 0 | SStream_concat0(O, ".s"); |
14574 | 0 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S); |
14575 | 0 | printVectorIndex(MI, 2, O); |
14576 | 0 | SStream_concat0(O, ", "); |
14577 | 0 | break; |
14578 | 0 | case 35: |
14579 | | // INSvi8gpr, INSvi8lane |
14580 | 0 | SStream_concat0(O, ".b"); |
14581 | 0 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1B); |
14582 | 0 | printVectorIndex(MI, 2, O); |
14583 | 0 | SStream_concat0(O, ", "); |
14584 | 0 | break; |
14585 | 286 | case 36: |
14586 | | // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L... |
14587 | 286 | printPostIncOperand(MI, 3, O, 64); |
14588 | 286 | return; |
14589 | 0 | break; |
14590 | 922 | case 37: |
14591 | | // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD... |
14592 | 922 | printPostIncOperand(MI, 3, O, 32); |
14593 | 922 | return; |
14594 | 0 | break; |
14595 | 979 | case 38: |
14596 | | // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw... |
14597 | 979 | printPostIncOperand(MI, 3, O, 16); |
14598 | 979 | return; |
14599 | 0 | break; |
14600 | 200 | case 39: |
14601 | | // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1... |
14602 | 200 | printPostIncOperand(MI, 3, O, 8); |
14603 | 200 | return; |
14604 | 0 | break; |
14605 | 13 | case 40: |
14606 | | // LD1Rv16b_POST, LD1Rv8b_POST |
14607 | 13 | printPostIncOperand(MI, 3, O, 1); |
14608 | 13 | return; |
14609 | 0 | break; |
14610 | 118 | case 41: |
14611 | | // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,... |
14612 | 118 | printPostIncOperand(MI, 3, O, 4); |
14613 | 118 | return; |
14614 | 0 | break; |
14615 | 34 | case 42: |
14616 | | // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST |
14617 | 34 | printPostIncOperand(MI, 3, O, 2); |
14618 | 34 | return; |
14619 | 0 | break; |
14620 | 825 | case 43: |
14621 | | // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS... |
14622 | 825 | printPostIncOperand(MI, 3, O, 48); |
14623 | 825 | return; |
14624 | 0 | break; |
14625 | 556 | case 44: |
14626 | | // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST... |
14627 | 556 | printPostIncOperand(MI, 3, O, 24); |
14628 | 556 | return; |
14629 | 0 | break; |
14630 | 1.32k | case 45: |
14631 | | // LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX... |
14632 | 1.32k | SStream_concat0(O, "]}, "); |
14633 | 1.32k | set_mem_access(MI, false); |
14634 | 1.32k | printSVERegOp(MI, 3, O, 0); |
14635 | 1.32k | break; |
14636 | 1.56k | case 46: |
14637 | | // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ... |
14638 | 1.56k | SStream_concat0(O, "]"); |
14639 | 1.56k | set_mem_access(MI, false); |
14640 | 1.56k | return; |
14641 | 0 | break; |
14642 | 180 | case 47: |
14643 | | // LD1i16_POST, LD2i8_POST |
14644 | 180 | printPostIncOperand(MI, 5, O, 2); |
14645 | 180 | return; |
14646 | 0 | break; |
14647 | 166 | case 48: |
14648 | | // LD1i32_POST, LD2i16_POST, LD4i8_POST |
14649 | 166 | printPostIncOperand(MI, 5, O, 4); |
14650 | 166 | return; |
14651 | 0 | break; |
14652 | 387 | case 49: |
14653 | | // LD1i64_POST, LD2i32_POST, LD4i16_POST |
14654 | 387 | printPostIncOperand(MI, 5, O, 8); |
14655 | 387 | return; |
14656 | 0 | break; |
14657 | 400 | case 50: |
14658 | | // LD1i8_POST |
14659 | 400 | printPostIncOperand(MI, 5, O, 1); |
14660 | 400 | return; |
14661 | 0 | break; |
14662 | 534 | case 51: |
14663 | | // LD2i64_POST, LD4i32_POST |
14664 | 534 | printPostIncOperand(MI, 5, O, 16); |
14665 | 534 | return; |
14666 | 0 | break; |
14667 | 12 | case 52: |
14668 | | // LD3Rv16b_POST, LD3Rv8b_POST |
14669 | 12 | printPostIncOperand(MI, 3, O, 3); |
14670 | 12 | return; |
14671 | 0 | break; |
14672 | 99 | case 53: |
14673 | | // LD3Rv2s_POST, LD3Rv4s_POST |
14674 | 99 | printPostIncOperand(MI, 3, O, 12); |
14675 | 99 | return; |
14676 | 0 | break; |
14677 | 156 | case 54: |
14678 | | // LD3Rv4h_POST, LD3Rv8h_POST |
14679 | 156 | printPostIncOperand(MI, 3, O, 6); |
14680 | 156 | return; |
14681 | 0 | break; |
14682 | 121 | case 55: |
14683 | | // LD3i16_POST |
14684 | 121 | printPostIncOperand(MI, 5, O, 6); |
14685 | 121 | return; |
14686 | 0 | break; |
14687 | 49 | case 56: |
14688 | | // LD3i32_POST |
14689 | 49 | printPostIncOperand(MI, 5, O, 12); |
14690 | 49 | return; |
14691 | 0 | break; |
14692 | 61 | case 57: |
14693 | | // LD3i64_POST |
14694 | 61 | printPostIncOperand(MI, 5, O, 24); |
14695 | 61 | return; |
14696 | 0 | break; |
14697 | 350 | case 58: |
14698 | | // LD3i8_POST |
14699 | 350 | printPostIncOperand(MI, 5, O, 3); |
14700 | 350 | return; |
14701 | 0 | break; |
14702 | 39 | case 59: |
14703 | | // LD4i64_POST |
14704 | 39 | printPostIncOperand(MI, 5, O, 32); |
14705 | 39 | return; |
14706 | 0 | break; |
14707 | 38 | case 60: |
14708 | | // PMULLB_ZZZ_H, PMULLT_ZZZ_H, PUNPKHI_PP, PUNPKLO_PP, SABDLB_ZZZ_H, SABD... |
14709 | 38 | printSVERegOp(MI, 1, O, 'b'); |
14710 | 38 | break; |
14711 | 10 | case 61: |
14712 | | // PMULLB_ZZZ_Q, PMULLT_ZZZ_Q |
14713 | 10 | printSVERegOp(MI, 1, O, 'd'); |
14714 | 10 | SStream_concat0(O, ", "); |
14715 | 10 | printSVERegOp(MI, 2, O, 'd'); |
14716 | 10 | return; |
14717 | 0 | break; |
14718 | 28 | case 62: |
14719 | | // PMULLv1i64, PMULLv2i64 |
14720 | 28 | SStream_concat0(O, ".1q, "); |
14721 | 28 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1Q); |
14722 | 28 | printVRegOperand(MI, 1, O); |
14723 | 28 | break; |
14724 | 4 | case 63: |
14725 | | // PTRUES_H, PTRUE_H |
14726 | 4 | printSVEPattern(MI, 1, O); |
14727 | 4 | return; |
14728 | 0 | break; |
14729 | 166 | case 64: |
14730 | | // SABALB_ZZZ_H, SABALT_ZZZ_H, SADDV_VPZ_B, SMLALB_ZZZ_H, SMLALT_ZZZ_H, S... |
14731 | 166 | printSVERegOp(MI, 2, O, 'b'); |
14732 | 166 | break; |
14733 | 8 | case 65: |
14734 | | // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v... |
14735 | 8 | SStream_concat0(O, ".1d, "); |
14736 | 8 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); |
14737 | 8 | break; |
14738 | 355 | case 66: |
14739 | | // SMOPA_MPPZZ_D, SMOPS_MPPZZ_D, SUMOPA_MPPZZ_D, SUMOPS_MPPZZ_D, UMOPA_MP... |
14740 | 355 | printSVERegOp(MI, 3, O, 'h'); |
14741 | 355 | SStream_concat0(O, ", "); |
14742 | 355 | printSVERegOp(MI, 4, O, 'h'); |
14743 | 355 | return; |
14744 | 0 | break; |
14745 | 341 | case 67: |
14746 | | // SMOPA_MPPZZ_S, SMOPS_MPPZZ_S, SUMOPA_MPPZZ_S, SUMOPS_MPPZZ_S, UMOPA_MP... |
14747 | 341 | printSVERegOp(MI, 3, O, 'b'); |
14748 | 341 | SStream_concat0(O, ", "); |
14749 | 341 | printSVERegOp(MI, 4, O, 'b'); |
14750 | 341 | return; |
14751 | 0 | break; |
14752 | 183 | case 68: |
14753 | | // TBL_ZZZZ_H, TBL_ZZZ_H |
14754 | 183 | printTypedVectorList(MI, 1, O, 0,'h'); |
14755 | 183 | SStream_concat0(O, ", "); |
14756 | 183 | printSVERegOp(MI, 2, O, 'h'); |
14757 | 183 | return; |
14758 | 0 | break; |
14759 | 97.5k | } |
14760 | | |
14761 | | |
14762 | | // Fragment 2 encoded into 7 bits for 69 unique commands. |
14763 | | // printf("Fragment 2: %"PRIu64"\n", ((Bits >> 28) & 127)); |
14764 | 79.4k | switch ((Bits >> 28) & 127) { |
14765 | 0 | default: // unreachable |
14766 | 59 | case 0: |
14767 | | // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, BRKA_PPmP, BRKB_PPmP, CLS_ZPmZ_B, ... |
14768 | 59 | printSVERegOp(MI, 2, O, 0); |
14769 | 59 | SStream_concat0(O, "/m, "); |
14770 | 59 | break; |
14771 | 12 | case 1: |
14772 | | // ABS_ZPmZ_H, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPmZ_H, CNT_ZPmZ_H, FABS_ZPmZ... |
14773 | 12 | printSVERegOp(MI, 3, O, 'h'); |
14774 | 12 | return; |
14775 | 0 | break; |
14776 | 3.52k | case 2: |
14777 | | // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... |
14778 | 3.52k | printVRegOperand(MI, 1, O); |
14779 | 3.52k | break; |
14780 | 34.8k | case 3: |
14781 | | // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDSWri, ADDS... |
14782 | 34.8k | printOperand(MI, 1, O); |
14783 | 34.8k | break; |
14784 | 130 | case 4: |
14785 | | // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, DECP_ZP_D, EORBT_Z... |
14786 | 130 | printSVERegOp(MI, 2, O, 'd'); |
14787 | 130 | break; |
14788 | 643 | case 5: |
14789 | | // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, DECP_ZP_S, EORBT_ZZ... |
14790 | 643 | printSVERegOp(MI, 2, O, 's'); |
14791 | 643 | break; |
14792 | 164 | case 6: |
14793 | | // ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, ANDV_VPZ_D, AN... |
14794 | 164 | return; |
14795 | 0 | break; |
14796 | 82 | case 7: |
14797 | | // ADDHNB_ZZZ_B, DECP_XP_H, INCP_XP_H, RADDHNB_ZZZ_B, RSHRNB_ZZI_B, RSUBH... |
14798 | 82 | printSVERegOp(MI, 1, O, 'h'); |
14799 | 82 | break; |
14800 | 2.52k | case 8: |
14801 | | // ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_Z... |
14802 | 2.52k | SStream_concat0(O, ", "); |
14803 | 2.52k | break; |
14804 | 752 | case 9: |
14805 | | // ADDHNB_ZZZ_S, ADD_ZI_D, ADD_ZZZ_D, ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, A... |
14806 | 752 | printSVERegOp(MI, 1, O, 'd'); |
14807 | 752 | break; |
14808 | 82 | case 10: |
14809 | | // ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMMLA_B_ZZI, BFMMLA_B_ZZZ, BFMMLA... |
14810 | 82 | printSVERegOp(MI, 2, O, 'h'); |
14811 | 82 | break; |
14812 | 2.44k | case 11: |
14813 | | // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... |
14814 | 2.44k | printVRegOperand(MI, 2, O); |
14815 | 2.44k | break; |
14816 | 2.57k | case 12: |
14817 | | // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm... |
14818 | 2.57k | printSVERegOp(MI, 1, O, 0); |
14819 | 2.57k | break; |
14820 | 496 | case 13: |
14821 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... |
14822 | 496 | SStream_concat0(O, "/m, "); |
14823 | 496 | break; |
14824 | 244 | case 14: |
14825 | | // ADD_ZI_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, AESIMC_ZZ_B, AESMC_ZZ_B, ... |
14826 | 244 | printSVERegOp(MI, 1, O, 'b'); |
14827 | 244 | break; |
14828 | 1.48k | case 15: |
14829 | | // ADD_ZI_S, ADD_ZZZ_S, ADR_LSL_ZZZ_S_0, ADR_LSL_ZZZ_S_1, ADR_LSL_ZZZ_S_2... |
14830 | 1.48k | printSVERegOp(MI, 1, O, 's'); |
14831 | 1.48k | break; |
14832 | 1.50k | case 16: |
14833 | | // ADRP |
14834 | 1.50k | printAdrpLabel(MI, 1, O); |
14835 | 1.50k | return; |
14836 | 0 | break; |
14837 | 14.7k | case 17: |
14838 | | // AUTDA, AUTDB, AUTIA, AUTIB, BFMWri, BFMXri, CASAB, CASAH, CASALB, CASA... |
14839 | 14.7k | printOperand(MI, 2, O); |
14840 | 14.7k | break; |
14841 | 5 | case 18: |
14842 | | // BFCVTNT_ZPmZ, BFCVT_ZPmZ, FCVTNT_ZPmZ_StoH, FCVT_ZPmZ_StoH, SCVTF_ZPmZ... |
14843 | 5 | printSVERegOp(MI, 3, O, 's'); |
14844 | 5 | return; |
14845 | 0 | break; |
14846 | 516 | case 19: |
14847 | | // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv... |
14848 | 516 | printImm(MI, 2, O); |
14849 | 516 | printShifter(MI, 3, O); |
14850 | 516 | return; |
14851 | 0 | break; |
14852 | 3.63k | case 20: |
14853 | | // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P... |
14854 | 3.63k | printAlignedLabel(MI, 1, O); |
14855 | 3.63k | return; |
14856 | 0 | break; |
14857 | 144 | case 21: |
14858 | | // CDOT_ZZZI_S, CDOT_ZZZ_S, CMLA_ZZZ_B, EORBT_ZZZ_B, EORTB_ZZZ_B, SABA_ZZ... |
14859 | 144 | printSVERegOp(MI, 2, O, 'b'); |
14860 | 144 | SStream_concat0(O, ", "); |
14861 | 144 | break; |
14862 | 125 | case 22: |
14863 | | // CMPEQ_PPzZI_H, CMPEQ_PPzZZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_PPzZI_H, CMPGE... |
14864 | 125 | SStream_concat0(O, "/z, "); |
14865 | 125 | break; |
14866 | 346 | case 23: |
14867 | | // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI, PTRUES_B, PTRUES_D, PTRUES... |
14868 | 346 | printSVEPattern(MI, 1, O); |
14869 | 346 | break; |
14870 | 0 | case 24: |
14871 | | // CPY_ZPmI_H |
14872 | 0 | printImm8OptLsl32(MI, 3, O); |
14873 | 0 | return; |
14874 | 0 | break; |
14875 | 0 | case 25: |
14876 | | // CPY_ZPmR_H, CPY_ZPmV_H, INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr |
14877 | 0 | printOperand(MI, 3, O); |
14878 | 0 | return; |
14879 | 0 | break; |
14880 | 169 | case 26: |
14881 | | // DECB_XPiI, DECD_XPiI, DECD_ZPiI, DECH_XPiI, DECW_XPiI, DECW_ZPiI, INCB... |
14882 | 169 | printSVEPattern(MI, 2, O); |
14883 | 169 | SStream_concat0(O, ", mul "); |
14884 | 169 | printOperand(MI, 3, O); |
14885 | 169 | return; |
14886 | 0 | break; |
14887 | 86 | case 27: |
14888 | | // DUPM_ZI |
14889 | 86 | printLogicalImm64(MI, 1, O); |
14890 | 86 | return; |
14891 | 0 | break; |
14892 | 0 | case 28: |
14893 | | // DUP_ZI_B |
14894 | 0 | printImm8OptLsl32(MI, 1, O); |
14895 | 0 | return; |
14896 | 0 | break; |
14897 | 0 | case 29: |
14898 | | // DUP_ZI_D |
14899 | 0 | printImm8OptLsl64(MI, 1, O); |
14900 | 0 | return; |
14901 | 0 | break; |
14902 | 0 | case 30: |
14903 | | // DUP_ZI_S |
14904 | 0 | printImm8OptLsl32(MI, 1, O); |
14905 | 0 | return; |
14906 | 0 | break; |
14907 | 0 | case 31: |
14908 | | // DUP_ZZI_H, DUP_ZZI_Q |
14909 | 0 | printVectorIndex(MI, 2, O); |
14910 | 0 | return; |
14911 | 0 | break; |
14912 | 48 | case 32: |
14913 | | // EXT_ZZI_B, TBL_ZZZZ_B, TBL_ZZZ_B |
14914 | 48 | printTypedVectorList(MI, 1, O, 0,'b'); |
14915 | 48 | SStream_concat0(O, ", "); |
14916 | 48 | break; |
14917 | 0 | case 33: |
14918 | | // FCPY_ZPmI_H |
14919 | 0 | printFPImmOperand(MI, 3, O); |
14920 | 0 | return; |
14921 | 0 | break; |
14922 | 12 | case 34: |
14923 | | // FCVT_ZPmZ_DtoH, SCVTF_ZPmZ_DtoH, UCVTF_ZPmZ_DtoH |
14924 | 12 | printSVERegOp(MI, 3, O, 'd'); |
14925 | 12 | return; |
14926 | 0 | break; |
14927 | 68 | case 35: |
14928 | | // FDUP_ZI_D, FDUP_ZI_S, FMOVDi, FMOVHi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_... |
14929 | 68 | printFPImmOperand(MI, 1, O); |
14930 | 68 | return; |
14931 | 0 | break; |
14932 | 38 | case 36: |
14933 | | // INDEX_II_B, INDEX_IR_B |
14934 | 38 | printSImm(MI, 1, O, 8); |
14935 | 38 | SStream_concat0(O, ", "); |
14936 | 38 | break; |
14937 | 328 | case 37: |
14938 | | // INDEX_II_H |
14939 | 328 | printSImm(MI, 2, O, 16); |
14940 | 328 | return; |
14941 | 0 | break; |
14942 | 0 | case 38: |
14943 | | // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q... |
14944 | 0 | printSVERegOp(MI, 3, O, 0); |
14945 | 0 | SStream_concat0(O, "/m, "); |
14946 | 0 | break; |
14947 | 5 | case 39: |
14948 | | // INSR_ZV_B |
14949 | 5 | printZPRasFPR(MI, 2, O, 8); |
14950 | 5 | return; |
14951 | 0 | break; |
14952 | 3 | case 40: |
14953 | | // INSR_ZV_D |
14954 | 3 | printZPRasFPR(MI, 2, O, 64); |
14955 | 3 | return; |
14956 | 0 | break; |
14957 | 116 | case 41: |
14958 | | // INSR_ZV_S |
14959 | 116 | printZPRasFPR(MI, 2, O, 32); |
14960 | 116 | return; |
14961 | 0 | break; |
14962 | 0 | case 42: |
14963 | | // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane |
14964 | 0 | printVRegOperand(MI, 3, O); |
14965 | 0 | break; |
14966 | 239 | case 43: |
14967 | | // LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX... |
14968 | 239 | SStream_concat0(O, "/z, ["); |
14969 | 239 | set_mem_access(MI, true); |
14970 | 239 | printOperand(MI, 4, O); |
14971 | 239 | SStream_concat0(O, ", "); |
14972 | 239 | break; |
14973 | 474 | case 44: |
14974 | | // LDADDAB, LDADDAH, LDADDALB, LDADDALH, LDADDALW, LDADDALX, LDADDAW, LDA... |
14975 | 474 | printOperand(MI, 0, O); |
14976 | 474 | SStream_concat0(O, ", ["); |
14977 | 474 | set_mem_access(MI, true); |
14978 | 474 | printOperand(MI, 2, O); |
14979 | 474 | SStream_concat0(O, "]"); |
14980 | 474 | set_mem_access(MI, false); |
14981 | 474 | return; |
14982 | 0 | break; |
14983 | 159 | case 45: |
14984 | | // MOVID, MOVIv2d_ns |
14985 | 159 | printSIMDType10Operand(MI, 1, O); |
14986 | 159 | return; |
14987 | 0 | break; |
14988 | 638 | case 46: |
14989 | | // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl... |
14990 | 638 | printImm(MI, 1, O); |
14991 | 638 | break; |
14992 | 929 | case 47: |
14993 | | // MRS |
14994 | 929 | printMRSSystemRegister(MI, 1, O); |
14995 | 929 | return; |
14996 | 0 | break; |
14997 | 19 | case 48: |
14998 | | // PMULLv1i64 |
14999 | 19 | SStream_concat0(O, ".1d, "); |
15000 | 19 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); |
15001 | 19 | printVRegOperand(MI, 2, O); |
15002 | 19 | SStream_concat0(O, ".1d"); |
15003 | 19 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); |
15004 | 19 | return; |
15005 | 0 | break; |
15006 | 9 | case 49: |
15007 | | // PMULLv2i64 |
15008 | 9 | SStream_concat0(O, ".2d, "); |
15009 | 9 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15010 | 9 | printVRegOperand(MI, 2, O); |
15011 | 9 | SStream_concat0(O, ".2d"); |
15012 | 9 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15013 | 9 | return; |
15014 | 0 | break; |
15015 | 3 | case 50: |
15016 | | // REVD_ZPmZ |
15017 | 3 | printSVERegOp(MI, 3, O, 'q'); |
15018 | 3 | return; |
15019 | 0 | break; |
15020 | 668 | case 51: |
15021 | | // SQDECB_XPiWdI, SQDECD_XPiWdI, SQDECH_XPiWdI, SQDECW_XPiWdI, SQINCB_XPi... |
15022 | 668 | printGPR64as32(MI, 1, O); |
15023 | 668 | SStream_concat0(O, ", "); |
15024 | 668 | printSVEPattern(MI, 2, O); |
15025 | 668 | SStream_concat0(O, ", mul "); |
15026 | 668 | printOperand(MI, 3, O); |
15027 | 668 | return; |
15028 | 0 | break; |
15029 | 1.08k | case 52: |
15030 | | // ST1_MXIPXX_H_B, ST1_MXIPXX_H_D, ST1_MXIPXX_H_H, ST1_MXIPXX_H_Q, ST1_MX... |
15031 | 1.08k | SStream_concat0(O, ", ["); |
15032 | 1.08k | set_mem_access(MI, true); |
15033 | 1.08k | printOperand(MI, 4, O); |
15034 | 1.08k | SStream_concat0(O, ", "); |
15035 | 1.08k | break; |
15036 | 237 | case 53: |
15037 | | // ST1i16_POST, ST2i8_POST |
15038 | 237 | printPostIncOperand(MI, 4, O, 2); |
15039 | 237 | return; |
15040 | 0 | break; |
15041 | 191 | case 54: |
15042 | | // ST1i32_POST, ST2i16_POST, ST4i8_POST |
15043 | 191 | printPostIncOperand(MI, 4, O, 4); |
15044 | 191 | return; |
15045 | 0 | break; |
15046 | 595 | case 55: |
15047 | | // ST1i64_POST, ST2i32_POST, ST4i16_POST |
15048 | 595 | printPostIncOperand(MI, 4, O, 8); |
15049 | 595 | return; |
15050 | 0 | break; |
15051 | 42 | case 56: |
15052 | | // ST1i8_POST |
15053 | 42 | printPostIncOperand(MI, 4, O, 1); |
15054 | 42 | return; |
15055 | 0 | break; |
15056 | 242 | case 57: |
15057 | | // ST2i64_POST, ST4i32_POST |
15058 | 242 | printPostIncOperand(MI, 4, O, 16); |
15059 | 242 | return; |
15060 | 0 | break; |
15061 | 36 | case 58: |
15062 | | // ST3i16_POST |
15063 | 36 | printPostIncOperand(MI, 4, O, 6); |
15064 | 36 | return; |
15065 | 0 | break; |
15066 | 65 | case 59: |
15067 | | // ST3i32_POST |
15068 | 65 | printPostIncOperand(MI, 4, O, 12); |
15069 | 65 | return; |
15070 | 0 | break; |
15071 | 75 | case 60: |
15072 | | // ST3i64_POST |
15073 | 75 | printPostIncOperand(MI, 4, O, 24); |
15074 | 75 | return; |
15075 | 0 | break; |
15076 | 33 | case 61: |
15077 | | // ST3i8_POST |
15078 | 33 | printPostIncOperand(MI, 4, O, 3); |
15079 | 33 | return; |
15080 | 0 | break; |
15081 | 392 | case 62: |
15082 | | // ST4i64_POST |
15083 | 392 | printPostIncOperand(MI, 4, O, 32); |
15084 | 392 | return; |
15085 | 0 | break; |
15086 | 224 | case 63: |
15087 | | // ST64BV, ST64BV0 |
15088 | 224 | printGPR64x8(MI, 1, O); |
15089 | 224 | SStream_concat0(O, ", ["); |
15090 | 224 | set_mem_access(MI, true); |
15091 | 224 | printOperand(MI, 2, O); |
15092 | 224 | SStream_concat0(O, "]"); |
15093 | 224 | set_mem_access(MI, false); |
15094 | 224 | return; |
15095 | 0 | break; |
15096 | 563 | case 64: |
15097 | | // SYSxt |
15098 | 563 | printSysCROperand(MI, 1, O); |
15099 | 563 | SStream_concat0(O, ", "); |
15100 | 563 | printSysCROperand(MI, 2, O); |
15101 | 563 | SStream_concat0(O, ", "); |
15102 | 563 | printOperand(MI, 3, O); |
15103 | 563 | SStream_concat0(O, ", "); |
15104 | 563 | printOperand(MI, 4, O); |
15105 | 563 | return; |
15106 | 0 | break; |
15107 | 7 | case 65: |
15108 | | // TBL_ZZZZ_D, TBL_ZZZ_D |
15109 | 7 | printTypedVectorList(MI, 1, O, 0,'d'); |
15110 | 7 | SStream_concat0(O, ", "); |
15111 | 7 | printSVERegOp(MI, 2, O, 'd'); |
15112 | 7 | return; |
15113 | 0 | break; |
15114 | 47 | case 66: |
15115 | | // TBL_ZZZZ_S, TBL_ZZZ_S |
15116 | 47 | printTypedVectorList(MI, 1, O, 0,'s'); |
15117 | 47 | SStream_concat0(O, ", "); |
15118 | 47 | printSVERegOp(MI, 2, O, 's'); |
15119 | 47 | return; |
15120 | 0 | break; |
15121 | 305 | case 67: |
15122 | | // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB... |
15123 | 305 | printTypedVectorList(MI, 1, O, 16, 'b'); |
15124 | 305 | SStream_concat0(O, ", "); |
15125 | 305 | printVRegOperand(MI, 2, O); |
15126 | 305 | break; |
15127 | 207 | case 68: |
15128 | | // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB... |
15129 | 207 | printTypedVectorList(MI, 2, O, 16, 'b'); |
15130 | 207 | SStream_concat0(O, ", "); |
15131 | 207 | printVRegOperand(MI, 3, O); |
15132 | 207 | break; |
15133 | 79.4k | } |
15134 | | |
15135 | | |
15136 | | // Fragment 3 encoded into 7 bits for 111 unique commands. |
15137 | | // printf("Fragment 3: %"PRIu64"\n", ((Bits >> 35) & 127)); |
15138 | 67.8k | switch ((Bits >> 35) & 127) { |
15139 | 0 | default: // unreachable |
15140 | 294 | case 0: |
15141 | | // ABS_ZPmZ_B, BRKA_PPmP, BRKB_PPmP, CDOT_ZZZI_S, CDOT_ZZZ_S, CLS_ZPmZ_B,... |
15142 | 294 | printSVERegOp(MI, 3, O, 'b'); |
15143 | 294 | break; |
15144 | 16 | case 1: |
15145 | | // ABS_ZPmZ_D, CLS_ZPmZ_D, CLZ_ZPmZ_D, CNOT_ZPmZ_D, CNT_ZPmZ_D, FABS_ZPmZ... |
15146 | 16 | printSVERegOp(MI, 3, O, 'd'); |
15147 | 16 | return; |
15148 | 0 | break; |
15149 | 18 | case 2: |
15150 | | // ABS_ZPmZ_S, ADDHNT_ZZZ_H, CLS_ZPmZ_S, CLZ_ZPmZ_S, CNOT_ZPmZ_S, CNT_ZPm... |
15151 | 18 | printSVERegOp(MI, 3, O, 's'); |
15152 | 18 | return; |
15153 | 0 | break; |
15154 | 194 | case 3: |
15155 | | // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ... |
15156 | 194 | SStream_concat0(O, ".16b"); |
15157 | 194 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
15158 | 194 | return; |
15159 | 0 | break; |
15160 | 3.35k | case 4: |
15161 | | // ABSv1i64, ADR, AESIMC_ZZ_B, AESMC_ZZ_B, AUTDA, AUTDB, AUTIA, AUTIB, BF... |
15162 | 3.35k | return; |
15163 | 0 | break; |
15164 | 12 | case 5: |
15165 | | // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV... |
15166 | 12 | SStream_concat0(O, ".2s"); |
15167 | 12 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
15168 | 12 | return; |
15169 | 0 | break; |
15170 | 22 | case 6: |
15171 | | // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64... |
15172 | 22 | SStream_concat0(O, ".2d"); |
15173 | 22 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15174 | 22 | return; |
15175 | 0 | break; |
15176 | 21 | case 7: |
15177 | | // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FABSv4f16, FCVTASv4f16, FCVT... |
15178 | 21 | SStream_concat0(O, ".4h"); |
15179 | 21 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
15180 | 21 | return; |
15181 | 0 | break; |
15182 | 42 | case 8: |
15183 | | // ABSv4i32, ADDVv4i32v, BFCVTN, BFCVTN2, CLSv4i32, CLZv4i32, FABSv4f32, ... |
15184 | 42 | SStream_concat0(O, ".4s"); |
15185 | 42 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
15186 | 42 | return; |
15187 | 0 | break; |
15188 | 54 | case 9: |
15189 | | // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FABSv8f16, FCVTASv8f16, FCVT... |
15190 | 54 | SStream_concat0(O, ".8h"); |
15191 | 54 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
15192 | 54 | return; |
15193 | 0 | break; |
15194 | 356 | case 10: |
15195 | | // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv... |
15196 | 356 | SStream_concat0(O, ".8b"); |
15197 | 356 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
15198 | 356 | return; |
15199 | 0 | break; |
15200 | 37.9k | case 11: |
15201 | | // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD... |
15202 | 37.9k | SStream_concat0(O, ", "); |
15203 | 37.9k | break; |
15204 | 8 | case 12: |
15205 | | // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSUBHNB_ZZZ_H, SUBHNB_ZZZ_H |
15206 | 8 | printSVERegOp(MI, 2, O, 's'); |
15207 | 8 | return; |
15208 | 0 | break; |
15209 | 651 | case 13: |
15210 | | // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... |
15211 | 651 | SStream_concat0(O, ".2d, "); |
15212 | 651 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15213 | 651 | break; |
15214 | 911 | case 14: |
15215 | | // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... |
15216 | 911 | SStream_concat0(O, ".4s, "); |
15217 | 911 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
15218 | 911 | break; |
15219 | 1.07k | case 15: |
15220 | | // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BF16DOTlanev8b... |
15221 | 1.07k | SStream_concat0(O, ".8h, "); |
15222 | 1.07k | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
15223 | 1.07k | break; |
15224 | 1.19k | case 16: |
15225 | | // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm... |
15226 | 1.19k | SStream_concat0(O, "/m, "); |
15227 | 1.19k | break; |
15228 | 402 | case 17: |
15229 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, ADD_ZZZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ... |
15230 | 402 | printSVERegOp(MI, 2, O, 'h'); |
15231 | 402 | break; |
15232 | 184 | case 18: |
15233 | | // ADDPv16i8, ADDv16i8, ANDv16i8, BCAX, BICv16i8, BIFv16i8, BITv16i8, BSL... |
15234 | 184 | SStream_concat0(O, ".16b, "); |
15235 | 184 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
15236 | 184 | break; |
15237 | 430 | case 19: |
15238 | | // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... |
15239 | 430 | SStream_concat0(O, ".2s, "); |
15240 | 430 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
15241 | 430 | break; |
15242 | 1.12k | case 20: |
15243 | | // ADDPv4i16, ADDv4i16, BF16DOTlanev4bf16, BFDOTv4bf16, CMEQv4i16, CMGEv4... |
15244 | 1.12k | SStream_concat0(O, ".4h, "); |
15245 | 1.12k | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
15246 | 1.12k | break; |
15247 | 446 | case 21: |
15248 | | // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... |
15249 | 446 | SStream_concat0(O, ".8b, "); |
15250 | 446 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
15251 | 446 | break; |
15252 | 17 | case 22: |
15253 | | // ADD_ZI_H, SQADD_ZI_H, SQSUB_ZI_H, SUBR_ZI_H, SUB_ZI_H, UQADD_ZI_H, UQS... |
15254 | 17 | printImm8OptLsl32(MI, 2, O); |
15255 | 17 | return; |
15256 | 0 | break; |
15257 | 584 | case 23: |
15258 | | // ANDS_PPzPP, AND_PPzPP, BICS_PPzPP, BIC_PPzPP, BRKAS_PPzP, BRKA_PPzP, B... |
15259 | 584 | SStream_concat0(O, "/z, "); |
15260 | 584 | break; |
15261 | 65 | case 24: |
15262 | | // ASR_WIDE_ZZZ_H, LSL_WIDE_ZZZ_H, LSR_WIDE_ZZZ_H |
15263 | 65 | printSVERegOp(MI, 2, O, 'd'); |
15264 | 65 | return; |
15265 | 0 | break; |
15266 | 109 | case 25: |
15267 | | // ASR_ZZI_H, INDEX_IR_B, INDEX_RR_H, LSL_ZZI_H, LSR_ZZI_H, MUL_ZI_H, RSH... |
15268 | 109 | printOperand(MI, 2, O); |
15269 | 109 | return; |
15270 | 0 | break; |
15271 | 10.2k | case 26: |
15272 | | // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH... |
15273 | 10.2k | SStream_concat0(O, ", ["); |
15274 | 10.2k | set_mem_access(MI, true); |
15275 | 10.2k | break; |
15276 | 29 | case 27: |
15277 | | // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz |
15278 | 29 | SStream_concat0(O, ".16b, #0"); |
15279 | 29 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
15280 | 29 | arm64_op_addImm(MI, 0); |
15281 | 29 | return; |
15282 | 0 | break; |
15283 | 4 | case 28: |
15284 | | // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz |
15285 | 4 | SStream_concat0(O, ", #0"); |
15286 | 4 | op_addImm(MI, 0); |
15287 | 4 | arm64_op_addImm(MI, 0); |
15288 | 4 | return; |
15289 | 0 | break; |
15290 | 32 | case 29: |
15291 | | // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz |
15292 | 32 | SStream_concat0(O, ".2s, #0"); |
15293 | 32 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
15294 | 32 | arm64_op_addImm(MI, 0); |
15295 | 32 | return; |
15296 | 0 | break; |
15297 | 14 | case 30: |
15298 | | // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz |
15299 | 14 | SStream_concat0(O, ".2d, #0"); |
15300 | 14 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15301 | 14 | arm64_op_addImm(MI, 0); |
15302 | 14 | return; |
15303 | 0 | break; |
15304 | 84 | case 31: |
15305 | | // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz |
15306 | 84 | SStream_concat0(O, ".4h, #0"); |
15307 | 84 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
15308 | 84 | arm64_op_addImm(MI, 0); |
15309 | 84 | return; |
15310 | 0 | break; |
15311 | 26 | case 32: |
15312 | | // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz |
15313 | 26 | SStream_concat0(O, ".4s, #0"); |
15314 | 26 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
15315 | 26 | arm64_op_addImm(MI, 0); |
15316 | 26 | return; |
15317 | 0 | break; |
15318 | 4 | case 33: |
15319 | | // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz |
15320 | 4 | SStream_concat0(O, ".8h, #0"); |
15321 | 4 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
15322 | 4 | arm64_op_addImm(MI, 0); |
15323 | 4 | return; |
15324 | 0 | break; |
15325 | 17 | case 34: |
15326 | | // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz |
15327 | 17 | SStream_concat0(O, ".8b, #0"); |
15328 | 17 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
15329 | 17 | arm64_op_addImm(MI, 0); |
15330 | 17 | return; |
15331 | 0 | break; |
15332 | 445 | case 35: |
15333 | | // CMLA_ZZZI_H, CMLA_ZZZ_H, EORBT_ZZZ_H, EORTB_ZZZ_H, FADDA_VPZ_H, FCMLA_... |
15334 | 445 | printSVERegOp(MI, 3, O, 'h'); |
15335 | 445 | break; |
15336 | 344 | case 36: |
15337 | | // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI |
15338 | 344 | SStream_concat0(O, ", mul "); |
15339 | 344 | printOperand(MI, 2, O); |
15340 | 344 | return; |
15341 | 0 | break; |
15342 | 0 | case 37: |
15343 | | // CPY_ZPmI_B |
15344 | 0 | printImm8OptLsl32(MI, 3, O); |
15345 | 0 | return; |
15346 | 0 | break; |
15347 | 0 | case 38: |
15348 | | // CPY_ZPmI_D |
15349 | 0 | printImm8OptLsl64(MI, 3, O); |
15350 | 0 | return; |
15351 | 0 | break; |
15352 | 0 | case 39: |
15353 | | // CPY_ZPmI_S |
15354 | 0 | printImm8OptLsl32(MI, 3, O); |
15355 | 0 | return; |
15356 | 0 | break; |
15357 | 194 | case 40: |
15358 | | // CPY_ZPmR_B, CPY_ZPmR_D, CPY_ZPmR_S, CPY_ZPmV_B, CPY_ZPmV_D, CPY_ZPmV_S... |
15359 | 194 | printOperand(MI, 3, O); |
15360 | 194 | break; |
15361 | 0 | case 41: |
15362 | | // CPY_ZPzI_H |
15363 | 0 | printImm8OptLsl32(MI, 2, O); |
15364 | 0 | return; |
15365 | 0 | break; |
15366 | 0 | case 42: |
15367 | | // DUP_ZZI_B, DUP_ZZI_D, DUP_ZZI_S |
15368 | 0 | printVectorIndex(MI, 2, O); |
15369 | 0 | return; |
15370 | 0 | break; |
15371 | 112 | case 43: |
15372 | | // DUPi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1... |
15373 | 112 | SStream_concat0(O, ".h"); |
15374 | 112 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H); |
15375 | 112 | break; |
15376 | 225 | case 44: |
15377 | | // DUPi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, SMOVvi3... |
15378 | 225 | SStream_concat0(O, ".s"); |
15379 | 225 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S); |
15380 | 225 | break; |
15381 | 22 | case 45: |
15382 | | // DUPi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64, UMOVvi64_idx... |
15383 | 22 | SStream_concat0(O, ".d"); |
15384 | 22 | break; |
15385 | 150 | case 46: |
15386 | | // DUPi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to32... |
15387 | 150 | SStream_concat0(O, ".b"); |
15388 | 150 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1B); |
15389 | 150 | break; |
15390 | 0 | case 47: |
15391 | | // EXTRACT_ZPMXI_H_H, EXTRACT_ZPMXI_H_Q |
15392 | 0 | printMatrixTileVector(MI, 2, O, 0); |
15393 | 0 | SStream_concat0(O, "["); |
15394 | 0 | set_sme_index(MI, true); |
15395 | 0 | printOperand(MI, 3, O); |
15396 | 0 | SStream_concat0(O, ", "); |
15397 | 0 | printMatrixIndex(MI, 4, O); |
15398 | 0 | SStream_concat0(O, "]"); |
15399 | 0 | set_mem_access(MI, false); |
15400 | 0 | return; |
15401 | 0 | break; |
15402 | 0 | case 48: |
15403 | | // EXTRACT_ZPMXI_V_H, EXTRACT_ZPMXI_V_Q |
15404 | 0 | printMatrixTileVector(MI, 2, O, 1); |
15405 | 0 | SStream_concat0(O, "["); |
15406 | 0 | set_sme_index(MI, true); |
15407 | 0 | printOperand(MI, 3, O); |
15408 | 0 | SStream_concat0(O, ", "); |
15409 | 0 | printMatrixIndex(MI, 4, O); |
15410 | 0 | SStream_concat0(O, "]"); |
15411 | 0 | set_mem_access(MI, false); |
15412 | 0 | return; |
15413 | 0 | break; |
15414 | 29 | case 49: |
15415 | | // EXT_ZZI_B, UMAX_ZI_H, UMIN_ZI_H |
15416 | 29 | printImm(MI, 2, O); |
15417 | 29 | return; |
15418 | 0 | break; |
15419 | 3 | case 50: |
15420 | | // FADDPv2i16p, FMAXNMPv2i16p, FMAXPv2i16p, FMINNMPv2i16p, FMINPv2i16p |
15421 | 3 | SStream_concat0(O, ".2h"); |
15422 | 3 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H); |
15423 | 3 | return; |
15424 | 0 | break; |
15425 | 38 | case 51: |
15426 | | // FCMEQv1i16rz, FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i16rz, FCMGEv1i32rz, ... |
15427 | 38 | SStream_concat0(O, ", #0.0"); |
15428 | 38 | arm64_op_addFP(MI, 0); |
15429 | 38 | return; |
15430 | 0 | break; |
15431 | 15 | case 52: |
15432 | | // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz |
15433 | 15 | SStream_concat0(O, ".2s, #0.0"); |
15434 | 15 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
15435 | 15 | arm64_op_addFP(MI, 0); |
15436 | 15 | return; |
15437 | 0 | break; |
15438 | 7 | case 53: |
15439 | | // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz |
15440 | 7 | SStream_concat0(O, ".2d, #0.0"); |
15441 | 7 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
15442 | 7 | arm64_op_addFP(MI, 0); |
15443 | 7 | return; |
15444 | 0 | break; |
15445 | 11 | case 54: |
15446 | | // FCMEQv4i16rz, FCMGEv4i16rz, FCMGTv4i16rz, FCMLEv4i16rz, FCMLTv4i16rz |
15447 | 11 | SStream_concat0(O, ".4h, #0.0"); |
15448 | 11 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
15449 | 11 | arm64_op_addFP(MI, 0); |
15450 | 11 | return; |
15451 | 0 | break; |
15452 | 26 | case 55: |
15453 | | // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz |
15454 | 26 | SStream_concat0(O, ".4s, #0.0"); |
15455 | 26 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
15456 | 26 | arm64_op_addFP(MI, 0); |
15457 | 26 | return; |
15458 | 0 | break; |
15459 | 27 | case 56: |
15460 | | // FCMEQv8i16rz, FCMGEv8i16rz, FCMGTv8i16rz, FCMLEv8i16rz, FCMLTv8i16rz |
15461 | 27 | SStream_concat0(O, ".8h, #0.0"); |
15462 | 27 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
15463 | 27 | arm64_op_addFP(MI, 0); |
15464 | 27 | return; |
15465 | 0 | break; |
15466 | 0 | case 57: |
15467 | | // FCPY_ZPmI_D, FCPY_ZPmI_S |
15468 | 0 | printFPImmOperand(MI, 3, O); |
15469 | 0 | return; |
15470 | 0 | break; |
15471 | 91 | case 58: |
15472 | | // FMLAL2lanev4f16, FMLAL2v4f16, FMLALlanev4f16, FMLALv4f16, FMLSL2lanev4... |
15473 | 91 | SStream_concat0(O, ".2h, "); |
15474 | 91 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H); |
15475 | 91 | printVRegOperand(MI, 3, O); |
15476 | 91 | break; |
15477 | 35 | case 59: |
15478 | | // FMOPA_MPPZZ_D, FMOPS_MPPZZ_D, INSERT_MXIPZ_H_D, INSERT_MXIPZ_V_D |
15479 | 35 | printSVERegOp(MI, 4, O, 'd'); |
15480 | 35 | return; |
15481 | 0 | break; |
15482 | 82 | case 60: |
15483 | | // FMOPA_MPPZZ_S, FMOPS_MPPZZ_S, INSERT_MXIPZ_H_S, INSERT_MXIPZ_V_S |
15484 | 82 | printSVERegOp(MI, 4, O, 's'); |
15485 | 82 | return; |
15486 | 0 | break; |
15487 | 13 | case 61: |
15488 | | // INDEX_II_B |
15489 | 13 | printSImm(MI, 2, O, 8); |
15490 | 13 | return; |
15491 | 0 | break; |
15492 | 103 | case 62: |
15493 | | // INDEX_RI_H |
15494 | 103 | printSImm(MI, 2, O, 16); |
15495 | 103 | return; |
15496 | 0 | break; |
15497 | 0 | case 63: |
15498 | | // INSERT_MXIPZ_H_B, INSERT_MXIPZ_V_B |
15499 | 0 | printSVERegOp(MI, 4, O, 'b'); |
15500 | 0 | return; |
15501 | 0 | break; |
15502 | 0 | case 64: |
15503 | | // INSERT_MXIPZ_H_H, INSERT_MXIPZ_V_H |
15504 | 0 | printSVERegOp(MI, 4, O, 'h'); |
15505 | 0 | return; |
15506 | 0 | break; |
15507 | 0 | case 65: |
15508 | | // INSERT_MXIPZ_H_Q, INSERT_MXIPZ_V_Q |
15509 | 0 | printSVERegOp(MI, 4, O, 'q'); |
15510 | 0 | return; |
15511 | 0 | break; |
15512 | 179 | case 66: |
15513 | | // LD1_MXIPXX_H_B, LD1_MXIPXX_V_B, ST1_MXIPXX_H_B, ST1_MXIPXX_V_B |
15514 | 179 | printRegWithShiftExtend(MI, 5, O, false, 8, 'x', 0); |
15515 | 179 | SStream_concat0(O, "]"); |
15516 | 179 | set_mem_access(MI, false); |
15517 | 179 | return; |
15518 | 0 | break; |
15519 | 658 | case 67: |
15520 | | // LD1_MXIPXX_H_D, LD1_MXIPXX_V_D, ST1_MXIPXX_H_D, ST1_MXIPXX_V_D |
15521 | 658 | printRegWithShiftExtend(MI, 5, O, false, 64, 'x', 0); |
15522 | 658 | SStream_concat0(O, "]"); |
15523 | 658 | set_mem_access(MI, false); |
15524 | 658 | return; |
15525 | 0 | break; |
15526 | 81 | case 68: |
15527 | | // LD1_MXIPXX_H_H, LD1_MXIPXX_V_H, ST1_MXIPXX_H_H, ST1_MXIPXX_V_H |
15528 | 81 | printRegWithShiftExtend(MI, 5, O, false, 16, 'x', 0); |
15529 | 81 | SStream_concat0(O, "]"); |
15530 | 81 | set_mem_access(MI, false); |
15531 | 81 | return; |
15532 | 0 | break; |
15533 | 251 | case 69: |
15534 | | // LD1_MXIPXX_H_Q, LD1_MXIPXX_V_Q, ST1_MXIPXX_H_Q, ST1_MXIPXX_V_Q |
15535 | 251 | printRegWithShiftExtend(MI, 5, O, false, 128, 'x', 0); |
15536 | 251 | SStream_concat0(O, "]"); |
15537 | 251 | set_mem_access(MI, false); |
15538 | 251 | return; |
15539 | 0 | break; |
15540 | 151 | case 70: |
15541 | | // LD1_MXIPXX_H_S, LD1_MXIPXX_V_S, ST1_MXIPXX_H_S, ST1_MXIPXX_V_S |
15542 | 151 | printRegWithShiftExtend(MI, 5, O, false, 32, 'x', 0); |
15543 | 151 | SStream_concat0(O, "]"); |
15544 | 151 | set_mem_access(MI, false); |
15545 | 151 | return; |
15546 | 0 | break; |
15547 | 432 | case 71: |
15548 | | // LDAPRB, LDAPRH, LDAPRW, LDAPRX, LDARB, LDARH, LDARW, LDARX, LDAXRB, LD... |
15549 | 432 | SStream_concat0(O, "]"); |
15550 | 432 | set_mem_access(MI, false); |
15551 | 432 | return; |
15552 | 0 | break; |
15553 | 1.89k | case 72: |
15554 | | // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo... |
15555 | 1.89k | SStream_concat0(O, "], "); |
15556 | 1.89k | set_mem_access(MI, false); |
15557 | 1.89k | break; |
15558 | 626 | case 73: |
15559 | | // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ... |
15560 | 626 | printShifter(MI, 2, O); |
15561 | 626 | return; |
15562 | 0 | break; |
15563 | 235 | case 74: |
15564 | | // PMULLB_ZZZ_H, PMULLT_ZZZ_H, SABDLB_ZZZ_H, SABDLT_ZZZ_H, SADDLBT_ZZZ_H,... |
15565 | 235 | printSVERegOp(MI, 2, O, 'b'); |
15566 | 235 | return; |
15567 | 0 | break; |
15568 | 52 | case 75: |
15569 | | // PRFB_D_SCALED |
15570 | 52 | printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 'd'); |
15571 | 52 | SStream_concat0(O, "]"); |
15572 | 52 | set_mem_access(MI, false); |
15573 | 52 | return; |
15574 | 0 | break; |
15575 | 21 | case 76: |
15576 | | // PRFB_D_SXTW_SCALED |
15577 | 21 | printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 'd'); |
15578 | 21 | SStream_concat0(O, "]"); |
15579 | 21 | set_mem_access(MI, false); |
15580 | 21 | return; |
15581 | 0 | break; |
15582 | 35 | case 77: |
15583 | | // PRFB_D_UXTW_SCALED |
15584 | 35 | printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 'd'); |
15585 | 35 | SStream_concat0(O, "]"); |
15586 | 35 | set_mem_access(MI, false); |
15587 | 35 | return; |
15588 | 0 | break; |
15589 | 10 | case 78: |
15590 | | // PRFB_PRR |
15591 | 10 | printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 0); |
15592 | 10 | SStream_concat0(O, "]"); |
15593 | 10 | set_mem_access(MI, false); |
15594 | 10 | return; |
15595 | 0 | break; |
15596 | 12 | case 79: |
15597 | | // PRFB_S_SXTW_SCALED |
15598 | 12 | printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 's'); |
15599 | 12 | SStream_concat0(O, "]"); |
15600 | 12 | set_mem_access(MI, false); |
15601 | 12 | return; |
15602 | 0 | break; |
15603 | 311 | case 80: |
15604 | | // PRFB_S_UXTW_SCALED |
15605 | 311 | printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 's'); |
15606 | 311 | SStream_concat0(O, "]"); |
15607 | 311 | set_mem_access(MI, false); |
15608 | 311 | return; |
15609 | 0 | break; |
15610 | 19 | case 81: |
15611 | | // PRFD_D_PZI, PRFD_S_PZI |
15612 | 19 | printImmScale(MI, 3, O, 8); |
15613 | 19 | SStream_concat0(O, "]"); |
15614 | 19 | set_mem_access(MI, false); |
15615 | 19 | return; |
15616 | 0 | break; |
15617 | 10 | case 82: |
15618 | | // PRFD_D_SCALED |
15619 | 10 | printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 'd'); |
15620 | 10 | SStream_concat0(O, "]"); |
15621 | 10 | set_mem_access(MI, false); |
15622 | 10 | return; |
15623 | 0 | break; |
15624 | 55 | case 83: |
15625 | | // PRFD_D_SXTW_SCALED |
15626 | 55 | printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 'd'); |
15627 | 55 | SStream_concat0(O, "]"); |
15628 | 55 | set_mem_access(MI, false); |
15629 | 55 | return; |
15630 | 0 | break; |
15631 | 20 | case 84: |
15632 | | // PRFD_D_UXTW_SCALED |
15633 | 20 | printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 'd'); |
15634 | 20 | SStream_concat0(O, "]"); |
15635 | 20 | set_mem_access(MI, false); |
15636 | 20 | return; |
15637 | 0 | break; |
15638 | 10 | case 85: |
15639 | | // PRFD_PRR |
15640 | 10 | printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 0); |
15641 | 10 | SStream_concat0(O, "]"); |
15642 | 10 | set_mem_access(MI, false); |
15643 | 10 | return; |
15644 | 0 | break; |
15645 | 15 | case 86: |
15646 | | // PRFD_S_SXTW_SCALED |
15647 | 15 | printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 's'); |
15648 | 15 | SStream_concat0(O, "]"); |
15649 | 15 | set_mem_access(MI, false); |
15650 | 15 | return; |
15651 | 0 | break; |
15652 | 17 | case 87: |
15653 | | // PRFD_S_UXTW_SCALED |
15654 | 17 | printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 's'); |
15655 | 17 | SStream_concat0(O, "]"); |
15656 | 17 | set_mem_access(MI, false); |
15657 | 17 | return; |
15658 | 0 | break; |
15659 | 66 | case 88: |
15660 | | // PRFH_D_PZI, PRFH_S_PZI |
15661 | 66 | printImmScale(MI, 3, O, 2); |
15662 | 66 | SStream_concat0(O, "]"); |
15663 | 66 | set_mem_access(MI, false); |
15664 | 66 | return; |
15665 | 0 | break; |
15666 | 24 | case 89: |
15667 | | // PRFH_D_SCALED |
15668 | 24 | printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 'd'); |
15669 | 24 | SStream_concat0(O, "]"); |
15670 | 24 | set_mem_access(MI, false); |
15671 | 24 | return; |
15672 | 0 | break; |
15673 | 32 | case 90: |
15674 | | // PRFH_D_SXTW_SCALED |
15675 | 32 | printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 'd'); |
15676 | 32 | SStream_concat0(O, "]"); |
15677 | 32 | set_mem_access(MI, false); |
15678 | 32 | return; |
15679 | 0 | break; |
15680 | 31 | case 91: |
15681 | | // PRFH_D_UXTW_SCALED |
15682 | 31 | printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 'd'); |
15683 | 31 | SStream_concat0(O, "]"); |
15684 | 31 | set_mem_access(MI, false); |
15685 | 31 | return; |
15686 | 0 | break; |
15687 | 17 | case 92: |
15688 | | // PRFH_PRR |
15689 | 17 | printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 0); |
15690 | 17 | SStream_concat0(O, "]"); |
15691 | 17 | set_mem_access(MI, false); |
15692 | 17 | return; |
15693 | 0 | break; |
15694 | 86 | case 93: |
15695 | | // PRFH_S_SXTW_SCALED |
15696 | 86 | printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 's'); |
15697 | 86 | SStream_concat0(O, "]"); |
15698 | 86 | set_mem_access(MI, false); |
15699 | 86 | return; |
15700 | 0 | break; |
15701 | 45 | case 94: |
15702 | | // PRFH_S_UXTW_SCALED |
15703 | 45 | printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 's'); |
15704 | 45 | SStream_concat0(O, "]"); |
15705 | 45 | set_mem_access(MI, false); |
15706 | 45 | return; |
15707 | 0 | break; |
15708 | 8 | case 95: |
15709 | | // PRFS_PRR |
15710 | 8 | printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 0); |
15711 | 8 | SStream_concat0(O, "]"); |
15712 | 8 | set_mem_access(MI, false); |
15713 | 8 | return; |
15714 | 0 | break; |
15715 | 93 | case 96: |
15716 | | // PRFW_D_PZI, PRFW_S_PZI |
15717 | 93 | printImmScale(MI, 3, O, 4); |
15718 | 93 | SStream_concat0(O, "]"); |
15719 | 93 | set_mem_access(MI, false); |
15720 | 93 | return; |
15721 | 0 | break; |
15722 | 21 | case 97: |
15723 | | // PRFW_D_SCALED |
15724 | 21 | printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 'd'); |
15725 | 21 | SStream_concat0(O, "]"); |
15726 | 21 | set_mem_access(MI, false); |
15727 | 21 | return; |
15728 | 0 | break; |
15729 | 24 | case 98: |
15730 | | // PRFW_D_SXTW_SCALED |
15731 | 24 | printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 'd'); |
15732 | 24 | SStream_concat0(O, "]"); |
15733 | 24 | set_mem_access(MI, false); |
15734 | 24 | return; |
15735 | 0 | break; |
15736 | 235 | case 99: |
15737 | | // PRFW_D_UXTW_SCALED |
15738 | 235 | printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 'd'); |
15739 | 235 | SStream_concat0(O, "]"); |
15740 | 235 | set_mem_access(MI, false); |
15741 | 235 | return; |
15742 | 0 | break; |
15743 | 8 | case 100: |
15744 | | // PRFW_S_SXTW_SCALED |
15745 | 8 | printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 's'); |
15746 | 8 | SStream_concat0(O, "]"); |
15747 | 8 | set_mem_access(MI, false); |
15748 | 8 | return; |
15749 | 0 | break; |
15750 | 18 | case 101: |
15751 | | // PRFW_S_UXTW_SCALED |
15752 | 18 | printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 's'); |
15753 | 18 | SStream_concat0(O, "]"); |
15754 | 18 | set_mem_access(MI, false); |
15755 | 18 | return; |
15756 | 0 | break; |
15757 | 8 | case 102: |
15758 | | // RDFFRS_PPz, RDFFR_PPz_REAL |
15759 | 8 | SStream_concat0(O, "/z"); |
15760 | 8 | return; |
15761 | 0 | break; |
15762 | 8 | case 103: |
15763 | | // SHLLv16i8 |
15764 | 8 | SStream_concat0(O, ".16b, #8"); |
15765 | 8 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
15766 | 8 | arm64_op_addImm(MI, 8); |
15767 | 8 | return; |
15768 | 0 | break; |
15769 | 6 | case 104: |
15770 | | // SHLLv2i32 |
15771 | 6 | SStream_concat0(O, ".2s, #32"); |
15772 | 6 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
15773 | 6 | arm64_op_addImm(MI, 32); |
15774 | 6 | return; |
15775 | 0 | break; |
15776 | 8 | case 105: |
15777 | | // SHLLv4i16 |
15778 | 8 | SStream_concat0(O, ".4h, #16"); |
15779 | 8 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
15780 | 8 | arm64_op_addImm(MI, 16); |
15781 | 8 | return; |
15782 | 0 | break; |
15783 | 8 | case 106: |
15784 | | // SHLLv4i32 |
15785 | 8 | SStream_concat0(O, ".4s, #32"); |
15786 | 8 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
15787 | 8 | arm64_op_addImm(MI, 32); |
15788 | 8 | return; |
15789 | 0 | break; |
15790 | 32 | case 107: |
15791 | | // SHLLv8i16 |
15792 | 32 | SStream_concat0(O, ".8h, #16"); |
15793 | 32 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
15794 | 32 | arm64_op_addImm(MI, 16); |
15795 | 32 | return; |
15796 | 0 | break; |
15797 | 5 | case 108: |
15798 | | // SHLLv8i8 |
15799 | 5 | SStream_concat0(O, ".8b, #8"); |
15800 | 5 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
15801 | 5 | arm64_op_addImm(MI, 8); |
15802 | 5 | return; |
15803 | 0 | break; |
15804 | 3 | case 109: |
15805 | | // SPLICE_ZPZZ_H |
15806 | 3 | printTypedVectorList(MI, 2, O, 0,'h'); |
15807 | 3 | return; |
15808 | 0 | break; |
15809 | 72 | case 110: |
15810 | | // TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, ZIP1_ZZZ_Q, ZIP2_ZZZ_Q |
15811 | 72 | printSVERegOp(MI, 2, O, 'q'); |
15812 | 72 | return; |
15813 | 0 | break; |
15814 | 67.8k | } |
15815 | | |
15816 | | |
15817 | | // Fragment 4 encoded into 7 bits for 94 unique commands. |
15818 | | // printf("Fragment 4: %"PRIu64"\n", ((Bits >> 42) & 127)); |
15819 | 58.5k | switch ((Bits >> 42) & 127) { |
15820 | 0 | default: // unreachable |
15821 | 352 | case 0: |
15822 | | // ABS_ZPmZ_B, ADD_ZZZ_H, BDEP_ZZZ_H, BEXT_ZZZ_H, BGRP_ZZZ_H, BRKA_PPmP, ... |
15823 | 352 | return; |
15824 | 0 | break; |
15825 | 348 | case 1: |
15826 | | // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, EORBT_ZZZ_D, EORTB... |
15827 | 348 | printSVERegOp(MI, 3, O, 'd'); |
15828 | 348 | break; |
15829 | 311 | case 2: |
15830 | | // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, EORBT_ZZZ_S, EORTB_... |
15831 | 311 | printSVERegOp(MI, 3, O, 's'); |
15832 | 311 | break; |
15833 | 15.3k | case 3: |
15834 | | // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPL_XXI, ADDSXrx64, ADDVL_XXI, ADDXrx6... |
15835 | 15.3k | printOperand(MI, 2, O); |
15836 | 15.3k | break; |
15837 | 204 | case 4: |
15838 | | // ADDG, ST2GOffset, STGOffset, STZ2GOffset, STZGOffset, SUBG |
15839 | 204 | printImmScale(MI, 2, O, 16); |
15840 | 204 | break; |
15841 | 222 | case 5: |
15842 | | // ADDHNB_ZZZ_B, CNTP_XPP_H, LASTA_RPZ_H, LASTA_VPZ_H, LASTB_RPZ_H, LASTB... |
15843 | 222 | printSVERegOp(MI, 2, O, 'h'); |
15844 | 222 | break; |
15845 | 728 | case 6: |
15846 | | // ADDHNB_ZZZ_S, ADDP_ZPmZ_D, ADD_ZPmZ_D, ADD_ZZZ_D, AND_ZPmZ_D, AND_ZZZ,... |
15847 | 728 | printSVERegOp(MI, 2, O, 'd'); |
15848 | 728 | break; |
15849 | 73 | case 7: |
15850 | | // ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMMLA_B_ZZI, BFMMLA_B_ZZZ, BFMMLA... |
15851 | 73 | printSVERegOp(MI, 3, O, 'h'); |
15852 | 73 | break; |
15853 | 1.48k | case 8: |
15854 | | // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2... |
15855 | 1.48k | printVRegOperand(MI, 2, O); |
15856 | 1.48k | break; |
15857 | 1.48k | case 9: |
15858 | | // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BF16DOTlanev4bf1... |
15859 | 1.48k | printVRegOperand(MI, 3, O); |
15860 | 1.48k | break; |
15861 | 908 | case 10: |
15862 | | // ADDP_ZPmZ_B, ADD_ZPmZ_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, ANDS_PPzPP... |
15863 | 908 | printSVERegOp(MI, 2, O, 'b'); |
15864 | 908 | break; |
15865 | 694 | case 11: |
15866 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID... |
15867 | 694 | SStream_concat0(O, ", "); |
15868 | 694 | break; |
15869 | 427 | case 12: |
15870 | | // ADDP_ZPmZ_S, ADD_ZPmZ_S, ADD_ZZZ_S, AND_ZPmZ_S, ASRD_ZPmI_S, ASRR_ZPmZ... |
15871 | 427 | printSVERegOp(MI, 2, O, 's'); |
15872 | 427 | break; |
15873 | 1.55k | case 13: |
15874 | | // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri |
15875 | 1.55k | printAddSubImm(MI, 2, O); |
15876 | 1.55k | return; |
15877 | 0 | break; |
15878 | 4.95k | case 14: |
15879 | | // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI... |
15880 | 4.95k | printShiftedRegister(MI, 2, O); |
15881 | 4.95k | return; |
15882 | 0 | break; |
15883 | 931 | case 15: |
15884 | | // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx |
15885 | 931 | printExtendedRegister(MI, 2, O); |
15886 | 931 | return; |
15887 | 0 | break; |
15888 | 60 | case 16: |
15889 | | // ADD_ZI_B, SQADD_ZI_B, SQSUB_ZI_B, SUBR_ZI_B, SUB_ZI_B, UQADD_ZI_B, UQS... |
15890 | 60 | printImm8OptLsl32(MI, 2, O); |
15891 | 60 | return; |
15892 | 0 | break; |
15893 | 48 | case 17: |
15894 | | // ADD_ZI_D, SQADD_ZI_D, SQSUB_ZI_D, SUBR_ZI_D, SUB_ZI_D, UQADD_ZI_D, UQS... |
15895 | 48 | printImm8OptLsl64(MI, 2, O); |
15896 | 48 | return; |
15897 | 0 | break; |
15898 | 39 | case 18: |
15899 | | // ADD_ZI_S, SQADD_ZI_S, SQSUB_ZI_S, SUBR_ZI_S, SUB_ZI_S, UQADD_ZI_S, UQS... |
15900 | 39 | printImm8OptLsl32(MI, 2, O); |
15901 | 39 | return; |
15902 | 0 | break; |
15903 | 18 | case 19: |
15904 | | // ADR_LSL_ZZZ_D_0 |
15905 | 18 | printRegWithShiftExtend(MI, 2, O, false, 8, 'x', 'd'); |
15906 | 18 | SStream_concat0(O, "]"); |
15907 | 18 | set_mem_access(MI, false); |
15908 | 18 | return; |
15909 | 0 | break; |
15910 | 12 | case 20: |
15911 | | // ADR_LSL_ZZZ_D_1 |
15912 | 12 | printRegWithShiftExtend(MI, 2, O, false, 16, 'x', 'd'); |
15913 | 12 | SStream_concat0(O, "]"); |
15914 | 12 | set_mem_access(MI, false); |
15915 | 12 | return; |
15916 | 0 | break; |
15917 | 58 | case 21: |
15918 | | // ADR_LSL_ZZZ_D_2 |
15919 | 58 | printRegWithShiftExtend(MI, 2, O, false, 32, 'x', 'd'); |
15920 | 58 | SStream_concat0(O, "]"); |
15921 | 58 | set_mem_access(MI, false); |
15922 | 58 | return; |
15923 | 0 | break; |
15924 | 10 | case 22: |
15925 | | // ADR_LSL_ZZZ_D_3 |
15926 | 10 | printRegWithShiftExtend(MI, 2, O, false, 64, 'x', 'd'); |
15927 | 10 | SStream_concat0(O, "]"); |
15928 | 10 | set_mem_access(MI, false); |
15929 | 10 | return; |
15930 | 0 | break; |
15931 | 7 | case 23: |
15932 | | // ADR_LSL_ZZZ_S_0 |
15933 | 7 | printRegWithShiftExtend(MI, 2, O, false, 8, 'x', 's'); |
15934 | 7 | SStream_concat0(O, "]"); |
15935 | 7 | set_mem_access(MI, false); |
15936 | 7 | return; |
15937 | 0 | break; |
15938 | 46 | case 24: |
15939 | | // ADR_LSL_ZZZ_S_1 |
15940 | 46 | printRegWithShiftExtend(MI, 2, O, false, 16, 'x', 's'); |
15941 | 46 | SStream_concat0(O, "]"); |
15942 | 46 | set_mem_access(MI, false); |
15943 | 46 | return; |
15944 | 0 | break; |
15945 | 29 | case 25: |
15946 | | // ADR_LSL_ZZZ_S_2 |
15947 | 29 | printRegWithShiftExtend(MI, 2, O, false, 32, 'x', 's'); |
15948 | 29 | SStream_concat0(O, "]"); |
15949 | 29 | set_mem_access(MI, false); |
15950 | 29 | return; |
15951 | 0 | break; |
15952 | 6 | case 26: |
15953 | | // ADR_LSL_ZZZ_S_3 |
15954 | 6 | printRegWithShiftExtend(MI, 2, O, false, 64, 'x', 's'); |
15955 | 6 | SStream_concat0(O, "]"); |
15956 | 6 | set_mem_access(MI, false); |
15957 | 6 | return; |
15958 | 0 | break; |
15959 | 27 | case 27: |
15960 | | // ADR_SXTW_ZZZ_D_0 |
15961 | 27 | printRegWithShiftExtend(MI, 2, O, true, 8, 'w', 'd'); |
15962 | 27 | SStream_concat0(O, "]"); |
15963 | 27 | set_mem_access(MI, false); |
15964 | 27 | return; |
15965 | 0 | break; |
15966 | 25 | case 28: |
15967 | | // ADR_SXTW_ZZZ_D_1 |
15968 | 25 | printRegWithShiftExtend(MI, 2, O, true, 16, 'w', 'd'); |
15969 | 25 | SStream_concat0(O, "]"); |
15970 | 25 | set_mem_access(MI, false); |
15971 | 25 | return; |
15972 | 0 | break; |
15973 | 46 | case 29: |
15974 | | // ADR_SXTW_ZZZ_D_2 |
15975 | 46 | printRegWithShiftExtend(MI, 2, O, true, 32, 'w', 'd'); |
15976 | 46 | SStream_concat0(O, "]"); |
15977 | 46 | set_mem_access(MI, false); |
15978 | 46 | return; |
15979 | 0 | break; |
15980 | 4 | case 30: |
15981 | | // ADR_SXTW_ZZZ_D_3 |
15982 | 4 | printRegWithShiftExtend(MI, 2, O, true, 64, 'w', 'd'); |
15983 | 4 | SStream_concat0(O, "]"); |
15984 | 4 | set_mem_access(MI, false); |
15985 | 4 | return; |
15986 | 0 | break; |
15987 | 9 | case 31: |
15988 | | // ADR_UXTW_ZZZ_D_0 |
15989 | 9 | printRegWithShiftExtend(MI, 2, O, false, 8, 'w', 'd'); |
15990 | 9 | SStream_concat0(O, "]"); |
15991 | 9 | set_mem_access(MI, false); |
15992 | 9 | return; |
15993 | 0 | break; |
15994 | 161 | case 32: |
15995 | | // ADR_UXTW_ZZZ_D_1 |
15996 | 161 | printRegWithShiftExtend(MI, 2, O, false, 16, 'w', 'd'); |
15997 | 161 | SStream_concat0(O, "]"); |
15998 | 161 | set_mem_access(MI, false); |
15999 | 161 | return; |
16000 | 0 | break; |
16001 | 6 | case 33: |
16002 | | // ADR_UXTW_ZZZ_D_2 |
16003 | 6 | printRegWithShiftExtend(MI, 2, O, false, 32, 'w', 'd'); |
16004 | 6 | SStream_concat0(O, "]"); |
16005 | 6 | set_mem_access(MI, false); |
16006 | 6 | return; |
16007 | 0 | break; |
16008 | 8 | case 34: |
16009 | | // ADR_UXTW_ZZZ_D_3 |
16010 | 8 | printRegWithShiftExtend(MI, 2, O, false, 64, 'w', 'd'); |
16011 | 8 | SStream_concat0(O, "]"); |
16012 | 8 | set_mem_access(MI, false); |
16013 | 8 | return; |
16014 | 0 | break; |
16015 | 1.95k | case 35: |
16016 | | // ANDSWri, ANDWri, EORWri, ORRWri |
16017 | 1.95k | printLogicalImm32(MI, 2, O); |
16018 | 1.95k | return; |
16019 | 0 | break; |
16020 | 1.11k | case 36: |
16021 | | // ANDSXri, ANDXri, AND_ZI, EORXri, EOR_ZI, ORRXri, ORR_ZI |
16022 | 1.11k | printLogicalImm64(MI, 2, O); |
16023 | 1.11k | return; |
16024 | 0 | break; |
16025 | 10.1k | case 37: |
16026 | | // BFMWri, BFMXri, CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, C... |
16027 | 10.1k | printOperand(MI, 3, O); |
16028 | 10.1k | break; |
16029 | 143 | case 38: |
16030 | | // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, FMLA_ZZZI_H, FMLS_ZZZI_H, INSv... |
16031 | 143 | printVectorIndex(MI, 4, O); |
16032 | 143 | break; |
16033 | 0 | case 39: |
16034 | | // CPY_ZPzI_B |
16035 | 0 | printImm8OptLsl32(MI, 2, O); |
16036 | 0 | return; |
16037 | 0 | break; |
16038 | 0 | case 40: |
16039 | | // CPY_ZPzI_D |
16040 | 0 | printImm8OptLsl64(MI, 2, O); |
16041 | 0 | return; |
16042 | 0 | break; |
16043 | 0 | case 41: |
16044 | | // CPY_ZPzI_S |
16045 | 0 | printImm8OptLsl32(MI, 2, O); |
16046 | 0 | return; |
16047 | 0 | break; |
16048 | 509 | case 42: |
16049 | | // DUPi16, DUPi32, DUPi64, DUPi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan... |
16050 | 509 | printVectorIndex(MI, 2, O); |
16051 | 509 | return; |
16052 | 0 | break; |
16053 | 0 | case 43: |
16054 | | // EXTRACT_ZPMXI_H_B, EXTRACT_ZPMXI_H_D, EXTRACT_ZPMXI_H_S |
16055 | 0 | printMatrixTileVector(MI, 2, O, 0); |
16056 | 0 | SStream_concat0(O, "["); |
16057 | 0 | set_sme_index(MI, true); |
16058 | 0 | printOperand(MI, 3, O); |
16059 | 0 | SStream_concat0(O, ", "); |
16060 | 0 | printMatrixIndex(MI, 4, O); |
16061 | 0 | SStream_concat0(O, "]"); |
16062 | 0 | set_mem_access(MI, false); |
16063 | 0 | return; |
16064 | 0 | break; |
16065 | 0 | case 44: |
16066 | | // EXTRACT_ZPMXI_V_B, EXTRACT_ZPMXI_V_D, EXTRACT_ZPMXI_V_S |
16067 | 0 | printMatrixTileVector(MI, 2, O, 1); |
16068 | 0 | SStream_concat0(O, "["); |
16069 | 0 | set_sme_index(MI, true); |
16070 | 0 | printOperand(MI, 3, O); |
16071 | 0 | SStream_concat0(O, ", "); |
16072 | 0 | printMatrixIndex(MI, 4, O); |
16073 | 0 | SStream_concat0(O, "]"); |
16074 | 0 | set_mem_access(MI, false); |
16075 | 0 | return; |
16076 | 0 | break; |
16077 | 2 | case 45: |
16078 | | // FCMEQ_PPzZ0_H, FCMGE_PPzZ0_H, FCMGT_PPzZ0_H, FCMLE_PPzZ0_H, FCMLT_PPzZ... |
16079 | 2 | SStream_concat0(O, ", #0.0"); |
16080 | 2 | arm64_op_addFP(MI, 0); |
16081 | 2 | return; |
16082 | 0 | break; |
16083 | 80 | case 46: |
16084 | | // FMLAL2lanev4f16, FMLALlanev4f16, FMLSL2lanev4f16, FMLSLlanev4f16 |
16085 | 80 | SStream_concat0(O, ".h"); |
16086 | 80 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H); |
16087 | 80 | printVectorIndex(MI, 4, O); |
16088 | 80 | return; |
16089 | 0 | break; |
16090 | 11 | case 47: |
16091 | | // FMLAL2v4f16, FMLALv4f16, FMLSL2v4f16, FMLSLv4f16 |
16092 | 11 | SStream_concat0(O, ".2h"); |
16093 | 11 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H); |
16094 | 11 | return; |
16095 | 0 | break; |
16096 | 14 | case 48: |
16097 | | // FMUL_ZZZI_H, MUL_ZZZI_H, SQDMULH_ZZZI_H, SQRDMULH_ZZZI_H |
16098 | 14 | printVectorIndex(MI, 3, O); |
16099 | 14 | return; |
16100 | 0 | break; |
16101 | 622 | case 49: |
16102 | | // GLD1B_D_REAL, GLD1D_REAL, GLD1H_D_REAL, GLD1SB_D_REAL, GLD1SH_D_REAL, ... |
16103 | 622 | printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 'd'); |
16104 | 622 | SStream_concat0(O, "]"); |
16105 | 622 | set_mem_access(MI, false); |
16106 | 622 | return; |
16107 | 0 | break; |
16108 | 134 | case 50: |
16109 | | // GLD1B_D_SXTW_REAL, GLD1D_SXTW_REAL, GLD1H_D_SXTW_REAL, GLD1SB_D_SXTW_R... |
16110 | 134 | printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 'd'); |
16111 | 134 | SStream_concat0(O, "]"); |
16112 | 134 | set_mem_access(MI, false); |
16113 | 134 | return; |
16114 | 0 | break; |
16115 | 65 | case 51: |
16116 | | // GLD1B_D_UXTW_REAL, GLD1D_UXTW_REAL, GLD1H_D_UXTW_REAL, GLD1SB_D_UXTW_R... |
16117 | 65 | printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 'd'); |
16118 | 65 | SStream_concat0(O, "]"); |
16119 | 65 | set_mem_access(MI, false); |
16120 | 65 | return; |
16121 | 0 | break; |
16122 | 183 | case 52: |
16123 | | // GLD1B_S_SXTW_REAL, GLD1H_S_SXTW_REAL, GLD1SB_S_SXTW_REAL, GLD1SH_S_SXT... |
16124 | 183 | printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 's'); |
16125 | 183 | SStream_concat0(O, "]"); |
16126 | 183 | set_mem_access(MI, false); |
16127 | 183 | return; |
16128 | 0 | break; |
16129 | 447 | case 53: |
16130 | | // GLD1B_S_UXTW_REAL, GLD1H_S_UXTW_REAL, GLD1SB_S_UXTW_REAL, GLD1SH_S_UXT... |
16131 | 447 | printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 's'); |
16132 | 447 | SStream_concat0(O, "]"); |
16133 | 447 | set_mem_access(MI, false); |
16134 | 447 | return; |
16135 | 0 | break; |
16136 | 351 | case 54: |
16137 | | // GLD1D_IMM_REAL, GLDFF1D_IMM_REAL, LD1RD_IMM, LDRAAwriteback, LDRABwrit... |
16138 | 351 | printImmScale(MI, 3, O, 8); |
16139 | 351 | break; |
16140 | 51 | case 55: |
16141 | | // GLD1D_SCALED_REAL, GLDFF1D_SCALED_REAL, SST1D_SCALED_SCALED_REAL |
16142 | 51 | printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 'd'); |
16143 | 51 | SStream_concat0(O, "]"); |
16144 | 51 | set_mem_access(MI, false); |
16145 | 51 | return; |
16146 | 0 | break; |
16147 | 250 | case 56: |
16148 | | // GLD1D_SXTW_SCALED_REAL, GLDFF1D_SXTW_SCALED_REAL, SST1D_SXTW_SCALED |
16149 | 250 | printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 'd'); |
16150 | 250 | SStream_concat0(O, "]"); |
16151 | 250 | set_mem_access(MI, false); |
16152 | 250 | return; |
16153 | 0 | break; |
16154 | 20 | case 57: |
16155 | | // GLD1D_UXTW_SCALED_REAL, GLDFF1D_UXTW_SCALED_REAL, SST1D_UXTW_SCALED |
16156 | 20 | printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 'd'); |
16157 | 20 | SStream_concat0(O, "]"); |
16158 | 20 | set_mem_access(MI, false); |
16159 | 20 | return; |
16160 | 0 | break; |
16161 | 263 | case 58: |
16162 | | // GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL, GLD1SH_D_IMM_REAL, GLD1SH_S_IMM_RE... |
16163 | 263 | printImmScale(MI, 3, O, 2); |
16164 | 263 | break; |
16165 | 148 | case 59: |
16166 | | // GLD1H_D_SCALED_REAL, GLD1SH_D_SCALED_REAL, GLDFF1H_D_SCALED_REAL, GLDF... |
16167 | 148 | printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 'd'); |
16168 | 148 | SStream_concat0(O, "]"); |
16169 | 148 | set_mem_access(MI, false); |
16170 | 148 | return; |
16171 | 0 | break; |
16172 | 204 | case 60: |
16173 | | // GLD1H_D_SXTW_SCALED_REAL, GLD1SH_D_SXTW_SCALED_REAL, GLDFF1H_D_SXTW_SC... |
16174 | 204 | printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 'd'); |
16175 | 204 | SStream_concat0(O, "]"); |
16176 | 204 | set_mem_access(MI, false); |
16177 | 204 | return; |
16178 | 0 | break; |
16179 | 65 | case 61: |
16180 | | // GLD1H_D_UXTW_SCALED_REAL, GLD1SH_D_UXTW_SCALED_REAL, GLDFF1H_D_UXTW_SC... |
16181 | 65 | printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 'd'); |
16182 | 65 | SStream_concat0(O, "]"); |
16183 | 65 | set_mem_access(MI, false); |
16184 | 65 | return; |
16185 | 0 | break; |
16186 | 34 | case 62: |
16187 | | // GLD1H_S_SXTW_SCALED_REAL, GLD1SH_S_SXTW_SCALED_REAL, GLDFF1H_S_SXTW_SC... |
16188 | 34 | printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 's'); |
16189 | 34 | SStream_concat0(O, "]"); |
16190 | 34 | set_mem_access(MI, false); |
16191 | 34 | return; |
16192 | 0 | break; |
16193 | 60 | case 63: |
16194 | | // GLD1H_S_UXTW_SCALED_REAL, GLD1SH_S_UXTW_SCALED_REAL, GLDFF1H_S_UXTW_SC... |
16195 | 60 | printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 's'); |
16196 | 60 | SStream_concat0(O, "]"); |
16197 | 60 | set_mem_access(MI, false); |
16198 | 60 | return; |
16199 | 0 | break; |
16200 | 615 | case 64: |
16201 | | // GLD1SW_D_IMM_REAL, GLD1W_D_IMM_REAL, GLD1W_IMM_REAL, GLDFF1SW_D_IMM_RE... |
16202 | 615 | printImmScale(MI, 3, O, 4); |
16203 | 615 | break; |
16204 | 308 | case 65: |
16205 | | // GLD1SW_D_SCALED_REAL, GLD1W_D_SCALED_REAL, GLDFF1SW_D_SCALED_REAL, GLD... |
16206 | 308 | printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 'd'); |
16207 | 308 | SStream_concat0(O, "]"); |
16208 | 308 | set_mem_access(MI, false); |
16209 | 308 | return; |
16210 | 0 | break; |
16211 | 47 | case 66: |
16212 | | // GLD1SW_D_SXTW_SCALED_REAL, GLD1W_D_SXTW_SCALED_REAL, GLDFF1SW_D_SXTW_S... |
16213 | 47 | printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 'd'); |
16214 | 47 | SStream_concat0(O, "]"); |
16215 | 47 | set_mem_access(MI, false); |
16216 | 47 | return; |
16217 | 0 | break; |
16218 | 142 | case 67: |
16219 | | // GLD1SW_D_UXTW_SCALED_REAL, GLD1W_D_UXTW_SCALED_REAL, GLDFF1SW_D_UXTW_S... |
16220 | 142 | printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 'd'); |
16221 | 142 | SStream_concat0(O, "]"); |
16222 | 142 | set_mem_access(MI, false); |
16223 | 142 | return; |
16224 | 0 | break; |
16225 | 6 | case 68: |
16226 | | // GLD1W_SXTW_SCALED_REAL, GLDFF1W_SXTW_SCALED_REAL, SST1W_SXTW_SCALED |
16227 | 6 | printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 's'); |
16228 | 6 | SStream_concat0(O, "]"); |
16229 | 6 | set_mem_access(MI, false); |
16230 | 6 | return; |
16231 | 0 | break; |
16232 | 23 | case 69: |
16233 | | // GLD1W_UXTW_SCALED_REAL, GLDFF1W_UXTW_SCALED_REAL, SST1W_UXTW_SCALED |
16234 | 23 | printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 's'); |
16235 | 23 | SStream_concat0(O, "]"); |
16236 | 23 | set_mem_access(MI, false); |
16237 | 23 | return; |
16238 | 0 | break; |
16239 | 38 | case 70: |
16240 | | // INDEX_RI_B |
16241 | 38 | printSImm(MI, 2, O, 8); |
16242 | 38 | return; |
16243 | 0 | break; |
16244 | 371 | case 71: |
16245 | | // LD1B, LD1B_D, LD1B_H, LD1B_S, LD1RO_B, LD1RQ_B, LD1SB_D, LD1SB_H, LD1S... |
16246 | 371 | printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 0); |
16247 | 371 | SStream_concat0(O, "]"); |
16248 | 371 | set_mem_access(MI, false); |
16249 | 371 | return; |
16250 | 0 | break; |
16251 | 66 | case 72: |
16252 | | // LD1D, LD1RO_D, LD1RQ_D, LD2D, LD3D, LD4D, LDFF1D_REAL, LDNT1D_ZRR, ST1... |
16253 | 66 | printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 0); |
16254 | 66 | SStream_concat0(O, "]"); |
16255 | 66 | set_mem_access(MI, false); |
16256 | 66 | return; |
16257 | 0 | break; |
16258 | 313 | case 73: |
16259 | | // LD1H, LD1H_D, LD1H_S, LD1RO_H, LD1RQ_H, LD1SH_D, LD1SH_S, LD2H, LD3H, ... |
16260 | 313 | printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 0); |
16261 | 313 | SStream_concat0(O, "]"); |
16262 | 313 | set_mem_access(MI, false); |
16263 | 313 | return; |
16264 | 0 | break; |
16265 | 86 | case 74: |
16266 | | // LD1RO_B_IMM, LD1RO_D_IMM, LD1RO_H_IMM, LD1RO_W_IMM |
16267 | 86 | printImmScale(MI, 3, O, 32); |
16268 | 86 | SStream_concat0(O, "]"); |
16269 | 86 | set_mem_access(MI, false); |
16270 | 86 | return; |
16271 | 0 | break; |
16272 | 95 | case 75: |
16273 | | // LD1RO_W, LD1RQ_W, LD1SW_D, LD1W, LD1W_D, LD2W, LD3W, LD4W, LDFF1SW_D_R... |
16274 | 95 | printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 0); |
16275 | 95 | SStream_concat0(O, "]"); |
16276 | 95 | set_mem_access(MI, false); |
16277 | 95 | return; |
16278 | 0 | break; |
16279 | 1.05k | case 76: |
16280 | | // LD1RQ_B_IMM, LD1RQ_D_IMM, LD1RQ_H_IMM, LD1RQ_W_IMM, LDG, ST2GPostIndex... |
16281 | 1.05k | printImmScale(MI, 3, O, 16); |
16282 | 1.05k | break; |
16283 | 36 | case 77: |
16284 | | // LD3B_IMM, LD3D_IMM, LD3H_IMM, LD3W_IMM, ST3B_IMM, ST3D_IMM, ST3H_IMM, ... |
16285 | 36 | printImmScale(MI, 3, O, 3); |
16286 | 36 | SStream_concat0(O, ", mul vl]"); |
16287 | 36 | set_mem_access(MI, false); |
16288 | 36 | return; |
16289 | 0 | break; |
16290 | 277 | case 78: |
16291 | | // LDRAAindexed, LDRABindexed |
16292 | 277 | printImmScale(MI, 2, O, 8); |
16293 | 277 | SStream_concat0(O, "]"); |
16294 | 277 | set_mem_access(MI, false); |
16295 | 277 | return; |
16296 | 0 | break; |
16297 | 1.16k | case 79: |
16298 | | // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui |
16299 | 1.16k | printUImm12Offset(MI, 2, O, 1); |
16300 | 1.16k | SStream_concat0(O, "]"); |
16301 | 1.16k | set_mem_access(MI, false); |
16302 | 1.16k | return; |
16303 | 0 | break; |
16304 | 404 | case 80: |
16305 | | // LDRDui, LDRXui, PRFMui, STRDui, STRXui |
16306 | 404 | printUImm12Offset(MI, 2, O, 8); |
16307 | 404 | SStream_concat0(O, "]"); |
16308 | 404 | set_mem_access(MI, false); |
16309 | 404 | return; |
16310 | 0 | break; |
16311 | 794 | case 81: |
16312 | | // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui |
16313 | 794 | printUImm12Offset(MI, 2, O, 2); |
16314 | 794 | SStream_concat0(O, "]"); |
16315 | 794 | set_mem_access(MI, false); |
16316 | 794 | return; |
16317 | 0 | break; |
16318 | 476 | case 82: |
16319 | | // LDRQui, STRQui |
16320 | 476 | printUImm12Offset(MI, 2, O, 16); |
16321 | 476 | SStream_concat0(O, "]"); |
16322 | 476 | set_mem_access(MI, false); |
16323 | 476 | return; |
16324 | 0 | break; |
16325 | 1.43k | case 83: |
16326 | | // LDRSWui, LDRSui, LDRWui, STRSui, STRWui |
16327 | 1.43k | printUImm12Offset(MI, 2, O, 4); |
16328 | 1.43k | SStream_concat0(O, "]"); |
16329 | 1.43k | set_mem_access(MI, false); |
16330 | 1.43k | return; |
16331 | 0 | break; |
16332 | 64 | case 84: |
16333 | | // MAD_ZPmZZ_B, MLA_ZPmZZ_B, MLS_ZPmZZ_B, MSB_ZPmZZ_B |
16334 | 64 | printSVERegOp(MI, 3, O, 'b'); |
16335 | 64 | SStream_concat0(O, ", "); |
16336 | 64 | printSVERegOp(MI, 4, O, 'b'); |
16337 | 64 | return; |
16338 | 0 | break; |
16339 | 27 | case 85: |
16340 | | // PRFB_D_PZI, PRFB_S_PZI |
16341 | 27 | SStream_concat0(O, "]"); |
16342 | 27 | set_mem_access(MI, false); |
16343 | 27 | return; |
16344 | 0 | break; |
16345 | 103 | case 86: |
16346 | | // PRFB_PRI, PRFD_PRI, PRFH_PRI, PRFW_PRI |
16347 | 103 | SStream_concat0(O, ", mul vl]"); |
16348 | 103 | set_mem_access(MI, false); |
16349 | 103 | return; |
16350 | 0 | break; |
16351 | 2 | case 87: |
16352 | | // SPLICE_ZPZZ_B |
16353 | 2 | printTypedVectorList(MI, 2, O, 0,'b'); |
16354 | 2 | return; |
16355 | 0 | break; |
16356 | 6 | case 88: |
16357 | | // SPLICE_ZPZZ_D |
16358 | 6 | printTypedVectorList(MI, 2, O, 0,'d'); |
16359 | 6 | return; |
16360 | 0 | break; |
16361 | 3 | case 89: |
16362 | | // SPLICE_ZPZZ_S |
16363 | 3 | printTypedVectorList(MI, 2, O, 0,'s'); |
16364 | 3 | return; |
16365 | 0 | break; |
16366 | 853 | case 90: |
16367 | | // SQDECP_XPWd_B, SQDECP_XPWd_D, SQDECP_XPWd_H, SQDECP_XPWd_S, SQINCP_XPW... |
16368 | 853 | printGPR64as32(MI, 2, O); |
16369 | 853 | return; |
16370 | 0 | break; |
16371 | 46 | case 91: |
16372 | | // SYSLxt |
16373 | 46 | printSysCROperand(MI, 2, O); |
16374 | 46 | SStream_concat0(O, ", "); |
16375 | 46 | printSysCROperand(MI, 3, O); |
16376 | 46 | SStream_concat0(O, ", "); |
16377 | 46 | printOperand(MI, 4, O); |
16378 | 46 | return; |
16379 | 0 | break; |
16380 | 2.21k | case 92: |
16381 | | // TBNZW, TBNZX, TBZW, TBZX |
16382 | 2.21k | printAlignedLabel(MI, 2, O); |
16383 | 2.21k | return; |
16384 | 0 | break; |
16385 | 10 | case 93: |
16386 | | // UMAX_ZI_B, UMAX_ZI_D, UMAX_ZI_S, UMIN_ZI_B, UMIN_ZI_D, UMIN_ZI_S |
16387 | 10 | printImm(MI, 2, O); |
16388 | 10 | return; |
16389 | 0 | break; |
16390 | 58.5k | } |
16391 | | |
16392 | | |
16393 | | // Fragment 5 encoded into 6 bits for 41 unique commands. |
16394 | | // printf("Fragment 5: %"PRIu64"\n", ((Bits >> 49) & 63)); |
16395 | 34.7k | switch ((Bits >> 49) & 63) { |
16396 | 0 | default: // unreachable |
16397 | 6.03k | case 0: |
16398 | | // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD... |
16399 | 6.03k | return; |
16400 | 0 | break; |
16401 | 12.8k | case 1: |
16402 | | // ADDG, ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, A... |
16403 | 12.8k | SStream_concat0(O, ", "); |
16404 | 12.8k | break; |
16405 | 13 | case 2: |
16406 | | // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... |
16407 | 13 | SStream_concat0(O, ".2d"); |
16408 | 13 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
16409 | 13 | return; |
16410 | 0 | break; |
16411 | 392 | case 3: |
16412 | | // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... |
16413 | 392 | SStream_concat0(O, ".4s"); |
16414 | 392 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
16415 | 392 | return; |
16416 | 0 | break; |
16417 | 303 | case 4: |
16418 | | // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BFDOTv8bf16, B... |
16419 | 303 | SStream_concat0(O, ".8h"); |
16420 | 303 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
16421 | 303 | return; |
16422 | 0 | break; |
16423 | 44 | case 5: |
16424 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BIC_ZPmZ... |
16425 | 44 | printSVERegOp(MI, 3, O, 'h'); |
16426 | 44 | break; |
16427 | 74 | case 6: |
16428 | | // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... |
16429 | 74 | SStream_concat0(O, ".16b"); |
16430 | 74 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
16431 | 74 | return; |
16432 | 0 | break; |
16433 | 59 | case 7: |
16434 | | // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... |
16435 | 59 | SStream_concat0(O, ".2s"); |
16436 | 59 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
16437 | 59 | return; |
16438 | 0 | break; |
16439 | 104 | case 8: |
16440 | | // ADDPv4i16, ADDv4i16, BFDOTv4bf16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMH... |
16441 | 104 | SStream_concat0(O, ".4h"); |
16442 | 104 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
16443 | 104 | return; |
16444 | 0 | break; |
16445 | 383 | case 9: |
16446 | | // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... |
16447 | 383 | SStream_concat0(O, ".8b"); |
16448 | 383 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
16449 | 383 | return; |
16450 | 0 | break; |
16451 | 241 | case 10: |
16452 | | // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64 |
16453 | 241 | printArithExtend(MI, 3, O); |
16454 | 241 | return; |
16455 | 0 | break; |
16456 | 50 | case 11: |
16457 | | // ASRD_ZPmI_H, ASR_ZPmI_H, CMPEQ_PPzZI_H, CMPGE_PPzZI_H, CMPGT_PPzZI_H, ... |
16458 | 50 | printOperand(MI, 3, O); |
16459 | 50 | return; |
16460 | 0 | break; |
16461 | 66 | case 12: |
16462 | | // ASR_WIDE_ZPmZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_WIDE_PPzZZ_H, CMPGT_WIDE_PP... |
16463 | 66 | printSVERegOp(MI, 3, O, 'd'); |
16464 | 66 | return; |
16465 | 0 | break; |
16466 | 49 | case 13: |
16467 | | // BCAX, EOR3, EXTv16i8 |
16468 | 49 | SStream_concat0(O, ".16b, "); |
16469 | 49 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
16470 | 49 | break; |
16471 | 12 | case 14: |
16472 | | // BF16DOTlanev4bf16, BF16DOTlanev8bf16 |
16473 | 12 | SStream_concat0(O, ".2h"); |
16474 | 12 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H); |
16475 | 12 | printVectorIndex(MI, 4, O); |
16476 | 12 | return; |
16477 | 0 | break; |
16478 | 102 | case 15: |
16479 | | // BFDOT_ZZI, BFMMLA_B_ZZI, BFMMLA_T_ZZI, CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA... |
16480 | 102 | printVectorIndex(MI, 4, O); |
16481 | 102 | break; |
16482 | 897 | case 16: |
16483 | | // BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv8f16_indexed, FMLAL2... |
16484 | 897 | SStream_concat0(O, ".h"); |
16485 | 897 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H); |
16486 | 897 | break; |
16487 | 2 | case 17: |
16488 | | // CADD_ZZI_H, SQCADD_ZZI_H |
16489 | 2 | printComplexRotationOp(MI, 3, O, 180, 90); |
16490 | 2 | return; |
16491 | 0 | break; |
16492 | 4.70k | case 18: |
16493 | | // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH... |
16494 | 4.70k | SStream_concat0(O, "]"); |
16495 | 4.70k | set_mem_access(MI, false); |
16496 | 4.70k | return; |
16497 | 0 | break; |
16498 | 65 | case 19: |
16499 | | // CDOT_ZZZ_S, CMLA_ZZZ_B, CMLA_ZZZ_H, SQRDCMLAH_ZZZ_B, SQRDCMLAH_ZZZ_H |
16500 | 65 | printComplexRotationOp(MI, 4, O, 90, 0); |
16501 | 65 | return; |
16502 | 0 | break; |
16503 | 28 | case 20: |
16504 | | // CMPHI_PPzZI_H, CMPHS_PPzZI_H, CMPLO_PPzZI_H, CMPLS_PPzZI_H |
16505 | 28 | printImm(MI, 3, O); |
16506 | 28 | return; |
16507 | 0 | break; |
16508 | 15 | case 21: |
16509 | | // EXTv8i8 |
16510 | 15 | SStream_concat0(O, ".8b, "); |
16511 | 15 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); |
16512 | 15 | printOperand(MI, 3, O); |
16513 | 15 | return; |
16514 | 0 | break; |
16515 | 9 | case 22: |
16516 | | // FADD_ZPmI_H, FSUBR_ZPmI_H, FSUB_ZPmI_H |
16517 | 9 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_one); |
16518 | 9 | return; |
16519 | 0 | break; |
16520 | 7 | case 23: |
16521 | | // FCADDv2f32, FCMLAv2f32 |
16522 | 7 | SStream_concat0(O, ".2s, "); |
16523 | 7 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); |
16524 | 7 | break; |
16525 | 18 | case 24: |
16526 | | // FCADDv2f64, FCMLAv2f64, XAR |
16527 | 18 | SStream_concat0(O, ".2d, "); |
16528 | 18 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); |
16529 | 18 | break; |
16530 | 9 | case 25: |
16531 | | // FCADDv4f16, FCMLAv4f16 |
16532 | 9 | SStream_concat0(O, ".4h, "); |
16533 | 9 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); |
16534 | 9 | break; |
16535 | 148 | case 26: |
16536 | | // FCADDv4f32, FCMLAv4f32, SM3SS1 |
16537 | 148 | SStream_concat0(O, ".4s, "); |
16538 | 148 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
16539 | 148 | break; |
16540 | 26 | case 27: |
16541 | | // FCADDv8f16, FCMLAv8f16 |
16542 | 26 | SStream_concat0(O, ".8h, "); |
16543 | 26 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); |
16544 | 26 | break; |
16545 | 3 | case 28: |
16546 | | // FCMEQ_PPzZ0_D, FCMEQ_PPzZ0_S, FCMGE_PPzZ0_D, FCMGE_PPzZ0_S, FCMGT_PPzZ... |
16547 | 3 | SStream_concat0(O, ", #0.0"); |
16548 | 3 | arm64_op_addFP(MI, 0); |
16549 | 3 | return; |
16550 | 0 | break; |
16551 | 356 | case 29: |
16552 | | // FCMLA_ZPmZZ_H, FMAD_ZPmZZ_H, FMLA_ZPmZZ_H, FMLS_ZPmZZ_H, FMSB_ZPmZZ_H,... |
16553 | 356 | printSVERegOp(MI, 4, O, 'h'); |
16554 | 356 | break; |
16555 | 359 | case 30: |
16556 | | // FCMLAv4f32_indexed, FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_in... |
16557 | 359 | SStream_concat0(O, ".s"); |
16558 | 359 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S); |
16559 | 359 | break; |
16560 | 67 | case 31: |
16561 | | // FMAXNM_ZPmI_H, FMAX_ZPmI_H, FMINNM_ZPmI_H, FMIN_ZPmI_H |
16562 | 67 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_zero, AArch64ExactFPImm_one); |
16563 | 67 | return; |
16564 | 0 | break; |
16565 | 62 | case 32: |
16566 | | // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind... |
16567 | 62 | SStream_concat0(O, ".d"); |
16568 | 62 | break; |
16569 | 7 | case 33: |
16570 | | // FMUL_ZPmI_H |
16571 | 7 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_two); |
16572 | 7 | return; |
16573 | 0 | break; |
16574 | 139 | case 34: |
16575 | | // FMUL_ZZZI_D, FMUL_ZZZI_S, MUL_ZZZI_D, MUL_ZZZI_S, SMULLB_ZZZI_D, SMULL... |
16576 | 139 | printVectorIndex(MI, 3, O); |
16577 | 139 | return; |
16578 | 0 | break; |
16579 | 1.84k | case 35: |
16580 | | // LD1B_D_IMM_REAL, LD1B_H_IMM_REAL, LD1B_IMM_REAL, LD1B_S_IMM_REAL, LD1D... |
16581 | 1.84k | SStream_concat0(O, ", mul vl]"); |
16582 | 1.84k | set_mem_access(MI, false); |
16583 | 1.84k | return; |
16584 | 0 | break; |
16585 | 2.70k | case 36: |
16586 | | // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STGPpost,... |
16587 | 2.70k | SStream_concat0(O, "], "); |
16588 | 2.70k | set_mem_access(MI, false); |
16589 | 2.70k | break; |
16590 | 2.18k | case 37: |
16591 | | // LDRAAwriteback, LDRABwriteback, LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, ... |
16592 | 2.18k | SStream_concat0(O, "]!"); |
16593 | 2.18k | set_mem_access(MI, false); |
16594 | 2.18k | return; |
16595 | 0 | break; |
16596 | 130 | case 38: |
16597 | | // PSEL_PPPRI_B, PSEL_PPPRI_D, PSEL_PPPRI_H, PSEL_PPPRI_S |
16598 | 130 | SStream_concat0(O, "["); |
16599 | 130 | set_sme_index(MI, true); |
16600 | 130 | printOperand(MI, 3, O); |
16601 | 130 | SStream_concat0(O, ", "); |
16602 | 130 | printMatrixIndex(MI, 4, O); |
16603 | 130 | SStream_concat0(O, "]"); |
16604 | 130 | set_mem_access(MI, false); |
16605 | 130 | return; |
16606 | 0 | break; |
16607 | 43 | case 39: |
16608 | | // SDOTlanev16i8, SDOTlanev8i8, SUDOTlanev16i8, SUDOTlanev8i8, UDOTlanev1... |
16609 | 43 | SStream_concat0(O, ".4b"); |
16610 | 43 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4B); |
16611 | 43 | printVectorIndex(MI, 4, O); |
16612 | 43 | return; |
16613 | 0 | break; |
16614 | 214 | case 40: |
16615 | | // STLXPW, STLXPX, STXPW, STXPX |
16616 | 214 | SStream_concat0(O, ", ["); |
16617 | 214 | set_mem_access(MI, true); |
16618 | 214 | printOperand(MI, 3, O); |
16619 | 214 | SStream_concat0(O, "]"); |
16620 | 214 | set_mem_access(MI, false); |
16621 | 214 | return; |
16622 | 0 | break; |
16623 | 34.7k | } |
16624 | | |
16625 | | |
16626 | | // Fragment 6 encoded into 6 bits for 37 unique commands. |
16627 | | // printf("Fragment 6: %"PRIu64"\n", ((Bits >> 55) & 63)); |
16628 | 17.5k | switch ((Bits >> 55) & 63) { |
16629 | 0 | default: // unreachable |
16630 | 1.32k | case 0: |
16631 | | // ADDG, ASRD_ZPmI_B, ASRD_ZPmI_D, ASRD_ZPmI_S, ASR_ZPmI_B, ASR_ZPmI_D, A... |
16632 | 1.32k | printOperand(MI, 3, O); |
16633 | 1.32k | return; |
16634 | 0 | break; |
16635 | 438 | case 1: |
16636 | | // ADDP_ZPmZ_B, ADD_ZPmZ_B, ANDS_PPzPP, AND_PPzPP, AND_ZPmZ_B, ASRR_ZPmZ_... |
16637 | 438 | printSVERegOp(MI, 3, O, 'b'); |
16638 | 438 | return; |
16639 | 0 | break; |
16640 | 158 | case 2: |
16641 | | // ADDP_ZPmZ_D, ADD_ZPmZ_D, AND_ZPmZ_D, ASRR_ZPmZ_D, ASR_WIDE_ZPmZ_B, ASR... |
16642 | 158 | printSVERegOp(MI, 3, O, 'd'); |
16643 | 158 | break; |
16644 | 457 | case 3: |
16645 | | // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BFDOT_ZZ... |
16646 | 457 | return; |
16647 | 0 | break; |
16648 | 114 | case 4: |
16649 | | // ADDP_ZPmZ_S, ADD_ZPmZ_S, AND_ZPmZ_S, ASRR_ZPmZ_S, ASR_ZPmZ_S, BIC_ZPmZ... |
16650 | 114 | printSVERegOp(MI, 3, O, 's'); |
16651 | 114 | break; |
16652 | 49 | case 5: |
16653 | | // BCAX, EOR3, SM3SS1 |
16654 | 49 | printVRegOperand(MI, 3, O); |
16655 | 49 | break; |
16656 | 864 | case 6: |
16657 | | // BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv4f32_indexed, FCMLAv... |
16658 | 864 | printVectorIndex(MI, 4, O); |
16659 | 864 | break; |
16660 | 0 | case 7: |
16661 | | // BFMWri, BFMXri |
16662 | 0 | printOperand(MI, 4, O); |
16663 | 0 | return; |
16664 | 0 | break; |
16665 | 88 | case 8: |
16666 | | // CADD_ZZI_B, CADD_ZZI_D, CADD_ZZI_S, FCADDv2f32, FCADDv2f64, FCADDv4f16... |
16667 | 88 | printComplexRotationOp(MI, 3, O, 180, 90); |
16668 | 88 | return; |
16669 | 0 | break; |
16670 | 776 | case 9: |
16671 | | // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr... |
16672 | 776 | printCondCode(MI, 3, O); |
16673 | 776 | return; |
16674 | 0 | break; |
16675 | 45 | case 10: |
16676 | | // CDOT_ZZZI_D, CMLA_ZZZI_S, FCADD_ZPmZ_H, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, S... |
16677 | 45 | SStream_concat0(O, ", "); |
16678 | 45 | break; |
16679 | 75 | case 11: |
16680 | | // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, SQRDCMLAH_ZZZI_H |
16681 | 75 | printComplexRotationOp(MI, 5, O, 90, 0); |
16682 | 75 | return; |
16683 | 0 | break; |
16684 | 66 | case 12: |
16685 | | // CDOT_ZZZ_D, CMLA_ZZZ_D, CMLA_ZZZ_S, FCMLAv2f32, FCMLAv2f64, FCMLAv4f16... |
16686 | 66 | printComplexRotationOp(MI, 4, O, 90, 0); |
16687 | 66 | return; |
16688 | 0 | break; |
16689 | 7 | case 13: |
16690 | | // CLASTA_RPZ_H, CLASTA_VPZ_H, CLASTB_RPZ_H, CLASTB_VPZ_H |
16691 | 7 | printSVERegOp(MI, 3, O, 'h'); |
16692 | 7 | return; |
16693 | 0 | break; |
16694 | 229 | case 14: |
16695 | | // CMPHI_PPzZI_B, CMPHI_PPzZI_D, CMPHI_PPzZI_S, CMPHS_PPzZI_B, CMPHS_PPzZ... |
16696 | 229 | printImm(MI, 3, O); |
16697 | 229 | return; |
16698 | 0 | break; |
16699 | 1 | case 15: |
16700 | | // FADD_ZPmI_D, FADD_ZPmI_S, FSUBR_ZPmI_D, FSUBR_ZPmI_S, FSUB_ZPmI_D, FSU... |
16701 | 1 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_one); |
16702 | 1 | return; |
16703 | 0 | break; |
16704 | 343 | case 16: |
16705 | | // FCMLA_ZPmZZ_D, FMAD_ZPmZZ_D, FMLA_ZPmZZ_D, FMLS_ZPmZZ_D, FMSB_ZPmZZ_D,... |
16706 | 343 | printSVERegOp(MI, 4, O, 'd'); |
16707 | 343 | break; |
16708 | 277 | case 17: |
16709 | | // FCMLA_ZPmZZ_S, FMAD_ZPmZZ_S, FMLA_ZPmZZ_S, FMLS_ZPmZZ_S, FMSB_ZPmZZ_S,... |
16710 | 277 | printSVERegOp(MI, 4, O, 's'); |
16711 | 277 | break; |
16712 | 50 | case 18: |
16713 | | // FMAXNM_ZPmI_D, FMAXNM_ZPmI_S, FMAX_ZPmI_D, FMAX_ZPmI_S, FMINNM_ZPmI_D,... |
16714 | 50 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_zero, AArch64ExactFPImm_one); |
16715 | 50 | return; |
16716 | 0 | break; |
16717 | 454 | case 19: |
16718 | | // FMULXv1i16_indexed, FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32... |
16719 | 454 | printVectorIndex(MI, 3, O); |
16720 | 454 | return; |
16721 | 0 | break; |
16722 | 14 | case 20: |
16723 | | // FMUL_ZPmI_D, FMUL_ZPmI_S |
16724 | 14 | printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_two); |
16725 | 14 | return; |
16726 | 0 | break; |
16727 | 1.59k | case 21: |
16728 | | // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi |
16729 | 1.59k | printImmScale(MI, 3, O, 8); |
16730 | 1.59k | SStream_concat0(O, "]"); |
16731 | 1.59k | set_mem_access(MI, false); |
16732 | 1.59k | return; |
16733 | 0 | break; |
16734 | 342 | case 22: |
16735 | | // LDNPQi, LDPQi, STGPi, STNPQi, STPQi |
16736 | 342 | printImmScale(MI, 3, O, 16); |
16737 | 342 | SStream_concat0(O, "]"); |
16738 | 342 | set_mem_access(MI, false); |
16739 | 342 | return; |
16740 | 0 | break; |
16741 | 3.21k | case 23: |
16742 | | // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi |
16743 | 3.21k | printImmScale(MI, 3, O, 4); |
16744 | 3.21k | SStream_concat0(O, "]"); |
16745 | 3.21k | set_mem_access(MI, false); |
16746 | 3.21k | return; |
16747 | 0 | break; |
16748 | 1.57k | case 24: |
16749 | | // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP... |
16750 | 1.57k | printImmScale(MI, 4, O, 8); |
16751 | 1.57k | break; |
16752 | 1.91k | case 25: |
16753 | | // LDPQpost, LDPQpre, STGPpost, STGPpre, STPQpost, STPQpre |
16754 | 1.91k | printImmScale(MI, 4, O, 16); |
16755 | 1.91k | break; |
16756 | 806 | case 26: |
16757 | | // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S... |
16758 | 806 | printImmScale(MI, 4, O, 4); |
16759 | 806 | break; |
16760 | 27 | case 27: |
16761 | | // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW |
16762 | 27 | printMemExtend(MI, 3, O, 'w', 8); |
16763 | 27 | SStream_concat0(O, "]"); |
16764 | 27 | set_mem_access(MI, false); |
16765 | 27 | return; |
16766 | 0 | break; |
16767 | 45 | case 28: |
16768 | | // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX |
16769 | 45 | printMemExtend(MI, 3, O, 'x', 8); |
16770 | 45 | SStream_concat0(O, "]"); |
16771 | 45 | set_mem_access(MI, false); |
16772 | 45 | return; |
16773 | 0 | break; |
16774 | 663 | case 29: |
16775 | | // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW |
16776 | 663 | printMemExtend(MI, 3, O, 'w', 64); |
16777 | 663 | SStream_concat0(O, "]"); |
16778 | 663 | set_mem_access(MI, false); |
16779 | 663 | return; |
16780 | 0 | break; |
16781 | 654 | case 30: |
16782 | | // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX |
16783 | 654 | printMemExtend(MI, 3, O, 'x', 64); |
16784 | 654 | SStream_concat0(O, "]"); |
16785 | 654 | set_mem_access(MI, false); |
16786 | 654 | return; |
16787 | 0 | break; |
16788 | 384 | case 31: |
16789 | | // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW |
16790 | 384 | printMemExtend(MI, 3, O, 'w', 16); |
16791 | 384 | SStream_concat0(O, "]"); |
16792 | 384 | set_mem_access(MI, false); |
16793 | 384 | return; |
16794 | 0 | break; |
16795 | 435 | case 32: |
16796 | | // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX |
16797 | 435 | printMemExtend(MI, 3, O, 'x', 16); |
16798 | 435 | SStream_concat0(O, "]"); |
16799 | 435 | set_mem_access(MI, false); |
16800 | 435 | return; |
16801 | 0 | break; |
16802 | 16 | case 33: |
16803 | | // LDRQroW, STRQroW |
16804 | 16 | printMemExtend(MI, 3, O, 'w', 128); |
16805 | 16 | SStream_concat0(O, "]"); |
16806 | 16 | set_mem_access(MI, false); |
16807 | 16 | return; |
16808 | 0 | break; |
16809 | 62 | case 34: |
16810 | | // LDRQroX, STRQroX |
16811 | 62 | printMemExtend(MI, 3, O, 'x', 128); |
16812 | 62 | SStream_concat0(O, "]"); |
16813 | 62 | set_mem_access(MI, false); |
16814 | 62 | return; |
16815 | 0 | break; |
16816 | 20 | case 35: |
16817 | | // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW |
16818 | 20 | printMemExtend(MI, 3, O, 'w', 32); |
16819 | 20 | SStream_concat0(O, "]"); |
16820 | 20 | set_mem_access(MI, false); |
16821 | 20 | return; |
16822 | 0 | break; |
16823 | 15 | case 36: |
16824 | | // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX |
16825 | 15 | printMemExtend(MI, 3, O, 'x', 32); |
16826 | 15 | SStream_concat0(O, "]"); |
16827 | 15 | set_mem_access(MI, false); |
16828 | 15 | return; |
16829 | 0 | break; |
16830 | 17.5k | } |
16831 | | |
16832 | | |
16833 | | // Fragment 7 encoded into 3 bits for 7 unique commands. |
16834 | | // printf("Fragment 7: %"PRIu64"\n", ((Bits >> 61) & 7)); |
16835 | 6.13k | switch ((Bits >> 61) & 7) { |
16836 | 0 | default: // unreachable |
16837 | 4.03k | case 0: |
16838 | | // ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_D, ADD_ZPmZ_S, AND_ZPmZ_D, AND_ZPmZ... |
16839 | 4.03k | return; |
16840 | 0 | break; |
16841 | 11 | case 1: |
16842 | | // BCAX, EOR3 |
16843 | 11 | SStream_concat0(O, ".16b"); |
16844 | 11 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); |
16845 | 11 | return; |
16846 | 0 | break; |
16847 | 31 | case 2: |
16848 | | // CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, SQRDCMLAH_ZZZI_... |
16849 | 31 | printComplexRotationOp(MI, 5, O, 90, 0); |
16850 | 31 | return; |
16851 | 0 | break; |
16852 | 426 | case 3: |
16853 | | // FCADD_ZPmZ_D, FCADD_ZPmZ_S, FCMLA_ZPmZZ_D, FCMLA_ZPmZZ_S, FCMLAv4f16_i... |
16854 | 426 | SStream_concat0(O, ", "); |
16855 | 426 | break; |
16856 | 14 | case 4: |
16857 | | // FCADD_ZPmZ_H |
16858 | 14 | printComplexRotationOp(MI, 4, O, 180, 90); |
16859 | 14 | return; |
16860 | 0 | break; |
16861 | 1.58k | case 5: |
16862 | | // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STGPpre, STPDpr... |
16863 | 1.58k | SStream_concat0(O, "]!"); |
16864 | 1.58k | set_mem_access(MI, false); |
16865 | 1.58k | return; |
16866 | 0 | break; |
16867 | 38 | case 6: |
16868 | | // SM3SS1 |
16869 | 38 | SStream_concat0(O, ".4s"); |
16870 | 38 | arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); |
16871 | 38 | return; |
16872 | 0 | break; |
16873 | 6.13k | } |
16874 | | |
16875 | 426 | switch (MCInst_getOpcode(MI)) { |
16876 | 0 | default: |
16877 | 0 | case AArch64_FCADD_ZPmZ_D: |
16878 | 6 | case AArch64_FCADD_ZPmZ_S: |
16879 | 334 | case AArch64_FCMLA_ZPmZZ_D: |
16880 | 381 | case AArch64_FCMLA_ZPmZZ_S: |
16881 | 396 | case AArch64_FCMLAv4f16_indexed: |
16882 | 406 | case AArch64_FCMLAv4f32_indexed: |
16883 | 426 | case AArch64_FCMLAv8f16_indexed: |
16884 | 426 | switch (MCInst_getOpcode(MI)) { |
16885 | 0 | default: |
16886 | 0 | case AArch64_FCADD_ZPmZ_D: |
16887 | 6 | case AArch64_FCADD_ZPmZ_S: |
16888 | 6 | printComplexRotationOp(MI, 4, O, 180, 90); |
16889 | 6 | break; |
16890 | 328 | case AArch64_FCMLA_ZPmZZ_D: |
16891 | 375 | case AArch64_FCMLA_ZPmZZ_S: |
16892 | 390 | case AArch64_FCMLAv4f16_indexed: |
16893 | 400 | case AArch64_FCMLAv4f32_indexed: |
16894 | 420 | case AArch64_FCMLAv8f16_indexed: |
16895 | 420 | printComplexRotationOp(MI, 5, O, 90, 0); |
16896 | 420 | break; |
16897 | 426 | } |
16898 | 426 | return; |
16899 | 426 | break; |
16900 | 426 | } |
16901 | 426 | } |
16902 | | |
16903 | | |
16904 | | |
16905 | | #ifdef PRINT_ALIAS_INSTR |
16906 | | #undef PRINT_ALIAS_INSTR |
16907 | | |
16908 | | static bool AArch64InstPrinterValidateMCOperand(MCOperand *MCOp, |
16909 | | unsigned PredicateIndex); |
16910 | | static char *printAliasInstr(MCInst *MI, SStream *OS, MCRegisterInfo *MRI) |
16911 | 124k | { |
16912 | 137k | #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) |
16913 | 124k | unsigned int I = 0, OpIdx, PrintMethodIdx; |
16914 | 124k | char *tmpString; |
16915 | 124k | static const PatternsForOpcode OpToPatterns[] = { |
16916 | 124k | {AArch64_ADDSWri, 0, 1 }, |
16917 | 124k | {AArch64_ADDSWrs, 1, 3 }, |
16918 | 124k | {AArch64_ADDSWrx, 4, 3 }, |
16919 | 124k | {AArch64_ADDSXri, 7, 1 }, |
16920 | 124k | {AArch64_ADDSXrs, 8, 3 }, |
16921 | 124k | {AArch64_ADDSXrx, 11, 1 }, |
16922 | 124k | {AArch64_ADDSXrx64, 12, 3 }, |
16923 | 124k | {AArch64_ADDWri, 15, 2 }, |
16924 | 124k | {AArch64_ADDWrs, 17, 1 }, |
16925 | 124k | {AArch64_ADDWrx, 18, 2 }, |
16926 | 124k | {AArch64_ADDXri, 20, 2 }, |
16927 | 124k | {AArch64_ADDXrs, 22, 1 }, |
16928 | 124k | {AArch64_ADDXrx64, 23, 2 }, |
16929 | 124k | {AArch64_ANDSWri, 25, 1 }, |
16930 | 124k | {AArch64_ANDSWrs, 26, 3 }, |
16931 | 124k | {AArch64_ANDSXri, 29, 1 }, |
16932 | 124k | {AArch64_ANDSXrs, 30, 3 }, |
16933 | 124k | {AArch64_ANDS_PPzPP, 33, 1 }, |
16934 | 124k | {AArch64_ANDWrs, 34, 1 }, |
16935 | 124k | {AArch64_ANDXrs, 35, 1 }, |
16936 | 124k | {AArch64_AND_PPzPP, 36, 1 }, |
16937 | 124k | {AArch64_AND_ZI, 37, 3 }, |
16938 | 124k | {AArch64_AUTIA1716, 40, 1 }, |
16939 | 124k | {AArch64_AUTIASP, 41, 1 }, |
16940 | 124k | {AArch64_AUTIAZ, 42, 1 }, |
16941 | 124k | {AArch64_AUTIB1716, 43, 1 }, |
16942 | 124k | {AArch64_AUTIBSP, 44, 1 }, |
16943 | 124k | {AArch64_AUTIBZ, 45, 1 }, |
16944 | 124k | {AArch64_BICSWrs, 46, 1 }, |
16945 | 124k | {AArch64_BICSXrs, 47, 1 }, |
16946 | 124k | {AArch64_BICWrs, 48, 1 }, |
16947 | 124k | {AArch64_BICXrs, 49, 1 }, |
16948 | 124k | {AArch64_CLREX, 50, 1 }, |
16949 | 124k | {AArch64_CNTB_XPiI, 51, 2 }, |
16950 | 124k | {AArch64_CNTD_XPiI, 53, 2 }, |
16951 | 124k | {AArch64_CNTH_XPiI, 55, 2 }, |
16952 | 124k | {AArch64_CNTW_XPiI, 57, 2 }, |
16953 | 124k | {AArch64_CPY_ZPmI_B, 59, 1 }, |
16954 | 124k | {AArch64_CPY_ZPmI_D, 60, 1 }, |
16955 | 124k | {AArch64_CPY_ZPmI_H, 61, 1 }, |
16956 | 124k | {AArch64_CPY_ZPmI_S, 62, 1 }, |
16957 | 124k | {AArch64_CPY_ZPmR_B, 63, 1 }, |
16958 | 124k | {AArch64_CPY_ZPmR_D, 64, 1 }, |
16959 | 124k | {AArch64_CPY_ZPmR_H, 65, 1 }, |
16960 | 124k | {AArch64_CPY_ZPmR_S, 66, 1 }, |
16961 | 124k | {AArch64_CPY_ZPmV_B, 67, 1 }, |
16962 | 124k | {AArch64_CPY_ZPmV_D, 68, 1 }, |
16963 | 124k | {AArch64_CPY_ZPmV_H, 69, 1 }, |
16964 | 124k | {AArch64_CPY_ZPmV_S, 70, 1 }, |
16965 | 124k | {AArch64_CPY_ZPzI_B, 71, 1 }, |
16966 | 124k | {AArch64_CPY_ZPzI_D, 72, 1 }, |
16967 | 124k | {AArch64_CPY_ZPzI_H, 73, 1 }, |
16968 | 124k | {AArch64_CPY_ZPzI_S, 74, 1 }, |
16969 | 124k | {AArch64_CSINCWr, 75, 2 }, |
16970 | 124k | {AArch64_CSINCXr, 77, 2 }, |
16971 | 124k | {AArch64_CSINVWr, 79, 2 }, |
16972 | 124k | {AArch64_CSINVXr, 81, 2 }, |
16973 | 124k | {AArch64_CSNEGWr, 83, 1 }, |
16974 | 124k | {AArch64_CSNEGXr, 84, 1 }, |
16975 | 124k | {AArch64_DCPS1, 85, 1 }, |
16976 | 124k | {AArch64_DCPS2, 86, 1 }, |
16977 | 124k | {AArch64_DCPS3, 87, 1 }, |
16978 | 124k | {AArch64_DECB_XPiI, 88, 2 }, |
16979 | 124k | {AArch64_DECD_XPiI, 90, 2 }, |
16980 | 124k | {AArch64_DECD_ZPiI, 92, 2 }, |
16981 | 124k | {AArch64_DECH_XPiI, 94, 2 }, |
16982 | 124k | {AArch64_DECH_ZPiI, 96, 2 }, |
16983 | 124k | {AArch64_DECW_XPiI, 98, 2 }, |
16984 | 124k | {AArch64_DECW_ZPiI, 100, 2 }, |
16985 | 124k | {AArch64_DSB, 102, 3 }, |
16986 | 124k | {AArch64_DUPM_ZI, 105, 6 }, |
16987 | 124k | {AArch64_DUP_ZI_B, 111, 1 }, |
16988 | 124k | {AArch64_DUP_ZI_D, 112, 2 }, |
16989 | 124k | {AArch64_DUP_ZI_H, 114, 2 }, |
16990 | 124k | {AArch64_DUP_ZI_S, 116, 2 }, |
16991 | 124k | {AArch64_DUP_ZR_B, 118, 1 }, |
16992 | 124k | {AArch64_DUP_ZR_D, 119, 1 }, |
16993 | 124k | {AArch64_DUP_ZR_H, 120, 1 }, |
16994 | 124k | {AArch64_DUP_ZR_S, 121, 1 }, |
16995 | 124k | {AArch64_DUP_ZZI_B, 122, 2 }, |
16996 | 124k | {AArch64_DUP_ZZI_D, 124, 2 }, |
16997 | 124k | {AArch64_DUP_ZZI_H, 126, 2 }, |
16998 | 124k | {AArch64_DUP_ZZI_Q, 128, 2 }, |
16999 | 124k | {AArch64_DUP_ZZI_S, 130, 2 }, |
17000 | 124k | {AArch64_EONWrs, 132, 1 }, |
17001 | 124k | {AArch64_EONXrs, 133, 1 }, |
17002 | 124k | {AArch64_EORS_PPzPP, 134, 1 }, |
17003 | 124k | {AArch64_EORWrs, 135, 1 }, |
17004 | 124k | {AArch64_EORXrs, 136, 1 }, |
17005 | 124k | {AArch64_EOR_PPzPP, 137, 1 }, |
17006 | 124k | {AArch64_EOR_ZI, 138, 3 }, |
17007 | 124k | {AArch64_EXTRACT_ZPMXI_H_B, 141, 1 }, |
17008 | 124k | {AArch64_EXTRACT_ZPMXI_H_D, 142, 1 }, |
17009 | 124k | {AArch64_EXTRACT_ZPMXI_H_H, 143, 1 }, |
17010 | 124k | {AArch64_EXTRACT_ZPMXI_H_Q, 144, 1 }, |
17011 | 124k | {AArch64_EXTRACT_ZPMXI_H_S, 145, 1 }, |
17012 | 124k | {AArch64_EXTRACT_ZPMXI_V_B, 146, 1 }, |
17013 | 124k | {AArch64_EXTRACT_ZPMXI_V_D, 147, 1 }, |
17014 | 124k | {AArch64_EXTRACT_ZPMXI_V_H, 148, 1 }, |
17015 | 124k | {AArch64_EXTRACT_ZPMXI_V_Q, 149, 1 }, |
17016 | 124k | {AArch64_EXTRACT_ZPMXI_V_S, 150, 1 }, |
17017 | 124k | {AArch64_EXTRWrri, 151, 1 }, |
17018 | 124k | {AArch64_EXTRXrri, 152, 1 }, |
17019 | 124k | {AArch64_FCPY_ZPmI_D, 153, 1 }, |
17020 | 124k | {AArch64_FCPY_ZPmI_H, 154, 1 }, |
17021 | 124k | {AArch64_FCPY_ZPmI_S, 155, 1 }, |
17022 | 124k | {AArch64_FDUP_ZI_D, 156, 1 }, |
17023 | 124k | {AArch64_FDUP_ZI_H, 157, 1 }, |
17024 | 124k | {AArch64_FDUP_ZI_S, 158, 1 }, |
17025 | 124k | {AArch64_GLD1B_D_IMM_REAL, 159, 1 }, |
17026 | 124k | {AArch64_GLD1B_S_IMM_REAL, 160, 1 }, |
17027 | 124k | {AArch64_GLD1D_IMM_REAL, 161, 1 }, |
17028 | 124k | {AArch64_GLD1H_D_IMM_REAL, 162, 1 }, |
17029 | 124k | {AArch64_GLD1H_S_IMM_REAL, 163, 1 }, |
17030 | 124k | {AArch64_GLD1SB_D_IMM_REAL, 164, 1 }, |
17031 | 124k | {AArch64_GLD1SB_S_IMM_REAL, 165, 1 }, |
17032 | 124k | {AArch64_GLD1SH_D_IMM_REAL, 166, 1 }, |
17033 | 124k | {AArch64_GLD1SH_S_IMM_REAL, 167, 1 }, |
17034 | 124k | {AArch64_GLD1SW_D_IMM_REAL, 168, 1 }, |
17035 | 124k | {AArch64_GLD1W_D_IMM_REAL, 169, 1 }, |
17036 | 124k | {AArch64_GLD1W_IMM_REAL, 170, 1 }, |
17037 | 124k | {AArch64_GLDFF1B_D_IMM_REAL, 171, 1 }, |
17038 | 124k | {AArch64_GLDFF1B_S_IMM_REAL, 172, 1 }, |
17039 | 124k | {AArch64_GLDFF1D_IMM_REAL, 173, 1 }, |
17040 | 124k | {AArch64_GLDFF1H_D_IMM_REAL, 174, 1 }, |
17041 | 124k | {AArch64_GLDFF1H_S_IMM_REAL, 175, 1 }, |
17042 | 124k | {AArch64_GLDFF1SB_D_IMM_REAL, 176, 1 }, |
17043 | 124k | {AArch64_GLDFF1SB_S_IMM_REAL, 177, 1 }, |
17044 | 124k | {AArch64_GLDFF1SH_D_IMM_REAL, 178, 1 }, |
17045 | 124k | {AArch64_GLDFF1SH_S_IMM_REAL, 179, 1 }, |
17046 | 124k | {AArch64_GLDFF1SW_D_IMM_REAL, 180, 1 }, |
17047 | 124k | {AArch64_GLDFF1W_D_IMM_REAL, 181, 1 }, |
17048 | 124k | {AArch64_GLDFF1W_IMM_REAL, 182, 1 }, |
17049 | 124k | {AArch64_HINT, 183, 12 }, |
17050 | 124k | {AArch64_INCB_XPiI, 195, 2 }, |
17051 | 124k | {AArch64_INCD_XPiI, 197, 2 }, |
17052 | 124k | {AArch64_INCD_ZPiI, 199, 2 }, |
17053 | 124k | {AArch64_INCH_XPiI, 201, 2 }, |
17054 | 124k | {AArch64_INCH_ZPiI, 203, 2 }, |
17055 | 124k | {AArch64_INCW_XPiI, 205, 2 }, |
17056 | 124k | {AArch64_INCW_ZPiI, 207, 2 }, |
17057 | 124k | {AArch64_INSERT_MXIPZ_H_B, 209, 1 }, |
17058 | 124k | {AArch64_INSERT_MXIPZ_H_D, 210, 1 }, |
17059 | 124k | {AArch64_INSERT_MXIPZ_H_H, 211, 1 }, |
17060 | 124k | {AArch64_INSERT_MXIPZ_H_Q, 212, 1 }, |
17061 | 124k | {AArch64_INSERT_MXIPZ_H_S, 213, 1 }, |
17062 | 124k | {AArch64_INSERT_MXIPZ_V_B, 214, 1 }, |
17063 | 124k | {AArch64_INSERT_MXIPZ_V_D, 215, 1 }, |
17064 | 124k | {AArch64_INSERT_MXIPZ_V_H, 216, 1 }, |
17065 | 124k | {AArch64_INSERT_MXIPZ_V_Q, 217, 1 }, |
17066 | 124k | {AArch64_INSERT_MXIPZ_V_S, 218, 1 }, |
17067 | 124k | {AArch64_INSvi16gpr, 219, 1 }, |
17068 | 124k | {AArch64_INSvi16lane, 220, 1 }, |
17069 | 124k | {AArch64_INSvi32gpr, 221, 1 }, |
17070 | 124k | {AArch64_INSvi32lane, 222, 1 }, |
17071 | 124k | {AArch64_INSvi64gpr, 223, 1 }, |
17072 | 124k | {AArch64_INSvi64lane, 224, 1 }, |
17073 | 124k | {AArch64_INSvi8gpr, 225, 1 }, |
17074 | 124k | {AArch64_INSvi8lane, 226, 1 }, |
17075 | 124k | {AArch64_IRG, 227, 1 }, |
17076 | 124k | {AArch64_ISB, 228, 1 }, |
17077 | 124k | {AArch64_LD1B_D_IMM_REAL, 229, 1 }, |
17078 | 124k | {AArch64_LD1B_H_IMM_REAL, 230, 1 }, |
17079 | 124k | {AArch64_LD1B_IMM_REAL, 231, 1 }, |
17080 | 124k | {AArch64_LD1B_S_IMM_REAL, 232, 1 }, |
17081 | 124k | {AArch64_LD1D_IMM_REAL, 233, 1 }, |
17082 | 124k | {AArch64_LD1Fourv16b_POST, 234, 1 }, |
17083 | 124k | {AArch64_LD1Fourv1d_POST, 235, 1 }, |
17084 | 124k | {AArch64_LD1Fourv2d_POST, 236, 1 }, |
17085 | 124k | {AArch64_LD1Fourv2s_POST, 237, 1 }, |
17086 | 124k | {AArch64_LD1Fourv4h_POST, 238, 1 }, |
17087 | 124k | {AArch64_LD1Fourv4s_POST, 239, 1 }, |
17088 | 124k | {AArch64_LD1Fourv8b_POST, 240, 1 }, |
17089 | 124k | {AArch64_LD1Fourv8h_POST, 241, 1 }, |
17090 | 124k | {AArch64_LD1H_D_IMM_REAL, 242, 1 }, |
17091 | 124k | {AArch64_LD1H_IMM_REAL, 243, 1 }, |
17092 | 124k | {AArch64_LD1H_S_IMM_REAL, 244, 1 }, |
17093 | 124k | {AArch64_LD1Onev16b_POST, 245, 1 }, |
17094 | 124k | {AArch64_LD1Onev1d_POST, 246, 1 }, |
17095 | 124k | {AArch64_LD1Onev2d_POST, 247, 1 }, |
17096 | 124k | {AArch64_LD1Onev2s_POST, 248, 1 }, |
17097 | 124k | {AArch64_LD1Onev4h_POST, 249, 1 }, |
17098 | 124k | {AArch64_LD1Onev4s_POST, 250, 1 }, |
17099 | 124k | {AArch64_LD1Onev8b_POST, 251, 1 }, |
17100 | 124k | {AArch64_LD1Onev8h_POST, 252, 1 }, |
17101 | 124k | {AArch64_LD1RB_D_IMM, 253, 1 }, |
17102 | 124k | {AArch64_LD1RB_H_IMM, 254, 1 }, |
17103 | 124k | {AArch64_LD1RB_IMM, 255, 1 }, |
17104 | 124k | {AArch64_LD1RB_S_IMM, 256, 1 }, |
17105 | 124k | {AArch64_LD1RD_IMM, 257, 1 }, |
17106 | 124k | {AArch64_LD1RH_D_IMM, 258, 1 }, |
17107 | 124k | {AArch64_LD1RH_IMM, 259, 1 }, |
17108 | 124k | {AArch64_LD1RH_S_IMM, 260, 1 }, |
17109 | 124k | {AArch64_LD1RO_B_IMM, 261, 1 }, |
17110 | 124k | {AArch64_LD1RO_D_IMM, 262, 1 }, |
17111 | 124k | {AArch64_LD1RO_H_IMM, 263, 1 }, |
17112 | 124k | {AArch64_LD1RO_W_IMM, 264, 1 }, |
17113 | 124k | {AArch64_LD1RQ_B_IMM, 265, 1 }, |
17114 | 124k | {AArch64_LD1RQ_D_IMM, 266, 1 }, |
17115 | 124k | {AArch64_LD1RQ_H_IMM, 267, 1 }, |
17116 | 124k | {AArch64_LD1RQ_W_IMM, 268, 1 }, |
17117 | 124k | {AArch64_LD1RSB_D_IMM, 269, 1 }, |
17118 | 124k | {AArch64_LD1RSB_H_IMM, 270, 1 }, |
17119 | 124k | {AArch64_LD1RSB_S_IMM, 271, 1 }, |
17120 | 124k | {AArch64_LD1RSH_D_IMM, 272, 1 }, |
17121 | 124k | {AArch64_LD1RSH_S_IMM, 273, 1 }, |
17122 | 124k | {AArch64_LD1RSW_IMM, 274, 1 }, |
17123 | 124k | {AArch64_LD1RW_D_IMM, 275, 1 }, |
17124 | 124k | {AArch64_LD1RW_IMM, 276, 1 }, |
17125 | 124k | {AArch64_LD1Rv16b_POST, 277, 1 }, |
17126 | 124k | {AArch64_LD1Rv1d_POST, 278, 1 }, |
17127 | 124k | {AArch64_LD1Rv2d_POST, 279, 1 }, |
17128 | 124k | {AArch64_LD1Rv2s_POST, 280, 1 }, |
17129 | 124k | {AArch64_LD1Rv4h_POST, 281, 1 }, |
17130 | 124k | {AArch64_LD1Rv4s_POST, 282, 1 }, |
17131 | 124k | {AArch64_LD1Rv8b_POST, 283, 1 }, |
17132 | 124k | {AArch64_LD1Rv8h_POST, 284, 1 }, |
17133 | 124k | {AArch64_LD1SB_D_IMM_REAL, 285, 1 }, |
17134 | 124k | {AArch64_LD1SB_H_IMM_REAL, 286, 1 }, |
17135 | 124k | {AArch64_LD1SB_S_IMM_REAL, 287, 1 }, |
17136 | 124k | {AArch64_LD1SH_D_IMM_REAL, 288, 1 }, |
17137 | 124k | {AArch64_LD1SH_S_IMM_REAL, 289, 1 }, |
17138 | 124k | {AArch64_LD1SW_D_IMM_REAL, 290, 1 }, |
17139 | 124k | {AArch64_LD1Threev16b_POST, 291, 1 }, |
17140 | 124k | {AArch64_LD1Threev1d_POST, 292, 1 }, |
17141 | 124k | {AArch64_LD1Threev2d_POST, 293, 1 }, |
17142 | 124k | {AArch64_LD1Threev2s_POST, 294, 1 }, |
17143 | 124k | {AArch64_LD1Threev4h_POST, 295, 1 }, |
17144 | 124k | {AArch64_LD1Threev4s_POST, 296, 1 }, |
17145 | 124k | {AArch64_LD1Threev8b_POST, 297, 1 }, |
17146 | 124k | {AArch64_LD1Threev8h_POST, 298, 1 }, |
17147 | 124k | {AArch64_LD1Twov16b_POST, 299, 1 }, |
17148 | 124k | {AArch64_LD1Twov1d_POST, 300, 1 }, |
17149 | 124k | {AArch64_LD1Twov2d_POST, 301, 1 }, |
17150 | 124k | {AArch64_LD1Twov2s_POST, 302, 1 }, |
17151 | 124k | {AArch64_LD1Twov4h_POST, 303, 1 }, |
17152 | 124k | {AArch64_LD1Twov4s_POST, 304, 1 }, |
17153 | 124k | {AArch64_LD1Twov8b_POST, 305, 1 }, |
17154 | 124k | {AArch64_LD1Twov8h_POST, 306, 1 }, |
17155 | 124k | {AArch64_LD1W_D_IMM_REAL, 307, 1 }, |
17156 | 124k | {AArch64_LD1W_IMM_REAL, 308, 1 }, |
17157 | 124k | {AArch64_LD1_MXIPXX_H_B, 309, 1 }, |
17158 | 124k | {AArch64_LD1_MXIPXX_H_D, 310, 1 }, |
17159 | 124k | {AArch64_LD1_MXIPXX_H_H, 311, 1 }, |
17160 | 124k | {AArch64_LD1_MXIPXX_H_Q, 312, 1 }, |
17161 | 124k | {AArch64_LD1_MXIPXX_H_S, 313, 1 }, |
17162 | 124k | {AArch64_LD1_MXIPXX_V_B, 314, 1 }, |
17163 | 124k | {AArch64_LD1_MXIPXX_V_D, 315, 1 }, |
17164 | 124k | {AArch64_LD1_MXIPXX_V_H, 316, 1 }, |
17165 | 124k | {AArch64_LD1_MXIPXX_V_Q, 317, 1 }, |
17166 | 124k | {AArch64_LD1_MXIPXX_V_S, 318, 1 }, |
17167 | 124k | {AArch64_LD1i16_POST, 319, 1 }, |
17168 | 124k | {AArch64_LD1i32_POST, 320, 1 }, |
17169 | 124k | {AArch64_LD1i64_POST, 321, 1 }, |
17170 | 124k | {AArch64_LD1i8_POST, 322, 1 }, |
17171 | 124k | {AArch64_LD2B_IMM, 323, 1 }, |
17172 | 124k | {AArch64_LD2D_IMM, 324, 1 }, |
17173 | 124k | {AArch64_LD2H_IMM, 325, 1 }, |
17174 | 124k | {AArch64_LD2Rv16b_POST, 326, 1 }, |
17175 | 124k | {AArch64_LD2Rv1d_POST, 327, 1 }, |
17176 | 124k | {AArch64_LD2Rv2d_POST, 328, 1 }, |
17177 | 124k | {AArch64_LD2Rv2s_POST, 329, 1 }, |
17178 | 124k | {AArch64_LD2Rv4h_POST, 330, 1 }, |
17179 | 124k | {AArch64_LD2Rv4s_POST, 331, 1 }, |
17180 | 124k | {AArch64_LD2Rv8b_POST, 332, 1 }, |
17181 | 124k | {AArch64_LD2Rv8h_POST, 333, 1 }, |
17182 | 124k | {AArch64_LD2Twov16b_POST, 334, 1 }, |
17183 | 124k | {AArch64_LD2Twov2d_POST, 335, 1 }, |
17184 | 124k | {AArch64_LD2Twov2s_POST, 336, 1 }, |
17185 | 124k | {AArch64_LD2Twov4h_POST, 337, 1 }, |
17186 | 124k | {AArch64_LD2Twov4s_POST, 338, 1 }, |
17187 | 124k | {AArch64_LD2Twov8b_POST, 339, 1 }, |
17188 | 124k | {AArch64_LD2Twov8h_POST, 340, 1 }, |
17189 | 124k | {AArch64_LD2W_IMM, 341, 1 }, |
17190 | 124k | {AArch64_LD2i16_POST, 342, 1 }, |
17191 | 124k | {AArch64_LD2i32_POST, 343, 1 }, |
17192 | 124k | {AArch64_LD2i64_POST, 344, 1 }, |
17193 | 124k | {AArch64_LD2i8_POST, 345, 1 }, |
17194 | 124k | {AArch64_LD3B_IMM, 346, 1 }, |
17195 | 124k | {AArch64_LD3D_IMM, 347, 1 }, |
17196 | 124k | {AArch64_LD3H_IMM, 348, 1 }, |
17197 | 124k | {AArch64_LD3Rv16b_POST, 349, 1 }, |
17198 | 124k | {AArch64_LD3Rv1d_POST, 350, 1 }, |
17199 | 124k | {AArch64_LD3Rv2d_POST, 351, 1 }, |
17200 | 124k | {AArch64_LD3Rv2s_POST, 352, 1 }, |
17201 | 124k | {AArch64_LD3Rv4h_POST, 353, 1 }, |
17202 | 124k | {AArch64_LD3Rv4s_POST, 354, 1 }, |
17203 | 124k | {AArch64_LD3Rv8b_POST, 355, 1 }, |
17204 | 124k | {AArch64_LD3Rv8h_POST, 356, 1 }, |
17205 | 124k | {AArch64_LD3Threev16b_POST, 357, 1 }, |
17206 | 124k | {AArch64_LD3Threev2d_POST, 358, 1 }, |
17207 | 124k | {AArch64_LD3Threev2s_POST, 359, 1 }, |
17208 | 124k | {AArch64_LD3Threev4h_POST, 360, 1 }, |
17209 | 124k | {AArch64_LD3Threev4s_POST, 361, 1 }, |
17210 | 124k | {AArch64_LD3Threev8b_POST, 362, 1 }, |
17211 | 124k | {AArch64_LD3Threev8h_POST, 363, 1 }, |
17212 | 124k | {AArch64_LD3W_IMM, 364, 1 }, |
17213 | 124k | {AArch64_LD3i16_POST, 365, 1 }, |
17214 | 124k | {AArch64_LD3i32_POST, 366, 1 }, |
17215 | 124k | {AArch64_LD3i64_POST, 367, 1 }, |
17216 | 124k | {AArch64_LD3i8_POST, 368, 1 }, |
17217 | 124k | {AArch64_LD4B_IMM, 369, 1 }, |
17218 | 124k | {AArch64_LD4D_IMM, 370, 1 }, |
17219 | 124k | {AArch64_LD4Fourv16b_POST, 371, 1 }, |
17220 | 124k | {AArch64_LD4Fourv2d_POST, 372, 1 }, |
17221 | 124k | {AArch64_LD4Fourv2s_POST, 373, 1 }, |
17222 | 124k | {AArch64_LD4Fourv4h_POST, 374, 1 }, |
17223 | 124k | {AArch64_LD4Fourv4s_POST, 375, 1 }, |
17224 | 124k | {AArch64_LD4Fourv8b_POST, 376, 1 }, |
17225 | 124k | {AArch64_LD4Fourv8h_POST, 377, 1 }, |
17226 | 124k | {AArch64_LD4H_IMM, 378, 1 }, |
17227 | 124k | {AArch64_LD4Rv16b_POST, 379, 1 }, |
17228 | 124k | {AArch64_LD4Rv1d_POST, 380, 1 }, |
17229 | 124k | {AArch64_LD4Rv2d_POST, 381, 1 }, |
17230 | 124k | {AArch64_LD4Rv2s_POST, 382, 1 }, |
17231 | 124k | {AArch64_LD4Rv4h_POST, 383, 1 }, |
17232 | 124k | {AArch64_LD4Rv4s_POST, 384, 1 }, |
17233 | 124k | {AArch64_LD4Rv8b_POST, 385, 1 }, |
17234 | 124k | {AArch64_LD4Rv8h_POST, 386, 1 }, |
17235 | 124k | {AArch64_LD4W_IMM, 387, 1 }, |
17236 | 124k | {AArch64_LD4i16_POST, 388, 1 }, |
17237 | 124k | {AArch64_LD4i32_POST, 389, 1 }, |
17238 | 124k | {AArch64_LD4i64_POST, 390, 1 }, |
17239 | 124k | {AArch64_LD4i8_POST, 391, 1 }, |
17240 | 124k | {AArch64_LDADDB, 392, 1 }, |
17241 | 124k | {AArch64_LDADDH, 393, 1 }, |
17242 | 124k | {AArch64_LDADDLB, 394, 1 }, |
17243 | 124k | {AArch64_LDADDLH, 395, 1 }, |
17244 | 124k | {AArch64_LDADDLW, 396, 1 }, |
17245 | 124k | {AArch64_LDADDLX, 397, 1 }, |
17246 | 124k | {AArch64_LDADDW, 398, 1 }, |
17247 | 124k | {AArch64_LDADDX, 399, 1 }, |
17248 | 124k | {AArch64_LDAPURBi, 400, 1 }, |
17249 | 124k | {AArch64_LDAPURHi, 401, 1 }, |
17250 | 124k | {AArch64_LDAPURSBWi, 402, 1 }, |
17251 | 124k | {AArch64_LDAPURSBXi, 403, 1 }, |
17252 | 124k | {AArch64_LDAPURSHWi, 404, 1 }, |
17253 | 124k | {AArch64_LDAPURSHXi, 405, 1 }, |
17254 | 124k | {AArch64_LDAPURSWi, 406, 1 }, |
17255 | 124k | {AArch64_LDAPURXi, 407, 1 }, |
17256 | 124k | {AArch64_LDAPURi, 408, 1 }, |
17257 | 124k | {AArch64_LDCLRB, 409, 1 }, |
17258 | 124k | {AArch64_LDCLRH, 410, 1 }, |
17259 | 124k | {AArch64_LDCLRLB, 411, 1 }, |
17260 | 124k | {AArch64_LDCLRLH, 412, 1 }, |
17261 | 124k | {AArch64_LDCLRLW, 413, 1 }, |
17262 | 124k | {AArch64_LDCLRLX, 414, 1 }, |
17263 | 124k | {AArch64_LDCLRW, 415, 1 }, |
17264 | 124k | {AArch64_LDCLRX, 416, 1 }, |
17265 | 124k | {AArch64_LDEORB, 417, 1 }, |
17266 | 124k | {AArch64_LDEORH, 418, 1 }, |
17267 | 124k | {AArch64_LDEORLB, 419, 1 }, |
17268 | 124k | {AArch64_LDEORLH, 420, 1 }, |
17269 | 124k | {AArch64_LDEORLW, 421, 1 }, |
17270 | 124k | {AArch64_LDEORLX, 422, 1 }, |
17271 | 124k | {AArch64_LDEORW, 423, 1 }, |
17272 | 124k | {AArch64_LDEORX, 424, 1 }, |
17273 | 124k | {AArch64_LDFF1B_D_REAL, 425, 1 }, |
17274 | 124k | {AArch64_LDFF1B_H_REAL, 426, 1 }, |
17275 | 124k | {AArch64_LDFF1B_REAL, 427, 1 }, |
17276 | 124k | {AArch64_LDFF1B_S_REAL, 428, 1 }, |
17277 | 124k | {AArch64_LDFF1D_REAL, 429, 1 }, |
17278 | 124k | {AArch64_LDFF1H_D_REAL, 430, 1 }, |
17279 | 124k | {AArch64_LDFF1H_REAL, 431, 1 }, |
17280 | 124k | {AArch64_LDFF1H_S_REAL, 432, 1 }, |
17281 | 124k | {AArch64_LDFF1SB_D_REAL, 433, 1 }, |
17282 | 124k | {AArch64_LDFF1SB_H_REAL, 434, 1 }, |
17283 | 124k | {AArch64_LDFF1SB_S_REAL, 435, 1 }, |
17284 | 124k | {AArch64_LDFF1SH_D_REAL, 436, 1 }, |
17285 | 124k | {AArch64_LDFF1SH_S_REAL, 437, 1 }, |
17286 | 124k | {AArch64_LDFF1SW_D_REAL, 438, 1 }, |
17287 | 124k | {AArch64_LDFF1W_D_REAL, 439, 1 }, |
17288 | 124k | {AArch64_LDFF1W_REAL, 440, 1 }, |
17289 | 124k | {AArch64_LDG, 441, 1 }, |
17290 | 124k | {AArch64_LDNF1B_D_IMM_REAL, 442, 1 }, |
17291 | 124k | {AArch64_LDNF1B_H_IMM_REAL, 443, 1 }, |
17292 | 124k | {AArch64_LDNF1B_IMM_REAL, 444, 1 }, |
17293 | 124k | {AArch64_LDNF1B_S_IMM_REAL, 445, 1 }, |
17294 | 124k | {AArch64_LDNF1D_IMM_REAL, 446, 1 }, |
17295 | 124k | {AArch64_LDNF1H_D_IMM_REAL, 447, 1 }, |
17296 | 124k | {AArch64_LDNF1H_IMM_REAL, 448, 1 }, |
17297 | 124k | {AArch64_LDNF1H_S_IMM_REAL, 449, 1 }, |
17298 | 124k | {AArch64_LDNF1SB_D_IMM_REAL, 450, 1 }, |
17299 | 124k | {AArch64_LDNF1SB_H_IMM_REAL, 451, 1 }, |
17300 | 124k | {AArch64_LDNF1SB_S_IMM_REAL, 452, 1 }, |
17301 | 124k | {AArch64_LDNF1SH_D_IMM_REAL, 453, 1 }, |
17302 | 124k | {AArch64_LDNF1SH_S_IMM_REAL, 454, 1 }, |
17303 | 124k | {AArch64_LDNF1SW_D_IMM_REAL, 455, 1 }, |
17304 | 124k | {AArch64_LDNF1W_D_IMM_REAL, 456, 1 }, |
17305 | 124k | {AArch64_LDNF1W_IMM_REAL, 457, 1 }, |
17306 | 124k | {AArch64_LDNPDi, 458, 1 }, |
17307 | 124k | {AArch64_LDNPQi, 459, 1 }, |
17308 | 124k | {AArch64_LDNPSi, 460, 1 }, |
17309 | 124k | {AArch64_LDNPWi, 461, 1 }, |
17310 | 124k | {AArch64_LDNPXi, 462, 1 }, |
17311 | 124k | {AArch64_LDNT1B_ZRI, 463, 1 }, |
17312 | 124k | {AArch64_LDNT1B_ZZR_D_REAL, 464, 1 }, |
17313 | 124k | {AArch64_LDNT1B_ZZR_S_REAL, 465, 1 }, |
17314 | 124k | {AArch64_LDNT1D_ZRI, 466, 1 }, |
17315 | 124k | {AArch64_LDNT1D_ZZR_D_REAL, 467, 1 }, |
17316 | 124k | {AArch64_LDNT1H_ZRI, 468, 1 }, |
17317 | 124k | {AArch64_LDNT1H_ZZR_D_REAL, 469, 1 }, |
17318 | 124k | {AArch64_LDNT1H_ZZR_S_REAL, 470, 1 }, |
17319 | 124k | {AArch64_LDNT1SB_ZZR_D_REAL, 471, 1 }, |
17320 | 124k | {AArch64_LDNT1SB_ZZR_S_REAL, 472, 1 }, |
17321 | 124k | {AArch64_LDNT1SH_ZZR_D_REAL, 473, 1 }, |
17322 | 124k | {AArch64_LDNT1SH_ZZR_S_REAL, 474, 1 }, |
17323 | 124k | {AArch64_LDNT1SW_ZZR_D_REAL, 475, 1 }, |
17324 | 124k | {AArch64_LDNT1W_ZRI, 476, 1 }, |
17325 | 124k | {AArch64_LDNT1W_ZZR_D_REAL, 477, 1 }, |
17326 | 124k | {AArch64_LDNT1W_ZZR_S_REAL, 478, 1 }, |
17327 | 124k | {AArch64_LDPDi, 479, 1 }, |
17328 | 124k | {AArch64_LDPQi, 480, 1 }, |
17329 | 124k | {AArch64_LDPSWi, 481, 1 }, |
17330 | 124k | {AArch64_LDPSi, 482, 1 }, |
17331 | 124k | {AArch64_LDPWi, 483, 1 }, |
17332 | 124k | {AArch64_LDPXi, 484, 1 }, |
17333 | 124k | {AArch64_LDRAAindexed, 485, 1 }, |
17334 | 124k | {AArch64_LDRABindexed, 486, 1 }, |
17335 | 124k | {AArch64_LDRBBroX, 487, 1 }, |
17336 | 124k | {AArch64_LDRBBui, 488, 1 }, |
17337 | 124k | {AArch64_LDRBroX, 489, 1 }, |
17338 | 124k | {AArch64_LDRBui, 490, 1 }, |
17339 | 124k | {AArch64_LDRDroX, 491, 1 }, |
17340 | 124k | {AArch64_LDRDui, 492, 1 }, |
17341 | 124k | {AArch64_LDRHHroX, 493, 1 }, |
17342 | 124k | {AArch64_LDRHHui, 494, 1 }, |
17343 | 124k | {AArch64_LDRHroX, 495, 1 }, |
17344 | 124k | {AArch64_LDRHui, 496, 1 }, |
17345 | 124k | {AArch64_LDRQroX, 497, 1 }, |
17346 | 124k | {AArch64_LDRQui, 498, 1 }, |
17347 | 124k | {AArch64_LDRSBWroX, 499, 1 }, |
17348 | 124k | {AArch64_LDRSBWui, 500, 1 }, |
17349 | 124k | {AArch64_LDRSBXroX, 501, 1 }, |
17350 | 124k | {AArch64_LDRSBXui, 502, 1 }, |
17351 | 124k | {AArch64_LDRSHWroX, 503, 1 }, |
17352 | 124k | {AArch64_LDRSHWui, 504, 1 }, |
17353 | 124k | {AArch64_LDRSHXroX, 505, 1 }, |
17354 | 124k | {AArch64_LDRSHXui, 506, 1 }, |
17355 | 124k | {AArch64_LDRSWroX, 507, 1 }, |
17356 | 124k | {AArch64_LDRSWui, 508, 1 }, |
17357 | 124k | {AArch64_LDRSroX, 509, 1 }, |
17358 | 124k | {AArch64_LDRSui, 510, 1 }, |
17359 | 124k | {AArch64_LDRWroX, 511, 1 }, |
17360 | 124k | {AArch64_LDRWui, 512, 1 }, |
17361 | 124k | {AArch64_LDRXroX, 513, 1 }, |
17362 | 124k | {AArch64_LDRXui, 514, 1 }, |
17363 | 124k | {AArch64_LDR_PXI, 515, 1 }, |
17364 | 124k | {AArch64_LDR_ZA, 516, 1 }, |
17365 | 124k | {AArch64_LDR_ZXI, 517, 1 }, |
17366 | 124k | {AArch64_LDSETB, 518, 1 }, |
17367 | 124k | {AArch64_LDSETH, 519, 1 }, |
17368 | 124k | {AArch64_LDSETLB, 520, 1 }, |
17369 | 124k | {AArch64_LDSETLH, 521, 1 }, |
17370 | 124k | {AArch64_LDSETLW, 522, 1 }, |
17371 | 124k | {AArch64_LDSETLX, 523, 1 }, |
17372 | 124k | {AArch64_LDSETW, 524, 1 }, |
17373 | 124k | {AArch64_LDSETX, 525, 1 }, |
17374 | 124k | {AArch64_LDSMAXB, 526, 1 }, |
17375 | 124k | {AArch64_LDSMAXH, 527, 1 }, |
17376 | 124k | {AArch64_LDSMAXLB, 528, 1 }, |
17377 | 124k | {AArch64_LDSMAXLH, 529, 1 }, |
17378 | 124k | {AArch64_LDSMAXLW, 530, 1 }, |
17379 | 124k | {AArch64_LDSMAXLX, 531, 1 }, |
17380 | 124k | {AArch64_LDSMAXW, 532, 1 }, |
17381 | 124k | {AArch64_LDSMAXX, 533, 1 }, |
17382 | 124k | {AArch64_LDSMINB, 534, 1 }, |
17383 | 124k | {AArch64_LDSMINH, 535, 1 }, |
17384 | 124k | {AArch64_LDSMINLB, 536, 1 }, |
17385 | 124k | {AArch64_LDSMINLH, 537, 1 }, |
17386 | 124k | {AArch64_LDSMINLW, 538, 1 }, |
17387 | 124k | {AArch64_LDSMINLX, 539, 1 }, |
17388 | 124k | {AArch64_LDSMINW, 540, 1 }, |
17389 | 124k | {AArch64_LDSMINX, 541, 1 }, |
17390 | 124k | {AArch64_LDTRBi, 542, 1 }, |
17391 | 124k | {AArch64_LDTRHi, 543, 1 }, |
17392 | 124k | {AArch64_LDTRSBWi, 544, 1 }, |
17393 | 124k | {AArch64_LDTRSBXi, 545, 1 }, |
17394 | 124k | {AArch64_LDTRSHWi, 546, 1 }, |
17395 | 124k | {AArch64_LDTRSHXi, 547, 1 }, |
17396 | 124k | {AArch64_LDTRSWi, 548, 1 }, |
17397 | 124k | {AArch64_LDTRWi, 549, 1 }, |
17398 | 124k | {AArch64_LDTRXi, 550, 1 }, |
17399 | 124k | {AArch64_LDUMAXB, 551, 1 }, |
17400 | 124k | {AArch64_LDUMAXH, 552, 1 }, |
17401 | 124k | {AArch64_LDUMAXLB, 553, 1 }, |
17402 | 124k | {AArch64_LDUMAXLH, 554, 1 }, |
17403 | 124k | {AArch64_LDUMAXLW, 555, 1 }, |
17404 | 124k | {AArch64_LDUMAXLX, 556, 1 }, |
17405 | 124k | {AArch64_LDUMAXW, 557, 1 }, |
17406 | 124k | {AArch64_LDUMAXX, 558, 1 }, |
17407 | 124k | {AArch64_LDUMINB, 559, 1 }, |
17408 | 124k | {AArch64_LDUMINH, 560, 1 }, |
17409 | 124k | {AArch64_LDUMINLB, 561, 1 }, |
17410 | 124k | {AArch64_LDUMINLH, 562, 1 }, |
17411 | 124k | {AArch64_LDUMINLW, 563, 1 }, |
17412 | 124k | {AArch64_LDUMINLX, 564, 1 }, |
17413 | 124k | {AArch64_LDUMINW, 565, 1 }, |
17414 | 124k | {AArch64_LDUMINX, 566, 1 }, |
17415 | 124k | {AArch64_LDURBBi, 567, 1 }, |
17416 | 124k | {AArch64_LDURBi, 568, 1 }, |
17417 | 124k | {AArch64_LDURDi, 569, 1 }, |
17418 | 124k | {AArch64_LDURHHi, 570, 1 }, |
17419 | 124k | {AArch64_LDURHi, 571, 1 }, |
17420 | 124k | {AArch64_LDURQi, 572, 1 }, |
17421 | 124k | {AArch64_LDURSBWi, 573, 1 }, |
17422 | 124k | {AArch64_LDURSBXi, 574, 1 }, |
17423 | 124k | {AArch64_LDURSHWi, 575, 1 }, |
17424 | 124k | {AArch64_LDURSHXi, 576, 1 }, |
17425 | 124k | {AArch64_LDURSWi, 577, 1 }, |
17426 | 124k | {AArch64_LDURSi, 578, 1 }, |
17427 | 124k | {AArch64_LDURWi, 579, 1 }, |
17428 | 124k | {AArch64_LDURXi, 580, 1 }, |
17429 | 124k | {AArch64_MADDWrrr, 581, 1 }, |
17430 | 124k | {AArch64_MADDXrrr, 582, 1 }, |
17431 | 124k | {AArch64_MSRpstatesvcrImm1, 583, 6 }, |
17432 | 124k | {AArch64_MSUBWrrr, 589, 1 }, |
17433 | 124k | {AArch64_MSUBXrrr, 590, 1 }, |
17434 | 124k | {AArch64_NOTv16i8, 591, 1 }, |
17435 | 124k | {AArch64_NOTv8i8, 592, 1 }, |
17436 | 124k | {AArch64_ORNWrs, 593, 3 }, |
17437 | 124k | {AArch64_ORNXrs, 596, 3 }, |
17438 | 124k | {AArch64_ORRS_PPzPP, 599, 1 }, |
17439 | 124k | {AArch64_ORRWrs, 600, 2 }, |
17440 | 124k | {AArch64_ORRXrs, 602, 2 }, |
17441 | 124k | {AArch64_ORR_PPzPP, 604, 1 }, |
17442 | 124k | {AArch64_ORR_ZI, 605, 3 }, |
17443 | 124k | {AArch64_ORR_ZZZ, 608, 1 }, |
17444 | 124k | {AArch64_ORRv16i8, 609, 1 }, |
17445 | 124k | {AArch64_ORRv8i8, 610, 1 }, |
17446 | 124k | {AArch64_PACIA1716, 611, 1 }, |
17447 | 124k | {AArch64_PACIASP, 612, 1 }, |
17448 | 124k | {AArch64_PACIAZ, 613, 1 }, |
17449 | 124k | {AArch64_PACIB1716, 614, 1 }, |
17450 | 124k | {AArch64_PACIBSP, 615, 1 }, |
17451 | 124k | {AArch64_PACIBZ, 616, 1 }, |
17452 | 124k | {AArch64_PRFB_D_PZI, 617, 1 }, |
17453 | 124k | {AArch64_PRFB_PRI, 618, 1 }, |
17454 | 124k | {AArch64_PRFB_S_PZI, 619, 1 }, |
17455 | 124k | {AArch64_PRFD_D_PZI, 620, 1 }, |
17456 | 124k | {AArch64_PRFD_PRI, 621, 1 }, |
17457 | 124k | {AArch64_PRFD_S_PZI, 622, 1 }, |
17458 | 124k | {AArch64_PRFH_D_PZI, 623, 1 }, |
17459 | 124k | {AArch64_PRFH_PRI, 624, 1 }, |
17460 | 124k | {AArch64_PRFH_S_PZI, 625, 1 }, |
17461 | 124k | {AArch64_PRFMroX, 626, 1 }, |
17462 | 124k | {AArch64_PRFMui, 627, 1 }, |
17463 | 124k | {AArch64_PRFUMi, 628, 1 }, |
17464 | 124k | {AArch64_PRFW_D_PZI, 629, 1 }, |
17465 | 124k | {AArch64_PRFW_PRI, 630, 1 }, |
17466 | 124k | {AArch64_PRFW_S_PZI, 631, 1 }, |
17467 | 124k | {AArch64_PTRUES_B, 632, 1 }, |
17468 | 124k | {AArch64_PTRUES_D, 633, 1 }, |
17469 | 124k | {AArch64_PTRUES_H, 634, 1 }, |
17470 | 124k | {AArch64_PTRUES_S, 635, 1 }, |
17471 | 124k | {AArch64_PTRUE_B, 636, 1 }, |
17472 | 124k | {AArch64_PTRUE_D, 637, 1 }, |
17473 | 124k | {AArch64_PTRUE_H, 638, 1 }, |
17474 | 124k | {AArch64_PTRUE_S, 639, 1 }, |
17475 | 124k | {AArch64_RET, 640, 1 }, |
17476 | 124k | {AArch64_SBCSWr, 641, 1 }, |
17477 | 124k | {AArch64_SBCSXr, 642, 1 }, |
17478 | 124k | {AArch64_SBCWr, 643, 1 }, |
17479 | 124k | {AArch64_SBCXr, 644, 1 }, |
17480 | 124k | {AArch64_SBFMWri, 645, 3 }, |
17481 | 124k | {AArch64_SBFMXri, 648, 4 }, |
17482 | 124k | {AArch64_SEL_PPPP, 652, 1 }, |
17483 | 124k | {AArch64_SEL_ZPZZ_B, 653, 1 }, |
17484 | 124k | {AArch64_SEL_ZPZZ_D, 654, 1 }, |
17485 | 124k | {AArch64_SEL_ZPZZ_H, 655, 1 }, |
17486 | 124k | {AArch64_SEL_ZPZZ_S, 656, 1 }, |
17487 | 124k | {AArch64_SMADDLrrr, 657, 1 }, |
17488 | 124k | {AArch64_SMSUBLrrr, 658, 1 }, |
17489 | 124k | {AArch64_SQDECB_XPiI, 659, 2 }, |
17490 | 124k | {AArch64_SQDECB_XPiWdI, 661, 2 }, |
17491 | 124k | {AArch64_SQDECD_XPiI, 663, 2 }, |
17492 | 124k | {AArch64_SQDECD_XPiWdI, 665, 2 }, |
17493 | 124k | {AArch64_SQDECD_ZPiI, 667, 2 }, |
17494 | 124k | {AArch64_SQDECH_XPiI, 669, 2 }, |
17495 | 124k | {AArch64_SQDECH_XPiWdI, 671, 2 }, |
17496 | 124k | {AArch64_SQDECH_ZPiI, 673, 2 }, |
17497 | 124k | {AArch64_SQDECW_XPiI, 675, 2 }, |
17498 | 124k | {AArch64_SQDECW_XPiWdI, 677, 2 }, |
17499 | 124k | {AArch64_SQDECW_ZPiI, 679, 2 }, |
17500 | 124k | {AArch64_SQINCB_XPiI, 681, 2 }, |
17501 | 124k | {AArch64_SQINCB_XPiWdI, 683, 2 }, |
17502 | 124k | {AArch64_SQINCD_XPiI, 685, 2 }, |
17503 | 124k | {AArch64_SQINCD_XPiWdI, 687, 2 }, |
17504 | 124k | {AArch64_SQINCD_ZPiI, 689, 2 }, |
17505 | 124k | {AArch64_SQINCH_XPiI, 691, 2 }, |
17506 | 124k | {AArch64_SQINCH_XPiWdI, 693, 2 }, |
17507 | 124k | {AArch64_SQINCH_ZPiI, 695, 2 }, |
17508 | 124k | {AArch64_SQINCW_XPiI, 697, 2 }, |
17509 | 124k | {AArch64_SQINCW_XPiWdI, 699, 2 }, |
17510 | 124k | {AArch64_SQINCW_ZPiI, 701, 2 }, |
17511 | 124k | {AArch64_SST1B_D_IMM, 703, 1 }, |
17512 | 124k | {AArch64_SST1B_S_IMM, 704, 1 }, |
17513 | 124k | {AArch64_SST1D_IMM, 705, 1 }, |
17514 | 124k | {AArch64_SST1H_D_IMM, 706, 1 }, |
17515 | 124k | {AArch64_SST1H_S_IMM, 707, 1 }, |
17516 | 124k | {AArch64_SST1W_D_IMM, 708, 1 }, |
17517 | 124k | {AArch64_SST1W_IMM, 709, 1 }, |
17518 | 124k | {AArch64_ST1B_D_IMM, 710, 1 }, |
17519 | 124k | {AArch64_ST1B_H_IMM, 711, 1 }, |
17520 | 124k | {AArch64_ST1B_IMM, 712, 1 }, |
17521 | 124k | {AArch64_ST1B_S_IMM, 713, 1 }, |
17522 | 124k | {AArch64_ST1D_IMM, 714, 1 }, |
17523 | 124k | {AArch64_ST1Fourv16b_POST, 715, 1 }, |
17524 | 124k | {AArch64_ST1Fourv1d_POST, 716, 1 }, |
17525 | 124k | {AArch64_ST1Fourv2d_POST, 717, 1 }, |
17526 | 124k | {AArch64_ST1Fourv2s_POST, 718, 1 }, |
17527 | 124k | {AArch64_ST1Fourv4h_POST, 719, 1 }, |
17528 | 124k | {AArch64_ST1Fourv4s_POST, 720, 1 }, |
17529 | 124k | {AArch64_ST1Fourv8b_POST, 721, 1 }, |
17530 | 124k | {AArch64_ST1Fourv8h_POST, 722, 1 }, |
17531 | 124k | {AArch64_ST1H_D_IMM, 723, 1 }, |
17532 | 124k | {AArch64_ST1H_IMM, 724, 1 }, |
17533 | 124k | {AArch64_ST1H_S_IMM, 725, 1 }, |
17534 | 124k | {AArch64_ST1Onev16b_POST, 726, 1 }, |
17535 | 124k | {AArch64_ST1Onev1d_POST, 727, 1 }, |
17536 | 124k | {AArch64_ST1Onev2d_POST, 728, 1 }, |
17537 | 124k | {AArch64_ST1Onev2s_POST, 729, 1 }, |
17538 | 124k | {AArch64_ST1Onev4h_POST, 730, 1 }, |
17539 | 124k | {AArch64_ST1Onev4s_POST, 731, 1 }, |
17540 | 124k | {AArch64_ST1Onev8b_POST, 732, 1 }, |
17541 | 124k | {AArch64_ST1Onev8h_POST, 733, 1 }, |
17542 | 124k | {AArch64_ST1Threev16b_POST, 734, 1 }, |
17543 | 124k | {AArch64_ST1Threev1d_POST, 735, 1 }, |
17544 | 124k | {AArch64_ST1Threev2d_POST, 736, 1 }, |
17545 | 124k | {AArch64_ST1Threev2s_POST, 737, 1 }, |
17546 | 124k | {AArch64_ST1Threev4h_POST, 738, 1 }, |
17547 | 124k | {AArch64_ST1Threev4s_POST, 739, 1 }, |
17548 | 124k | {AArch64_ST1Threev8b_POST, 740, 1 }, |
17549 | 124k | {AArch64_ST1Threev8h_POST, 741, 1 }, |
17550 | 124k | {AArch64_ST1Twov16b_POST, 742, 1 }, |
17551 | 124k | {AArch64_ST1Twov1d_POST, 743, 1 }, |
17552 | 124k | {AArch64_ST1Twov2d_POST, 744, 1 }, |
17553 | 124k | {AArch64_ST1Twov2s_POST, 745, 1 }, |
17554 | 124k | {AArch64_ST1Twov4h_POST, 746, 1 }, |
17555 | 124k | {AArch64_ST1Twov4s_POST, 747, 1 }, |
17556 | 124k | {AArch64_ST1Twov8b_POST, 748, 1 }, |
17557 | 124k | {AArch64_ST1Twov8h_POST, 749, 1 }, |
17558 | 124k | {AArch64_ST1W_D_IMM, 750, 1 }, |
17559 | 124k | {AArch64_ST1W_IMM, 751, 1 }, |
17560 | 124k | {AArch64_ST1_MXIPXX_H_B, 752, 1 }, |
17561 | 124k | {AArch64_ST1_MXIPXX_H_D, 753, 1 }, |
17562 | 124k | {AArch64_ST1_MXIPXX_H_H, 754, 1 }, |
17563 | 124k | {AArch64_ST1_MXIPXX_H_Q, 755, 1 }, |
17564 | 124k | {AArch64_ST1_MXIPXX_H_S, 756, 1 }, |
17565 | 124k | {AArch64_ST1_MXIPXX_V_B, 757, 1 }, |
17566 | 124k | {AArch64_ST1_MXIPXX_V_D, 758, 1 }, |
17567 | 124k | {AArch64_ST1_MXIPXX_V_H, 759, 1 }, |
17568 | 124k | {AArch64_ST1_MXIPXX_V_Q, 760, 1 }, |
17569 | 124k | {AArch64_ST1_MXIPXX_V_S, 761, 1 }, |
17570 | 124k | {AArch64_ST1i16_POST, 762, 1 }, |
17571 | 124k | {AArch64_ST1i32_POST, 763, 1 }, |
17572 | 124k | {AArch64_ST1i64_POST, 764, 1 }, |
17573 | 124k | {AArch64_ST1i8_POST, 765, 1 }, |
17574 | 124k | {AArch64_ST2B_IMM, 766, 1 }, |
17575 | 124k | {AArch64_ST2D_IMM, 767, 1 }, |
17576 | 124k | {AArch64_ST2GOffset, 768, 1 }, |
17577 | 124k | {AArch64_ST2H_IMM, 769, 1 }, |
17578 | 124k | {AArch64_ST2Twov16b_POST, 770, 1 }, |
17579 | 124k | {AArch64_ST2Twov2d_POST, 771, 1 }, |
17580 | 124k | {AArch64_ST2Twov2s_POST, 772, 1 }, |
17581 | 124k | {AArch64_ST2Twov4h_POST, 773, 1 }, |
17582 | 124k | {AArch64_ST2Twov4s_POST, 774, 1 }, |
17583 | 124k | {AArch64_ST2Twov8b_POST, 775, 1 }, |
17584 | 124k | {AArch64_ST2Twov8h_POST, 776, 1 }, |
17585 | 124k | {AArch64_ST2W_IMM, 777, 1 }, |
17586 | 124k | {AArch64_ST2i16_POST, 778, 1 }, |
17587 | 124k | {AArch64_ST2i32_POST, 779, 1 }, |
17588 | 124k | {AArch64_ST2i64_POST, 780, 1 }, |
17589 | 124k | {AArch64_ST2i8_POST, 781, 1 }, |
17590 | 124k | {AArch64_ST3B_IMM, 782, 1 }, |
17591 | 124k | {AArch64_ST3D_IMM, 783, 1 }, |
17592 | 124k | {AArch64_ST3H_IMM, 784, 1 }, |
17593 | 124k | {AArch64_ST3Threev16b_POST, 785, 1 }, |
17594 | 124k | {AArch64_ST3Threev2d_POST, 786, 1 }, |
17595 | 124k | {AArch64_ST3Threev2s_POST, 787, 1 }, |
17596 | 124k | {AArch64_ST3Threev4h_POST, 788, 1 }, |
17597 | 124k | {AArch64_ST3Threev4s_POST, 789, 1 }, |
17598 | 124k | {AArch64_ST3Threev8b_POST, 790, 1 }, |
17599 | 124k | {AArch64_ST3Threev8h_POST, 791, 1 }, |
17600 | 124k | {AArch64_ST3W_IMM, 792, 1 }, |
17601 | 124k | {AArch64_ST3i16_POST, 793, 1 }, |
17602 | 124k | {AArch64_ST3i32_POST, 794, 1 }, |
17603 | 124k | {AArch64_ST3i64_POST, 795, 1 }, |
17604 | 124k | {AArch64_ST3i8_POST, 796, 1 }, |
17605 | 124k | {AArch64_ST4B_IMM, 797, 1 }, |
17606 | 124k | {AArch64_ST4D_IMM, 798, 1 }, |
17607 | 124k | {AArch64_ST4Fourv16b_POST, 799, 1 }, |
17608 | 124k | {AArch64_ST4Fourv2d_POST, 800, 1 }, |
17609 | 124k | {AArch64_ST4Fourv2s_POST, 801, 1 }, |
17610 | 124k | {AArch64_ST4Fourv4h_POST, 802, 1 }, |
17611 | 124k | {AArch64_ST4Fourv4s_POST, 803, 1 }, |
17612 | 124k | {AArch64_ST4Fourv8b_POST, 804, 1 }, |
17613 | 124k | {AArch64_ST4Fourv8h_POST, 805, 1 }, |
17614 | 124k | {AArch64_ST4H_IMM, 806, 1 }, |
17615 | 124k | {AArch64_ST4W_IMM, 807, 1 }, |
17616 | 124k | {AArch64_ST4i16_POST, 808, 1 }, |
17617 | 124k | {AArch64_ST4i32_POST, 809, 1 }, |
17618 | 124k | {AArch64_ST4i64_POST, 810, 1 }, |
17619 | 124k | {AArch64_ST4i8_POST, 811, 1 }, |
17620 | 124k | {AArch64_STGOffset, 812, 1 }, |
17621 | 124k | {AArch64_STGPi, 813, 1 }, |
17622 | 124k | {AArch64_STLURBi, 814, 1 }, |
17623 | 124k | {AArch64_STLURHi, 815, 1 }, |
17624 | 124k | {AArch64_STLURWi, 816, 1 }, |
17625 | 124k | {AArch64_STLURXi, 817, 1 }, |
17626 | 124k | {AArch64_STNPDi, 818, 1 }, |
17627 | 124k | {AArch64_STNPQi, 819, 1 }, |
17628 | 124k | {AArch64_STNPSi, 820, 1 }, |
17629 | 124k | {AArch64_STNPWi, 821, 1 }, |
17630 | 124k | {AArch64_STNPXi, 822, 1 }, |
17631 | 124k | {AArch64_STNT1B_ZRI, 823, 1 }, |
17632 | 124k | {AArch64_STNT1B_ZZR_D_REAL, 824, 1 }, |
17633 | 124k | {AArch64_STNT1B_ZZR_S_REAL, 825, 1 }, |
17634 | 124k | {AArch64_STNT1D_ZRI, 826, 1 }, |
17635 | 124k | {AArch64_STNT1D_ZZR_D_REAL, 827, 1 }, |
17636 | 124k | {AArch64_STNT1H_ZRI, 828, 1 }, |
17637 | 124k | {AArch64_STNT1H_ZZR_D_REAL, 829, 1 }, |
17638 | 124k | {AArch64_STNT1H_ZZR_S_REAL, 830, 1 }, |
17639 | 124k | {AArch64_STNT1W_ZRI, 831, 1 }, |
17640 | 124k | {AArch64_STNT1W_ZZR_D_REAL, 832, 1 }, |
17641 | 124k | {AArch64_STNT1W_ZZR_S_REAL, 833, 1 }, |
17642 | 124k | {AArch64_STPDi, 834, 1 }, |
17643 | 124k | {AArch64_STPQi, 835, 1 }, |
17644 | 124k | {AArch64_STPSi, 836, 1 }, |
17645 | 124k | {AArch64_STPWi, 837, 1 }, |
17646 | 124k | {AArch64_STPXi, 838, 1 }, |
17647 | 124k | {AArch64_STRBBroX, 839, 1 }, |
17648 | 124k | {AArch64_STRBBui, 840, 1 }, |
17649 | 124k | {AArch64_STRBroX, 841, 1 }, |
17650 | 124k | {AArch64_STRBui, 842, 1 }, |
17651 | 124k | {AArch64_STRDroX, 843, 1 }, |
17652 | 124k | {AArch64_STRDui, 844, 1 }, |
17653 | 124k | {AArch64_STRHHroX, 845, 1 }, |
17654 | 124k | {AArch64_STRHHui, 846, 1 }, |
17655 | 124k | {AArch64_STRHroX, 847, 1 }, |
17656 | 124k | {AArch64_STRHui, 848, 1 }, |
17657 | 124k | {AArch64_STRQroX, 849, 1 }, |
17658 | 124k | {AArch64_STRQui, 850, 1 }, |
17659 | 124k | {AArch64_STRSroX, 851, 1 }, |
17660 | 124k | {AArch64_STRSui, 852, 1 }, |
17661 | 124k | {AArch64_STRWroX, 853, 1 }, |
17662 | 124k | {AArch64_STRWui, 854, 1 }, |
17663 | 124k | {AArch64_STRXroX, 855, 1 }, |
17664 | 124k | {AArch64_STRXui, 856, 1 }, |
17665 | 124k | {AArch64_STR_PXI, 857, 1 }, |
17666 | 124k | {AArch64_STR_ZA, 858, 1 }, |
17667 | 124k | {AArch64_STR_ZXI, 859, 1 }, |
17668 | 124k | {AArch64_STTRBi, 860, 1 }, |
17669 | 124k | {AArch64_STTRHi, 861, 1 }, |
17670 | 124k | {AArch64_STTRWi, 862, 1 }, |
17671 | 124k | {AArch64_STTRXi, 863, 1 }, |
17672 | 124k | {AArch64_STURBBi, 864, 1 }, |
17673 | 124k | {AArch64_STURBi, 865, 1 }, |
17674 | 124k | {AArch64_STURDi, 866, 1 }, |
17675 | 124k | {AArch64_STURHHi, 867, 1 }, |
17676 | 124k | {AArch64_STURHi, 868, 1 }, |
17677 | 124k | {AArch64_STURQi, 869, 1 }, |
17678 | 124k | {AArch64_STURSi, 870, 1 }, |
17679 | 124k | {AArch64_STURWi, 871, 1 }, |
17680 | 124k | {AArch64_STURXi, 872, 1 }, |
17681 | 124k | {AArch64_STZ2GOffset, 873, 1 }, |
17682 | 124k | {AArch64_STZGOffset, 874, 1 }, |
17683 | 124k | {AArch64_SUBSWri, 875, 1 }, |
17684 | 124k | {AArch64_SUBSWrs, 876, 5 }, |
17685 | 124k | {AArch64_SUBSWrx, 881, 3 }, |
17686 | 124k | {AArch64_SUBSXri, 884, 1 }, |
17687 | 124k | {AArch64_SUBSXrs, 885, 5 }, |
17688 | 124k | {AArch64_SUBSXrx, 890, 1 }, |
17689 | 124k | {AArch64_SUBSXrx64, 891, 3 }, |
17690 | 124k | {AArch64_SUBWrs, 894, 3 }, |
17691 | 124k | {AArch64_SUBWrx, 897, 2 }, |
17692 | 124k | {AArch64_SUBXrs, 899, 3 }, |
17693 | 124k | {AArch64_SUBXrx64, 902, 2 }, |
17694 | 124k | {AArch64_SYSxt, 904, 1 }, |
17695 | 124k | {AArch64_UBFMWri, 905, 3 }, |
17696 | 124k | {AArch64_UBFMXri, 908, 4 }, |
17697 | 124k | {AArch64_UMADDLrrr, 912, 1 }, |
17698 | 124k | {AArch64_UMOVvi32, 913, 1 }, |
17699 | 124k | {AArch64_UMOVvi32_idx0, 914, 1 }, |
17700 | 124k | {AArch64_UMOVvi64, 915, 1 }, |
17701 | 124k | {AArch64_UMOVvi64_idx0, 916, 1 }, |
17702 | 124k | {AArch64_UMSUBLrrr, 917, 1 }, |
17703 | 124k | {AArch64_UQDECB_WPiI, 918, 2 }, |
17704 | 124k | {AArch64_UQDECB_XPiI, 920, 2 }, |
17705 | 124k | {AArch64_UQDECD_WPiI, 922, 2 }, |
17706 | 124k | {AArch64_UQDECD_XPiI, 924, 2 }, |
17707 | 124k | {AArch64_UQDECD_ZPiI, 926, 2 }, |
17708 | 124k | {AArch64_UQDECH_WPiI, 928, 2 }, |
17709 | 124k | {AArch64_UQDECH_XPiI, 930, 2 }, |
17710 | 124k | {AArch64_UQDECH_ZPiI, 932, 2 }, |
17711 | 124k | {AArch64_UQDECW_WPiI, 934, 2 }, |
17712 | 124k | {AArch64_UQDECW_XPiI, 936, 2 }, |
17713 | 124k | {AArch64_UQDECW_ZPiI, 938, 2 }, |
17714 | 124k | {AArch64_UQINCB_WPiI, 940, 2 }, |
17715 | 124k | {AArch64_UQINCB_XPiI, 942, 2 }, |
17716 | 124k | {AArch64_UQINCD_WPiI, 944, 2 }, |
17717 | 124k | {AArch64_UQINCD_XPiI, 946, 2 }, |
17718 | 124k | {AArch64_UQINCD_ZPiI, 948, 2 }, |
17719 | 124k | {AArch64_UQINCH_WPiI, 950, 2 }, |
17720 | 124k | {AArch64_UQINCH_XPiI, 952, 2 }, |
17721 | 124k | {AArch64_UQINCH_ZPiI, 954, 2 }, |
17722 | 124k | {AArch64_UQINCW_WPiI, 956, 2 }, |
17723 | 124k | {AArch64_UQINCW_XPiI, 958, 2 }, |
17724 | 124k | {AArch64_UQINCW_ZPiI, 960, 2 }, |
17725 | 124k | {AArch64_XPACLRI, 962, 1 }, |
17726 | 124k | {AArch64_ZERO_M, 963, 15 }, |
17727 | 124k | }; |
17728 | | |
17729 | 124k | static const AliasPattern Patterns[] = { |
17730 | | // AArch64_ADDSWri - 0 |
17731 | 124k | {0, 0, 4, 2 }, |
17732 | | // AArch64_ADDSWrs - 1 |
17733 | 124k | {13, 2, 4, 4 }, |
17734 | 124k | {24, 6, 4, 3 }, |
17735 | 124k | {39, 9, 4, 4 }, |
17736 | | // AArch64_ADDSWrx - 4 |
17737 | 124k | {13, 13, 4, 4 }, |
17738 | 124k | {55, 17, 4, 3 }, |
17739 | 124k | {39, 20, 4, 4 }, |
17740 | | // AArch64_ADDSXri - 7 |
17741 | 124k | {0, 24, 4, 2 }, |
17742 | | // AArch64_ADDSXrs - 8 |
17743 | 124k | {13, 26, 4, 4 }, |
17744 | 124k | {24, 30, 4, 3 }, |
17745 | 124k | {39, 33, 4, 4 }, |
17746 | | // AArch64_ADDSXrx - 11 |
17747 | 124k | {55, 37, 4, 3 }, |
17748 | | // AArch64_ADDSXrx64 - 12 |
17749 | 124k | {13, 40, 4, 4 }, |
17750 | 124k | {55, 44, 4, 3 }, |
17751 | 124k | {39, 47, 4, 4 }, |
17752 | | // AArch64_ADDWri - 15 |
17753 | 124k | {70, 51, 4, 4 }, |
17754 | 124k | {70, 55, 4, 4 }, |
17755 | | // AArch64_ADDWrs - 17 |
17756 | 124k | {81, 59, 4, 4 }, |
17757 | | // AArch64_ADDWrx - 18 |
17758 | 124k | {81, 63, 4, 4 }, |
17759 | 124k | {81, 67, 4, 4 }, |
17760 | | // AArch64_ADDXri - 20 |
17761 | 124k | {70, 71, 4, 4 }, |
17762 | 124k | {70, 75, 4, 4 }, |
17763 | | // AArch64_ADDXrs - 22 |
17764 | 124k | {81, 79, 4, 4 }, |
17765 | | // AArch64_ADDXrx64 - 23 |
17766 | 124k | {81, 83, 4, 4 }, |
17767 | 124k | {81, 87, 4, 4 }, |
17768 | | // AArch64_ANDSWri - 25 |
17769 | 124k | {96, 91, 3, 2 }, |
17770 | | // AArch64_ANDSWrs - 26 |
17771 | 124k | {109, 93, 4, 4 }, |
17772 | 124k | {120, 97, 4, 3 }, |
17773 | 124k | {135, 100, 4, 4 }, |
17774 | | // AArch64_ANDSXri - 29 |
17775 | 124k | {151, 104, 3, 2 }, |
17776 | | // AArch64_ANDSXrs - 30 |
17777 | 124k | {109, 106, 4, 4 }, |
17778 | 124k | {120, 110, 4, 3 }, |
17779 | 124k | {135, 113, 4, 4 }, |
17780 | | // AArch64_ANDS_PPzPP - 33 |
17781 | 124k | {164, 117, 4, 7 }, |
17782 | | // AArch64_ANDWrs - 34 |
17783 | 124k | {188, 124, 4, 4 }, |
17784 | | // AArch64_ANDXrs - 35 |
17785 | 124k | {188, 128, 4, 4 }, |
17786 | | // AArch64_AND_PPzPP - 36 |
17787 | 124k | {203, 132, 4, 7 }, |
17788 | | // AArch64_AND_ZI - 37 |
17789 | 124k | {226, 139, 3, 6 }, |
17790 | 124k | {247, 145, 3, 6 }, |
17791 | 124k | {268, 151, 3, 6 }, |
17792 | | // AArch64_AUTIA1716 - 40 |
17793 | 124k | {289, 157, 0, 1 }, |
17794 | | // AArch64_AUTIASP - 41 |
17795 | 124k | {299, 158, 0, 1 }, |
17796 | | // AArch64_AUTIAZ - 42 |
17797 | 124k | {307, 159, 0, 1 }, |
17798 | | // AArch64_AUTIB1716 - 43 |
17799 | 124k | {314, 160, 0, 1 }, |
17800 | | // AArch64_AUTIBSP - 44 |
17801 | 124k | {324, 161, 0, 1 }, |
17802 | | // AArch64_AUTIBZ - 45 |
17803 | 124k | {332, 162, 0, 1 }, |
17804 | | // AArch64_BICSWrs - 46 |
17805 | 124k | {339, 163, 4, 4 }, |
17806 | | // AArch64_BICSXrs - 47 |
17807 | 124k | {339, 167, 4, 4 }, |
17808 | | // AArch64_BICWrs - 48 |
17809 | 124k | {355, 171, 4, 4 }, |
17810 | | // AArch64_BICXrs - 49 |
17811 | 124k | {355, 175, 4, 4 }, |
17812 | | // AArch64_CLREX - 50 |
17813 | 124k | {370, 179, 1, 1 }, |
17814 | | // AArch64_CNTB_XPiI - 51 |
17815 | 124k | {376, 180, 3, 6 }, |
17816 | 124k | {384, 186, 3, 6 }, |
17817 | | // AArch64_CNTD_XPiI - 53 |
17818 | 124k | {398, 192, 3, 6 }, |
17819 | 124k | {406, 198, 3, 6 }, |
17820 | | // AArch64_CNTH_XPiI - 55 |
17821 | 124k | {420, 204, 3, 6 }, |
17822 | 124k | {428, 210, 3, 6 }, |
17823 | | // AArch64_CNTW_XPiI - 57 |
17824 | 124k | {442, 216, 3, 6 }, |
17825 | 124k | {450, 222, 3, 6 }, |
17826 | | // AArch64_CPY_ZPmI_B - 59 |
17827 | 124k | {464, 228, 5, 6 }, |
17828 | | // AArch64_CPY_ZPmI_D - 60 |
17829 | 124k | {487, 234, 5, 6 }, |
17830 | | // AArch64_CPY_ZPmI_H - 61 |
17831 | 124k | {510, 240, 5, 6 }, |
17832 | | // AArch64_CPY_ZPmI_S - 62 |
17833 | 124k | {533, 246, 5, 6 }, |
17834 | | // AArch64_CPY_ZPmR_B - 63 |
17835 | 124k | {556, 252, 4, 7 }, |
17836 | | // AArch64_CPY_ZPmR_D - 64 |
17837 | 124k | {577, 259, 4, 7 }, |
17838 | | // AArch64_CPY_ZPmR_H - 65 |
17839 | 124k | {598, 266, 4, 7 }, |
17840 | | // AArch64_CPY_ZPmR_S - 66 |
17841 | 124k | {619, 273, 4, 7 }, |
17842 | | // AArch64_CPY_ZPmV_B - 67 |
17843 | 124k | {556, 280, 4, 7 }, |
17844 | | // AArch64_CPY_ZPmV_D - 68 |
17845 | 124k | {577, 287, 4, 7 }, |
17846 | | // AArch64_CPY_ZPmV_H - 69 |
17847 | 124k | {598, 294, 4, 7 }, |
17848 | | // AArch64_CPY_ZPmV_S - 70 |
17849 | 124k | {619, 301, 4, 7 }, |
17850 | | // AArch64_CPY_ZPzI_B - 71 |
17851 | 124k | {640, 308, 4, 5 }, |
17852 | | // AArch64_CPY_ZPzI_D - 72 |
17853 | 124k | {663, 313, 4, 5 }, |
17854 | | // AArch64_CPY_ZPzI_H - 73 |
17855 | 124k | {686, 318, 4, 5 }, |
17856 | | // AArch64_CPY_ZPzI_S - 74 |
17857 | 124k | {709, 323, 4, 5 }, |
17858 | | // AArch64_CSINCWr - 75 |
17859 | 124k | {732, 328, 4, 4 }, |
17860 | 124k | {746, 332, 4, 4 }, |
17861 | | // AArch64_CSINCXr - 77 |
17862 | 124k | {732, 336, 4, 4 }, |
17863 | 124k | {746, 340, 4, 4 }, |
17864 | | // AArch64_CSINVWr - 79 |
17865 | 124k | {764, 344, 4, 4 }, |
17866 | 124k | {779, 348, 4, 4 }, |
17867 | | // AArch64_CSINVXr - 81 |
17868 | 124k | {764, 352, 4, 4 }, |
17869 | 124k | {779, 356, 4, 4 }, |
17870 | | // AArch64_CSNEGWr - 83 |
17871 | 124k | {797, 360, 4, 4 }, |
17872 | | // AArch64_CSNEGXr - 84 |
17873 | 124k | {797, 364, 4, 4 }, |
17874 | | // AArch64_DCPS1 - 85 |
17875 | 124k | {815, 368, 1, 1 }, |
17876 | | // AArch64_DCPS2 - 86 |
17877 | 124k | {821, 369, 1, 1 }, |
17878 | | // AArch64_DCPS3 - 87 |
17879 | 124k | {827, 370, 1, 2 }, |
17880 | | // AArch64_DECB_XPiI - 88 |
17881 | 124k | {833, 372, 4, 7 }, |
17882 | 124k | {841, 379, 4, 7 }, |
17883 | | // AArch64_DECD_XPiI - 90 |
17884 | 124k | {855, 386, 4, 7 }, |
17885 | 124k | {863, 393, 4, 7 }, |
17886 | | // AArch64_DECD_ZPiI - 92 |
17887 | 124k | {877, 400, 4, 7 }, |
17888 | 124k | {887, 407, 4, 7 }, |
17889 | | // AArch64_DECH_XPiI - 94 |
17890 | 124k | {903, 414, 4, 7 }, |
17891 | 124k | {911, 421, 4, 7 }, |
17892 | | // AArch64_DECH_ZPiI - 96 |
17893 | 124k | {925, 428, 4, 7 }, |
17894 | 124k | {935, 435, 4, 7 }, |
17895 | | // AArch64_DECW_XPiI - 98 |
17896 | 124k | {951, 442, 4, 7 }, |
17897 | 124k | {959, 449, 4, 7 }, |
17898 | | // AArch64_DECW_ZPiI - 100 |
17899 | 124k | {973, 456, 4, 7 }, |
17900 | 124k | {983, 463, 4, 7 }, |
17901 | | // AArch64_DSB - 102 |
17902 | 124k | {999, 470, 1, 1 }, |
17903 | 124k | {1004, 471, 1, 1 }, |
17904 | 124k | {1010, 472, 1, 2 }, |
17905 | | // AArch64_DUPM_ZI - 105 |
17906 | 124k | {1014, 474, 2, 5 }, |
17907 | 124k | {1029, 479, 2, 5 }, |
17908 | 124k | {1044, 484, 2, 5 }, |
17909 | 124k | {1059, 489, 2, 5 }, |
17910 | 124k | {1075, 494, 2, 5 }, |
17911 | 124k | {1091, 499, 2, 5 }, |
17912 | | // AArch64_DUP_ZI_B - 111 |
17913 | 124k | {1107, 504, 3, 4 }, |
17914 | | // AArch64_DUP_ZI_D - 112 |
17915 | 124k | {1122, 508, 3, 4 }, |
17916 | 124k | {1137, 512, 3, 6 }, |
17917 | | // AArch64_DUP_ZI_H - 114 |
17918 | 124k | {1153, 518, 3, 4 }, |
17919 | 124k | {1168, 522, 3, 6 }, |
17920 | | // AArch64_DUP_ZI_S - 116 |
17921 | 124k | {1184, 528, 3, 4 }, |
17922 | 124k | {1199, 532, 3, 6 }, |
17923 | | // AArch64_DUP_ZR_B - 118 |
17924 | 124k | {1215, 538, 2, 5 }, |
17925 | | // AArch64_DUP_ZR_D - 119 |
17926 | 124k | {1228, 543, 2, 5 }, |
17927 | | // AArch64_DUP_ZR_H - 120 |
17928 | 124k | {1241, 548, 2, 5 }, |
17929 | | // AArch64_DUP_ZR_S - 121 |
17930 | 124k | {1254, 553, 2, 5 }, |
17931 | | // AArch64_DUP_ZZI_B - 122 |
17932 | 124k | {1267, 558, 3, 6 }, |
17933 | 124k | {1282, 564, 3, 5 }, |
17934 | | // AArch64_DUP_ZZI_D - 124 |
17935 | 124k | {1301, 569, 3, 6 }, |
17936 | 124k | {1316, 575, 3, 5 }, |
17937 | | // AArch64_DUP_ZZI_H - 126 |
17938 | 124k | {1335, 580, 3, 6 }, |
17939 | 124k | {1350, 586, 3, 5 }, |
17940 | | // AArch64_DUP_ZZI_Q - 128 |
17941 | 124k | {1369, 591, 3, 6 }, |
17942 | 124k | {1384, 597, 3, 5 }, |
17943 | | // AArch64_DUP_ZZI_S - 130 |
17944 | 124k | {1403, 602, 3, 6 }, |
17945 | 124k | {1418, 608, 3, 5 }, |
17946 | | // AArch64_EONWrs - 132 |
17947 | 124k | {1437, 613, 4, 4 }, |
17948 | | // AArch64_EONXrs - 133 |
17949 | 124k | {1437, 617, 4, 4 }, |
17950 | | // AArch64_EORS_PPzPP - 134 |
17951 | 124k | {1452, 621, 4, 7 }, |
17952 | | // AArch64_EORWrs - 135 |
17953 | 124k | {1476, 628, 4, 4 }, |
17954 | | // AArch64_EORXrs - 136 |
17955 | 124k | {1476, 632, 4, 4 }, |
17956 | | // AArch64_EOR_PPzPP - 137 |
17957 | 124k | {1491, 636, 4, 7 }, |
17958 | | // AArch64_EOR_ZI - 138 |
17959 | 124k | {1514, 643, 3, 6 }, |
17960 | 124k | {1535, 649, 3, 6 }, |
17961 | 124k | {1556, 655, 3, 6 }, |
17962 | | // AArch64_EXTRACT_ZPMXI_H_B - 141 |
17963 | 124k | {1577, 661, 5, 5 }, |
17964 | | // AArch64_EXTRACT_ZPMXI_H_D - 142 |
17965 | 124k | {1610, 666, 5, 5 }, |
17966 | | // AArch64_EXTRACT_ZPMXI_H_H - 143 |
17967 | 124k | {1643, 671, 5, 5 }, |
17968 | | // AArch64_EXTRACT_ZPMXI_H_Q - 144 |
17969 | 124k | {1676, 676, 5, 5 }, |
17970 | | // AArch64_EXTRACT_ZPMXI_H_S - 145 |
17971 | 124k | {1709, 681, 5, 5 }, |
17972 | | // AArch64_EXTRACT_ZPMXI_V_B - 146 |
17973 | 124k | {1742, 686, 5, 5 }, |
17974 | | // AArch64_EXTRACT_ZPMXI_V_D - 147 |
17975 | 124k | {1775, 691, 5, 5 }, |
17976 | | // AArch64_EXTRACT_ZPMXI_V_H - 148 |
17977 | 124k | {1808, 696, 5, 5 }, |
17978 | | // AArch64_EXTRACT_ZPMXI_V_Q - 149 |
17979 | 124k | {1841, 701, 5, 5 }, |
17980 | | // AArch64_EXTRACT_ZPMXI_V_S - 150 |
17981 | 124k | {1874, 706, 5, 5 }, |
17982 | | // AArch64_EXTRWrri - 151 |
17983 | 124k | {1907, 711, 4, 3 }, |
17984 | | // AArch64_EXTRXrri - 152 |
17985 | 124k | {1907, 714, 4, 3 }, |
17986 | | // AArch64_FCPY_ZPmI_D - 153 |
17987 | 124k | {1922, 717, 4, 6 }, |
17988 | | // AArch64_FCPY_ZPmI_H - 154 |
17989 | 124k | {1946, 723, 4, 6 }, |
17990 | | // AArch64_FCPY_ZPmI_S - 155 |
17991 | 124k | {1970, 729, 4, 6 }, |
17992 | | // AArch64_FDUP_ZI_D - 156 |
17993 | 124k | {1994, 735, 2, 4 }, |
17994 | | // AArch64_FDUP_ZI_H - 157 |
17995 | 124k | {2010, 739, 2, 4 }, |
17996 | | // AArch64_FDUP_ZI_S - 158 |
17997 | 124k | {2026, 743, 2, 4 }, |
17998 | | // AArch64_GLD1B_D_IMM_REAL - 159 |
17999 | 124k | {2042, 747, 4, 5 }, |
18000 | | // AArch64_GLD1B_S_IMM_REAL - 160 |
18001 | 124k | {2068, 752, 4, 5 }, |
18002 | | // AArch64_GLD1D_IMM_REAL - 161 |
18003 | 124k | {2094, 757, 4, 5 }, |
18004 | | // AArch64_GLD1H_D_IMM_REAL - 162 |
18005 | 124k | {2120, 762, 4, 5 }, |
18006 | | // AArch64_GLD1H_S_IMM_REAL - 163 |
18007 | 124k | {2146, 767, 4, 5 }, |
18008 | | // AArch64_GLD1SB_D_IMM_REAL - 164 |
18009 | 124k | {2172, 772, 4, 5 }, |
18010 | | // AArch64_GLD1SB_S_IMM_REAL - 165 |
18011 | 124k | {2199, 777, 4, 5 }, |
18012 | | // AArch64_GLD1SH_D_IMM_REAL - 166 |
18013 | 124k | {2226, 782, 4, 5 }, |
18014 | | // AArch64_GLD1SH_S_IMM_REAL - 167 |
18015 | 124k | {2253, 787, 4, 5 }, |
18016 | | // AArch64_GLD1SW_D_IMM_REAL - 168 |
18017 | 124k | {2280, 792, 4, 5 }, |
18018 | | // AArch64_GLD1W_D_IMM_REAL - 169 |
18019 | 124k | {2307, 797, 4, 5 }, |
18020 | | // AArch64_GLD1W_IMM_REAL - 170 |
18021 | 124k | {2333, 802, 4, 5 }, |
18022 | | // AArch64_GLDFF1B_D_IMM_REAL - 171 |
18023 | 124k | {2359, 807, 4, 5 }, |
18024 | | // AArch64_GLDFF1B_S_IMM_REAL - 172 |
18025 | 124k | {2387, 812, 4, 5 }, |
18026 | | // AArch64_GLDFF1D_IMM_REAL - 173 |
18027 | 124k | {2415, 817, 4, 5 }, |
18028 | | // AArch64_GLDFF1H_D_IMM_REAL - 174 |
18029 | 124k | {2443, 822, 4, 5 }, |
18030 | | // AArch64_GLDFF1H_S_IMM_REAL - 175 |
18031 | 124k | {2471, 827, 4, 5 }, |
18032 | | // AArch64_GLDFF1SB_D_IMM_REAL - 176 |
18033 | 124k | {2499, 832, 4, 5 }, |
18034 | | // AArch64_GLDFF1SB_S_IMM_REAL - 177 |
18035 | 124k | {2528, 837, 4, 5 }, |
18036 | | // AArch64_GLDFF1SH_D_IMM_REAL - 178 |
18037 | 124k | {2557, 842, 4, 5 }, |
18038 | | // AArch64_GLDFF1SH_S_IMM_REAL - 179 |
18039 | 124k | {2586, 847, 4, 5 }, |
18040 | | // AArch64_GLDFF1SW_D_IMM_REAL - 180 |
18041 | 124k | {2615, 852, 4, 5 }, |
18042 | | // AArch64_GLDFF1W_D_IMM_REAL - 181 |
18043 | 124k | {2644, 857, 4, 5 }, |
18044 | | // AArch64_GLDFF1W_IMM_REAL - 182 |
18045 | 124k | {2672, 862, 4, 5 }, |
18046 | | // AArch64_HINT - 183 |
18047 | 124k | {2700, 867, 1, 1 }, |
18048 | 124k | {2704, 868, 1, 1 }, |
18049 | 124k | {2710, 869, 1, 1 }, |
18050 | 124k | {2714, 870, 1, 1 }, |
18051 | 124k | {2718, 871, 1, 1 }, |
18052 | 124k | {2722, 872, 1, 1 }, |
18053 | 124k | {2727, 873, 1, 1 }, |
18054 | 124k | {2731, 874, 1, 2 }, |
18055 | 124k | {2735, 876, 1, 1 }, |
18056 | 124k | {2740, 877, 1, 2 }, |
18057 | 124k | {2744, 879, 1, 2 }, |
18058 | 124k | {2753, 881, 1, 2 }, |
18059 | | // AArch64_INCB_XPiI - 195 |
18060 | 124k | {2762, 883, 4, 7 }, |
18061 | 124k | {2770, 890, 4, 7 }, |
18062 | | // AArch64_INCD_XPiI - 197 |
18063 | 124k | {2784, 897, 4, 7 }, |
18064 | 124k | {2792, 904, 4, 7 }, |
18065 | | // AArch64_INCD_ZPiI - 199 |
18066 | 124k | {2806, 911, 4, 7 }, |
18067 | 124k | {2816, 918, 4, 7 }, |
18068 | | // AArch64_INCH_XPiI - 201 |
18069 | 124k | {2832, 925, 4, 7 }, |
18070 | 124k | {2840, 932, 4, 7 }, |
18071 | | // AArch64_INCH_ZPiI - 203 |
18072 | 124k | {2854, 939, 4, 7 }, |
18073 | 124k | {2864, 946, 4, 7 }, |
18074 | | // AArch64_INCW_XPiI - 205 |
18075 | 124k | {2880, 953, 4, 7 }, |
18076 | 124k | {2888, 960, 4, 7 }, |
18077 | | // AArch64_INCW_ZPiI - 207 |
18078 | 124k | {2902, 967, 4, 7 }, |
18079 | 124k | {2912, 974, 4, 7 }, |
18080 | | // AArch64_INSERT_MXIPZ_H_B - 209 |
18081 | 124k | {2928, 981, 5, 6 }, |
18082 | | // AArch64_INSERT_MXIPZ_H_D - 210 |
18083 | 124k | {2961, 987, 5, 6 }, |
18084 | | // AArch64_INSERT_MXIPZ_H_H - 211 |
18085 | 124k | {2994, 993, 5, 6 }, |
18086 | | // AArch64_INSERT_MXIPZ_H_Q - 212 |
18087 | 124k | {3027, 999, 5, 6 }, |
18088 | | // AArch64_INSERT_MXIPZ_H_S - 213 |
18089 | 124k | {3060, 1005, 5, 6 }, |
18090 | | // AArch64_INSERT_MXIPZ_V_B - 214 |
18091 | 124k | {3093, 1011, 5, 6 }, |
18092 | | // AArch64_INSERT_MXIPZ_V_D - 215 |
18093 | 124k | {3126, 1017, 5, 6 }, |
18094 | | // AArch64_INSERT_MXIPZ_V_H - 216 |
18095 | 124k | {3159, 1023, 5, 6 }, |
18096 | | // AArch64_INSERT_MXIPZ_V_Q - 217 |
18097 | 124k | {3192, 1029, 5, 6 }, |
18098 | | // AArch64_INSERT_MXIPZ_V_S - 218 |
18099 | 124k | {3225, 1035, 5, 6 }, |
18100 | | // AArch64_INSvi16gpr - 219 |
18101 | 124k | {3258, 1041, 4, 5 }, |
18102 | | // AArch64_INSvi16lane - 220 |
18103 | 124k | {3277, 1046, 5, 5 }, |
18104 | | // AArch64_INSvi32gpr - 221 |
18105 | 124k | {3304, 1051, 4, 5 }, |
18106 | | // AArch64_INSvi32lane - 222 |
18107 | 124k | {3323, 1056, 5, 5 }, |
18108 | | // AArch64_INSvi64gpr - 223 |
18109 | 124k | {3350, 1061, 4, 5 }, |
18110 | | // AArch64_INSvi64lane - 224 |
18111 | 124k | {3369, 1066, 5, 5 }, |
18112 | | // AArch64_INSvi8gpr - 225 |
18113 | 124k | {3396, 1071, 4, 5 }, |
18114 | | // AArch64_INSvi8lane - 226 |
18115 | 124k | {3415, 1076, 5, 5 }, |
18116 | | // AArch64_IRG - 227 |
18117 | 124k | {3442, 1081, 3, 4 }, |
18118 | | // AArch64_ISB - 228 |
18119 | 124k | {3453, 1085, 1, 1 }, |
18120 | | // AArch64_LD1B_D_IMM_REAL - 229 |
18121 | 124k | {3457, 1086, 4, 7 }, |
18122 | | // AArch64_LD1B_H_IMM_REAL - 230 |
18123 | 124k | {3481, 1093, 4, 7 }, |
18124 | | // AArch64_LD1B_IMM_REAL - 231 |
18125 | 124k | {3505, 1100, 4, 7 }, |
18126 | | // AArch64_LD1B_S_IMM_REAL - 232 |
18127 | 124k | {3529, 1107, 4, 7 }, |
18128 | | // AArch64_LD1D_IMM_REAL - 233 |
18129 | 124k | {3553, 1114, 4, 7 }, |
18130 | | // AArch64_LD1Fourv16b_POST - 234 |
18131 | 124k | {3577, 1121, 4, 5 }, |
18132 | | // AArch64_LD1Fourv1d_POST - 235 |
18133 | 124k | {3597, 1126, 4, 5 }, |
18134 | | // AArch64_LD1Fourv2d_POST - 236 |
18135 | 124k | {3617, 1131, 4, 5 }, |
18136 | | // AArch64_LD1Fourv2s_POST - 237 |
18137 | 124k | {3637, 1136, 4, 5 }, |
18138 | | // AArch64_LD1Fourv4h_POST - 238 |
18139 | 124k | {3657, 1141, 4, 5 }, |
18140 | | // AArch64_LD1Fourv4s_POST - 239 |
18141 | 124k | {3677, 1146, 4, 5 }, |
18142 | | // AArch64_LD1Fourv8b_POST - 240 |
18143 | 124k | {3697, 1151, 4, 5 }, |
18144 | | // AArch64_LD1Fourv8h_POST - 241 |
18145 | 124k | {3717, 1156, 4, 5 }, |
18146 | | // AArch64_LD1H_D_IMM_REAL - 242 |
18147 | 124k | {3737, 1161, 4, 7 }, |
18148 | | // AArch64_LD1H_IMM_REAL - 243 |
18149 | 124k | {3761, 1168, 4, 7 }, |
18150 | | // AArch64_LD1H_S_IMM_REAL - 244 |
18151 | 124k | {3785, 1175, 4, 7 }, |
18152 | | // AArch64_LD1Onev16b_POST - 245 |
18153 | 124k | {3809, 1182, 4, 5 }, |
18154 | | // AArch64_LD1Onev1d_POST - 246 |
18155 | 124k | {3829, 1187, 4, 5 }, |
18156 | | // AArch64_LD1Onev2d_POST - 247 |
18157 | 124k | {3848, 1192, 4, 5 }, |
18158 | | // AArch64_LD1Onev2s_POST - 248 |
18159 | 124k | {3868, 1197, 4, 5 }, |
18160 | | // AArch64_LD1Onev4h_POST - 249 |
18161 | 124k | {3887, 1202, 4, 5 }, |
18162 | | // AArch64_LD1Onev4s_POST - 250 |
18163 | 124k | {3906, 1207, 4, 5 }, |
18164 | | // AArch64_LD1Onev8b_POST - 251 |
18165 | 124k | {3926, 1212, 4, 5 }, |
18166 | | // AArch64_LD1Onev8h_POST - 252 |
18167 | 124k | {3945, 1217, 4, 5 }, |
18168 | | // AArch64_LD1RB_D_IMM - 253 |
18169 | 124k | {3965, 1222, 4, 7 }, |
18170 | | // AArch64_LD1RB_H_IMM - 254 |
18171 | 124k | {3990, 1229, 4, 7 }, |
18172 | | // AArch64_LD1RB_IMM - 255 |
18173 | 124k | {4015, 1236, 4, 7 }, |
18174 | | // AArch64_LD1RB_S_IMM - 256 |
18175 | 124k | {4040, 1243, 4, 7 }, |
18176 | | // AArch64_LD1RD_IMM - 257 |
18177 | 124k | {4065, 1250, 4, 7 }, |
18178 | | // AArch64_LD1RH_D_IMM - 258 |
18179 | 124k | {4090, 1257, 4, 7 }, |
18180 | | // AArch64_LD1RH_IMM - 259 |
18181 | 124k | {4115, 1264, 4, 7 }, |
18182 | | // AArch64_LD1RH_S_IMM - 260 |
18183 | 124k | {4140, 1271, 4, 7 }, |
18184 | | // AArch64_LD1RO_B_IMM - 261 |
18185 | 124k | {4165, 1278, 4, 6 }, |
18186 | | // AArch64_LD1RO_D_IMM - 262 |
18187 | 124k | {4191, 1284, 4, 6 }, |
18188 | | // AArch64_LD1RO_H_IMM - 263 |
18189 | 124k | {4217, 1290, 4, 6 }, |
18190 | | // AArch64_LD1RO_W_IMM - 264 |
18191 | 124k | {4243, 1296, 4, 6 }, |
18192 | | // AArch64_LD1RQ_B_IMM - 265 |
18193 | 124k | {4269, 1302, 4, 7 }, |
18194 | | // AArch64_LD1RQ_D_IMM - 266 |
18195 | 124k | {4295, 1309, 4, 7 }, |
18196 | | // AArch64_LD1RQ_H_IMM - 267 |
18197 | 124k | {4321, 1316, 4, 7 }, |
18198 | | // AArch64_LD1RQ_W_IMM - 268 |
18199 | 124k | {4347, 1323, 4, 7 }, |
18200 | | // AArch64_LD1RSB_D_IMM - 269 |
18201 | 124k | {4373, 1330, 4, 7 }, |
18202 | | // AArch64_LD1RSB_H_IMM - 270 |
18203 | 124k | {4399, 1337, 4, 7 }, |
18204 | | // AArch64_LD1RSB_S_IMM - 271 |
18205 | 124k | {4425, 1344, 4, 7 }, |
18206 | | // AArch64_LD1RSH_D_IMM - 272 |
18207 | 124k | {4451, 1351, 4, 7 }, |
18208 | | // AArch64_LD1RSH_S_IMM - 273 |
18209 | 124k | {4477, 1358, 4, 7 }, |
18210 | | // AArch64_LD1RSW_IMM - 274 |
18211 | 124k | {4503, 1365, 4, 7 }, |
18212 | | // AArch64_LD1RW_D_IMM - 275 |
18213 | 124k | {4529, 1372, 4, 7 }, |
18214 | | // AArch64_LD1RW_IMM - 276 |
18215 | 124k | {4554, 1379, 4, 7 }, |
18216 | | // AArch64_LD1Rv16b_POST - 277 |
18217 | 124k | {4579, 1386, 4, 5 }, |
18218 | | // AArch64_LD1Rv1d_POST - 278 |
18219 | 124k | {4599, 1391, 4, 5 }, |
18220 | | // AArch64_LD1Rv2d_POST - 279 |
18221 | 124k | {4619, 1396, 4, 5 }, |
18222 | | // AArch64_LD1Rv2s_POST - 280 |
18223 | 124k | {4639, 1401, 4, 5 }, |
18224 | | // AArch64_LD1Rv4h_POST - 281 |
18225 | 124k | {4659, 1406, 4, 5 }, |
18226 | | // AArch64_LD1Rv4s_POST - 282 |
18227 | 124k | {4679, 1411, 4, 5 }, |
18228 | | // AArch64_LD1Rv8b_POST - 283 |
18229 | 124k | {4699, 1416, 4, 5 }, |
18230 | | // AArch64_LD1Rv8h_POST - 284 |
18231 | 124k | {4719, 1421, 4, 5 }, |
18232 | | // AArch64_LD1SB_D_IMM_REAL - 285 |
18233 | 124k | {4739, 1426, 4, 7 }, |
18234 | | // AArch64_LD1SB_H_IMM_REAL - 286 |
18235 | 124k | {4764, 1433, 4, 7 }, |
18236 | | // AArch64_LD1SB_S_IMM_REAL - 287 |
18237 | 124k | {4789, 1440, 4, 7 }, |
18238 | | // AArch64_LD1SH_D_IMM_REAL - 288 |
18239 | 124k | {4814, 1447, 4, 7 }, |
18240 | | // AArch64_LD1SH_S_IMM_REAL - 289 |
18241 | 124k | {4839, 1454, 4, 7 }, |
18242 | | // AArch64_LD1SW_D_IMM_REAL - 290 |
18243 | 124k | {4864, 1461, 4, 7 }, |
18244 | | // AArch64_LD1Threev16b_POST - 291 |
18245 | 124k | {4889, 1468, 4, 5 }, |
18246 | | // AArch64_LD1Threev1d_POST - 292 |
18247 | 124k | {4909, 1473, 4, 5 }, |
18248 | | // AArch64_LD1Threev2d_POST - 293 |
18249 | 124k | {4929, 1478, 4, 5 }, |
18250 | | // AArch64_LD1Threev2s_POST - 294 |
18251 | 124k | {4949, 1483, 4, 5 }, |
18252 | | // AArch64_LD1Threev4h_POST - 295 |
18253 | 124k | {4969, 1488, 4, 5 }, |
18254 | | // AArch64_LD1Threev4s_POST - 296 |
18255 | 124k | {4989, 1493, 4, 5 }, |
18256 | | // AArch64_LD1Threev8b_POST - 297 |
18257 | 124k | {5009, 1498, 4, 5 }, |
18258 | | // AArch64_LD1Threev8h_POST - 298 |
18259 | 124k | {5029, 1503, 4, 5 }, |
18260 | | // AArch64_LD1Twov16b_POST - 299 |
18261 | 124k | {5049, 1508, 4, 5 }, |
18262 | | // AArch64_LD1Twov1d_POST - 300 |
18263 | 124k | {5069, 1513, 4, 5 }, |
18264 | | // AArch64_LD1Twov2d_POST - 301 |
18265 | 124k | {5089, 1518, 4, 5 }, |
18266 | | // AArch64_LD1Twov2s_POST - 302 |
18267 | 124k | {5109, 1523, 4, 5 }, |
18268 | | // AArch64_LD1Twov4h_POST - 303 |
18269 | 124k | {5129, 1528, 4, 5 }, |
18270 | | // AArch64_LD1Twov4s_POST - 304 |
18271 | 124k | {5149, 1533, 4, 5 }, |
18272 | | // AArch64_LD1Twov8b_POST - 305 |
18273 | 124k | {5169, 1538, 4, 5 }, |
18274 | | // AArch64_LD1Twov8h_POST - 306 |
18275 | 124k | {5189, 1543, 4, 5 }, |
18276 | | // AArch64_LD1W_D_IMM_REAL - 307 |
18277 | 124k | {5209, 1548, 4, 7 }, |
18278 | | // AArch64_LD1W_IMM_REAL - 308 |
18279 | 124k | {5233, 1555, 4, 7 }, |
18280 | | // AArch64_LD1_MXIPXX_H_B - 309 |
18281 | 124k | {5257, 1562, 6, 7 }, |
18282 | | // AArch64_LD1_MXIPXX_H_D - 310 |
18283 | 124k | {5293, 1569, 6, 7 }, |
18284 | | // AArch64_LD1_MXIPXX_H_H - 311 |
18285 | 124k | {5329, 1576, 6, 7 }, |
18286 | | // AArch64_LD1_MXIPXX_H_Q - 312 |
18287 | 124k | {5365, 1583, 6, 7 }, |
18288 | | // AArch64_LD1_MXIPXX_H_S - 313 |
18289 | 124k | {5401, 1590, 6, 7 }, |
18290 | | // AArch64_LD1_MXIPXX_V_B - 314 |
18291 | 124k | {5437, 1597, 6, 7 }, |
18292 | | // AArch64_LD1_MXIPXX_V_D - 315 |
18293 | 124k | {5473, 1604, 6, 7 }, |
18294 | | // AArch64_LD1_MXIPXX_V_H - 316 |
18295 | 124k | {5509, 1611, 6, 7 }, |
18296 | | // AArch64_LD1_MXIPXX_V_Q - 317 |
18297 | 124k | {5545, 1618, 6, 7 }, |
18298 | | // AArch64_LD1_MXIPXX_V_S - 318 |
18299 | 124k | {5581, 1625, 6, 7 }, |
18300 | | // AArch64_LD1i16_POST - 319 |
18301 | 124k | {5617, 1632, 6, 7 }, |
18302 | | // AArch64_LD1i32_POST - 320 |
18303 | 124k | {5640, 1639, 6, 7 }, |
18304 | | // AArch64_LD1i64_POST - 321 |
18305 | 124k | {5663, 1646, 6, 7 }, |
18306 | | // AArch64_LD1i8_POST - 322 |
18307 | 124k | {5686, 1653, 6, 7 }, |
18308 | | // AArch64_LD2B_IMM - 323 |
18309 | 124k | {5709, 1660, 4, 7 }, |
18310 | | // AArch64_LD2D_IMM - 324 |
18311 | 124k | {5733, 1667, 4, 7 }, |
18312 | | // AArch64_LD2H_IMM - 325 |
18313 | 124k | {5757, 1674, 4, 7 }, |
18314 | | // AArch64_LD2Rv16b_POST - 326 |
18315 | 124k | {5781, 1681, 4, 5 }, |
18316 | | // AArch64_LD2Rv1d_POST - 327 |
18317 | 124k | {5801, 1686, 4, 5 }, |
18318 | | // AArch64_LD2Rv2d_POST - 328 |
18319 | 124k | {5822, 1691, 4, 5 }, |
18320 | | // AArch64_LD2Rv2s_POST - 329 |
18321 | 124k | {5843, 1696, 4, 5 }, |
18322 | | // AArch64_LD2Rv4h_POST - 330 |
18323 | 124k | {5863, 1701, 4, 5 }, |
18324 | | // AArch64_LD2Rv4s_POST - 331 |
18325 | 124k | {5883, 1706, 4, 5 }, |
18326 | | // AArch64_LD2Rv8b_POST - 332 |
18327 | 124k | {5903, 1711, 4, 5 }, |
18328 | | // AArch64_LD2Rv8h_POST - 333 |
18329 | 124k | {5923, 1716, 4, 5 }, |
18330 | | // AArch64_LD2Twov16b_POST - 334 |
18331 | 124k | {5943, 1721, 4, 5 }, |
18332 | | // AArch64_LD2Twov2d_POST - 335 |
18333 | 124k | {5963, 1726, 4, 5 }, |
18334 | | // AArch64_LD2Twov2s_POST - 336 |
18335 | 124k | {5983, 1731, 4, 5 }, |
18336 | | // AArch64_LD2Twov4h_POST - 337 |
18337 | 124k | {6003, 1736, 4, 5 }, |
18338 | | // AArch64_LD2Twov4s_POST - 338 |
18339 | 124k | {6023, 1741, 4, 5 }, |
18340 | | // AArch64_LD2Twov8b_POST - 339 |
18341 | 124k | {6043, 1746, 4, 5 }, |
18342 | | // AArch64_LD2Twov8h_POST - 340 |
18343 | 124k | {6063, 1751, 4, 5 }, |
18344 | | // AArch64_LD2W_IMM - 341 |
18345 | 124k | {6083, 1756, 4, 7 }, |
18346 | | // AArch64_LD2i16_POST - 342 |
18347 | 124k | {6107, 1763, 6, 7 }, |
18348 | | // AArch64_LD2i32_POST - 343 |
18349 | 124k | {6130, 1770, 6, 7 }, |
18350 | | // AArch64_LD2i64_POST - 344 |
18351 | 124k | {6153, 1777, 6, 7 }, |
18352 | | // AArch64_LD2i8_POST - 345 |
18353 | 124k | {6177, 1784, 6, 7 }, |
18354 | | // AArch64_LD3B_IMM - 346 |
18355 | 124k | {6200, 1791, 4, 7 }, |
18356 | | // AArch64_LD3D_IMM - 347 |
18357 | 124k | {6224, 1798, 4, 7 }, |
18358 | | // AArch64_LD3H_IMM - 348 |
18359 | 124k | {6248, 1805, 4, 7 }, |
18360 | | // AArch64_LD3Rv16b_POST - 349 |
18361 | 124k | {6272, 1812, 4, 5 }, |
18362 | | // AArch64_LD3Rv1d_POST - 350 |
18363 | 124k | {6292, 1817, 4, 5 }, |
18364 | | // AArch64_LD3Rv2d_POST - 351 |
18365 | 124k | {6313, 1822, 4, 5 }, |
18366 | | // AArch64_LD3Rv2s_POST - 352 |
18367 | 124k | {6334, 1827, 4, 5 }, |
18368 | | // AArch64_LD3Rv4h_POST - 353 |
18369 | 124k | {6355, 1832, 4, 5 }, |
18370 | | // AArch64_LD3Rv4s_POST - 354 |
18371 | 124k | {6375, 1837, 4, 5 }, |
18372 | | // AArch64_LD3Rv8b_POST - 355 |
18373 | 124k | {6396, 1842, 4, 5 }, |
18374 | | // AArch64_LD3Rv8h_POST - 356 |
18375 | 124k | {6416, 1847, 4, 5 }, |
18376 | | // AArch64_LD3Threev16b_POST - 357 |
18377 | 124k | {6436, 1852, 4, 5 }, |
18378 | | // AArch64_LD3Threev2d_POST - 358 |
18379 | 124k | {6456, 1857, 4, 5 }, |
18380 | | // AArch64_LD3Threev2s_POST - 359 |
18381 | 124k | {6476, 1862, 4, 5 }, |
18382 | | // AArch64_LD3Threev4h_POST - 360 |
18383 | 124k | {6496, 1867, 4, 5 }, |
18384 | | // AArch64_LD3Threev4s_POST - 361 |
18385 | 124k | {6516, 1872, 4, 5 }, |
18386 | | // AArch64_LD3Threev8b_POST - 362 |
18387 | 124k | {6536, 1877, 4, 5 }, |
18388 | | // AArch64_LD3Threev8h_POST - 363 |
18389 | 124k | {6556, 1882, 4, 5 }, |
18390 | | // AArch64_LD3W_IMM - 364 |
18391 | 124k | {6576, 1887, 4, 7 }, |
18392 | | // AArch64_LD3i16_POST - 365 |
18393 | 124k | {6600, 1894, 6, 7 }, |
18394 | | // AArch64_LD3i32_POST - 366 |
18395 | 124k | {6623, 1901, 6, 7 }, |
18396 | | // AArch64_LD3i64_POST - 367 |
18397 | 124k | {6647, 1908, 6, 7 }, |
18398 | | // AArch64_LD3i8_POST - 368 |
18399 | 124k | {6671, 1915, 6, 7 }, |
18400 | | // AArch64_LD4B_IMM - 369 |
18401 | 124k | {6694, 1922, 4, 7 }, |
18402 | | // AArch64_LD4D_IMM - 370 |
18403 | 124k | {6718, 1929, 4, 7 }, |
18404 | | // AArch64_LD4Fourv16b_POST - 371 |
18405 | 124k | {6742, 1936, 4, 5 }, |
18406 | | // AArch64_LD4Fourv2d_POST - 372 |
18407 | 124k | {6762, 1941, 4, 5 }, |
18408 | | // AArch64_LD4Fourv2s_POST - 373 |
18409 | 124k | {6782, 1946, 4, 5 }, |
18410 | | // AArch64_LD4Fourv4h_POST - 374 |
18411 | 124k | {6802, 1951, 4, 5 }, |
18412 | | // AArch64_LD4Fourv4s_POST - 375 |
18413 | 124k | {6822, 1956, 4, 5 }, |
18414 | | // AArch64_LD4Fourv8b_POST - 376 |
18415 | 124k | {6842, 1961, 4, 5 }, |
18416 | | // AArch64_LD4Fourv8h_POST - 377 |
18417 | 124k | {6862, 1966, 4, 5 }, |
18418 | | // AArch64_LD4H_IMM - 378 |
18419 | 124k | {6882, 1971, 4, 7 }, |
18420 | | // AArch64_LD4Rv16b_POST - 379 |
18421 | 124k | {6906, 1978, 4, 5 }, |
18422 | | // AArch64_LD4Rv1d_POST - 380 |
18423 | 124k | {6926, 1983, 4, 5 }, |
18424 | | // AArch64_LD4Rv2d_POST - 381 |
18425 | 124k | {6947, 1988, 4, 5 }, |
18426 | | // AArch64_LD4Rv2s_POST - 382 |
18427 | 124k | {6968, 1993, 4, 5 }, |
18428 | | // AArch64_LD4Rv4h_POST - 383 |
18429 | 124k | {6989, 1998, 4, 5 }, |
18430 | | // AArch64_LD4Rv4s_POST - 384 |
18431 | 124k | {7009, 2003, 4, 5 }, |
18432 | | // AArch64_LD4Rv8b_POST - 385 |
18433 | 124k | {7030, 2008, 4, 5 }, |
18434 | | // AArch64_LD4Rv8h_POST - 386 |
18435 | 124k | {7050, 2013, 4, 5 }, |
18436 | | // AArch64_LD4W_IMM - 387 |
18437 | 124k | {7070, 2018, 4, 7 }, |
18438 | | // AArch64_LD4i16_POST - 388 |
18439 | 124k | {7094, 2025, 6, 7 }, |
18440 | | // AArch64_LD4i32_POST - 389 |
18441 | 124k | {7117, 2032, 6, 7 }, |
18442 | | // AArch64_LD4i64_POST - 390 |
18443 | 124k | {7141, 2039, 6, 7 }, |
18444 | | // AArch64_LD4i8_POST - 391 |
18445 | 124k | {7165, 2046, 6, 7 }, |
18446 | | // AArch64_LDADDB - 392 |
18447 | 124k | {7188, 2053, 3, 4 }, |
18448 | | // AArch64_LDADDH - 393 |
18449 | 124k | {7204, 2057, 3, 4 }, |
18450 | | // AArch64_LDADDLB - 394 |
18451 | 124k | {7220, 2061, 3, 4 }, |
18452 | | // AArch64_LDADDLH - 395 |
18453 | 124k | {7237, 2065, 3, 4 }, |
18454 | | // AArch64_LDADDLW - 396 |
18455 | 124k | {7254, 2069, 3, 4 }, |
18456 | | // AArch64_LDADDLX - 397 |
18457 | 124k | {7254, 2073, 3, 4 }, |
18458 | | // AArch64_LDADDW - 398 |
18459 | 124k | {7270, 2077, 3, 4 }, |
18460 | | // AArch64_LDADDX - 399 |
18461 | 124k | {7270, 2081, 3, 4 }, |
18462 | | // AArch64_LDAPURBi - 400 |
18463 | 124k | {7285, 2085, 3, 4 }, |
18464 | | // AArch64_LDAPURHi - 401 |
18465 | 124k | {7302, 2089, 3, 4 }, |
18466 | | // AArch64_LDAPURSBWi - 402 |
18467 | 124k | {7319, 2093, 3, 4 }, |
18468 | | // AArch64_LDAPURSBXi - 403 |
18469 | 124k | {7319, 2097, 3, 4 }, |
18470 | | // AArch64_LDAPURSHWi - 404 |
18471 | 124k | {7337, 2101, 3, 4 }, |
18472 | | // AArch64_LDAPURSHXi - 405 |
18473 | 124k | {7337, 2105, 3, 4 }, |
18474 | | // AArch64_LDAPURSWi - 406 |
18475 | 124k | {7355, 2109, 3, 4 }, |
18476 | | // AArch64_LDAPURXi - 407 |
18477 | 124k | {7373, 2113, 3, 4 }, |
18478 | | // AArch64_LDAPURi - 408 |
18479 | 124k | {7373, 2117, 3, 4 }, |
18480 | | // AArch64_LDCLRB - 409 |
18481 | 124k | {7389, 2121, 3, 4 }, |
18482 | | // AArch64_LDCLRH - 410 |
18483 | 124k | {7405, 2125, 3, 4 }, |
18484 | | // AArch64_LDCLRLB - 411 |
18485 | 124k | {7421, 2129, 3, 4 }, |
18486 | | // AArch64_LDCLRLH - 412 |
18487 | 124k | {7438, 2133, 3, 4 }, |
18488 | | // AArch64_LDCLRLW - 413 |
18489 | 124k | {7455, 2137, 3, 4 }, |
18490 | | // AArch64_LDCLRLX - 414 |
18491 | 124k | {7455, 2141, 3, 4 }, |
18492 | | // AArch64_LDCLRW - 415 |
18493 | 124k | {7471, 2145, 3, 4 }, |
18494 | | // AArch64_LDCLRX - 416 |
18495 | 124k | {7471, 2149, 3, 4 }, |
18496 | | // AArch64_LDEORB - 417 |
18497 | 124k | {7486, 2153, 3, 4 }, |
18498 | | // AArch64_LDEORH - 418 |
18499 | 124k | {7502, 2157, 3, 4 }, |
18500 | | // AArch64_LDEORLB - 419 |
18501 | 124k | {7518, 2161, 3, 4 }, |
18502 | | // AArch64_LDEORLH - 420 |
18503 | 124k | {7535, 2165, 3, 4 }, |
18504 | | // AArch64_LDEORLW - 421 |
18505 | 124k | {7552, 2169, 3, 4 }, |
18506 | | // AArch64_LDEORLX - 422 |
18507 | 124k | {7552, 2173, 3, 4 }, |
18508 | | // AArch64_LDEORW - 423 |
18509 | 124k | {7568, 2177, 3, 4 }, |
18510 | | // AArch64_LDEORX - 424 |
18511 | 124k | {7568, 2181, 3, 4 }, |
18512 | | // AArch64_LDFF1B_D_REAL - 425 |
18513 | 124k | {7583, 2185, 4, 5 }, |
18514 | | // AArch64_LDFF1B_H_REAL - 426 |
18515 | 124k | {7609, 2190, 4, 5 }, |
18516 | | // AArch64_LDFF1B_REAL - 427 |
18517 | 124k | {7635, 2195, 4, 5 }, |
18518 | | // AArch64_LDFF1B_S_REAL - 428 |
18519 | 124k | {7661, 2200, 4, 5 }, |
18520 | | // AArch64_LDFF1D_REAL - 429 |
18521 | 124k | {7687, 2205, 4, 5 }, |
18522 | | // AArch64_LDFF1H_D_REAL - 430 |
18523 | 124k | {7713, 2210, 4, 5 }, |
18524 | | // AArch64_LDFF1H_REAL - 431 |
18525 | 124k | {7739, 2215, 4, 5 }, |
18526 | | // AArch64_LDFF1H_S_REAL - 432 |
18527 | 124k | {7765, 2220, 4, 5 }, |
18528 | | // AArch64_LDFF1SB_D_REAL - 433 |
18529 | 124k | {7791, 2225, 4, 5 }, |
18530 | | // AArch64_LDFF1SB_H_REAL - 434 |
18531 | 124k | {7818, 2230, 4, 5 }, |
18532 | | // AArch64_LDFF1SB_S_REAL - 435 |
18533 | 124k | {7845, 2235, 4, 5 }, |
18534 | | // AArch64_LDFF1SH_D_REAL - 436 |
18535 | 124k | {7872, 2240, 4, 5 }, |
18536 | | // AArch64_LDFF1SH_S_REAL - 437 |
18537 | 124k | {7899, 2245, 4, 5 }, |
18538 | | // AArch64_LDFF1SW_D_REAL - 438 |
18539 | 124k | {7926, 2250, 4, 5 }, |
18540 | | // AArch64_LDFF1W_D_REAL - 439 |
18541 | 124k | {7953, 2255, 4, 5 }, |
18542 | | // AArch64_LDFF1W_REAL - 440 |
18543 | 124k | {7979, 2260, 4, 5 }, |
18544 | | // AArch64_LDG - 441 |
18545 | 124k | {8005, 2265, 4, 5 }, |
18546 | | // AArch64_LDNF1B_D_IMM_REAL - 442 |
18547 | 124k | {8018, 2270, 4, 5 }, |
18548 | | // AArch64_LDNF1B_H_IMM_REAL - 443 |
18549 | 124k | {8044, 2275, 4, 5 }, |
18550 | | // AArch64_LDNF1B_IMM_REAL - 444 |
18551 | 124k | {8070, 2280, 4, 5 }, |
18552 | | // AArch64_LDNF1B_S_IMM_REAL - 445 |
18553 | 124k | {8096, 2285, 4, 5 }, |
18554 | | // AArch64_LDNF1D_IMM_REAL - 446 |
18555 | 124k | {8122, 2290, 4, 5 }, |
18556 | | // AArch64_LDNF1H_D_IMM_REAL - 447 |
18557 | 124k | {8148, 2295, 4, 5 }, |
18558 | | // AArch64_LDNF1H_IMM_REAL - 448 |
18559 | 124k | {8174, 2300, 4, 5 }, |
18560 | | // AArch64_LDNF1H_S_IMM_REAL - 449 |
18561 | 124k | {8200, 2305, 4, 5 }, |
18562 | | // AArch64_LDNF1SB_D_IMM_REAL - 450 |
18563 | 124k | {8226, 2310, 4, 5 }, |
18564 | | // AArch64_LDNF1SB_H_IMM_REAL - 451 |
18565 | 124k | {8253, 2315, 4, 5 }, |
18566 | | // AArch64_LDNF1SB_S_IMM_REAL - 452 |
18567 | 124k | {8280, 2320, 4, 5 }, |
18568 | | // AArch64_LDNF1SH_D_IMM_REAL - 453 |
18569 | 124k | {8307, 2325, 4, 5 }, |
18570 | | // AArch64_LDNF1SH_S_IMM_REAL - 454 |
18571 | 124k | {8334, 2330, 4, 5 }, |
18572 | | // AArch64_LDNF1SW_D_IMM_REAL - 455 |
18573 | 124k | {8361, 2335, 4, 5 }, |
18574 | | // AArch64_LDNF1W_D_IMM_REAL - 456 |
18575 | 124k | {8388, 2340, 4, 5 }, |
18576 | | // AArch64_LDNF1W_IMM_REAL - 457 |
18577 | 124k | {8414, 2345, 4, 5 }, |
18578 | | // AArch64_LDNPDi - 458 |
18579 | 124k | {8440, 2350, 4, 4 }, |
18580 | | // AArch64_LDNPQi - 459 |
18581 | 124k | {8440, 2354, 4, 4 }, |
18582 | | // AArch64_LDNPSi - 460 |
18583 | 124k | {8440, 2358, 4, 4 }, |
18584 | | // AArch64_LDNPWi - 461 |
18585 | 124k | {8440, 2362, 4, 4 }, |
18586 | | // AArch64_LDNPXi - 462 |
18587 | 124k | {8440, 2366, 4, 4 }, |
18588 | | // AArch64_LDNT1B_ZRI - 463 |
18589 | 124k | {8458, 2370, 4, 7 }, |
18590 | | // AArch64_LDNT1B_ZZR_D_REAL - 464 |
18591 | 124k | {8484, 2377, 4, 5 }, |
18592 | | // AArch64_LDNT1B_ZZR_S_REAL - 465 |
18593 | 124k | {8512, 2382, 4, 5 }, |
18594 | | // AArch64_LDNT1D_ZRI - 466 |
18595 | 124k | {8540, 2387, 4, 7 }, |
18596 | | // AArch64_LDNT1D_ZZR_D_REAL - 467 |
18597 | 124k | {8566, 2394, 4, 5 }, |
18598 | | // AArch64_LDNT1H_ZRI - 468 |
18599 | 124k | {8594, 2399, 4, 7 }, |
18600 | | // AArch64_LDNT1H_ZZR_D_REAL - 469 |
18601 | 124k | {8620, 2406, 4, 5 }, |
18602 | | // AArch64_LDNT1H_ZZR_S_REAL - 470 |
18603 | 124k | {8648, 2411, 4, 5 }, |
18604 | | // AArch64_LDNT1SB_ZZR_D_REAL - 471 |
18605 | 124k | {8676, 2416, 4, 5 }, |
18606 | | // AArch64_LDNT1SB_ZZR_S_REAL - 472 |
18607 | 124k | {8705, 2421, 4, 5 }, |
18608 | | // AArch64_LDNT1SH_ZZR_D_REAL - 473 |
18609 | 124k | {8734, 2426, 4, 5 }, |
18610 | | // AArch64_LDNT1SH_ZZR_S_REAL - 474 |
18611 | 124k | {8763, 2431, 4, 5 }, |
18612 | | // AArch64_LDNT1SW_ZZR_D_REAL - 475 |
18613 | 124k | {8792, 2436, 4, 5 }, |
18614 | | // AArch64_LDNT1W_ZRI - 476 |
18615 | 124k | {8821, 2441, 4, 7 }, |
18616 | | // AArch64_LDNT1W_ZZR_D_REAL - 477 |
18617 | 124k | {8847, 2448, 4, 5 }, |
18618 | | // AArch64_LDNT1W_ZZR_S_REAL - 478 |
18619 | 124k | {8875, 2453, 4, 5 }, |
18620 | | // AArch64_LDPDi - 479 |
18621 | 124k | {8903, 2458, 4, 4 }, |
18622 | | // AArch64_LDPQi - 480 |
18623 | 124k | {8903, 2462, 4, 4 }, |
18624 | | // AArch64_LDPSWi - 481 |
18625 | 124k | {8920, 2466, 4, 4 }, |
18626 | | // AArch64_LDPSi - 482 |
18627 | 124k | {8903, 2470, 4, 4 }, |
18628 | | // AArch64_LDPWi - 483 |
18629 | 124k | {8903, 2474, 4, 4 }, |
18630 | | // AArch64_LDPXi - 484 |
18631 | 124k | {8903, 2478, 4, 4 }, |
18632 | | // AArch64_LDRAAindexed - 485 |
18633 | 124k | {8939, 2482, 3, 4 }, |
18634 | | // AArch64_LDRABindexed - 486 |
18635 | 124k | {8954, 2486, 3, 4 }, |
18636 | | // AArch64_LDRBBroX - 487 |
18637 | 124k | {8969, 2490, 5, 5 }, |
18638 | | // AArch64_LDRBBui - 488 |
18639 | 124k | {8987, 2495, 3, 3 }, |
18640 | | // AArch64_LDRBroX - 489 |
18641 | 124k | {9001, 2498, 5, 5 }, |
18642 | | // AArch64_LDRBui - 490 |
18643 | 124k | {9018, 2503, 3, 3 }, |
18644 | | // AArch64_LDRDroX - 491 |
18645 | 124k | {9001, 2506, 5, 5 }, |
18646 | | // AArch64_LDRDui - 492 |
18647 | 124k | {9018, 2511, 3, 3 }, |
18648 | | // AArch64_LDRHHroX - 493 |
18649 | 124k | {9031, 2514, 5, 5 }, |
18650 | | // AArch64_LDRHHui - 494 |
18651 | 124k | {9049, 2519, 3, 3 }, |
18652 | | // AArch64_LDRHroX - 495 |
18653 | 124k | {9001, 2522, 5, 5 }, |
18654 | | // AArch64_LDRHui - 496 |
18655 | 124k | {9018, 2527, 3, 3 }, |
18656 | | // AArch64_LDRQroX - 497 |
18657 | 124k | {9001, 2530, 5, 5 }, |
18658 | | // AArch64_LDRQui - 498 |
18659 | 124k | {9018, 2535, 3, 3 }, |
18660 | | // AArch64_LDRSBWroX - 499 |
18661 | 124k | {9063, 2538, 5, 5 }, |
18662 | | // AArch64_LDRSBWui - 500 |
18663 | 124k | {9082, 2543, 3, 3 }, |
18664 | | // AArch64_LDRSBXroX - 501 |
18665 | 124k | {9063, 2546, 5, 5 }, |
18666 | | // AArch64_LDRSBXui - 502 |
18667 | 124k | {9082, 2551, 3, 3 }, |
18668 | | // AArch64_LDRSHWroX - 503 |
18669 | 124k | {9097, 2554, 5, 5 }, |
18670 | | // AArch64_LDRSHWui - 504 |
18671 | 124k | {9116, 2559, 3, 3 }, |
18672 | | // AArch64_LDRSHXroX - 505 |
18673 | 124k | {9097, 2562, 5, 5 }, |
18674 | | // AArch64_LDRSHXui - 506 |
18675 | 124k | {9116, 2567, 3, 3 }, |
18676 | | // AArch64_LDRSWroX - 507 |
18677 | 124k | {9131, 2570, 5, 5 }, |
18678 | | // AArch64_LDRSWui - 508 |
18679 | 124k | {9150, 2575, 3, 3 }, |
18680 | | // AArch64_LDRSroX - 509 |
18681 | 124k | {9001, 2578, 5, 5 }, |
18682 | | // AArch64_LDRSui - 510 |
18683 | 124k | {9018, 2583, 3, 3 }, |
18684 | | // AArch64_LDRWroX - 511 |
18685 | 124k | {9001, 2586, 5, 5 }, |
18686 | | // AArch64_LDRWui - 512 |
18687 | 124k | {9018, 2591, 3, 3 }, |
18688 | | // AArch64_LDRXroX - 513 |
18689 | 124k | {9001, 2594, 5, 5 }, |
18690 | | // AArch64_LDRXui - 514 |
18691 | 124k | {9018, 2599, 3, 3 }, |
18692 | | // AArch64_LDR_PXI - 515 |
18693 | 124k | {9165, 2602, 3, 6 }, |
18694 | | // AArch64_LDR_ZA - 516 |
18695 | 124k | {9180, 2608, 5, 6 }, |
18696 | | // AArch64_LDR_ZXI - 517 |
18697 | 124k | {9165, 2614, 3, 6 }, |
18698 | | // AArch64_LDSETB - 518 |
18699 | 124k | {9205, 2620, 3, 4 }, |
18700 | | // AArch64_LDSETH - 519 |
18701 | 124k | {9221, 2624, 3, 4 }, |
18702 | | // AArch64_LDSETLB - 520 |
18703 | 124k | {9237, 2628, 3, 4 }, |
18704 | | // AArch64_LDSETLH - 521 |
18705 | 124k | {9254, 2632, 3, 4 }, |
18706 | | // AArch64_LDSETLW - 522 |
18707 | 124k | {9271, 2636, 3, 4 }, |
18708 | | // AArch64_LDSETLX - 523 |
18709 | 124k | {9271, 2640, 3, 4 }, |
18710 | | // AArch64_LDSETW - 524 |
18711 | 124k | {9287, 2644, 3, 4 }, |
18712 | | // AArch64_LDSETX - 525 |
18713 | 124k | {9287, 2648, 3, 4 }, |
18714 | | // AArch64_LDSMAXB - 526 |
18715 | 124k | {9302, 2652, 3, 4 }, |
18716 | | // AArch64_LDSMAXH - 527 |
18717 | 124k | {9319, 2656, 3, 4 }, |
18718 | | // AArch64_LDSMAXLB - 528 |
18719 | 124k | {9336, 2660, 3, 4 }, |
18720 | | // AArch64_LDSMAXLH - 529 |
18721 | 124k | {9354, 2664, 3, 4 }, |
18722 | | // AArch64_LDSMAXLW - 530 |
18723 | 124k | {9372, 2668, 3, 4 }, |
18724 | | // AArch64_LDSMAXLX - 531 |
18725 | 124k | {9372, 2672, 3, 4 }, |
18726 | | // AArch64_LDSMAXW - 532 |
18727 | 124k | {9389, 2676, 3, 4 }, |
18728 | | // AArch64_LDSMAXX - 533 |
18729 | 124k | {9389, 2680, 3, 4 }, |
18730 | | // AArch64_LDSMINB - 534 |
18731 | 124k | {9405, 2684, 3, 4 }, |
18732 | | // AArch64_LDSMINH - 535 |
18733 | 124k | {9422, 2688, 3, 4 }, |
18734 | | // AArch64_LDSMINLB - 536 |
18735 | 124k | {9439, 2692, 3, 4 }, |
18736 | | // AArch64_LDSMINLH - 537 |
18737 | 124k | {9457, 2696, 3, 4 }, |
18738 | | // AArch64_LDSMINLW - 538 |
18739 | 124k | {9475, 2700, 3, 4 }, |
18740 | | // AArch64_LDSMINLX - 539 |
18741 | 124k | {9475, 2704, 3, 4 }, |
18742 | | // AArch64_LDSMINW - 540 |
18743 | 124k | {9492, 2708, 3, 4 }, |
18744 | | // AArch64_LDSMINX - 541 |
18745 | 124k | {9492, 2712, 3, 4 }, |
18746 | | // AArch64_LDTRBi - 542 |
18747 | 124k | {9508, 2716, 3, 3 }, |
18748 | | // AArch64_LDTRHi - 543 |
18749 | 124k | {9523, 2719, 3, 3 }, |
18750 | | // AArch64_LDTRSBWi - 544 |
18751 | 124k | {9538, 2722, 3, 3 }, |
18752 | | // AArch64_LDTRSBXi - 545 |
18753 | 124k | {9538, 2725, 3, 3 }, |
18754 | | // AArch64_LDTRSHWi - 546 |
18755 | 124k | {9554, 2728, 3, 3 }, |
18756 | | // AArch64_LDTRSHXi - 547 |
18757 | 124k | {9554, 2731, 3, 3 }, |
18758 | | // AArch64_LDTRSWi - 548 |
18759 | 124k | {9570, 2734, 3, 3 }, |
18760 | | // AArch64_LDTRWi - 549 |
18761 | 124k | {9586, 2737, 3, 3 }, |
18762 | | // AArch64_LDTRXi - 550 |
18763 | 124k | {9586, 2740, 3, 3 }, |
18764 | | // AArch64_LDUMAXB - 551 |
18765 | 124k | {9600, 2743, 3, 4 }, |
18766 | | // AArch64_LDUMAXH - 552 |
18767 | 124k | {9617, 2747, 3, 4 }, |
18768 | | // AArch64_LDUMAXLB - 553 |
18769 | 124k | {9634, 2751, 3, 4 }, |
18770 | | // AArch64_LDUMAXLH - 554 |
18771 | 124k | {9652, 2755, 3, 4 }, |
18772 | | // AArch64_LDUMAXLW - 555 |
18773 | 124k | {9670, 2759, 3, 4 }, |
18774 | | // AArch64_LDUMAXLX - 556 |
18775 | 124k | {9670, 2763, 3, 4 }, |
18776 | | // AArch64_LDUMAXW - 557 |
18777 | 124k | {9687, 2767, 3, 4 }, |
18778 | | // AArch64_LDUMAXX - 558 |
18779 | 124k | {9687, 2771, 3, 4 }, |
18780 | | // AArch64_LDUMINB - 559 |
18781 | 124k | {9703, 2775, 3, 4 }, |
18782 | | // AArch64_LDUMINH - 560 |
18783 | 124k | {9720, 2779, 3, 4 }, |
18784 | | // AArch64_LDUMINLB - 561 |
18785 | 124k | {9737, 2783, 3, 4 }, |
18786 | | // AArch64_LDUMINLH - 562 |
18787 | 124k | {9755, 2787, 3, 4 }, |
18788 | | // AArch64_LDUMINLW - 563 |
18789 | 124k | {9773, 2791, 3, 4 }, |
18790 | | // AArch64_LDUMINLX - 564 |
18791 | 124k | {9773, 2795, 3, 4 }, |
18792 | | // AArch64_LDUMINW - 565 |
18793 | 124k | {9790, 2799, 3, 4 }, |
18794 | | // AArch64_LDUMINX - 566 |
18795 | 124k | {9790, 2803, 3, 4 }, |
18796 | | // AArch64_LDURBBi - 567 |
18797 | 124k | {9806, 2807, 3, 3 }, |
18798 | | // AArch64_LDURBi - 568 |
18799 | 124k | {9821, 2810, 3, 3 }, |
18800 | | // AArch64_LDURDi - 569 |
18801 | 124k | {9821, 2813, 3, 3 }, |
18802 | | // AArch64_LDURHHi - 570 |
18803 | 124k | {9835, 2816, 3, 3 }, |
18804 | | // AArch64_LDURHi - 571 |
18805 | 124k | {9821, 2819, 3, 3 }, |
18806 | | // AArch64_LDURQi - 572 |
18807 | 124k | {9821, 2822, 3, 3 }, |
18808 | | // AArch64_LDURSBWi - 573 |
18809 | 124k | {9850, 2825, 3, 3 }, |
18810 | | // AArch64_LDURSBXi - 574 |
18811 | 124k | {9850, 2828, 3, 3 }, |
18812 | | // AArch64_LDURSHWi - 575 |
18813 | 124k | {9866, 2831, 3, 3 }, |
18814 | | // AArch64_LDURSHXi - 576 |
18815 | 124k | {9866, 2834, 3, 3 }, |
18816 | | // AArch64_LDURSWi - 577 |
18817 | 124k | {9882, 2837, 3, 3 }, |
18818 | | // AArch64_LDURSi - 578 |
18819 | 124k | {9821, 2840, 3, 3 }, |
18820 | | // AArch64_LDURWi - 579 |
18821 | 124k | {9821, 2843, 3, 3 }, |
18822 | | // AArch64_LDURXi - 580 |
18823 | 124k | {9821, 2846, 3, 3 }, |
18824 | | // AArch64_MADDWrrr - 581 |
18825 | 124k | {9898, 2849, 4, 4 }, |
18826 | | // AArch64_MADDXrrr - 582 |
18827 | 124k | {9898, 2853, 4, 4 }, |
18828 | | // AArch64_MSRpstatesvcrImm1 - 583 |
18829 | 124k | {9913, 2857, 2, 3 }, |
18830 | 124k | {9921, 2860, 2, 3 }, |
18831 | 124k | {9932, 2863, 2, 3 }, |
18832 | 124k | {9943, 2866, 2, 3 }, |
18833 | 124k | {9950, 2869, 2, 3 }, |
18834 | 124k | {9960, 2872, 2, 3 }, |
18835 | | // AArch64_MSUBWrrr - 589 |
18836 | 124k | {9970, 2875, 4, 4 }, |
18837 | | // AArch64_MSUBXrrr - 590 |
18838 | 124k | {9970, 2879, 4, 4 }, |
18839 | | // AArch64_NOTv16i8 - 591 |
18840 | 124k | {9986, 2883, 2, 2 }, |
18841 | | // AArch64_NOTv8i8 - 592 |
18842 | 124k | {10009, 2885, 2, 2 }, |
18843 | | // AArch64_ORNWrs - 593 |
18844 | 124k | {10030, 2887, 4, 4 }, |
18845 | 124k | {10041, 2891, 4, 3 }, |
18846 | 124k | {10056, 2894, 4, 4 }, |
18847 | | // AArch64_ORNXrs - 596 |
18848 | 124k | {10030, 2898, 4, 4 }, |
18849 | 124k | {10041, 2902, 4, 3 }, |
18850 | 124k | {10056, 2905, 4, 4 }, |
18851 | | // AArch64_ORRS_PPzPP - 599 |
18852 | 124k | {10071, 2909, 4, 7 }, |
18853 | | // AArch64_ORRWrs - 600 |
18854 | 124k | {10087, 2916, 4, 4 }, |
18855 | 124k | {10098, 2920, 4, 4 }, |
18856 | | // AArch64_ORRXrs - 602 |
18857 | 124k | {10087, 2924, 4, 4 }, |
18858 | 124k | {10098, 2928, 4, 4 }, |
18859 | | // AArch64_ORR_PPzPP - 604 |
18860 | 124k | {10113, 2932, 4, 7 }, |
18861 | | // AArch64_ORR_ZI - 605 |
18862 | 124k | {10128, 2939, 3, 6 }, |
18863 | 124k | {10149, 2945, 3, 6 }, |
18864 | 124k | {10170, 2951, 3, 6 }, |
18865 | | // AArch64_ORR_ZZZ - 608 |
18866 | 124k | {10191, 2957, 3, 6 }, |
18867 | | // AArch64_ORRv16i8 - 609 |
18868 | 124k | {10206, 2963, 3, 3 }, |
18869 | | // AArch64_ORRv8i8 - 610 |
18870 | 124k | {10229, 2966, 3, 3 }, |
18871 | | // AArch64_PACIA1716 - 611 |
18872 | 124k | {10250, 2969, 0, 1 }, |
18873 | | // AArch64_PACIASP - 612 |
18874 | 124k | {10260, 2970, 0, 1 }, |
18875 | | // AArch64_PACIAZ - 613 |
18876 | 124k | {10268, 2971, 0, 1 }, |
18877 | | // AArch64_PACIB1716 - 614 |
18878 | 124k | {10275, 2972, 0, 1 }, |
18879 | | // AArch64_PACIBSP - 615 |
18880 | 124k | {10285, 2973, 0, 1 }, |
18881 | | // AArch64_PACIBZ - 616 |
18882 | 124k | {10293, 2974, 0, 1 }, |
18883 | | // AArch64_PRFB_D_PZI - 617 |
18884 | 124k | {10300, 2975, 4, 5 }, |
18885 | | // AArch64_PRFB_PRI - 618 |
18886 | 124k | {10324, 2980, 4, 7 }, |
18887 | | // AArch64_PRFB_S_PZI - 619 |
18888 | 124k | {10346, 2987, 4, 5 }, |
18889 | | // AArch64_PRFD_D_PZI - 620 |
18890 | 124k | {10370, 2992, 4, 5 }, |
18891 | | // AArch64_PRFD_PRI - 621 |
18892 | 124k | {10394, 2997, 4, 7 }, |
18893 | | // AArch64_PRFD_S_PZI - 622 |
18894 | 124k | {10416, 3004, 4, 5 }, |
18895 | | // AArch64_PRFH_D_PZI - 623 |
18896 | 124k | {10440, 3009, 4, 5 }, |
18897 | | // AArch64_PRFH_PRI - 624 |
18898 | 124k | {10464, 3014, 4, 7 }, |
18899 | | // AArch64_PRFH_S_PZI - 625 |
18900 | 124k | {10486, 3021, 4, 5 }, |
18901 | | // AArch64_PRFMroX - 626 |
18902 | 124k | {10510, 3026, 5, 5 }, |
18903 | | // AArch64_PRFMui - 627 |
18904 | 124k | {10530, 3031, 3, 3 }, |
18905 | | // AArch64_PRFUMi - 628 |
18906 | 124k | {10546, 3034, 3, 3 }, |
18907 | | // AArch64_PRFW_D_PZI - 629 |
18908 | 124k | {10563, 3037, 4, 5 }, |
18909 | | // AArch64_PRFW_PRI - 630 |
18910 | 124k | {10587, 3042, 4, 7 }, |
18911 | | // AArch64_PRFW_S_PZI - 631 |
18912 | 124k | {10609, 3049, 4, 5 }, |
18913 | | // AArch64_PTRUES_B - 632 |
18914 | 124k | {10633, 3054, 2, 5 }, |
18915 | | // AArch64_PTRUES_D - 633 |
18916 | 124k | {10645, 3059, 2, 5 }, |
18917 | | // AArch64_PTRUES_H - 634 |
18918 | 124k | {10657, 3064, 2, 5 }, |
18919 | | // AArch64_PTRUES_S - 635 |
18920 | 124k | {10669, 3069, 2, 5 }, |
18921 | | // AArch64_PTRUE_B - 636 |
18922 | 124k | {10681, 3074, 2, 5 }, |
18923 | | // AArch64_PTRUE_D - 637 |
18924 | 124k | {10692, 3079, 2, 5 }, |
18925 | | // AArch64_PTRUE_H - 638 |
18926 | 124k | {10703, 3084, 2, 5 }, |
18927 | | // AArch64_PTRUE_S - 639 |
18928 | 124k | {10714, 3089, 2, 5 }, |
18929 | | // AArch64_RET - 640 |
18930 | 124k | {10725, 3094, 1, 1 }, |
18931 | | // AArch64_SBCSWr - 641 |
18932 | 124k | {10729, 3095, 3, 3 }, |
18933 | | // AArch64_SBCSXr - 642 |
18934 | 124k | {10729, 3098, 3, 3 }, |
18935 | | // AArch64_SBCWr - 643 |
18936 | 124k | {10741, 3101, 3, 3 }, |
18937 | | // AArch64_SBCXr - 644 |
18938 | 124k | {10741, 3104, 3, 3 }, |
18939 | | // AArch64_SBFMWri - 645 |
18940 | 124k | {10752, 3107, 4, 4 }, |
18941 | 124k | {10767, 3111, 4, 4 }, |
18942 | 124k | {10779, 3115, 4, 4 }, |
18943 | | // AArch64_SBFMXri - 648 |
18944 | 124k | {10752, 3119, 4, 4 }, |
18945 | 124k | {10767, 3123, 4, 4 }, |
18946 | 124k | {10779, 3127, 4, 4 }, |
18947 | 124k | {10791, 3131, 4, 4 }, |
18948 | | // AArch64_SEL_PPPP - 652 |
18949 | 124k | {10803, 3135, 4, 7 }, |
18950 | | // AArch64_SEL_ZPZZ_B - 653 |
18951 | 124k | {10803, 3142, 4, 7 }, |
18952 | | // AArch64_SEL_ZPZZ_D - 654 |
18953 | 124k | {10826, 3149, 4, 7 }, |
18954 | | // AArch64_SEL_ZPZZ_H - 655 |
18955 | 124k | {10849, 3156, 4, 7 }, |
18956 | | // AArch64_SEL_ZPZZ_S - 656 |
18957 | 124k | {10872, 3163, 4, 7 }, |
18958 | | // AArch64_SMADDLrrr - 657 |
18959 | 124k | {10895, 3170, 4, 4 }, |
18960 | | // AArch64_SMSUBLrrr - 658 |
18961 | 124k | {10912, 3174, 4, 4 }, |
18962 | | // AArch64_SQDECB_XPiI - 659 |
18963 | 124k | {10930, 3178, 4, 7 }, |
18964 | 124k | {10940, 3185, 4, 7 }, |
18965 | | // AArch64_SQDECB_XPiWdI - 661 |
18966 | 124k | {10956, 3192, 4, 7 }, |
18967 | 124k | {10972, 3199, 4, 7 }, |
18968 | | // AArch64_SQDECD_XPiI - 663 |
18969 | 124k | {10994, 3206, 4, 7 }, |
18970 | 124k | {11004, 3213, 4, 7 }, |
18971 | | // AArch64_SQDECD_XPiWdI - 665 |
18972 | 124k | {11020, 3220, 4, 7 }, |
18973 | 124k | {11036, 3227, 4, 7 }, |
18974 | | // AArch64_SQDECD_ZPiI - 667 |
18975 | 124k | {11058, 3234, 4, 7 }, |
18976 | 124k | {11070, 3241, 4, 7 }, |
18977 | | // AArch64_SQDECH_XPiI - 669 |
18978 | 124k | {11088, 3248, 4, 7 }, |
18979 | 124k | {11098, 3255, 4, 7 }, |
18980 | | // AArch64_SQDECH_XPiWdI - 671 |
18981 | 124k | {11114, 3262, 4, 7 }, |
18982 | 124k | {11130, 3269, 4, 7 }, |
18983 | | // AArch64_SQDECH_ZPiI - 673 |
18984 | 124k | {11152, 3276, 4, 7 }, |
18985 | 124k | {11164, 3283, 4, 7 }, |
18986 | | // AArch64_SQDECW_XPiI - 675 |
18987 | 124k | {11182, 3290, 4, 7 }, |
18988 | 124k | {11192, 3297, 4, 7 }, |
18989 | | // AArch64_SQDECW_XPiWdI - 677 |
18990 | 124k | {11208, 3304, 4, 7 }, |
18991 | 124k | {11224, 3311, 4, 7 }, |
18992 | | // AArch64_SQDECW_ZPiI - 679 |
18993 | 124k | {11246, 3318, 4, 7 }, |
18994 | 124k | {11258, 3325, 4, 7 }, |
18995 | | // AArch64_SQINCB_XPiI - 681 |
18996 | 124k | {11276, 3332, 4, 7 }, |
18997 | 124k | {11286, 3339, 4, 7 }, |
18998 | | // AArch64_SQINCB_XPiWdI - 683 |
18999 | 124k | {11302, 3346, 4, 7 }, |
19000 | 124k | {11318, 3353, 4, 7 }, |
19001 | | // AArch64_SQINCD_XPiI - 685 |
19002 | 124k | {11340, 3360, 4, 7 }, |
19003 | 124k | {11350, 3367, 4, 7 }, |
19004 | | // AArch64_SQINCD_XPiWdI - 687 |
19005 | 124k | {11366, 3374, 4, 7 }, |
19006 | 124k | {11382, 3381, 4, 7 }, |
19007 | | // AArch64_SQINCD_ZPiI - 689 |
19008 | 124k | {11404, 3388, 4, 7 }, |
19009 | 124k | {11416, 3395, 4, 7 }, |
19010 | | // AArch64_SQINCH_XPiI - 691 |
19011 | 124k | {11434, 3402, 4, 7 }, |
19012 | 124k | {11444, 3409, 4, 7 }, |
19013 | | // AArch64_SQINCH_XPiWdI - 693 |
19014 | 124k | {11460, 3416, 4, 7 }, |
19015 | 124k | {11476, 3423, 4, 7 }, |
19016 | | // AArch64_SQINCH_ZPiI - 695 |
19017 | 124k | {11498, 3430, 4, 7 }, |
19018 | 124k | {11510, 3437, 4, 7 }, |
19019 | | // AArch64_SQINCW_XPiI - 697 |
19020 | 124k | {11528, 3444, 4, 7 }, |
19021 | 124k | {11538, 3451, 4, 7 }, |
19022 | | // AArch64_SQINCW_XPiWdI - 699 |
19023 | 124k | {11554, 3458, 4, 7 }, |
19024 | 124k | {11570, 3465, 4, 7 }, |
19025 | | // AArch64_SQINCW_ZPiI - 701 |
19026 | 124k | {11592, 3472, 4, 7 }, |
19027 | 124k | {11604, 3479, 4, 7 }, |
19028 | | // AArch64_SST1B_D_IMM - 703 |
19029 | 124k | {11622, 3486, 4, 5 }, |
19030 | | // AArch64_SST1B_S_IMM - 704 |
19031 | 124k | {11646, 3491, 4, 5 }, |
19032 | | // AArch64_SST1D_IMM - 705 |
19033 | 124k | {11670, 3496, 4, 5 }, |
19034 | | // AArch64_SST1H_D_IMM - 706 |
19035 | 124k | {11694, 3501, 4, 5 }, |
19036 | | // AArch64_SST1H_S_IMM - 707 |
19037 | 124k | {11718, 3506, 4, 5 }, |
19038 | | // AArch64_SST1W_D_IMM - 708 |
19039 | 124k | {11742, 3511, 4, 5 }, |
19040 | | // AArch64_SST1W_IMM - 709 |
19041 | 124k | {11766, 3516, 4, 5 }, |
19042 | | // AArch64_ST1B_D_IMM - 710 |
19043 | 124k | {11790, 3521, 4, 7 }, |
19044 | | // AArch64_ST1B_H_IMM - 711 |
19045 | 124k | {11812, 3528, 4, 7 }, |
19046 | | // AArch64_ST1B_IMM - 712 |
19047 | 124k | {11834, 3535, 4, 7 }, |
19048 | | // AArch64_ST1B_S_IMM - 713 |
19049 | 124k | {11856, 3542, 4, 7 }, |
19050 | | // AArch64_ST1D_IMM - 714 |
19051 | 124k | {11878, 3549, 4, 7 }, |
19052 | | // AArch64_ST1Fourv16b_POST - 715 |
19053 | 124k | {11900, 3556, 4, 5 }, |
19054 | | // AArch64_ST1Fourv1d_POST - 716 |
19055 | 124k | {11920, 3561, 4, 5 }, |
19056 | | // AArch64_ST1Fourv2d_POST - 717 |
19057 | 124k | {11940, 3566, 4, 5 }, |
19058 | | // AArch64_ST1Fourv2s_POST - 718 |
19059 | 124k | {11960, 3571, 4, 5 }, |
19060 | | // AArch64_ST1Fourv4h_POST - 719 |
19061 | 124k | {11980, 3576, 4, 5 }, |
19062 | | // AArch64_ST1Fourv4s_POST - 720 |
19063 | 124k | {12000, 3581, 4, 5 }, |
19064 | | // AArch64_ST1Fourv8b_POST - 721 |
19065 | 124k | {12020, 3586, 4, 5 }, |
19066 | | // AArch64_ST1Fourv8h_POST - 722 |
19067 | 124k | {12040, 3591, 4, 5 }, |
19068 | | // AArch64_ST1H_D_IMM - 723 |
19069 | 124k | {12060, 3596, 4, 7 }, |
19070 | | // AArch64_ST1H_IMM - 724 |
19071 | 124k | {12082, 3603, 4, 7 }, |
19072 | | // AArch64_ST1H_S_IMM - 725 |
19073 | 124k | {12104, 3610, 4, 7 }, |
19074 | | // AArch64_ST1Onev16b_POST - 726 |
19075 | 124k | {12126, 3617, 4, 5 }, |
19076 | | // AArch64_ST1Onev1d_POST - 727 |
19077 | 124k | {12146, 3622, 4, 5 }, |
19078 | | // AArch64_ST1Onev2d_POST - 728 |
19079 | 124k | {12165, 3627, 4, 5 }, |
19080 | | // AArch64_ST1Onev2s_POST - 729 |
19081 | 124k | {12185, 3632, 4, 5 }, |
19082 | | // AArch64_ST1Onev4h_POST - 730 |
19083 | 124k | {12204, 3637, 4, 5 }, |
19084 | | // AArch64_ST1Onev4s_POST - 731 |
19085 | 124k | {12223, 3642, 4, 5 }, |
19086 | | // AArch64_ST1Onev8b_POST - 732 |
19087 | 124k | {12243, 3647, 4, 5 }, |
19088 | | // AArch64_ST1Onev8h_POST - 733 |
19089 | 124k | {12262, 3652, 4, 5 }, |
19090 | | // AArch64_ST1Threev16b_POST - 734 |
19091 | 124k | {12282, 3657, 4, 5 }, |
19092 | | // AArch64_ST1Threev1d_POST - 735 |
19093 | 124k | {12302, 3662, 4, 5 }, |
19094 | | // AArch64_ST1Threev2d_POST - 736 |
19095 | 124k | {12322, 3667, 4, 5 }, |
19096 | | // AArch64_ST1Threev2s_POST - 737 |
19097 | 124k | {12342, 3672, 4, 5 }, |
19098 | | // AArch64_ST1Threev4h_POST - 738 |
19099 | 124k | {12362, 3677, 4, 5 }, |
19100 | | // AArch64_ST1Threev4s_POST - 739 |
19101 | 124k | {12382, 3682, 4, 5 }, |
19102 | | // AArch64_ST1Threev8b_POST - 740 |
19103 | 124k | {12402, 3687, 4, 5 }, |
19104 | | // AArch64_ST1Threev8h_POST - 741 |
19105 | 124k | {12422, 3692, 4, 5 }, |
19106 | | // AArch64_ST1Twov16b_POST - 742 |
19107 | 124k | {12442, 3697, 4, 5 }, |
19108 | | // AArch64_ST1Twov1d_POST - 743 |
19109 | 124k | {12462, 3702, 4, 5 }, |
19110 | | // AArch64_ST1Twov2d_POST - 744 |
19111 | 124k | {12482, 3707, 4, 5 }, |
19112 | | // AArch64_ST1Twov2s_POST - 745 |
19113 | 124k | {12502, 3712, 4, 5 }, |
19114 | | // AArch64_ST1Twov4h_POST - 746 |
19115 | 124k | {12522, 3717, 4, 5 }, |
19116 | | // AArch64_ST1Twov4s_POST - 747 |
19117 | 124k | {12542, 3722, 4, 5 }, |
19118 | | // AArch64_ST1Twov8b_POST - 748 |
19119 | 124k | {12562, 3727, 4, 5 }, |
19120 | | // AArch64_ST1Twov8h_POST - 749 |
19121 | 124k | {12582, 3732, 4, 5 }, |
19122 | | // AArch64_ST1W_D_IMM - 750 |
19123 | 124k | {12602, 3737, 4, 7 }, |
19124 | | // AArch64_ST1W_IMM - 751 |
19125 | 124k | {12624, 3744, 4, 7 }, |
19126 | | // AArch64_ST1_MXIPXX_H_B - 752 |
19127 | 124k | {12646, 3751, 6, 7 }, |
19128 | | // AArch64_ST1_MXIPXX_H_D - 753 |
19129 | 124k | {12680, 3758, 6, 7 }, |
19130 | | // AArch64_ST1_MXIPXX_H_H - 754 |
19131 | 124k | {12714, 3765, 6, 7 }, |
19132 | | // AArch64_ST1_MXIPXX_H_Q - 755 |
19133 | 124k | {12748, 3772, 6, 7 }, |
19134 | | // AArch64_ST1_MXIPXX_H_S - 756 |
19135 | 124k | {12782, 3779, 6, 7 }, |
19136 | | // AArch64_ST1_MXIPXX_V_B - 757 |
19137 | 124k | {12816, 3786, 6, 7 }, |
19138 | | // AArch64_ST1_MXIPXX_V_D - 758 |
19139 | 124k | {12850, 3793, 6, 7 }, |
19140 | | // AArch64_ST1_MXIPXX_V_H - 759 |
19141 | 124k | {12884, 3800, 6, 7 }, |
19142 | | // AArch64_ST1_MXIPXX_V_Q - 760 |
19143 | 124k | {12918, 3807, 6, 7 }, |
19144 | | // AArch64_ST1_MXIPXX_V_S - 761 |
19145 | 124k | {12952, 3814, 6, 7 }, |
19146 | | // AArch64_ST1i16_POST - 762 |
19147 | 124k | {12986, 3821, 5, 6 }, |
19148 | | // AArch64_ST1i32_POST - 763 |
19149 | 124k | {13009, 3827, 5, 6 }, |
19150 | | // AArch64_ST1i64_POST - 764 |
19151 | 124k | {13032, 3833, 5, 6 }, |
19152 | | // AArch64_ST1i8_POST - 765 |
19153 | 124k | {13055, 3839, 5, 6 }, |
19154 | | // AArch64_ST2B_IMM - 766 |
19155 | 124k | {13078, 3845, 4, 7 }, |
19156 | | // AArch64_ST2D_IMM - 767 |
19157 | 124k | {13100, 3852, 4, 7 }, |
19158 | | // AArch64_ST2GOffset - 768 |
19159 | 124k | {13122, 3859, 3, 4 }, |
19160 | | // AArch64_ST2H_IMM - 769 |
19161 | 124k | {13136, 3863, 4, 7 }, |
19162 | | // AArch64_ST2Twov16b_POST - 770 |
19163 | 124k | {13158, 3870, 4, 5 }, |
19164 | | // AArch64_ST2Twov2d_POST - 771 |
19165 | 124k | {13178, 3875, 4, 5 }, |
19166 | | // AArch64_ST2Twov2s_POST - 772 |
19167 | 124k | {13198, 3880, 4, 5 }, |
19168 | | // AArch64_ST2Twov4h_POST - 773 |
19169 | 124k | {13218, 3885, 4, 5 }, |
19170 | | // AArch64_ST2Twov4s_POST - 774 |
19171 | 124k | {13238, 3890, 4, 5 }, |
19172 | | // AArch64_ST2Twov8b_POST - 775 |
19173 | 124k | {13258, 3895, 4, 5 }, |
19174 | | // AArch64_ST2Twov8h_POST - 776 |
19175 | 124k | {13278, 3900, 4, 5 }, |
19176 | | // AArch64_ST2W_IMM - 777 |
19177 | 124k | {13298, 3905, 4, 7 }, |
19178 | | // AArch64_ST2i16_POST - 778 |
19179 | 124k | {13320, 3912, 5, 6 }, |
19180 | | // AArch64_ST2i32_POST - 779 |
19181 | 124k | {13343, 3918, 5, 6 }, |
19182 | | // AArch64_ST2i64_POST - 780 |
19183 | 124k | {13366, 3924, 5, 6 }, |
19184 | | // AArch64_ST2i8_POST - 781 |
19185 | 124k | {13390, 3930, 5, 6 }, |
19186 | | // AArch64_ST3B_IMM - 782 |
19187 | 124k | {13413, 3936, 4, 7 }, |
19188 | | // AArch64_ST3D_IMM - 783 |
19189 | 124k | {13435, 3943, 4, 7 }, |
19190 | | // AArch64_ST3H_IMM - 784 |
19191 | 124k | {13457, 3950, 4, 7 }, |
19192 | | // AArch64_ST3Threev16b_POST - 785 |
19193 | 124k | {13479, 3957, 4, 5 }, |
19194 | | // AArch64_ST3Threev2d_POST - 786 |
19195 | 124k | {13499, 3962, 4, 5 }, |
19196 | | // AArch64_ST3Threev2s_POST - 787 |
19197 | 124k | {13519, 3967, 4, 5 }, |
19198 | | // AArch64_ST3Threev4h_POST - 788 |
19199 | 124k | {13539, 3972, 4, 5 }, |
19200 | | // AArch64_ST3Threev4s_POST - 789 |
19201 | 124k | {13559, 3977, 4, 5 }, |
19202 | | // AArch64_ST3Threev8b_POST - 790 |
19203 | 124k | {13579, 3982, 4, 5 }, |
19204 | | // AArch64_ST3Threev8h_POST - 791 |
19205 | 124k | {13599, 3987, 4, 5 }, |
19206 | | // AArch64_ST3W_IMM - 792 |
19207 | 124k | {13619, 3992, 4, 7 }, |
19208 | | // AArch64_ST3i16_POST - 793 |
19209 | 124k | {13641, 3999, 5, 6 }, |
19210 | | // AArch64_ST3i32_POST - 794 |
19211 | 124k | {13664, 4005, 5, 6 }, |
19212 | | // AArch64_ST3i64_POST - 795 |
19213 | 124k | {13688, 4011, 5, 6 }, |
19214 | | // AArch64_ST3i8_POST - 796 |
19215 | 124k | {13712, 4017, 5, 6 }, |
19216 | | // AArch64_ST4B_IMM - 797 |
19217 | 124k | {13735, 4023, 4, 7 }, |
19218 | | // AArch64_ST4D_IMM - 798 |
19219 | 124k | {13757, 4030, 4, 7 }, |
19220 | | // AArch64_ST4Fourv16b_POST - 799 |
19221 | 124k | {13779, 4037, 4, 5 }, |
19222 | | // AArch64_ST4Fourv2d_POST - 800 |
19223 | 124k | {13799, 4042, 4, 5 }, |
19224 | | // AArch64_ST4Fourv2s_POST - 801 |
19225 | 124k | {13819, 4047, 4, 5 }, |
19226 | | // AArch64_ST4Fourv4h_POST - 802 |
19227 | 124k | {13839, 4052, 4, 5 }, |
19228 | | // AArch64_ST4Fourv4s_POST - 803 |
19229 | 124k | {13859, 4057, 4, 5 }, |
19230 | | // AArch64_ST4Fourv8b_POST - 804 |
19231 | 124k | {13879, 4062, 4, 5 }, |
19232 | | // AArch64_ST4Fourv8h_POST - 805 |
19233 | 124k | {13899, 4067, 4, 5 }, |
19234 | | // AArch64_ST4H_IMM - 806 |
19235 | 124k | {13919, 4072, 4, 7 }, |
19236 | | // AArch64_ST4W_IMM - 807 |
19237 | 124k | {13941, 4079, 4, 7 }, |
19238 | | // AArch64_ST4i16_POST - 808 |
19239 | 124k | {13963, 4086, 5, 6 }, |
19240 | | // AArch64_ST4i32_POST - 809 |
19241 | 124k | {13986, 4092, 5, 6 }, |
19242 | | // AArch64_ST4i64_POST - 810 |
19243 | 124k | {14010, 4098, 5, 6 }, |
19244 | | // AArch64_ST4i8_POST - 811 |
19245 | 124k | {14034, 4104, 5, 6 }, |
19246 | | // AArch64_STGOffset - 812 |
19247 | 124k | {14057, 4110, 3, 4 }, |
19248 | | // AArch64_STGPi - 813 |
19249 | 124k | {14070, 4114, 4, 5 }, |
19250 | | // AArch64_STLURBi - 814 |
19251 | 124k | {14088, 4119, 3, 4 }, |
19252 | | // AArch64_STLURHi - 815 |
19253 | 124k | {14104, 4123, 3, 4 }, |
19254 | | // AArch64_STLURWi - 816 |
19255 | 124k | {14120, 4127, 3, 4 }, |
19256 | | // AArch64_STLURXi - 817 |
19257 | 124k | {14120, 4131, 3, 4 }, |
19258 | | // AArch64_STNPDi - 818 |
19259 | 124k | {14135, 4135, 4, 4 }, |
19260 | | // AArch64_STNPQi - 819 |
19261 | 124k | {14135, 4139, 4, 4 }, |
19262 | | // AArch64_STNPSi - 820 |
19263 | 124k | {14135, 4143, 4, 4 }, |
19264 | | // AArch64_STNPWi - 821 |
19265 | 124k | {14135, 4147, 4, 4 }, |
19266 | | // AArch64_STNPXi - 822 |
19267 | 124k | {14135, 4151, 4, 4 }, |
19268 | | // AArch64_STNT1B_ZRI - 823 |
19269 | 124k | {14153, 4155, 4, 7 }, |
19270 | | // AArch64_STNT1B_ZZR_D_REAL - 824 |
19271 | 124k | {14177, 4162, 4, 5 }, |
19272 | | // AArch64_STNT1B_ZZR_S_REAL - 825 |
19273 | 124k | {14203, 4167, 4, 5 }, |
19274 | | // AArch64_STNT1D_ZRI - 826 |
19275 | 124k | {14229, 4172, 4, 7 }, |
19276 | | // AArch64_STNT1D_ZZR_D_REAL - 827 |
19277 | 124k | {14253, 4179, 4, 5 }, |
19278 | | // AArch64_STNT1H_ZRI - 828 |
19279 | 124k | {14279, 4184, 4, 7 }, |
19280 | | // AArch64_STNT1H_ZZR_D_REAL - 829 |
19281 | 124k | {14303, 4191, 4, 5 }, |
19282 | | // AArch64_STNT1H_ZZR_S_REAL - 830 |
19283 | 124k | {14329, 4196, 4, 5 }, |
19284 | | // AArch64_STNT1W_ZRI - 831 |
19285 | 124k | {14355, 4201, 4, 7 }, |
19286 | | // AArch64_STNT1W_ZZR_D_REAL - 832 |
19287 | 124k | {14379, 4208, 4, 5 }, |
19288 | | // AArch64_STNT1W_ZZR_S_REAL - 833 |
19289 | 124k | {14405, 4213, 4, 5 }, |
19290 | | // AArch64_STPDi - 834 |
19291 | 124k | {14431, 4218, 4, 4 }, |
19292 | | // AArch64_STPQi - 835 |
19293 | 124k | {14431, 4222, 4, 4 }, |
19294 | | // AArch64_STPSi - 836 |
19295 | 124k | {14431, 4226, 4, 4 }, |
19296 | | // AArch64_STPWi - 837 |
19297 | 124k | {14431, 4230, 4, 4 }, |
19298 | | // AArch64_STPXi - 838 |
19299 | 124k | {14431, 4234, 4, 4 }, |
19300 | | // AArch64_STRBBroX - 839 |
19301 | 124k | {14448, 4238, 5, 5 }, |
19302 | | // AArch64_STRBBui - 840 |
19303 | 124k | {14466, 4243, 3, 3 }, |
19304 | | // AArch64_STRBroX - 841 |
19305 | 124k | {14480, 4246, 5, 5 }, |
19306 | | // AArch64_STRBui - 842 |
19307 | 124k | {14497, 4251, 3, 3 }, |
19308 | | // AArch64_STRDroX - 843 |
19309 | 124k | {14480, 4254, 5, 5 }, |
19310 | | // AArch64_STRDui - 844 |
19311 | 124k | {14497, 4259, 3, 3 }, |
19312 | | // AArch64_STRHHroX - 845 |
19313 | 124k | {14510, 4262, 5, 5 }, |
19314 | | // AArch64_STRHHui - 846 |
19315 | 124k | {14528, 4267, 3, 3 }, |
19316 | | // AArch64_STRHroX - 847 |
19317 | 124k | {14480, 4270, 5, 5 }, |
19318 | | // AArch64_STRHui - 848 |
19319 | 124k | {14497, 4275, 3, 3 }, |
19320 | | // AArch64_STRQroX - 849 |
19321 | 124k | {14480, 4278, 5, 5 }, |
19322 | | // AArch64_STRQui - 850 |
19323 | 124k | {14497, 4283, 3, 3 }, |
19324 | | // AArch64_STRSroX - 851 |
19325 | 124k | {14480, 4286, 5, 5 }, |
19326 | | // AArch64_STRSui - 852 |
19327 | 124k | {14497, 4291, 3, 3 }, |
19328 | | // AArch64_STRWroX - 853 |
19329 | 124k | {14480, 4294, 5, 5 }, |
19330 | | // AArch64_STRWui - 854 |
19331 | 124k | {14497, 4299, 3, 3 }, |
19332 | | // AArch64_STRXroX - 855 |
19333 | 124k | {14480, 4302, 5, 5 }, |
19334 | | // AArch64_STRXui - 856 |
19335 | 124k | {14497, 4307, 3, 3 }, |
19336 | | // AArch64_STR_PXI - 857 |
19337 | 124k | {14542, 4310, 3, 6 }, |
19338 | | // AArch64_STR_ZA - 858 |
19339 | 124k | {14557, 4316, 5, 6 }, |
19340 | | // AArch64_STR_ZXI - 859 |
19341 | 124k | {14542, 4322, 3, 6 }, |
19342 | | // AArch64_STTRBi - 860 |
19343 | 124k | {14582, 4328, 3, 3 }, |
19344 | | // AArch64_STTRHi - 861 |
19345 | 124k | {14597, 4331, 3, 3 }, |
19346 | | // AArch64_STTRWi - 862 |
19347 | 124k | {14612, 4334, 3, 3 }, |
19348 | | // AArch64_STTRXi - 863 |
19349 | 124k | {14612, 4337, 3, 3 }, |
19350 | | // AArch64_STURBBi - 864 |
19351 | 124k | {14626, 4340, 3, 3 }, |
19352 | | // AArch64_STURBi - 865 |
19353 | 124k | {14641, 4343, 3, 3 }, |
19354 | | // AArch64_STURDi - 866 |
19355 | 124k | {14641, 4346, 3, 3 }, |
19356 | | // AArch64_STURHHi - 867 |
19357 | 124k | {14655, 4349, 3, 3 }, |
19358 | | // AArch64_STURHi - 868 |
19359 | 124k | {14641, 4352, 3, 3 }, |
19360 | | // AArch64_STURQi - 869 |
19361 | 124k | {14641, 4355, 3, 3 }, |
19362 | | // AArch64_STURSi - 870 |
19363 | 124k | {14641, 4358, 3, 3 }, |
19364 | | // AArch64_STURWi - 871 |
19365 | 124k | {14641, 4361, 3, 3 }, |
19366 | | // AArch64_STURXi - 872 |
19367 | 124k | {14641, 4364, 3, 3 }, |
19368 | | // AArch64_STZ2GOffset - 873 |
19369 | 124k | {14670, 4367, 3, 4 }, |
19370 | | // AArch64_STZGOffset - 874 |
19371 | 124k | {14685, 4371, 3, 4 }, |
19372 | | // AArch64_SUBSWri - 875 |
19373 | 124k | {14699, 4375, 4, 2 }, |
19374 | | // AArch64_SUBSWrs - 876 |
19375 | 124k | {14712, 4377, 4, 4 }, |
19376 | 124k | {14723, 4381, 4, 3 }, |
19377 | 124k | {14738, 4384, 4, 4 }, |
19378 | 124k | {14750, 4388, 4, 3 }, |
19379 | 124k | {14766, 4391, 4, 4 }, |
19380 | | // AArch64_SUBSWrx - 881 |
19381 | 124k | {14712, 4395, 4, 4 }, |
19382 | 124k | {14782, 4399, 4, 3 }, |
19383 | 124k | {14766, 4402, 4, 4 }, |
19384 | | // AArch64_SUBSXri - 884 |
19385 | 124k | {14699, 4406, 4, 2 }, |
19386 | | // AArch64_SUBSXrs - 885 |
19387 | 124k | {14712, 4408, 4, 4 }, |
19388 | 124k | {14723, 4412, 4, 3 }, |
19389 | 124k | {14738, 4415, 4, 4 }, |
19390 | 124k | {14750, 4419, 4, 3 }, |
19391 | 124k | {14766, 4422, 4, 4 }, |
19392 | | // AArch64_SUBSXrx - 890 |
19393 | 124k | {14782, 4426, 4, 3 }, |
19394 | | // AArch64_SUBSXrx64 - 891 |
19395 | 124k | {14712, 4429, 4, 4 }, |
19396 | 124k | {14782, 4433, 4, 3 }, |
19397 | 124k | {14766, 4436, 4, 4 }, |
19398 | | // AArch64_SUBWrs - 894 |
19399 | 124k | {14797, 4440, 4, 4 }, |
19400 | 124k | {14808, 4444, 4, 3 }, |
19401 | 124k | {14823, 4447, 4, 4 }, |
19402 | | // AArch64_SUBWrx - 897 |
19403 | 124k | {14823, 4451, 4, 4 }, |
19404 | 124k | {14823, 4455, 4, 4 }, |
19405 | | // AArch64_SUBXrs - 899 |
19406 | 124k | {14797, 4459, 4, 4 }, |
19407 | 124k | {14808, 4463, 4, 3 }, |
19408 | 124k | {14823, 4466, 4, 4 }, |
19409 | | // AArch64_SUBXrx64 - 902 |
19410 | 124k | {14823, 4470, 4, 4 }, |
19411 | 124k | {14823, 4474, 4, 4 }, |
19412 | | // AArch64_SYSxt - 904 |
19413 | 124k | {14838, 4478, 5, 5 }, |
19414 | | // AArch64_UBFMWri - 905 |
19415 | 124k | {14861, 4483, 4, 4 }, |
19416 | 124k | {14876, 4487, 4, 4 }, |
19417 | 124k | {14888, 4491, 4, 4 }, |
19418 | | // AArch64_UBFMXri - 908 |
19419 | 124k | {14861, 4495, 4, 4 }, |
19420 | 124k | {14876, 4499, 4, 4 }, |
19421 | 124k | {14888, 4503, 4, 4 }, |
19422 | 124k | {14900, 4507, 4, 4 }, |
19423 | | // AArch64_UMADDLrrr - 912 |
19424 | 124k | {14912, 4511, 4, 4 }, |
19425 | | // AArch64_UMOVvi32 - 913 |
19426 | 124k | {14929, 4515, 3, 3 }, |
19427 | | // AArch64_UMOVvi32_idx0 - 914 |
19428 | 124k | {14929, 4518, 3, 5 }, |
19429 | | // AArch64_UMOVvi64 - 915 |
19430 | 124k | {14948, 4523, 3, 3 }, |
19431 | | // AArch64_UMOVvi64_idx0 - 916 |
19432 | 124k | {14948, 4526, 3, 5 }, |
19433 | | // AArch64_UMSUBLrrr - 917 |
19434 | 124k | {14967, 4531, 4, 4 }, |
19435 | | // AArch64_UQDECB_WPiI - 918 |
19436 | 124k | {14985, 4535, 4, 7 }, |
19437 | 124k | {14995, 4542, 4, 7 }, |
19438 | | // AArch64_UQDECB_XPiI - 920 |
19439 | 124k | {14985, 4549, 4, 7 }, |
19440 | 124k | {14995, 4556, 4, 7 }, |
19441 | | // AArch64_UQDECD_WPiI - 922 |
19442 | 124k | {15011, 4563, 4, 7 }, |
19443 | 124k | {15021, 4570, 4, 7 }, |
19444 | | // AArch64_UQDECD_XPiI - 924 |
19445 | 124k | {15011, 4577, 4, 7 }, |
19446 | 124k | {15021, 4584, 4, 7 }, |
19447 | | // AArch64_UQDECD_ZPiI - 926 |
19448 | 124k | {15037, 4591, 4, 7 }, |
19449 | 124k | {15049, 4598, 4, 7 }, |
19450 | | // AArch64_UQDECH_WPiI - 928 |
19451 | 124k | {15067, 4605, 4, 7 }, |
19452 | 124k | {15077, 4612, 4, 7 }, |
19453 | | // AArch64_UQDECH_XPiI - 930 |
19454 | 124k | {15067, 4619, 4, 7 }, |
19455 | 124k | {15077, 4626, 4, 7 }, |
19456 | | // AArch64_UQDECH_ZPiI - 932 |
19457 | 124k | {15093, 4633, 4, 7 }, |
19458 | 124k | {15105, 4640, 4, 7 }, |
19459 | | // AArch64_UQDECW_WPiI - 934 |
19460 | 124k | {15123, 4647, 4, 7 }, |
19461 | 124k | {15133, 4654, 4, 7 }, |
19462 | | // AArch64_UQDECW_XPiI - 936 |
19463 | 124k | {15123, 4661, 4, 7 }, |
19464 | 124k | {15133, 4668, 4, 7 }, |
19465 | | // AArch64_UQDECW_ZPiI - 938 |
19466 | 124k | {15149, 4675, 4, 7 }, |
19467 | 124k | {15161, 4682, 4, 7 }, |
19468 | | // AArch64_UQINCB_WPiI - 940 |
19469 | 124k | {15179, 4689, 4, 7 }, |
19470 | 124k | {15189, 4696, 4, 7 }, |
19471 | | // AArch64_UQINCB_XPiI - 942 |
19472 | 124k | {15179, 4703, 4, 7 }, |
19473 | 124k | {15189, 4710, 4, 7 }, |
19474 | | // AArch64_UQINCD_WPiI - 944 |
19475 | 124k | {15205, 4717, 4, 7 }, |
19476 | 124k | {15215, 4724, 4, 7 }, |
19477 | | // AArch64_UQINCD_XPiI - 946 |
19478 | 124k | {15205, 4731, 4, 7 }, |
19479 | 124k | {15215, 4738, 4, 7 }, |
19480 | | // AArch64_UQINCD_ZPiI - 948 |
19481 | 124k | {15231, 4745, 4, 7 }, |
19482 | 124k | {15243, 4752, 4, 7 }, |
19483 | | // AArch64_UQINCH_WPiI - 950 |
19484 | 124k | {15261, 4759, 4, 7 }, |
19485 | 124k | {15271, 4766, 4, 7 }, |
19486 | | // AArch64_UQINCH_XPiI - 952 |
19487 | 124k | {15261, 4773, 4, 7 }, |
19488 | 124k | {15271, 4780, 4, 7 }, |
19489 | | // AArch64_UQINCH_ZPiI - 954 |
19490 | 124k | {15287, 4787, 4, 7 }, |
19491 | 124k | {15299, 4794, 4, 7 }, |
19492 | | // AArch64_UQINCW_WPiI - 956 |
19493 | 124k | {15317, 4801, 4, 7 }, |
19494 | 124k | {15327, 4808, 4, 7 }, |
19495 | | // AArch64_UQINCW_XPiI - 958 |
19496 | 124k | {15317, 4815, 4, 7 }, |
19497 | 124k | {15327, 4822, 4, 7 }, |
19498 | | // AArch64_UQINCW_ZPiI - 960 |
19499 | 124k | {15343, 4829, 4, 7 }, |
19500 | 124k | {15355, 4836, 4, 7 }, |
19501 | | // AArch64_XPACLRI - 962 |
19502 | 124k | {15373, 4843, 0, 1 }, |
19503 | | // AArch64_ZERO_M - 963 |
19504 | 124k | {15381, 4844, 1, 2 }, |
19505 | 124k | {15391, 4846, 1, 2 }, |
19506 | 124k | {15404, 4848, 1, 2 }, |
19507 | 124k | {15417, 4850, 1, 2 }, |
19508 | 124k | {15430, 4852, 1, 2 }, |
19509 | 124k | {15443, 4854, 1, 2 }, |
19510 | 124k | {15456, 4856, 1, 2 }, |
19511 | 124k | {15469, 4858, 1, 2 }, |
19512 | 124k | {15488, 4860, 1, 2 }, |
19513 | 124k | {15507, 4862, 1, 2 }, |
19514 | 124k | {15526, 4864, 1, 2 }, |
19515 | 124k | {15545, 4866, 1, 2 }, |
19516 | 124k | {15570, 4868, 1, 2 }, |
19517 | 124k | {15595, 4870, 1, 2 }, |
19518 | 124k | {15620, 4872, 1, 2 }, |
19519 | 124k | }; |
19520 | | |
19521 | 124k | static const AliasPatternCond Conds[] = { |
19522 | | // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 0 |
19523 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19524 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19525 | | // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 2 |
19526 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19527 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19528 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19529 | 124k | {AliasPatternCond_K_Imm, 0}, |
19530 | | // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 6 |
19531 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19532 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19533 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19534 | | // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 9 |
19535 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19536 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19537 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19538 | 124k | {AliasPatternCond_K_Imm, 0}, |
19539 | | // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 13 |
19540 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19541 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19542 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19543 | 124k | {AliasPatternCond_K_Imm, 16}, |
19544 | | // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 17 |
19545 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19546 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19547 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19548 | | // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 20 |
19549 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19550 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19551 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19552 | 124k | {AliasPatternCond_K_Imm, 16}, |
19553 | | // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 24 |
19554 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19555 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19556 | | // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 26 |
19557 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19558 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19559 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19560 | 124k | {AliasPatternCond_K_Imm, 0}, |
19561 | | // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 30 |
19562 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19563 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19564 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19565 | | // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 33 |
19566 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19567 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19568 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19569 | 124k | {AliasPatternCond_K_Imm, 0}, |
19570 | | // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 37 |
19571 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19572 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19573 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19574 | | // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 40 |
19575 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19576 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19577 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19578 | 124k | {AliasPatternCond_K_Imm, 24}, |
19579 | | // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 44 |
19580 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19581 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19582 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19583 | | // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 47 |
19584 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19585 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19586 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19587 | 124k | {AliasPatternCond_K_Imm, 24}, |
19588 | | // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) - 51 |
19589 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19590 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19591 | 124k | {AliasPatternCond_K_Imm, 0}, |
19592 | 124k | {AliasPatternCond_K_Imm, 0}, |
19593 | | // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) - 55 |
19594 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19595 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19596 | 124k | {AliasPatternCond_K_Imm, 0}, |
19597 | 124k | {AliasPatternCond_K_Imm, 0}, |
19598 | | // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 59 |
19599 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19600 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19601 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19602 | 124k | {AliasPatternCond_K_Imm, 0}, |
19603 | | // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 63 |
19604 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19605 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19606 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19607 | 124k | {AliasPatternCond_K_Imm, 16}, |
19608 | | // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 67 |
19609 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19610 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
19611 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19612 | 124k | {AliasPatternCond_K_Imm, 16}, |
19613 | | // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) - 71 |
19614 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19615 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19616 | 124k | {AliasPatternCond_K_Imm, 0}, |
19617 | 124k | {AliasPatternCond_K_Imm, 0}, |
19618 | | // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) - 75 |
19619 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19620 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19621 | 124k | {AliasPatternCond_K_Imm, 0}, |
19622 | 124k | {AliasPatternCond_K_Imm, 0}, |
19623 | | // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 79 |
19624 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19625 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19626 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19627 | 124k | {AliasPatternCond_K_Imm, 0}, |
19628 | | // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 83 |
19629 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19630 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19631 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19632 | 124k | {AliasPatternCond_K_Imm, 24}, |
19633 | | // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 87 |
19634 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19635 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
19636 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19637 | 124k | {AliasPatternCond_K_Imm, 24}, |
19638 | | // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) - 91 |
19639 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19640 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19641 | | // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 93 |
19642 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19643 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19644 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19645 | 124k | {AliasPatternCond_K_Imm, 0}, |
19646 | | // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) - 97 |
19647 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19648 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19649 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19650 | | // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 100 |
19651 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19652 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19653 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19654 | 124k | {AliasPatternCond_K_Imm, 0}, |
19655 | | // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) - 104 |
19656 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19657 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19658 | | // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 106 |
19659 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19660 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19661 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19662 | 124k | {AliasPatternCond_K_Imm, 0}, |
19663 | | // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) - 110 |
19664 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19665 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19666 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19667 | | // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 113 |
19668 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19669 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19670 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19671 | 124k | {AliasPatternCond_K_Imm, 0}, |
19672 | | // (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 117 |
19673 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19674 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19675 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19676 | 124k | {AliasPatternCond_K_TiedReg, 2}, |
19677 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19678 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19679 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19680 | | // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 124 |
19681 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19682 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19683 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19684 | 124k | {AliasPatternCond_K_Imm, 0}, |
19685 | | // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 128 |
19686 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19687 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19688 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19689 | 124k | {AliasPatternCond_K_Imm, 0}, |
19690 | | // (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 132 |
19691 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19692 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19693 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19694 | 124k | {AliasPatternCond_K_TiedReg, 2}, |
19695 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19696 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19697 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19698 | | // (AND_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 139 |
19699 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19700 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19701 | 124k | {AliasPatternCond_K_Custom, 1}, |
19702 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19703 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19704 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19705 | | // (AND_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 145 |
19706 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19707 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19708 | 124k | {AliasPatternCond_K_Custom, 2}, |
19709 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19710 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19711 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19712 | | // (AND_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 151 |
19713 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19714 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19715 | 124k | {AliasPatternCond_K_Custom, 3}, |
19716 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19717 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19718 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19719 | | // (AUTIA1716) - 157 |
19720 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19721 | | // (AUTIASP) - 158 |
19722 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19723 | | // (AUTIAZ) - 159 |
19724 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19725 | | // (AUTIB1716) - 160 |
19726 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19727 | | // (AUTIBSP) - 161 |
19728 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19729 | | // (AUTIBZ) - 162 |
19730 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
19731 | | // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 163 |
19732 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19733 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19734 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19735 | 124k | {AliasPatternCond_K_Imm, 0}, |
19736 | | // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 167 |
19737 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19738 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19739 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19740 | 124k | {AliasPatternCond_K_Imm, 0}, |
19741 | | // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 171 |
19742 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19743 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19744 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19745 | 124k | {AliasPatternCond_K_Imm, 0}, |
19746 | | // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 175 |
19747 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19748 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19749 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19750 | 124k | {AliasPatternCond_K_Imm, 0}, |
19751 | | // (CLREX 15) - 179 |
19752 | 124k | {AliasPatternCond_K_Imm, 15}, |
19753 | | // (CNTB_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 180 |
19754 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19755 | 124k | {AliasPatternCond_K_Imm, 31}, |
19756 | 124k | {AliasPatternCond_K_Imm, 1}, |
19757 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19758 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19759 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19760 | | // (CNTB_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 186 |
19761 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19762 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19763 | 124k | {AliasPatternCond_K_Imm, 1}, |
19764 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19765 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19766 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19767 | | // (CNTD_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 192 |
19768 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19769 | 124k | {AliasPatternCond_K_Imm, 31}, |
19770 | 124k | {AliasPatternCond_K_Imm, 1}, |
19771 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19772 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19773 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19774 | | // (CNTD_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 198 |
19775 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19776 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19777 | 124k | {AliasPatternCond_K_Imm, 1}, |
19778 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19779 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19780 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19781 | | // (CNTH_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 204 |
19782 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19783 | 124k | {AliasPatternCond_K_Imm, 31}, |
19784 | 124k | {AliasPatternCond_K_Imm, 1}, |
19785 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19786 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19787 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19788 | | // (CNTH_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 210 |
19789 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19790 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19791 | 124k | {AliasPatternCond_K_Imm, 1}, |
19792 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19793 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19794 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19795 | | // (CNTW_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 216 |
19796 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19797 | 124k | {AliasPatternCond_K_Imm, 31}, |
19798 | 124k | {AliasPatternCond_K_Imm, 1}, |
19799 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19800 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19801 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19802 | | // (CNTW_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 222 |
19803 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19804 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19805 | 124k | {AliasPatternCond_K_Imm, 1}, |
19806 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19807 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19808 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19809 | | // (CPY_ZPmI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 228 |
19810 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19811 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19812 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19813 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19814 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19815 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19816 | | // (CPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 234 |
19817 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19818 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19819 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19820 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19821 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19822 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19823 | | // (CPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 240 |
19824 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19825 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19826 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19827 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19828 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19829 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19830 | | // (CPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 246 |
19831 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19832 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19833 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19834 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19835 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19836 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19837 | | // (CPY_ZPmR_B ZPR8:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 252 |
19838 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19839 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19840 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19841 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19842 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19843 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19844 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19845 | | // (CPY_ZPmR_D ZPR64:$Zd, PPR3bAny:$Pg, GPR64sp:$Rn) - 259 |
19846 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19847 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19848 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19849 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
19850 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19851 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19852 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19853 | | // (CPY_ZPmR_H ZPR16:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 266 |
19854 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19855 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19856 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19857 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19858 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19859 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19860 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19861 | | // (CPY_ZPmR_S ZPR32:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 273 |
19862 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19863 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19864 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19865 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
19866 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19867 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19868 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19869 | | // (CPY_ZPmV_B ZPR8:$Zd, PPR3bAny:$Pg, FPR8:$Vn) - 280 |
19870 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19871 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19872 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19873 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
19874 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19875 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19876 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19877 | | // (CPY_ZPmV_D ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn) - 287 |
19878 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19879 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19880 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19881 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
19882 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19883 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19884 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19885 | | // (CPY_ZPmV_H ZPR16:$Zd, PPR3bAny:$Pg, FPR16:$Vn) - 294 |
19886 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19887 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19888 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19889 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
19890 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19891 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19892 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19893 | | // (CPY_ZPmV_S ZPR32:$Zd, PPR3bAny:$Pg, FPR32:$Vn) - 301 |
19894 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19895 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19896 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
19897 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
19898 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19899 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19900 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19901 | | // (CPY_ZPzI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 308 |
19902 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19903 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19904 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19905 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19906 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19907 | | // (CPY_ZPzI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 313 |
19908 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19909 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19910 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19911 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19912 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19913 | | // (CPY_ZPzI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 318 |
19914 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19915 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19916 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19917 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19918 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19919 | | // (CPY_ZPzI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 323 |
19920 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
19921 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
19922 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19923 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19924 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19925 | | // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 328 |
19926 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19927 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19928 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19929 | 124k | {AliasPatternCond_K_Custom, 4}, |
19930 | | // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 332 |
19931 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19932 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19933 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19934 | 124k | {AliasPatternCond_K_Custom, 4}, |
19935 | | // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 336 |
19936 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19937 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19938 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19939 | 124k | {AliasPatternCond_K_Custom, 4}, |
19940 | | // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 340 |
19941 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19942 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19943 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19944 | 124k | {AliasPatternCond_K_Custom, 4}, |
19945 | | // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 344 |
19946 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19947 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19948 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
19949 | 124k | {AliasPatternCond_K_Custom, 4}, |
19950 | | // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 348 |
19951 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19952 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19953 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19954 | 124k | {AliasPatternCond_K_Custom, 4}, |
19955 | | // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 352 |
19956 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19957 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19958 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
19959 | 124k | {AliasPatternCond_K_Custom, 4}, |
19960 | | // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 356 |
19961 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19962 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19963 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19964 | 124k | {AliasPatternCond_K_Custom, 4}, |
19965 | | // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 360 |
19966 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19967 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
19968 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19969 | 124k | {AliasPatternCond_K_Custom, 4}, |
19970 | | // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 364 |
19971 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19972 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19973 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
19974 | 124k | {AliasPatternCond_K_Custom, 4}, |
19975 | | // (DCPS1 0) - 368 |
19976 | 124k | {AliasPatternCond_K_Imm, 0}, |
19977 | | // (DCPS2 0) - 369 |
19978 | 124k | {AliasPatternCond_K_Imm, 0}, |
19979 | | // (DCPS3 0) - 370 |
19980 | 124k | {AliasPatternCond_K_Imm, 0}, |
19981 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureEL3}, |
19982 | | // (DECB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 372 |
19983 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19984 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19985 | 124k | {AliasPatternCond_K_Imm, 31}, |
19986 | 124k | {AliasPatternCond_K_Imm, 1}, |
19987 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19988 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19989 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19990 | | // (DECB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 379 |
19991 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
19992 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19993 | 124k | {AliasPatternCond_K_Ignore, 0}, |
19994 | 124k | {AliasPatternCond_K_Imm, 1}, |
19995 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
19996 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
19997 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
19998 | | // (DECD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 386 |
19999 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20000 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20001 | 124k | {AliasPatternCond_K_Imm, 31}, |
20002 | 124k | {AliasPatternCond_K_Imm, 1}, |
20003 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20004 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20005 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20006 | | // (DECD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 393 |
20007 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20008 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20009 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20010 | 124k | {AliasPatternCond_K_Imm, 1}, |
20011 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20012 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20013 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20014 | | // (DECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 400 |
20015 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20016 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20017 | 124k | {AliasPatternCond_K_Imm, 31}, |
20018 | 124k | {AliasPatternCond_K_Imm, 1}, |
20019 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20020 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20021 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20022 | | // (DECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 407 |
20023 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20024 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20025 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20026 | 124k | {AliasPatternCond_K_Imm, 1}, |
20027 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20028 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20029 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20030 | | // (DECH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 414 |
20031 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20032 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20033 | 124k | {AliasPatternCond_K_Imm, 31}, |
20034 | 124k | {AliasPatternCond_K_Imm, 1}, |
20035 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20036 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20037 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20038 | | // (DECH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 421 |
20039 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20040 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20041 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20042 | 124k | {AliasPatternCond_K_Imm, 1}, |
20043 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20044 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20045 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20046 | | // (DECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 428 |
20047 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20048 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20049 | 124k | {AliasPatternCond_K_Imm, 31}, |
20050 | 124k | {AliasPatternCond_K_Imm, 1}, |
20051 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20052 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20053 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20054 | | // (DECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 435 |
20055 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20056 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20057 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20058 | 124k | {AliasPatternCond_K_Imm, 1}, |
20059 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20060 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20061 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20062 | | // (DECW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 442 |
20063 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20064 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20065 | 124k | {AliasPatternCond_K_Imm, 31}, |
20066 | 124k | {AliasPatternCond_K_Imm, 1}, |
20067 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20068 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20069 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20070 | | // (DECW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 449 |
20071 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20072 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20073 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20074 | 124k | {AliasPatternCond_K_Imm, 1}, |
20075 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20076 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20077 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20078 | | // (DECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 456 |
20079 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20080 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20081 | 124k | {AliasPatternCond_K_Imm, 31}, |
20082 | 124k | {AliasPatternCond_K_Imm, 1}, |
20083 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20084 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20085 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20086 | | // (DECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 463 |
20087 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20088 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20089 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20090 | 124k | {AliasPatternCond_K_Imm, 1}, |
20091 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20092 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20093 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20094 | | // (DSB 0) - 470 |
20095 | 124k | {AliasPatternCond_K_Imm, 0}, |
20096 | | // (DSB 4) - 471 |
20097 | 124k | {AliasPatternCond_K_Imm, 4}, |
20098 | | // (DSB { 1, 1, 0, 0 }) - 472 |
20099 | 124k | {AliasPatternCond_K_Imm, 12}, |
20100 | 124k | {AliasPatternCond_K_Feature, AArch64_HasV8_0rOps}, |
20101 | | // (DUPM_ZI ZPR16:$Zd, sve_preferred_logical_imm16:$imm) - 474 |
20102 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20103 | 124k | {AliasPatternCond_K_Custom, 5}, |
20104 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20105 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20106 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20107 | | // (DUPM_ZI ZPR32:$Zd, sve_preferred_logical_imm32:$imm) - 479 |
20108 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20109 | 124k | {AliasPatternCond_K_Custom, 6}, |
20110 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20111 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20112 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20113 | | // (DUPM_ZI ZPR64:$Zd, sve_preferred_logical_imm64:$imm) - 484 |
20114 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20115 | 124k | {AliasPatternCond_K_Custom, 7}, |
20116 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20117 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20118 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20119 | | // (DUPM_ZI ZPR8:$Zd, sve_logical_imm8:$imm) - 489 |
20120 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20121 | 124k | {AliasPatternCond_K_Custom, 1}, |
20122 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20123 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20124 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20125 | | // (DUPM_ZI ZPR16:$Zd, sve_logical_imm16:$imm) - 494 |
20126 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20127 | 124k | {AliasPatternCond_K_Custom, 2}, |
20128 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20129 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20130 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20131 | | // (DUPM_ZI ZPR32:$Zd, sve_logical_imm32:$imm) - 499 |
20132 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20133 | 124k | {AliasPatternCond_K_Custom, 3}, |
20134 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20135 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20136 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20137 | | // (DUP_ZI_B ZPR8:$Zd, cpy_imm8_opt_lsl_i8:$imm) - 504 |
20138 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20139 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20140 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20141 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20142 | | // (DUP_ZI_D ZPR64:$Zd, cpy_imm8_opt_lsl_i64:$imm) - 508 |
20143 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20144 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20145 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20146 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20147 | | // (DUP_ZI_D ZPR64:$Zd, 0, 0) - 512 |
20148 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20149 | 124k | {AliasPatternCond_K_Imm, 0}, |
20150 | 124k | {AliasPatternCond_K_Imm, 0}, |
20151 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20152 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20153 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20154 | | // (DUP_ZI_H ZPR16:$Zd, cpy_imm8_opt_lsl_i16:$imm) - 518 |
20155 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20156 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20157 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20158 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20159 | | // (DUP_ZI_H ZPR16:$Zd, 0, 0) - 522 |
20160 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20161 | 124k | {AliasPatternCond_K_Imm, 0}, |
20162 | 124k | {AliasPatternCond_K_Imm, 0}, |
20163 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20164 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20165 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20166 | | // (DUP_ZI_S ZPR32:$Zd, cpy_imm8_opt_lsl_i32:$imm) - 528 |
20167 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20168 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20169 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20170 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20171 | | // (DUP_ZI_S ZPR32:$Zd, 0, 0) - 532 |
20172 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20173 | 124k | {AliasPatternCond_K_Imm, 0}, |
20174 | 124k | {AliasPatternCond_K_Imm, 0}, |
20175 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20176 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20177 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20178 | | // (DUP_ZR_B ZPR8:$Zd, GPR32sp:$Rn) - 538 |
20179 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20180 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
20181 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20182 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20183 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20184 | | // (DUP_ZR_D ZPR64:$Zd, GPR64sp:$Rn) - 543 |
20185 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20186 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20187 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20188 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20189 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20190 | | // (DUP_ZR_H ZPR16:$Zd, GPR32sp:$Rn) - 548 |
20191 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20192 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
20193 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20194 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20195 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20196 | | // (DUP_ZR_S ZPR32:$Zd, GPR32sp:$Rn) - 553 |
20197 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20198 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
20199 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20200 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20201 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20202 | | // (DUP_ZZI_B ZPR8:$Zd, FPR8asZPR:$Bn, 0) - 558 |
20203 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20204 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20205 | 124k | {AliasPatternCond_K_Imm, 0}, |
20206 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20207 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20208 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20209 | | // (DUP_ZZI_B ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx) - 564 |
20210 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20211 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20212 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20213 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20214 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20215 | | // (DUP_ZZI_D ZPR64:$Zd, FPR64asZPR:$Dn, 0) - 569 |
20216 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20217 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20218 | 124k | {AliasPatternCond_K_Imm, 0}, |
20219 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20220 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20221 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20222 | | // (DUP_ZZI_D ZPR64:$Zd, ZPR64:$Zn, sve_elm_idx_extdup_d:$idx) - 575 |
20223 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20224 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20225 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20226 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20227 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20228 | | // (DUP_ZZI_H ZPR16:$Zd, FPR16asZPR:$Hn, 0) - 580 |
20229 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20230 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20231 | 124k | {AliasPatternCond_K_Imm, 0}, |
20232 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20233 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20234 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20235 | | // (DUP_ZZI_H ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx) - 586 |
20236 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20237 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20238 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20239 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20240 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20241 | | // (DUP_ZZI_Q ZPR128:$Zd, FPR128asZPR:$Qn, 0) - 591 |
20242 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20243 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20244 | 124k | {AliasPatternCond_K_Imm, 0}, |
20245 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20246 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20247 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20248 | | // (DUP_ZZI_Q ZPR128:$Zd, ZPR128:$Zn, sve_elm_idx_extdup_q:$idx) - 597 |
20249 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20250 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20251 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20252 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20253 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20254 | | // (DUP_ZZI_S ZPR32:$Zd, FPR32asZPR:$Sn, 0) - 602 |
20255 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20256 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20257 | 124k | {AliasPatternCond_K_Imm, 0}, |
20258 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20259 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20260 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20261 | | // (DUP_ZZI_S ZPR32:$Zd, ZPR32:$Zn, sve_elm_idx_extdup_s:$idx) - 608 |
20262 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20263 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20264 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20265 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20266 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20267 | | // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 613 |
20268 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20269 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20270 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20271 | 124k | {AliasPatternCond_K_Imm, 0}, |
20272 | | // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 617 |
20273 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20274 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20275 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20276 | 124k | {AliasPatternCond_K_Imm, 0}, |
20277 | | // (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 621 |
20278 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20279 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20280 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20281 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
20282 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20283 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20284 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20285 | | // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 628 |
20286 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20287 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20288 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20289 | 124k | {AliasPatternCond_K_Imm, 0}, |
20290 | | // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 632 |
20291 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20292 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20293 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20294 | 124k | {AliasPatternCond_K_Imm, 0}, |
20295 | | // (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 636 |
20296 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20297 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20298 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20299 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
20300 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20301 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20302 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20303 | | // (EOR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 643 |
20304 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20305 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20306 | 124k | {AliasPatternCond_K_Custom, 1}, |
20307 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20308 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20309 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20310 | | // (EOR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 649 |
20311 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20312 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20313 | 124k | {AliasPatternCond_K_Custom, 2}, |
20314 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20315 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20316 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20317 | | // (EOR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 655 |
20318 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20319 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20320 | 124k | {AliasPatternCond_K_Custom, 3}, |
20321 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20322 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20323 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20324 | | // (EXTRACT_ZPMXI_H_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpH8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 661 |
20325 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20326 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20327 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
20328 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20329 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20330 | | // (EXTRACT_ZPMXI_H_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpH64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 666 |
20331 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20332 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20333 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
20334 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20335 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20336 | | // (EXTRACT_ZPMXI_H_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpH16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 671 |
20337 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20338 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20339 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
20340 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20341 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20342 | | // (EXTRACT_ZPMXI_H_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpH128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 676 |
20343 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20344 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20345 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
20346 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20347 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20348 | | // (EXTRACT_ZPMXI_H_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpH32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 681 |
20349 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20350 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20351 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
20352 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20353 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20354 | | // (EXTRACT_ZPMXI_V_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpV8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 686 |
20355 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20356 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20357 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
20358 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20359 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20360 | | // (EXTRACT_ZPMXI_V_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpV64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 691 |
20361 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20362 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20363 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
20364 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20365 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20366 | | // (EXTRACT_ZPMXI_V_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpV16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 696 |
20367 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20368 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20369 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
20370 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20371 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20372 | | // (EXTRACT_ZPMXI_V_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpV128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 701 |
20373 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20374 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20375 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
20376 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20377 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20378 | | // (EXTRACT_ZPMXI_V_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpV32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 706 |
20379 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20380 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20381 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
20382 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20383 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20384 | | // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) - 711 |
20385 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20386 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20387 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
20388 | | // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) - 714 |
20389 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20390 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20391 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
20392 | | // (FCPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, fpimm64:$imm8) - 717 |
20393 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20394 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20395 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20396 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20397 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20398 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20399 | | // (FCPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, fpimm16:$imm8) - 723 |
20400 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20401 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20402 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20403 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20404 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20405 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20406 | | // (FCPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, fpimm32:$imm8) - 729 |
20407 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20408 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20409 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
20410 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20411 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20412 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20413 | | // (FDUP_ZI_D ZPR64:$Zd, fpimm64:$imm8) - 735 |
20414 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20415 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20416 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20417 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20418 | | // (FDUP_ZI_H ZPR16:$Zd, fpimm16:$imm8) - 739 |
20419 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20420 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20421 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20422 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20423 | | // (FDUP_ZI_S ZPR32:$Zd, fpimm32:$imm8) - 743 |
20424 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20425 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20426 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20427 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20428 | | // (GLD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 747 |
20429 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20430 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20431 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20432 | 124k | {AliasPatternCond_K_Imm, 0}, |
20433 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20434 | | // (GLD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 752 |
20435 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20436 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20437 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20438 | 124k | {AliasPatternCond_K_Imm, 0}, |
20439 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20440 | | // (GLD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 757 |
20441 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20442 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20443 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20444 | 124k | {AliasPatternCond_K_Imm, 0}, |
20445 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20446 | | // (GLD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 762 |
20447 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20448 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20449 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20450 | 124k | {AliasPatternCond_K_Imm, 0}, |
20451 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20452 | | // (GLD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 767 |
20453 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20454 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20455 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20456 | 124k | {AliasPatternCond_K_Imm, 0}, |
20457 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20458 | | // (GLD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 772 |
20459 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20460 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20461 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20462 | 124k | {AliasPatternCond_K_Imm, 0}, |
20463 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20464 | | // (GLD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 777 |
20465 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20466 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20467 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20468 | 124k | {AliasPatternCond_K_Imm, 0}, |
20469 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20470 | | // (GLD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 782 |
20471 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20472 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20473 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20474 | 124k | {AliasPatternCond_K_Imm, 0}, |
20475 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20476 | | // (GLD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 787 |
20477 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20478 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20479 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20480 | 124k | {AliasPatternCond_K_Imm, 0}, |
20481 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20482 | | // (GLD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 792 |
20483 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20484 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20485 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20486 | 124k | {AliasPatternCond_K_Imm, 0}, |
20487 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20488 | | // (GLD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 797 |
20489 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20490 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20491 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20492 | 124k | {AliasPatternCond_K_Imm, 0}, |
20493 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20494 | | // (GLD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 802 |
20495 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20496 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20497 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20498 | 124k | {AliasPatternCond_K_Imm, 0}, |
20499 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20500 | | // (GLDFF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 807 |
20501 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20502 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20503 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20504 | 124k | {AliasPatternCond_K_Imm, 0}, |
20505 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20506 | | // (GLDFF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 812 |
20507 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20508 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20509 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20510 | 124k | {AliasPatternCond_K_Imm, 0}, |
20511 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20512 | | // (GLDFF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 817 |
20513 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20514 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20515 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20516 | 124k | {AliasPatternCond_K_Imm, 0}, |
20517 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20518 | | // (GLDFF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 822 |
20519 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20520 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20521 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20522 | 124k | {AliasPatternCond_K_Imm, 0}, |
20523 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20524 | | // (GLDFF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 827 |
20525 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20526 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20527 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20528 | 124k | {AliasPatternCond_K_Imm, 0}, |
20529 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20530 | | // (GLDFF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 832 |
20531 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20532 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20533 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20534 | 124k | {AliasPatternCond_K_Imm, 0}, |
20535 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20536 | | // (GLDFF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 837 |
20537 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20538 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20539 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20540 | 124k | {AliasPatternCond_K_Imm, 0}, |
20541 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20542 | | // (GLDFF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 842 |
20543 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20544 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20545 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20546 | 124k | {AliasPatternCond_K_Imm, 0}, |
20547 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20548 | | // (GLDFF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 847 |
20549 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20550 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20551 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20552 | 124k | {AliasPatternCond_K_Imm, 0}, |
20553 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20554 | | // (GLDFF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 852 |
20555 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20556 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20557 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20558 | 124k | {AliasPatternCond_K_Imm, 0}, |
20559 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20560 | | // (GLDFF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 857 |
20561 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20562 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20563 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20564 | 124k | {AliasPatternCond_K_Imm, 0}, |
20565 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20566 | | // (GLDFF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 862 |
20567 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20568 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20569 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20570 | 124k | {AliasPatternCond_K_Imm, 0}, |
20571 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
20572 | | // (HINT { 0, 0, 0 }) - 867 |
20573 | 124k | {AliasPatternCond_K_Imm, 0}, |
20574 | | // (HINT { 0, 0, 1 }) - 868 |
20575 | 124k | {AliasPatternCond_K_Imm, 1}, |
20576 | | // (HINT { 0, 1, 0 }) - 869 |
20577 | 124k | {AliasPatternCond_K_Imm, 2}, |
20578 | | // (HINT { 0, 1, 1 }) - 870 |
20579 | 124k | {AliasPatternCond_K_Imm, 3}, |
20580 | | // (HINT { 1, 0, 0 }) - 871 |
20581 | 124k | {AliasPatternCond_K_Imm, 4}, |
20582 | | // (HINT { 1, 0, 1 }) - 872 |
20583 | 124k | {AliasPatternCond_K_Imm, 5}, |
20584 | | // (HINT { 1, 1, 0 }) - 873 |
20585 | 124k | {AliasPatternCond_K_Imm, 6}, |
20586 | | // (HINT { 1, 0, 0, 0, 0 }) - 874 |
20587 | 124k | {AliasPatternCond_K_Imm, 16}, |
20588 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRAS}, |
20589 | | // (HINT 20) - 876 |
20590 | 124k | {AliasPatternCond_K_Imm, 20}, |
20591 | | // (HINT 32) - 877 |
20592 | 124k | {AliasPatternCond_K_Imm, 32}, |
20593 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureBranchTargetId}, |
20594 | | // (HINT btihint_op:$op) - 879 |
20595 | 124k | {AliasPatternCond_K_Custom, 8}, |
20596 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureBranchTargetId}, |
20597 | | // (HINT psbhint_op:$op) - 881 |
20598 | 124k | {AliasPatternCond_K_Custom, 9}, |
20599 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSPE}, |
20600 | | // (INCB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 883 |
20601 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20602 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20603 | 124k | {AliasPatternCond_K_Imm, 31}, |
20604 | 124k | {AliasPatternCond_K_Imm, 1}, |
20605 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20606 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20607 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20608 | | // (INCB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 890 |
20609 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20610 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20611 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20612 | 124k | {AliasPatternCond_K_Imm, 1}, |
20613 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20614 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20615 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20616 | | // (INCD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 897 |
20617 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20618 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20619 | 124k | {AliasPatternCond_K_Imm, 31}, |
20620 | 124k | {AliasPatternCond_K_Imm, 1}, |
20621 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20622 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20623 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20624 | | // (INCD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 904 |
20625 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20626 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20627 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20628 | 124k | {AliasPatternCond_K_Imm, 1}, |
20629 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20630 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20631 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20632 | | // (INCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 911 |
20633 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20634 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20635 | 124k | {AliasPatternCond_K_Imm, 31}, |
20636 | 124k | {AliasPatternCond_K_Imm, 1}, |
20637 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20638 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20639 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20640 | | // (INCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 918 |
20641 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20642 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20643 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20644 | 124k | {AliasPatternCond_K_Imm, 1}, |
20645 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20646 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20647 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20648 | | // (INCH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 925 |
20649 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20650 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20651 | 124k | {AliasPatternCond_K_Imm, 31}, |
20652 | 124k | {AliasPatternCond_K_Imm, 1}, |
20653 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20654 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20655 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20656 | | // (INCH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 932 |
20657 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20658 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20659 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20660 | 124k | {AliasPatternCond_K_Imm, 1}, |
20661 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20662 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20663 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20664 | | // (INCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 939 |
20665 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20666 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20667 | 124k | {AliasPatternCond_K_Imm, 31}, |
20668 | 124k | {AliasPatternCond_K_Imm, 1}, |
20669 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20670 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20671 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20672 | | // (INCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 946 |
20673 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20674 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20675 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20676 | 124k | {AliasPatternCond_K_Imm, 1}, |
20677 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20678 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20679 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20680 | | // (INCW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 953 |
20681 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20682 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20683 | 124k | {AliasPatternCond_K_Imm, 31}, |
20684 | 124k | {AliasPatternCond_K_Imm, 1}, |
20685 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20686 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20687 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20688 | | // (INCW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 960 |
20689 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20690 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20691 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20692 | 124k | {AliasPatternCond_K_Imm, 1}, |
20693 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20694 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20695 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20696 | | // (INCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 967 |
20697 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20698 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20699 | 124k | {AliasPatternCond_K_Imm, 31}, |
20700 | 124k | {AliasPatternCond_K_Imm, 1}, |
20701 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20702 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20703 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20704 | | // (INCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 974 |
20705 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20706 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20707 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20708 | 124k | {AliasPatternCond_K_Imm, 1}, |
20709 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20710 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20711 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20712 | | // (INSERT_MXIPZ_H_B TileVectorOpH8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 981 |
20713 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
20714 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20715 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20716 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20717 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20718 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20719 | | // (INSERT_MXIPZ_H_D TileVectorOpH64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 987 |
20720 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
20721 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20722 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20723 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20724 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20725 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20726 | | // (INSERT_MXIPZ_H_H TileVectorOpH16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 993 |
20727 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
20728 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20729 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20730 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20731 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20732 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20733 | | // (INSERT_MXIPZ_H_Q TileVectorOpH128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 999 |
20734 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
20735 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20736 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20737 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20738 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20739 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20740 | | // (INSERT_MXIPZ_H_S TileVectorOpH32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1005 |
20741 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
20742 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20743 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20744 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20745 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20746 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20747 | | // (INSERT_MXIPZ_V_B TileVectorOpV8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 1011 |
20748 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
20749 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20750 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20751 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20752 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20753 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20754 | | // (INSERT_MXIPZ_V_D TileVectorOpV64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 1017 |
20755 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
20756 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20757 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20758 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20759 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20760 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20761 | | // (INSERT_MXIPZ_V_H TileVectorOpV16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 1023 |
20762 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
20763 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20764 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20765 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20766 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20767 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20768 | | // (INSERT_MXIPZ_V_Q TileVectorOpV128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 1029 |
20769 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
20770 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20771 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20772 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20773 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20774 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20775 | | // (INSERT_MXIPZ_V_S TileVectorOpV32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1035 |
20776 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
20777 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
20778 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20779 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20780 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20781 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
20782 | | // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) - 1041 |
20783 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20784 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20785 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20786 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20787 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20788 | | // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) - 1046 |
20789 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20790 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20791 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20792 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20793 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20794 | | // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) - 1051 |
20795 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20796 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20797 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20798 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20799 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20800 | | // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) - 1056 |
20801 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20802 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20803 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20804 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20805 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20806 | | // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) - 1061 |
20807 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20808 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20809 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20810 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
20811 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20812 | | // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) - 1066 |
20813 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20814 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20815 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20816 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20817 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20818 | | // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) - 1071 |
20819 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20820 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20821 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20822 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
20823 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20824 | | // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) - 1076 |
20825 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20826 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20827 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20828 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20829 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20830 | | // (IRG GPR64sp:$dst, GPR64sp:$src, XZR) - 1081 |
20831 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20832 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20833 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20834 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
20835 | | // (ISB 15) - 1085 |
20836 | 124k | {AliasPatternCond_K_Imm, 15}, |
20837 | | // (LD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1086 |
20838 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20839 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20840 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20841 | 124k | {AliasPatternCond_K_Imm, 0}, |
20842 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20843 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20844 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20845 | | // (LD1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1093 |
20846 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20847 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20848 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20849 | 124k | {AliasPatternCond_K_Imm, 0}, |
20850 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20851 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20852 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20853 | | // (LD1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1100 |
20854 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20855 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20856 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20857 | 124k | {AliasPatternCond_K_Imm, 0}, |
20858 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20859 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20860 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20861 | | // (LD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1107 |
20862 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20863 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20864 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20865 | 124k | {AliasPatternCond_K_Imm, 0}, |
20866 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20867 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20868 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20869 | | // (LD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1114 |
20870 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20871 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20872 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20873 | 124k | {AliasPatternCond_K_Imm, 0}, |
20874 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20875 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20876 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20877 | | // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1121 |
20878 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20879 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
20880 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20881 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20882 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20883 | | // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1126 |
20884 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20885 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
20886 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20887 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20888 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20889 | | // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1131 |
20890 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20891 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
20892 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20893 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20894 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20895 | | // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1136 |
20896 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20897 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
20898 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20899 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20900 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20901 | | // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1141 |
20902 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20903 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
20904 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20905 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20906 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20907 | | // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1146 |
20908 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20909 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
20910 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20911 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20912 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20913 | | // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1151 |
20914 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20915 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
20916 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20917 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20918 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20919 | | // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1156 |
20920 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20921 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
20922 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20923 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20924 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20925 | | // (LD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1161 |
20926 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20927 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20928 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20929 | 124k | {AliasPatternCond_K_Imm, 0}, |
20930 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20931 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20932 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20933 | | // (LD1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1168 |
20934 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20935 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20936 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20937 | 124k | {AliasPatternCond_K_Imm, 0}, |
20938 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20939 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20940 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20941 | | // (LD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1175 |
20942 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20943 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
20944 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20945 | 124k | {AliasPatternCond_K_Imm, 0}, |
20946 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
20947 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
20948 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
20949 | | // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1182 |
20950 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20951 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20952 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20953 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20954 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20955 | | // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1187 |
20956 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20957 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
20958 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20959 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20960 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20961 | | // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1192 |
20962 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20963 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20964 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20965 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20966 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20967 | | // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1197 |
20968 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20969 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
20970 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20971 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20972 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20973 | | // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1202 |
20974 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20975 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
20976 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20977 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20978 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20979 | | // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1207 |
20980 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20981 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20982 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20983 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20984 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20985 | | // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1212 |
20986 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20987 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
20988 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20989 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20990 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20991 | | // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1217 |
20992 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
20993 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
20994 | 124k | {AliasPatternCond_K_Ignore, 0}, |
20995 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
20996 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
20997 | | // (LD1RB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1222 |
20998 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
20999 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21000 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21001 | 124k | {AliasPatternCond_K_Imm, 0}, |
21002 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21003 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21004 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21005 | | // (LD1RB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1229 |
21006 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21007 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21008 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21009 | 124k | {AliasPatternCond_K_Imm, 0}, |
21010 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21011 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21012 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21013 | | // (LD1RB_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1236 |
21014 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21015 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21016 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21017 | 124k | {AliasPatternCond_K_Imm, 0}, |
21018 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21019 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21020 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21021 | | // (LD1RB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1243 |
21022 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21023 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21024 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21025 | 124k | {AliasPatternCond_K_Imm, 0}, |
21026 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21027 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21028 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21029 | | // (LD1RD_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1250 |
21030 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21031 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21032 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21033 | 124k | {AliasPatternCond_K_Imm, 0}, |
21034 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21035 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21036 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21037 | | // (LD1RH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1257 |
21038 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21039 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21040 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21041 | 124k | {AliasPatternCond_K_Imm, 0}, |
21042 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21043 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21044 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21045 | | // (LD1RH_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1264 |
21046 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21047 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21048 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21049 | 124k | {AliasPatternCond_K_Imm, 0}, |
21050 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21051 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21052 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21053 | | // (LD1RH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1271 |
21054 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21055 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21056 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21057 | 124k | {AliasPatternCond_K_Imm, 0}, |
21058 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21059 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21060 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21061 | | // (LD1RO_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1278 |
21062 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21063 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21064 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21065 | 124k | {AliasPatternCond_K_Imm, 0}, |
21066 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
21067 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64}, |
21068 | | // (LD1RO_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1284 |
21069 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21070 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21071 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21072 | 124k | {AliasPatternCond_K_Imm, 0}, |
21073 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
21074 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64}, |
21075 | | // (LD1RO_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1290 |
21076 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21077 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21078 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21079 | 124k | {AliasPatternCond_K_Imm, 0}, |
21080 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
21081 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64}, |
21082 | | // (LD1RO_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1296 |
21083 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21084 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21085 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21086 | 124k | {AliasPatternCond_K_Imm, 0}, |
21087 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
21088 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64}, |
21089 | | // (LD1RQ_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1302 |
21090 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21091 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21092 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21093 | 124k | {AliasPatternCond_K_Imm, 0}, |
21094 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21095 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21096 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21097 | | // (LD1RQ_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1309 |
21098 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21099 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21100 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21101 | 124k | {AliasPatternCond_K_Imm, 0}, |
21102 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21103 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21104 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21105 | | // (LD1RQ_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1316 |
21106 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21107 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21108 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21109 | 124k | {AliasPatternCond_K_Imm, 0}, |
21110 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21111 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21112 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21113 | | // (LD1RQ_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1323 |
21114 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21115 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21116 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21117 | 124k | {AliasPatternCond_K_Imm, 0}, |
21118 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21119 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21120 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21121 | | // (LD1RSB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1330 |
21122 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21123 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21124 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21125 | 124k | {AliasPatternCond_K_Imm, 0}, |
21126 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21127 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21128 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21129 | | // (LD1RSB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1337 |
21130 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21131 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21132 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21133 | 124k | {AliasPatternCond_K_Imm, 0}, |
21134 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21135 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21136 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21137 | | // (LD1RSB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1344 |
21138 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21139 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21140 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21141 | 124k | {AliasPatternCond_K_Imm, 0}, |
21142 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21143 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21144 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21145 | | // (LD1RSH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1351 |
21146 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21147 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21148 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21149 | 124k | {AliasPatternCond_K_Imm, 0}, |
21150 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21151 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21152 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21153 | | // (LD1RSH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1358 |
21154 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21155 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21156 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21157 | 124k | {AliasPatternCond_K_Imm, 0}, |
21158 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21159 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21160 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21161 | | // (LD1RSW_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1365 |
21162 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21163 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21164 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21165 | 124k | {AliasPatternCond_K_Imm, 0}, |
21166 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21167 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21168 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21169 | | // (LD1RW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1372 |
21170 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21171 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21172 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21173 | 124k | {AliasPatternCond_K_Imm, 0}, |
21174 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21175 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21176 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21177 | | // (LD1RW_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1379 |
21178 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21179 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21180 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21181 | 124k | {AliasPatternCond_K_Imm, 0}, |
21182 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21183 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21184 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21185 | | // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1386 |
21186 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21187 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21188 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21189 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21190 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21191 | | // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1391 |
21192 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21193 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
21194 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21195 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21196 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21197 | | // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1396 |
21198 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21199 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21200 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21201 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21202 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21203 | | // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1401 |
21204 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21205 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
21206 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21207 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21208 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21209 | | // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1406 |
21210 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21211 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
21212 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21213 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21214 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21215 | | // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1411 |
21216 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21217 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21218 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21219 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21220 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21221 | | // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1416 |
21222 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21223 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
21224 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21225 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21226 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21227 | | // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1421 |
21228 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21229 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21230 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21231 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21232 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21233 | | // (LD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1426 |
21234 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21235 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21236 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21237 | 124k | {AliasPatternCond_K_Imm, 0}, |
21238 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21239 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21240 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21241 | | // (LD1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1433 |
21242 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21243 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21244 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21245 | 124k | {AliasPatternCond_K_Imm, 0}, |
21246 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21247 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21248 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21249 | | // (LD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1440 |
21250 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21251 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21252 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21253 | 124k | {AliasPatternCond_K_Imm, 0}, |
21254 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21255 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21256 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21257 | | // (LD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1447 |
21258 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21259 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21260 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21261 | 124k | {AliasPatternCond_K_Imm, 0}, |
21262 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21263 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21264 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21265 | | // (LD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1454 |
21266 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21267 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21268 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21269 | 124k | {AliasPatternCond_K_Imm, 0}, |
21270 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21271 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21272 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21273 | | // (LD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1461 |
21274 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21275 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21276 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21277 | 124k | {AliasPatternCond_K_Imm, 0}, |
21278 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21279 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21280 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21281 | | // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1468 |
21282 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21283 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21284 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21285 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21286 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21287 | | // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1473 |
21288 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21289 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21290 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21291 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21292 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21293 | | // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1478 |
21294 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21295 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21296 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21297 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21298 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21299 | | // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1483 |
21300 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21301 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21302 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21303 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21304 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21305 | | // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1488 |
21306 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21307 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21308 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21309 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21310 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21311 | | // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1493 |
21312 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21313 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21314 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21315 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21316 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21317 | | // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1498 |
21318 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21319 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21320 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21321 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21322 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21323 | | // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1503 |
21324 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21325 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21326 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21327 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21328 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21329 | | // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1508 |
21330 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21331 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21332 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21333 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21334 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21335 | | // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1513 |
21336 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21337 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21338 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21339 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21340 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21341 | | // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1518 |
21342 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21343 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21344 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21345 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21346 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21347 | | // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1523 |
21348 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21349 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21350 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21351 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21352 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21353 | | // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1528 |
21354 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21355 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21356 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21357 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21358 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21359 | | // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1533 |
21360 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21361 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21362 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21363 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21364 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21365 | | // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1538 |
21366 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21367 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21368 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21369 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21370 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21371 | | // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1543 |
21372 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21373 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21374 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21375 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21376 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21377 | | // (LD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1548 |
21378 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21379 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21380 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21381 | 124k | {AliasPatternCond_K_Imm, 0}, |
21382 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21383 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21384 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21385 | | // (LD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1555 |
21386 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
21387 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21388 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21389 | 124k | {AliasPatternCond_K_Imm, 0}, |
21390 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21391 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21392 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21393 | | // (LD1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1562 |
21394 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
21395 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21396 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21397 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21398 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21399 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21400 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21401 | | // (LD1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1569 |
21402 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
21403 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21404 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21405 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21406 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21407 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21408 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21409 | | // (LD1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1576 |
21410 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
21411 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21412 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21413 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21414 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21415 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21416 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21417 | | // (LD1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1583 |
21418 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
21419 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21420 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21421 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21422 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21423 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21424 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21425 | | // (LD1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1590 |
21426 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
21427 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21428 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21429 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21430 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21431 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21432 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21433 | | // (LD1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1597 |
21434 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
21435 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21436 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21437 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21438 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21439 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21440 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21441 | | // (LD1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1604 |
21442 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
21443 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21444 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21445 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21446 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21447 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21448 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21449 | | // (LD1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1611 |
21450 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
21451 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21452 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21453 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21454 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21455 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21456 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21457 | | // (LD1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1618 |
21458 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
21459 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21460 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21461 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21462 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21463 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21464 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21465 | | // (LD1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1625 |
21466 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
21467 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
21468 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21469 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21470 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21471 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21472 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
21473 | | // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 1632 |
21474 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21475 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21476 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21477 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21478 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21479 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21480 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21481 | | // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 1639 |
21482 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21483 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21484 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21485 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21486 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21487 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21488 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21489 | | // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 1646 |
21490 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21491 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21492 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21493 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21494 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21495 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21496 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21497 | | // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 1653 |
21498 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21499 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
21500 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21501 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21502 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21503 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21504 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21505 | | // (LD2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1660 |
21506 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
21507 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21508 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21509 | 124k | {AliasPatternCond_K_Imm, 0}, |
21510 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21511 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21512 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21513 | | // (LD2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1667 |
21514 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
21515 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21516 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21517 | 124k | {AliasPatternCond_K_Imm, 0}, |
21518 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21519 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21520 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21521 | | // (LD2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1674 |
21522 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
21523 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21524 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21525 | 124k | {AliasPatternCond_K_Imm, 0}, |
21526 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21527 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21528 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21529 | | // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1681 |
21530 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21531 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21532 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21533 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21534 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21535 | | // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1686 |
21536 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21537 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21538 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21539 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21540 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21541 | | // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1691 |
21542 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21543 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21544 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21545 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21546 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21547 | | // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1696 |
21548 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21549 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21550 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21551 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21552 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21553 | | // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1701 |
21554 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21555 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21556 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21557 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21558 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21559 | | // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1706 |
21560 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21561 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21562 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21563 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21564 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21565 | | // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1711 |
21566 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21567 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21568 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21569 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21570 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21571 | | // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1716 |
21572 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21573 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21574 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21575 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21576 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21577 | | // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1721 |
21578 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21579 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21580 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21581 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21582 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21583 | | // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1726 |
21584 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21585 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21586 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21587 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21588 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21589 | | // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1731 |
21590 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21591 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21592 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21593 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21594 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21595 | | // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1736 |
21596 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21597 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21598 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21599 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21600 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21601 | | // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1741 |
21602 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21603 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21604 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21605 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21606 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21607 | | // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1746 |
21608 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21609 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
21610 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21611 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21612 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21613 | | // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1751 |
21614 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21615 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21616 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21617 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21618 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21619 | | // (LD2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1756 |
21620 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
21621 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21622 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21623 | 124k | {AliasPatternCond_K_Imm, 0}, |
21624 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21625 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21626 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21627 | | // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 1763 |
21628 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21629 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21630 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21631 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21632 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21633 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21634 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21635 | | // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 1770 |
21636 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21637 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21638 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21639 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21640 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21641 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21642 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21643 | | // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 1777 |
21644 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21645 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21646 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21647 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21648 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21649 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21650 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21651 | | // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 1784 |
21652 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21653 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
21654 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21655 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21656 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21657 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21658 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21659 | | // (LD3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1791 |
21660 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
21661 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21662 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21663 | 124k | {AliasPatternCond_K_Imm, 0}, |
21664 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21665 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21666 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21667 | | // (LD3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1798 |
21668 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
21669 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21670 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21671 | 124k | {AliasPatternCond_K_Imm, 0}, |
21672 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21673 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21674 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21675 | | // (LD3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1805 |
21676 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
21677 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21678 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21679 | 124k | {AliasPatternCond_K_Imm, 0}, |
21680 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21681 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21682 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21683 | | // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1812 |
21684 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21685 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21686 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21687 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21688 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21689 | | // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1817 |
21690 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21691 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21692 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21693 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21694 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21695 | | // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1822 |
21696 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21697 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21698 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21699 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21700 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21701 | | // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1827 |
21702 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21703 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21704 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21705 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21706 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21707 | | // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1832 |
21708 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21709 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21710 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21711 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21712 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21713 | | // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1837 |
21714 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21715 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21716 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21717 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21718 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21719 | | // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1842 |
21720 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21721 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21722 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21723 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21724 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21725 | | // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1847 |
21726 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21727 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21728 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21729 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21730 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21731 | | // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1852 |
21732 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21733 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21734 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21735 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21736 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21737 | | // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1857 |
21738 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21739 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21740 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21741 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21742 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21743 | | // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1862 |
21744 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21745 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21746 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21747 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21748 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21749 | | // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1867 |
21750 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21751 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21752 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21753 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21754 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21755 | | // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1872 |
21756 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21757 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21758 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21759 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21760 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21761 | | // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1877 |
21762 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21763 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
21764 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21765 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21766 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21767 | | // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1882 |
21768 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21769 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21770 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21771 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21772 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21773 | | // (LD3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1887 |
21774 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
21775 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21776 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21777 | 124k | {AliasPatternCond_K_Imm, 0}, |
21778 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21779 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21780 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21781 | | // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 1894 |
21782 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21783 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21784 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21785 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21786 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21787 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21788 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21789 | | // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 1901 |
21790 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21791 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21792 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21793 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21794 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21795 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21796 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21797 | | // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 1908 |
21798 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21799 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21800 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21801 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21802 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21803 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21804 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21805 | | // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 1915 |
21806 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21807 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
21808 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21809 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21810 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21811 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21812 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21813 | | // (LD4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1922 |
21814 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
21815 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21816 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21817 | 124k | {AliasPatternCond_K_Imm, 0}, |
21818 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21819 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21820 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21821 | | // (LD4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1929 |
21822 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
21823 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21824 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21825 | 124k | {AliasPatternCond_K_Imm, 0}, |
21826 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21827 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21828 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21829 | | // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1936 |
21830 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21831 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21832 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21833 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21834 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21835 | | // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1941 |
21836 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21837 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21838 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21839 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21840 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21841 | | // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1946 |
21842 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21843 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21844 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21845 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21846 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21847 | | // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1951 |
21848 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21849 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21850 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21851 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21852 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21853 | | // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1956 |
21854 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21855 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21856 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21857 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21858 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21859 | | // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1961 |
21860 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21861 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21862 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21863 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21864 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21865 | | // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1966 |
21866 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21867 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21868 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21869 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21870 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21871 | | // (LD4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1971 |
21872 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
21873 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21874 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21875 | 124k | {AliasPatternCond_K_Imm, 0}, |
21876 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21877 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21878 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21879 | | // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1978 |
21880 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21881 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21882 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21883 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21884 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21885 | | // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1983 |
21886 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21887 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21888 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21889 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21890 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21891 | | // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1988 |
21892 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21893 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21894 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21895 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21896 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21897 | | // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1993 |
21898 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21899 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21900 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21901 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21902 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21903 | | // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1998 |
21904 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21905 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21906 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21907 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21908 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21909 | | // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 2003 |
21910 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21911 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21912 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21913 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21914 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21915 | | // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 2008 |
21916 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21917 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
21918 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21919 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21920 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21921 | | // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 2013 |
21922 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21923 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21924 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21925 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21926 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21927 | | // (LD4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2018 |
21928 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
21929 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
21930 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21931 | 124k | {AliasPatternCond_K_Imm, 0}, |
21932 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
21933 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
21934 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
21935 | | // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 2025 |
21936 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21937 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21938 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21939 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21940 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21941 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21942 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21943 | | // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 2032 |
21944 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21945 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21946 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21947 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21948 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21949 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21950 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21951 | | // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 2039 |
21952 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21953 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21954 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21955 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21956 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21957 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21958 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21959 | | // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 2046 |
21960 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21961 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
21962 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21963 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21964 | 124k | {AliasPatternCond_K_Ignore, 0}, |
21965 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21966 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
21967 | | // (LDADDB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2053 |
21968 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21969 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
21970 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21971 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21972 | | // (LDADDH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2057 |
21973 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21974 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
21975 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21976 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21977 | | // (LDADDLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2061 |
21978 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21979 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
21980 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21981 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21982 | | // (LDADDLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2065 |
21983 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21984 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
21985 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21986 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21987 | | // (LDADDLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2069 |
21988 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21989 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
21990 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21991 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21992 | | // (LDADDLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2073 |
21993 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
21994 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
21995 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
21996 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
21997 | | // (LDADDW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2077 |
21998 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
21999 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22000 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22001 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22002 | | // (LDADDX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2081 |
22003 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22004 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22005 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22006 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22007 | | // (LDAPURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2085 |
22008 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22009 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22010 | 124k | {AliasPatternCond_K_Imm, 0}, |
22011 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22012 | | // (LDAPURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2089 |
22013 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22014 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22015 | 124k | {AliasPatternCond_K_Imm, 0}, |
22016 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22017 | | // (LDAPURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2093 |
22018 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22019 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22020 | 124k | {AliasPatternCond_K_Imm, 0}, |
22021 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22022 | | // (LDAPURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2097 |
22023 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22024 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22025 | 124k | {AliasPatternCond_K_Imm, 0}, |
22026 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22027 | | // (LDAPURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2101 |
22028 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22029 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22030 | 124k | {AliasPatternCond_K_Imm, 0}, |
22031 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22032 | | // (LDAPURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2105 |
22033 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22034 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22035 | 124k | {AliasPatternCond_K_Imm, 0}, |
22036 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22037 | | // (LDAPURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2109 |
22038 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22039 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22040 | 124k | {AliasPatternCond_K_Imm, 0}, |
22041 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22042 | | // (LDAPURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2113 |
22043 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22044 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22045 | 124k | {AliasPatternCond_K_Imm, 0}, |
22046 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22047 | | // (LDAPURi GPR32:$Rt, GPR64sp:$Rn, 0) - 2117 |
22048 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22049 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22050 | 124k | {AliasPatternCond_K_Imm, 0}, |
22051 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
22052 | | // (LDCLRB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2121 |
22053 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22054 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22055 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22056 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22057 | | // (LDCLRH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2125 |
22058 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22059 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22060 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22061 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22062 | | // (LDCLRLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2129 |
22063 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22064 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22065 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22066 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22067 | | // (LDCLRLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2133 |
22068 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22069 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22070 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22071 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22072 | | // (LDCLRLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2137 |
22073 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22074 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22075 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22076 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22077 | | // (LDCLRLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2141 |
22078 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22079 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22080 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22081 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22082 | | // (LDCLRW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2145 |
22083 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22084 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22085 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22086 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22087 | | // (LDCLRX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2149 |
22088 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22089 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22090 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22091 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22092 | | // (LDEORB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2153 |
22093 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22094 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22095 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22096 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22097 | | // (LDEORH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2157 |
22098 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22099 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22100 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22101 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22102 | | // (LDEORLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2161 |
22103 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22104 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22105 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22106 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22107 | | // (LDEORLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2165 |
22108 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22109 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22110 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22111 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22112 | | // (LDEORLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2169 |
22113 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22114 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22115 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22116 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22117 | | // (LDEORLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2173 |
22118 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22119 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22120 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22121 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22122 | | // (LDEORW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2177 |
22123 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22124 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22125 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22126 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22127 | | // (LDEORX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2181 |
22128 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22129 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22130 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22131 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22132 | | // (LDFF1B_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2185 |
22133 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22134 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22135 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22136 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22137 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22138 | | // (LDFF1B_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2190 |
22139 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22140 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22141 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22142 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22143 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22144 | | // (LDFF1B_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2195 |
22145 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22146 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22147 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22148 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22149 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22150 | | // (LDFF1B_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2200 |
22151 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22152 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22153 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22154 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22155 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22156 | | // (LDFF1D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2205 |
22157 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22158 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22159 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22160 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22161 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22162 | | // (LDFF1H_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2210 |
22163 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22164 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22165 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22166 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22167 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22168 | | // (LDFF1H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2215 |
22169 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22170 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22171 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22172 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22173 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22174 | | // (LDFF1H_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2220 |
22175 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22176 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22177 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22178 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22179 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22180 | | // (LDFF1SB_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2225 |
22181 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22182 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22183 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22184 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22185 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22186 | | // (LDFF1SB_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2230 |
22187 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22188 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22189 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22190 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22191 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22192 | | // (LDFF1SB_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2235 |
22193 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22194 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22195 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22196 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22197 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22198 | | // (LDFF1SH_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2240 |
22199 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22200 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22201 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22202 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22203 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22204 | | // (LDFF1SH_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2245 |
22205 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22206 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22207 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22208 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22209 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22210 | | // (LDFF1SW_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2250 |
22211 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22212 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22213 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22214 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22215 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22216 | | // (LDFF1W_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2255 |
22217 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22218 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22219 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22220 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22221 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22222 | | // (LDFF1W_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2260 |
22223 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22224 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22225 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22226 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22227 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22228 | | // (LDG GPR64:$Rt, GPR64sp:$Rn, 0) - 2265 |
22229 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22230 | 124k | {AliasPatternCond_K_Ignore, 0}, |
22231 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22232 | 124k | {AliasPatternCond_K_Imm, 0}, |
22233 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
22234 | | // (LDNF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2270 |
22235 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22236 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22237 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22238 | 124k | {AliasPatternCond_K_Imm, 0}, |
22239 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22240 | | // (LDNF1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2275 |
22241 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22242 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22243 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22244 | 124k | {AliasPatternCond_K_Imm, 0}, |
22245 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22246 | | // (LDNF1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2280 |
22247 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22248 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22249 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22250 | 124k | {AliasPatternCond_K_Imm, 0}, |
22251 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22252 | | // (LDNF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2285 |
22253 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22254 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22255 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22256 | 124k | {AliasPatternCond_K_Imm, 0}, |
22257 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22258 | | // (LDNF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2290 |
22259 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22260 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22261 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22262 | 124k | {AliasPatternCond_K_Imm, 0}, |
22263 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22264 | | // (LDNF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2295 |
22265 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22266 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22267 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22268 | 124k | {AliasPatternCond_K_Imm, 0}, |
22269 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22270 | | // (LDNF1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2300 |
22271 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22272 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22273 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22274 | 124k | {AliasPatternCond_K_Imm, 0}, |
22275 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22276 | | // (LDNF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2305 |
22277 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22278 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22279 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22280 | 124k | {AliasPatternCond_K_Imm, 0}, |
22281 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22282 | | // (LDNF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2310 |
22283 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22284 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22285 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22286 | 124k | {AliasPatternCond_K_Imm, 0}, |
22287 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22288 | | // (LDNF1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2315 |
22289 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22290 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22291 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22292 | 124k | {AliasPatternCond_K_Imm, 0}, |
22293 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22294 | | // (LDNF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2320 |
22295 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22296 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22297 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22298 | 124k | {AliasPatternCond_K_Imm, 0}, |
22299 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22300 | | // (LDNF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2325 |
22301 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22302 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22303 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22304 | 124k | {AliasPatternCond_K_Imm, 0}, |
22305 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22306 | | // (LDNF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2330 |
22307 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22308 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22309 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22310 | 124k | {AliasPatternCond_K_Imm, 0}, |
22311 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22312 | | // (LDNF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2335 |
22313 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22314 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22315 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22316 | 124k | {AliasPatternCond_K_Imm, 0}, |
22317 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22318 | | // (LDNF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2340 |
22319 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22320 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22321 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22322 | 124k | {AliasPatternCond_K_Imm, 0}, |
22323 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22324 | | // (LDNF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2345 |
22325 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22326 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22327 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22328 | 124k | {AliasPatternCond_K_Imm, 0}, |
22329 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
22330 | | // (LDNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 2350 |
22331 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22332 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22333 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22334 | 124k | {AliasPatternCond_K_Imm, 0}, |
22335 | | // (LDNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 2354 |
22336 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22337 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22338 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22339 | 124k | {AliasPatternCond_K_Imm, 0}, |
22340 | | // (LDNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 2358 |
22341 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22342 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22343 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22344 | 124k | {AliasPatternCond_K_Imm, 0}, |
22345 | | // (LDNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 2362 |
22346 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22347 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22348 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22349 | 124k | {AliasPatternCond_K_Imm, 0}, |
22350 | | // (LDNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2366 |
22351 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22352 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22353 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22354 | 124k | {AliasPatternCond_K_Imm, 0}, |
22355 | | // (LDNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2370 |
22356 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22357 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22358 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22359 | 124k | {AliasPatternCond_K_Imm, 0}, |
22360 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22361 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22362 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22363 | | // (LDNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2377 |
22364 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22365 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22366 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22367 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22368 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22369 | | // (LDNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2382 |
22370 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22371 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22372 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22373 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22374 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22375 | | // (LDNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2387 |
22376 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22377 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22378 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22379 | 124k | {AliasPatternCond_K_Imm, 0}, |
22380 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22381 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22382 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22383 | | // (LDNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2394 |
22384 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22385 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22386 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22387 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22388 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22389 | | // (LDNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2399 |
22390 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22391 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22392 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22393 | 124k | {AliasPatternCond_K_Imm, 0}, |
22394 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22395 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22396 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22397 | | // (LDNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2406 |
22398 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22399 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22400 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22401 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22402 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22403 | | // (LDNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2411 |
22404 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22405 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22406 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22407 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22408 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22409 | | // (LDNT1SB_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2416 |
22410 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22411 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22412 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22413 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22414 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22415 | | // (LDNT1SB_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2421 |
22416 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22417 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22418 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22419 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22420 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22421 | | // (LDNT1SH_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2426 |
22422 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22423 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22424 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22425 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22426 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22427 | | // (LDNT1SH_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2431 |
22428 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22429 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22430 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22431 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22432 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22433 | | // (LDNT1SW_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2436 |
22434 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22435 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22436 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22437 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22438 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22439 | | // (LDNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2441 |
22440 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22441 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22442 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22443 | 124k | {AliasPatternCond_K_Imm, 0}, |
22444 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22445 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22446 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22447 | | // (LDNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2448 |
22448 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22449 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22450 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22451 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22452 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22453 | | // (LDNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2453 |
22454 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22455 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
22456 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22457 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22458 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
22459 | | // (LDPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 2458 |
22460 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22461 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22462 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22463 | 124k | {AliasPatternCond_K_Imm, 0}, |
22464 | | // (LDPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 2462 |
22465 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22466 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22467 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22468 | 124k | {AliasPatternCond_K_Imm, 0}, |
22469 | | // (LDPSWi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2466 |
22470 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22471 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22472 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22473 | 124k | {AliasPatternCond_K_Imm, 0}, |
22474 | | // (LDPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 2470 |
22475 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22476 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22477 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22478 | 124k | {AliasPatternCond_K_Imm, 0}, |
22479 | | // (LDPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 2474 |
22480 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22481 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22482 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22483 | 124k | {AliasPatternCond_K_Imm, 0}, |
22484 | | // (LDPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2478 |
22485 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22486 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22487 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22488 | 124k | {AliasPatternCond_K_Imm, 0}, |
22489 | | // (LDRAAindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 2482 |
22490 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22491 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22492 | 124k | {AliasPatternCond_K_Imm, 0}, |
22493 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
22494 | | // (LDRABindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 2486 |
22495 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22496 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22497 | 124k | {AliasPatternCond_K_Imm, 0}, |
22498 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
22499 | | // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2490 |
22500 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22501 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22502 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22503 | 124k | {AliasPatternCond_K_Imm, 0}, |
22504 | 124k | {AliasPatternCond_K_Imm, 0}, |
22505 | | // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) - 2495 |
22506 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22507 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22508 | 124k | {AliasPatternCond_K_Imm, 0}, |
22509 | | // (LDRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2498 |
22510 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
22511 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22512 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22513 | 124k | {AliasPatternCond_K_Imm, 0}, |
22514 | 124k | {AliasPatternCond_K_Imm, 0}, |
22515 | | // (LDRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2503 |
22516 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
22517 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22518 | 124k | {AliasPatternCond_K_Imm, 0}, |
22519 | | // (LDRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2506 |
22520 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22521 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22522 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22523 | 124k | {AliasPatternCond_K_Imm, 0}, |
22524 | 124k | {AliasPatternCond_K_Imm, 0}, |
22525 | | // (LDRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2511 |
22526 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22527 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22528 | 124k | {AliasPatternCond_K_Imm, 0}, |
22529 | | // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2514 |
22530 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22531 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22532 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22533 | 124k | {AliasPatternCond_K_Imm, 0}, |
22534 | 124k | {AliasPatternCond_K_Imm, 0}, |
22535 | | // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) - 2519 |
22536 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22537 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22538 | 124k | {AliasPatternCond_K_Imm, 0}, |
22539 | | // (LDRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2522 |
22540 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
22541 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22542 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22543 | 124k | {AliasPatternCond_K_Imm, 0}, |
22544 | 124k | {AliasPatternCond_K_Imm, 0}, |
22545 | | // (LDRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2527 |
22546 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
22547 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22548 | 124k | {AliasPatternCond_K_Imm, 0}, |
22549 | | // (LDRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2530 |
22550 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22551 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22552 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22553 | 124k | {AliasPatternCond_K_Imm, 0}, |
22554 | 124k | {AliasPatternCond_K_Imm, 0}, |
22555 | | // (LDRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2535 |
22556 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22557 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22558 | 124k | {AliasPatternCond_K_Imm, 0}, |
22559 | | // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2538 |
22560 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22561 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22562 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22563 | 124k | {AliasPatternCond_K_Imm, 0}, |
22564 | 124k | {AliasPatternCond_K_Imm, 0}, |
22565 | | // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2543 |
22566 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22567 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22568 | 124k | {AliasPatternCond_K_Imm, 0}, |
22569 | | // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2546 |
22570 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22571 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22572 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22573 | 124k | {AliasPatternCond_K_Imm, 0}, |
22574 | 124k | {AliasPatternCond_K_Imm, 0}, |
22575 | | // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2551 |
22576 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22577 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22578 | 124k | {AliasPatternCond_K_Imm, 0}, |
22579 | | // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2554 |
22580 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22581 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22582 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22583 | 124k | {AliasPatternCond_K_Imm, 0}, |
22584 | 124k | {AliasPatternCond_K_Imm, 0}, |
22585 | | // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2559 |
22586 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22587 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22588 | 124k | {AliasPatternCond_K_Imm, 0}, |
22589 | | // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2562 |
22590 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22591 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22592 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22593 | 124k | {AliasPatternCond_K_Imm, 0}, |
22594 | 124k | {AliasPatternCond_K_Imm, 0}, |
22595 | | // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2567 |
22596 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22597 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22598 | 124k | {AliasPatternCond_K_Imm, 0}, |
22599 | | // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2570 |
22600 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22601 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22602 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22603 | 124k | {AliasPatternCond_K_Imm, 0}, |
22604 | 124k | {AliasPatternCond_K_Imm, 0}, |
22605 | | // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) - 2575 |
22606 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22607 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22608 | 124k | {AliasPatternCond_K_Imm, 0}, |
22609 | | // (LDRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2578 |
22610 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22611 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22612 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22613 | 124k | {AliasPatternCond_K_Imm, 0}, |
22614 | 124k | {AliasPatternCond_K_Imm, 0}, |
22615 | | // (LDRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2583 |
22616 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22617 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22618 | 124k | {AliasPatternCond_K_Imm, 0}, |
22619 | | // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2586 |
22620 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22621 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22622 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22623 | 124k | {AliasPatternCond_K_Imm, 0}, |
22624 | 124k | {AliasPatternCond_K_Imm, 0}, |
22625 | | // (LDRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 2591 |
22626 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22627 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22628 | 124k | {AliasPatternCond_K_Imm, 0}, |
22629 | | // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2594 |
22630 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22631 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22632 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22633 | 124k | {AliasPatternCond_K_Imm, 0}, |
22634 | 124k | {AliasPatternCond_K_Imm, 0}, |
22635 | | // (LDRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 2599 |
22636 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22637 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22638 | 124k | {AliasPatternCond_K_Imm, 0}, |
22639 | | // (LDR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 2602 |
22640 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
22641 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22642 | 124k | {AliasPatternCond_K_Imm, 0}, |
22643 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22644 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22645 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22646 | | // (LDR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 2608 |
22647 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPRRegClassID}, |
22648 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
22649 | 124k | {AliasPatternCond_K_Ignore, 0}, |
22650 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22651 | 124k | {AliasPatternCond_K_Imm, 0}, |
22652 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22653 | | // (LDR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 2614 |
22654 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
22655 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22656 | 124k | {AliasPatternCond_K_Imm, 0}, |
22657 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
22658 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
22659 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
22660 | | // (LDSETB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2620 |
22661 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22662 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22663 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22664 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22665 | | // (LDSETH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2624 |
22666 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22667 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22668 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22669 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22670 | | // (LDSETLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2628 |
22671 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22672 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22673 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22674 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22675 | | // (LDSETLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2632 |
22676 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22677 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22678 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22679 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22680 | | // (LDSETLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2636 |
22681 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22682 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22683 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22684 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22685 | | // (LDSETLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2640 |
22686 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22687 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22688 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22689 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22690 | | // (LDSETW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2644 |
22691 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22692 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22693 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22694 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22695 | | // (LDSETX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2648 |
22696 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22697 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22698 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22699 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22700 | | // (LDSMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2652 |
22701 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22702 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22703 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22704 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22705 | | // (LDSMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2656 |
22706 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22707 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22708 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22709 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22710 | | // (LDSMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2660 |
22711 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22712 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22713 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22714 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22715 | | // (LDSMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2664 |
22716 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22717 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22718 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22719 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22720 | | // (LDSMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2668 |
22721 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22722 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22723 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22724 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22725 | | // (LDSMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2672 |
22726 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22727 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22728 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22729 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22730 | | // (LDSMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2676 |
22731 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22732 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22733 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22734 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22735 | | // (LDSMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2680 |
22736 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22737 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22738 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22739 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22740 | | // (LDSMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2684 |
22741 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22742 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22743 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22744 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22745 | | // (LDSMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2688 |
22746 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22747 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22748 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22749 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22750 | | // (LDSMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2692 |
22751 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22752 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22753 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22754 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22755 | | // (LDSMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2696 |
22756 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22757 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22758 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22759 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22760 | | // (LDSMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2700 |
22761 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22762 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22763 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22764 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22765 | | // (LDSMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2704 |
22766 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22767 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22768 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22769 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22770 | | // (LDSMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2708 |
22771 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22772 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22773 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22774 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22775 | | // (LDSMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2712 |
22776 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22777 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22778 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22779 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22780 | | // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2716 |
22781 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22782 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22783 | 124k | {AliasPatternCond_K_Imm, 0}, |
22784 | | // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2719 |
22785 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22786 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22787 | 124k | {AliasPatternCond_K_Imm, 0}, |
22788 | | // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2722 |
22789 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22790 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22791 | 124k | {AliasPatternCond_K_Imm, 0}, |
22792 | | // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2725 |
22793 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22794 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22795 | 124k | {AliasPatternCond_K_Imm, 0}, |
22796 | | // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2728 |
22797 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22798 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22799 | 124k | {AliasPatternCond_K_Imm, 0}, |
22800 | | // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2731 |
22801 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22802 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22803 | 124k | {AliasPatternCond_K_Imm, 0}, |
22804 | | // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2734 |
22805 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22806 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22807 | 124k | {AliasPatternCond_K_Imm, 0}, |
22808 | | // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2737 |
22809 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22810 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22811 | 124k | {AliasPatternCond_K_Imm, 0}, |
22812 | | // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2740 |
22813 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22814 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22815 | 124k | {AliasPatternCond_K_Imm, 0}, |
22816 | | // (LDUMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2743 |
22817 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22818 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22819 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22820 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22821 | | // (LDUMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2747 |
22822 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22823 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22824 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22825 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22826 | | // (LDUMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2751 |
22827 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22828 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22829 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22830 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22831 | | // (LDUMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2755 |
22832 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22833 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22834 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22835 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22836 | | // (LDUMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2759 |
22837 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22838 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22839 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22840 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22841 | | // (LDUMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2763 |
22842 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22843 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22844 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22845 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22846 | | // (LDUMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2767 |
22847 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22848 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22849 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22850 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22851 | | // (LDUMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2771 |
22852 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22853 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22854 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22855 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22856 | | // (LDUMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2775 |
22857 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22858 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22859 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22860 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22861 | | // (LDUMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2779 |
22862 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22863 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22864 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22865 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22866 | | // (LDUMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2783 |
22867 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22868 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22869 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22870 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22871 | | // (LDUMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2787 |
22872 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22873 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22874 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22875 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22876 | | // (LDUMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2791 |
22877 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22878 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22879 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22880 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22881 | | // (LDUMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2795 |
22882 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22883 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22884 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22885 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22886 | | // (LDUMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2799 |
22887 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22888 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22889 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22890 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22891 | | // (LDUMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2803 |
22892 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22893 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22894 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22895 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureLSE}, |
22896 | | // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2807 |
22897 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22898 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22899 | 124k | {AliasPatternCond_K_Imm, 0}, |
22900 | | // (LDURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2810 |
22901 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
22902 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22903 | 124k | {AliasPatternCond_K_Imm, 0}, |
22904 | | // (LDURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2813 |
22905 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
22906 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22907 | 124k | {AliasPatternCond_K_Imm, 0}, |
22908 | | // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2816 |
22909 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22910 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22911 | 124k | {AliasPatternCond_K_Imm, 0}, |
22912 | | // (LDURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2819 |
22913 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
22914 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22915 | 124k | {AliasPatternCond_K_Imm, 0}, |
22916 | | // (LDURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2822 |
22917 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22918 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22919 | 124k | {AliasPatternCond_K_Imm, 0}, |
22920 | | // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2825 |
22921 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22922 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22923 | 124k | {AliasPatternCond_K_Imm, 0}, |
22924 | | // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2828 |
22925 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22926 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22927 | 124k | {AliasPatternCond_K_Imm, 0}, |
22928 | | // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2831 |
22929 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22930 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22931 | 124k | {AliasPatternCond_K_Imm, 0}, |
22932 | | // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2834 |
22933 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22934 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22935 | 124k | {AliasPatternCond_K_Imm, 0}, |
22936 | | // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2837 |
22937 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22938 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22939 | 124k | {AliasPatternCond_K_Imm, 0}, |
22940 | | // (LDURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2840 |
22941 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
22942 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22943 | 124k | {AliasPatternCond_K_Imm, 0}, |
22944 | | // (LDURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 2843 |
22945 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22946 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22947 | 124k | {AliasPatternCond_K_Imm, 0}, |
22948 | | // (LDURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 2846 |
22949 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22950 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
22951 | 124k | {AliasPatternCond_K_Imm, 0}, |
22952 | | // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2849 |
22953 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22954 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22955 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22956 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22957 | | // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2853 |
22958 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22959 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22960 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22961 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22962 | | // (MSRpstatesvcrImm1 { 0, 1, 1 }, { 1 }) - 2857 |
22963 | 124k | {AliasPatternCond_K_Imm, 3}, |
22964 | 124k | {AliasPatternCond_K_Imm, 1}, |
22965 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22966 | | // (MSRpstatesvcrImm1 { 0, 0, 1 }, { 1 }) - 2860 |
22967 | 124k | {AliasPatternCond_K_Imm, 1}, |
22968 | 124k | {AliasPatternCond_K_Imm, 1}, |
22969 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22970 | | // (MSRpstatesvcrImm1 { 0, 1, 0 }, { 1 }) - 2863 |
22971 | 124k | {AliasPatternCond_K_Imm, 2}, |
22972 | 124k | {AliasPatternCond_K_Imm, 1}, |
22973 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22974 | | // (MSRpstatesvcrImm1 { 0, 1, 1 }, { 0 }) - 2866 |
22975 | 124k | {AliasPatternCond_K_Imm, 3}, |
22976 | 124k | {AliasPatternCond_K_Imm, 0}, |
22977 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22978 | | // (MSRpstatesvcrImm1 { 0, 0, 1 }, { 0 }) - 2869 |
22979 | 124k | {AliasPatternCond_K_Imm, 1}, |
22980 | 124k | {AliasPatternCond_K_Imm, 0}, |
22981 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22982 | | // (MSRpstatesvcrImm1 { 0, 1, 0 }, { 0 }) - 2872 |
22983 | 124k | {AliasPatternCond_K_Imm, 2}, |
22984 | 124k | {AliasPatternCond_K_Imm, 0}, |
22985 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
22986 | | // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2875 |
22987 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22988 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22989 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
22990 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
22991 | | // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2879 |
22992 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22993 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22994 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
22995 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
22996 | | // (NOTv16i8 V128:$Vd, V128:$Vn) - 2883 |
22997 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22998 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
22999 | | // (NOTv8i8 V64:$Vd, V64:$Vn) - 2885 |
23000 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23001 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23002 | | // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) - 2887 |
23003 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23004 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
23005 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23006 | 124k | {AliasPatternCond_K_Imm, 0}, |
23007 | | // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) - 2891 |
23008 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23009 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
23010 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23011 | | // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2894 |
23012 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23013 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23014 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23015 | 124k | {AliasPatternCond_K_Imm, 0}, |
23016 | | // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) - 2898 |
23017 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23018 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23019 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23020 | 124k | {AliasPatternCond_K_Imm, 0}, |
23021 | | // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) - 2902 |
23022 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23023 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23024 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23025 | | // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2905 |
23026 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23027 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23028 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23029 | 124k | {AliasPatternCond_K_Imm, 0}, |
23030 | | // (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2909 |
23031 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23032 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23033 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23034 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23035 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23036 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23037 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23038 | | // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) - 2916 |
23039 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23040 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
23041 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23042 | 124k | {AliasPatternCond_K_Imm, 0}, |
23043 | | // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2920 |
23044 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23045 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23046 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23047 | 124k | {AliasPatternCond_K_Imm, 0}, |
23048 | | // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) - 2924 |
23049 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23050 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23051 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23052 | 124k | {AliasPatternCond_K_Imm, 0}, |
23053 | | // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2928 |
23054 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23055 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23056 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23057 | 124k | {AliasPatternCond_K_Imm, 0}, |
23058 | | // (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2932 |
23059 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23060 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23061 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23062 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23063 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23064 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23065 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23066 | | // (ORR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 2939 |
23067 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23068 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23069 | 124k | {AliasPatternCond_K_Custom, 1}, |
23070 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23071 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23072 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23073 | | // (ORR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 2945 |
23074 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23075 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23076 | 124k | {AliasPatternCond_K_Custom, 2}, |
23077 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23078 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23079 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23080 | | // (ORR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 2951 |
23081 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23082 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23083 | 124k | {AliasPatternCond_K_Custom, 3}, |
23084 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23085 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23086 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23087 | | // (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn) - 2957 |
23088 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23089 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23090 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23091 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23092 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23093 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23094 | | // (ORRv16i8 V128:$dst, V128:$src, V128:$src) - 2963 |
23095 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23096 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23097 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23098 | | // (ORRv8i8 V64:$dst, V64:$src, V64:$src) - 2966 |
23099 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23100 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23101 | 124k | {AliasPatternCond_K_TiedReg, 1}, |
23102 | | // (PACIA1716) - 2969 |
23103 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23104 | | // (PACIASP) - 2970 |
23105 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23106 | | // (PACIAZ) - 2971 |
23107 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23108 | | // (PACIB1716) - 2972 |
23109 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23110 | | // (PACIBSP) - 2973 |
23111 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23112 | | // (PACIBZ) - 2974 |
23113 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
23114 | | // (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2975 |
23115 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23116 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23117 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23118 | 124k | {AliasPatternCond_K_Imm, 0}, |
23119 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23120 | | // (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2980 |
23121 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23122 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23123 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23124 | 124k | {AliasPatternCond_K_Imm, 0}, |
23125 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23126 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23127 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23128 | | // (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2987 |
23129 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23130 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23131 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23132 | 124k | {AliasPatternCond_K_Imm, 0}, |
23133 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23134 | | // (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2992 |
23135 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23136 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23137 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23138 | 124k | {AliasPatternCond_K_Imm, 0}, |
23139 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23140 | | // (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2997 |
23141 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23142 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23143 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23144 | 124k | {AliasPatternCond_K_Imm, 0}, |
23145 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23146 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23147 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23148 | | // (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3004 |
23149 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23150 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23151 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23152 | 124k | {AliasPatternCond_K_Imm, 0}, |
23153 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23154 | | // (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3009 |
23155 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23156 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23157 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23158 | 124k | {AliasPatternCond_K_Imm, 0}, |
23159 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23160 | | // (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3014 |
23161 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23162 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23163 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23164 | 124k | {AliasPatternCond_K_Imm, 0}, |
23165 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23166 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23167 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23168 | | // (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3021 |
23169 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23170 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23171 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23172 | 124k | {AliasPatternCond_K_Imm, 0}, |
23173 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23174 | | // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3026 |
23175 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23176 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23177 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23178 | 124k | {AliasPatternCond_K_Imm, 0}, |
23179 | 124k | {AliasPatternCond_K_Imm, 0}, |
23180 | | // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) - 3031 |
23181 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23182 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23183 | 124k | {AliasPatternCond_K_Imm, 0}, |
23184 | | // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) - 3034 |
23185 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23186 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23187 | 124k | {AliasPatternCond_K_Imm, 0}, |
23188 | | // (PRFW_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3037 |
23189 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23190 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23191 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23192 | 124k | {AliasPatternCond_K_Imm, 0}, |
23193 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23194 | | // (PRFW_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3042 |
23195 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23196 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23197 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23198 | 124k | {AliasPatternCond_K_Imm, 0}, |
23199 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23200 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23201 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23202 | | // (PRFW_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3049 |
23203 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23204 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23205 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23206 | 124k | {AliasPatternCond_K_Imm, 0}, |
23207 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23208 | | // (PTRUES_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 3054 |
23209 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23210 | 124k | {AliasPatternCond_K_Imm, 31}, |
23211 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23212 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23213 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23214 | | // (PTRUES_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 3059 |
23215 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23216 | 124k | {AliasPatternCond_K_Imm, 31}, |
23217 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23218 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23219 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23220 | | // (PTRUES_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 3064 |
23221 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23222 | 124k | {AliasPatternCond_K_Imm, 31}, |
23223 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23224 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23225 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23226 | | // (PTRUES_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 3069 |
23227 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23228 | 124k | {AliasPatternCond_K_Imm, 31}, |
23229 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23230 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23231 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23232 | | // (PTRUE_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 3074 |
23233 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23234 | 124k | {AliasPatternCond_K_Imm, 31}, |
23235 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23236 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23237 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23238 | | // (PTRUE_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 3079 |
23239 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23240 | 124k | {AliasPatternCond_K_Imm, 31}, |
23241 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23242 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23243 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23244 | | // (PTRUE_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 3084 |
23245 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23246 | 124k | {AliasPatternCond_K_Imm, 31}, |
23247 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23248 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23249 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23250 | | // (PTRUE_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 3089 |
23251 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23252 | 124k | {AliasPatternCond_K_Imm, 31}, |
23253 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23254 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23255 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23256 | | // (RET LR) - 3094 |
23257 | 124k | {AliasPatternCond_K_Reg, AArch64_LR}, |
23258 | | // (SBCSWr GPR32:$dst, WZR, GPR32:$src) - 3095 |
23259 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23260 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
23261 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23262 | | // (SBCSXr GPR64:$dst, XZR, GPR64:$src) - 3098 |
23263 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23264 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23265 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23266 | | // (SBCWr GPR32:$dst, WZR, GPR32:$src) - 3101 |
23267 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23268 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
23269 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23270 | | // (SBCXr GPR64:$dst, XZR, GPR64:$src) - 3104 |
23271 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23272 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23273 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23274 | | // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 3107 |
23275 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23276 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23277 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23278 | 124k | {AliasPatternCond_K_Imm, 31}, |
23279 | | // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 3111 |
23280 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23281 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23282 | 124k | {AliasPatternCond_K_Imm, 0}, |
23283 | 124k | {AliasPatternCond_K_Imm, 7}, |
23284 | | // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 3115 |
23285 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23286 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23287 | 124k | {AliasPatternCond_K_Imm, 0}, |
23288 | 124k | {AliasPatternCond_K_Imm, 15}, |
23289 | | // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 3119 |
23290 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23291 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23292 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23293 | 124k | {AliasPatternCond_K_Imm, 63}, |
23294 | | // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 3123 |
23295 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23296 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23297 | 124k | {AliasPatternCond_K_Imm, 0}, |
23298 | 124k | {AliasPatternCond_K_Imm, 7}, |
23299 | | // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 3127 |
23300 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23301 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23302 | 124k | {AliasPatternCond_K_Imm, 0}, |
23303 | 124k | {AliasPatternCond_K_Imm, 15}, |
23304 | | // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 3131 |
23305 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23306 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23307 | 124k | {AliasPatternCond_K_Imm, 0}, |
23308 | 124k | {AliasPatternCond_K_Imm, 31}, |
23309 | | // (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd) - 3135 |
23310 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23311 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23312 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23313 | 124k | {AliasPatternCond_K_TiedReg, 0}, |
23314 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23315 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23316 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23317 | | // (SEL_ZPZZ_B ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd) - 3142 |
23318 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23319 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23320 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23321 | 124k | {AliasPatternCond_K_TiedReg, 0}, |
23322 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23323 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23324 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23325 | | // (SEL_ZPZZ_D ZPR64:$Zd, PPRAny:$Pg, ZPR64:$Zn, ZPR64:$Zd) - 3149 |
23326 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23327 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23328 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23329 | 124k | {AliasPatternCond_K_TiedReg, 0}, |
23330 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23331 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23332 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23333 | | // (SEL_ZPZZ_H ZPR16:$Zd, PPRAny:$Pg, ZPR16:$Zn, ZPR16:$Zd) - 3156 |
23334 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23335 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23336 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23337 | 124k | {AliasPatternCond_K_TiedReg, 0}, |
23338 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23339 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23340 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23341 | | // (SEL_ZPZZ_S ZPR32:$Zd, PPRAny:$Pg, ZPR32:$Zn, ZPR32:$Zd) - 3163 |
23342 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23343 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
23344 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23345 | 124k | {AliasPatternCond_K_TiedReg, 0}, |
23346 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23347 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23348 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23349 | | // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3170 |
23350 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23351 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23352 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23353 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23354 | | // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3174 |
23355 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23356 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23357 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
23358 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23359 | | // (SQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3178 |
23360 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23361 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23362 | 124k | {AliasPatternCond_K_Imm, 31}, |
23363 | 124k | {AliasPatternCond_K_Imm, 1}, |
23364 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23365 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23366 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23367 | | // (SQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3185 |
23368 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23369 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23370 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23371 | 124k | {AliasPatternCond_K_Imm, 1}, |
23372 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23373 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23374 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23375 | | // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3192 |
23376 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23377 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23378 | 124k | {AliasPatternCond_K_Imm, 31}, |
23379 | 124k | {AliasPatternCond_K_Imm, 1}, |
23380 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23381 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23382 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23383 | | // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3199 |
23384 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23385 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23386 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23387 | 124k | {AliasPatternCond_K_Imm, 1}, |
23388 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23389 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23390 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23391 | | // (SQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3206 |
23392 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23393 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23394 | 124k | {AliasPatternCond_K_Imm, 31}, |
23395 | 124k | {AliasPatternCond_K_Imm, 1}, |
23396 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23397 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23398 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23399 | | // (SQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3213 |
23400 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23401 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23402 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23403 | 124k | {AliasPatternCond_K_Imm, 1}, |
23404 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23405 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23406 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23407 | | // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3220 |
23408 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23409 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23410 | 124k | {AliasPatternCond_K_Imm, 31}, |
23411 | 124k | {AliasPatternCond_K_Imm, 1}, |
23412 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23413 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23414 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23415 | | // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3227 |
23416 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23417 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23418 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23419 | 124k | {AliasPatternCond_K_Imm, 1}, |
23420 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23421 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23422 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23423 | | // (SQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3234 |
23424 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23425 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23426 | 124k | {AliasPatternCond_K_Imm, 31}, |
23427 | 124k | {AliasPatternCond_K_Imm, 1}, |
23428 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23429 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23430 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23431 | | // (SQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3241 |
23432 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23433 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23434 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23435 | 124k | {AliasPatternCond_K_Imm, 1}, |
23436 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23437 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23438 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23439 | | // (SQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3248 |
23440 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23441 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23442 | 124k | {AliasPatternCond_K_Imm, 31}, |
23443 | 124k | {AliasPatternCond_K_Imm, 1}, |
23444 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23445 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23446 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23447 | | // (SQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3255 |
23448 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23449 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23450 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23451 | 124k | {AliasPatternCond_K_Imm, 1}, |
23452 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23453 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23454 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23455 | | // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3262 |
23456 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23457 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23458 | 124k | {AliasPatternCond_K_Imm, 31}, |
23459 | 124k | {AliasPatternCond_K_Imm, 1}, |
23460 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23461 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23462 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23463 | | // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3269 |
23464 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23465 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23466 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23467 | 124k | {AliasPatternCond_K_Imm, 1}, |
23468 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23469 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23470 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23471 | | // (SQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3276 |
23472 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23473 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23474 | 124k | {AliasPatternCond_K_Imm, 31}, |
23475 | 124k | {AliasPatternCond_K_Imm, 1}, |
23476 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23477 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23478 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23479 | | // (SQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3283 |
23480 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23481 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23482 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23483 | 124k | {AliasPatternCond_K_Imm, 1}, |
23484 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23485 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23486 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23487 | | // (SQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3290 |
23488 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23489 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23490 | 124k | {AliasPatternCond_K_Imm, 31}, |
23491 | 124k | {AliasPatternCond_K_Imm, 1}, |
23492 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23493 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23494 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23495 | | // (SQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3297 |
23496 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23497 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23498 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23499 | 124k | {AliasPatternCond_K_Imm, 1}, |
23500 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23501 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23502 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23503 | | // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3304 |
23504 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23505 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23506 | 124k | {AliasPatternCond_K_Imm, 31}, |
23507 | 124k | {AliasPatternCond_K_Imm, 1}, |
23508 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23509 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23510 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23511 | | // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3311 |
23512 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23513 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23514 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23515 | 124k | {AliasPatternCond_K_Imm, 1}, |
23516 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23517 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23518 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23519 | | // (SQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3318 |
23520 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23521 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23522 | 124k | {AliasPatternCond_K_Imm, 31}, |
23523 | 124k | {AliasPatternCond_K_Imm, 1}, |
23524 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23525 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23526 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23527 | | // (SQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3325 |
23528 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23529 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23530 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23531 | 124k | {AliasPatternCond_K_Imm, 1}, |
23532 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23533 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23534 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23535 | | // (SQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3332 |
23536 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23537 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23538 | 124k | {AliasPatternCond_K_Imm, 31}, |
23539 | 124k | {AliasPatternCond_K_Imm, 1}, |
23540 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23541 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23542 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23543 | | // (SQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3339 |
23544 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23545 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23546 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23547 | 124k | {AliasPatternCond_K_Imm, 1}, |
23548 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23549 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23550 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23551 | | // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3346 |
23552 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23553 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23554 | 124k | {AliasPatternCond_K_Imm, 31}, |
23555 | 124k | {AliasPatternCond_K_Imm, 1}, |
23556 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23557 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23558 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23559 | | // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3353 |
23560 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23561 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23562 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23563 | 124k | {AliasPatternCond_K_Imm, 1}, |
23564 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23565 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23566 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23567 | | // (SQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3360 |
23568 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23569 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23570 | 124k | {AliasPatternCond_K_Imm, 31}, |
23571 | 124k | {AliasPatternCond_K_Imm, 1}, |
23572 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23573 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23574 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23575 | | // (SQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3367 |
23576 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23577 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23578 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23579 | 124k | {AliasPatternCond_K_Imm, 1}, |
23580 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23581 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23582 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23583 | | // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3374 |
23584 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23585 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23586 | 124k | {AliasPatternCond_K_Imm, 31}, |
23587 | 124k | {AliasPatternCond_K_Imm, 1}, |
23588 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23589 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23590 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23591 | | // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3381 |
23592 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23593 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23594 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23595 | 124k | {AliasPatternCond_K_Imm, 1}, |
23596 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23597 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23598 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23599 | | // (SQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3388 |
23600 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23601 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23602 | 124k | {AliasPatternCond_K_Imm, 31}, |
23603 | 124k | {AliasPatternCond_K_Imm, 1}, |
23604 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23605 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23606 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23607 | | // (SQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3395 |
23608 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23609 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23610 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23611 | 124k | {AliasPatternCond_K_Imm, 1}, |
23612 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23613 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23614 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23615 | | // (SQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3402 |
23616 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23617 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23618 | 124k | {AliasPatternCond_K_Imm, 31}, |
23619 | 124k | {AliasPatternCond_K_Imm, 1}, |
23620 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23621 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23622 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23623 | | // (SQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3409 |
23624 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23625 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23626 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23627 | 124k | {AliasPatternCond_K_Imm, 1}, |
23628 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23629 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23630 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23631 | | // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3416 |
23632 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23633 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23634 | 124k | {AliasPatternCond_K_Imm, 31}, |
23635 | 124k | {AliasPatternCond_K_Imm, 1}, |
23636 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23637 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23638 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23639 | | // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3423 |
23640 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23641 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23642 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23643 | 124k | {AliasPatternCond_K_Imm, 1}, |
23644 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23645 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23646 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23647 | | // (SQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3430 |
23648 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23649 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23650 | 124k | {AliasPatternCond_K_Imm, 31}, |
23651 | 124k | {AliasPatternCond_K_Imm, 1}, |
23652 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23653 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23654 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23655 | | // (SQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3437 |
23656 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23657 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23658 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23659 | 124k | {AliasPatternCond_K_Imm, 1}, |
23660 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23661 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23662 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23663 | | // (SQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3444 |
23664 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23665 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23666 | 124k | {AliasPatternCond_K_Imm, 31}, |
23667 | 124k | {AliasPatternCond_K_Imm, 1}, |
23668 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23669 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23670 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23671 | | // (SQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3451 |
23672 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23673 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23674 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23675 | 124k | {AliasPatternCond_K_Imm, 1}, |
23676 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23677 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23678 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23679 | | // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3458 |
23680 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23681 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23682 | 124k | {AliasPatternCond_K_Imm, 31}, |
23683 | 124k | {AliasPatternCond_K_Imm, 1}, |
23684 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23685 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23686 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23687 | | // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3465 |
23688 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23689 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
23690 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23691 | 124k | {AliasPatternCond_K_Imm, 1}, |
23692 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23693 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23694 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23695 | | // (SQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3472 |
23696 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23697 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23698 | 124k | {AliasPatternCond_K_Imm, 31}, |
23699 | 124k | {AliasPatternCond_K_Imm, 1}, |
23700 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23701 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23702 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23703 | | // (SQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3479 |
23704 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23705 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23706 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23707 | 124k | {AliasPatternCond_K_Imm, 1}, |
23708 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23709 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23710 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23711 | | // (SST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3486 |
23712 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23713 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23714 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23715 | 124k | {AliasPatternCond_K_Imm, 0}, |
23716 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23717 | | // (SST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3491 |
23718 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23719 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23720 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23721 | 124k | {AliasPatternCond_K_Imm, 0}, |
23722 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23723 | | // (SST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3496 |
23724 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23725 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23726 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23727 | 124k | {AliasPatternCond_K_Imm, 0}, |
23728 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23729 | | // (SST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3501 |
23730 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23731 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23732 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23733 | 124k | {AliasPatternCond_K_Imm, 0}, |
23734 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23735 | | // (SST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3506 |
23736 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23737 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23738 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23739 | 124k | {AliasPatternCond_K_Imm, 0}, |
23740 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23741 | | // (SST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3511 |
23742 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23743 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23744 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23745 | 124k | {AliasPatternCond_K_Imm, 0}, |
23746 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23747 | | // (SST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3516 |
23748 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23749 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23750 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23751 | 124k | {AliasPatternCond_K_Imm, 0}, |
23752 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE}, |
23753 | | // (ST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3521 |
23754 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23755 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23756 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23757 | 124k | {AliasPatternCond_K_Imm, 0}, |
23758 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23759 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23760 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23761 | | // (ST1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3528 |
23762 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23763 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23764 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23765 | 124k | {AliasPatternCond_K_Imm, 0}, |
23766 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23767 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23768 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23769 | | // (ST1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3535 |
23770 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23771 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23772 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23773 | 124k | {AliasPatternCond_K_Imm, 0}, |
23774 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23775 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23776 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23777 | | // (ST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3542 |
23778 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23779 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23780 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23781 | 124k | {AliasPatternCond_K_Imm, 0}, |
23782 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23783 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23784 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23785 | | // (ST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3549 |
23786 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23787 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23788 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23789 | 124k | {AliasPatternCond_K_Imm, 0}, |
23790 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23791 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23792 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23793 | | // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 3556 |
23794 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23795 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
23796 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23797 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23798 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23799 | | // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 3561 |
23800 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23801 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
23802 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23803 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23804 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23805 | | // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 3566 |
23806 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23807 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
23808 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23809 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23810 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23811 | | // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 3571 |
23812 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23813 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
23814 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23815 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23816 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23817 | | // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 3576 |
23818 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23819 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
23820 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23821 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23822 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23823 | | // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 3581 |
23824 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23825 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
23826 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23827 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23828 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23829 | | // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 3586 |
23830 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23831 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
23832 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23833 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23834 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23835 | | // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 3591 |
23836 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23837 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
23838 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23839 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23840 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23841 | | // (ST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3596 |
23842 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23843 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23844 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23845 | 124k | {AliasPatternCond_K_Imm, 0}, |
23846 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23847 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23848 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23849 | | // (ST1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3603 |
23850 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23851 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23852 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23853 | 124k | {AliasPatternCond_K_Imm, 0}, |
23854 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23855 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23856 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23857 | | // (ST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3610 |
23858 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
23859 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
23860 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23861 | 124k | {AliasPatternCond_K_Imm, 0}, |
23862 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
23863 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
23864 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
23865 | | // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 3617 |
23866 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23867 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23868 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23869 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23870 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23871 | | // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 3622 |
23872 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23873 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23874 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23875 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23876 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23877 | | // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 3627 |
23878 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23879 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23880 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23881 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23882 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23883 | | // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 3632 |
23884 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23885 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23886 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23887 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23888 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23889 | | // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 3637 |
23890 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23891 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23892 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23893 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23894 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23895 | | // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 3642 |
23896 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23897 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23898 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23899 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23900 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23901 | | // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 3647 |
23902 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23903 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
23904 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23905 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23906 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23907 | | // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 3652 |
23908 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23909 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
23910 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23911 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23912 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23913 | | // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 3657 |
23914 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23915 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
23916 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23917 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23918 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23919 | | // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 3662 |
23920 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23921 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
23922 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23923 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23924 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23925 | | // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 3667 |
23926 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23927 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
23928 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23929 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23930 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23931 | | // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 3672 |
23932 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23933 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
23934 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23935 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23936 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23937 | | // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 3677 |
23938 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23939 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
23940 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23941 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23942 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23943 | | // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3682 |
23944 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23945 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
23946 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23947 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23948 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23949 | | // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3687 |
23950 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23951 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
23952 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23953 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23954 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23955 | | // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3692 |
23956 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23957 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
23958 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23959 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23960 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23961 | | // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3697 |
23962 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23963 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
23964 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23965 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23966 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23967 | | // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 3702 |
23968 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23969 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
23970 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23971 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23972 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23973 | | // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3707 |
23974 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23975 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
23976 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23977 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23978 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23979 | | // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3712 |
23980 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23981 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
23982 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23983 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23984 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23985 | | // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3717 |
23986 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23987 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
23988 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23989 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23990 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23991 | | // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3722 |
23992 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23993 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
23994 | 124k | {AliasPatternCond_K_Ignore, 0}, |
23995 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
23996 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
23997 | | // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3727 |
23998 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
23999 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
24000 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24001 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24002 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24003 | | // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3732 |
24004 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24005 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24006 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24007 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24008 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24009 | | // (ST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3737 |
24010 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24011 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24012 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24013 | 124k | {AliasPatternCond_K_Imm, 0}, |
24014 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24015 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24016 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24017 | | // (ST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3744 |
24018 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24019 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24020 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24021 | 124k | {AliasPatternCond_K_Imm, 0}, |
24022 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24023 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24024 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24025 | | // (ST1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3751 |
24026 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
24027 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24028 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24029 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24030 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24031 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24032 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24033 | | // (ST1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3758 |
24034 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
24035 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24036 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24037 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24038 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24039 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24040 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24041 | | // (ST1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3765 |
24042 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
24043 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24044 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24045 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24046 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24047 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24048 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24049 | | // (ST1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3772 |
24050 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
24051 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24052 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24053 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24054 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24055 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24056 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24057 | | // (ST1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3779 |
24058 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
24059 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24060 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24061 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24062 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24063 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24064 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24065 | | // (ST1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3786 |
24066 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID}, |
24067 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24068 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24069 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24070 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24071 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24072 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24073 | | // (ST1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3793 |
24074 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID}, |
24075 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24076 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24077 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24078 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24079 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24080 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24081 | | // (ST1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3800 |
24082 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID}, |
24083 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24084 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24085 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24086 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24087 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24088 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24089 | | // (ST1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3807 |
24090 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID}, |
24091 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24092 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24093 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24094 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24095 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24096 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24097 | | // (ST1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3814 |
24098 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID}, |
24099 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24100 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24101 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24102 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24103 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24104 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24105 | | // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 3821 |
24106 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24107 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24108 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24109 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24110 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24111 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24112 | | // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 3827 |
24113 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24114 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24115 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24116 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24117 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24118 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24119 | | // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 3833 |
24120 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24121 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24122 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24123 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24124 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24125 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24126 | | // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 3839 |
24127 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24128 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24129 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24130 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24131 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24132 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24133 | | // (ST2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3845 |
24134 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
24135 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24136 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24137 | 124k | {AliasPatternCond_K_Imm, 0}, |
24138 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24139 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24140 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24141 | | // (ST2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3852 |
24142 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
24143 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24144 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24145 | 124k | {AliasPatternCond_K_Imm, 0}, |
24146 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24147 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24148 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24149 | | // (ST2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3859 |
24150 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24151 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24152 | 124k | {AliasPatternCond_K_Imm, 0}, |
24153 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
24154 | | // (ST2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3863 |
24155 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
24156 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24157 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24158 | 124k | {AliasPatternCond_K_Imm, 0}, |
24159 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24160 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24161 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24162 | | // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3870 |
24163 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24164 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24165 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24166 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24167 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24168 | | // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3875 |
24169 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24170 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24171 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24172 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24173 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24174 | | // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3880 |
24175 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24176 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
24177 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24178 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24179 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24180 | | // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3885 |
24181 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24182 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
24183 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24184 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24185 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24186 | | // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3890 |
24187 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24188 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24189 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24190 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24191 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24192 | | // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3895 |
24193 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24194 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDRegClassID}, |
24195 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24196 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24197 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24198 | | // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3900 |
24199 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24200 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24201 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24202 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24203 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24204 | | // (ST2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3905 |
24205 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID}, |
24206 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24207 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24208 | 124k | {AliasPatternCond_K_Imm, 0}, |
24209 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24210 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24211 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24212 | | // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 3912 |
24213 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24214 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24215 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24216 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24217 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24218 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24219 | | // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 3918 |
24220 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24221 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24222 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24223 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24224 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24225 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24226 | | // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 3924 |
24227 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24228 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24229 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24230 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24231 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24232 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24233 | | // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 3930 |
24234 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24235 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQRegClassID}, |
24236 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24237 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24238 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24239 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24240 | | // (ST3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3936 |
24241 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
24242 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24243 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24244 | 124k | {AliasPatternCond_K_Imm, 0}, |
24245 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24246 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24247 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24248 | | // (ST3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3943 |
24249 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
24250 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24251 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24252 | 124k | {AliasPatternCond_K_Imm, 0}, |
24253 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24254 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24255 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24256 | | // (ST3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3950 |
24257 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
24258 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24259 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24260 | 124k | {AliasPatternCond_K_Imm, 0}, |
24261 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24262 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24263 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24264 | | // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 3957 |
24265 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24266 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24267 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24268 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24269 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24270 | | // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 3962 |
24271 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24272 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24273 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24274 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24275 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24276 | | // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 3967 |
24277 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24278 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
24279 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24280 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24281 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24282 | | // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 3972 |
24283 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24284 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
24285 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24286 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24287 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24288 | | // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3977 |
24289 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24290 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24291 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24292 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24293 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24294 | | // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3982 |
24295 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24296 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID}, |
24297 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24298 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24299 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24300 | | // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3987 |
24301 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24302 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24303 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24304 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24305 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24306 | | // (ST3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3992 |
24307 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID}, |
24308 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24309 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24310 | 124k | {AliasPatternCond_K_Imm, 0}, |
24311 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24312 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24313 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24314 | | // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 3999 |
24315 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24316 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24317 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24318 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24319 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24320 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24321 | | // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 4005 |
24322 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24323 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24324 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24325 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24326 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24327 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24328 | | // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 4011 |
24329 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24330 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24331 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24332 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24333 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24334 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24335 | | // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 4017 |
24336 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24337 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID}, |
24338 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24339 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24340 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24341 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24342 | | // (ST4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4023 |
24343 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
24344 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24345 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24346 | 124k | {AliasPatternCond_K_Imm, 0}, |
24347 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24348 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24349 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24350 | | // (ST4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4030 |
24351 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
24352 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24353 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24354 | 124k | {AliasPatternCond_K_Imm, 0}, |
24355 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24356 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24357 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24358 | | // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 4037 |
24359 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24360 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24361 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24362 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24363 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24364 | | // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 4042 |
24365 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24366 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24367 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24368 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24369 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24370 | | // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 4047 |
24371 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24372 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
24373 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24374 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24375 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24376 | | // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 4052 |
24377 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24378 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
24379 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24380 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24381 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24382 | | // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 4057 |
24383 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24384 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24385 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24386 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24387 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24388 | | // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 4062 |
24389 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24390 | 124k | {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID}, |
24391 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24392 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24393 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24394 | | // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 4067 |
24395 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24396 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24397 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24398 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24399 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24400 | | // (ST4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4072 |
24401 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
24402 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24403 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24404 | 124k | {AliasPatternCond_K_Imm, 0}, |
24405 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24406 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24407 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24408 | | // (ST4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4079 |
24409 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID}, |
24410 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24411 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24412 | 124k | {AliasPatternCond_K_Imm, 0}, |
24413 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24414 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24415 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24416 | | // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 4086 |
24417 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24418 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24419 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24420 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24421 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24422 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24423 | | // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 4092 |
24424 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24425 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24426 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24427 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24428 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24429 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24430 | | // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 4098 |
24431 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24432 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24433 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24434 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24435 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24436 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24437 | | // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 4104 |
24438 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24439 | 124k | {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID}, |
24440 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24441 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24442 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24443 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24444 | | // (STGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4110 |
24445 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24446 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24447 | 124k | {AliasPatternCond_K_Imm, 0}, |
24448 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
24449 | | // (STGPi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4114 |
24450 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24451 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24452 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24453 | 124k | {AliasPatternCond_K_Imm, 0}, |
24454 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
24455 | | // (STLURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 4119 |
24456 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24457 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24458 | 124k | {AliasPatternCond_K_Imm, 0}, |
24459 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
24460 | | // (STLURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 4123 |
24461 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24462 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24463 | 124k | {AliasPatternCond_K_Imm, 0}, |
24464 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
24465 | | // (STLURWi GPR32:$Rt, GPR64sp:$Rn, 0) - 4127 |
24466 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24467 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24468 | 124k | {AliasPatternCond_K_Imm, 0}, |
24469 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
24470 | | // (STLURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 4131 |
24471 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24472 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24473 | 124k | {AliasPatternCond_K_Imm, 0}, |
24474 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO}, |
24475 | | // (STNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 4135 |
24476 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24477 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24478 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24479 | 124k | {AliasPatternCond_K_Imm, 0}, |
24480 | | // (STNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 4139 |
24481 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24482 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24483 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24484 | 124k | {AliasPatternCond_K_Imm, 0}, |
24485 | | // (STNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 4143 |
24486 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24487 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24488 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24489 | 124k | {AliasPatternCond_K_Imm, 0}, |
24490 | | // (STNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 4147 |
24491 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24492 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24493 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24494 | 124k | {AliasPatternCond_K_Imm, 0}, |
24495 | | // (STNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4151 |
24496 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24497 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24498 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24499 | 124k | {AliasPatternCond_K_Imm, 0}, |
24500 | | // (STNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4155 |
24501 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24502 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24503 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24504 | 124k | {AliasPatternCond_K_Imm, 0}, |
24505 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24506 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24507 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24508 | | // (STNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4162 |
24509 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24510 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24511 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24512 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24513 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24514 | | // (STNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4167 |
24515 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24516 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24517 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24518 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24519 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24520 | | // (STNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4172 |
24521 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24522 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24523 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24524 | 124k | {AliasPatternCond_K_Imm, 0}, |
24525 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24526 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24527 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24528 | | // (STNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4179 |
24529 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24530 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24531 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24532 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24533 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24534 | | // (STNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4184 |
24535 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24536 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24537 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24538 | 124k | {AliasPatternCond_K_Imm, 0}, |
24539 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24540 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24541 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24542 | | // (STNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4191 |
24543 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24544 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24545 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24546 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24547 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24548 | | // (STNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4196 |
24549 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24550 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24551 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24552 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24553 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24554 | | // (STNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4201 |
24555 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24556 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24557 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24558 | 124k | {AliasPatternCond_K_Imm, 0}, |
24559 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24560 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24561 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24562 | | // (STNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4208 |
24563 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24564 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24565 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24566 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24567 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24568 | | // (STNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4213 |
24569 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24570 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID}, |
24571 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24572 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24573 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSVE2}, |
24574 | | // (STPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 4218 |
24575 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24576 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24577 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24578 | 124k | {AliasPatternCond_K_Imm, 0}, |
24579 | | // (STPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 4222 |
24580 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24581 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24582 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24583 | 124k | {AliasPatternCond_K_Imm, 0}, |
24584 | | // (STPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 4226 |
24585 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24586 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24587 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24588 | 124k | {AliasPatternCond_K_Imm, 0}, |
24589 | | // (STPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 4230 |
24590 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24591 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24592 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24593 | 124k | {AliasPatternCond_K_Imm, 0}, |
24594 | | // (STPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4234 |
24595 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24596 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24597 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24598 | 124k | {AliasPatternCond_K_Imm, 0}, |
24599 | | // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4238 |
24600 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24601 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24602 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24603 | 124k | {AliasPatternCond_K_Imm, 0}, |
24604 | 124k | {AliasPatternCond_K_Imm, 0}, |
24605 | | // (STRBBui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4243 |
24606 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24607 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24608 | 124k | {AliasPatternCond_K_Imm, 0}, |
24609 | | // (STRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4246 |
24610 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
24611 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24612 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24613 | 124k | {AliasPatternCond_K_Imm, 0}, |
24614 | 124k | {AliasPatternCond_K_Imm, 0}, |
24615 | | // (STRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 4251 |
24616 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
24617 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24618 | 124k | {AliasPatternCond_K_Imm, 0}, |
24619 | | // (STRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4254 |
24620 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24621 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24622 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24623 | 124k | {AliasPatternCond_K_Imm, 0}, |
24624 | 124k | {AliasPatternCond_K_Imm, 0}, |
24625 | | // (STRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 4259 |
24626 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24627 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24628 | 124k | {AliasPatternCond_K_Imm, 0}, |
24629 | | // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4262 |
24630 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24631 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24632 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24633 | 124k | {AliasPatternCond_K_Imm, 0}, |
24634 | 124k | {AliasPatternCond_K_Imm, 0}, |
24635 | | // (STRHHui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4267 |
24636 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24637 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24638 | 124k | {AliasPatternCond_K_Imm, 0}, |
24639 | | // (STRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4270 |
24640 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
24641 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24642 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24643 | 124k | {AliasPatternCond_K_Imm, 0}, |
24644 | 124k | {AliasPatternCond_K_Imm, 0}, |
24645 | | // (STRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 4275 |
24646 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
24647 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24648 | 124k | {AliasPatternCond_K_Imm, 0}, |
24649 | | // (STRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4278 |
24650 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24651 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24652 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24653 | 124k | {AliasPatternCond_K_Imm, 0}, |
24654 | 124k | {AliasPatternCond_K_Imm, 0}, |
24655 | | // (STRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 4283 |
24656 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24657 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24658 | 124k | {AliasPatternCond_K_Imm, 0}, |
24659 | | // (STRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4286 |
24660 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24661 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24662 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24663 | 124k | {AliasPatternCond_K_Imm, 0}, |
24664 | 124k | {AliasPatternCond_K_Imm, 0}, |
24665 | | // (STRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 4291 |
24666 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24667 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24668 | 124k | {AliasPatternCond_K_Imm, 0}, |
24669 | | // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4294 |
24670 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24671 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24672 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24673 | 124k | {AliasPatternCond_K_Imm, 0}, |
24674 | 124k | {AliasPatternCond_K_Imm, 0}, |
24675 | | // (STRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4299 |
24676 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24677 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24678 | 124k | {AliasPatternCond_K_Imm, 0}, |
24679 | | // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4302 |
24680 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24681 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24682 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24683 | 124k | {AliasPatternCond_K_Imm, 0}, |
24684 | 124k | {AliasPatternCond_K_Imm, 0}, |
24685 | | // (STRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 4307 |
24686 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24687 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24688 | 124k | {AliasPatternCond_K_Imm, 0}, |
24689 | | // (STR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 4310 |
24690 | 124k | {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID}, |
24691 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24692 | 124k | {AliasPatternCond_K_Imm, 0}, |
24693 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24694 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24695 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24696 | | // (STR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 4316 |
24697 | 124k | {AliasPatternCond_K_RegClass, AArch64_MPRRegClassID}, |
24698 | 124k | {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID}, |
24699 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24700 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24701 | 124k | {AliasPatternCond_K_Imm, 0}, |
24702 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
24703 | | // (STR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 4322 |
24704 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
24705 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24706 | 124k | {AliasPatternCond_K_Imm, 0}, |
24707 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24708 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24709 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24710 | | // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 4328 |
24711 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24712 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24713 | 124k | {AliasPatternCond_K_Imm, 0}, |
24714 | | // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 4331 |
24715 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24716 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24717 | 124k | {AliasPatternCond_K_Imm, 0}, |
24718 | | // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 4334 |
24719 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24720 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24721 | 124k | {AliasPatternCond_K_Imm, 0}, |
24722 | | // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 4337 |
24723 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24724 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24725 | 124k | {AliasPatternCond_K_Imm, 0}, |
24726 | | // (STURBBi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4340 |
24727 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24728 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24729 | 124k | {AliasPatternCond_K_Imm, 0}, |
24730 | | // (STURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 4343 |
24731 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID}, |
24732 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24733 | 124k | {AliasPatternCond_K_Imm, 0}, |
24734 | | // (STURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 4346 |
24735 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID}, |
24736 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24737 | 124k | {AliasPatternCond_K_Imm, 0}, |
24738 | | // (STURHHi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4349 |
24739 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24740 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24741 | 124k | {AliasPatternCond_K_Imm, 0}, |
24742 | | // (STURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 4352 |
24743 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID}, |
24744 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24745 | 124k | {AliasPatternCond_K_Imm, 0}, |
24746 | | // (STURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 4355 |
24747 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24748 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24749 | 124k | {AliasPatternCond_K_Imm, 0}, |
24750 | | // (STURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 4358 |
24751 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID}, |
24752 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24753 | 124k | {AliasPatternCond_K_Imm, 0}, |
24754 | | // (STURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4361 |
24755 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24756 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24757 | 124k | {AliasPatternCond_K_Imm, 0}, |
24758 | | // (STURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 4364 |
24759 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24760 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24761 | 124k | {AliasPatternCond_K_Imm, 0}, |
24762 | | // (STZ2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4367 |
24763 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24764 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24765 | 124k | {AliasPatternCond_K_Imm, 0}, |
24766 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
24767 | | // (STZGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4371 |
24768 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24769 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24770 | 124k | {AliasPatternCond_K_Imm, 0}, |
24771 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureMTE}, |
24772 | | // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 4375 |
24773 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24774 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
24775 | | // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 4377 |
24776 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24777 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24778 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24779 | 124k | {AliasPatternCond_K_Imm, 0}, |
24780 | | // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 4381 |
24781 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24782 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24783 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24784 | | // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) - 4384 |
24785 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24786 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24787 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24788 | 124k | {AliasPatternCond_K_Imm, 0}, |
24789 | | // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 4388 |
24790 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24791 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24792 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24793 | | // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4391 |
24794 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24795 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24796 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24797 | 124k | {AliasPatternCond_K_Imm, 0}, |
24798 | | // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 4395 |
24799 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24800 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
24801 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24802 | 124k | {AliasPatternCond_K_Imm, 16}, |
24803 | | // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 4399 |
24804 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24805 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
24806 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24807 | | // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 4402 |
24808 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24809 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
24810 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24811 | 124k | {AliasPatternCond_K_Imm, 16}, |
24812 | | // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 4406 |
24813 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24814 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24815 | | // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 4408 |
24816 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24817 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24818 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24819 | 124k | {AliasPatternCond_K_Imm, 0}, |
24820 | | // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 4412 |
24821 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24822 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24823 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24824 | | // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) - 4415 |
24825 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24826 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24827 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24828 | 124k | {AliasPatternCond_K_Imm, 0}, |
24829 | | // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 4419 |
24830 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24831 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24832 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24833 | | // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4422 |
24834 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24835 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24836 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24837 | 124k | {AliasPatternCond_K_Imm, 0}, |
24838 | | // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 4426 |
24839 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24840 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24841 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24842 | | // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 4429 |
24843 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24844 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
24845 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24846 | 124k | {AliasPatternCond_K_Imm, 24}, |
24847 | | // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 4433 |
24848 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24849 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24850 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24851 | | // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 4436 |
24852 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24853 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
24854 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24855 | 124k | {AliasPatternCond_K_Imm, 24}, |
24856 | | // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) - 4440 |
24857 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24858 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24859 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24860 | 124k | {AliasPatternCond_K_Imm, 0}, |
24861 | | // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 4444 |
24862 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24863 | 124k | {AliasPatternCond_K_Reg, AArch64_WZR}, |
24864 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24865 | | // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4447 |
24866 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24867 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24868 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24869 | 124k | {AliasPatternCond_K_Imm, 0}, |
24870 | | // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 4451 |
24871 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
24872 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
24873 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24874 | 124k | {AliasPatternCond_K_Imm, 16}, |
24875 | | // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 4455 |
24876 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID}, |
24877 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID}, |
24878 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24879 | 124k | {AliasPatternCond_K_Imm, 16}, |
24880 | | // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) - 4459 |
24881 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24882 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24883 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24884 | 124k | {AliasPatternCond_K_Imm, 0}, |
24885 | | // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 4463 |
24886 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24887 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24888 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24889 | | // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4466 |
24890 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24891 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24892 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24893 | 124k | {AliasPatternCond_K_Imm, 0}, |
24894 | | // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 4470 |
24895 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
24896 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24897 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24898 | 124k | {AliasPatternCond_K_Imm, 24}, |
24899 | | // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 4474 |
24900 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID}, |
24901 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID}, |
24902 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24903 | 124k | {AliasPatternCond_K_Imm, 24}, |
24904 | | // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) - 4478 |
24905 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24906 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24907 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24908 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24909 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24910 | | // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 4483 |
24911 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24912 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24913 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24914 | 124k | {AliasPatternCond_K_Imm, 31}, |
24915 | | // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 4487 |
24916 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24917 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24918 | 124k | {AliasPatternCond_K_Imm, 0}, |
24919 | 124k | {AliasPatternCond_K_Imm, 7}, |
24920 | | // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 4491 |
24921 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24922 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24923 | 124k | {AliasPatternCond_K_Imm, 0}, |
24924 | 124k | {AliasPatternCond_K_Imm, 15}, |
24925 | | // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 4495 |
24926 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24927 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24928 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24929 | 124k | {AliasPatternCond_K_Imm, 63}, |
24930 | | // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 4499 |
24931 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24932 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24933 | 124k | {AliasPatternCond_K_Imm, 0}, |
24934 | 124k | {AliasPatternCond_K_Imm, 7}, |
24935 | | // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 4503 |
24936 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24937 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24938 | 124k | {AliasPatternCond_K_Imm, 0}, |
24939 | 124k | {AliasPatternCond_K_Imm, 15}, |
24940 | | // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 4507 |
24941 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24942 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24943 | 124k | {AliasPatternCond_K_Imm, 0}, |
24944 | 124k | {AliasPatternCond_K_Imm, 31}, |
24945 | | // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4511 |
24946 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24947 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24948 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24949 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24950 | | // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) - 4515 |
24951 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24952 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24953 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24954 | | // (UMOVvi32_idx0 GPR32:$dst, V128:$src, VectorIndex0:$idx) - 4518 |
24955 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24956 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24957 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureNEON}, |
24958 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24959 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24960 | | // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) - 4523 |
24961 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24962 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24963 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureNEON}, |
24964 | | // (UMOVvi64_idx0 GPR64:$dst, V128:$src, VectorIndex0:$idx) - 4526 |
24965 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24966 | 124k | {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID}, |
24967 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureNEON}, |
24968 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24969 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24970 | | // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4531 |
24971 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24972 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24973 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24974 | 124k | {AliasPatternCond_K_Reg, AArch64_XZR}, |
24975 | | // (UQDECB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4535 |
24976 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24977 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24978 | 124k | {AliasPatternCond_K_Imm, 31}, |
24979 | 124k | {AliasPatternCond_K_Imm, 1}, |
24980 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24981 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24982 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24983 | | // (UQDECB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4542 |
24984 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
24985 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24986 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24987 | 124k | {AliasPatternCond_K_Imm, 1}, |
24988 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24989 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24990 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24991 | | // (UQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4549 |
24992 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
24993 | 124k | {AliasPatternCond_K_Ignore, 0}, |
24994 | 124k | {AliasPatternCond_K_Imm, 31}, |
24995 | 124k | {AliasPatternCond_K_Imm, 1}, |
24996 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
24997 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
24998 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
24999 | | // (UQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4556 |
25000 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25001 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25002 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25003 | 124k | {AliasPatternCond_K_Imm, 1}, |
25004 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25005 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25006 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25007 | | // (UQDECD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4563 |
25008 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25009 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25010 | 124k | {AliasPatternCond_K_Imm, 31}, |
25011 | 124k | {AliasPatternCond_K_Imm, 1}, |
25012 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25013 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25014 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25015 | | // (UQDECD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4570 |
25016 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25017 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25018 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25019 | 124k | {AliasPatternCond_K_Imm, 1}, |
25020 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25021 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25022 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25023 | | // (UQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4577 |
25024 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25025 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25026 | 124k | {AliasPatternCond_K_Imm, 31}, |
25027 | 124k | {AliasPatternCond_K_Imm, 1}, |
25028 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25029 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25030 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25031 | | // (UQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4584 |
25032 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25033 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25034 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25035 | 124k | {AliasPatternCond_K_Imm, 1}, |
25036 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25037 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25038 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25039 | | // (UQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4591 |
25040 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25041 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25042 | 124k | {AliasPatternCond_K_Imm, 31}, |
25043 | 124k | {AliasPatternCond_K_Imm, 1}, |
25044 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25045 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25046 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25047 | | // (UQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4598 |
25048 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25049 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25050 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25051 | 124k | {AliasPatternCond_K_Imm, 1}, |
25052 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25053 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25054 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25055 | | // (UQDECH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4605 |
25056 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25057 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25058 | 124k | {AliasPatternCond_K_Imm, 31}, |
25059 | 124k | {AliasPatternCond_K_Imm, 1}, |
25060 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25061 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25062 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25063 | | // (UQDECH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4612 |
25064 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25065 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25066 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25067 | 124k | {AliasPatternCond_K_Imm, 1}, |
25068 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25069 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25070 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25071 | | // (UQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4619 |
25072 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25073 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25074 | 124k | {AliasPatternCond_K_Imm, 31}, |
25075 | 124k | {AliasPatternCond_K_Imm, 1}, |
25076 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25077 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25078 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25079 | | // (UQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4626 |
25080 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25081 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25082 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25083 | 124k | {AliasPatternCond_K_Imm, 1}, |
25084 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25085 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25086 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25087 | | // (UQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4633 |
25088 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25089 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25090 | 124k | {AliasPatternCond_K_Imm, 31}, |
25091 | 124k | {AliasPatternCond_K_Imm, 1}, |
25092 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25093 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25094 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25095 | | // (UQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4640 |
25096 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25097 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25098 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25099 | 124k | {AliasPatternCond_K_Imm, 1}, |
25100 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25101 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25102 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25103 | | // (UQDECW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4647 |
25104 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25105 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25106 | 124k | {AliasPatternCond_K_Imm, 31}, |
25107 | 124k | {AliasPatternCond_K_Imm, 1}, |
25108 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25109 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25110 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25111 | | // (UQDECW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4654 |
25112 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25113 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25114 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25115 | 124k | {AliasPatternCond_K_Imm, 1}, |
25116 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25117 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25118 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25119 | | // (UQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4661 |
25120 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25121 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25122 | 124k | {AliasPatternCond_K_Imm, 31}, |
25123 | 124k | {AliasPatternCond_K_Imm, 1}, |
25124 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25125 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25126 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25127 | | // (UQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4668 |
25128 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25129 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25130 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25131 | 124k | {AliasPatternCond_K_Imm, 1}, |
25132 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25133 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25134 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25135 | | // (UQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4675 |
25136 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25137 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25138 | 124k | {AliasPatternCond_K_Imm, 31}, |
25139 | 124k | {AliasPatternCond_K_Imm, 1}, |
25140 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25141 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25142 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25143 | | // (UQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4682 |
25144 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25145 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25146 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25147 | 124k | {AliasPatternCond_K_Imm, 1}, |
25148 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25149 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25150 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25151 | | // (UQINCB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4689 |
25152 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25153 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25154 | 124k | {AliasPatternCond_K_Imm, 31}, |
25155 | 124k | {AliasPatternCond_K_Imm, 1}, |
25156 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25157 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25158 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25159 | | // (UQINCB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4696 |
25160 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25161 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25162 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25163 | 124k | {AliasPatternCond_K_Imm, 1}, |
25164 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25165 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25166 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25167 | | // (UQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4703 |
25168 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25169 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25170 | 124k | {AliasPatternCond_K_Imm, 31}, |
25171 | 124k | {AliasPatternCond_K_Imm, 1}, |
25172 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25173 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25174 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25175 | | // (UQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4710 |
25176 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25177 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25178 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25179 | 124k | {AliasPatternCond_K_Imm, 1}, |
25180 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25181 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25182 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25183 | | // (UQINCD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4717 |
25184 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25185 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25186 | 124k | {AliasPatternCond_K_Imm, 31}, |
25187 | 124k | {AliasPatternCond_K_Imm, 1}, |
25188 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25189 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25190 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25191 | | // (UQINCD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4724 |
25192 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25193 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25194 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25195 | 124k | {AliasPatternCond_K_Imm, 1}, |
25196 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25197 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25198 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25199 | | // (UQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4731 |
25200 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25201 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25202 | 124k | {AliasPatternCond_K_Imm, 31}, |
25203 | 124k | {AliasPatternCond_K_Imm, 1}, |
25204 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25205 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25206 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25207 | | // (UQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4738 |
25208 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25209 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25210 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25211 | 124k | {AliasPatternCond_K_Imm, 1}, |
25212 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25213 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25214 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25215 | | // (UQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4745 |
25216 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25217 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25218 | 124k | {AliasPatternCond_K_Imm, 31}, |
25219 | 124k | {AliasPatternCond_K_Imm, 1}, |
25220 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25221 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25222 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25223 | | // (UQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4752 |
25224 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25225 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25226 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25227 | 124k | {AliasPatternCond_K_Imm, 1}, |
25228 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25229 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25230 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25231 | | // (UQINCH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4759 |
25232 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25233 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25234 | 124k | {AliasPatternCond_K_Imm, 31}, |
25235 | 124k | {AliasPatternCond_K_Imm, 1}, |
25236 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25237 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25238 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25239 | | // (UQINCH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4766 |
25240 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25241 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25242 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25243 | 124k | {AliasPatternCond_K_Imm, 1}, |
25244 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25245 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25246 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25247 | | // (UQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4773 |
25248 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25249 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25250 | 124k | {AliasPatternCond_K_Imm, 31}, |
25251 | 124k | {AliasPatternCond_K_Imm, 1}, |
25252 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25253 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25254 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25255 | | // (UQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4780 |
25256 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25257 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25258 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25259 | 124k | {AliasPatternCond_K_Imm, 1}, |
25260 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25261 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25262 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25263 | | // (UQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4787 |
25264 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25265 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25266 | 124k | {AliasPatternCond_K_Imm, 31}, |
25267 | 124k | {AliasPatternCond_K_Imm, 1}, |
25268 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25269 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25270 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25271 | | // (UQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4794 |
25272 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25273 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25274 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25275 | 124k | {AliasPatternCond_K_Imm, 1}, |
25276 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25277 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25278 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25279 | | // (UQINCW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4801 |
25280 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25281 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25282 | 124k | {AliasPatternCond_K_Imm, 31}, |
25283 | 124k | {AliasPatternCond_K_Imm, 1}, |
25284 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25285 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25286 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25287 | | // (UQINCW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4808 |
25288 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID}, |
25289 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25290 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25291 | 124k | {AliasPatternCond_K_Imm, 1}, |
25292 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25293 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25294 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25295 | | // (UQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4815 |
25296 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25297 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25298 | 124k | {AliasPatternCond_K_Imm, 31}, |
25299 | 124k | {AliasPatternCond_K_Imm, 1}, |
25300 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25301 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25302 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25303 | | // (UQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4822 |
25304 | 124k | {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID}, |
25305 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25306 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25307 | 124k | {AliasPatternCond_K_Imm, 1}, |
25308 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25309 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25310 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25311 | | // (UQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4829 |
25312 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25313 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25314 | 124k | {AliasPatternCond_K_Imm, 31}, |
25315 | 124k | {AliasPatternCond_K_Imm, 1}, |
25316 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25317 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25318 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25319 | | // (UQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4836 |
25320 | 124k | {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID}, |
25321 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25322 | 124k | {AliasPatternCond_K_Ignore, 0}, |
25323 | 124k | {AliasPatternCond_K_Imm, 1}, |
25324 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE}, |
25325 | 124k | {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE}, |
25326 | 124k | {AliasPatternCond_K_EndOrFeatures, 0}, |
25327 | | // (XPACLRI) - 4843 |
25328 | 124k | {AliasPatternCond_K_Feature, AArch64_FeaturePAuth}, |
25329 | | // (ZERO_M { 1, 1, 1, 1, 1, 1, 1, 1 }) - 4844 |
25330 | 124k | {AliasPatternCond_K_Imm, 255}, |
25331 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25332 | | // (ZERO_M { 0, 1, 0, 1, 0, 1, 0, 1 }) - 4846 |
25333 | 124k | {AliasPatternCond_K_Imm, 85}, |
25334 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25335 | | // (ZERO_M { 1, 0, 1, 0, 1, 0, 1, 0 }) - 4848 |
25336 | 124k | {AliasPatternCond_K_Imm, 170}, |
25337 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25338 | | // (ZERO_M { 0, 0, 0, 1, 0, 0, 0, 1 }) - 4850 |
25339 | 124k | {AliasPatternCond_K_Imm, 17}, |
25340 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25341 | | // (ZERO_M { 0, 0, 1, 0, 0, 0, 1, 0 }) - 4852 |
25342 | 124k | {AliasPatternCond_K_Imm, 34}, |
25343 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25344 | | // (ZERO_M { 0, 1, 0, 0, 0, 1, 0, 0 }) - 4854 |
25345 | 124k | {AliasPatternCond_K_Imm, 68}, |
25346 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25347 | | // (ZERO_M { 1, 0, 0, 0, 1, 0, 0, 0 }) - 4856 |
25348 | 124k | {AliasPatternCond_K_Imm, 136}, |
25349 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25350 | | // (ZERO_M { 0, 0, 1, 1, 0, 0, 1, 1 }) - 4858 |
25351 | 124k | {AliasPatternCond_K_Imm, 51}, |
25352 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25353 | | // (ZERO_M { 1, 0, 0, 1, 1, 0, 0, 1 }) - 4860 |
25354 | 124k | {AliasPatternCond_K_Imm, 153}, |
25355 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25356 | | // (ZERO_M { 0, 1, 1, 0, 0, 1, 1, 0 }) - 4862 |
25357 | 124k | {AliasPatternCond_K_Imm, 102}, |
25358 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25359 | | // (ZERO_M { 1, 1, 0, 0, 1, 1, 0, 0 }) - 4864 |
25360 | 124k | {AliasPatternCond_K_Imm, 204}, |
25361 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25362 | | // (ZERO_M { 0, 1, 1, 1, 0, 1, 1, 1 }) - 4866 |
25363 | 124k | {AliasPatternCond_K_Imm, 119}, |
25364 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25365 | | // (ZERO_M { 1, 0, 1, 1, 1, 0, 1, 1 }) - 4868 |
25366 | 124k | {AliasPatternCond_K_Imm, 187}, |
25367 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25368 | | // (ZERO_M { 1, 1, 0, 1, 1, 1, 0, 1 }) - 4870 |
25369 | 124k | {AliasPatternCond_K_Imm, 221}, |
25370 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25371 | | // (ZERO_M { 1, 1, 1, 0, 1, 1, 1, 0 }) - 4872 |
25372 | 124k | {AliasPatternCond_K_Imm, 238}, |
25373 | 124k | {AliasPatternCond_K_Feature, AArch64_FeatureSME}, |
25374 | 124k | }; |
25375 | | |
25376 | 124k | static const char AsmStrings[] = |
25377 | 124k | /* 0 */ "cmn $\x02, $\xFF\x03\x01\0" |
25378 | 124k | /* 13 */ "cmn $\x02, $\x03\0" |
25379 | 124k | /* 24 */ "cmn $\x02, $\x03$\xFF\x04\x02\0" |
25380 | 124k | /* 39 */ "adds $\x01, $\x02, $\x03\0" |
25381 | 124k | /* 55 */ "cmn $\x02, $\x03$\xFF\x04\x03\0" |
25382 | 124k | /* 70 */ "mov $\x01, $\x02\0" |
25383 | 124k | /* 81 */ "add $\x01, $\x02, $\x03\0" |
25384 | 124k | /* 96 */ "tst $\x02, $\xFF\x03\x04\0" |
25385 | 124k | /* 109 */ "tst $\x02, $\x03\0" |
25386 | 124k | /* 120 */ "tst $\x02, $\x03$\xFF\x04\x02\0" |
25387 | 124k | /* 135 */ "ands $\x01, $\x02, $\x03\0" |
25388 | 124k | /* 151 */ "tst $\x02, $\xFF\x03\x05\0" |
25389 | 124k | /* 164 */ "movs $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" |
25390 | 124k | /* 188 */ "and $\x01, $\x02, $\x03\0" |
25391 | 124k | /* 203 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" |
25392 | 124k | /* 226 */ "and $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" |
25393 | 124k | /* 247 */ "and $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" |
25394 | 124k | /* 268 */ "and $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" |
25395 | 124k | /* 289 */ "autia1716\0" |
25396 | 124k | /* 299 */ "autiasp\0" |
25397 | 124k | /* 307 */ "autiaz\0" |
25398 | 124k | /* 314 */ "autib1716\0" |
25399 | 124k | /* 324 */ "autibsp\0" |
25400 | 124k | /* 332 */ "autibz\0" |
25401 | 124k | /* 339 */ "bics $\x01, $\x02, $\x03\0" |
25402 | 124k | /* 355 */ "bic $\x01, $\x02, $\x03\0" |
25403 | 124k | /* 370 */ "clrex\0" |
25404 | 124k | /* 376 */ "cntb $\x01\0" |
25405 | 124k | /* 384 */ "cntb $\x01, $\xFF\x02\x0E\0" |
25406 | 124k | /* 398 */ "cntd $\x01\0" |
25407 | 124k | /* 406 */ "cntd $\x01, $\xFF\x02\x0E\0" |
25408 | 124k | /* 420 */ "cnth $\x01\0" |
25409 | 124k | /* 428 */ "cnth $\x01, $\xFF\x02\x0E\0" |
25410 | 124k | /* 442 */ "cntw $\x01\0" |
25411 | 124k | /* 450 */ "cntw $\x01, $\xFF\x02\x0E\0" |
25412 | 124k | /* 464 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x0F\0" |
25413 | 124k | /* 487 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x11\0" |
25414 | 124k | /* 510 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x12\0" |
25415 | 124k | /* 533 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x13\0" |
25416 | 124k | /* 556 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\x04\0" |
25417 | 124k | /* 577 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\x04\0" |
25418 | 124k | /* 598 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\x04\0" |
25419 | 124k | /* 619 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\x04\0" |
25420 | 124k | /* 640 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x0F\0" |
25421 | 124k | /* 663 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/z, $\xFF\x03\x11\0" |
25422 | 124k | /* 686 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/z, $\xFF\x03\x12\0" |
25423 | 124k | /* 709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/z, $\xFF\x03\x13\0" |
25424 | 124k | /* 732 */ "cset $\x01, $\xFF\x04\x14\0" |
25425 | 124k | /* 746 */ "cinc $\x01, $\x02, $\xFF\x04\x14\0" |
25426 | 124k | /* 764 */ "csetm $\x01, $\xFF\x04\x14\0" |
25427 | 124k | /* 779 */ "cinv $\x01, $\x02, $\xFF\x04\x14\0" |
25428 | 124k | /* 797 */ "cneg $\x01, $\x02, $\xFF\x04\x14\0" |
25429 | 124k | /* 815 */ "dcps1\0" |
25430 | 124k | /* 821 */ "dcps2\0" |
25431 | 124k | /* 827 */ "dcps3\0" |
25432 | 124k | /* 833 */ "decb $\x01\0" |
25433 | 124k | /* 841 */ "decb $\x01, $\xFF\x03\x0E\0" |
25434 | 124k | /* 855 */ "decd $\x01\0" |
25435 | 124k | /* 863 */ "decd $\x01, $\xFF\x03\x0E\0" |
25436 | 124k | /* 877 */ "decd $\xFF\x01\x10\0" |
25437 | 124k | /* 887 */ "decd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
25438 | 124k | /* 903 */ "dech $\x01\0" |
25439 | 124k | /* 911 */ "dech $\x01, $\xFF\x03\x0E\0" |
25440 | 124k | /* 925 */ "dech $\xFF\x01\x09\0" |
25441 | 124k | /* 935 */ "dech $\xFF\x01\x09, $\xFF\x03\x0E\0" |
25442 | 124k | /* 951 */ "decw $\x01\0" |
25443 | 124k | /* 959 */ "decw $\x01, $\xFF\x03\x0E\0" |
25444 | 124k | /* 973 */ "decw $\xFF\x01\x0B\0" |
25445 | 124k | /* 983 */ "decw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
25446 | 124k | /* 999 */ "ssbb\0" |
25447 | 124k | /* 1004 */ "pssbb\0" |
25448 | 124k | /* 1010 */ "dfb\0" |
25449 | 124k | /* 1014 */ "mov $\xFF\x01\x09, $\xFF\x02\x15\0" |
25450 | 124k | /* 1029 */ "mov $\xFF\x01\x0B, $\xFF\x02\x16\0" |
25451 | 124k | /* 1044 */ "mov $\xFF\x01\x10, $\xFF\x02\x17\0" |
25452 | 124k | /* 1059 */ "dupm $\xFF\x01\x06, $\xFF\x02\x08\0" |
25453 | 124k | /* 1075 */ "dupm $\xFF\x01\x09, $\xFF\x02\x0A\0" |
25454 | 124k | /* 1091 */ "dupm $\xFF\x01\x0B, $\xFF\x02\x04\0" |
25455 | 124k | /* 1107 */ "mov $\xFF\x01\x06, $\xFF\x02\x0F\0" |
25456 | 124k | /* 1122 */ "mov $\xFF\x01\x10, $\xFF\x02\x11\0" |
25457 | 124k | /* 1137 */ "fmov $\xFF\x01\x10, #0.0\0" |
25458 | 124k | /* 1153 */ "mov $\xFF\x01\x09, $\xFF\x02\x12\0" |
25459 | 124k | /* 1168 */ "fmov $\xFF\x01\x09, #0.0\0" |
25460 | 124k | /* 1184 */ "mov $\xFF\x01\x0B, $\xFF\x02\x13\0" |
25461 | 124k | /* 1199 */ "fmov $\xFF\x01\x0B, #0.0\0" |
25462 | 124k | /* 1215 */ "mov $\xFF\x01\x06, $\x02\0" |
25463 | 124k | /* 1228 */ "mov $\xFF\x01\x10, $\x02\0" |
25464 | 124k | /* 1241 */ "mov $\xFF\x01\x09, $\x02\0" |
25465 | 124k | /* 1254 */ "mov $\xFF\x01\x0B, $\x02\0" |
25466 | 124k | /* 1267 */ "mov $\xFF\x01\x06, $\xFF\x02\x18\0" |
25467 | 124k | /* 1282 */ "mov $\xFF\x01\x06, $\xFF\x02\x06$\xFF\x03\x19\0" |
25468 | 124k | /* 1301 */ "mov $\xFF\x01\x10, $\xFF\x02\x1A\0" |
25469 | 124k | /* 1316 */ "mov $\xFF\x01\x10, $\xFF\x02\x10$\xFF\x03\x19\0" |
25470 | 124k | /* 1335 */ "mov $\xFF\x01\x09, $\xFF\x02\x1B\0" |
25471 | 124k | /* 1350 */ "mov $\xFF\x01\x09, $\xFF\x02\x09$\xFF\x03\x19\0" |
25472 | 124k | /* 1369 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1D\0" |
25473 | 124k | /* 1384 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1C$\xFF\x03\x19\0" |
25474 | 124k | /* 1403 */ "mov $\xFF\x01\x0B, $\xFF\x02\x1E\0" |
25475 | 124k | /* 1418 */ "mov $\xFF\x01\x0B, $\xFF\x02\x0B$\xFF\x03\x19\0" |
25476 | 124k | /* 1437 */ "eon $\x01, $\x02, $\x03\0" |
25477 | 124k | /* 1452 */ "nots $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" |
25478 | 124k | /* 1476 */ "eor $\x01, $\x02, $\x03\0" |
25479 | 124k | /* 1491 */ "not $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0" |
25480 | 124k | /* 1514 */ "eor $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" |
25481 | 124k | /* 1535 */ "eor $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" |
25482 | 124k | /* 1556 */ "eor $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" |
25483 | 124k | /* 1577 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0" |
25484 | 124k | /* 1610 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0" |
25485 | 124k | /* 1643 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0" |
25486 | 124k | /* 1676 */ "mov $\xFF\x01\x1C, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0" |
25487 | 124k | /* 1709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0" |
25488 | 124k | /* 1742 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0" |
25489 | 124k | /* 1775 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0" |
25490 | 124k | /* 1808 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0" |
25491 | 124k | /* 1841 */ "mov $\xFF\x01\x1C, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0" |
25492 | 124k | /* 1874 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0" |
25493 | 124k | /* 1907 */ "ror $\x01, $\x02, $\x04\0" |
25494 | 124k | /* 1922 */ "fmov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x22\0" |
25495 | 124k | /* 1946 */ "fmov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x22\0" |
25496 | 124k | /* 1970 */ "fmov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x22\0" |
25497 | 124k | /* 1994 */ "fmov $\xFF\x01\x10, $\xFF\x02\x22\0" |
25498 | 124k | /* 2010 */ "fmov $\xFF\x01\x09, $\xFF\x02\x22\0" |
25499 | 124k | /* 2026 */ "fmov $\xFF\x01\x0B, $\xFF\x02\x22\0" |
25500 | 124k | /* 2042 */ "ld1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25501 | 124k | /* 2068 */ "ld1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25502 | 124k | /* 2094 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25503 | 124k | /* 2120 */ "ld1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25504 | 124k | /* 2146 */ "ld1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25505 | 124k | /* 2172 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25506 | 124k | /* 2199 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25507 | 124k | /* 2226 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25508 | 124k | /* 2253 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25509 | 124k | /* 2280 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25510 | 124k | /* 2307 */ "ld1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25511 | 124k | /* 2333 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25512 | 124k | /* 2359 */ "ldff1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25513 | 124k | /* 2387 */ "ldff1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25514 | 124k | /* 2415 */ "ldff1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25515 | 124k | /* 2443 */ "ldff1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25516 | 124k | /* 2471 */ "ldff1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25517 | 124k | /* 2499 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25518 | 124k | /* 2528 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25519 | 124k | /* 2557 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25520 | 124k | /* 2586 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25521 | 124k | /* 2615 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25522 | 124k | /* 2644 */ "ldff1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25523 | 124k | /* 2672 */ "ldff1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25524 | 124k | /* 2700 */ "nop\0" |
25525 | 124k | /* 2704 */ "yield\0" |
25526 | 124k | /* 2710 */ "wfe\0" |
25527 | 124k | /* 2714 */ "wfi\0" |
25528 | 124k | /* 2718 */ "sev\0" |
25529 | 124k | /* 2722 */ "sevl\0" |
25530 | 124k | /* 2727 */ "dgh\0" |
25531 | 124k | /* 2731 */ "esb\0" |
25532 | 124k | /* 2735 */ "csdb\0" |
25533 | 124k | /* 2740 */ "bti\0" |
25534 | 124k | /* 2744 */ "bti $\xFF\x01\x25\0" |
25535 | 124k | /* 2753 */ "psb $\xFF\x01\x26\0" |
25536 | 124k | /* 2762 */ "incb $\x01\0" |
25537 | 124k | /* 2770 */ "incb $\x01, $\xFF\x03\x0E\0" |
25538 | 124k | /* 2784 */ "incd $\x01\0" |
25539 | 124k | /* 2792 */ "incd $\x01, $\xFF\x03\x0E\0" |
25540 | 124k | /* 2806 */ "incd $\xFF\x01\x10\0" |
25541 | 124k | /* 2816 */ "incd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
25542 | 124k | /* 2832 */ "inch $\x01\0" |
25543 | 124k | /* 2840 */ "inch $\x01, $\xFF\x03\x0E\0" |
25544 | 124k | /* 2854 */ "inch $\xFF\x01\x09\0" |
25545 | 124k | /* 2864 */ "inch $\xFF\x01\x09, $\xFF\x03\x0E\0" |
25546 | 124k | /* 2880 */ "incw $\x01\0" |
25547 | 124k | /* 2888 */ "incw $\x01, $\xFF\x03\x0E\0" |
25548 | 124k | /* 2902 */ "incw $\xFF\x01\x0B\0" |
25549 | 124k | /* 2912 */ "incw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
25550 | 124k | /* 2928 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x06\0" |
25551 | 124k | /* 2961 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x10\0" |
25552 | 124k | /* 2994 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x09\0" |
25553 | 124k | /* 3027 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x1C\0" |
25554 | 124k | /* 3060 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x0B\0" |
25555 | 124k | /* 3093 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x06\0" |
25556 | 124k | /* 3126 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x10\0" |
25557 | 124k | /* 3159 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x09\0" |
25558 | 124k | /* 3192 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x1C\0" |
25559 | 124k | /* 3225 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x0B\0" |
25560 | 124k | /* 3258 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\x04\0" |
25561 | 124k | /* 3277 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\xFF\x04\x0C.h$\xFF\x05\x19\0" |
25562 | 124k | /* 3304 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\x04\0" |
25563 | 124k | /* 3323 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\xFF\x04\x0C.s$\xFF\x05\x19\0" |
25564 | 124k | /* 3350 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\x04\0" |
25565 | 124k | /* 3369 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\xFF\x04\x0C.d$\xFF\x05\x19\0" |
25566 | 124k | /* 3396 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\x04\0" |
25567 | 124k | /* 3415 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\xFF\x04\x0C.b$\xFF\x05\x19\0" |
25568 | 124k | /* 3442 */ "irg $\x01, $\x02\0" |
25569 | 124k | /* 3453 */ "isb\0" |
25570 | 124k | /* 3457 */ "ld1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25571 | 124k | /* 3481 */ "ld1b $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25572 | 124k | /* 3505 */ "ld1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25573 | 124k | /* 3529 */ "ld1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25574 | 124k | /* 3553 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25575 | 124k | /* 3577 */ "ld1 $\xFF\x02\x29, [$\x01], #64\0" |
25576 | 124k | /* 3597 */ "ld1 $\xFF\x02\x2A, [$\x01], #32\0" |
25577 | 124k | /* 3617 */ "ld1 $\xFF\x02\x2B, [$\x01], #64\0" |
25578 | 124k | /* 3637 */ "ld1 $\xFF\x02\x2C, [$\x01], #32\0" |
25579 | 124k | /* 3657 */ "ld1 $\xFF\x02\x2D, [$\x01], #32\0" |
25580 | 124k | /* 3677 */ "ld1 $\xFF\x02\x2E, [$\x01], #64\0" |
25581 | 124k | /* 3697 */ "ld1 $\xFF\x02\x2F, [$\x01], #32\0" |
25582 | 124k | /* 3717 */ "ld1 $\xFF\x02\x30, [$\x01], #64\0" |
25583 | 124k | /* 3737 */ "ld1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25584 | 124k | /* 3761 */ "ld1h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25585 | 124k | /* 3785 */ "ld1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25586 | 124k | /* 3809 */ "ld1 $\xFF\x02\x29, [$\x01], #16\0" |
25587 | 124k | /* 3829 */ "ld1 $\xFF\x02\x2A, [$\x01], #8\0" |
25588 | 124k | /* 3848 */ "ld1 $\xFF\x02\x2B, [$\x01], #16\0" |
25589 | 124k | /* 3868 */ "ld1 $\xFF\x02\x2C, [$\x01], #8\0" |
25590 | 124k | /* 3887 */ "ld1 $\xFF\x02\x2D, [$\x01], #8\0" |
25591 | 124k | /* 3906 */ "ld1 $\xFF\x02\x2E, [$\x01], #16\0" |
25592 | 124k | /* 3926 */ "ld1 $\xFF\x02\x2F, [$\x01], #8\0" |
25593 | 124k | /* 3945 */ "ld1 $\xFF\x02\x30, [$\x01], #16\0" |
25594 | 124k | /* 3965 */ "ld1rb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25595 | 124k | /* 3990 */ "ld1rb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25596 | 124k | /* 4015 */ "ld1rb $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25597 | 124k | /* 4040 */ "ld1rb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25598 | 124k | /* 4065 */ "ld1rd $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25599 | 124k | /* 4090 */ "ld1rh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25600 | 124k | /* 4115 */ "ld1rh $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25601 | 124k | /* 4140 */ "ld1rh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25602 | 124k | /* 4165 */ "ld1rob $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25603 | 124k | /* 4191 */ "ld1rod $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25604 | 124k | /* 4217 */ "ld1roh $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25605 | 124k | /* 4243 */ "ld1row $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25606 | 124k | /* 4269 */ "ld1rqb $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25607 | 124k | /* 4295 */ "ld1rqd $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25608 | 124k | /* 4321 */ "ld1rqh $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25609 | 124k | /* 4347 */ "ld1rqw $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25610 | 124k | /* 4373 */ "ld1rsb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25611 | 124k | /* 4399 */ "ld1rsb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25612 | 124k | /* 4425 */ "ld1rsb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25613 | 124k | /* 4451 */ "ld1rsh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25614 | 124k | /* 4477 */ "ld1rsh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25615 | 124k | /* 4503 */ "ld1rsw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25616 | 124k | /* 4529 */ "ld1rw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25617 | 124k | /* 4554 */ "ld1rw $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25618 | 124k | /* 4579 */ "ld1r $\xFF\x02\x29, [$\x01], #1\0" |
25619 | 124k | /* 4599 */ "ld1r $\xFF\x02\x2A, [$\x01], #8\0" |
25620 | 124k | /* 4619 */ "ld1r $\xFF\x02\x2B, [$\x01], #8\0" |
25621 | 124k | /* 4639 */ "ld1r $\xFF\x02\x2C, [$\x01], #4\0" |
25622 | 124k | /* 4659 */ "ld1r $\xFF\x02\x2D, [$\x01], #2\0" |
25623 | 124k | /* 4679 */ "ld1r $\xFF\x02\x2E, [$\x01], #4\0" |
25624 | 124k | /* 4699 */ "ld1r $\xFF\x02\x2F, [$\x01], #1\0" |
25625 | 124k | /* 4719 */ "ld1r $\xFF\x02\x30, [$\x01], #2\0" |
25626 | 124k | /* 4739 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25627 | 124k | /* 4764 */ "ld1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25628 | 124k | /* 4789 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25629 | 124k | /* 4814 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25630 | 124k | /* 4839 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25631 | 124k | /* 4864 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25632 | 124k | /* 4889 */ "ld1 $\xFF\x02\x29, [$\x01], #48\0" |
25633 | 124k | /* 4909 */ "ld1 $\xFF\x02\x2A, [$\x01], #24\0" |
25634 | 124k | /* 4929 */ "ld1 $\xFF\x02\x2B, [$\x01], #48\0" |
25635 | 124k | /* 4949 */ "ld1 $\xFF\x02\x2C, [$\x01], #24\0" |
25636 | 124k | /* 4969 */ "ld1 $\xFF\x02\x2D, [$\x01], #24\0" |
25637 | 124k | /* 4989 */ "ld1 $\xFF\x02\x2E, [$\x01], #48\0" |
25638 | 124k | /* 5009 */ "ld1 $\xFF\x02\x2F, [$\x01], #24\0" |
25639 | 124k | /* 5029 */ "ld1 $\xFF\x02\x30, [$\x01], #48\0" |
25640 | 124k | /* 5049 */ "ld1 $\xFF\x02\x29, [$\x01], #32\0" |
25641 | 124k | /* 5069 */ "ld1 $\xFF\x02\x2A, [$\x01], #16\0" |
25642 | 124k | /* 5089 */ "ld1 $\xFF\x02\x2B, [$\x01], #32\0" |
25643 | 124k | /* 5109 */ "ld1 $\xFF\x02\x2C, [$\x01], #16\0" |
25644 | 124k | /* 5129 */ "ld1 $\xFF\x02\x2D, [$\x01], #16\0" |
25645 | 124k | /* 5149 */ "ld1 $\xFF\x02\x2E, [$\x01], #32\0" |
25646 | 124k | /* 5169 */ "ld1 $\xFF\x02\x2F, [$\x01], #16\0" |
25647 | 124k | /* 5189 */ "ld1 $\xFF\x02\x30, [$\x01], #32\0" |
25648 | 124k | /* 5209 */ "ld1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25649 | 124k | /* 5233 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25650 | 124k | /* 5257 */ "ld1b {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25651 | 124k | /* 5293 */ "ld1d {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25652 | 124k | /* 5329 */ "ld1h {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25653 | 124k | /* 5365 */ "ld1q {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25654 | 124k | /* 5401 */ "ld1w {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25655 | 124k | /* 5437 */ "ld1b {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25656 | 124k | /* 5473 */ "ld1d {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25657 | 124k | /* 5509 */ "ld1h {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25658 | 124k | /* 5545 */ "ld1q {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25659 | 124k | /* 5581 */ "ld1w {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0" |
25660 | 124k | /* 5617 */ "ld1 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #2\0" |
25661 | 124k | /* 5640 */ "ld1 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #4\0" |
25662 | 124k | /* 5663 */ "ld1 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #8\0" |
25663 | 124k | /* 5686 */ "ld1 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #1\0" |
25664 | 124k | /* 5709 */ "ld2b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25665 | 124k | /* 5733 */ "ld2d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25666 | 124k | /* 5757 */ "ld2h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25667 | 124k | /* 5781 */ "ld2r $\xFF\x02\x29, [$\x01], #2\0" |
25668 | 124k | /* 5801 */ "ld2r $\xFF\x02\x2A, [$\x01], #16\0" |
25669 | 124k | /* 5822 */ "ld2r $\xFF\x02\x2B, [$\x01], #16\0" |
25670 | 124k | /* 5843 */ "ld2r $\xFF\x02\x2C, [$\x01], #8\0" |
25671 | 124k | /* 5863 */ "ld2r $\xFF\x02\x2D, [$\x01], #4\0" |
25672 | 124k | /* 5883 */ "ld2r $\xFF\x02\x2E, [$\x01], #8\0" |
25673 | 124k | /* 5903 */ "ld2r $\xFF\x02\x2F, [$\x01], #2\0" |
25674 | 124k | /* 5923 */ "ld2r $\xFF\x02\x30, [$\x01], #4\0" |
25675 | 124k | /* 5943 */ "ld2 $\xFF\x02\x29, [$\x01], #32\0" |
25676 | 124k | /* 5963 */ "ld2 $\xFF\x02\x2B, [$\x01], #32\0" |
25677 | 124k | /* 5983 */ "ld2 $\xFF\x02\x2C, [$\x01], #16\0" |
25678 | 124k | /* 6003 */ "ld2 $\xFF\x02\x2D, [$\x01], #16\0" |
25679 | 124k | /* 6023 */ "ld2 $\xFF\x02\x2E, [$\x01], #32\0" |
25680 | 124k | /* 6043 */ "ld2 $\xFF\x02\x2F, [$\x01], #16\0" |
25681 | 124k | /* 6063 */ "ld2 $\xFF\x02\x30, [$\x01], #32\0" |
25682 | 124k | /* 6083 */ "ld2w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25683 | 124k | /* 6107 */ "ld2 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #4\0" |
25684 | 124k | /* 6130 */ "ld2 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #8\0" |
25685 | 124k | /* 6153 */ "ld2 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #16\0" |
25686 | 124k | /* 6177 */ "ld2 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #2\0" |
25687 | 124k | /* 6200 */ "ld3b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25688 | 124k | /* 6224 */ "ld3d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25689 | 124k | /* 6248 */ "ld3h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25690 | 124k | /* 6272 */ "ld3r $\xFF\x02\x29, [$\x01], #3\0" |
25691 | 124k | /* 6292 */ "ld3r $\xFF\x02\x2A, [$\x01], #24\0" |
25692 | 124k | /* 6313 */ "ld3r $\xFF\x02\x2B, [$\x01], #24\0" |
25693 | 124k | /* 6334 */ "ld3r $\xFF\x02\x2C, [$\x01], #12\0" |
25694 | 124k | /* 6355 */ "ld3r $\xFF\x02\x2D, [$\x01], #6\0" |
25695 | 124k | /* 6375 */ "ld3r $\xFF\x02\x2E, [$\x01], #12\0" |
25696 | 124k | /* 6396 */ "ld3r $\xFF\x02\x2F, [$\x01], #3\0" |
25697 | 124k | /* 6416 */ "ld3r $\xFF\x02\x30, [$\x01], #6\0" |
25698 | 124k | /* 6436 */ "ld3 $\xFF\x02\x29, [$\x01], #48\0" |
25699 | 124k | /* 6456 */ "ld3 $\xFF\x02\x2B, [$\x01], #48\0" |
25700 | 124k | /* 6476 */ "ld3 $\xFF\x02\x2C, [$\x01], #24\0" |
25701 | 124k | /* 6496 */ "ld3 $\xFF\x02\x2D, [$\x01], #24\0" |
25702 | 124k | /* 6516 */ "ld3 $\xFF\x02\x2E, [$\x01], #48\0" |
25703 | 124k | /* 6536 */ "ld3 $\xFF\x02\x2F, [$\x01], #24\0" |
25704 | 124k | /* 6556 */ "ld3 $\xFF\x02\x30, [$\x01], #48\0" |
25705 | 124k | /* 6576 */ "ld3w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25706 | 124k | /* 6600 */ "ld3 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #6\0" |
25707 | 124k | /* 6623 */ "ld3 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #12\0" |
25708 | 124k | /* 6647 */ "ld3 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #24\0" |
25709 | 124k | /* 6671 */ "ld3 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #3\0" |
25710 | 124k | /* 6694 */ "ld4b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25711 | 124k | /* 6718 */ "ld4d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25712 | 124k | /* 6742 */ "ld4 $\xFF\x02\x29, [$\x01], #64\0" |
25713 | 124k | /* 6762 */ "ld4 $\xFF\x02\x2B, [$\x01], #64\0" |
25714 | 124k | /* 6782 */ "ld4 $\xFF\x02\x2C, [$\x01], #32\0" |
25715 | 124k | /* 6802 */ "ld4 $\xFF\x02\x2D, [$\x01], #32\0" |
25716 | 124k | /* 6822 */ "ld4 $\xFF\x02\x2E, [$\x01], #64\0" |
25717 | 124k | /* 6842 */ "ld4 $\xFF\x02\x2F, [$\x01], #32\0" |
25718 | 124k | /* 6862 */ "ld4 $\xFF\x02\x30, [$\x01], #64\0" |
25719 | 124k | /* 6882 */ "ld4h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25720 | 124k | /* 6906 */ "ld4r $\xFF\x02\x29, [$\x01], #4\0" |
25721 | 124k | /* 6926 */ "ld4r $\xFF\x02\x2A, [$\x01], #32\0" |
25722 | 124k | /* 6947 */ "ld4r $\xFF\x02\x2B, [$\x01], #32\0" |
25723 | 124k | /* 6968 */ "ld4r $\xFF\x02\x2C, [$\x01], #16\0" |
25724 | 124k | /* 6989 */ "ld4r $\xFF\x02\x2D, [$\x01], #8\0" |
25725 | 124k | /* 7009 */ "ld4r $\xFF\x02\x2E, [$\x01], #16\0" |
25726 | 124k | /* 7030 */ "ld4r $\xFF\x02\x2F, [$\x01], #4\0" |
25727 | 124k | /* 7050 */ "ld4r $\xFF\x02\x30, [$\x01], #8\0" |
25728 | 124k | /* 7070 */ "ld4w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25729 | 124k | /* 7094 */ "ld4 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #8\0" |
25730 | 124k | /* 7117 */ "ld4 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #16\0" |
25731 | 124k | /* 7141 */ "ld4 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #32\0" |
25732 | 124k | /* 7165 */ "ld4 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #4\0" |
25733 | 124k | /* 7188 */ "staddb $\x02, [$\x03]\0" |
25734 | 124k | /* 7204 */ "staddh $\x02, [$\x03]\0" |
25735 | 124k | /* 7220 */ "staddlb $\x02, [$\x03]\0" |
25736 | 124k | /* 7237 */ "staddlh $\x02, [$\x03]\0" |
25737 | 124k | /* 7254 */ "staddl $\x02, [$\x03]\0" |
25738 | 124k | /* 7270 */ "stadd $\x02, [$\x03]\0" |
25739 | 124k | /* 7285 */ "ldapurb $\x01, [$\x02]\0" |
25740 | 124k | /* 7302 */ "ldapurh $\x01, [$\x02]\0" |
25741 | 124k | /* 7319 */ "ldapursb $\x01, [$\x02]\0" |
25742 | 124k | /* 7337 */ "ldapursh $\x01, [$\x02]\0" |
25743 | 124k | /* 7355 */ "ldapursw $\x01, [$\x02]\0" |
25744 | 124k | /* 7373 */ "ldapur $\x01, [$\x02]\0" |
25745 | 124k | /* 7389 */ "stclrb $\x02, [$\x03]\0" |
25746 | 124k | /* 7405 */ "stclrh $\x02, [$\x03]\0" |
25747 | 124k | /* 7421 */ "stclrlb $\x02, [$\x03]\0" |
25748 | 124k | /* 7438 */ "stclrlh $\x02, [$\x03]\0" |
25749 | 124k | /* 7455 */ "stclrl $\x02, [$\x03]\0" |
25750 | 124k | /* 7471 */ "stclr $\x02, [$\x03]\0" |
25751 | 124k | /* 7486 */ "steorb $\x02, [$\x03]\0" |
25752 | 124k | /* 7502 */ "steorh $\x02, [$\x03]\0" |
25753 | 124k | /* 7518 */ "steorlb $\x02, [$\x03]\0" |
25754 | 124k | /* 7535 */ "steorlh $\x02, [$\x03]\0" |
25755 | 124k | /* 7552 */ "steorl $\x02, [$\x03]\0" |
25756 | 124k | /* 7568 */ "steor $\x02, [$\x03]\0" |
25757 | 124k | /* 7583 */ "ldff1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25758 | 124k | /* 7609 */ "ldff1b $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25759 | 124k | /* 7635 */ "ldff1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25760 | 124k | /* 7661 */ "ldff1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25761 | 124k | /* 7687 */ "ldff1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25762 | 124k | /* 7713 */ "ldff1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25763 | 124k | /* 7739 */ "ldff1h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25764 | 124k | /* 7765 */ "ldff1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25765 | 124k | /* 7791 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25766 | 124k | /* 7818 */ "ldff1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25767 | 124k | /* 7845 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25768 | 124k | /* 7872 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25769 | 124k | /* 7899 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25770 | 124k | /* 7926 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25771 | 124k | /* 7953 */ "ldff1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25772 | 124k | /* 7979 */ "ldff1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25773 | 124k | /* 8005 */ "ldg $\x01, [$\x03]\0" |
25774 | 124k | /* 8018 */ "ldnf1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25775 | 124k | /* 8044 */ "ldnf1b $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25776 | 124k | /* 8070 */ "ldnf1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25777 | 124k | /* 8096 */ "ldnf1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25778 | 124k | /* 8122 */ "ldnf1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25779 | 124k | /* 8148 */ "ldnf1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25780 | 124k | /* 8174 */ "ldnf1h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25781 | 124k | /* 8200 */ "ldnf1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25782 | 124k | /* 8226 */ "ldnf1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25783 | 124k | /* 8253 */ "ldnf1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25784 | 124k | /* 8280 */ "ldnf1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25785 | 124k | /* 8307 */ "ldnf1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25786 | 124k | /* 8334 */ "ldnf1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25787 | 124k | /* 8361 */ "ldnf1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25788 | 124k | /* 8388 */ "ldnf1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25789 | 124k | /* 8414 */ "ldnf1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25790 | 124k | /* 8440 */ "ldnp $\x01, $\x02, [$\x03]\0" |
25791 | 124k | /* 8458 */ "ldnt1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0" |
25792 | 124k | /* 8484 */ "ldnt1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25793 | 124k | /* 8512 */ "ldnt1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25794 | 124k | /* 8540 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0" |
25795 | 124k | /* 8566 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25796 | 124k | /* 8594 */ "ldnt1h $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0" |
25797 | 124k | /* 8620 */ "ldnt1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25798 | 124k | /* 8648 */ "ldnt1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25799 | 124k | /* 8676 */ "ldnt1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25800 | 124k | /* 8705 */ "ldnt1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25801 | 124k | /* 8734 */ "ldnt1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25802 | 124k | /* 8763 */ "ldnt1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25803 | 124k | /* 8792 */ "ldnt1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25804 | 124k | /* 8821 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" |
25805 | 124k | /* 8847 */ "ldnt1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0" |
25806 | 124k | /* 8875 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0" |
25807 | 124k | /* 8903 */ "ldp $\x01, $\x02, [$\x03]\0" |
25808 | 124k | /* 8920 */ "ldpsw $\x01, $\x02, [$\x03]\0" |
25809 | 124k | /* 8939 */ "ldraa $\x01, [$\x02]\0" |
25810 | 124k | /* 8954 */ "ldrab $\x01, [$\x02]\0" |
25811 | 124k | /* 8969 */ "ldrb $\x01, [$\x02, $\x03]\0" |
25812 | 124k | /* 8987 */ "ldrb $\x01, [$\x02]\0" |
25813 | 124k | /* 9001 */ "ldr $\x01, [$\x02, $\x03]\0" |
25814 | 124k | /* 9018 */ "ldr $\x01, [$\x02]\0" |
25815 | 124k | /* 9031 */ "ldrh $\x01, [$\x02, $\x03]\0" |
25816 | 124k | /* 9049 */ "ldrh $\x01, [$\x02]\0" |
25817 | 124k | /* 9063 */ "ldrsb $\x01, [$\x02, $\x03]\0" |
25818 | 124k | /* 9082 */ "ldrsb $\x01, [$\x02]\0" |
25819 | 124k | /* 9097 */ "ldrsh $\x01, [$\x02, $\x03]\0" |
25820 | 124k | /* 9116 */ "ldrsh $\x01, [$\x02]\0" |
25821 | 124k | /* 9131 */ "ldrsw $\x01, [$\x02, $\x03]\0" |
25822 | 124k | /* 9150 */ "ldrsw $\x01, [$\x02]\0" |
25823 | 124k | /* 9165 */ "ldr $\xFF\x01\x07, [$\x02]\0" |
25824 | 124k | /* 9180 */ "ldr $\xFF\x01\x35[$\x02, $\xFF\x03\x20], [$\x04]\0" |
25825 | 124k | /* 9205 */ "stsetb $\x02, [$\x03]\0" |
25826 | 124k | /* 9221 */ "stseth $\x02, [$\x03]\0" |
25827 | 124k | /* 9237 */ "stsetlb $\x02, [$\x03]\0" |
25828 | 124k | /* 9254 */ "stsetlh $\x02, [$\x03]\0" |
25829 | 124k | /* 9271 */ "stsetl $\x02, [$\x03]\0" |
25830 | 124k | /* 9287 */ "stset $\x02, [$\x03]\0" |
25831 | 124k | /* 9302 */ "stsmaxb $\x02, [$\x03]\0" |
25832 | 124k | /* 9319 */ "stsmaxh $\x02, [$\x03]\0" |
25833 | 124k | /* 9336 */ "stsmaxlb $\x02, [$\x03]\0" |
25834 | 124k | /* 9354 */ "stsmaxlh $\x02, [$\x03]\0" |
25835 | 124k | /* 9372 */ "stsmaxl $\x02, [$\x03]\0" |
25836 | 124k | /* 9389 */ "stsmax $\x02, [$\x03]\0" |
25837 | 124k | /* 9405 */ "stsminb $\x02, [$\x03]\0" |
25838 | 124k | /* 9422 */ "stsminh $\x02, [$\x03]\0" |
25839 | 124k | /* 9439 */ "stsminlb $\x02, [$\x03]\0" |
25840 | 124k | /* 9457 */ "stsminlh $\x02, [$\x03]\0" |
25841 | 124k | /* 9475 */ "stsminl $\x02, [$\x03]\0" |
25842 | 124k | /* 9492 */ "stsmin $\x02, [$\x03]\0" |
25843 | 124k | /* 9508 */ "ldtrb $\x01, [$\x02]\0" |
25844 | 124k | /* 9523 */ "ldtrh $\x01, [$\x02]\0" |
25845 | 124k | /* 9538 */ "ldtrsb $\x01, [$\x02]\0" |
25846 | 124k | /* 9554 */ "ldtrsh $\x01, [$\x02]\0" |
25847 | 124k | /* 9570 */ "ldtrsw $\x01, [$\x02]\0" |
25848 | 124k | /* 9586 */ "ldtr $\x01, [$\x02]\0" |
25849 | 124k | /* 9600 */ "stumaxb $\x02, [$\x03]\0" |
25850 | 124k | /* 9617 */ "stumaxh $\x02, [$\x03]\0" |
25851 | 124k | /* 9634 */ "stumaxlb $\x02, [$\x03]\0" |
25852 | 124k | /* 9652 */ "stumaxlh $\x02, [$\x03]\0" |
25853 | 124k | /* 9670 */ "stumaxl $\x02, [$\x03]\0" |
25854 | 124k | /* 9687 */ "stumax $\x02, [$\x03]\0" |
25855 | 124k | /* 9703 */ "stuminb $\x02, [$\x03]\0" |
25856 | 124k | /* 9720 */ "stuminh $\x02, [$\x03]\0" |
25857 | 124k | /* 9737 */ "stuminlb $\x02, [$\x03]\0" |
25858 | 124k | /* 9755 */ "stuminlh $\x02, [$\x03]\0" |
25859 | 124k | /* 9773 */ "stuminl $\x02, [$\x03]\0" |
25860 | 124k | /* 9790 */ "stumin $\x02, [$\x03]\0" |
25861 | 124k | /* 9806 */ "ldurb $\x01, [$\x02]\0" |
25862 | 124k | /* 9821 */ "ldur $\x01, [$\x02]\0" |
25863 | 124k | /* 9835 */ "ldurh $\x01, [$\x02]\0" |
25864 | 124k | /* 9850 */ "ldursb $\x01, [$\x02]\0" |
25865 | 124k | /* 9866 */ "ldursh $\x01, [$\x02]\0" |
25866 | 124k | /* 9882 */ "ldursw $\x01, [$\x02]\0" |
25867 | 124k | /* 9898 */ "mul $\x01, $\x02, $\x03\0" |
25868 | 124k | /* 9913 */ "smstart\0" |
25869 | 124k | /* 9921 */ "smstart sm\0" |
25870 | 124k | /* 9932 */ "smstart za\0" |
25871 | 124k | /* 9943 */ "smstop\0" |
25872 | 124k | /* 9950 */ "smstop sm\0" |
25873 | 124k | /* 9960 */ "smstop za\0" |
25874 | 124k | /* 9970 */ "mneg $\x01, $\x02, $\x03\0" |
25875 | 124k | /* 9986 */ "mvn $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0" |
25876 | 124k | /* 10009 */ "mvn $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0" |
25877 | 124k | /* 10030 */ "mvn $\x01, $\x03\0" |
25878 | 124k | /* 10041 */ "mvn $\x01, $\x03$\xFF\x04\x02\0" |
25879 | 124k | /* 10056 */ "orn $\x01, $\x02, $\x03\0" |
25880 | 124k | /* 10071 */ "movs $\xFF\x01\x06, $\xFF\x02\x06\0" |
25881 | 124k | /* 10087 */ "mov $\x01, $\x03\0" |
25882 | 124k | /* 10098 */ "orr $\x01, $\x02, $\x03\0" |
25883 | 124k | /* 10113 */ "mov $\xFF\x01\x06, $\xFF\x02\x06\0" |
25884 | 124k | /* 10128 */ "orr $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0" |
25885 | 124k | /* 10149 */ "orr $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0" |
25886 | 124k | /* 10170 */ "orr $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0" |
25887 | 124k | /* 10191 */ "mov $\xFF\x01\x10, $\xFF\x02\x10\0" |
25888 | 124k | /* 10206 */ "mov $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0" |
25889 | 124k | /* 10229 */ "mov $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0" |
25890 | 124k | /* 10250 */ "pacia1716\0" |
25891 | 124k | /* 10260 */ "paciasp\0" |
25892 | 124k | /* 10268 */ "paciaz\0" |
25893 | 124k | /* 10275 */ "pacib1716\0" |
25894 | 124k | /* 10285 */ "pacibsp\0" |
25895 | 124k | /* 10293 */ "pacibz\0" |
25896 | 124k | /* 10300 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25897 | 124k | /* 10324 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0" |
25898 | 124k | /* 10346 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25899 | 124k | /* 10370 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25900 | 124k | /* 10394 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0" |
25901 | 124k | /* 10416 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25902 | 124k | /* 10440 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25903 | 124k | /* 10464 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0" |
25904 | 124k | /* 10486 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25905 | 124k | /* 10510 */ "prfm $\xFF\x01\x38, [$\x02, $\x03]\0" |
25906 | 124k | /* 10530 */ "prfm $\xFF\x01\x38, [$\x02]\0" |
25907 | 124k | /* 10546 */ "prfum $\xFF\x01\x38, [$\x02]\0" |
25908 | 124k | /* 10563 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25909 | 124k | /* 10587 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0" |
25910 | 124k | /* 10609 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25911 | 124k | /* 10633 */ "ptrues $\xFF\x01\x06\0" |
25912 | 124k | /* 10645 */ "ptrues $\xFF\x01\x10\0" |
25913 | 124k | /* 10657 */ "ptrues $\xFF\x01\x09\0" |
25914 | 124k | /* 10669 */ "ptrues $\xFF\x01\x0B\0" |
25915 | 124k | /* 10681 */ "ptrue $\xFF\x01\x06\0" |
25916 | 124k | /* 10692 */ "ptrue $\xFF\x01\x10\0" |
25917 | 124k | /* 10703 */ "ptrue $\xFF\x01\x09\0" |
25918 | 124k | /* 10714 */ "ptrue $\xFF\x01\x0B\0" |
25919 | 124k | /* 10725 */ "ret\0" |
25920 | 124k | /* 10729 */ "ngcs $\x01, $\x03\0" |
25921 | 124k | /* 10741 */ "ngc $\x01, $\x03\0" |
25922 | 124k | /* 10752 */ "asr $\x01, $\x02, $\x03\0" |
25923 | 124k | /* 10767 */ "sxtb $\x01, $\x02\0" |
25924 | 124k | /* 10779 */ "sxth $\x01, $\x02\0" |
25925 | 124k | /* 10791 */ "sxtw $\x01, $\x02\0" |
25926 | 124k | /* 10803 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x06\0" |
25927 | 124k | /* 10826 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x10\0" |
25928 | 124k | /* 10849 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x09\0" |
25929 | 124k | /* 10872 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x0B\0" |
25930 | 124k | /* 10895 */ "smull $\x01, $\x02, $\x03\0" |
25931 | 124k | /* 10912 */ "smnegl $\x01, $\x02, $\x03\0" |
25932 | 124k | /* 10930 */ "sqdecb $\x01\0" |
25933 | 124k | /* 10940 */ "sqdecb $\x01, $\xFF\x03\x0E\0" |
25934 | 124k | /* 10956 */ "sqdecb $\x01, $\xFF\x02\x39\0" |
25935 | 124k | /* 10972 */ "sqdecb $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25936 | 124k | /* 10994 */ "sqdecd $\x01\0" |
25937 | 124k | /* 11004 */ "sqdecd $\x01, $\xFF\x03\x0E\0" |
25938 | 124k | /* 11020 */ "sqdecd $\x01, $\xFF\x02\x39\0" |
25939 | 124k | /* 11036 */ "sqdecd $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25940 | 124k | /* 11058 */ "sqdecd $\xFF\x01\x10\0" |
25941 | 124k | /* 11070 */ "sqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
25942 | 124k | /* 11088 */ "sqdech $\x01\0" |
25943 | 124k | /* 11098 */ "sqdech $\x01, $\xFF\x03\x0E\0" |
25944 | 124k | /* 11114 */ "sqdech $\x01, $\xFF\x02\x39\0" |
25945 | 124k | /* 11130 */ "sqdech $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25946 | 124k | /* 11152 */ "sqdech $\xFF\x01\x09\0" |
25947 | 124k | /* 11164 */ "sqdech $\xFF\x01\x09, $\xFF\x03\x0E\0" |
25948 | 124k | /* 11182 */ "sqdecw $\x01\0" |
25949 | 124k | /* 11192 */ "sqdecw $\x01, $\xFF\x03\x0E\0" |
25950 | 124k | /* 11208 */ "sqdecw $\x01, $\xFF\x02\x39\0" |
25951 | 124k | /* 11224 */ "sqdecw $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25952 | 124k | /* 11246 */ "sqdecw $\xFF\x01\x0B\0" |
25953 | 124k | /* 11258 */ "sqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
25954 | 124k | /* 11276 */ "sqincb $\x01\0" |
25955 | 124k | /* 11286 */ "sqincb $\x01, $\xFF\x03\x0E\0" |
25956 | 124k | /* 11302 */ "sqincb $\x01, $\xFF\x02\x39\0" |
25957 | 124k | /* 11318 */ "sqincb $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25958 | 124k | /* 11340 */ "sqincd $\x01\0" |
25959 | 124k | /* 11350 */ "sqincd $\x01, $\xFF\x03\x0E\0" |
25960 | 124k | /* 11366 */ "sqincd $\x01, $\xFF\x02\x39\0" |
25961 | 124k | /* 11382 */ "sqincd $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25962 | 124k | /* 11404 */ "sqincd $\xFF\x01\x10\0" |
25963 | 124k | /* 11416 */ "sqincd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
25964 | 124k | /* 11434 */ "sqinch $\x01\0" |
25965 | 124k | /* 11444 */ "sqinch $\x01, $\xFF\x03\x0E\0" |
25966 | 124k | /* 11460 */ "sqinch $\x01, $\xFF\x02\x39\0" |
25967 | 124k | /* 11476 */ "sqinch $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25968 | 124k | /* 11498 */ "sqinch $\xFF\x01\x09\0" |
25969 | 124k | /* 11510 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0" |
25970 | 124k | /* 11528 */ "sqincw $\x01\0" |
25971 | 124k | /* 11538 */ "sqincw $\x01, $\xFF\x03\x0E\0" |
25972 | 124k | /* 11554 */ "sqincw $\x01, $\xFF\x02\x39\0" |
25973 | 124k | /* 11570 */ "sqincw $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0" |
25974 | 124k | /* 11592 */ "sqincw $\xFF\x01\x0B\0" |
25975 | 124k | /* 11604 */ "sqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
25976 | 124k | /* 11622 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25977 | 124k | /* 11646 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25978 | 124k | /* 11670 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25979 | 124k | /* 11694 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25980 | 124k | /* 11718 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25981 | 124k | /* 11742 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
25982 | 124k | /* 11766 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
25983 | 124k | /* 11790 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
25984 | 124k | /* 11812 */ "st1b $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
25985 | 124k | /* 11834 */ "st1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0" |
25986 | 124k | /* 11856 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
25987 | 124k | /* 11878 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
25988 | 124k | /* 11900 */ "st1 $\xFF\x02\x29, [$\x01], #64\0" |
25989 | 124k | /* 11920 */ "st1 $\xFF\x02\x2A, [$\x01], #32\0" |
25990 | 124k | /* 11940 */ "st1 $\xFF\x02\x2B, [$\x01], #64\0" |
25991 | 124k | /* 11960 */ "st1 $\xFF\x02\x2C, [$\x01], #32\0" |
25992 | 124k | /* 11980 */ "st1 $\xFF\x02\x2D, [$\x01], #32\0" |
25993 | 124k | /* 12000 */ "st1 $\xFF\x02\x2E, [$\x01], #64\0" |
25994 | 124k | /* 12020 */ "st1 $\xFF\x02\x2F, [$\x01], #32\0" |
25995 | 124k | /* 12040 */ "st1 $\xFF\x02\x30, [$\x01], #64\0" |
25996 | 124k | /* 12060 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
25997 | 124k | /* 12082 */ "st1h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
25998 | 124k | /* 12104 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
25999 | 124k | /* 12126 */ "st1 $\xFF\x02\x29, [$\x01], #16\0" |
26000 | 124k | /* 12146 */ "st1 $\xFF\x02\x2A, [$\x01], #8\0" |
26001 | 124k | /* 12165 */ "st1 $\xFF\x02\x2B, [$\x01], #16\0" |
26002 | 124k | /* 12185 */ "st1 $\xFF\x02\x2C, [$\x01], #8\0" |
26003 | 124k | /* 12204 */ "st1 $\xFF\x02\x2D, [$\x01], #8\0" |
26004 | 124k | /* 12223 */ "st1 $\xFF\x02\x2E, [$\x01], #16\0" |
26005 | 124k | /* 12243 */ "st1 $\xFF\x02\x2F, [$\x01], #8\0" |
26006 | 124k | /* 12262 */ "st1 $\xFF\x02\x30, [$\x01], #16\0" |
26007 | 124k | /* 12282 */ "st1 $\xFF\x02\x29, [$\x01], #48\0" |
26008 | 124k | /* 12302 */ "st1 $\xFF\x02\x2A, [$\x01], #24\0" |
26009 | 124k | /* 12322 */ "st1 $\xFF\x02\x2B, [$\x01], #48\0" |
26010 | 124k | /* 12342 */ "st1 $\xFF\x02\x2C, [$\x01], #24\0" |
26011 | 124k | /* 12362 */ "st1 $\xFF\x02\x2D, [$\x01], #24\0" |
26012 | 124k | /* 12382 */ "st1 $\xFF\x02\x2E, [$\x01], #48\0" |
26013 | 124k | /* 12402 */ "st1 $\xFF\x02\x2F, [$\x01], #24\0" |
26014 | 124k | /* 12422 */ "st1 $\xFF\x02\x30, [$\x01], #48\0" |
26015 | 124k | /* 12442 */ "st1 $\xFF\x02\x29, [$\x01], #32\0" |
26016 | 124k | /* 12462 */ "st1 $\xFF\x02\x2A, [$\x01], #16\0" |
26017 | 124k | /* 12482 */ "st1 $\xFF\x02\x2B, [$\x01], #32\0" |
26018 | 124k | /* 12502 */ "st1 $\xFF\x02\x2C, [$\x01], #16\0" |
26019 | 124k | /* 12522 */ "st1 $\xFF\x02\x2D, [$\x01], #16\0" |
26020 | 124k | /* 12542 */ "st1 $\xFF\x02\x2E, [$\x01], #32\0" |
26021 | 124k | /* 12562 */ "st1 $\xFF\x02\x2F, [$\x01], #16\0" |
26022 | 124k | /* 12582 */ "st1 $\xFF\x02\x30, [$\x01], #32\0" |
26023 | 124k | /* 12602 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
26024 | 124k | /* 12624 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
26025 | 124k | /* 12646 */ "st1b {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26026 | 124k | /* 12680 */ "st1d {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26027 | 124k | /* 12714 */ "st1h {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26028 | 124k | /* 12748 */ "st1q {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26029 | 124k | /* 12782 */ "st1w {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26030 | 124k | /* 12816 */ "st1b {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26031 | 124k | /* 12850 */ "st1d {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26032 | 124k | /* 12884 */ "st1h {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26033 | 124k | /* 12918 */ "st1q {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26034 | 124k | /* 12952 */ "st1w {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0" |
26035 | 124k | /* 12986 */ "st1 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #2\0" |
26036 | 124k | /* 13009 */ "st1 $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #4\0" |
26037 | 124k | /* 13032 */ "st1 $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #8\0" |
26038 | 124k | /* 13055 */ "st1 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #1\0" |
26039 | 124k | /* 13078 */ "st2b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0" |
26040 | 124k | /* 13100 */ "st2d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
26041 | 124k | /* 13122 */ "st2g $\x01, [$\x02]\0" |
26042 | 124k | /* 13136 */ "st2h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
26043 | 124k | /* 13158 */ "st2 $\xFF\x02\x29, [$\x01], #32\0" |
26044 | 124k | /* 13178 */ "st2 $\xFF\x02\x2B, [$\x01], #32\0" |
26045 | 124k | /* 13198 */ "st2 $\xFF\x02\x2C, [$\x01], #16\0" |
26046 | 124k | /* 13218 */ "st2 $\xFF\x02\x2D, [$\x01], #16\0" |
26047 | 124k | /* 13238 */ "st2 $\xFF\x02\x2E, [$\x01], #32\0" |
26048 | 124k | /* 13258 */ "st2 $\xFF\x02\x2F, [$\x01], #16\0" |
26049 | 124k | /* 13278 */ "st2 $\xFF\x02\x30, [$\x01], #32\0" |
26050 | 124k | /* 13298 */ "st2w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
26051 | 124k | /* 13320 */ "st2 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #4\0" |
26052 | 124k | /* 13343 */ "st2 $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #8\0" |
26053 | 124k | /* 13366 */ "st2 $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #16\0" |
26054 | 124k | /* 13390 */ "st2 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #2\0" |
26055 | 124k | /* 13413 */ "st3b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0" |
26056 | 124k | /* 13435 */ "st3d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
26057 | 124k | /* 13457 */ "st3h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
26058 | 124k | /* 13479 */ "st3 $\xFF\x02\x29, [$\x01], #48\0" |
26059 | 124k | /* 13499 */ "st3 $\xFF\x02\x2B, [$\x01], #48\0" |
26060 | 124k | /* 13519 */ "st3 $\xFF\x02\x2C, [$\x01], #24\0" |
26061 | 124k | /* 13539 */ "st3 $\xFF\x02\x2D, [$\x01], #24\0" |
26062 | 124k | /* 13559 */ "st3 $\xFF\x02\x2E, [$\x01], #48\0" |
26063 | 124k | /* 13579 */ "st3 $\xFF\x02\x2F, [$\x01], #24\0" |
26064 | 124k | /* 13599 */ "st3 $\xFF\x02\x30, [$\x01], #48\0" |
26065 | 124k | /* 13619 */ "st3w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
26066 | 124k | /* 13641 */ "st3 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #6\0" |
26067 | 124k | /* 13664 */ "st3 $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #12\0" |
26068 | 124k | /* 13688 */ "st3 $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #24\0" |
26069 | 124k | /* 13712 */ "st3 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #3\0" |
26070 | 124k | /* 13735 */ "st4b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0" |
26071 | 124k | /* 13757 */ "st4d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
26072 | 124k | /* 13779 */ "st4 $\xFF\x02\x29, [$\x01], #64\0" |
26073 | 124k | /* 13799 */ "st4 $\xFF\x02\x2B, [$\x01], #64\0" |
26074 | 124k | /* 13819 */ "st4 $\xFF\x02\x2C, [$\x01], #32\0" |
26075 | 124k | /* 13839 */ "st4 $\xFF\x02\x2D, [$\x01], #32\0" |
26076 | 124k | /* 13859 */ "st4 $\xFF\x02\x2E, [$\x01], #64\0" |
26077 | 124k | /* 13879 */ "st4 $\xFF\x02\x2F, [$\x01], #32\0" |
26078 | 124k | /* 13899 */ "st4 $\xFF\x02\x30, [$\x01], #64\0" |
26079 | 124k | /* 13919 */ "st4h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
26080 | 124k | /* 13941 */ "st4w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
26081 | 124k | /* 13963 */ "st4 $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #8\0" |
26082 | 124k | /* 13986 */ "st4 $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #16\0" |
26083 | 124k | /* 14010 */ "st4 $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #32\0" |
26084 | 124k | /* 14034 */ "st4 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #4\0" |
26085 | 124k | /* 14057 */ "stg $\x01, [$\x02]\0" |
26086 | 124k | /* 14070 */ "stgp $\x01, $\x02, [$\x03]\0" |
26087 | 124k | /* 14088 */ "stlurb $\x01, [$\x02]\0" |
26088 | 124k | /* 14104 */ "stlurh $\x01, [$\x02]\0" |
26089 | 124k | /* 14120 */ "stlur $\x01, [$\x02]\0" |
26090 | 124k | /* 14135 */ "stnp $\x01, $\x02, [$\x03]\0" |
26091 | 124k | /* 14153 */ "stnt1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0" |
26092 | 124k | /* 14177 */ "stnt1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
26093 | 124k | /* 14203 */ "stnt1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
26094 | 124k | /* 14229 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0" |
26095 | 124k | /* 14253 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
26096 | 124k | /* 14279 */ "stnt1h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0" |
26097 | 124k | /* 14303 */ "stnt1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
26098 | 124k | /* 14329 */ "stnt1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
26099 | 124k | /* 14355 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0" |
26100 | 124k | /* 14379 */ "stnt1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0" |
26101 | 124k | /* 14405 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0" |
26102 | 124k | /* 14431 */ "stp $\x01, $\x02, [$\x03]\0" |
26103 | 124k | /* 14448 */ "strb $\x01, [$\x02, $\x03]\0" |
26104 | 124k | /* 14466 */ "strb $\x01, [$\x02]\0" |
26105 | 124k | /* 14480 */ "str $\x01, [$\x02, $\x03]\0" |
26106 | 124k | /* 14497 */ "str $\x01, [$\x02]\0" |
26107 | 124k | /* 14510 */ "strh $\x01, [$\x02, $\x03]\0" |
26108 | 124k | /* 14528 */ "strh $\x01, [$\x02]\0" |
26109 | 124k | /* 14542 */ "str $\xFF\x01\x07, [$\x02]\0" |
26110 | 124k | /* 14557 */ "str $\xFF\x01\x35[$\x02, $\xFF\x03\x20], [$\x04]\0" |
26111 | 124k | /* 14582 */ "sttrb $\x01, [$\x02]\0" |
26112 | 124k | /* 14597 */ "sttrh $\x01, [$\x02]\0" |
26113 | 124k | /* 14612 */ "sttr $\x01, [$\x02]\0" |
26114 | 124k | /* 14626 */ "sturb $\x01, [$\x02]\0" |
26115 | 124k | /* 14641 */ "stur $\x01, [$\x02]\0" |
26116 | 124k | /* 14655 */ "sturh $\x01, [$\x02]\0" |
26117 | 124k | /* 14670 */ "stz2g $\x01, [$\x02]\0" |
26118 | 124k | /* 14685 */ "stzg $\x01, [$\x02]\0" |
26119 | 124k | /* 14699 */ "cmp $\x02, $\xFF\x03\x01\0" |
26120 | 124k | /* 14712 */ "cmp $\x02, $\x03\0" |
26121 | 124k | /* 14723 */ "cmp $\x02, $\x03$\xFF\x04\x02\0" |
26122 | 124k | /* 14738 */ "negs $\x01, $\x03\0" |
26123 | 124k | /* 14750 */ "negs $\x01, $\x03$\xFF\x04\x02\0" |
26124 | 124k | /* 14766 */ "subs $\x01, $\x02, $\x03\0" |
26125 | 124k | /* 14782 */ "cmp $\x02, $\x03$\xFF\x04\x03\0" |
26126 | 124k | /* 14797 */ "neg $\x01, $\x03\0" |
26127 | 124k | /* 14808 */ "neg $\x01, $\x03$\xFF\x04\x02\0" |
26128 | 124k | /* 14823 */ "sub $\x01, $\x02, $\x03\0" |
26129 | 124k | /* 14838 */ "sys $\x01, $\xFF\x02\x3A, $\xFF\x03\x3A, $\x04\0" |
26130 | 124k | /* 14861 */ "lsr $\x01, $\x02, $\x03\0" |
26131 | 124k | /* 14876 */ "uxtb $\x01, $\x02\0" |
26132 | 124k | /* 14888 */ "uxth $\x01, $\x02\0" |
26133 | 124k | /* 14900 */ "uxtw $\x01, $\x02\0" |
26134 | 124k | /* 14912 */ "umull $\x01, $\x02, $\x03\0" |
26135 | 124k | /* 14929 */ "mov $\x01, $\xFF\x02\x0C.s$\xFF\x03\x19\0" |
26136 | 124k | /* 14948 */ "mov $\x01, $\xFF\x02\x0C.d$\xFF\x03\x19\0" |
26137 | 124k | /* 14967 */ "umnegl $\x01, $\x02, $\x03\0" |
26138 | 124k | /* 14985 */ "uqdecb $\x01\0" |
26139 | 124k | /* 14995 */ "uqdecb $\x01, $\xFF\x03\x0E\0" |
26140 | 124k | /* 15011 */ "uqdecd $\x01\0" |
26141 | 124k | /* 15021 */ "uqdecd $\x01, $\xFF\x03\x0E\0" |
26142 | 124k | /* 15037 */ "uqdecd $\xFF\x01\x10\0" |
26143 | 124k | /* 15049 */ "uqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
26144 | 124k | /* 15067 */ "uqdech $\x01\0" |
26145 | 124k | /* 15077 */ "uqdech $\x01, $\xFF\x03\x0E\0" |
26146 | 124k | /* 15093 */ "uqdech $\xFF\x01\x09\0" |
26147 | 124k | /* 15105 */ "uqdech $\xFF\x01\x09, $\xFF\x03\x0E\0" |
26148 | 124k | /* 15123 */ "uqdecw $\x01\0" |
26149 | 124k | /* 15133 */ "uqdecw $\x01, $\xFF\x03\x0E\0" |
26150 | 124k | /* 15149 */ "uqdecw $\xFF\x01\x0B\0" |
26151 | 124k | /* 15161 */ "uqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
26152 | 124k | /* 15179 */ "uqincb $\x01\0" |
26153 | 124k | /* 15189 */ "uqincb $\x01, $\xFF\x03\x0E\0" |
26154 | 124k | /* 15205 */ "uqincd $\x01\0" |
26155 | 124k | /* 15215 */ "uqincd $\x01, $\xFF\x03\x0E\0" |
26156 | 124k | /* 15231 */ "uqincd $\xFF\x01\x10\0" |
26157 | 124k | /* 15243 */ "uqincd $\xFF\x01\x10, $\xFF\x03\x0E\0" |
26158 | 124k | /* 15261 */ "uqinch $\x01\0" |
26159 | 124k | /* 15271 */ "uqinch $\x01, $\xFF\x03\x0E\0" |
26160 | 124k | /* 15287 */ "uqinch $\xFF\x01\x09\0" |
26161 | 124k | /* 15299 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0" |
26162 | 124k | /* 15317 */ "uqincw $\x01\0" |
26163 | 124k | /* 15327 */ "uqincw $\x01, $\xFF\x03\x0E\0" |
26164 | 124k | /* 15343 */ "uqincw $\xFF\x01\x0B\0" |
26165 | 124k | /* 15355 */ "uqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0" |
26166 | 124k | /* 15373 */ "xpaclri\0" |
26167 | 124k | /* 15381 */ "zero {za}\0" |
26168 | 124k | /* 15391 */ "zero {za0.h}\0" |
26169 | 124k | /* 15404 */ "zero {za1.h}\0" |
26170 | 124k | /* 15417 */ "zero {za0.s}\0" |
26171 | 124k | /* 15430 */ "zero {za1.s}\0" |
26172 | 124k | /* 15443 */ "zero {za2.s}\0" |
26173 | 124k | /* 15456 */ "zero {za3.s}\0" |
26174 | 124k | /* 15469 */ "zero {za0.s,za1.s}\0" |
26175 | 124k | /* 15488 */ "zero {za0.s,za3.s}\0" |
26176 | 124k | /* 15507 */ "zero {za1.s,za2.s}\0" |
26177 | 124k | /* 15526 */ "zero {za2.s,za3.s}\0" |
26178 | 124k | /* 15545 */ "zero {za0.s,za1.s,za2.s}\0" |
26179 | 124k | /* 15570 */ "zero {za0.s,za1.s,za3.s}\0" |
26180 | 124k | /* 15595 */ "zero {za0.s,za2.s,za3.s}\0" |
26181 | 124k | /* 15620 */ "zero {za1.s,za2.s,za3.s}\0" |
26182 | 124k | ; |
26183 | | |
26184 | | |
26185 | 124k | char *AsmString; |
26186 | 124k | const size_t OpToSize = sizeof(OpToPatterns) / sizeof(PatternsForOpcode); |
26187 | | |
26188 | 124k | const unsigned opcode = MCInst_getOpcode(MI); |
26189 | | |
26190 | | // Check for alias |
26191 | 124k | int OpToIndex = 0; |
26192 | 76.5M | for(int i = 0; i < OpToSize; i++){ |
26193 | 76.4M | if(OpToPatterns[i].Opcode == opcode){ |
26194 | 56.3k | OpToIndex = i; |
26195 | 56.3k | break; |
26196 | 56.3k | } |
26197 | 76.4M | } |
26198 | | // Chech for match |
26199 | 124k | if(opcode != OpToPatterns[OpToIndex].Opcode) |
26200 | 67.7k | return NULL; |
26201 | | |
26202 | 56.3k | const PatternsForOpcode opToPat = OpToPatterns[OpToIndex]; |
26203 | | |
26204 | | // Try all patterns for this opcode |
26205 | 56.3k | uint32_t AsmStrOffset = ~0U; |
26206 | 56.3k | int patIdx = opToPat.PatternStart; |
26207 | 121k | while(patIdx < (opToPat.PatternStart + opToPat.NumPatterns)){ |
26208 | | // Check operand count first |
26209 | 82.2k | if(MCInst_getNumOperands(MI) != Patterns[patIdx].NumOperands) |
26210 | 0 | return NULL; |
26211 | | |
26212 | | // Test all conditions for this pattern |
26213 | 82.2k | int condIdx = Patterns[patIdx].AliasCondStart; |
26214 | 82.2k | int opIdx = 0; |
26215 | 82.2k | bool allPass = true; |
26216 | 445k | while(condIdx < (Patterns[patIdx].AliasCondStart + Patterns[patIdx].NumConds)){ |
26217 | 362k | MCOperand *opnd = MCInst_getOperand(MI, opIdx); |
26218 | 362k | opIdx++; |
26219 | | // Not concerned with any Feature related conditions as STI is disregarded |
26220 | 362k | switch (Conds[condIdx].Kind) |
26221 | 362k | { |
26222 | 35.1k | case AliasPatternCond_K_Ignore : |
26223 | | // Operand can be anything. |
26224 | 35.1k | break; |
26225 | 26.5k | case AliasPatternCond_K_Reg : |
26226 | | // Operand must be a specific register. |
26227 | 26.5k | allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) == Conds[condIdx].Value); |
26228 | 26.5k | break; |
26229 | 1.68k | case AliasPatternCond_K_TiedReg : |
26230 | | // Operand must match the register of another operand. |
26231 | 1.68k | allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) == |
26232 | 1.63k | MCOperand_getReg(MCInst_getOperand(MI, Conds[condIdx].Value))); |
26233 | 1.68k | break; |
26234 | 44.0k | case AliasPatternCond_K_Imm : |
26235 | | // Operand must be a specific immediate. |
26236 | 44.0k | allPass = allPass && (MCOperand_isImm(opnd) && MCOperand_getImm(opnd) == Conds[condIdx].Value); |
26237 | 44.0k | break; |
26238 | 147k | case AliasPatternCond_K_RegClass : |
26239 | | // Operand must be a register in this class. Value is a register class id. |
26240 | 147k | allPass = allPass && (MCOperand_isReg(opnd) && GETREGCLASS_CONTAIN(Conds[condIdx].Value, (opIdx-1))); |
26241 | 147k | break; |
26242 | 15.6k | case AliasPatternCond_K_Custom : |
26243 | | // Operand must match some custom criteria. |
26244 | 15.6k | allPass = allPass && AArch64InstPrinterValidateMCOperand(opnd, Conds[condIdx].Value); |
26245 | 15.6k | break; |
26246 | 25.1k | case AliasPatternCond_K_Feature : |
26247 | 25.1k | case AliasPatternCond_K_NegFeature : |
26248 | 69.7k | case AliasPatternCond_K_OrFeature : |
26249 | 69.7k | case AliasPatternCond_K_OrNegFeature : |
26250 | 91.9k | case AliasPatternCond_K_EndOrFeatures : |
26251 | 91.9k | default : |
26252 | 91.9k | break; |
26253 | 362k | } |
26254 | 362k | condIdx++; |
26255 | 362k | } |
26256 | 82.2k | if(allPass){ |
26257 | 17.5k | AsmStrOffset = Patterns[patIdx].AsmStrOffset; |
26258 | 17.5k | break; |
26259 | 17.5k | } |
26260 | 64.6k | patIdx++; |
26261 | 64.6k | } |
26262 | | |
26263 | | // If no alias matched, don't print an alias. |
26264 | 56.3k | if (AsmStrOffset == ~0U) |
26265 | 38.8k | return NULL; |
26266 | | |
26267 | 17.5k | AsmString = cs_strdup(&AsmStrings[AsmStrOffset]); |
26268 | | |
26269 | 17.5k | tmpString = cs_strdup(AsmString); |
26270 | | |
26271 | 76.1k | while (AsmString[I] != ' ' && AsmString[I] != '\t' && |
26272 | 76.1k | AsmString[I] != '$' && AsmString[I] != '\0') |
26273 | 58.6k | ++I; |
26274 | | |
26275 | 17.5k | tmpString[I] = 0; |
26276 | 17.5k | SStream_concat0(OS, tmpString); |
26277 | | |
26278 | 17.5k | if (AsmString[I] != '\0') { |
26279 | 17.4k | if (AsmString[I] == ' ' || AsmString[I] == '\t') { |
26280 | 17.4k | SStream_concat0(OS, " "); |
26281 | 17.4k | ++I; |
26282 | 17.4k | } |
26283 | | |
26284 | 17.4k | bool isSME = false; |
26285 | 150k | do { |
26286 | 150k | if (AsmString[I] == '$') { |
26287 | 43.3k | ++I; |
26288 | 43.3k | if (AsmString[I] == (char)0xff) { |
26289 | 29.9k | ++I; |
26290 | 29.9k | OpIdx = AsmString[I++] - 1; |
26291 | 29.9k | PrintMethodIdx = AsmString[I++] - 1; |
26292 | 29.9k | printCustomAliasOperand(MI, 0, OpIdx, PrintMethodIdx, OS); |
26293 | 29.9k | } else |
26294 | 13.4k | printOperand(MI, (unsigned)(AsmString[I++]) - 1, OS); |
26295 | 107k | } else { |
26296 | 107k | if (AsmString[I] == '[') { |
26297 | 10.1k | if (AsmString[I-1] != ' '){ |
26298 | 1.10k | set_sme_index(MI, true); |
26299 | 1.10k | isSME = true; |
26300 | 9.05k | } else { |
26301 | 9.05k | set_mem_access(MI, true); |
26302 | 9.05k | } |
26303 | 97.1k | } else if (AsmString[I] == ']') { |
26304 | 10.1k | if (isSME) { |
26305 | 1.10k | set_sme_index(MI, false); |
26306 | 1.10k | isSME = false; |
26307 | 9.05k | } else { |
26308 | 9.05k | set_mem_access(MI, false); |
26309 | 9.05k | } |
26310 | 10.1k | } |
26311 | 107k | SStream_concat1(OS, AsmString[I++]); |
26312 | 107k | } |
26313 | 150k | } while (AsmString[I] != '\0'); |
26314 | 17.4k | } |
26315 | 17.5k | cs_mem_free(AsmString); |
26316 | 17.5k | return tmpString; |
26317 | 56.3k | } |
26318 | | |
26319 | | static void printCustomAliasOperand( |
26320 | | MCInst *MI, uint64_t Address, unsigned OpIdx, |
26321 | | unsigned PrintMethodIdx, |
26322 | | SStream *OS) |
26323 | 29.9k | { |
26324 | 29.9k | switch (PrintMethodIdx) { |
26325 | 0 | default: |
26326 | 0 | break; |
26327 | 30 | case 0: |
26328 | 30 | printAddSubImm(MI, OpIdx, OS); |
26329 | 30 | break; |
26330 | 66 | case 1: |
26331 | 66 | printShifter(MI, OpIdx, OS); |
26332 | 66 | break; |
26333 | 70 | case 2: |
26334 | 70 | printArithExtend(MI, OpIdx, OS); |
26335 | 70 | break; |
26336 | 970 | case 3: |
26337 | 970 | printLogicalImm32(MI, OpIdx, OS); |
26338 | 970 | break; |
26339 | 32 | case 4: |
26340 | 32 | printLogicalImm64(MI, OpIdx, OS); |
26341 | 32 | break; |
26342 | 1.68k | case 5: |
26343 | 1.68k | printSVERegOp(MI, OpIdx, OS, 'b'); |
26344 | 1.68k | break; |
26345 | 3.24k | case 6: |
26346 | 3.24k | printSVERegOp(MI, OpIdx, OS, 0); |
26347 | 3.24k | break; |
26348 | 305 | case 7: |
26349 | 305 | printLogicalImm32(MI, OpIdx, OS); |
26350 | 305 | break; |
26351 | 975 | case 8: |
26352 | 975 | printSVERegOp(MI, OpIdx, OS, 'h'); |
26353 | 975 | break; |
26354 | 114 | case 9: |
26355 | 114 | printLogicalImm32(MI, OpIdx, OS); |
26356 | 114 | break; |
26357 | 2.85k | case 10: |
26358 | 2.85k | printSVERegOp(MI, OpIdx, OS, 's'); |
26359 | 2.85k | break; |
26360 | 369 | case 11: |
26361 | 369 | printVRegOperand(MI, OpIdx, OS); |
26362 | 369 | break; |
26363 | 0 | case 12: |
26364 | 0 | printImm(MI, OpIdx, OS); |
26365 | 0 | break; |
26366 | 520 | case 13: |
26367 | 520 | printSVEPattern(MI, OpIdx, OS); |
26368 | 520 | break; |
26369 | 75 | case 14: |
26370 | 75 | printImm8OptLsl32(MI, OpIdx, OS); |
26371 | 75 | break; |
26372 | 2.23k | case 15: |
26373 | 2.23k | printSVERegOp(MI, OpIdx, OS, 'd'); |
26374 | 2.23k | break; |
26375 | 474 | case 16: |
26376 | 474 | printImm8OptLsl64(MI, OpIdx, OS); |
26377 | 474 | break; |
26378 | 216 | case 17: |
26379 | 216 | printImm8OptLsl32(MI, OpIdx, OS); |
26380 | 216 | break; |
26381 | 45 | case 18: |
26382 | 45 | printImm8OptLsl32(MI, OpIdx, OS); |
26383 | 45 | break; |
26384 | 67 | case 19: |
26385 | 67 | printInverseCondCode(MI, OpIdx, OS); |
26386 | 67 | break; |
26387 | 226 | case 20: |
26388 | 226 | printSVELogicalImm16(MI, OpIdx, OS); |
26389 | 226 | break; |
26390 | 1.03k | case 21: |
26391 | 1.03k | printSVELogicalImm32(MI, OpIdx, OS); |
26392 | 1.03k | break; |
26393 | 1.11k | case 22: |
26394 | 1.11k | printSVELogicalImm64(MI, OpIdx, OS); |
26395 | 1.11k | break; |
26396 | 12 | case 23: |
26397 | 12 | printZPRasFPR(MI, OpIdx, OS, 8); |
26398 | 12 | break; |
26399 | 2.01k | case 24: |
26400 | 2.01k | printVectorIndex(MI, OpIdx, OS); |
26401 | 2.01k | break; |
26402 | 10 | case 25: |
26403 | 10 | printZPRasFPR(MI, OpIdx, OS, 64); |
26404 | 10 | break; |
26405 | 4 | case 26: |
26406 | 4 | printZPRasFPR(MI, OpIdx, OS, 16); |
26407 | 4 | break; |
26408 | 113 | case 27: |
26409 | 113 | printSVERegOp(MI, OpIdx, OS, 'q'); |
26410 | 113 | break; |
26411 | 7 | case 28: |
26412 | 7 | printZPRasFPR(MI, OpIdx, OS, 128); |
26413 | 7 | break; |
26414 | 3 | case 29: |
26415 | 3 | printZPRasFPR(MI, OpIdx, OS, 32); |
26416 | 3 | break; |
26417 | 305 | case 30: |
26418 | 305 | printMatrixTileVector(MI, OpIdx, OS, 0); |
26419 | 305 | break; |
26420 | 1.10k | case 31: |
26421 | 1.10k | printMatrixIndex(MI, OpIdx, OS); |
26422 | 1.10k | break; |
26423 | 775 | case 32: |
26424 | 775 | printMatrixTileVector(MI, OpIdx, OS, 1); |
26425 | 775 | break; |
26426 | 201 | case 33: |
26427 | 201 | printFPImmOperand(MI, OpIdx, OS); |
26428 | 201 | break; |
26429 | 223 | case 34: |
26430 | 223 | printTypedVectorList(MI, OpIdx, OS, 0,'d'); |
26431 | 223 | break; |
26432 | 95 | case 35: |
26433 | 95 | printTypedVectorList(MI, OpIdx, OS, 0,'s'); |
26434 | 95 | break; |
26435 | 17 | case 36: |
26436 | 17 | printBTIHintOp(MI, OpIdx, OS); |
26437 | 17 | break; |
26438 | 388 | case 37: |
26439 | 388 | printPSBHintOp(MI, OpIdx, OS); |
26440 | 388 | break; |
26441 | 20 | case 38: |
26442 | 20 | printTypedVectorList(MI, OpIdx, OS, 0,'h'); |
26443 | 20 | break; |
26444 | 77 | case 39: |
26445 | 77 | printTypedVectorList(MI, OpIdx, OS, 0,'b'); |
26446 | 77 | break; |
26447 | 162 | case 40: |
26448 | 162 | printTypedVectorList(MI, OpIdx, OS, 16, 'b'); |
26449 | 162 | break; |
26450 | 146 | case 41: |
26451 | 146 | printTypedVectorList(MI, OpIdx, OS, 1, 'd'); |
26452 | 146 | break; |
26453 | 416 | case 42: |
26454 | 416 | printTypedVectorList(MI, OpIdx, OS, 2, 'd'); |
26455 | 416 | break; |
26456 | 642 | case 43: |
26457 | 642 | printTypedVectorList(MI, OpIdx, OS, 2, 's'); |
26458 | 642 | break; |
26459 | 1.71k | case 44: |
26460 | 1.71k | printTypedVectorList(MI, OpIdx, OS, 4, 'h'); |
26461 | 1.71k | break; |
26462 | 560 | case 45: |
26463 | 560 | printTypedVectorList(MI, OpIdx, OS, 4, 's'); |
26464 | 560 | break; |
26465 | 1.07k | case 46: |
26466 | 1.07k | printTypedVectorList(MI, OpIdx, OS, 8, 'b'); |
26467 | 1.07k | break; |
26468 | 831 | case 47: |
26469 | 831 | printTypedVectorList(MI, OpIdx, OS, 8, 'h'); |
26470 | 831 | break; |
26471 | 136 | case 48: |
26472 | 136 | printTypedVectorList(MI, OpIdx, OS, 0, 'h'); |
26473 | 136 | break; |
26474 | 219 | case 49: |
26475 | 219 | printTypedVectorList(MI, OpIdx, OS, 0, 's'); |
26476 | 219 | break; |
26477 | 714 | case 50: |
26478 | 714 | printTypedVectorList(MI, OpIdx, OS, 0, 'd'); |
26479 | 714 | break; |
26480 | 593 | case 51: |
26481 | 593 | printTypedVectorList(MI, OpIdx, OS, 0, 'b'); |
26482 | 593 | break; |
26483 | 26 | case 52: |
26484 | 26 | printMatrix(MI, OpIdx, OS, 0); |
26485 | 26 | break; |
26486 | 0 | case 53: |
26487 | 0 | printImmHex(MI, OpIdx, OS); |
26488 | 0 | break; |
26489 | 69 | case 54: |
26490 | 69 | printPrefetchOp(MI, OpIdx, OS, true); |
26491 | 69 | break; |
26492 | 88 | case 55: |
26493 | 88 | printPrefetchOp(MI, OpIdx, OS, false); |
26494 | 88 | break; |
26495 | 420 | case 56: |
26496 | 420 | printGPR64as32(MI, OpIdx, OS); |
26497 | 420 | break; |
26498 | 54 | case 57: |
26499 | 54 | printSysCROperand(MI, OpIdx, OS); |
26500 | 54 | break; |
26501 | 29.9k | } |
26502 | 29.9k | } |
26503 | | |
26504 | | static bool AArch64InstPrinterValidateMCOperand(MCOperand *MCOp, |
26505 | 15.1k | unsigned PredicateIndex) { |
26506 | 15.1k | int64_t Val; |
26507 | 15.1k | switch (PredicateIndex) { |
26508 | 0 | default: |
26509 | 0 | return false; // never reach |
26510 | 0 | break; |
26511 | 1.58k | case 1: { |
26512 | | |
26513 | 1.58k | if (!MCOperand_isImm(MCOp)) |
26514 | 0 | return false; |
26515 | 1.58k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26516 | 1.58k | return AArch64_AM_isSVEMaskOfIdenticalElements8(Val); |
26517 | | |
26518 | 1.58k | } |
26519 | 1.28k | case 2: { |
26520 | | |
26521 | 1.28k | if (!MCOperand_isImm(MCOp)) |
26522 | 0 | return false; |
26523 | 1.28k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26524 | 1.28k | return AArch64_AM_isSVEMaskOfIdenticalElements16(Val); |
26525 | | |
26526 | 1.28k | } |
26527 | 1.16k | case 3: { |
26528 | | |
26529 | 1.16k | if (!MCOperand_isImm(MCOp)) |
26530 | 0 | return false; |
26531 | 1.16k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26532 | 1.16k | return AArch64_AM_isSVEMaskOfIdenticalElements32(Val); |
26533 | | |
26534 | 1.16k | } |
26535 | 287 | case 4: { |
26536 | | |
26537 | 287 | return MCOperand_isImm(MCOp) && |
26538 | 287 | MCOperand_getImm(MCOp) != AArch64CC_AL && |
26539 | 287 | MCOperand_getImm(MCOp) != AArch64CC_NV; |
26540 | | |
26541 | 1.16k | } |
26542 | 3.60k | case 5: { |
26543 | | |
26544 | 3.60k | if (!MCOperand_isImm(MCOp)) |
26545 | 0 | return false; |
26546 | 3.60k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26547 | 3.60k | return AArch64_AM_isSVEMaskOfIdenticalElements16(Val) && |
26548 | 3.60k | AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val); |
26549 | | |
26550 | 3.60k | } |
26551 | 3.37k | case 6: { |
26552 | | |
26553 | 3.37k | if (!MCOperand_isImm(MCOp)) |
26554 | 0 | return false; |
26555 | 3.37k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26556 | 3.37k | return AArch64_AM_isSVEMaskOfIdenticalElements32(Val) && |
26557 | 3.37k | AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val); |
26558 | | |
26559 | 3.37k | } |
26560 | 2.34k | case 7: { |
26561 | | |
26562 | 2.34k | if (!MCOperand_isImm(MCOp)) |
26563 | 0 | return false; |
26564 | 2.34k | Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64); |
26565 | 2.34k | return AArch64_AM_isSVEMaskOfIdenticalElements64(Val) && |
26566 | 2.34k | AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val); |
26567 | | |
26568 | 2.34k | } |
26569 | 746 | case 8: { |
26570 | | |
26571 | | // "bti" is an alias to "hint" only for certain values of CRm:Op2 fields. |
26572 | 746 | if (!MCOperand_isImm(MCOp)) |
26573 | 0 | return false; |
26574 | 746 | return lookupBTIByEncoding(MCOperand_getImm(MCOp) ^ 32) != NULL; |
26575 | | |
26576 | 746 | } |
26577 | 729 | case 9: { |
26578 | | |
26579 | | // Check, if operand is valid, to fix exhaustive aliasing in disassembly. |
26580 | | // "psb" is an alias to "hint" only for certain values of CRm:Op2 fields. |
26581 | 729 | if (!MCOperand_isImm(MCOp)) |
26582 | 0 | return false; |
26583 | 729 | return lookupPSBByEncoding(MCOperand_getImm(MCOp)) != NULL; |
26584 | | |
26585 | 729 | } |
26586 | 15.1k | } |
26587 | 15.1k | } |
26588 | | |
26589 | | #endif // PRINT_ALIAS_INSTR |