/src/capstonenext/arch/Alpha/AlphaInstPrinter.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* Capstone Disassembly Engine */ |
2 | | /* By Dmitry Sibirtsev <sibirtsevdl@gmail.com>, 2023 */ |
3 | | |
4 | | #ifdef CAPSTONE_HAS_ALPHA |
5 | | |
6 | | #include <platform.h> |
7 | | #include <stdio.h> |
8 | | #include <stdlib.h> |
9 | | #include <string.h> |
10 | | |
11 | | #include "../../utils.h" |
12 | | #include "../../Mapping.h" |
13 | | #include "../../MCInstPrinter.h" |
14 | | |
15 | | #include "AlphaLinkage.h" |
16 | | #include "AlphaMapping.h" |
17 | | |
18 | | static const char *getRegisterName(unsigned RegNo); |
19 | | |
20 | | static void printInstruction(MCInst *, uint64_t, SStream *); |
21 | | static void printOperand(MCInst *MI, int OpNum, SStream *O); |
22 | | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O); |
23 | | |
24 | | #define GET_INSTRINFO_ENUM |
25 | | |
26 | | #include "AlphaGenInstrInfo.inc" |
27 | | |
28 | | #define GET_REGINFO_ENUM |
29 | | |
30 | | #include "AlphaGenRegisterInfo.inc" |
31 | | |
32 | | static void printOperand(MCInst *MI, int OpNum, SStream *O) |
33 | 0 | { |
34 | 0 | if (OpNum >= MI->size) |
35 | 0 | return; |
36 | | |
37 | 0 | Alpha_add_cs_detail(MI, OpNum); |
38 | | |
39 | 0 | MCOperand *Op; |
40 | 0 | Op = MCInst_getOperand(MI, OpNum); |
41 | 0 | if (MCOperand_isReg(Op)) { |
42 | 0 | unsigned reg = MCOperand_getReg(Op); |
43 | 0 | SStream_concat(O, "%s", getRegisterName(reg)); |
44 | 0 | } else if (MCOperand_isImm(Op)) { |
45 | 0 | int64_t Imm = MCOperand_getImm(Op); |
46 | 0 | if (Imm >= 0) { |
47 | 0 | if (Imm > HEX_THRESHOLD) |
48 | 0 | SStream_concat(O, "0x%" PRIx64, Imm); |
49 | 0 | else |
50 | 0 | SStream_concat(O, "%" PRIu64, Imm); |
51 | 0 | } else { |
52 | 0 | if (Imm < -HEX_THRESHOLD) |
53 | 0 | SStream_concat(O, "-0x%" PRIx64, -Imm); |
54 | 0 | else |
55 | 0 | SStream_concat(O, "-%" PRIu64, -Imm); |
56 | 0 | } |
57 | 0 | } |
58 | 0 | } |
59 | | |
60 | | static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O) |
61 | 0 | { |
62 | 0 | MCOperand *Op = MCInst_getOperand(MI, (OpNum)); |
63 | |
|
64 | 0 | uint64_t Imm = MCOperand_getImm(Op); |
65 | 0 | uint64_t Target = Address + 4 + (int16_t) (Imm << 2); |
66 | |
|
67 | 0 | Alpha_set_detail_op_imm(MI, OpNum, ALPHA_OP_IMM, Target); |
68 | 0 | printUInt64(O, Target); |
69 | 0 | } |
70 | | |
71 | | #define PRINT_ALIAS_INSTR |
72 | | |
73 | | #include "AlphaGenAsmWriter.inc" |
74 | | |
75 | | const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id) |
76 | 0 | { |
77 | 0 | #ifndef CAPSTONE_DIET |
78 | 0 | return getRegisterName(id); |
79 | | #else |
80 | | return NULL; |
81 | | #endif |
82 | 0 | } |
83 | | |
84 | | void Alpha_LLVM_printInstruction(MCInst *MI, SStream *O, void *Info) |
85 | 0 | { |
86 | 0 | printAliasInstr(MI, MI->address, O); |
87 | 0 | printInstruction(MI, MI->address, O); |
88 | 0 | } |
89 | | |
90 | | #endif |