#ifndef CAPSTONE_SPARC_H

#define CAPSTONE_SPARC_H

/* Capstone Disassembly Engine */

/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */

#ifdef __cplusplus

extern "C" {

#endif

#include "platform.h"

#include "cs_operand.h"

// GCC SPARC toolchain has a default macro called "sparc" which breaks

// compilation

#undef sparc

#ifdef _MSC_VER

#pragma warning(disable:4201)

#endif

/// Enums corresponding to Sparc condition codes, both icc's and fcc's.

typedef enum sparc_cc {

  // Integer condition codes

  SPARC_CC_ICC_A = 8,    // Always

  SPARC_CC_ICC_N = 0,    // Never

  SPARC_CC_ICC_NE = 9,   // Not Equal

  SPARC_CC_ICC_E = 1,    // Equal

  SPARC_CC_ICC_G = 10,   // Greater

  SPARC_CC_ICC_LE = 2,   // Less or Equal

  SPARC_CC_ICC_GE = 11,  // Greater or Equal

  SPARC_CC_ICC_L = 3,    // Less

  SPARC_CC_ICC_GU = 12,  // Greater Unsigned

  SPARC_CC_ICC_LEU = 4,  // Less or Equal Unsigned

  SPARC_CC_ICC_CC = 13,  // Carry Clear/Great or Equal Unsigned

  SPARC_CC_ICC_CS = 5,   // Carry Set/Less Unsigned

  SPARC_CC_ICC_POS = 14, // Positive

  SPARC_CC_ICC_NEG = 6,  // Negative

  SPARC_CC_ICC_VC = 15,  // Overflow Clear

  SPARC_CC_ICC_VS = 7,   // Overflow Set

  SPARC_CC_FCC_BEGIN = 16,

  SPARC_CC_FCC_A = 8 + SPARC_CC_FCC_BEGIN,    // Always

  SPARC_CC_FCC_N = 0 + SPARC_CC_FCC_BEGIN,    // Never

  SPARC_CC_FCC_U = 7 + SPARC_CC_FCC_BEGIN,    // Unordered

  SPARC_CC_FCC_G = 6 + SPARC_CC_FCC_BEGIN,    // Greater

  SPARC_CC_FCC_UG = 5 + SPARC_CC_FCC_BEGIN,   // Unordered or Greater

  SPARC_CC_FCC_L = 4 + SPARC_CC_FCC_BEGIN,    // Less

  SPARC_CC_FCC_UL = 3 + SPARC_CC_FCC_BEGIN,   // Unordered or Less

  SPARC_CC_FCC_LG = 2 + SPARC_CC_FCC_BEGIN,   // Less or Greater

  SPARC_CC_FCC_NE = 1 + SPARC_CC_FCC_BEGIN,   // Not Equal

  SPARC_CC_FCC_E = 9 + SPARC_CC_FCC_BEGIN,    // Equal

  SPARC_CC_FCC_UE = 10 + SPARC_CC_FCC_BEGIN,  // Unordered or Equal

  SPARC_CC_FCC_GE = 11 + SPARC_CC_FCC_BEGIN,  // Greater or Equal

  SPARC_CC_FCC_UGE = 12 + SPARC_CC_FCC_BEGIN, // Unordered or Greater or Equal

  SPARC_CC_FCC_LE = 13 + SPARC_CC_FCC_BEGIN,  // Less or Equal

  SPARC_CC_FCC_ULE = 14 + SPARC_CC_FCC_BEGIN, // Unordered or Less or Equal

  SPARC_CC_FCC_O = 15 + SPARC_CC_FCC_BEGIN,   // Ordered

  SPARC_CC_CPCC_BEGIN = 32, ///< Co-processor conditional branches

  SPARC_CC_CPCC_A = 8 + SPARC_CC_CPCC_BEGIN, // Always

  SPARC_CC_CPCC_N = 0 + SPARC_CC_CPCC_BEGIN, // Never

  SPARC_CC_CPCC_3 = 7 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_2 = 6 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_23 = 5 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_1 = 4 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_13 = 3 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_12 = 2 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_123 = 1 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_0 = 9 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_03 = 10 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_02 = 11 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_023 = 12 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_01 = 13 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_013 = 14 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_CPCC_012 = 15 + SPARC_CC_CPCC_BEGIN,

  SPARC_CC_REG_BEGIN = 48,

  SPARC_CC_REG_Z = 1 + SPARC_CC_REG_BEGIN,   // Is zero

  SPARC_CC_REG_LEZ = 2 + SPARC_CC_REG_BEGIN, // Less or equal to zero

  SPARC_CC_REG_LZ = 3 + SPARC_CC_REG_BEGIN,  // Less than zero

  SPARC_CC_REG_NZ = 5 + SPARC_CC_REG_BEGIN,  // Is not zero

  SPARC_CC_REG_GZ = 6 + SPARC_CC_REG_BEGIN,  // Greater than zero

  SPARC_CC_REG_GEZ = 7 + SPARC_CC_REG_BEGIN,  // Greater than or equal to zero

  SPARC_CC_UNDEF = 0xffff,

} sparc_cc;

inline static const char *SPARCCondCodeToString(sparc_cc CC) {

  switch (CC) {

  case SPARC_CC_ICC_A:   return "a";

  case SPARC_CC_ICC_N:   return "n";

  case SPARC_CC_ICC_NE:  return "ne";

  case SPARC_CC_ICC_E:   return "e";

  case SPARC_CC_ICC_G:   return "g";

  case SPARC_CC_ICC_LE:  return "le";

  case SPARC_CC_ICC_GE:  return "ge";

  case SPARC_CC_ICC_L:   return "l";

  case SPARC_CC_ICC_GU:  return "gu";

  case SPARC_CC_ICC_LEU: return "leu";

  case SPARC_CC_ICC_CC:  return "cc";

  case SPARC_CC_ICC_CS:  return "cs";

  case SPARC_CC_ICC_POS: return "pos";

  case SPARC_CC_ICC_NEG: return "neg";

  case SPARC_CC_ICC_VC:  return "vc";

  case SPARC_CC_ICC_VS:  return "vs";

  case SPARC_CC_FCC_A:   return "a";

  case SPARC_CC_FCC_N:   return "n";

  case SPARC_CC_FCC_U:   return "u";

  case SPARC_CC_FCC_G:   return "g";

  case SPARC_CC_FCC_UG:  return "ug";

  case SPARC_CC_FCC_L:   return "l";

  case SPARC_CC_FCC_UL:  return "ul";

  case SPARC_CC_FCC_LG:  return "lg";

  case SPARC_CC_FCC_NE:  return "ne";

  case SPARC_CC_FCC_E:   return "e";

  case SPARC_CC_FCC_UE:  return "ue";

  case SPARC_CC_FCC_GE:  return "ge";

  case SPARC_CC_FCC_UGE: return "uge";

  case SPARC_CC_FCC_LE:  return "le";

  case SPARC_CC_FCC_ULE: return "ule";

  case SPARC_CC_FCC_O:   return "o";

  case SPARC_CC_CPCC_A:   return "a";

  case SPARC_CC_CPCC_N:   return "n";

  case SPARC_CC_CPCC_3:   return "3";

  case SPARC_CC_CPCC_2:   return "2";

  case SPARC_CC_CPCC_23:  return "23";

  case SPARC_CC_CPCC_1:   return "1";

  case SPARC_CC_CPCC_13:  return "13";

  case SPARC_CC_CPCC_12:  return "12";

  case SPARC_CC_CPCC_123: return "123";

  case SPARC_CC_CPCC_0:   return "0";

  case SPARC_CC_CPCC_03:  return "03";

  case SPARC_CC_CPCC_02:  return "02";

  case SPARC_CC_CPCC_023: return "023";

  case SPARC_CC_CPCC_01:  return "01";

  case SPARC_CC_CPCC_013: return "013";

  case SPARC_CC_CPCC_012: return "012";

  case SPARC_CC_REG_BEGIN:

  case SPARC_CC_UNDEF:

    return "invalid";

  case SPARC_CC_REG_Z:

    return "z";

  case SPARC_CC_REG_LEZ:

    return "lez";

  case SPARC_CC_REG_LZ:

    return "lz";

  case SPARC_CC_REG_NZ:

    return "nz";

  case SPARC_CC_REG_GZ:

    return "gz";

  case SPARC_CC_REG_GEZ:

    return "gez";

  }

  return "invalid";

}

Unexecuted instantiation: fuzz_disasm.c:SPARCCondCodeToString

Unexecuted instantiation: platform.c:SPARCCondCodeToString

Unexecuted instantiation: cs.c:SPARCCondCodeToString

Unexecuted instantiation: MCInst.c:SPARCCondCodeToString

Unexecuted instantiation: SStream.c:SPARCCondCodeToString

Unexecuted instantiation: utils.c:SPARCCondCodeToString

Unexecuted instantiation: ARMModule.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64Module.c:SPARCCondCodeToString

Unexecuted instantiation: MipsModule.c:SPARCCondCodeToString

Unexecuted instantiation: PPCModule.c:SPARCCondCodeToString

Unexecuted instantiation: X86Module.c:SPARCCondCodeToString

Unexecuted instantiation: X86ATTInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: SparcModule.c:SPARCCondCodeToString

Unexecuted instantiation: SystemZModule.c:SPARCCondCodeToString

Unexecuted instantiation: XCoreModule.c:SPARCCondCodeToString

Unexecuted instantiation: M68KModule.c:SPARCCondCodeToString

Unexecuted instantiation: TMS320C64xModule.c:SPARCCondCodeToString

Unexecuted instantiation: M680XModule.c:SPARCCondCodeToString

Unexecuted instantiation: EVMModule.c:SPARCCondCodeToString

Unexecuted instantiation: WASMModule.c:SPARCCondCodeToString

Unexecuted instantiation: MOS65XXModule.c:SPARCCondCodeToString

Unexecuted instantiation: MOS65XXDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: BPFModule.c:SPARCCondCodeToString

Unexecuted instantiation: RISCVModule.c:SPARCCondCodeToString

Unexecuted instantiation: SHModule.c:SPARCCondCodeToString

Unexecuted instantiation: TriCoreModule.c:SPARCCondCodeToString

Unexecuted instantiation: AlphaModule.c:SPARCCondCodeToString

Unexecuted instantiation: HPPAModule.c:SPARCCondCodeToString

Unexecuted instantiation: LoongArchModule.c:SPARCCondCodeToString

Unexecuted instantiation: XtensaModule.c:SPARCCondCodeToString

Unexecuted instantiation: ARCModule.c:SPARCCondCodeToString

Unexecuted instantiation: ARMMapping.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64Mapping.c:SPARCCondCodeToString

Unexecuted instantiation: MipsMapping.c:SPARCCondCodeToString

Unexecuted instantiation: PPCMapping.c:SPARCCondCodeToString

Unexecuted instantiation: X86Disassembler.c:SPARCCondCodeToString

Unexecuted instantiation: X86DisassemblerDecoder.c:SPARCCondCodeToString

Unexecuted instantiation: X86IntelInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: X86InstPrinterCommon.c:SPARCCondCodeToString

Unexecuted instantiation: X86Mapping.c:SPARCCondCodeToString

Unexecuted instantiation: SparcMapping.c:SPARCCondCodeToString

Unexecuted instantiation: SystemZMapping.c:SPARCCondCodeToString

Unexecuted instantiation: XCoreDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: XCoreInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: XCoreMapping.c:SPARCCondCodeToString

Unexecuted instantiation: M68KDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: M68KInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: TMS320C64xDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: TMS320C64xInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: TMS320C64xMapping.c:SPARCCondCodeToString

Unexecuted instantiation: M680XDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: M680XInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: EVMDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: EVMInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: EVMMapping.c:SPARCCondCodeToString

Unexecuted instantiation: WASMDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: WASMInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: WASMMapping.c:SPARCCondCodeToString

Unexecuted instantiation: BPFDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: BPFInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: BPFMapping.c:SPARCCondCodeToString

Unexecuted instantiation: RISCVDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: RISCVInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: RISCVMapping.c:SPARCCondCodeToString

Unexecuted instantiation: SHDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: SHInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: TriCoreDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: TriCoreMapping.c:SPARCCondCodeToString

Unexecuted instantiation: AlphaDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: AlphaMapping.c:SPARCCondCodeToString

Unexecuted instantiation: HPPADisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: HPPAInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: HPPAMapping.c:SPARCCondCodeToString

Unexecuted instantiation: LoongArchMapping.c:SPARCCondCodeToString

Unexecuted instantiation: XtensaMapping.c:SPARCCondCodeToString

Unexecuted instantiation: ARCMapping.c:SPARCCondCodeToString

Unexecuted instantiation: Mapping.c:SPARCCondCodeToString

Unexecuted instantiation: ARMBaseInfo.c:SPARCCondCodeToString

Unexecuted instantiation: ARMDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: ARMDisassemblerExtension.c:SPARCCondCodeToString

Unexecuted instantiation: ARMInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64BaseInfo.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64Disassembler.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64DisassemblerExtension.c:SPARCCondCodeToString

Unexecuted instantiation: AArch64InstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: MipsDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: MipsInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: PPCDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: PPCInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: SparcDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: SparcDisassemblerExtension.c:SPARCCondCodeToString

SparcInstPrinter.c:SPARCCondCodeToString

Line

Count

Source

89

13.6k

inline static const char *SPARCCondCodeToString(sparc_cc CC) {

90

13.6k

  switch (CC) {

91

41

  case SPARC_CC_ICC_A:   return "a";

92

545

  case SPARC_CC_ICC_N:   return "n";

93

246

  case SPARC_CC_ICC_NE:  return "ne";

94

74

  case SPARC_CC_ICC_E:   return "e";

95

315

  case SPARC_CC_ICC_G:   return "g";

96

726

  case SPARC_CC_ICC_LE:  return "le";

97

36

  case SPARC_CC_ICC_GE:  return "ge";

98

82

  case SPARC_CC_ICC_L:   return "l";

99

72

  case SPARC_CC_ICC_GU:  return "gu";

100

205

  case SPARC_CC_ICC_LEU: return "leu";

101

37

  case SPARC_CC_ICC_CC:  return "cc";

102

754

  case SPARC_CC_ICC_CS:  return "cs";

103

213

  case SPARC_CC_ICC_POS: return "pos";

104

219

  case SPARC_CC_ICC_NEG: return "neg";

105

35

  case SPARC_CC_ICC_VC:  return "vc";

106

449

  case SPARC_CC_ICC_VS:  return "vs";

107

160

  case SPARC_CC_FCC_A:   return "a";

108

790

  case SPARC_CC_FCC_N:   return "n";

109

333

  case SPARC_CC_FCC_U:   return "u";

110

87

  case SPARC_CC_FCC_G:   return "g";

111

98

  case SPARC_CC_FCC_UG:  return "ug";

112

321

  case SPARC_CC_FCC_L:   return "l";

113

221

  case SPARC_CC_FCC_UL:  return "ul";

114

214

  case SPARC_CC_FCC_LG:  return "lg";

115

544

  case SPARC_CC_FCC_NE:  return "ne";

116

118

  case SPARC_CC_FCC_E:   return "e";

117

213

  case SPARC_CC_FCC_UE:  return "ue";

118

109

  case SPARC_CC_FCC_GE:  return "ge";

119

223

  case SPARC_CC_FCC_UGE: return "uge";

120

308

  case SPARC_CC_FCC_LE:  return "le";

121

225

  case SPARC_CC_FCC_ULE: return "ule";

122

323

  case SPARC_CC_FCC_O:   return "o";

123

219

  case SPARC_CC_CPCC_A:   return "a";

124

718

  case SPARC_CC_CPCC_N:   return "n";

125

234

  case SPARC_CC_CPCC_3:   return "3";

126

230

  case SPARC_CC_CPCC_2:   return "2";

127

251

  case SPARC_CC_CPCC_23:  return "23";

128

201

  case SPARC_CC_CPCC_1:   return "1";

129

249

  case SPARC_CC_CPCC_13:  return "13";

130

119

  case SPARC_CC_CPCC_12:  return "12";

131

507

  case SPARC_CC_CPCC_123: return "123";

132

265

  case SPARC_CC_CPCC_0:   return "0";

133

275

  case SPARC_CC_CPCC_03:  return "03";

134

73

  case SPARC_CC_CPCC_02:  return "02";

135

77

  case SPARC_CC_CPCC_023: return "023";

136

80

  case SPARC_CC_CPCC_01:  return "01";

137

92

  case SPARC_CC_CPCC_013: return "013";

138

214

  case SPARC_CC_CPCC_012: return "012";

139

559

  case SPARC_CC_REG_BEGIN:

140

559

  case SPARC_CC_UNDEF:

141

559

    return "invalid";

142

87

  case SPARC_CC_REG_Z:

143

87

    return "z";

144

81

  case SPARC_CC_REG_LEZ:

145

81

    return "lez";

146

147

  case SPARC_CC_REG_LZ:

147

147

    return "lz";

148

92

  case SPARC_CC_REG_NZ:

149

92

    return "nz";

150

81

  case SPARC_CC_REG_GZ:

151

81

    return "gz";

152

69

  case SPARC_CC_REG_GEZ:

153

69

    return "gez";

154

13.6k

  }

155

371

  return "invalid";

156

13.6k

}

Unexecuted instantiation: SystemZDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: SystemZDisassemblerExtension.c:SPARCCondCodeToString

Unexecuted instantiation: SystemZInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: SystemZMCTargetDesc.c:SPARCCondCodeToString

Unexecuted instantiation: TriCoreInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: AlphaInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: LoongArchDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: LoongArchDisassemblerExtension.c:SPARCCondCodeToString

Unexecuted instantiation: LoongArchInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: XtensaDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: XtensaInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: ARCDisassembler.c:SPARCCondCodeToString

Unexecuted instantiation: ARCInstPrinter.c:SPARCCondCodeToString

Unexecuted instantiation: MCInstPrinter.c:SPARCCondCodeToString

/// The cc field values encoded in the cc0, cc1, cc2 bits or opf_cc.

/// They are equivalent to ISA Sparc v9 - Table 41 - Chapter E.2 Tables - Page 281.

typedef enum {

  SPARC_CC_FIELD_FCC0 = 0,

  SPARC_CC_FIELD_FCC1 = 1,

  SPARC_CC_FIELD_FCC2 = 2,

  SPARC_CC_FIELD_FCC3 = 3,

  SPARC_CC_FIELD_ICC = 4,

  SPARC_CC_FIELD_RESERVED_I = 5,

  SPARC_CC_FIELD_XCC = 6,

  SPARC_CC_FIELD_RESERVED_II = 7,

  SPARC_CC_FIELD_NONE = 0xff,

} sparc_cc_field;

/// The instruction formats.

/// They are only loosely equivalent to the one in the ISA.

/// Because in LLVM they are not defined one to one.

typedef enum {

  // generated content <SparcGenCSInsnFormatsEnum.inc> begin

  // clang-format off

  SPARC_INSN_FORM_ASMPSEUDOINST,

  SPARC_INSN_FORM_F3_2,

  SPARC_INSN_FORM_F3_1_ASI,

  SPARC_INSN_FORM_F3_3,

  SPARC_INSN_FORM_F2_2,

  SPARC_INSN_FORM_F2_3,

  SPARC_INSN_FORM_F2_4,

  SPARC_INSN_FORM_F1,

  SPARC_INSN_FORM_F3_3U,

  SPARC_INSN_FORM_F4_3,

  SPARC_INSN_FORM_F4_4R,

  SPARC_INSN_FORM_F4_2,

  SPARC_INSN_FORM_F4_1,

  SPARC_INSN_FORM_F4_4I,

  SPARC_INSN_FORM_F2_1,

  SPARC_INSN_FORM_F3_SI,

  SPARC_INSN_FORM_F3_SR,

  SPARC_INSN_FORM_TRAPSP,

  SPARC_INSN_FORM_F3_3C,

  // clang-format on

  // generated content <SparcGenCSInsnFormatsEnum.inc> end

} sparc_insn_form;

/// Branch hint

typedef enum sparc_hint {

  SPARC_HINT_INVALID = 0, ///< no hint

  SPARC_HINT_A  = 1 << 0, ///< annul delay slot instruction

  SPARC_HINT_PT = 1 << 1, ///< branch taken

  SPARC_HINT_PN = 1 << 2, ///< branch NOT taken

  SPARC_HINT_A_PN = SPARC_HINT_A | SPARC_HINT_PN,

  SPARC_HINT_A_PT = SPARC_HINT_A | SPARC_HINT_PT,

} sparc_hint;

/// Operand type for instruction's operands

typedef enum sparc_op_type {

  SPARC_OP_INVALID = CS_OP_INVALID, ///< = CS_OP_INVALID (Uninitialized).

  SPARC_OP_REG = CS_OP_REG, ///< = CS_OP_REG (Register operand).

  SPARC_OP_IMM = CS_OP_IMM, ///< = CS_OP_IMM (Immediate operand).

  SPARC_OP_MEM = CS_OP_MEM, ///< = CS_OP_MEM (Memory operand).

  SPARC_OP_MEMBAR_TAG = CS_OP_SPECIAL + 0,

  SPARC_OP_ASI = CS_OP_SPECIAL + 1,

} sparc_op_type;

/// SPARC registers

typedef enum sparc_reg {

  // generated content <SparcGenCSRegEnum.inc> begin

  // clang-format off

  SPARC_REG_INVALID = 0,

  SPARC_REG_CANRESTORE = 1,

  SPARC_REG_CANSAVE = 2,

  SPARC_REG_CLEANWIN = 3,

  SPARC_REG_CPQ = 4,

  SPARC_REG_CPSR = 5,

  SPARC_REG_CWP = 6,

  SPARC_REG_FQ = 7,

  SPARC_REG_FSR = 8,

  SPARC_REG_GL = 9,

  SPARC_REG_ICC = 10,

  SPARC_REG_OTHERWIN = 11,

  SPARC_REG_PIL = 12,

  SPARC_REG_PSR = 13,

  SPARC_REG_PSTATE = 14,

  SPARC_REG_TBA = 15,

  SPARC_REG_TBR = 16,

  SPARC_REG_TICK = 17,

  SPARC_REG_TL = 18,

  SPARC_REG_TNPC = 19,

  SPARC_REG_TPC = 20,

  SPARC_REG_TSTATE = 21,

  SPARC_REG_TT = 22,

  SPARC_REG_VER = 23,

  SPARC_REG_WIM = 24,

  SPARC_REG_WSTATE = 25,

  SPARC_REG_Y = 26,

  SPARC_REG_ASR1 = 27,

  SPARC_REG_ASR2 = 28,

  SPARC_REG_ASR3 = 29,

  SPARC_REG_ASR4 = 30,

  SPARC_REG_ASR5 = 31,

  SPARC_REG_ASR6 = 32,

  SPARC_REG_ASR7 = 33,

  SPARC_REG_ASR8 = 34,

  SPARC_REG_ASR9 = 35,

  SPARC_REG_ASR10 = 36,

  SPARC_REG_ASR11 = 37,

  SPARC_REG_ASR12 = 38,

  SPARC_REG_ASR13 = 39,

  SPARC_REG_ASR14 = 40,

  SPARC_REG_ASR15 = 41,

  SPARC_REG_ASR16 = 42,

  SPARC_REG_ASR17 = 43,

  SPARC_REG_ASR18 = 44,

  SPARC_REG_ASR19 = 45,

  SPARC_REG_ASR20 = 46,

  SPARC_REG_ASR21 = 47,

  SPARC_REG_ASR22 = 48,

  SPARC_REG_ASR23 = 49,

  SPARC_REG_ASR24 = 50,

  SPARC_REG_ASR25 = 51,

  SPARC_REG_ASR26 = 52,

  SPARC_REG_ASR27 = 53,

  SPARC_REG_ASR28 = 54,

  SPARC_REG_ASR29 = 55,

  SPARC_REG_ASR30 = 56,

  SPARC_REG_ASR31 = 57,

  SPARC_REG_C0 = 58,

  SPARC_REG_C1 = 59,

  SPARC_REG_C2 = 60,

  SPARC_REG_C3 = 61,

  SPARC_REG_C4 = 62,

  SPARC_REG_C5 = 63,

  SPARC_REG_C6 = 64,

  SPARC_REG_C7 = 65,

  SPARC_REG_C8 = 66,

  SPARC_REG_C9 = 67,

  SPARC_REG_C10 = 68,

  SPARC_REG_C11 = 69,

  SPARC_REG_C12 = 70,

  SPARC_REG_C13 = 71,

  SPARC_REG_C14 = 72,

  SPARC_REG_C15 = 73,

  SPARC_REG_C16 = 74,

  SPARC_REG_C17 = 75,

  SPARC_REG_C18 = 76,

  SPARC_REG_C19 = 77,

  SPARC_REG_C20 = 78,

  SPARC_REG_C21 = 79,

  SPARC_REG_C22 = 80,

  SPARC_REG_C23 = 81,

  SPARC_REG_C24 = 82,

  SPARC_REG_C25 = 83,

  SPARC_REG_C26 = 84,

  SPARC_REG_C27 = 85,

  SPARC_REG_C28 = 86,

  SPARC_REG_C29 = 87,

  SPARC_REG_C30 = 88,

  SPARC_REG_C31 = 89,

  SPARC_REG_D0 = 90,

  SPARC_REG_D1 = 91,

  SPARC_REG_D2 = 92,

  SPARC_REG_D3 = 93,

  SPARC_REG_D4 = 94,

  SPARC_REG_D5 = 95,

  SPARC_REG_D6 = 96,

  SPARC_REG_D7 = 97,

  SPARC_REG_D8 = 98,

  SPARC_REG_D9 = 99,

  SPARC_REG_D10 = 100,

  SPARC_REG_D11 = 101,

  SPARC_REG_D12 = 102,

  SPARC_REG_D13 = 103,

  SPARC_REG_D14 = 104,

  SPARC_REG_D15 = 105,

  SPARC_REG_D16 = 106,

  SPARC_REG_D17 = 107,

  SPARC_REG_D18 = 108,

  SPARC_REG_D19 = 109,

  SPARC_REG_D20 = 110,

  SPARC_REG_D21 = 111,

  SPARC_REG_D22 = 112,

  SPARC_REG_D23 = 113,

  SPARC_REG_D24 = 114,

  SPARC_REG_D25 = 115,

  SPARC_REG_D26 = 116,

  SPARC_REG_D27 = 117,

  SPARC_REG_D28 = 118,

  SPARC_REG_D29 = 119,

  SPARC_REG_D30 = 120,

  SPARC_REG_D31 = 121,

  SPARC_REG_F0 = 122,

  SPARC_REG_F1 = 123,

  SPARC_REG_F2 = 124,

  SPARC_REG_F3 = 125,

  SPARC_REG_F4 = 126,

  SPARC_REG_F5 = 127,

  SPARC_REG_F6 = 128,

  SPARC_REG_F7 = 129,

  SPARC_REG_F8 = 130,

  SPARC_REG_F9 = 131,

  SPARC_REG_F10 = 132,

  SPARC_REG_F11 = 133,

  SPARC_REG_F12 = 134,

  SPARC_REG_F13 = 135,

  SPARC_REG_F14 = 136,

  SPARC_REG_F15 = 137,

  SPARC_REG_F16 = 138,

  SPARC_REG_F17 = 139,

  SPARC_REG_F18 = 140,

  SPARC_REG_F19 = 141,

  SPARC_REG_F20 = 142,

  SPARC_REG_F21 = 143,

  SPARC_REG_F22 = 144,

  SPARC_REG_F23 = 145,

  SPARC_REG_F24 = 146,

  SPARC_REG_F25 = 147,

  SPARC_REG_F26 = 148,

  SPARC_REG_F27 = 149,

  SPARC_REG_F28 = 150,

  SPARC_REG_F29 = 151,

  SPARC_REG_F30 = 152,

  SPARC_REG_F31 = 153,

  SPARC_REG_FCC0 = 154,

  SPARC_REG_FCC1 = 155,

  SPARC_REG_FCC2 = 156,

  SPARC_REG_FCC3 = 157,

  SPARC_REG_G0 = 158,

  SPARC_REG_G1 = 159,

  SPARC_REG_G2 = 160,

  SPARC_REG_G3 = 161,

  SPARC_REG_G4 = 162,

  SPARC_REG_G5 = 163,

  SPARC_REG_G6 = 164,

  SPARC_REG_G7 = 165,

  SPARC_REG_I0 = 166,

  SPARC_REG_I1 = 167,

  SPARC_REG_I2 = 168,

  SPARC_REG_I3 = 169,

  SPARC_REG_I4 = 170,

  SPARC_REG_I5 = 171,

  SPARC_REG_I6 = 172,

  SPARC_REG_I7 = 173,

  SPARC_REG_L0 = 174,

  SPARC_REG_L1 = 175,

  SPARC_REG_L2 = 176,

  SPARC_REG_L3 = 177,

  SPARC_REG_L4 = 178,

  SPARC_REG_L5 = 179,

  SPARC_REG_L6 = 180,

  SPARC_REG_L7 = 181,

  SPARC_REG_O0 = 182,

  SPARC_REG_O1 = 183,

  SPARC_REG_O2 = 184,

  SPARC_REG_O3 = 185,

  SPARC_REG_O4 = 186,

  SPARC_REG_O5 = 187,

  SPARC_REG_O6 = 188,

  SPARC_REG_O7 = 189,

  SPARC_REG_Q0 = 190,

  SPARC_REG_Q1 = 191,

  SPARC_REG_Q2 = 192,

  SPARC_REG_Q3 = 193,

  SPARC_REG_Q4 = 194,

  SPARC_REG_Q5 = 195,

  SPARC_REG_Q6 = 196,

  SPARC_REG_Q7 = 197,

  SPARC_REG_Q8 = 198,

  SPARC_REG_Q9 = 199,

  SPARC_REG_Q10 = 200,

  SPARC_REG_Q11 = 201,

  SPARC_REG_Q12 = 202,

  SPARC_REG_Q13 = 203,

  SPARC_REG_Q14 = 204,

  SPARC_REG_Q15 = 205,

  SPARC_REG_C0_C1 = 206,

  SPARC_REG_C2_C3 = 207,

  SPARC_REG_C4_C5 = 208,

  SPARC_REG_C6_C7 = 209,

  SPARC_REG_C8_C9 = 210,

  SPARC_REG_C10_C11 = 211,

  SPARC_REG_C12_C13 = 212,

  SPARC_REG_C14_C15 = 213,

  SPARC_REG_C16_C17 = 214,

  SPARC_REG_C18_C19 = 215,

  SPARC_REG_C20_C21 = 216,

  SPARC_REG_C22_C23 = 217,

  SPARC_REG_C24_C25 = 218,

  SPARC_REG_C26_C27 = 219,

  SPARC_REG_C28_C29 = 220,

  SPARC_REG_C30_C31 = 221,

  SPARC_REG_G0_G1 = 222,

  SPARC_REG_G2_G3 = 223,

  SPARC_REG_G4_G5 = 224,

  SPARC_REG_G6_G7 = 225,

  SPARC_REG_I0_I1 = 226,

  SPARC_REG_I2_I3 = 227,

  SPARC_REG_I4_I5 = 228,

  SPARC_REG_I6_I7 = 229,

  SPARC_REG_L0_L1 = 230,

  SPARC_REG_L2_L3 = 231,

  SPARC_REG_L4_L5 = 232,

  SPARC_REG_L6_L7 = 233,

  SPARC_REG_O0_O1 = 234,

  SPARC_REG_O2_O3 = 235,

  SPARC_REG_O4_O5 = 236,

  SPARC_REG_O6_O7 = 237,

  SPARC_REG_ENDING, // 238

  // clang-format on

  // generated content <SparcGenCSRegEnum.inc> end

  // extras

  SPARC_REG_SP = SPARC_REG_O6,

  SPARC_REG_FP = SPARC_REG_I6,

} sparc_reg;

typedef enum sparc_asi {

  SPARC_ASITAG_ASI_INVALID = 0x0,

  // generated content <SparcGenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ASITag> begin

  // clang-format off

  SPARC_ASITAG_ASI_AIUP = 0x10,

  SPARC_ASITAG_ASI_AS_IF_USER_PRIMARY = 0x10,

  SPARC_ASITAG_ASI_AIUP_L = 0x18,

  SPARC_ASITAG_ASI_AS_IF_USER_PRIMARY_LITTLE = 0x18,

  SPARC_ASITAG_ASI_AIUS = 0x11,

  SPARC_ASITAG_ASI_AS_IF_USER_SECONDARY = 0x11,

  SPARC_ASITAG_ASI_AIUS_L = 0x19,

  SPARC_ASITAG_ASI_AS_IF_USER_SECONDARY_LITTLE = 0x19,

  SPARC_ASITAG_ASI_N = 0x4,

  SPARC_ASITAG_ASI_NUCLEUS = 0x4,

  SPARC_ASITAG_ASI_N_L = 0xc,

  SPARC_ASITAG_ASI_NUCLEUS_LITTLE = 0xc,

  SPARC_ASITAG_ASI_P = 0x80,

  SPARC_ASITAG_ASI_PRIMARY = 0x80,

  SPARC_ASITAG_ASI_PNF = 0x82,

  SPARC_ASITAG_ASI_PRIMARY_NOFAULT = 0x82,

  SPARC_ASITAG_ASI_PNF_L = 0x8a,

  SPARC_ASITAG_ASI_PRIMARY_NOFAULT_LITTLE = 0x8a,

  SPARC_ASITAG_ASI_P_L = 0x88,

  SPARC_ASITAG_ASI_PRIMARY_LITTLE = 0x88,

  SPARC_ASITAG_ASI_S = 0x81,

  SPARC_ASITAG_ASI_SECONDARY = 0x81,

  SPARC_ASITAG_ASI_SNF = 0x83,

  SPARC_ASITAG_ASI_SECONDARY_NOFAULT = 0x83,

  SPARC_ASITAG_ASI_SNF_L = 0x8b,

  SPARC_ASITAG_ASI_SECONDARY_NOFAULT_LITTLE = 0x8b,

  SPARC_ASITAG_ASI_S_L = 0x89,

  SPARC_ASITAG_ASI_SECONDARY_LITTLE = 0x89,

  // clang-format on

  // generated content <SparcGenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ASITag> end

} sparc_asi;

typedef enum sparc_membar_tag {

  SPARC_MEMBAR_TAG_NONE = 0,

  SPARC_MEMBAR_TAG_LOADLOAD = 1,

  SPARC_MEMBAR_TAG_STORELOAD = 1 << 1,

  SPARC_MEMBAR_TAG_LOADSTORE = 1 << 2,

  SPARC_MEMBAR_TAG_STORESTORE = 1 << 3,

  SPARC_MEMBAR_TAG_LOOKASIDE = 1 << 4,

  SPARC_MEMBAR_TAG_MEMISSUE = 1 << 5,

  SPARC_MEMBAR_TAG_SYNC = 1 << 6,

} sparc_membar_tag;

/// Instruction's operand referring to memory

/// This is associated with SPARC_OP_MEM operand type above

typedef struct sparc_op_mem {

  sparc_reg base;   ///< base register, can be safely interpreted as

        ///< a value of type `sparc_reg`, but it is only

        ///< one byte wide

  sparc_reg index;    ///< index register, same conditions apply here

  int32_t disp;   ///< displacement/offset value

} sparc_op_mem;

/// Instruction operand

typedef struct cs_sparc_op {

  sparc_op_type type; ///< operand type

  union {

    sparc_reg reg;  ///< register value for REG operand

    int64_t imm;    ///< immediate value for IMM operand

    sparc_op_mem mem;   ///< base/disp value for MEM operand

    sparc_membar_tag membar_tag; ///< Tag of the MEMBAR instruction.

    sparc_asi asi; ///< Address space identifier.

  };

  cs_ac_type access; ///< The way the operand is accessed.

} cs_sparc_op;

#define NUM_SPARC_OPS 6

/// Instruction structure

typedef struct cs_sparc {

  sparc_cc cc;  ///< Condition code: only SPARC_CC_ICC_* are set here.

  sparc_cc_field cc_field; ///< The CC field the instruction uses.

  sparc_hint hint;  ///< branch hint: encoding as bitwise OR of sparc_hint.

  sparc_insn_form format; ///< The instruction format.

  /// Number of operands of this instruction,

  /// or 0 when instruction has no operand.

  uint8_t op_count;

  cs_sparc_op operands[NUM_SPARC_OPS]; ///< operands for this instruction.

} cs_sparc;

typedef struct {

  sparc_insn_form form; ///< The instruction format.

} sparc_suppl_info;

/// SPARC instruction

typedef enum sparc_insn {

  // generated content <SparcGenCSInsnEnum.inc> begin

  // clang-format off

  SPARC_INS_INVALID,

  SPARC_INS_SET,

  SPARC_INS_SETX,

  SPARC_INS_ADDCC,

  SPARC_INS_ADDX,

  SPARC_INS_ADDXCC,

  SPARC_INS_ADDXC,

  SPARC_INS_ADDXCCC,

  SPARC_INS_ADD,

  SPARC_INS_ALIGNADDR,

  SPARC_INS_ALIGNADDRL,

  SPARC_INS_ANDCC,

  SPARC_INS_ANDNCC,

  SPARC_INS_ANDN,

  SPARC_INS_AND,

  SPARC_INS_ARRAY16,

  SPARC_INS_ARRAY32,

  SPARC_INS_ARRAY8,

  SPARC_INS_B,

  SPARC_INS_BMASK,

  SPARC_INS_FB,

  SPARC_INS_BR,

  SPARC_INS_BSHUFFLE,

  SPARC_INS_CALL,

  SPARC_INS_CASA,

  SPARC_INS_CASXA,

  SPARC_INS_CB,

  SPARC_INS_CMASK16,

  SPARC_INS_CMASK32,

  SPARC_INS_CMASK8,

  SPARC_INS_DONE,

  SPARC_INS_EDGE16,

  SPARC_INS_EDGE16L,

  SPARC_INS_EDGE16LN,

  SPARC_INS_EDGE16N,

  SPARC_INS_EDGE32,

  SPARC_INS_EDGE32L,

  SPARC_INS_EDGE32LN,

  SPARC_INS_EDGE32N,

  SPARC_INS_EDGE8,

  SPARC_INS_EDGE8L,

  SPARC_INS_EDGE8LN,

  SPARC_INS_EDGE8N,

  SPARC_INS_FABSD,

  SPARC_INS_FABSQ,

  SPARC_INS_FABSS,

  SPARC_INS_FADDD,

  SPARC_INS_FADDQ,

  SPARC_INS_FADDS,

  SPARC_INS_FALIGNDATA,

  SPARC_INS_FAND,

  SPARC_INS_FANDNOT1,

  SPARC_INS_FANDNOT1S,

  SPARC_INS_FANDNOT2,

  SPARC_INS_FANDNOT2S,

  SPARC_INS_FANDS,

  SPARC_INS_FCHKSM16,

  SPARC_INS_FCMPEQ16,

  SPARC_INS_FCMPEQ32,

  SPARC_INS_FCMPGT16,

  SPARC_INS_FCMPGT32,

  SPARC_INS_FCMPLE16,

  SPARC_INS_FCMPLE32,

  SPARC_INS_FCMPNE16,

  SPARC_INS_FCMPNE32,

  SPARC_INS_FDIVD,

  SPARC_INS_FDIVQ,

  SPARC_INS_FDIVS,

  SPARC_INS_FDMULQ,

  SPARC_INS_FDTOI,

  SPARC_INS_FDTOQ,

  SPARC_INS_FDTOS,

  SPARC_INS_FDTOX,

  SPARC_INS_FEXPAND,

  SPARC_INS_FHADDD,

  SPARC_INS_FHADDS,

  SPARC_INS_FHSUBD,

  SPARC_INS_FHSUBS,

  SPARC_INS_FITOD,

  SPARC_INS_FITOQ,

  SPARC_INS_FITOS,

  SPARC_INS_FLCMPD,

  SPARC_INS_FLCMPS,

  SPARC_INS_FLUSH,

  SPARC_INS_FLUSHW,

  SPARC_INS_FMEAN16,

  SPARC_INS_FMOVD,

  SPARC_INS_FMOVQ,

  SPARC_INS_FMOVRD,

  SPARC_INS_FMOVRQ,

  SPARC_INS_FMOVRS,

  SPARC_INS_FMOVS,

  SPARC_INS_FMUL8SUX16,

  SPARC_INS_FMUL8ULX16,

  SPARC_INS_FMUL8X16,

  SPARC_INS_FMUL8X16AL,

  SPARC_INS_FMUL8X16AU,

  SPARC_INS_FMULD,

  SPARC_INS_FMULD8SUX16,

  SPARC_INS_FMULD8ULX16,

  SPARC_INS_FMULQ,

  SPARC_INS_FMULS,

  SPARC_INS_FNADDD,

  SPARC_INS_FNADDS,

  SPARC_INS_FNAND,

  SPARC_INS_FNANDS,

  SPARC_INS_FNEGD,

  SPARC_INS_FNEGQ,

  SPARC_INS_FNEGS,

  SPARC_INS_FNHADDD,

  SPARC_INS_FNHADDS,

  SPARC_INS_FNMULD,

  SPARC_INS_FNMULS,

  SPARC_INS_FNOR,

  SPARC_INS_FNORS,

  SPARC_INS_FNOT1,

  SPARC_INS_FNOT1S,

  SPARC_INS_FNOT2,

  SPARC_INS_FNOT2S,

  SPARC_INS_FNSMULD,

  SPARC_INS_FONE,

  SPARC_INS_FONES,

  SPARC_INS_FOR,

  SPARC_INS_FORNOT1,

  SPARC_INS_FORNOT1S,

  SPARC_INS_FORNOT2,

  SPARC_INS_FORNOT2S,

  SPARC_INS_FORS,

  SPARC_INS_FPACK16,

  SPARC_INS_FPACK32,

  SPARC_INS_FPACKFIX,

  SPARC_INS_FPADD16,

  SPARC_INS_FPADD16S,

  SPARC_INS_FPADD32,

  SPARC_INS_FPADD32S,

  SPARC_INS_FPADD64,

  SPARC_INS_FPMERGE,

  SPARC_INS_FPSUB16,

  SPARC_INS_FPSUB16S,

  SPARC_INS_FPSUB32,

  SPARC_INS_FPSUB32S,

  SPARC_INS_FQTOD,

  SPARC_INS_FQTOI,

  SPARC_INS_FQTOS,

  SPARC_INS_FQTOX,

  SPARC_INS_FSLAS16,

  SPARC_INS_FSLAS32,

  SPARC_INS_FSLL16,

  SPARC_INS_FSLL32,

  SPARC_INS_FSMULD,

  SPARC_INS_FSQRTD,

  SPARC_INS_FSQRTQ,

  SPARC_INS_FSQRTS,

  SPARC_INS_FSRA16,

  SPARC_INS_FSRA32,

  SPARC_INS_FSRC1,

  SPARC_INS_FSRC1S,

  SPARC_INS_FSRC2,

  SPARC_INS_FSRC2S,

  SPARC_INS_FSRL16,

  SPARC_INS_FSRL32,

  SPARC_INS_FSTOD,

  SPARC_INS_FSTOI,

  SPARC_INS_FSTOQ,

  SPARC_INS_FSTOX,

  SPARC_INS_FSUBD,

  SPARC_INS_FSUBQ,

  SPARC_INS_FSUBS,

  SPARC_INS_FXNOR,

  SPARC_INS_FXNORS,

  SPARC_INS_FXOR,

  SPARC_INS_FXORS,

  SPARC_INS_FXTOD,

  SPARC_INS_FXTOQ,

  SPARC_INS_FXTOS,

  SPARC_INS_FZERO,

  SPARC_INS_FZEROS,

  SPARC_INS_LDX,

  SPARC_INS_LD,

  SPARC_INS_JMPL,

  SPARC_INS_LDA,

  SPARC_INS_LDDA,

  SPARC_INS_LDD,

  SPARC_INS_LDQA,

  SPARC_INS_LDQ,

  SPARC_INS_LDSBA,

  SPARC_INS_LDSB,

  SPARC_INS_LDSHA,

  SPARC_INS_LDSH,

  SPARC_INS_LDSTUBA,

  SPARC_INS_LDSTUB,

  SPARC_INS_LDSWA,

  SPARC_INS_LDSW,

  SPARC_INS_LDUBA,

  SPARC_INS_LDUB,

  SPARC_INS_LDUHA,

  SPARC_INS_LDUH,

  SPARC_INS_LDXA,

  SPARC_INS_LZCNT,

  SPARC_INS_MEMBAR,

  SPARC_INS_MOVDTOX,

  SPARC_INS_MOV,

  SPARC_INS_MOVR,

  SPARC_INS_MOVSTOSW,

  SPARC_INS_MOVSTOUW,

  SPARC_INS_MOVWTOS,

  SPARC_INS_MOVXTOD,

  SPARC_INS_MULSCC,

  SPARC_INS_MULX,

  SPARC_INS_NOP,

  SPARC_INS_ORCC,

  SPARC_INS_ORNCC,

  SPARC_INS_ORN,

  SPARC_INS_OR,

  SPARC_INS_PDIST,

  SPARC_INS_PDISTN,

  SPARC_INS_POPC,

  SPARC_INS_PREFETCH,

  SPARC_INS_PWR,

  SPARC_INS_RD,

  SPARC_INS_RDPR,

  SPARC_INS_RESTORED,

  SPARC_INS_RESTORE,

  SPARC_INS_RETRY,

  SPARC_INS_RETT,

  SPARC_INS_SAVED,

  SPARC_INS_SAVE,

  SPARC_INS_SDIVCC,

  SPARC_INS_SDIVX,

  SPARC_INS_SDIV,

  SPARC_INS_SETHI,

  SPARC_INS_SHUTDOWN,

  SPARC_INS_SIAM,

  SPARC_INS_SIR,

  SPARC_INS_SLLX,

  SPARC_INS_SLL,

  SPARC_INS_SMAC,

  SPARC_INS_SMULCC,

  SPARC_INS_SMUL,

  SPARC_INS_SRAX,

  SPARC_INS_SRA,

  SPARC_INS_SRLX,

  SPARC_INS_SRL,

  SPARC_INS_STA,

  SPARC_INS_STBAR,

  SPARC_INS_STBA,

  SPARC_INS_STB,

  SPARC_INS_ST,

  SPARC_INS_STDA,

  SPARC_INS_STD,

  SPARC_INS_STHA,

  SPARC_INS_STH,

  SPARC_INS_STQA,

  SPARC_INS_STQ,

  SPARC_INS_STXA,

  SPARC_INS_STX,

  SPARC_INS_SUBCC,

  SPARC_INS_SUBX,

  SPARC_INS_SUBXCC,

  SPARC_INS_SUB,

  SPARC_INS_SWAPA,

  SPARC_INS_SWAP,

  SPARC_INS_TA,

  SPARC_INS_TADDCCTV,

  SPARC_INS_TADDCC,

  SPARC_INS_T,

  SPARC_INS_TSUBCCTV,

  SPARC_INS_TSUBCC,

  SPARC_INS_UDIVCC,

  SPARC_INS_UDIVX,

  SPARC_INS_UDIV,

  SPARC_INS_UMAC,

  SPARC_INS_UMULCC,

  SPARC_INS_UMULXHI,

  SPARC_INS_UMUL,

  SPARC_INS_UNIMP,

  SPARC_INS_FCMPD,

  SPARC_INS_FCMPED,

  SPARC_INS_FCMPEQ,

  SPARC_INS_FCMPES,

  SPARC_INS_FCMPQ,

  SPARC_INS_FCMPS,

  SPARC_INS_WR,

  SPARC_INS_WRPR,

  SPARC_INS_XMULX,

  SPARC_INS_XMULXHI,

  SPARC_INS_XNORCC,

  SPARC_INS_XNOR,

  SPARC_INS_XORCC,

  SPARC_INS_XOR,

  // clang-format on

  // generated content <SparcGenCSInsnEnum.inc> end

  SPARC_INS_ENDING, // <-- mark the end of the list of instructions

  SPARC_INS_ALIAS_BEGIN,

  // generated content <SparcGenCSAliasEnum.inc> begin

  // clang-format off

  SPARC_INS_ALIAS_MOVA, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSA, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDA, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_MOVRZ, // Real instr.: SPARC_MOVRrr

  SPARC_INS_ALIAS_FMOVRSZ, // Real instr.: SPARC_FMOVRS

  SPARC_INS_ALIAS_FMOVRDZ, // Real instr.: SPARC_FMOVRD

  SPARC_INS_ALIAS_FMOVRQZ, // Real instr.: SPARC_FMOVRQ

  SPARC_INS_ALIAS_BA, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BA_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BA_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BA_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BA_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BA_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_FMOVQA, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TA, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_FBA, // Real instr.: SPARC_BPFCC

  SPARC_INS_ALIAS_FBA_PT, // Real instr.: SPARC_BPFCC

  SPARC_INS_ALIAS_FBA_A, // Real instr.: SPARC_BPFCCA

  SPARC_INS_ALIAS_FBA_A_PT, // Real instr.: SPARC_BPFCCA

  SPARC_INS_ALIAS_FBA_PN, // Real instr.: SPARC_BPFCCNT

  SPARC_INS_ALIAS_FBA_A_PN, // Real instr.: SPARC_BPFCCANT

  SPARC_INS_ALIAS_BRZ, // Real instr.: SPARC_BPR

  SPARC_INS_ALIAS_BRZ_PT, // Real instr.: SPARC_BPR

  SPARC_INS_ALIAS_BRZ_PN, // Real instr.: SPARC_BPRNT

  SPARC_INS_ALIAS_BRZ_A, // Real instr.: SPARC_BPRA

  SPARC_INS_ALIAS_BRZ_A_PT, // Real instr.: SPARC_BPRA

  SPARC_INS_ALIAS_BRZ_A_PN, // Real instr.: SPARC_BPRANT

  SPARC_INS_ALIAS_BN, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BN_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BN_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BN_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BN_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BN_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVN, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSN, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDN, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQN, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TN, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BNE, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BNE_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BNE_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BNE_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BNE_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BNE_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVNE, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSNE, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDNE, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQNE, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TNE, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BE, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BE_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BE_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BE_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BE_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BE_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVE, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSE, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDE, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQE, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TE, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BG, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BG_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BG_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BG_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BG_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BG_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVG, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSG, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDG, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQG, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TG, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BLE, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BLE_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BLE_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BLE_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BLE_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BLE_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVLE, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSLE, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDLE, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQLE, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TLE, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BGE, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BGE_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BGE_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BGE_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BGE_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BGE_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVGE, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSGE, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDGE, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQGE, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TGE, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BL, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BL_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BL_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BL_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BL_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BL_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVL, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSL, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDL, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQL, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TL, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BGU, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BGU_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BGU_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BGU_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BGU_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BGU_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVGU, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSGU, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDGU, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQGU, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TGU, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BLEU, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BLEU_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BLEU_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BLEU_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BLEU_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BLEU_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVLEU, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSLEU, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDLEU, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQLEU, // Real instr.: SPARC_FMOVQ_ICC

  SPARC_INS_ALIAS_TLEU, // Real instr.: SPARC_TICCrr

  SPARC_INS_ALIAS_BCC, // Real instr.: SPARC_BCOND

  SPARC_INS_ALIAS_BCC_A, // Real instr.: SPARC_BCONDA

  SPARC_INS_ALIAS_BCC_PT, // Real instr.: SPARC_BPICC

  SPARC_INS_ALIAS_BCC_A_PT, // Real instr.: SPARC_BPICCA

  SPARC_INS_ALIAS_BCC_PN, // Real instr.: SPARC_BPICCNT

  SPARC_INS_ALIAS_BCC_A_PN, // Real instr.: SPARC_BPICCANT

  SPARC_INS_ALIAS_MOVCC, // Real instr.: SPARC_MOVICCrr

  SPARC_INS_ALIAS_FMOVSCC, // Real instr.: SPARC_FMOVS_ICC

  SPARC_INS_ALIAS_FMOVDCC, // Real instr.: SPARC_FMOVD_ICC

  SPARC_INS_ALIAS_FMOVQCC, // Real instr.: SPARC_FMOVQ_ICC