/src/capstonenext/arch/ARC/ARCDisassembler.c

Source (jump to first uncovered line)
/* Capstone Disassembly Engine, http://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/*    Rot127 <unisono@quyllur.org> 2022-2023 */
/* Automatically translated source file from LLVM. */

/* LLVM-commit: <commit> */
/* LLVM-tag: <tag> */

/* Only small edits allowed. */
/* For multiple similar edits, please create a Patch for the translator. */

/* Capstone's C++ file translator: */
/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

//===- ARCDisassembler.cpp - Disassembler for ARC ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file is part of the ARC Disassembler.
///
//===----------------------------------------------------------------------===//

#ifdef CAPSTONE_HAS_ARC

#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <capstone/platform.h>

#include "../../MCInst.h"
#include "../../SStream.h"
#include "../../MCDisassembler.h"
#include "../../MCFixedLenDisassembler.h"
#include "../../MathExtras.h"
#include "../../utils.h"
#define CONCAT(a, b) CONCAT_(a, b)
#define CONCAT_(a, b) a##_##b

#define DEBUG_TYPE "arc-disassembler"

/// A disassembler class for ARC.
static DecodeStatus getInstruction(MCInst *Instr, uint64_t *Size,
           const uint8_t *Bytes, size_t BytesLen,
           uint64_t Address, SStream *CStream);

// end anonymous namespace

static bool readInstruction32(const uint8_t *Bytes, size_t BytesLen,
            uint64_t Address, uint64_t *Size, uint32_t *Insn)
{
  *Size = 4;
  // Read 2 16-bit values, but swap hi/lo parts.
  *Insn = (Bytes[0] << 16) | (Bytes[1] << 24) | (Bytes[2] << 0) |
    (Bytes[3] << 8);
  return true;
}

static bool readInstruction64(const uint8_t *Bytes, size_t BytesLen,
            uint64_t Address, uint64_t *Size, uint64_t *Insn)
{
  *Size = 8;
  *Insn = ((uint64_t)Bytes[0] << 16) | ((uint64_t)Bytes[1] << 24) |
    ((uint64_t)Bytes[2] << 0) | ((uint64_t)Bytes[3] << 8) |
    ((uint64_t)Bytes[4] << 48) | ((uint64_t)Bytes[5] << 56) |
    ((uint64_t)Bytes[6] << 32) | ((uint64_t)Bytes[7] << 40);
  return true;
}

static bool readInstruction48(const uint8_t *Bytes, size_t BytesLen,
            uint64_t Address, uint64_t *Size, uint64_t *Insn)
{
  *Size = 6;
  *Insn = ((uint64_t)Bytes[0] << 0) | ((uint64_t)Bytes[1] << 8) |
    ((uint64_t)Bytes[2] << 32) | ((uint64_t)Bytes[3] << 40) |
    ((uint64_t)Bytes[4] << 16) | ((uint64_t)Bytes[5] << 24);
  return true;
}

static bool readInstruction16(const uint8_t *Bytes, size_t BytesLen,
            uint64_t Address, uint64_t *Size, uint32_t *Insn)
{
  *Size = 2;
  *Insn = (Bytes[0] << 0) | (Bytes[1] << 8);
  return true;
}

#define DECLARE_DecodeSignedOperand(B) \
  static DecodeStatus CONCAT(DecodeSignedOperand, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder);
DECLARE_DecodeSignedOperand(11);
DECLARE_DecodeSignedOperand(9);
DECLARE_DecodeSignedOperand(10);
DECLARE_DecodeSignedOperand(12);

#define DECLARE_DecodeFromCyclicRange(B) \
  static DecodeStatus CONCAT(DecodeFromCyclicRange, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder);
DECLARE_DecodeFromCyclicRange(3);

#define DECLARE_DecodeBranchTargetS(B) \
  static DecodeStatus CONCAT(DecodeBranchTargetS, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder);
DECLARE_DecodeBranchTargetS(8);
DECLARE_DecodeBranchTargetS(10);
DECLARE_DecodeBranchTargetS(7);
DECLARE_DecodeBranchTargetS(13);
DECLARE_DecodeBranchTargetS(21);
DECLARE_DecodeBranchTargetS(25);
DECLARE_DecodeBranchTargetS(9);

static DecodeStatus DecodeMEMrs9(MCInst *, unsigned, uint64_t, const void *);

static DecodeStatus DecodeLdLImmInstruction(MCInst *, uint64_t, uint64_t,
              const void *);

static DecodeStatus DecodeStLImmInstruction(MCInst *, uint64_t, uint64_t,
              const void *);

static DecodeStatus DecodeLdRLImmInstruction(MCInst *, uint64_t, uint64_t,
               const void *);

static DecodeStatus DecodeSOPwithRS12(MCInst *, uint64_t, uint64_t,
              const void *);

static DecodeStatus DecodeSOPwithRU6(MCInst *, uint64_t, uint64_t,
             const void *);

static DecodeStatus DecodeCCRU6Instruction(MCInst *, uint64_t, uint64_t,
             const void *);

static DecodeStatus DecodeMoveHRegInstruction(MCInst *Inst, uint64_t, uint64_t,
                const void *);

#define GET_REGINFO_ENUM
#include "ARCGenRegisterInfo.inc"

static const uint16_t GPR32DecoderTable[] = {
  ARC_R0,  ARC_R1,    ARC_R2,  ARC_R3,   ARC_R4,  ARC_R5,  ARC_R6,
  ARC_R7,  ARC_R8,    ARC_R9,  ARC_R10,  ARC_R11, ARC_R12, ARC_R13,
  ARC_R14, ARC_R15,   ARC_R16, ARC_R17,  ARC_R18, ARC_R19, ARC_R20,
  ARC_R21, ARC_R22,   ARC_R23, ARC_R24,  ARC_R25, ARC_GP,  ARC_FP,
  ARC_SP,  ARC_ILINK, ARC_R30, ARC_BLINK
};

static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
               uint64_t Address,
               const void *Decoder)
{
  if (RegNo >= 32) {
    ;
    return MCDisassembler_Fail;
  }

  unsigned Reg = GPR32DecoderTable[RegNo];
  MCOperand_CreateReg0(Inst, (Reg));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeGBR32ShortRegister(MCInst *Inst, unsigned RegNo,
               uint64_t Address,
               const void *Decoder)
{
  // Enumerates registers from ranges [r0-r3],[r12-r15].
  if (RegNo > 3)
    RegNo += 8; // 4 for r12, etc...

  return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
}

#include "ARCGenDisassemblerTables.inc"

static unsigned decodeCField(unsigned Insn)
{
  return fieldFromInstruction_4(Insn, 6, 6);
}

static unsigned decodeBField(unsigned Insn)
{
  return (fieldFromInstruction_4(Insn, 12, 3) << 3) |
         fieldFromInstruction_4(Insn, 24, 3);
}

static unsigned decodeAField(unsigned Insn)
{
  return fieldFromInstruction_4(Insn, 0, 6);
}

static DecodeStatus DecodeMEMrs9(MCInst *Inst, unsigned Insn, uint64_t Address,
         const void *Decoder)
{
  // We have the 9-bit immediate in the low bits, 6-bit register in high bits.
  unsigned S9 = Insn & 0x1ff;
  unsigned R = (Insn & (0x7fff & ~0x1ff)) >> 9;
  if (DecodeGPR32RegisterClass(Inst, R, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }
  MCOperand_CreateImm0(Inst, (SignExtend32((S9), 9)));
  return MCDisassembler_Success;
}

static void DecodeSymbolicOperandOff(MCInst *Inst, uint64_t Address,
             uint64_t Offset, const void *Decoder)
{
  uint64_t NextAddress = Address + Offset;

  MCOperand_CreateImm0(Inst, (NextAddress));
}

#define DEFINE_DecodeBranchTargetS(B) \
  static DecodeStatus CONCAT(DecodeBranchTargetS, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder) \
  { \
    CS_ASSERT(B > 0 && "field is empty"); \
    DecodeSymbolicOperandOff(Inst, Address, \
           SignExtend32((InsnS), B), Decoder); \
    return MCDisassembler_Success; \
  }
DEFINE_DecodeBranchTargetS(8);
DEFINE_DecodeBranchTargetS(10);
DEFINE_DecodeBranchTargetS(7);
DEFINE_DecodeBranchTargetS(13);
DEFINE_DecodeBranchTargetS(21);
DEFINE_DecodeBranchTargetS(25);
DEFINE_DecodeBranchTargetS(9);

#define DEFINE_DecodeSignedOperand(B) \
  static DecodeStatus CONCAT(DecodeSignedOperand, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder) \
  { \
    CS_ASSERT(B > 0 && "field is empty"); \
    MCOperand_CreateImm0( \
      Inst, SignExtend32(maskTrailingOnes32(B) & InsnS, B)); \
    return MCDisassembler_Success; \
  }
DEFINE_DecodeSignedOperand(11);
DEFINE_DecodeSignedOperand(9);
DEFINE_DecodeSignedOperand(10);
DEFINE_DecodeSignedOperand(12);

#define DEFINE_DecodeFromCyclicRange(B) \
  static DecodeStatus CONCAT(DecodeFromCyclicRange, \
           B)(MCInst * Inst, unsigned InsnS, \
              uint64_t Address, const void *Decoder) \
  { \
    CS_ASSERT(B > 0 && "field is empty"); \
    const unsigned max = (1u << B) - 1; \
    MCOperand_CreateImm0(Inst, (InsnS < max ? (int)(InsnS) : -1)); \
    return MCDisassembler_Success; \
  }
DEFINE_DecodeFromCyclicRange(3);

static DecodeStatus DecodeStLImmInstruction(MCInst *Inst, uint64_t Insn,
              uint64_t Address,
              const void *Decoder)
{
  unsigned SrcC, DstB, LImm;
  DstB = decodeBField(Insn);
  if (DstB != 62) {
    return MCDisassembler_Fail;
  }
  SrcC = decodeCField(Insn);
  if (DecodeGPR32RegisterClass(Inst, SrcC, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }
  LImm = (Insn >> 32);
  MCOperand_CreateImm0(Inst, (LImm));
  MCOperand_CreateImm0(Inst, (0));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeLdLImmInstruction(MCInst *Inst, uint64_t Insn,
              uint64_t Address,
              const void *Decoder)
{
  unsigned DstA, SrcB, LImm;
  ;
  SrcB = decodeBField(Insn);
  if (SrcB != 62) {
    ;
    return MCDisassembler_Fail;
  }
  DstA = decodeAField(Insn);
  if (DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }
  LImm = (Insn >> 32);
  MCOperand_CreateImm0(Inst, (LImm));
  MCOperand_CreateImm0(Inst, (0));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeLdRLImmInstruction(MCInst *Inst, uint64_t Insn,
               uint64_t Address,
               const void *Decoder)
{
  unsigned DstA, SrcB;
  ;
  DstA = decodeAField(Insn);
  if (DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }
  SrcB = decodeBField(Insn);
  if (DecodeGPR32RegisterClass(Inst, SrcB, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }
  if (decodeCField(Insn) != 62) {
    ;
    return MCDisassembler_Fail;
  }
  MCOperand_CreateImm0(Inst, ((uint32_t)(Insn >> 32)));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeRegisterOrImm(MCInst *Inst, uint64_t Address,
          const void *Decoder, uint64_t RegNum,
          uint64_t Value)
{
  if (30 == RegNum) {
    MCOperand_CreateImm0(Inst, (Value));
    return MCDisassembler_Success;
  }
  return DecodeGPR32RegisterClass(Inst, RegNum, Address, Decoder);
}

static DecodeStatus DecodeMoveHRegInstruction(MCInst *Inst, uint64_t Insn,
                uint64_t Address,
                const void *Decoder)
{
  ;

  uint64_t H = fieldFromInstruction_8(Insn, 5, 3) |
         (fieldFromInstruction_8(Insn, 0, 2) << 3);
  uint64_t G = fieldFromInstruction_8(Insn, 8, 3) |
         (fieldFromInstruction_8(Insn, 3, 2) << 3);

  if (MCDisassembler_Success !=
      DecodeRegisterOrImm(Inst, Address, Decoder, G, 0))
    return MCDisassembler_Fail;

  return DecodeRegisterOrImm(Inst, Address, Decoder, H, Insn >> 16u);
}

static DecodeStatus DecodeCCRU6Instruction(MCInst *Inst, uint64_t Insn,
             uint64_t Address,
             const void *Decoder)
{
  unsigned DstB;
  ;
  DstB = decodeBField(Insn);
  if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }

  uint64_t U6Field = fieldFromInstruction_8(Insn, 6, 6);
  MCOperand_CreateImm0(Inst, (U6Field));
  uint64_t CCField = fieldFromInstruction_8(Insn, 0, 4);
  MCOperand_CreateImm0(Inst, (CCField));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeSOPwithRU6(MCInst *Inst, uint64_t Insn,
             uint64_t Address, const void *Decoder)
{
  unsigned DstB = decodeBField(Insn);
  if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }

  uint64_t U6 = fieldFromInstruction_8(Insn, 6, 6);
  MCOperand_CreateImm0(Inst, (U6));
  return MCDisassembler_Success;
}

static DecodeStatus DecodeSOPwithRS12(MCInst *Inst, uint64_t Insn,
              uint64_t Address, const void *Decoder)
{
  unsigned DstB = decodeBField(Insn);
  if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
      MCDisassembler_Fail) {
    return MCDisassembler_Fail;
  }

  uint64_t Lower = fieldFromInstruction_8(Insn, 6, 6);
  uint64_t Upper = fieldFromInstruction_8(Insn, 0, 5);
  uint64_t Sign = fieldFromInstruction_8(Insn, 5, 1) ? -1 : 1;
  uint64_t Result = Sign * ((Upper << 6) + Lower);
  MCOperand_CreateImm0(Inst, (Result));
  return MCDisassembler_Success;
}

static DecodeStatus getInstruction(MCInst *Instr, uint64_t *Size,
           const uint8_t *Bytes, size_t BytesLen,
           uint64_t Address, SStream *cStream)
{
  DecodeStatus Result;
  if (BytesLen < 2) {
    *Size = 0;
    return MCDisassembler_Fail;
  }
  uint8_t DecodeByte = (Bytes[1] & 0xF7) >> 3;
  // 0x00 -> 0x07 are 32-bit instructions.
  // 0x08 -> 0x1F are 16-bit instructions.
  if (DecodeByte < 0x08) {
    // 32-bit instruction.
    if (BytesLen < 4) {
      // Did we decode garbage?
      *Size = 0;
      return MCDisassembler_Fail;
    }
    if (BytesLen >= 8) {
      // Attempt to decode 64-bit instruction.
      uint64_t Insn64;
      if (!readInstruction64(Bytes, BytesLen, Address, Size,
                 &Insn64))
        return MCDisassembler_Fail;
      Result = decodeInstruction_8(DecoderTable64, Instr,
                 Insn64, Address, NULL);
      if (MCDisassembler_Success == Result) {
        ;
        return Result;
      };
    }
    uint32_t Insn32;
    if (!readInstruction32(Bytes, BytesLen, Address, Size,
               &Insn32)) {
      return MCDisassembler_Fail;
    }
    // Calling the auto-generated decoder function.
    return decodeInstruction_4(DecoderTable32, Instr, Insn32,
             Address, NULL);
  } else {
    if (BytesLen >= 6) {
      // Attempt to treat as instr. with limm data.
      uint64_t Insn48;
      if (!readInstruction48(Bytes, BytesLen, Address, Size,
                 &Insn48))
        return MCDisassembler_Fail;
      Result = decodeInstruction_8(DecoderTable48, Instr,
                 Insn48, Address, NULL);
      if (MCDisassembler_Success == Result) {
        ;
        return Result;
      };
    }

    uint32_t Insn16;
    if (!readInstruction16(Bytes, BytesLen, Address, Size, &Insn16))
      return MCDisassembler_Fail;

    // Calling the auto-generated decoder function.
    return decodeInstruction_2(DecoderTable16, Instr, Insn16,
             Address, NULL);
  }
}

DecodeStatus ARC_LLVM_getInstruction(MCInst *MI, uint64_t *Size,
             const uint8_t *Bytes, size_t BytesLen,
             uint64_t Address, SStream *CS)
{
  return getInstruction(MI, Size, Bytes, BytesLen, Address, CS);
}

#endif

Coverage Report

Created: 2025-08-28 06:43

Line	Count	Source (jump to first uncovered line)
1		/* Capstone Disassembly Engine, http://www.capstone-engine.org */
2		/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
3		/* Rot127 <unisono@quyllur.org> 2022-2023 */
4		/* Automatically translated source file from LLVM. */
5
6		/* LLVM-commit: <commit> */
7		/* LLVM-tag: <tag> */
8
9		/* Only small edits allowed. */
10		/* For multiple similar edits, please create a Patch for the translator. */
11
12		/* Capstone's C++ file translator: */
13		/* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
14
15		//===- ARCDisassembler.cpp - Disassembler for ARC ---------------- C++ --===//
16		//
17		// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
18		// See https://llvm.org/LICENSE.txt for license information.
19		// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
20		//
21		//===----------------------------------------------------------------------===//
22		///
23		/// \file
24		/// This file is part of the ARC Disassembler.
25		///
26		//===----------------------------------------------------------------------===//
27
28		#ifdef CAPSTONE_HAS_ARC
29
30		#include <stdio.h>
31		#include <string.h>
32		#include <stdlib.h>
33		#include <capstone/platform.h>
34
35		#include "../../MCInst.h"
36		#include "../../SStream.h"
37		#include "../../MCDisassembler.h"
38		#include "../../MCFixedLenDisassembler.h"
39		#include "../../MathExtras.h"
40		#include "../../utils.h"
41		#define CONCAT(a, b) CONCAT_(a, b)
42		#define CONCAT_(a, b) a##_##b
43
44		#define DEBUG_TYPE "arc-disassembler"
45
46		/// A disassembler class for ARC.
47		static DecodeStatus getInstruction(MCInst Instr, uint64_t Size,
48		const uint8_t *Bytes, size_t BytesLen,
49		uint64_t Address, SStream *CStream);
50
51		// end anonymous namespace
52
53		static bool readInstruction32(const uint8_t *Bytes, size_t BytesLen,
54		uint64_t Address, uint64_t Size, uint32_t Insn)
55	0	{
56	0	*Size = 4;
57		// Read 2 16-bit values, but swap hi/lo parts.
58	0	*Insn = (Bytes[0] << 16) \| (Bytes[1] << 24) \| (Bytes[2] << 0) \|
59	0	(Bytes[3] << 8);
60	0	return true;
61	0	}
62
63		static bool readInstruction64(const uint8_t *Bytes, size_t BytesLen,
64		uint64_t Address, uint64_t Size, uint64_t Insn)
65	0	{
66	0	*Size = 8;
67	0	*Insn = ((uint64_t)Bytes[0] << 16) \| ((uint64_t)Bytes[1] << 24) \|
68	0	((uint64_t)Bytes[2] << 0) \| ((uint64_t)Bytes[3] << 8) \|
69	0	((uint64_t)Bytes[4] << 48) \| ((uint64_t)Bytes[5] << 56) \|
70	0	((uint64_t)Bytes[6] << 32) \| ((uint64_t)Bytes[7] << 40);
71	0	return true;
72	0	}
73
74		static bool readInstruction48(const uint8_t *Bytes, size_t BytesLen,
75		uint64_t Address, uint64_t Size, uint64_t Insn)
76	0	{
77	0	*Size = 6;
78	0	*Insn = ((uint64_t)Bytes[0] << 0) \| ((uint64_t)Bytes[1] << 8) \|
79	0	((uint64_t)Bytes[2] << 32) \| ((uint64_t)Bytes[3] << 40) \|
80	0	((uint64_t)Bytes[4] << 16) \| ((uint64_t)Bytes[5] << 24);
81	0	return true;
82	0	}
83
84		static bool readInstruction16(const uint8_t *Bytes, size_t BytesLen,
85		uint64_t Address, uint64_t Size, uint32_t Insn)
86	0	{
87	0	*Size = 2;
88	0	*Insn = (Bytes[0] << 0) \| (Bytes[1] << 8);
89	0	return true;
90	0	}
91
92		#define DECLARE_DecodeSignedOperand(B) \
93		static DecodeStatus CONCAT(DecodeSignedOperand, \
94		B)(MCInst * Inst, unsigned InsnS, \
95		uint64_t Address, const void *Decoder);
96		DECLARE_DecodeSignedOperand(11);
97		DECLARE_DecodeSignedOperand(9);
98		DECLARE_DecodeSignedOperand(10);
99		DECLARE_DecodeSignedOperand(12);
100
101		#define DECLARE_DecodeFromCyclicRange(B) \
102		static DecodeStatus CONCAT(DecodeFromCyclicRange, \
103		B)(MCInst * Inst, unsigned InsnS, \
104		uint64_t Address, const void *Decoder);
105		DECLARE_DecodeFromCyclicRange(3);
106
107		#define DECLARE_DecodeBranchTargetS(B) \
108		static DecodeStatus CONCAT(DecodeBranchTargetS, \
109		B)(MCInst * Inst, unsigned InsnS, \
110		uint64_t Address, const void *Decoder);
111		DECLARE_DecodeBranchTargetS(8);
112		DECLARE_DecodeBranchTargetS(10);
113		DECLARE_DecodeBranchTargetS(7);
114		DECLARE_DecodeBranchTargetS(13);
115		DECLARE_DecodeBranchTargetS(21);
116		DECLARE_DecodeBranchTargetS(25);
117		DECLARE_DecodeBranchTargetS(9);
118
119		static DecodeStatus DecodeMEMrs9(MCInst , unsigned, uint64_t, const void );
120
121		static DecodeStatus DecodeLdLImmInstruction(MCInst *, uint64_t, uint64_t,
122		const void *);
123
124		static DecodeStatus DecodeStLImmInstruction(MCInst *, uint64_t, uint64_t,
125		const void *);
126
127		static DecodeStatus DecodeLdRLImmInstruction(MCInst *, uint64_t, uint64_t,
128		const void *);
129
130		static DecodeStatus DecodeSOPwithRS12(MCInst *, uint64_t, uint64_t,
131		const void *);
132
133		static DecodeStatus DecodeSOPwithRU6(MCInst *, uint64_t, uint64_t,
134		const void *);
135
136		static DecodeStatus DecodeCCRU6Instruction(MCInst *, uint64_t, uint64_t,
137		const void *);
138
139		static DecodeStatus DecodeMoveHRegInstruction(MCInst *Inst, uint64_t, uint64_t,
140		const void *);
141
142		#define GET_REGINFO_ENUM
143		#include "ARCGenRegisterInfo.inc"
144
145		static const uint16_t GPR32DecoderTable[] = {
146		ARC_R0, ARC_R1, ARC_R2, ARC_R3, ARC_R4, ARC_R5, ARC_R6,
147		ARC_R7, ARC_R8, ARC_R9, ARC_R10, ARC_R11, ARC_R12, ARC_R13,
148		ARC_R14, ARC_R15, ARC_R16, ARC_R17, ARC_R18, ARC_R19, ARC_R20,
149		ARC_R21, ARC_R22, ARC_R23, ARC_R24, ARC_R25, ARC_GP, ARC_FP,
150		ARC_SP, ARC_ILINK, ARC_R30, ARC_BLINK
151		};
152
153		static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
154		uint64_t Address,
155		const void *Decoder)
156	0	{
157	0	if (RegNo >= 32) {
158	0	;
159	0	return MCDisassembler_Fail;
160	0	}
161
162	0	unsigned Reg = GPR32DecoderTable[RegNo];
163	0	MCOperand_CreateReg0(Inst, (Reg));
164	0	return MCDisassembler_Success;
165	0	}
166
167		static DecodeStatus DecodeGBR32ShortRegister(MCInst *Inst, unsigned RegNo,
168		uint64_t Address,
169		const void *Decoder)
170	0	{
171		// Enumerates registers from ranges [r0-r3],[r12-r15].
172	0	if (RegNo > 3)
173	0	RegNo += 8; // 4 for r12, etc...
174
175	0	return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
176	0	}
177
178		#include "ARCGenDisassemblerTables.inc"
179
180		static unsigned decodeCField(unsigned Insn)
181	0	{
182	0	return fieldFromInstruction_4(Insn, 6, 6);
183	0	}
184
185		static unsigned decodeBField(unsigned Insn)
186	0	{
187	0	return (fieldFromInstruction_4(Insn, 12, 3) << 3) \|
188	0	fieldFromInstruction_4(Insn, 24, 3);
189	0	}
190
191		static unsigned decodeAField(unsigned Insn)
192	0	{
193	0	return fieldFromInstruction_4(Insn, 0, 6);
194	0	}
195
196		static DecodeStatus DecodeMEMrs9(MCInst *Inst, unsigned Insn, uint64_t Address,
197		const void *Decoder)
198	0	{
199		// We have the 9-bit immediate in the low bits, 6-bit register in high bits.
200	0	unsigned S9 = Insn & 0x1ff;
201	0	unsigned R = (Insn & (0x7fff & ~0x1ff)) >> 9;
202	0	if (DecodeGPR32RegisterClass(Inst, R, Address, Decoder) ==
203	0	MCDisassembler_Fail) {
204	0	return MCDisassembler_Fail;
205	0	}
206	0	MCOperand_CreateImm0(Inst, (SignExtend32((S9), 9)));
207	0	return MCDisassembler_Success;
208	0	}
209
210		static void DecodeSymbolicOperandOff(MCInst *Inst, uint64_t Address,
211		uint64_t Offset, const void *Decoder)
212	0	{
213	0	uint64_t NextAddress = Address + Offset;
214
215	0	MCOperand_CreateImm0(Inst, (NextAddress));
216	0	}
217
218		#define DEFINE_DecodeBranchTargetS(B) \
219		static DecodeStatus CONCAT(DecodeBranchTargetS, \
220		B)(MCInst * Inst, unsigned InsnS, \
221		uint64_t Address, const void *Decoder) \
222	0	{ \
223	0	CS_ASSERT(B > 0 && "field is empty"); \
224	0	DecodeSymbolicOperandOff(Inst, Address, \
225	0	SignExtend32((InsnS), B), Decoder); \
226	0	return MCDisassembler_Success; \
227	0	} Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_8 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_10 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_7 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_13 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_21 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_25 Unexecuted instantiation: ARCDisassembler.c:DecodeBranchTargetS_9
228		DEFINE_DecodeBranchTargetS(8);
229		DEFINE_DecodeBranchTargetS(10);
230		DEFINE_DecodeBranchTargetS(7);
231		DEFINE_DecodeBranchTargetS(13);
232		DEFINE_DecodeBranchTargetS(21);
233		DEFINE_DecodeBranchTargetS(25);
234		DEFINE_DecodeBranchTargetS(9);
235
236		#define DEFINE_DecodeSignedOperand(B) \
237		static DecodeStatus CONCAT(DecodeSignedOperand, \
238		B)(MCInst * Inst, unsigned InsnS, \
239		uint64_t Address, const void *Decoder) \
240	0	{ \
241	0	CS_ASSERT(B > 0 && "field is empty"); \
242	0	MCOperand_CreateImm0( \
243	0	Inst, SignExtend32(maskTrailingOnes32(B) & InsnS, B)); \
244	0	return MCDisassembler_Success; \
245	0	} Unexecuted instantiation: ARCDisassembler.c:DecodeSignedOperand_11 Unexecuted instantiation: ARCDisassembler.c:DecodeSignedOperand_9 Unexecuted instantiation: ARCDisassembler.c:DecodeSignedOperand_10 Unexecuted instantiation: ARCDisassembler.c:DecodeSignedOperand_12
246		DEFINE_DecodeSignedOperand(11);
247		DEFINE_DecodeSignedOperand(9);
248		DEFINE_DecodeSignedOperand(10);
249		DEFINE_DecodeSignedOperand(12);
250
251		#define DEFINE_DecodeFromCyclicRange(B) \
252		static DecodeStatus CONCAT(DecodeFromCyclicRange, \
253		B)(MCInst * Inst, unsigned InsnS, \
254		uint64_t Address, const void *Decoder) \
255	0	{ \
256	0	CS_ASSERT(B > 0 && "field is empty"); \
257	0	const unsigned max = (1u << B) - 1; \
258	0	MCOperand_CreateImm0(Inst, (InsnS < max ? (int)(InsnS) : -1)); \
259	0	return MCDisassembler_Success; \
260	0	}
261		DEFINE_DecodeFromCyclicRange(3);
262
263		static DecodeStatus DecodeStLImmInstruction(MCInst *Inst, uint64_t Insn,
264		uint64_t Address,
265		const void *Decoder)
266	0	{
267	0	unsigned SrcC, DstB, LImm;
268	0	DstB = decodeBField(Insn);
269	0	if (DstB != 62) {
270	0	return MCDisassembler_Fail;
271	0	}
272	0	SrcC = decodeCField(Insn);
273	0	if (DecodeGPR32RegisterClass(Inst, SrcC, Address, Decoder) ==
274	0	MCDisassembler_Fail) {
275	0	return MCDisassembler_Fail;
276	0	}
277	0	LImm = (Insn >> 32);
278	0	MCOperand_CreateImm0(Inst, (LImm));
279	0	MCOperand_CreateImm0(Inst, (0));
280	0	return MCDisassembler_Success;
281	0	}
282
283		static DecodeStatus DecodeLdLImmInstruction(MCInst *Inst, uint64_t Insn,
284		uint64_t Address,
285		const void *Decoder)
286	0	{
287	0	unsigned DstA, SrcB, LImm;
288	0	;
289	0	SrcB = decodeBField(Insn);
290	0	if (SrcB != 62) {
291	0	;
292	0	return MCDisassembler_Fail;
293	0	}
294	0	DstA = decodeAField(Insn);
295	0	if (DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder) ==
296	0	MCDisassembler_Fail) {
297	0	return MCDisassembler_Fail;
298	0	}
299	0	LImm = (Insn >> 32);
300	0	MCOperand_CreateImm0(Inst, (LImm));
301	0	MCOperand_CreateImm0(Inst, (0));
302	0	return MCDisassembler_Success;
303	0	}
304
305		static DecodeStatus DecodeLdRLImmInstruction(MCInst *Inst, uint64_t Insn,
306		uint64_t Address,
307		const void *Decoder)
308	0	{
309	0	unsigned DstA, SrcB;
310	0	;
311	0	DstA = decodeAField(Insn);
312	0	if (DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder) ==
313	0	MCDisassembler_Fail) {
314	0	return MCDisassembler_Fail;
315	0	}
316	0	SrcB = decodeBField(Insn);
317	0	if (DecodeGPR32RegisterClass(Inst, SrcB, Address, Decoder) ==
318	0	MCDisassembler_Fail) {
319	0	return MCDisassembler_Fail;
320	0	}
321	0	if (decodeCField(Insn) != 62) {
322	0	;
323	0	return MCDisassembler_Fail;
324	0	}
325	0	MCOperand_CreateImm0(Inst, ((uint32_t)(Insn >> 32)));
326	0	return MCDisassembler_Success;
327	0	}
328
329		static DecodeStatus DecodeRegisterOrImm(MCInst *Inst, uint64_t Address,
330		const void *Decoder, uint64_t RegNum,
331		uint64_t Value)
332	0	{
333	0	if (30 == RegNum) {
334	0	MCOperand_CreateImm0(Inst, (Value));
335	0	return MCDisassembler_Success;
336	0	}
337	0	return DecodeGPR32RegisterClass(Inst, RegNum, Address, Decoder);
338	0	}
339
340		static DecodeStatus DecodeMoveHRegInstruction(MCInst *Inst, uint64_t Insn,
341		uint64_t Address,
342		const void *Decoder)
343	0	{
344	0	;
345
346	0	uint64_t H = fieldFromInstruction_8(Insn, 5, 3) \|
347	0	(fieldFromInstruction_8(Insn, 0, 2) << 3);
348	0	uint64_t G = fieldFromInstruction_8(Insn, 8, 3) \|
349	0	(fieldFromInstruction_8(Insn, 3, 2) << 3);
350
351	0	if (MCDisassembler_Success !=
352	0	DecodeRegisterOrImm(Inst, Address, Decoder, G, 0))
353	0	return MCDisassembler_Fail;
354
355	0	return DecodeRegisterOrImm(Inst, Address, Decoder, H, Insn >> 16u);
356	0	}
357
358		static DecodeStatus DecodeCCRU6Instruction(MCInst *Inst, uint64_t Insn,
359		uint64_t Address,
360		const void *Decoder)
361	0	{
362	0	unsigned DstB;
363	0	;
364	0	DstB = decodeBField(Insn);
365	0	if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
366	0	MCDisassembler_Fail) {
367	0	return MCDisassembler_Fail;
368	0	}
369
370	0	uint64_t U6Field = fieldFromInstruction_8(Insn, 6, 6);
371	0	MCOperand_CreateImm0(Inst, (U6Field));
372	0	uint64_t CCField = fieldFromInstruction_8(Insn, 0, 4);
373	0	MCOperand_CreateImm0(Inst, (CCField));
374	0	return MCDisassembler_Success;
375	0	}
376
377		static DecodeStatus DecodeSOPwithRU6(MCInst *Inst, uint64_t Insn,
378		uint64_t Address, const void *Decoder)
379	0	{
380	0	unsigned DstB = decodeBField(Insn);
381	0	if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
382	0	MCDisassembler_Fail) {
383	0	return MCDisassembler_Fail;
384	0	}
385
386	0	uint64_t U6 = fieldFromInstruction_8(Insn, 6, 6);
387	0	MCOperand_CreateImm0(Inst, (U6));
388	0	return MCDisassembler_Success;
389	0	}
390
391		static DecodeStatus DecodeSOPwithRS12(MCInst *Inst, uint64_t Insn,
392		uint64_t Address, const void *Decoder)
393	0	{
394	0	unsigned DstB = decodeBField(Insn);
395	0	if (DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder) ==
396	0	MCDisassembler_Fail) {
397	0	return MCDisassembler_Fail;
398	0	}
399
400	0	uint64_t Lower = fieldFromInstruction_8(Insn, 6, 6);
401	0	uint64_t Upper = fieldFromInstruction_8(Insn, 0, 5);
402	0	uint64_t Sign = fieldFromInstruction_8(Insn, 5, 1) ? -1 : 1;
403	0	uint64_t Result = Sign * ((Upper << 6) + Lower);
404	0	MCOperand_CreateImm0(Inst, (Result));
405	0	return MCDisassembler_Success;
406	0	}
407
408		static DecodeStatus getInstruction(MCInst Instr, uint64_t Size,
409		const uint8_t *Bytes, size_t BytesLen,
410		uint64_t Address, SStream *cStream)
411	0	{
412	0	DecodeStatus Result;
413	0	if (BytesLen < 2) {
414	0	*Size = 0;
415	0	return MCDisassembler_Fail;
416	0	}
417	0	uint8_t DecodeByte = (Bytes[1] & 0xF7) >> 3;
418		// 0x00 -> 0x07 are 32-bit instructions.
419		// 0x08 -> 0x1F are 16-bit instructions.
420	0	if (DecodeByte < 0x08) {
421		// 32-bit instruction.
422	0	if (BytesLen < 4) {
423		// Did we decode garbage?
424	0	*Size = 0;
425	0	return MCDisassembler_Fail;
426	0	}
427	0	if (BytesLen >= 8) {
428		// Attempt to decode 64-bit instruction.
429	0	uint64_t Insn64;
430	0	if (!readInstruction64(Bytes, BytesLen, Address, Size,
431	0	&Insn64))
432	0	return MCDisassembler_Fail;
433	0	Result = decodeInstruction_8(DecoderTable64, Instr,
434	0	Insn64, Address, NULL);
435	0	if (MCDisassembler_Success == Result) {
436	0	;
437	0	return Result;
438	0	};
439	0	}
440	0	uint32_t Insn32;
441	0	if (!readInstruction32(Bytes, BytesLen, Address, Size,
442	0	&Insn32)) {
443	0	return MCDisassembler_Fail;
444	0	}
445		// Calling the auto-generated decoder function.
446	0	return decodeInstruction_4(DecoderTable32, Instr, Insn32,
447	0	Address, NULL);
448	0	} else {
449	0	if (BytesLen >= 6) {
450		// Attempt to treat as instr. with limm data.
451	0	uint64_t Insn48;
452	0	if (!readInstruction48(Bytes, BytesLen, Address, Size,
453	0	&Insn48))
454	0	return MCDisassembler_Fail;
455	0	Result = decodeInstruction_8(DecoderTable48, Instr,
456	0	Insn48, Address, NULL);
457	0	if (MCDisassembler_Success == Result) {
458	0	;
459	0	return Result;
460	0	};
461	0	}
462
463	0	uint32_t Insn16;
464	0	if (!readInstruction16(Bytes, BytesLen, Address, Size, &Insn16))
465	0	return MCDisassembler_Fail;
466
467		// Calling the auto-generated decoder function.
468	0	return decodeInstruction_2(DecoderTable16, Instr, Insn16,
469	0	Address, NULL);
470	0	}
471	0	}
472
473		DecodeStatus ARC_LLVM_getInstruction(MCInst MI, uint64_t Size,
474		const uint8_t *Bytes, size_t BytesLen,
475		uint64_t Address, SStream *CS)
476	0	{
477	0	return getInstruction(MI, Size, Bytes, BytesLen, Address, CS);
478	0	}
479
480		#endif