Coverage Report

Created: 2025-08-29 06:29

/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Source (jump to first uncovered line)
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//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
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// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
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#include <stdlib.h>
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#endif
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#include <string.h>
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#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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#ifndef CAPSTONE_X86_REDUCE
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void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
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14.9k
{
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14.9k
  uint8_t Imm =
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14.9k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
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14.9k
  switch (Imm) {
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0
  default:
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0
    break; //printf("Invalid avxcc argument!\n"); break;
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6.72k
  case 0:
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6.72k
    SStream_concat0(O, "eq");
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6.72k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
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6.72k
    break;
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1.01k
  case 1:
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1.01k
    SStream_concat0(O, "lt");
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1.01k
    op_addAvxCC(MI, X86_AVX_CC_LT);
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1.01k
    break;
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509
  case 2:
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509
    SStream_concat0(O, "le");
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509
    op_addAvxCC(MI, X86_AVX_CC_LE);
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509
    break;
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559
  case 3:
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559
    SStream_concat0(O, "unord");
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559
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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559
    break;
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158
  case 4:
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158
    SStream_concat0(O, "neq");
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158
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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158
    break;
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36
  case 5:
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36
    SStream_concat0(O, "nlt");
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36
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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36
    break;
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458
  case 6:
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458
    SStream_concat0(O, "nle");
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458
    op_addAvxCC(MI, X86_AVX_CC_NLE);
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458
    break;
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158
  case 7:
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158
    SStream_concat0(O, "ord");
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158
    op_addAvxCC(MI, X86_AVX_CC_ORD);
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158
    break;
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153
  case 8:
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153
    SStream_concat0(O, "eq_uq");
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153
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
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153
    break;
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181
  case 9:
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181
    SStream_concat0(O, "nge");
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181
    op_addAvxCC(MI, X86_AVX_CC_NGE);
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181
    break;
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261
  case 0xa:
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261
    SStream_concat0(O, "ngt");
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261
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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261
    break;
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256
  case 0xb:
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256
    SStream_concat0(O, "false");
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    op_addAvxCC(MI, X86_AVX_CC_FALSE);
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256
    break;
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42
  case 0xc:
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42
    SStream_concat0(O, "neq_oq");
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42
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
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42
    break;
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161
  case 0xd:
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161
    SStream_concat0(O, "ge");
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161
    op_addAvxCC(MI, X86_AVX_CC_GE);
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161
    break;
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35
  case 0xe:
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35
    SStream_concat0(O, "gt");
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35
    op_addAvxCC(MI, X86_AVX_CC_GT);
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35
    break;
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244
  case 0xf:
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244
    SStream_concat0(O, "true");
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244
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
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244
    break;
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180
  case 0x10:
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180
    SStream_concat0(O, "eq_os");
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180
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
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180
    break;
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207
  case 0x11:
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207
    SStream_concat0(O, "lt_oq");
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207
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
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207
    break;
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216
  case 0x12:
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216
    SStream_concat0(O, "le_oq");
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216
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
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216
    break;
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275
  case 0x13:
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    SStream_concat0(O, "unord_s");
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275
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
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275
    break;
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93
  case 0x14:
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    SStream_concat0(O, "neq_us");
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    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
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93
    break;
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280
  case 0x15:
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    SStream_concat0(O, "nlt_uq");
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280
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
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280
    break;
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402
  case 0x16:
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402
    SStream_concat0(O, "nle_uq");
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402
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
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402
    break;
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101
  case 0x17:
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101
    SStream_concat0(O, "ord_s");
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101
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
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101
    break;
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92
  case 0x18:
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92
    SStream_concat0(O, "eq_us");
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92
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
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92
    break;
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286
  case 0x19:
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286
    SStream_concat0(O, "nge_uq");
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286
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
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286
    break;
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261
  case 0x1a:
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261
    SStream_concat0(O, "ngt_uq");
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261
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
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261
    break;
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555
  case 0x1b:
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555
    SStream_concat0(O, "false_os");
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555
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
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555
    break;
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682
  case 0x1c:
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682
    SStream_concat0(O, "neq_os");
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682
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
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682
    break;
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327
  case 0x1d:
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327
    SStream_concat0(O, "ge_oq");
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327
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
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327
    break;
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25
  case 0x1e:
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25
    SStream_concat0(O, "gt_oq");
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25
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
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25
    break;
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58
  case 0x1f:
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58
    SStream_concat0(O, "true_us");
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58
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
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58
    break;
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14.9k
  }
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14.9k
  MI->popcode_adjust = Imm + 1;
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14.9k
}
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void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
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2.24k
{
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2.24k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
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2.24k
  switch (Imm) {
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0
  default: // llvm_unreachable("Invalid xopcc argument!");
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752
  case 0:
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752
    SStream_concat0(O, "lt");
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752
    op_addXopCC(MI, X86_XOP_CC_LT);
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752
    break;
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302
  case 1:
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302
    SStream_concat0(O, "le");
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302
    op_addXopCC(MI, X86_XOP_CC_LE);
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302
    break;
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278
  case 2:
203
278
    SStream_concat0(O, "gt");
204
278
    op_addXopCC(MI, X86_XOP_CC_GT);
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278
    break;
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501
  case 3:
207
501
    SStream_concat0(O, "ge");
208
501
    op_addXopCC(MI, X86_XOP_CC_GE);
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501
    break;
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65
  case 4:
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65
    SStream_concat0(O, "eq");
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65
    op_addXopCC(MI, X86_XOP_CC_EQ);
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65
    break;
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221
  case 5:
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221
    SStream_concat0(O, "neq");
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221
    op_addXopCC(MI, X86_XOP_CC_NEQ);
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221
    break;
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68
  case 6:
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68
    SStream_concat0(O, "false");
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68
    op_addXopCC(MI, X86_XOP_CC_FALSE);
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68
    break;
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58
  case 7:
223
58
    SStream_concat0(O, "true");
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58
    op_addXopCC(MI, X86_XOP_CC_TRUE);
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58
    break;
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2.24k
  }
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2.24k
}
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229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
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2.87k
{
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2.87k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
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2.87k
  switch (Imm) {
233
1.07k
  case 0:
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1.07k
    SStream_concat0(O, "{rn-sae}");
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1.07k
    op_addAvxSae(MI);
236
1.07k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
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1.07k
    break;
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388
  case 1:
239
388
    SStream_concat0(O, "{rd-sae}");
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388
    op_addAvxSae(MI);
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388
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
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388
    break;
243
876
  case 2:
244
876
    SStream_concat0(O, "{ru-sae}");
245
876
    op_addAvxSae(MI);
246
876
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
876
    break;
248
535
  case 3:
249
535
    SStream_concat0(O, "{rz-sae}");
250
535
    op_addAvxSae(MI);
251
535
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
535
    break;
253
0
  default:
254
0
    break; // never reach
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2.87k
  }
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2.87k
}
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#endif