Coverage Report

Created: 2025-10-10 06:20

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
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//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
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// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
35
#include <stdlib.h>
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#endif
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38
#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
9.86k
{
50
9.86k
  uint8_t Imm =
51
9.86k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
9.86k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
4.26k
  case 0:
56
4.26k
    SStream_concat0(O, "eq");
57
4.26k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
4.26k
    break;
59
727
  case 1:
60
727
    SStream_concat0(O, "lt");
61
727
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
727
    break;
63
219
  case 2:
64
219
    SStream_concat0(O, "le");
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219
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
219
    break;
67
423
  case 3:
68
423
    SStream_concat0(O, "unord");
69
423
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
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423
    break;
71
251
  case 4:
72
251
    SStream_concat0(O, "neq");
73
251
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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251
    break;
75
26
  case 5:
76
26
    SStream_concat0(O, "nlt");
77
26
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
26
    break;
79
323
  case 6:
80
323
    SStream_concat0(O, "nle");
81
323
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
323
    break;
83
102
  case 7:
84
102
    SStream_concat0(O, "ord");
85
102
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
102
    break;
87
220
  case 8:
88
220
    SStream_concat0(O, "eq_uq");
89
220
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
220
    break;
91
121
  case 9:
92
121
    SStream_concat0(O, "nge");
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121
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
121
    break;
95
59
  case 0xa:
96
59
    SStream_concat0(O, "ngt");
97
59
    op_addAvxCC(MI, X86_AVX_CC_NGT);
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59
    break;
99
108
  case 0xb:
100
108
    SStream_concat0(O, "false");
101
108
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
108
    break;
103
125
  case 0xc:
104
125
    SStream_concat0(O, "neq_oq");
105
125
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
125
    break;
107
57
  case 0xd:
108
57
    SStream_concat0(O, "ge");
109
57
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
57
    break;
111
92
  case 0xe:
112
92
    SStream_concat0(O, "gt");
113
92
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
92
    break;
115
71
  case 0xf:
116
71
    SStream_concat0(O, "true");
117
71
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
71
    break;
119
82
  case 0x10:
120
82
    SStream_concat0(O, "eq_os");
121
82
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
82
    break;
123
140
  case 0x11:
124
140
    SStream_concat0(O, "lt_oq");
125
140
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
140
    break;
127
161
  case 0x12:
128
161
    SStream_concat0(O, "le_oq");
129
161
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
161
    break;
131
148
  case 0x13:
132
148
    SStream_concat0(O, "unord_s");
133
148
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
148
    break;
135
85
  case 0x14:
136
85
    SStream_concat0(O, "neq_us");
137
85
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
85
    break;
139
350
  case 0x15:
140
350
    SStream_concat0(O, "nlt_uq");
141
350
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
350
    break;
143
180
  case 0x16:
144
180
    SStream_concat0(O, "nle_uq");
145
180
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
180
    break;
147
429
  case 0x17:
148
429
    SStream_concat0(O, "ord_s");
149
429
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
429
    break;
151
173
  case 0x18:
152
173
    SStream_concat0(O, "eq_us");
153
173
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
173
    break;
155
99
  case 0x19:
156
99
    SStream_concat0(O, "nge_uq");
157
99
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
99
    break;
159
76
  case 0x1a:
160
76
    SStream_concat0(O, "ngt_uq");
161
76
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
76
    break;
163
264
  case 0x1b:
164
264
    SStream_concat0(O, "false_os");
165
264
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
264
    break;
167
335
  case 0x1c:
168
335
    SStream_concat0(O, "neq_os");
169
335
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
335
    break;
171
77
  case 0x1d:
172
77
    SStream_concat0(O, "ge_oq");
173
77
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
77
    break;
175
28
  case 0x1e:
176
28
    SStream_concat0(O, "gt_oq");
177
28
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
28
    break;
179
46
  case 0x1f:
180
46
    SStream_concat0(O, "true_us");
181
46
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
46
    break;
183
9.86k
  }
184
185
9.86k
  MI->popcode_adjust = Imm + 1;
186
9.86k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.53k
{
190
1.53k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.53k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
370
  case 0:
195
370
    SStream_concat0(O, "lt");
196
370
    op_addXopCC(MI, X86_XOP_CC_LT);
197
370
    break;
198
297
  case 1:
199
297
    SStream_concat0(O, "le");
200
297
    op_addXopCC(MI, X86_XOP_CC_LE);
201
297
    break;
202
132
  case 2:
203
132
    SStream_concat0(O, "gt");
204
132
    op_addXopCC(MI, X86_XOP_CC_GT);
205
132
    break;
206
335
  case 3:
207
335
    SStream_concat0(O, "ge");
208
335
    op_addXopCC(MI, X86_XOP_CC_GE);
209
335
    break;
210
88
  case 4:
211
88
    SStream_concat0(O, "eq");
212
88
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
88
    break;
214
179
  case 5:
215
179
    SStream_concat0(O, "neq");
216
179
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
179
    break;
218
103
  case 6:
219
103
    SStream_concat0(O, "false");
220
103
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
103
    break;
222
32
  case 7:
223
32
    SStream_concat0(O, "true");
224
32
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
32
    break;
226
1.53k
  }
227
1.53k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
1.28k
{
231
1.28k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
1.28k
  switch (Imm) {
233
702
  case 0:
234
702
    SStream_concat0(O, "{rn-sae}");
235
702
    op_addAvxSae(MI);
236
702
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
702
    break;
238
208
  case 1:
239
208
    SStream_concat0(O, "{rd-sae}");
240
208
    op_addAvxSae(MI);
241
208
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
208
    break;
243
142
  case 2:
244
142
    SStream_concat0(O, "{ru-sae}");
245
142
    op_addAvxSae(MI);
246
142
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
142
    break;
248
230
  case 3:
249
230
    SStream_concat0(O, "{rz-sae}");
250
230
    op_addAvxSae(MI);
251
230
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
230
    break;
253
0
  default:
254
0
    break; // never reach
255
1.28k
  }
256
1.28k
}
257
#endif