/src/capstonenext/arch/ARC/ARCGenAsmWriter.inc
Line  | Count  | Source  | 
1  |  | /* Capstone Disassembly Engine, https://www.capstone-engine.org */  | 
2  |  | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */  | 
3  |  | /*    Rot127 <unisono@quyllur.org> 2022-2024 */  | 
4  |  | /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */  | 
5  |  |  | 
6  |  | /* LLVM-commit: <commit> */  | 
7  |  | /* LLVM-tag: <tag> */  | 
8  |  |  | 
9  |  | /* Do not edit. */  | 
10  |  |  | 
11  |  | /* Capstone's LLVM TableGen Backends: */  | 
12  |  | /* https://github.com/capstone-engine/llvm-capstone */  | 
13  |  |  | 
14  |  | #include <capstone/platform.h>  | 
15  |  | #include "../../cs_priv.h"  | 
16  |  |  | 
17  |  | /// getMnemonic - This method is automatically generated by tablegen  | 
18  |  | /// from the instruction set description.  | 
19  | 0  | static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { | 
20  | 0  | #ifndef CAPSTONE_DIET  | 
21  | 0  |   static const char AsmStrs[] = { | 
22  | 0  |   /* 0 */ "sub1\t\0"  | 
23  | 0  |   /* 6 */ "sub2\t\0"  | 
24  | 0  |   /* 12 */ "sub3\t\0"  | 
25  | 0  |   /* 18 */ "ldb.ab\t\0"  | 
26  | 0  |   /* 26 */ "stb.ab\t\0"  | 
27  | 0  |   /* 34 */ "ld.ab\t\0"  | 
28  | 0  |   /* 41 */ "ldh.ab\t\0"  | 
29  | 0  |   /* 49 */ "sth.ab\t\0"  | 
30  | 0  |   /* 57 */ "ldb.di.ab\t\0"  | 
31  | 0  |   /* 68 */ "stb.di.ab\t\0"  | 
32  | 0  |   /* 79 */ "ld.di.ab\t\0"  | 
33  | 0  |   /* 89 */ "ldh.di.ab\t\0"  | 
34  | 0  |   /* 100 */ "sth.di.ab\t\0"  | 
35  | 0  |   /* 111 */ "st.di.ab\t\0"  | 
36  | 0  |   /* 121 */ "ldb.x.di.ab\t\0"  | 
37  | 0  |   /* 134 */ "ldh.x.di.ab\t\0"  | 
38  | 0  |   /* 147 */ "st.ab\t\0"  | 
39  | 0  |   /* 154 */ "ldb.x.ab\t\0"  | 
40  | 0  |   /* 164 */ "ldh.x.ab\t\0"  | 
41  | 0  |   /* 174 */ "ldb\t\0"  | 
42  | 0  |   /* 179 */ "stb\t\0"  | 
43  | 0  |   /* 184 */ "rsub\t\0"  | 
44  | 0  |   /* 190 */ "sexb\t\0"  | 
45  | 0  |   /* 196 */ "sbc\t\0"  | 
46  | 0  |   /* 201 */ "adc\t\0"  | 
47  | 0  |   /* 206 */ "add\t\0"  | 
48  | 0  |   /* 211 */ "ld\t\0"  | 
49  | 0  |   /* 215 */ "and\t\0"  | 
50  | 0  |   /* 220 */ "sub_s.ne\t\0"  | 
51  | 0  |   /* 230 */ "mov_s.ne\t\0"  | 
52  | 0  |   /* 240 */ "sub1.f\t\0"  | 
53  | 0  |   /* 248 */ "sub2.f\t\0"  | 
54  | 0  |   /* 256 */ "sub3.f\t\0"  | 
55  | 0  |   /* 264 */ "rsub.f\t\0"  | 
56  | 0  |   /* 272 */ "sexb.f\t\0"  | 
57  | 0  |   /* 280 */ "sbc.f\t\0"  | 
58  | 0  |   /* 287 */ "adc.f\t\0"  | 
59  | 0  |   /* 294 */ "add.f\t\0"  | 
60  | 0  |   /* 301 */ "and.f\t\0"  | 
61  | 0  |   /* 308 */ "normh.f\t\0"  | 
62  | 0  |   /* 317 */ "sexh.f\t\0"  | 
63  | 0  |   /* 325 */ "asl.f\t\0"  | 
64  | 0  |   /* 332 */ "norm.f\t\0"  | 
65  | 0  |   /* 340 */ "mpym.f\t\0"  | 
66  | 0  |   /* 348 */ "min.f\t\0"  | 
67  | 0  |   /* 355 */ "seteq.f\t\0"  | 
68  | 0  |   /* 364 */ "ror.f\t\0"  | 
69  | 0  |   /* 371 */ "xor.f\t\0"  | 
70  | 0  |   /* 378 */ "asr.f\t\0"  | 
71  | 0  |   /* 385 */ "lsr.f\t\0"  | 
72  | 0  |   /* 392 */ "ffs.f\t\0"  | 
73  | 0  |   /* 399 */ "fls.f\t\0"  | 
74  | 0  |   /* 406 */ "mpymu.f\t\0"  | 
75  | 0  |   /* 415 */ "mov.f\t\0"  | 
76  | 0  |   /* 422 */ "max.f\t\0"  | 
77  | 0  |   /* 429 */ "mpy.f\t\0"  | 
78  | 0  |   /* 436 */ "ldh\t\0"  | 
79  | 0  |   /* 441 */ "normh\t\0"  | 
80  | 0  |   /* 448 */ "sth\t\0"  | 
81  | 0  |   /* 453 */ "sexh\t\0"  | 
82  | 0  |   /* 459 */ "ldb.di\t\0"  | 
83  | 0  |   /* 467 */ "stb.di\t\0"  | 
84  | 0  |   /* 475 */ "ld.di\t\0"  | 
85  | 0  |   /* 482 */ "ldh.di\t\0"  | 
86  | 0  |   /* 490 */ "sth.di\t\0"  | 
87  | 0  |   /* 498 */ "st.di\t\0"  | 
88  | 0  |   /* 505 */ "ldb.x.di\t\0"  | 
89  | 0  |   /* 515 */ "ldh.x.di\t\0"  | 
90  | 0  |   /* 525 */ "j\t\0"  | 
91  | 0  |   /* 528 */ "bl\t\0"  | 
92  | 0  |   /* 532 */ "jl\t\0"  | 
93  | 0  |   /* 536 */ "asl\t\0"  | 
94  | 0  |   /* 541 */ "norm\t\0"  | 
95  | 0  |   /* 547 */ "mpym\t\0"  | 
96  | 0  |   /* 553 */ "min\t\0"  | 
97  | 0  |   /* 558 */ "cmp\t\0"  | 
98  | 0  |   /* 563 */ "seteq\t\0"  | 
99  | 0  |   /* 570 */ "lr\t\0"  | 
100  | 0  |   /* 574 */ "ror\t\0"  | 
101  | 0  |   /* 579 */ "xor\t\0"  | 
102  | 0  |   /* 584 */ "asr\t\0"  | 
103  | 0  |   /* 589 */ "lsr\t\0"  | 
104  | 0  |   /* 594 */ "add1_s\t\0"  | 
105  | 0  |   /* 602 */ "add2_s\t\0"  | 
106  | 0  |   /* 610 */ "add3_s\t\0"  | 
107  | 0  |   /* 618 */ "ldb_s\t\0"  | 
108  | 0  |   /* 625 */ "stb_s\t\0"  | 
109  | 0  |   /* 632 */ "extb_s\t\0"  | 
110  | 0  |   /* 640 */ "sub_s\t\0"  | 
111  | 0  |   /* 647 */ "sexb_s\t\0"  | 
112  | 0  |   /* 655 */ "bic_s\t\0"  | 
113  | 0  |   /* 662 */ "add_s\t\0"  | 
114  | 0  |   /* 669 */ "ld_s\t\0"  | 
115  | 0  |   /* 675 */ "and_s\t\0"  | 
116  | 0  |   /* 682 */ "bge_s\t\0"  | 
117  | 0  |   /* 689 */ "ble_s\t\0"  | 
118  | 0  |   /* 696 */ "bne_s\t\0"  | 
119  | 0  |   /* 703 */ "brne_s\t\0"  | 
120  | 0  |   /* 711 */ "leave_s\t\0"  | 
121  | 0  |   /* 720 */ "neg_s\t\0"  | 
122  | 0  |   /* 727 */ "ldh_s\t\0"  | 
123  | 0  |   /* 734 */ "push_s\t\0"  | 
124  | 0  |   /* 742 */ "sth_s\t\0"  | 
125  | 0  |   /* 749 */ "exth_s\t\0"  | 
126  | 0  |   /* 757 */ "sexh_s\t\0"  | 
127  | 0  |   /* 765 */ "ldi_s\t\0"  | 
128  | 0  |   /* 772 */ "ei_s\t\0"  | 
129  | 0  |   /* 778 */ "bhi_s\t\0"  | 
130  | 0  |   /* 785 */ "jli_s\t\0"  | 
131  | 0  |   /* 792 */ "bmsk_s\t\0"  | 
132  | 0  |   /* 800 */ "bl_s\t\0"  | 
133  | 0  |   /* 806 */ "asl_s\t\0"  | 
134  | 0  |   /* 813 */ "blo_s\t\0"  | 
135  | 0  |   /* 820 */ "trap_s\t\0"  | 
136  | 0  |   /* 828 */ "cmp_s\t\0"  | 
137  | 0  |   /* 835 */ "pop_s\t\0"  | 
138  | 0  |   /* 842 */ "beq_s\t\0"  | 
139  | 0  |   /* 849 */ "breq_s\t\0"  | 
140  | 0  |   /* 857 */ "enter_s\t\0"  | 
141  | 0  |   /* 866 */ "bclr_s\t\0"  | 
142  | 0  |   /* 874 */ "xor_s\t\0"  | 
143  | 0  |   /* 881 */ "asr_s\t\0"  | 
144  | 0  |   /* 888 */ "lsr_s\t\0"  | 
145  | 0  |   /* 895 */ "abs_s\t\0"  | 
146  | 0  |   /* 902 */ "bhs_s\t\0"  | 
147  | 0  |   /* 909 */ "bls_s\t\0"  | 
148  | 0  |   /* 916 */ "bset_s\t\0"  | 
149  | 0  |   /* 924 */ "bgt_s\t\0"  | 
150  | 0  |   /* 931 */ "blt_s\t\0"  | 
151  | 0  |   /* 938 */ "not_s\t\0"  | 
152  | 0  |   /* 945 */ "btst_s\t\0"  | 
153  | 0  |   /* 953 */ "mov_s\t\0"  | 
154  | 0  |   /* 960 */ "mpyuw_s\t\0"  | 
155  | 0  |   /* 969 */ "mpyw_s\t\0"  | 
156  | 0  |   /* 977 */ "mpy_s\t\0"  | 
157  | 0  |   /* 984 */ "ld_s.as\t\0"  | 
158  | 0  |   /* 993 */ "ffs\t\0"  | 
159  | 0  |   /* 998 */ "fls\t\0"  | 
160  | 0  |   /* 1003 */ "st\t\0"  | 
161  | 0  |   /* 1007 */ "mpymu\t\0"  | 
162  | 0  |   /* 1014 */ "mov\t\0"  | 
163  | 0  |   /* 1019 */ "ldb.aw\t\0"  | 
164  | 0  |   /* 1027 */ "stb.aw\t\0"  | 
165  | 0  |   /* 1035 */ "ld.aw\t\0"  | 
166  | 0  |   /* 1042 */ "ldh.aw\t\0"  | 
167  | 0  |   /* 1050 */ "sth.aw\t\0"  | 
168  | 0  |   /* 1058 */ "ldb.di.aw\t\0"  | 
169  | 0  |   /* 1069 */ "stb.di.aw\t\0"  | 
170  | 0  |   /* 1080 */ "ld.di.aw\t\0"  | 
171  | 0  |   /* 1090 */ "ldh.di.aw\t\0"  | 
172  | 0  |   /* 1101 */ "sth.di.aw\t\0"  | 
173  | 0  |   /* 1112 */ "st.di.aw\t\0"  | 
174  | 0  |   /* 1122 */ "ldb.x.di.aw\t\0"  | 
175  | 0  |   /* 1135 */ "ldh.x.di.aw\t\0"  | 
176  | 0  |   /* 1148 */ "st.aw\t\0"  | 
177  | 0  |   /* 1155 */ "ldb.x.aw\t\0"  | 
178  | 0  |   /* 1165 */ "ldh.x.aw\t\0"  | 
179  | 0  |   /* 1175 */ "ldb.x\t\0"  | 
180  | 0  |   /* 1182 */ "ldh.x\t\0"  | 
181  | 0  |   /* 1189 */ "ldh_s.x\t\0"  | 
182  | 0  |   /* 1198 */ "max\t\0"  | 
183  | 0  |   /* 1203 */ "mpy\t\0"  | 
184  | 0  |   /* 1208 */ "add_s\t0, \0"  | 
185  | 0  |   /* 1218 */ "mov_s\t0, \0"  | 
186  | 0  |   /* 1228 */ "add_s\t%r0, %gp, \0"  | 
187  | 0  |   /* 1245 */ "ldb_s\t%r0, [%gp, \0"  | 
188  | 0  |   /* 1263 */ "ld_s\t%r0, [%gp, \0"  | 
189  | 0  |   /* 1280 */ "ldh_s\t%r0, [%gp, \0"  | 
190  | 0  |   /* 1298 */ "st_s\t%r0, [%gp, \0"  | 
191  | 0  |   /* 1315 */ "ld_s\t%r1, [%gp, \0"  | 
192  | 0  |   /* 1332 */ "sub_s\t%sp, %sp, \0"  | 
193  | 0  |   /* 1349 */ "add_s\t%sp, %sp, \0"  | 
194  | 0  |   /* 1366 */ "# ADJCALLSTACKDOWN \0"  | 
195  | 0  |   /* 1386 */ "# ADJCALLSTACKUP \0"  | 
196  | 0  |   /* 1404 */ "STB_FAR \0"  | 
197  | 0  |   /* 1413 */ "STH_FAR \0"  | 
198  | 0  |   /* 1422 */ "ST_FAR \0"  | 
199  | 0  |   /* 1430 */ "pldfi \0"  | 
200  | 0  |   /* 1437 */ "error.ffs \0"  | 
201  | 0  |   /* 1448 */ "error.fls \0"  | 
202  | 0  |   /* 1459 */ "sub1.\0"  | 
203  | 0  |   /* 1465 */ "sub2.\0"  | 
204  | 0  |   /* 1471 */ "sub3.\0"  | 
205  | 0  |   /* 1477 */ "# XRay Function Patchable RET.\0"  | 
206  | 0  |   /* 1508 */ "rsub.\0"  | 
207  | 0  |   /* 1514 */ "sbc.\0"  | 
208  | 0  |   /* 1519 */ "adc.\0"  | 
209  | 0  |   /* 1524 */ "add.\0"  | 
210  | 0  |   /* 1529 */ "and.\0"  | 
211  | 0  |   /* 1534 */ "# XRay Typed Event Log.\0"  | 
212  | 0  |   /* 1558 */ "# XRay Custom Event Log.\0"  | 
213  | 0  |   /* 1583 */ "asl.\0"  | 
214  | 0  |   /* 1588 */ "mpym.\0"  | 
215  | 0  |   /* 1594 */ "min.\0"  | 
216  | 0  |   /* 1599 */ "seteq.\0"  | 
217  | 0  |   /* 1606 */ "# XRay Function Enter.\0"  | 
218  | 0  |   /* 1629 */ "ror.\0"  | 
219  | 0  |   /* 1634 */ "xor.\0"  | 
220  | 0  |   /* 1639 */ "asr.\0"  | 
221  | 0  |   /* 1644 */ "lsr.\0"  | 
222  | 0  |   /* 1649 */ "# XRay Tail Call Exit.\0"  | 
223  | 0  |   /* 1672 */ "# XRay Function Exit.\0"  | 
224  | 0  |   /* 1694 */ "mpymu.\0"  | 
225  | 0  |   /* 1701 */ "mov.\0"  | 
226  | 0  |   /* 1706 */ "max.\0"  | 
227  | 0  |   /* 1711 */ "mpy.\0"  | 
228  | 0  |   /* 1716 */ "LIFETIME_END\0"  | 
229  | 0  |   /* 1729 */ "PSEUDO_PROBE\0"  | 
230  | 0  |   /* 1742 */ "BUNDLE\0"  | 
231  | 0  |   /* 1749 */ "DBG_VALUE\0"  | 
232  | 0  |   /* 1759 */ "DBG_INSTR_REF\0"  | 
233  | 0  |   /* 1773 */ "DBG_PHI\0"  | 
234  | 0  |   /* 1781 */ "DBG_LABEL\0"  | 
235  | 0  |   /* 1791 */ "LIFETIME_START\0"  | 
236  | 0  |   /* 1806 */ "DBG_VALUE_LIST\0"  | 
237  | 0  |   /* 1821 */ "j_s.d\t[\0"  | 
238  | 0  |   /* 1829 */ "jl_s.d\t[\0"  | 
239  | 0  |   /* 1838 */ "j\t[\0"  | 
240  | 0  |   /* 1842 */ "jl\t[\0"  | 
241  | 0  |   /* 1847 */ "j_s\t[\0"  | 
242  | 0  |   /* 1853 */ "jl_s\t[\0"  | 
243  | 0  |   /* 1860 */ "j_s.d\t[%blink]\0"  | 
244  | 0  |   /* 1875 */ "jne_s\t[%blink]\0"  | 
245  | 0  |   /* 1890 */ "j_s\t[%blink]\0"  | 
246  | 0  |   /* 1903 */ "jeq_s\t[%blink]\0"  | 
247  | 0  |   /* 1918 */ "b\0"  | 
248  | 0  |   /* 1920 */ "push_s\t%blink\0"  | 
249  | 0  |   /* 1934 */ "pop_s\t%blink\0"  | 
250  | 0  |   /* 1947 */ "# FEntry call\0"  | 
251  | 0  |   /* 1961 */ "pbr\0"  | 
252  | 0  |   /* 1965 */ "swi_s\0"  | 
253  | 0  |   /* 1971 */ "brk_s\0"  | 
254  | 0  |   /* 1977 */ "unimp_s\0"  | 
255  | 0  |   /* 1985 */ "nop_s\0"  | 
256  | 0  | };  | 
257  | 0  | #endif // CAPSTONE_DIET  | 
258  |  | 
  | 
259  | 0  |   static const uint32_t OpInfo0[] = { | 
260  | 0  |     0U, // PHI  | 
261  | 0  |     0U, // INLINEASM  | 
262  | 0  |     0U, // INLINEASM_BR  | 
263  | 0  |     0U, // CFI_INSTRUCTION  | 
264  | 0  |     0U, // EH_LABEL  | 
265  | 0  |     0U, // GC_LABEL  | 
266  | 0  |     0U, // ANNOTATION_LABEL  | 
267  | 0  |     0U, // KILL  | 
268  | 0  |     0U, // EXTRACT_SUBREG  | 
269  | 0  |     0U, // INSERT_SUBREG  | 
270  | 0  |     0U, // IMPLICIT_DEF  | 
271  | 0  |     0U, // SUBREG_TO_REG  | 
272  | 0  |     0U, // COPY_TO_REGCLASS  | 
273  | 0  |     1750U,  // DBG_VALUE  | 
274  | 0  |     1807U,  // DBG_VALUE_LIST  | 
275  | 0  |     1760U,  // DBG_INSTR_REF  | 
276  | 0  |     1774U,  // DBG_PHI  | 
277  | 0  |     1782U,  // DBG_LABEL  | 
278  | 0  |     0U, // REG_SEQUENCE  | 
279  | 0  |     0U, // COPY  | 
280  | 0  |     1743U,  // BUNDLE  | 
281  | 0  |     1792U,  // LIFETIME_START  | 
282  | 0  |     1717U,  // LIFETIME_END  | 
283  | 0  |     1730U,  // PSEUDO_PROBE  | 
284  | 0  |     0U, // ARITH_FENCE  | 
285  | 0  |     0U, // STACKMAP  | 
286  | 0  |     1948U,  // FENTRY_CALL  | 
287  | 0  |     0U, // PATCHPOINT  | 
288  | 0  |     0U, // LOAD_STACK_GUARD  | 
289  | 0  |     0U, // PREALLOCATED_SETUP  | 
290  | 0  |     0U, // PREALLOCATED_ARG  | 
291  | 0  |     0U, // STATEPOINT  | 
292  | 0  |     0U, // LOCAL_ESCAPE  | 
293  | 0  |     0U, // FAULTING_OP  | 
294  | 0  |     0U, // PATCHABLE_OP  | 
295  | 0  |     1607U,  // PATCHABLE_FUNCTION_ENTER  | 
296  | 0  |     1478U,  // PATCHABLE_RET  | 
297  | 0  |     1673U,  // PATCHABLE_FUNCTION_EXIT  | 
298  | 0  |     1650U,  // PATCHABLE_TAIL_CALL  | 
299  | 0  |     1559U,  // PATCHABLE_EVENT_CALL  | 
300  | 0  |     1535U,  // PATCHABLE_TYPED_EVENT_CALL  | 
301  | 0  |     0U, // ICALL_BRANCH_FUNNEL  | 
302  | 0  |     0U, // MEMBARRIER  | 
303  | 0  |     0U, // JUMP_TABLE_DEBUG_INFO  | 
304  | 0  |     0U, // G_ASSERT_SEXT  | 
305  | 0  |     0U, // G_ASSERT_ZEXT  | 
306  | 0  |     0U, // G_ASSERT_ALIGN  | 
307  | 0  |     0U, // G_ADD  | 
308  | 0  |     0U, // G_SUB  | 
309  | 0  |     0U, // G_MUL  | 
310  | 0  |     0U, // G_SDIV  | 
311  | 0  |     0U, // G_UDIV  | 
312  | 0  |     0U, // G_SREM  | 
313  | 0  |     0U, // G_UREM  | 
314  | 0  |     0U, // G_SDIVREM  | 
315  | 0  |     0U, // G_UDIVREM  | 
316  | 0  |     0U, // G_AND  | 
317  | 0  |     0U, // G_OR  | 
318  | 0  |     0U, // G_XOR  | 
319  | 0  |     0U, // G_IMPLICIT_DEF  | 
320  | 0  |     0U, // G_PHI  | 
321  | 0  |     0U, // G_FRAME_INDEX  | 
322  | 0  |     0U, // G_GLOBAL_VALUE  | 
323  | 0  |     0U, // G_CONSTANT_POOL  | 
324  | 0  |     0U, // G_EXTRACT  | 
325  | 0  |     0U, // G_UNMERGE_VALUES  | 
326  | 0  |     0U, // G_INSERT  | 
327  | 0  |     0U, // G_MERGE_VALUES  | 
328  | 0  |     0U, // G_BUILD_VECTOR  | 
329  | 0  |     0U, // G_BUILD_VECTOR_TRUNC  | 
330  | 0  |     0U, // G_CONCAT_VECTORS  | 
331  | 0  |     0U, // G_PTRTOINT  | 
332  | 0  |     0U, // G_INTTOPTR  | 
333  | 0  |     0U, // G_BITCAST  | 
334  | 0  |     0U, // G_FREEZE  | 
335  | 0  |     0U, // G_CONSTANT_FOLD_BARRIER  | 
336  | 0  |     0U, // G_INTRINSIC_FPTRUNC_ROUND  | 
337  | 0  |     0U, // G_INTRINSIC_TRUNC  | 
338  | 0  |     0U, // G_INTRINSIC_ROUND  | 
339  | 0  |     0U, // G_INTRINSIC_LRINT  | 
340  | 0  |     0U, // G_INTRINSIC_ROUNDEVEN  | 
341  | 0  |     0U, // G_READCYCLECOUNTER  | 
342  | 0  |     0U, // G_LOAD  | 
343  | 0  |     0U, // G_SEXTLOAD  | 
344  | 0  |     0U, // G_ZEXTLOAD  | 
345  | 0  |     0U, // G_INDEXED_LOAD  | 
346  | 0  |     0U, // G_INDEXED_SEXTLOAD  | 
347  | 0  |     0U, // G_INDEXED_ZEXTLOAD  | 
348  | 0  |     0U, // G_STORE  | 
349  | 0  |     0U, // G_INDEXED_STORE  | 
350  | 0  |     0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS  | 
351  | 0  |     0U, // G_ATOMIC_CMPXCHG  | 
352  | 0  |     0U, // G_ATOMICRMW_XCHG  | 
353  | 0  |     0U, // G_ATOMICRMW_ADD  | 
354  | 0  |     0U, // G_ATOMICRMW_SUB  | 
355  | 0  |     0U, // G_ATOMICRMW_AND  | 
356  | 0  |     0U, // G_ATOMICRMW_NAND  | 
357  | 0  |     0U, // G_ATOMICRMW_OR  | 
358  | 0  |     0U, // G_ATOMICRMW_XOR  | 
359  | 0  |     0U, // G_ATOMICRMW_MAX  | 
360  | 0  |     0U, // G_ATOMICRMW_MIN  | 
361  | 0  |     0U, // G_ATOMICRMW_UMAX  | 
362  | 0  |     0U, // G_ATOMICRMW_UMIN  | 
363  | 0  |     0U, // G_ATOMICRMW_FADD  | 
364  | 0  |     0U, // G_ATOMICRMW_FSUB  | 
365  | 0  |     0U, // G_ATOMICRMW_FMAX  | 
366  | 0  |     0U, // G_ATOMICRMW_FMIN  | 
367  | 0  |     0U, // G_ATOMICRMW_UINC_WRAP  | 
368  | 0  |     0U, // G_ATOMICRMW_UDEC_WRAP  | 
369  | 0  |     0U, // G_FENCE  | 
370  | 0  |     0U, // G_PREFETCH  | 
371  | 0  |     0U, // G_BRCOND  | 
372  | 0  |     0U, // G_BRINDIRECT  | 
373  | 0  |     0U, // G_INVOKE_REGION_START  | 
374  | 0  |     0U, // G_INTRINSIC  | 
375  | 0  |     0U, // G_INTRINSIC_W_SIDE_EFFECTS  | 
376  | 0  |     0U, // G_INTRINSIC_CONVERGENT  | 
377  | 0  |     0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS  | 
378  | 0  |     0U, // G_ANYEXT  | 
379  | 0  |     0U, // G_TRUNC  | 
380  | 0  |     0U, // G_CONSTANT  | 
381  | 0  |     0U, // G_FCONSTANT  | 
382  | 0  |     0U, // G_VASTART  | 
383  | 0  |     0U, // G_VAARG  | 
384  | 0  |     0U, // G_SEXT  | 
385  | 0  |     0U, // G_SEXT_INREG  | 
386  | 0  |     0U, // G_ZEXT  | 
387  | 0  |     0U, // G_SHL  | 
388  | 0  |     0U, // G_LSHR  | 
389  | 0  |     0U, // G_ASHR  | 
390  | 0  |     0U, // G_FSHL  | 
391  | 0  |     0U, // G_FSHR  | 
392  | 0  |     0U, // G_ROTR  | 
393  | 0  |     0U, // G_ROTL  | 
394  | 0  |     0U, // G_ICMP  | 
395  | 0  |     0U, // G_FCMP  | 
396  | 0  |     0U, // G_SELECT  | 
397  | 0  |     0U, // G_UADDO  | 
398  | 0  |     0U, // G_UADDE  | 
399  | 0  |     0U, // G_USUBO  | 
400  | 0  |     0U, // G_USUBE  | 
401  | 0  |     0U, // G_SADDO  | 
402  | 0  |     0U, // G_SADDE  | 
403  | 0  |     0U, // G_SSUBO  | 
404  | 0  |     0U, // G_SSUBE  | 
405  | 0  |     0U, // G_UMULO  | 
406  | 0  |     0U, // G_SMULO  | 
407  | 0  |     0U, // G_UMULH  | 
408  | 0  |     0U, // G_SMULH  | 
409  | 0  |     0U, // G_UADDSAT  | 
410  | 0  |     0U, // G_SADDSAT  | 
411  | 0  |     0U, // G_USUBSAT  | 
412  | 0  |     0U, // G_SSUBSAT  | 
413  | 0  |     0U, // G_USHLSAT  | 
414  | 0  |     0U, // G_SSHLSAT  | 
415  | 0  |     0U, // G_SMULFIX  | 
416  | 0  |     0U, // G_UMULFIX  | 
417  | 0  |     0U, // G_SMULFIXSAT  | 
418  | 0  |     0U, // G_UMULFIXSAT  | 
419  | 0  |     0U, // G_SDIVFIX  | 
420  | 0  |     0U, // G_UDIVFIX  | 
421  | 0  |     0U, // G_SDIVFIXSAT  | 
422  | 0  |     0U, // G_UDIVFIXSAT  | 
423  | 0  |     0U, // G_FADD  | 
424  | 0  |     0U, // G_FSUB  | 
425  | 0  |     0U, // G_FMUL  | 
426  | 0  |     0U, // G_FMA  | 
427  | 0  |     0U, // G_FMAD  | 
428  | 0  |     0U, // G_FDIV  | 
429  | 0  |     0U, // G_FREM  | 
430  | 0  |     0U, // G_FPOW  | 
431  | 0  |     0U, // G_FPOWI  | 
432  | 0  |     0U, // G_FEXP  | 
433  | 0  |     0U, // G_FEXP2  | 
434  | 0  |     0U, // G_FEXP10  | 
435  | 0  |     0U, // G_FLOG  | 
436  | 0  |     0U, // G_FLOG2  | 
437  | 0  |     0U, // G_FLOG10  | 
438  | 0  |     0U, // G_FLDEXP  | 
439  | 0  |     0U, // G_FFREXP  | 
440  | 0  |     0U, // G_FNEG  | 
441  | 0  |     0U, // G_FPEXT  | 
442  | 0  |     0U, // G_FPTRUNC  | 
443  | 0  |     0U, // G_FPTOSI  | 
444  | 0  |     0U, // G_FPTOUI  | 
445  | 0  |     0U, // G_SITOFP  | 
446  | 0  |     0U, // G_UITOFP  | 
447  | 0  |     0U, // G_FABS  | 
448  | 0  |     0U, // G_FCOPYSIGN  | 
449  | 0  |     0U, // G_IS_FPCLASS  | 
450  | 0  |     0U, // G_FCANONICALIZE  | 
451  | 0  |     0U, // G_FMINNUM  | 
452  | 0  |     0U, // G_FMAXNUM  | 
453  | 0  |     0U, // G_FMINNUM_IEEE  | 
454  | 0  |     0U, // G_FMAXNUM_IEEE  | 
455  | 0  |     0U, // G_FMINIMUM  | 
456  | 0  |     0U, // G_FMAXIMUM  | 
457  | 0  |     0U, // G_GET_FPENV  | 
458  | 0  |     0U, // G_SET_FPENV  | 
459  | 0  |     0U, // G_RESET_FPENV  | 
460  | 0  |     0U, // G_GET_FPMODE  | 
461  | 0  |     0U, // G_SET_FPMODE  | 
462  | 0  |     0U, // G_RESET_FPMODE  | 
463  | 0  |     0U, // G_PTR_ADD  | 
464  | 0  |     0U, // G_PTRMASK  | 
465  | 0  |     0U, // G_SMIN  | 
466  | 0  |     0U, // G_SMAX  | 
467  | 0  |     0U, // G_UMIN  | 
468  | 0  |     0U, // G_UMAX  | 
469  | 0  |     0U, // G_ABS  | 
470  | 0  |     0U, // G_LROUND  | 
471  | 0  |     0U, // G_LLROUND  | 
472  | 0  |     0U, // G_BR  | 
473  | 0  |     0U, // G_BRJT  | 
474  | 0  |     0U, // G_INSERT_VECTOR_ELT  | 
475  | 0  |     0U, // G_EXTRACT_VECTOR_ELT  | 
476  | 0  |     0U, // G_SHUFFLE_VECTOR  | 
477  | 0  |     0U, // G_CTTZ  | 
478  | 0  |     0U, // G_CTTZ_ZERO_UNDEF  | 
479  | 0  |     0U, // G_CTLZ  | 
480  | 0  |     0U, // G_CTLZ_ZERO_UNDEF  | 
481  | 0  |     0U, // G_CTPOP  | 
482  | 0  |     0U, // G_BSWAP  | 
483  | 0  |     0U, // G_BITREVERSE  | 
484  | 0  |     0U, // G_FCEIL  | 
485  | 0  |     0U, // G_FCOS  | 
486  | 0  |     0U, // G_FSIN  | 
487  | 0  |     0U, // G_FSQRT  | 
488  | 0  |     0U, // G_FFLOOR  | 
489  | 0  |     0U, // G_FRINT  | 
490  | 0  |     0U, // G_FNEARBYINT  | 
491  | 0  |     0U, // G_ADDRSPACE_CAST  | 
492  | 0  |     0U, // G_BLOCK_ADDR  | 
493  | 0  |     0U, // G_JUMP_TABLE  | 
494  | 0  |     0U, // G_DYN_STACKALLOC  | 
495  | 0  |     0U, // G_STACKSAVE  | 
496  | 0  |     0U, // G_STACKRESTORE  | 
497  | 0  |     0U, // G_STRICT_FADD  | 
498  | 0  |     0U, // G_STRICT_FSUB  | 
499  | 0  |     0U, // G_STRICT_FMUL  | 
500  | 0  |     0U, // G_STRICT_FDIV  | 
501  | 0  |     0U, // G_STRICT_FREM  | 
502  | 0  |     0U, // G_STRICT_FMA  | 
503  | 0  |     0U, // G_STRICT_FSQRT  | 
504  | 0  |     0U, // G_STRICT_FLDEXP  | 
505  | 0  |     0U, // G_READ_REGISTER  | 
506  | 0  |     0U, // G_WRITE_REGISTER  | 
507  | 0  |     0U, // G_MEMCPY  | 
508  | 0  |     0U, // G_MEMCPY_INLINE  | 
509  | 0  |     0U, // G_MEMMOVE  | 
510  | 0  |     0U, // G_MEMSET  | 
511  | 0  |     0U, // G_BZERO  | 
512  | 0  |     0U, // G_VECREDUCE_SEQ_FADD  | 
513  | 0  |     0U, // G_VECREDUCE_SEQ_FMUL  | 
514  | 0  |     0U, // G_VECREDUCE_FADD  | 
515  | 0  |     0U, // G_VECREDUCE_FMUL  | 
516  | 0  |     0U, // G_VECREDUCE_FMAX  | 
517  | 0  |     0U, // G_VECREDUCE_FMIN  | 
518  | 0  |     0U, // G_VECREDUCE_FMAXIMUM  | 
519  | 0  |     0U, // G_VECREDUCE_FMINIMUM  | 
520  | 0  |     0U, // G_VECREDUCE_ADD  | 
521  | 0  |     0U, // G_VECREDUCE_MUL  | 
522  | 0  |     0U, // G_VECREDUCE_AND  | 
523  | 0  |     0U, // G_VECREDUCE_OR  | 
524  | 0  |     0U, // G_VECREDUCE_XOR  | 
525  | 0  |     0U, // G_VECREDUCE_SMAX  | 
526  | 0  |     0U, // G_VECREDUCE_SMIN  | 
527  | 0  |     0U, // G_VECREDUCE_UMAX  | 
528  | 0  |     0U, // G_VECREDUCE_UMIN  | 
529  | 0  |     0U, // G_SBFX  | 
530  | 0  |     0U, // G_UBFX  | 
531  | 0  |     3415U,  // ADJCALLSTACKDOWN  | 
532  | 0  |     36203U, // ADJCALLSTACKUP  | 
533  | 0  |     6058U,  // BRcc_rr_p  | 
534  | 0  |     6058U,  // BRcc_ru6_p  | 
535  | 0  |     3497U,  // CTLZ  | 
536  | 0  |     3486U,  // CTTZ  | 
537  | 0  |     3479U,  // GETFI  | 
538  | 0  |     527741U,  // STB_FAR  | 
539  | 0  |     527750U,  // STH_FAR  | 
540  | 0  |     527759U,  // ST_FAR  | 
541  | 0  |     1121776U, // ADC_cc_f_rru6  | 
542  | 0  |     1154544U, // ADC_cc_rru6  | 
543  | 0  |     4196640U, // ADC_f_rrlimm  | 
544  | 0  |     4196640U, // ADC_f_rrr  | 
545  | 0  |     4196640U, // ADC_f_rrs12  | 
546  | 0  |     4196640U, // ADC_f_rru6  | 
547  | 0  |     4196554U, // ADC_rrlimm  | 
548  | 0  |     4196554U, // ADC_rrr  | 
549  | 0  |     4196554U, // ADC_rrs12  | 
550  | 0  |     4196554U, // ADC_rru6  | 
551  | 0  |     1582265U, // ADD_S_limms3  | 
552  | 0  |     22547095U,  // ADD_S_rlimm  | 
553  | 0  |     22547095U,  // ADD_S_rr  | 
554  | 0  |     4197015U, // ADD_S_rrr  | 
555  | 0  |     4197015U, // ADD_S_rru6  | 
556  | 0  |     22547095U,  // ADD_S_rs3  | 
557  | 0  |     4197015U, // ADD_S_ru3  | 
558  | 0  |     22547095U,  // ADD_S_u7  | 
559  | 0  |     1121781U, // ADD_cc_f_rru6  | 
560  | 0  |     1154549U, // ADD_cc_rru6  | 
561  | 0  |     4196647U, // ADD_f_rrlimm  | 
562  | 0  |     4196647U, // ADD_f_rrr  | 
563  | 0  |     4196647U, // ADD_f_rrs12  | 
564  | 0  |     4196647U, // ADD_f_rru6  | 
565  | 0  |     4196559U, // ADD_rrlimm  | 
566  | 0  |     4196559U, // ADD_rrr  | 
567  | 0  |     4196559U, // ADD_rrs12  | 
568  | 0  |     4196559U, // ADD_rru6  | 
569  | 0  |     1121786U, // AND_cc_f_rru6  | 
570  | 0  |     1154554U, // AND_cc_rru6  | 
571  | 0  |     4196654U, // AND_f_rrlimm  | 
572  | 0  |     4196654U, // AND_f_rrr  | 
573  | 0  |     4196654U, // AND_f_rrs12  | 
574  | 0  |     4196654U, // AND_f_rru6  | 
575  | 0  |     4196568U, // AND_rrlimm  | 
576  | 0  |     4196568U, // AND_rrr  | 
577  | 0  |     4196568U, // AND_rrs12  | 
578  | 0  |     4196568U, // AND_rru6  | 
579  | 0  |     4197159U, // ASL_S_ru3  | 
580  | 0  |     22547239U,  // ASL_S_ru5  | 
581  | 0  |     1121840U, // ASL_cc_f_rru6  | 
582  | 0  |     1154608U, // ASL_cc_rru6  | 
583  | 0  |     4196678U, // ASL_f_rrlimm  | 
584  | 0  |     4196678U, // ASL_f_rrr  | 
585  | 0  |     4196678U, // ASL_f_rrs12  | 
586  | 0  |     4196678U, // ASL_f_rru6  | 
587  | 0  |     4196889U, // ASL_rrlimm  | 
588  | 0  |     4196889U, // ASL_rrr  | 
589  | 0  |     4196889U, // ASL_rrs12  | 
590  | 0  |     4196889U, // ASL_rru6  | 
591  | 0  |     4197234U, // ASR_S_ru3  | 
592  | 0  |     22547314U,  // ASR_S_ru5  | 
593  | 0  |     1121896U, // ASR_cc_f_rru6  | 
594  | 0  |     1154664U, // ASR_cc_rru6  | 
595  | 0  |     4196731U, // ASR_f_rrlimm  | 
596  | 0  |     4196731U, // ASR_f_rrr  | 
597  | 0  |     4196731U, // ASR_f_rrs12  | 
598  | 0  |     4196731U, // ASR_f_rru6  | 
599  | 0  |     4196937U, // ASR_rrlimm  | 
600  | 0  |     4196937U, // ASR_rrr  | 
601  | 0  |     4196937U, // ASR_rrs12  | 
602  | 0  |     4196937U, // ASR_rru6  | 
603  | 0  |     22547299U,  // BCLR_S_ru5  | 
604  | 0  |     11083U, // BEQ_S  | 
605  | 0  |     10923U, // BGE_S  | 
606  | 0  |     11165U, // BGT_S  | 
607  | 0  |     11019U, // BHI_S  | 
608  | 0  |     11143U, // BHS_S  | 
609  | 0  |     10769U, // BL  | 
610  | 0  |     10930U, // BLE_S  | 
611  | 0  |     11054U, // BLO_S  | 
612  | 0  |     11150U, // BLS_S  | 
613  | 0  |     11172U, // BLT_S  | 
614  | 0  |     11041U, // BL_S  | 
615  | 0  |     22547225U,  // BMSK_S_ru5  | 
616  | 0  |     10937U, // BNE_S  | 
617  | 0  |     10264U, // BR  | 
618  | 0  |     133970U,  // BREQ_S  | 
619  | 0  |     133824U,  // BRNE_S  | 
620  | 0  |     14251U, // BRcc_rr  | 
621  | 0  |     14251U, // BRcc_ru6  | 
622  | 0  |     22547349U,  // BSET_S_ru5  | 
623  | 0  |     2994U,  // BTST_S_ru5  | 
624  | 0  |     10861U, // B_S  | 
625  | 0  |     16255U, // Bcc  | 
626  | 0  |     1581885U, // CMP_S_limms3  | 
627  | 0  |     2877U,  // CMP_S_rlimm  | 
628  | 0  |     2877U,  // CMP_S_rr  | 
629  | 0  |     2877U,  // CMP_S_rs3  | 
630  | 0  |     2877U,  // CMP_S_u7  | 
631  | 0  |     2607U,  // CMP_rlimm  | 
632  | 0  |     2607U,  // CMP_rr  | 
633  | 0  |     2607U,  // CMP_ru6  | 
634  | 0  |     71469726U,  // COMPACT_LD_S  | 
635  | 0  |     3002U,  // COMPACT_MOV_S_hreg  | 
636  | 0  |     3002U,  // COMPACT_MOV_S_limm  | 
637  | 0  |     35589U, // EI_S  | 
638  | 0  |     35674U, // ENTER_S  | 
639  | 0  |     2441U,  // FFS_f_rr  | 
640  | 0  |     3042U,  // FFS_rr  | 
641  | 0  |     2448U,  // FLS_f_rr  | 
642  | 0  |     3047U,  // FLS_rr  | 
643  | 0  |     2944U,  // GEN_ABS_S  | 
644  | 0  |     22547027U,  // GEN_ADD1_S  | 
645  | 0  |     22547035U,  // GEN_ADD2_S  | 
646  | 0  |     22547043U,  // GEN_ADD3_S  | 
647  | 0  |     22547108U,  // GEN_AND_S  | 
648  | 0  |     2855U,  // GEN_AS1L_S  | 
649  | 0  |     2930U,  // GEN_AS1R_S  | 
650  | 0  |     22547239U,  // GEN_ASL_S  | 
651  | 0  |     22547314U,  // GEN_ASR_S  | 
652  | 0  |     22547088U,  // GEN_BIC_S  | 
653  | 0  |     1972U,  // GEN_BRK_S  | 
654  | 0  |     2681U,  // GEN_EXTB_S  | 
655  | 0  |     2798U,  // GEN_EXTH_S  | 
656  | 0  |     1904U,  // GEN_JEQ_S  | 
657  | 0  |     200510U,  // GEN_JL_S  | 
658  | 0  |     200486U,  // GEN_JL_S_D  | 
659  | 0  |     1876U,  // GEN_JNE_S  | 
660  | 0  |     200504U,  // GEN_J_S  | 
661  | 0  |     200478U,  // GEN_J_S_D  | 
662  | 0  |     1861U,  // GEN_J_S_D_BLINK  | 
663  | 0  |     2937U,  // GEN_LS1R_S  | 
664  | 0  |     22547321U,  // GEN_LSR_S  | 
665  | 0  |     22547393U,  // GEN_MPYUW_S  | 
666  | 0  |     22547402U,  // GEN_MPYW_S  | 
667  | 0  |     22547410U,  // GEN_MPY_S  | 
668  | 0  |     2769U,  // GEN_NEG_S  | 
669  | 0  |     1986U,  // GEN_NOP_S  | 
670  | 0  |     2987U,  // GEN_NOT_S  | 
671  | 0  |     22547308U,  // GEN_OR_S  | 
672  | 0  |     2696U,  // GEN_SEXB_S  | 
673  | 0  |     2806U,  // GEN_SEXH_S  | 
674  | 0  |     22547073U,  // GEN_SUB_S  | 
675  | 0  |     39323869U,  // GEN_SUB_S_NE  | 
676  | 0  |     1966U,  // GEN_SWI_S  | 
677  | 0  |     35637U, // GEN_TRAP_S  | 
678  | 0  |     2995U,  // GEN_TST_S  | 
679  | 0  |     1978U,  // GEN_UNIMP_S  | 
680  | 0  |     22547307U,  // GEN_XOR_S  | 
681  | 0  |     36045U, // GP_ADD_S  | 
682  | 0  |     199902U,  // GP_LDB_S  | 
683  | 0  |     199937U,  // GP_LDH_S  | 
684  | 0  |     199920U,  // GP_LD_S  | 
685  | 0  |     200495U,  // J  | 
686  | 0  |     200499U,  // JL  | 
687  | 0  |     35602U, // JLI_S  | 
688  | 0  |     35349U, // JL_LImm  | 
689  | 0  |     35342U, // J_LImm  | 
690  | 0  |     1891U,  // J_S_BLINK  | 
691  | 0  |     2263059U, // LDB_AB_rs9  | 
692  | 0  |     2264060U, // LDB_AW_rs9  | 
693  | 0  |     2263098U, // LDB_DI_AB_rs9  | 
694  | 0  |     2264099U, // LDB_DI_AW_rs9  | 
695  | 0  |     8554956U, // LDB_DI_limm  | 
696  | 0  |     9079244U, // LDB_DI_rlimm  | 
697  | 0  |     9079244U, // LDB_DI_rs9  | 
698  | 0  |     71469675U,  // LDB_S_OFF  | 
699  | 0  |     71469675U,  // LDB_S_rrr  | 
700  | 0  |     2263195U, // LDB_X_AB_rs9  | 
701  | 0  |     2264196U, // LDB_X_AW_rs9  | 
702  | 0  |     2263162U, // LDB_X_DI_AB_rs9  | 
703  | 0  |     2264163U, // LDB_X_DI_AW_rs9  | 
704  | 0  |     8555002U, // LDB_X_DI_limm  | 
705  | 0  |     9079290U, // LDB_X_DI_rlimm  | 
706  | 0  |     9079290U, // LDB_X_DI_rs9  | 
707  | 0  |     8555672U, // LDB_X_limm  | 
708  | 0  |     9079960U, // LDB_X_rlimm  | 
709  | 0  |     9079960U, // LDB_X_rs9  | 
710  | 0  |     8554671U, // LDB_limm  | 
711  | 0  |     9078959U, // LDB_rlimm  | 
712  | 0  |     9078959U, // LDB_rs9  | 
713  | 0  |     2263082U, // LDH_AB_rs9  | 
714  | 0  |     2264083U, // LDH_AW_rs9  | 
715  | 0  |     2263130U, // LDH_DI_AB_rs9  | 
716  | 0  |     2264131U, // LDH_DI_AW_rs9  | 
717  | 0  |     8554979U, // LDH_DI_limm  | 
718  | 0  |     9079267U, // LDH_DI_rlimm  | 
719  | 0  |     9079267U, // LDH_DI_rs9  | 
720  | 0  |     71469784U,  // LDH_S_OFF  | 
721  | 0  |     71470246U,  // LDH_S_X_OFF  | 
722  | 0  |     71469784U,  // LDH_S_rrr  | 
723  | 0  |     2263205U, // LDH_X_AB_rs9  | 
724  | 0  |     2264206U, // LDH_X_AW_rs9  | 
725  | 0  |     2263175U, // LDH_X_DI_AB_rs9  | 
726  | 0  |     2264176U, // LDH_X_DI_AW_rs9  | 
727  | 0  |     8555012U, // LDH_X_DI_limm  | 
728  | 0  |     9079300U, // LDH_X_DI_rlimm  | 
729  | 0  |     9079300U, // LDH_X_DI_rs9  | 
730  | 0  |     8555679U, // LDH_X_limm  | 
731  | 0  |     9079967U, // LDH_X_rlimm  | 
732  | 0  |     9079967U, // LDH_X_rs9  | 
733  | 0  |     8554933U, // LDH_limm  | 
734  | 0  |     9079221U, // LDH_rlimm  | 
735  | 0  |     9079221U, // LDH_rs9  | 
736  | 0  |     8555262U, // LDI_S_u7  | 
737  | 0  |     2263075U, // LD_AB_rs9  | 
738  | 0  |     2264076U, // LD_AW_rs9  | 
739  | 0  |     2263120U, // LD_DI_AB_rs9  | 
740  | 0  |     2264121U, // LD_DI_AW_rs9  | 
741  | 0  |     8554972U, // LD_DI_limm  | 
742  | 0  |     9079260U, // LD_DI_rlimm  | 
743  | 0  |     9079260U, // LD_DI_rs9  | 
744  | 0  |     71470041U,  // LD_S_AS_rrr  | 
745  | 0  |     71469726U,  // LD_S_OFF  | 
746  | 0  |     71469726U,  // LD_S_rrr  | 
747  | 0  |     199972U,  // LD_S_s11  | 
748  | 0  |     8554708U, // LD_limm  | 
749  | 0  |     9078996U, // LD_rlimm  | 
750  | 0  |     9078996U, // LD_rs9  | 
751  | 0  |     35528U, // LEAVE_S  | 
752  | 0  |     8555067U, // LR_rs12  | 
753  | 0  |     8555067U, // LR_ru6  | 
754  | 0  |     22547321U,  // LSR_S_ru5  | 
755  | 0  |     1121901U, // LSR_cc_f_rru6  | 
756  | 0  |     1154669U, // LSR_cc_rru6  | 
757  | 0  |     4196738U, // LSR_f_rrlimm  | 
758  | 0  |     4196738U, // LSR_f_rrr  | 
759  | 0  |     4196738U, // LSR_f_rrs12  | 
760  | 0  |     4196738U, // LSR_f_rru6  | 
761  | 0  |     4196942U, // LSR_rrlimm  | 
762  | 0  |     4196942U, // LSR_rrr  | 
763  | 0  |     4196942U, // LSR_rrs12  | 
764  | 0  |     4196942U, // LSR_rru6  | 
765  | 0  |     1121963U, // MAX_cc_f_rru6  | 
766  | 0  |     1154731U, // MAX_cc_rru6  | 
767  | 0  |     4196775U, // MAX_f_rrlimm  | 
768  | 0  |     4196775U, // MAX_f_rrr  | 
769  | 0  |     4196775U, // MAX_f_rrs12  | 
770  | 0  |     4196775U, // MAX_f_rru6  | 
771  | 0  |     4197551U, // MAX_rrlimm  | 
772  | 0  |     4197551U, // MAX_rrr  | 
773  | 0  |     4197551U, // MAX_rrs12  | 
774  | 0  |     4197551U, // MAX_rru6  | 
775  | 0  |     1121851U, // MIN_cc_f_rru6  | 
776  | 0  |     1154619U, // MIN_cc_rru6  | 
777  | 0  |     4196701U, // MIN_f_rrlimm  | 
778  | 0  |     4196701U, // MIN_f_rrr  | 
779  | 0  |     4196701U, // MIN_f_rrs12  | 
780  | 0  |     4196701U, // MIN_f_rru6  | 
781  | 0  |     4196906U, // MIN_rrlimm  | 
782  | 0  |     4196906U, // MIN_rrr  | 
783  | 0  |     4196906U, // MIN_rrs12  | 
784  | 0  |     4196906U, // MIN_rru6  | 
785  | 0  |     2279U,  // MOV_S_NE_rlimm  | 
786  | 0  |     2279U,  // MOV_S_NE_rr  | 
787  | 0  |     3002U,  // MOV_S_rs3  | 
788  | 0  |     36035U, // MOV_S_s3  | 
789  | 0  |     3002U,  // MOV_S_u8  | 
790  | 0  |     18086U, // MOV_cc  | 
791  | 0  |     2707110U, // MOV_cc_f_ru6  | 
792  | 0  |     2739878U, // MOV_cc_ru6  | 
793  | 0  |     2623904U, // MOV_f_ru6  | 
794  | 0  |     3063U,  // MOV_rlimm  | 
795  | 0  |     3063U,  // MOV_rr  | 
796  | 0  |     3063U,  // MOV_rs12  | 
797  | 0  |     3063U,  // MOV_ru6  | 
798  | 0  |     1121951U, // MPYMU_cc_f_rru6  | 
799  | 0  |     1154719U, // MPYMU_cc_rru6  | 
800  | 0  |     4196759U, // MPYMU_f_rrlimm  | 
801  | 0  |     4196759U, // MPYMU_f_rrr  | 
802  | 0  |     4196759U, // MPYMU_f_rrs12  | 
803  | 0  |     4196759U, // MPYMU_f_rru6  | 
804  | 0  |     4197360U, // MPYMU_rrlimm  | 
805  | 0  |     4197360U, // MPYMU_rrr  | 
806  | 0  |     4197360U, // MPYMU_rrs12  | 
807  | 0  |     4197360U, // MPYMU_rru6  | 
808  | 0  |     1121845U, // MPYM_cc_f_rru6  | 
809  | 0  |     1154613U, // MPYM_cc_rru6  | 
810  | 0  |     4196693U, // MPYM_f_rrlimm  | 
811  | 0  |     4196693U, // MPYM_f_rrr  | 
812  | 0  |     4196693U, // MPYM_f_rrs12  | 
813  | 0  |     4196693U, // MPYM_f_rru6  | 
814  | 0  |     4196900U, // MPYM_rrlimm  | 
815  | 0  |     4196900U, // MPYM_rrr  | 
816  | 0  |     4196900U, // MPYM_rrs12  | 
817  | 0  |     4196900U, // MPYM_rru6  | 
818  | 0  |     1121968U, // MPY_cc_f_rru6  | 
819  | 0  |     1154736U, // MPY_cc_rru6  | 
820  | 0  |     4196782U, // MPY_f_rrlimm  | 
821  | 0  |     4196782U, // MPY_f_rrr  | 
822  | 0  |     4196782U, // MPY_f_rrs12  | 
823  | 0  |     4196782U, // MPY_f_rru6  | 
824  | 0  |     4197556U, // MPY_rrlimm  | 
825  | 0  |     4197556U, // MPY_rrr  | 
826  | 0  |     4197556U, // MPY_rrs12  | 
827  | 0  |     4197556U, // MPY_rru6  | 
828  | 0  |     2357U,  // NORMH_f_rr  | 
829  | 0  |     2490U,  // NORMH_rr  | 
830  | 0  |     2381U,  // NORM_f_rr  | 
831  | 0  |     2590U,  // NORM_rr  | 
832  | 0  |     1121887U, // OR_cc_f_rru6  | 
833  | 0  |     1154655U, // OR_cc_rru6  | 
834  | 0  |     4196718U, // OR_f_rrlimm  | 
835  | 0  |     4196718U, // OR_f_rrr  | 
836  | 0  |     4196718U, // OR_f_rrs12  | 
837  | 0  |     4196718U, // OR_f_rru6  | 
838  | 0  |     4196928U, // OR_rrlimm  | 
839  | 0  |     4196928U, // OR_rrr  | 
840  | 0  |     4196928U, // OR_rrs12  | 
841  | 0  |     4196928U, // OR_rru6  | 
842  | 0  |     232094U,  // PCL_LD  | 
843  | 0  |     1935U,  // POP_S_BLINK  | 
844  | 0  |     35652U, // POP_S_r  | 
845  | 0  |     1921U,  // PUSH_S_BLINK  | 
846  | 0  |     35551U, // PUSH_S_r  | 
847  | 0  |     1121886U, // ROR_cc_f_rru6  | 
848  | 0  |     1154654U, // ROR_cc_rru6  | 
849  | 0  |     4196717U, // ROR_f_rrlimm  | 
850  | 0  |     4196717U, // ROR_f_rrr  | 
851  | 0  |     4196717U, // ROR_f_rrs12  | 
852  | 0  |     4196717U, // ROR_f_rru6  | 
853  | 0  |     4196927U, // ROR_rrlimm  | 
854  | 0  |     4196927U, // ROR_rrr  | 
855  | 0  |     4196927U, // ROR_rrs12  | 
856  | 0  |     4196927U, // ROR_rru6  | 
857  | 0  |     1121765U, // RSUB_cc_f_rru6  | 
858  | 0  |     1154533U, // RSUB_cc_rru6  | 
859  | 0  |     4196617U, // RSUB_f_rrlimm  | 
860  | 0  |     4196617U, // RSUB_f_rrr  | 
861  | 0  |     4196617U, // RSUB_f_rrs12  | 
862  | 0  |     4196617U, // RSUB_f_rru6  | 
863  | 0  |     4196537U, // RSUB_rrlimm  | 
864  | 0  |     4196537U, // RSUB_rrr  | 
865  | 0  |     4196537U, // RSUB_rrs12  | 
866  | 0  |     4196537U, // RSUB_rru6  | 
867  | 0  |     1121771U, // SBC_cc_f_rru6  | 
868  | 0  |     1154539U, // SBC_cc_rru6  | 
869  | 0  |     4196633U, // SBC_f_rrlimm  | 
870  | 0  |     4196633U, // SBC_f_rrr  | 
871  | 0  |     4196633U, // SBC_f_rrs12  | 
872  | 0  |     4196633U, // SBC_f_rru6  | 
873  | 0  |     4196549U, // SBC_rrlimm  | 
874  | 0  |     4196549U, // SBC_rrr  | 
875  | 0  |     4196549U, // SBC_rrs12  | 
876  | 0  |     4196549U, // SBC_rru6  | 
877  | 0  |     1121856U, // SETEQ_cc_f_rru6  | 
878  | 0  |     1154624U, // SETEQ_cc_rru6  | 
879  | 0  |     4196708U, // SETEQ_f_rrlimm  | 
880  | 0  |     4196708U, // SETEQ_f_rrr  | 
881  | 0  |     4196708U, // SETEQ_f_rrs12  | 
882  | 0  |     4196708U, // SETEQ_f_rru6  | 
883  | 0  |     4196916U, // SETEQ_rrlimm  | 
884  | 0  |     4196916U, // SETEQ_rrr  | 
885  | 0  |     4196916U, // SETEQ_rrs12  | 
886  | 0  |     4196916U, // SETEQ_rru6  | 
887  | 0  |     2321U,  // SEXB_f_rr  | 
888  | 0  |     2239U,  // SEXB_rr  | 
889  | 0  |     2366U,  // SEXH_f_rr  | 
890  | 0  |     2502U,  // SEXH_rr  | 
891  | 0  |     264855U,  // SP_ADD_S  | 
892  | 0  |     36166U, // SP_ADD_SP_S  | 
893  | 0  |     297579U,  // SP_LDB_S  | 
894  | 0  |     297630U,  // SP_LD_S  | 
895  | 0  |     297586U,  // SP_STB_S  | 
896  | 0  |     297908U,  // SP_ST_S  | 
897  | 0  |     36149U, // SP_SUB_SP_S  | 
898  | 0  |     2269211U, // STB_AB_rs9  | 
899  | 0  |     2270212U, // STB_AW_rs9  | 
900  | 0  |     2269253U, // STB_DI_AB_rs9  | 
901  | 0  |     2270254U, // STB_DI_AW_rs9  | 
902  | 0  |     8554964U, // STB_DI_limm  | 
903  | 0  |     9079252U, // STB_DI_rs9  | 
904  | 0  |     71469682U,  // STB_S_OFF  | 
905  | 0  |     8554676U, // STB_limm  | 
906  | 0  |     9078964U, // STB_rs9  | 
907  | 0  |     2269234U, // STH_AB_rs9  | 
908  | 0  |     2270235U, // STH_AW_rs9  | 
909  | 0  |     2269285U, // STH_DI_AB_rs9  | 
910  | 0  |     2270286U, // STH_DI_AW_rs9  | 
911  | 0  |     8554987U, // STH_DI_limm  | 
912  | 0  |     9079275U, // STH_DI_rs9  | 
913  | 0  |     71469799U,  // STH_S_OFF  | 
914  | 0  |     8554945U, // STH_limm  | 
915  | 0  |     9079233U, // STH_rs9  | 
916  | 0  |     2269332U, // ST_AB_rs9  | 
917  | 0  |     2270333U, // ST_AW_rs9  | 
918  | 0  |     2269296U, // ST_DI_AB_rs9  | 
919  | 0  |     2270297U, // ST_DI_AW_rs9  | 
920  | 0  |     8554995U, // ST_DI_limm  | 
921  | 0  |     9079283U, // ST_DI_rs9  | 
922  | 0  |     71470004U,  // ST_S_OFF  | 
923  | 0  |     199955U,  // ST_S_s11  | 
924  | 0  |     8555500U, // ST_limm  | 
925  | 0  |     9079788U, // ST_rs9  | 
926  | 0  |     1121716U, // SUB1_cc_f_rru6  | 
927  | 0  |     1154484U, // SUB1_cc_rru6  | 
928  | 0  |     4196593U, // SUB1_f_rrlimm  | 
929  | 0  |     4196593U, // SUB1_f_rrr  | 
930  | 0  |     4196593U, // SUB1_f_rrs12  | 
931  | 0  |     4196593U, // SUB1_f_rru6  | 
932  | 0  |     4196353U, // SUB1_rrlimm  | 
933  | 0  |     4196353U, // SUB1_rrr  | 
934  | 0  |     4196353U, // SUB1_rrs12  | 
935  | 0  |     4196353U, // SUB1_rru6  | 
936  | 0  |     1121722U, // SUB2_cc_f_rru6  | 
937  | 0  |     1154490U, // SUB2_cc_rru6  | 
938  | 0  |     4196601U, // SUB2_f_rrlimm  | 
939  | 0  |     4196601U, // SUB2_f_rrr  | 
940  | 0  |     4196601U, // SUB2_f_rrs12  | 
941  | 0  |     4196601U, // SUB2_f_rru6  | 
942  | 0  |     4196359U, // SUB2_rrlimm  | 
943  | 0  |     4196359U, // SUB2_rrr  | 
944  | 0  |     4196359U, // SUB2_rrs12  | 
945  | 0  |     4196359U, // SUB2_rru6  | 
946  | 0  |     1121728U, // SUB3_cc_f_rru6  | 
947  | 0  |     1154496U, // SUB3_cc_rru6  | 
948  | 0  |     4196609U, // SUB3_f_rrlimm  | 
949  | 0  |     4196609U, // SUB3_f_rrr  | 
950  | 0  |     4196609U, // SUB3_f_rrs12  | 
951  | 0  |     4196609U, // SUB3_f_rru6  | 
952  | 0  |     4196365U, // SUB3_rrlimm  | 
953  | 0  |     4196365U, // SUB3_rrr  | 
954  | 0  |     4196365U, // SUB3_rrs12  | 
955  | 0  |     4196365U, // SUB3_rru6  | 
956  | 0  |     4196993U, // SUB_S_rrr  | 
957  | 0  |     4196993U, // SUB_S_ru3  | 
958  | 0  |     22547073U,  // SUB_S_ru5  | 
959  | 0  |     1121766U, // SUB_cc_f_rru6  | 
960  | 0  |     1154534U, // SUB_cc_rru6  | 
961  | 0  |     4196618U, // SUB_f_rrlimm  | 
962  | 0  |     4196618U, // SUB_f_rrr  | 
963  | 0  |     4196618U, // SUB_f_rrs12  | 
964  | 0  |     4196618U, // SUB_f_rru6  | 
965  | 0  |     4196538U, // SUB_rrlimm  | 
966  | 0  |     4196538U, // SUB_rrr  | 
967  | 0  |     4196538U, // SUB_rrs12  | 
968  | 0  |     4196538U, // SUB_rru6  | 
969  | 0  |     1121891U, // XOR_cc_f_rru6  | 
970  | 0  |     1154659U, // XOR_cc_rru6  | 
971  | 0  |     4196724U, // XOR_f_rrlimm  | 
972  | 0  |     4196724U, // XOR_f_rrr  | 
973  | 0  |     4196724U, // XOR_f_rrs12  | 
974  | 0  |     4196724U, // XOR_f_rru6  | 
975  | 0  |     4196932U, // XOR_rrlimm  | 
976  | 0  |     4196932U, // XOR_rrr  | 
977  | 0  |     4196932U, // XOR_rrs12  | 
978  | 0  |     4196932U, // XOR_rru6  | 
979  | 0  |   };  | 
980  |  |  | 
981  |  |   // Emit the opcode for the instruction.  | 
982  | 0  |   uint32_t Bits = 0;  | 
983  | 0  |   Bits |= OpInfo0[MCInst_getOpcode(MI)] << 0;  | 
984  | 0  |   MnemonicBitsInfo MBI = { | 
985  | 0  | #ifndef CAPSTONE_DIET  | 
986  | 0  |     AsmStrs+(Bits & 2047)-1,  | 
987  |  | #else  | 
988  |  |     NULL,  | 
989  |  | #endif // CAPSTONE_DIET  | 
990  | 0  |     Bits  | 
991  | 0  |   };  | 
992  | 0  |   return MBI;  | 
993  | 0  | }  | 
994  |  |  | 
995  |  | /// printInstruction - This method is automatically generated by tablegen  | 
996  |  | /// from the instruction set description.  | 
997  | 0  | static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { | 
998  | 0  |   SStream_concat0(O, "");  | 
999  | 0  |   MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O);  | 
1000  |  | 
  | 
1001  | 0  |   SStream_concat0(O, MnemonicInfo.first);  | 
1002  |  | 
  | 
1003  | 0  |   uint32_t Bits = MnemonicInfo.second;  | 
1004  | 0  |   CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction.");  | 
1005  |  |  | 
1006  |  |   // Fragment 0 encoded into 4 bits for 10 unique commands.  | 
1007  | 0  |   switch ((Bits >> 11) & 15) { | 
1008  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
1009  | 0  |   case 0:  | 
1010  |  |     // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...  | 
1011  | 0  |     return;  | 
1012  | 0  |     break;  | 
1013  | 0  |   case 1:  | 
1014  |  |     // ADJCALLSTACKDOWN, ADJCALLSTACKUP, CTLZ, CTTZ, GETFI, STB_FAR, STH_FAR,...  | 
1015  | 0  |     printOperand(MI, 0, O);  | 
1016  | 0  |     break;  | 
1017  | 0  |   case 2:  | 
1018  |  |     // BRcc_rr_p, BRcc_ru6_p  | 
1019  | 0  |     printPredicateOperand(MI, 3, O);  | 
1020  | 0  |     SStream_concat0(O, "\t");  | 
1021  | 0  |     printOperand(MI, 1, O);  | 
1022  | 0  |     SStream_concat0(O, ", ");  | 
1023  | 0  |     printOperand(MI, 2, O);  | 
1024  | 0  |     SStream_concat0(O, ", ");  | 
1025  | 0  |     printOperandAddr(MI, Address, 0, O);  | 
1026  | 0  |     return;  | 
1027  | 0  |     break;  | 
1028  | 0  |   case 3:  | 
1029  |  |     // ADC_cc_f_rru6, ADC_cc_rru6, ADD_cc_f_rru6, ADD_cc_rru6, AND_cc_f_rru6,...  | 
1030  | 0  |     printPredicateOperand(MI, 2, O);  | 
1031  | 0  |     break;  | 
1032  | 0  |   case 4:  | 
1033  |  |     // ADD_S_limms3, CMP_S_limms3, STB_AB_rs9, STB_AW_rs9, STB_DI_AB_rs9, STB...  | 
1034  | 0  |     printOperand(MI, 1, O);  | 
1035  | 0  |     break;  | 
1036  | 0  |   case 5:  | 
1037  |  |     // BEQ_S, BGE_S, BGT_S, BHI_S, BHS_S, BL, BLE_S, BLO_S, BLS_S, BLT_S, BL_...  | 
1038  | 0  |     printOperandAddr(MI, Address, 0, O);  | 
1039  | 0  |     return;  | 
1040  | 0  |     break;  | 
1041  | 0  |   case 6:  | 
1042  |  |     // BRcc_rr, BRcc_ru6  | 
1043  | 0  |     printBRCCPredicateOperand(MI, 3, O);  | 
1044  | 0  |     SStream_concat0(O, "\t");  | 
1045  | 0  |     printOperand(MI, 1, O);  | 
1046  | 0  |     SStream_concat0(O, ", ");  | 
1047  | 0  |     printOperand(MI, 2, O);  | 
1048  | 0  |     SStream_concat0(O, ", ");  | 
1049  | 0  |     printOperandAddr(MI, Address, 0, O);  | 
1050  | 0  |     return;  | 
1051  | 0  |     break;  | 
1052  | 0  |   case 7:  | 
1053  |  |     // Bcc  | 
1054  | 0  |     printPredicateOperand(MI, 1, O);  | 
1055  | 0  |     SStream_concat0(O, "\t");  | 
1056  | 0  |     printOperandAddr(MI, Address, 0, O);  | 
1057  | 0  |     return;  | 
1058  | 0  |     break;  | 
1059  | 0  |   case 8:  | 
1060  |  |     // MOV_cc  | 
1061  | 0  |     printCCOperand(MI, 3, O);  | 
1062  | 0  |     SStream_concat0(O, "\t");  | 
1063  | 0  |     printOperand(MI, 0, O);  | 
1064  | 0  |     SStream_concat0(O, ", ");  | 
1065  | 0  |     printOperand(MI, 1, O);  | 
1066  | 0  |     return;  | 
1067  | 0  |     break;  | 
1068  | 0  |   case 9:  | 
1069  |  |     // MOV_cc_f_ru6, MOV_cc_ru6  | 
1070  | 0  |     printCCOperand(MI, 2, O);  | 
1071  | 0  |     break;  | 
1072  | 0  |   }  | 
1073  |  |  | 
1074  |  |  | 
1075  |  |   // Fragment 1 encoded into 4 bits for 10 unique commands.  | 
1076  | 0  |   switch ((Bits >> 15) & 15) { | 
1077  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
1078  | 0  |   case 0:  | 
1079  |  |     // ADJCALLSTACKDOWN, CTLZ, CTTZ, GETFI, STB_FAR, STH_FAR, ST_FAR, ADC_f_r...  | 
1080  | 0  |     SStream_concat0(O, ", ");  | 
1081  | 0  |     break;  | 
1082  | 0  |   case 1:  | 
1083  |  |     // ADJCALLSTACKUP, EI_S, ENTER_S, GEN_TRAP_S, GP_ADD_S, JLI_S, JL_LImm, J...  | 
1084  | 0  |     return;  | 
1085  | 0  |     break;  | 
1086  | 0  |   case 2:  | 
1087  |  |     // ADC_cc_f_rru6, ADD_cc_f_rru6, AND_cc_f_rru6, ASL_cc_f_rru6, ASR_cc_f_r...  | 
1088  | 0  |     SStream_concat0(O, ".f\t");  | 
1089  | 0  |     printOperand(MI, 0, O);  | 
1090  | 0  |     SStream_concat0(O, ", ");  | 
1091  | 0  |     break;  | 
1092  | 0  |   case 3:  | 
1093  |  |     // ADC_cc_rru6, ADD_cc_rru6, AND_cc_rru6, ASL_cc_rru6, ASR_cc_rru6, LSR_c...  | 
1094  | 0  |     SStream_concat0(O, "\t");  | 
1095  | 0  |     printOperand(MI, 0, O);  | 
1096  | 0  |     SStream_concat0(O, ", ");  | 
1097  | 0  |     break;  | 
1098  | 0  |   case 4:  | 
1099  |  |     // BREQ_S, BRNE_S  | 
1100  | 0  |     SStream_concat0(O, ", 0, ");  | 
1101  | 0  |     printOperandAddr(MI, Address, 1, O);  | 
1102  | 0  |     return;  | 
1103  | 0  |     break;  | 
1104  | 0  |   case 5:  | 
1105  |  |     // COMPACT_LD_S, LDB_AB_rs9, LDB_AW_rs9, LDB_DI_AB_rs9, LDB_DI_AW_rs9, LD...  | 
1106  | 0  |     SStream_concat0(O, ", [");  | 
1107  | 0  |     break;  | 
1108  | 0  |   case 6:  | 
1109  |  |     // GEN_JL_S, GEN_JL_S_D, GEN_J_S, GEN_J_S_D, GP_LDB_S, GP_LDH_S, GP_LD_S,...  | 
1110  | 0  |     SStream_concat1(O, ']');  | 
1111  | 0  |     return;  | 
1112  | 0  |     break;  | 
1113  | 0  |   case 7:  | 
1114  |  |     // PCL_LD  | 
1115  | 0  |     SStream_concat0(O, ", [%pcl, ");  | 
1116  | 0  |     printOperand(MI, 1, O);  | 
1117  | 0  |     SStream_concat1(O, ']');  | 
1118  | 0  |     return;  | 
1119  | 0  |     break;  | 
1120  | 0  |   case 8:  | 
1121  |  |     // SP_ADD_S  | 
1122  | 0  |     SStream_concat0(O, ", %sp, ");  | 
1123  | 0  |     printOperand(MI, 1, O);  | 
1124  | 0  |     return;  | 
1125  | 0  |     break;  | 
1126  | 0  |   case 9:  | 
1127  |  |     // SP_LDB_S, SP_LD_S, SP_STB_S, SP_ST_S  | 
1128  | 0  |     SStream_concat0(O, ", [%sp, ");  | 
1129  | 0  |     printOperand(MI, 1, O);  | 
1130  | 0  |     SStream_concat1(O, ']');  | 
1131  | 0  |     return;  | 
1132  | 0  |     break;  | 
1133  | 0  |   }  | 
1134  |  |  | 
1135  |  |  | 
1136  |  |   // Fragment 2 encoded into 3 bits for 6 unique commands.  | 
1137  | 0  |   switch ((Bits >> 19) & 7) { | 
1138  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
1139  | 0  |   case 0:  | 
1140  |  |     // ADJCALLSTACKDOWN, CTLZ, CTTZ, GETFI, ADC_f_rrlimm, ADC_f_rrr, ADC_f_rr...  | 
1141  | 0  |     printOperand(MI, 1, O);  | 
1142  | 0  |     break;  | 
1143  | 0  |   case 1:  | 
1144  |  |     // STB_FAR, STH_FAR, ST_FAR, LDB_DI_rlimm, LDB_DI_rs9, LDB_X_DI_rlimm, LD...  | 
1145  | 0  |     printMemOperandRI(MI, 1, O);  | 
1146  | 0  |     break;  | 
1147  | 0  |   case 2:  | 
1148  |  |     // ADC_cc_f_rru6, ADC_cc_rru6, ADD_cc_f_rru6, ADD_cc_rru6, AND_cc_f_rru6,...  | 
1149  | 0  |     printOperand(MI, 3, O);  | 
1150  | 0  |     SStream_concat0(O, ", ");  | 
1151  | 0  |     printOperand(MI, 1, O);  | 
1152  | 0  |     return;  | 
1153  | 0  |     break;  | 
1154  | 0  |   case 3:  | 
1155  |  |     // ADD_S_limms3, ADD_S_rlimm, ADD_S_rr, ADD_S_rs3, ADD_S_u7, ASL_S_ru5, A...  | 
1156  | 0  |     printOperand(MI, 0, O);  | 
1157  | 0  |     break;  | 
1158  | 0  |   case 4:  | 
1159  |  |     // LDB_AB_rs9, LDB_AW_rs9, LDB_DI_AB_rs9, LDB_DI_AW_rs9, LDB_X_AB_rs9, LD...  | 
1160  | 0  |     printOperand(MI, 2, O);  | 
1161  | 0  |     SStream_concat1(O, ',');  | 
1162  | 0  |     printOperand(MI, 3, O);  | 
1163  | 0  |     SStream_concat1(O, ']');  | 
1164  | 0  |     return;  | 
1165  | 0  |     break;  | 
1166  | 0  |   case 5:  | 
1167  |  |     // MOV_cc_f_ru6, MOV_cc_ru6, MOV_f_ru6  | 
1168  | 0  |     printU6(MI, 1, O);  | 
1169  | 0  |     return;  | 
1170  | 0  |     break;  | 
1171  | 0  |   }  | 
1172  |  |  | 
1173  |  |  | 
1174  |  |   // Fragment 3 encoded into 2 bits for 3 unique commands.  | 
1175  | 0  |   switch ((Bits >> 22) & 3) { | 
1176  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
1177  | 0  |   case 0:  | 
1178  |  |     // ADJCALLSTACKDOWN, CTLZ, CTTZ, GETFI, STB_FAR, STH_FAR, ST_FAR, ADD_S_l...  | 
1179  | 0  |     return;  | 
1180  | 0  |     break;  | 
1181  | 0  |   case 1:  | 
1182  |  |     // ADC_f_rrlimm, ADC_f_rrr, ADC_f_rrs12, ADC_f_rru6, ADC_rrlimm, ADC_rrr,...  | 
1183  | 0  |     SStream_concat0(O, ", ");  | 
1184  | 0  |     break;  | 
1185  | 0  |   case 2:  | 
1186  |  |     // LDB_DI_limm, LDB_DI_rlimm, LDB_DI_rs9, LDB_X_DI_limm, LDB_X_DI_rlimm, ...  | 
1187  | 0  |     SStream_concat1(O, ']');  | 
1188  | 0  |     return;  | 
1189  | 0  |     break;  | 
1190  | 0  |   }  | 
1191  |  |  | 
1192  |  |  | 
1193  |  |   // Fragment 4 encoded into 2 bits for 3 unique commands.  | 
1194  | 0  |   switch ((Bits >> 24) & 3) { | 
1195  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
1196  | 0  |   case 0:  | 
1197  |  |     // ADC_f_rrlimm, ADC_f_rrr, ADC_f_rrs12, ADC_f_rru6, ADC_rrlimm, ADC_rrr,...  | 
1198  | 0  |     printOperand(MI, 2, O);  | 
1199  | 0  |     break;  | 
1200  | 0  |   case 1:  | 
1201  |  |     // ADD_S_rlimm, ADD_S_rr, ADD_S_rs3, ADD_S_u7, ASL_S_ru5, ASR_S_ru5, BCLR...  | 
1202  | 0  |     printOperand(MI, 1, O);  | 
1203  | 0  |     return;  | 
1204  | 0  |     break;  | 
1205  | 0  |   case 2:  | 
1206  |  |     // GEN_SUB_S_NE  | 
1207  | 0  |     printOperand(MI, 0, O);  | 
1208  | 0  |     return;  | 
1209  | 0  |     break;  | 
1210  | 0  |   }  | 
1211  |  |  | 
1212  |  |  | 
1213  |  |   // Fragment 5 encoded into 1 bits for 2 unique commands.  | 
1214  | 0  |   if ((Bits >> 26) & 1) { | 
1215  |  |     // COMPACT_LD_S, LDB_S_OFF, LDB_S_rrr, LDH_S_OFF, LDH_S_X_OFF, LDH_S_rrr,...  | 
1216  | 0  |     SStream_concat1(O, ']');  | 
1217  | 0  |     return;  | 
1218  | 0  |   } else { | 
1219  |  |     // ADC_f_rrlimm, ADC_f_rrr, ADC_f_rrs12, ADC_f_rru6, ADC_rrlimm, ADC_rrr,...  | 
1220  | 0  |     return;  | 
1221  | 0  |   }  | 
1222  |  | 
  | 
1223  | 0  | }  | 
1224  |  |  | 
1225  |  |  | 
1226  |  | /// getRegisterName - This method is automatically generated by tblgen  | 
1227  |  | /// from the register set description.  This returns the assembler name  | 
1228  |  | /// for the specified register.  | 
1229  | 0  | static const char *getRegisterName(unsigned RegNo) { | 
1230  | 0  | #ifndef CAPSTONE_DIET  | 
1231  | 0  |   CS_ASSERT_RET_VAL(RegNo && RegNo < 66 && "Invalid register number!", NULL);  | 
1232  |  |  | 
1233  | 0  |   static const char AsmStrs[] = { | 
1234  | 0  |   /* 0 */ "%r10\0"  | 
1235  | 0  |   /* 5 */ "%r20\0"  | 
1236  | 0  |   /* 10 */ "%r30\0"  | 
1237  | 0  |   /* 15 */ "%r40\0"  | 
1238  | 0  |   /* 20 */ "%r50\0"  | 
1239  | 0  |   /* 25 */ "%r60\0"  | 
1240  | 0  |   /* 30 */ "%r0\0"  | 
1241  | 0  |   /* 34 */ "%r11\0"  | 
1242  | 0  |   /* 39 */ "%r21\0"  | 
1243  | 0  |   /* 44 */ "%r41\0"  | 
1244  | 0  |   /* 49 */ "%r51\0"  | 
1245  | 0  |   /* 54 */ "%r61\0"  | 
1246  | 0  |   /* 59 */ "%r1\0"  | 
1247  | 0  |   /* 63 */ "%r12\0"  | 
1248  | 0  |   /* 68 */ "%r22\0"  | 
1249  | 0  |   /* 73 */ "%r32\0"  | 
1250  | 0  |   /* 78 */ "status32\0"  | 
1251  | 0  |   /* 87 */ "%r42\0"  | 
1252  | 0  |   /* 92 */ "%r52\0"  | 
1253  | 0  |   /* 97 */ "%r62\0"  | 
1254  | 0  |   /* 102 */ "%r2\0"  | 
1255  | 0  |   /* 106 */ "%r13\0"  | 
1256  | 0  |   /* 111 */ "%r23\0"  | 
1257  | 0  |   /* 116 */ "%r33\0"  | 
1258  | 0  |   /* 121 */ "%r43\0"  | 
1259  | 0  |   /* 126 */ "%r53\0"  | 
1260  | 0  |   /* 131 */ "%r63\0"  | 
1261  | 0  |   /* 136 */ "%r3\0"  | 
1262  | 0  |   /* 140 */ "%r14\0"  | 
1263  | 0  |   /* 145 */ "%r24\0"  | 
1264  | 0  |   /* 150 */ "%r34\0"  | 
1265  | 0  |   /* 155 */ "%r44\0"  | 
1266  | 0  |   /* 160 */ "%r54\0"  | 
1267  | 0  |   /* 165 */ "%r4\0"  | 
1268  | 0  |   /* 169 */ "%r15\0"  | 
1269  | 0  |   /* 174 */ "%r25\0"  | 
1270  | 0  |   /* 179 */ "%r35\0"  | 
1271  | 0  |   /* 184 */ "%r45\0"  | 
1272  | 0  |   /* 189 */ "%r55\0"  | 
1273  | 0  |   /* 194 */ "%r5\0"  | 
1274  | 0  |   /* 198 */ "%r16\0"  | 
1275  | 0  |   /* 203 */ "%r36\0"  | 
1276  | 0  |   /* 208 */ "%r46\0"  | 
1277  | 0  |   /* 213 */ "%r56\0"  | 
1278  | 0  |   /* 218 */ "%r6\0"  | 
1279  | 0  |   /* 222 */ "%r17\0"  | 
1280  | 0  |   /* 227 */ "%r37\0"  | 
1281  | 0  |   /* 232 */ "%r47\0"  | 
1282  | 0  |   /* 237 */ "%r57\0"  | 
1283  | 0  |   /* 242 */ "%r7\0"  | 
1284  | 0  |   /* 246 */ "%r18\0"  | 
1285  | 0  |   /* 251 */ "%r38\0"  | 
1286  | 0  |   /* 256 */ "%r48\0"  | 
1287  | 0  |   /* 261 */ "%r58\0"  | 
1288  | 0  |   /* 266 */ "%r8\0"  | 
1289  | 0  |   /* 270 */ "%r19\0"  | 
1290  | 0  |   /* 275 */ "%r39\0"  | 
1291  | 0  |   /* 280 */ "%r49\0"  | 
1292  | 0  |   /* 285 */ "%r59\0"  | 
1293  | 0  |   /* 290 */ "%r9\0"  | 
1294  | 0  |   /* 294 */ "%blink\0"  | 
1295  | 0  |   /* 301 */ "%ilink\0"  | 
1296  | 0  |   /* 308 */ "%fp\0"  | 
1297  | 0  |   /* 312 */ "%gp\0"  | 
1298  | 0  |   /* 316 */ "%sp\0"  | 
1299  | 0  | };  | 
1300  | 0  |   static const uint16_t RegAsmOffset[] = { | 
1301  | 0  |     294, 308, 312, 301, 316, 30, 59, 102, 136, 165, 194, 218, 242, 266,   | 
1302  | 0  |     290, 0, 34, 63, 106, 140, 169, 198, 222, 246, 270, 5, 39, 68,   | 
1303  | 0  |     111, 145, 174, 10, 73, 116, 150, 179, 203, 227, 251, 275, 15, 44,   | 
1304  | 0  |     87, 121, 155, 184, 208, 232, 256, 280, 20, 49, 92, 126, 160, 189,   | 
1305  | 0  |     213, 237, 261, 285, 25, 54, 97, 131, 78,   | 
1306  | 0  |   };  | 
1307  |  | 
  | 
1308  | 0  |   CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) &&  | 
1309  | 0  |           "Invalid alt name index for register!", NULL);  | 
1310  | 0  |   return AsmStrs+RegAsmOffset[RegNo-1];  | 
1311  |  | #else  | 
1312  |  |   return NULL;  | 
1313  |  | #endif // CAPSTONE_DIET  | 
1314  | 0  | }  | 
1315  |  | #ifdef PRINT_ALIAS_INSTR  | 
1316  |  | #undef PRINT_ALIAS_INSTR  | 
1317  |  |  | 
1318  |  | static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { | 
1319  |  | #ifndef CAPSTONE_DIET  | 
1320  |  |   return false;  | 
1321  |  | #endif // CAPSTONE_DIET  | 
1322  |  | }  | 
1323  |  |  | 
1324  |  | #endif // PRINT_ALIAS_INSTR  |