/src/capstonenext/arch/LoongArch/LoongArchGenAsmWriter.inc
Line  | Count  | Source  | 
1  |  | /* Capstone Disassembly Engine, https://www.capstone-engine.org */  | 
2  |  | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */  | 
3  |  | /*    Rot127 <unisono@quyllur.org> 2022-2024 */  | 
4  |  | /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */  | 
5  |  |  | 
6  |  | /* LLVM-commit: <commit> */  | 
7  |  | /* LLVM-tag: <tag> */  | 
8  |  |  | 
9  |  | /* Do not edit. */  | 
10  |  |  | 
11  |  | /* Capstone's LLVM TableGen Backends: */  | 
12  |  | /* https://github.com/capstone-engine/llvm-capstone */  | 
13  |  |  | 
14  |  | #include <capstone/platform.h>  | 
15  |  | #include "../../cs_priv.h"  | 
16  |  |  | 
17  |  | /// getMnemonic - This method is automatically generated by tablegen  | 
18  |  | /// from the instruction set description.  | 
19  | 0  | static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { | 
20  | 0  | #ifndef CAPSTONE_DIET  | 
21  | 0  |   static const char AsmStrs[] = { | 
22  | 0  |   /* 0 */ "jiscr0\t\0"  | 
23  | 0  |   /* 8 */ "jiscr1\t\0"  | 
24  | 0  |   /* 16 */ "tail36\t\0"  | 
25  | 0  |   /* 24 */ "call36\t\0"  | 
26  | 0  |   /* 32 */ "xvreplve0.b\t\0"  | 
27  | 0  |   /* 45 */ "xvadda.b\t\0"  | 
28  | 0  |   /* 55 */ "x86sra.b\t\0"  | 
29  | 0  |   /* 65 */ "xvsra.b\t\0"  | 
30  | 0  |   /* 74 */ "amadd_db.b\t\0"  | 
31  | 0  |   /* 86 */ "amswap_db.b\t\0"  | 
32  | 0  |   /* 99 */ "amcas_db.b\t\0"  | 
33  | 0  |   /* 111 */ "x86sub.b\t\0"  | 
34  | 0  |   /* 121 */ "xvmsub.b\t\0"  | 
35  | 0  |   /* 131 */ "xvssub.b\t\0"  | 
36  | 0  |   /* 141 */ "xvsub.b\t\0"  | 
37  | 0  |   /* 150 */ "x86sbc.b\t\0"  | 
38  | 0  |   /* 160 */ "x86adc.b\t\0"  | 
39  | 0  |   /* 170 */ "x86dec.b\t\0"  | 
40  | 0  |   /* 180 */ "x86inc.b\t\0"  | 
41  | 0  |   /* 190 */ "vext2xv.d.b\t\0"  | 
42  | 0  |   /* 203 */ "x86add.b\t\0"  | 
43  | 0  |   /* 213 */ "amadd.b\t\0"  | 
44  | 0  |   /* 222 */ "xvmadd.b\t\0"  | 
45  | 0  |   /* 232 */ "xvsadd.b\t\0"  | 
46  | 0  |   /* 242 */ "xvadd.b\t\0"  | 
47  | 0  |   /* 251 */ "ld.b\t\0"  | 
48  | 0  |   /* 257 */ "x86and.b\t\0"  | 
49  | 0  |   /* 267 */ "xvpackod.b\t\0"  | 
50  | 0  |   /* 279 */ "xvpickod.b\t\0"  | 
51  | 0  |   /* 291 */ "xvmod.b\t\0"  | 
52  | 0  |   /* 300 */ "iocsrrd.b\t\0"  | 
53  | 0  |   /* 311 */ "xvabsd.b\t\0"  | 
54  | 0  |   /* 321 */ "ldle.b\t\0"  | 
55  | 0  |   /* 329 */ "xvsle.b\t\0"  | 
56  | 0  |   /* 338 */ "stle.b\t\0"  | 
57  | 0  |   /* 346 */ "xvreplve.b\t\0"  | 
58  | 0  |   /* 358 */ "xvshuf.b\t\0"  | 
59  | 0  |   /* 368 */ "xvneg.b\t\0"  | 
60  | 0  |   /* 377 */ "xvavg.b\t\0"  | 
61  | 0  |   /* 386 */ "xvsubwod.h.b\t\0"  | 
62  | 0  |   /* 400 */ "xvmaddwod.h.b\t\0"  | 
63  | 0  |   /* 415 */ "xvaddwod.h.b\t\0"  | 
64  | 0  |   /* 429 */ "xvmulwod.h.b\t\0"  | 
65  | 0  |   /* 443 */ "xvexth.h.b\t\0"  | 
66  | 0  |   /* 455 */ "xvsllwil.h.b\t\0"  | 
67  | 0  |   /* 469 */ "xvsubwev.h.b\t\0"  | 
68  | 0  |   /* 483 */ "xvmaddwev.h.b\t\0"  | 
69  | 0  |   /* 498 */ "xvaddwev.h.b\t\0"  | 
70  | 0  |   /* 512 */ "xvmulwev.h.b\t\0"  | 
71  | 0  |   /* 526 */ "vext2xv.h.b\t\0"  | 
72  | 0  |   /* 539 */ "xvhsubw.h.b\t\0"  | 
73  | 0  |   /* 552 */ "xvhaddw.h.b\t\0"  | 
74  | 0  |   /* 565 */ "xvmuh.b\t\0"  | 
75  | 0  |   /* 574 */ "xvilvh.b\t\0"  | 
76  | 0  |   /* 584 */ "xvshuf4i.b\t\0"  | 
77  | 0  |   /* 596 */ "x86srai.b\t\0"  | 
78  | 0  |   /* 607 */ "xvsrai.b\t\0"  | 
79  | 0  |   /* 617 */ "xvandi.b\t\0"  | 
80  | 0  |   /* 627 */ "xvslei.b\t\0"  | 
81  | 0  |   /* 637 */ "xvrepl128vei.b\t\0"  | 
82  | 0  |   /* 653 */ "vreplvei.b\t\0"  | 
83  | 0  |   /* 665 */ "x86rcli.b\t\0"  | 
84  | 0  |   /* 676 */ "xvbitseli.b\t\0"  | 
85  | 0  |   /* 689 */ "x86slli.b\t\0"  | 
86  | 0  |   /* 700 */ "xvslli.b\t\0"  | 
87  | 0  |   /* 710 */ "xvrepli.b\t\0"  | 
88  | 0  |   /* 721 */ "x86srli.b\t\0"  | 
89  | 0  |   /* 732 */ "xvsrli.b\t\0"  | 
90  | 0  |   /* 742 */ "x86rotli.b\t\0"  | 
91  | 0  |   /* 754 */ "xvmini.b\t\0"  | 
92  | 0  |   /* 764 */ "xvfrstpi.b\t\0"  | 
93  | 0  |   /* 776 */ "xvseqi.b\t\0"  | 
94  | 0  |   /* 786 */ "xvsrari.b\t\0"  | 
95  | 0  |   /* 797 */ "x86rcri.b\t\0"  | 
96  | 0  |   /* 808 */ "xvbitclri.b\t\0"  | 
97  | 0  |   /* 821 */ "xvsrlri.b\t\0"  | 
98  | 0  |   /* 832 */ "xvnori.b\t\0"  | 
99  | 0  |   /* 842 */ "xvori.b\t\0"  | 
100  | 0  |   /* 851 */ "xvxori.b\t\0"  | 
101  | 0  |   /* 861 */ "x86rotri.b\t\0"  | 
102  | 0  |   /* 873 */ "xvrotri.b\t\0"  | 
103  | 0  |   /* 884 */ "xvbitseti.b\t\0"  | 
104  | 0  |   /* 897 */ "xvslti.b\t\0"  | 
105  | 0  |   /* 907 */ "xvbitrevi.b\t\0"  | 
106  | 0  |   /* 920 */ "xvmaxi.b\t\0"  | 
107  | 0  |   /* 930 */ "x86rcl.b\t\0"  | 
108  | 0  |   /* 940 */ "x86sll.b\t\0"  | 
109  | 0  |   /* 950 */ "xvsll.b\t\0"  | 
110  | 0  |   /* 959 */ "xvldrepl.b\t\0"  | 
111  | 0  |   /* 971 */ "x86srl.b\t\0"  | 
112  | 0  |   /* 981 */ "xvsrl.b\t\0"  | 
113  | 0  |   /* 990 */ "x86rotl.b\t\0"  | 
114  | 0  |   /* 1001 */ "x86mul.b\t\0"  | 
115  | 0  |   /* 1011 */ "xvmul.b\t\0"  | 
116  | 0  |   /* 1020 */ "xvilvl.b\t\0"  | 
117  | 0  |   /* 1030 */ "xvstelm.b\t\0"  | 
118  | 0  |   /* 1041 */ "xvmin.b\t\0"  | 
119  | 0  |   /* 1050 */ "xvclo.b\t\0"  | 
120  | 0  |   /* 1059 */ "amswap.b\t\0"  | 
121  | 0  |   /* 1069 */ "xvfrstp.b\t\0"  | 
122  | 0  |   /* 1080 */ "xvseq.b\t\0"  | 
123  | 0  |   /* 1089 */ "xvsrar.b\t\0"  | 
124  | 0  |   /* 1099 */ "x86rcr.b\t\0"  | 
125  | 0  |   /* 1109 */ "vpickve2gr.b\t\0"  | 
126  | 0  |   /* 1123 */ "xvavgr.b\t\0"  | 
127  | 0  |   /* 1133 */ "xvbitclr.b\t\0"  | 
128  | 0  |   /* 1145 */ "xvsrlr.b\t\0"  | 
129  | 0  |   /* 1155 */ "x86or.b\t\0"  | 
130  | 0  |   /* 1164 */ "x86xor.b\t\0"  | 
131  | 0  |   /* 1174 */ "x86rotr.b\t\0"  | 
132  | 0  |   /* 1185 */ "xvrotr.b\t\0"  | 
133  | 0  |   /* 1195 */ "xvreplgr2vr.b\t\0"  | 
134  | 0  |   /* 1210 */ "vinsgr2vr.b\t\0"  | 
135  | 0  |   /* 1223 */ "iocsrwr.b\t\0"  | 
136  | 0  |   /* 1234 */ "amcas.b\t\0"  | 
137  | 0  |   /* 1243 */ "xvextrins.b\t\0"  | 
138  | 0  |   /* 1256 */ "xvsat.b\t\0"  | 
139  | 0  |   /* 1265 */ "xvbitset.b\t\0"  | 
140  | 0  |   /* 1277 */ "ldgt.b\t\0"  | 
141  | 0  |   /* 1285 */ "stgt.b\t\0"  | 
142  | 0  |   /* 1293 */ "xvslt.b\t\0"  | 
143  | 0  |   /* 1302 */ "xvpcnt.b\t\0"  | 
144  | 0  |   /* 1312 */ "st.b\t\0"  | 
145  | 0  |   /* 1318 */ "xvmaddwod.h.bu.b\t\0"  | 
146  | 0  |   /* 1336 */ "xvaddwod.h.bu.b\t\0"  | 
147  | 0  |   /* 1353 */ "xvmulwod.h.bu.b\t\0"  | 
148  | 0  |   /* 1370 */ "xvmaddwev.h.bu.b\t\0"  | 
149  | 0  |   /* 1388 */ "xvaddwev.h.bu.b\t\0"  | 
150  | 0  |   /* 1405 */ "xvmulwev.h.bu.b\t\0"  | 
151  | 0  |   /* 1422 */ "xvpackev.b\t\0"  | 
152  | 0  |   /* 1434 */ "xvpickev.b\t\0"  | 
153  | 0  |   /* 1446 */ "xvbitrev.b\t\0"  | 
154  | 0  |   /* 1458 */ "xvdiv.b\t\0"  | 
155  | 0  |   /* 1467 */ "xvsigncov.b\t\0"  | 
156  | 0  |   /* 1480 */ "ext.w.b\t\0"  | 
157  | 0  |   /* 1489 */ "vext2xv.w.b\t\0"  | 
158  | 0  |   /* 1502 */ "xvmax.b\t\0"  | 
159  | 0  |   /* 1511 */ "ldx.b\t\0"  | 
160  | 0  |   /* 1518 */ "stx.b\t\0"  | 
161  | 0  |   /* 1525 */ "xvmskgez.b\t\0"  | 
162  | 0  |   /* 1537 */ "xvsetallnez.b\t\0"  | 
163  | 0  |   /* 1552 */ "xvclz.b\t\0"  | 
164  | 0  |   /* 1561 */ "xvmsknz.b\t\0"  | 
165  | 0  |   /* 1572 */ "xvsetanyeqz.b\t\0"  | 
166  | 0  |   /* 1587 */ "xvmskltz.b\t\0"  | 
167  | 0  |   /* 1599 */ "bitrev.4b\t\0"  | 
168  | 0  |   /* 1610 */ "bitrev.8b\t\0"  | 
169  | 0  |   /* 1621 */ "invtlb\t\0"  | 
170  | 0  |   /* 1629 */ "xvreplve0.d\t\0"  | 
171  | 0  |   /* 1642 */ "xvinsve0.d\t\0"  | 
172  | 0  |   /* 1654 */ "xvadda.d\t\0"  | 
173  | 0  |   /* 1664 */ "xvfmina.d\t\0"  | 
174  | 0  |   /* 1675 */ "x86sra.d\t\0"  | 
175  | 0  |   /* 1685 */ "xvsra.d\t\0"  | 
176  | 0  |   /* 1694 */ "xvfmaxa.d\t\0"  | 
177  | 0  |   /* 1705 */ "amadd_db.d\t\0"  | 
178  | 0  |   /* 1717 */ "amand_db.d\t\0"  | 
179  | 0  |   /* 1729 */ "ammin_db.d\t\0"  | 
180  | 0  |   /* 1741 */ "amswap_db.d\t\0"  | 
181  | 0  |   /* 1754 */ "amor_db.d\t\0"  | 
182  | 0  |   /* 1765 */ "amxor_db.d\t\0"  | 
183  | 0  |   /* 1777 */ "amcas_db.d\t\0"  | 
184  | 0  |   /* 1789 */ "ammax_db.d\t\0"  | 
185  | 0  |   /* 1801 */ "fscaleb.d\t\0"  | 
186  | 0  |   /* 1812 */ "xvflogb.d\t\0"  | 
187  | 0  |   /* 1823 */ "x86sub.d\t\0"  | 
188  | 0  |   /* 1833 */ "xvfsub.d\t\0"  | 
189  | 0  |   /* 1843 */ "xvfmsub.d\t\0"  | 
190  | 0  |   /* 1854 */ "xvfnmsub.d\t\0"  | 
191  | 0  |   /* 1866 */ "xvmsub.d\t\0"  | 
192  | 0  |   /* 1876 */ "xvssub.d\t\0"  | 
193  | 0  |   /* 1886 */ "xvsub.d\t\0"  | 
194  | 0  |   /* 1895 */ "revb.d\t\0"  | 
195  | 0  |   /* 1903 */ "x86sbc.d\t\0"  | 
196  | 0  |   /* 1913 */ "x86adc.d\t\0"  | 
197  | 0  |   /* 1923 */ "x86dec.d\t\0"  | 
198  | 0  |   /* 1933 */ "x86inc.d\t\0"  | 
199  | 0  |   /* 1943 */ "sc.d\t\0"  | 
200  | 0  |   /* 1949 */ "x86add.d\t\0"  | 
201  | 0  |   /* 1959 */ "xvfadd.d\t\0"  | 
202  | 0  |   /* 1969 */ "amadd.d\t\0"  | 
203  | 0  |   /* 1978 */ "xvfmadd.d\t\0"  | 
204  | 0  |   /* 1989 */ "xvfnmadd.d\t\0"  | 
205  | 0  |   /* 2001 */ "xvmadd.d\t\0"  | 
206  | 0  |   /* 2011 */ "xvsadd.d\t\0"  | 
207  | 0  |   /* 2021 */ "xvadd.d\t\0"  | 
208  | 0  |   /* 2030 */ "fcvt.ld.d\t\0"  | 
209  | 0  |   /* 2041 */ "fld.d\t\0"  | 
210  | 0  |   /* 2048 */ "x86and.d\t\0"  | 
211  | 0  |   /* 2058 */ "amand.d\t\0"  | 
212  | 0  |   /* 2067 */ "xvpackod.d\t\0"  | 
213  | 0  |   /* 2079 */ "xvpickod.d\t\0"  | 
214  | 0  |   /* 2091 */ "xvmod.d\t\0"  | 
215  | 0  |   /* 2100 */ "iocsrrd.d\t\0"  | 
216  | 0  |   /* 2111 */ "xvabsd.d\t\0"  | 
217  | 0  |   /* 2121 */ "fcvt.ud.d\t\0"  | 
218  | 0  |   /* 2132 */ "xvfcmp.cle.d\t\0"  | 
219  | 0  |   /* 2146 */ "fldle.d\t\0"  | 
220  | 0  |   /* 2155 */ "xvfcmp.sle.d\t\0"  | 
221  | 0  |   /* 2169 */ "xvsle.d\t\0"  | 
222  | 0  |   /* 2178 */ "asrtle.d\t\0"  | 
223  | 0  |   /* 2188 */ "fstle.d\t\0"  | 
224  | 0  |   /* 2197 */ "xvfcmp.cule.d\t\0"  | 
225  | 0  |   /* 2212 */ "xvfcmp.sule.d\t\0"  | 
226  | 0  |   /* 2227 */ "rdtime.d\t\0"  | 
227  | 0  |   /* 2237 */ "xvfcmp.cne.d\t\0"  | 
228  | 0  |   /* 2251 */ "xvfrintrne.d\t\0"  | 
229  | 0  |   /* 2265 */ "xvfcmp.sne.d\t\0"  | 
230  | 0  |   /* 2279 */ "xvfcmp.cune.d\t\0"  | 
231  | 0  |   /* 2294 */ "xvfcmp.sune.d\t\0"  | 
232  | 0  |   /* 2309 */ "xvfrecipe.d\t\0"  | 
233  | 0  |   /* 2322 */ "xvfrsqrte.d\t\0"  | 
234  | 0  |   /* 2335 */ "xvpickve.d\t\0"  | 
235  | 0  |   /* 2347 */ "xvreplve.d\t\0"  | 
236  | 0  |   /* 2359 */ "xvfcmp.caf.d\t\0"  | 
237  | 0  |   /* 2373 */ "xvfcmp.saf.d\t\0"  | 
238  | 0  |   /* 2387 */ "xvshuf.d\t\0"  | 
239  | 0  |   /* 2397 */ "fneg.d\t\0"  | 
240  | 0  |   /* 2405 */ "xvneg.d\t\0"  | 
241  | 0  |   /* 2414 */ "xvavg.d\t\0"  | 
242  | 0  |   /* 2423 */ "mulh.d\t\0"  | 
243  | 0  |   /* 2431 */ "xvmuh.d\t\0"  | 
244  | 0  |   /* 2440 */ "revh.d\t\0"  | 
245  | 0  |   /* 2448 */ "xvilvh.d\t\0"  | 
246  | 0  |   /* 2458 */ "addu12i.d\t\0"  | 
247  | 0  |   /* 2469 */ "lu32i.d\t\0"  | 
248  | 0  |   /* 2478 */ "lu52i.d\t\0"  | 
249  | 0  |   /* 2487 */ "xvshuf4i.d\t\0"  | 
250  | 0  |   /* 2499 */ "addu16i.d\t\0"  | 
251  | 0  |   /* 2510 */ "x86srai.d\t\0"  | 
252  | 0  |   /* 2521 */ "xvsrai.d\t\0"  | 
253  | 0  |   /* 2531 */ "addi.d\t\0"  | 
254  | 0  |   /* 2539 */ "xvslei.d\t\0"  | 
255  | 0  |   /* 2549 */ "xvrepl128vei.d\t\0"  | 
256  | 0  |   /* 2565 */ "vreplvei.d\t\0"  | 
257  | 0  |   /* 2577 */ "x86rcli.d\t\0"  | 
258  | 0  |   /* 2588 */ "xvhseli.d\t\0"  | 
259  | 0  |   /* 2599 */ "x86slli.d\t\0"  | 
260  | 0  |   /* 2610 */ "xvslli.d\t\0"  | 
261  | 0  |   /* 2620 */ "xvrepli.d\t\0"  | 
262  | 0  |   /* 2631 */ "x86srli.d\t\0"  | 
263  | 0  |   /* 2642 */ "xvsrli.d\t\0"  | 
264  | 0  |   /* 2652 */ "x86rotli.d\t\0"  | 
265  | 0  |   /* 2664 */ "xvpermi.d\t\0"  | 
266  | 0  |   /* 2675 */ "xvmini.d\t\0"  | 
267  | 0  |   /* 2685 */ "xvseqi.d\t\0"  | 
268  | 0  |   /* 2695 */ "xvsrari.d\t\0"  | 
269  | 0  |   /* 2706 */ "x86rcri.d\t\0"  | 
270  | 0  |   /* 2717 */ "xvbitclri.d\t\0"  | 
271  | 0  |   /* 2730 */ "xvsrlri.d\t\0"  | 
272  | 0  |   /* 2741 */ "x86rotri.d\t\0"  | 
273  | 0  |   /* 2753 */ "xvrotri.d\t\0"  | 
274  | 0  |   /* 2764 */ "xvbitseti.d\t\0"  | 
275  | 0  |   /* 2777 */ "xvslti.d\t\0"  | 
276  | 0  |   /* 2787 */ "xvbitrevi.d\t\0"  | 
277  | 0  |   /* 2800 */ "xvmaxi.d\t\0"  | 
278  | 0  |   /* 2810 */ "bytepick.d\t\0"  | 
279  | 0  |   /* 2822 */ "bstrpick.d\t\0"  | 
280  | 0  |   /* 2834 */ "xvftintrne.l.d\t\0"  | 
281  | 0  |   /* 2850 */ "xvftintrm.l.d\t\0"  | 
282  | 0  |   /* 2865 */ "xvftintrp.l.d\t\0"  | 
283  | 0  |   /* 2880 */ "xvftint.l.d\t\0"  | 
284  | 0  |   /* 2893 */ "xvftintrz.l.d\t\0"  | 
285  | 0  |   /* 2908 */ "x86rcl.d\t\0"  | 
286  | 0  |   /* 2918 */ "ldl.d\t\0"  | 
287  | 0  |   /* 2925 */ "screl.d\t\0"  | 
288  | 0  |   /* 2934 */ "x86sll.d\t\0"  | 
289  | 0  |   /* 2944 */ "xvsll.d\t\0"  | 
290  | 0  |   /* 2953 */ "xvldrepl.d\t\0"  | 
291  | 0  |   /* 2965 */ "x86srl.d\t\0"  | 
292  | 0  |   /* 2975 */ "xvsrl.d\t\0"  | 
293  | 0  |   /* 2984 */ "alsl.d\t\0"  | 
294  | 0  |   /* 2992 */ "x86rotl.d\t\0"  | 
295  | 0  |   /* 3003 */ "stl.d\t\0"  | 
296  | 0  |   /* 3010 */ "x86mul.d\t\0"  | 
297  | 0  |   /* 3020 */ "xvfmul.d\t\0"  | 
298  | 0  |   /* 3030 */ "xvmul.d\t\0"  | 
299  | 0  |   /* 3039 */ "xvilvl.d\t\0"  | 
300  | 0  |   /* 3049 */ "xvstelm.d\t\0"  | 
301  | 0  |   /* 3060 */ "xvfrintrm.d\t\0"  | 
302  | 0  |   /* 3073 */ "fcopysign.d\t\0"  | 
303  | 0  |   /* 3086 */ "xvfmin.d\t\0"  | 
304  | 0  |   /* 3096 */ "ammin.d\t\0"  | 
305  | 0  |   /* 3105 */ "xvmin.d\t\0"  | 
306  | 0  |   /* 3114 */ "xvfcmp.cun.d\t\0"  | 
307  | 0  |   /* 3128 */ "xvfcmp.sun.d\t\0"  | 
308  | 0  |   /* 3142 */ "xvclo.d\t\0"  | 
309  | 0  |   /* 3151 */ "cto.d\t\0"  | 
310  | 0  |   /* 3158 */ "amswap.d\t\0"  | 
311  | 0  |   /* 3168 */ "xvfrecip.d\t\0"  | 
312  | 0  |   /* 3180 */ "xvfrintrp.d\t\0"  | 
313  | 0  |   /* 3193 */ "xvsubwod.q.d\t\0"  | 
314  | 0  |   /* 3207 */ "xvmaddwod.q.d\t\0"  | 
315  | 0  |   /* 3222 */ "xvaddwod.q.d\t\0"  | 
316  | 0  |   /* 3236 */ "xvmulwod.q.d\t\0"  | 
317  | 0  |   /* 3250 */ "xvexth.q.d\t\0"  | 
318  | 0  |   /* 3262 */ "xvextl.q.d\t\0"  | 
319  | 0  |   /* 3274 */ "xvsubwev.q.d\t\0"  | 
320  | 0  |   /* 3288 */ "xvmaddwev.q.d\t\0"  | 
321  | 0  |   /* 3303 */ "xvaddwev.q.d\t\0"  | 
322  | 0  |   /* 3317 */ "xvmulwev.q.d\t\0"  | 
323  | 0  |   /* 3331 */ "xvhsubw.q.d\t\0"  | 
324  | 0  |   /* 3344 */ "xvhaddw.q.d\t\0"  | 
325  | 0  |   /* 3357 */ "llacq.d\t\0"  | 
326  | 0  |   /* 3366 */ "xvfcmp.ceq.d\t\0"  | 
327  | 0  |   /* 3380 */ "xvfcmp.seq.d\t\0"  | 
328  | 0  |   /* 3394 */ "xvseq.d\t\0"  | 
329  | 0  |   /* 3403 */ "xvfcmp.cueq.d\t\0"  | 
330  | 0  |   /* 3418 */ "xvfcmp.sueq.d\t\0"  | 
331  | 0  |   /* 3433 */ "xvsrar.d\t\0"  | 
332  | 0  |   /* 3443 */ "x86rcr.d\t\0"  | 
333  | 0  |   /* 3453 */ "ldr.d\t\0"  | 
334  | 0  |   /* 3460 */ "movgr2fr.d\t\0"  | 
335  | 0  |   /* 3472 */ "xvpickve2gr.d\t\0"  | 
336  | 0  |   /* 3487 */ "movfr2gr.d\t\0"  | 
337  | 0  |   /* 3499 */ "xvavgr.d\t\0"  | 
338  | 0  |   /* 3509 */ "xvbitclr.d\t\0"  | 
339  | 0  |   /* 3521 */ "xvsrlr.d\t\0"  | 
340  | 0  |   /* 3531 */ "x86or.d\t\0"  | 
341  | 0  |   /* 3540 */ "xvfcmp.cor.d\t\0"  | 
342  | 0  |   /* 3554 */ "amor.d\t\0"  | 
343  | 0  |   /* 3562 */ "xvfcmp.sor.d\t\0"  | 
344  | 0  |   /* 3576 */ "x86xor.d\t\0"  | 
345  | 0  |   /* 3586 */ "amxor.d\t\0"  | 
346  | 0  |   /* 3595 */ "x86rotr.d\t\0"  | 
347  | 0  |   /* 3606 */ "xvrotr.d\t\0"  | 
348  | 0  |   /* 3616 */ "ldptr.d\t\0"  | 
349  | 0  |   /* 3625 */ "stptr.d\t\0"  | 
350  | 0  |   /* 3634 */ "str.d\t\0"  | 
351  | 0  |   /* 3641 */ "xvreplgr2vr.d\t\0"  | 
352  | 0  |   /* 3656 */ "xvinsgr2vr.d\t\0"  | 
353  | 0  |   /* 3670 */ "iocsrwr.d\t\0"  | 
354  | 0  |   /* 3681 */ "xvfcvt.s.d\t\0"  | 
355  | 0  |   /* 3693 */ "amcas.d\t\0"  | 
356  | 0  |   /* 3702 */ "fabs.d\t\0"  | 
357  | 0  |   /* 3710 */ "bstrins.d\t\0"  | 
358  | 0  |   /* 3721 */ "xvextrins.d\t\0"  | 
359  | 0  |   /* 3734 */ "xvfclass.d\t\0"  | 
360  | 0  |   /* 3746 */ "xvsat.d\t\0"  | 
361  | 0  |   /* 3755 */ "xvbitset.d\t\0"  | 
362  | 0  |   /* 3767 */ "fldgt.d\t\0"  | 
363  | 0  |   /* 3776 */ "asrtgt.d\t\0"  | 
364  | 0  |   /* 3786 */ "fstgt.d\t\0"  | 
365  | 0  |   /* 3795 */ "xvfcmp.clt.d\t\0"  | 
366  | 0  |   /* 3809 */ "xvfcmp.slt.d\t\0"  | 
367  | 0  |   /* 3823 */ "xvslt.d\t\0"  | 
368  | 0  |   /* 3832 */ "xvfcmp.cult.d\t\0"  | 
369  | 0  |   /* 3847 */ "xvfcmp.sult.d\t\0"  | 
370  | 0  |   /* 3862 */ "xvpcnt.d\t\0"  | 
371  | 0  |   /* 3872 */ "xvfrint.d\t\0"  | 
372  | 0  |   /* 3883 */ "xvfsqrt.d\t\0"  | 
373  | 0  |   /* 3894 */ "xvfrsqrt.d\t\0"  | 
374  | 0  |   /* 3906 */ "fst.d\t\0"  | 
375  | 0  |   /* 3913 */ "xvmaddwod.q.du.d\t\0"  | 
376  | 0  |   /* 3931 */ "xvaddwod.q.du.d\t\0"  | 
377  | 0  |   /* 3948 */ "xvmulwod.q.du.d\t\0"  | 
378  | 0  |   /* 3965 */ "xvmaddwev.q.du.d\t\0"  | 
379  | 0  |   /* 3983 */ "xvaddwev.q.du.d\t\0"  | 
380  | 0  |   /* 4000 */ "xvmulwev.q.du.d\t\0"  | 
381  | 0  |   /* 4017 */ "xvftint.lu.d\t\0"  | 
382  | 0  |   /* 4031 */ "xvftintrz.lu.d\t\0"  | 
383  | 0  |   /* 4047 */ "xvssrani.wu.d\t\0"  | 
384  | 0  |   /* 4062 */ "xvssrlni.wu.d\t\0"  | 
385  | 0  |   /* 4077 */ "xvssrarni.wu.d\t\0"  | 
386  | 0  |   /* 4093 */ "xvssrlrni.wu.d\t\0"  | 
387  | 0  |   /* 4109 */ "xvssran.wu.d\t\0"  | 
388  | 0  |   /* 4123 */ "xvssrln.wu.d\t\0"  | 
389  | 0  |   /* 4137 */ "xvssrarn.wu.d\t\0"  | 
390  | 0  |   /* 4152 */ "xvssrlrn.wu.d\t\0"  | 
391  | 0  |   /* 4167 */ "xvpackev.d\t\0"  | 
392  | 0  |   /* 4179 */ "xvpickev.d\t\0"  | 
393  | 0  |   /* 4191 */ "xvbitrev.d\t\0"  | 
394  | 0  |   /* 4203 */ "xvfdiv.d\t\0"  | 
395  | 0  |   /* 4213 */ "xvdiv.d\t\0"  | 
396  | 0  |   /* 4222 */ "xvsigncov.d\t\0"  | 
397  | 0  |   /* 4235 */ "fmov.d\t\0"  | 
398  | 0  |   /* 4243 */ "armmov.d\t\0"  | 
399  | 0  |   /* 4253 */ "xvftintrne.w.d\t\0"  | 
400  | 0  |   /* 4269 */ "xvssrani.w.d\t\0"  | 
401  | 0  |   /* 4283 */ "xvsrani.w.d\t\0"  | 
402  | 0  |   /* 4296 */ "xvssrlni.w.d\t\0"  | 
403  | 0  |   /* 4310 */ "xvsrlni.w.d\t\0"  | 
404  | 0  |   /* 4323 */ "xvssrarni.w.d\t\0"  | 
405  | 0  |   /* 4338 */ "xvsrarni.w.d\t\0"  | 
406  | 0  |   /* 4352 */ "xvssrlrni.w.d\t\0"  | 
407  | 0  |   /* 4367 */ "xvsrlrni.w.d\t\0"  | 
408  | 0  |   /* 4381 */ "xvftintrm.w.d\t\0"  | 
409  | 0  |   /* 4396 */ "xvssran.w.d\t\0"  | 
410  | 0  |   /* 4409 */ "xvsran.w.d\t\0"  | 
411  | 0  |   /* 4421 */ "xvssrln.w.d\t\0"  | 
412  | 0  |   /* 4434 */ "xvsrln.w.d\t\0"  | 
413  | 0  |   /* 4446 */ "xvssrarn.w.d\t\0"  | 
414  | 0  |   /* 4460 */ "xvsrarn.w.d\t\0"  | 
415  | 0  |   /* 4473 */ "xvssrlrn.w.d\t\0"  | 
416  | 0  |   /* 4487 */ "xvsrlrn.w.d\t\0"  | 
417  | 0  |   /* 4500 */ "xvftintrp.w.d\t\0"  | 
418  | 0  |   /* 4515 */ "xvftint.w.d\t\0"  | 
419  | 0  |   /* 4528 */ "xvftintrz.w.d\t\0"  | 
420  | 0  |   /* 4543 */ "xvfmax.d\t\0"  | 
421  | 0  |   /* 4553 */ "ammax.d\t\0"  | 
422  | 0  |   /* 4562 */ "xvmax.d\t\0"  | 
423  | 0  |   /* 4571 */ "fldx.d\t\0"  | 
424  | 0  |   /* 4579 */ "fstx.d\t\0"  | 
425  | 0  |   /* 4587 */ "xvsetallnez.d\t\0"  | 
426  | 0  |   /* 4602 */ "xvclz.d\t\0"  | 
427  | 0  |   /* 4611 */ "xvsetanyeqz.d\t\0"  | 
428  | 0  |   /* 4626 */ "xvfrintrz.d\t\0"  | 
429  | 0  |   /* 4639 */ "ctz.d\t\0"  | 
430  | 0  |   /* 4646 */ "xvmskltz.d\t\0"  | 
431  | 0  |   /* 4658 */ "la.tls.gd\t\0"  | 
432  | 0  |   /* 4669 */ "fcvt.d.ld\t\0"  | 
433  | 0  |   /* 4680 */ "la.tls.ld\t\0"  | 
434  | 0  |   /* 4691 */ "preld\t\0"  | 
435  | 0  |   /* 4698 */ "xvld\t\0"  | 
436  | 0  |   /* 4704 */ "and\t\0"  | 
437  | 0  |   /* 4709 */ "tlbrd\t\0"  | 
438  | 0  |   /* 4716 */ "gcsrrd\t\0"  | 
439  | 0  |   /* 4724 */ "bge\t\0"  | 
440  | 0  |   /* 4729 */ "la.tls.ie\t\0"  | 
441  | 0  |   /* 4740 */ "la.tls.le\t\0"  | 
442  | 0  |   /* 4751 */ "idle\t\0"  | 
443  | 0  |   /* 4757 */ "bne\t\0"  | 
444  | 0  |   /* 4762 */ "setx86loopne\t\0"  | 
445  | 0  |   /* 4776 */ "setx86loope\t\0"  | 
446  | 0  |   /* 4789 */ "ldpte\t\0"  | 
447  | 0  |   /* 4796 */ "armmove\t\0"  | 
448  | 0  |   /* 4805 */ "movfr2cf\t\0"  | 
449  | 0  |   /* 4815 */ "movgr2cf\t\0"  | 
450  | 0  |   /* 4825 */ "x86mfflag\t\0"  | 
451  | 0  |   /* 4836 */ "armmfflag\t\0"  | 
452  | 0  |   /* 4847 */ "x86mtflag\t\0"  | 
453  | 0  |   /* 4858 */ "armmtflag\t\0"  | 
454  | 0  |   /* 4869 */ "x86settag\t\0"  | 
455  | 0  |   /* 4880 */ "cpucfg\t\0"  | 
456  | 0  |   /* 4888 */ "gcsrxchg\t\0"  | 
457  | 0  |   /* 4898 */ "xvreplve0.h\t\0"  | 
458  | 0  |   /* 4911 */ "xvadda.h\t\0"  | 
459  | 0  |   /* 4921 */ "x86sra.h\t\0"  | 
460  | 0  |   /* 4931 */ "xvsra.h\t\0"  | 
461  | 0  |   /* 4940 */ "xvssrani.b.h\t\0"  | 
462  | 0  |   /* 4954 */ "xvsrani.b.h\t\0"  | 
463  | 0  |   /* 4967 */ "xvssrlni.b.h\t\0"  | 
464  | 0  |   /* 4981 */ "xvsrlni.b.h\t\0"  | 
465  | 0  |   /* 4994 */ "xvssrarni.b.h\t\0"  | 
466  | 0  |   /* 5009 */ "xvsrarni.b.h\t\0"  | 
467  | 0  |   /* 5023 */ "xvssrlrni.b.h\t\0"  | 
468  | 0  |   /* 5038 */ "xvsrlrni.b.h\t\0"  | 
469  | 0  |   /* 5052 */ "xvssran.b.h\t\0"  | 
470  | 0  |   /* 5065 */ "xvsran.b.h\t\0"  | 
471  | 0  |   /* 5077 */ "xvssrln.b.h\t\0"  | 
472  | 0  |   /* 5090 */ "xvsrln.b.h\t\0"  | 
473  | 0  |   /* 5102 */ "xvssrarn.b.h\t\0"  | 
474  | 0  |   /* 5116 */ "xvsrarn.b.h\t\0"  | 
475  | 0  |   /* 5129 */ "xvssrlrn.b.h\t\0"  | 
476  | 0  |   /* 5143 */ "xvsrlrn.b.h\t\0"  | 
477  | 0  |   /* 5156 */ "amadd_db.h\t\0"  | 
478  | 0  |   /* 5168 */ "amswap_db.h\t\0"  | 
479  | 0  |   /* 5181 */ "amcas_db.h\t\0"  | 
480  | 0  |   /* 5193 */ "x86sub.h\t\0"  | 
481  | 0  |   /* 5203 */ "xvmsub.h\t\0"  | 
482  | 0  |   /* 5213 */ "xvssub.h\t\0"  | 
483  | 0  |   /* 5223 */ "xvsub.h\t\0"  | 
484  | 0  |   /* 5232 */ "x86sbc.h\t\0"  | 
485  | 0  |   /* 5242 */ "x86adc.h\t\0"  | 
486  | 0  |   /* 5252 */ "x86dec.h\t\0"  | 
487  | 0  |   /* 5262 */ "x86inc.h\t\0"  | 
488  | 0  |   /* 5272 */ "vext2xv.d.h\t\0"  | 
489  | 0  |   /* 5285 */ "x86add.h\t\0"  | 
490  | 0  |   /* 5295 */ "amadd.h\t\0"  | 
491  | 0  |   /* 5304 */ "xvmadd.h\t\0"  | 
492  | 0  |   /* 5314 */ "xvsadd.h\t\0"  | 
493  | 0  |   /* 5324 */ "xvadd.h\t\0"  | 
494  | 0  |   /* 5333 */ "ld.h\t\0"  | 
495  | 0  |   /* 5339 */ "x86and.h\t\0"  | 
496  | 0  |   /* 5349 */ "xvpackod.h\t\0"  | 
497  | 0  |   /* 5361 */ "xvpickod.h\t\0"  | 
498  | 0  |   /* 5373 */ "xvmod.h\t\0"  | 
499  | 0  |   /* 5382 */ "iocsrrd.h\t\0"  | 
500  | 0  |   /* 5393 */ "xvabsd.h\t\0"  | 
501  | 0  |   /* 5403 */ "ldle.h\t\0"  | 
502  | 0  |   /* 5411 */ "xvsle.h\t\0"  | 
503  | 0  |   /* 5420 */ "stle.h\t\0"  | 
504  | 0  |   /* 5428 */ "xvreplve.h\t\0"  | 
505  | 0  |   /* 5440 */ "xvshuf.h\t\0"  | 
506  | 0  |   /* 5450 */ "xvneg.h\t\0"  | 
507  | 0  |   /* 5459 */ "xvavg.h\t\0"  | 
508  | 0  |   /* 5468 */ "xvmuh.h\t\0"  | 
509  | 0  |   /* 5477 */ "xvilvh.h\t\0"  | 
510  | 0  |   /* 5487 */ "xvshuf4i.h\t\0"  | 
511  | 0  |   /* 5499 */ "x86srai.h\t\0"  | 
512  | 0  |   /* 5510 */ "xvsrai.h\t\0"  | 
513  | 0  |   /* 5520 */ "xvslei.h\t\0"  | 
514  | 0  |   /* 5530 */ "xvrepl128vei.h\t\0"  | 
515  | 0  |   /* 5546 */ "vreplvei.h\t\0"  | 
516  | 0  |   /* 5558 */ "x86rcli.h\t\0"  | 
517  | 0  |   /* 5569 */ "x86slli.h\t\0"  | 
518  | 0  |   /* 5580 */ "xvslli.h\t\0"  | 
519  | 0  |   /* 5590 */ "xvrepli.h\t\0"  | 
520  | 0  |   /* 5601 */ "x86srli.h\t\0"  | 
521  | 0  |   /* 5612 */ "xvsrli.h\t\0"  | 
522  | 0  |   /* 5622 */ "x86rotli.h\t\0"  | 
523  | 0  |   /* 5634 */ "xvmini.h\t\0"  | 
524  | 0  |   /* 5644 */ "xvfrstpi.h\t\0"  | 
525  | 0  |   /* 5656 */ "xvseqi.h\t\0"  | 
526  | 0  |   /* 5666 */ "xvsrari.h\t\0"  | 
527  | 0  |   /* 5677 */ "x86rcri.h\t\0"  | 
528  | 0  |   /* 5688 */ "xvbitclri.h\t\0"  | 
529  | 0  |   /* 5701 */ "xvsrlri.h\t\0"  | 
530  | 0  |   /* 5712 */ "x86rotri.h\t\0"  | 
531  | 0  |   /* 5724 */ "xvrotri.h\t\0"  | 
532  | 0  |   /* 5735 */ "xvbitseti.h\t\0"  | 
533  | 0  |   /* 5748 */ "xvslti.h\t\0"  | 
534  | 0  |   /* 5758 */ "xvbitrevi.h\t\0"  | 
535  | 0  |   /* 5771 */ "xvmaxi.h\t\0"  | 
536  | 0  |   /* 5781 */ "x86rcl.h\t\0"  | 
537  | 0  |   /* 5791 */ "x86sll.h\t\0"  | 
538  | 0  |   /* 5801 */ "xvsll.h\t\0"  | 
539  | 0  |   /* 5810 */ "xvldrepl.h\t\0"  | 
540  | 0  |   /* 5822 */ "x86srl.h\t\0"  | 
541  | 0  |   /* 5832 */ "xvsrl.h\t\0"  | 
542  | 0  |   /* 5841 */ "x86rotl.h\t\0"  | 
543  | 0  |   /* 5852 */ "x86mul.h\t\0"  | 
544  | 0  |   /* 5862 */ "xvmul.h\t\0"  | 
545  | 0  |   /* 5871 */ "xvilvl.h\t\0"  | 
546  | 0  |   /* 5881 */ "xvstelm.h\t\0"  | 
547  | 0  |   /* 5892 */ "xvmin.h\t\0"  | 
548  | 0  |   /* 5901 */ "xvclo.h\t\0"  | 
549  | 0  |   /* 5910 */ "amswap.h\t\0"  | 
550  | 0  |   /* 5920 */ "xvfrstp.h\t\0"  | 
551  | 0  |   /* 5931 */ "xvseq.h\t\0"  | 
552  | 0  |   /* 5940 */ "xvsrar.h\t\0"  | 
553  | 0  |   /* 5950 */ "x86rcr.h\t\0"  | 
554  | 0  |   /* 5960 */ "vpickve2gr.h\t\0"  | 
555  | 0  |   /* 5974 */ "xvavgr.h\t\0"  | 
556  | 0  |   /* 5984 */ "xvbitclr.h\t\0"  | 
557  | 0  |   /* 5996 */ "xvsrlr.h\t\0"  | 
558  | 0  |   /* 6006 */ "x86or.h\t\0"  | 
559  | 0  |   /* 6015 */ "x86xor.h\t\0"  | 
560  | 0  |   /* 6025 */ "x86rotr.h\t\0"  | 
561  | 0  |   /* 6036 */ "xvrotr.h\t\0"  | 
562  | 0  |   /* 6046 */ "xvreplgr2vr.h\t\0"  | 
563  | 0  |   /* 6061 */ "vinsgr2vr.h\t\0"  | 
564  | 0  |   /* 6074 */ "iocsrwr.h\t\0"  | 
565  | 0  |   /* 6085 */ "xvfcvth.s.h\t\0"  | 
566  | 0  |   /* 6098 */ "xvfcvtl.s.h\t\0"  | 
567  | 0  |   /* 6111 */ "amcas.h\t\0"  | 
568  | 0  |   /* 6120 */ "xvextrins.h\t\0"  | 
569  | 0  |   /* 6133 */ "xvsat.h\t\0"  | 
570  | 0  |   /* 6142 */ "xvbitset.h\t\0"  | 
571  | 0  |   /* 6154 */ "ldgt.h\t\0"  | 
572  | 0  |   /* 6162 */ "stgt.h\t\0"  | 
573  | 0  |   /* 6170 */ "xvslt.h\t\0"  | 
574  | 0  |   /* 6179 */ "xvpcnt.h\t\0"  | 
575  | 0  |   /* 6189 */ "st.h\t\0"  | 
576  | 0  |   /* 6195 */ "xvssrani.bu.h\t\0"  | 
577  | 0  |   /* 6210 */ "xvssrlni.bu.h\t\0"  | 
578  | 0  |   /* 6225 */ "xvssrarni.bu.h\t\0"  | 
579  | 0  |   /* 6241 */ "xvssrlrni.bu.h\t\0"  | 
580  | 0  |   /* 6257 */ "xvssran.bu.h\t\0"  | 
581  | 0  |   /* 6271 */ "xvssrln.bu.h\t\0"  | 
582  | 0  |   /* 6285 */ "xvssrarn.bu.h\t\0"  | 
583  | 0  |   /* 6300 */ "xvssrlrn.bu.h\t\0"  | 
584  | 0  |   /* 6315 */ "xvmaddwod.w.hu.h\t\0"  | 
585  | 0  |   /* 6333 */ "xvaddwod.w.hu.h\t\0"  | 
586  | 0  |   /* 6350 */ "xvmulwod.w.hu.h\t\0"  | 
587  | 0  |   /* 6367 */ "xvmaddwev.w.hu.h\t\0"  | 
588  | 0  |   /* 6385 */ "xvaddwev.w.hu.h\t\0"  | 
589  | 0  |   /* 6402 */ "xvmulwev.w.hu.h\t\0"  | 
590  | 0  |   /* 6419 */ "xvpackev.h\t\0"  | 
591  | 0  |   /* 6431 */ "xvpickev.h\t\0"  | 
592  | 0  |   /* 6443 */ "xvbitrev.h\t\0"  | 
593  | 0  |   /* 6455 */ "xvdiv.h\t\0"  | 
594  | 0  |   /* 6464 */ "xvsigncov.h\t\0"  | 
595  | 0  |   /* 6477 */ "xvsubwod.w.h\t\0"  | 
596  | 0  |   /* 6491 */ "xvmaddwod.w.h\t\0"  | 
597  | 0  |   /* 6506 */ "xvaddwod.w.h\t\0"  | 
598  | 0  |   /* 6520 */ "xvmulwod.w.h\t\0"  | 
599  | 0  |   /* 6534 */ "xvexth.w.h\t\0"  | 
600  | 0  |   /* 6546 */ "xvsllwil.w.h\t\0"  | 
601  | 0  |   /* 6560 */ "ext.w.h\t\0"  | 
602  | 0  |   /* 6569 */ "xvsubwev.w.h\t\0"  | 
603  | 0  |   /* 6583 */ "xvmaddwev.w.h\t\0"  | 
604  | 0  |   /* 6598 */ "xvaddwev.w.h\t\0"  | 
605  | 0  |   /* 6612 */ "xvmulwev.w.h\t\0"  | 
606  | 0  |   /* 6626 */ "vext2xv.w.h\t\0"  | 
607  | 0  |   /* 6639 */ "xvhsubw.w.h\t\0"  | 
608  | 0  |   /* 6652 */ "xvhaddw.w.h\t\0"  | 
609  | 0  |   /* 6665 */ "xvmax.h\t\0"  | 
610  | 0  |   /* 6674 */ "ldx.h\t\0"  | 
611  | 0  |   /* 6681 */ "stx.h\t\0"  | 
612  | 0  |   /* 6688 */ "xvsetallnez.h\t\0"  | 
613  | 0  |   /* 6703 */ "xvclz.h\t\0"  | 
614  | 0  |   /* 6712 */ "xvsetanyeqz.h\t\0"  | 
615  | 0  |   /* 6727 */ "xvmskltz.h\t\0"  | 
616  | 0  |   /* 6739 */ "revb.2h\t\0"  | 
617  | 0  |   /* 6748 */ "revb.4h\t\0"  | 
618  | 0  |   /* 6757 */ "tlbsrch\t\0"  | 
619  | 0  |   /* 6766 */ "gtlbflush\t\0"  | 
620  | 0  |   /* 6777 */ "pcalau12i\t\0"  | 
621  | 0  |   /* 6788 */ "pcaddu12i\t\0"  | 
622  | 0  |   /* 6799 */ "pcaddu18i\t\0"  | 
623  | 0  |   /* 6810 */ "pcaddi\t\0"  | 
624  | 0  |   /* 6818 */ "xvldi\t\0"  | 
625  | 0  |   /* 6825 */ "andi\t\0"  | 
626  | 0  |   /* 6831 */ "xori\t\0"  | 
627  | 0  |   /* 6837 */ "slti\t\0"  | 
628  | 0  |   /* 6843 */ "sltui\t\0"  | 
629  | 0  |   /* 6850 */ "setx86j\t\0"  | 
630  | 0  |   /* 6859 */ "setarmj\t\0"  | 
631  | 0  |   /* 6868 */ "break\t\0"  | 
632  | 0  |   /* 6875 */ "xvffint.d.l\t\0"  | 
633  | 0  |   /* 6888 */ "xvffint.s.l\t\0"  | 
634  | 0  |   /* 6901 */ "bl\t\0"  | 
635  | 0  |   /* 6905 */ "dbcl\t\0"  | 
636  | 0  |   /* 6911 */ "hvcl\t\0"  | 
637  | 0  |   /* 6917 */ "la.pcrel\t\0"  | 
638  | 0  |   /* 6927 */ "fsel\t\0"  | 
639  | 0  |   /* 6933 */ "syscall\t\0"  | 
640  | 0  |   /* 6942 */ "tlbfill\t\0"  | 
641  | 0  |   /* 6951 */ "jirl\t\0"  | 
642  | 0  |   /* 6957 */ "x86clrtm\t\0"  | 
643  | 0  |   /* 6967 */ "x86settm\t\0"  | 
644  | 0  |   /* 6977 */ "andn\t\0"  | 
645  | 0  |   /* 6983 */ "orn\t\0"  | 
646  | 0  |   /* 6988 */ "ertn\t\0"  | 
647  | 0  |   /* 6994 */ "cacop\t\0"  | 
648  | 0  |   /* 7001 */ "x86dectop\t\0"  | 
649  | 0  |   /* 7012 */ "x86inctop\t\0"  | 
650  | 0  |   /* 7023 */ "x86mftop\t\0"  | 
651  | 0  |   /* 7033 */ "x86mttop\t\0"  | 
652  | 0  |   /* 7043 */ "xvreplve0.q\t\0"  | 
653  | 0  |   /* 7056 */ "xvsub.q\t\0"  | 
654  | 0  |   /* 7065 */ "sc.q\t\0"  | 
655  | 0  |   /* 7071 */ "xvssrani.d.q\t\0"  | 
656  | 0  |   /* 7085 */ "xvsrani.d.q\t\0"  | 
657  | 0  |   /* 7098 */ "xvssrlni.d.q\t\0"  | 
658  | 0  |   /* 7112 */ "xvsrlni.d.q\t\0"  | 
659  | 0  |   /* 7125 */ "xvssrarni.d.q\t\0"  | 
660  | 0  |   /* 7140 */ "xvsrarni.d.q\t\0"  | 
661  | 0  |   /* 7154 */ "xvssrlrni.d.q\t\0"  | 
662  | 0  |   /* 7169 */ "xvsrlrni.d.q\t\0"  | 
663  | 0  |   /* 7183 */ "xvadd.q\t\0"  | 
664  | 0  |   /* 7192 */ "xvpermi.q\t\0"  | 
665  | 0  |   /* 7203 */ "xvssrani.du.q\t\0"  | 
666  | 0  |   /* 7218 */ "xvssrlni.du.q\t\0"  | 
667  | 0  |   /* 7233 */ "xvssrarni.du.q\t\0"  | 
668  | 0  |   /* 7249 */ "xvssrlrni.du.q\t\0"  | 
669  | 0  |   /* 7265 */ "beq\t\0"  | 
670  | 0  |   /* 7270 */ "dbar\t\0"  | 
671  | 0  |   /* 7276 */ "ibar\t\0"  | 
672  | 0  |   /* 7282 */ "movgr2scr\t\0"  | 
673  | 0  |   /* 7293 */ "movcf2fr\t\0"  | 
674  | 0  |   /* 7303 */ "movcf2gr\t\0"  | 
675  | 0  |   /* 7313 */ "movscr2gr\t\0"  | 
676  | 0  |   /* 7324 */ "movfcsr2gr\t\0"  | 
677  | 0  |   /* 7336 */ "lddir\t\0"  | 
678  | 0  |   /* 7343 */ "tlbclr\t\0"  | 
679  | 0  |   /* 7351 */ "nor\t\0"  | 
680  | 0  |   /* 7356 */ "xor\t\0"  | 
681  | 0  |   /* 7361 */ "movgr2fcsr\t\0"  | 
682  | 0  |   /* 7373 */ "tlbwr\t\0"  | 
683  | 0  |   /* 7380 */ "gcsrwr\t\0"  | 
684  | 0  |   /* 7388 */ "xvfmina.s\t\0"  | 
685  | 0  |   /* 7399 */ "xvfmaxa.s\t\0"  | 
686  | 0  |   /* 7410 */ "fscaleb.s\t\0"  | 
687  | 0  |   /* 7421 */ "xvflogb.s\t\0"  | 
688  | 0  |   /* 7432 */ "xvfsub.s\t\0"  | 
689  | 0  |   /* 7442 */ "xvfmsub.s\t\0"  | 
690  | 0  |   /* 7453 */ "xvfnmsub.s\t\0"  | 
691  | 0  |   /* 7465 */ "xvfcvth.d.s\t\0"  | 
692  | 0  |   /* 7478 */ "xvfcvtl.d.s\t\0"  | 
693  | 0  |   /* 7491 */ "fcvt.d.s\t\0"  | 
694  | 0  |   /* 7501 */ "xvfadd.s\t\0"  | 
695  | 0  |   /* 7511 */ "xvfmadd.s\t\0"  | 
696  | 0  |   /* 7522 */ "xvfnmadd.s\t\0"  | 
697  | 0  |   /* 7534 */ "fld.s\t\0"  | 
698  | 0  |   /* 7541 */ "xvfcmp.cle.s\t\0"  | 
699  | 0  |   /* 7555 */ "fldle.s\t\0"  | 
700  | 0  |   /* 7564 */ "xvfcmp.sle.s\t\0"  | 
701  | 0  |   /* 7578 */ "fstle.s\t\0"  | 
702  | 0  |   /* 7587 */ "xvfcmp.cule.s\t\0"  | 
703  | 0  |   /* 7602 */ "xvfcmp.sule.s\t\0"  | 
704  | 0  |   /* 7617 */ "xvfcmp.cne.s\t\0"  | 
705  | 0  |   /* 7631 */ "xvfrintrne.s\t\0"  | 
706  | 0  |   /* 7645 */ "xvfcmp.sne.s\t\0"  | 
707  | 0  |   /* 7659 */ "xvfcmp.cune.s\t\0"  | 
708  | 0  |   /* 7674 */ "xvfcmp.sune.s\t\0"  | 
709  | 0  |   /* 7689 */ "xvfrecipe.s\t\0"  | 
710  | 0  |   /* 7702 */ "xvfrsqrte.s\t\0"  | 
711  | 0  |   /* 7715 */ "xvfcmp.caf.s\t\0"  | 
712  | 0  |   /* 7729 */ "xvfcmp.saf.s\t\0"  | 
713  | 0  |   /* 7743 */ "fneg.s\t\0"  | 
714  | 0  |   /* 7751 */ "xvfcvt.h.s\t\0"  | 
715  | 0  |   /* 7763 */ "ftintrne.l.s\t\0"  | 
716  | 0  |   /* 7777 */ "xvftintrneh.l.s\t\0"  | 
717  | 0  |   /* 7794 */ "xvftintrmh.l.s\t\0"  | 
718  | 0  |   /* 7810 */ "xvftintrph.l.s\t\0"  | 
719  | 0  |   /* 7826 */ "xvftinth.l.s\t\0"  | 
720  | 0  |   /* 7840 */ "xvftintrzh.l.s\t\0"  | 
721  | 0  |   /* 7856 */ "xvftintrnel.l.s\t\0"  | 
722  | 0  |   /* 7873 */ "xvftintrml.l.s\t\0"  | 
723  | 0  |   /* 7889 */ "xvftintrpl.l.s\t\0"  | 
724  | 0  |   /* 7905 */ "xvftintl.l.s\t\0"  | 
725  | 0  |   /* 7919 */ "xvftintrzl.l.s\t\0"  | 
726  | 0  |   /* 7935 */ "ftintrm.l.s\t\0"  | 
727  | 0  |   /* 7948 */ "ftintrp.l.s\t\0"  | 
728  | 0  |   /* 7961 */ "ftint.l.s\t\0"  | 
729  | 0  |   /* 7972 */ "ftintrz.l.s\t\0"  | 
730  | 0  |   /* 7985 */ "xvfmul.s\t\0"  | 
731  | 0  |   /* 7995 */ "xvfrintrm.s\t\0"  | 
732  | 0  |   /* 8008 */ "fcopysign.s\t\0"  | 
733  | 0  |   /* 8021 */ "xvfmin.s\t\0"  | 
734  | 0  |   /* 8031 */ "xvfcmp.cun.s\t\0"  | 
735  | 0  |   /* 8045 */ "xvfcmp.sun.s\t\0"  | 
736  | 0  |   /* 8059 */ "xvfrecip.s\t\0"  | 
737  | 0  |   /* 8071 */ "xvfrintrp.s\t\0"  | 
738  | 0  |   /* 8084 */ "xvfcmp.ceq.s\t\0"  | 
739  | 0  |   /* 8098 */ "xvfcmp.seq.s\t\0"  | 
740  | 0  |   /* 8112 */ "xvfcmp.cueq.s\t\0"  | 
741  | 0  |   /* 8127 */ "xvfcmp.sueq.s\t\0"  | 
742  | 0  |   /* 8142 */ "movfrh2gr.s\t\0"  | 
743  | 0  |   /* 8155 */ "movfr2gr.s\t\0"  | 
744  | 0  |   /* 8167 */ "xvfcmp.cor.s\t\0"  | 
745  | 0  |   /* 8181 */ "xvfcmp.sor.s\t\0"  | 
746  | 0  |   /* 8195 */ "fabs.s\t\0"  | 
747  | 0  |   /* 8203 */ "xvfclass.s\t\0"  | 
748  | 0  |   /* 8215 */ "fldgt.s\t\0"  | 
749  | 0  |   /* 8224 */ "fstgt.s\t\0"  | 
750  | 0  |   /* 8233 */ "xvfcmp.clt.s\t\0"  | 
751  | 0  |   /* 8247 */ "xvfcmp.slt.s\t\0"  | 
752  | 0  |   /* 8261 */ "xvfcmp.cult.s\t\0"  | 
753  | 0  |   /* 8276 */ "xvfcmp.sult.s\t\0"  | 
754  | 0  |   /* 8291 */ "xvfrint.s\t\0"  | 
755  | 0  |   /* 8302 */ "xvfsqrt.s\t\0"  | 
756  | 0  |   /* 8313 */ "xvfrsqrt.s\t\0"  | 
757  | 0  |   /* 8325 */ "fst.s\t\0"  | 
758  | 0  |   /* 8332 */ "xvftint.wu.s\t\0"  | 
759  | 0  |   /* 8346 */ "xvftintrz.wu.s\t\0"  | 
760  | 0  |   /* 8362 */ "xvfdiv.s\t\0"  | 
761  | 0  |   /* 8372 */ "fmov.s\t\0"  | 
762  | 0  |   /* 8380 */ "xvftintrne.w.s\t\0"  | 
763  | 0  |   /* 8396 */ "xvftintrm.w.s\t\0"  | 
764  | 0  |   /* 8411 */ "xvftintrp.w.s\t\0"  | 
765  | 0  |   /* 8426 */ "xvftint.w.s\t\0"  | 
766  | 0  |   /* 8439 */ "xvftintrz.w.s\t\0"  | 
767  | 0  |   /* 8454 */ "xvfmax.s\t\0"  | 
768  | 0  |   /* 8464 */ "fldx.s\t\0"  | 
769  | 0  |   /* 8472 */ "fstx.s\t\0"  | 
770  | 0  |   /* 8480 */ "xvfrintrz.s\t\0"  | 
771  | 0  |   /* 8493 */ "la.abs\t\0"  | 
772  | 0  |   /* 8501 */ "blt\t\0"  | 
773  | 0  |   /* 8506 */ "slt\t\0"  | 
774  | 0  |   /* 8511 */ "la.got\t\0"  | 
775  | 0  |   /* 8519 */ "xvst\t\0"  | 
776  | 0  |   /* 8525 */ "xvssub.bu\t\0"  | 
777  | 0  |   /* 8536 */ "xvsadd.bu\t\0"  | 
778  | 0  |   /* 8547 */ "ld.bu\t\0"  | 
779  | 0  |   /* 8554 */ "xvmod.bu\t\0"  | 
780  | 0  |   /* 8564 */ "xvabsd.bu\t\0"  | 
781  | 0  |   /* 8575 */ "xvsle.bu\t\0"  | 
782  | 0  |   /* 8585 */ "xvavg.bu\t\0"  | 
783  | 0  |   /* 8595 */ "xvsubwod.h.bu\t\0"  | 
784  | 0  |   /* 8610 */ "xvmaddwod.h.bu\t\0"  | 
785  | 0  |   /* 8626 */ "xvaddwod.h.bu\t\0"  | 
786  | 0  |   /* 8641 */ "xvmulwod.h.bu\t\0"  | 
787  | 0  |   /* 8656 */ "xvsubwev.h.bu\t\0"  | 
788  | 0  |   /* 8671 */ "xvmaddwev.h.bu\t\0"  | 
789  | 0  |   /* 8687 */ "xvaddwev.h.bu\t\0"  | 
790  | 0  |   /* 8702 */ "xvmulwev.h.bu\t\0"  | 
791  | 0  |   /* 8717 */ "xvmuh.bu\t\0"  | 
792  | 0  |   /* 8727 */ "xvsubi.bu\t\0"  | 
793  | 0  |   /* 8738 */ "xvaddi.bu\t\0"  | 
794  | 0  |   /* 8749 */ "xvslei.bu\t\0"  | 
795  | 0  |   /* 8760 */ "xvmini.bu\t\0"  | 
796  | 0  |   /* 8771 */ "xvslti.bu\t\0"  | 
797  | 0  |   /* 8782 */ "xvmaxi.bu\t\0"  | 
798  | 0  |   /* 8793 */ "x86mul.bu\t\0"  | 
799  | 0  |   /* 8804 */ "xvmin.bu\t\0"  | 
800  | 0  |   /* 8814 */ "vpickve2gr.bu\t\0"  | 
801  | 0  |   /* 8829 */ "xvavgr.bu\t\0"  | 
802  | 0  |   /* 8840 */ "xvsat.bu\t\0"  | 
803  | 0  |   /* 8850 */ "xvslt.bu\t\0"  | 
804  | 0  |   /* 8860 */ "vext2xv.du.bu\t\0"  | 
805  | 0  |   /* 8875 */ "xvexth.hu.bu\t\0"  | 
806  | 0  |   /* 8889 */ "xvsllwil.hu.bu\t\0"  | 
807  | 0  |   /* 8905 */ "vext2xv.hu.bu\t\0"  | 
808  | 0  |   /* 8920 */ "xvhsubw.hu.bu\t\0"  | 
809  | 0  |   /* 8935 */ "xvhaddw.hu.bu\t\0"  | 
810  | 0  |   /* 8950 */ "vext2xv.wu.bu\t\0"  | 
811  | 0  |   /* 8965 */ "xvdiv.bu\t\0"  | 
812  | 0  |   /* 8975 */ "xvmax.bu\t\0"  | 
813  | 0  |   /* 8985 */ "ldx.bu\t\0"  | 
814  | 0  |   /* 8993 */ "ammin_db.du\t\0"  | 
815  | 0  |   /* 9006 */ "ammax_db.du\t\0"  | 
816  | 0  |   /* 9019 */ "x86sub.du\t\0"  | 
817  | 0  |   /* 9030 */ "xvssub.du\t\0"  | 
818  | 0  |   /* 9041 */ "x86add.du\t\0"  | 
819  | 0  |   /* 9052 */ "xvsadd.du\t\0"  | 
820  | 0  |   /* 9063 */ "xvmod.du\t\0"  | 
821  | 0  |   /* 9073 */ "xvabsd.du\t\0"  | 
822  | 0  |   /* 9084 */ "xvsle.du\t\0"  | 
823  | 0  |   /* 9094 */ "xvavg.du\t\0"  | 
824  | 0  |   /* 9104 */ "mulh.du\t\0"  | 
825  | 0  |   /* 9113 */ "xvmuh.du\t\0"  | 
826  | 0  |   /* 9123 */ "xvsubi.du\t\0"  | 
827  | 0  |   /* 9134 */ "xvaddi.du\t\0"  | 
828  | 0  |   /* 9145 */ "xvslei.du\t\0"  | 
829  | 0  |   /* 9156 */ "xvmini.du\t\0"  | 
830  | 0  |   /* 9167 */ "xvslti.du\t\0"  | 
831  | 0  |   /* 9178 */ "xvmaxi.du\t\0"  | 
832  | 0  |   /* 9189 */ "x86mul.du\t\0"  | 
833  | 0  |   /* 9200 */ "ammin.du\t\0"  | 
834  | 0  |   /* 9210 */ "xvmin.du\t\0"  | 
835  | 0  |   /* 9220 */ "xvsubwod.q.du\t\0"  | 
836  | 0  |   /* 9235 */ "xvmaddwod.q.du\t\0"  | 
837  | 0  |   /* 9251 */ "xvaddwod.q.du\t\0"  | 
838  | 0  |   /* 9266 */ "xvmulwod.q.du\t\0"  | 
839  | 0  |   /* 9281 */ "xvsubwev.q.du\t\0"  | 
840  | 0  |   /* 9296 */ "xvmaddwev.q.du\t\0"  | 
841  | 0  |   /* 9312 */ "xvaddwev.q.du\t\0"  | 
842  | 0  |   /* 9327 */ "xvmulwev.q.du\t\0"  | 
843  | 0  |   /* 9342 */ "xvpickve2gr.du\t\0"  | 
844  | 0  |   /* 9358 */ "xvavgr.du\t\0"  | 
845  | 0  |   /* 9369 */ "xvsat.du\t\0"  | 
846  | 0  |   /* 9379 */ "xvslt.du\t\0"  | 
847  | 0  |   /* 9389 */ "xvexth.qu.du\t\0"  | 
848  | 0  |   /* 9403 */ "xvextl.qu.du\t\0"  | 
849  | 0  |   /* 9417 */ "xvhsubw.qu.du\t\0"  | 
850  | 0  |   /* 9432 */ "xvhaddw.qu.du\t\0"  | 
851  | 0  |   /* 9447 */ "xvdiv.du\t\0"  | 
852  | 0  |   /* 9457 */ "ammax.du\t\0"  | 
853  | 0  |   /* 9467 */ "xvmax.du\t\0"  | 
854  | 0  |   /* 9477 */ "bgeu\t\0"  | 
855  | 0  |   /* 9483 */ "xvssub.hu\t\0"  | 
856  | 0  |   /* 9494 */ "xvsadd.hu\t\0"  | 
857  | 0  |   /* 9505 */ "ld.hu\t\0"  | 
858  | 0  |   /* 9512 */ "xvmod.hu\t\0"  | 
859  | 0  |   /* 9522 */ "xvabsd.hu\t\0"  | 
860  | 0  |   /* 9533 */ "xvsle.hu\t\0"  | 
861  | 0  |   /* 9543 */ "xvavg.hu\t\0"  | 
862  | 0  |   /* 9553 */ "xvmuh.hu\t\0"  | 
863  | 0  |   /* 9563 */ "xvsubi.hu\t\0"  | 
864  | 0  |   /* 9574 */ "xvaddi.hu\t\0"  | 
865  | 0  |   /* 9585 */ "xvslei.hu\t\0"  | 
866  | 0  |   /* 9596 */ "xvmini.hu\t\0"  | 
867  | 0  |   /* 9607 */ "xvslti.hu\t\0"  | 
868  | 0  |   /* 9618 */ "xvmaxi.hu\t\0"  | 
869  | 0  |   /* 9629 */ "x86mul.hu\t\0"  | 
870  | 0  |   /* 9640 */ "xvmin.hu\t\0"  | 
871  | 0  |   /* 9650 */ "vpickve2gr.hu\t\0"  | 
872  | 0  |   /* 9665 */ "xvavgr.hu\t\0"  | 
873  | 0  |   /* 9676 */ "xvsat.hu\t\0"  | 
874  | 0  |   /* 9686 */ "xvslt.hu\t\0"  | 
875  | 0  |   /* 9696 */ "vext2xv.du.hu\t\0"  | 
876  | 0  |   /* 9711 */ "xvexth.wu.hu\t\0"  | 
877  | 0  |   /* 9725 */ "xvsllwil.wu.hu\t\0"  | 
878  | 0  |   /* 9741 */ "vext2xv.wu.hu\t\0"  | 
879  | 0  |   /* 9756 */ "xvhsubw.wu.hu\t\0"  | 
880  | 0  |   /* 9771 */ "xvhaddw.wu.hu\t\0"  | 
881  | 0  |   /* 9786 */ "xvdiv.hu\t\0"  | 
882  | 0  |   /* 9796 */ "xvsubwod.w.hu\t\0"  | 
883  | 0  |   /* 9811 */ "xvmaddwod.w.hu\t\0"  | 
884  | 0  |   /* 9827 */ "xvaddwod.w.hu\t\0"  | 
885  | 0  |   /* 9842 */ "xvmulwod.w.hu\t\0"  | 
886  | 0  |   /* 9857 */ "xvsubwev.w.hu\t\0"  | 
887  | 0  |   /* 9872 */ "xvmaddwev.w.hu\t\0"  | 
888  | 0  |   /* 9888 */ "xvaddwev.w.hu\t\0"  | 
889  | 0  |   /* 9903 */ "xvmulwev.w.hu\t\0"  | 
890  | 0  |   /* 9918 */ "xvmax.hu\t\0"  | 
891  | 0  |   /* 9928 */ "ldx.hu\t\0"  | 
892  | 0  |   /* 9936 */ "xvffint.d.lu\t\0"  | 
893  | 0  |   /* 9950 */ "bltu\t\0"  | 
894  | 0  |   /* 9956 */ "sltu\t\0"  | 
895  | 0  |   /* 9962 */ "ammin_db.wu\t\0"  | 
896  | 0  |   /* 9975 */ "ammax_db.wu\t\0"  | 
897  | 0  |   /* 9988 */ "x86sub.wu\t\0"  | 
898  | 0  |   /* 9999 */ "xvssub.wu\t\0"  | 
899  | 0  |   /* 10010 */ "xvsubwod.d.wu\t\0"  | 
900  | 0  |   /* 10025 */ "xvmaddwod.d.wu\t\0"  | 
901  | 0  |   /* 10041 */ "xvaddwod.d.wu\t\0"  | 
902  | 0  |   /* 10056 */ "xvmulwod.d.wu\t\0"  | 
903  | 0  |   /* 10071 */ "xvsubwev.d.wu\t\0"  | 
904  | 0  |   /* 10086 */ "xvmaddwev.d.wu\t\0"  | 
905  | 0  |   /* 10102 */ "xvaddwev.d.wu\t\0"  | 
906  | 0  |   /* 10117 */ "xvmulwev.d.wu\t\0"  | 
907  | 0  |   /* 10132 */ "mulw.d.wu\t\0"  | 
908  | 0  |   /* 10143 */ "x86add.wu\t\0"  | 
909  | 0  |   /* 10154 */ "xvsadd.wu\t\0"  | 
910  | 0  |   /* 10165 */ "ld.wu\t\0"  | 
911  | 0  |   /* 10172 */ "xvmod.wu\t\0"  | 
912  | 0  |   /* 10182 */ "xvabsd.wu\t\0"  | 
913  | 0  |   /* 10193 */ "xvsle.wu\t\0"  | 
914  | 0  |   /* 10203 */ "xvavg.wu\t\0"  | 
915  | 0  |   /* 10213 */ "mulh.wu\t\0"  | 
916  | 0  |   /* 10222 */ "xvmuh.wu\t\0"  | 
917  | 0  |   /* 10232 */ "xvsubi.wu\t\0"  | 
918  | 0  |   /* 10243 */ "xvaddi.wu\t\0"  | 
919  | 0  |   /* 10254 */ "xvslei.wu\t\0"  | 
920  | 0  |   /* 10265 */ "xvmini.wu\t\0"  | 
921  | 0  |   /* 10276 */ "xvslti.wu\t\0"  | 
922  | 0  |   /* 10287 */ "xvmaxi.wu\t\0"  | 
923  | 0  |   /* 10298 */ "alsl.wu\t\0"  | 
924  | 0  |   /* 10307 */ "x86mul.wu\t\0"  | 
925  | 0  |   /* 10318 */ "ammin.wu\t\0"  | 
926  | 0  |   /* 10328 */ "xvmin.wu\t\0"  | 
927  | 0  |   /* 10338 */ "xvpickve2gr.wu\t\0"  | 
928  | 0  |   /* 10354 */ "xvavgr.wu\t\0"  | 
929  | 0  |   /* 10365 */ "xvffint.s.wu\t\0"  | 
930  | 0  |   /* 10379 */ "xvsat.wu\t\0"  | 
931  | 0  |   /* 10389 */ "xvslt.wu\t\0"  | 
932  | 0  |   /* 10399 */ "xvexth.du.wu\t\0"  | 
933  | 0  |   /* 10413 */ "xvsllwil.du.wu\t\0"  | 
934  | 0  |   /* 10429 */ "vext2xv.du.wu\t\0"  | 
935  | 0  |   /* 10444 */ "xvhsubw.du.wu\t\0"  | 
936  | 0  |   /* 10459 */ "xvhaddw.du.wu\t\0"  | 
937  | 0  |   /* 10474 */ "xvdiv.wu\t\0"  | 
938  | 0  |   /* 10484 */ "ammax.wu\t\0"  | 
939  | 0  |   /* 10494 */ "xvmax.wu\t\0"  | 
940  | 0  |   /* 10504 */ "ldx.wu\t\0"  | 
941  | 0  |   /* 10512 */ "xvand.v\t\0"  | 
942  | 0  |   /* 10521 */ "xvbitsel.v\t\0"  | 
943  | 0  |   /* 10533 */ "xvbsll.v\t\0"  | 
944  | 0  |   /* 10543 */ "xvbsrl.v\t\0"  | 
945  | 0  |   /* 10553 */ "xvandn.v\t\0"  | 
946  | 0  |   /* 10563 */ "xvorn.v\t\0"  | 
947  | 0  |   /* 10572 */ "xvnor.v\t\0"  | 
948  | 0  |   /* 10581 */ "xvor.v\t\0"  | 
949  | 0  |   /* 10589 */ "xvxor.v\t\0"  | 
950  | 0  |   /* 10598 */ "xvsetnez.v\t\0"  | 
951  | 0  |   /* 10610 */ "xvseteqz.v\t\0"  | 
952  | 0  |   /* 10622 */ "xvreplve0.w\t\0"  | 
953  | 0  |   /* 10635 */ "xvinsve0.w\t\0"  | 
954  | 0  |   /* 10647 */ "xvadda.w\t\0"  | 
955  | 0  |   /* 10657 */ "x86sra.w\t\0"  | 
956  | 0  |   /* 10667 */ "armsra.w\t\0"  | 
957  | 0  |   /* 10677 */ "xvsra.w\t\0"  | 
958  | 0  |   /* 10686 */ "crcc.w.b.w\t\0"  | 
959  | 0  |   /* 10698 */ "crc.w.b.w\t\0"  | 
960  | 0  |   /* 10709 */ "amadd_db.w\t\0"  | 
961  | 0  |   /* 10721 */ "amand_db.w\t\0"  | 
962  | 0  |   /* 10733 */ "ammin_db.w\t\0"  | 
963  | 0  |   /* 10745 */ "amswap_db.w\t\0"  | 
964  | 0  |   /* 10758 */ "amor_db.w\t\0"  | 
965  | 0  |   /* 10769 */ "amxor_db.w\t\0"  | 
966  | 0  |   /* 10781 */ "amcas_db.w\t\0"  | 
967  | 0  |   /* 10793 */ "ammax_db.w\t\0"  | 
968  | 0  |   /* 10805 */ "x86sub.w\t\0"  | 
969  | 0  |   /* 10815 */ "armsub.w\t\0"  | 
970  | 0  |   /* 10825 */ "xvmsub.w\t\0"  | 
971  | 0  |   /* 10835 */ "xvssub.w\t\0"  | 
972  | 0  |   /* 10845 */ "xvsub.w\t\0"  | 
973  | 0  |   /* 10854 */ "x86sbc.w\t\0"  | 
974  | 0  |   /* 10864 */ "armsbc.w\t\0"  | 
975  | 0  |   /* 10874 */ "x86adc.w\t\0"  | 
976  | 0  |   /* 10884 */ "armadc.w\t\0"  | 
977  | 0  |   /* 10894 */ "x86dec.w\t\0"  | 
978  | 0  |   /* 10904 */ "x86inc.w\t\0"  | 
979  | 0  |   /* 10914 */ "sc.w\t\0"  | 
980  | 0  |   /* 10920 */ "xvsubwod.d.w\t\0"  | 
981  | 0  |   /* 10934 */ "xvmaddwod.d.w\t\0"  | 
982  | 0  |   /* 10949 */ "xvaddwod.d.w\t\0"  | 
983  | 0  |   /* 10963 */ "xvmulwod.d.w\t\0"  | 
984  | 0  |   /* 10977 */ "xvffinth.d.w\t\0"  | 
985  | 0  |   /* 10991 */ "xvexth.d.w\t\0"  | 
986  | 0  |   /* 11003 */ "xvsllwil.d.w\t\0"  | 
987  | 0  |   /* 11017 */ "xvffintl.d.w\t\0"  | 
988  | 0  |   /* 11031 */ "ffint.d.w\t\0"  | 
989  | 0  |   /* 11042 */ "xvsubwev.d.w\t\0"  | 
990  | 0  |   /* 11056 */ "xvmaddwev.d.w\t\0"  | 
991  | 0  |   /* 11071 */ "xvaddwev.d.w\t\0"  | 
992  | 0  |   /* 11085 */ "xvmulwev.d.w\t\0"  | 
993  | 0  |   /* 11099 */ "vext2xv.d.w\t\0"  | 
994  | 0  |   /* 11112 */ "crcc.w.d.w\t\0"  | 
995  | 0  |   /* 11124 */ "crc.w.d.w\t\0"  | 
996  | 0  |   /* 11135 */ "xvhsubw.d.w\t\0"  | 
997  | 0  |   /* 11148 */ "xvhaddw.d.w\t\0"  | 
998  | 0  |   /* 11161 */ "mulw.d.w\t\0"  | 
999  | 0  |   /* 11171 */ "x86add.w\t\0"  | 
1000  | 0  |   /* 11181 */ "amadd.w\t\0"  | 
1001  | 0  |   /* 11190 */ "armadd.w\t\0"  | 
1002  | 0  |   /* 11200 */ "xvmadd.w\t\0"  | 
1003  | 0  |   /* 11210 */ "xvsadd.w\t\0"  | 
1004  | 0  |   /* 11220 */ "xvadd.w\t\0"  | 
1005  | 0  |   /* 11229 */ "ld.w\t\0"  | 
1006  | 0  |   /* 11235 */ "x86and.w\t\0"  | 
1007  | 0  |   /* 11245 */ "amand.w\t\0"  | 
1008  | 0  |   /* 11254 */ "armand.w\t\0"  | 
1009  | 0  |   /* 11264 */ "xvpackod.w\t\0"  | 
1010  | 0  |   /* 11276 */ "xvpickod.w\t\0"  | 
1011  | 0  |   /* 11288 */ "xvmod.w\t\0"  | 
1012  | 0  |   /* 11297 */ "iocsrrd.w\t\0"  | 
1013  | 0  |   /* 11308 */ "xvabsd.w\t\0"  | 
1014  | 0  |   /* 11318 */ "ldle.w\t\0"  | 
1015  | 0  |   /* 11326 */ "xvsle.w\t\0"  | 
1016  | 0  |   /* 11335 */ "stle.w\t\0"  | 
1017  | 0  |   /* 11343 */ "xvpickve.w\t\0"  | 
1018  | 0  |   /* 11355 */ "xvreplve.w\t\0"  | 
1019  | 0  |   /* 11367 */ "xvshuf.w\t\0"  | 
1020  | 0  |   /* 11377 */ "xvneg.w\t\0"  | 
1021  | 0  |   /* 11386 */ "xvavg.w\t\0"  | 
1022  | 0  |   /* 11395 */ "xvssrani.h.w\t\0"  | 
1023  | 0  |   /* 11409 */ "xvsrani.h.w\t\0"  | 
1024  | 0  |   /* 11422 */ "xvssrlni.h.w\t\0"  | 
1025  | 0  |   /* 11436 */ "xvsrlni.h.w\t\0"  | 
1026  | 0  |   /* 11449 */ "xvssrarni.h.w\t\0"  | 
1027  | 0  |   /* 11464 */ "xvsrarni.h.w\t\0"  | 
1028  | 0  |   /* 11478 */ "xvssrlrni.h.w\t\0"  | 
1029  | 0  |   /* 11493 */ "xvsrlrni.h.w\t\0"  | 
1030  | 0  |   /* 11507 */ "xvssran.h.w\t\0"  | 
1031  | 0  |   /* 11520 */ "xvsran.h.w\t\0"  | 
1032  | 0  |   /* 11532 */ "xvssrln.h.w\t\0"  | 
1033  | 0  |   /* 11545 */ "xvsrln.h.w\t\0"  | 
1034  | 0  |   /* 11557 */ "xvssrarn.h.w\t\0"  | 
1035  | 0  |   /* 11571 */ "xvsrarn.h.w\t\0"  | 
1036  | 0  |   /* 11584 */ "xvssrlrn.h.w\t\0"  | 
1037  | 0  |   /* 11598 */ "xvsrlrn.h.w\t\0"  | 
1038  | 0  |   /* 11611 */ "crcc.w.h.w\t\0"  | 
1039  | 0  |   /* 11623 */ "crc.w.h.w\t\0"  | 
1040  | 0  |   /* 11634 */ "rdtimeh.w\t\0"  | 
1041  | 0  |   /* 11645 */ "mulh.w\t\0"  | 
1042  | 0  |   /* 11653 */ "movgr2frh.w\t\0"  | 
1043  | 0  |   /* 11666 */ "xvmuh.w\t\0"  | 
1044  | 0  |   /* 11675 */ "xvilvh.w\t\0"  | 
1045  | 0  |   /* 11685 */ "addu12i.w\t\0"  | 
1046  | 0  |   /* 11696 */ "lu12i.w\t\0"  | 
1047  | 0  |   /* 11705 */ "xvshuf4i.w\t\0"  | 
1048  | 0  |   /* 11717 */ "x86srai.w\t\0"  | 
1049  | 0  |   /* 11728 */ "armsrai.w\t\0"  | 
1050  | 0  |   /* 11739 */ "xvsrai.w\t\0"  | 
1051  | 0  |   /* 11749 */ "addi.w\t\0"  | 
1052  | 0  |   /* 11757 */ "xvslei.w\t\0"  | 
1053  | 0  |   /* 11767 */ "xvrepl128vei.w\t\0"  | 
1054  | 0  |   /* 11783 */ "vreplvei.w\t\0"  | 
1055  | 0  |   /* 11795 */ "x86rcli.w\t\0"  | 
1056  | 0  |   /* 11806 */ "x86slli.w\t\0"  | 
1057  | 0  |   /* 11817 */ "armslli.w\t\0"  | 
1058  | 0  |   /* 11828 */ "xvslli.w\t\0"  | 
1059  | 0  |   /* 11838 */ "xvrepli.w\t\0"  | 
1060  | 0  |   /* 11849 */ "x86srli.w\t\0"  | 
1061  | 0  |   /* 11860 */ "armsrli.w\t\0"  | 
1062  | 0  |   /* 11871 */ "xvsrli.w\t\0"  | 
1063  | 0  |   /* 11881 */ "x86rotli.w\t\0"  | 
1064  | 0  |   /* 11893 */ "xvpermi.w\t\0"  | 
1065  | 0  |   /* 11904 */ "xvmini.w\t\0"  | 
1066  | 0  |   /* 11914 */ "xvseqi.w\t\0"  | 
1067  | 0  |   /* 11924 */ "xvsrari.w\t\0"  | 
1068  | 0  |   /* 11935 */ "x86rcri.w\t\0"  | 
1069  | 0  |   /* 11946 */ "xvbitclri.w\t\0"  | 
1070  | 0  |   /* 11959 */ "xvsrlri.w\t\0"  | 
1071  | 0  |   /* 11970 */ "x86rotri.w\t\0"  | 
1072  | 0  |   /* 11982 */ "armrotri.w\t\0"  | 
1073  | 0  |   /* 11994 */ "xvrotri.w\t\0"  | 
1074  | 0  |   /* 12005 */ "xvbitseti.w\t\0"  | 
1075  | 0  |   /* 12018 */ "xvslti.w\t\0"  | 
1076  | 0  |   /* 12028 */ "xvbitrevi.w\t\0"  | 
1077  | 0  |   /* 12041 */ "xvmaxi.w\t\0"  | 
1078  | 0  |   /* 12051 */ "bytepick.w\t\0"  | 
1079  | 0  |   /* 12063 */ "bstrpick.w\t\0"  | 
1080  | 0  |   /* 12075 */ "x86rcl.w\t\0"  | 
1081  | 0  |   /* 12085 */ "ldl.w\t\0"  | 
1082  | 0  |   /* 12092 */ "rdtimel.w\t\0"  | 
1083  | 0  |   /* 12103 */ "screl.w\t\0"  | 
1084  | 0  |   /* 12112 */ "x86sll.w\t\0"  | 
1085  | 0  |   /* 12122 */ "armsll.w\t\0"  | 
1086  | 0  |   /* 12132 */ "xvsll.w\t\0"  | 
1087  | 0  |   /* 12141 */ "xvldrepl.w\t\0"  | 
1088  | 0  |   /* 12153 */ "x86srl.w\t\0"  | 
1089  | 0  |   /* 12163 */ "armsrl.w\t\0"  | 
1090  | 0  |   /* 12173 */ "xvsrl.w\t\0"  | 
1091  | 0  |   /* 12182 */ "alsl.w\t\0"  | 
1092  | 0  |   /* 12190 */ "x86rotl.w\t\0"  | 
1093  | 0  |   /* 12201 */ "stl.w\t\0"  | 
1094  | 0  |   /* 12208 */ "x86mul.w\t\0"  | 
1095  | 0  |   /* 12218 */ "xvmul.w\t\0"  | 
1096  | 0  |   /* 12227 */ "xvilvl.w\t\0"  | 
1097  | 0  |   /* 12237 */ "xvstelm.w\t\0"  | 
1098  | 0  |   /* 12248 */ "xvperm.w\t\0"  | 
1099  | 0  |   /* 12258 */ "ammin.w\t\0"  | 
1100  | 0  |   /* 12267 */ "xvmin.w\t\0"  | 
1101  | 0  |   /* 12276 */ "xvclo.w\t\0"  | 
1102  | 0  |   /* 12285 */ "cto.w\t\0"  | 
1103  | 0  |   /* 12292 */ "amswap.w\t\0"  | 
1104  | 0  |   /* 12302 */ "llacq.w\t\0"  | 
1105  | 0  |   /* 12311 */ "xvseq.w\t\0"  | 
1106  | 0  |   /* 12320 */ "xvsrar.w\t\0"  | 
1107  | 0  |   /* 12330 */ "x86rcr.w\t\0"  | 
1108  | 0  |   /* 12340 */ "ldr.w\t\0"  | 
1109  | 0  |   /* 12347 */ "movgr2fr.w\t\0"  | 
1110  | 0  |   /* 12359 */ "xvpickve2gr.w\t\0"  | 
1111  | 0  |   /* 12374 */ "xvavgr.w\t\0"  | 
1112  | 0  |   /* 12384 */ "xvbitclr.w\t\0"  | 
1113  | 0  |   /* 12396 */ "xvsrlr.w\t\0"  | 
1114  | 0  |   /* 12406 */ "x86or.w\t\0"  | 
1115  | 0  |   /* 12415 */ "amor.w\t\0"  | 
1116  | 0  |   /* 12423 */ "armor.w\t\0"  | 
1117  | 0  |   /* 12432 */ "x86xor.w\t\0"  | 
1118  | 0  |   /* 12442 */ "amxor.w\t\0"  | 
1119  | 0  |   /* 12451 */ "armxor.w\t\0"  | 
1120  | 0  |   /* 12461 */ "x86rotr.w\t\0"  | 
1121  | 0  |   /* 12472 */ "armrotr.w\t\0"  | 
1122  | 0  |   /* 12483 */ "xvrotr.w\t\0"  | 
1123  | 0  |   /* 12493 */ "ldptr.w\t\0"  | 
1124  | 0  |   /* 12502 */ "stptr.w\t\0"  | 
1125  | 0  |   /* 12511 */ "str.w\t\0"  | 
1126  | 0  |   /* 12518 */ "xvreplgr2vr.w\t\0"  | 
1127  | 0  |   /* 12533 */ "xvinsgr2vr.w\t\0"  | 
1128  | 0  |   /* 12547 */ "iocsrwr.w\t\0"  | 
1129  | 0  |   /* 12558 */ "xvffint.s.w\t\0"  | 
1130  | 0  |   /* 12571 */ "amcas.w\t\0"  | 
1131  | 0  |   /* 12580 */ "bstrins.w\t\0"  | 
1132  | 0  |   /* 12591 */ "xvextrins.w\t\0"  | 
1133  | 0  |   /* 12604 */ "xvsat.w\t\0"  | 
1134  | 0  |   /* 12613 */ "xvbitset.w\t\0"  | 
1135  | 0  |   /* 12625 */ "ldgt.w\t\0"  | 
1136  | 0  |   /* 12633 */ "stgt.w\t\0"  | 
1137  | 0  |   /* 12641 */ "xvslt.w\t\0"  | 
1138  | 0  |   /* 12650 */ "xvpcnt.w\t\0"  | 
1139  | 0  |   /* 12660 */ "armnot.w\t\0"  | 
1140  | 0  |   /* 12670 */ "st.w\t\0"  | 
1141  | 0  |   /* 12676 */ "xvssrani.hu.w\t\0"  | 
1142  | 0  |   /* 12691 */ "xvssrlni.hu.w\t\0"  | 
1143  | 0  |   /* 12706 */ "xvssrarni.hu.w\t\0"  | 
1144  | 0  |   /* 12722 */ "xvssrlrni.hu.w\t\0"  | 
1145  | 0  |   /* 12738 */ "xvssran.hu.w\t\0"  | 
1146  | 0  |   /* 12752 */ "xvssrln.hu.w\t\0"  | 
1147  | 0  |   /* 12766 */ "xvssrarn.hu.w\t\0"  | 
1148  | 0  |   /* 12781 */ "xvssrlrn.hu.w\t\0"  | 
1149  | 0  |   /* 12796 */ "xvmaddwod.d.wu.w\t\0"  | 
1150  | 0  |   /* 12814 */ "xvaddwod.d.wu.w\t\0"  | 
1151  | 0  |   /* 12831 */ "xvmulwod.d.wu.w\t\0"  | 
1152  | 0  |   /* 12848 */ "xvmaddwev.d.wu.w\t\0"  | 
1153  | 0  |   /* 12866 */ "xvaddwev.d.wu.w\t\0"  | 
1154  | 0  |   /* 12883 */ "xvmulwev.d.wu.w\t\0"  | 
1155  | 0  |   /* 12900 */ "xvpackev.w\t\0"  | 
1156  | 0  |   /* 12912 */ "xvpickev.w\t\0"  | 
1157  | 0  |   /* 12924 */ "xvbitrev.w\t\0"  | 
1158  | 0  |   /* 12936 */ "xvdiv.w\t\0"  | 
1159  | 0  |   /* 12945 */ "xvsigncov.w\t\0"  | 
1160  | 0  |   /* 12958 */ "armmov.w\t\0"  | 
1161  | 0  |   /* 12968 */ "crcc.w.w.w\t\0"  | 
1162  | 0  |   /* 12980 */ "crc.w.w.w\t\0"  | 
1163  | 0  |   /* 12991 */ "ammax.w\t\0"  | 
1164  | 0  |   /* 13000 */ "xvmax.w\t\0"  | 
1165  | 0  |   /* 13009 */ "ldx.w\t\0"  | 
1166  | 0  |   /* 13016 */ "armrrx.w\t\0"  | 
1167  | 0  |   /* 13026 */ "stx.w\t\0"  | 
1168  | 0  |   /* 13033 */ "xvsetallnez.w\t\0"  | 
1169  | 0  |   /* 13048 */ "xvclz.w\t\0"  | 
1170  | 0  |   /* 13057 */ "xvsetanyeqz.w\t\0"  | 
1171  | 0  |   /* 13072 */ "ctz.w\t\0"  | 
1172  | 0  |   /* 13079 */ "xvmskltz.w\t\0"  | 
1173  | 0  |   /* 13091 */ "revb.2w\t\0"  | 
1174  | 0  |   /* 13100 */ "revh.2w\t\0"  | 
1175  | 0  |   /* 13109 */ "preldx\t\0"  | 
1176  | 0  |   /* 13117 */ "xvldx\t\0"  | 
1177  | 0  |   /* 13124 */ "xvstx\t\0"  | 
1178  | 0  |   /* 13131 */ "bnez\t\0"  | 
1179  | 0  |   /* 13137 */ "bcnez\t\0"  | 
1180  | 0  |   /* 13144 */ "masknez\t\0"  | 
1181  | 0  |   /* 13153 */ "beqz\t\0"  | 
1182  | 0  |   /* 13159 */ "bceqz\t\0"  | 
1183  | 0  |   /* 13166 */ "maskeqz\t\0"  | 
1184  | 0  |   /* 13175 */ "# XRay Function Patchable RET.\0"  | 
1185  | 0  |   /* 13206 */ "# XRay Typed Event Log.\0"  | 
1186  | 0  |   /* 13230 */ "# XRay Custom Event Log.\0"  | 
1187  | 0  |   /* 13255 */ "# XRay Function Enter.\0"  | 
1188  | 0  |   /* 13278 */ "# XRay Tail Call Exit.\0"  | 
1189  | 0  |   /* 13301 */ "# XRay Function Exit.\0"  | 
1190  | 0  |   /* 13323 */ "LIFETIME_END\0"  | 
1191  | 0  |   /* 13336 */ "PSEUDO_PROBE\0"  | 
1192  | 0  |   /* 13349 */ "BUNDLE\0"  | 
1193  | 0  |   /* 13356 */ "DBG_VALUE\0"  | 
1194  | 0  |   /* 13366 */ "DBG_INSTR_REF\0"  | 
1195  | 0  |   /* 13380 */ "DBG_PHI\0"  | 
1196  | 0  |   /* 13388 */ "DBG_LABEL\0"  | 
1197  | 0  |   /* 13398 */ "LIFETIME_START\0"  | 
1198  | 0  |   /* 13413 */ "DBG_VALUE_LIST\0"  | 
1199  | 0  |   /* 13428 */ "# FEntry call\0"  | 
1200  | 0  | };  | 
1201  | 0  | #endif // CAPSTONE_DIET  | 
1202  |  | 
  | 
1203  | 0  |   static const uint16_t OpInfo0[] = { | 
1204  | 0  |     0U, // PHI  | 
1205  | 0  |     0U, // INLINEASM  | 
1206  | 0  |     0U, // INLINEASM_BR  | 
1207  | 0  |     0U, // CFI_INSTRUCTION  | 
1208  | 0  |     0U, // EH_LABEL  | 
1209  | 0  |     0U, // GC_LABEL  | 
1210  | 0  |     0U, // ANNOTATION_LABEL  | 
1211  | 0  |     0U, // KILL  | 
1212  | 0  |     0U, // EXTRACT_SUBREG  | 
1213  | 0  |     0U, // INSERT_SUBREG  | 
1214  | 0  |     0U, // IMPLICIT_DEF  | 
1215  | 0  |     0U, // SUBREG_TO_REG  | 
1216  | 0  |     0U, // COPY_TO_REGCLASS  | 
1217  | 0  |     13357U, // DBG_VALUE  | 
1218  | 0  |     13414U, // DBG_VALUE_LIST  | 
1219  | 0  |     13367U, // DBG_INSTR_REF  | 
1220  | 0  |     13381U, // DBG_PHI  | 
1221  | 0  |     13389U, // DBG_LABEL  | 
1222  | 0  |     0U, // REG_SEQUENCE  | 
1223  | 0  |     0U, // COPY  | 
1224  | 0  |     13350U, // BUNDLE  | 
1225  | 0  |     13399U, // LIFETIME_START  | 
1226  | 0  |     13324U, // LIFETIME_END  | 
1227  | 0  |     13337U, // PSEUDO_PROBE  | 
1228  | 0  |     0U, // ARITH_FENCE  | 
1229  | 0  |     0U, // STACKMAP  | 
1230  | 0  |     13429U, // FENTRY_CALL  | 
1231  | 0  |     0U, // PATCHPOINT  | 
1232  | 0  |     0U, // LOAD_STACK_GUARD  | 
1233  | 0  |     0U, // PREALLOCATED_SETUP  | 
1234  | 0  |     0U, // PREALLOCATED_ARG  | 
1235  | 0  |     0U, // STATEPOINT  | 
1236  | 0  |     0U, // LOCAL_ESCAPE  | 
1237  | 0  |     0U, // FAULTING_OP  | 
1238  | 0  |     0U, // PATCHABLE_OP  | 
1239  | 0  |     13256U, // PATCHABLE_FUNCTION_ENTER  | 
1240  | 0  |     13176U, // PATCHABLE_RET  | 
1241  | 0  |     13302U, // PATCHABLE_FUNCTION_EXIT  | 
1242  | 0  |     13279U, // PATCHABLE_TAIL_CALL  | 
1243  | 0  |     13231U, // PATCHABLE_EVENT_CALL  | 
1244  | 0  |     13207U, // PATCHABLE_TYPED_EVENT_CALL  | 
1245  | 0  |     0U, // ICALL_BRANCH_FUNNEL  | 
1246  | 0  |     0U, // MEMBARRIER  | 
1247  | 0  |     0U, // JUMP_TABLE_DEBUG_INFO  | 
1248  | 0  |     0U, // G_ASSERT_SEXT  | 
1249  | 0  |     0U, // G_ASSERT_ZEXT  | 
1250  | 0  |     0U, // G_ASSERT_ALIGN  | 
1251  | 0  |     0U, // G_ADD  | 
1252  | 0  |     0U, // G_SUB  | 
1253  | 0  |     0U, // G_MUL  | 
1254  | 0  |     0U, // G_SDIV  | 
1255  | 0  |     0U, // G_UDIV  | 
1256  | 0  |     0U, // G_SREM  | 
1257  | 0  |     0U, // G_UREM  | 
1258  | 0  |     0U, // G_SDIVREM  | 
1259  | 0  |     0U, // G_UDIVREM  | 
1260  | 0  |     0U, // G_AND  | 
1261  | 0  |     0U, // G_OR  | 
1262  | 0  |     0U, // G_XOR  | 
1263  | 0  |     0U, // G_IMPLICIT_DEF  | 
1264  | 0  |     0U, // G_PHI  | 
1265  | 0  |     0U, // G_FRAME_INDEX  | 
1266  | 0  |     0U, // G_GLOBAL_VALUE  | 
1267  | 0  |     0U, // G_CONSTANT_POOL  | 
1268  | 0  |     0U, // G_EXTRACT  | 
1269  | 0  |     0U, // G_UNMERGE_VALUES  | 
1270  | 0  |     0U, // G_INSERT  | 
1271  | 0  |     0U, // G_MERGE_VALUES  | 
1272  | 0  |     0U, // G_BUILD_VECTOR  | 
1273  | 0  |     0U, // G_BUILD_VECTOR_TRUNC  | 
1274  | 0  |     0U, // G_CONCAT_VECTORS  | 
1275  | 0  |     0U, // G_PTRTOINT  | 
1276  | 0  |     0U, // G_INTTOPTR  | 
1277  | 0  |     0U, // G_BITCAST  | 
1278  | 0  |     0U, // G_FREEZE  | 
1279  | 0  |     0U, // G_CONSTANT_FOLD_BARRIER  | 
1280  | 0  |     0U, // G_INTRINSIC_FPTRUNC_ROUND  | 
1281  | 0  |     0U, // G_INTRINSIC_TRUNC  | 
1282  | 0  |     0U, // G_INTRINSIC_ROUND  | 
1283  | 0  |     0U, // G_INTRINSIC_LRINT  | 
1284  | 0  |     0U, // G_INTRINSIC_ROUNDEVEN  | 
1285  | 0  |     0U, // G_READCYCLECOUNTER  | 
1286  | 0  |     0U, // G_LOAD  | 
1287  | 0  |     0U, // G_SEXTLOAD  | 
1288  | 0  |     0U, // G_ZEXTLOAD  | 
1289  | 0  |     0U, // G_INDEXED_LOAD  | 
1290  | 0  |     0U, // G_INDEXED_SEXTLOAD  | 
1291  | 0  |     0U, // G_INDEXED_ZEXTLOAD  | 
1292  | 0  |     0U, // G_STORE  | 
1293  | 0  |     0U, // G_INDEXED_STORE  | 
1294  | 0  |     0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS  | 
1295  | 0  |     0U, // G_ATOMIC_CMPXCHG  | 
1296  | 0  |     0U, // G_ATOMICRMW_XCHG  | 
1297  | 0  |     0U, // G_ATOMICRMW_ADD  | 
1298  | 0  |     0U, // G_ATOMICRMW_SUB  | 
1299  | 0  |     0U, // G_ATOMICRMW_AND  | 
1300  | 0  |     0U, // G_ATOMICRMW_NAND  | 
1301  | 0  |     0U, // G_ATOMICRMW_OR  | 
1302  | 0  |     0U, // G_ATOMICRMW_XOR  | 
1303  | 0  |     0U, // G_ATOMICRMW_MAX  | 
1304  | 0  |     0U, // G_ATOMICRMW_MIN  | 
1305  | 0  |     0U, // G_ATOMICRMW_UMAX  | 
1306  | 0  |     0U, // G_ATOMICRMW_UMIN  | 
1307  | 0  |     0U, // G_ATOMICRMW_FADD  | 
1308  | 0  |     0U, // G_ATOMICRMW_FSUB  | 
1309  | 0  |     0U, // G_ATOMICRMW_FMAX  | 
1310  | 0  |     0U, // G_ATOMICRMW_FMIN  | 
1311  | 0  |     0U, // G_ATOMICRMW_UINC_WRAP  | 
1312  | 0  |     0U, // G_ATOMICRMW_UDEC_WRAP  | 
1313  | 0  |     0U, // G_FENCE  | 
1314  | 0  |     0U, // G_PREFETCH  | 
1315  | 0  |     0U, // G_BRCOND  | 
1316  | 0  |     0U, // G_BRINDIRECT  | 
1317  | 0  |     0U, // G_INVOKE_REGION_START  | 
1318  | 0  |     0U, // G_INTRINSIC  | 
1319  | 0  |     0U, // G_INTRINSIC_W_SIDE_EFFECTS  | 
1320  | 0  |     0U, // G_INTRINSIC_CONVERGENT  | 
1321  | 0  |     0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS  | 
1322  | 0  |     0U, // G_ANYEXT  | 
1323  | 0  |     0U, // G_TRUNC  | 
1324  | 0  |     0U, // G_CONSTANT  | 
1325  | 0  |     0U, // G_FCONSTANT  | 
1326  | 0  |     0U, // G_VASTART  | 
1327  | 0  |     0U, // G_VAARG  | 
1328  | 0  |     0U, // G_SEXT  | 
1329  | 0  |     0U, // G_SEXT_INREG  | 
1330  | 0  |     0U, // G_ZEXT  | 
1331  | 0  |     0U, // G_SHL  | 
1332  | 0  |     0U, // G_LSHR  | 
1333  | 0  |     0U, // G_ASHR  | 
1334  | 0  |     0U, // G_FSHL  | 
1335  | 0  |     0U, // G_FSHR  | 
1336  | 0  |     0U, // G_ROTR  | 
1337  | 0  |     0U, // G_ROTL  | 
1338  | 0  |     0U, // G_ICMP  | 
1339  | 0  |     0U, // G_FCMP  | 
1340  | 0  |     0U, // G_SELECT  | 
1341  | 0  |     0U, // G_UADDO  | 
1342  | 0  |     0U, // G_UADDE  | 
1343  | 0  |     0U, // G_USUBO  | 
1344  | 0  |     0U, // G_USUBE  | 
1345  | 0  |     0U, // G_SADDO  | 
1346  | 0  |     0U, // G_SADDE  | 
1347  | 0  |     0U, // G_SSUBO  | 
1348  | 0  |     0U, // G_SSUBE  | 
1349  | 0  |     0U, // G_UMULO  | 
1350  | 0  |     0U, // G_SMULO  | 
1351  | 0  |     0U, // G_UMULH  | 
1352  | 0  |     0U, // G_SMULH  | 
1353  | 0  |     0U, // G_UADDSAT  | 
1354  | 0  |     0U, // G_SADDSAT  | 
1355  | 0  |     0U, // G_USUBSAT  | 
1356  | 0  |     0U, // G_SSUBSAT  | 
1357  | 0  |     0U, // G_USHLSAT  | 
1358  | 0  |     0U, // G_SSHLSAT  | 
1359  | 0  |     0U, // G_SMULFIX  | 
1360  | 0  |     0U, // G_UMULFIX  | 
1361  | 0  |     0U, // G_SMULFIXSAT  | 
1362  | 0  |     0U, // G_UMULFIXSAT  | 
1363  | 0  |     0U, // G_SDIVFIX  | 
1364  | 0  |     0U, // G_UDIVFIX  | 
1365  | 0  |     0U, // G_SDIVFIXSAT  | 
1366  | 0  |     0U, // G_UDIVFIXSAT  | 
1367  | 0  |     0U, // G_FADD  | 
1368  | 0  |     0U, // G_FSUB  | 
1369  | 0  |     0U, // G_FMUL  | 
1370  | 0  |     0U, // G_FMA  | 
1371  | 0  |     0U, // G_FMAD  | 
1372  | 0  |     0U, // G_FDIV  | 
1373  | 0  |     0U, // G_FREM  | 
1374  | 0  |     0U, // G_FPOW  | 
1375  | 0  |     0U, // G_FPOWI  | 
1376  | 0  |     0U, // G_FEXP  | 
1377  | 0  |     0U, // G_FEXP2  | 
1378  | 0  |     0U, // G_FEXP10  | 
1379  | 0  |     0U, // G_FLOG  | 
1380  | 0  |     0U, // G_FLOG2  | 
1381  | 0  |     0U, // G_FLOG10  | 
1382  | 0  |     0U, // G_FLDEXP  | 
1383  | 0  |     0U, // G_FFREXP  | 
1384  | 0  |     0U, // G_FNEG  | 
1385  | 0  |     0U, // G_FPEXT  | 
1386  | 0  |     0U, // G_FPTRUNC  | 
1387  | 0  |     0U, // G_FPTOSI  | 
1388  | 0  |     0U, // G_FPTOUI  | 
1389  | 0  |     0U, // G_SITOFP  | 
1390  | 0  |     0U, // G_UITOFP  | 
1391  | 0  |     0U, // G_FABS  | 
1392  | 0  |     0U, // G_FCOPYSIGN  | 
1393  | 0  |     0U, // G_IS_FPCLASS  | 
1394  | 0  |     0U, // G_FCANONICALIZE  | 
1395  | 0  |     0U, // G_FMINNUM  | 
1396  | 0  |     0U, // G_FMAXNUM  | 
1397  | 0  |     0U, // G_FMINNUM_IEEE  | 
1398  | 0  |     0U, // G_FMAXNUM_IEEE  | 
1399  | 0  |     0U, // G_FMINIMUM  | 
1400  | 0  |     0U, // G_FMAXIMUM  | 
1401  | 0  |     0U, // G_GET_FPENV  | 
1402  | 0  |     0U, // G_SET_FPENV  | 
1403  | 0  |     0U, // G_RESET_FPENV  | 
1404  | 0  |     0U, // G_GET_FPMODE  | 
1405  | 0  |     0U, // G_SET_FPMODE  | 
1406  | 0  |     0U, // G_RESET_FPMODE  | 
1407  | 0  |     0U, // G_PTR_ADD  | 
1408  | 0  |     0U, // G_PTRMASK  | 
1409  | 0  |     0U, // G_SMIN  | 
1410  | 0  |     0U, // G_SMAX  | 
1411  | 0  |     0U, // G_UMIN  | 
1412  | 0  |     0U, // G_UMAX  | 
1413  | 0  |     0U, // G_ABS  | 
1414  | 0  |     0U, // G_LROUND  | 
1415  | 0  |     0U, // G_LLROUND  | 
1416  | 0  |     0U, // G_BR  | 
1417  | 0  |     0U, // G_BRJT  | 
1418  | 0  |     0U, // G_INSERT_VECTOR_ELT  | 
1419  | 0  |     0U, // G_EXTRACT_VECTOR_ELT  | 
1420  | 0  |     0U, // G_SHUFFLE_VECTOR  | 
1421  | 0  |     0U, // G_CTTZ  | 
1422  | 0  |     0U, // G_CTTZ_ZERO_UNDEF  | 
1423  | 0  |     0U, // G_CTLZ  | 
1424  | 0  |     0U, // G_CTLZ_ZERO_UNDEF  | 
1425  | 0  |     0U, // G_CTPOP  | 
1426  | 0  |     0U, // G_BSWAP  | 
1427  | 0  |     0U, // G_BITREVERSE  | 
1428  | 0  |     0U, // G_FCEIL  | 
1429  | 0  |     0U, // G_FCOS  | 
1430  | 0  |     0U, // G_FSIN  | 
1431  | 0  |     0U, // G_FSQRT  | 
1432  | 0  |     0U, // G_FFLOOR  | 
1433  | 0  |     0U, // G_FRINT  | 
1434  | 0  |     0U, // G_FNEARBYINT  | 
1435  | 0  |     0U, // G_ADDRSPACE_CAST  | 
1436  | 0  |     0U, // G_BLOCK_ADDR  | 
1437  | 0  |     0U, // G_JUMP_TABLE  | 
1438  | 0  |     0U, // G_DYN_STACKALLOC  | 
1439  | 0  |     0U, // G_STACKSAVE  | 
1440  | 0  |     0U, // G_STACKRESTORE  | 
1441  | 0  |     0U, // G_STRICT_FADD  | 
1442  | 0  |     0U, // G_STRICT_FSUB  | 
1443  | 0  |     0U, // G_STRICT_FMUL  | 
1444  | 0  |     0U, // G_STRICT_FDIV  | 
1445  | 0  |     0U, // G_STRICT_FREM  | 
1446  | 0  |     0U, // G_STRICT_FMA  | 
1447  | 0  |     0U, // G_STRICT_FSQRT  | 
1448  | 0  |     0U, // G_STRICT_FLDEXP  | 
1449  | 0  |     0U, // G_READ_REGISTER  | 
1450  | 0  |     0U, // G_WRITE_REGISTER  | 
1451  | 0  |     0U, // G_MEMCPY  | 
1452  | 0  |     0U, // G_MEMCPY_INLINE  | 
1453  | 0  |     0U, // G_MEMMOVE  | 
1454  | 0  |     0U, // G_MEMSET  | 
1455  | 0  |     0U, // G_BZERO  | 
1456  | 0  |     0U, // G_VECREDUCE_SEQ_FADD  | 
1457  | 0  |     0U, // G_VECREDUCE_SEQ_FMUL  | 
1458  | 0  |     0U, // G_VECREDUCE_FADD  | 
1459  | 0  |     0U, // G_VECREDUCE_FMUL  | 
1460  | 0  |     0U, // G_VECREDUCE_FMAX  | 
1461  | 0  |     0U, // G_VECREDUCE_FMIN  | 
1462  | 0  |     0U, // G_VECREDUCE_FMAXIMUM  | 
1463  | 0  |     0U, // G_VECREDUCE_FMINIMUM  | 
1464  | 0  |     0U, // G_VECREDUCE_ADD  | 
1465  | 0  |     0U, // G_VECREDUCE_MUL  | 
1466  | 0  |     0U, // G_VECREDUCE_AND  | 
1467  | 0  |     0U, // G_VECREDUCE_OR  | 
1468  | 0  |     0U, // G_VECREDUCE_XOR  | 
1469  | 0  |     0U, // G_VECREDUCE_SMAX  | 
1470  | 0  |     0U, // G_VECREDUCE_SMIN  | 
1471  | 0  |     0U, // G_VECREDUCE_UMAX  | 
1472  | 0  |     0U, // G_VECREDUCE_UMIN  | 
1473  | 0  |     0U, // G_SBFX  | 
1474  | 0  |     0U, // G_UBFX  | 
1475  | 0  |     7U, // ADJCALLSTACKDOWN  | 
1476  | 0  |     7U, // ADJCALLSTACKUP  | 
1477  | 0  |     7U, // PseudoAtomicLoadAdd32  | 
1478  | 0  |     7U, // PseudoAtomicLoadAnd32  | 
1479  | 0  |     7U, // PseudoAtomicLoadNand32  | 
1480  | 0  |     7U, // PseudoAtomicLoadNand64  | 
1481  | 0  |     7U, // PseudoAtomicLoadOr32  | 
1482  | 0  |     7U, // PseudoAtomicLoadSub32  | 
1483  | 0  |     7U, // PseudoAtomicLoadXor32  | 
1484  | 0  |     7U, // PseudoAtomicStoreD  | 
1485  | 0  |     7U, // PseudoAtomicStoreW  | 
1486  | 0  |     7U, // PseudoAtomicSwap32  | 
1487  | 0  |     7U, // PseudoBR  | 
1488  | 0  |     7U, // PseudoBRIND  | 
1489  | 0  |     7U, // PseudoB_TAIL  | 
1490  | 0  |     7U, // PseudoCALL  | 
1491  | 0  |     16409U, // PseudoCALL36  | 
1492  | 0  |     7U, // PseudoCALLIndirect  | 
1493  | 0  |     7U, // PseudoCALL_LARGE  | 
1494  | 0  |     7U, // PseudoCALL_MEDIUM  | 
1495  | 0  |     7U, // PseudoCmpXchg32  | 
1496  | 0  |     7U, // PseudoCmpXchg64  | 
1497  | 0  |     7U, // PseudoCopyCFR  | 
1498  | 0  |     7U, // PseudoJIRL_CALL  | 
1499  | 0  |     7U, // PseudoJIRL_TAIL  | 
1500  | 0  |     24878U, // PseudoLA_ABS  | 
1501  | 0  |     24878U, // PseudoLA_ABS_LARGE  | 
1502  | 0  |     24896U, // PseudoLA_GOT  | 
1503  | 0  |     24896U, // PseudoLA_GOT_LARGE  | 
1504  | 0  |     23302U, // PseudoLA_PCREL  | 
1505  | 0  |     23302U, // PseudoLA_PCREL_LARGE  | 
1506  | 0  |     21043U, // PseudoLA_TLS_GD  | 
1507  | 0  |     21043U, // PseudoLA_TLS_GD_LARGE  | 
1508  | 0  |     21114U, // PseudoLA_TLS_IE  | 
1509  | 0  |     21114U, // PseudoLA_TLS_IE_LARGE  | 
1510  | 0  |     21065U, // PseudoLA_TLS_LD  | 
1511  | 0  |     21065U, // PseudoLA_TLS_LD_LARGE  | 
1512  | 0  |     21125U, // PseudoLA_TLS_LE  | 
1513  | 0  |     7U, // PseudoLD_CFR  | 
1514  | 0  |     18967U, // PseudoLI_D  | 
1515  | 0  |     28185U, // PseudoLI_W  | 
1516  | 0  |     7U, // PseudoMaskedAtomicLoadAdd32  | 
1517  | 0  |     7U, // PseudoMaskedAtomicLoadMax32  | 
1518  | 0  |     7U, // PseudoMaskedAtomicLoadMin32  | 
1519  | 0  |     7U, // PseudoMaskedAtomicLoadNand32  | 
1520  | 0  |     7U, // PseudoMaskedAtomicLoadSub32  | 
1521  | 0  |     7U, // PseudoMaskedAtomicLoadUMax32  | 
1522  | 0  |     7U, // PseudoMaskedAtomicLoadUMin32  | 
1523  | 0  |     7U, // PseudoMaskedAtomicSwap32  | 
1524  | 0  |     7U, // PseudoMaskedCmpXchg32  | 
1525  | 0  |     7U, // PseudoRET  | 
1526  | 0  |     7U, // PseudoST_CFR  | 
1527  | 0  |     7U, // PseudoTAIL  | 
1528  | 0  |     16401U, // PseudoTAIL36  | 
1529  | 0  |     7U, // PseudoTAILIndirect  | 
1530  | 0  |     7U, // PseudoTAIL_LARGE  | 
1531  | 0  |     7U, // PseudoTAIL_MEDIUM  | 
1532  | 0  |     7U, // PseudoUNIMP  | 
1533  | 0  |     7U, // PseudoVBNZ  | 
1534  | 0  |     7U, // PseudoVBNZ_B  | 
1535  | 0  |     7U, // PseudoVBNZ_D  | 
1536  | 0  |     7U, // PseudoVBNZ_H  | 
1537  | 0  |     7U, // PseudoVBNZ_W  | 
1538  | 0  |     7U, // PseudoVBZ  | 
1539  | 0  |     7U, // PseudoVBZ_B  | 
1540  | 0  |     7U, // PseudoVBZ_D  | 
1541  | 0  |     7U, // PseudoVBZ_H  | 
1542  | 0  |     7U, // PseudoVBZ_W  | 
1543  | 0  |     17096U, // PseudoVREPLI_B  | 
1544  | 0  |     19006U, // PseudoVREPLI_D  | 
1545  | 0  |     21976U, // PseudoVREPLI_H  | 
1546  | 0  |     28224U, // PseudoVREPLI_W  | 
1547  | 0  |     7U, // PseudoXVBNZ  | 
1548  | 0  |     7U, // PseudoXVBNZ_B  | 
1549  | 0  |     7U, // PseudoXVBNZ_D  | 
1550  | 0  |     7U, // PseudoXVBNZ_H  | 
1551  | 0  |     7U, // PseudoXVBNZ_W  | 
1552  | 0  |     7U, // PseudoXVBZ  | 
1553  | 0  |     7U, // PseudoXVBZ_B  | 
1554  | 0  |     7U, // PseudoXVBZ_D  | 
1555  | 0  |     7U, // PseudoXVBZ_H  | 
1556  | 0  |     7U, // PseudoXVBZ_W  | 
1557  | 0  |     7U, // PseudoXVINSGR2VR_B  | 
1558  | 0  |     7U, // PseudoXVINSGR2VR_H  | 
1559  | 0  |     17095U, // PseudoXVREPLI_B  | 
1560  | 0  |     19005U, // PseudoXVREPLI_D  | 
1561  | 0  |     21975U, // PseudoXVREPLI_H  | 
1562  | 0  |     28223U, // PseudoXVREPLI_W  | 
1563  | 0  |     7U, // RDFCSR  | 
1564  | 0  |     7U, // WRFCSR  | 
1565  | 0  |     16548U, // ADC_B  | 
1566  | 0  |     18301U, // ADC_D  | 
1567  | 0  |     21630U, // ADC_H  | 
1568  | 0  |     27262U, // ADC_W  | 
1569  | 0  |     18916U, // ADDI_D  | 
1570  | 0  |     28134U, // ADDI_W  | 
1571  | 0  |     18843U, // ADDU12I_D  | 
1572  | 0  |     28070U, // ADDU12I_W  | 
1573  | 0  |     18884U, // ADDU16I_D  | 
1574  | 0  |     18337U, // ADD_D  | 
1575  | 0  |     27559U, // ADD_W  | 
1576  | 0  |     19369U, // ALSL_D  | 
1577  | 0  |     28567U, // ALSL_W  | 
1578  | 0  |     26683U, // ALSL_WU  | 
1579  | 0  |     16598U, // AMADD_B  | 
1580  | 0  |     18354U, // AMADD_D  | 
1581  | 0  |     21680U, // AMADD_H  | 
1582  | 0  |     27566U, // AMADD_W  | 
1583  | 0  |     16459U, // AMADD__DB_B  | 
1584  | 0  |     18090U, // AMADD__DB_D  | 
1585  | 0  |     21541U, // AMADD__DB_H  | 
1586  | 0  |     27094U, // AMADD__DB_W  | 
1587  | 0  |     18443U, // AMAND_D  | 
1588  | 0  |     27630U, // AMAND_W  | 
1589  | 0  |     18102U, // AMAND__DB_D  | 
1590  | 0  |     27106U, // AMAND__DB_W  | 
1591  | 0  |     17619U, // AMCAS_B  | 
1592  | 0  |     20078U, // AMCAS_D  | 
1593  | 0  |     22496U, // AMCAS_H  | 
1594  | 0  |     28956U, // AMCAS_W  | 
1595  | 0  |     16484U, // AMCAS__DB_B  | 
1596  | 0  |     18162U, // AMCAS__DB_D  | 
1597  | 0  |     21566U, // AMCAS__DB_H  | 
1598  | 0  |     27166U, // AMCAS__DB_W  | 
1599  | 0  |     20938U, // AMMAX_D  | 
1600  | 0  |     25842U, // AMMAX_DU  | 
1601  | 0  |     29376U, // AMMAX_W  | 
1602  | 0  |     26869U, // AMMAX_WU  | 
1603  | 0  |     18174U, // AMMAX__DB_D  | 
1604  | 0  |     25391U, // AMMAX__DB_DU  | 
1605  | 0  |     27178U, // AMMAX__DB_W  | 
1606  | 0  |     26360U, // AMMAX__DB_WU  | 
1607  | 0  |     19481U, // AMMIN_D  | 
1608  | 0  |     25585U, // AMMIN_DU  | 
1609  | 0  |     28643U, // AMMIN_W  | 
1610  | 0  |     26703U, // AMMIN_WU  | 
1611  | 0  |     18114U, // AMMIN__DB_D  | 
1612  | 0  |     25378U, // AMMIN__DB_DU  | 
1613  | 0  |     27118U, // AMMIN__DB_W  | 
1614  | 0  |     26347U, // AMMIN__DB_WU  | 
1615  | 0  |     19939U, // AMOR_D  | 
1616  | 0  |     28800U, // AMOR_W  | 
1617  | 0  |     18139U, // AMOR__DB_D  | 
1618  | 0  |     27143U, // AMOR__DB_W  | 
1619  | 0  |     17444U, // AMSWAP_B  | 
1620  | 0  |     19543U, // AMSWAP_D  | 
1621  | 0  |     22295U, // AMSWAP_H  | 
1622  | 0  |     28677U, // AMSWAP_W  | 
1623  | 0  |     16471U, // AMSWAP__DB_B  | 
1624  | 0  |     18126U, // AMSWAP__DB_D  | 
1625  | 0  |     21553U, // AMSWAP__DB_H  | 
1626  | 0  |     27130U, // AMSWAP__DB_W  | 
1627  | 0  |     19971U, // AMXOR_D  | 
1628  | 0  |     28827U, // AMXOR_W  | 
1629  | 0  |     18150U, // AMXOR__DB_D  | 
1630  | 0  |     27154U, // AMXOR__DB_W  | 
1631  | 0  |     21089U, // AND  | 
1632  | 0  |     23210U, // ANDI  | 
1633  | 0  |     23362U, // ANDN  | 
1634  | 0  |     27269U, // ARMADC_W  | 
1635  | 0  |     27575U, // ARMADD_W  | 
1636  | 0  |     27639U, // ARMAND_W  | 
1637  | 0  |     21221U, // ARMMFFLAG  | 
1638  | 0  |     21181U, // ARMMOVE  | 
1639  | 0  |     20628U, // ARMMOV_D  | 
1640  | 0  |     29343U, // ARMMOV_W  | 
1641  | 0  |     21243U, // ARMMTFLAG  | 
1642  | 0  |     29045U, // ARMNOT_W  | 
1643  | 0  |     28808U, // ARMOR_W  | 
1644  | 0  |     28367U, // ARMROTRI_W  | 
1645  | 0  |     28857U, // ARMROTR_W  | 
1646  | 0  |     29401U, // ARMRRX_W  | 
1647  | 0  |     27249U, // ARMSBC_W  | 
1648  | 0  |     28202U, // ARMSLLI_W  | 
1649  | 0  |     28507U, // ARMSLL_W  | 
1650  | 0  |     28113U, // ARMSRAI_W  | 
1651  | 0  |     27052U, // ARMSRA_W  | 
1652  | 0  |     28245U, // ARMSRLI_W  | 
1653  | 0  |     28548U, // ARMSRL_W  | 
1654  | 0  |     27200U, // ARMSUB_W  | 
1655  | 0  |     28836U, // ARMXOR_W  | 
1656  | 0  |     20161U, // ASRTGT_D  | 
1657  | 0  |     18563U, // ASRTLE_D  | 
1658  | 0  |     16427U, // B  | 
1659  | 0  |     29544U, // BCEQZ  | 
1660  | 0  |     29522U, // BCNEZ  | 
1661  | 0  |     23650U, // BEQ  | 
1662  | 0  |     29538U, // BEQZ  | 
1663  | 0  |     21109U, // BGE  | 
1664  | 0  |     25862U, // BGEU  | 
1665  | 0  |     17984U, // BITREV_4B  | 
1666  | 0  |     17995U, // BITREV_8B  | 
1667  | 0  |     20578U, // BITREV_D  | 
1668  | 0  |     29311U, // BITREV_W  | 
1669  | 0  |     23286U, // BL  | 
1670  | 0  |     24886U, // BLT  | 
1671  | 0  |     26335U, // BLTU  | 
1672  | 0  |     21142U, // BNE  | 
1673  | 0  |     29516U, // BNEZ  | 
1674  | 0  |     23253U, // BREAK  | 
1675  | 0  |     36479U, // BSTRINS_D  | 
1676  | 0  |     45349U, // BSTRINS_W  | 
1677  | 0  |     19207U, // BSTRPICK_D  | 
1678  | 0  |     28448U, // BSTRPICK_W  | 
1679  | 0  |     19195U, // BYTEPICK_D  | 
1680  | 0  |     28436U, // BYTEPICK_W  | 
1681  | 0  |     23379U, // CACOP  | 
1682  | 0  |     19529U, // CLO_D  | 
1683  | 0  |     28663U, // CLO_W  | 
1684  | 0  |     20989U, // CLZ_D  | 
1685  | 0  |     29435U, // CLZ_W  | 
1686  | 0  |     21265U, // CPUCFG  | 
1687  | 0  |     27071U, // CRCC_W_B_W  | 
1688  | 0  |     27497U, // CRCC_W_D_W  | 
1689  | 0  |     27996U, // CRCC_W_H_W  | 
1690  | 0  |     29353U, // CRCC_W_W_W  | 
1691  | 0  |     27083U, // CRC_W_B_W  | 
1692  | 0  |     27509U, // CRC_W_D_W  | 
1693  | 0  |     28008U, // CRC_W_H_W  | 
1694  | 0  |     29365U, // CRC_W_W_W  | 
1695  | 0  |     21102U, // CSRRD  | 
1696  | 0  |     40150U, // CSRWR  | 
1697  | 0  |     37658U, // CSRXCHG  | 
1698  | 0  |     19536U, // CTO_D  | 
1699  | 0  |     28670U, // CTO_W  | 
1700  | 0  |     21024U, // CTZ_D  | 
1701  | 0  |     29457U, // CTZ_W  | 
1702  | 0  |     23655U, // DBAR  | 
1703  | 0  |     23290U, // DBCL  | 
1704  | 0  |     20591U, // DIV_D  | 
1705  | 0  |     25834U, // DIV_DU  | 
1706  | 0  |     29323U, // DIV_W  | 
1707  | 0  |     26861U, // DIV_WU  | 
1708  | 0  |     6989U,  // ERTN  | 
1709  | 0  |     17865U, // EXT_W_B  | 
1710  | 0  |     22945U, // EXT_W_H  | 
1711  | 0  |     20087U, // FABS_D  | 
1712  | 0  |     24580U, // FABS_S  | 
1713  | 0  |     18346U, // FADD_D  | 
1714  | 0  |     23888U, // FADD_S  | 
1715  | 0  |     20121U, // FCLASS_D  | 
1716  | 0  |     24590U, // FCLASS_S  | 
1717  | 0  |     18746U, // FCMP_CAF_D  | 
1718  | 0  |     24102U, // FCMP_CAF_S  | 
1719  | 0  |     19753U, // FCMP_CEQ_D  | 
1720  | 0  |     24471U, // FCMP_CEQ_S  | 
1721  | 0  |     18519U, // FCMP_CLE_D  | 
1722  | 0  |     23928U, // FCMP_CLE_S  | 
1723  | 0  |     20182U, // FCMP_CLT_D  | 
1724  | 0  |     24620U, // FCMP_CLT_S  | 
1725  | 0  |     18624U, // FCMP_CNE_D  | 
1726  | 0  |     24004U, // FCMP_CNE_S  | 
1727  | 0  |     19927U, // FCMP_COR_D  | 
1728  | 0  |     24554U, // FCMP_COR_S  | 
1729  | 0  |     19790U, // FCMP_CUEQ_D  | 
1730  | 0  |     24499U, // FCMP_CUEQ_S  | 
1731  | 0  |     18584U, // FCMP_CULE_D  | 
1732  | 0  |     23974U, // FCMP_CULE_S  | 
1733  | 0  |     20219U, // FCMP_CULT_D  | 
1734  | 0  |     24648U, // FCMP_CULT_S  | 
1735  | 0  |     18666U, // FCMP_CUNE_D  | 
1736  | 0  |     24046U, // FCMP_CUNE_S  | 
1737  | 0  |     19501U, // FCMP_CUN_D  | 
1738  | 0  |     24418U, // FCMP_CUN_S  | 
1739  | 0  |     18760U, // FCMP_SAF_D  | 
1740  | 0  |     24116U, // FCMP_SAF_S  | 
1741  | 0  |     19767U, // FCMP_SEQ_D  | 
1742  | 0  |     24485U, // FCMP_SEQ_S  | 
1743  | 0  |     18542U, // FCMP_SLE_D  | 
1744  | 0  |     23951U, // FCMP_SLE_S  | 
1745  | 0  |     20196U, // FCMP_SLT_D  | 
1746  | 0  |     24634U, // FCMP_SLT_S  | 
1747  | 0  |     18652U, // FCMP_SNE_D  | 
1748  | 0  |     24032U, // FCMP_SNE_S  | 
1749  | 0  |     19949U, // FCMP_SOR_D  | 
1750  | 0  |     24568U, // FCMP_SOR_S  | 
1751  | 0  |     19805U, // FCMP_SUEQ_D  | 
1752  | 0  |     24514U, // FCMP_SUEQ_S  | 
1753  | 0  |     18599U, // FCMP_SULE_D  | 
1754  | 0  |     23989U, // FCMP_SULE_S  | 
1755  | 0  |     20234U, // FCMP_SULT_D  | 
1756  | 0  |     24663U, // FCMP_SULT_S  | 
1757  | 0  |     18681U, // FCMP_SUNE_D  | 
1758  | 0  |     24061U, // FCMP_SUNE_S  | 
1759  | 0  |     19515U, // FCMP_SUN_D  | 
1760  | 0  |     24432U, // FCMP_SUN_S  | 
1761  | 0  |     19458U, // FCOPYSIGN_D  | 
1762  | 0  |     24393U, // FCOPYSIGN_S  | 
1763  | 0  |     21054U, // FCVT_D_LD  | 
1764  | 0  |     23876U, // FCVT_D_S  | 
1765  | 0  |     18415U, // FCVT_LD_D  | 
1766  | 0  |     20068U, // FCVT_S_D  | 
1767  | 0  |     18506U, // FCVT_UD_D  | 
1768  | 0  |     20590U, // FDIV_D  | 
1769  | 0  |     24749U, // FDIV_S  | 
1770  | 0  |     23262U, // FFINT_D_L  | 
1771  | 0  |     27416U, // FFINT_D_W  | 
1772  | 0  |     23275U, // FFINT_S_L  | 
1773  | 0  |     28945U, // FFINT_S_W  | 
1774  | 0  |     20152U, // FLDGT_D  | 
1775  | 0  |     24600U, // FLDGT_S  | 
1776  | 0  |     18531U, // FLDLE_D  | 
1777  | 0  |     23940U, // FLDLE_S  | 
1778  | 0  |     20956U, // FLDX_D  | 
1779  | 0  |     24849U, // FLDX_S  | 
1780  | 0  |     18426U, // FLD_D  | 
1781  | 0  |     23919U, // FLD_S  | 
1782  | 0  |     18199U, // FLOGB_D  | 
1783  | 0  |     23808U, // FLOGB_S  | 
1784  | 0  |     18365U, // FMADD_D  | 
1785  | 0  |     23898U, // FMADD_S  | 
1786  | 0  |     18081U, // FMAXA_D  | 
1787  | 0  |     23786U, // FMAXA_S  | 
1788  | 0  |     20930U, // FMAX_D  | 
1789  | 0  |     24841U, // FMAX_S  | 
1790  | 0  |     18051U, // FMINA_D  | 
1791  | 0  |     23775U, // FMINA_S  | 
1792  | 0  |     19473U, // FMIN_D  | 
1793  | 0  |     24408U, // FMIN_S  | 
1794  | 0  |     20620U, // FMOV_D  | 
1795  | 0  |     24757U, // FMOV_S  | 
1796  | 0  |     18230U, // FMSUB_D  | 
1797  | 0  |     23829U, // FMSUB_S  | 
1798  | 0  |     19407U, // FMUL_D  | 
1799  | 0  |     24372U, // FMUL_S  | 
1800  | 0  |     18782U, // FNEG_D  | 
1801  | 0  |     24128U, // FNEG_S  | 
1802  | 0  |     18376U, // FNMADD_D  | 
1803  | 0  |     23909U, // FNMADD_S  | 
1804  | 0  |     18241U, // FNMSUB_D  | 
1805  | 0  |     23840U, // FNMSUB_S  | 
1806  | 0  |     18696U, // FRECIPE_D  | 
1807  | 0  |     24076U, // FRECIPE_S  | 
1808  | 0  |     19555U, // FRECIP_D  | 
1809  | 0  |     24446U, // FRECIP_S  | 
1810  | 0  |     20259U, // FRINT_D  | 
1811  | 0  |     24678U, // FRINT_S  | 
1812  | 0  |     18709U, // FRSQRTE_D  | 
1813  | 0  |     24089U, // FRSQRTE_S  | 
1814  | 0  |     20281U, // FRSQRT_D  | 
1815  | 0  |     24700U, // FRSQRT_S  | 
1816  | 0  |     18186U, // FSCALEB_D  | 
1817  | 0  |     23795U, // FSCALEB_S  | 
1818  | 0  |     23312U, // FSEL_xD  | 
1819  | 0  |     23312U, // FSEL_xS  | 
1820  | 0  |     20270U, // FSQRT_D  | 
1821  | 0  |     24689U, // FSQRT_S  | 
1822  | 0  |     20171U, // FSTGT_D  | 
1823  | 0  |     24609U, // FSTGT_S  | 
1824  | 0  |     18573U, // FSTLE_D  | 
1825  | 0  |     23963U, // FSTLE_S  | 
1826  | 0  |     20964U, // FSTX_D  | 
1827  | 0  |     24857U, // FSTX_S  | 
1828  | 0  |     20291U, // FST_D  | 
1829  | 0  |     24710U, // FST_S  | 
1830  | 0  |     18220U, // FSUB_D  | 
1831  | 0  |     23819U, // FSUB_S  | 
1832  | 0  |     19237U, // FTINTRM_L_D  | 
1833  | 0  |     24320U, // FTINTRM_L_S  | 
1834  | 0  |     20768U, // FTINTRM_W_D  | 
1835  | 0  |     24783U, // FTINTRM_W_S  | 
1836  | 0  |     19221U, // FTINTRNE_L_D  | 
1837  | 0  |     24148U, // FTINTRNE_L_S  | 
1838  | 0  |     20640U, // FTINTRNE_W_D  | 
1839  | 0  |     24767U, // FTINTRNE_W_S  | 
1840  | 0  |     19252U, // FTINTRP_L_D  | 
1841  | 0  |     24333U, // FTINTRP_L_S  | 
1842  | 0  |     20887U, // FTINTRP_W_D  | 
1843  | 0  |     24798U, // FTINTRP_W_S  | 
1844  | 0  |     19280U, // FTINTRZ_L_D  | 
1845  | 0  |     24357U, // FTINTRZ_L_S  | 
1846  | 0  |     20915U, // FTINTRZ_W_D  | 
1847  | 0  |     24826U, // FTINTRZ_W_S  | 
1848  | 0  |     19267U, // FTINT_L_D  | 
1849  | 0  |     24346U, // FTINT_L_S  | 
1850  | 0  |     20902U, // FTINT_W_D  | 
1851  | 0  |     24813U, // FTINT_W_S  | 
1852  | 0  |     21101U, // GCSRRD  | 
1853  | 0  |     40149U, // GCSRWR  | 
1854  | 0  |     37657U, // GCSRXCHG  | 
1855  | 0  |     6767U,  // GTLBFLUSH  | 
1856  | 0  |     23296U, // HVCL  | 
1857  | 0  |     23661U, // IBAR  | 
1858  | 0  |     21136U, // IDLE  | 
1859  | 0  |     50774U, // INVTLB  | 
1860  | 0  |     16685U, // IOCSRRD_B  | 
1861  | 0  |     18485U, // IOCSRRD_D  | 
1862  | 0  |     21767U, // IOCSRRD_H  | 
1863  | 0  |     27682U, // IOCSRRD_W  | 
1864  | 0  |     17608U, // IOCSRWR_B  | 
1865  | 0  |     20055U, // IOCSRWR_D  | 
1866  | 0  |     22459U, // IOCSRWR_H  | 
1867  | 0  |     28932U, // IOCSRWR_W  | 
1868  | 0  |     23336U, // JIRL  | 
1869  | 0  |     16385U, // JISCR0  | 
1870  | 0  |     16393U, // JISCR1  | 
1871  | 0  |     23721U, // LDDIR  | 
1872  | 0  |     17662U, // LDGT_B  | 
1873  | 0  |     20153U, // LDGT_D  | 
1874  | 0  |     22539U, // LDGT_H  | 
1875  | 0  |     29010U, // LDGT_W  | 
1876  | 0  |     16706U, // LDLE_B  | 
1877  | 0  |     18532U, // LDLE_D  | 
1878  | 0  |     21788U, // LDLE_H  | 
1879  | 0  |     27703U, // LDLE_W  | 
1880  | 0  |     19303U, // LDL_D  | 
1881  | 0  |     28470U, // LDL_W  | 
1882  | 0  |     21174U, // LDPTE  | 
1883  | 0  |     20001U, // LDPTR_D  | 
1884  | 0  |     28878U, // LDPTR_W  | 
1885  | 0  |     19838U, // LDR_D  | 
1886  | 0  |     28725U, // LDR_W  | 
1887  | 0  |     17896U, // LDX_B  | 
1888  | 0  |     25370U, // LDX_BU  | 
1889  | 0  |     20957U, // LDX_D  | 
1890  | 0  |     23059U, // LDX_H  | 
1891  | 0  |     26313U, // LDX_HU  | 
1892  | 0  |     29394U, // LDX_W  | 
1893  | 0  |     26889U, // LDX_WU  | 
1894  | 0  |     16636U, // LD_B  | 
1895  | 0  |     24932U, // LD_BU  | 
1896  | 0  |     18420U, // LD_D  | 
1897  | 0  |     21718U, // LD_H  | 
1898  | 0  |     25890U, // LD_HU  | 
1899  | 0  |     27614U, // LD_W  | 
1900  | 0  |     26550U, // LD_WU  | 
1901  | 0  |     19742U, // LLACQ_D  | 
1902  | 0  |     28687U, // LLACQ_W  | 
1903  | 0  |     19323U, // LL_D  | 
1904  | 0  |     28501U, // LL_W  | 
1905  | 0  |     28081U, // LU12I_W  | 
1906  | 0  |     35238U, // LU32I_D  | 
1907  | 0  |     18863U, // LU52I_D  | 
1908  | 0  |     29551U, // MASKEQZ  | 
1909  | 0  |     29529U, // MASKNEZ  | 
1910  | 0  |     18478U, // MOD_D  | 
1911  | 0  |     25450U, // MOD_DU  | 
1912  | 0  |     27675U, // MOD_W  | 
1913  | 0  |     26559U, // MOD_WU  | 
1914  | 0  |     23678U, // MOVCF2FR_xS  | 
1915  | 0  |     23688U, // MOVCF2GR  | 
1916  | 0  |     23709U, // MOVFCSR2GR  | 
1917  | 0  |     21190U, // MOVFR2CF_xS  | 
1918  | 0  |     19872U, // MOVFR2GR_D  | 
1919  | 0  |     24540U, // MOVFR2GR_S  | 
1920  | 0  |     24540U, // MOVFR2GR_S_64  | 
1921  | 0  |     24527U, // MOVFRH2GR_S  | 
1922  | 0  |     21200U, // MOVGR2CF  | 
1923  | 0  |     23746U, // MOVGR2FCSR  | 
1924  | 0  |     44422U, // MOVGR2FRH_W  | 
1925  | 0  |     19845U, // MOVGR2FR_D  | 
1926  | 0  |     28732U, // MOVGR2FR_W  | 
1927  | 0  |     28732U, // MOVGR2FR_W_64  | 
1928  | 0  |     23667U, // MOVGR2SCR  | 
1929  | 0  |     23698U, // MOVSCR2GR  | 
1930  | 0  |     18808U, // MULH_D  | 
1931  | 0  |     25489U, // MULH_DU  | 
1932  | 0  |     28030U, // MULH_W  | 
1933  | 0  |     26598U, // MULH_WU  | 
1934  | 0  |     27546U, // MULW_D_W  | 
1935  | 0  |     26517U, // MULW_D_WU  | 
1936  | 0  |     19398U, // MUL_D  | 
1937  | 0  |     28596U, // MUL_W  | 
1938  | 0  |     23736U, // NOR  | 
1939  | 0  |     23737U, // OR  | 
1940  | 0  |     23217U, // ORI  | 
1941  | 0  |     23368U, // ORN  | 
1942  | 0  |     23195U, // PCADDI  | 
1943  | 0  |     23173U, // PCADDU12I  | 
1944  | 0  |     23184U, // PCADDU18I  | 
1945  | 0  |     23162U, // PCALAU12I  | 
1946  | 0  |     21076U, // PRELD  | 
1947  | 0  |     29494U, // PRELDX  | 
1948  | 0  |     17185U, // RCRI_B  | 
1949  | 0  |     19094U, // RCRI_D  | 
1950  | 0  |     22065U, // RCRI_H  | 
1951  | 0  |     28323U, // RCRI_W  | 
1952  | 0  |     17487U, // RCR_B  | 
1953  | 0  |     19831U, // RCR_D  | 
1954  | 0  |     22338U, // RCR_H  | 
1955  | 0  |     28718U, // RCR_W  | 
1956  | 0  |     28019U, // RDTIMEH_W  | 
1957  | 0  |     28477U, // RDTIMEL_W  | 
1958  | 0  |     18612U, // RDTIME_D  | 
1959  | 0  |     23124U, // REVB_2H  | 
1960  | 0  |     29476U, // REVB_2W  | 
1961  | 0  |     23133U, // REVB_4H  | 
1962  | 0  |     18280U, // REVB_D  | 
1963  | 0  |     29485U, // REVH_2W  | 
1964  | 0  |     18825U, // REVH_D  | 
1965  | 0  |     17249U, // ROTRI_B  | 
1966  | 0  |     19129U, // ROTRI_D  | 
1967  | 0  |     22100U, // ROTRI_H  | 
1968  | 0  |     28358U, // ROTRI_W  | 
1969  | 0  |     17562U, // ROTR_B  | 
1970  | 0  |     19983U, // ROTR_D  | 
1971  | 0  |     22413U, // ROTR_H  | 
1972  | 0  |     28849U, // ROTR_W  | 
1973  | 0  |     16538U, // SBC_B  | 
1974  | 0  |     18291U, // SBC_D  | 
1975  | 0  |     21620U, // SBC_H  | 
1976  | 0  |     27242U, // SBC_W  | 
1977  | 0  |     35694U, // SCREL_D  | 
1978  | 0  |     44872U, // SCREL_W  | 
1979  | 0  |     34712U, // SC_D  | 
1980  | 0  |     39834U, // SC_Q  | 
1981  | 0  |     43683U, // SC_W  | 
1982  | 0  |     23244U, // SETARMJ  | 
1983  | 0  |     23235U, // SETX86J  | 
1984  | 0  |     21161U, // SETX86LOOPE  | 
1985  | 0  |     21147U, // SETX86LOOPNE  | 
1986  | 0  |     24102U, // SET_CFR_FALSE  | 
1987  | 0  |     24499U, // SET_CFR_TRUE  | 
1988  | 0  |     18987U, // SLLI_D  | 
1989  | 0  |     28194U, // SLLI_W  | 
1990  | 0  |     19322U, // SLL_D  | 
1991  | 0  |     28500U, // SLL_W  | 
1992  | 0  |     24891U, // SLT  | 
1993  | 0  |     23222U, // SLTI  | 
1994  | 0  |     26341U, // SLTU  | 
1995  | 0  |     23228U, // SLTUI  | 
1996  | 0  |     18898U, // SRAI_D  | 
1997  | 0  |     28105U, // SRAI_W  | 
1998  | 0  |     18063U, // SRA_D  | 
1999  | 0  |     27045U, // SRA_W  | 
2000  | 0  |     19019U, // SRLI_D  | 
2001  | 0  |     28237U, // SRLI_W  | 
2002  | 0  |     19353U, // SRL_D  | 
2003  | 0  |     28541U, // SRL_W  | 
2004  | 0  |     17670U, // STGT_B  | 
2005  | 0  |     20172U, // STGT_D  | 
2006  | 0  |     22547U, // STGT_H  | 
2007  | 0  |     29018U, // STGT_W  | 
2008  | 0  |     16723U, // STLE_B  | 
2009  | 0  |     18574U, // STLE_D  | 
2010  | 0  |     21805U, // STLE_H  | 
2011  | 0  |     27720U, // STLE_W  | 
2012  | 0  |     19388U, // STL_D  | 
2013  | 0  |     28586U, // STL_W  | 
2014  | 0  |     20010U, // STPTR_D  | 
2015  | 0  |     28887U, // STPTR_W  | 
2016  | 0  |     20019U, // STR_D  | 
2017  | 0  |     28896U, // STR_W  | 
2018  | 0  |     17903U, // STX_B  | 
2019  | 0  |     20965U, // STX_D  | 
2020  | 0  |     23066U, // STX_H  | 
2021  | 0  |     29411U, // STX_W  | 
2022  | 0  |     17697U, // ST_B  | 
2023  | 0  |     20292U, // ST_D  | 
2024  | 0  |     22574U, // ST_H  | 
2025  | 0  |     29055U, // ST_W  | 
2026  | 0  |     18211U, // SUB_D  | 
2027  | 0  |     27193U, // SUB_W  | 
2028  | 0  |     23318U, // SYSCALL  | 
2029  | 0  |     7344U,  // TLBCLR  | 
2030  | 0  |     6943U,  // TLBFILL  | 
2031  | 0  |     6768U,  // TLBFLUSH  | 
2032  | 0  |     4710U,  // TLBRD  | 
2033  | 0  |     6758U,  // TLBSRCH  | 
2034  | 0  |     7374U,  // TLBWR  | 
2035  | 0  |     16697U, // VABSD_B  | 
2036  | 0  |     24950U, // VABSD_BU  | 
2037  | 0  |     18497U, // VABSD_D  | 
2038  | 0  |     25459U, // VABSD_DU  | 
2039  | 0  |     21779U, // VABSD_H  | 
2040  | 0  |     25908U, // VABSD_HU  | 
2041  | 0  |     27694U, // VABSD_W  | 
2042  | 0  |     26568U, // VABSD_WU  | 
2043  | 0  |     16431U, // VADDA_B  | 
2044  | 0  |     18040U, // VADDA_D  | 
2045  | 0  |     21297U, // VADDA_H  | 
2046  | 0  |     27033U, // VADDA_W  | 
2047  | 0  |     25124U, // VADDI_BU  | 
2048  | 0  |     25520U, // VADDI_DU  | 
2049  | 0  |     25960U, // VADDI_HU  | 
2050  | 0  |     26629U, // VADDI_WU  | 
2051  | 0  |     27457U, // VADDWEV_D_W  | 
2052  | 0  |     26488U, // VADDWEV_D_WU  | 
2053  | 0  |     29252U, // VADDWEV_D_WU_W  | 
2054  | 0  |     16884U, // VADDWEV_H_B  | 
2055  | 0  |     25073U, // VADDWEV_H_BU  | 
2056  | 0  |     17774U, // VADDWEV_H_BU_B  | 
2057  | 0  |     19689U, // VADDWEV_Q_D  | 
2058  | 0  |     25698U, // VADDWEV_Q_DU  | 
2059  | 0  |     20369U, // VADDWEV_Q_DU_D  | 
2060  | 0  |     22984U, // VADDWEV_W_H  | 
2061  | 0  |     26274U, // VADDWEV_W_HU  | 
2062  | 0  |     22771U, // VADDWEV_W_HU_H  | 
2063  | 0  |     27335U, // VADDWOD_D_W  | 
2064  | 0  |     26427U, // VADDWOD_D_WU  | 
2065  | 0  |     29200U, // VADDWOD_D_WU_W  | 
2066  | 0  |     16801U, // VADDWOD_H_B  | 
2067  | 0  |     25012U, // VADDWOD_H_BU  | 
2068  | 0  |     17722U, // VADDWOD_H_BU_B  | 
2069  | 0  |     19608U, // VADDWOD_Q_D  | 
2070  | 0  |     25637U, // VADDWOD_Q_DU  | 
2071  | 0  |     20317U, // VADDWOD_Q_DU_D  | 
2072  | 0  |     22892U, // VADDWOD_W_H  | 
2073  | 0  |     26213U, // VADDWOD_W_HU  | 
2074  | 0  |     22719U, // VADDWOD_W_HU_H  | 
2075  | 0  |     16628U, // VADD_B  | 
2076  | 0  |     18407U, // VADD_D  | 
2077  | 0  |     21710U, // VADD_H  | 
2078  | 0  |     23569U, // VADD_Q  | 
2079  | 0  |     27606U, // VADD_W  | 
2080  | 0  |     17003U, // VANDI_B  | 
2081  | 0  |     26939U, // VANDN_V  | 
2082  | 0  |     26898U, // VAND_V  | 
2083  | 0  |     17509U, // VAVGR_B  | 
2084  | 0  |     25215U, // VAVGR_BU  | 
2085  | 0  |     19885U, // VAVGR_D  | 
2086  | 0  |     25744U, // VAVGR_DU  | 
2087  | 0  |     22360U, // VAVGR_H  | 
2088  | 0  |     26051U, // VAVGR_HU  | 
2089  | 0  |     28760U, // VAVGR_W  | 
2090  | 0  |     26740U, // VAVGR_WU  | 
2091  | 0  |     16763U, // VAVG_B  | 
2092  | 0  |     24971U, // VAVG_BU  | 
2093  | 0  |     18800U, // VAVG_D  | 
2094  | 0  |     25480U, // VAVG_DU  | 
2095  | 0  |     21845U, // VAVG_H  | 
2096  | 0  |     25929U, // VAVG_HU  | 
2097  | 0  |     27772U, // VAVG_W  | 
2098  | 0  |     26589U, // VAVG_WU  | 
2099  | 0  |     17194U, // VBITCLRI_B  | 
2100  | 0  |     19103U, // VBITCLRI_D  | 
2101  | 0  |     22074U, // VBITCLRI_H  | 
2102  | 0  |     28332U, // VBITCLRI_W  | 
2103  | 0  |     17519U, // VBITCLR_B  | 
2104  | 0  |     19895U, // VBITCLR_D  | 
2105  | 0  |     22370U, // VBITCLR_H  | 
2106  | 0  |     28770U, // VBITCLR_W  | 
2107  | 0  |     17293U, // VBITREVI_B  | 
2108  | 0  |     19173U, // VBITREVI_D  | 
2109  | 0  |     22144U, // VBITREVI_H  | 
2110  | 0  |     28414U, // VBITREVI_W  | 
2111  | 0  |     17832U, // VBITREV_B  | 
2112  | 0  |     20577U, // VBITREV_D  | 
2113  | 0  |     22829U, // VBITREV_H  | 
2114  | 0  |     29310U, // VBITREV_W  | 
2115  | 0  |     33446U, // VBITSELI_B  | 
2116  | 0  |     26907U, // VBITSEL_V  | 
2117  | 0  |     17270U, // VBITSETI_B  | 
2118  | 0  |     19150U, // VBITSETI_D  | 
2119  | 0  |     22121U, // VBITSETI_H  | 
2120  | 0  |     28391U, // VBITSETI_W  | 
2121  | 0  |     17651U, // VBITSET_B  | 
2122  | 0  |     20141U, // VBITSET_D  | 
2123  | 0  |     22528U, // VBITSET_H  | 
2124  | 0  |     28999U, // VBITSET_W  | 
2125  | 0  |     26919U, // VBSLL_V  | 
2126  | 0  |     26929U, // VBSRL_V  | 
2127  | 0  |     17436U, // VCLO_B  | 
2128  | 0  |     19528U, // VCLO_D  | 
2129  | 0  |     22287U, // VCLO_H  | 
2130  | 0  |     28662U, // VCLO_W  | 
2131  | 0  |     17938U, // VCLZ_B  | 
2132  | 0  |     20988U, // VCLZ_D  | 
2133  | 0  |     23089U, // VCLZ_H  | 
2134  | 0  |     29434U, // VCLZ_W  | 
2135  | 0  |     17844U, // VDIV_B  | 
2136  | 0  |     25351U, // VDIV_BU  | 
2137  | 0  |     20599U, // VDIV_D  | 
2138  | 0  |     25833U, // VDIV_DU  | 
2139  | 0  |     22841U, // VDIV_H  | 
2140  | 0  |     26172U, // VDIV_HU  | 
2141  | 0  |     29322U, // VDIV_W  | 
2142  | 0  |     26860U, // VDIV_WU  | 
2143  | 0  |     25245U, // VEXT2XV_DU_BU  | 
2144  | 0  |     26081U, // VEXT2XV_DU_HU  | 
2145  | 0  |     26814U, // VEXT2XV_DU_WU  | 
2146  | 0  |     16575U, // VEXT2XV_D_B  | 
2147  | 0  |     21657U, // VEXT2XV_D_H  | 
2148  | 0  |     27484U, // VEXT2XV_D_W  | 
2149  | 0  |     25290U, // VEXT2XV_HU_BU  | 
2150  | 0  |     16911U, // VEXT2XV_H_B  | 
2151  | 0  |     25335U, // VEXT2XV_WU_BU  | 
2152  | 0  |     26126U, // VEXT2XV_WU_HU  | 
2153  | 0  |     17874U, // VEXT2XV_W_B  | 
2154  | 0  |     23011U, // VEXT2XV_W_H  | 
2155  | 0  |     26785U, // VEXTH_DU_WU  | 
2156  | 0  |     27377U, // VEXTH_D_W  | 
2157  | 0  |     25261U, // VEXTH_HU_BU  | 
2158  | 0  |     16829U, // VEXTH_H_B  | 
2159  | 0  |     25775U, // VEXTH_QU_DU  | 
2160  | 0  |     19636U, // VEXTH_Q_D  | 
2161  | 0  |     26097U, // VEXTH_WU_HU  | 
2162  | 0  |     22920U, // VEXTH_W_H  | 
2163  | 0  |     25789U, // VEXTL_QU_DU  | 
2164  | 0  |     19648U, // VEXTL_Q_D  | 
2165  | 0  |     34013U, // VEXTRINS_B  | 
2166  | 0  |     36491U, // VEXTRINS_D  | 
2167  | 0  |     38890U, // VEXTRINS_H  | 
2168  | 0  |     45361U, // VEXTRINS_W  | 
2169  | 0  |     18345U, // VFADD_D  | 
2170  | 0  |     23887U, // VFADD_S  | 
2171  | 0  |     20120U, // VFCLASS_D  | 
2172  | 0  |     24589U, // VFCLASS_S  | 
2173  | 0  |     18745U, // VFCMP_CAF_D  | 
2174  | 0  |     24101U, // VFCMP_CAF_S  | 
2175  | 0  |     19752U, // VFCMP_CEQ_D  | 
2176  | 0  |     24470U, // VFCMP_CEQ_S  | 
2177  | 0  |     18518U, // VFCMP_CLE_D  | 
2178  | 0  |     23927U, // VFCMP_CLE_S  | 
2179  | 0  |     20181U, // VFCMP_CLT_D  | 
2180  | 0  |     24619U, // VFCMP_CLT_S  | 
2181  | 0  |     18623U, // VFCMP_CNE_D  | 
2182  | 0  |     24003U, // VFCMP_CNE_S  | 
2183  | 0  |     19926U, // VFCMP_COR_D  | 
2184  | 0  |     24553U, // VFCMP_COR_S  | 
2185  | 0  |     19789U, // VFCMP_CUEQ_D  | 
2186  | 0  |     24498U, // VFCMP_CUEQ_S  | 
2187  | 0  |     18583U, // VFCMP_CULE_D  | 
2188  | 0  |     23973U, // VFCMP_CULE_S  | 
2189  | 0  |     20218U, // VFCMP_CULT_D  | 
2190  | 0  |     24647U, // VFCMP_CULT_S  | 
2191  | 0  |     18665U, // VFCMP_CUNE_D  | 
2192  | 0  |     24045U, // VFCMP_CUNE_S  | 
2193  | 0  |     19500U, // VFCMP_CUN_D  | 
2194  | 0  |     24417U, // VFCMP_CUN_S  | 
2195  | 0  |     18759U, // VFCMP_SAF_D  | 
2196  | 0  |     24115U, // VFCMP_SAF_S  | 
2197  | 0  |     19766U, // VFCMP_SEQ_D  | 
2198  | 0  |     24484U, // VFCMP_SEQ_S  | 
2199  | 0  |     18541U, // VFCMP_SLE_D  | 
2200  | 0  |     23950U, // VFCMP_SLE_S  | 
2201  | 0  |     20195U, // VFCMP_SLT_D  | 
2202  | 0  |     24633U, // VFCMP_SLT_S  | 
2203  | 0  |     18651U, // VFCMP_SNE_D  | 
2204  | 0  |     24031U, // VFCMP_SNE_S  | 
2205  | 0  |     19948U, // VFCMP_SOR_D  | 
2206  | 0  |     24567U, // VFCMP_SOR_S  | 
2207  | 0  |     19804U, // VFCMP_SUEQ_D  | 
2208  | 0  |     24513U, // VFCMP_SUEQ_S  | 
2209  | 0  |     18598U, // VFCMP_SULE_D  | 
2210  | 0  |     23988U, // VFCMP_SULE_S  | 
2211  | 0  |     20233U, // VFCMP_SULT_D  | 
2212  | 0  |     24662U, // VFCMP_SULT_S  | 
2213  | 0  |     18680U, // VFCMP_SUNE_D  | 
2214  | 0  |     24060U, // VFCMP_SUNE_S  | 
2215  | 0  |     19514U, // VFCMP_SUN_D  | 
2216  | 0  |     24431U, // VFCMP_SUN_S  | 
2217  | 0  |     23851U, // VFCVTH_D_S  | 
2218  | 0  |     22471U, // VFCVTH_S_H  | 
2219  | 0  |     23864U, // VFCVTL_D_S  | 
2220  | 0  |     22484U, // VFCVTL_S_H  | 
2221  | 0  |     24137U, // VFCVT_H_S  | 
2222  | 0  |     20067U, // VFCVT_S_D  | 
2223  | 0  |     20589U, // VFDIV_D  | 
2224  | 0  |     24748U, // VFDIV_S  | 
2225  | 0  |     27363U, // VFFINTH_D_W  | 
2226  | 0  |     27403U, // VFFINTL_D_W  | 
2227  | 0  |     23261U, // VFFINT_D_L  | 
2228  | 0  |     26322U, // VFFINT_D_LU  | 
2229  | 0  |     23274U, // VFFINT_S_L  | 
2230  | 0  |     28944U, // VFFINT_S_W  | 
2231  | 0  |     26751U, // VFFINT_S_WU  | 
2232  | 0  |     18198U, // VFLOGB_D  | 
2233  | 0  |     23807U, // VFLOGB_S  | 
2234  | 0  |     18364U, // VFMADD_D  | 
2235  | 0  |     23897U, // VFMADD_S  | 
2236  | 0  |     18080U, // VFMAXA_D  | 
2237  | 0  |     23785U, // VFMAXA_S  | 
2238  | 0  |     20929U, // VFMAX_D  | 
2239  | 0  |     24840U, // VFMAX_S  | 
2240  | 0  |     18050U, // VFMINA_D  | 
2241  | 0  |     23774U, // VFMINA_S  | 
2242  | 0  |     19472U, // VFMIN_D  | 
2243  | 0  |     24407U, // VFMIN_S  | 
2244  | 0  |     18229U, // VFMSUB_D  | 
2245  | 0  |     23828U, // VFMSUB_S  | 
2246  | 0  |     19406U, // VFMUL_D  | 
2247  | 0  |     24371U, // VFMUL_S  | 
2248  | 0  |     18375U, // VFNMADD_D  | 
2249  | 0  |     23908U, // VFNMADD_S  | 
2250  | 0  |     18240U, // VFNMSUB_D  | 
2251  | 0  |     23839U, // VFNMSUB_S  | 
2252  | 0  |     18695U, // VFRECIPE_D  | 
2253  | 0  |     24075U, // VFRECIPE_S  | 
2254  | 0  |     19554U, // VFRECIP_D  | 
2255  | 0  |     24445U, // VFRECIP_S  | 
2256  | 0  |     19446U, // VFRINTRM_D  | 
2257  | 0  |     24381U, // VFRINTRM_S  | 
2258  | 0  |     18637U, // VFRINTRNE_D  | 
2259  | 0  |     24017U, // VFRINTRNE_S  | 
2260  | 0  |     19566U, // VFRINTRP_D  | 
2261  | 0  |     24457U, // VFRINTRP_S  | 
2262  | 0  |     21012U, // VFRINTRZ_D  | 
2263  | 0  |     24866U, // VFRINTRZ_S  | 
2264  | 0  |     20258U, // VFRINT_D  | 
2265  | 0  |     24677U, // VFRINT_S  | 
2266  | 0  |     18708U, // VFRSQRTE_D  | 
2267  | 0  |     24088U, // VFRSQRTE_S  | 
2268  | 0  |     20280U, // VFRSQRT_D  | 
2269  | 0  |     24699U, // VFRSQRT_S  | 
2270  | 0  |     33534U, // VFRSTPI_B  | 
2271  | 0  |     38414U, // VFRSTPI_H  | 
2272  | 0  |     33839U, // VFRSTP_B  | 
2273  | 0  |     38690U, // VFRSTP_H  | 
2274  | 0  |     20269U, // VFSQRT_D  | 
2275  | 0  |     24688U, // VFSQRT_S  | 
2276  | 0  |     18219U, // VFSUB_D  | 
2277  | 0  |     23818U, // VFSUB_S  | 
2278  | 0  |     24212U, // VFTINTH_L_S  | 
2279  | 0  |     24291U, // VFTINTL_L_S  | 
2280  | 0  |     24180U, // VFTINTRMH_L_S  | 
2281  | 0  |     24259U, // VFTINTRML_L_S  | 
2282  | 0  |     19236U, // VFTINTRM_L_D  | 
2283  | 0  |     20767U, // VFTINTRM_W_D  | 
2284  | 0  |     24782U, // VFTINTRM_W_S  | 
2285  | 0  |     24163U, // VFTINTRNEH_L_S  | 
2286  | 0  |     24242U, // VFTINTRNEL_L_S  | 
2287  | 0  |     19220U, // VFTINTRNE_L_D  | 
2288  | 0  |     20639U, // VFTINTRNE_W_D  | 
2289  | 0  |     24766U, // VFTINTRNE_W_S  | 
2290  | 0  |     24196U, // VFTINTRPH_L_S  | 
2291  | 0  |     24275U, // VFTINTRPL_L_S  | 
2292  | 0  |     19251U, // VFTINTRP_L_D  | 
2293  | 0  |     20886U, // VFTINTRP_W_D  | 
2294  | 0  |     24797U, // VFTINTRP_W_S  | 
2295  | 0  |     24226U, // VFTINTRZH_L_S  | 
2296  | 0  |     24305U, // VFTINTRZL_L_S  | 
2297  | 0  |     20417U, // VFTINTRZ_LU_D  | 
2298  | 0  |     19279U, // VFTINTRZ_L_D  | 
2299  | 0  |     24732U, // VFTINTRZ_WU_S  | 
2300  | 0  |     20914U, // VFTINTRZ_W_D  | 
2301  | 0  |     24825U, // VFTINTRZ_W_S  | 
2302  | 0  |     20403U, // VFTINT_LU_D  | 
2303  | 0  |     19266U, // VFTINT_L_D  | 
2304  | 0  |     24718U, // VFTINT_WU_S  | 
2305  | 0  |     20901U, // VFTINT_W_D  | 
2306  | 0  |     24812U, // VFTINT_W_S  | 
2307  | 0  |     26845U, // VHADDW_DU_WU  | 
2308  | 0  |     27534U, // VHADDW_D_W  | 
2309  | 0  |     25321U, // VHADDW_HU_BU  | 
2310  | 0  |     16938U, // VHADDW_H_B  | 
2311  | 0  |     25818U, // VHADDW_QU_DU  | 
2312  | 0  |     19730U, // VHADDW_Q_D  | 
2313  | 0  |     26157U, // VHADDW_WU_HU  | 
2314  | 0  |     23038U, // VHADDW_W_H  | 
2315  | 0  |     26830U, // VHSUBW_DU_WU  | 
2316  | 0  |     27521U, // VHSUBW_D_W  | 
2317  | 0  |     25306U, // VHSUBW_HU_BU  | 
2318  | 0  |     16925U, // VHSUBW_H_B  | 
2319  | 0  |     25803U, // VHSUBW_QU_DU  | 
2320  | 0  |     19717U, // VHSUBW_Q_D  | 
2321  | 0  |     26142U, // VHSUBW_WU_HU  | 
2322  | 0  |     23025U, // VHSUBW_W_H  | 
2323  | 0  |     16960U, // VILVH_B  | 
2324  | 0  |     18834U, // VILVH_D  | 
2325  | 0  |     21863U, // VILVH_H  | 
2326  | 0  |     28061U, // VILVH_W  | 
2327  | 0  |     17406U, // VILVL_B  | 
2328  | 0  |     19425U, // VILVL_D  | 
2329  | 0  |     22257U, // VILVL_H  | 
2330  | 0  |     28613U, // VILVL_W  | 
2331  | 0  |     33979U, // VINSGR2VR_B  | 
2332  | 0  |     36426U, // VINSGR2VR_D  | 
2333  | 0  |     38830U, // VINSGR2VR_H  | 
2334  | 0  |     45303U, // VINSGR2VR_W  | 
2335  | 0  |     21084U, // VLD  | 
2336  | 0  |     23204U, // VLDI  | 
2337  | 0  |     17345U, // VLDREPL_B  | 
2338  | 0  |     19339U, // VLDREPL_D  | 
2339  | 0  |     22196U, // VLDREPL_H  | 
2340  | 0  |     28527U, // VLDREPL_W  | 
2341  | 0  |     29503U, // VLDX  | 
2342  | 0  |     43826U, // VMADDWEV_D_W  | 
2343  | 0  |     42856U, // VMADDWEV_D_WU  | 
2344  | 0  |     45618U, // VMADDWEV_D_WU_W  | 
2345  | 0  |     33253U, // VMADDWEV_H_B  | 
2346  | 0  |     41441U, // VMADDWEV_H_BU  | 
2347  | 0  |     34140U, // VMADDWEV_H_BU_B  | 
2348  | 0  |     36058U, // VMADDWEV_Q_D  | 
2349  | 0  |     42066U, // VMADDWEV_Q_DU  | 
2350  | 0  |     36735U, // VMADDWEV_Q_DU_D  | 
2351  | 0  |     39353U, // VMADDWEV_W_H  | 
2352  | 0  |     42642U, // VMADDWEV_W_HU  | 
2353  | 0  |     39137U, // VMADDWEV_W_HU_H  | 
2354  | 0  |     43704U, // VMADDWOD_D_W  | 
2355  | 0  |     42795U, // VMADDWOD_D_WU  | 
2356  | 0  |     45566U, // VMADDWOD_D_WU_W  | 
2357  | 0  |     33170U, // VMADDWOD_H_B  | 
2358  | 0  |     41380U, // VMADDWOD_H_BU  | 
2359  | 0  |     34088U, // VMADDWOD_H_BU_B  | 
2360  | 0  |     35977U, // VMADDWOD_Q_D  | 
2361  | 0  |     42005U, // VMADDWOD_Q_DU  | 
2362  | 0  |     36683U, // VMADDWOD_Q_DU_D  | 
2363  | 0  |     39261U, // VMADDWOD_W_H  | 
2364  | 0  |     42581U, // VMADDWOD_W_HU  | 
2365  | 0  |     39085U, // VMADDWOD_W_HU_H  | 
2366  | 0  |     32992U, // VMADD_B  | 
2367  | 0  |     34771U, // VMADD_D  | 
2368  | 0  |     38074U, // VMADD_H  | 
2369  | 0  |     43970U, // VMADD_W  | 
2370  | 0  |     17306U, // VMAXI_B  | 
2371  | 0  |     25168U, // VMAXI_BU  | 
2372  | 0  |     19186U, // VMAXI_D  | 
2373  | 0  |     25564U, // VMAXI_DU  | 
2374  | 0  |     22157U, // VMAXI_H  | 
2375  | 0  |     26004U, // VMAXI_HU  | 
2376  | 0  |     28427U, // VMAXI_W  | 
2377  | 0  |     26673U, // VMAXI_WU  | 
2378  | 0  |     17888U, // VMAX_B  | 
2379  | 0  |     25361U, // VMAX_BU  | 
2380  | 0  |     20948U, // VMAX_D  | 
2381  | 0  |     25853U, // VMAX_DU  | 
2382  | 0  |     23051U, // VMAX_H  | 
2383  | 0  |     26304U, // VMAX_HU  | 
2384  | 0  |     29386U, // VMAX_W  | 
2385  | 0  |     26880U, // VMAX_WU  | 
2386  | 0  |     17140U, // VMINI_B  | 
2387  | 0  |     25146U, // VMINI_BU  | 
2388  | 0  |     19061U, // VMINI_D  | 
2389  | 0  |     25542U, // VMINI_DU  | 
2390  | 0  |     22020U, // VMINI_H  | 
2391  | 0  |     25982U, // VMINI_HU  | 
2392  | 0  |     28290U, // VMINI_W  | 
2393  | 0  |     26651U, // VMINI_WU  | 
2394  | 0  |     17427U, // VMIN_B  | 
2395  | 0  |     25190U, // VMIN_BU  | 
2396  | 0  |     19491U, // VMIN_D  | 
2397  | 0  |     25596U, // VMIN_DU  | 
2398  | 0  |     22278U, // VMIN_H  | 
2399  | 0  |     26026U, // VMIN_HU  | 
2400  | 0  |     28653U, // VMIN_W  | 
2401  | 0  |     26714U, // VMIN_WU  | 
2402  | 0  |     16677U, // VMOD_B  | 
2403  | 0  |     24940U, // VMOD_BU  | 
2404  | 0  |     18477U, // VMOD_D  | 
2405  | 0  |     25449U, // VMOD_DU  | 
2406  | 0  |     21759U, // VMOD_H  | 
2407  | 0  |     25898U, // VMOD_HU  | 
2408  | 0  |     27674U, // VMOD_W  | 
2409  | 0  |     26558U, // VMOD_WU  | 
2410  | 0  |     17911U, // VMSKGEZ_B  | 
2411  | 0  |     17973U, // VMSKLTZ_B  | 
2412  | 0  |     21032U, // VMSKLTZ_D  | 
2413  | 0  |     23113U, // VMSKLTZ_H  | 
2414  | 0  |     29465U, // VMSKLTZ_W  | 
2415  | 0  |     17947U, // VMSKNZ_B  | 
2416  | 0  |     32891U, // VMSUB_B  | 
2417  | 0  |     34636U, // VMSUB_D  | 
2418  | 0  |     37973U, // VMSUB_H  | 
2419  | 0  |     43595U, // VMSUB_W  | 
2420  | 0  |     16951U, // VMUH_B  | 
2421  | 0  |     25103U, // VMUH_BU  | 
2422  | 0  |     18817U, // VMUH_D  | 
2423  | 0  |     25499U, // VMUH_DU  | 
2424  | 0  |     21854U, // VMUH_H  | 
2425  | 0  |     25939U, // VMUH_HU  | 
2426  | 0  |     28052U, // VMUH_W  | 
2427  | 0  |     26608U, // VMUH_WU  | 
2428  | 0  |     27471U, // VMULWEV_D_W  | 
2429  | 0  |     26503U, // VMULWEV_D_WU  | 
2430  | 0  |     29269U, // VMULWEV_D_WU_W  | 
2431  | 0  |     16898U, // VMULWEV_H_B  | 
2432  | 0  |     25088U, // VMULWEV_H_BU  | 
2433  | 0  |     17791U, // VMULWEV_H_BU_B  | 
2434  | 0  |     19703U, // VMULWEV_Q_D  | 
2435  | 0  |     25713U, // VMULWEV_Q_DU  | 
2436  | 0  |     20386U, // VMULWEV_Q_DU_D  | 
2437  | 0  |     22998U, // VMULWEV_W_H  | 
2438  | 0  |     26289U, // VMULWEV_W_HU  | 
2439  | 0  |     22788U, // VMULWEV_W_HU_H  | 
2440  | 0  |     27349U, // VMULWOD_D_W  | 
2441  | 0  |     26442U, // VMULWOD_D_WU  | 
2442  | 0  |     29217U, // VMULWOD_D_WU_W  | 
2443  | 0  |     16815U, // VMULWOD_H_B  | 
2444  | 0  |     25027U, // VMULWOD_H_BU  | 
2445  | 0  |     17739U, // VMULWOD_H_BU_B  | 
2446  | 0  |     19622U, // VMULWOD_Q_D  | 
2447  | 0  |     25652U, // VMULWOD_Q_DU  | 
2448  | 0  |     20334U, // VMULWOD_Q_DU_D  | 
2449  | 0  |     22906U, // VMULWOD_W_H  | 
2450  | 0  |     26228U, // VMULWOD_W_HU  | 
2451  | 0  |     22736U, // VMULWOD_W_HU_H  | 
2452  | 0  |     17397U, // VMUL_B  | 
2453  | 0  |     19416U, // VMUL_D  | 
2454  | 0  |     22248U, // VMUL_H  | 
2455  | 0  |     28604U, // VMUL_W  | 
2456  | 0  |     16754U, // VNEG_B  | 
2457  | 0  |     18791U, // VNEG_D  | 
2458  | 0  |     21836U, // VNEG_H  | 
2459  | 0  |     27763U, // VNEG_W  | 
2460  | 0  |     17218U, // VNORI_B  | 
2461  | 0  |     26958U, // VNOR_V  | 
2462  | 0  |     17228U, // VORI_B  | 
2463  | 0  |     26949U, // VORN_V  | 
2464  | 0  |     26967U, // VOR_V  | 
2465  | 0  |     17808U, // VPACKEV_B  | 
2466  | 0  |     20553U, // VPACKEV_D  | 
2467  | 0  |     22805U, // VPACKEV_H  | 
2468  | 0  |     29286U, // VPACKEV_W  | 
2469  | 0  |     16653U, // VPACKOD_B  | 
2470  | 0  |     18453U, // VPACKOD_D  | 
2471  | 0  |     21735U, // VPACKOD_H  | 
2472  | 0  |     27650U, // VPACKOD_W  | 
2473  | 0  |     17688U, // VPCNT_B  | 
2474  | 0  |     20248U, // VPCNT_D  | 
2475  | 0  |     22565U, // VPCNT_H  | 
2476  | 0  |     29036U, // VPCNT_W  | 
2477  | 0  |     44663U, // VPERMI_W  | 
2478  | 0  |     17820U, // VPICKEV_B  | 
2479  | 0  |     20565U, // VPICKEV_D  | 
2480  | 0  |     22817U, // VPICKEV_H  | 
2481  | 0  |     29298U, // VPICKEV_W  | 
2482  | 0  |     16665U, // VPICKOD_B  | 
2483  | 0  |     18465U, // VPICKOD_D  | 
2484  | 0  |     21747U, // VPICKOD_H  | 
2485  | 0  |     27662U, // VPICKOD_W  | 
2486  | 0  |     17494U, // VPICKVE2GR_B  | 
2487  | 0  |     25199U, // VPICKVE2GR_BU  | 
2488  | 0  |     19858U, // VPICKVE2GR_D  | 
2489  | 0  |     25728U, // VPICKVE2GR_DU  | 
2490  | 0  |     22345U, // VPICKVE2GR_H  | 
2491  | 0  |     26035U, // VPICKVE2GR_HU  | 
2492  | 0  |     28745U, // VPICKVE2GR_W  | 
2493  | 0  |     26724U, // VPICKVE2GR_WU  | 
2494  | 0  |     17581U, // VREPLGR2VR_B  | 
2495  | 0  |     20027U, // VREPLGR2VR_D  | 
2496  | 0  |     22432U, // VREPLGR2VR_H  | 
2497  | 0  |     28904U, // VREPLGR2VR_W  | 
2498  | 0  |     17038U, // VREPLVEI_B  | 
2499  | 0  |     18950U, // VREPLVEI_D  | 
2500  | 0  |     21931U, // VREPLVEI_H  | 
2501  | 0  |     28168U, // VREPLVEI_W  | 
2502  | 0  |     16732U, // VREPLVE_B  | 
2503  | 0  |     18733U, // VREPLVE_D  | 
2504  | 0  |     21814U, // VREPLVE_H  | 
2505  | 0  |     27741U, // VREPLVE_W  | 
2506  | 0  |     17259U, // VROTRI_B  | 
2507  | 0  |     19139U, // VROTRI_D  | 
2508  | 0  |     22110U, // VROTRI_H  | 
2509  | 0  |     28380U, // VROTRI_W  | 
2510  | 0  |     17571U, // VROTR_B  | 
2511  | 0  |     19992U, // VROTR_D  | 
2512  | 0  |     22422U, // VROTR_H  | 
2513  | 0  |     28869U, // VROTR_W  | 
2514  | 0  |     16618U, // VSADD_B  | 
2515  | 0  |     24922U, // VSADD_BU  | 
2516  | 0  |     18397U, // VSADD_D  | 
2517  | 0  |     25438U, // VSADD_DU  | 
2518  | 0  |     21700U, // VSADD_H  | 
2519  | 0  |     25880U, // VSADD_HU  | 
2520  | 0  |     27596U, // VSADD_W  | 
2521  | 0  |     26540U, // VSADD_WU  | 
2522  | 0  |     17642U, // VSAT_B  | 
2523  | 0  |     25226U, // VSAT_BU  | 
2524  | 0  |     20132U, // VSAT_D  | 
2525  | 0  |     25755U, // VSAT_DU  | 
2526  | 0  |     22519U, // VSAT_H  | 
2527  | 0  |     26062U, // VSAT_HU  | 
2528  | 0  |     28990U, // VSAT_W  | 
2529  | 0  |     26765U, // VSAT_WU  | 
2530  | 0  |     17162U, // VSEQI_B  | 
2531  | 0  |     19071U, // VSEQI_D  | 
2532  | 0  |     22042U, // VSEQI_H  | 
2533  | 0  |     28300U, // VSEQI_W  | 
2534  | 0  |     17466U, // VSEQ_B  | 
2535  | 0  |     19780U, // VSEQ_D  | 
2536  | 0  |     22317U, // VSEQ_H  | 
2537  | 0  |     28697U, // VSEQ_W  | 
2538  | 0  |     17923U, // VSETALLNEZ_B  | 
2539  | 0  |     20973U, // VSETALLNEZ_D  | 
2540  | 0  |     23074U, // VSETALLNEZ_H  | 
2541  | 0  |     29419U, // VSETALLNEZ_W  | 
2542  | 0  |     17958U, // VSETANYEQZ_B  | 
2543  | 0  |     20997U, // VSETANYEQZ_D  | 
2544  | 0  |     23098U, // VSETANYEQZ_H  | 
2545  | 0  |     29443U, // VSETANYEQZ_W  | 
2546  | 0  |     26996U, // VSETEQZ_V  | 
2547  | 0  |     26984U, // VSETNEZ_V  | 
2548  | 0  |     16970U, // VSHUF4I_B  | 
2549  | 0  |     35257U, // VSHUF4I_D  | 
2550  | 0  |     21873U, // VSHUF4I_H  | 
2551  | 0  |     28091U, // VSHUF4I_W  | 
2552  | 0  |     16744U, // VSHUF_B  | 
2553  | 0  |     35157U, // VSHUF_D  | 
2554  | 0  |     38210U, // VSHUF_H  | 
2555  | 0  |     44137U, // VSHUF_W  | 
2556  | 0  |     17853U, // VSIGNCOV_B  | 
2557  | 0  |     20608U, // VSIGNCOV_D  | 
2558  | 0  |     22850U, // VSIGNCOV_H  | 
2559  | 0  |     29331U, // VSIGNCOV_W  | 
2560  | 0  |     17013U, // VSLEI_B  | 
2561  | 0  |     25135U, // VSLEI_BU  | 
2562  | 0  |     18925U, // VSLEI_D  | 
2563  | 0  |     25531U, // VSLEI_DU  | 
2564  | 0  |     21906U, // VSLEI_H  | 
2565  | 0  |     25971U, // VSLEI_HU  | 
2566  | 0  |     28143U, // VSLEI_W  | 
2567  | 0  |     26640U, // VSLEI_WU  | 
2568  | 0  |     16715U, // VSLE_B  | 
2569  | 0  |     24961U, // VSLE_BU  | 
2570  | 0  |     18555U, // VSLE_D  | 
2571  | 0  |     25470U, // VSLE_DU  | 
2572  | 0  |     21797U, // VSLE_H  | 
2573  | 0  |     25919U, // VSLE_HU  | 
2574  | 0  |     27712U, // VSLE_W  | 
2575  | 0  |     26579U, // VSLE_WU  | 
2576  | 0  |     17086U, // VSLLI_B  | 
2577  | 0  |     18996U, // VSLLI_D  | 
2578  | 0  |     21966U, // VSLLI_H  | 
2579  | 0  |     28214U, // VSLLI_W  | 
2580  | 0  |     26799U, // VSLLWIL_DU_WU  | 
2581  | 0  |     27389U, // VSLLWIL_D_W  | 
2582  | 0  |     25275U, // VSLLWIL_HU_BU  | 
2583  | 0  |     16841U, // VSLLWIL_H_B  | 
2584  | 0  |     26111U, // VSLLWIL_WU_HU  | 
2585  | 0  |     22932U, // VSLLWIL_W_H  | 
2586  | 0  |     17336U, // VSLL_B  | 
2587  | 0  |     19330U, // VSLL_D  | 
2588  | 0  |     22187U, // VSLL_H  | 
2589  | 0  |     28518U, // VSLL_W  | 
2590  | 0  |     17283U, // VSLTI_B  | 
2591  | 0  |     25157U, // VSLTI_BU  | 
2592  | 0  |     19163U, // VSLTI_D  | 
2593  | 0  |     25553U, // VSLTI_DU  | 
2594  | 0  |     22134U, // VSLTI_H  | 
2595  | 0  |     25993U, // VSLTI_HU  | 
2596  | 0  |     28404U, // VSLTI_W  | 
2597  | 0  |     26662U, // VSLTI_WU  | 
2598  | 0  |     17679U, // VSLT_B  | 
2599  | 0  |     25236U, // VSLT_BU  | 
2600  | 0  |     20209U, // VSLT_D  | 
2601  | 0  |     25765U, // VSLT_DU  | 
2602  | 0  |     22556U, // VSLT_H  | 
2603  | 0  |     26072U, // VSLT_HU  | 
2604  | 0  |     29027U, // VSLT_W  | 
2605  | 0  |     26775U, // VSLT_WU  | 
2606  | 0  |     16993U, // VSRAI_B  | 
2607  | 0  |     18907U, // VSRAI_D  | 
2608  | 0  |     21896U, // VSRAI_H  | 
2609  | 0  |     28125U, // VSRAI_W  | 
2610  | 0  |     37724U, // VSRANI_B_H  | 
2611  | 0  |     39855U, // VSRANI_D_Q  | 
2612  | 0  |     44179U, // VSRANI_H_W  | 
2613  | 0  |     37053U, // VSRANI_W_D  | 
2614  | 0  |     21451U, // VSRAN_B_H  | 
2615  | 0  |     27906U, // VSRAN_H_W  | 
2616  | 0  |     20795U, // VSRAN_W_D  | 
2617  | 0  |     17172U, // VSRARI_B  | 
2618  | 0  |     19081U, // VSRARI_D  | 
2619  | 0  |     22052U, // VSRARI_H  | 
2620  | 0  |     28310U, // VSRARI_W  | 
2621  | 0  |     37779U, // VSRARNI_B_H  | 
2622  | 0  |     39910U, // VSRARNI_D_Q  | 
2623  | 0  |     44234U, // VSRARNI_H_W  | 
2624  | 0  |     37108U, // VSRARNI_W_D  | 
2625  | 0  |     21502U, // VSRARN_B_H  | 
2626  | 0  |     27957U, // VSRARN_H_W  | 
2627  | 0  |     20846U, // VSRARN_W_D  | 
2628  | 0  |     17475U, // VSRAR_B  | 
2629  | 0  |     19819U, // VSRAR_D  | 
2630  | 0  |     22326U, // VSRAR_H  | 
2631  | 0  |     28706U, // VSRAR_W  | 
2632  | 0  |     16451U, // VSRA_B  | 
2633  | 0  |     18071U, // VSRA_D  | 
2634  | 0  |     21317U, // VSRA_H  | 
2635  | 0  |     27063U, // VSRA_W  | 
2636  | 0  |     17118U, // VSRLI_B  | 
2637  | 0  |     19028U, // VSRLI_D  | 
2638  | 0  |     21998U, // VSRLI_H  | 
2639  | 0  |     28257U, // VSRLI_W  | 
2640  | 0  |     37751U, // VSRLNI_B_H  | 
2641  | 0  |     39882U, // VSRLNI_D_Q  | 
2642  | 0  |     44206U, // VSRLNI_H_W  | 
2643  | 0  |     37080U, // VSRLNI_W_D  | 
2644  | 0  |     21476U, // VSRLN_B_H  | 
2645  | 0  |     27931U, // VSRLN_H_W  | 
2646  | 0  |     20820U, // VSRLN_W_D  | 
2647  | 0  |     17207U, // VSRLRI_B  | 
2648  | 0  |     19116U, // VSRLRI_D  | 
2649  | 0  |     22087U, // VSRLRI_H  | 
2650  | 0  |     28345U, // VSRLRI_W  | 
2651  | 0  |     37808U, // VSRLRNI_B_H  | 
2652  | 0  |     39939U, // VSRLRNI_D_Q  | 
2653  | 0  |     44263U, // VSRLRNI_H_W  | 
2654  | 0  |     37137U, // VSRLRNI_W_D  | 
2655  | 0  |     21529U, // VSRLRN_B_H  | 
2656  | 0  |     27984U, // VSRLRN_H_W  | 
2657  | 0  |     20873U, // VSRLRN_W_D  | 
2658  | 0  |     17531U, // VSRLR_B  | 
2659  | 0  |     19907U, // VSRLR_D  | 
2660  | 0  |     22382U, // VSRLR_H  | 
2661  | 0  |     28782U, // VSRLR_W  | 
2662  | 0  |     17367U, // VSRL_B  | 
2663  | 0  |     19361U, // VSRL_D  | 
2664  | 0  |     22218U, // VSRL_H  | 
2665  | 0  |     28559U, // VSRL_W  | 
2666  | 0  |     38965U, // VSSRANI_BU_H  | 
2667  | 0  |     37710U, // VSSRANI_B_H  | 
2668  | 0  |     39973U, // VSSRANI_DU_Q  | 
2669  | 0  |     39841U, // VSSRANI_D_Q  | 
2670  | 0  |     45446U, // VSSRANI_HU_W  | 
2671  | 0  |     44165U, // VSSRANI_H_W  | 
2672  | 0  |     36817U, // VSSRANI_WU_D  | 
2673  | 0  |     37039U, // VSSRANI_W_D  | 
2674  | 0  |     22643U, // VSSRAN_BU_H  | 
2675  | 0  |     21438U, // VSSRAN_B_H  | 
2676  | 0  |     29124U, // VSSRAN_HU_W  | 
2677  | 0  |     27893U, // VSSRAN_H_W  | 
2678  | 0  |     20495U, // VSSRAN_WU_D  | 
2679  | 0  |     20782U, // VSSRAN_W_D  | 
2680  | 0  |     38995U, // VSSRARNI_BU_H  | 
2681  | 0  |     37764U, // VSSRARNI_B_H  | 
2682  | 0  |     40003U, // VSSRARNI_DU_Q  | 
2683  | 0  |     39895U, // VSSRARNI_D_Q  | 
2684  | 0  |     45476U, // VSSRARNI_HU_W  | 
2685  | 0  |     44219U, // VSSRARNI_H_W  | 
2686  | 0  |     36847U, // VSSRARNI_WU_D  | 
2687  | 0  |     37093U, // VSSRARNI_W_D  | 
2688  | 0  |     22671U, // VSSRARN_BU_H  | 
2689  | 0  |     21488U, // VSSRARN_B_H  | 
2690  | 0  |     29152U, // VSSRARN_HU_W  | 
2691  | 0  |     27943U, // VSSRARN_H_W  | 
2692  | 0  |     20523U, // VSSRARN_WU_D  | 
2693  | 0  |     20832U, // VSSRARN_W_D  | 
2694  | 0  |     38980U, // VSSRLNI_BU_H  | 
2695  | 0  |     37737U, // VSSRLNI_B_H  | 
2696  | 0  |     39988U, // VSSRLNI_DU_Q  | 
2697  | 0  |     39868U, // VSSRLNI_D_Q  | 
2698  | 0  |     45461U, // VSSRLNI_HU_W  | 
2699  | 0  |     44192U, // VSSRLNI_H_W  | 
2700  | 0  |     36832U, // VSSRLNI_WU_D  | 
2701  | 0  |     37066U, // VSSRLNI_W_D  | 
2702  | 0  |     22657U, // VSSRLN_BU_H  | 
2703  | 0  |     21463U, // VSSRLN_B_H  | 
2704  | 0  |     29138U, // VSSRLN_HU_W  | 
2705  | 0  |     27918U, // VSSRLN_H_W  | 
2706  | 0  |     20509U, // VSSRLN_WU_D  | 
2707  | 0  |     20807U, // VSSRLN_W_D  | 
2708  | 0  |     39011U, // VSSRLRNI_BU_H  | 
2709  | 0  |     37793U, // VSSRLRNI_B_H  | 
2710  | 0  |     40019U, // VSSRLRNI_DU_Q  | 
2711  | 0  |     39924U, // VSSRLRNI_D_Q  | 
2712  | 0  |     45492U, // VSSRLRNI_HU_W  | 
2713  | 0  |     44248U, // VSSRLRNI_H_W  | 
2714  | 0  |     36863U, // VSSRLRNI_WU_D  | 
2715  | 0  |     37122U, // VSSRLRNI_W_D  | 
2716  | 0  |     22686U, // VSSRLRN_BU_H  | 
2717  | 0  |     21515U, // VSSRLRN_B_H  | 
2718  | 0  |     29167U, // VSSRLRN_HU_W  | 
2719  | 0  |     27970U, // VSSRLRN_H_W  | 
2720  | 0  |     20538U, // VSSRLRN_WU_D  | 
2721  | 0  |     20859U, // VSSRLRN_W_D  | 
2722  | 0  |     16517U, // VSSUB_B  | 
2723  | 0  |     24911U, // VSSUB_BU  | 
2724  | 0  |     18262U, // VSSUB_D  | 
2725  | 0  |     25416U, // VSSUB_DU  | 
2726  | 0  |     21599U, // VSSUB_H  | 
2727  | 0  |     25869U, // VSSUB_HU  | 
2728  | 0  |     27221U, // VSSUB_W  | 
2729  | 0  |     26385U, // VSSUB_WU  | 
2730  | 0  |     24905U, // VST  | 
2731  | 0  |     17416U, // VSTELM_B  | 
2732  | 0  |     19435U, // VSTELM_D  | 
2733  | 0  |     22267U, // VSTELM_H  | 
2734  | 0  |     28623U, // VSTELM_W  | 
2735  | 0  |     29510U, // VSTX  | 
2736  | 0  |     25113U, // VSUBI_BU  | 
2737  | 0  |     25509U, // VSUBI_DU  | 
2738  | 0  |     25949U, // VSUBI_HU  | 
2739  | 0  |     26618U, // VSUBI_WU  | 
2740  | 0  |     27428U, // VSUBWEV_D_W  | 
2741  | 0  |     26457U, // VSUBWEV_D_WU  | 
2742  | 0  |     16855U, // VSUBWEV_H_B  | 
2743  | 0  |     25042U, // VSUBWEV_H_BU  | 
2744  | 0  |     19660U, // VSUBWEV_Q_D  | 
2745  | 0  |     25667U, // VSUBWEV_Q_DU  | 
2746  | 0  |     22955U, // VSUBWEV_W_H  | 
2747  | 0  |     26243U, // VSUBWEV_W_HU  | 
2748  | 0  |     27306U, // VSUBWOD_D_W  | 
2749  | 0  |     26396U, // VSUBWOD_D_WU  | 
2750  | 0  |     16772U, // VSUBWOD_H_B  | 
2751  | 0  |     24981U, // VSUBWOD_H_BU  | 
2752  | 0  |     19579U, // VSUBWOD_Q_D  | 
2753  | 0  |     25606U, // VSUBWOD_Q_DU  | 
2754  | 0  |     22863U, // VSUBWOD_W_H  | 
2755  | 0  |     26182U, // VSUBWOD_W_HU  | 
2756  | 0  |     16527U, // VSUB_B  | 
2757  | 0  |     18272U, // VSUB_D  | 
2758  | 0  |     21609U, // VSUB_H  | 
2759  | 0  |     23442U, // VSUB_Q  | 
2760  | 0  |     27231U, // VSUB_W  | 
2761  | 0  |     17237U, // VXORI_B  | 
2762  | 0  |     26975U, // VXOR_V  | 
2763  | 0  |     16545U, // X86ADC_B  | 
2764  | 0  |     18298U, // X86ADC_D  | 
2765  | 0  |     21627U, // X86ADC_H  | 
2766  | 0  |     27259U, // X86ADC_W  | 
2767  | 0  |     16588U, // X86ADD_B  | 
2768  | 0  |     18334U, // X86ADD_D  | 
2769  | 0  |     25426U, // X86ADD_DU  | 
2770  | 0  |     21670U, // X86ADD_H  | 
2771  | 0  |     27556U, // X86ADD_W  | 
2772  | 0  |     26528U, // X86ADD_WU  | 
2773  | 0  |     16642U, // X86AND_B  | 
2774  | 0  |     18433U, // X86AND_D  | 
2775  | 0  |     21724U, // X86AND_H  | 
2776  | 0  |     27620U, // X86AND_W  | 
2777  | 0  |     6958U,  // X86CLRTM  | 
2778  | 0  |     7002U,  // X86DECTOP  | 
2779  | 0  |     16555U, // X86DEC_B  | 
2780  | 0  |     18308U, // X86DEC_D  | 
2781  | 0  |     21637U, // X86DEC_H  | 
2782  | 0  |     27279U, // X86DEC_W  | 
2783  | 0  |     7013U,  // X86INCTOP  | 
2784  | 0  |     16565U, // X86INC_B  | 
2785  | 0  |     18318U, // X86INC_D  | 
2786  | 0  |     21647U, // X86INC_H  | 
2787  | 0  |     27289U, // X86INC_W  | 
2788  | 0  |     21210U, // X86MFFLAG  | 
2789  | 0  |     23408U, // X86MFTOP  | 
2790  | 0  |     21232U, // X86MTFLAG  | 
2791  | 0  |     23418U, // X86MTTOP  | 
2792  | 0  |     17386U, // X86MUL_B  | 
2793  | 0  |     25178U, // X86MUL_BU  | 
2794  | 0  |     19395U, // X86MUL_D  | 
2795  | 0  |     25574U, // X86MUL_DU  | 
2796  | 0  |     22237U, // X86MUL_H  | 
2797  | 0  |     26014U, // X86MUL_HU  | 
2798  | 0  |     28593U, // X86MUL_W  | 
2799  | 0  |     26692U, // X86MUL_WU  | 
2800  | 0  |     17540U, // X86OR_B  | 
2801  | 0  |     19916U, // X86OR_D  | 
2802  | 0  |     22391U, // X86OR_H  | 
2803  | 0  |     28791U, // X86OR_W  | 
2804  | 0  |     17050U, // X86RCLI_B  | 
2805  | 0  |     18962U, // X86RCLI_D  | 
2806  | 0  |     21943U, // X86RCLI_H  | 
2807  | 0  |     28180U, // X86RCLI_W  | 
2808  | 0  |     17315U, // X86RCL_B  | 
2809  | 0  |     19293U, // X86RCL_D  | 
2810  | 0  |     22166U, // X86RCL_H  | 
2811  | 0  |     28460U, // X86RCL_W  | 
2812  | 0  |     17182U, // X86RCRI_B  | 
2813  | 0  |     19091U, // X86RCRI_D  | 
2814  | 0  |     22062U, // X86RCRI_H  | 
2815  | 0  |     28320U, // X86RCRI_W  | 
2816  | 0  |     17484U, // X86RCR_B  | 
2817  | 0  |     19828U, // X86RCR_D  | 
2818  | 0  |     22335U, // X86RCR_H  | 
2819  | 0  |     28715U, // X86RCR_W  | 
2820  | 0  |     17127U, // X86ROTLI_B  | 
2821  | 0  |     19037U, // X86ROTLI_D  | 
2822  | 0  |     22007U, // X86ROTLI_H  | 
2823  | 0  |     28266U, // X86ROTLI_W  | 
2824  | 0  |     17375U, // X86ROTL_B  | 
2825  | 0  |     19377U, // X86ROTL_D  | 
2826  | 0  |     22226U, // X86ROTL_H  | 
2827  | 0  |     28575U, // X86ROTL_W  | 
2828  | 0  |     17246U, // X86ROTRI_B  | 
2829  | 0  |     19126U, // X86ROTRI_D  | 
2830  | 0  |     22097U, // X86ROTRI_H  | 
2831  | 0  |     28355U, // X86ROTRI_W  | 
2832  | 0  |     17559U, // X86ROTR_B  | 
2833  | 0  |     19980U, // X86ROTR_D  | 
2834  | 0  |     22410U, // X86ROTR_H  | 
2835  | 0  |     28846U, // X86ROTR_W  | 
2836  | 0  |     16535U, // X86SBC_B  | 
2837  | 0  |     18288U, // X86SBC_D  | 
2838  | 0  |     21617U, // X86SBC_H  | 
2839  | 0  |     27239U, // X86SBC_W  | 
2840  | 0  |     21254U, // X86SETTAG  | 
2841  | 0  |     6968U,  // X86SETTM  | 
2842  | 0  |     17074U, // X86SLLI_B  | 
2843  | 0  |     18984U, // X86SLLI_D  | 
2844  | 0  |     21954U, // X86SLLI_H  | 
2845  | 0  |     28191U, // X86SLLI_W  | 
2846  | 0  |     17325U, // X86SLL_B  | 
2847  | 0  |     19319U, // X86SLL_D  | 
2848  | 0  |     22176U, // X86SLL_H  | 
2849  | 0  |     28497U, // X86SLL_W  | 
2850  | 0  |     16981U, // X86SRAI_B  | 
2851  | 0  |     18895U, // X86SRAI_D  | 
2852  | 0  |     21884U, // X86SRAI_H  | 
2853  | 0  |     28102U, // X86SRAI_W  | 
2854  | 0  |     16440U, // X86SRA_B  | 
2855  | 0  |     18060U, // X86SRA_D  | 
2856  | 0  |     21306U, // X86SRA_H  | 
2857  | 0  |     27042U, // X86SRA_W  | 
2858  | 0  |     17106U, // X86SRLI_B  | 
2859  | 0  |     19016U, // X86SRLI_D  | 
2860  | 0  |     21986U, // X86SRLI_H  | 
2861  | 0  |     28234U, // X86SRLI_W  | 
2862  | 0  |     17356U, // X86SRL_B  | 
2863  | 0  |     19350U, // X86SRL_D  | 
2864  | 0  |     22207U, // X86SRL_H  | 
2865  | 0  |     28538U, // X86SRL_W  | 
2866  | 0  |     16496U, // X86SUB_B  | 
2867  | 0  |     18208U, // X86SUB_D  | 
2868  | 0  |     25404U, // X86SUB_DU  | 
2869  | 0  |     21578U, // X86SUB_H  | 
2870  | 0  |     27190U, // X86SUB_W  | 
2871  | 0  |     26373U, // X86SUB_WU  | 
2872  | 0  |     17549U, // X86XOR_B  | 
2873  | 0  |     19961U, // X86XOR_D  | 
2874  | 0  |     22400U, // X86XOR_H  | 
2875  | 0  |     28817U, // X86XOR_W  | 
2876  | 0  |     23741U, // XOR  | 
2877  | 0  |     23216U, // XORI  | 
2878  | 0  |     16696U, // XVABSD_B  | 
2879  | 0  |     24949U, // XVABSD_BU  | 
2880  | 0  |     18496U, // XVABSD_D  | 
2881  | 0  |     25458U, // XVABSD_DU  | 
2882  | 0  |     21778U, // XVABSD_H  | 
2883  | 0  |     25907U, // XVABSD_HU  | 
2884  | 0  |     27693U, // XVABSD_W  | 
2885  | 0  |     26567U, // XVABSD_WU  | 
2886  | 0  |     16430U, // XVADDA_B  | 
2887  | 0  |     18039U, // XVADDA_D  | 
2888  | 0  |     21296U, // XVADDA_H  | 
2889  | 0  |     27032U, // XVADDA_W  | 
2890  | 0  |     25123U, // XVADDI_BU  | 
2891  | 0  |     25519U, // XVADDI_DU  | 
2892  | 0  |     25959U, // XVADDI_HU  | 
2893  | 0  |     26628U, // XVADDI_WU  | 
2894  | 0  |     27456U, // XVADDWEV_D_W  | 
2895  | 0  |     26487U, // XVADDWEV_D_WU  | 
2896  | 0  |     29251U, // XVADDWEV_D_WU_W  | 
2897  | 0  |     16883U, // XVADDWEV_H_B  | 
2898  | 0  |     25072U, // XVADDWEV_H_BU  | 
2899  | 0  |     17773U, // XVADDWEV_H_BU_B  | 
2900  | 0  |     19688U, // XVADDWEV_Q_D  | 
2901  | 0  |     25697U, // XVADDWEV_Q_DU  | 
2902  | 0  |     20368U, // XVADDWEV_Q_DU_D  | 
2903  | 0  |     22983U, // XVADDWEV_W_H  | 
2904  | 0  |     26273U, // XVADDWEV_W_HU  | 
2905  | 0  |     22770U, // XVADDWEV_W_HU_H  | 
2906  | 0  |     27334U, // XVADDWOD_D_W  | 
2907  | 0  |     26426U, // XVADDWOD_D_WU  | 
2908  | 0  |     29199U, // XVADDWOD_D_WU_W  | 
2909  | 0  |     16800U, // XVADDWOD_H_B  | 
2910  | 0  |     25011U, // XVADDWOD_H_BU  | 
2911  | 0  |     17721U, // XVADDWOD_H_BU_B  | 
2912  | 0  |     19607U, // XVADDWOD_Q_D  | 
2913  | 0  |     25636U, // XVADDWOD_Q_DU  | 
2914  | 0  |     20316U, // XVADDWOD_Q_DU_D  | 
2915  | 0  |     22891U, // XVADDWOD_W_H  | 
2916  | 0  |     26212U, // XVADDWOD_W_HU  | 
2917  | 0  |     22718U, // XVADDWOD_W_HU_H  | 
2918  | 0  |     16627U, // XVADD_B  | 
2919  | 0  |     18406U, // XVADD_D  | 
2920  | 0  |     21709U, // XVADD_H  | 
2921  | 0  |     23568U, // XVADD_Q  | 
2922  | 0  |     27605U, // XVADD_W  | 
2923  | 0  |     17002U, // XVANDI_B  | 
2924  | 0  |     26938U, // XVANDN_V  | 
2925  | 0  |     26897U, // XVAND_V  | 
2926  | 0  |     17508U, // XVAVGR_B  | 
2927  | 0  |     25214U, // XVAVGR_BU  | 
2928  | 0  |     19884U, // XVAVGR_D  | 
2929  | 0  |     25743U, // XVAVGR_DU  | 
2930  | 0  |     22359U, // XVAVGR_H  | 
2931  | 0  |     26050U, // XVAVGR_HU  | 
2932  | 0  |     28759U, // XVAVGR_W  | 
2933  | 0  |     26739U, // XVAVGR_WU  | 
2934  | 0  |     16762U, // XVAVG_B  | 
2935  | 0  |     24970U, // XVAVG_BU  | 
2936  | 0  |     18799U, // XVAVG_D  | 
2937  | 0  |     25479U, // XVAVG_DU  | 
2938  | 0  |     21844U, // XVAVG_H  | 
2939  | 0  |     25928U, // XVAVG_HU  | 
2940  | 0  |     27771U, // XVAVG_W  | 
2941  | 0  |     26588U, // XVAVG_WU  | 
2942  | 0  |     17193U, // XVBITCLRI_B  | 
2943  | 0  |     19102U, // XVBITCLRI_D  | 
2944  | 0  |     22073U, // XVBITCLRI_H  | 
2945  | 0  |     28331U, // XVBITCLRI_W  | 
2946  | 0  |     17518U, // XVBITCLR_B  | 
2947  | 0  |     19894U, // XVBITCLR_D  | 
2948  | 0  |     22369U, // XVBITCLR_H  | 
2949  | 0  |     28769U, // XVBITCLR_W  | 
2950  | 0  |     17292U, // XVBITREVI_B  | 
2951  | 0  |     19172U, // XVBITREVI_D  | 
2952  | 0  |     22143U, // XVBITREVI_H  | 
2953  | 0  |     28413U, // XVBITREVI_W  | 
2954  | 0  |     17831U, // XVBITREV_B  | 
2955  | 0  |     20576U, // XVBITREV_D  | 
2956  | 0  |     22828U, // XVBITREV_H  | 
2957  | 0  |     29309U, // XVBITREV_W  | 
2958  | 0  |     33445U, // XVBITSELI_B  | 
2959  | 0  |     26906U, // XVBITSEL_V  | 
2960  | 0  |     17269U, // XVBITSETI_B  | 
2961  | 0  |     19149U, // XVBITSETI_D  | 
2962  | 0  |     22120U, // XVBITSETI_H  | 
2963  | 0  |     28390U, // XVBITSETI_W  | 
2964  | 0  |     17650U, // XVBITSET_B  | 
2965  | 0  |     20140U, // XVBITSET_D  | 
2966  | 0  |     22527U, // XVBITSET_H  | 
2967  | 0  |     28998U, // XVBITSET_W  | 
2968  | 0  |     26918U, // XVBSLL_V  | 
2969  | 0  |     26928U, // XVBSRL_V  | 
2970  | 0  |     17435U, // XVCLO_B  | 
2971  | 0  |     19527U, // XVCLO_D  | 
2972  | 0  |     22286U, // XVCLO_H  | 
2973  | 0  |     28661U, // XVCLO_W  | 
2974  | 0  |     17937U, // XVCLZ_B  | 
2975  | 0  |     20987U, // XVCLZ_D  | 
2976  | 0  |     23088U, // XVCLZ_H  | 
2977  | 0  |     29433U, // XVCLZ_W  | 
2978  | 0  |     17843U, // XVDIV_B  | 
2979  | 0  |     25350U, // XVDIV_BU  | 
2980  | 0  |     20598U, // XVDIV_D  | 
2981  | 0  |     25832U, // XVDIV_DU  | 
2982  | 0  |     22840U, // XVDIV_H  | 
2983  | 0  |     26171U, // XVDIV_HU  | 
2984  | 0  |     29321U, // XVDIV_W  | 
2985  | 0  |     26859U, // XVDIV_WU  | 
2986  | 0  |     26784U, // XVEXTH_DU_WU  | 
2987  | 0  |     27376U, // XVEXTH_D_W  | 
2988  | 0  |     25260U, // XVEXTH_HU_BU  | 
2989  | 0  |     16828U, // XVEXTH_H_B  | 
2990  | 0  |     25774U, // XVEXTH_QU_DU  | 
2991  | 0  |     19635U, // XVEXTH_Q_D  | 
2992  | 0  |     26096U, // XVEXTH_WU_HU  | 
2993  | 0  |     22919U, // XVEXTH_W_H  | 
2994  | 0  |     25788U, // XVEXTL_QU_DU  | 
2995  | 0  |     19647U, // XVEXTL_Q_D  | 
2996  | 0  |     34012U, // XVEXTRINS_B  | 
2997  | 0  |     36490U, // XVEXTRINS_D  | 
2998  | 0  |     38889U, // XVEXTRINS_H  | 
2999  | 0  |     45360U, // XVEXTRINS_W  | 
3000  | 0  |     18344U, // XVFADD_D  | 
3001  | 0  |     23886U, // XVFADD_S  | 
3002  | 0  |     20119U, // XVFCLASS_D  | 
3003  | 0  |     24588U, // XVFCLASS_S  | 
3004  | 0  |     18744U, // XVFCMP_CAF_D  | 
3005  | 0  |     24100U, // XVFCMP_CAF_S  | 
3006  | 0  |     19751U, // XVFCMP_CEQ_D  | 
3007  | 0  |     24469U, // XVFCMP_CEQ_S  | 
3008  | 0  |     18517U, // XVFCMP_CLE_D  | 
3009  | 0  |     23926U, // XVFCMP_CLE_S  | 
3010  | 0  |     20180U, // XVFCMP_CLT_D  | 
3011  | 0  |     24618U, // XVFCMP_CLT_S  | 
3012  | 0  |     18622U, // XVFCMP_CNE_D  | 
3013  | 0  |     24002U, // XVFCMP_CNE_S  | 
3014  | 0  |     19925U, // XVFCMP_COR_D  | 
3015  | 0  |     24552U, // XVFCMP_COR_S  | 
3016  | 0  |     19788U, // XVFCMP_CUEQ_D  | 
3017  | 0  |     24497U, // XVFCMP_CUEQ_S  | 
3018  | 0  |     18582U, // XVFCMP_CULE_D  | 
3019  | 0  |     23972U, // XVFCMP_CULE_S  | 
3020  | 0  |     20217U, // XVFCMP_CULT_D  | 
3021  | 0  |     24646U, // XVFCMP_CULT_S  | 
3022  | 0  |     18664U, // XVFCMP_CUNE_D  | 
3023  | 0  |     24044U, // XVFCMP_CUNE_S  | 
3024  | 0  |     19499U, // XVFCMP_CUN_D  | 
3025  | 0  |     24416U, // XVFCMP_CUN_S  | 
3026  | 0  |     18758U, // XVFCMP_SAF_D  | 
3027  | 0  |     24114U, // XVFCMP_SAF_S  | 
3028  | 0  |     19765U, // XVFCMP_SEQ_D  | 
3029  | 0  |     24483U, // XVFCMP_SEQ_S  | 
3030  | 0  |     18540U, // XVFCMP_SLE_D  | 
3031  | 0  |     23949U, // XVFCMP_SLE_S  | 
3032  | 0  |     20194U, // XVFCMP_SLT_D  | 
3033  | 0  |     24632U, // XVFCMP_SLT_S  | 
3034  | 0  |     18650U, // XVFCMP_SNE_D  | 
3035  | 0  |     24030U, // XVFCMP_SNE_S  | 
3036  | 0  |     19947U, // XVFCMP_SOR_D  | 
3037  | 0  |     24566U, // XVFCMP_SOR_S  | 
3038  | 0  |     19803U, // XVFCMP_SUEQ_D  | 
3039  | 0  |     24512U, // XVFCMP_SUEQ_S  | 
3040  | 0  |     18597U, // XVFCMP_SULE_D  | 
3041  | 0  |     23987U, // XVFCMP_SULE_S  | 
3042  | 0  |     20232U, // XVFCMP_SULT_D  | 
3043  | 0  |     24661U, // XVFCMP_SULT_S  | 
3044  | 0  |     18679U, // XVFCMP_SUNE_D  | 
3045  | 0  |     24059U, // XVFCMP_SUNE_S  | 
3046  | 0  |     19513U, // XVFCMP_SUN_D  | 
3047  | 0  |     24430U, // XVFCMP_SUN_S  | 
3048  | 0  |     23850U, // XVFCVTH_D_S  | 
3049  | 0  |     22470U, // XVFCVTH_S_H  | 
3050  | 0  |     23863U, // XVFCVTL_D_S  | 
3051  | 0  |     22483U, // XVFCVTL_S_H  | 
3052  | 0  |     24136U, // XVFCVT_H_S  | 
3053  | 0  |     20066U, // XVFCVT_S_D  | 
3054  | 0  |     20588U, // XVFDIV_D  | 
3055  | 0  |     24747U, // XVFDIV_S  | 
3056  | 0  |     27362U, // XVFFINTH_D_W  | 
3057  | 0  |     27402U, // XVFFINTL_D_W  | 
3058  | 0  |     23260U, // XVFFINT_D_L  | 
3059  | 0  |     26321U, // XVFFINT_D_LU  | 
3060  | 0  |     23273U, // XVFFINT_S_L  | 
3061  | 0  |     28943U, // XVFFINT_S_W  | 
3062  | 0  |     26750U, // XVFFINT_S_WU  | 
3063  | 0  |     18197U, // XVFLOGB_D  | 
3064  | 0  |     23806U, // XVFLOGB_S  | 
3065  | 0  |     18363U, // XVFMADD_D  | 
3066  | 0  |     23896U, // XVFMADD_S  | 
3067  | 0  |     18079U, // XVFMAXA_D  | 
3068  | 0  |     23784U, // XVFMAXA_S  | 
3069  | 0  |     20928U, // XVFMAX_D  | 
3070  | 0  |     24839U, // XVFMAX_S  | 
3071  | 0  |     18049U, // XVFMINA_D  | 
3072  | 0  |     23773U, // XVFMINA_S  | 
3073  | 0  |     19471U, // XVFMIN_D  | 
3074  | 0  |     24406U, // XVFMIN_S  | 
3075  | 0  |     18228U, // XVFMSUB_D  | 
3076  | 0  |     23827U, // XVFMSUB_S  | 
3077  | 0  |     19405U, // XVFMUL_D  | 
3078  | 0  |     24370U, // XVFMUL_S  | 
3079  | 0  |     18374U, // XVFNMADD_D  | 
3080  | 0  |     23907U, // XVFNMADD_S  | 
3081  | 0  |     18239U, // XVFNMSUB_D  | 
3082  | 0  |     23838U, // XVFNMSUB_S  | 
3083  | 0  |     18694U, // XVFRECIPE_D  | 
3084  | 0  |     24074U, // XVFRECIPE_S  | 
3085  | 0  |     19553U, // XVFRECIP_D  | 
3086  | 0  |     24444U, // XVFRECIP_S  | 
3087  | 0  |     19445U, // XVFRINTRM_D  | 
3088  | 0  |     24380U, // XVFRINTRM_S  | 
3089  | 0  |     18636U, // XVFRINTRNE_D  | 
3090  | 0  |     24016U, // XVFRINTRNE_S  | 
3091  | 0  |     19565U, // XVFRINTRP_D  | 
3092  | 0  |     24456U, // XVFRINTRP_S  | 
3093  | 0  |     21011U, // XVFRINTRZ_D  | 
3094  | 0  |     24865U, // XVFRINTRZ_S  | 
3095  | 0  |     20257U, // XVFRINT_D  | 
3096  | 0  |     24676U, // XVFRINT_S  | 
3097  | 0  |     18707U, // XVFRSQRTE_D  | 
3098  | 0  |     24087U, // XVFRSQRTE_S  | 
3099  | 0  |     20279U, // XVFRSQRT_D  | 
3100  | 0  |     24698U, // XVFRSQRT_S  | 
3101  | 0  |     33533U, // XVFRSTPI_B  | 
3102  | 0  |     38413U, // XVFRSTPI_H  | 
3103  | 0  |     33838U, // XVFRSTP_B  | 
3104  | 0  |     38689U, // XVFRSTP_H  | 
3105  | 0  |     20268U, // XVFSQRT_D  | 
3106  | 0  |     24687U, // XVFSQRT_S  | 
3107  | 0  |     18218U, // XVFSUB_D  | 
3108  | 0  |     23817U, // XVFSUB_S  | 
3109  | 0  |     24211U, // XVFTINTH_L_S  | 
3110  | 0  |     24290U, // XVFTINTL_L_S  | 
3111  | 0  |     24179U, // XVFTINTRMH_L_S  | 
3112  | 0  |     24258U, // XVFTINTRML_L_S  | 
3113  | 0  |     19235U, // XVFTINTRM_L_D  | 
3114  | 0  |     20766U, // XVFTINTRM_W_D  | 
3115  | 0  |     24781U, // XVFTINTRM_W_S  | 
3116  | 0  |     24162U, // XVFTINTRNEH_L_S  | 
3117  | 0  |     24241U, // XVFTINTRNEL_L_S  | 
3118  | 0  |     19219U, // XVFTINTRNE_L_D  | 
3119  | 0  |     20638U, // XVFTINTRNE_W_D  | 
3120  | 0  |     24765U, // XVFTINTRNE_W_S  | 
3121  | 0  |     24195U, // XVFTINTRPH_L_S  | 
3122  | 0  |     24274U, // XVFTINTRPL_L_S  | 
3123  | 0  |     19250U, // XVFTINTRP_L_D  | 
3124  | 0  |     20885U, // XVFTINTRP_W_D  | 
3125  | 0  |     24796U, // XVFTINTRP_W_S  | 
3126  | 0  |     24225U, // XVFTINTRZH_L_S  | 
3127  | 0  |     24304U, // XVFTINTRZL_L_S  | 
3128  | 0  |     20416U, // XVFTINTRZ_LU_D  | 
3129  | 0  |     19278U, // XVFTINTRZ_L_D  | 
3130  | 0  |     24731U, // XVFTINTRZ_WU_S  | 
3131  | 0  |     20913U, // XVFTINTRZ_W_D  | 
3132  | 0  |     24824U, // XVFTINTRZ_W_S  | 
3133  | 0  |     20402U, // XVFTINT_LU_D  | 
3134  | 0  |     19265U, // XVFTINT_L_D  | 
3135  | 0  |     24717U, // XVFTINT_WU_S  | 
3136  | 0  |     20900U, // XVFTINT_W_D  | 
3137  | 0  |     24811U, // XVFTINT_W_S  | 
3138  | 0  |     26844U, // XVHADDW_DU_WU  | 
3139  | 0  |     27533U, // XVHADDW_D_W  | 
3140  | 0  |     25320U, // XVHADDW_HU_BU  | 
3141  | 0  |     16937U, // XVHADDW_H_B  | 
3142  | 0  |     25817U, // XVHADDW_QU_DU  | 
3143  | 0  |     19729U, // XVHADDW_Q_D  | 
3144  | 0  |     26156U, // XVHADDW_WU_HU  | 
3145  | 0  |     23037U, // XVHADDW_W_H  | 
3146  | 0  |     18973U, // XVHSELI_D  | 
3147  | 0  |     26829U, // XVHSUBW_DU_WU  | 
3148  | 0  |     27520U, // XVHSUBW_D_W  | 
3149  | 0  |     25305U, // XVHSUBW_HU_BU  | 
3150  | 0  |     16924U, // XVHSUBW_H_B  | 
3151  | 0  |     25802U, // XVHSUBW_QU_DU  | 
3152  | 0  |     19716U, // XVHSUBW_Q_D  | 
3153  | 0  |     26141U, // XVHSUBW_WU_HU  | 
3154  | 0  |     23024U, // XVHSUBW_W_H  | 
3155  | 0  |     16959U, // XVILVH_B  | 
3156  | 0  |     18833U, // XVILVH_D  | 
3157  | 0  |     21862U, // XVILVH_H  | 
3158  | 0  |     28060U, // XVILVH_W  | 
3159  | 0  |     17405U, // XVILVL_B  | 
3160  | 0  |     19424U, // XVILVL_D  | 
3161  | 0  |     22256U, // XVILVL_H  | 
3162  | 0  |     28612U, // XVILVL_W  | 
3163  | 0  |     36425U, // XVINSGR2VR_D  | 
3164  | 0  |     45302U, // XVINSGR2VR_W  | 
3165  | 0  |     34411U, // XVINSVE0_D  | 
3166  | 0  |     43404U, // XVINSVE0_W  | 
3167  | 0  |     21083U, // XVLD  | 
3168  | 0  |     23203U, // XVLDI  | 
3169  | 0  |     17344U, // XVLDREPL_B  | 
3170  | 0  |     19338U, // XVLDREPL_D  | 
3171  | 0  |     22195U, // XVLDREPL_H  | 
3172  | 0  |     28526U, // XVLDREPL_W  | 
3173  | 0  |     29502U, // XVLDX  | 
3174  | 0  |     43825U, // XVMADDWEV_D_W  | 
3175  | 0  |     42855U, // XVMADDWEV_D_WU  | 
3176  | 0  |     45617U, // XVMADDWEV_D_WU_W  | 
3177  | 0  |     33252U, // XVMADDWEV_H_B  | 
3178  | 0  |     41440U, // XVMADDWEV_H_BU  | 
3179  | 0  |     34139U, // XVMADDWEV_H_BU_B  | 
3180  | 0  |     36057U, // XVMADDWEV_Q_D  | 
3181  | 0  |     42065U, // XVMADDWEV_Q_DU  | 
3182  | 0  |     36734U, // XVMADDWEV_Q_DU_D  | 
3183  | 0  |     39352U, // XVMADDWEV_W_H  | 
3184  | 0  |     42641U, // XVMADDWEV_W_HU  | 
3185  | 0  |     39136U, // XVMADDWEV_W_HU_H  | 
3186  | 0  |     43703U, // XVMADDWOD_D_W  | 
3187  | 0  |     42794U, // XVMADDWOD_D_WU  | 
3188  | 0  |     45565U, // XVMADDWOD_D_WU_W  | 
3189  | 0  |     33169U, // XVMADDWOD_H_B  | 
3190  | 0  |     41379U, // XVMADDWOD_H_BU  | 
3191  | 0  |     34087U, // XVMADDWOD_H_BU_B  | 
3192  | 0  |     35976U, // XVMADDWOD_Q_D  | 
3193  | 0  |     42004U, // XVMADDWOD_Q_DU  | 
3194  | 0  |     36682U, // XVMADDWOD_Q_DU_D  | 
3195  | 0  |     39260U, // XVMADDWOD_W_H  | 
3196  | 0  |     42580U, // XVMADDWOD_W_HU  | 
3197  | 0  |     39084U, // XVMADDWOD_W_HU_H  | 
3198  | 0  |     32991U, // XVMADD_B  | 
3199  | 0  |     34770U, // XVMADD_D  | 
3200  | 0  |     38073U, // XVMADD_H  | 
3201  | 0  |     43969U, // XVMADD_W  | 
3202  | 0  |     17305U, // XVMAXI_B  | 
3203  | 0  |     25167U, // XVMAXI_BU  | 
3204  | 0  |     19185U, // XVMAXI_D  | 
3205  | 0  |     25563U, // XVMAXI_DU  | 
3206  | 0  |     22156U, // XVMAXI_H  | 
3207  | 0  |     26003U, // XVMAXI_HU  | 
3208  | 0  |     28426U, // XVMAXI_W  | 
3209  | 0  |     26672U, // XVMAXI_WU  | 
3210  | 0  |     17887U, // XVMAX_B  | 
3211  | 0  |     25360U, // XVMAX_BU  | 
3212  | 0  |     20947U, // XVMAX_D  | 
3213  | 0  |     25852U, // XVMAX_DU  | 
3214  | 0  |     23050U, // XVMAX_H  | 
3215  | 0  |     26303U, // XVMAX_HU  | 
3216  | 0  |     29385U, // XVMAX_W  | 
3217  | 0  |     26879U, // XVMAX_WU  | 
3218  | 0  |     17139U, // XVMINI_B  | 
3219  | 0  |     25145U, // XVMINI_BU  | 
3220  | 0  |     19060U, // XVMINI_D  | 
3221  | 0  |     25541U, // XVMINI_DU  | 
3222  | 0  |     22019U, // XVMINI_H  | 
3223  | 0  |     25981U, // XVMINI_HU  | 
3224  | 0  |     28289U, // XVMINI_W  | 
3225  | 0  |     26650U, // XVMINI_WU  | 
3226  | 0  |     17426U, // XVMIN_B  | 
3227  | 0  |     25189U, // XVMIN_BU  | 
3228  | 0  |     19490U, // XVMIN_D  | 
3229  | 0  |     25595U, // XVMIN_DU  | 
3230  | 0  |     22277U, // XVMIN_H  | 
3231  | 0  |     26025U, // XVMIN_HU  | 
3232  | 0  |     28652U, // XVMIN_W  | 
3233  | 0  |     26713U, // XVMIN_WU  | 
3234  | 0  |     16676U, // XVMOD_B  | 
3235  | 0  |     24939U, // XVMOD_BU  | 
3236  | 0  |     18476U, // XVMOD_D  | 
3237  | 0  |     25448U, // XVMOD_DU  | 
3238  | 0  |     21758U, // XVMOD_H  | 
3239  | 0  |     25897U, // XVMOD_HU  | 
3240  | 0  |     27673U, // XVMOD_W  | 
3241  | 0  |     26557U, // XVMOD_WU  | 
3242  | 0  |     17910U, // XVMSKGEZ_B  | 
3243  | 0  |     17972U, // XVMSKLTZ_B  | 
3244  | 0  |     21031U, // XVMSKLTZ_D  | 
3245  | 0  |     23112U, // XVMSKLTZ_H  | 
3246  | 0  |     29464U, // XVMSKLTZ_W  | 
3247  | 0  |     17946U, // XVMSKNZ_B  | 
3248  | 0  |     32890U, // XVMSUB_B  | 
3249  | 0  |     34635U, // XVMSUB_D  | 
3250  | 0  |     37972U, // XVMSUB_H  | 
3251  | 0  |     43594U, // XVMSUB_W  | 
3252  | 0  |     16950U, // XVMUH_B  | 
3253  | 0  |     25102U, // XVMUH_BU  | 
3254  | 0  |     18816U, // XVMUH_D  | 
3255  | 0  |     25498U, // XVMUH_DU  | 
3256  | 0  |     21853U, // XVMUH_H  | 
3257  | 0  |     25938U, // XVMUH_HU  | 
3258  | 0  |     28051U, // XVMUH_W  | 
3259  | 0  |     26607U, // XVMUH_WU  | 
3260  | 0  |     27470U, // XVMULWEV_D_W  | 
3261  | 0  |     26502U, // XVMULWEV_D_WU  | 
3262  | 0  |     29268U, // XVMULWEV_D_WU_W  | 
3263  | 0  |     16897U, // XVMULWEV_H_B  | 
3264  | 0  |     25087U, // XVMULWEV_H_BU  | 
3265  | 0  |     17790U, // XVMULWEV_H_BU_B  | 
3266  | 0  |     19702U, // XVMULWEV_Q_D  | 
3267  | 0  |     25712U, // XVMULWEV_Q_DU  | 
3268  | 0  |     20385U, // XVMULWEV_Q_DU_D  | 
3269  | 0  |     22997U, // XVMULWEV_W_H  | 
3270  | 0  |     26288U, // XVMULWEV_W_HU  | 
3271  | 0  |     22787U, // XVMULWEV_W_HU_H  | 
3272  | 0  |     27348U, // XVMULWOD_D_W  | 
3273  | 0  |     26441U, // XVMULWOD_D_WU  | 
3274  | 0  |     29216U, // XVMULWOD_D_WU_W  | 
3275  | 0  |     16814U, // XVMULWOD_H_B  | 
3276  | 0  |     25026U, // XVMULWOD_H_BU  | 
3277  | 0  |     17738U, // XVMULWOD_H_BU_B  | 
3278  | 0  |     19621U, // XVMULWOD_Q_D  | 
3279  | 0  |     25651U, // XVMULWOD_Q_DU  | 
3280  | 0  |     20333U, // XVMULWOD_Q_DU_D  | 
3281  | 0  |     22905U, // XVMULWOD_W_H  | 
3282  | 0  |     26227U, // XVMULWOD_W_HU  | 
3283  | 0  |     22735U, // XVMULWOD_W_HU_H  | 
3284  | 0  |     17396U, // XVMUL_B  | 
3285  | 0  |     19415U, // XVMUL_D  | 
3286  | 0  |     22247U, // XVMUL_H  | 
3287  | 0  |     28603U, // XVMUL_W  | 
3288  | 0  |     16753U, // XVNEG_B  | 
3289  | 0  |     18790U, // XVNEG_D  | 
3290  | 0  |     21835U, // XVNEG_H  | 
3291  | 0  |     27762U, // XVNEG_W  | 
3292  | 0  |     17217U, // XVNORI_B  | 
3293  | 0  |     26957U, // XVNOR_V  | 
3294  | 0  |     17227U, // XVORI_B  | 
3295  | 0  |     26948U, // XVORN_V  | 
3296  | 0  |     26966U, // XVOR_V  | 
3297  | 0  |     17807U, // XVPACKEV_B  | 
3298  | 0  |     20552U, // XVPACKEV_D  | 
3299  | 0  |     22804U, // XVPACKEV_H  | 
3300  | 0  |     29285U, // XVPACKEV_W  | 
3301  | 0  |     16652U, // XVPACKOD_B  | 
3302  | 0  |     18452U, // XVPACKOD_D  | 
3303  | 0  |     21734U, // XVPACKOD_H  | 
3304  | 0  |     27649U, // XVPACKOD_W  | 
3305  | 0  |     17687U, // XVPCNT_B  | 
3306  | 0  |     20247U, // XVPCNT_D  | 
3307  | 0  |     22564U, // XVPCNT_H  | 
3308  | 0  |     29035U, // XVPCNT_W  | 
3309  | 0  |     19049U, // XVPERMI_D  | 
3310  | 0  |     39961U, // XVPERMI_Q  | 
3311  | 0  |     44662U, // XVPERMI_W  | 
3312  | 0  |     28633U, // XVPERM_W  | 
3313  | 0  |     17819U, // XVPICKEV_B  | 
3314  | 0  |     20564U, // XVPICKEV_D  | 
3315  | 0  |     22816U, // XVPICKEV_H  | 
3316  | 0  |     29297U, // XVPICKEV_W  | 
3317  | 0  |     16664U, // XVPICKOD_B  | 
3318  | 0  |     18464U, // XVPICKOD_D  | 
3319  | 0  |     21746U, // XVPICKOD_H  | 
3320  | 0  |     27661U, // XVPICKOD_W  | 
3321  | 0  |     19857U, // XVPICKVE2GR_D  | 
3322  | 0  |     25727U, // XVPICKVE2GR_DU  | 
3323  | 0  |     28744U, // XVPICKVE2GR_W  | 
3324  | 0  |     26723U, // XVPICKVE2GR_WU  | 
3325  | 0  |     18720U, // XVPICKVE_D  | 
3326  | 0  |     27728U, // XVPICKVE_W  | 
3327  | 0  |     17022U, // XVREPL128VEI_B  | 
3328  | 0  |     18934U, // XVREPL128VEI_D  | 
3329  | 0  |     21915U, // XVREPL128VEI_H  | 
3330  | 0  |     28152U, // XVREPL128VEI_W  | 
3331  | 0  |     17580U, // XVREPLGR2VR_B  | 
3332  | 0  |     20026U, // XVREPLGR2VR_D  | 
3333  | 0  |     22431U, // XVREPLGR2VR_H  | 
3334  | 0  |     28903U, // XVREPLGR2VR_W  | 
3335  | 0  |     16417U, // XVREPLVE0_B  | 
3336  | 0  |     18014U, // XVREPLVE0_D  | 
3337  | 0  |     21283U, // XVREPLVE0_H  | 
3338  | 0  |     23428U, // XVREPLVE0_Q  | 
3339  | 0  |     27007U, // XVREPLVE0_W  | 
3340  | 0  |     16731U, // XVREPLVE_B  | 
3341  | 0  |     18732U, // XVREPLVE_D  | 
3342  | 0  |     21813U, // XVREPLVE_H  | 
3343  | 0  |     27740U, // XVREPLVE_W  | 
3344  | 0  |     17258U, // XVROTRI_B  | 
3345  | 0  |     19138U, // XVROTRI_D  | 
3346  | 0  |     22109U, // XVROTRI_H  | 
3347  | 0  |     28379U, // XVROTRI_W  | 
3348  | 0  |     17570U, // XVROTR_B  | 
3349  | 0  |     19991U, // XVROTR_D  | 
3350  | 0  |     22421U, // XVROTR_H  | 
3351  | 0  |     28868U, // XVROTR_W  | 
3352  | 0  |     16617U, // XVSADD_B  | 
3353  | 0  |     24921U, // XVSADD_BU  | 
3354  | 0  |     18396U, // XVSADD_D  | 
3355  | 0  |     25437U, // XVSADD_DU  | 
3356  | 0  |     21699U, // XVSADD_H  | 
3357  | 0  |     25879U, // XVSADD_HU  | 
3358  | 0  |     27595U, // XVSADD_W  | 
3359  | 0  |     26539U, // XVSADD_WU  | 
3360  | 0  |     17641U, // XVSAT_B  | 
3361  | 0  |     25225U, // XVSAT_BU  | 
3362  | 0  |     20131U, // XVSAT_D  | 
3363  | 0  |     25754U, // XVSAT_DU  | 
3364  | 0  |     22518U, // XVSAT_H  | 
3365  | 0  |     26061U, // XVSAT_HU  | 
3366  | 0  |     28989U, // XVSAT_W  | 
3367  | 0  |     26764U, // XVSAT_WU  | 
3368  | 0  |     17161U, // XVSEQI_B  | 
3369  | 0  |     19070U, // XVSEQI_D  | 
3370  | 0  |     22041U, // XVSEQI_H  | 
3371  | 0  |     28299U, // XVSEQI_W  | 
3372  | 0  |     17465U, // XVSEQ_B  | 
3373  | 0  |     19779U, // XVSEQ_D  | 
3374  | 0  |     22316U, // XVSEQ_H  | 
3375  | 0  |     28696U, // XVSEQ_W  | 
3376  | 0  |     17922U, // XVSETALLNEZ_B  | 
3377  | 0  |     20972U, // XVSETALLNEZ_D  | 
3378  | 0  |     23073U, // XVSETALLNEZ_H  | 
3379  | 0  |     29418U, // XVSETALLNEZ_W  | 
3380  | 0  |     17957U, // XVSETANYEQZ_B  | 
3381  | 0  |     20996U, // XVSETANYEQZ_D  | 
3382  | 0  |     23097U, // XVSETANYEQZ_H  | 
3383  | 0  |     29442U, // XVSETANYEQZ_W  | 
3384  | 0  |     26995U, // XVSETEQZ_V  | 
3385  | 0  |     26983U, // XVSETNEZ_V  | 
3386  | 0  |     16969U, // XVSHUF4I_B  | 
3387  | 0  |     35256U, // XVSHUF4I_D  | 
3388  | 0  |     21872U, // XVSHUF4I_H  | 
3389  | 0  |     28090U, // XVSHUF4I_W  | 
3390  | 0  |     16743U, // XVSHUF_B  | 
3391  | 0  |     35156U, // XVSHUF_D  | 
3392  | 0  |     38209U, // XVSHUF_H  | 
3393  | 0  |     44136U, // XVSHUF_W  | 
3394  | 0  |     17852U, // XVSIGNCOV_B  | 
3395  | 0  |     20607U, // XVSIGNCOV_D  | 
3396  | 0  |     22849U, // XVSIGNCOV_H  | 
3397  | 0  |     29330U, // XVSIGNCOV_W  | 
3398  | 0  |     17012U, // XVSLEI_B  | 
3399  | 0  |     25134U, // XVSLEI_BU  | 
3400  | 0  |     18924U, // XVSLEI_D  | 
3401  | 0  |     25530U, // XVSLEI_DU  | 
3402  | 0  |     21905U, // XVSLEI_H  | 
3403  | 0  |     25970U, // XVSLEI_HU  | 
3404  | 0  |     28142U, // XVSLEI_W  | 
3405  | 0  |     26639U, // XVSLEI_WU  | 
3406  | 0  |     16714U, // XVSLE_B  | 
3407  | 0  |     24960U, // XVSLE_BU  | 
3408  | 0  |     18554U, // XVSLE_D  | 
3409  | 0  |     25469U, // XVSLE_DU  | 
3410  | 0  |     21796U, // XVSLE_H  | 
3411  | 0  |     25918U, // XVSLE_HU  | 
3412  | 0  |     27711U, // XVSLE_W  | 
3413  | 0  |     26578U, // XVSLE_WU  | 
3414  | 0  |     17085U, // XVSLLI_B  | 
3415  | 0  |     18995U, // XVSLLI_D  | 
3416  | 0  |     21965U, // XVSLLI_H  | 
3417  | 0  |     28213U, // XVSLLI_W  | 
3418  | 0  |     26798U, // XVSLLWIL_DU_WU  | 
3419  | 0  |     27388U, // XVSLLWIL_D_W  | 
3420  | 0  |     25274U, // XVSLLWIL_HU_BU  | 
3421  | 0  |     16840U, // XVSLLWIL_H_B  | 
3422  | 0  |     26110U, // XVSLLWIL_WU_HU  | 
3423  | 0  |     22931U, // XVSLLWIL_W_H  | 
3424  | 0  |     17335U, // XVSLL_B  | 
3425  | 0  |     19329U, // XVSLL_D  | 
3426  | 0  |     22186U, // XVSLL_H  | 
3427  | 0  |     28517U, // XVSLL_W  | 
3428  | 0  |     17282U, // XVSLTI_B  | 
3429  | 0  |     25156U, // XVSLTI_BU  | 
3430  | 0  |     19162U, // XVSLTI_D  | 
3431  | 0  |     25552U, // XVSLTI_DU  | 
3432  | 0  |     22133U, // XVSLTI_H  | 
3433  | 0  |     25992U, // XVSLTI_HU  | 
3434  | 0  |     28403U, // XVSLTI_W  | 
3435  | 0  |     26661U, // XVSLTI_WU  | 
3436  | 0  |     17678U, // XVSLT_B  | 
3437  | 0  |     25235U, // XVSLT_BU  | 
3438  | 0  |     20208U, // XVSLT_D  | 
3439  | 0  |     25764U, // XVSLT_DU  | 
3440  | 0  |     22555U, // XVSLT_H  | 
3441  | 0  |     26071U, // XVSLT_HU  | 
3442  | 0  |     29026U, // XVSLT_W  | 
3443  | 0  |     26774U, // XVSLT_WU  | 
3444  | 0  |     16992U, // XVSRAI_B  | 
3445  | 0  |     18906U, // XVSRAI_D  | 
3446  | 0  |     21895U, // XVSRAI_H  | 
3447  | 0  |     28124U, // XVSRAI_W  | 
3448  | 0  |     37723U, // XVSRANI_B_H  | 
3449  | 0  |     39854U, // XVSRANI_D_Q  | 
3450  | 0  |     44178U, // XVSRANI_H_W  | 
3451  | 0  |     37052U, // XVSRANI_W_D  | 
3452  | 0  |     21450U, // XVSRAN_B_H  | 
3453  | 0  |     27905U, // XVSRAN_H_W  | 
3454  | 0  |     20794U, // XVSRAN_W_D  | 
3455  | 0  |     17171U, // XVSRARI_B  | 
3456  | 0  |     19080U, // XVSRARI_D  | 
3457  | 0  |     22051U, // XVSRARI_H  | 
3458  | 0  |     28309U, // XVSRARI_W  | 
3459  | 0  |     37778U, // XVSRARNI_B_H  | 
3460  | 0  |     39909U, // XVSRARNI_D_Q  | 
3461  | 0  |     44233U, // XVSRARNI_H_W  | 
3462  | 0  |     37107U, // XVSRARNI_W_D  | 
3463  | 0  |     21501U, // XVSRARN_B_H  | 
3464  | 0  |     27956U, // XVSRARN_H_W  | 
3465  | 0  |     20845U, // XVSRARN_W_D  | 
3466  | 0  |     17474U, // XVSRAR_B  | 
3467  | 0  |     19818U, // XVSRAR_D  | 
3468  | 0  |     22325U, // XVSRAR_H  | 
3469  | 0  |     28705U, // XVSRAR_W  | 
3470  | 0  |     16450U, // XVSRA_B  | 
3471  | 0  |     18070U, // XVSRA_D  | 
3472  | 0  |     21316U, // XVSRA_H  | 
3473  | 0  |     27062U, // XVSRA_W  | 
3474  | 0  |     17117U, // XVSRLI_B  | 
3475  | 0  |     19027U, // XVSRLI_D  | 
3476  | 0  |     21997U, // XVSRLI_H  | 
3477  | 0  |     28256U, // XVSRLI_W  | 
3478  | 0  |     37750U, // XVSRLNI_B_H  | 
3479  | 0  |     39881U, // XVSRLNI_D_Q  | 
3480  | 0  |     44205U, // XVSRLNI_H_W  | 
3481  | 0  |     37079U, // XVSRLNI_W_D  | 
3482  | 0  |     21475U, // XVSRLN_B_H  | 
3483  | 0  |     27930U, // XVSRLN_H_W  | 
3484  | 0  |     20819U, // XVSRLN_W_D  | 
3485  | 0  |     17206U, // XVSRLRI_B  | 
3486  | 0  |     19115U, // XVSRLRI_D  | 
3487  | 0  |     22086U, // XVSRLRI_H  | 
3488  | 0  |     28344U, // XVSRLRI_W  | 
3489  | 0  |     37807U, // XVSRLRNI_B_H  | 
3490  | 0  |     39938U, // XVSRLRNI_D_Q  | 
3491  | 0  |     44262U, // XVSRLRNI_H_W  | 
3492  | 0  |     37136U, // XVSRLRNI_W_D  | 
3493  | 0  |     21528U, // XVSRLRN_B_H  | 
3494  | 0  |     27983U, // XVSRLRN_H_W  | 
3495  | 0  |     20872U, // XVSRLRN_W_D  | 
3496  | 0  |     17530U, // XVSRLR_B  | 
3497  | 0  |     19906U, // XVSRLR_D  | 
3498  | 0  |     22381U, // XVSRLR_H  | 
3499  | 0  |     28781U, // XVSRLR_W  | 
3500  | 0  |     17366U, // XVSRL_B  | 
3501  | 0  |     19360U, // XVSRL_D  | 
3502  | 0  |     22217U, // XVSRL_H  | 
3503  | 0  |     28558U, // XVSRL_W  | 
3504  | 0  |     38964U, // XVSSRANI_BU_H  | 
3505  | 0  |     37709U, // XVSSRANI_B_H  | 
3506  | 0  |     39972U, // XVSSRANI_DU_Q  | 
3507  | 0  |     39840U, // XVSSRANI_D_Q  | 
3508  | 0  |     45445U, // XVSSRANI_HU_W  | 
3509  | 0  |     44164U, // XVSSRANI_H_W  | 
3510  | 0  |     36816U, // XVSSRANI_WU_D  | 
3511  | 0  |     37038U, // XVSSRANI_W_D  | 
3512  | 0  |     22642U, // XVSSRAN_BU_H  | 
3513  | 0  |     21437U, // XVSSRAN_B_H  | 
3514  | 0  |     29123U, // XVSSRAN_HU_W  | 
3515  | 0  |     27892U, // XVSSRAN_H_W  | 
3516  | 0  |     20494U, // XVSSRAN_WU_D  | 
3517  | 0  |     20781U, // XVSSRAN_W_D  | 
3518  | 0  |     38994U, // XVSSRARNI_BU_H  | 
3519  | 0  |     37763U, // XVSSRARNI_B_H  | 
3520  | 0  |     40002U, // XVSSRARNI_DU_Q  | 
3521  | 0  |     39894U, // XVSSRARNI_D_Q  | 
3522  | 0  |     45475U, // XVSSRARNI_HU_W  | 
3523  | 0  |     44218U, // XVSSRARNI_H_W  | 
3524  | 0  |     36846U, // XVSSRARNI_WU_D  | 
3525  | 0  |     37092U, // XVSSRARNI_W_D  | 
3526  | 0  |     22670U, // XVSSRARN_BU_H  | 
3527  | 0  |     21487U, // XVSSRARN_B_H  | 
3528  | 0  |     29151U, // XVSSRARN_HU_W  | 
3529  | 0  |     27942U, // XVSSRARN_H_W  | 
3530  | 0  |     20522U, // XVSSRARN_WU_D  | 
3531  | 0  |     20831U, // XVSSRARN_W_D  | 
3532  | 0  |     38979U, // XVSSRLNI_BU_H  | 
3533  | 0  |     37736U, // XVSSRLNI_B_H  | 
3534  | 0  |     39987U, // XVSSRLNI_DU_Q  | 
3535  | 0  |     39867U, // XVSSRLNI_D_Q  | 
3536  | 0  |     45460U, // XVSSRLNI_HU_W  | 
3537  | 0  |     44191U, // XVSSRLNI_H_W  | 
3538  | 0  |     36831U, // XVSSRLNI_WU_D  | 
3539  | 0  |     37065U, // XVSSRLNI_W_D  | 
3540  | 0  |     22656U, // XVSSRLN_BU_H  | 
3541  | 0  |     21462U, // XVSSRLN_B_H  | 
3542  | 0  |     29137U, // XVSSRLN_HU_W  | 
3543  | 0  |     27917U, // XVSSRLN_H_W  | 
3544  | 0  |     20508U, // XVSSRLN_WU_D  | 
3545  | 0  |     20806U, // XVSSRLN_W_D  | 
3546  | 0  |     39010U, // XVSSRLRNI_BU_H  | 
3547  | 0  |     37792U, // XVSSRLRNI_B_H  | 
3548  | 0  |     40018U, // XVSSRLRNI_DU_Q  | 
3549  | 0  |     39923U, // XVSSRLRNI_D_Q  | 
3550  | 0  |     45491U, // XVSSRLRNI_HU_W  | 
3551  | 0  |     44247U, // XVSSRLRNI_H_W  | 
3552  | 0  |     36862U, // XVSSRLRNI_WU_D  | 
3553  | 0  |     37121U, // XVSSRLRNI_W_D  | 
3554  | 0  |     22685U, // XVSSRLRN_BU_H  | 
3555  | 0  |     21514U, // XVSSRLRN_B_H  | 
3556  | 0  |     29166U, // XVSSRLRN_HU_W  | 
3557  | 0  |     27969U, // XVSSRLRN_H_W  | 
3558  | 0  |     20537U, // XVSSRLRN_WU_D  | 
3559  | 0  |     20858U, // XVSSRLRN_W_D  | 
3560  | 0  |     16516U, // XVSSUB_B  | 
3561  | 0  |     24910U, // XVSSUB_BU  | 
3562  | 0  |     18261U, // XVSSUB_D  | 
3563  | 0  |     25415U, // XVSSUB_DU  | 
3564  | 0  |     21598U, // XVSSUB_H  | 
3565  | 0  |     25868U, // XVSSUB_HU  | 
3566  | 0  |     27220U, // XVSSUB_W  | 
3567  | 0  |     26384U, // XVSSUB_WU  | 
3568  | 0  |     24904U, // XVST  | 
3569  | 0  |     17415U, // XVSTELM_B  | 
3570  | 0  |     19434U, // XVSTELM_D  | 
3571  | 0  |     22266U, // XVSTELM_H  | 
3572  | 0  |     28622U, // XVSTELM_W  | 
3573  | 0  |     29509U, // XVSTX  | 
3574  | 0  |     25112U, // XVSUBI_BU  | 
3575  | 0  |     25508U, // XVSUBI_DU  | 
3576  | 0  |     25948U, // XVSUBI_HU  | 
3577  | 0  |     26617U, // XVSUBI_WU  | 
3578  | 0  |     27427U, // XVSUBWEV_D_W  | 
3579  | 0  |     26456U, // XVSUBWEV_D_WU  | 
3580  | 0  |     16854U, // XVSUBWEV_H_B  | 
3581  | 0  |     25041U, // XVSUBWEV_H_BU  | 
3582  | 0  |     19659U, // XVSUBWEV_Q_D  | 
3583  | 0  |     25666U, // XVSUBWEV_Q_DU  | 
3584  | 0  |     22954U, // XVSUBWEV_W_H  | 
3585  | 0  |     26242U, // XVSUBWEV_W_HU  | 
3586  | 0  |     27305U, // XVSUBWOD_D_W  | 
3587  | 0  |     26395U, // XVSUBWOD_D_WU  | 
3588  | 0  |     16771U, // XVSUBWOD_H_B  | 
3589  | 0  |     24980U, // XVSUBWOD_H_BU  | 
3590  | 0  |     19578U, // XVSUBWOD_Q_D  | 
3591  | 0  |     25605U, // XVSUBWOD_Q_DU  | 
3592  | 0  |     22862U, // XVSUBWOD_W_H  | 
3593  | 0  |     26181U, // XVSUBWOD_W_HU  | 
3594  | 0  |     16526U, // XVSUB_B  | 
3595  | 0  |     18271U, // XVSUB_D  | 
3596  | 0  |     21608U, // XVSUB_H  | 
3597  | 0  |     23441U, // XVSUB_Q  | 
3598  | 0  |     27230U, // XVSUB_W  | 
3599  | 0  |     17236U, // XVXORI_B  | 
3600  | 0  |     26974U, // XVXOR_V  | 
3601  | 0  |   };  | 
3602  |  | 
  | 
3603  | 0  |   static const uint8_t OpInfo1[] = { | 
3604  | 0  |     0U, // PHI  | 
3605  | 0  |     0U, // INLINEASM  | 
3606  | 0  |     0U, // INLINEASM_BR  | 
3607  | 0  |     0U, // CFI_INSTRUCTION  | 
3608  | 0  |     0U, // EH_LABEL  | 
3609  | 0  |     0U, // GC_LABEL  | 
3610  | 0  |     0U, // ANNOTATION_LABEL  | 
3611  | 0  |     0U, // KILL  | 
3612  | 0  |     0U, // EXTRACT_SUBREG  | 
3613  | 0  |     0U, // INSERT_SUBREG  | 
3614  | 0  |     0U, // IMPLICIT_DEF  | 
3615  | 0  |     0U, // SUBREG_TO_REG  | 
3616  | 0  |     0U, // COPY_TO_REGCLASS  | 
3617  | 0  |     0U, // DBG_VALUE  | 
3618  | 0  |     0U, // DBG_VALUE_LIST  | 
3619  | 0  |     0U, // DBG_INSTR_REF  | 
3620  | 0  |     0U, // DBG_PHI  | 
3621  | 0  |     0U, // DBG_LABEL  | 
3622  | 0  |     0U, // REG_SEQUENCE  | 
3623  | 0  |     0U, // COPY  | 
3624  | 0  |     0U, // BUNDLE  | 
3625  | 0  |     0U, // LIFETIME_START  | 
3626  | 0  |     0U, // LIFETIME_END  | 
3627  | 0  |     0U, // PSEUDO_PROBE  | 
3628  | 0  |     0U, // ARITH_FENCE  | 
3629  | 0  |     0U, // STACKMAP  | 
3630  | 0  |     0U, // FENTRY_CALL  | 
3631  | 0  |     0U, // PATCHPOINT  | 
3632  | 0  |     0U, // LOAD_STACK_GUARD  | 
3633  | 0  |     0U, // PREALLOCATED_SETUP  | 
3634  | 0  |     0U, // PREALLOCATED_ARG  | 
3635  | 0  |     0U, // STATEPOINT  | 
3636  | 0  |     0U, // LOCAL_ESCAPE  | 
3637  | 0  |     0U, // FAULTING_OP  | 
3638  | 0  |     0U, // PATCHABLE_OP  | 
3639  | 0  |     0U, // PATCHABLE_FUNCTION_ENTER  | 
3640  | 0  |     0U, // PATCHABLE_RET  | 
3641  | 0  |     0U, // PATCHABLE_FUNCTION_EXIT  | 
3642  | 0  |     0U, // PATCHABLE_TAIL_CALL  | 
3643  | 0  |     0U, // PATCHABLE_EVENT_CALL  | 
3644  | 0  |     0U, // PATCHABLE_TYPED_EVENT_CALL  | 
3645  | 0  |     0U, // ICALL_BRANCH_FUNNEL  | 
3646  | 0  |     0U, // MEMBARRIER  | 
3647  | 0  |     0U, // JUMP_TABLE_DEBUG_INFO  | 
3648  | 0  |     0U, // G_ASSERT_SEXT  | 
3649  | 0  |     0U, // G_ASSERT_ZEXT  | 
3650  | 0  |     0U, // G_ASSERT_ALIGN  | 
3651  | 0  |     0U, // G_ADD  | 
3652  | 0  |     0U, // G_SUB  | 
3653  | 0  |     0U, // G_MUL  | 
3654  | 0  |     0U, // G_SDIV  | 
3655  | 0  |     0U, // G_UDIV  | 
3656  | 0  |     0U, // G_SREM  | 
3657  | 0  |     0U, // G_UREM  | 
3658  | 0  |     0U, // G_SDIVREM  | 
3659  | 0  |     0U, // G_UDIVREM  | 
3660  | 0  |     0U, // G_AND  | 
3661  | 0  |     0U, // G_OR  | 
3662  | 0  |     0U, // G_XOR  | 
3663  | 0  |     0U, // G_IMPLICIT_DEF  | 
3664  | 0  |     0U, // G_PHI  | 
3665  | 0  |     0U, // G_FRAME_INDEX  | 
3666  | 0  |     0U, // G_GLOBAL_VALUE  | 
3667  | 0  |     0U, // G_CONSTANT_POOL  | 
3668  | 0  |     0U, // G_EXTRACT  | 
3669  | 0  |     0U, // G_UNMERGE_VALUES  | 
3670  | 0  |     0U, // G_INSERT  | 
3671  | 0  |     0U, // G_MERGE_VALUES  | 
3672  | 0  |     0U, // G_BUILD_VECTOR  | 
3673  | 0  |     0U, // G_BUILD_VECTOR_TRUNC  | 
3674  | 0  |     0U, // G_CONCAT_VECTORS  | 
3675  | 0  |     0U, // G_PTRTOINT  | 
3676  | 0  |     0U, // G_INTTOPTR  | 
3677  | 0  |     0U, // G_BITCAST  | 
3678  | 0  |     0U, // G_FREEZE  | 
3679  | 0  |     0U, // G_CONSTANT_FOLD_BARRIER  | 
3680  | 0  |     0U, // G_INTRINSIC_FPTRUNC_ROUND  | 
3681  | 0  |     0U, // G_INTRINSIC_TRUNC  | 
3682  | 0  |     0U, // G_INTRINSIC_ROUND  | 
3683  | 0  |     0U, // G_INTRINSIC_LRINT  | 
3684  | 0  |     0U, // G_INTRINSIC_ROUNDEVEN  | 
3685  | 0  |     0U, // G_READCYCLECOUNTER  | 
3686  | 0  |     0U, // G_LOAD  | 
3687  | 0  |     0U, // G_SEXTLOAD  | 
3688  | 0  |     0U, // G_ZEXTLOAD  | 
3689  | 0  |     0U, // G_INDEXED_LOAD  | 
3690  | 0  |     0U, // G_INDEXED_SEXTLOAD  | 
3691  | 0  |     0U, // G_INDEXED_ZEXTLOAD  | 
3692  | 0  |     0U, // G_STORE  | 
3693  | 0  |     0U, // G_INDEXED_STORE  | 
3694  | 0  |     0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS  | 
3695  | 0  |     0U, // G_ATOMIC_CMPXCHG  | 
3696  | 0  |     0U, // G_ATOMICRMW_XCHG  | 
3697  | 0  |     0U, // G_ATOMICRMW_ADD  | 
3698  | 0  |     0U, // G_ATOMICRMW_SUB  | 
3699  | 0  |     0U, // G_ATOMICRMW_AND  | 
3700  | 0  |     0U, // G_ATOMICRMW_NAND  | 
3701  | 0  |     0U, // G_ATOMICRMW_OR  | 
3702  | 0  |     0U, // G_ATOMICRMW_XOR  | 
3703  | 0  |     0U, // G_ATOMICRMW_MAX  | 
3704  | 0  |     0U, // G_ATOMICRMW_MIN  | 
3705  | 0  |     0U, // G_ATOMICRMW_UMAX  | 
3706  | 0  |     0U, // G_ATOMICRMW_UMIN  | 
3707  | 0  |     0U, // G_ATOMICRMW_FADD  | 
3708  | 0  |     0U, // G_ATOMICRMW_FSUB  | 
3709  | 0  |     0U, // G_ATOMICRMW_FMAX  | 
3710  | 0  |     0U, // G_ATOMICRMW_FMIN  | 
3711  | 0  |     0U, // G_ATOMICRMW_UINC_WRAP  | 
3712  | 0  |     0U, // G_ATOMICRMW_UDEC_WRAP  | 
3713  | 0  |     0U, // G_FENCE  | 
3714  | 0  |     0U, // G_PREFETCH  | 
3715  | 0  |     0U, // G_BRCOND  | 
3716  | 0  |     0U, // G_BRINDIRECT  | 
3717  | 0  |     0U, // G_INVOKE_REGION_START  | 
3718  | 0  |     0U, // G_INTRINSIC  | 
3719  | 0  |     0U, // G_INTRINSIC_W_SIDE_EFFECTS  | 
3720  | 0  |     0U, // G_INTRINSIC_CONVERGENT  | 
3721  | 0  |     0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS  | 
3722  | 0  |     0U, // G_ANYEXT  | 
3723  | 0  |     0U, // G_TRUNC  | 
3724  | 0  |     0U, // G_CONSTANT  | 
3725  | 0  |     0U, // G_FCONSTANT  | 
3726  | 0  |     0U, // G_VASTART  | 
3727  | 0  |     0U, // G_VAARG  | 
3728  | 0  |     0U, // G_SEXT  | 
3729  | 0  |     0U, // G_SEXT_INREG  | 
3730  | 0  |     0U, // G_ZEXT  | 
3731  | 0  |     0U, // G_SHL  | 
3732  | 0  |     0U, // G_LSHR  | 
3733  | 0  |     0U, // G_ASHR  | 
3734  | 0  |     0U, // G_FSHL  | 
3735  | 0  |     0U, // G_FSHR  | 
3736  | 0  |     0U, // G_ROTR  | 
3737  | 0  |     0U, // G_ROTL  | 
3738  | 0  |     0U, // G_ICMP  | 
3739  | 0  |     0U, // G_FCMP  | 
3740  | 0  |     0U, // G_SELECT  | 
3741  | 0  |     0U, // G_UADDO  | 
3742  | 0  |     0U, // G_UADDE  | 
3743  | 0  |     0U, // G_USUBO  | 
3744  | 0  |     0U, // G_USUBE  | 
3745  | 0  |     0U, // G_SADDO  | 
3746  | 0  |     0U, // G_SADDE  | 
3747  | 0  |     0U, // G_SSUBO  | 
3748  | 0  |     0U, // G_SSUBE  | 
3749  | 0  |     0U, // G_UMULO  | 
3750  | 0  |     0U, // G_SMULO  | 
3751  | 0  |     0U, // G_UMULH  | 
3752  | 0  |     0U, // G_SMULH  | 
3753  | 0  |     0U, // G_UADDSAT  | 
3754  | 0  |     0U, // G_SADDSAT  | 
3755  | 0  |     0U, // G_USUBSAT  | 
3756  | 0  |     0U, // G_SSUBSAT  | 
3757  | 0  |     0U, // G_USHLSAT  | 
3758  | 0  |     0U, // G_SSHLSAT  | 
3759  | 0  |     0U, // G_SMULFIX  | 
3760  | 0  |     0U, // G_UMULFIX  | 
3761  | 0  |     0U, // G_SMULFIXSAT  | 
3762  | 0  |     0U, // G_UMULFIXSAT  | 
3763  | 0  |     0U, // G_SDIVFIX  | 
3764  | 0  |     0U, // G_UDIVFIX  | 
3765  | 0  |     0U, // G_SDIVFIXSAT  | 
3766  | 0  |     0U, // G_UDIVFIXSAT  | 
3767  | 0  |     0U, // G_FADD  | 
3768  | 0  |     0U, // G_FSUB  | 
3769  | 0  |     0U, // G_FMUL  | 
3770  | 0  |     0U, // G_FMA  | 
3771  | 0  |     0U, // G_FMAD  | 
3772  | 0  |     0U, // G_FDIV  | 
3773  | 0  |     0U, // G_FREM  | 
3774  | 0  |     0U, // G_FPOW  | 
3775  | 0  |     0U, // G_FPOWI  | 
3776  | 0  |     0U, // G_FEXP  | 
3777  | 0  |     0U, // G_FEXP2  | 
3778  | 0  |     0U, // G_FEXP10  | 
3779  | 0  |     0U, // G_FLOG  | 
3780  | 0  |     0U, // G_FLOG2  | 
3781  | 0  |     0U, // G_FLOG10  | 
3782  | 0  |     0U, // G_FLDEXP  | 
3783  | 0  |     0U, // G_FFREXP  | 
3784  | 0  |     0U, // G_FNEG  | 
3785  | 0  |     0U, // G_FPEXT  | 
3786  | 0  |     0U, // G_FPTRUNC  | 
3787  | 0  |     0U, // G_FPTOSI  | 
3788  | 0  |     0U, // G_FPTOUI  | 
3789  | 0  |     0U, // G_SITOFP  | 
3790  | 0  |     0U, // G_UITOFP  | 
3791  | 0  |     0U, // G_FABS  | 
3792  | 0  |     0U, // G_FCOPYSIGN  | 
3793  | 0  |     0U, // G_IS_FPCLASS  | 
3794  | 0  |     0U, // G_FCANONICALIZE  | 
3795  | 0  |     0U, // G_FMINNUM  | 
3796  | 0  |     0U, // G_FMAXNUM  | 
3797  | 0  |     0U, // G_FMINNUM_IEEE  | 
3798  | 0  |     0U, // G_FMAXNUM_IEEE  | 
3799  | 0  |     0U, // G_FMINIMUM  | 
3800  | 0  |     0U, // G_FMAXIMUM  | 
3801  | 0  |     0U, // G_GET_FPENV  | 
3802  | 0  |     0U, // G_SET_FPENV  | 
3803  | 0  |     0U, // G_RESET_FPENV  | 
3804  | 0  |     0U, // G_GET_FPMODE  | 
3805  | 0  |     0U, // G_SET_FPMODE  | 
3806  | 0  |     0U, // G_RESET_FPMODE  | 
3807  | 0  |     0U, // G_PTR_ADD  | 
3808  | 0  |     0U, // G_PTRMASK  | 
3809  | 0  |     0U, // G_SMIN  | 
3810  | 0  |     0U, // G_SMAX  | 
3811  | 0  |     0U, // G_UMIN  | 
3812  | 0  |     0U, // G_UMAX  | 
3813  | 0  |     0U, // G_ABS  | 
3814  | 0  |     0U, // G_LROUND  | 
3815  | 0  |     0U, // G_LLROUND  | 
3816  | 0  |     0U, // G_BR  | 
3817  | 0  |     0U, // G_BRJT  | 
3818  | 0  |     0U, // G_INSERT_VECTOR_ELT  | 
3819  | 0  |     0U, // G_EXTRACT_VECTOR_ELT  | 
3820  | 0  |     0U, // G_SHUFFLE_VECTOR  | 
3821  | 0  |     0U, // G_CTTZ  | 
3822  | 0  |     0U, // G_CTTZ_ZERO_UNDEF  | 
3823  | 0  |     0U, // G_CTLZ  | 
3824  | 0  |     0U, // G_CTLZ_ZERO_UNDEF  | 
3825  | 0  |     0U, // G_CTPOP  | 
3826  | 0  |     0U, // G_BSWAP  | 
3827  | 0  |     0U, // G_BITREVERSE  | 
3828  | 0  |     0U, // G_FCEIL  | 
3829  | 0  |     0U, // G_FCOS  | 
3830  | 0  |     0U, // G_FSIN  | 
3831  | 0  |     0U, // G_FSQRT  | 
3832  | 0  |     0U, // G_FFLOOR  | 
3833  | 0  |     0U, // G_FRINT  | 
3834  | 0  |     0U, // G_FNEARBYINT  | 
3835  | 0  |     0U, // G_ADDRSPACE_CAST  | 
3836  | 0  |     0U, // G_BLOCK_ADDR  | 
3837  | 0  |     0U, // G_JUMP_TABLE  | 
3838  | 0  |     0U, // G_DYN_STACKALLOC  | 
3839  | 0  |     0U, // G_STACKSAVE  | 
3840  | 0  |     0U, // G_STACKRESTORE  | 
3841  | 0  |     0U, // G_STRICT_FADD  | 
3842  | 0  |     0U, // G_STRICT_FSUB  | 
3843  | 0  |     0U, // G_STRICT_FMUL  | 
3844  | 0  |     0U, // G_STRICT_FDIV  | 
3845  | 0  |     0U, // G_STRICT_FREM  | 
3846  | 0  |     0U, // G_STRICT_FMA  | 
3847  | 0  |     0U, // G_STRICT_FSQRT  | 
3848  | 0  |     0U, // G_STRICT_FLDEXP  | 
3849  | 0  |     0U, // G_READ_REGISTER  | 
3850  | 0  |     0U, // G_WRITE_REGISTER  | 
3851  | 0  |     0U, // G_MEMCPY  | 
3852  | 0  |     0U, // G_MEMCPY_INLINE  | 
3853  | 0  |     0U, // G_MEMMOVE  | 
3854  | 0  |     0U, // G_MEMSET  | 
3855  | 0  |     0U, // G_BZERO  | 
3856  | 0  |     0U, // G_VECREDUCE_SEQ_FADD  | 
3857  | 0  |     0U, // G_VECREDUCE_SEQ_FMUL  | 
3858  | 0  |     0U, // G_VECREDUCE_FADD  | 
3859  | 0  |     0U, // G_VECREDUCE_FMUL  | 
3860  | 0  |     0U, // G_VECREDUCE_FMAX  | 
3861  | 0  |     0U, // G_VECREDUCE_FMIN  | 
3862  | 0  |     0U, // G_VECREDUCE_FMAXIMUM  | 
3863  | 0  |     0U, // G_VECREDUCE_FMINIMUM  | 
3864  | 0  |     0U, // G_VECREDUCE_ADD  | 
3865  | 0  |     0U, // G_VECREDUCE_MUL  | 
3866  | 0  |     0U, // G_VECREDUCE_AND  | 
3867  | 0  |     0U, // G_VECREDUCE_OR  | 
3868  | 0  |     0U, // G_VECREDUCE_XOR  | 
3869  | 0  |     0U, // G_VECREDUCE_SMAX  | 
3870  | 0  |     0U, // G_VECREDUCE_SMIN  | 
3871  | 0  |     0U, // G_VECREDUCE_UMAX  | 
3872  | 0  |     0U, // G_VECREDUCE_UMIN  | 
3873  | 0  |     0U, // G_SBFX  | 
3874  | 0  |     0U, // G_UBFX  | 
3875  | 0  |     0U, // ADJCALLSTACKDOWN  | 
3876  | 0  |     0U, // ADJCALLSTACKUP  | 
3877  | 0  |     0U, // PseudoAtomicLoadAdd32  | 
3878  | 0  |     0U, // PseudoAtomicLoadAnd32  | 
3879  | 0  |     0U, // PseudoAtomicLoadNand32  | 
3880  | 0  |     0U, // PseudoAtomicLoadNand64  | 
3881  | 0  |     0U, // PseudoAtomicLoadOr32  | 
3882  | 0  |     0U, // PseudoAtomicLoadSub32  | 
3883  | 0  |     0U, // PseudoAtomicLoadXor32  | 
3884  | 0  |     0U, // PseudoAtomicStoreD  | 
3885  | 0  |     0U, // PseudoAtomicStoreW  | 
3886  | 0  |     0U, // PseudoAtomicSwap32  | 
3887  | 0  |     0U, // PseudoBR  | 
3888  | 0  |     0U, // PseudoBRIND  | 
3889  | 0  |     0U, // PseudoB_TAIL  | 
3890  | 0  |     0U, // PseudoCALL  | 
3891  | 0  |     0U, // PseudoCALL36  | 
3892  | 0  |     0U, // PseudoCALLIndirect  | 
3893  | 0  |     0U, // PseudoCALL_LARGE  | 
3894  | 0  |     0U, // PseudoCALL_MEDIUM  | 
3895  | 0  |     0U, // PseudoCmpXchg32  | 
3896  | 0  |     0U, // PseudoCmpXchg64  | 
3897  | 0  |     0U, // PseudoCopyCFR  | 
3898  | 0  |     0U, // PseudoJIRL_CALL  | 
3899  | 0  |     0U, // PseudoJIRL_TAIL  | 
3900  | 0  |     1U, // PseudoLA_ABS  | 
3901  | 0  |     5U, // PseudoLA_ABS_LARGE  | 
3902  | 0  |     1U, // PseudoLA_GOT  | 
3903  | 0  |     17U,  // PseudoLA_GOT_LARGE  | 
3904  | 0  |     1U, // PseudoLA_PCREL  | 
3905  | 0  |     17U,  // PseudoLA_PCREL_LARGE  | 
3906  | 0  |     1U, // PseudoLA_TLS_GD  | 
3907  | 0  |     17U,  // PseudoLA_TLS_GD_LARGE  | 
3908  | 0  |     1U, // PseudoLA_TLS_IE  | 
3909  | 0  |     17U,  // PseudoLA_TLS_IE_LARGE  | 
3910  | 0  |     1U, // PseudoLA_TLS_LD  | 
3911  | 0  |     17U,  // PseudoLA_TLS_LD_LARGE  | 
3912  | 0  |     1U, // PseudoLA_TLS_LE  | 
3913  | 0  |     0U, // PseudoLD_CFR  | 
3914  | 0  |     1U, // PseudoLI_D  | 
3915  | 0  |     1U, // PseudoLI_W  | 
3916  | 0  |     0U, // PseudoMaskedAtomicLoadAdd32  | 
3917  | 0  |     0U, // PseudoMaskedAtomicLoadMax32  | 
3918  | 0  |     0U, // PseudoMaskedAtomicLoadMin32  | 
3919  | 0  |     0U, // PseudoMaskedAtomicLoadNand32  | 
3920  | 0  |     0U, // PseudoMaskedAtomicLoadSub32  | 
3921  | 0  |     0U, // PseudoMaskedAtomicLoadUMax32  | 
3922  | 0  |     0U, // PseudoMaskedAtomicLoadUMin32  | 
3923  | 0  |     0U, // PseudoMaskedAtomicSwap32  | 
3924  | 0  |     0U, // PseudoMaskedCmpXchg32  | 
3925  | 0  |     0U, // PseudoRET  | 
3926  | 0  |     0U, // PseudoST_CFR  | 
3927  | 0  |     0U, // PseudoTAIL  | 
3928  | 0  |     1U, // PseudoTAIL36  | 
3929  | 0  |     0U, // PseudoTAILIndirect  | 
3930  | 0  |     0U, // PseudoTAIL_LARGE  | 
3931  | 0  |     0U, // PseudoTAIL_MEDIUM  | 
3932  | 0  |     0U, // PseudoUNIMP  | 
3933  | 0  |     0U, // PseudoVBNZ  | 
3934  | 0  |     0U, // PseudoVBNZ_B  | 
3935  | 0  |     0U, // PseudoVBNZ_D  | 
3936  | 0  |     0U, // PseudoVBNZ_H  | 
3937  | 0  |     0U, // PseudoVBNZ_W  | 
3938  | 0  |     0U, // PseudoVBZ  | 
3939  | 0  |     0U, // PseudoVBZ_B  | 
3940  | 0  |     0U, // PseudoVBZ_D  | 
3941  | 0  |     0U, // PseudoVBZ_H  | 
3942  | 0  |     0U, // PseudoVBZ_W  | 
3943  | 0  |     1U, // PseudoVREPLI_B  | 
3944  | 0  |     1U, // PseudoVREPLI_D  | 
3945  | 0  |     1U, // PseudoVREPLI_H  | 
3946  | 0  |     1U, // PseudoVREPLI_W  | 
3947  | 0  |     0U, // PseudoXVBNZ  | 
3948  | 0  |     0U, // PseudoXVBNZ_B  | 
3949  | 0  |     0U, // PseudoXVBNZ_D  | 
3950  | 0  |     0U, // PseudoXVBNZ_H  | 
3951  | 0  |     0U, // PseudoXVBNZ_W  | 
3952  | 0  |     0U, // PseudoXVBZ  | 
3953  | 0  |     0U, // PseudoXVBZ_B  | 
3954  | 0  |     0U, // PseudoXVBZ_D  | 
3955  | 0  |     0U, // PseudoXVBZ_H  | 
3956  | 0  |     0U, // PseudoXVBZ_W  | 
3957  | 0  |     0U, // PseudoXVINSGR2VR_B  | 
3958  | 0  |     0U, // PseudoXVINSGR2VR_H  | 
3959  | 0  |     1U, // PseudoXVREPLI_B  | 
3960  | 0  |     1U, // PseudoXVREPLI_D  | 
3961  | 0  |     1U, // PseudoXVREPLI_H  | 
3962  | 0  |     1U, // PseudoXVREPLI_W  | 
3963  | 0  |     0U, // RDFCSR  | 
3964  | 0  |     0U, // WRFCSR  | 
3965  | 0  |     17U,  // ADC_B  | 
3966  | 0  |     17U,  // ADC_D  | 
3967  | 0  |     17U,  // ADC_H  | 
3968  | 0  |     17U,  // ADC_W  | 
3969  | 0  |     17U,  // ADDI_D  | 
3970  | 0  |     17U,  // ADDI_W  | 
3971  | 0  |     17U,  // ADDU12I_D  | 
3972  | 0  |     17U,  // ADDU12I_W  | 
3973  | 0  |     17U,  // ADDU16I_D  | 
3974  | 0  |     17U,  // ADD_D  | 
3975  | 0  |     17U,  // ADD_W  | 
3976  | 0  |     145U, // ALSL_D  | 
3977  | 0  |     145U, // ALSL_W  | 
3978  | 0  |     145U, // ALSL_WU  | 
3979  | 0  |     49U,  // AMADD_B  | 
3980  | 0  |     49U,  // AMADD_D  | 
3981  | 0  |     49U,  // AMADD_H  | 
3982  | 0  |     49U,  // AMADD_W  | 
3983  | 0  |     49U,  // AMADD__DB_B  | 
3984  | 0  |     49U,  // AMADD__DB_D  | 
3985  | 0  |     49U,  // AMADD__DB_H  | 
3986  | 0  |     49U,  // AMADD__DB_W  | 
3987  | 0  |     49U,  // AMAND_D  | 
3988  | 0  |     49U,  // AMAND_W  | 
3989  | 0  |     49U,  // AMAND__DB_D  | 
3990  | 0  |     49U,  // AMAND__DB_W  | 
3991  | 0  |     49U,  // AMCAS_B  | 
3992  | 0  |     49U,  // AMCAS_D  | 
3993  | 0  |     49U,  // AMCAS_H  | 
3994  | 0  |     49U,  // AMCAS_W  | 
3995  | 0  |     49U,  // AMCAS__DB_B  | 
3996  | 0  |     49U,  // AMCAS__DB_D  | 
3997  | 0  |     49U,  // AMCAS__DB_H  | 
3998  | 0  |     49U,  // AMCAS__DB_W  | 
3999  | 0  |     49U,  // AMMAX_D  | 
4000  | 0  |     49U,  // AMMAX_DU  | 
4001  | 0  |     49U,  // AMMAX_W  | 
4002  | 0  |     49U,  // AMMAX_WU  | 
4003  | 0  |     49U,  // AMMAX__DB_D  | 
4004  | 0  |     49U,  // AMMAX__DB_DU  | 
4005  | 0  |     49U,  // AMMAX__DB_W  | 
4006  | 0  |     49U,  // AMMAX__DB_WU  | 
4007  | 0  |     49U,  // AMMIN_D  | 
4008  | 0  |     49U,  // AMMIN_DU  | 
4009  | 0  |     49U,  // AMMIN_W  | 
4010  | 0  |     49U,  // AMMIN_WU  | 
4011  | 0  |     49U,  // AMMIN__DB_D  | 
4012  | 0  |     49U,  // AMMIN__DB_DU  | 
4013  | 0  |     49U,  // AMMIN__DB_W  | 
4014  | 0  |     49U,  // AMMIN__DB_WU  | 
4015  | 0  |     49U,  // AMOR_D  | 
4016  | 0  |     49U,  // AMOR_W  | 
4017  | 0  |     49U,  // AMOR__DB_D  | 
4018  | 0  |     49U,  // AMOR__DB_W  | 
4019  | 0  |     49U,  // AMSWAP_B  | 
4020  | 0  |     49U,  // AMSWAP_D  | 
4021  | 0  |     49U,  // AMSWAP_H  | 
4022  | 0  |     49U,  // AMSWAP_W  | 
4023  | 0  |     49U,  // AMSWAP__DB_B  | 
4024  | 0  |     49U,  // AMSWAP__DB_D  | 
4025  | 0  |     49U,  // AMSWAP__DB_H  | 
4026  | 0  |     49U,  // AMSWAP__DB_W  | 
4027  | 0  |     49U,  // AMXOR_D  | 
4028  | 0  |     49U,  // AMXOR_W  | 
4029  | 0  |     49U,  // AMXOR__DB_D  | 
4030  | 0  |     49U,  // AMXOR__DB_W  | 
4031  | 0  |     17U,  // AND  | 
4032  | 0  |     17U,  // ANDI  | 
4033  | 0  |     17U,  // ANDN  | 
4034  | 0  |     17U,  // ARMADC_W  | 
4035  | 0  |     17U,  // ARMADD_W  | 
4036  | 0  |     17U,  // ARMAND_W  | 
4037  | 0  |     1U, // ARMMFFLAG  | 
4038  | 0  |     17U,  // ARMMOVE  | 
4039  | 0  |     1U, // ARMMOV_D  | 
4040  | 0  |     1U, // ARMMOV_W  | 
4041  | 0  |     1U, // ARMMTFLAG  | 
4042  | 0  |     1U, // ARMNOT_W  | 
4043  | 0  |     17U,  // ARMOR_W  | 
4044  | 0  |     17U,  // ARMROTRI_W  | 
4045  | 0  |     17U,  // ARMROTR_W  | 
4046  | 0  |     1U, // ARMRRX_W  | 
4047  | 0  |     17U,  // ARMSBC_W  | 
4048  | 0  |     17U,  // ARMSLLI_W  | 
4049  | 0  |     17U,  // ARMSLL_W  | 
4050  | 0  |     17U,  // ARMSRAI_W  | 
4051  | 0  |     17U,  // ARMSRA_W  | 
4052  | 0  |     17U,  // ARMSRLI_W  | 
4053  | 0  |     17U,  // ARMSRL_W  | 
4054  | 0  |     17U,  // ARMSUB_W  | 
4055  | 0  |     17U,  // ARMXOR_W  | 
4056  | 0  |     1U, // ASRTGT_D  | 
4057  | 0  |     1U, // ASRTLE_D  | 
4058  | 0  |     0U, // B  | 
4059  | 0  |     1U, // BCEQZ  | 
4060  | 0  |     1U, // BCNEZ  | 
4061  | 0  |     17U,  // BEQ  | 
4062  | 0  |     1U, // BEQZ  | 
4063  | 0  |     17U,  // BGE  | 
4064  | 0  |     17U,  // BGEU  | 
4065  | 0  |     1U, // BITREV_4B  | 
4066  | 0  |     1U, // BITREV_8B  | 
4067  | 0  |     1U, // BITREV_D  | 
4068  | 0  |     1U, // BITREV_W  | 
4069  | 0  |     0U, // BL  | 
4070  | 0  |     17U,  // BLT  | 
4071  | 0  |     17U,  // BLTU  | 
4072  | 0  |     17U,  // BNE  | 
4073  | 0  |     1U, // BNEZ  | 
4074  | 0  |     0U, // BREAK  | 
4075  | 0  |     89U,  // BSTRINS_D  | 
4076  | 0  |     89U,  // BSTRINS_W  | 
4077  | 0  |     145U, // BSTRPICK_D  | 
4078  | 0  |     145U, // BSTRPICK_W  | 
4079  | 0  |     145U, // BYTEPICK_D  | 
4080  | 0  |     145U, // BYTEPICK_W  | 
4081  | 0  |     17U,  // CACOP  | 
4082  | 0  |     1U, // CLO_D  | 
4083  | 0  |     1U, // CLO_W  | 
4084  | 0  |     1U, // CLZ_D  | 
4085  | 0  |     1U, // CLZ_W  | 
4086  | 0  |     1U, // CPUCFG  | 
4087  | 0  |     17U,  // CRCC_W_B_W  | 
4088  | 0  |     17U,  // CRCC_W_D_W  | 
4089  | 0  |     17U,  // CRCC_W_H_W  | 
4090  | 0  |     17U,  // CRCC_W_W_W  | 
4091  | 0  |     17U,  // CRC_W_B_W  | 
4092  | 0  |     17U,  // CRC_W_D_W  | 
4093  | 0  |     17U,  // CRC_W_H_W  | 
4094  | 0  |     17U,  // CRC_W_W_W  | 
4095  | 0  |     1U, // CSRRD  | 
4096  | 0  |     0U, // CSRWR  | 
4097  | 0  |     9U, // CSRXCHG  | 
4098  | 0  |     1U, // CTO_D  | 
4099  | 0  |     1U, // CTO_W  | 
4100  | 0  |     1U, // CTZ_D  | 
4101  | 0  |     1U, // CTZ_W  | 
4102  | 0  |     0U, // DBAR  | 
4103  | 0  |     0U, // DBCL  | 
4104  | 0  |     17U,  // DIV_D  | 
4105  | 0  |     17U,  // DIV_DU  | 
4106  | 0  |     17U,  // DIV_W  | 
4107  | 0  |     17U,  // DIV_WU  | 
4108  | 0  |     0U, // ERTN  | 
4109  | 0  |     1U, // EXT_W_B  | 
4110  | 0  |     1U, // EXT_W_H  | 
4111  | 0  |     1U, // FABS_D  | 
4112  | 0  |     1U, // FABS_S  | 
4113  | 0  |     17U,  // FADD_D  | 
4114  | 0  |     17U,  // FADD_S  | 
4115  | 0  |     1U, // FCLASS_D  | 
4116  | 0  |     1U, // FCLASS_S  | 
4117  | 0  |     17U,  // FCMP_CAF_D  | 
4118  | 0  |     17U,  // FCMP_CAF_S  | 
4119  | 0  |     17U,  // FCMP_CEQ_D  | 
4120  | 0  |     17U,  // FCMP_CEQ_S  | 
4121  | 0  |     17U,  // FCMP_CLE_D  | 
4122  | 0  |     17U,  // FCMP_CLE_S  | 
4123  | 0  |     17U,  // FCMP_CLT_D  | 
4124  | 0  |     17U,  // FCMP_CLT_S  | 
4125  | 0  |     17U,  // FCMP_CNE_D  | 
4126  | 0  |     17U,  // FCMP_CNE_S  | 
4127  | 0  |     17U,  // FCMP_COR_D  | 
4128  | 0  |     17U,  // FCMP_COR_S  | 
4129  | 0  |     17U,  // FCMP_CUEQ_D  | 
4130  | 0  |     17U,  // FCMP_CUEQ_S  | 
4131  | 0  |     17U,  // FCMP_CULE_D  | 
4132  | 0  |     17U,  // FCMP_CULE_S  | 
4133  | 0  |     17U,  // FCMP_CULT_D  | 
4134  | 0  |     17U,  // FCMP_CULT_S  | 
4135  | 0  |     17U,  // FCMP_CUNE_D  | 
4136  | 0  |     17U,  // FCMP_CUNE_S  | 
4137  | 0  |     17U,  // FCMP_CUN_D  | 
4138  | 0  |     17U,  // FCMP_CUN_S  | 
4139  | 0  |     17U,  // FCMP_SAF_D  | 
4140  | 0  |     17U,  // FCMP_SAF_S  | 
4141  | 0  |     17U,  // FCMP_SEQ_D  | 
4142  | 0  |     17U,  // FCMP_SEQ_S  | 
4143  | 0  |     17U,  // FCMP_SLE_D  | 
4144  | 0  |     17U,  // FCMP_SLE_S  | 
4145  | 0  |     17U,  // FCMP_SLT_D  | 
4146  | 0  |     17U,  // FCMP_SLT_S  | 
4147  | 0  |     17U,  // FCMP_SNE_D  | 
4148  | 0  |     17U,  // FCMP_SNE_S  | 
4149  | 0  |     17U,  // FCMP_SOR_D  | 
4150  | 0  |     17U,  // FCMP_SOR_S  | 
4151  | 0  |     17U,  // FCMP_SUEQ_D  | 
4152  | 0  |     17U,  // FCMP_SUEQ_S  | 
4153  | 0  |     17U,  // FCMP_SULE_D  | 
4154  | 0  |     17U,  // FCMP_SULE_S  | 
4155  | 0  |     17U,  // FCMP_SULT_D  | 
4156  | 0  |     17U,  // FCMP_SULT_S  | 
4157  | 0  |     17U,  // FCMP_SUNE_D  | 
4158  | 0  |     17U,  // FCMP_SUNE_S  | 
4159  | 0  |     17U,  // FCMP_SUN_D  | 
4160  | 0  |     17U,  // FCMP_SUN_S  | 
4161  | 0  |     17U,  // FCOPYSIGN_D  | 
4162  | 0  |     17U,  // FCOPYSIGN_S  | 
4163  | 0  |     17U,  // FCVT_D_LD  | 
4164  | 0  |     1U, // FCVT_D_S  | 
4165  | 0  |     1U, // FCVT_LD_D  | 
4166  | 0  |     1U, // FCVT_S_D  | 
4167  | 0  |     1U, // FCVT_UD_D  | 
4168  | 0  |     17U,  // FDIV_D  | 
4169  | 0  |     17U,  // FDIV_S  | 
4170  | 0  |     1U, // FFINT_D_L  | 
4171  | 0  |     1U, // FFINT_D_W  | 
4172  | 0  |     1U, // FFINT_S_L  | 
4173  | 0  |     1U, // FFINT_S_W  | 
4174  | 0  |     17U,  // FLDGT_D  | 
4175  | 0  |     17U,  // FLDGT_S  | 
4176  | 0  |     17U,  // FLDLE_D  | 
4177  | 0  |     17U,  // FLDLE_S  | 
4178  | 0  |     17U,  // FLDX_D  | 
4179  | 0  |     17U,  // FLDX_S  | 
4180  | 0  |     17U,  // FLD_D  | 
4181  | 0  |     17U,  // FLD_S  | 
4182  | 0  |     1U, // FLOGB_D  | 
4183  | 0  |     1U, // FLOGB_S  | 
4184  | 0  |     145U, // FMADD_D  | 
4185  | 0  |     145U, // FMADD_S  | 
4186  | 0  |     17U,  // FMAXA_D  | 
4187  | 0  |     17U,  // FMAXA_S  | 
4188  | 0  |     17U,  // FMAX_D  | 
4189  | 0  |     17U,  // FMAX_S  | 
4190  | 0  |     17U,  // FMINA_D  | 
4191  | 0  |     17U,  // FMINA_S  | 
4192  | 0  |     17U,  // FMIN_D  | 
4193  | 0  |     17U,  // FMIN_S  | 
4194  | 0  |     1U, // FMOV_D  | 
4195  | 0  |     1U, // FMOV_S  | 
4196  | 0  |     145U, // FMSUB_D  | 
4197  | 0  |     145U, // FMSUB_S  | 
4198  | 0  |     17U,  // FMUL_D  | 
4199  | 0  |     17U,  // FMUL_S  | 
4200  | 0  |     1U, // FNEG_D  | 
4201  | 0  |     1U, // FNEG_S  | 
4202  | 0  |     145U, // FNMADD_D  | 
4203  | 0  |     145U, // FNMADD_S  | 
4204  | 0  |     145U, // FNMSUB_D  | 
4205  | 0  |     145U, // FNMSUB_S  | 
4206  | 0  |     1U, // FRECIPE_D  | 
4207  | 0  |     1U, // FRECIPE_S  | 
4208  | 0  |     1U, // FRECIP_D  | 
4209  | 0  |     1U, // FRECIP_S  | 
4210  | 0  |     1U, // FRINT_D  | 
4211  | 0  |     1U, // FRINT_S  | 
4212  | 0  |     1U, // FRSQRTE_D  | 
4213  | 0  |     1U, // FRSQRTE_S  | 
4214  | 0  |     1U, // FRSQRT_D  | 
4215  | 0  |     1U, // FRSQRT_S  | 
4216  | 0  |     17U,  // FSCALEB_D  | 
4217  | 0  |     17U,  // FSCALEB_S  | 
4218  | 0  |     145U, // FSEL_xD  | 
4219  | 0  |     145U, // FSEL_xS  | 
4220  | 0  |     1U, // FSQRT_D  | 
4221  | 0  |     1U, // FSQRT_S  | 
4222  | 0  |     17U,  // FSTGT_D  | 
4223  | 0  |     17U,  // FSTGT_S  | 
4224  | 0  |     17U,  // FSTLE_D  | 
4225  | 0  |     17U,  // FSTLE_S  | 
4226  | 0  |     17U,  // FSTX_D  | 
4227  | 0  |     17U,  // FSTX_S  | 
4228  | 0  |     17U,  // FST_D  | 
4229  | 0  |     17U,  // FST_S  | 
4230  | 0  |     17U,  // FSUB_D  | 
4231  | 0  |     17U,  // FSUB_S  | 
4232  | 0  |     1U, // FTINTRM_L_D  | 
4233  | 0  |     1U, // FTINTRM_L_S  | 
4234  | 0  |     1U, // FTINTRM_W_D  | 
4235  | 0  |     1U, // FTINTRM_W_S  | 
4236  | 0  |     1U, // FTINTRNE_L_D  | 
4237  | 0  |     1U, // FTINTRNE_L_S  | 
4238  | 0  |     1U, // FTINTRNE_W_D  | 
4239  | 0  |     1U, // FTINTRNE_W_S  | 
4240  | 0  |     1U, // FTINTRP_L_D  | 
4241  | 0  |     1U, // FTINTRP_L_S  | 
4242  | 0  |     1U, // FTINTRP_W_D  | 
4243  | 0  |     1U, // FTINTRP_W_S  | 
4244  | 0  |     1U, // FTINTRZ_L_D  | 
4245  | 0  |     1U, // FTINTRZ_L_S  | 
4246  | 0  |     1U, // FTINTRZ_W_D  | 
4247  | 0  |     1U, // FTINTRZ_W_S  | 
4248  | 0  |     1U, // FTINT_L_D  | 
4249  | 0  |     1U, // FTINT_L_S  | 
4250  | 0  |     1U, // FTINT_W_D  | 
4251  | 0  |     1U, // FTINT_W_S  | 
4252  | 0  |     1U, // GCSRRD  | 
4253  | 0  |     0U, // GCSRWR  | 
4254  | 0  |     9U, // GCSRXCHG  | 
4255  | 0  |     0U, // GTLBFLUSH  | 
4256  | 0  |     0U, // HVCL  | 
4257  | 0  |     0U, // IBAR  | 
4258  | 0  |     0U, // IDLE  | 
4259  | 0  |     0U, // INVTLB  | 
4260  | 0  |     1U, // IOCSRRD_B  | 
4261  | 0  |     1U, // IOCSRRD_D  | 
4262  | 0  |     1U, // IOCSRRD_H  | 
4263  | 0  |     1U, // IOCSRRD_W  | 
4264  | 0  |     1U, // IOCSRWR_B  | 
4265  | 0  |     1U, // IOCSRWR_D  | 
4266  | 0  |     1U, // IOCSRWR_H  | 
4267  | 0  |     1U, // IOCSRWR_W  | 
4268  | 0  |     17U,  // JIRL  | 
4269  | 0  |     0U, // JISCR0  | 
4270  | 0  |     0U, // JISCR1  | 
4271  | 0  |     17U,  // LDDIR  | 
4272  | 0  |     17U,  // LDGT_B  | 
4273  | 0  |     17U,  // LDGT_D  | 
4274  | 0  |     17U,  // LDGT_H  | 
4275  | 0  |     17U,  // LDGT_W  | 
4276  | 0  |     17U,  // LDLE_B  | 
4277  | 0  |     17U,  // LDLE_D  | 
4278  | 0  |     17U,  // LDLE_H  | 
4279  | 0  |     17U,  // LDLE_W  | 
4280  | 0  |     17U,  // LDL_D  | 
4281  | 0  |     17U,  // LDL_W  | 
4282  | 0  |     1U, // LDPTE  | 
4283  | 0  |     17U,  // LDPTR_D  | 
4284  | 0  |     17U,  // LDPTR_W  | 
4285  | 0  |     17U,  // LDR_D  | 
4286  | 0  |     17U,  // LDR_W  | 
4287  | 0  |     17U,  // LDX_B  | 
4288  | 0  |     17U,  // LDX_BU  | 
4289  | 0  |     17U,  // LDX_D  | 
4290  | 0  |     17U,  // LDX_H  | 
4291  | 0  |     17U,  // LDX_HU  | 
4292  | 0  |     17U,  // LDX_W  | 
4293  | 0  |     17U,  // LDX_WU  | 
4294  | 0  |     17U,  // LD_B  | 
4295  | 0  |     17U,  // LD_BU  | 
4296  | 0  |     17U,  // LD_D  | 
4297  | 0  |     17U,  // LD_H  | 
4298  | 0  |     17U,  // LD_HU  | 
4299  | 0  |     17U,  // LD_W  | 
4300  | 0  |     17U,  // LD_WU  | 
4301  | 0  |     1U, // LLACQ_D  | 
4302  | 0  |     1U, // LLACQ_W  | 
4303  | 0  |     17U,  // LL_D  | 
4304  | 0  |     17U,  // LL_W  | 
4305  | 0  |     1U, // LU12I_W  | 
4306  | 0  |     0U, // LU32I_D  | 
4307  | 0  |     17U,  // LU52I_D  | 
4308  | 0  |     17U,  // MASKEQZ  | 
4309  | 0  |     17U,  // MASKNEZ  | 
4310  | 0  |     17U,  // MOD_D  | 
4311  | 0  |     17U,  // MOD_DU  | 
4312  | 0  |     17U,  // MOD_W  | 
4313  | 0  |     17U,  // MOD_WU  | 
4314  | 0  |     1U, // MOVCF2FR_xS  | 
4315  | 0  |     1U, // MOVCF2GR  | 
4316  | 0  |     1U, // MOVFCSR2GR  | 
4317  | 0  |     1U, // MOVFR2CF_xS  | 
4318  | 0  |     1U, // MOVFR2GR_D  | 
4319  | 0  |     1U, // MOVFR2GR_S  | 
4320  | 0  |     1U, // MOVFR2GR_S_64  | 
4321  | 0  |     1U, // MOVFRH2GR_S  | 
4322  | 0  |     1U, // MOVGR2CF  | 
4323  | 0  |     1U, // MOVGR2FCSR  | 
4324  | 0  |     0U, // MOVGR2FRH_W  | 
4325  | 0  |     1U, // MOVGR2FR_D  | 
4326  | 0  |     1U, // MOVGR2FR_W  | 
4327  | 0  |     1U, // MOVGR2FR_W_64  | 
4328  | 0  |     1U, // MOVGR2SCR  | 
4329  | 0  |     1U, // MOVSCR2GR  | 
4330  | 0  |     17U,  // MULH_D  | 
4331  | 0  |     17U,  // MULH_DU  | 
4332  | 0  |     17U,  // MULH_W  | 
4333  | 0  |     17U,  // MULH_WU  | 
4334  | 0  |     17U,  // MULW_D_W  | 
4335  | 0  |     17U,  // MULW_D_WU  | 
4336  | 0  |     17U,  // MUL_D  | 
4337  | 0  |     17U,  // MUL_W  | 
4338  | 0  |     17U,  // NOR  | 
4339  | 0  |     17U,  // OR  | 
4340  | 0  |     17U,  // ORI  | 
4341  | 0  |     17U,  // ORN  | 
4342  | 0  |     1U, // PCADDI  | 
4343  | 0  |     1U, // PCADDU12I  | 
4344  | 0  |     1U, // PCADDU18I  | 
4345  | 0  |     1U, // PCALAU12I  | 
4346  | 0  |     17U,  // PRELD  | 
4347  | 0  |     17U,  // PRELDX  | 
4348  | 0  |     17U,  // RCRI_B  | 
4349  | 0  |     17U,  // RCRI_D  | 
4350  | 0  |     17U,  // RCRI_H  | 
4351  | 0  |     17U,  // RCRI_W  | 
4352  | 0  |     17U,  // RCR_B  | 
4353  | 0  |     17U,  // RCR_D  | 
4354  | 0  |     17U,  // RCR_H  | 
4355  | 0  |     17U,  // RCR_W  | 
4356  | 0  |     1U, // RDTIMEH_W  | 
4357  | 0  |     1U, // RDTIMEL_W  | 
4358  | 0  |     1U, // RDTIME_D  | 
4359  | 0  |     1U, // REVB_2H  | 
4360  | 0  |     1U, // REVB_2W  | 
4361  | 0  |     1U, // REVB_4H  | 
4362  | 0  |     1U, // REVB_D  | 
4363  | 0  |     1U, // REVH_2W  | 
4364  | 0  |     1U, // REVH_D  | 
4365  | 0  |     17U,  // ROTRI_B  | 
4366  | 0  |     17U,  // ROTRI_D  | 
4367  | 0  |     17U,  // ROTRI_H  | 
4368  | 0  |     17U,  // ROTRI_W  | 
4369  | 0  |     17U,  // ROTR_B  | 
4370  | 0  |     17U,  // ROTR_D  | 
4371  | 0  |     17U,  // ROTR_H  | 
4372  | 0  |     17U,  // ROTR_W  | 
4373  | 0  |     17U,  // SBC_B  | 
4374  | 0  |     17U,  // SBC_D  | 
4375  | 0  |     17U,  // SBC_H  | 
4376  | 0  |     17U,  // SBC_W  | 
4377  | 0  |     0U, // SCREL_D  | 
4378  | 0  |     0U, // SCREL_W  | 
4379  | 0  |     9U, // SC_D  | 
4380  | 0  |     9U, // SC_Q  | 
4381  | 0  |     9U, // SC_W  | 
4382  | 0  |     1U, // SETARMJ  | 
4383  | 0  |     1U, // SETX86J  | 
4384  | 0  |     1U, // SETX86LOOPE  | 
4385  | 0  |     1U, // SETX86LOOPNE  | 
4386  | 0  |     2U, // SET_CFR_FALSE  | 
4387  | 0  |     2U, // SET_CFR_TRUE  | 
4388  | 0  |     17U,  // SLLI_D  | 
4389  | 0  |     17U,  // SLLI_W  | 
4390  | 0  |     17U,  // SLL_D  | 
4391  | 0  |     17U,  // SLL_W  | 
4392  | 0  |     17U,  // SLT  | 
4393  | 0  |     17U,  // SLTI  | 
4394  | 0  |     17U,  // SLTU  | 
4395  | 0  |     17U,  // SLTUI  | 
4396  | 0  |     17U,  // SRAI_D  | 
4397  | 0  |     17U,  // SRAI_W  | 
4398  | 0  |     17U,  // SRA_D  | 
4399  | 0  |     17U,  // SRA_W  | 
4400  | 0  |     17U,  // SRLI_D  | 
4401  | 0  |     17U,  // SRLI_W  | 
4402  | 0  |     17U,  // SRL_D  | 
4403  | 0  |     17U,  // SRL_W  | 
4404  | 0  |     17U,  // STGT_B  | 
4405  | 0  |     17U,  // STGT_D  | 
4406  | 0  |     17U,  // STGT_H  | 
4407  | 0  |     17U,  // STGT_W  | 
4408  | 0  |     17U,  // STLE_B  | 
4409  | 0  |     17U,  // STLE_D  | 
4410  | 0  |     17U,  // STLE_H  | 
4411  | 0  |     17U,  // STLE_W  | 
4412  | 0  |     17U,  // STL_D  | 
4413  | 0  |     17U,  // STL_W  | 
4414  | 0  |     17U,  // STPTR_D  | 
4415  | 0  |     17U,  // STPTR_W  | 
4416  | 0  |     17U,  // STR_D  | 
4417  | 0  |     17U,  // STR_W  | 
4418  | 0  |     17U,  // STX_B  | 
4419  | 0  |     17U,  // STX_D  | 
4420  | 0  |     17U,  // STX_H  | 
4421  | 0  |     17U,  // STX_W  | 
4422  | 0  |     17U,  // ST_B  | 
4423  | 0  |     17U,  // ST_D  | 
4424  | 0  |     17U,  // ST_H  | 
4425  | 0  |     17U,  // ST_W  | 
4426  | 0  |     17U,  // SUB_D  | 
4427  | 0  |     17U,  // SUB_W  | 
4428  | 0  |     0U, // SYSCALL  | 
4429  | 0  |     0U, // TLBCLR  | 
4430  | 0  |     0U, // TLBFILL  | 
4431  | 0  |     0U, // TLBFLUSH  | 
4432  | 0  |     0U, // TLBRD  | 
4433  | 0  |     0U, // TLBSRCH  | 
4434  | 0  |     0U, // TLBWR  | 
4435  | 0  |     17U,  // VABSD_B  | 
4436  | 0  |     17U,  // VABSD_BU  | 
4437  | 0  |     17U,  // VABSD_D  | 
4438  | 0  |     17U,  // VABSD_DU  | 
4439  | 0  |     17U,  // VABSD_H  | 
4440  | 0  |     17U,  // VABSD_HU  | 
4441  | 0  |     17U,  // VABSD_W  | 
4442  | 0  |     17U,  // VABSD_WU  | 
4443  | 0  |     17U,  // VADDA_B  | 
4444  | 0  |     17U,  // VADDA_D  | 
4445  | 0  |     17U,  // VADDA_H  | 
4446  | 0  |     17U,  // VADDA_W  | 
4447  | 0  |     17U,  // VADDI_BU  | 
4448  | 0  |     17U,  // VADDI_DU  | 
4449  | 0  |     17U,  // VADDI_HU  | 
4450  | 0  |     17U,  // VADDI_WU  | 
4451  | 0  |     17U,  // VADDWEV_D_W  | 
4452  | 0  |     17U,  // VADDWEV_D_WU  | 
4453  | 0  |     17U,  // VADDWEV_D_WU_W  | 
4454  | 0  |     17U,  // VADDWEV_H_B  | 
4455  | 0  |     17U,  // VADDWEV_H_BU  | 
4456  | 0  |     17U,  // VADDWEV_H_BU_B  | 
4457  | 0  |     17U,  // VADDWEV_Q_D  | 
4458  | 0  |     17U,  // VADDWEV_Q_DU  | 
4459  | 0  |     17U,  // VADDWEV_Q_DU_D  | 
4460  | 0  |     17U,  // VADDWEV_W_H  | 
4461  | 0  |     17U,  // VADDWEV_W_HU  | 
4462  | 0  |     17U,  // VADDWEV_W_HU_H  | 
4463  | 0  |     17U,  // VADDWOD_D_W  | 
4464  | 0  |     17U,  // VADDWOD_D_WU  | 
4465  | 0  |     17U,  // VADDWOD_D_WU_W  | 
4466  | 0  |     17U,  // VADDWOD_H_B  | 
4467  | 0  |     17U,  // VADDWOD_H_BU  | 
4468  | 0  |     17U,  // VADDWOD_H_BU_B  | 
4469  | 0  |     17U,  // VADDWOD_Q_D  | 
4470  | 0  |     17U,  // VADDWOD_Q_DU  | 
4471  | 0  |     17U,  // VADDWOD_Q_DU_D  | 
4472  | 0  |     17U,  // VADDWOD_W_H  | 
4473  | 0  |     17U,  // VADDWOD_W_HU  | 
4474  | 0  |     17U,  // VADDWOD_W_HU_H  | 
4475  | 0  |     17U,  // VADD_B  | 
4476  | 0  |     17U,  // VADD_D  | 
4477  | 0  |     17U,  // VADD_H  | 
4478  | 0  |     17U,  // VADD_Q  | 
4479  | 0  |     17U,  // VADD_W  | 
4480  | 0  |     17U,  // VANDI_B  | 
4481  | 0  |     17U,  // VANDN_V  | 
4482  | 0  |     17U,  // VAND_V  | 
4483  | 0  |     17U,  // VAVGR_B  | 
4484  | 0  |     17U,  // VAVGR_BU  | 
4485  | 0  |     17U,  // VAVGR_D  | 
4486  | 0  |     17U,  // VAVGR_DU  | 
4487  | 0  |     17U,  // VAVGR_H  | 
4488  | 0  |     17U,  // VAVGR_HU  | 
4489  | 0  |     17U,  // VAVGR_W  | 
4490  | 0  |     17U,  // VAVGR_WU  | 
4491  | 0  |     17U,  // VAVG_B  | 
4492  | 0  |     17U,  // VAVG_BU  | 
4493  | 0  |     17U,  // VAVG_D  | 
4494  | 0  |     17U,  // VAVG_DU  | 
4495  | 0  |     17U,  // VAVG_H  | 
4496  | 0  |     17U,  // VAVG_HU  | 
4497  | 0  |     17U,  // VAVG_W  | 
4498  | 0  |     17U,  // VAVG_WU  | 
4499  | 0  |     17U,  // VBITCLRI_B  | 
4500  | 0  |     17U,  // VBITCLRI_D  | 
4501  | 0  |     17U,  // VBITCLRI_H  | 
4502  | 0  |     17U,  // VBITCLRI_W  | 
4503  | 0  |     17U,  // VBITCLR_B  | 
4504  | 0  |     17U,  // VBITCLR_D  | 
4505  | 0  |     17U,  // VBITCLR_H  | 
4506  | 0  |     17U,  // VBITCLR_W  | 
4507  | 0  |     17U,  // VBITREVI_B  | 
4508  | 0  |     17U,  // VBITREVI_D  | 
4509  | 0  |     17U,  // VBITREVI_H  | 
4510  | 0  |     17U,  // VBITREVI_W  | 
4511  | 0  |     17U,  // VBITREV_B  | 
4512  | 0  |     17U,  // VBITREV_D  | 
4513  | 0  |     17U,  // VBITREV_H  | 
4514  | 0  |     17U,  // VBITREV_W  | 
4515  | 0  |     9U, // VBITSELI_B  | 
4516  | 0  |     145U, // VBITSEL_V  | 
4517  | 0  |     17U,  // VBITSETI_B  | 
4518  | 0  |     17U,  // VBITSETI_D  | 
4519  | 0  |     17U,  // VBITSETI_H  | 
4520  | 0  |     17U,  // VBITSETI_W  | 
4521  | 0  |     17U,  // VBITSET_B  | 
4522  | 0  |     17U,  // VBITSET_D  | 
4523  | 0  |     17U,  // VBITSET_H  | 
4524  | 0  |     17U,  // VBITSET_W  | 
4525  | 0  |     17U,  // VBSLL_V  | 
4526  | 0  |     17U,  // VBSRL_V  | 
4527  | 0  |     1U, // VCLO_B  | 
4528  | 0  |     1U, // VCLO_D  | 
4529  | 0  |     1U, // VCLO_H  | 
4530  | 0  |     1U, // VCLO_W  | 
4531  | 0  |     1U, // VCLZ_B  | 
4532  | 0  |     1U, // VCLZ_D  | 
4533  | 0  |     1U, // VCLZ_H  | 
4534  | 0  |     1U, // VCLZ_W  | 
4535  | 0  |     17U,  // VDIV_B  | 
4536  | 0  |     17U,  // VDIV_BU  | 
4537  | 0  |     17U,  // VDIV_D  | 
4538  | 0  |     17U,  // VDIV_DU  | 
4539  | 0  |     17U,  // VDIV_H  | 
4540  | 0  |     17U,  // VDIV_HU  | 
4541  | 0  |     17U,  // VDIV_W  | 
4542  | 0  |     17U,  // VDIV_WU  | 
4543  | 0  |     1U, // VEXT2XV_DU_BU  | 
4544  | 0  |     1U, // VEXT2XV_DU_HU  | 
4545  | 0  |     1U, // VEXT2XV_DU_WU  | 
4546  | 0  |     1U, // VEXT2XV_D_B  | 
4547  | 0  |     1U, // VEXT2XV_D_H  | 
4548  | 0  |     1U, // VEXT2XV_D_W  | 
4549  | 0  |     1U, // VEXT2XV_HU_BU  | 
4550  | 0  |     1U, // VEXT2XV_H_B  | 
4551  | 0  |     1U, // VEXT2XV_WU_BU  | 
4552  | 0  |     1U, // VEXT2XV_WU_HU  | 
4553  | 0  |     1U, // VEXT2XV_W_B  | 
4554  | 0  |     1U, // VEXT2XV_W_H  | 
4555  | 0  |     1U, // VEXTH_DU_WU  | 
4556  | 0  |     1U, // VEXTH_D_W  | 
4557  | 0  |     1U, // VEXTH_HU_BU  | 
4558  | 0  |     1U, // VEXTH_H_B  | 
4559  | 0  |     1U, // VEXTH_QU_DU  | 
4560  | 0  |     1U, // VEXTH_Q_D  | 
4561  | 0  |     1U, // VEXTH_WU_HU  | 
4562  | 0  |     1U, // VEXTH_W_H  | 
4563  | 0  |     1U, // VEXTL_QU_DU  | 
4564  | 0  |     1U, // VEXTL_Q_D  | 
4565  | 0  |     9U, // VEXTRINS_B  | 
4566  | 0  |     9U, // VEXTRINS_D  | 
4567  | 0  |     9U, // VEXTRINS_H  | 
4568  | 0  |     9U, // VEXTRINS_W  | 
4569  | 0  |     17U,  // VFADD_D  | 
4570  | 0  |     17U,  // VFADD_S  | 
4571  | 0  |     1U, // VFCLASS_D  | 
4572  | 0  |     1U, // VFCLASS_S  | 
4573  | 0  |     17U,  // VFCMP_CAF_D  | 
4574  | 0  |     17U,  // VFCMP_CAF_S  | 
4575  | 0  |     17U,  // VFCMP_CEQ_D  | 
4576  | 0  |     17U,  // VFCMP_CEQ_S  | 
4577  | 0  |     17U,  // VFCMP_CLE_D  | 
4578  | 0  |     17U,  // VFCMP_CLE_S  | 
4579  | 0  |     17U,  // VFCMP_CLT_D  | 
4580  | 0  |     17U,  // VFCMP_CLT_S  | 
4581  | 0  |     17U,  // VFCMP_CNE_D  | 
4582  | 0  |     17U,  // VFCMP_CNE_S  | 
4583  | 0  |     17U,  // VFCMP_COR_D  | 
4584  | 0  |     17U,  // VFCMP_COR_S  | 
4585  | 0  |     17U,  // VFCMP_CUEQ_D  | 
4586  | 0  |     17U,  // VFCMP_CUEQ_S  | 
4587  | 0  |     17U,  // VFCMP_CULE_D  | 
4588  | 0  |     17U,  // VFCMP_CULE_S  | 
4589  | 0  |     17U,  // VFCMP_CULT_D  | 
4590  | 0  |     17U,  // VFCMP_CULT_S  | 
4591  | 0  |     17U,  // VFCMP_CUNE_D  | 
4592  | 0  |     17U,  // VFCMP_CUNE_S  | 
4593  | 0  |     17U,  // VFCMP_CUN_D  | 
4594  | 0  |     17U,  // VFCMP_CUN_S  | 
4595  | 0  |     17U,  // VFCMP_SAF_D  | 
4596  | 0  |     17U,  // VFCMP_SAF_S  | 
4597  | 0  |     17U,  // VFCMP_SEQ_D  | 
4598  | 0  |     17U,  // VFCMP_SEQ_S  | 
4599  | 0  |     17U,  // VFCMP_SLE_D  | 
4600  | 0  |     17U,  // VFCMP_SLE_S  | 
4601  | 0  |     17U,  // VFCMP_SLT_D  | 
4602  | 0  |     17U,  // VFCMP_SLT_S  | 
4603  | 0  |     17U,  // VFCMP_SNE_D  | 
4604  | 0  |     17U,  // VFCMP_SNE_S  | 
4605  | 0  |     17U,  // VFCMP_SOR_D  | 
4606  | 0  |     17U,  // VFCMP_SOR_S  | 
4607  | 0  |     17U,  // VFCMP_SUEQ_D  | 
4608  | 0  |     17U,  // VFCMP_SUEQ_S  | 
4609  | 0  |     17U,  // VFCMP_SULE_D  | 
4610  | 0  |     17U,  // VFCMP_SULE_S  | 
4611  | 0  |     17U,  // VFCMP_SULT_D  | 
4612  | 0  |     17U,  // VFCMP_SULT_S  | 
4613  | 0  |     17U,  // VFCMP_SUNE_D  | 
4614  | 0  |     17U,  // VFCMP_SUNE_S  | 
4615  | 0  |     17U,  // VFCMP_SUN_D  | 
4616  | 0  |     17U,  // VFCMP_SUN_S  | 
4617  | 0  |     1U, // VFCVTH_D_S  | 
4618  | 0  |     1U, // VFCVTH_S_H  | 
4619  | 0  |     1U, // VFCVTL_D_S  | 
4620  | 0  |     1U, // VFCVTL_S_H  | 
4621  | 0  |     17U,  // VFCVT_H_S  | 
4622  | 0  |     17U,  // VFCVT_S_D  | 
4623  | 0  |     17U,  // VFDIV_D  | 
4624  | 0  |     17U,  // VFDIV_S  | 
4625  | 0  |     1U, // VFFINTH_D_W  | 
4626  | 0  |     1U, // VFFINTL_D_W  | 
4627  | 0  |     1U, // VFFINT_D_L  | 
4628  | 0  |     1U, // VFFINT_D_LU  | 
4629  | 0  |     17U,  // VFFINT_S_L  | 
4630  | 0  |     1U, // VFFINT_S_W  | 
4631  | 0  |     1U, // VFFINT_S_WU  | 
4632  | 0  |     1U, // VFLOGB_D  | 
4633  | 0  |     1U, // VFLOGB_S  | 
4634  | 0  |     145U, // VFMADD_D  | 
4635  | 0  |     145U, // VFMADD_S  | 
4636  | 0  |     17U,  // VFMAXA_D  | 
4637  | 0  |     17U,  // VFMAXA_S  | 
4638  | 0  |     17U,  // VFMAX_D  | 
4639  | 0  |     17U,  // VFMAX_S  | 
4640  | 0  |     17U,  // VFMINA_D  | 
4641  | 0  |     17U,  // VFMINA_S  | 
4642  | 0  |     17U,  // VFMIN_D  | 
4643  | 0  |     17U,  // VFMIN_S  | 
4644  | 0  |     145U, // VFMSUB_D  | 
4645  | 0  |     145U, // VFMSUB_S  | 
4646  | 0  |     17U,  // VFMUL_D  | 
4647  | 0  |     17U,  // VFMUL_S  | 
4648  | 0  |     145U, // VFNMADD_D  | 
4649  | 0  |     145U, // VFNMADD_S  | 
4650  | 0  |     145U, // VFNMSUB_D  | 
4651  | 0  |     145U, // VFNMSUB_S  | 
4652  | 0  |     1U, // VFRECIPE_D  | 
4653  | 0  |     1U, // VFRECIPE_S  | 
4654  | 0  |     1U, // VFRECIP_D  | 
4655  | 0  |     1U, // VFRECIP_S  | 
4656  | 0  |     1U, // VFRINTRM_D  | 
4657  | 0  |     1U, // VFRINTRM_S  | 
4658  | 0  |     1U, // VFRINTRNE_D  | 
4659  | 0  |     1U, // VFRINTRNE_S  | 
4660  | 0  |     1U, // VFRINTRP_D  | 
4661  | 0  |     1U, // VFRINTRP_S  | 
4662  | 0  |     1U, // VFRINTRZ_D  | 
4663  | 0  |     1U, // VFRINTRZ_S  | 
4664  | 0  |     1U, // VFRINT_D  | 
4665  | 0  |     1U, // VFRINT_S  | 
4666  | 0  |     1U, // VFRSQRTE_D  | 
4667  | 0  |     1U, // VFRSQRTE_S  | 
4668  | 0  |     1U, // VFRSQRT_D  | 
4669  | 0  |     1U, // VFRSQRT_S  | 
4670  | 0  |     9U, // VFRSTPI_B  | 
4671  | 0  |     9U, // VFRSTPI_H  | 
4672  | 0  |     9U, // VFRSTP_B  | 
4673  | 0  |     9U, // VFRSTP_H  | 
4674  | 0  |     1U, // VFSQRT_D  | 
4675  | 0  |     1U, // VFSQRT_S  | 
4676  | 0  |     17U,  // VFSUB_D  | 
4677  | 0  |     17U,  // VFSUB_S  | 
4678  | 0  |     1U, // VFTINTH_L_S  | 
4679  | 0  |     1U, // VFTINTL_L_S  | 
4680  | 0  |     1U, // VFTINTRMH_L_S  | 
4681  | 0  |     1U, // VFTINTRML_L_S  | 
4682  | 0  |     1U, // VFTINTRM_L_D  | 
4683  | 0  |     17U,  // VFTINTRM_W_D  | 
4684  | 0  |     1U, // VFTINTRM_W_S  | 
4685  | 0  |     1U, // VFTINTRNEH_L_S  | 
4686  | 0  |     1U, // VFTINTRNEL_L_S  | 
4687  | 0  |     1U, // VFTINTRNE_L_D  | 
4688  | 0  |     17U,  // VFTINTRNE_W_D  | 
4689  | 0  |     1U, // VFTINTRNE_W_S  | 
4690  | 0  |     1U, // VFTINTRPH_L_S  | 
4691  | 0  |     1U, // VFTINTRPL_L_S  | 
4692  | 0  |     1U, // VFTINTRP_L_D  | 
4693  | 0  |     17U,  // VFTINTRP_W_D  | 
4694  | 0  |     1U, // VFTINTRP_W_S  | 
4695  | 0  |     1U, // VFTINTRZH_L_S  | 
4696  | 0  |     1U, // VFTINTRZL_L_S  | 
4697  | 0  |     1U, // VFTINTRZ_LU_D  | 
4698  | 0  |     1U, // VFTINTRZ_L_D  | 
4699  | 0  |     1U, // VFTINTRZ_WU_S  | 
4700  | 0  |     17U,  // VFTINTRZ_W_D  | 
4701  | 0  |     1U, // VFTINTRZ_W_S  | 
4702  | 0  |     1U, // VFTINT_LU_D  | 
4703  | 0  |     1U, // VFTINT_L_D  | 
4704  | 0  |     1U, // VFTINT_WU_S  | 
4705  | 0  |     17U,  // VFTINT_W_D  | 
4706  | 0  |     1U, // VFTINT_W_S  | 
4707  | 0  |     17U,  // VHADDW_DU_WU  | 
4708  | 0  |     17U,  // VHADDW_D_W  | 
4709  | 0  |     17U,  // VHADDW_HU_BU  | 
4710  | 0  |     17U,  // VHADDW_H_B  | 
4711  | 0  |     17U,  // VHADDW_QU_DU  | 
4712  | 0  |     17U,  // VHADDW_Q_D  | 
4713  | 0  |     17U,  // VHADDW_WU_HU  | 
4714  | 0  |     17U,  // VHADDW_W_H  | 
4715  | 0  |     17U,  // VHSUBW_DU_WU  | 
4716  | 0  |     17U,  // VHSUBW_D_W  | 
4717  | 0  |     17U,  // VHSUBW_HU_BU  | 
4718  | 0  |     17U,  // VHSUBW_H_B  | 
4719  | 0  |     17U,  // VHSUBW_QU_DU  | 
4720  | 0  |     17U,  // VHSUBW_Q_D  | 
4721  | 0  |     17U,  // VHSUBW_WU_HU  | 
4722  | 0  |     17U,  // VHSUBW_W_H  | 
4723  | 0  |     17U,  // VILVH_B  | 
4724  | 0  |     17U,  // VILVH_D  | 
4725  | 0  |     17U,  // VILVH_H  | 
4726  | 0  |     17U,  // VILVH_W  | 
4727  | 0  |     17U,  // VILVL_B  | 
4728  | 0  |     17U,  // VILVL_D  | 
4729  | 0  |     17U,  // VILVL_H  | 
4730  | 0  |     17U,  // VILVL_W  | 
4731  | 0  |     9U, // VINSGR2VR_B  | 
4732  | 0  |     9U, // VINSGR2VR_D  | 
4733  | 0  |     9U, // VINSGR2VR_H  | 
4734  | 0  |     9U, // VINSGR2VR_W  | 
4735  | 0  |     17U,  // VLD  | 
4736  | 0  |     1U, // VLDI  | 
4737  | 0  |     17U,  // VLDREPL_B  | 
4738  | 0  |     17U,  // VLDREPL_D  | 
4739  | 0  |     17U,  // VLDREPL_H  | 
4740  | 0  |     17U,  // VLDREPL_W  | 
4741  | 0  |     17U,  // VLDX  | 
4742  | 0  |     9U, // VMADDWEV_D_W  | 
4743  | 0  |     9U, // VMADDWEV_D_WU  | 
4744  | 0  |     9U, // VMADDWEV_D_WU_W  | 
4745  | 0  |     9U, // VMADDWEV_H_B  | 
4746  | 0  |     9U, // VMADDWEV_H_BU  | 
4747  | 0  |     9U, // VMADDWEV_H_BU_B  | 
4748  | 0  |     9U, // VMADDWEV_Q_D  | 
4749  | 0  |     9U, // VMADDWEV_Q_DU  | 
4750  | 0  |     9U, // VMADDWEV_Q_DU_D  | 
4751  | 0  |     9U, // VMADDWEV_W_H  | 
4752  | 0  |     9U, // VMADDWEV_W_HU  | 
4753  | 0  |     9U, // VMADDWEV_W_HU_H  | 
4754  | 0  |     9U, // VMADDWOD_D_W  | 
4755  | 0  |     9U, // VMADDWOD_D_WU  | 
4756  | 0  |     9U, // VMADDWOD_D_WU_W  | 
4757  | 0  |     9U, // VMADDWOD_H_B  | 
4758  | 0  |     9U, // VMADDWOD_H_BU  | 
4759  | 0  |     9U, // VMADDWOD_H_BU_B  | 
4760  | 0  |     9U, // VMADDWOD_Q_D  | 
4761  | 0  |     9U, // VMADDWOD_Q_DU  | 
4762  | 0  |     9U, // VMADDWOD_Q_DU_D  | 
4763  | 0  |     9U, // VMADDWOD_W_H  | 
4764  | 0  |     9U, // VMADDWOD_W_HU  | 
4765  | 0  |     9U, // VMADDWOD_W_HU_H  | 
4766  | 0  |     9U, // VMADD_B  | 
4767  | 0  |     9U, // VMADD_D  | 
4768  | 0  |     9U, // VMADD_H  | 
4769  | 0  |     9U, // VMADD_W  | 
4770  | 0  |     17U,  // VMAXI_B  | 
4771  | 0  |     17U,  // VMAXI_BU  | 
4772  | 0  |     17U,  // VMAXI_D  | 
4773  | 0  |     17U,  // VMAXI_DU  | 
4774  | 0  |     17U,  // VMAXI_H  | 
4775  | 0  |     17U,  // VMAXI_HU  | 
4776  | 0  |     17U,  // VMAXI_W  | 
4777  | 0  |     17U,  // VMAXI_WU  | 
4778  | 0  |     17U,  // VMAX_B  | 
4779  | 0  |     17U,  // VMAX_BU  | 
4780  | 0  |     17U,  // VMAX_D  | 
4781  | 0  |     17U,  // VMAX_DU  | 
4782  | 0  |     17U,  // VMAX_H  | 
4783  | 0  |     17U,  // VMAX_HU  | 
4784  | 0  |     17U,  // VMAX_W  | 
4785  | 0  |     17U,  // VMAX_WU  | 
4786  | 0  |     17U,  // VMINI_B  | 
4787  | 0  |     17U,  // VMINI_BU  | 
4788  | 0  |     17U,  // VMINI_D  | 
4789  | 0  |     17U,  // VMINI_DU  | 
4790  | 0  |     17U,  // VMINI_H  | 
4791  | 0  |     17U,  // VMINI_HU  | 
4792  | 0  |     17U,  // VMINI_W  | 
4793  | 0  |     17U,  // VMINI_WU  | 
4794  | 0  |     17U,  // VMIN_B  | 
4795  | 0  |     17U,  // VMIN_BU  | 
4796  | 0  |     17U,  // VMIN_D  | 
4797  | 0  |     17U,  // VMIN_DU  | 
4798  | 0  |     17U,  // VMIN_H  | 
4799  | 0  |     17U,  // VMIN_HU  | 
4800  | 0  |     17U,  // VMIN_W  | 
4801  | 0  |     17U,  // VMIN_WU  | 
4802  | 0  |     17U,  // VMOD_B  | 
4803  | 0  |     17U,  // VMOD_BU  | 
4804  | 0  |     17U,  // VMOD_D  | 
4805  | 0  |     17U,  // VMOD_DU  | 
4806  | 0  |     17U,  // VMOD_H  | 
4807  | 0  |     17U,  // VMOD_HU  | 
4808  | 0  |     17U,  // VMOD_W  | 
4809  | 0  |     17U,  // VMOD_WU  | 
4810  | 0  |     1U, // VMSKGEZ_B  | 
4811  | 0  |     1U, // VMSKLTZ_B  | 
4812  | 0  |     1U, // VMSKLTZ_D  | 
4813  | 0  |     1U, // VMSKLTZ_H  | 
4814  | 0  |     1U, // VMSKLTZ_W  | 
4815  | 0  |     1U, // VMSKNZ_B  | 
4816  | 0  |     9U, // VMSUB_B  | 
4817  | 0  |     9U, // VMSUB_D  | 
4818  | 0  |     9U, // VMSUB_H  | 
4819  | 0  |     9U, // VMSUB_W  | 
4820  | 0  |     17U,  // VMUH_B  | 
4821  | 0  |     17U,  // VMUH_BU  | 
4822  | 0  |     17U,  // VMUH_D  | 
4823  | 0  |     17U,  // VMUH_DU  | 
4824  | 0  |     17U,  // VMUH_H  | 
4825  | 0  |     17U,  // VMUH_HU  | 
4826  | 0  |     17U,  // VMUH_W  | 
4827  | 0  |     17U,  // VMUH_WU  | 
4828  | 0  |     17U,  // VMULWEV_D_W  | 
4829  | 0  |     17U,  // VMULWEV_D_WU  | 
4830  | 0  |     17U,  // VMULWEV_D_WU_W  | 
4831  | 0  |     17U,  // VMULWEV_H_B  | 
4832  | 0  |     17U,  // VMULWEV_H_BU  | 
4833  | 0  |     17U,  // VMULWEV_H_BU_B  | 
4834  | 0  |     17U,  // VMULWEV_Q_D  | 
4835  | 0  |     17U,  // VMULWEV_Q_DU  | 
4836  | 0  |     17U,  // VMULWEV_Q_DU_D  | 
4837  | 0  |     17U,  // VMULWEV_W_H  | 
4838  | 0  |     17U,  // VMULWEV_W_HU  | 
4839  | 0  |     17U,  // VMULWEV_W_HU_H  | 
4840  | 0  |     17U,  // VMULWOD_D_W  | 
4841  | 0  |     17U,  // VMULWOD_D_WU  | 
4842  | 0  |     17U,  // VMULWOD_D_WU_W  | 
4843  | 0  |     17U,  // VMULWOD_H_B  | 
4844  | 0  |     17U,  // VMULWOD_H_BU  | 
4845  | 0  |     17U,  // VMULWOD_H_BU_B  | 
4846  | 0  |     17U,  // VMULWOD_Q_D  | 
4847  | 0  |     17U,  // VMULWOD_Q_DU  | 
4848  | 0  |     17U,  // VMULWOD_Q_DU_D  | 
4849  | 0  |     17U,  // VMULWOD_W_H  | 
4850  | 0  |     17U,  // VMULWOD_W_HU  | 
4851  | 0  |     17U,  // VMULWOD_W_HU_H  | 
4852  | 0  |     17U,  // VMUL_B  | 
4853  | 0  |     17U,  // VMUL_D  | 
4854  | 0  |     17U,  // VMUL_H  | 
4855  | 0  |     17U,  // VMUL_W  | 
4856  | 0  |     1U, // VNEG_B  | 
4857  | 0  |     1U, // VNEG_D  | 
4858  | 0  |     1U, // VNEG_H  | 
4859  | 0  |     1U, // VNEG_W  | 
4860  | 0  |     17U,  // VNORI_B  | 
4861  | 0  |     17U,  // VNOR_V  | 
4862  | 0  |     17U,  // VORI_B  | 
4863  | 0  |     17U,  // VORN_V  | 
4864  | 0  |     17U,  // VOR_V  | 
4865  | 0  |     17U,  // VPACKEV_B  | 
4866  | 0  |     17U,  // VPACKEV_D  | 
4867  | 0  |     17U,  // VPACKEV_H  | 
4868  | 0  |     17U,  // VPACKEV_W  | 
4869  | 0  |     17U,  // VPACKOD_B  | 
4870  | 0  |     17U,  // VPACKOD_D  | 
4871  | 0  |     17U,  // VPACKOD_H  | 
4872  | 0  |     17U,  // VPACKOD_W  | 
4873  | 0  |     1U, // VPCNT_B  | 
4874  | 0  |     1U, // VPCNT_D  | 
4875  | 0  |     1U, // VPCNT_H  | 
4876  | 0  |     1U, // VPCNT_W  | 
4877  | 0  |     9U, // VPERMI_W  | 
4878  | 0  |     17U,  // VPICKEV_B  | 
4879  | 0  |     17U,  // VPICKEV_D  | 
4880  | 0  |     17U,  // VPICKEV_H  | 
4881  | 0  |     17U,  // VPICKEV_W  | 
4882  | 0  |     17U,  // VPICKOD_B  | 
4883  | 0  |     17U,  // VPICKOD_D  | 
4884  | 0  |     17U,  // VPICKOD_H  | 
4885  | 0  |     17U,  // VPICKOD_W  | 
4886  | 0  |     17U,  // VPICKVE2GR_B  | 
4887  | 0  |     17U,  // VPICKVE2GR_BU  | 
4888  | 0  |     17U,  // VPICKVE2GR_D  | 
4889  | 0  |     17U,  // VPICKVE2GR_DU  | 
4890  | 0  |     17U,  // VPICKVE2GR_H  | 
4891  | 0  |     17U,  // VPICKVE2GR_HU  | 
4892  | 0  |     17U,  // VPICKVE2GR_W  | 
4893  | 0  |     17U,  // VPICKVE2GR_WU  | 
4894  | 0  |     1U, // VREPLGR2VR_B  | 
4895  | 0  |     1U, // VREPLGR2VR_D  | 
4896  | 0  |     1U, // VREPLGR2VR_H  | 
4897  | 0  |     1U, // VREPLGR2VR_W  | 
4898  | 0  |     17U,  // VREPLVEI_B  | 
4899  | 0  |     17U,  // VREPLVEI_D  | 
4900  | 0  |     17U,  // VREPLVEI_H  | 
4901  | 0  |     17U,  // VREPLVEI_W  | 
4902  | 0  |     17U,  // VREPLVE_B  | 
4903  | 0  |     17U,  // VREPLVE_D  | 
4904  | 0  |     17U,  // VREPLVE_H  | 
4905  | 0  |     17U,  // VREPLVE_W  | 
4906  | 0  |     17U,  // VROTRI_B  | 
4907  | 0  |     17U,  // VROTRI_D  | 
4908  | 0  |     17U,  // VROTRI_H  | 
4909  | 0  |     17U,  // VROTRI_W  | 
4910  | 0  |     17U,  // VROTR_B  | 
4911  | 0  |     17U,  // VROTR_D  | 
4912  | 0  |     17U,  // VROTR_H  | 
4913  | 0  |     17U,  // VROTR_W  | 
4914  | 0  |     17U,  // VSADD_B  | 
4915  | 0  |     17U,  // VSADD_BU  | 
4916  | 0  |     17U,  // VSADD_D  | 
4917  | 0  |     17U,  // VSADD_DU  | 
4918  | 0  |     17U,  // VSADD_H  | 
4919  | 0  |     17U,  // VSADD_HU  | 
4920  | 0  |     17U,  // VSADD_W  | 
4921  | 0  |     17U,  // VSADD_WU  | 
4922  | 0  |     17U,  // VSAT_B  | 
4923  | 0  |     17U,  // VSAT_BU  | 
4924  | 0  |     17U,  // VSAT_D  | 
4925  | 0  |     17U,  // VSAT_DU  | 
4926  | 0  |     17U,  // VSAT_H  | 
4927  | 0  |     17U,  // VSAT_HU  | 
4928  | 0  |     17U,  // VSAT_W  | 
4929  | 0  |     17U,  // VSAT_WU  | 
4930  | 0  |     17U,  // VSEQI_B  | 
4931  | 0  |     17U,  // VSEQI_D  | 
4932  | 0  |     17U,  // VSEQI_H  | 
4933  | 0  |     17U,  // VSEQI_W  | 
4934  | 0  |     17U,  // VSEQ_B  | 
4935  | 0  |     17U,  // VSEQ_D  | 
4936  | 0  |     17U,  // VSEQ_H  | 
4937  | 0  |     17U,  // VSEQ_W  | 
4938  | 0  |     1U, // VSETALLNEZ_B  | 
4939  | 0  |     1U, // VSETALLNEZ_D  | 
4940  | 0  |     1U, // VSETALLNEZ_H  | 
4941  | 0  |     1U, // VSETALLNEZ_W  | 
4942  | 0  |     1U, // VSETANYEQZ_B  | 
4943  | 0  |     1U, // VSETANYEQZ_D  | 
4944  | 0  |     1U, // VSETANYEQZ_H  | 
4945  | 0  |     1U, // VSETANYEQZ_W  | 
4946  | 0  |     1U, // VSETEQZ_V  | 
4947  | 0  |     1U, // VSETNEZ_V  | 
4948  | 0  |     17U,  // VSHUF4I_B  | 
4949  | 0  |     9U, // VSHUF4I_D  | 
4950  | 0  |     17U,  // VSHUF4I_H  | 
4951  | 0  |     17U,  // VSHUF4I_W  | 
4952  | 0  |     145U, // VSHUF_B  | 
4953  | 0  |     9U, // VSHUF_D  | 
4954  | 0  |     9U, // VSHUF_H  | 
4955  | 0  |     9U, // VSHUF_W  | 
4956  | 0  |     17U,  // VSIGNCOV_B  | 
4957  | 0  |     17U,  // VSIGNCOV_D  | 
4958  | 0  |     17U,  // VSIGNCOV_H  | 
4959  | 0  |     17U,  // VSIGNCOV_W  | 
4960  | 0  |     17U,  // VSLEI_B  | 
4961  | 0  |     17U,  // VSLEI_BU  | 
4962  | 0  |     17U,  // VSLEI_D  | 
4963  | 0  |     17U,  // VSLEI_DU  | 
4964  | 0  |     17U,  // VSLEI_H  | 
4965  | 0  |     17U,  // VSLEI_HU  | 
4966  | 0  |     17U,  // VSLEI_W  | 
4967  | 0  |     17U,  // VSLEI_WU  | 
4968  | 0  |     17U,  // VSLE_B  | 
4969  | 0  |     17U,  // VSLE_BU  | 
4970  | 0  |     17U,  // VSLE_D  | 
4971  | 0  |     17U,  // VSLE_DU  | 
4972  | 0  |     17U,  // VSLE_H  | 
4973  | 0  |     17U,  // VSLE_HU  | 
4974  | 0  |     17U,  // VSLE_W  | 
4975  | 0  |     17U,  // VSLE_WU  | 
4976  | 0  |     17U,  // VSLLI_B  | 
4977  | 0  |     17U,  // VSLLI_D  | 
4978  | 0  |     17U,  // VSLLI_H  | 
4979  | 0  |     17U,  // VSLLI_W  | 
4980  | 0  |     17U,  // VSLLWIL_DU_WU  | 
4981  | 0  |     17U,  // VSLLWIL_D_W  | 
4982  | 0  |     17U,  // VSLLWIL_HU_BU  | 
4983  | 0  |     17U,  // VSLLWIL_H_B  | 
4984  | 0  |     17U,  // VSLLWIL_WU_HU  | 
4985  | 0  |     17U,  // VSLLWIL_W_H  | 
4986  | 0  |     17U,  // VSLL_B  | 
4987  | 0  |     17U,  // VSLL_D  | 
4988  | 0  |     17U,  // VSLL_H  | 
4989  | 0  |     17U,  // VSLL_W  | 
4990  | 0  |     17U,  // VSLTI_B  | 
4991  | 0  |     17U,  // VSLTI_BU  | 
4992  | 0  |     17U,  // VSLTI_D  | 
4993  | 0  |     17U,  // VSLTI_DU  | 
4994  | 0  |     17U,  // VSLTI_H  | 
4995  | 0  |     17U,  // VSLTI_HU  | 
4996  | 0  |     17U,  // VSLTI_W  | 
4997  | 0  |     17U,  // VSLTI_WU  | 
4998  | 0  |     17U,  // VSLT_B  | 
4999  | 0  |     17U,  // VSLT_BU  | 
5000  | 0  |     17U,  // VSLT_D  | 
5001  | 0  |     17U,  // VSLT_DU  | 
5002  | 0  |     17U,  // VSLT_H  | 
5003  | 0  |     17U,  // VSLT_HU  | 
5004  | 0  |     17U,  // VSLT_W  | 
5005  | 0  |     17U,  // VSLT_WU  | 
5006  | 0  |     17U,  // VSRAI_B  | 
5007  | 0  |     17U,  // VSRAI_D  | 
5008  | 0  |     17U,  // VSRAI_H  | 
5009  | 0  |     17U,  // VSRAI_W  | 
5010  | 0  |     9U, // VSRANI_B_H  | 
5011  | 0  |     9U, // VSRANI_D_Q  | 
5012  | 0  |     9U, // VSRANI_H_W  | 
5013  | 0  |     9U, // VSRANI_W_D  | 
5014  | 0  |     17U,  // VSRAN_B_H  | 
5015  | 0  |     17U,  // VSRAN_H_W  | 
5016  | 0  |     17U,  // VSRAN_W_D  | 
5017  | 0  |     17U,  // VSRARI_B  | 
5018  | 0  |     17U,  // VSRARI_D  | 
5019  | 0  |     17U,  // VSRARI_H  | 
5020  | 0  |     17U,  // VSRARI_W  | 
5021  | 0  |     9U, // VSRARNI_B_H  | 
5022  | 0  |     9U, // VSRARNI_D_Q  | 
5023  | 0  |     9U, // VSRARNI_H_W  | 
5024  | 0  |     9U, // VSRARNI_W_D  | 
5025  | 0  |     17U,  // VSRARN_B_H  | 
5026  | 0  |     17U,  // VSRARN_H_W  | 
5027  | 0  |     17U,  // VSRARN_W_D  | 
5028  | 0  |     17U,  // VSRAR_B  | 
5029  | 0  |     17U,  // VSRAR_D  | 
5030  | 0  |     17U,  // VSRAR_H  | 
5031  | 0  |     17U,  // VSRAR_W  | 
5032  | 0  |     17U,  // VSRA_B  | 
5033  | 0  |     17U,  // VSRA_D  | 
5034  | 0  |     17U,  // VSRA_H  | 
5035  | 0  |     17U,  // VSRA_W  | 
5036  | 0  |     17U,  // VSRLI_B  | 
5037  | 0  |     17U,  // VSRLI_D  | 
5038  | 0  |     17U,  // VSRLI_H  | 
5039  | 0  |     17U,  // VSRLI_W  | 
5040  | 0  |     9U, // VSRLNI_B_H  | 
5041  | 0  |     9U, // VSRLNI_D_Q  | 
5042  | 0  |     9U, // VSRLNI_H_W  | 
5043  | 0  |     9U, // VSRLNI_W_D  | 
5044  | 0  |     17U,  // VSRLN_B_H  | 
5045  | 0  |     17U,  // VSRLN_H_W  | 
5046  | 0  |     17U,  // VSRLN_W_D  | 
5047  | 0  |     17U,  // VSRLRI_B  | 
5048  | 0  |     17U,  // VSRLRI_D  | 
5049  | 0  |     17U,  // VSRLRI_H  | 
5050  | 0  |     17U,  // VSRLRI_W  | 
5051  | 0  |     9U, // VSRLRNI_B_H  | 
5052  | 0  |     9U, // VSRLRNI_D_Q  | 
5053  | 0  |     9U, // VSRLRNI_H_W  | 
5054  | 0  |     9U, // VSRLRNI_W_D  | 
5055  | 0  |     17U,  // VSRLRN_B_H  | 
5056  | 0  |     17U,  // VSRLRN_H_W  | 
5057  | 0  |     17U,  // VSRLRN_W_D  | 
5058  | 0  |     17U,  // VSRLR_B  | 
5059  | 0  |     17U,  // VSRLR_D  | 
5060  | 0  |     17U,  // VSRLR_H  | 
5061  | 0  |     17U,  // VSRLR_W  | 
5062  | 0  |     17U,  // VSRL_B  | 
5063  | 0  |     17U,  // VSRL_D  | 
5064  | 0  |     17U,  // VSRL_H  | 
5065  | 0  |     17U,  // VSRL_W  | 
5066  | 0  |     9U, // VSSRANI_BU_H  | 
5067  | 0  |     9U, // VSSRANI_B_H  | 
5068  | 0  |     9U, // VSSRANI_DU_Q  | 
5069  | 0  |     9U, // VSSRANI_D_Q  | 
5070  | 0  |     9U, // VSSRANI_HU_W  | 
5071  | 0  |     9U, // VSSRANI_H_W  | 
5072  | 0  |     9U, // VSSRANI_WU_D  | 
5073  | 0  |     9U, // VSSRANI_W_D  | 
5074  | 0  |     17U,  // VSSRAN_BU_H  | 
5075  | 0  |     17U,  // VSSRAN_B_H  | 
5076  | 0  |     17U,  // VSSRAN_HU_W  | 
5077  | 0  |     17U,  // VSSRAN_H_W  | 
5078  | 0  |     17U,  // VSSRAN_WU_D  | 
5079  | 0  |     17U,  // VSSRAN_W_D  | 
5080  | 0  |     9U, // VSSRARNI_BU_H  | 
5081  | 0  |     9U, // VSSRARNI_B_H  | 
5082  | 0  |     9U, // VSSRARNI_DU_Q  | 
5083  | 0  |     9U, // VSSRARNI_D_Q  | 
5084  | 0  |     9U, // VSSRARNI_HU_W  | 
5085  | 0  |     9U, // VSSRARNI_H_W  | 
5086  | 0  |     9U, // VSSRARNI_WU_D  | 
5087  | 0  |     9U, // VSSRARNI_W_D  | 
5088  | 0  |     17U,  // VSSRARN_BU_H  | 
5089  | 0  |     17U,  // VSSRARN_B_H  | 
5090  | 0  |     17U,  // VSSRARN_HU_W  | 
5091  | 0  |     17U,  // VSSRARN_H_W  | 
5092  | 0  |     17U,  // VSSRARN_WU_D  | 
5093  | 0  |     17U,  // VSSRARN_W_D  | 
5094  | 0  |     9U, // VSSRLNI_BU_H  | 
5095  | 0  |     9U, // VSSRLNI_B_H  | 
5096  | 0  |     9U, // VSSRLNI_DU_Q  | 
5097  | 0  |     9U, // VSSRLNI_D_Q  | 
5098  | 0  |     9U, // VSSRLNI_HU_W  | 
5099  | 0  |     9U, // VSSRLNI_H_W  | 
5100  | 0  |     9U, // VSSRLNI_WU_D  | 
5101  | 0  |     9U, // VSSRLNI_W_D  | 
5102  | 0  |     17U,  // VSSRLN_BU_H  | 
5103  | 0  |     17U,  // VSSRLN_B_H  | 
5104  | 0  |     17U,  // VSSRLN_HU_W  | 
5105  | 0  |     17U,  // VSSRLN_H_W  | 
5106  | 0  |     17U,  // VSSRLN_WU_D  | 
5107  | 0  |     17U,  // VSSRLN_W_D  | 
5108  | 0  |     9U, // VSSRLRNI_BU_H  | 
5109  | 0  |     9U, // VSSRLRNI_B_H  | 
5110  | 0  |     9U, // VSSRLRNI_DU_Q  | 
5111  | 0  |     9U, // VSSRLRNI_D_Q  | 
5112  | 0  |     9U, // VSSRLRNI_HU_W  | 
5113  | 0  |     9U, // VSSRLRNI_H_W  | 
5114  | 0  |     9U, // VSSRLRNI_WU_D  | 
5115  | 0  |     9U, // VSSRLRNI_W_D  | 
5116  | 0  |     17U,  // VSSRLRN_BU_H  | 
5117  | 0  |     17U,  // VSSRLRN_B_H  | 
5118  | 0  |     17U,  // VSSRLRN_HU_W  | 
5119  | 0  |     17U,  // VSSRLRN_H_W  | 
5120  | 0  |     17U,  // VSSRLRN_WU_D  | 
5121  | 0  |     17U,  // VSSRLRN_W_D  | 
5122  | 0  |     17U,  // VSSUB_B  | 
5123  | 0  |     17U,  // VSSUB_BU  | 
5124  | 0  |     17U,  // VSSUB_D  | 
5125  | 0  |     17U,  // VSSUB_DU  | 
5126  | 0  |     17U,  // VSSUB_H  | 
5127  | 0  |     17U,  // VSSUB_HU  | 
5128  | 0  |     17U,  // VSSUB_W  | 
5129  | 0  |     17U,  // VSSUB_WU  | 
5130  | 0  |     17U,  // VST  | 
5131  | 0  |     145U, // VSTELM_B  | 
5132  | 0  |     145U, // VSTELM_D  | 
5133  | 0  |     145U, // VSTELM_H  | 
5134  | 0  |     145U, // VSTELM_W  | 
5135  | 0  |     17U,  // VSTX  | 
5136  | 0  |     17U,  // VSUBI_BU  | 
5137  | 0  |     17U,  // VSUBI_DU  | 
5138  | 0  |     17U,  // VSUBI_HU  | 
5139  | 0  |     17U,  // VSUBI_WU  | 
5140  | 0  |     17U,  // VSUBWEV_D_W  | 
5141  | 0  |     17U,  // VSUBWEV_D_WU  | 
5142  | 0  |     17U,  // VSUBWEV_H_B  | 
5143  | 0  |     17U,  // VSUBWEV_H_BU  | 
5144  | 0  |     17U,  // VSUBWEV_Q_D  | 
5145  | 0  |     17U,  // VSUBWEV_Q_DU  | 
5146  | 0  |     17U,  // VSUBWEV_W_H  | 
5147  | 0  |     17U,  // VSUBWEV_W_HU  | 
5148  | 0  |     17U,  // VSUBWOD_D_W  | 
5149  | 0  |     17U,  // VSUBWOD_D_WU  | 
5150  | 0  |     17U,  // VSUBWOD_H_B  | 
5151  | 0  |     17U,  // VSUBWOD_H_BU  | 
5152  | 0  |     17U,  // VSUBWOD_Q_D  | 
5153  | 0  |     17U,  // VSUBWOD_Q_DU  | 
5154  | 0  |     17U,  // VSUBWOD_W_H  | 
5155  | 0  |     17U,  // VSUBWOD_W_HU  | 
5156  | 0  |     17U,  // VSUB_B  | 
5157  | 0  |     17U,  // VSUB_D  | 
5158  | 0  |     17U,  // VSUB_H  | 
5159  | 0  |     17U,  // VSUB_Q  | 
5160  | 0  |     17U,  // VSUB_W  | 
5161  | 0  |     17U,  // VXORI_B  | 
5162  | 0  |     17U,  // VXOR_V  | 
5163  | 0  |     1U, // X86ADC_B  | 
5164  | 0  |     1U, // X86ADC_D  | 
5165  | 0  |     1U, // X86ADC_H  | 
5166  | 0  |     1U, // X86ADC_W  | 
5167  | 0  |     1U, // X86ADD_B  | 
5168  | 0  |     1U, // X86ADD_D  | 
5169  | 0  |     1U, // X86ADD_DU  | 
5170  | 0  |     1U, // X86ADD_H  | 
5171  | 0  |     1U, // X86ADD_W  | 
5172  | 0  |     1U, // X86ADD_WU  | 
5173  | 0  |     1U, // X86AND_B  | 
5174  | 0  |     1U, // X86AND_D  | 
5175  | 0  |     1U, // X86AND_H  | 
5176  | 0  |     1U, // X86AND_W  | 
5177  | 0  |     0U, // X86CLRTM  | 
5178  | 0  |     0U, // X86DECTOP  | 
5179  | 0  |     0U, // X86DEC_B  | 
5180  | 0  |     0U, // X86DEC_D  | 
5181  | 0  |     0U, // X86DEC_H  | 
5182  | 0  |     0U, // X86DEC_W  | 
5183  | 0  |     0U, // X86INCTOP  | 
5184  | 0  |     0U, // X86INC_B  | 
5185  | 0  |     0U, // X86INC_D  | 
5186  | 0  |     0U, // X86INC_H  | 
5187  | 0  |     0U, // X86INC_W  | 
5188  | 0  |     1U, // X86MFFLAG  | 
5189  | 0  |     0U, // X86MFTOP  | 
5190  | 0  |     1U, // X86MTFLAG  | 
5191  | 0  |     0U, // X86MTTOP  | 
5192  | 0  |     1U, // X86MUL_B  | 
5193  | 0  |     1U, // X86MUL_BU  | 
5194  | 0  |     1U, // X86MUL_D  | 
5195  | 0  |     1U, // X86MUL_DU  | 
5196  | 0  |     1U, // X86MUL_H  | 
5197  | 0  |     1U, // X86MUL_HU  | 
5198  | 0  |     1U, // X86MUL_W  | 
5199  | 0  |     1U, // X86MUL_WU  | 
5200  | 0  |     1U, // X86OR_B  | 
5201  | 0  |     1U, // X86OR_D  | 
5202  | 0  |     1U, // X86OR_H  | 
5203  | 0  |     1U, // X86OR_W  | 
5204  | 0  |     1U, // X86RCLI_B  | 
5205  | 0  |     1U, // X86RCLI_D  | 
5206  | 0  |     1U, // X86RCLI_H  | 
5207  | 0  |     1U, // X86RCLI_W  | 
5208  | 0  |     1U, // X86RCL_B  | 
5209  | 0  |     1U, // X86RCL_D  | 
5210  | 0  |     1U, // X86RCL_H  | 
5211  | 0  |     1U, // X86RCL_W  | 
5212  | 0  |     1U, // X86RCRI_B  | 
5213  | 0  |     1U, // X86RCRI_D  | 
5214  | 0  |     1U, // X86RCRI_H  | 
5215  | 0  |     1U, // X86RCRI_W  | 
5216  | 0  |     1U, // X86RCR_B  | 
5217  | 0  |     1U, // X86RCR_D  | 
5218  | 0  |     1U, // X86RCR_H  | 
5219  | 0  |     1U, // X86RCR_W  | 
5220  | 0  |     1U, // X86ROTLI_B  | 
5221  | 0  |     1U, // X86ROTLI_D  | 
5222  | 0  |     1U, // X86ROTLI_H  | 
5223  | 0  |     1U, // X86ROTLI_W  | 
5224  | 0  |     1U, // X86ROTL_B  | 
5225  | 0  |     1U, // X86ROTL_D  | 
5226  | 0  |     1U, // X86ROTL_H  | 
5227  | 0  |     1U, // X86ROTL_W  | 
5228  | 0  |     1U, // X86ROTRI_B  | 
5229  | 0  |     1U, // X86ROTRI_D  | 
5230  | 0  |     1U, // X86ROTRI_H  | 
5231  | 0  |     1U, // X86ROTRI_W  | 
5232  | 0  |     1U, // X86ROTR_B  | 
5233  | 0  |     1U, // X86ROTR_D  | 
5234  | 0  |     1U, // X86ROTR_H  | 
5235  | 0  |     1U, // X86ROTR_W  | 
5236  | 0  |     1U, // X86SBC_B  | 
5237  | 0  |     1U, // X86SBC_D  | 
5238  | 0  |     1U, // X86SBC_H  | 
5239  | 0  |     1U, // X86SBC_W  | 
5240  | 0  |     17U,  // X86SETTAG  | 
5241  | 0  |     0U, // X86SETTM  | 
5242  | 0  |     1U, // X86SLLI_B  | 
5243  | 0  |     1U, // X86SLLI_D  | 
5244  | 0  |     1U, // X86SLLI_H  | 
5245  | 0  |     1U, // X86SLLI_W  | 
5246  | 0  |     1U, // X86SLL_B  | 
5247  | 0  |     1U, // X86SLL_D  | 
5248  | 0  |     1U, // X86SLL_H  | 
5249  | 0  |     1U, // X86SLL_W  | 
5250  | 0  |     1U, // X86SRAI_B  | 
5251  | 0  |     1U, // X86SRAI_D  | 
5252  | 0  |     1U, // X86SRAI_H  | 
5253  | 0  |     1U, // X86SRAI_W  | 
5254  | 0  |     1U, // X86SRA_B  | 
5255  | 0  |     1U, // X86SRA_D  | 
5256  | 0  |     1U, // X86SRA_H  | 
5257  | 0  |     1U, // X86SRA_W  | 
5258  | 0  |     1U, // X86SRLI_B  | 
5259  | 0  |     1U, // X86SRLI_D  | 
5260  | 0  |     1U, // X86SRLI_H  | 
5261  | 0  |     1U, // X86SRLI_W  | 
5262  | 0  |     1U, // X86SRL_B  | 
5263  | 0  |     1U, // X86SRL_D  | 
5264  | 0  |     1U, // X86SRL_H  | 
5265  | 0  |     1U, // X86SRL_W  | 
5266  | 0  |     1U, // X86SUB_B  | 
5267  | 0  |     1U, // X86SUB_D  | 
5268  | 0  |     1U, // X86SUB_DU  | 
5269  | 0  |     1U, // X86SUB_H  | 
5270  | 0  |     1U, // X86SUB_W  | 
5271  | 0  |     1U, // X86SUB_WU  | 
5272  | 0  |     1U, // X86XOR_B  | 
5273  | 0  |     1U, // X86XOR_D  | 
5274  | 0  |     1U, // X86XOR_H  | 
5275  | 0  |     1U, // X86XOR_W  | 
5276  | 0  |     17U,  // XOR  | 
5277  | 0  |     17U,  // XORI  | 
5278  | 0  |     17U,  // XVABSD_B  | 
5279  | 0  |     17U,  // XVABSD_BU  | 
5280  | 0  |     17U,  // XVABSD_D  | 
5281  | 0  |     17U,  // XVABSD_DU  | 
5282  | 0  |     17U,  // XVABSD_H  | 
5283  | 0  |     17U,  // XVABSD_HU  | 
5284  | 0  |     17U,  // XVABSD_W  | 
5285  | 0  |     17U,  // XVABSD_WU  | 
5286  | 0  |     17U,  // XVADDA_B  | 
5287  | 0  |     17U,  // XVADDA_D  | 
5288  | 0  |     17U,  // XVADDA_H  | 
5289  | 0  |     17U,  // XVADDA_W  | 
5290  | 0  |     17U,  // XVADDI_BU  | 
5291  | 0  |     17U,  // XVADDI_DU  | 
5292  | 0  |     17U,  // XVADDI_HU  | 
5293  | 0  |     17U,  // XVADDI_WU  | 
5294  | 0  |     17U,  // XVADDWEV_D_W  | 
5295  | 0  |     17U,  // XVADDWEV_D_WU  | 
5296  | 0  |     17U,  // XVADDWEV_D_WU_W  | 
5297  | 0  |     17U,  // XVADDWEV_H_B  | 
5298  | 0  |     17U,  // XVADDWEV_H_BU  | 
5299  | 0  |     17U,  // XVADDWEV_H_BU_B  | 
5300  | 0  |     17U,  // XVADDWEV_Q_D  | 
5301  | 0  |     17U,  // XVADDWEV_Q_DU  | 
5302  | 0  |     17U,  // XVADDWEV_Q_DU_D  | 
5303  | 0  |     17U,  // XVADDWEV_W_H  | 
5304  | 0  |     17U,  // XVADDWEV_W_HU  | 
5305  | 0  |     17U,  // XVADDWEV_W_HU_H  | 
5306  | 0  |     17U,  // XVADDWOD_D_W  | 
5307  | 0  |     17U,  // XVADDWOD_D_WU  | 
5308  | 0  |     17U,  // XVADDWOD_D_WU_W  | 
5309  | 0  |     17U,  // XVADDWOD_H_B  | 
5310  | 0  |     17U,  // XVADDWOD_H_BU  | 
5311  | 0  |     17U,  // XVADDWOD_H_BU_B  | 
5312  | 0  |     17U,  // XVADDWOD_Q_D  | 
5313  | 0  |     17U,  // XVADDWOD_Q_DU  | 
5314  | 0  |     17U,  // XVADDWOD_Q_DU_D  | 
5315  | 0  |     17U,  // XVADDWOD_W_H  | 
5316  | 0  |     17U,  // XVADDWOD_W_HU  | 
5317  | 0  |     17U,  // XVADDWOD_W_HU_H  | 
5318  | 0  |     17U,  // XVADD_B  | 
5319  | 0  |     17U,  // XVADD_D  | 
5320  | 0  |     17U,  // XVADD_H  | 
5321  | 0  |     17U,  // XVADD_Q  | 
5322  | 0  |     17U,  // XVADD_W  | 
5323  | 0  |     17U,  // XVANDI_B  | 
5324  | 0  |     17U,  // XVANDN_V  | 
5325  | 0  |     17U,  // XVAND_V  | 
5326  | 0  |     17U,  // XVAVGR_B  | 
5327  | 0  |     17U,  // XVAVGR_BU  | 
5328  | 0  |     17U,  // XVAVGR_D  | 
5329  | 0  |     17U,  // XVAVGR_DU  | 
5330  | 0  |     17U,  // XVAVGR_H  | 
5331  | 0  |     17U,  // XVAVGR_HU  | 
5332  | 0  |     17U,  // XVAVGR_W  | 
5333  | 0  |     17U,  // XVAVGR_WU  | 
5334  | 0  |     17U,  // XVAVG_B  | 
5335  | 0  |     17U,  // XVAVG_BU  | 
5336  | 0  |     17U,  // XVAVG_D  | 
5337  | 0  |     17U,  // XVAVG_DU  | 
5338  | 0  |     17U,  // XVAVG_H  | 
5339  | 0  |     17U,  // XVAVG_HU  | 
5340  | 0  |     17U,  // XVAVG_W  | 
5341  | 0  |     17U,  // XVAVG_WU  | 
5342  | 0  |     17U,  // XVBITCLRI_B  | 
5343  | 0  |     17U,  // XVBITCLRI_D  | 
5344  | 0  |     17U,  // XVBITCLRI_H  | 
5345  | 0  |     17U,  // XVBITCLRI_W  | 
5346  | 0  |     17U,  // XVBITCLR_B  | 
5347  | 0  |     17U,  // XVBITCLR_D  | 
5348  | 0  |     17U,  // XVBITCLR_H  | 
5349  | 0  |     17U,  // XVBITCLR_W  | 
5350  | 0  |     17U,  // XVBITREVI_B  | 
5351  | 0  |     17U,  // XVBITREVI_D  | 
5352  | 0  |     17U,  // XVBITREVI_H  | 
5353  | 0  |     17U,  // XVBITREVI_W  | 
5354  | 0  |     17U,  // XVBITREV_B  | 
5355  | 0  |     17U,  // XVBITREV_D  | 
5356  | 0  |     17U,  // XVBITREV_H  | 
5357  | 0  |     17U,  // XVBITREV_W  | 
5358  | 0  |     9U, // XVBITSELI_B  | 
5359  | 0  |     145U, // XVBITSEL_V  | 
5360  | 0  |     17U,  // XVBITSETI_B  | 
5361  | 0  |     17U,  // XVBITSETI_D  | 
5362  | 0  |     17U,  // XVBITSETI_H  | 
5363  | 0  |     17U,  // XVBITSETI_W  | 
5364  | 0  |     17U,  // XVBITSET_B  | 
5365  | 0  |     17U,  // XVBITSET_D  | 
5366  | 0  |     17U,  // XVBITSET_H  | 
5367  | 0  |     17U,  // XVBITSET_W  | 
5368  | 0  |     17U,  // XVBSLL_V  | 
5369  | 0  |     17U,  // XVBSRL_V  | 
5370  | 0  |     1U, // XVCLO_B  | 
5371  | 0  |     1U, // XVCLO_D  | 
5372  | 0  |     1U, // XVCLO_H  | 
5373  | 0  |     1U, // XVCLO_W  | 
5374  | 0  |     1U, // XVCLZ_B  | 
5375  | 0  |     1U, // XVCLZ_D  | 
5376  | 0  |     1U, // XVCLZ_H  | 
5377  | 0  |     1U, // XVCLZ_W  | 
5378  | 0  |     17U,  // XVDIV_B  | 
5379  | 0  |     17U,  // XVDIV_BU  | 
5380  | 0  |     17U,  // XVDIV_D  | 
5381  | 0  |     17U,  // XVDIV_DU  | 
5382  | 0  |     17U,  // XVDIV_H  | 
5383  | 0  |     17U,  // XVDIV_HU  | 
5384  | 0  |     17U,  // XVDIV_W  | 
5385  | 0  |     17U,  // XVDIV_WU  | 
5386  | 0  |     1U, // XVEXTH_DU_WU  | 
5387  | 0  |     1U, // XVEXTH_D_W  | 
5388  | 0  |     1U, // XVEXTH_HU_BU  | 
5389  | 0  |     1U, // XVEXTH_H_B  | 
5390  | 0  |     1U, // XVEXTH_QU_DU  | 
5391  | 0  |     1U, // XVEXTH_Q_D  | 
5392  | 0  |     1U, // XVEXTH_WU_HU  | 
5393  | 0  |     1U, // XVEXTH_W_H  | 
5394  | 0  |     1U, // XVEXTL_QU_DU  | 
5395  | 0  |     1U, // XVEXTL_Q_D  | 
5396  | 0  |     9U, // XVEXTRINS_B  | 
5397  | 0  |     9U, // XVEXTRINS_D  | 
5398  | 0  |     9U, // XVEXTRINS_H  | 
5399  | 0  |     9U, // XVEXTRINS_W  | 
5400  | 0  |     17U,  // XVFADD_D  | 
5401  | 0  |     17U,  // XVFADD_S  | 
5402  | 0  |     1U, // XVFCLASS_D  | 
5403  | 0  |     1U, // XVFCLASS_S  | 
5404  | 0  |     17U,  // XVFCMP_CAF_D  | 
5405  | 0  |     17U,  // XVFCMP_CAF_S  | 
5406  | 0  |     17U,  // XVFCMP_CEQ_D  | 
5407  | 0  |     17U,  // XVFCMP_CEQ_S  | 
5408  | 0  |     17U,  // XVFCMP_CLE_D  | 
5409  | 0  |     17U,  // XVFCMP_CLE_S  | 
5410  | 0  |     17U,  // XVFCMP_CLT_D  | 
5411  | 0  |     17U,  // XVFCMP_CLT_S  | 
5412  | 0  |     17U,  // XVFCMP_CNE_D  | 
5413  | 0  |     17U,  // XVFCMP_CNE_S  | 
5414  | 0  |     17U,  // XVFCMP_COR_D  | 
5415  | 0  |     17U,  // XVFCMP_COR_S  | 
5416  | 0  |     17U,  // XVFCMP_CUEQ_D  | 
5417  | 0  |     17U,  // XVFCMP_CUEQ_S  | 
5418  | 0  |     17U,  // XVFCMP_CULE_D  | 
5419  | 0  |     17U,  // XVFCMP_CULE_S  | 
5420  | 0  |     17U,  // XVFCMP_CULT_D  | 
5421  | 0  |     17U,  // XVFCMP_CULT_S  | 
5422  | 0  |     17U,  // XVFCMP_CUNE_D  | 
5423  | 0  |     17U,  // XVFCMP_CUNE_S  | 
5424  | 0  |     17U,  // XVFCMP_CUN_D  | 
5425  | 0  |     17U,  // XVFCMP_CUN_S  | 
5426  | 0  |     17U,  // XVFCMP_SAF_D  | 
5427  | 0  |     17U,  // XVFCMP_SAF_S  | 
5428  | 0  |     17U,  // XVFCMP_SEQ_D  | 
5429  | 0  |     17U,  // XVFCMP_SEQ_S  | 
5430  | 0  |     17U,  // XVFCMP_SLE_D  | 
5431  | 0  |     17U,  // XVFCMP_SLE_S  | 
5432  | 0  |     17U,  // XVFCMP_SLT_D  | 
5433  | 0  |     17U,  // XVFCMP_SLT_S  | 
5434  | 0  |     17U,  // XVFCMP_SNE_D  | 
5435  | 0  |     17U,  // XVFCMP_SNE_S  | 
5436  | 0  |     17U,  // XVFCMP_SOR_D  | 
5437  | 0  |     17U,  // XVFCMP_SOR_S  | 
5438  | 0  |     17U,  // XVFCMP_SUEQ_D  | 
5439  | 0  |     17U,  // XVFCMP_SUEQ_S  | 
5440  | 0  |     17U,  // XVFCMP_SULE_D  | 
5441  | 0  |     17U,  // XVFCMP_SULE_S  | 
5442  | 0  |     17U,  // XVFCMP_SULT_D  | 
5443  | 0  |     17U,  // XVFCMP_SULT_S  | 
5444  | 0  |     17U,  // XVFCMP_SUNE_D  | 
5445  | 0  |     17U,  // XVFCMP_SUNE_S  | 
5446  | 0  |     17U,  // XVFCMP_SUN_D  | 
5447  | 0  |     17U,  // XVFCMP_SUN_S  | 
5448  | 0  |     1U, // XVFCVTH_D_S  | 
5449  | 0  |     1U, // XVFCVTH_S_H  | 
5450  | 0  |     1U, // XVFCVTL_D_S  | 
5451  | 0  |     1U, // XVFCVTL_S_H  | 
5452  | 0  |     17U,  // XVFCVT_H_S  | 
5453  | 0  |     17U,  // XVFCVT_S_D  | 
5454  | 0  |     17U,  // XVFDIV_D  | 
5455  | 0  |     17U,  // XVFDIV_S  | 
5456  | 0  |     1U, // XVFFINTH_D_W  | 
5457  | 0  |     1U, // XVFFINTL_D_W  | 
5458  | 0  |     1U, // XVFFINT_D_L  | 
5459  | 0  |     1U, // XVFFINT_D_LU  | 
5460  | 0  |     17U,  // XVFFINT_S_L  | 
5461  | 0  |     1U, // XVFFINT_S_W  | 
5462  | 0  |     1U, // XVFFINT_S_WU  | 
5463  | 0  |     1U, // XVFLOGB_D  | 
5464  | 0  |     1U, // XVFLOGB_S  | 
5465  | 0  |     145U, // XVFMADD_D  | 
5466  | 0  |     145U, // XVFMADD_S  | 
5467  | 0  |     17U,  // XVFMAXA_D  | 
5468  | 0  |     17U,  // XVFMAXA_S  | 
5469  | 0  |     17U,  // XVFMAX_D  | 
5470  | 0  |     17U,  // XVFMAX_S  | 
5471  | 0  |     17U,  // XVFMINA_D  | 
5472  | 0  |     17U,  // XVFMINA_S  | 
5473  | 0  |     17U,  // XVFMIN_D  | 
5474  | 0  |     17U,  // XVFMIN_S  | 
5475  | 0  |     145U, // XVFMSUB_D  | 
5476  | 0  |     145U, // XVFMSUB_S  | 
5477  | 0  |     17U,  // XVFMUL_D  | 
5478  | 0  |     17U,  // XVFMUL_S  | 
5479  | 0  |     145U, // XVFNMADD_D  | 
5480  | 0  |     145U, // XVFNMADD_S  | 
5481  | 0  |     145U, // XVFNMSUB_D  | 
5482  | 0  |     145U, // XVFNMSUB_S  | 
5483  | 0  |     1U, // XVFRECIPE_D  | 
5484  | 0  |     1U, // XVFRECIPE_S  | 
5485  | 0  |     1U, // XVFRECIP_D  | 
5486  | 0  |     1U, // XVFRECIP_S  | 
5487  | 0  |     1U, // XVFRINTRM_D  | 
5488  | 0  |     1U, // XVFRINTRM_S  | 
5489  | 0  |     1U, // XVFRINTRNE_D  | 
5490  | 0  |     1U, // XVFRINTRNE_S  | 
5491  | 0  |     1U, // XVFRINTRP_D  | 
5492  | 0  |     1U, // XVFRINTRP_S  | 
5493  | 0  |     1U, // XVFRINTRZ_D  | 
5494  | 0  |     1U, // XVFRINTRZ_S  | 
5495  | 0  |     1U, // XVFRINT_D  | 
5496  | 0  |     1U, // XVFRINT_S  | 
5497  | 0  |     1U, // XVFRSQRTE_D  | 
5498  | 0  |     1U, // XVFRSQRTE_S  | 
5499  | 0  |     1U, // XVFRSQRT_D  | 
5500  | 0  |     1U, // XVFRSQRT_S  | 
5501  | 0  |     9U, // XVFRSTPI_B  | 
5502  | 0  |     9U, // XVFRSTPI_H  | 
5503  | 0  |     9U, // XVFRSTP_B  | 
5504  | 0  |     9U, // XVFRSTP_H  | 
5505  | 0  |     1U, // XVFSQRT_D  | 
5506  | 0  |     1U, // XVFSQRT_S  | 
5507  | 0  |     17U,  // XVFSUB_D  | 
5508  | 0  |     17U,  // XVFSUB_S  | 
5509  | 0  |     1U, // XVFTINTH_L_S  | 
5510  | 0  |     1U, // XVFTINTL_L_S  | 
5511  | 0  |     1U, // XVFTINTRMH_L_S  | 
5512  | 0  |     1U, // XVFTINTRML_L_S  | 
5513  | 0  |     1U, // XVFTINTRM_L_D  | 
5514  | 0  |     17U,  // XVFTINTRM_W_D  | 
5515  | 0  |     1U, // XVFTINTRM_W_S  | 
5516  | 0  |     1U, // XVFTINTRNEH_L_S  | 
5517  | 0  |     1U, // XVFTINTRNEL_L_S  | 
5518  | 0  |     1U, // XVFTINTRNE_L_D  | 
5519  | 0  |     17U,  // XVFTINTRNE_W_D  | 
5520  | 0  |     1U, // XVFTINTRNE_W_S  | 
5521  | 0  |     1U, // XVFTINTRPH_L_S  | 
5522  | 0  |     1U, // XVFTINTRPL_L_S  | 
5523  | 0  |     1U, // XVFTINTRP_L_D  | 
5524  | 0  |     17U,  // XVFTINTRP_W_D  | 
5525  | 0  |     1U, // XVFTINTRP_W_S  | 
5526  | 0  |     1U, // XVFTINTRZH_L_S  | 
5527  | 0  |     1U, // XVFTINTRZL_L_S  | 
5528  | 0  |     1U, // XVFTINTRZ_LU_D  | 
5529  | 0  |     1U, // XVFTINTRZ_L_D  | 
5530  | 0  |     1U, // XVFTINTRZ_WU_S  | 
5531  | 0  |     17U,  // XVFTINTRZ_W_D  | 
5532  | 0  |     1U, // XVFTINTRZ_W_S  | 
5533  | 0  |     1U, // XVFTINT_LU_D  | 
5534  | 0  |     1U, // XVFTINT_L_D  | 
5535  | 0  |     1U, // XVFTINT_WU_S  | 
5536  | 0  |     17U,  // XVFTINT_W_D  | 
5537  | 0  |     1U, // XVFTINT_W_S  | 
5538  | 0  |     17U,  // XVHADDW_DU_WU  | 
5539  | 0  |     17U,  // XVHADDW_D_W  | 
5540  | 0  |     17U,  // XVHADDW_HU_BU  | 
5541  | 0  |     17U,  // XVHADDW_H_B  | 
5542  | 0  |     17U,  // XVHADDW_QU_DU  | 
5543  | 0  |     17U,  // XVHADDW_Q_D  | 
5544  | 0  |     17U,  // XVHADDW_WU_HU  | 
5545  | 0  |     17U,  // XVHADDW_W_H  | 
5546  | 0  |     17U,  // XVHSELI_D  | 
5547  | 0  |     17U,  // XVHSUBW_DU_WU  | 
5548  | 0  |     17U,  // XVHSUBW_D_W  | 
5549  | 0  |     17U,  // XVHSUBW_HU_BU  | 
5550  | 0  |     17U,  // XVHSUBW_H_B  | 
5551  | 0  |     17U,  // XVHSUBW_QU_DU  | 
5552  | 0  |     17U,  // XVHSUBW_Q_D  | 
5553  | 0  |     17U,  // XVHSUBW_WU_HU  | 
5554  | 0  |     17U,  // XVHSUBW_W_H  | 
5555  | 0  |     17U,  // XVILVH_B  | 
5556  | 0  |     17U,  // XVILVH_D  | 
5557  | 0  |     17U,  // XVILVH_H  | 
5558  | 0  |     17U,  // XVILVH_W  | 
5559  | 0  |     17U,  // XVILVL_B  | 
5560  | 0  |     17U,  // XVILVL_D  | 
5561  | 0  |     17U,  // XVILVL_H  | 
5562  | 0  |     17U,  // XVILVL_W  | 
5563  | 0  |     9U, // XVINSGR2VR_D  | 
5564  | 0  |     9U, // XVINSGR2VR_W  | 
5565  | 0  |     9U, // XVINSVE0_D  | 
5566  | 0  |     9U, // XVINSVE0_W  | 
5567  | 0  |     17U,  // XVLD  | 
5568  | 0  |     1U, // XVLDI  | 
5569  | 0  |     17U,  // XVLDREPL_B  | 
5570  | 0  |     17U,  // XVLDREPL_D  | 
5571  | 0  |     17U,  // XVLDREPL_H  | 
5572  | 0  |     17U,  // XVLDREPL_W  | 
5573  | 0  |     17U,  // XVLDX  | 
5574  | 0  |     9U, // XVMADDWEV_D_W  | 
5575  | 0  |     9U, // XVMADDWEV_D_WU  | 
5576  | 0  |     9U, // XVMADDWEV_D_WU_W  | 
5577  | 0  |     9U, // XVMADDWEV_H_B  | 
5578  | 0  |     9U, // XVMADDWEV_H_BU  | 
5579  | 0  |     9U, // XVMADDWEV_H_BU_B  | 
5580  | 0  |     9U, // XVMADDWEV_Q_D  | 
5581  | 0  |     9U, // XVMADDWEV_Q_DU  | 
5582  | 0  |     9U, // XVMADDWEV_Q_DU_D  | 
5583  | 0  |     9U, // XVMADDWEV_W_H  | 
5584  | 0  |     9U, // XVMADDWEV_W_HU  | 
5585  | 0  |     9U, // XVMADDWEV_W_HU_H  | 
5586  | 0  |     9U, // XVMADDWOD_D_W  | 
5587  | 0  |     9U, // XVMADDWOD_D_WU  | 
5588  | 0  |     9U, // XVMADDWOD_D_WU_W  | 
5589  | 0  |     9U, // XVMADDWOD_H_B  | 
5590  | 0  |     9U, // XVMADDWOD_H_BU  | 
5591  | 0  |     9U, // XVMADDWOD_H_BU_B  | 
5592  | 0  |     9U, // XVMADDWOD_Q_D  | 
5593  | 0  |     9U, // XVMADDWOD_Q_DU  | 
5594  | 0  |     9U, // XVMADDWOD_Q_DU_D  | 
5595  | 0  |     9U, // XVMADDWOD_W_H  | 
5596  | 0  |     9U, // XVMADDWOD_W_HU  | 
5597  | 0  |     9U, // XVMADDWOD_W_HU_H  | 
5598  | 0  |     9U, // XVMADD_B  | 
5599  | 0  |     9U, // XVMADD_D  | 
5600  | 0  |     9U, // XVMADD_H  | 
5601  | 0  |     9U, // XVMADD_W  | 
5602  | 0  |     17U,  // XVMAXI_B  | 
5603  | 0  |     17U,  // XVMAXI_BU  | 
5604  | 0  |     17U,  // XVMAXI_D  | 
5605  | 0  |     17U,  // XVMAXI_DU  | 
5606  | 0  |     17U,  // XVMAXI_H  | 
5607  | 0  |     17U,  // XVMAXI_HU  | 
5608  | 0  |     17U,  // XVMAXI_W  | 
5609  | 0  |     17U,  // XVMAXI_WU  | 
5610  | 0  |     17U,  // XVMAX_B  | 
5611  | 0  |     17U,  // XVMAX_BU  | 
5612  | 0  |     17U,  // XVMAX_D  | 
5613  | 0  |     17U,  // XVMAX_DU  | 
5614  | 0  |     17U,  // XVMAX_H  | 
5615  | 0  |     17U,  // XVMAX_HU  | 
5616  | 0  |     17U,  // XVMAX_W  | 
5617  | 0  |     17U,  // XVMAX_WU  | 
5618  | 0  |     17U,  // XVMINI_B  | 
5619  | 0  |     17U,  // XVMINI_BU  | 
5620  | 0  |     17U,  // XVMINI_D  | 
5621  | 0  |     17U,  // XVMINI_DU  | 
5622  | 0  |     17U,  // XVMINI_H  | 
5623  | 0  |     17U,  // XVMINI_HU  | 
5624  | 0  |     17U,  // XVMINI_W  | 
5625  | 0  |     17U,  // XVMINI_WU  | 
5626  | 0  |     17U,  // XVMIN_B  | 
5627  | 0  |     17U,  // XVMIN_BU  | 
5628  | 0  |     17U,  // XVMIN_D  | 
5629  | 0  |     17U,  // XVMIN_DU  | 
5630  | 0  |     17U,  // XVMIN_H  | 
5631  | 0  |     17U,  // XVMIN_HU  | 
5632  | 0  |     17U,  // XVMIN_W  | 
5633  | 0  |     17U,  // XVMIN_WU  | 
5634  | 0  |     17U,  // XVMOD_B  | 
5635  | 0  |     17U,  // XVMOD_BU  | 
5636  | 0  |     17U,  // XVMOD_D  | 
5637  | 0  |     17U,  // XVMOD_DU  | 
5638  | 0  |     17U,  // XVMOD_H  | 
5639  | 0  |     17U,  // XVMOD_HU  | 
5640  | 0  |     17U,  // XVMOD_W  | 
5641  | 0  |     17U,  // XVMOD_WU  | 
5642  | 0  |     1U, // XVMSKGEZ_B  | 
5643  | 0  |     1U, // XVMSKLTZ_B  | 
5644  | 0  |     1U, // XVMSKLTZ_D  | 
5645  | 0  |     1U, // XVMSKLTZ_H  | 
5646  | 0  |     1U, // XVMSKLTZ_W  | 
5647  | 0  |     1U, // XVMSKNZ_B  | 
5648  | 0  |     9U, // XVMSUB_B  | 
5649  | 0  |     9U, // XVMSUB_D  | 
5650  | 0  |     9U, // XVMSUB_H  | 
5651  | 0  |     9U, // XVMSUB_W  | 
5652  | 0  |     17U,  // XVMUH_B  | 
5653  | 0  |     17U,  // XVMUH_BU  | 
5654  | 0  |     17U,  // XVMUH_D  | 
5655  | 0  |     17U,  // XVMUH_DU  | 
5656  | 0  |     17U,  // XVMUH_H  | 
5657  | 0  |     17U,  // XVMUH_HU  | 
5658  | 0  |     17U,  // XVMUH_W  | 
5659  | 0  |     17U,  // XVMUH_WU  | 
5660  | 0  |     17U,  // XVMULWEV_D_W  | 
5661  | 0  |     17U,  // XVMULWEV_D_WU  | 
5662  | 0  |     17U,  // XVMULWEV_D_WU_W  | 
5663  | 0  |     17U,  // XVMULWEV_H_B  | 
5664  | 0  |     17U,  // XVMULWEV_H_BU  | 
5665  | 0  |     17U,  // XVMULWEV_H_BU_B  | 
5666  | 0  |     17U,  // XVMULWEV_Q_D  | 
5667  | 0  |     17U,  // XVMULWEV_Q_DU  | 
5668  | 0  |     17U,  // XVMULWEV_Q_DU_D  | 
5669  | 0  |     17U,  // XVMULWEV_W_H  | 
5670  | 0  |     17U,  // XVMULWEV_W_HU  | 
5671  | 0  |     17U,  // XVMULWEV_W_HU_H  | 
5672  | 0  |     17U,  // XVMULWOD_D_W  | 
5673  | 0  |     17U,  // XVMULWOD_D_WU  | 
5674  | 0  |     17U,  // XVMULWOD_D_WU_W  | 
5675  | 0  |     17U,  // XVMULWOD_H_B  | 
5676  | 0  |     17U,  // XVMULWOD_H_BU  | 
5677  | 0  |     17U,  // XVMULWOD_H_BU_B  | 
5678  | 0  |     17U,  // XVMULWOD_Q_D  | 
5679  | 0  |     17U,  // XVMULWOD_Q_DU  | 
5680  | 0  |     17U,  // XVMULWOD_Q_DU_D  | 
5681  | 0  |     17U,  // XVMULWOD_W_H  | 
5682  | 0  |     17U,  // XVMULWOD_W_HU  | 
5683  | 0  |     17U,  // XVMULWOD_W_HU_H  | 
5684  | 0  |     17U,  // XVMUL_B  | 
5685  | 0  |     17U,  // XVMUL_D  | 
5686  | 0  |     17U,  // XVMUL_H  | 
5687  | 0  |     17U,  // XVMUL_W  | 
5688  | 0  |     1U, // XVNEG_B  | 
5689  | 0  |     1U, // XVNEG_D  | 
5690  | 0  |     1U, // XVNEG_H  | 
5691  | 0  |     1U, // XVNEG_W  | 
5692  | 0  |     17U,  // XVNORI_B  | 
5693  | 0  |     17U,  // XVNOR_V  | 
5694  | 0  |     17U,  // XVORI_B  | 
5695  | 0  |     17U,  // XVORN_V  | 
5696  | 0  |     17U,  // XVOR_V  | 
5697  | 0  |     17U,  // XVPACKEV_B  | 
5698  | 0  |     17U,  // XVPACKEV_D  | 
5699  | 0  |     17U,  // XVPACKEV_H  | 
5700  | 0  |     17U,  // XVPACKEV_W  | 
5701  | 0  |     17U,  // XVPACKOD_B  | 
5702  | 0  |     17U,  // XVPACKOD_D  | 
5703  | 0  |     17U,  // XVPACKOD_H  | 
5704  | 0  |     17U,  // XVPACKOD_W  | 
5705  | 0  |     1U, // XVPCNT_B  | 
5706  | 0  |     1U, // XVPCNT_D  | 
5707  | 0  |     1U, // XVPCNT_H  | 
5708  | 0  |     1U, // XVPCNT_W  | 
5709  | 0  |     17U,  // XVPERMI_D  | 
5710  | 0  |     9U, // XVPERMI_Q  | 
5711  | 0  |     9U, // XVPERMI_W  | 
5712  | 0  |     17U,  // XVPERM_W  | 
5713  | 0  |     17U,  // XVPICKEV_B  | 
5714  | 0  |     17U,  // XVPICKEV_D  | 
5715  | 0  |     17U,  // XVPICKEV_H  | 
5716  | 0  |     17U,  // XVPICKEV_W  | 
5717  | 0  |     17U,  // XVPICKOD_B  | 
5718  | 0  |     17U,  // XVPICKOD_D  | 
5719  | 0  |     17U,  // XVPICKOD_H  | 
5720  | 0  |     17U,  // XVPICKOD_W  | 
5721  | 0  |     17U,  // XVPICKVE2GR_D  | 
5722  | 0  |     17U,  // XVPICKVE2GR_DU  | 
5723  | 0  |     17U,  // XVPICKVE2GR_W  | 
5724  | 0  |     17U,  // XVPICKVE2GR_WU  | 
5725  | 0  |     17U,  // XVPICKVE_D  | 
5726  | 0  |     17U,  // XVPICKVE_W  | 
5727  | 0  |     17U,  // XVREPL128VEI_B  | 
5728  | 0  |     17U,  // XVREPL128VEI_D  | 
5729  | 0  |     17U,  // XVREPL128VEI_H  | 
5730  | 0  |     17U,  // XVREPL128VEI_W  | 
5731  | 0  |     1U, // XVREPLGR2VR_B  | 
5732  | 0  |     1U, // XVREPLGR2VR_D  | 
5733  | 0  |     1U, // XVREPLGR2VR_H  | 
5734  | 0  |     1U, // XVREPLGR2VR_W  | 
5735  | 0  |     1U, // XVREPLVE0_B  | 
5736  | 0  |     1U, // XVREPLVE0_D  | 
5737  | 0  |     1U, // XVREPLVE0_H  | 
5738  | 0  |     1U, // XVREPLVE0_Q  | 
5739  | 0  |     1U, // XVREPLVE0_W  | 
5740  | 0  |     17U,  // XVREPLVE_B  | 
5741  | 0  |     17U,  // XVREPLVE_D  | 
5742  | 0  |     17U,  // XVREPLVE_H  | 
5743  | 0  |     17U,  // XVREPLVE_W  | 
5744  | 0  |     17U,  // XVROTRI_B  | 
5745  | 0  |     17U,  // XVROTRI_D  | 
5746  | 0  |     17U,  // XVROTRI_H  | 
5747  | 0  |     17U,  // XVROTRI_W  | 
5748  | 0  |     17U,  // XVROTR_B  | 
5749  | 0  |     17U,  // XVROTR_D  | 
5750  | 0  |     17U,  // XVROTR_H  | 
5751  | 0  |     17U,  // XVROTR_W  | 
5752  | 0  |     17U,  // XVSADD_B  | 
5753  | 0  |     17U,  // XVSADD_BU  | 
5754  | 0  |     17U,  // XVSADD_D  | 
5755  | 0  |     17U,  // XVSADD_DU  | 
5756  | 0  |     17U,  // XVSADD_H  | 
5757  | 0  |     17U,  // XVSADD_HU  | 
5758  | 0  |     17U,  // XVSADD_W  | 
5759  | 0  |     17U,  // XVSADD_WU  | 
5760  | 0  |     17U,  // XVSAT_B  | 
5761  | 0  |     17U,  // XVSAT_BU  | 
5762  | 0  |     17U,  // XVSAT_D  | 
5763  | 0  |     17U,  // XVSAT_DU  | 
5764  | 0  |     17U,  // XVSAT_H  | 
5765  | 0  |     17U,  // XVSAT_HU  | 
5766  | 0  |     17U,  // XVSAT_W  | 
5767  | 0  |     17U,  // XVSAT_WU  | 
5768  | 0  |     17U,  // XVSEQI_B  | 
5769  | 0  |     17U,  // XVSEQI_D  | 
5770  | 0  |     17U,  // XVSEQI_H  | 
5771  | 0  |     17U,  // XVSEQI_W  | 
5772  | 0  |     17U,  // XVSEQ_B  | 
5773  | 0  |     17U,  // XVSEQ_D  | 
5774  | 0  |     17U,  // XVSEQ_H  | 
5775  | 0  |     17U,  // XVSEQ_W  | 
5776  | 0  |     1U, // XVSETALLNEZ_B  | 
5777  | 0  |     1U, // XVSETALLNEZ_D  | 
5778  | 0  |     1U, // XVSETALLNEZ_H  | 
5779  | 0  |     1U, // XVSETALLNEZ_W  | 
5780  | 0  |     1U, // XVSETANYEQZ_B  | 
5781  | 0  |     1U, // XVSETANYEQZ_D  | 
5782  | 0  |     1U, // XVSETANYEQZ_H  | 
5783  | 0  |     1U, // XVSETANYEQZ_W  | 
5784  | 0  |     1U, // XVSETEQZ_V  | 
5785  | 0  |     1U, // XVSETNEZ_V  | 
5786  | 0  |     17U,  // XVSHUF4I_B  | 
5787  | 0  |     9U, // XVSHUF4I_D  | 
5788  | 0  |     17U,  // XVSHUF4I_H  | 
5789  | 0  |     17U,  // XVSHUF4I_W  | 
5790  | 0  |     145U, // XVSHUF_B  | 
5791  | 0  |     9U, // XVSHUF_D  | 
5792  | 0  |     9U, // XVSHUF_H  | 
5793  | 0  |     9U, // XVSHUF_W  | 
5794  | 0  |     17U,  // XVSIGNCOV_B  | 
5795  | 0  |     17U,  // XVSIGNCOV_D  | 
5796  | 0  |     17U,  // XVSIGNCOV_H  | 
5797  | 0  |     17U,  // XVSIGNCOV_W  | 
5798  | 0  |     17U,  // XVSLEI_B  | 
5799  | 0  |     17U,  // XVSLEI_BU  | 
5800  | 0  |     17U,  // XVSLEI_D  | 
5801  | 0  |     17U,  // XVSLEI_DU  | 
5802  | 0  |     17U,  // XVSLEI_H  | 
5803  | 0  |     17U,  // XVSLEI_HU  | 
5804  | 0  |     17U,  // XVSLEI_W  | 
5805  | 0  |     17U,  // XVSLEI_WU  | 
5806  | 0  |     17U,  // XVSLE_B  | 
5807  | 0  |     17U,  // XVSLE_BU  | 
5808  | 0  |     17U,  // XVSLE_D  | 
5809  | 0  |     17U,  // XVSLE_DU  | 
5810  | 0  |     17U,  // XVSLE_H  | 
5811  | 0  |     17U,  // XVSLE_HU  | 
5812  | 0  |     17U,  // XVSLE_W  | 
5813  | 0  |     17U,  // XVSLE_WU  | 
5814  | 0  |     17U,  // XVSLLI_B  | 
5815  | 0  |     17U,  // XVSLLI_D  | 
5816  | 0  |     17U,  // XVSLLI_H  | 
5817  | 0  |     17U,  // XVSLLI_W  | 
5818  | 0  |     17U,  // XVSLLWIL_DU_WU  | 
5819  | 0  |     17U,  // XVSLLWIL_D_W  | 
5820  | 0  |     17U,  // XVSLLWIL_HU_BU  | 
5821  | 0  |     17U,  // XVSLLWIL_H_B  | 
5822  | 0  |     17U,  // XVSLLWIL_WU_HU  | 
5823  | 0  |     17U,  // XVSLLWIL_W_H  | 
5824  | 0  |     17U,  // XVSLL_B  | 
5825  | 0  |     17U,  // XVSLL_D  | 
5826  | 0  |     17U,  // XVSLL_H  | 
5827  | 0  |     17U,  // XVSLL_W  | 
5828  | 0  |     17U,  // XVSLTI_B  | 
5829  | 0  |     17U,  // XVSLTI_BU  | 
5830  | 0  |     17U,  // XVSLTI_D  | 
5831  | 0  |     17U,  // XVSLTI_DU  | 
5832  | 0  |     17U,  // XVSLTI_H  | 
5833  | 0  |     17U,  // XVSLTI_HU  | 
5834  | 0  |     17U,  // XVSLTI_W  | 
5835  | 0  |     17U,  // XVSLTI_WU  | 
5836  | 0  |     17U,  // XVSLT_B  | 
5837  | 0  |     17U,  // XVSLT_BU  | 
5838  | 0  |     17U,  // XVSLT_D  | 
5839  | 0  |     17U,  // XVSLT_DU  | 
5840  | 0  |     17U,  // XVSLT_H  | 
5841  | 0  |     17U,  // XVSLT_HU  | 
5842  | 0  |     17U,  // XVSLT_W  | 
5843  | 0  |     17U,  // XVSLT_WU  | 
5844  | 0  |     17U,  // XVSRAI_B  | 
5845  | 0  |     17U,  // XVSRAI_D  | 
5846  | 0  |     17U,  // XVSRAI_H  | 
5847  | 0  |     17U,  // XVSRAI_W  | 
5848  | 0  |     9U, // XVSRANI_B_H  | 
5849  | 0  |     9U, // XVSRANI_D_Q  | 
5850  | 0  |     9U, // XVSRANI_H_W  | 
5851  | 0  |     9U, // XVSRANI_W_D  | 
5852  | 0  |     17U,  // XVSRAN_B_H  | 
5853  | 0  |     17U,  // XVSRAN_H_W  | 
5854  | 0  |     17U,  // XVSRAN_W_D  | 
5855  | 0  |     17U,  // XVSRARI_B  | 
5856  | 0  |     17U,  // XVSRARI_D  | 
5857  | 0  |     17U,  // XVSRARI_H  | 
5858  | 0  |     17U,  // XVSRARI_W  | 
5859  | 0  |     9U, // XVSRARNI_B_H  | 
5860  | 0  |     9U, // XVSRARNI_D_Q  | 
5861  | 0  |     9U, // XVSRARNI_H_W  | 
5862  | 0  |     9U, // XVSRARNI_W_D  | 
5863  | 0  |     17U,  // XVSRARN_B_H  | 
5864  | 0  |     17U,  // XVSRARN_H_W  | 
5865  | 0  |     17U,  // XVSRARN_W_D  | 
5866  | 0  |     17U,  // XVSRAR_B  | 
5867  | 0  |     17U,  // XVSRAR_D  | 
5868  | 0  |     17U,  // XVSRAR_H  | 
5869  | 0  |     17U,  // XVSRAR_W  | 
5870  | 0  |     17U,  // XVSRA_B  | 
5871  | 0  |     17U,  // XVSRA_D  | 
5872  | 0  |     17U,  // XVSRA_H  | 
5873  | 0  |     17U,  // XVSRA_W  | 
5874  | 0  |     17U,  // XVSRLI_B  | 
5875  | 0  |     17U,  // XVSRLI_D  | 
5876  | 0  |     17U,  // XVSRLI_H  | 
5877  | 0  |     17U,  // XVSRLI_W  | 
5878  | 0  |     9U, // XVSRLNI_B_H  | 
5879  | 0  |     9U, // XVSRLNI_D_Q  | 
5880  | 0  |     9U, // XVSRLNI_H_W  | 
5881  | 0  |     9U, // XVSRLNI_W_D  | 
5882  | 0  |     17U,  // XVSRLN_B_H  | 
5883  | 0  |     17U,  // XVSRLN_H_W  | 
5884  | 0  |     17U,  // XVSRLN_W_D  | 
5885  | 0  |     17U,  // XVSRLRI_B  | 
5886  | 0  |     17U,  // XVSRLRI_D  | 
5887  | 0  |     17U,  // XVSRLRI_H  | 
5888  | 0  |     17U,  // XVSRLRI_W  | 
5889  | 0  |     9U, // XVSRLRNI_B_H  | 
5890  | 0  |     9U, // XVSRLRNI_D_Q  | 
5891  | 0  |     9U, // XVSRLRNI_H_W  | 
5892  | 0  |     9U, // XVSRLRNI_W_D  | 
5893  | 0  |     17U,  // XVSRLRN_B_H  | 
5894  | 0  |     17U,  // XVSRLRN_H_W  | 
5895  | 0  |     17U,  // XVSRLRN_W_D  | 
5896  | 0  |     17U,  // XVSRLR_B  | 
5897  | 0  |     17U,  // XVSRLR_D  | 
5898  | 0  |     17U,  // XVSRLR_H  | 
5899  | 0  |     17U,  // XVSRLR_W  | 
5900  | 0  |     17U,  // XVSRL_B  | 
5901  | 0  |     17U,  // XVSRL_D  | 
5902  | 0  |     17U,  // XVSRL_H  | 
5903  | 0  |     17U,  // XVSRL_W  | 
5904  | 0  |     9U, // XVSSRANI_BU_H  | 
5905  | 0  |     9U, // XVSSRANI_B_H  | 
5906  | 0  |     9U, // XVSSRANI_DU_Q  | 
5907  | 0  |     9U, // XVSSRANI_D_Q  | 
5908  | 0  |     9U, // XVSSRANI_HU_W  | 
5909  | 0  |     9U, // XVSSRANI_H_W  | 
5910  | 0  |     9U, // XVSSRANI_WU_D  | 
5911  | 0  |     9U, // XVSSRANI_W_D  | 
5912  | 0  |     17U,  // XVSSRAN_BU_H  | 
5913  | 0  |     17U,  // XVSSRAN_B_H  | 
5914  | 0  |     17U,  // XVSSRAN_HU_W  | 
5915  | 0  |     17U,  // XVSSRAN_H_W  | 
5916  | 0  |     17U,  // XVSSRAN_WU_D  | 
5917  | 0  |     17U,  // XVSSRAN_W_D  | 
5918  | 0  |     9U, // XVSSRARNI_BU_H  | 
5919  | 0  |     9U, // XVSSRARNI_B_H  | 
5920  | 0  |     9U, // XVSSRARNI_DU_Q  | 
5921  | 0  |     9U, // XVSSRARNI_D_Q  | 
5922  | 0  |     9U, // XVSSRARNI_HU_W  | 
5923  | 0  |     9U, // XVSSRARNI_H_W  | 
5924  | 0  |     9U, // XVSSRARNI_WU_D  | 
5925  | 0  |     9U, // XVSSRARNI_W_D  | 
5926  | 0  |     17U,  // XVSSRARN_BU_H  | 
5927  | 0  |     17U,  // XVSSRARN_B_H  | 
5928  | 0  |     17U,  // XVSSRARN_HU_W  | 
5929  | 0  |     17U,  // XVSSRARN_H_W  | 
5930  | 0  |     17U,  // XVSSRARN_WU_D  | 
5931  | 0  |     17U,  // XVSSRARN_W_D  | 
5932  | 0  |     9U, // XVSSRLNI_BU_H  | 
5933  | 0  |     9U, // XVSSRLNI_B_H  | 
5934  | 0  |     9U, // XVSSRLNI_DU_Q  | 
5935  | 0  |     9U, // XVSSRLNI_D_Q  | 
5936  | 0  |     9U, // XVSSRLNI_HU_W  | 
5937  | 0  |     9U, // XVSSRLNI_H_W  | 
5938  | 0  |     9U, // XVSSRLNI_WU_D  | 
5939  | 0  |     9U, // XVSSRLNI_W_D  | 
5940  | 0  |     17U,  // XVSSRLN_BU_H  | 
5941  | 0  |     17U,  // XVSSRLN_B_H  | 
5942  | 0  |     17U,  // XVSSRLN_HU_W  | 
5943  | 0  |     17U,  // XVSSRLN_H_W  | 
5944  | 0  |     17U,  // XVSSRLN_WU_D  | 
5945  | 0  |     17U,  // XVSSRLN_W_D  | 
5946  | 0  |     9U, // XVSSRLRNI_BU_H  | 
5947  | 0  |     9U, // XVSSRLRNI_B_H  | 
5948  | 0  |     9U, // XVSSRLRNI_DU_Q  | 
5949  | 0  |     9U, // XVSSRLRNI_D_Q  | 
5950  | 0  |     9U, // XVSSRLRNI_HU_W  | 
5951  | 0  |     9U, // XVSSRLRNI_H_W  | 
5952  | 0  |     9U, // XVSSRLRNI_WU_D  | 
5953  | 0  |     9U, // XVSSRLRNI_W_D  | 
5954  | 0  |     17U,  // XVSSRLRN_BU_H  | 
5955  | 0  |     17U,  // XVSSRLRN_B_H  | 
5956  | 0  |     17U,  // XVSSRLRN_HU_W  | 
5957  | 0  |     17U,  // XVSSRLRN_H_W  | 
5958  | 0  |     17U,  // XVSSRLRN_WU_D  | 
5959  | 0  |     17U,  // XVSSRLRN_W_D  | 
5960  | 0  |     17U,  // XVSSUB_B  | 
5961  | 0  |     17U,  // XVSSUB_BU  | 
5962  | 0  |     17U,  // XVSSUB_D  | 
5963  | 0  |     17U,  // XVSSUB_DU  | 
5964  | 0  |     17U,  // XVSSUB_H  | 
5965  | 0  |     17U,  // XVSSUB_HU  | 
5966  | 0  |     17U,  // XVSSUB_W  | 
5967  | 0  |     17U,  // XVSSUB_WU  | 
5968  | 0  |     17U,  // XVST  | 
5969  | 0  |     145U, // XVSTELM_B  | 
5970  | 0  |     145U, // XVSTELM_D  | 
5971  | 0  |     145U, // XVSTELM_H  | 
5972  | 0  |     145U, // XVSTELM_W  | 
5973  | 0  |     17U,  // XVSTX  | 
5974  | 0  |     17U,  // XVSUBI_BU  | 
5975  | 0  |     17U,  // XVSUBI_DU  | 
5976  | 0  |     17U,  // XVSUBI_HU  | 
5977  | 0  |     17U,  // XVSUBI_WU  | 
5978  | 0  |     17U,  // XVSUBWEV_D_W  | 
5979  | 0  |     17U,  // XVSUBWEV_D_WU  | 
5980  | 0  |     17U,  // XVSUBWEV_H_B  | 
5981  | 0  |     17U,  // XVSUBWEV_H_BU  | 
5982  | 0  |     17U,  // XVSUBWEV_Q_D  | 
5983  | 0  |     17U,  // XVSUBWEV_Q_DU  | 
5984  | 0  |     17U,  // XVSUBWEV_W_H  | 
5985  | 0  |     17U,  // XVSUBWEV_W_HU  | 
5986  | 0  |     17U,  // XVSUBWOD_D_W  | 
5987  | 0  |     17U,  // XVSUBWOD_D_WU  | 
5988  | 0  |     17U,  // XVSUBWOD_H_B  | 
5989  | 0  |     17U,  // XVSUBWOD_H_BU  | 
5990  | 0  |     17U,  // XVSUBWOD_Q_D  | 
5991  | 0  |     17U,  // XVSUBWOD_Q_DU  | 
5992  | 0  |     17U,  // XVSUBWOD_W_H  | 
5993  | 0  |     17U,  // XVSUBWOD_W_HU  | 
5994  | 0  |     17U,  // XVSUB_B  | 
5995  | 0  |     17U,  // XVSUB_D  | 
5996  | 0  |     17U,  // XVSUB_H  | 
5997  | 0  |     17U,  // XVSUB_Q  | 
5998  | 0  |     17U,  // XVSUB_W  | 
5999  | 0  |     17U,  // XVXORI_B  | 
6000  | 0  |     17U,  // XVXOR_V  | 
6001  | 0  |   };  | 
6002  |  |  | 
6003  |  |   // Emit the opcode for the instruction.  | 
6004  | 0  |   uint32_t Bits = 0;  | 
6005  | 0  |   Bits |= OpInfo0[MCInst_getOpcode(MI)] << 0;  | 
6006  | 0  |   Bits |= OpInfo1[MCInst_getOpcode(MI)] << 16;  | 
6007  | 0  |   MnemonicBitsInfo MBI = { | 
6008  | 0  | #ifndef CAPSTONE_DIET  | 
6009  | 0  |     AsmStrs+(Bits & 16383)-1,  | 
6010  |  | #else  | 
6011  |  |     NULL,  | 
6012  |  | #endif // CAPSTONE_DIET  | 
6013  | 0  |     Bits  | 
6014  | 0  |   };  | 
6015  | 0  |   return MBI;  | 
6016  | 0  | }  | 
6017  |  |  | 
6018  |  | /// printInstruction - This method is automatically generated by tablegen  | 
6019  |  | /// from the instruction set description.  | 
6020  | 0  | static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { | 
6021  | 0  |   SStream_concat0(O, "");  | 
6022  | 0  |   MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O);  | 
6023  |  | 
  | 
6024  | 0  |   SStream_concat0(O, MnemonicInfo.first);  | 
6025  |  | 
  | 
6026  | 0  |   uint32_t Bits = MnemonicInfo.second;  | 
6027  | 0  |   CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction.");  | 
6028  |  |  | 
6029  |  |   // Fragment 0 encoded into 2 bits for 4 unique commands.  | 
6030  | 0  |   switch ((Bits >> 14) & 3) { | 
6031  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
6032  | 0  |   case 0:  | 
6033  |  |     // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...  | 
6034  | 0  |     return;  | 
6035  | 0  |     break;  | 
6036  | 0  |   case 1:  | 
6037  |  |     // PseudoCALL36, PseudoLA_ABS, PseudoLA_ABS_LARGE, PseudoLA_GOT, PseudoLA...  | 
6038  | 0  |     printOperand(MI, 0, O);  | 
6039  | 0  |     break;  | 
6040  | 0  |   case 2:  | 
6041  |  |     // BSTRINS_D, BSTRINS_W, CSRWR, CSRXCHG, GCSRWR, GCSRXCHG, LU32I_D, MOVGR...  | 
6042  | 0  |     printOperand(MI, 1, O);  | 
6043  | 0  |     SStream_concat0(O, ", ");  | 
6044  | 0  |     printOperand(MI, 2, O);  | 
6045  | 0  |     break;  | 
6046  | 0  |   case 3:  | 
6047  |  |     // INVTLB  | 
6048  | 0  |     printOperand(MI, 2, O);  | 
6049  | 0  |     SStream_concat0(O, ", ");  | 
6050  | 0  |     printOperand(MI, 1, O);  | 
6051  | 0  |     SStream_concat0(O, ", ");  | 
6052  | 0  |     printOperand(MI, 0, O);  | 
6053  | 0  |     return;  | 
6054  | 0  |     break;  | 
6055  | 0  |   }  | 
6056  |  |  | 
6057  |  |  | 
6058  |  |   // Fragment 1 encoded into 2 bits for 3 unique commands.  | 
6059  | 0  |   switch ((Bits >> 16) & 3) { | 
6060  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
6061  | 0  |   case 0:  | 
6062  |  |     // PseudoCALL36, B, BL, BREAK, CSRWR, DBAR, DBCL, GCSRWR, HVCL, IBAR, IDL...  | 
6063  | 0  |     return;  | 
6064  | 0  |     break;  | 
6065  | 0  |   case 1:  | 
6066  |  |     // PseudoLA_ABS, PseudoLA_ABS_LARGE, PseudoLA_GOT, PseudoLA_GOT_LARGE, Ps...  | 
6067  | 0  |     SStream_concat0(O, ", ");  | 
6068  | 0  |     break;  | 
6069  | 0  |   case 2:  | 
6070  |  |     // SET_CFR_FALSE, SET_CFR_TRUE  | 
6071  | 0  |     SStream_concat0(O, ", $fa0, $fa0");  | 
6072  | 0  |     return;  | 
6073  | 0  |     break;  | 
6074  | 0  |   }  | 
6075  |  |  | 
6076  |  |  | 
6077  |  |   // Fragment 2 encoded into 2 bits for 3 unique commands.  | 
6078  | 0  |   switch ((Bits >> 18) & 3) { | 
6079  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
6080  | 0  |   case 0:  | 
6081  |  |     // PseudoLA_ABS, PseudoLA_GOT, PseudoLA_GOT_LARGE, PseudoLA_PCREL, Pseudo...  | 
6082  | 0  |     printOperand(MI, 1, O);  | 
6083  | 0  |     break;  | 
6084  | 0  |   case 1:  | 
6085  |  |     // PseudoLA_ABS_LARGE  | 
6086  | 0  |     printOperand(MI, 2, O);  | 
6087  | 0  |     return;  | 
6088  | 0  |     break;  | 
6089  | 0  |   case 2:  | 
6090  |  |     // BSTRINS_D, BSTRINS_W, CSRXCHG, GCSRXCHG, SC_D, SC_Q, SC_W, VBITSELI_B,...  | 
6091  | 0  |     printOperand(MI, 3, O);  | 
6092  | 0  |     break;  | 
6093  | 0  |   }  | 
6094  |  |  | 
6095  |  |  | 
6096  |  |   // Fragment 3 encoded into 1 bits for 2 unique commands.  | 
6097  | 0  |   if ((Bits >> 20) & 1) { | 
6098  |  |     // PseudoLA_GOT_LARGE, PseudoLA_PCREL_LARGE, PseudoLA_TLS_GD_LARGE, Pseud...  | 
6099  | 0  |     SStream_concat0(O, ", ");  | 
6100  | 0  |   } else { | 
6101  |  |     // PseudoLA_ABS, PseudoLA_GOT, PseudoLA_PCREL, PseudoLA_TLS_GD, PseudoLA_...  | 
6102  | 0  |     return;  | 
6103  | 0  |   }  | 
6104  |  |  | 
6105  |  |  | 
6106  |  |   // Fragment 4 encoded into 2 bits for 3 unique commands.  | 
6107  | 0  |   switch ((Bits >> 21) & 3) { | 
6108  | 0  |   default: CS_ASSERT_RET(0 && "Invalid command number.");  | 
6109  | 0  |   case 0:  | 
6110  |  |     // PseudoLA_GOT_LARGE, PseudoLA_PCREL_LARGE, PseudoLA_TLS_GD_LARGE, Pseud...  | 
6111  | 0  |     printOperand(MI, 2, O);  | 
6112  | 0  |     break;  | 
6113  | 0  |   case 1:  | 
6114  |  |     // AMADD_B, AMADD_D, AMADD_H, AMADD_W, AMADD__DB_B, AMADD__DB_D, AMADD__D...  | 
6115  | 0  |     printAtomicMemOp(MI, 2, O);  | 
6116  | 0  |     return;  | 
6117  | 0  |     break;  | 
6118  | 0  |   case 2:  | 
6119  |  |     // BSTRINS_D, BSTRINS_W  | 
6120  | 0  |     printOperand(MI, 4, O);  | 
6121  | 0  |     return;  | 
6122  | 0  |     break;  | 
6123  | 0  |   }  | 
6124  |  |  | 
6125  |  |  | 
6126  |  |   // Fragment 5 encoded into 1 bits for 2 unique commands.  | 
6127  | 0  |   if ((Bits >> 23) & 1) { | 
6128  |  |     // ALSL_D, ALSL_W, ALSL_WU, BSTRPICK_D, BSTRPICK_W, BYTEPICK_D, BYTEPICK_...  | 
6129  | 0  |     SStream_concat0(O, ", ");  | 
6130  | 0  |     printOperand(MI, 3, O);  | 
6131  | 0  |     return;  | 
6132  | 0  |   } else { | 
6133  |  |     // PseudoLA_GOT_LARGE, PseudoLA_PCREL_LARGE, PseudoLA_TLS_GD_LARGE, Pseud...  | 
6134  | 0  |     return;  | 
6135  | 0  |   }  | 
6136  |  | 
  | 
6137  | 0  | }  | 
6138  |  |  | 
6139  |  |  | 
6140  |  | /// getRegisterName - This method is automatically generated by tblgen  | 
6141  |  | /// from the register set description.  This returns the assembler name  | 
6142  |  | /// for the specified register.  | 
6143  |  | static const char *  | 
6144  | 0  | getRegisterName(unsigned RegNo, unsigned AltIdx) { | 
6145  | 0  | #ifndef CAPSTONE_DIET  | 
6146  | 0  |   CS_ASSERT_RET_VAL(RegNo && RegNo < 177 && "Invalid register number!", NULL);  | 
6147  |  |  | 
6148  | 0  |   static const char AsmStrsNoRegAltName[] = { | 
6149  | 0  |   /* 0 */ "f10\0"  | 
6150  | 0  |   /* 4 */ "vr10\0"  | 
6151  | 0  |   /* 9 */ "xr10\0"  | 
6152  | 0  |   /* 14 */ "f20\0"  | 
6153  | 0  |   /* 18 */ "vr20\0"  | 
6154  | 0  |   /* 23 */ "xr20\0"  | 
6155  | 0  |   /* 28 */ "f30\0"  | 
6156  | 0  |   /* 32 */ "vr30\0"  | 
6157  | 0  |   /* 37 */ "xr30\0"  | 
6158  | 0  |   /* 42 */ "fcc0\0"  | 
6159  | 0  |   /* 47 */ "f0\0"  | 
6160  | 0  |   /* 50 */ "scr0\0"  | 
6161  | 0  |   /* 55 */ "fcsr0\0"  | 
6162  | 0  |   /* 61 */ "vr0\0"  | 
6163  | 0  |   /* 65 */ "xr0\0"  | 
6164  | 0  |   /* 69 */ "f11\0"  | 
6165  | 0  |   /* 73 */ "vr11\0"  | 
6166  | 0  |   /* 78 */ "xr11\0"  | 
6167  | 0  |   /* 83 */ "f21\0"  | 
6168  | 0  |   /* 87 */ "vr21\0"  | 
6169  | 0  |   /* 92 */ "xr21\0"  | 
6170  | 0  |   /* 97 */ "f31\0"  | 
6171  | 0  |   /* 101 */ "vr31\0"  | 
6172  | 0  |   /* 106 */ "xr31\0"  | 
6173  | 0  |   /* 111 */ "fcc1\0"  | 
6174  | 0  |   /* 116 */ "f1\0"  | 
6175  | 0  |   /* 119 */ "scr1\0"  | 
6176  | 0  |   /* 124 */ "fcsr1\0"  | 
6177  | 0  |   /* 130 */ "vr1\0"  | 
6178  | 0  |   /* 134 */ "xr1\0"  | 
6179  | 0  |   /* 138 */ "f12\0"  | 
6180  | 0  |   /* 142 */ "vr12\0"  | 
6181  | 0  |   /* 147 */ "xr12\0"  | 
6182  | 0  |   /* 152 */ "f22\0"  | 
6183  | 0  |   /* 156 */ "vr22\0"  | 
6184  | 0  |   /* 161 */ "xr22\0"  | 
6185  | 0  |   /* 166 */ "fcc2\0"  | 
6186  | 0  |   /* 171 */ "f2\0"  | 
6187  | 0  |   /* 174 */ "scr2\0"  | 
6188  | 0  |   /* 179 */ "fcsr2\0"  | 
6189  | 0  |   /* 185 */ "vr2\0"  | 
6190  | 0  |   /* 189 */ "xr2\0"  | 
6191  | 0  |   /* 193 */ "f13\0"  | 
6192  | 0  |   /* 197 */ "vr13\0"  | 
6193  | 0  |   /* 202 */ "xr13\0"  | 
6194  | 0  |   /* 207 */ "f23\0"  | 
6195  | 0  |   /* 211 */ "vr23\0"  | 
6196  | 0  |   /* 216 */ "xr23\0"  | 
6197  | 0  |   /* 221 */ "fcc3\0"  | 
6198  | 0  |   /* 226 */ "f3\0"  | 
6199  | 0  |   /* 229 */ "scr3\0"  | 
6200  | 0  |   /* 234 */ "fcsr3\0"  | 
6201  | 0  |   /* 240 */ "vr3\0"  | 
6202  | 0  |   /* 244 */ "xr3\0"  | 
6203  | 0  |   /* 248 */ "f14\0"  | 
6204  | 0  |   /* 252 */ "vr14\0"  | 
6205  | 0  |   /* 257 */ "xr14\0"  | 
6206  | 0  |   /* 262 */ "f24\0"  | 
6207  | 0  |   /* 266 */ "vr24\0"  | 
6208  | 0  |   /* 271 */ "xr24\0"  | 
6209  | 0  |   /* 276 */ "fcc4\0"  | 
6210  | 0  |   /* 281 */ "f4\0"  | 
6211  | 0  |   /* 284 */ "vr4\0"  | 
6212  | 0  |   /* 288 */ "xr4\0"  | 
6213  | 0  |   /* 292 */ "f15\0"  | 
6214  | 0  |   /* 296 */ "vr15\0"  | 
6215  | 0  |   /* 301 */ "xr15\0"  | 
6216  | 0  |   /* 306 */ "f25\0"  | 
6217  | 0  |   /* 310 */ "vr25\0"  | 
6218  | 0  |   /* 315 */ "xr25\0"  | 
6219  | 0  |   /* 320 */ "fcc5\0"  | 
6220  | 0  |   /* 325 */ "f5\0"  | 
6221  | 0  |   /* 328 */ "vr5\0"  | 
6222  | 0  |   /* 332 */ "xr5\0"  | 
6223  | 0  |   /* 336 */ "f16\0"  | 
6224  | 0  |   /* 340 */ "vr16\0"  | 
6225  | 0  |   /* 345 */ "xr16\0"  | 
6226  | 0  |   /* 350 */ "f26\0"  | 
6227  | 0  |   /* 354 */ "vr26\0"  | 
6228  | 0  |   /* 359 */ "xr26\0"  | 
6229  | 0  |   /* 364 */ "fcc6\0"  | 
6230  | 0  |   /* 369 */ "f6\0"  | 
6231  | 0  |   /* 372 */ "vr6\0"  | 
6232  | 0  |   /* 376 */ "xr6\0"  | 
6233  | 0  |   /* 380 */ "f17\0"  | 
6234  | 0  |   /* 384 */ "vr17\0"  | 
6235  | 0  |   /* 389 */ "xr17\0"  | 
6236  | 0  |   /* 394 */ "f27\0"  | 
6237  | 0  |   /* 398 */ "vr27\0"  | 
6238  | 0  |   /* 403 */ "xr27\0"  | 
6239  | 0  |   /* 408 */ "fcc7\0"  | 
6240  | 0  |   /* 413 */ "f7\0"  | 
6241  | 0  |   /* 416 */ "vr7\0"  | 
6242  | 0  |   /* 420 */ "xr7\0"  | 
6243  | 0  |   /* 424 */ "f18\0"  | 
6244  | 0  |   /* 428 */ "vr18\0"  | 
6245  | 0  |   /* 433 */ "xr18\0"  | 
6246  | 0  |   /* 438 */ "f28\0"  | 
6247  | 0  |   /* 442 */ "vr28\0"  | 
6248  | 0  |   /* 447 */ "xr28\0"  | 
6249  | 0  |   /* 452 */ "f8\0"  | 
6250  | 0  |   /* 455 */ "vr8\0"  | 
6251  | 0  |   /* 459 */ "xr8\0"  | 
6252  | 0  |   /* 463 */ "f19\0"  | 
6253  | 0  |   /* 467 */ "vr19\0"  | 
6254  | 0  |   /* 472 */ "xr19\0"  | 
6255  | 0  |   /* 477 */ "f29\0"  | 
6256  | 0  |   /* 481 */ "vr29\0"  | 
6257  | 0  |   /* 486 */ "xr29\0"  | 
6258  | 0  |   /* 491 */ "f9\0"  | 
6259  | 0  |   /* 494 */ "vr9\0"  | 
6260  | 0  |   /* 498 */ "xr9\0"  | 
6261  | 0  | };  | 
6262  | 0  |   static const uint16_t RegAsmOffsetNoRegAltName[] = { | 
6263  | 0  |     47, 116, 171, 226, 281, 325, 369, 413, 452, 491, 0, 69, 138, 193,   | 
6264  | 0  |     248, 292, 336, 380, 424, 463, 14, 83, 152, 207, 262, 306, 350, 394,   | 
6265  | 0  |     438, 477, 28, 97, 42, 111, 166, 221, 276, 320, 364, 408, 55, 124,   | 
6266  | 0  |     179, 234, 52, 121, 176, 231, 285, 329, 373, 417, 456, 495, 5, 74,   | 
6267  | 0  |     143, 198, 253, 297, 341, 385, 429, 468, 19, 88, 157, 212, 267, 311,   | 
6268  | 0  |     355, 399, 443, 482, 33, 102, 50, 119, 174, 229, 61, 130, 185, 240,   | 
6269  | 0  |     284, 328, 372, 416, 455, 494, 4, 73, 142, 197, 252, 296, 340, 384,   | 
6270  | 0  |     428, 467, 18, 87, 156, 211, 266, 310, 354, 398, 442, 481, 32, 101,   | 
6271  | 0  |     65, 134, 189, 244, 288, 332, 376, 420, 459, 498, 9, 78, 147, 202,   | 
6272  | 0  |     257, 301, 345, 389, 433, 472, 23, 92, 161, 216, 271, 315, 359, 403,   | 
6273  | 0  |     447, 486, 37, 106, 47, 116, 171, 226, 281, 325, 369, 413, 452, 491,   | 
6274  | 0  |     0, 69, 138, 193, 248, 292, 336, 380, 424, 463, 14, 83, 152, 207,   | 
6275  | 0  |     262, 306, 350, 394, 438, 477, 28, 97,   | 
6276  | 0  |   };  | 
6277  |  | 
  | 
6278  | 0  |   static const char AsmStrsRegAliasName[] = { | 
6279  | 0  |   /* 0 */ "ft10\0"  | 
6280  | 0  |   /* 5 */ "fa0\0"  | 
6281  | 0  |   /* 9 */ "fs0\0"  | 
6282  | 0  |   /* 13 */ "ft0\0"  | 
6283  | 0  |   /* 17 */ "ft11\0"  | 
6284  | 0  |   /* 22 */ "fa1\0"  | 
6285  | 0  |   /* 26 */ "fs1\0"  | 
6286  | 0  |   /* 30 */ "ft1\0"  | 
6287  | 0  |   /* 34 */ "ft12\0"  | 
6288  | 0  |   /* 39 */ "fa2\0"  | 
6289  | 0  |   /* 43 */ "fs2\0"  | 
6290  | 0  |   /* 47 */ "ft2\0"  | 
6291  | 0  |   /* 51 */ "ft13\0"  | 
6292  | 0  |   /* 56 */ "fa3\0"  | 
6293  | 0  |   /* 60 */ "fs3\0"  | 
6294  | 0  |   /* 64 */ "ft3\0"  | 
6295  | 0  |   /* 68 */ "ft14\0"  | 
6296  | 0  |   /* 73 */ "fa4\0"  | 
6297  | 0  |   /* 77 */ "fs4\0"  | 
6298  | 0  |   /* 81 */ "ft4\0"  | 
6299  | 0  |   /* 85 */ "ft15\0"  | 
6300  | 0  |   /* 90 */ "fa5\0"  | 
6301  | 0  |   /* 94 */ "fs5\0"  | 
6302  | 0  |   /* 98 */ "ft5\0"  | 
6303  | 0  |   /* 102 */ "fa6\0"  | 
6304  | 0  |   /* 106 */ "fs6\0"  | 
6305  | 0  |   /* 110 */ "ft6\0"  | 
6306  | 0  |   /* 114 */ "fa7\0"  | 
6307  | 0  |   /* 118 */ "fs7\0"  | 
6308  | 0  |   /* 122 */ "ft7\0"  | 
6309  | 0  |   /* 126 */ "s8\0"  | 
6310  | 0  |   /* 129 */ "ft8\0"  | 
6311  | 0  |   /* 133 */ "ft9\0"  | 
6312  | 0  |   /* 137 */ "ra\0"  | 
6313  | 0  |   /* 140 */ "zero\0"  | 
6314  | 0  |   /* 145 */ "fp\0"  | 
6315  | 0  |   /* 148 */ "sp\0"  | 
6316  | 0  |   /* 151 */ "tp\0"  | 
6317  | 0  | };  | 
6318  | 0  |   static const uint8_t RegAsmOffsetRegAliasName[] = { | 
6319  | 0  |     5, 22, 39, 56, 73, 90, 102, 114, 13, 30, 47, 64, 81, 98,   | 
6320  | 0  |     110, 122, 129, 133, 0, 17, 34, 51, 68, 85, 9, 26, 43, 60,   | 
6321  | 0  |     77, 94, 106, 118, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6322  | 0  |     4, 4, 140, 137, 151, 148, 6, 23, 40, 57, 74, 91, 103, 115,   | 
6323  | 0  |     14, 31, 48, 65, 82, 99, 111, 123, 130, 4, 145, 10, 27, 44,   | 
6324  | 0  |     61, 78, 95, 107, 119, 126, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6325  | 0  |     4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6326  | 0  |     4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6327  | 0  |     4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6328  | 0  |     4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,   | 
6329  | 0  |     4, 4, 4, 4, 5, 22, 39, 56, 73, 90, 102, 114, 13, 30,   | 
6330  | 0  |     47, 64, 81, 98, 110, 122, 129, 133, 0, 17, 34, 51, 68, 85,   | 
6331  | 0  |     9, 26, 43, 60, 77, 94, 106, 118,   | 
6332  | 0  |   };  | 
6333  |  | 
  | 
6334  | 0  |   switch(AltIdx) { | 
6335  | 0  |   default: CS_ASSERT_RET_VAL(0 && "Invalid register alt name index!", NULL);  | 
6336  | 0  |   case LoongArch_NoRegAltName:  | 
6337  | 0  |     CS_ASSERT_RET_VAL(*(AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1]) &&  | 
6338  | 0  |            "Invalid alt name index for register!", NULL);  | 
6339  | 0  |     return AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1];  | 
6340  | 0  |   case LoongArch_RegAliasName:  | 
6341  | 0  |     if (!*(AsmStrsRegAliasName+RegAsmOffsetRegAliasName[RegNo-1]))  | 
6342  | 0  |       return getRegisterName(RegNo, LoongArch_NoRegAltName);  | 
6343  | 0  |     return AsmStrsRegAliasName+RegAsmOffsetRegAliasName[RegNo-1];  | 
6344  | 0  |   }  | 
6345  |  | #else  | 
6346  |  |   return NULL;  | 
6347  |  | #endif // CAPSTONE_DIET  | 
6348  | 0  | }  | 
6349  |  | #ifdef PRINT_ALIAS_INSTR  | 
6350  |  | #undef PRINT_ALIAS_INSTR  | 
6351  |  |  | 
6352  | 0  | static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { | 
6353  | 0  | #ifndef CAPSTONE_DIET  | 
6354  | 0  |   static const PatternsForOpcode OpToPatterns[] = { | 
6355  | 0  |     {LoongArch_PseudoLA_ABS, 0, 1 }, | 
6356  | 0  |     {LoongArch_PseudoLA_GOT_LARGE, 1, 1 }, | 
6357  | 0  |     {LoongArch_PseudoLA_PCREL, 2, 1 }, | 
6358  | 0  |     {LoongArch_PseudoLA_PCREL_LARGE, 3, 2 }, | 
6359  | 0  |     {LoongArch_ANDI, 5, 1 }, | 
6360  | 0  |     {LoongArch_JIRL, 6, 2 }, | 
6361  | 0  |     {LoongArch_OR, 8, 1 }, | 
6362  | 0  |   {0},  }; | 
6363  |  | 
  | 
6364  | 0  |   static const AliasPattern Patterns[] = { | 
6365  |  |     // LoongArch_PseudoLA_ABS - 0  | 
6366  | 0  |     {0, 0, 2, 2 }, | 
6367  |  |     // LoongArch_PseudoLA_GOT_LARGE - 1  | 
6368  | 0  |     {16, 2, 3, 2 }, | 
6369  |  |     // LoongArch_PseudoLA_PCREL - 2  | 
6370  | 0  |     {0, 4, 2, 1 }, | 
6371  |  |     // LoongArch_PseudoLA_PCREL_LARGE - 3  | 
6372  | 0  |     {37, 5, 3, 2 }, | 
6373  | 0  |     {16, 7, 3, 3 }, | 
6374  |  |     // LoongArch_ANDI - 5  | 
6375  | 0  |     {57, 10, 3, 3 }, | 
6376  |  |     // LoongArch_JIRL - 6  | 
6377  | 0  |     {61, 13, 3, 3 }, | 
6378  | 0  |     {65, 16, 3, 3 }, | 
6379  |  |     // LoongArch_OR - 8  | 
6380  | 0  |     {71, 19, 3, 3 }, | 
6381  | 0  |   {0},  }; | 
6382  |  | 
  | 
6383  | 0  |   static const AliasPatternCond Conds[] = { | 
6384  |  |     // (PseudoLA_ABS GPR:$dst, bare_symbol:$src) - 0  | 
6385  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6386  | 0  |     {AliasPatternCond_K_Feature, LoongArch_LaLocalWithAbs}, | 
6387  |  |     // (PseudoLA_GOT_LARGE GPR:$dst, GPR:$tmp, bare_symbol:$src) - 2  | 
6388  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6389  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6390  |  |     // (PseudoLA_PCREL GPR:$dst, bare_symbol:$src) - 4  | 
6391  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6392  |  |     // (PseudoLA_PCREL_LARGE GPR:$dst, GPR:$tmp, bare_symbol:$src) - 5  | 
6393  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6394  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6395  |  |     // (PseudoLA_PCREL_LARGE GPR:$dst, GPR:$tmp, bare_symbol:$src) - 7  | 
6396  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6397  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6398  | 0  |     {AliasPatternCond_K_Feature, LoongArch_LaGlobalWithPcrel}, | 
6399  |  |     // (ANDI R0, R0, 0) - 10  | 
6400  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R0}, | 
6401  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R0}, | 
6402  | 0  |     {AliasPatternCond_K_Imm, (uint32_t)0}, | 
6403  |  |     // (JIRL R0, R1, 0) - 13  | 
6404  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R0}, | 
6405  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R1}, | 
6406  | 0  |     {AliasPatternCond_K_Imm, (uint32_t)0}, | 
6407  |  |     // (JIRL R0, GPR:$rj, 0) - 16  | 
6408  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R0}, | 
6409  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6410  | 0  |     {AliasPatternCond_K_Imm, (uint32_t)0}, | 
6411  |  |     // (OR GPR:$dst, GPR:$src, R0) - 19  | 
6412  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6413  | 0  |     {AliasPatternCond_K_RegClass, LoongArch_GPRRegClassID}, | 
6414  | 0  |     {AliasPatternCond_K_Reg, LoongArch_R0}, | 
6415  | 0  |   {0},  }; | 
6416  |  | 
  | 
6417  | 0  |   static const char AsmStrings[] =  | 
6418  | 0  |     /* 0 */ "la.local $\x01, $\x02\0"  | 
6419  | 0  |     /* 16 */ "la.global $\x01, $\x02, $\x03\0"  | 
6420  | 0  |     /* 37 */ "la.local $\x01, $\x02, $\x03\0"  | 
6421  | 0  |     /* 57 */ "nop\0"  | 
6422  | 0  |     /* 61 */ "ret\0"  | 
6423  | 0  |     /* 65 */ "jr $\x02\0"  | 
6424  | 0  |     /* 71 */ "move $\x01, $\x02\0"  | 
6425  | 0  |   ;  | 
6426  |  | 
  | 
6427  | 0  | #ifndef NDEBUG  | 
6428  |  |   //static struct SortCheck { | 
6429  |  |   //  SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) { | 
6430  |  |   //    assert(std::is_sorted(  | 
6431  |  |   //               OpToPatterns.begin(), OpToPatterns.end(),  | 
6432  |  |   //               [](const PatternsForOpcode &L, const //PatternsForOpcode &R) { | 
6433  |  |   //                 return L.Opcode < R.Opcode;  | 
6434  |  |   //               }) &&  | 
6435  |  |   //           "tablegen failed to sort opcode patterns");  | 
6436  |  |   //  }  | 
6437  |  |   //} sortCheckVar(OpToPatterns);  | 
6438  | 0  | #endif  | 
6439  |  | 
  | 
6440  | 0  |   AliasMatchingData M = { | 
6441  | 0  |     OpToPatterns,  | 
6442  | 0  |     Patterns,  | 
6443  | 0  |     Conds,  | 
6444  | 0  |     AsmStrings,  | 
6445  | 0  |     NULL,  | 
6446  | 0  |   };  | 
6447  | 0  |   const char *AsmString = matchAliasPatterns(MI, &M);  | 
6448  | 0  |   if (!AsmString) return false;  | 
6449  |  |  | 
6450  | 0  |   unsigned I = 0;  | 
6451  | 0  |   while (AsmString[I] != ' ' && AsmString[I] != '\t' &&  | 
6452  | 0  |          AsmString[I] != '$' && AsmString[I] != '\0')  | 
6453  | 0  |     ++I;  | 
6454  | 0  |   SStream_concat1(OS, '\t');  | 
6455  | 0  |   char *substr = malloc(I+1);  | 
6456  | 0  |   memcpy(substr, AsmString, I);  | 
6457  | 0  |   substr[I] = '\0';  | 
6458  | 0  |   SStream_concat0(OS, substr);  | 
6459  | 0  |   free(substr);  | 
6460  | 0  |   if (AsmString[I] != '\0') { | 
6461  | 0  |     if (AsmString[I] == ' ' || AsmString[I] == '\t') { | 
6462  | 0  |       SStream_concat1(OS, '\t');  | 
6463  | 0  |       ++I;  | 
6464  | 0  |     }  | 
6465  | 0  |     do { | 
6466  | 0  |       if (AsmString[I] == '$') { | 
6467  | 0  |         ++I;  | 
6468  | 0  |         if (AsmString[I] == (char)0xff) { | 
6469  | 0  |           ++I;  | 
6470  | 0  |           int OpIdx = AsmString[I++] - 1;  | 
6471  | 0  |           int PrintMethodIdx = AsmString[I++] - 1;  | 
6472  | 0  |           printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS);  | 
6473  | 0  |         } else  | 
6474  | 0  |           printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS);  | 
6475  | 0  |       } else { | 
6476  | 0  |         SStream_concat1(OS, AsmString[I++]);  | 
6477  | 0  |       }  | 
6478  | 0  |     } while (AsmString[I] != '\0');  | 
6479  | 0  |   }  | 
6480  |  | 
  | 
6481  | 0  |   return true;  | 
6482  |  | #else  | 
6483  |  |   return false;  | 
6484  |  | #endif // CAPSTONE_DIET  | 
6485  | 0  | }  | 
6486  |  |  | 
6487  |  | static void printCustomAliasOperand(  | 
6488  |  |          MCInst *MI, uint64_t Address, unsigned OpIdx,  | 
6489  |  |          unsigned PrintMethodIdx,  | 
6490  | 0  |          SStream *OS) { | 
6491  | 0  | #ifndef CAPSTONE_DIET  | 
6492  | 0  |   CS_ASSERT_RET(0 && "Unknown PrintMethod kind");  | 
6493  | 0  | #endif // CAPSTONE_DIET  | 
6494  | 0  | }  | 
6495  |  |  | 
6496  |  | #endif // PRINT_ALIAS_INSTR  |