/src/capstonenext/arch/LoongArch/LoongArchInstPrinter.c
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1  |  | /* Capstone Disassembly Engine, http://www.capstone-engine.org */  | 
2  |  | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */  | 
3  |  | /*    Rot127 <unisono@quyllur.org> 2022-2023 */  | 
4  |  | /* Automatically translated source file from LLVM. */  | 
5  |  |  | 
6  |  | /* LLVM-commit: <commit> */  | 
7  |  | /* LLVM-tag: <tag> */  | 
8  |  |  | 
9  |  | /* Only small edits allowed. */  | 
10  |  | /* For multiple similar edits, please create a Patch for the translator. */  | 
11  |  |  | 
12  |  | /* Capstone's C++ file translator: */  | 
13  |  | /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */  | 
14  |  |  | 
15  |  | //===- LoongArchInstPrinter.cpp - Convert LoongArch MCInst to asm syntax --===//  | 
16  |  | //  | 
17  |  | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.  | 
18  |  | // See https://llvm.org/LICENSE.txt for license information.  | 
19  |  | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception  | 
20  |  | //  | 
21  |  | //===----------------------------------------------------------------------===//  | 
22  |  | //  | 
23  |  | // This class prints an LoongArch MCInst to a .s file.  | 
24  |  | //  | 
25  |  | //===----------------------------------------------------------------------===//  | 
26  |  |  | 
27  |  | #include <stdio.h>  | 
28  |  | #include <string.h>  | 
29  |  | #include <stdlib.h>  | 
30  |  | #include <capstone/platform.h>  | 
31  |  |  | 
32  |  | #include "LoongArchMapping.h"  | 
33  |  | #include "LoongArchInstPrinter.h"  | 
34  |  |  | 
35  |  | #define GET_SUBTARGETINFO_ENUM  | 
36  |  | #include "LoongArchGenSubtargetInfo.inc"  | 
37  |  |  | 
38  |  | #define GET_INSTRINFO_ENUM  | 
39  |  | #include "LoongArchGenInstrInfo.inc"  | 
40  |  |  | 
41  |  | #define GET_REGINFO_ENUM  | 
42  |  | #include "LoongArchGenRegisterInfo.inc"  | 
43  |  |  | 
44  |  | #define CONCAT(a, b) CONCAT_(a, b)  | 
45  |  | #define CONCAT_(a, b) a##_##b  | 
46  |  |  | 
47  |  | #define DEBUG_TYPE "loongarch-asm-printer"  | 
48  |  |  | 
49  |  | // Include the auto-generated portion of the assembly writer.  | 
50  |  | #define PRINT_ALIAS_INSTR  | 
51  |  | #include "LoongArchGenAsmWriter.inc"  | 
52  |  |  | 
53  |  | static void printInst(MCInst *MI, uint64_t Address, const char *Annot,  | 
54  |  |           SStream *O)  | 
55  | 0  | { | 
56  | 0  |   bool useAliasDetails = map_use_alias_details(MI);  | 
57  | 0  |   map_set_fill_detail_ops(MI, useAliasDetails);  | 
58  |  | 
  | 
59  | 0  |   bool isAlias = printAliasInstr(MI, Address, O);  | 
60  |  | 
  | 
61  | 0  |   MCInst_setIsAlias(MI, isAlias);  | 
62  | 0  |   if (!isAlias || !useAliasDetails) { | 
63  | 0  |     map_set_fill_detail_ops(MI, !(isAlias && useAliasDetails));  | 
64  | 0  |     if (isAlias)  | 
65  | 0  |       SStream_Close(O);  | 
66  | 0  |     printInstruction(MI, Address, O);  | 
67  | 0  |     if (isAlias)  | 
68  | 0  |       SStream_Open(O);  | 
69  | 0  |   }  | 
70  | 0  | }  | 
71  |  |  | 
72  |  | void LoongArch_LLVM_printInst(MCInst *MI, uint64_t Address, const char *Annot,  | 
73  |  |             SStream *O)  | 
74  | 0  | { | 
75  | 0  |   printInst(MI, Address, Annot, O);  | 
76  | 0  | }  | 
77  |  |  | 
78  |  | const char *LoongArch_LLVM_getRegisterName(unsigned RegNo, unsigned AltIdx)  | 
79  | 0  | { | 
80  | 0  |   return getRegisterName(RegNo, AltIdx);  | 
81  | 0  | }  | 
82  |  |  | 
83  |  | static void printRegName(MCInst *MI, SStream *O, MCRegister Reg)  | 
84  | 0  | { | 
85  | 0  |   int syntax_opt = MI->csh->syntax;  | 
86  | 0  |   if (!(syntax_opt & CS_OPT_SYNTAX_NO_DOLLAR)) { | 
87  | 0  |     SStream_concat1(O, '$');  | 
88  | 0  |   }  | 
89  | 0  |   SStream_concat0(O, getRegisterName(Reg, LoongArch_RegAliasName));  | 
90  | 0  | }  | 
91  |  |  | 
92  |  | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O)  | 
93  | 0  | { | 
94  | 0  |   add_cs_detail(MI, LoongArch_OP_GROUP_Operand, OpNo);  | 
95  | 0  |   MCOperand *MO = MCInst_getOperand(MI, (OpNo));  | 
96  |  | 
  | 
97  | 0  |   if (MCOperand_isReg(MO)) { | 
98  | 0  |     printRegName(MI, O, MCOperand_getReg(MO));  | 
99  | 0  |     return;  | 
100  | 0  |   }  | 
101  |  |  | 
102  | 0  |   if (MCOperand_isImm(MO)) { | 
103  |  |     // rewrite offset immediate operand to absolute address in direct branch instructions  | 
104  |  |     // convert e.g.  | 
105  |  |     // 0x1000: beqz $t0, 0xc  | 
106  |  |     // to:  | 
107  |  |     // 0x1000: beqz $t0, 0x100c  | 
108  | 0  |     switch (MI->flat_insn->id) { | 
109  | 0  |     case LOONGARCH_INS_B:  | 
110  | 0  |     case LOONGARCH_INS_BCEQZ:  | 
111  | 0  |     case LOONGARCH_INS_BCNEZ:  | 
112  | 0  |     case LOONGARCH_INS_BEQ:  | 
113  | 0  |     case LOONGARCH_INS_BEQZ:  | 
114  | 0  |     case LOONGARCH_INS_BGE:  | 
115  | 0  |     case LOONGARCH_INS_BGEU:  | 
116  | 0  |     case LOONGARCH_INS_BL:  | 
117  | 0  |     case LOONGARCH_INS_BLT:  | 
118  | 0  |     case LOONGARCH_INS_BLTU:  | 
119  | 0  |     case LOONGARCH_INS_BNE:  | 
120  | 0  |     case LOONGARCH_INS_BNEZ:  | 
121  | 0  |       printInt64(O, MCOperand_getImm(MO) + MI->address);  | 
122  | 0  |       return;  | 
123  |  |  | 
124  | 0  |     default:  | 
125  | 0  |       break;  | 
126  | 0  |     }  | 
127  |  |  | 
128  | 0  |     printInt64(O, MCOperand_getImm(MO));  | 
129  | 0  |     return;  | 
130  | 0  |   }  | 
131  |  |  | 
132  | 0  |   CS_ASSERT_RET(0 && "Expressions are not supported.");  | 
133  | 0  | }  | 
134  |  |  | 
135  |  | static void printAtomicMemOp(MCInst *MI, unsigned OpNo, SStream *O)  | 
136  | 0  | { | 
137  | 0  |   add_cs_detail(MI, LoongArch_OP_GROUP_AtomicMemOp, OpNo);  | 
138  | 0  |   MCOperand *MO = MCInst_getOperand(MI, (OpNo));  | 
139  |  | 
  | 
140  | 0  |   printRegName(MI, O, MCOperand_getReg(MO));  | 
141  | 0  | }  |