/src/capstonenext/suite/fuzz/platform.c
Line  | Count  | Source  | 
1  |  | #include "platform.h"  | 
2  |  |  | 
3  |  | struct platform platforms[] = { | 
4  |  |   { // item 0 | 
5  |  |     CS_ARCH_X86, CS_MODE_32, "X86 32 (Intel syntax)", "x32" },  | 
6  |  |   { // item 1 | 
7  |  |     CS_ARCH_X86, CS_MODE_64, "X86 64 (Intel syntax)", "x64" },  | 
8  |  |   { // item 2 | 
9  |  |     CS_ARCH_ARM, CS_MODE_ARM, "ARM", "arm" },  | 
10  |  |   { // item 3 | 
11  |  |     CS_ARCH_ARM, CS_MODE_THUMB, "THUMB", "thumb" },  | 
12  |  |   { // item 4 | 
13  |  |     CS_ARCH_ARM, (cs_mode)(CS_MODE_ARM + CS_MODE_V8), "Arm-V8", "armv8" },  | 
14  |  |   { // item 5 | 
15  |  |     CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_V8), "THUMB+V8",  | 
16  |  |     "thumbv8" },  | 
17  |  |   { // item 6 | 
18  |  |     CS_ARCH_ARM, (cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS),  | 
19  |  |     "Thumb-MClass", "cortexm" },  | 
20  |  |   { // item 7 | 
21  |  |     CS_ARCH_AARCH64, (cs_mode)0, "AARCH64", "aarch64" },  | 
22  |  |   { // item 8 | 
23  |  |     CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),  | 
24  |  |     "MIPS-32 (Big-endian)", "mipsbe" },  | 
25  |  |   { // item 9 | 
26  |  |     CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO),  | 
27  |  |     "MIPS-32 (micro)", "mipsmicro" },  | 
28  |  |   { //item 10 | 
29  |  |     CS_ARCH_MIPS, CS_MODE_MIPS64, "MIPS-64-EL (Little-endian)",  | 
30  |  |     "mips64" },  | 
31  |  |   { //item 11 | 
32  |  |     CS_ARCH_MIPS, CS_MODE_MIPS32, "MIPS-32-EL (Little-endian)", "mips" },  | 
33  |  |   { //item 12 | 
34  |  |     CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS64 + CS_MODE_BIG_ENDIAN),  | 
35  |  |     "MIPS-64 (Big-endian)", "mips64be" },  | 
36  |  |   { //item 13 | 
37  |  |     CS_ARCH_MIPS,  | 
38  |  |     (cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),  | 
39  |  |     "MIPS-32 | Micro (Big-endian)", "mipsbemicro" },  | 
40  |  |   { //item 14 | 
41  |  |     CS_ARCH_PPC, CS_MODE_64 | CS_MODE_BIG_ENDIAN, "PPC-64", "ppc64be" },  | 
42  |  |   { //item 15 | 
43  |  |     CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", "sparc" },  | 
44  |  |   { //item 16 | 
45  |  |     CS_ARCH_SPARC, (cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9), "SparcV9",  | 
46  |  |     "sparcv9" },  | 
47  |  |   { //item 17 | 
48  |  |     CS_ARCH_SYSTEMZ, (cs_mode)CS_MODE_BIG_ENDIAN, "SystemZ", "systemz" },  | 
49  |  |   { //item 18 | 
50  |  |     CS_ARCH_XCORE, (cs_mode)0, "XCore", "xcore" },  | 
51  |  |   { //item 19 | 
52  |  |     CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN),  | 
53  |  |     "MIPS-32R6 (Big-endian)", "mipsbe32r6" },  | 
54  |  |   { //item 20 | 
55  |  |     CS_ARCH_MIPS,  | 
56  |  |     (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),  | 
57  |  |     "MIPS-32R6 (Micro+Big-endian)", "mipsbe32r6micro" },  | 
58  |  |   { //item 21 | 
59  |  |     CS_ARCH_MIPS, CS_MODE_MIPS32R6, "MIPS-32R6 (Little-endian)",  | 
60  |  |     "mips32r6" },  | 
61  |  |   { //item 22 | 
62  |  |     CS_ARCH_MIPS, (cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO),  | 
63  |  |     "MIPS-32R6 (Micro+Little-endian)", "mips32r6micro" },  | 
64  |  |   { //item 23 | 
65  |  |     CS_ARCH_M68K, (cs_mode)0, "M68K", "m68k" },  | 
66  |  |   { //item 24 | 
67  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6809, "M680X_M6809", "m6809" },  | 
68  |  |   { //item 25 | 
69  |  |     CS_ARCH_EVM, (cs_mode)0, "EVM", "evm" },  | 
70  |  |   { //item 26 | 
71  |  |     CS_ARCH_MOS65XX, (cs_mode)0, "MOS65XX", "mos65xx" },  | 
72  |  |   { //item 27 | 
73  |  |     CS_ARCH_TMS320C64X, CS_MODE_BIG_ENDIAN, "tms320c64x", "tms320c64x" },  | 
74  |  |   { //item 28 | 
75  |  |     CS_ARCH_WASM, (cs_mode)0, "WASM", "wasm" },  | 
76  |  |   { //item 29 | 
77  |  |     CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_CLASSIC, "cBPF",  | 
78  |  |     "bpf" },  | 
79  |  |   { //item 30 | 
80  |  |     CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_EXTENDED, "eBPF",  | 
81  |  |     "ebpf" },  | 
82  |  |   { //item 31 | 
83  |  |     CS_ARCH_BPF, CS_MODE_BIG_ENDIAN | CS_MODE_BPF_CLASSIC, "cBPF",  | 
84  |  |     "bpfbe" },  | 
85  |  |   { //item 32 | 
86  |  |     CS_ARCH_BPF, CS_MODE_BIG_ENDIAN | CS_MODE_BPF_EXTENDED, "eBPF",  | 
87  |  |     "ebpfbe" },  | 
88  |  |   { // item 33 | 
89  |  |     CS_ARCH_X86, CS_MODE_16, "X86 16 (Intel syntax)", "x16" },  | 
90  |  |   { // item 34 | 
91  |  |     CS_ARCH_M68K, CS_MODE_M68K_040, "M68K mode 40", "m68k40" },  | 
92  |  |   { //item 35 | 
93  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6800, "M680X_M6800", "m6800" },  | 
94  |  |   { //item 36 | 
95  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6801, "M680X_M6801", "m6801" },  | 
96  |  |   { //item 37 | 
97  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6805, "M680X_M6805", "m6805" },  | 
98  |  |   { //item 38 | 
99  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6808, "M680X_M6808", "m6808" },  | 
100  |  |   { //item 39 | 
101  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6811, "M680X_M6811", "m6811" },  | 
102  |  |   { //item 40 | 
103  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_CPU12, "M680X_cpu12", "cpu12" },  | 
104  |  |   { //item 41 | 
105  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6301, "M680X_M6808", "hd6301" },  | 
106  |  |   { //item 42 | 
107  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_6309, "M680X_M6808", "hd6309" },  | 
108  |  |   { //item 43 | 
109  |  |     CS_ARCH_M680X, (cs_mode)CS_MODE_M680X_HCS08, "M680X_M6808", "hcs08" },  | 
110  |  |   { //item 44 | 
111  |  |     CS_ARCH_RISCV, CS_MODE_RISCV32, "RISCV", "riscv32" },  | 
112  |  |   { //item 45 | 
113  |  |     CS_ARCH_RISCV, CS_MODE_RISCV64, "RISCV", "riscv64" },  | 
114  |  |   { //item 46 | 
115  |  |     CS_ARCH_PPC, CS_MODE_64 | CS_MODE_BIG_ENDIAN | CS_MODE_QPX, "ppc+qpx",  | 
116  |  |     "ppc64beqpx" },  | 
117  |  |   { //item 46 | 
118  |  |     CS_ARCH_PPC, CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_PS, "ppc+ps",  | 
119  |  |     "ppc32beps" },  | 
120  |  |   { CS_ARCH_TRICORE, | 
121  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_110, "TRICORE",  | 
122  |  |     "tc110" },  | 
123  |  |   { CS_ARCH_TRICORE, | 
124  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_120, "TRICORE",  | 
125  |  |     "tc120" },  | 
126  |  |   { CS_ARCH_TRICORE, | 
127  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_130, "TRICORE",  | 
128  |  |     "tc130" },  | 
129  |  |   { CS_ARCH_TRICORE, | 
130  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_131, "TRICORE",  | 
131  |  |     "tc131" },  | 
132  |  |   { CS_ARCH_TRICORE, | 
133  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_160, "TRICORE",  | 
134  |  |     "tc160" },  | 
135  |  |   { CS_ARCH_TRICORE, | 
136  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_161, "TRICORE",  | 
137  |  |     "tc161" },  | 
138  |  |   { CS_ARCH_TRICORE, | 
139  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_162, "TRICORE",  | 
140  |  |     "tc162" },  | 
141  |  |   { CS_ARCH_TRICORE, | 
142  |  |     CS_MODE_32 | CS_MODE_BIG_ENDIAN | CS_MODE_TRICORE_180, "TRICORE",  | 
143  |  |     "tc180" },  | 
144  |  |   { CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32, "XTENSA ESP32", "esp32" }, | 
145  |  |   { CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32S2, "XTENSA ESP32S2", "esp32s2" }, | 
146  |  |   { CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP8266, "XTENSA ESP8266", "esp8266" }, | 
147  |  |   // dummy entry to mark the end of this array.  | 
148  |  |   // DO NOT DELETE THIS  | 
149  |  |   { | 
150  |  |     0,  | 
151  |  |     0,  | 
152  |  |     NULL,  | 
153  |  |     NULL,  | 
154  |  |   },  | 
155  |  | };  | 
156  |  |  | 
157  |  | // get length of platforms[]  | 
158  |  | unsigned int platform_len(void)  | 
159  | 129k  | { | 
160  | 129k  |   unsigned int c;  | 
161  |  |  | 
162  | 7.48M  |   for (c = 0; platforms[c].cstoolname; c++)  | 
163  | 7.35M  |     ;  | 
164  |  |  | 
165  | 129k  |   return c;  | 
166  | 129k  | }  | 
167  |  |  | 
168  |  | // get platform entry encoded n (first byte for input data of OSS fuzz)  | 
169  |  | unsigned int get_platform_entry(uint8_t n)  | 
170  | 67.2k  | { | 
171  | 67.2k  |   unsigned len = platform_len();  | 
172  | 67.2k  |   if (len == 0) { | 
173  | 0  |     return 0;  | 
174  | 0  |   }  | 
175  | 67.2k  |   return n % len;  | 
176  | 67.2k  | }  | 
177  |  |  | 
178  |  | // get cstoolname from encoded n (first byte for input data of OSS fuzz)  | 
179  |  | const char *get_platform_cstoolname(uint8_t n)  | 
180  | 0  | { | 
181  | 0  |   return platforms[get_platform_entry(n)].cstoolname;  | 
182  | 0  | }  |