/src/capstonev5/arch/M680X/M680XInstPrinter.c

Source
/* Capstone Disassembly Engine */
/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */

#ifdef CAPSTONE_HAS_M680X
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <capstone/platform.h>

#include "../../cs_priv.h"
#include "../../MCInst.h"
#include "../../SStream.h"
#include "../../MCRegisterInfo.h"
#include "../../utils.h"
#include "M680XInstPrinter.h"
#include "M680XDisassembler.h"
#include "M680XDisassemblerInternals.h"

#ifndef CAPSTONE_DIET
static const char s_reg_names[][10] = {
  "<invalid>", "a", "b", "e", "f", "0", "d", "w", "cc", "dp", "md",
  "hx", "h", "x", "y", "s", "u", "v", "q", "pc", "tmp2", "tmp3",
};

static const char s_instruction_names[][6] = {
  "invld", "aba", "abx", "aby", "adc", "adca", "adcb", "adcd", "adcr",
  "add", "adda", "addb", "addd", "adde", "addf", "addr", "addw",
  "aim", "ais", "aix", "and", "anda", "andb", "andcc", "andd", "andr",
  "asl", "asla", "aslb", "asld",
  "asr", "asra", "asrb", "asrd", "asrx",
  "band",
  "bcc", "bclr", "bcs", "beor", "beq", "bge", "bgnd", "bgt", "bhcc",
  "bhcs", "bhi",
  "biand", "bieor", "bih", "bil",
  "bior", "bit", "bita", "bitb", "bitd", "bitmd", "ble", "bls", "blt",
  "bmc",
  "bmi", "bms",
  "bne", "bor", "bpl", "brclr", "brset", "bra", "brn", "bset", "bsr",
  "bvc", "bvs",
  "call", "cba", "cbeq", "cbeqa", "cbeqx", "clc", "cli",
  "clr", "clra", "clrb", "clrd", "clre", "clrf", "clrh", "clrw", "clrx",
  "clv", "cmp",
  "cmpa", "cmpb", "cmpd", "cmpe", "cmpf", "cmpr", "cmps", "cmpu", "cmpw",
  "cmpx", "cmpy",
  "com", "coma", "comb", "comd", "come", "comf", "comw", "comx", "cpd",
  "cphx", "cps", "cpx", "cpy",
  "cwai", "daa", "dbeq", "dbne", "dbnz", "dbnza", "dbnzx",
  "dec", "deca", "decb", "decd", "dece", "decf", "decw",
  "decx", "des", "dex", "dey",
  "div", "divd", "divq", "ediv", "edivs", "eim", "emacs", "emaxd",
  "emaxm", "emind", "eminm", "emul", "emuls",
  "eor", "eora", "eorb", "eord", "eorr", "etbl",
  "exg", "fdiv", "ibeq", "ibne", "idiv", "idivs", "illgl",
  "inc", "inca", "incb", "incd", "ince", "incf", "incw", "incx",
  "ins", "inx", "iny",
  "jmp", "jsr",
  "lbcc", "lbcs", "lbeq", "lbge", "lbgt", "lbhi", "lble", "lbls", "lblt",
  "lbmi", "lbne", "lbpl", "lbra", "lbrn", "lbsr", "lbvc", "lbvs",
  "lda", "ldaa", "ldab", "ldb", "ldbt", "ldd", "lde", "ldf", "ldhx",
  "ldmd",
  "ldq", "lds", "ldu", "ldw", "ldx", "ldy",
  "leas", "leau", "leax", "leay",
  "lsl", "lsla", "lslb", "lsld", "lslx",
  "lsr", "lsra", "lsrb", "lsrd", "lsrw", "lsrx",
  "maxa", "maxm", "mem", "mina", "minm", "mov", "movb", "movw", "mul",
  "muld",
  "neg", "nega", "negb", "negd", "negx",
  "nop", "nsa", "oim", "ora", "oraa", "orab", "orb", "orcc", "ord", "orr",
  "psha", "pshb", "pshc", "pshd", "pshh", "pshs", "pshsw", "pshu",
  "pshuw", "pshx", "pshy",
  "pula", "pulb", "pulc", "puld", "pulh", "puls", "pulsw", "pulu",
  "puluw", "pulx", "puly", "rev", "revw",
  "rol", "rola", "rolb", "rold", "rolw", "rolx",
  "ror", "rora", "rorb", "rord", "rorw", "rorx",
  "rsp", "rtc", "rti", "rts", "sba", "sbc", "sbca", "sbcb", "sbcd",
  "sbcr",
  "sec", "sei", "sev", "sex", "sexw", "slp", "sta", "staa", "stab", "stb",
  "stbt", "std", "ste", "stf", "stop", "sthx",
  "stq", "sts", "stu", "stw", "stx", "sty",
  "sub", "suba", "subb", "subd", "sube", "subf", "subr", "subw",
  "swi", "swi2", "swi3",
  "sync", "tab", "tap", "tax", "tba", "tbeq", "tbl", "tbne", "test",
  "tfm", "tfr",
  "tim", "tpa",
  "tst", "tsta", "tstb", "tstd", "tste", "tstf", "tstw", "tstx",
  "tsx", "tsy", "txa", "txs", "tys", "wai", "wait", "wav", "wavr",
  "xgdx", "xgdy",
};

static const name_map s_group_names[] = {
  { M680X_GRP_INVALID, "<invalid>" },
  { M680X_GRP_JUMP,  "jump" },
  { M680X_GRP_CALL,  "call" },
  { M680X_GRP_RET, "return" },
  { M680X_GRP_INT, "interrupt" },
  { M680X_GRP_IRET,  "interrupt_return" },
  { M680X_GRP_PRIV,  "privileged" },
  { M680X_GRP_BRAREL,  "branch_relative" },
};
#endif

static void printRegName(cs_struct *handle, SStream *OS, unsigned int reg)
{
#ifndef CAPSTONE_DIET
  SStream_concat0(OS, handle->reg_name((csh)handle, reg));
#endif
}

static void printInstructionName(cs_struct *handle, SStream *OS,
  unsigned int insn)
{
#ifndef CAPSTONE_DIET
  SStream_concat0(OS, handle->insn_name((csh)handle, insn));
#endif
}

static uint32_t get_unsigned(int32_t value, int byte_size)
{
  switch (byte_size) {
  case 1:
    return (uint32_t)(value & 0xff);

  case 2:
    return (uint32_t)(value & 0xffff);

  default:
  case 4:
    return (uint32_t)value;
  }
}

static void printIncDec(bool isPost, SStream *O, m680x_info *info,
  cs_m680x_op *op)
{
  static const char s_inc_dec[][3] = { "--", "-", "", "+", "++" };

  if (!op->idx.inc_dec)
    return;

  if ((!isPost && !(op->idx.flags & M680X_IDX_POST_INC_DEC)) ||
    (isPost && (op->idx.flags & M680X_IDX_POST_INC_DEC))) {
    const char *prePostfix = "";

    if (info->cpu_type == M680X_CPU_TYPE_CPU12)
      prePostfix = (op->idx.inc_dec < 0) ? "-" : "+";
    else if (op->idx.inc_dec >= -2 && (op->idx.inc_dec <= 2)) {
      prePostfix = (char *)s_inc_dec[op->idx.inc_dec + 2];
    }

    SStream_concat0(O, prePostfix);
  }
}

static void printOperand(MCInst *MI, SStream *O, m680x_info *info,
  cs_m680x_op *op)
{
  switch (op->type) {
  case M680X_OP_REGISTER:
    printRegName(MI->csh, O, op->reg);
    break;

  case M680X_OP_CONSTANT:
    SStream_concat(O, "%u", op->const_val);
    break;

  case M680X_OP_IMMEDIATE:
    if (MI->csh->imm_unsigned)
      SStream_concat(O, "#%u",
        get_unsigned(op->imm, op->size));
    else
      SStream_concat(O, "#%d", op->imm);

    break;

  case M680X_OP_INDEXED:
    if (op->idx.flags & M680X_IDX_INDIRECT)
      SStream_concat0(O, "[");

    if (op->idx.offset_reg != M680X_REG_INVALID)
      printRegName(MI->csh, O, op->idx.offset_reg);
    else if (op->idx.offset_bits > 0) {
      if (op->idx.base_reg == M680X_REG_PC)
        SStream_concat(O, "$%04x", op->idx.offset_addr);
      else
        SStream_concat(O, "%d", op->idx.offset);
    }
    else if (op->idx.inc_dec != 0 &&
      info->cpu_type == M680X_CPU_TYPE_CPU12)
      SStream_concat(O, "%d", abs(op->idx.inc_dec));

    if (!(op->idx.flags & M680X_IDX_NO_COMMA))
      SStream_concat(O, ", ");

    printIncDec(false, O, info, op);

    printRegName(MI->csh, O, op->idx.base_reg);

    if (op->idx.base_reg == M680X_REG_PC &&
      (op->idx.offset_bits > 0))
      SStream_concat(O, "r");

    printIncDec(true, O, info, op);

    if (op->idx.flags & M680X_IDX_INDIRECT)
      SStream_concat(O, "]");

    break;

  case M680X_OP_RELATIVE:
    SStream_concat(O, "$%04x", op->rel.address);
    break;

  case M680X_OP_DIRECT:
    SStream_concat(O, "$%02x", op->direct_addr);
    break;

  case M680X_OP_EXTENDED:
    if (op->ext.indirect)
      SStream_concat(O, "[$%04x]", op->ext.address);
    else {
      if (op->ext.address < 256) {
        SStream_concat(O, ">$%04x", op->ext.address);
      }
      else {
        SStream_concat(O, "$%04x", op->ext.address);
      }
    }

    break;

  default:
    SStream_concat0(O, "<invalid_operand>");
    break;
  }
}

static const char *getDelimiter(m680x_info *info, cs_m680x *m680x)
{
  bool indexed = false;
  int count = 0;
  int i;

  if (info->insn == M680X_INS_TFM)
    return ", ";

  if (m680x->op_count > 1) {
    for (i  = 0; i < m680x->op_count; ++i) {
      if (m680x->operands[i].type == M680X_OP_INDEXED)
        indexed = true;

      if (m680x->operands[i].type != M680X_OP_REGISTER)
        count++;
    }
  }

  return (indexed && (count >= 1)) ? "; " : ", ";
};

void M680X_printInst(MCInst *MI, SStream *O, void *PrinterInfo)
{
  m680x_info *info = (m680x_info *)PrinterInfo;
  cs_m680x *m680x = &info->m680x;
  cs_detail *detail = MI->flat_insn->detail;
  int suppress_operands = 0;
  const char *delimiter = getDelimiter(info, m680x);
  int i;

  if (detail != NULL)
    memcpy(&detail->m680x, m680x, sizeof(cs_m680x));

  if (info->insn == M680X_INS_INVLD || info->insn == M680X_INS_ILLGL) {
    if (m680x->op_count)
      SStream_concat(O, "fcb $%02x", m680x->operands[0].imm);
    else
      SStream_concat0(O, "fcb $<unknown>");

    return;
  }

  printInstructionName(MI->csh, O, info->insn);
  SStream_concat0(O, " ");

  if ((m680x->flags & M680X_FIRST_OP_IN_MNEM) != 0)
    suppress_operands++;

  if ((m680x->flags & M680X_SECOND_OP_IN_MNEM) != 0)
    suppress_operands++;

  for (i  = 0; i < m680x->op_count; ++i) {
    if (i >= suppress_operands) {
      printOperand(MI, O, info, &m680x->operands[i]);

      if ((i + 1) != m680x->op_count)
        SStream_concat0(O, delimiter);
    }
  }
}

const char *M680X_reg_name(csh handle, unsigned int reg)
{
#ifndef CAPSTONE_DIET

  if (reg >= ARR_SIZE(s_reg_names))
    return NULL;

  return s_reg_names[(int)reg];
#else
  return NULL;
#endif
}

const char *M680X_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET

  if (id >= ARR_SIZE(s_instruction_names))
    return NULL;
  else
    return s_instruction_names[(int)id];

#else
  return NULL;
#endif
}

const char *M680X_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
  return id2name(s_group_names, ARR_SIZE(s_group_names), id);
#else
  return NULL;
#endif
}

cs_err M680X_instprinter_init(cs_struct *ud)
{
#ifndef CAPSTONE_DIET

  if (M680X_REG_ENDING != ARR_SIZE(s_reg_names)) {
    CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(s_reg_names));
    return CS_ERR_MODE;
  }

  if (M680X_INS_ENDING != ARR_SIZE(s_instruction_names)) {
    CS_ASSERT(M680X_INS_ENDING == ARR_SIZE(s_instruction_names));
    return CS_ERR_MODE;
  }

  if (M680X_GRP_ENDING != ARR_SIZE(s_group_names)) {
    CS_ASSERT(M680X_GRP_ENDING == ARR_SIZE(s_group_names));
    return CS_ERR_MODE;
  }

#endif

  return CS_ERR_OK;
}

#endif


Coverage Report

Created: 2025-10-28 07:02

Line	Count	Source
1		/* Capstone Disassembly Engine */
2		/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
3
4		#ifdef CAPSTONE_HAS_M680X
5		#include <stdio.h>
6		#include <stdlib.h>
7		#include <string.h>
8		#include <capstone/platform.h>
9
10		#include "../../cs_priv.h"
11		#include "../../MCInst.h"
12		#include "../../SStream.h"
13		#include "../../MCRegisterInfo.h"
14		#include "../../utils.h"
15		#include "M680XInstPrinter.h"
16		#include "M680XDisassembler.h"
17		#include "M680XDisassemblerInternals.h"
18
19		#ifndef CAPSTONE_DIET
20		static const char s_reg_names[][10] = {
21		"<invalid>", "a", "b", "e", "f", "0", "d", "w", "cc", "dp", "md",
22		"hx", "h", "x", "y", "s", "u", "v", "q", "pc", "tmp2", "tmp3",
23		};
24
25		static const char s_instruction_names[][6] = {
26		"invld", "aba", "abx", "aby", "adc", "adca", "adcb", "adcd", "adcr",
27		"add", "adda", "addb", "addd", "adde", "addf", "addr", "addw",
28		"aim", "ais", "aix", "and", "anda", "andb", "andcc", "andd", "andr",
29		"asl", "asla", "aslb", "asld",
30		"asr", "asra", "asrb", "asrd", "asrx",
31		"band",
32		"bcc", "bclr", "bcs", "beor", "beq", "bge", "bgnd", "bgt", "bhcc",
33		"bhcs", "bhi",
34		"biand", "bieor", "bih", "bil",
35		"bior", "bit", "bita", "bitb", "bitd", "bitmd", "ble", "bls", "blt",
36		"bmc",
37		"bmi", "bms",
38		"bne", "bor", "bpl", "brclr", "brset", "bra", "brn", "bset", "bsr",
39		"bvc", "bvs",
40		"call", "cba", "cbeq", "cbeqa", "cbeqx", "clc", "cli",
41		"clr", "clra", "clrb", "clrd", "clre", "clrf", "clrh", "clrw", "clrx",
42		"clv", "cmp",
43		"cmpa", "cmpb", "cmpd", "cmpe", "cmpf", "cmpr", "cmps", "cmpu", "cmpw",
44		"cmpx", "cmpy",
45		"com", "coma", "comb", "comd", "come", "comf", "comw", "comx", "cpd",
46		"cphx", "cps", "cpx", "cpy",
47		"cwai", "daa", "dbeq", "dbne", "dbnz", "dbnza", "dbnzx",
48		"dec", "deca", "decb", "decd", "dece", "decf", "decw",
49		"decx", "des", "dex", "dey",
50		"div", "divd", "divq", "ediv", "edivs", "eim", "emacs", "emaxd",
51		"emaxm", "emind", "eminm", "emul", "emuls",
52		"eor", "eora", "eorb", "eord", "eorr", "etbl",
53		"exg", "fdiv", "ibeq", "ibne", "idiv", "idivs", "illgl",
54		"inc", "inca", "incb", "incd", "ince", "incf", "incw", "incx",
55		"ins", "inx", "iny",
56		"jmp", "jsr",
57		"lbcc", "lbcs", "lbeq", "lbge", "lbgt", "lbhi", "lble", "lbls", "lblt",
58		"lbmi", "lbne", "lbpl", "lbra", "lbrn", "lbsr", "lbvc", "lbvs",
59		"lda", "ldaa", "ldab", "ldb", "ldbt", "ldd", "lde", "ldf", "ldhx",
60		"ldmd",
61		"ldq", "lds", "ldu", "ldw", "ldx", "ldy",
62		"leas", "leau", "leax", "leay",
63		"lsl", "lsla", "lslb", "lsld", "lslx",
64		"lsr", "lsra", "lsrb", "lsrd", "lsrw", "lsrx",
65		"maxa", "maxm", "mem", "mina", "minm", "mov", "movb", "movw", "mul",
66		"muld",
67		"neg", "nega", "negb", "negd", "negx",
68		"nop", "nsa", "oim", "ora", "oraa", "orab", "orb", "orcc", "ord", "orr",
69		"psha", "pshb", "pshc", "pshd", "pshh", "pshs", "pshsw", "pshu",
70		"pshuw", "pshx", "pshy",
71		"pula", "pulb", "pulc", "puld", "pulh", "puls", "pulsw", "pulu",
72		"puluw", "pulx", "puly", "rev", "revw",
73		"rol", "rola", "rolb", "rold", "rolw", "rolx",
74		"ror", "rora", "rorb", "rord", "rorw", "rorx",
75		"rsp", "rtc", "rti", "rts", "sba", "sbc", "sbca", "sbcb", "sbcd",
76		"sbcr",
77		"sec", "sei", "sev", "sex", "sexw", "slp", "sta", "staa", "stab", "stb",
78		"stbt", "std", "ste", "stf", "stop", "sthx",
79		"stq", "sts", "stu", "stw", "stx", "sty",
80		"sub", "suba", "subb", "subd", "sube", "subf", "subr", "subw",
81		"swi", "swi2", "swi3",
82		"sync", "tab", "tap", "tax", "tba", "tbeq", "tbl", "tbne", "test",
83		"tfm", "tfr",
84		"tim", "tpa",
85		"tst", "tsta", "tstb", "tstd", "tste", "tstf", "tstw", "tstx",
86		"tsx", "tsy", "txa", "txs", "tys", "wai", "wait", "wav", "wavr",
87		"xgdx", "xgdy",
88		};
89
90		static const name_map s_group_names[] = {
91		{ M680X_GRP_INVALID, "<invalid>" },
92		{ M680X_GRP_JUMP, "jump" },
93		{ M680X_GRP_CALL, "call" },
94		{ M680X_GRP_RET, "return" },
95		{ M680X_GRP_INT, "interrupt" },
96		{ M680X_GRP_IRET, "interrupt_return" },
97		{ M680X_GRP_PRIV, "privileged" },
98		{ M680X_GRP_BRAREL, "branch_relative" },
99		};
100		#endif
101
102		static void printRegName(cs_struct handle, SStream OS, unsigned int reg)
103	156k	{
104	156k	#ifndef CAPSTONE_DIET
105	156k	SStream_concat0(OS, handle->reg_name((csh)handle, reg));
106	156k	#endif
107	156k	}
108
109		static void printInstructionName(cs_struct handle, SStream OS,
110		unsigned int insn)
111	428k	{
112	428k	#ifndef CAPSTONE_DIET
113	428k	SStream_concat0(OS, handle->insn_name((csh)handle, insn));
114	428k	#endif
115	428k	}
116
117		static uint32_t get_unsigned(int32_t value, int byte_size)
118	0	{
119	0	switch (byte_size) {
120	0	case 1:
121	0	return (uint32_t)(value & 0xff);
122
123	0	case 2:
124	0	return (uint32_t)(value & 0xffff);
125
126	0	default:
127	0	case 4:
128	0	return (uint32_t)value;
129	0	}
130	0	}
131
132		static void printIncDec(bool isPost, SStream O, m680x_info info,
133		cs_m680x_op *op)
134	225k	{
135	225k	static const char s_inc_dec[][3] = { "--", "-", "", "+", "++" };
136
137	225k	if (!op->idx.inc_dec)
138	173k	return;
139
140	52.0k	if ((!isPost && !(op->idx.flags & M680X_IDX_POST_INC_DEC)) \|\|
141	37.6k	(isPost && (op->idx.flags & M680X_IDX_POST_INC_DEC))) {
142	26.0k	const char *prePostfix = "";
143
144	26.0k	if (info->cpu_type == M680X_CPU_TYPE_CPU12)
145	15.4k	prePostfix = (op->idx.inc_dec < 0) ? "-" : "+";
146	10.5k	else if (op->idx.inc_dec >= -2 && (op->idx.inc_dec <= 2)) {
147	10.5k	prePostfix = (char *)s_inc_dec[op->idx.inc_dec + 2];
148	10.5k	}
149
150	26.0k	SStream_concat0(O, prePostfix);
151	26.0k	}
152	52.0k	}
153
154		static void printOperand(MCInst MI, SStream O, m680x_info *info,
155		cs_m680x_op *op)
156	360k	{
157	360k	switch (op->type) {
158	34.8k	case M680X_OP_REGISTER:
159	34.8k	printRegName(MI->csh, O, op->reg);
160	34.8k	break;
161
162	8.03k	case M680X_OP_CONSTANT:
163	8.03k	SStream_concat(O, "%u", op->const_val);
164	8.03k	break;
165
166	44.2k	case M680X_OP_IMMEDIATE:
167	44.2k	if (MI->csh->imm_unsigned)
168	0	SStream_concat(O, "#%u",
169	0	get_unsigned(op->imm, op->size));
170	44.2k	else
171	44.2k	SStream_concat(O, "#%d", op->imm);
172
173	44.2k	break;
174
175	112k	case M680X_OP_INDEXED:
176	112k	if (op->idx.flags & M680X_IDX_INDIRECT)
177	12.3k	SStream_concat0(O, "[");
178
179	112k	if (op->idx.offset_reg != M680X_REG_INVALID)
180	8.51k	printRegName(MI->csh, O, op->idx.offset_reg);
181	104k	else if (op->idx.offset_bits > 0) {
182	69.7k	if (op->idx.base_reg == M680X_REG_PC)
183	10.3k	SStream_concat(O, "$%04x", op->idx.offset_addr);
184	59.4k	else
185	59.4k	SStream_concat(O, "%d", op->idx.offset);
186	69.7k	}
187	34.6k	else if (op->idx.inc_dec != 0 &&
188	25.0k	info->cpu_type == M680X_CPU_TYPE_CPU12)
189	15.4k	SStream_concat(O, "%d", abs(op->idx.inc_dec));
190
191	112k	if (!(op->idx.flags & M680X_IDX_NO_COMMA))
192	108k	SStream_concat(O, ", ");
193
194	112k	printIncDec(false, O, info, op);
195
196	112k	printRegName(MI->csh, O, op->idx.base_reg);
197
198	112k	if (op->idx.base_reg == M680X_REG_PC &&
199	11.7k	(op->idx.offset_bits > 0))
200	10.3k	SStream_concat(O, "r");
201
202	112k	printIncDec(true, O, info, op);
203
204	112k	if (op->idx.flags & M680X_IDX_INDIRECT)
205	12.3k	SStream_concat(O, "]");
206
207	112k	break;
208
209	38.4k	case M680X_OP_RELATIVE:
210	38.4k	SStream_concat(O, "$%04x", op->rel.address);
211	38.4k	break;
212
213	64.5k	case M680X_OP_DIRECT:
214	64.5k	SStream_concat(O, "$%02x", op->direct_addr);
215	64.5k	break;
216
217	58.0k	case M680X_OP_EXTENDED:
218	58.0k	if (op->ext.indirect)
219	507	SStream_concat(O, "[$%04x]", op->ext.address);
220	57.5k	else {
221	57.5k	if (op->ext.address < 256) {
222	3.07k	SStream_concat(O, ">$%04x", op->ext.address);
223	3.07k	}
224	54.4k	else {
225	54.4k	SStream_concat(O, "$%04x", op->ext.address);
226	54.4k	}
227	57.5k	}
228
229	58.0k	break;
230
231	0	default:
232	0	SStream_concat0(O, "<invalid_operand>");
233	0	break;
234	360k	}
235	360k	}
236
237		static const char getDelimiter(m680x_info info, cs_m680x *m680x)
238	474k	{
239	474k	bool indexed = false;
240	474k	int count = 0;
241	474k	int i;
242
243	474k	if (info->insn == M680X_INS_TFM)
244	1.48k	return ", ";
245
246	472k	if (m680x->op_count > 1) {
247	643k	for (i = 0; i < m680x->op_count; ++i) {
248	437k	if (m680x->operands[i].type == M680X_OP_INDEXED)
249	81.0k	indexed = true;
250
251	437k	if (m680x->operands[i].type != M680X_OP_REGISTER)
252	227k	count++;
253	437k	}
254	205k	}
255
256	472k	return (indexed && (count >= 1)) ? "; " : ", ";
257	474k	};
258
259		void M680X_printInst(MCInst MI, SStream O, void *PrinterInfo)
260	474k	{
261	474k	m680x_info info = (m680x_info )PrinterInfo;
262	474k	cs_m680x *m680x = &info->m680x;
263	474k	cs_detail *detail = MI->flat_insn->detail;
264	474k	int suppress_operands = 0;
265	474k	const char *delimiter = getDelimiter(info, m680x);
266	474k	int i;
267
268	474k	if (detail != NULL)
269	474k	memcpy(&detail->m680x, m680x, sizeof(cs_m680x));
270
271	474k	if (info->insn == M680X_INS_INVLD \|\| info->insn == M680X_INS_ILLGL) {
272	46.1k	if (m680x->op_count)
273	46.1k	SStream_concat(O, "fcb $%02x", m680x->operands[0].imm);
274	0	else
275	0	SStream_concat0(O, "fcb $<unknown>");
276
277	46.1k	return;
278	46.1k	}
279
280	428k	printInstructionName(MI->csh, O, info->insn);
281	428k	SStream_concat0(O, " ");
282
283	428k	if ((m680x->flags & M680X_FIRST_OP_IN_MNEM) != 0)
284	227k	suppress_operands++;
285
286	428k	if ((m680x->flags & M680X_SECOND_OP_IN_MNEM) != 0)
287	5.50k	suppress_operands++;
288
289	1.02M	for (i = 0; i < m680x->op_count; ++i) {
290	593k	if (i >= suppress_operands) {
291	360k	printOperand(MI, O, info, &m680x->operands[i]);
292
293	360k	if ((i + 1) != m680x->op_count)
294	64.0k	SStream_concat0(O, delimiter);
295	360k	}
296	593k	}
297	428k	}
298
299		const char *M680X_reg_name(csh handle, unsigned int reg)
300	1.43M	{
301	1.43M	#ifndef CAPSTONE_DIET
302
303	1.43M	if (reg >= ARR_SIZE(s_reg_names))
304	0	return NULL;
305
306	1.43M	return s_reg_names[(int)reg];
307		#else
308		return NULL;
309		#endif
310	1.43M	}
311
312		const char *M680X_insn_name(csh handle, unsigned int id)
313	902k	{
314	902k	#ifndef CAPSTONE_DIET
315
316	902k	if (id >= ARR_SIZE(s_instruction_names))
317	0	return NULL;
318	902k	else
319	902k	return s_instruction_names[(int)id];
320
321		#else
322		return NULL;
323		#endif
324	902k	}
325
326		const char *M680X_group_name(csh handle, unsigned int id)
327	106k	{
328	106k	#ifndef CAPSTONE_DIET
329	106k	return id2name(s_group_names, ARR_SIZE(s_group_names), id);
330		#else
331		return NULL;
332		#endif
333	106k	}
334
335		cs_err M680X_instprinter_init(cs_struct *ud)
336	4.28k	{
337	4.28k	#ifndef CAPSTONE_DIET
338
339	4.28k	if (M680X_REG_ENDING != ARR_SIZE(s_reg_names)) {
340	0	CS_ASSERT(M680X_REG_ENDING == ARR_SIZE(s_reg_names));
341	0	return CS_ERR_MODE;
342	0	}
343
344	4.28k	if (M680X_INS_ENDING != ARR_SIZE(s_instruction_names)) {
345	0	CS_ASSERT(M680X_INS_ENDING == ARR_SIZE(s_instruction_names));
346	0	return CS_ERR_MODE;
347	0	}
348
349	4.28k	if (M680X_GRP_ENDING != ARR_SIZE(s_group_names)) {
350	0	CS_ASSERT(M680X_GRP_ENDING == ARR_SIZE(s_group_names));
351	0	return CS_ERR_MODE;
352	0	}
353
354	4.28k	#endif
355
356	4.28k	return CS_ERR_OK;
357	4.28k	}
358
359		#endif
360