Coverage Report

Created: 2025-12-05 06:11

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/Xtensa/XtensaGenAsmWriter.inc
Line
Count
Source
1
/* Capstone Disassembly Engine, https://www.capstone-engine.org */
2
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
3
/*    Rot127 <unisono@quyllur.org> 2022-2024 */
4
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
5
6
/* LLVM-commit: <commit> */
7
/* LLVM-tag: <tag> */
8
9
/* Do not edit. */
10
11
/* Capstone's LLVM TableGen Backends: */
12
/* https://github.com/capstone-engine/llvm-capstone */
13
14
#include <capstone/platform.h>
15
#include "../../cs_priv.h"
16
17
/// getMnemonic - This method is automatically generated by tablegen
18
/// from the instruction set description.
19
74.9k
static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) {
20
74.9k
#ifndef CAPSTONE_DIET
21
74.9k
  static const char AsmStrs[] = {
22
74.9k
  /* 0 */ "wur.fcr \t\0"
23
74.9k
  /* 10 */ "call0\t\0"
24
74.9k
  /* 17 */ "callx0\t\0"
25
74.9k
  /* 25 */ "call12\t\0"
26
74.9k
  /* 33 */ "callx12\t\0"
27
74.9k
  /* 42 */ "subx2\t\0"
28
74.9k
  /* 49 */ "addx2\t\0"
29
74.9k
  /* 56 */ "call4\t\0"
30
74.9k
  /* 63 */ "subx4\t\0"
31
74.9k
  /* 70 */ "addx4\t\0"
32
74.9k
  /* 77 */ "callx4\t\0"
33
74.9k
  /* 85 */ "any4\t\0"
34
74.9k
  /* 91 */ "call8\t\0"
35
74.9k
  /* 98 */ "subx8\t\0"
36
74.9k
  /* 105 */ "addx8\t\0"
37
74.9k
  /* 112 */ "callx8\t\0"
38
74.9k
  /* 120 */ "any8\t\0"
39
74.9k
  /* 126 */ "sra\t\0"
40
74.9k
  /* 131 */ "nsa\t\0"
41
74.9k
  /* 136 */ "andb\t\0"
42
74.9k
  /* 142 */ "wdtlb\t\0"
43
74.9k
  /* 149 */ "witlb\t\0"
44
74.9k
  /* 156 */ "xorb\t\0"
45
74.9k
  /* 162 */ "sub\t\0"
46
74.9k
  /* 167 */ "bbc\t\0"
47
74.9k
  /* 172 */ "andbc\t\0"
48
74.9k
  /* 179 */ "orbc\t\0"
49
74.9k
  /* 185 */ "ee.zero.qacc\t\0"
50
74.9k
  /* 199 */ "src\t\0"
51
74.9k
  /* 204 */ "add\t\0"
52
74.9k
  /* 209 */ "and\t\0"
53
74.9k
  /* 214 */ "l32e\t\0"
54
74.9k
  /* 220 */ "s32e\t\0"
55
74.9k
  /* 226 */ "bge\t\0"
56
74.9k
  /* 231 */ "bne\t\0"
57
74.9k
  /* 236 */ "bnone\t\0"
58
74.9k
  /* 243 */ "bf\t\0"
59
74.9k
  /* 247 */ "movf\t\0"
60
74.9k
  /* 253 */ "neg\t\0"
61
74.9k
  /* 258 */ "mula.aa.hh\t\0"
62
74.9k
  /* 270 */ "umul.aa.hh\t\0"
63
74.9k
  /* 282 */ "muls.aa.hh\t\0"
64
74.9k
  /* 294 */ "mula.da.hh\t\0"
65
74.9k
  /* 306 */ "mul.da.hh\t\0"
66
74.9k
  /* 317 */ "muls.da.hh\t\0"
67
74.9k
  /* 329 */ "mula.ad.hh\t\0"
68
74.9k
  /* 341 */ "mul.ad.hh\t\0"
69
74.9k
  /* 352 */ "muls.ad.hh\t\0"
70
74.9k
  /* 364 */ "mula.dd.hh\t\0"
71
74.9k
  /* 376 */ "mul.dd.hh\t\0"
72
74.9k
  /* 387 */ "muls.dd.hh\t\0"
73
74.9k
  /* 399 */ "mula.aa.lh\t\0"
74
74.9k
  /* 411 */ "umul.aa.lh\t\0"
75
74.9k
  /* 423 */ "muls.aa.lh\t\0"
76
74.9k
  /* 435 */ "mula.da.lh\t\0"
77
74.9k
  /* 447 */ "mul.da.lh\t\0"
78
74.9k
  /* 458 */ "muls.da.lh\t\0"
79
74.9k
  /* 470 */ "mula.ad.lh\t\0"
80
74.9k
  /* 482 */ "mul.ad.lh\t\0"
81
74.9k
  /* 493 */ "muls.ad.lh\t\0"
82
74.9k
  /* 505 */ "mula.dd.lh\t\0"
83
74.9k
  /* 517 */ "mul.dd.lh\t\0"
84
74.9k
  /* 528 */ "muls.dd.lh\t\0"
85
74.9k
  /* 540 */ "mulsh\t\0"
86
74.9k
  /* 547 */ "muluh\t\0"
87
74.9k
  /* 554 */ "s32c1i\t\0"
88
74.9k
  /* 562 */ "_l32i\t\0"
89
74.9k
  /* 569 */ "_s32i\t\0"
90
74.9k
  /* 576 */ "s16i\t\0"
91
74.9k
  /* 582 */ "s8i\t\0"
92
74.9k
  /* 587 */ "srai\t\0"
93
74.9k
  /* 593 */ "ssai\t\0"
94
74.9k
  /* 599 */ "bbci\t\0"
95
74.9k
  /* 605 */ "addi\t\0"
96
74.9k
  /* 611 */ "bgei\t\0"
97
74.9k
  /* 617 */ "bnei\t\0"
98
74.9k
  /* 623 */ "rfi\t\0"
99
74.9k
  /* 628 */ "_slli\t\0"
100
74.9k
  /* 635 */ "_srli\t\0"
101
74.9k
  /* 642 */ "addmi\t\0"
102
74.9k
  /* 649 */ "beqi\t\0"
103
74.9k
  /* 655 */ "l16si\t\0"
104
74.9k
  /* 662 */ "bbsi\t\0"
105
74.9k
  /* 668 */ "lsi\t\0"
106
74.9k
  /* 673 */ "ssi\t\0"
107
74.9k
  /* 678 */ "waiti\t\0"
108
74.9k
  /* 685 */ "blti\t\0"
109
74.9k
  /* 691 */ "l16ui\t\0"
110
74.9k
  /* 698 */ "l8ui\t\0"
111
74.9k
  /* 704 */ "bgeui\t\0"
112
74.9k
  /* 711 */ "bltui\t\0"
113
74.9k
  /* 718 */ "extui\t\0"
114
74.9k
  /* 725 */ "_movi\t\0"
115
74.9k
  /* 732 */ "j\t\0"
116
74.9k
  /* 735 */ "break\t\0"
117
74.9k
  /* 742 */ "ssa8l\t\0"
118
74.9k
  /* 749 */ "mula.aa.hl\t\0"
119
74.9k
  /* 761 */ "umul.aa.hl\t\0"
120
74.9k
  /* 773 */ "muls.aa.hl\t\0"
121
74.9k
  /* 785 */ "mula.da.hl\t\0"
122
74.9k
  /* 797 */ "mul.da.hl\t\0"
123
74.9k
  /* 808 */ "muls.da.hl\t\0"
124
74.9k
  /* 820 */ "mula.ad.hl\t\0"
125
74.9k
  /* 832 */ "mul.ad.hl\t\0"
126
74.9k
  /* 843 */ "muls.ad.hl\t\0"
127
74.9k
  /* 855 */ "mula.dd.hl\t\0"
128
74.9k
  /* 867 */ "mul.dd.hl\t\0"
129
74.9k
  /* 878 */ "muls.dd.hl\t\0"
130
74.9k
  /* 890 */ "rsil\t\0"
131
74.9k
  /* 896 */ "mula.aa.ll\t\0"
132
74.9k
  /* 908 */ "umul.aa.ll\t\0"
133
74.9k
  /* 920 */ "muls.aa.ll\t\0"
134
74.9k
  /* 932 */ "mula.da.ll\t\0"
135
74.9k
  /* 944 */ "mul.da.ll\t\0"
136
74.9k
  /* 955 */ "muls.da.ll\t\0"
137
74.9k
  /* 967 */ "mula.ad.ll\t\0"
138
74.9k
  /* 979 */ "mul.ad.ll\t\0"
139
74.9k
  /* 990 */ "muls.ad.ll\t\0"
140
74.9k
  /* 1002 */ "mula.dd.ll\t\0"
141
74.9k
  /* 1014 */ "mul.dd.ll\t\0"
142
74.9k
  /* 1025 */ "muls.dd.ll\t\0"
143
74.9k
  /* 1037 */ "ball\t\0"
144
74.9k
  /* 1043 */ "bnall\t\0"
145
74.9k
  /* 1050 */ "sll\t\0"
146
74.9k
  /* 1055 */ "mull\t\0"
147
74.9k
  /* 1061 */ "srl\t\0"
148
74.9k
  /* 1066 */ "ssl\t\0"
149
74.9k
  /* 1071 */ "add.n\t\0"
150
74.9k
  /* 1078 */ "_l32i.n\t\0"
151
74.9k
  /* 1087 */ "_s32i.n\t\0"
152
74.9k
  /* 1096 */ "addi.n\t\0"
153
74.9k
  /* 1104 */ "movi.n\t\0"
154
74.9k
  /* 1112 */ "break.n\t\0"
155
74.9k
  /* 1121 */ "mov.n\t\0"
156
74.9k
  /* 1128 */ "ee.get_gpio_in\t\0"
157
74.9k
  /* 1144 */ "min\t\0"
158
74.9k
  /* 1149 */ "lsip\t\0"
159
74.9k
  /* 1155 */ "ssip\t\0"
160
74.9k
  /* 1161 */ "loop\t\0"
161
74.9k
  /* 1167 */ "movsp\t\0"
162
74.9k
  /* 1174 */ "lsxp\t\0"
163
74.9k
  /* 1180 */ "ssxp\t\0"
164
74.9k
  /* 1186 */ "beq\t\0"
165
74.9k
  /* 1191 */ "l32r\t\0"
166
74.9k
  /* 1197 */ "rer\t\0"
167
74.9k
  /* 1202 */ "wer\t\0"
168
74.9k
  /* 1207 */ "rfr\t\0"
169
74.9k
  /* 1212 */ "wfr\t\0"
170
74.9k
  /* 1217 */ "xor\t\0"
171
74.9k
  /* 1222 */ "rsr\t\0"
172
74.9k
  /* 1227 */ "ssr\t\0"
173
74.9k
  /* 1232 */ "wsr\t\0"
174
74.9k
  /* 1237 */ "xsr\t\0"
175
74.9k
  /* 1242 */ "rur\t\0"
176
74.9k
  /* 1247 */ "wur\t\0"
177
74.9k
  /* 1252 */ "recip0.s\t\0"
178
74.9k
  /* 1262 */ "rsqrt0.s\t\0"
179
74.9k
  /* 1272 */ "div0.s\t\0"
180
74.9k
  /* 1280 */ "nexp01.s\t\0"
181
74.9k
  /* 1290 */ "msub.s\t\0"
182
74.9k
  /* 1298 */ "utrunc.s\t\0"
183
74.9k
  /* 1308 */ "madd.s\t\0"
184
74.9k
  /* 1316 */ "round.s\t\0"
185
74.9k
  /* 1325 */ "ole.s\t\0"
186
74.9k
  /* 1332 */ "ule.s\t\0"
187
74.9k
  /* 1339 */ "movf.s\t\0"
188
74.9k
  /* 1347 */ "neg.s\t\0"
189
74.9k
  /* 1354 */ "mkdadj.s\t\0"
190
74.9k
  /* 1364 */ "mksadj.s\t\0"
191
74.9k
  /* 1374 */ "ceil.s\t\0"
192
74.9k
  /* 1382 */ "mul.s\t\0"
193
74.9k
  /* 1389 */ "addexpm.s\t\0"
194
74.9k
  /* 1400 */ "maddn.s\t\0"
195
74.9k
  /* 1409 */ "un.s\t\0"
196
74.9k
  /* 1415 */ "divn.s\t\0"
197
74.9k
  /* 1423 */ "addexp.s\t\0"
198
74.9k
  /* 1433 */ "oeq.s\t\0"
199
74.9k
  /* 1440 */ "ueq.s\t\0"
200
74.9k
  /* 1447 */ "floor.s\t\0"
201
74.9k
  /* 1456 */ "abs.s\t\0"
202
74.9k
  /* 1463 */ "ufloat.s\t\0"
203
74.9k
  /* 1473 */ "olt.s\t\0"
204
74.9k
  /* 1480 */ "ult.s\t\0"
205
74.9k
  /* 1487 */ "const.s\t\0"
206
74.9k
  /* 1496 */ "movt.s\t\0"
207
74.9k
  /* 1504 */ "mov.s\t\0"
208
74.9k
  /* 1511 */ "movgez.s\t\0"
209
74.9k
  /* 1521 */ "movnez.s\t\0"
210
74.9k
  /* 1531 */ "moveqz.s\t\0"
211
74.9k
  /* 1541 */ "movltz.s\t\0"
212
74.9k
  /* 1551 */ "mul16s\t\0"
213
74.9k
  /* 1559 */ "abs\t\0"
214
74.9k
  /* 1564 */ "bbs\t\0"
215
74.9k
  /* 1569 */ "rems\t\0"
216
74.9k
  /* 1575 */ "quos\t\0"
217
74.9k
  /* 1581 */ "clamps\t\0"
218
74.9k
  /* 1589 */ "bt\t\0"
219
74.9k
  /* 1593 */ "blt\t\0"
220
74.9k
  /* 1598 */ "ee.wr_mask_gpio_out\t\0"
221
74.9k
  /* 1619 */ "ee.clr_bit_gpio_out\t\0"
222
74.9k
  /* 1640 */ "ee.set_bit_gpio_out\t\0"
223
74.9k
  /* 1661 */ "movt\t\0"
224
74.9k
  /* 1667 */ "sext\t\0"
225
74.9k
  /* 1673 */ "mul16u\t\0"
226
74.9k
  /* 1681 */ "nsau\t\0"
227
74.9k
  /* 1687 */ "bgeu\t\0"
228
74.9k
  /* 1693 */ "remu\t\0"
229
74.9k
  /* 1699 */ "minu\t\0"
230
74.9k
  /* 1705 */ "quou\t\0"
231
74.9k
  /* 1711 */ "bltu\t\0"
232
74.9k
  /* 1717 */ "maxu\t\0"
233
74.9k
  /* 1723 */ "rotw\t\0"
234
74.9k
  /* 1729 */ "max\t\0"
235
74.9k
  /* 1734 */ "ee.zero.accx\t\0"
236
74.9k
  /* 1748 */ "jx\t\0"
237
74.9k
  /* 1752 */ "lsx\t\0"
238
74.9k
  /* 1757 */ "ssx\t\0"
239
74.9k
  /* 1762 */ "bany\t\0"
240
74.9k
  /* 1768 */ "entry\t\0"
241
74.9k
  /* 1775 */ "bgez\t\0"
242
74.9k
  /* 1781 */ "movgez\t\0"
243
74.9k
  /* 1789 */ "bnez\t\0"
244
74.9k
  /* 1795 */ "loopnez\t\0"
245
74.9k
  /* 1804 */ "movnez\t\0"
246
74.9k
  /* 1812 */ "beqz\t\0"
247
74.9k
  /* 1818 */ "moveqz\t\0"
248
74.9k
  /* 1826 */ "loopgtz\t\0"
249
74.9k
  /* 1835 */ "bltz\t\0"
250
74.9k
  /* 1841 */ "movltz\t\0"
251
74.9k
  /* 1849 */ "rur.ua_state_0\t \0"
252
74.9k
  /* 1866 */ "wur.ua_state_0\t \0"
253
74.9k
  /* 1883 */ "rur.qacc_h_0\t \0"
254
74.9k
  /* 1898 */ "wur.qacc_h_0\t \0"
255
74.9k
  /* 1913 */ "rur.qacc_l_0\t \0"
256
74.9k
  /* 1928 */ "wur.qacc_l_0\t \0"
257
74.9k
  /* 1943 */ "rur.accx_0\t \0"
258
74.9k
  /* 1956 */ "wur.accx_0\t \0"
259
74.9k
  /* 1969 */ "rur.ua_state_1\t \0"
260
74.9k
  /* 1986 */ "wur.ua_state_1\t \0"
261
74.9k
  /* 2003 */ "rur.qacc_h_1\t \0"
262
74.9k
  /* 2018 */ "wur.qacc_h_1\t \0"
263
74.9k
  /* 2033 */ "rur.qacc_l_1\t \0"
264
74.9k
  /* 2048 */ "wur.qacc_l_1\t \0"
265
74.9k
  /* 2063 */ "rur.accx_1\t \0"
266
74.9k
  /* 2076 */ "wur.accx_1\t \0"
267
74.9k
  /* 2089 */ "ee.vldbc.32\t \0"
268
74.9k
  /* 2103 */ "ee.vsl.32\t \0"
269
74.9k
  /* 2115 */ "ee.vunzip.32\t \0"
270
74.9k
  /* 2130 */ "ee.vzip.32\t \0"
271
74.9k
  /* 2143 */ "ee.ldxq.32\t \0"
272
74.9k
  /* 2156 */ "ee.stxq.32\t \0"
273
74.9k
  /* 2169 */ "ee.vsr.32\t \0"
274
74.9k
  /* 2181 */ "ee.vmin.s32\t \0"
275
74.9k
  /* 2195 */ "ee.vcmp.eq.s32\t \0"
276
74.9k
  /* 2212 */ "ee.vsubs.s32\t \0"
277
74.9k
  /* 2227 */ "ee.vadds.s32\t \0"
278
74.9k
  /* 2242 */ "ee.vcmp.gt.s32\t \0"
279
74.9k
  /* 2259 */ "ee.vcmp.lt.s32\t \0"
280
74.9k
  /* 2276 */ "ee.vmax.s32\t \0"
281
74.9k
  /* 2290 */ "rur.ua_state_2\t \0"
282
74.9k
  /* 2307 */ "wur.ua_state_2\t \0"
283
74.9k
  /* 2324 */ "rur.qacc_h_2\t \0"
284
74.9k
  /* 2339 */ "wur.qacc_h_2\t \0"
285
74.9k
  /* 2354 */ "rur.qacc_l_2\t \0"
286
74.9k
  /* 2369 */ "wur.qacc_l_2\t \0"
287
74.9k
  /* 2384 */ "rur.ua_state_3\t \0"
288
74.9k
  /* 2401 */ "wur.ua_state_3\t \0"
289
74.9k
  /* 2418 */ "rur.qacc_h_3\t \0"
290
74.9k
  /* 2433 */ "wur.qacc_h_3\t \0"
291
74.9k
  /* 2448 */ "rur.qacc_l_3\t \0"
292
74.9k
  /* 2463 */ "wur.qacc_l_3\t \0"
293
74.9k
  /* 2478 */ "rur.qacc_h_4\t \0"
294
74.9k
  /* 2493 */ "wur.qacc_h_4\t \0"
295
74.9k
  /* 2508 */ "rur.qacc_l_4\t \0"
296
74.9k
  /* 2523 */ "wur.qacc_l_4\t \0"
297
74.9k
  /* 2538 */ "ee.vldbc.16\t \0"
298
74.9k
  /* 2552 */ "ee.vunzip.16\t \0"
299
74.9k
  /* 2567 */ "ee.vzip.16\t \0"
300
74.9k
  /* 2580 */ "ee.fft.r2bf.s16\t \0"
301
74.9k
  /* 2598 */ "ee.cmul.s16\t \0"
302
74.9k
  /* 2612 */ "ee.vmul.s16\t \0"
303
74.9k
  /* 2626 */ "ee.vmin.s16\t \0"
304
74.9k
  /* 2640 */ "ee.vcmp.eq.s16\t \0"
305
74.9k
  /* 2657 */ "ee.vsubs.s16\t \0"
306
74.9k
  /* 2672 */ "ee.vadds.s16\t \0"
307
74.9k
  /* 2687 */ "ee.vcmp.gt.s16\t \0"
308
74.9k
  /* 2704 */ "ee.vcmp.lt.s16\t \0"
309
74.9k
  /* 2721 */ "ee.vprelu.s16\t \0"
310
74.9k
  /* 2737 */ "ee.vrelu.s16\t \0"
311
74.9k
  /* 2752 */ "ee.vmax.s16\t \0"
312
74.9k
  /* 2766 */ "ee.vmul.u16\t \0"
313
74.9k
  /* 2780 */ "ee.vldbc.8\t \0"
314
74.9k
  /* 2793 */ "ee.vunzip.8\t \0"
315
74.9k
  /* 2807 */ "ee.vzip.8\t \0"
316
74.9k
  /* 2819 */ "ee.vmul.s8\t \0"
317
74.9k
  /* 2832 */ "ee.vmin.s8\t \0"
318
74.9k
  /* 2845 */ "ee.vcmp.eq.s8\t \0"
319
74.9k
  /* 2861 */ "ee.vsubs.s8\t \0"
320
74.9k
  /* 2875 */ "ee.vadds.s8\t \0"
321
74.9k
  /* 2889 */ "ee.vcmp.gt.s8\t \0"
322
74.9k
  /* 2905 */ "ee.vcmp.lt.s8\t \0"
323
74.9k
  /* 2921 */ "ee.vprelu.s8\t \0"
324
74.9k
  /* 2936 */ "ee.vrelu.s8\t \0"
325
74.9k
  /* 2950 */ "ee.vmax.s8\t \0"
326
74.9k
  /* 2963 */ "ee.vmul.u8\t \0"
327
74.9k
  /* 2976 */ "ee.movi.32.a\t \0"
328
74.9k
  /* 2991 */ "ee.srcmb.s16.qacc\t \0"
329
74.9k
  /* 3011 */ "ee.vsmulas.s16.qacc\t \0"
330
74.9k
  /* 3033 */ "ee.vmulas.s16.qacc\t \0"
331
74.9k
  /* 3054 */ "ee.mov.s16.qacc\t \0"
332
74.9k
  /* 3072 */ "ee.vmulas.u16.qacc\t \0"
333
74.9k
  /* 3093 */ "ee.mov.u16.qacc\t \0"
334
74.9k
  /* 3111 */ "ee.srcmb.s8.qacc\t \0"
335
74.9k
  /* 3130 */ "ee.vsmulas.s8.qacc\t \0"
336
74.9k
  /* 3151 */ "ee.vmulas.s8.qacc\t \0"
337
74.9k
  /* 3171 */ "ee.mov.s8.qacc\t \0"
338
74.9k
  /* 3188 */ "ee.vmulas.u8.qacc\t \0"
339
74.9k
  /* 3208 */ "ee.mov.u8.qacc\t \0"
340
74.9k
  /* 3225 */ "mula.da.hh.lddec\t \0"
341
74.9k
  /* 3244 */ "mula.dd.hh.lddec\t \0"
342
74.9k
  /* 3263 */ "mula.da.lh.lddec\t \0"
343
74.9k
  /* 3282 */ "mula.dd.lh.lddec\t \0"
344
74.9k
  /* 3301 */ "mula.da.hl.lddec\t \0"
345
74.9k
  /* 3320 */ "mula.dd.hl.lddec\t \0"
346
74.9k
  /* 3339 */ "mula.da.ll.lddec\t \0"
347
74.9k
  /* 3358 */ "mula.dd.ll.lddec\t \0"
348
74.9k
  /* 3377 */ "mula.da.hh.ldinc\t \0"
349
74.9k
  /* 3396 */ "mula.dd.hh.ldinc\t \0"
350
74.9k
  /* 3415 */ "mula.da.lh.ldinc\t \0"
351
74.9k
  /* 3434 */ "mula.dd.lh.ldinc\t \0"
352
74.9k
  /* 3453 */ "mula.da.hl.ldinc\t \0"
353
74.9k
  /* 3472 */ "mula.dd.hl.ldinc\t \0"
354
74.9k
  /* 3491 */ "mula.da.ll.ldinc\t \0"
355
74.9k
  /* 3510 */ "mula.dd.ll.ldinc\t \0"
356
74.9k
  /* 3529 */ "rur.sar_byte\t \0"
357
74.9k
  /* 3544 */ "wur.sar_byte\t \0"
358
74.9k
  /* 3559 */ "rur.fft_bit_width\t \0"
359
74.9k
  /* 3579 */ "wur.fft_bit_width\t \0"
360
74.9k
  /* 3599 */ "ee.fft.ams.s16.ld.r32.decp\t \0"
361
74.9k
  /* 3628 */ "ee.fft.vst.r32.decp\t \0"
362
74.9k
  /* 3650 */ "ee.vldhbc.16.incp\t \0"
363
74.9k
  /* 3670 */ "ee.vmulas.s16.qacc.ldbc.incp\t \0"
364
74.9k
  /* 3701 */ "ee.vmulas.u16.qacc.ldbc.incp\t \0"
365
74.9k
  /* 3732 */ "ee.vmulas.s8.qacc.ldbc.incp\t \0"
366
74.9k
  /* 3762 */ "ee.vmulas.u8.qacc.ldbc.incp\t \0"
367
74.9k
  /* 3792 */ "ee.vmin.s32.ld.incp\t \0"
368
74.9k
  /* 3814 */ "ee.vsubs.s32.ld.incp\t \0"
369
74.9k
  /* 3837 */ "ee.vadds.s32.ld.incp\t \0"
370
74.9k
  /* 3860 */ "ee.vmax.s32.ld.incp\t \0"
371
74.9k
  /* 3882 */ "ee.cmul.s16.ld.incp\t \0"
372
74.9k
  /* 3904 */ "ee.vmul.s16.ld.incp\t \0"
373
74.9k
  /* 3926 */ "ee.vmin.s16.ld.incp\t \0"
374
74.9k
  /* 3948 */ "ee.vsubs.s16.ld.incp\t \0"
375
74.9k
  /* 3971 */ "ee.vadds.s16.ld.incp\t \0"
376
74.9k
  /* 3994 */ "ee.fft.ams.s16.ld.incp\t \0"
377
74.9k
  /* 4019 */ "ee.vmax.s16.ld.incp\t \0"
378
74.9k
  /* 4041 */ "ee.vmul.u16.ld.incp\t \0"
379
74.9k
  /* 4063 */ "ee.vmul.s8.ld.incp\t \0"
380
74.9k
  /* 4084 */ "ee.vmin.s8.ld.incp\t \0"
381
74.9k
  /* 4105 */ "ee.vsubs.s8.ld.incp\t \0"
382
74.9k
  /* 4127 */ "ee.vadds.s8.ld.incp\t \0"
383
74.9k
  /* 4149 */ "ee.vmax.s8.ld.incp\t \0"
384
74.9k
  /* 4170 */ "ee.vmul.u8.ld.incp\t \0"
385
74.9k
  /* 4191 */ "ee.vsmulas.s16.qacc.ld.incp\t \0"
386
74.9k
  /* 4221 */ "ee.vsmulas.s8.qacc.ld.incp\t \0"
387
74.9k
  /* 4250 */ "ee.vmin.s32.st.incp\t \0"
388
74.9k
  /* 4272 */ "ee.vsubs.s32.st.incp\t \0"
389
74.9k
  /* 4295 */ "ee.vadds.s32.st.incp\t \0"
390
74.9k
  /* 4318 */ "ee.vmax.s32.st.incp\t \0"
391
74.9k
  /* 4340 */ "ee.fft.r2bf.s16.st.incp\t \0"
392
74.9k
  /* 4366 */ "ee.cmul.s16.st.incp\t \0"
393
74.9k
  /* 4388 */ "ee.vmul.s16.st.incp\t \0"
394
74.9k
  /* 4410 */ "ee.vmin.s16.st.incp\t \0"
395
74.9k
  /* 4432 */ "ee.vsubs.s16.st.incp\t \0"
396
74.9k
  /* 4455 */ "ee.vadds.s16.st.incp\t \0"
397
74.9k
  /* 4478 */ "ee.fft.ams.s16.st.incp\t \0"
398
74.9k
  /* 4503 */ "ee.vmax.s16.st.incp\t \0"
399
74.9k
  /* 4525 */ "ee.vmul.u16.st.incp\t \0"
400
74.9k
  /* 4547 */ "ee.srcq.128.st.incp\t \0"
401
74.9k
  /* 4569 */ "ee.vmul.s8.st.incp\t \0"
402
74.9k
  /* 4590 */ "ee.vmin.s8.st.incp\t \0"
403
74.9k
  /* 4611 */ "ee.vsubs.s8.st.incp\t \0"
404
74.9k
  /* 4633 */ "ee.vadds.s8.st.incp\t \0"
405
74.9k
  /* 4655 */ "ee.vmax.s8.st.incp\t \0"
406
74.9k
  /* 4676 */ "ee.vmul.u8.st.incp\t \0"
407
74.9k
  /* 4697 */ "ee.vldbc.32.ip\t \0"
408
74.9k
  /* 4714 */ "ee.ld.qacc_h.h.32.ip\t \0"
409
74.9k
  /* 4737 */ "ee.st.qacc_h.h.32.ip\t \0"
410
74.9k
  /* 4760 */ "ee.ld.qacc_l.h.32.ip\t \0"
411
74.9k
  /* 4783 */ "ee.st.qacc_l.h.32.ip\t \0"
412
74.9k
  /* 4806 */ "ee.ldf.64.ip\t \0"
413
74.9k
  /* 4821 */ "ee.stf.64.ip\t \0"
414
74.9k
  /* 4836 */ "ee.vld.h.64.ip\t \0"
415
74.9k
  /* 4853 */ "ee.vst.h.64.ip\t \0"
416
74.9k
  /* 4870 */ "ee.vld.l.64.ip\t \0"
417
74.9k
  /* 4887 */ "ee.vst.l.64.ip\t \0"
418
74.9k
  /* 4904 */ "ee.vldbc.16.ip\t \0"
419
74.9k
  /* 4921 */ "ee.vldbc.8.ip\t \0"
420
74.9k
  /* 4937 */ "ee.ldqa.s16.128.ip\t \0"
421
74.9k
  /* 4958 */ "ee.ldqa.u16.128.ip\t \0"
422
74.9k
  /* 4979 */ "ee.ldqa.s8.128.ip\t \0"
423
74.9k
  /* 4999 */ "ee.ldqa.u8.128.ip\t \0"
424
74.9k
  /* 5019 */ "ee.vld.128.ip\t \0"
425
74.9k
  /* 5035 */ "ee.ldf.128.ip\t \0"
426
74.9k
  /* 5051 */ "ee.stf.128.ip\t \0"
427
74.9k
  /* 5067 */ "ee.ld.qacc_h.l.128.ip\t \0"
428
74.9k
  /* 5091 */ "ee.st.qacc_h.l.128.ip\t \0"
429
74.9k
  /* 5115 */ "ee.ld.qacc_l.l.128.ip\t \0"
430
74.9k
  /* 5139 */ "ee.st.qacc_l.l.128.ip\t \0"
431
74.9k
  /* 5163 */ "ee.vst.128.ip\t \0"
432
74.9k
  /* 5179 */ "ee.vmulas.s16.qacc.ld.ip\t \0"
433
74.9k
  /* 5206 */ "ee.vmulas.u16.qacc.ld.ip\t \0"
434
74.9k
  /* 5233 */ "ee.vmulas.s8.qacc.ld.ip\t \0"
435
74.9k
  /* 5259 */ "ee.vmulas.u8.qacc.ld.ip\t \0"
436
74.9k
  /* 5285 */ "ee.src.q.ld.ip\t \0"
437
74.9k
  /* 5302 */ "ee.vmulas.s16.accx.ld.ip\t \0"
438
74.9k
  /* 5329 */ "ee.vmulas.u16.accx.ld.ip\t \0"
439
74.9k
  /* 5356 */ "ee.vmulas.s8.accx.ld.ip\t \0"
440
74.9k
  /* 5382 */ "ee.vmulas.u8.accx.ld.ip\t \0"
441
74.9k
  /* 5408 */ "ee.ld.ua_state.ip\t \0"
442
74.9k
  /* 5428 */ "ee.st.ua_state.ip\t \0"
443
74.9k
  /* 5448 */ "ee.ld.128.usar.ip\t \0"
444
74.9k
  /* 5468 */ "ee.ld.accx.ip\t \0"
445
74.9k
  /* 5484 */ "ee.st.accx.ip\t \0"
446
74.9k
  /* 5500 */ "ee.fft.ams.s16.ld.incp.uaup\t \0"
447
74.9k
  /* 5530 */ "ee.vmulas.s16.qacc.ldbc.incp.qup\t \0"
448
74.9k
  /* 5565 */ "ee.vmulas.u16.qacc.ldbc.incp.qup\t \0"
449
74.9k
  /* 5600 */ "ee.vmulas.s8.qacc.ldbc.incp.qup\t \0"
450
74.9k
  /* 5634 */ "ee.vmulas.u8.qacc.ldbc.incp.qup\t \0"
451
74.9k
  /* 5668 */ "ee.vmulas.s16.qacc.ld.ip.qup\t \0"
452
74.9k
  /* 5699 */ "ee.vmulas.u16.qacc.ld.ip.qup\t \0"
453
74.9k
  /* 5730 */ "ee.vmulas.s8.qacc.ld.ip.qup\t \0"
454
74.9k
  /* 5760 */ "ee.vmulas.u8.qacc.ld.ip.qup\t \0"
455
74.9k
  /* 5790 */ "ee.vmulas.s16.accx.ld.ip.qup\t \0"
456
74.9k
  /* 5821 */ "ee.vmulas.u16.accx.ld.ip.qup\t \0"
457
74.9k
  /* 5852 */ "ee.vmulas.s8.accx.ld.ip.qup\t \0"
458
74.9k
  /* 5882 */ "ee.vmulas.u8.accx.ld.ip.qup\t \0"
459
74.9k
  /* 5912 */ "ee.vmulas.s16.qacc.ld.xp.qup\t \0"
460
74.9k
  /* 5943 */ "ee.vmulas.u16.qacc.ld.xp.qup\t \0"
461
74.9k
  /* 5974 */ "ee.vmulas.s8.qacc.ld.xp.qup\t \0"
462
74.9k
  /* 6004 */ "ee.vmulas.u8.qacc.ld.xp.qup\t \0"
463
74.9k
  /* 6034 */ "ee.vmulas.s16.accx.ld.xp.qup\t \0"
464
74.9k
  /* 6065 */ "ee.vmulas.u16.accx.ld.xp.qup\t \0"
465
74.9k
  /* 6096 */ "ee.vmulas.s8.accx.ld.xp.qup\t \0"
466
74.9k
  /* 6126 */ "ee.vmulas.u8.accx.ld.xp.qup\t \0"
467
74.9k
  /* 6156 */ "ee.src.q.qup\t \0"
468
74.9k
  /* 6171 */ "ee.vldbc.32.xp\t \0"
469
74.9k
  /* 6188 */ "ee.ldf.64.xp\t \0"
470
74.9k
  /* 6203 */ "ee.stf.64.xp\t \0"
471
74.9k
  /* 6218 */ "ee.vld.h.64.xp\t \0"
472
74.9k
  /* 6235 */ "ee.vst.h.64.xp\t \0"
473
74.9k
  /* 6252 */ "ee.vld.l.64.xp\t \0"
474
74.9k
  /* 6269 */ "ee.vst.l.64.xp\t \0"
475
74.9k
  /* 6286 */ "ee.vldbc.16.xp\t \0"
476
74.9k
  /* 6303 */ "ee.vldbc.8.xp\t \0"
477
74.9k
  /* 6319 */ "ee.ldqa.s16.128.xp\t \0"
478
74.9k
  /* 6340 */ "ee.ldqa.u16.128.xp\t \0"
479
74.9k
  /* 6361 */ "ee.ldqa.s8.128.xp\t \0"
480
74.9k
  /* 6381 */ "ee.ldqa.u8.128.xp\t \0"
481
74.9k
  /* 6401 */ "ee.vld.128.xp\t \0"
482
74.9k
  /* 6417 */ "ee.ldf.128.xp\t \0"
483
74.9k
  /* 6433 */ "ee.stf.128.xp\t \0"
484
74.9k
  /* 6449 */ "ee.vst.128.xp\t \0"
485
74.9k
  /* 6465 */ "ee.fft.cmul.s16.ld.xp\t \0"
486
74.9k
  /* 6489 */ "ee.vmulas.s16.qacc.ld.xp\t \0"
487
74.9k
  /* 6516 */ "ee.vmulas.u16.qacc.ld.xp\t \0"
488
74.9k
  /* 6543 */ "ee.vmulas.s8.qacc.ld.xp\t \0"
489
74.9k
  /* 6569 */ "ee.vmulas.u8.qacc.ld.xp\t \0"
490
74.9k
  /* 6595 */ "ee.src.q.ld.xp\t \0"
491
74.9k
  /* 6612 */ "ee.vmulas.s16.accx.ld.xp\t \0"
492
74.9k
  /* 6639 */ "ee.vmulas.u16.accx.ld.xp\t \0"
493
74.9k
  /* 6666 */ "ee.vmulas.s8.accx.ld.xp\t \0"
494
74.9k
  /* 6692 */ "ee.vmulas.u8.accx.ld.xp\t \0"
495
74.9k
  /* 6718 */ "ee.ld.128.usar.xp\t \0"
496
74.9k
  /* 6738 */ "ee.fft.cmul.s16.st.xp\t \0"
497
74.9k
  /* 6762 */ "ee.movi.32.q\t \0"
498
74.9k
  /* 6777 */ "ee.src.q\t \0"
499
74.9k
  /* 6788 */ "ee.zero.q\t \0"
500
74.9k
  /* 6800 */ "ee.slci.2q\t \0"
501
74.9k
  /* 6813 */ "ee.srci.2q\t \0"
502
74.9k
  /* 6826 */ "ee.slcxxp.2q\t \0"
503
74.9k
  /* 6841 */ "ee.srcxxp.2q\t \0"
504
74.9k
  /* 6856 */ "ee.andq\t \0"
505
74.9k
  /* 6866 */ "ee.orq\t \0"
506
74.9k
  /* 6875 */ "ee.xorq\t \0"
507
74.9k
  /* 6885 */ "ee.notq\t \0"
508
74.9k
  /* 6895 */ "mv.qr\t \0"
509
74.9k
  /* 6903 */ "wur.fsr\t \0"
510
74.9k
  /* 6913 */ "rur.gpio_out\t \0"
511
74.9k
  /* 6928 */ "wur.gpio_out\t \0"
512
74.9k
  /* 6943 */ "ee.bitrev\t \0"
513
74.9k
  /* 6955 */ "ee.vmulas.s16.accx\t \0"
514
74.9k
  /* 6976 */ "ee.vmulas.u16.accx\t \0"
515
74.9k
  /* 6997 */ "ee.vmulas.s8.accx\t \0"
516
74.9k
  /* 7017 */ "ee.vmulas.u8.accx\t \0"
517
74.9k
  /* 7037 */ "ee.srs.accx\t \0"
518
74.9k
  /* 7051 */ "!xtensa_wsr_m0_p, \0"
519
74.9k
  /* 7070 */ "!xtensa_xsr_m0_p, \0"
520
74.9k
  /* 7089 */ "!xtensa_wsr_m1_p, \0"
521
74.9k
  /* 7108 */ "!xtensa_xsr_m1_p, \0"
522
74.9k
  /* 7127 */ "!atomic_load_sub_32_p, \0"
523
74.9k
  /* 7151 */ "!xtensa_ee_vldbc_32_p, \0"
524
74.9k
  /* 7175 */ "!atomic_load_add_32_p, \0"
525
74.9k
  /* 7199 */ "!atomic_load_and_32_p, \0"
526
74.9k
  /* 7223 */ "!atomic_load_nand_32_p, \0"
527
74.9k
  /* 7248 */ "!xtensa_ee_vsl_32_p, \0"
528
74.9k
  /* 7270 */ "!atomic_load_min_32_p, \0"
529
74.9k
  /* 7294 */ "!atomic_load_umin_32_p, \0"
530
74.9k
  /* 7319 */ "!atomic_swap_32_p, \0"
531
74.9k
  /* 7339 */ "!atomic_cmp_swap_32_p, \0"
532
74.9k
  /* 7363 */ "!xtensa_ee_vunzip_32_p, \0"
533
74.9k
  /* 7388 */ "!xtensa_ee_vzip_32_p, \0"
534
74.9k
  /* 7411 */ "!xtensa_ee_ldxq_32_p, \0"
535
74.9k
  /* 7434 */ "!xtensa_ee_stxq_32_p, \0"
536
74.9k
  /* 7457 */ "!atomic_load_or_32_p, \0"
537
74.9k
  /* 7480 */ "!atomic_load_xor_32_p, \0"
538
74.9k
  /* 7504 */ "!xtensa_ee_vsr_32_p, \0"
539
74.9k
  /* 7526 */ "!atomic_load_max_32_p, \0"
540
74.9k
  /* 7550 */ "!atomic_load_umax_32_p, \0"
541
74.9k
  /* 7575 */ "!xtensa_ee_vmin_s32_p, \0"
542
74.9k
  /* 7599 */ "!xtensa_ee_vcmp_eq_s32_p, \0"
543
74.9k
  /* 7626 */ "!xtensa_ee_vsubs_s32_p, \0"
544
74.9k
  /* 7651 */ "!xtensa_ee_vadds_s32_p, \0"
545
74.9k
  /* 7676 */ "!xtensa_ee_vcmp_gt_s32_p, \0"
546
74.9k
  /* 7703 */ "!xtensa_ee_vcmp_lt_s32_p, \0"
547
74.9k
  /* 7730 */ "!xtensa_ee_vmax_s32_p, \0"
548
74.9k
  /* 7754 */ "!xtensa_wsr_m2_p, \0"
549
74.9k
  /* 7773 */ "!xtensa_xsr_m2_p, \0"
550
74.9k
  /* 7792 */ "!xtensa_wsr_m3_p, \0"
551
74.9k
  /* 7811 */ "!xtensa_xsr_m3_p, \0"
552
74.9k
  /* 7830 */ "!atomic_load_sub_16_p, \0"
553
74.9k
  /* 7854 */ "!xtensa_ee_vldbc_16_p, \0"
554
74.9k
  /* 7878 */ "!atomic_load_add_16_p, \0"
555
74.9k
  /* 7902 */ "!atomic_load_and_16_p, \0"
556
74.9k
  /* 7926 */ "!atomic_load_nand_16_p, \0"
557
74.9k
  /* 7951 */ "!atomic_load_min_16_p, \0"
558
74.9k
  /* 7975 */ "!atomic_load_umin_16_p, \0"
559
74.9k
  /* 8000 */ "!atomic_swap_16_p, \0"
560
74.9k
  /* 8020 */ "!atomic_cmp_swap_16_p, \0"
561
74.9k
  /* 8044 */ "!xtensa_ee_vunzip_16_p, \0"
562
74.9k
  /* 8069 */ "!xtensa_ee_vzip_16_p, \0"
563
74.9k
  /* 8092 */ "!atomic_load_or_16_p, \0"
564
74.9k
  /* 8115 */ "!atomic_load_xor_16_p, \0"
565
74.9k
  /* 8139 */ "!atomic_load_max_16_p, \0"
566
74.9k
  /* 8163 */ "!atomic_load_umax_16_p, \0"
567
74.9k
  /* 8188 */ "!xtensa_ee_fft_r2bf_s16_p, \0"
568
74.9k
  /* 8216 */ "!xtensa_ee_cmul_s16_p, \0"
569
74.9k
  /* 8240 */ "!xtensa_ee_vmul_s16_p, \0"
570
74.9k
  /* 8264 */ "!xtensa_ee_vmin_s16_p, \0"
571
74.9k
  /* 8288 */ "!xtensa_ee_vcmp_eq_s16_p, \0"
572
74.9k
  /* 8315 */ "!xtensa_ee_vsubs_s16_p, \0"
573
74.9k
  /* 8340 */ "!xtensa_ee_vadds_s16_p, \0"
574
74.9k
  /* 8365 */ "!xtensa_ee_vcmp_gt_s16_p, \0"
575
74.9k
  /* 8392 */ "!xtensa_ee_vcmp_lt_s16_p, \0"
576
74.9k
  /* 8419 */ "!xtensa_ee_vprelu_s16_p, \0"
577
74.9k
  /* 8445 */ "!xtensa_ee_vrelu_s16_p, \0"
578
74.9k
  /* 8470 */ "!xtensa_ee_vmax_s16_p, \0"
579
74.9k
  /* 8494 */ "!xtensa_ee_vmul_u16_p, \0"
580
74.9k
  /* 8518 */ "!atomic_load_sub_8_p, \0"
581
74.9k
  /* 8541 */ "!xtensa_ee_vldbc_8_p, \0"
582
74.9k
  /* 8564 */ "!atomic_load_add_8_p, \0"
583
74.9k
  /* 8587 */ "!atomic_load_and_8_p, \0"
584
74.9k
  /* 8610 */ "!atomic_load_nand_8_p, \0"
585
74.9k
  /* 8634 */ "!atomic_load_min_8_p, \0"
586
74.9k
  /* 8657 */ "!atomic_load_umin_8_p, \0"
587
74.9k
  /* 8681 */ "!atomic_swap_8_p, \0"
588
74.9k
  /* 8700 */ "!atomic_cmp_swap_8_p, \0"
589
74.9k
  /* 8723 */ "!xtensa_ee_vunzip_8_p, \0"
590
74.9k
  /* 8747 */ "!xtensa_ee_vzip_8_p, \0"
591
74.9k
  /* 8769 */ "!atomic_load_or_8_p, \0"
592
74.9k
  /* 8791 */ "!atomic_load_xor_8_p, \0"
593
74.9k
  /* 8814 */ "!atomic_load_max_8_p, \0"
594
74.9k
  /* 8837 */ "!atomic_load_umax_8_p, \0"
595
74.9k
  /* 8861 */ "!xtensa_ee_vmul_s8_p, \0"
596
74.9k
  /* 8884 */ "!xtensa_ee_vmin_s8_p, \0"
597
74.9k
  /* 8907 */ "!xtensa_ee_vcmp_eq_s8_p, \0"
598
74.9k
  /* 8933 */ "!xtensa_ee_vsubs_s8_p, \0"
599
74.9k
  /* 8957 */ "!xtensa_ee_vadds_s8_p, \0"
600
74.9k
  /* 8981 */ "!xtensa_ee_vcmp_gt_s8_p, \0"
601
74.9k
  /* 9007 */ "!xtensa_ee_vcmp_lt_s8_p, \0"
602
74.9k
  /* 9033 */ "!xtensa_ee_vprelu_s8_p, \0"
603
74.9k
  /* 9058 */ "!xtensa_ee_vrelu_s8_p, \0"
604
74.9k
  /* 9082 */ "!xtensa_ee_vmax_s8_p, \0"
605
74.9k
  /* 9105 */ "!xtensa_ee_vmul_u8_p, \0"
606
74.9k
  /* 9128 */ "!xtensa_ee_movi_32_a_p, \0"
607
74.9k
  /* 9153 */ "!xtensa_ee_srcmb_s16_qacc_p, \0"
608
74.9k
  /* 9183 */ "!xtensa_ee_vsmulas_s16_qacc_p, \0"
609
74.9k
  /* 9215 */ "!xtensa_ee_vmulas_s16_qacc_p, \0"
610
74.9k
  /* 9246 */ "!xtensa_ee_mov_s16_qacc_p, \0"
611
74.9k
  /* 9274 */ "!xtensa_ee_vmulas_u16_qacc_p, \0"
612
74.9k
  /* 9305 */ "!xtensa_ee_mov_u16_qacc_p, \0"
613
74.9k
  /* 9333 */ "!xtensa_ee_srcmb_s8_qacc_p, \0"
614
74.9k
  /* 9362 */ "!xtensa_ee_vsmulas_s8_qacc_p, \0"
615
74.9k
  /* 9393 */ "!xtensa_ee_vmulas_s8_qacc_p, \0"
616
74.9k
  /* 9423 */ "!xtensa_ee_mov_s8_qacc_p, \0"
617
74.9k
  /* 9450 */ "!xtensa_ee_vmulas_u8_qacc_p, \0"
618
74.9k
  /* 9480 */ "!xtensa_ee_mov_u8_qacc_p, \0"
619
74.9k
  /* 9507 */ "!xtensa_lddec_p, \0"
620
74.9k
  /* 9525 */ "!xtensa_mula_da_hh_lddec_p, \0"
621
74.9k
  /* 9554 */ "!xtensa_mula_dd_hh_lddec_p, \0"
622
74.9k
  /* 9583 */ "!xtensa_mula_da_lh_lddec_p, \0"
623
74.9k
  /* 9612 */ "!xtensa_mula_dd_lh_lddec_p, \0"
624
74.9k
  /* 9641 */ "!xtensa_mula_da_hl_lddec_p, \0"
625
74.9k
  /* 9670 */ "!xtensa_mula_dd_hl_lddec_p, \0"
626
74.9k
  /* 9699 */ "!xtensa_mula_da_ll_lddec_p, \0"
627
74.9k
  /* 9728 */ "!xtensa_mula_dd_ll_lddec_p, \0"
628
74.9k
  /* 9757 */ "!xtensa_ldinc_p, \0"
629
74.9k
  /* 9775 */ "!xtensa_mula_da_hh_ldinc_p, \0"
630
74.9k
  /* 9804 */ "!xtensa_mula_dd_hh_ldinc_p, \0"
631
74.9k
  /* 9833 */ "!xtensa_mula_da_lh_ldinc_p, \0"
632
74.9k
  /* 9862 */ "!xtensa_mula_dd_lh_ldinc_p, \0"
633
74.9k
  /* 9891 */ "!xtensa_mula_da_hl_ldinc_p, \0"
634
74.9k
  /* 9920 */ "!xtensa_mula_dd_hl_ldinc_p, \0"
635
74.9k
  /* 9949 */ "!xtensa_mula_da_ll_ldinc_p, \0"
636
74.9k
  /* 9978 */ "!xtensa_mula_dd_ll_ldinc_p, \0"
637
74.9k
  /* 10007 */ "!xtensa_wsr_acchi_p, \0"
638
74.9k
  /* 10029 */ "!xtensa_xsr_acchi_p, \0"
639
74.9k
  /* 10051 */ "!xtensa_wsr_acclo_p, \0"
640
74.9k
  /* 10073 */ "!xtensa_xsr_acclo_p, \0"
641
74.9k
  /* 10095 */ "!xtensa_ee_fft_ams_s16_ld_r32_decp_p, \0"
642
74.9k
  /* 10134 */ "!xtensa_ee_fft_vst_r32_decp_p, \0"
643
74.9k
  /* 10166 */ "!xtensa_ee_vldhbc_16_incp_p, \0"
644
74.9k
  /* 10196 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_p, \0"
645
74.9k
  /* 10237 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_p, \0"
646
74.9k
  /* 10278 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_p, \0"
647
74.9k
  /* 10318 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_p, \0"
648
74.9k
  /* 10358 */ "!xtensa_ee_vmin_s32_ld_incp_p, \0"
649
74.9k
  /* 10390 */ "!xtensa_ee_vsubs_s32_ld_incp_p, \0"
650
74.9k
  /* 10423 */ "!xtensa_ee_vadds_s32_ld_incp_p, \0"
651
74.9k
  /* 10456 */ "!xtensa_ee_vmax_s32_ld_incp_p, \0"
652
74.9k
  /* 10488 */ "!xtensa_ee_cmul_s16_ld_incp_p, \0"
653
74.9k
  /* 10520 */ "!xtensa_ee_vmul_s16_ld_incp_p, \0"
654
74.9k
  /* 10552 */ "!xtensa_ee_vmin_s16_ld_incp_p, \0"
655
74.9k
  /* 10584 */ "!xtensa_ee_vsubs_s16_ld_incp_p, \0"
656
74.9k
  /* 10617 */ "!xtensa_ee_vadds_s16_ld_incp_p, \0"
657
74.9k
  /* 10650 */ "!xtensa_ee_fft_ams_s16_ld_incp_p, \0"
658
74.9k
  /* 10685 */ "!xtensa_ee_vmax_s16_ld_incp_p, \0"
659
74.9k
  /* 10717 */ "!xtensa_ee_vmul_u16_ld_incp_p, \0"
660
74.9k
  /* 10749 */ "!xtensa_ee_vmul_s8_ld_incp_p, \0"
661
74.9k
  /* 10780 */ "!xtensa_ee_vmin_s8_ld_incp_p, \0"
662
74.9k
  /* 10811 */ "!xtensa_ee_vsubs_s8_ld_incp_p, \0"
663
74.9k
  /* 10843 */ "!xtensa_ee_vadds_s8_ld_incp_p, \0"
664
74.9k
  /* 10875 */ "!xtensa_ee_vmax_s8_ld_incp_p, \0"
665
74.9k
  /* 10906 */ "!xtensa_ee_vmul_u8_ld_incp_p, \0"
666
74.9k
  /* 10937 */ "!xtensa_ee_vsmulas_s16_qacc_ld_incp_p, \0"
667
74.9k
  /* 10977 */ "!xtensa_ee_vsmulas_s8_qacc_ld_incp_p, \0"
668
74.9k
  /* 11016 */ "!xtensa_ee_vmin_s32_st_incp_p, \0"
669
74.9k
  /* 11048 */ "!xtensa_ee_vsubs_s32_st_incp_p, \0"
670
74.9k
  /* 11081 */ "!xtensa_ee_vadds_s32_st_incp_p, \0"
671
74.9k
  /* 11114 */ "!xtensa_ee_vmax_s32_st_incp_p, \0"
672
74.9k
  /* 11146 */ "!xtensa_ee_fft_r2bf_s16_st_incp_p, \0"
673
74.9k
  /* 11182 */ "!xtensa_ee_cmul_s16_st_incp_p, \0"
674
74.9k
  /* 11214 */ "!xtensa_ee_vmul_s16_st_incp_p, \0"
675
74.9k
  /* 11246 */ "!xtensa_ee_vmin_s16_st_incp_p, \0"
676
74.9k
  /* 11278 */ "!xtensa_ee_vsubs_s16_st_incp_p, \0"
677
74.9k
  /* 11311 */ "!xtensa_ee_vadds_s16_st_incp_p, \0"
678
74.9k
  /* 11344 */ "!xtensa_ee_fft_ams_s16_st_incp_p, \0"
679
74.9k
  /* 11379 */ "!xtensa_ee_vmax_s16_st_incp_p, \0"
680
74.9k
  /* 11411 */ "!xtensa_ee_vmul_u16_st_incp_p, \0"
681
74.9k
  /* 11443 */ "!xtensa_ee_srcq_128_st_incp_p, \0"
682
74.9k
  /* 11475 */ "!xtensa_ee_vmul_s8_st_incp_p, \0"
683
74.9k
  /* 11506 */ "!xtensa_ee_vmin_s8_st_incp_p, \0"
684
74.9k
  /* 11537 */ "!xtensa_ee_vsubs_s8_st_incp_p, \0"
685
74.9k
  /* 11569 */ "!xtensa_ee_vadds_s8_st_incp_p, \0"
686
74.9k
  /* 11601 */ "!xtensa_ee_vmax_s8_st_incp_p, \0"
687
74.9k
  /* 11632 */ "!xtensa_ee_vmul_u8_st_incp_p, \0"
688
74.9k
  /* 11663 */ "!xtensa_ee_vldbc_32_ip_p, \0"
689
74.9k
  /* 11690 */ "!xtensa_ee_ld_qacc_h_h_32_ip_p, \0"
690
74.9k
  /* 11723 */ "!xtensa_ee_st_qacc_h_h_32_ip_p, \0"
691
74.9k
  /* 11756 */ "!xtensa_ee_ld_qacc_l_h_32_ip_p, \0"
692
74.9k
  /* 11789 */ "!xtensa_ee_st_qacc_l_h_32_ip_p, \0"
693
74.9k
  /* 11822 */ "!xtensa_ee_ldf_64_ip_p, \0"
694
74.9k
  /* 11847 */ "!xtensa_ee_stf_64_ip_p, \0"
695
74.9k
  /* 11872 */ "!xtensa_ee_vld_h_64_ip_p, \0"
696
74.9k
  /* 11899 */ "!xtensa_ee_vst_h_64_ip_p, \0"
697
74.9k
  /* 11926 */ "!xtensa_ee_vld_l_64_ip_p, \0"
698
74.9k
  /* 11953 */ "!xtensa_ee_vst_l_64_ip_p, \0"
699
74.9k
  /* 11980 */ "!xtensa_ee_vldbc_16_ip_p, \0"
700
74.9k
  /* 12007 */ "!xtensa_ee_ldqa_s16_128_ip_p, \0"
701
74.9k
  /* 12038 */ "!xtensa_ee_ldqa_u16_128_ip_p, \0"
702
74.9k
  /* 12069 */ "!xtensa_ee_ldqa_s8_128_ip_p, \0"
703
74.9k
  /* 12099 */ "!xtensa_ee_ldqa_u8_128_ip_p, \0"
704
74.9k
  /* 12129 */ "!xtensa_ee_vld_128_ip_p, \0"
705
74.9k
  /* 12155 */ "!xtensa_ee_ldf_128_ip_p, \0"
706
74.9k
  /* 12181 */ "!xtensa_ee_stf_128_ip_p, \0"
707
74.9k
  /* 12207 */ "!xtensa_ee_ld_qacc_h_l_128_ip_p, \0"
708
74.9k
  /* 12241 */ "!xtensa_ee_st_qacc_h_l_128_ip_p, \0"
709
74.9k
  /* 12275 */ "!xtensa_ee_ld_qacc_l_l_128_ip_p, \0"
710
74.9k
  /* 12309 */ "!xtensa_ee_st_qacc_l_l_128_ip_p, \0"
711
74.9k
  /* 12343 */ "!xtensa_ee_vst_128_ip_p, \0"
712
74.9k
  /* 12369 */ "!xtensa_ee_vldbc_8_ip_p, \0"
713
74.9k
  /* 12395 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_p, \0"
714
74.9k
  /* 12432 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_p, \0"
715
74.9k
  /* 12469 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_p, \0"
716
74.9k
  /* 12505 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_p, \0"
717
74.9k
  /* 12541 */ "!xtensa_ee_src_q_ld_ip_p, \0"
718
74.9k
  /* 12568 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_p, \0"
719
74.9k
  /* 12605 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_p, \0"
720
74.9k
  /* 12642 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_p, \0"
721
74.9k
  /* 12678 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_p, \0"
722
74.9k
  /* 12714 */ "!xtensa_ee_ld_ua_state_ip_p, \0"
723
74.9k
  /* 12744 */ "!xtensa_ee_st_ua_state_ip_p, \0"
724
74.9k
  /* 12774 */ "!xtensa_ee_ld_128_usar_ip_p, \0"
725
74.9k
  /* 12804 */ "!xtensa_ee_ld_accx_ip_p, \0"
726
74.9k
  /* 12830 */ "!xtensa_ee_st_accx_ip_p, \0"
727
74.9k
  /* 12856 */ "!xtensa_ee_fft_ams_s16_ld_incp_uaup_p, \0"
728
74.9k
  /* 12896 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_qup_p, \0"
729
74.9k
  /* 12941 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_qup_p, \0"
730
74.9k
  /* 12986 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_qup_p, \0"
731
74.9k
  /* 13030 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_qup_p, \0"
732
74.9k
  /* 13074 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_qup_p, \0"
733
74.9k
  /* 13115 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_qup_p, \0"
734
74.9k
  /* 13156 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_qup_p, \0"
735
74.9k
  /* 13196 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_qup_p, \0"
736
74.9k
  /* 13236 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_qup_p, \0"
737
74.9k
  /* 13277 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_qup_p, \0"
738
74.9k
  /* 13318 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_qup_p, \0"
739
74.9k
  /* 13358 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_qup_p, \0"
740
74.9k
  /* 13398 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_qup_p, \0"
741
74.9k
  /* 13439 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_qup_p, \0"
742
74.9k
  /* 13480 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_qup_p, \0"
743
74.9k
  /* 13520 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_qup_p, \0"
744
74.9k
  /* 13560 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_qup_p, \0"
745
74.9k
  /* 13601 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_qup_p, \0"
746
74.9k
  /* 13642 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_qup_p, \0"
747
74.9k
  /* 13682 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_qup_p, \0"
748
74.9k
  /* 13722 */ "!xtensa_ee_src_q_qup_p, \0"
749
74.9k
  /* 13747 */ "!xtensa_ee_vldbc_32_xp_p, \0"
750
74.9k
  /* 13774 */ "!xtensa_ee_ldf_64_xp_p, \0"
751
74.9k
  /* 13799 */ "!xtensa_ee_stf_64_xp_p, \0"
752
74.9k
  /* 13824 */ "!xtensa_ee_vld_h_64_xp_p, \0"
753
74.9k
  /* 13851 */ "!xtensa_ee_vst_h_64_xp_p, \0"
754
74.9k
  /* 13878 */ "!xtensa_ee_vld_l_64_xp_p, \0"
755
74.9k
  /* 13905 */ "!xtensa_ee_vst_l_64_xp_p, \0"
756
74.9k
  /* 13932 */ "!xtensa_ee_vldbc_16_xp_p, \0"
757
74.9k
  /* 13959 */ "!xtensa_ee_ldqa_s16_128_xp_p, \0"
758
74.9k
  /* 13990 */ "!xtensa_ee_ldqa_u16_128_xp_p, \0"
759
74.9k
  /* 14021 */ "!xtensa_ee_ldqa_s8_128_xp_p, \0"
760
74.9k
  /* 14051 */ "!xtensa_ee_ldqa_u8_128_xp_p, \0"
761
74.9k
  /* 14081 */ "!xtensa_ee_vld_128_xp_p, \0"
762
74.9k
  /* 14107 */ "!xtensa_ee_ldf_128_xp_p, \0"
763
74.9k
  /* 14133 */ "!xtensa_ee_stf_128_xp_p, \0"
764
74.9k
  /* 14159 */ "!xtensa_ee_vst_128_xp_p, \0"
765
74.9k
  /* 14185 */ "!xtensa_ee_vldbc_8_xp_p, \0"
766
74.9k
  /* 14211 */ "!xtensa_ee_fft_cmul_s16_ld_xp_p, \0"
767
74.9k
  /* 14245 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_p, \0"
768
74.9k
  /* 14282 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_p, \0"
769
74.9k
  /* 14319 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_p, \0"
770
74.9k
  /* 14355 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_p, \0"
771
74.9k
  /* 14391 */ "!xtensa_ee_src_q_ld_xp_p, \0"
772
74.9k
  /* 14418 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_p, \0"
773
74.9k
  /* 14455 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_p, \0"
774
74.9k
  /* 14492 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_p, \0"
775
74.9k
  /* 14528 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_p, \0"
776
74.9k
  /* 14564 */ "!xtensa_ee_ld_128_usar_xp_p, \0"
777
74.9k
  /* 14594 */ "!xtensa_ee_fft_cmul_s16_st_xp_p, \0"
778
74.9k
  /* 14628 */ "!xtensa_ee_slci_2q_p, \0"
779
74.9k
  /* 14651 */ "!xtensa_ee_srci_2q_p, \0"
780
74.9k
  /* 14674 */ "!xtensa_ee_slcxxp_2q_p, \0"
781
74.9k
  /* 14699 */ "!xtensa_ee_srcxxp_2q_p, \0"
782
74.9k
  /* 14724 */ "!xtensa_ee_movi_32_q_p, \0"
783
74.9k
  /* 14749 */ "!xtensa_ee_src_q_p, \0"
784
74.9k
  /* 14770 */ "!xtensa_ee_zero_q_p, \0"
785
74.9k
  /* 14792 */ "!xtensa_ee_andq_p, \0"
786
74.9k
  /* 14812 */ "!xtensa_ee_orq_p, \0"
787
74.9k
  /* 14831 */ "!xtensa_ee_xorq_p, \0"
788
74.9k
  /* 14851 */ "!xtensa_ee_notq_p, \0"
789
74.9k
  /* 14871 */ "!xtensa_mv_qr_p, \0"
790
74.9k
  /* 14889 */ "!br_jt_p, \0"
791
74.9k
  /* 14900 */ "!xtensa_ee_bitrev_p, \0"
792
74.9k
  /* 14922 */ "!xtensa_ee_vmulas_s16_accx_p, \0"
793
74.9k
  /* 14953 */ "!xtensa_ee_vmulas_u16_accx_p, \0"
794
74.9k
  /* 14984 */ "!xtensa_ee_vmulas_s8_accx_p, \0"
795
74.9k
  /* 15014 */ "!xtensa_ee_vmulas_u8_accx_p, \0"
796
74.9k
  /* 15044 */ "!xtensa_ee_srs_accx_p, \0"
797
74.9k
  /* 15068 */ "ae_movad16.0 \0"
798
74.9k
  /* 15082 */ "ae_nsaz16.0 \0"
799
74.9k
  /* 15095 */ "ae_mulaf16ss.00 \0"
800
74.9k
  /* 15112 */ "ae_mulf16ss.00 \0"
801
74.9k
  /* 15128 */ "ae_mulsf16ss.00 \0"
802
74.9k
  /* 15145 */ "ae_mulaafd16ss.11_00 \0"
803
74.9k
  /* 15167 */ "ae_mulzaafd16ss.11_00 \0"
804
74.9k
  /* 15190 */ "ae_mulssfd16ss.11_00 \0"
805
74.9k
  /* 15212 */ "ae_mulzssfd16ss.11_00 \0"
806
74.9k
  /* 15235 */ "ae_sext32x2d16.10 \0"
807
74.9k
  /* 15254 */ "ae_cvt32x2f16.10 \0"
808
74.9k
  /* 15272 */ "ae_mulaf16ss.10 \0"
809
74.9k
  /* 15289 */ "ae_mulf16ss.10 \0"
810
74.9k
  /* 15305 */ "ae_mulsf16ss.10 \0"
811
74.9k
  /* 15322 */ "ae_mulaf16ss.20 \0"
812
74.9k
  /* 15339 */ "ae_mulf16ss.20 \0"
813
74.9k
  /* 15355 */ "ae_mulsf16ss.20 \0"
814
74.9k
  /* 15372 */ "ae_mulaf16ss.30 \0"
815
74.9k
  /* 15389 */ "ae_mulf16ss.30 \0"
816
74.9k
  /* 15405 */ "ae_mulsf16ss.30 \0"
817
74.9k
  /* 15422 */ "rur.ae_cend0 \0"
818
74.9k
  /* 15436 */ "wur.ae_cend0 \0"
819
74.9k
  /* 15450 */ "ae_mula32x16.h0 \0"
820
74.9k
  /* 15467 */ "ae_mulaf32x16.h0 \0"
821
74.9k
  /* 15485 */ "ae_mulf32x16.h0 \0"
822
74.9k
  /* 15502 */ "ae_mulsf32x16.h0 \0"
823
74.9k
  /* 15520 */ "ae_mul32x16.h0 \0"
824
74.9k
  /* 15536 */ "ae_muls32x16.h0 \0"
825
74.9k
  /* 15553 */ "ae_mulaad32x16.h1.l0 \0"
826
74.9k
  /* 15575 */ "ae_mulzaad32x16.h1.l0 \0"
827
74.9k
  /* 15598 */ "ae_mulsad32x16.h1.l0 \0"
828
74.9k
  /* 15620 */ "ae_mulzsad32x16.h1.l0 \0"
829
74.9k
  /* 15643 */ "ae_mulaafd32x16.h1.l0 \0"
830
74.9k
  /* 15666 */ "ae_mulzaafd32x16.h1.l0 \0"
831
74.9k
  /* 15690 */ "ae_mulsafd32x16.h1.l0 \0"
832
74.9k
  /* 15713 */ "ae_mulzsafd32x16.h1.l0 \0"
833
74.9k
  /* 15737 */ "ae_mulasfd32x16.h1.l0 \0"
834
74.9k
  /* 15760 */ "ae_mulzasfd32x16.h1.l0 \0"
835
74.9k
  /* 15784 */ "ae_mulssfd32x16.h1.l0 \0"
836
74.9k
  /* 15807 */ "ae_mulzssfd32x16.h1.l0 \0"
837
74.9k
  /* 15831 */ "ae_mulasd32x16.h1.l0 \0"
838
74.9k
  /* 15853 */ "ae_mulzasd32x16.h1.l0 \0"
839
74.9k
  /* 15876 */ "ae_mulssd32x16.h1.l0 \0"
840
74.9k
  /* 15898 */ "ae_mulzssd32x16.h1.l0 \0"
841
74.9k
  /* 15921 */ "ae_mula32x16.l0 \0"
842
74.9k
  /* 15938 */ "ae_mulaf32x16.l0 \0"
843
74.9k
  /* 15956 */ "ae_mulf32x16.l0 \0"
844
74.9k
  /* 15973 */ "ae_mulsf32x16.l0 \0"
845
74.9k
  /* 15991 */ "ae_mul32x16.l0 \0"
846
74.9k
  /* 16007 */ "ae_muls32x16.l0 \0"
847
74.9k
  /* 16024 */ "rur.ae_cbegin0 \0"
848
74.9k
  /* 16040 */ "wur.ae_cbegin0 \0"
849
74.9k
  /* 16056 */ "ae_movad16.1 \0"
850
74.9k
  /* 16070 */ "ae_mulaf16ss.11 \0"
851
74.9k
  /* 16087 */ "ae_mulf16ss.11 \0"
852
74.9k
  /* 16103 */ "ae_mulsf16ss.11 \0"
853
74.9k
  /* 16120 */ "ae_mulaf16ss.21 \0"
854
74.9k
  /* 16137 */ "ae_mulf16ss.21 \0"
855
74.9k
  /* 16153 */ "ae_mulsf16ss.21 \0"
856
74.9k
  /* 16170 */ "ae_mulaf16ss.31 \0"
857
74.9k
  /* 16187 */ "ae_mulf16ss.31 \0"
858
74.9k
  /* 16203 */ "ae_mulsf16ss.31 \0"
859
74.9k
  /* 16220 */ "ae_mula32x16.h1 \0"
860
74.9k
  /* 16237 */ "ae_mulaf32x16.h1 \0"
861
74.9k
  /* 16255 */ "ae_mulf32x16.h1 \0"
862
74.9k
  /* 16272 */ "ae_mulsf32x16.h1 \0"
863
74.9k
  /* 16290 */ "ae_mul32x16.h1 \0"
864
74.9k
  /* 16306 */ "ae_muls32x16.h1 \0"
865
74.9k
  /* 16323 */ "ae_mulaad32x16.h0.l1 \0"
866
74.9k
  /* 16345 */ "ae_mulzaad32x16.h0.l1 \0"
867
74.9k
  /* 16368 */ "ae_mulaafd32x16.h0.l1 \0"
868
74.9k
  /* 16391 */ "ae_mulzaafd32x16.h0.l1 \0"
869
74.9k
  /* 16415 */ "ae_mula32x16.l1 \0"
870
74.9k
  /* 16432 */ "ae_mulaf32x16.l1 \0"
871
74.9k
  /* 16450 */ "ae_mulf32x16.l1 \0"
872
74.9k
  /* 16467 */ "ae_mulsf32x16.l1 \0"
873
74.9k
  /* 16485 */ "ae_mul32x16.l1 \0"
874
74.9k
  /* 16501 */ "ae_muls32x16.l1 \0"
875
74.9k
  /* 16518 */ "ae_movad16.2 \0"
876
74.9k
  /* 16532 */ "ae_mulaafd16ss.13_02 \0"
877
74.9k
  /* 16554 */ "ae_mulzaafd16ss.13_02 \0"
878
74.9k
  /* 16577 */ "ae_mulssfd16ss.13_02 \0"
879
74.9k
  /* 16599 */ "ae_mulzssfd16ss.13_02 \0"
880
74.9k
  /* 16622 */ "ae_mulaf16ss.22 \0"
881
74.9k
  /* 16639 */ "ae_mulf16ss.22 \0"
882
74.9k
  /* 16655 */ "ae_mulsf16ss.22 \0"
883
74.9k
  /* 16672 */ "ae_mulaafd16ss.33_22 \0"
884
74.9k
  /* 16694 */ "ae_mulzaafd16ss.33_22 \0"
885
74.9k
  /* 16717 */ "ae_mulssfd16ss.33_22 \0"
886
74.9k
  /* 16739 */ "ae_mulzssfd16ss.33_22 \0"
887
74.9k
  /* 16762 */ "ae_sext32x2d16.32 \0"
888
74.9k
  /* 16781 */ "ae_cvt32x2f16.32 \0"
889
74.9k
  /* 16799 */ "ae_mulaf16ss.32 \0"
890
74.9k
  /* 16816 */ "ae_mulf16ss.32 \0"
891
74.9k
  /* 16832 */ "ae_mulsf16ss.32 \0"
892
74.9k
  /* 16849 */ "ae_sra64_32 \0"
893
74.9k
  /* 16862 */ "ae_cvt64a32 \0"
894
74.9k
  /* 16875 */ "ae_cvt48a32 \0"
895
74.9k
  /* 16888 */ "ae_slaa32 \0"
896
74.9k
  /* 16899 */ "ae_sraa32 \0"
897
74.9k
  /* 16910 */ "ae_addbrba32 \0"
898
74.9k
  /* 16924 */ "ae_movda32 \0"
899
74.9k
  /* 16936 */ "ae_sha32 \0"
900
74.9k
  /* 16946 */ "ae_srla32 \0"
901
74.9k
  /* 16957 */ "ae_sub32 \0"
902
74.9k
  /* 16967 */ "ae_addsub32 \0"
903
74.9k
  /* 16980 */ "ae_add32 \0"
904
74.9k
  /* 16990 */ "ae_subadd32 \0"
905
74.9k
  /* 17003 */ "ae_le32 \0"
906
74.9k
  /* 17012 */ "ae_neg32 \0"
907
74.9k
  /* 17022 */ "ae_slai32 \0"
908
74.9k
  /* 17033 */ "ae_srai32 \0"
909
74.9k
  /* 17044 */ "ae_srli32 \0"
910
74.9k
  /* 17055 */ "ae_min32 \0"
911
74.9k
  /* 17065 */ "ae_eq32 \0"
912
74.9k
  /* 17074 */ "ae_pksr32 \0"
913
74.9k
  /* 17085 */ "ae_slas32 \0"
914
74.9k
  /* 17096 */ "ae_sras32 \0"
915
74.9k
  /* 17107 */ "ae_abs32 \0"
916
74.9k
  /* 17117 */ "ae_srls32 \0"
917
74.9k
  /* 17128 */ "ae_lt32 \0"
918
74.9k
  /* 17137 */ "ae_sext32 \0"
919
74.9k
  /* 17148 */ "ae_max32 \0"
920
74.9k
  /* 17158 */ "!movba2 \0"
921
74.9k
  /* 17167 */ "ae_mula32x16.h2 \0"
922
74.9k
  /* 17184 */ "ae_mulaf32x16.h2 \0"
923
74.9k
  /* 17202 */ "ae_mulf32x16.h2 \0"
924
74.9k
  /* 17219 */ "ae_mulsf32x16.h2 \0"
925
74.9k
  /* 17237 */ "ae_mul32x16.h2 \0"
926
74.9k
  /* 17253 */ "ae_muls32x16.h2 \0"
927
74.9k
  /* 17270 */ "ae_mulaad32x16.h3.l2 \0"
928
74.9k
  /* 17292 */ "ae_mulzaad32x16.h3.l2 \0"
929
74.9k
  /* 17315 */ "ae_mulsad32x16.h3.l2 \0"
930
74.9k
  /* 17337 */ "ae_mulzsad32x16.h3.l2 \0"
931
74.9k
  /* 17360 */ "ae_mulaafd32x16.h3.l2 \0"
932
74.9k
  /* 17383 */ "ae_mulzaafd32x16.h3.l2 \0"
933
74.9k
  /* 17407 */ "ae_mulsafd32x16.h3.l2 \0"
934
74.9k
  /* 17430 */ "ae_mulzsafd32x16.h3.l2 \0"
935
74.9k
  /* 17454 */ "ae_mulasfd32x16.h3.l2 \0"
936
74.9k
  /* 17477 */ "ae_mulzasfd32x16.h3.l2 \0"
937
74.9k
  /* 17501 */ "ae_mulssfd32x16.h3.l2 \0"
938
74.9k
  /* 17524 */ "ae_mulzssfd32x16.h3.l2 \0"
939
74.9k
  /* 17548 */ "ae_mulasd32x16.h3.l2 \0"
940
74.9k
  /* 17570 */ "ae_mulzasd32x16.h3.l2 \0"
941
74.9k
  /* 17593 */ "ae_mulssd32x16.h3.l2 \0"
942
74.9k
  /* 17615 */ "ae_mulzssd32x16.h3.l2 \0"
943
74.9k
  /* 17638 */ "ae_mula32x16.l2 \0"
944
74.9k
  /* 17655 */ "ae_mulaf32x16.l2 \0"
945
74.9k
  /* 17673 */ "ae_mulf32x16.l2 \0"
946
74.9k
  /* 17690 */ "ae_mulsf32x16.l2 \0"
947
74.9k
  /* 17708 */ "ae_mul32x16.l2 \0"
948
74.9k
  /* 17724 */ "ae_muls32x16.l2 \0"
949
74.9k
  /* 17741 */ "!extui_br2 \0"
950
74.9k
  /* 17753 */ "ae_mulaf16ss.00_s2 \0"
951
74.9k
  /* 17773 */ "ae_mulf16ss.00_s2 \0"
952
74.9k
  /* 17792 */ "ae_mulsf16ss.00_s2 \0"
953
74.9k
  /* 17812 */ "ae_mulaafd16ss.11_00_s2 \0"
954
74.9k
  /* 17837 */ "ae_mulzaafd16ss.11_00_s2 \0"
955
74.9k
  /* 17863 */ "ae_mulssfd16ss.11_00_s2 \0"
956
74.9k
  /* 17888 */ "ae_mulzssfd16ss.11_00_s2 \0"
957
74.9k
  /* 17914 */ "ae_mula32x16.h0_s2 \0"
958
74.9k
  /* 17934 */ "ae_mulaf32x16.h0_s2 \0"
959
74.9k
  /* 17955 */ "ae_mulf32x16.h0_s2 \0"
960
74.9k
  /* 17975 */ "ae_mulsf32x16.h0_s2 \0"
961
74.9k
  /* 17996 */ "ae_mul32x16.h0_s2 \0"
962
74.9k
  /* 18015 */ "ae_muls32x16.h0_s2 \0"
963
74.9k
  /* 18035 */ "ae_mulaad32x16.h1.l0_s2 \0"
964
74.9k
  /* 18060 */ "ae_mulzaad32x16.h1.l0_s2 \0"
965
74.9k
  /* 18086 */ "ae_mulsad32x16.h1.l0_s2 \0"
966
74.9k
  /* 18111 */ "ae_mulzsad32x16.h1.l0_s2 \0"
967
74.9k
  /* 18137 */ "ae_mulaafd32x16.h1.l0_s2 \0"
968
74.9k
  /* 18163 */ "ae_mulzaafd32x16.h1.l0_s2 \0"
969
74.9k
  /* 18190 */ "ae_mulsafd32x16.h1.l0_s2 \0"
970
74.9k
  /* 18216 */ "ae_mulzsafd32x16.h1.l0_s2 \0"
971
74.9k
  /* 18243 */ "ae_mulasfd32x16.h1.l0_s2 \0"
972
74.9k
  /* 18269 */ "ae_mulzasfd32x16.h1.l0_s2 \0"
973
74.9k
  /* 18296 */ "ae_mulssfd32x16.h1.l0_s2 \0"
974
74.9k
  /* 18322 */ "ae_mulzssfd32x16.h1.l0_s2 \0"
975
74.9k
  /* 18349 */ "ae_mulasd32x16.h1.l0_s2 \0"
976
74.9k
  /* 18374 */ "ae_mulzasd32x16.h1.l0_s2 \0"
977
74.9k
  /* 18400 */ "ae_mulssd32x16.h1.l0_s2 \0"
978
74.9k
  /* 18425 */ "ae_mulzssd32x16.h1.l0_s2 \0"
979
74.9k
  /* 18451 */ "ae_mula32x16.l0_s2 \0"
980
74.9k
  /* 18471 */ "ae_mulaf32x16.l0_s2 \0"
981
74.9k
  /* 18492 */ "ae_mulf32x16.l0_s2 \0"
982
74.9k
  /* 18512 */ "ae_mulsf32x16.l0_s2 \0"
983
74.9k
  /* 18533 */ "ae_mul32x16.l0_s2 \0"
984
74.9k
  /* 18552 */ "ae_muls32x16.l0_s2 \0"
985
74.9k
  /* 18572 */ "ae_mula32x16.h1_s2 \0"
986
74.9k
  /* 18592 */ "ae_mulaf32x16.h1_s2 \0"
987
74.9k
  /* 18613 */ "ae_mulf32x16.h1_s2 \0"
988
74.9k
  /* 18633 */ "ae_mulsf32x16.h1_s2 \0"
989
74.9k
  /* 18654 */ "ae_mul32x16.h1_s2 \0"
990
74.9k
  /* 18673 */ "ae_muls32x16.h1_s2 \0"
991
74.9k
  /* 18693 */ "ae_mulaad32x16.h0.l1_s2 \0"
992
74.9k
  /* 18718 */ "ae_mulzaad32x16.h0.l1_s2 \0"
993
74.9k
  /* 18744 */ "ae_mulaafd32x16.h0.l1_s2 \0"
994
74.9k
  /* 18770 */ "ae_mulzaafd32x16.h0.l1_s2 \0"
995
74.9k
  /* 18797 */ "ae_mula32x16.l1_s2 \0"
996
74.9k
  /* 18817 */ "ae_mulaf32x16.l1_s2 \0"
997
74.9k
  /* 18838 */ "ae_mulf32x16.l1_s2 \0"
998
74.9k
  /* 18858 */ "ae_mulsf32x16.l1_s2 \0"
999
74.9k
  /* 18879 */ "ae_mul32x16.l1_s2 \0"
1000
74.9k
  /* 18898 */ "ae_muls32x16.l1_s2 \0"
1001
74.9k
  /* 18918 */ "ae_mulaafd16ss.13_02_s2 \0"
1002
74.9k
  /* 18943 */ "ae_mulzaafd16ss.13_02_s2 \0"
1003
74.9k
  /* 18969 */ "ae_mulssfd16ss.13_02_s2 \0"
1004
74.9k
  /* 18994 */ "ae_mulzssfd16ss.13_02_s2 \0"
1005
74.9k
  /* 19020 */ "ae_mulaafd16ss.33_22_s2 \0"
1006
74.9k
  /* 19045 */ "ae_mulzaafd16ss.33_22_s2 \0"
1007
74.9k
  /* 19071 */ "ae_mulssfd16ss.33_22_s2 \0"
1008
74.9k
  /* 19096 */ "ae_mulzssfd16ss.33_22_s2 \0"
1009
74.9k
  /* 19122 */ "ae_mula32x16.h2_s2 \0"
1010
74.9k
  /* 19142 */ "ae_mulaf32x16.h2_s2 \0"
1011
74.9k
  /* 19163 */ "ae_mulf32x16.h2_s2 \0"
1012
74.9k
  /* 19183 */ "ae_mulsf32x16.h2_s2 \0"
1013
74.9k
  /* 19204 */ "ae_mul32x16.h2_s2 \0"
1014
74.9k
  /* 19223 */ "ae_muls32x16.h2_s2 \0"
1015
74.9k
  /* 19243 */ "ae_mulaad32x16.h3.l2_s2 \0"
1016
74.9k
  /* 19268 */ "ae_mulzaad32x16.h3.l2_s2 \0"
1017
74.9k
  /* 19294 */ "ae_mulsad32x16.h3.l2_s2 \0"
1018
74.9k
  /* 19319 */ "ae_mulzsad32x16.h3.l2_s2 \0"
1019
74.9k
  /* 19345 */ "ae_mulaafd32x16.h3.l2_s2 \0"
1020
74.9k
  /* 19371 */ "ae_mulzaafd32x16.h3.l2_s2 \0"
1021
74.9k
  /* 19398 */ "ae_mulsafd32x16.h3.l2_s2 \0"
1022
74.9k
  /* 19424 */ "ae_mulzsafd32x16.h3.l2_s2 \0"
1023
74.9k
  /* 19451 */ "ae_mulasfd32x16.h3.l2_s2 \0"
1024
74.9k
  /* 19477 */ "ae_mulzasfd32x16.h3.l2_s2 \0"
1025
74.9k
  /* 19504 */ "ae_mulssfd32x16.h3.l2_s2 \0"
1026
74.9k
  /* 19530 */ "ae_mulzssfd32x16.h3.l2_s2 \0"
1027
74.9k
  /* 19557 */ "ae_mulasd32x16.h3.l2_s2 \0"
1028
74.9k
  /* 19582 */ "ae_mulzasd32x16.h3.l2_s2 \0"
1029
74.9k
  /* 19608 */ "ae_mulssd32x16.h3.l2_s2 \0"
1030
74.9k
  /* 19633 */ "ae_mulzssd32x16.h3.l2_s2 \0"
1031
74.9k
  /* 19659 */ "ae_mula32x16.l2_s2 \0"
1032
74.9k
  /* 19679 */ "ae_mulaf32x16.l2_s2 \0"
1033
74.9k
  /* 19700 */ "ae_mulf32x16.l2_s2 \0"
1034
74.9k
  /* 19720 */ "ae_mulsf32x16.l2_s2 \0"
1035
74.9k
  /* 19741 */ "ae_mul32x16.l2_s2 \0"
1036
74.9k
  /* 19760 */ "ae_muls32x16.l2_s2 \0"
1037
74.9k
  /* 19780 */ "ae_mulap24x2_s2 \0"
1038
74.9k
  /* 19797 */ "ae_mulp24x2_s2 \0"
1039
74.9k
  /* 19813 */ "ae_mulsp24x2_s2 \0"
1040
74.9k
  /* 19830 */ "ae_mula32x16.h3_s2 \0"
1041
74.9k
  /* 19850 */ "ae_mulaf32x16.h3_s2 \0"
1042
74.9k
  /* 19871 */ "ae_mulf32x16.h3_s2 \0"
1043
74.9k
  /* 19891 */ "ae_mulsf32x16.h3_s2 \0"
1044
74.9k
  /* 19912 */ "ae_mul32x16.h3_s2 \0"
1045
74.9k
  /* 19931 */ "ae_muls32x16.h3_s2 \0"
1046
74.9k
  /* 19951 */ "ae_mulaad32x16.h2.l3_s2 \0"
1047
74.9k
  /* 19976 */ "ae_mulzaad32x16.h2.l3_s2 \0"
1048
74.9k
  /* 20002 */ "ae_mulaafd32x16.h2.l3_s2 \0"
1049
74.9k
  /* 20028 */ "ae_mulzaafd32x16.h2.l3_s2 \0"
1050
74.9k
  /* 20055 */ "ae_mula32x16.l3_s2 \0"
1051
74.9k
  /* 20075 */ "ae_mulaf32x16.l3_s2 \0"
1052
74.9k
  /* 20096 */ "ae_mulf32x16.l3_s2 \0"
1053
74.9k
  /* 20116 */ "ae_mulsf32x16.l3_s2 \0"
1054
74.9k
  /* 20137 */ "ae_mul32x16.l3_s2 \0"
1055
74.9k
  /* 20156 */ "ae_muls32x16.l3_s2 \0"
1056
74.9k
  /* 20176 */ "ae_mulafp24x2ra_s2 \0"
1057
74.9k
  /* 20196 */ "ae_mulfp24x2ra_s2 \0"
1058
74.9k
  /* 20215 */ "ae_mulsfp24x2ra_s2 \0"
1059
74.9k
  /* 20235 */ "ae_mulafq32sp24s.h_s2 \0"
1060
74.9k
  /* 20258 */ "ae_mulfq32sp24s.h_s2 \0"
1061
74.9k
  /* 20280 */ "ae_mularfq32sp24s.h_s2 \0"
1062
74.9k
  /* 20304 */ "ae_mulrfq32sp24s.h_s2 \0"
1063
74.9k
  /* 20327 */ "ae_mulsrfq32sp24s.h_s2 \0"
1064
74.9k
  /* 20351 */ "ae_mulsfq32sp24s.h_s2 \0"
1065
74.9k
  /* 20374 */ "ae_mulafp32x16x2ras.h_s2 \0"
1066
74.9k
  /* 20400 */ "ae_mulfp32x16x2ras.h_s2 \0"
1067
74.9k
  /* 20425 */ "ae_mulsfp32x16x2ras.h_s2 \0"
1068
74.9k
  /* 20451 */ "ae_mulafp32x16x2rs.h_s2 \0"
1069
74.9k
  /* 20476 */ "ae_mulfp32x16x2rs.h_s2 \0"
1070
74.9k
  /* 20500 */ "ae_mulsfp32x16x2rs.h_s2 \0"
1071
74.9k
  /* 20525 */ "ae_mulas32f48p16s.hh_s2 \0"
1072
74.9k
  /* 20550 */ "ae_muls32f48p16s.hh_s2 \0"
1073
74.9k
  /* 20574 */ "ae_mulss32f48p16s.hh_s2 \0"
1074
74.9k
  /* 20599 */ "ae_mulaad24.hl.lh_s2 \0"
1075
74.9k
  /* 20621 */ "ae_mulzaad24.hl.lh_s2 \0"
1076
74.9k
  /* 20644 */ "ae_mulaafd24.hl.lh_s2 \0"
1077
74.9k
  /* 20667 */ "ae_mulzaafd24.hl.lh_s2 \0"
1078
74.9k
  /* 20691 */ "ae_mulasfd24.hl.lh_s2 \0"
1079
74.9k
  /* 20714 */ "ae_mulzasfd24.hl.lh_s2 \0"
1080
74.9k
  /* 20738 */ "ae_mulssfd24.hl.lh_s2 \0"
1081
74.9k
  /* 20761 */ "ae_mulzssfd24.hl.lh_s2 \0"
1082
74.9k
  /* 20785 */ "ae_mulasd24.hl.lh_s2 \0"
1083
74.9k
  /* 20807 */ "ae_mulzasd24.hl.lh_s2 \0"
1084
74.9k
  /* 20830 */ "ae_mulssd24.hl.lh_s2 \0"
1085
74.9k
  /* 20852 */ "ae_mulzssd24.hl.lh_s2 \0"
1086
74.9k
  /* 20875 */ "ae_mulas32f48p16s.lh_s2 \0"
1087
74.9k
  /* 20900 */ "ae_muls32f48p16s.lh_s2 \0"
1088
74.9k
  /* 20924 */ "ae_mulss32f48p16s.lh_s2 \0"
1089
74.9k
  /* 20949 */ "ae_mulafq32sp24s.l_s2 \0"
1090
74.9k
  /* 20972 */ "ae_mulfq32sp24s.l_s2 \0"
1091
74.9k
  /* 20994 */ "ae_mularfq32sp24s.l_s2 \0"
1092
74.9k
  /* 21018 */ "ae_mulrfq32sp24s.l_s2 \0"
1093
74.9k
  /* 21041 */ "ae_mulsrfq32sp24s.l_s2 \0"
1094
74.9k
  /* 21065 */ "ae_mulsfq32sp24s.l_s2 \0"
1095
74.9k
  /* 21088 */ "ae_mulaf48q32sp16s.l_s2 \0"
1096
74.9k
  /* 21113 */ "ae_mulf48q32sp16s.l_s2 \0"
1097
74.9k
  /* 21137 */ "ae_mulsf48q32sp16s.l_s2 \0"
1098
74.9k
  /* 21162 */ "ae_mulaq32sp16s.l_s2 \0"
1099
74.9k
  /* 21184 */ "ae_mulq32sp16s.l_s2 \0"
1100
74.9k
  /* 21205 */ "ae_mulsq32sp16s.l_s2 \0"
1101
74.9k
  /* 21227 */ "ae_mulafp32x16x2ras.l_s2 \0"
1102
74.9k
  /* 21253 */ "ae_mulfp32x16x2ras.l_s2 \0"
1103
74.9k
  /* 21278 */ "ae_mulsfp32x16x2ras.l_s2 \0"
1104
74.9k
  /* 21304 */ "ae_mulafp32x16x2rs.l_s2 \0"
1105
74.9k
  /* 21329 */ "ae_mulfp32x16x2rs.l_s2 \0"
1106
74.9k
  /* 21353 */ "ae_mulsfp32x16x2rs.l_s2 \0"
1107
74.9k
  /* 21378 */ "ae_mulaf48q32sp16u.l_s2 \0"
1108
74.9k
  /* 21403 */ "ae_mulf48q32sp16u.l_s2 \0"
1109
74.9k
  /* 21427 */ "ae_mulsf48q32sp16u.l_s2 \0"
1110
74.9k
  /* 21452 */ "ae_mulaq32sp16u.l_s2 \0"
1111
74.9k
  /* 21474 */ "ae_mulq32sp16u.l_s2 \0"
1112
74.9k
  /* 21495 */ "ae_mulsq32sp16u.l_s2 \0"
1113
74.9k
  /* 21517 */ "ae_mula32.ll_s2 \0"
1114
74.9k
  /* 21534 */ "ae_mul32.ll_s2 \0"
1115
74.9k
  /* 21550 */ "ae_mulaad24.hh.ll_s2 \0"
1116
74.9k
  /* 21572 */ "ae_mulzaad24.hh.ll_s2 \0"
1117
74.9k
  /* 21595 */ "ae_mulsad24.hh.ll_s2 \0"
1118
74.9k
  /* 21617 */ "ae_mulzsad24.hh.ll_s2 \0"
1119
74.9k
  /* 21640 */ "ae_mulaafd24.hh.ll_s2 \0"
1120
74.9k
  /* 21663 */ "ae_mulzaafd24.hh.ll_s2 \0"
1121
74.9k
  /* 21687 */ "ae_mulsafd24.hh.ll_s2 \0"
1122
74.9k
  /* 21710 */ "ae_mulzsafd24.hh.ll_s2 \0"
1123
74.9k
  /* 21734 */ "ae_mulasfd24.hh.ll_s2 \0"
1124
74.9k
  /* 21757 */ "ae_mulzasfd24.hh.ll_s2 \0"
1125
74.9k
  /* 21781 */ "ae_mulssfd24.hh.ll_s2 \0"
1126
74.9k
  /* 21804 */ "ae_mulzssfd24.hh.ll_s2 \0"
1127
74.9k
  /* 21828 */ "ae_mulasd24.hh.ll_s2 \0"
1128
74.9k
  /* 21850 */ "ae_mulzasd24.hh.ll_s2 \0"
1129
74.9k
  /* 21873 */ "ae_mulssd24.hh.ll_s2 \0"
1130
74.9k
  /* 21895 */ "ae_mulzssd24.hh.ll_s2 \0"
1131
74.9k
  /* 21918 */ "ae_mulaf32r.ll_s2 \0"
1132
74.9k
  /* 21937 */ "ae_mulf32r.ll_s2 \0"
1133
74.9k
  /* 21955 */ "ae_mulsf32r.ll_s2 \0"
1134
74.9k
  /* 21974 */ "ae_mulaf32s.ll_s2 \0"
1135
74.9k
  /* 21993 */ "ae_mulf32s.ll_s2 \0"
1136
74.9k
  /* 22011 */ "ae_mulas32f48p16s.ll_s2 \0"
1137
74.9k
  /* 22036 */ "ae_muls32f48p16s.ll_s2 \0"
1138
74.9k
  /* 22060 */ "ae_mulss32f48p16s.ll_s2 \0"
1139
74.9k
  /* 22085 */ "ae_mulafp24x2r_s2 \0"
1140
74.9k
  /* 22104 */ "ae_mulfp24x2r_s2 \0"
1141
74.9k
  /* 22122 */ "ae_mulsfp24x2r_s2 \0"
1142
74.9k
  /* 22141 */ "ae_movda32x2 \0"
1143
74.9k
  /* 22155 */ "ae_movf32x2 \0"
1144
74.9k
  /* 22168 */ "ae_mulap32x2 \0"
1145
74.9k
  /* 22182 */ "ae_mulp32x2 \0"
1146
74.9k
  /* 22195 */ "ae_mulsp32x2 \0"
1147
74.9k
  /* 22209 */ "ae_movt32x2 \0"
1148
74.9k
  /* 22222 */ "ae_mulap24x2 \0"
1149
74.9k
  /* 22236 */ "ae_mulp24x2 \0"
1150
74.9k
  /* 22249 */ "ae_mulsp24x2 \0"
1151
74.9k
  /* 22263 */ "ae_movda16x2 \0"
1152
74.9k
  /* 22277 */ "ae_movad16.3 \0"
1153
74.9k
  /* 22291 */ "ae_mulaf16ss.33 \0"
1154
74.9k
  /* 22308 */ "ae_mulf16ss.33 \0"
1155
74.9k
  /* 22324 */ "ae_mulsf16ss.33 \0"
1156
74.9k
  /* 22341 */ "ae_mula32x16.h3 \0"
1157
74.9k
  /* 22358 */ "ae_mulaf32x16.h3 \0"
1158
74.9k
  /* 22376 */ "ae_mulf32x16.h3 \0"
1159
74.9k
  /* 22393 */ "ae_mulsf32x16.h3 \0"
1160
74.9k
  /* 22411 */ "ae_mul32x16.h3 \0"
1161
74.9k
  /* 22427 */ "ae_muls32x16.h3 \0"
1162
74.9k
  /* 22444 */ "ae_mulaad32x16.h2.l3 \0"
1163
74.9k
  /* 22466 */ "ae_mulzaad32x16.h2.l3 \0"
1164
74.9k
  /* 22489 */ "ae_mulaafd32x16.h2.l3 \0"
1165
74.9k
  /* 22512 */ "ae_mulzaafd32x16.h2.l3 \0"
1166
74.9k
  /* 22536 */ "ae_mula32x16.l3 \0"
1167
74.9k
  /* 22553 */ "ae_mulaf32x16.l3 \0"
1168
74.9k
  /* 22571 */ "ae_mulf32x16.l3 \0"
1169
74.9k
  /* 22588 */ "ae_mulsf32x16.l3 \0"
1170
74.9k
  /* 22606 */ "ae_mul32x16.l3 \0"
1171
74.9k
  /* 22622 */ "ae_muls32x16.l3 \0"
1172
74.9k
  /* 22639 */ "ae_mulac24 \0"
1173
74.9k
  /* 22651 */ "ae_mulc24 \0"
1174
74.9k
  /* 22662 */ "ae_slai24 \0"
1175
74.9k
  /* 22673 */ "ae_srai24 \0"
1176
74.9k
  /* 22684 */ "ae_srli24 \0"
1177
74.9k
  /* 22695 */ "ae_pksr24 \0"
1178
74.9k
  /* 22706 */ "ae_slas24 \0"
1179
74.9k
  /* 22717 */ "ae_sras24 \0"
1180
74.9k
  /* 22728 */ "ae_srls24 \0"
1181
74.9k
  /* 22739 */ "ae_slaa64 \0"
1182
74.9k
  /* 22750 */ "ae_sraa64 \0"
1183
74.9k
  /* 22761 */ "ae_srla64 \0"
1184
74.9k
  /* 22772 */ "ae_nsa64 \0"
1185
74.9k
  /* 22782 */ "ae_sub64 \0"
1186
74.9k
  /* 22792 */ "ae_add64 \0"
1187
74.9k
  /* 22802 */ "ae_le64 \0"
1188
74.9k
  /* 22811 */ "ae_movf64 \0"
1189
74.9k
  /* 22822 */ "ae_neg64 \0"
1190
74.9k
  /* 22832 */ "ae_slai64 \0"
1191
74.9k
  /* 22843 */ "ae_srai64 \0"
1192
74.9k
  /* 22854 */ "ae_srli64 \0"
1193
74.9k
  /* 22865 */ "ae_zalign64 \0"
1194
74.9k
  /* 22878 */ "ae_min64 \0"
1195
74.9k
  /* 22888 */ "ae_eq64 \0"
1196
74.9k
  /* 22897 */ "ae_slas64 \0"
1197
74.9k
  /* 22908 */ "ae_sras64 \0"
1198
74.9k
  /* 22919 */ "ae_abs64 \0"
1199
74.9k
  /* 22929 */ "ae_srls64 \0"
1200
74.9k
  /* 22940 */ "ae_lt64 \0"
1201
74.9k
  /* 22949 */ "ae_movt64 \0"
1202
74.9k
  /* 22960 */ "ae_max64 \0"
1203
74.9k
  /* 22970 */ "!movba4 \0"
1204
74.9k
  /* 22979 */ "!extui_br4 \0"
1205
74.9k
  /* 22991 */ "ae_mula16x4 \0"
1206
74.9k
  /* 23004 */ "ae_movf16x4 \0"
1207
74.9k
  /* 23017 */ "ae_mul16x4 \0"
1208
74.9k
  /* 23029 */ "ae_muls16x4 \0"
1209
74.9k
  /* 23042 */ "ae_sat16x4 \0"
1210
74.9k
  /* 23054 */ "ae_movt16x4 \0"
1211
74.9k
  /* 23067 */ "ae_movda16 \0"
1212
74.9k
  /* 23079 */ "ae_sub16 \0"
1213
74.9k
  /* 23089 */ "ae_add16 \0"
1214
74.9k
  /* 23099 */ "ae_le16 \0"
1215
74.9k
  /* 23108 */ "ae_srai16 \0"
1216
74.9k
  /* 23119 */ "ae_eq16 \0"
1217
74.9k
  /* 23128 */ "ae_lt16 \0"
1218
74.9k
  /* 23137 */ "ae_slaaq56 \0"
1219
74.9k
  /* 23149 */ "ae_slasq56 \0"
1220
74.9k
  /* 23161 */ "# SRA_P \0"
1221
74.9k
  /* 23170 */ "!L8I_P \0"
1222
74.9k
  /* 23178 */ "# SLL_P \0"
1223
74.9k
  /* 23187 */ "# SRL_P \0"
1224
74.9k
  /* 23196 */ "!movba \0"
1225
74.9k
  /* 23204 */ "ae_mulafp24x2ra \0"
1226
74.9k
  /* 23221 */ "ae_mulfp24x2ra \0"
1227
74.9k
  /* 23237 */ "ae_mulsfp24x2ra \0"
1228
74.9k
  /* 23254 */ "ae_mulafc24ra \0"
1229
74.9k
  /* 23269 */ "ae_mulfc24ra \0"
1230
74.9k
  /* 23283 */ "ae_db \0"
1231
74.9k
  /* 23290 */ "ae_lb \0"
1232
74.9k
  /* 23297 */ "ae_sb \0"
1233
74.9k
  /* 23304 */ "ae_vldl16c \0"
1234
74.9k
  /* 23316 */ "ae_vles16c \0"
1235
74.9k
  /* 23328 */ "!loopdec \0"
1236
74.9k
  /* 23338 */ "ae_la32x2.ic \0"
1237
74.9k
  /* 23352 */ "ae_sa32x2.ic \0"
1238
74.9k
  /* 23366 */ "ae_la24x2.ic \0"
1239
74.9k
  /* 23380 */ "ae_sa24x2.ic \0"
1240
74.9k
  /* 23394 */ "ae_la24.ic \0"
1241
74.9k
  /* 23406 */ "ae_la32x2f24.ic \0"
1242
74.9k
  /* 23423 */ "ae_sa32x2f24.ic \0"
1243
74.9k
  /* 23440 */ "ae_la16x4.ic \0"
1244
74.9k
  /* 23454 */ "ae_sa16x4.ic \0"
1245
74.9k
  /* 23468 */ "ae_db.ic \0"
1246
74.9k
  /* 23478 */ "ae_sb.ic \0"
1247
74.9k
  /* 23488 */ "ae_vldl16c.ic \0"
1248
74.9k
  /* 23503 */ "ae_vles16c.ic \0"
1249
74.9k
  /* 23518 */ "ae_sbf.ic \0"
1250
74.9k
  /* 23529 */ "ae_dbi.ic \0"
1251
74.9k
  /* 23540 */ "ae_sbi.ic \0"
1252
74.9k
  /* 23551 */ "ae_sa24.l.ic \0"
1253
74.9k
  /* 23565 */ "ae_la32x2.ric \0"
1254
74.9k
  /* 23580 */ "ae_sa32x2.ric \0"
1255
74.9k
  /* 23595 */ "ae_l32x2.ric \0"
1256
74.9k
  /* 23609 */ "ae_s32x2.ric \0"
1257
74.9k
  /* 23623 */ "ae_la24x2.ric \0"
1258
74.9k
  /* 23638 */ "ae_sa24x2.ric \0"
1259
74.9k
  /* 23653 */ "ae_la24.ric \0"
1260
74.9k
  /* 23666 */ "ae_la32x2f24.ric \0"
1261
74.9k
  /* 23684 */ "ae_sa32x2f24.ric \0"
1262
74.9k
  /* 23702 */ "ae_l32x2f24.ric \0"
1263
74.9k
  /* 23719 */ "ae_s32x2f24.ric \0"
1264
74.9k
  /* 23736 */ "ae_la16x4.ric \0"
1265
74.9k
  /* 23751 */ "ae_sa16x4.ric \0"
1266
74.9k
  /* 23766 */ "ae_l16x4.ric \0"
1267
74.9k
  /* 23780 */ "ae_s16x4.ric \0"
1268
74.9k
  /* 23794 */ "ae_sa24.l.ric \0"
1269
74.9k
  /* 23809 */ "ae_la32x2neg.pc \0"
1270
74.9k
  /* 23826 */ "ae_la24x2neg.pc \0"
1271
74.9k
  /* 23843 */ "ae_la24neg.pc \0"
1272
74.9k
  /* 23858 */ "ae_la16x4neg.pc \0"
1273
74.9k
  /* 23875 */ "ae_la32x2pos.pc \0"
1274
74.9k
  /* 23892 */ "ae_la24x2pos.pc \0"
1275
74.9k
  /* 23909 */ "ae_la24pos.pc \0"
1276
74.9k
  /* 23924 */ "ae_la16x4pos.pc \0"
1277
74.9k
  /* 23941 */ "ae_s16.0.xc \0"
1278
74.9k
  /* 23954 */ "ae_l32.xc \0"
1279
74.9k
  /* 23965 */ "ae_l32x2.xc \0"
1280
74.9k
  /* 23978 */ "ae_s32x2.xc \0"
1281
74.9k
  /* 23991 */ "ae_l32f24.xc \0"
1282
74.9k
  /* 24005 */ "ae_l32x2f24.xc \0"
1283
74.9k
  /* 24021 */ "ae_s32x2f24.xc \0"
1284
74.9k
  /* 24037 */ "ae_l64.xc \0"
1285
74.9k
  /* 24048 */ "ae_s64.xc \0"
1286
74.9k
  /* 24059 */ "ae_l16x4.xc \0"
1287
74.9k
  /* 24072 */ "ae_s16x4.xc \0"
1288
74.9k
  /* 24085 */ "ae_l16.xc \0"
1289
74.9k
  /* 24096 */ "ae_s32.l.xc \0"
1290
74.9k
  /* 24109 */ "ae_s32f24.l.xc \0"
1291
74.9k
  /* 24125 */ "ae_s16m.l.xc \0"
1292
74.9k
  /* 24139 */ "ae_l32m.xc \0"
1293
74.9k
  /* 24151 */ "ae_s32m.xc \0"
1294
74.9k
  /* 24163 */ "ae_l16x2m.xc \0"
1295
74.9k
  /* 24177 */ "ae_s16x2m.xc \0"
1296
74.9k
  /* 24191 */ "ae_l16m.xc \0"
1297
74.9k
  /* 24203 */ "ae_s32ra64s.xc \0"
1298
74.9k
  /* 24219 */ "ae_s24ra64s.xc \0"
1299
74.9k
  /* 24235 */ "rur.ae_bithead \0"
1300
74.9k
  /* 24251 */ "wur.ae_bithead \0"
1301
74.9k
  /* 24267 */ "rur.ae_bitsused \0"
1302
74.9k
  /* 24284 */ "wur.ae_bitsused \0"
1303
74.9k
  /* 24301 */ "ae_and \0"
1304
74.9k
  /* 24309 */ "ae_nand \0"
1305
74.9k
  /* 24318 */ "!loopend \0"
1306
74.9k
  /* 24328 */ "rur.ae_searchdone \0"
1307
74.9k
  /* 24347 */ "wur.ae_searchdone \0"
1308
74.9k
  /* 24366 */ "rur.ae_tablesize \0"
1309
74.9k
  /* 24384 */ "wur.ae_tablesize \0"
1310
74.9k
  /* 24402 */ "ae_sbf \0"
1311
74.9k
  /* 24410 */ "ae_div64d32.h \0"
1312
74.9k
  /* 24425 */ "ae_movad32.h \0"
1313
74.9k
  /* 24439 */ "ae_cvt64f32.h \0"
1314
74.9k
  /* 24454 */ "ae_mulap32x16x2.h \0"
1315
74.9k
  /* 24473 */ "ae_mulp32x16x2.h \0"
1316
74.9k
  /* 24491 */ "ae_mulsp32x16x2.h \0"
1317
74.9k
  /* 24510 */ "ae_mulac32x16.h \0"
1318
74.9k
  /* 24527 */ "ae_mulc32x16.h \0"
1319
74.9k
  /* 24543 */ "ae_mulafd24x2.fir.h \0"
1320
74.9k
  /* 24564 */ "ae_mulfd24x2.fir.h \0"
1321
74.9k
  /* 24584 */ "ae_cvtq56p32s.h \0"
1322
74.9k
  /* 24601 */ "ae_cvta32f24s.h \0"
1323
74.9k
  /* 24618 */ "ae_mulafp32x16x2ras.h \0"
1324
74.9k
  /* 24641 */ "ae_mulfp32x16x2ras.h \0"
1325
74.9k
  /* 24663 */ "ae_mulsfp32x16x2ras.h \0"
1326
74.9k
  /* 24686 */ "ae_mulafc32x16ras.h \0"
1327
74.9k
  /* 24707 */ "ae_mulfc32x16ras.h \0"
1328
74.9k
  /* 24727 */ "ae_mulafp32x16x2rs.h \0"
1329
74.9k
  /* 24749 */ "ae_mulfp32x16x2rs.h \0"
1330
74.9k
  /* 24770 */ "ae_mulsfp32x16x2rs.h \0"
1331
74.9k
  /* 24792 */ "ae_mula32.hh \0"
1332
74.9k
  /* 24806 */ "ae_mul32.hh \0"
1333
74.9k
  /* 24819 */ "ae_muls32.hh \0"
1334
74.9k
  /* 24833 */ "ae_mulaf32r.hh \0"
1335
74.9k
  /* 24849 */ "ae_mulf32r.hh \0"
1336
74.9k
  /* 24864 */ "ae_mulsf32r.hh \0"
1337
74.9k
  /* 24880 */ "ae_mulafd32x16x2.fir.hh \0"
1338
74.9k
  /* 24905 */ "ae_mulfd32x16x2.fir.hh \0"
1339
74.9k
  /* 24929 */ "ae_mulaf32s.hh \0"
1340
74.9k
  /* 24945 */ "ae_mulf32s.hh \0"
1341
74.9k
  /* 24960 */ "ae_mulsf32s.hh \0"
1342
74.9k
  /* 24976 */ "ae_mulas32f48p16s.hh \0"
1343
74.9k
  /* 24998 */ "ae_muls32f48p16s.hh \0"
1344
74.9k
  /* 25019 */ "ae_mulss32f48p16s.hh \0"
1345
74.9k
  /* 25041 */ "ae_mula32.lh \0"
1346
74.9k
  /* 25055 */ "ae_mul32.lh \0"
1347
74.9k
  /* 25068 */ "ae_muls32.lh \0"
1348
74.9k
  /* 25082 */ "ae_mulaad24.hl.lh \0"
1349
74.9k
  /* 25101 */ "ae_mulzaad24.hl.lh \0"
1350
74.9k
  /* 25121 */ "ae_mulaafd24.hl.lh \0"
1351
74.9k
  /* 25141 */ "ae_mulzaafd24.hl.lh \0"
1352
74.9k
  /* 25162 */ "ae_mulasfd24.hl.lh \0"
1353
74.9k
  /* 25182 */ "ae_mulzasfd24.hl.lh \0"
1354
74.9k
  /* 25203 */ "ae_mulssfd24.hl.lh \0"
1355
74.9k
  /* 25223 */ "ae_mulzssfd24.hl.lh \0"
1356
74.9k
  /* 25244 */ "ae_mulasd24.hl.lh \0"
1357
74.9k
  /* 25263 */ "ae_mulzasd24.hl.lh \0"
1358
74.9k
  /* 25283 */ "ae_mulssd24.hl.lh \0"
1359
74.9k
  /* 25302 */ "ae_mulzssd24.hl.lh \0"
1360
74.9k
  /* 25322 */ "ae_mulaf32r.lh \0"
1361
74.9k
  /* 25338 */ "ae_mulf32r.lh \0"
1362
74.9k
  /* 25353 */ "ae_mulsf32r.lh \0"
1363
74.9k
  /* 25369 */ "ae_mulafd32x16x2.fir.lh \0"
1364
74.9k
  /* 25394 */ "ae_mulfd32x16x2.fir.lh \0"
1365
74.9k
  /* 25418 */ "ae_mulaf32s.lh \0"
1366
74.9k
  /* 25434 */ "ae_mulf32s.lh \0"
1367
74.9k
  /* 25449 */ "ae_mulsf32s.lh \0"
1368
74.9k
  /* 25465 */ "ae_mulas32f48p16s.lh \0"
1369
74.9k
  /* 25487 */ "ae_muls32f48p16s.lh \0"
1370
74.9k
  /* 25508 */ "ae_mulss32f48p16s.lh \0"
1371
74.9k
  /* 25530 */ "ae_add32_hl_lh \0"
1372
74.9k
  /* 25546 */ "ae_s16.0.i \0"
1373
74.9k
  /* 25558 */ "ae_l32.i \0"
1374
74.9k
  /* 25568 */ "ae_l32x2.i \0"
1375
74.9k
  /* 25580 */ "ae_s32x2.i \0"
1376
74.9k
  /* 25592 */ "ae_l32f24.i \0"
1377
74.9k
  /* 25605 */ "ae_l32x2f24.i \0"
1378
74.9k
  /* 25620 */ "ae_s32x2f24.i \0"
1379
74.9k
  /* 25635 */ "ae_l64.i \0"
1380
74.9k
  /* 25645 */ "ae_lalign64.i \0"
1381
74.9k
  /* 25660 */ "ae_salign64.i \0"
1382
74.9k
  /* 25675 */ "ae_s64.i \0"
1383
74.9k
  /* 25685 */ "ae_l16x4.i \0"
1384
74.9k
  /* 25697 */ "ae_s16x4.i \0"
1385
74.9k
  /* 25709 */ "ae_l16.i \0"
1386
74.9k
  /* 25719 */ "ae_s32.l.i \0"
1387
74.9k
  /* 25731 */ "ae_s32f24.l.i \0"
1388
74.9k
  /* 25746 */ "ae_s16m.l.i \0"
1389
74.9k
  /* 25759 */ "ae_l32m.i \0"
1390
74.9k
  /* 25770 */ "ae_s32m.i \0"
1391
74.9k
  /* 25781 */ "ae_l16x2m.i \0"
1392
74.9k
  /* 25794 */ "ae_s16x2m.i \0"
1393
74.9k
  /* 25807 */ "ae_l16m.i \0"
1394
74.9k
  /* 25818 */ "ae_s32ra64s.i \0"
1395
74.9k
  /* 25833 */ "ae_s24ra64s.i \0"
1396
74.9k
  /* 25848 */ "ae_sel16i \0"
1397
74.9k
  /* 25859 */ "ae_dbi \0"
1398
74.9k
  /* 25867 */ "ae_lbi \0"
1399
74.9k
  /* 25875 */ "ae_sbi \0"
1400
74.9k
  /* 25883 */ "ae_lbki \0"
1401
74.9k
  /* 25892 */ "ae_lbsi \0"
1402
74.9k
  /* 25901 */ "ae_movi \0"
1403
74.9k
  /* 25910 */ "ae_lbk \0"
1404
74.9k
  /* 25918 */ "ae_div64d32.l \0"
1405
74.9k
  /* 25933 */ "ae_movad32.l \0"
1406
74.9k
  /* 25947 */ "ae_nsaz32.l \0"
1407
74.9k
  /* 25960 */ "ae_mulap32x16x2.l \0"
1408
74.9k
  /* 25979 */ "ae_mulp32x16x2.l \0"
1409
74.9k
  /* 25997 */ "ae_mulsp32x16x2.l \0"
1410
74.9k
  /* 26016 */ "ae_mulac32x16.l \0"
1411
74.9k
  /* 26033 */ "ae_mulc32x16.l \0"
1412
74.9k
  /* 26049 */ "ae_mulafd24x2.fir.l \0"
1413
74.9k
  /* 26070 */ "ae_mulfd24x2.fir.l \0"
1414
74.9k
  /* 26090 */ "ae_cvtq56p32s.l \0"
1415
74.9k
  /* 26107 */ "ae_cvta32f24s.l \0"
1416
74.9k
  /* 26124 */ "ae_trunca32f64s.l \0"
1417
74.9k
  /* 26143 */ "ae_trunci32f64s.l \0"
1418
74.9k
  /* 26162 */ "ae_mulaf48q32sp16s.l \0"
1419
74.9k
  /* 26184 */ "ae_mulf48q32sp16s.l \0"
1420
74.9k
  /* 26205 */ "ae_mulsf48q32sp16s.l \0"
1421
74.9k
  /* 26227 */ "ae_mulafp32x16x2ras.l \0"
1422
74.9k
  /* 26250 */ "ae_mulfp32x16x2ras.l \0"
1423
74.9k
  /* 26272 */ "ae_mulsfp32x16x2ras.l \0"
1424
74.9k
  /* 26295 */ "ae_mulafc32x16ras.l \0"
1425
74.9k
  /* 26316 */ "ae_mulfc32x16ras.l \0"
1426
74.9k
  /* 26336 */ "ae_mulafp32x16x2rs.l \0"
1427
74.9k
  /* 26358 */ "ae_mulfp32x16x2rs.l \0"
1428
74.9k
  /* 26379 */ "ae_mulsfp32x16x2rs.l \0"
1429
74.9k
  /* 26401 */ "ae_mulaf48q32sp16u.l \0"
1430
74.9k
  /* 26423 */ "ae_mulf48q32sp16u.l \0"
1431
74.9k
  /* 26444 */ "ae_mulsf48q32sp16u.l \0"
1432
74.9k
  /* 26466 */ "ae_mulafd32x16x2.fir.hl \0"
1433
74.9k
  /* 26491 */ "ae_mulfd32x16x2.fir.hl \0"
1434
74.9k
  /* 26515 */ "ae_mula32.ll \0"
1435
74.9k
  /* 26529 */ "ae_mul32.ll \0"
1436
74.9k
  /* 26542 */ "ae_muls32.ll \0"
1437
74.9k
  /* 26556 */ "ae_mulaad24.hh.ll \0"
1438
74.9k
  /* 26575 */ "ae_mulzaad24.hh.ll \0"
1439
74.9k
  /* 26595 */ "ae_mulsad24.hh.ll \0"
1440
74.9k
  /* 26614 */ "ae_mulzsad24.hh.ll \0"
1441
74.9k
  /* 26634 */ "ae_mulaafd24.hh.ll \0"
1442
74.9k
  /* 26654 */ "ae_mulzaafd24.hh.ll \0"
1443
74.9k
  /* 26675 */ "ae_mulsafd24.hh.ll \0"
1444
74.9k
  /* 26695 */ "ae_mulzsafd24.hh.ll \0"
1445
74.9k
  /* 26716 */ "ae_mulasfd24.hh.ll \0"
1446
74.9k
  /* 26736 */ "ae_mulzasfd24.hh.ll \0"
1447
74.9k
  /* 26757 */ "ae_mulssfd24.hh.ll \0"
1448
74.9k
  /* 26777 */ "ae_mulzssfd24.hh.ll \0"
1449
74.9k
  /* 26798 */ "ae_mulasd24.hh.ll \0"
1450
74.9k
  /* 26817 */ "ae_mulzasd24.hh.ll \0"
1451
74.9k
  /* 26837 */ "ae_mulssd24.hh.ll \0"
1452
74.9k
  /* 26856 */ "ae_mulzssd24.hh.ll \0"
1453
74.9k
  /* 26876 */ "ae_mulaf32r.ll \0"
1454
74.9k
  /* 26892 */ "ae_mulf32r.ll \0"
1455
74.9k
  /* 26907 */ "ae_mulsf32r.ll \0"
1456
74.9k
  /* 26923 */ "ae_mulafd32x16x2.fir.ll \0"
1457
74.9k
  /* 26948 */ "ae_mulfd32x16x2.fir.ll \0"
1458
74.9k
  /* 26972 */ "ae_mulaf32s.ll \0"
1459
74.9k
  /* 26988 */ "ae_mulf32s.ll \0"
1460
74.9k
  /* 27003 */ "ae_mulsf32s.ll \0"
1461
74.9k
  /* 27019 */ "ae_mulas32f48p16s.ll \0"
1462
74.9k
  /* 27041 */ "ae_muls32f48p16s.ll \0"
1463
74.9k
  /* 27062 */ "ae_mulss32f48p16s.ll \0"
1464
74.9k
  /* 27084 */ "ae_mula32u.ll \0"
1465
74.9k
  /* 27099 */ "ae_mul32u.ll \0"
1466
74.9k
  /* 27113 */ "ae_muls32u.ll \0"
1467
74.9k
  /* 27128 */ "!restore_bool \0"
1468
74.9k
  /* 27143 */ "!spill_bool \0"
1469
74.9k
  /* 27156 */ "ae_roundsp16q48x2sym \0"
1470
74.9k
  /* 27178 */ "ae_roundsp16f24sym \0"
1471
74.9k
  /* 27198 */ "ae_roundsq32f48sym \0"
1472
74.9k
  /* 27218 */ "ae_roundsp16q48x2asym \0"
1473
74.9k
  /* 27241 */ "ae_roundsp16f24asym \0"
1474
74.9k
  /* 27262 */ "ae_roundsq32f48asym \0"
1475
74.9k
  /* 27283 */ "ae_round16x4f32sasym \0"
1476
74.9k
  /* 27305 */ "ae_round32x2f64sasym \0"
1477
74.9k
  /* 27327 */ "ae_round32x2f48sasym \0"
1478
74.9k
  /* 27349 */ "ae_round24x2f48sasym \0"
1479
74.9k
  /* 27371 */ "ae_round16x4f32ssym \0"
1480
74.9k
  /* 27392 */ "ae_round32x2f64ssym \0"
1481
74.9k
  /* 27413 */ "ae_round32x2f48ssym \0"
1482
74.9k
  /* 27434 */ "ae_round24x2f48ssym \0"
1483
74.9k
  /* 27455 */ "ae_sel16i.n \0"
1484
74.9k
  /* 27468 */ "ae_movalign \0"
1485
74.9k
  /* 27481 */ "rur.ae_cw_sd_no \0"
1486
74.9k
  /* 27498 */ "wur.ae_cw_sd_no \0"
1487
74.9k
  /* 27515 */ "rur.ae_cwrap \0"
1488
74.9k
  /* 27529 */ "wur.ae_cwrap \0"
1489
74.9k
  /* 27543 */ "ae_shortswap \0"
1490
74.9k
  /* 27557 */ "rur.ae_ts_fts_bu_bp \0"
1491
74.9k
  /* 27578 */ "wur.ae_ts_fts_bu_bp \0"
1492
74.9k
  /* 27599 */ "ae_sa64neg.fp \0"
1493
74.9k
  /* 27614 */ "ae_sa64pos.fp \0"
1494
74.9k
  /* 27629 */ "!brcc_fp \0"
1495
74.9k
  /* 27639 */ "!select_cc_fp_fp \0"
1496
74.9k
  /* 27657 */ "!select_cc_int_fp \0"
1497
74.9k
  /* 27676 */ "ae_s16.0.ip \0"
1498
74.9k
  /* 27689 */ "ae_l32.ip \0"
1499
74.9k
  /* 27700 */ "ae_la32x2.ip \0"
1500
74.9k
  /* 27714 */ "ae_sa32x2.ip \0"
1501
74.9k
  /* 27728 */ "ae_l32x2.ip \0"
1502
74.9k
  /* 27741 */ "ae_s32x2.ip \0"
1503
74.9k
  /* 27754 */ "ae_la24x2.ip \0"
1504
74.9k
  /* 27768 */ "ae_sa24x2.ip \0"
1505
74.9k
  /* 27782 */ "ae_la24.ip \0"
1506
74.9k
  /* 27794 */ "ae_l32f24.ip \0"
1507
74.9k
  /* 27808 */ "ae_la32x2f24.ip \0"
1508
74.9k
  /* 27825 */ "ae_sa32x2f24.ip \0"
1509
74.9k
  /* 27842 */ "ae_l32x2f24.ip \0"
1510
74.9k
  /* 27858 */ "ae_s32x2f24.ip \0"
1511
74.9k
  /* 27874 */ "ae_l64.ip \0"
1512
74.9k
  /* 27885 */ "ae_s64.ip \0"
1513
74.9k
  /* 27896 */ "ae_la16x4.ip \0"
1514
74.9k
  /* 27910 */ "ae_sa16x4.ip \0"
1515
74.9k
  /* 27924 */ "ae_l16x4.ip \0"
1516
74.9k
  /* 27937 */ "ae_s16x4.ip \0"
1517
74.9k
  /* 27950 */ "ae_l16.ip \0"
1518
74.9k
  /* 27961 */ "ae_db.ip \0"
1519
74.9k
  /* 27971 */ "ae_sb.ip \0"
1520
74.9k
  /* 27981 */ "ae_vldl16c.ip \0"
1521
74.9k
  /* 27996 */ "ae_vles16c.ip \0"
1522
74.9k
  /* 28011 */ "ae_sbf.ip \0"
1523
74.9k
  /* 28022 */ "ae_dbi.ip \0"
1524
74.9k
  /* 28033 */ "ae_sbi.ip \0"
1525
74.9k
  /* 28044 */ "ae_s32.l.ip \0"
1526
74.9k
  /* 28057 */ "ae_sa24.l.ip \0"
1527
74.9k
  /* 28071 */ "ae_s32f24.l.ip \0"
1528
74.9k
  /* 28087 */ "ae_s32ra64s.ip \0"
1529
74.9k
  /* 28103 */ "ae_s32x2ra64s.ip \0"
1530
74.9k
  /* 28121 */ "ae_s24x2ra64s.ip \0"
1531
74.9k
  /* 28139 */ "ae_s24ra64s.ip \0"
1532
74.9k
  /* 28155 */ "ae_la32x2.rip \0"
1533
74.9k
  /* 28170 */ "ae_sa32x2.rip \0"
1534
74.9k
  /* 28185 */ "ae_l32x2.rip \0"
1535
74.9k
  /* 28199 */ "ae_s32x2.rip \0"
1536
74.9k
  /* 28213 */ "ae_la24x2.rip \0"
1537
74.9k
  /* 28228 */ "ae_sa24x2.rip \0"
1538
74.9k
  /* 28243 */ "ae_la24.rip \0"
1539
74.9k
  /* 28256 */ "ae_la32x2f24.rip \0"
1540
74.9k
  /* 28274 */ "ae_sa32x2f24.rip \0"
1541
74.9k
  /* 28292 */ "ae_l32x2f24.rip \0"
1542
74.9k
  /* 28309 */ "ae_s32x2f24.rip \0"
1543
74.9k
  /* 28326 */ "ae_la16x4.rip \0"
1544
74.9k
  /* 28341 */ "ae_sa16x4.rip \0"
1545
74.9k
  /* 28356 */ "ae_l16x4.rip \0"
1546
74.9k
  /* 28370 */ "ae_s16x4.rip \0"
1547
74.9k
  /* 28384 */ "ae_sa24.l.rip \0"
1548
74.9k
  /* 28399 */ "ae_la64.pp \0"
1549
74.9k
  /* 28411 */ "ae_s16.0.xp \0"
1550
74.9k
  /* 28424 */ "ae_l32.xp \0"
1551
74.9k
  /* 28435 */ "ae_l32x2.xp \0"
1552
74.9k
  /* 28448 */ "ae_s32x2.xp \0"
1553
74.9k
  /* 28461 */ "ae_l32f24.xp \0"
1554
74.9k
  /* 28475 */ "ae_l32x2f24.xp \0"
1555
74.9k
  /* 28491 */ "ae_s32x2f24.xp \0"
1556
74.9k
  /* 28507 */ "ae_l64.xp \0"
1557
74.9k
  /* 28518 */ "ae_s64.xp \0"
1558
74.9k
  /* 28529 */ "ae_l16x4.xp \0"
1559
74.9k
  /* 28542 */ "ae_s16x4.xp \0"
1560
74.9k
  /* 28555 */ "ae_l16.xp \0"
1561
74.9k
  /* 28566 */ "ae_s32.l.xp \0"
1562
74.9k
  /* 28579 */ "ae_s32f24.l.xp \0"
1563
74.9k
  /* 28595 */ "ae_s32ra64s.xp \0"
1564
74.9k
  /* 28611 */ "ae_s24ra64s.xp \0"
1565
74.9k
  /* 28627 */ "ae_srai32r \0"
1566
74.9k
  /* 28639 */ "ae_mulafp24x2r \0"
1567
74.9k
  /* 28655 */ "ae_mulfp24x2r \0"
1568
74.9k
  /* 28670 */ "ae_mulsfp24x2r \0"
1569
74.9k
  /* 28686 */ "ae_srai16r \0"
1570
74.9k
  /* 28698 */ "rur.ae_sar \0"
1571
74.9k
  /* 28710 */ "wur.ae_sar \0"
1572
74.9k
  /* 28722 */ "rur.ae_ovf_sar \0"
1573
74.9k
  /* 28738 */ "wur.ae_ovf_sar \0"
1574
74.9k
  /* 28754 */ "!slli_br \0"
1575
74.9k
  /* 28764 */ "!extui_br \0"
1576
74.9k
  /* 28775 */ "!loopbr \0"
1577
74.9k
  /* 28784 */ "ae_or \0"
1578
74.9k
  /* 28791 */ "ae_xor \0"
1579
74.9k
  /* 28799 */ "rur.ae_bitptr \0"
1580
74.9k
  /* 28814 */ "wur.ae_bitptr \0"
1581
74.9k
  /* 28829 */ "ae_cvtq56a32s \0"
1582
74.9k
  /* 28844 */ "ae_slaa32s \0"
1583
74.9k
  /* 28856 */ "ae_sraa32s \0"
1584
74.9k
  /* 28868 */ "ae_sub32s \0"
1585
74.9k
  /* 28879 */ "ae_addsub32s \0"
1586
74.9k
  /* 28893 */ "ae_add32s \0"
1587
74.9k
  /* 28904 */ "ae_subadd32s \0"
1588
74.9k
  /* 28918 */ "ae_neg32s \0"
1589
74.9k
  /* 28929 */ "ae_slai32s \0"
1590
74.9k
  /* 28941 */ "ae_slas32s \0"
1591
74.9k
  /* 28953 */ "ae_abs32s \0"
1592
74.9k
  /* 28964 */ "ae_minabs32s \0"
1593
74.9k
  /* 28978 */ "ae_maxabs32s \0"
1594
74.9k
  /* 28992 */ "ae_sub24s \0"
1595
74.9k
  /* 29003 */ "ae_add24s \0"
1596
74.9k
  /* 29014 */ "ae_neg24s \0"
1597
74.9k
  /* 29025 */ "ae_slai24s \0"
1598
74.9k
  /* 29037 */ "ae_slas24s \0"
1599
74.9k
  /* 29049 */ "ae_abs24s \0"
1600
74.9k
  /* 29060 */ "ae_sat24s \0"
1601
74.9k
  /* 29071 */ "ae_slaa64s \0"
1602
74.9k
  /* 29083 */ "ae_sub64s \0"
1603
74.9k
  /* 29094 */ "ae_add64s \0"
1604
74.9k
  /* 29105 */ "ae_trunca32x2f64s \0"
1605
74.9k
  /* 29124 */ "ae_trunci32x2f64s \0"
1606
74.9k
  /* 29143 */ "ae_neg64s \0"
1607
74.9k
  /* 29154 */ "ae_slai64s \0"
1608
74.9k
  /* 29166 */ "ae_slas64s \0"
1609
74.9k
  /* 29178 */ "ae_abs64s \0"
1610
74.9k
  /* 29189 */ "ae_minabs64s \0"
1611
74.9k
  /* 29203 */ "ae_maxabs64s \0"
1612
74.9k
  /* 29217 */ "ae_mulfp16x4s \0"
1613
74.9k
  /* 29232 */ "ae_slaa16s \0"
1614
74.9k
  /* 29244 */ "ae_sraa16s \0"
1615
74.9k
  /* 29256 */ "ae_sub16s \0"
1616
74.9k
  /* 29267 */ "ae_add16s \0"
1617
74.9k
  /* 29278 */ "ae_neg16s \0"
1618
74.9k
  /* 29289 */ "ae_slai16s \0"
1619
74.9k
  /* 29301 */ "ae_abs16s \0"
1620
74.9k
  /* 29312 */ "ae_slaisq56s \0"
1621
74.9k
  /* 29326 */ "ae_slassq56s \0"
1622
74.9k
  /* 29340 */ "ae_satq56s \0"
1623
74.9k
  /* 29352 */ "ae_sat48s \0"
1624
74.9k
  /* 29363 */ "ae_mulafp32x2ras \0"
1625
74.9k
  /* 29381 */ "ae_mulfp32x2ras \0"
1626
74.9k
  /* 29398 */ "ae_mulsfp32x2ras \0"
1627
74.9k
  /* 29416 */ "ae_mulfp16x4ras \0"
1628
74.9k
  /* 29433 */ "ae_lbs \0"
1629
74.9k
  /* 29441 */ "ae_sraa32rs \0"
1630
74.9k
  /* 29454 */ "ae_mulafp32x2rs \0"
1631
74.9k
  /* 29471 */ "ae_mulfp32x2rs \0"
1632
74.9k
  /* 29487 */ "ae_mulsfp32x2rs \0"
1633
74.9k
  /* 29504 */ "ae_sraa16rs \0"
1634
74.9k
  /* 29517 */ "ae_mulaf16x4ss \0"
1635
74.9k
  /* 29533 */ "ae_mulf16x4ss \0"
1636
74.9k
  /* 29548 */ "ae_mulsf16x4ss \0"
1637
74.9k
  /* 29564 */ "rur.ae_first_ts \0"
1638
74.9k
  /* 29581 */ "wur.ae_first_ts \0"
1639
74.9k
  /* 29598 */ "ae_vldl32t \0"
1640
74.9k
  /* 29610 */ "ae_vlel32t \0"
1641
74.9k
  /* 29622 */ "ae_vldl16t \0"
1642
74.9k
  /* 29634 */ "ae_vlel16t \0"
1643
74.9k
  /* 29646 */ "!select \0"
1644
74.9k
  /* 29655 */ "rur.ae_nextoffset \0"
1645
74.9k
  /* 29674 */ "wur.ae_nextoffset \0"
1646
74.9k
  /* 29693 */ "ae_vldsht \0"
1647
74.9k
  /* 29704 */ "!loopinit \0"
1648
74.9k
  /* 29715 */ "!select_cc_fp_int \0"
1649
74.9k
  /* 29734 */ "!loopstart \0"
1650
74.9k
  /* 29746 */ "ae_s16m.l.iu \0"
1651
74.9k
  /* 29760 */ "ae_l32m.iu \0"
1652
74.9k
  /* 29772 */ "ae_s32m.iu \0"
1653
74.9k
  /* 29784 */ "ae_l16x2m.iu \0"
1654
74.9k
  /* 29798 */ "ae_s16x2m.iu \0"
1655
74.9k
  /* 29812 */ "ae_l16m.iu \0"
1656
74.9k
  /* 29824 */ "ae_s16m.l.xu \0"
1657
74.9k
  /* 29838 */ "ae_l32m.xu \0"
1658
74.9k
  /* 29850 */ "ae_s32m.xu \0"
1659
74.9k
  /* 29862 */ "ae_l16x2m.xu \0"
1660
74.9k
  /* 29876 */ "ae_s16x2m.xu \0"
1661
74.9k
  /* 29890 */ "ae_l16m.xu \0"
1662
74.9k
  /* 29902 */ "ae_mov \0"
1663
74.9k
  /* 29910 */ "rur.ae_overflow \0"
1664
74.9k
  /* 29927 */ "wur.ae_overflow \0"
1665
74.9k
  /* 29944 */ "ae_s16.0.x \0"
1666
74.9k
  /* 29956 */ "ae_l32.x \0"
1667
74.9k
  /* 29966 */ "ae_l32x2.x \0"
1668
74.9k
  /* 29978 */ "ae_s32x2.x \0"
1669
74.9k
  /* 29990 */ "ae_l32f24.x \0"
1670
74.9k
  /* 30003 */ "ae_l32x2f24.x \0"
1671
74.9k
  /* 30018 */ "ae_s32x2f24.x \0"
1672
74.9k
  /* 30033 */ "ae_l64.x \0"
1673
74.9k
  /* 30043 */ "ae_s64.x \0"
1674
74.9k
  /* 30053 */ "ae_l16x4.x \0"
1675
74.9k
  /* 30065 */ "ae_s16x4.x \0"
1676
74.9k
  /* 30077 */ "ae_l16.x \0"
1677
74.9k
  /* 30087 */ "ae_s32.l.x \0"
1678
74.9k
  /* 30099 */ "ae_s32f24.l.x \0"
1679
74.9k
  /* 30114 */ "ae_s16m.l.x \0"
1680
74.9k
  /* 30127 */ "ae_l32m.x \0"
1681
74.9k
  /* 30138 */ "ae_s32m.x \0"
1682
74.9k
  /* 30149 */ "ae_l16x2m.x \0"
1683
74.9k
  /* 30162 */ "ae_s16x2m.x \0"
1684
74.9k
  /* 30175 */ "ae_l16m.x \0"
1685
74.9k
  /* 30186 */ "ae_s32ra64s.x \0"
1686
74.9k
  /* 30201 */ "ae_s24ra64s.x \0"
1687
74.9k
  /* 30216 */ "# XRay Function Patchable RET.\0"
1688
74.9k
  /* 30247 */ "# XRay Typed Event Log.\0"
1689
74.9k
  /* 30271 */ "# XRay Custom Event Log.\0"
1690
74.9k
  /* 30296 */ "# XRay Function Enter.\0"
1691
74.9k
  /* 30319 */ "# XRay Tail Call Exit.\0"
1692
74.9k
  /* 30342 */ "# XRay Function Exit.\0"
1693
74.9k
  /* 30364 */ "LIFETIME_END\0"
1694
74.9k
  /* 30377 */ "PSEUDO_PROBE\0"
1695
74.9k
  /* 30390 */ "BUNDLE\0"
1696
74.9k
  /* 30397 */ "DBG_VALUE\0"
1697
74.9k
  /* 30407 */ "DBG_INSTR_REF\0"
1698
74.9k
  /* 30421 */ "DBG_PHI\0"
1699
74.9k
  /* 30429 */ "DBG_LABEL\0"
1700
74.9k
  /* 30439 */ "#ADJCALLSTACKDOWN\0"
1701
74.9k
  /* 30457 */ "#ADJCALLSTACKUP\0"
1702
74.9k
  /* 30473 */ "LIFETIME_START\0"
1703
74.9k
  /* 30488 */ "DBG_VALUE_LIST\0"
1704
74.9k
  /* 30503 */ "dsync\0"
1705
74.9k
  /* 30509 */ "esync\0"
1706
74.9k
  /* 30515 */ "isync\0"
1707
74.9k
  /* 30521 */ "rsync\0"
1708
74.9k
  /* 30527 */ "rfde\0"
1709
74.9k
  /* 30532 */ "rfe\0"
1710
74.9k
  /* 30536 */ "# FEntry call\0"
1711
74.9k
  /* 30550 */ "simcall\0"
1712
74.9k
  /* 30558 */ "syscall\0"
1713
74.9k
  /* 30566 */ "ill\0"
1714
74.9k
  /* 30570 */ "ill.n\0"
1715
74.9k
  /* 30576 */ "ret.n\0"
1716
74.9k
  /* 30582 */ "retw.n\0"
1717
74.9k
  /* 30589 */ "foo\0"
1718
74.9k
  /* 30593 */ "rfwo\0"
1719
74.9k
  /* 30598 */ "!xtensa_ee_zero_qacc_p\0"
1720
74.9k
  /* 30621 */ "!xtensa_ee_zero_accx_p\0"
1721
74.9k
  /* 30644 */ "nop\0"
1722
74.9k
  /* 30648 */ "ret\0"
1723
74.9k
  /* 30652 */ "rfwu\0"
1724
74.9k
  /* 30657 */ "excw\0"
1725
74.9k
  /* 30662 */ "memw\0"
1726
74.9k
  /* 30667 */ "retw\0"
1727
74.9k
  /* 30672 */ "extw\0"
1728
74.9k
};
1729
74.9k
#endif // CAPSTONE_DIET
1730
1731
74.9k
  static const uint32_t OpInfo0[] = {
1732
74.9k
    0U, // PHI
1733
74.9k
    0U, // INLINEASM
1734
74.9k
    0U, // INLINEASM_BR
1735
74.9k
    0U, // CFI_INSTRUCTION
1736
74.9k
    0U, // EH_LABEL
1737
74.9k
    0U, // GC_LABEL
1738
74.9k
    0U, // ANNOTATION_LABEL
1739
74.9k
    0U, // KILL
1740
74.9k
    0U, // EXTRACT_SUBREG
1741
74.9k
    0U, // INSERT_SUBREG
1742
74.9k
    0U, // IMPLICIT_DEF
1743
74.9k
    0U, // SUBREG_TO_REG
1744
74.9k
    0U, // COPY_TO_REGCLASS
1745
74.9k
    30398U, // DBG_VALUE
1746
74.9k
    30489U, // DBG_VALUE_LIST
1747
74.9k
    30408U, // DBG_INSTR_REF
1748
74.9k
    30422U, // DBG_PHI
1749
74.9k
    30430U, // DBG_LABEL
1750
74.9k
    0U, // REG_SEQUENCE
1751
74.9k
    0U, // COPY
1752
74.9k
    30391U, // BUNDLE
1753
74.9k
    30474U, // LIFETIME_START
1754
74.9k
    30365U, // LIFETIME_END
1755
74.9k
    30378U, // PSEUDO_PROBE
1756
74.9k
    0U, // ARITH_FENCE
1757
74.9k
    0U, // STACKMAP
1758
74.9k
    30537U, // FENTRY_CALL
1759
74.9k
    0U, // PATCHPOINT
1760
74.9k
    0U, // LOAD_STACK_GUARD
1761
74.9k
    0U, // PREALLOCATED_SETUP
1762
74.9k
    0U, // PREALLOCATED_ARG
1763
74.9k
    0U, // STATEPOINT
1764
74.9k
    0U, // LOCAL_ESCAPE
1765
74.9k
    0U, // FAULTING_OP
1766
74.9k
    0U, // PATCHABLE_OP
1767
74.9k
    30297U, // PATCHABLE_FUNCTION_ENTER
1768
74.9k
    30217U, // PATCHABLE_RET
1769
74.9k
    30343U, // PATCHABLE_FUNCTION_EXIT
1770
74.9k
    30320U, // PATCHABLE_TAIL_CALL
1771
74.9k
    30272U, // PATCHABLE_EVENT_CALL
1772
74.9k
    30248U, // PATCHABLE_TYPED_EVENT_CALL
1773
74.9k
    0U, // ICALL_BRANCH_FUNNEL
1774
74.9k
    0U, // MEMBARRIER
1775
74.9k
    0U, // JUMP_TABLE_DEBUG_INFO
1776
74.9k
    0U, // G_ASSERT_SEXT
1777
74.9k
    0U, // G_ASSERT_ZEXT
1778
74.9k
    0U, // G_ASSERT_ALIGN
1779
74.9k
    0U, // G_ADD
1780
74.9k
    0U, // G_SUB
1781
74.9k
    0U, // G_MUL
1782
74.9k
    0U, // G_SDIV
1783
74.9k
    0U, // G_UDIV
1784
74.9k
    0U, // G_SREM
1785
74.9k
    0U, // G_UREM
1786
74.9k
    0U, // G_SDIVREM
1787
74.9k
    0U, // G_UDIVREM
1788
74.9k
    0U, // G_AND
1789
74.9k
    0U, // G_OR
1790
74.9k
    0U, // G_XOR
1791
74.9k
    0U, // G_IMPLICIT_DEF
1792
74.9k
    0U, // G_PHI
1793
74.9k
    0U, // G_FRAME_INDEX
1794
74.9k
    0U, // G_GLOBAL_VALUE
1795
74.9k
    0U, // G_CONSTANT_POOL
1796
74.9k
    0U, // G_EXTRACT
1797
74.9k
    0U, // G_UNMERGE_VALUES
1798
74.9k
    0U, // G_INSERT
1799
74.9k
    0U, // G_MERGE_VALUES
1800
74.9k
    0U, // G_BUILD_VECTOR
1801
74.9k
    0U, // G_BUILD_VECTOR_TRUNC
1802
74.9k
    0U, // G_CONCAT_VECTORS
1803
74.9k
    0U, // G_PTRTOINT
1804
74.9k
    0U, // G_INTTOPTR
1805
74.9k
    0U, // G_BITCAST
1806
74.9k
    0U, // G_FREEZE
1807
74.9k
    0U, // G_CONSTANT_FOLD_BARRIER
1808
74.9k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
1809
74.9k
    0U, // G_INTRINSIC_TRUNC
1810
74.9k
    0U, // G_INTRINSIC_ROUND
1811
74.9k
    0U, // G_INTRINSIC_LRINT
1812
74.9k
    0U, // G_INTRINSIC_ROUNDEVEN
1813
74.9k
    0U, // G_READCYCLECOUNTER
1814
74.9k
    0U, // G_LOAD
1815
74.9k
    0U, // G_SEXTLOAD
1816
74.9k
    0U, // G_ZEXTLOAD
1817
74.9k
    0U, // G_INDEXED_LOAD
1818
74.9k
    0U, // G_INDEXED_SEXTLOAD
1819
74.9k
    0U, // G_INDEXED_ZEXTLOAD
1820
74.9k
    0U, // G_STORE
1821
74.9k
    0U, // G_INDEXED_STORE
1822
74.9k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1823
74.9k
    0U, // G_ATOMIC_CMPXCHG
1824
74.9k
    0U, // G_ATOMICRMW_XCHG
1825
74.9k
    0U, // G_ATOMICRMW_ADD
1826
74.9k
    0U, // G_ATOMICRMW_SUB
1827
74.9k
    0U, // G_ATOMICRMW_AND
1828
74.9k
    0U, // G_ATOMICRMW_NAND
1829
74.9k
    0U, // G_ATOMICRMW_OR
1830
74.9k
    0U, // G_ATOMICRMW_XOR
1831
74.9k
    0U, // G_ATOMICRMW_MAX
1832
74.9k
    0U, // G_ATOMICRMW_MIN
1833
74.9k
    0U, // G_ATOMICRMW_UMAX
1834
74.9k
    0U, // G_ATOMICRMW_UMIN
1835
74.9k
    0U, // G_ATOMICRMW_FADD
1836
74.9k
    0U, // G_ATOMICRMW_FSUB
1837
74.9k
    0U, // G_ATOMICRMW_FMAX
1838
74.9k
    0U, // G_ATOMICRMW_FMIN
1839
74.9k
    0U, // G_ATOMICRMW_UINC_WRAP
1840
74.9k
    0U, // G_ATOMICRMW_UDEC_WRAP
1841
74.9k
    0U, // G_FENCE
1842
74.9k
    0U, // G_PREFETCH
1843
74.9k
    0U, // G_BRCOND
1844
74.9k
    0U, // G_BRINDIRECT
1845
74.9k
    0U, // G_INVOKE_REGION_START
1846
74.9k
    0U, // G_INTRINSIC
1847
74.9k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
1848
74.9k
    0U, // G_INTRINSIC_CONVERGENT
1849
74.9k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
1850
74.9k
    0U, // G_ANYEXT
1851
74.9k
    0U, // G_TRUNC
1852
74.9k
    0U, // G_CONSTANT
1853
74.9k
    0U, // G_FCONSTANT
1854
74.9k
    0U, // G_VASTART
1855
74.9k
    0U, // G_VAARG
1856
74.9k
    0U, // G_SEXT
1857
74.9k
    0U, // G_SEXT_INREG
1858
74.9k
    0U, // G_ZEXT
1859
74.9k
    0U, // G_SHL
1860
74.9k
    0U, // G_LSHR
1861
74.9k
    0U, // G_ASHR
1862
74.9k
    0U, // G_FSHL
1863
74.9k
    0U, // G_FSHR
1864
74.9k
    0U, // G_ROTR
1865
74.9k
    0U, // G_ROTL
1866
74.9k
    0U, // G_ICMP
1867
74.9k
    0U, // G_FCMP
1868
74.9k
    0U, // G_SELECT
1869
74.9k
    0U, // G_UADDO
1870
74.9k
    0U, // G_UADDE
1871
74.9k
    0U, // G_USUBO
1872
74.9k
    0U, // G_USUBE
1873
74.9k
    0U, // G_SADDO
1874
74.9k
    0U, // G_SADDE
1875
74.9k
    0U, // G_SSUBO
1876
74.9k
    0U, // G_SSUBE
1877
74.9k
    0U, // G_UMULO
1878
74.9k
    0U, // G_SMULO
1879
74.9k
    0U, // G_UMULH
1880
74.9k
    0U, // G_SMULH
1881
74.9k
    0U, // G_UADDSAT
1882
74.9k
    0U, // G_SADDSAT
1883
74.9k
    0U, // G_USUBSAT
1884
74.9k
    0U, // G_SSUBSAT
1885
74.9k
    0U, // G_USHLSAT
1886
74.9k
    0U, // G_SSHLSAT
1887
74.9k
    0U, // G_SMULFIX
1888
74.9k
    0U, // G_UMULFIX
1889
74.9k
    0U, // G_SMULFIXSAT
1890
74.9k
    0U, // G_UMULFIXSAT
1891
74.9k
    0U, // G_SDIVFIX
1892
74.9k
    0U, // G_UDIVFIX
1893
74.9k
    0U, // G_SDIVFIXSAT
1894
74.9k
    0U, // G_UDIVFIXSAT
1895
74.9k
    0U, // G_FADD
1896
74.9k
    0U, // G_FSUB
1897
74.9k
    0U, // G_FMUL
1898
74.9k
    0U, // G_FMA
1899
74.9k
    0U, // G_FMAD
1900
74.9k
    0U, // G_FDIV
1901
74.9k
    0U, // G_FREM
1902
74.9k
    0U, // G_FPOW
1903
74.9k
    0U, // G_FPOWI
1904
74.9k
    0U, // G_FEXP
1905
74.9k
    0U, // G_FEXP2
1906
74.9k
    0U, // G_FEXP10
1907
74.9k
    0U, // G_FLOG
1908
74.9k
    0U, // G_FLOG2
1909
74.9k
    0U, // G_FLOG10
1910
74.9k
    0U, // G_FLDEXP
1911
74.9k
    0U, // G_FFREXP
1912
74.9k
    0U, // G_FNEG
1913
74.9k
    0U, // G_FPEXT
1914
74.9k
    0U, // G_FPTRUNC
1915
74.9k
    0U, // G_FPTOSI
1916
74.9k
    0U, // G_FPTOUI
1917
74.9k
    0U, // G_SITOFP
1918
74.9k
    0U, // G_UITOFP
1919
74.9k
    0U, // G_FABS
1920
74.9k
    0U, // G_FCOPYSIGN
1921
74.9k
    0U, // G_IS_FPCLASS
1922
74.9k
    0U, // G_FCANONICALIZE
1923
74.9k
    0U, // G_FMINNUM
1924
74.9k
    0U, // G_FMAXNUM
1925
74.9k
    0U, // G_FMINNUM_IEEE
1926
74.9k
    0U, // G_FMAXNUM_IEEE
1927
74.9k
    0U, // G_FMINIMUM
1928
74.9k
    0U, // G_FMAXIMUM
1929
74.9k
    0U, // G_GET_FPENV
1930
74.9k
    0U, // G_SET_FPENV
1931
74.9k
    0U, // G_RESET_FPENV
1932
74.9k
    0U, // G_GET_FPMODE
1933
74.9k
    0U, // G_SET_FPMODE
1934
74.9k
    0U, // G_RESET_FPMODE
1935
74.9k
    0U, // G_PTR_ADD
1936
74.9k
    0U, // G_PTRMASK
1937
74.9k
    0U, // G_SMIN
1938
74.9k
    0U, // G_SMAX
1939
74.9k
    0U, // G_UMIN
1940
74.9k
    0U, // G_UMAX
1941
74.9k
    0U, // G_ABS
1942
74.9k
    0U, // G_LROUND
1943
74.9k
    0U, // G_LLROUND
1944
74.9k
    0U, // G_BR
1945
74.9k
    0U, // G_BRJT
1946
74.9k
    0U, // G_INSERT_VECTOR_ELT
1947
74.9k
    0U, // G_EXTRACT_VECTOR_ELT
1948
74.9k
    0U, // G_SHUFFLE_VECTOR
1949
74.9k
    0U, // G_CTTZ
1950
74.9k
    0U, // G_CTTZ_ZERO_UNDEF
1951
74.9k
    0U, // G_CTLZ
1952
74.9k
    0U, // G_CTLZ_ZERO_UNDEF
1953
74.9k
    0U, // G_CTPOP
1954
74.9k
    0U, // G_BSWAP
1955
74.9k
    0U, // G_BITREVERSE
1956
74.9k
    0U, // G_FCEIL
1957
74.9k
    0U, // G_FCOS
1958
74.9k
    0U, // G_FSIN
1959
74.9k
    0U, // G_FSQRT
1960
74.9k
    0U, // G_FFLOOR
1961
74.9k
    0U, // G_FRINT
1962
74.9k
    0U, // G_FNEARBYINT
1963
74.9k
    0U, // G_ADDRSPACE_CAST
1964
74.9k
    0U, // G_BLOCK_ADDR
1965
74.9k
    0U, // G_JUMP_TABLE
1966
74.9k
    0U, // G_DYN_STACKALLOC
1967
74.9k
    0U, // G_STACKSAVE
1968
74.9k
    0U, // G_STACKRESTORE
1969
74.9k
    0U, // G_STRICT_FADD
1970
74.9k
    0U, // G_STRICT_FSUB
1971
74.9k
    0U, // G_STRICT_FMUL
1972
74.9k
    0U, // G_STRICT_FDIV
1973
74.9k
    0U, // G_STRICT_FREM
1974
74.9k
    0U, // G_STRICT_FMA
1975
74.9k
    0U, // G_STRICT_FSQRT
1976
74.9k
    0U, // G_STRICT_FLDEXP
1977
74.9k
    0U, // G_READ_REGISTER
1978
74.9k
    0U, // G_WRITE_REGISTER
1979
74.9k
    0U, // G_MEMCPY
1980
74.9k
    0U, // G_MEMCPY_INLINE
1981
74.9k
    0U, // G_MEMMOVE
1982
74.9k
    0U, // G_MEMSET
1983
74.9k
    0U, // G_BZERO
1984
74.9k
    0U, // G_VECREDUCE_SEQ_FADD
1985
74.9k
    0U, // G_VECREDUCE_SEQ_FMUL
1986
74.9k
    0U, // G_VECREDUCE_FADD
1987
74.9k
    0U, // G_VECREDUCE_FMUL
1988
74.9k
    0U, // G_VECREDUCE_FMAX
1989
74.9k
    0U, // G_VECREDUCE_FMIN
1990
74.9k
    0U, // G_VECREDUCE_FMAXIMUM
1991
74.9k
    0U, // G_VECREDUCE_FMINIMUM
1992
74.9k
    0U, // G_VECREDUCE_ADD
1993
74.9k
    0U, // G_VECREDUCE_MUL
1994
74.9k
    0U, // G_VECREDUCE_AND
1995
74.9k
    0U, // G_VECREDUCE_OR
1996
74.9k
    0U, // G_VECREDUCE_XOR
1997
74.9k
    0U, // G_VECREDUCE_SMAX
1998
74.9k
    0U, // G_VECREDUCE_SMIN
1999
74.9k
    0U, // G_VECREDUCE_UMAX
2000
74.9k
    0U, // G_VECREDUCE_UMIN
2001
74.9k
    0U, // G_SBFX
2002
74.9k
    0U, // G_UBFX
2003
74.9k
    30440U, // ADJCALLSTACKDOWN
2004
74.9k
    30458U, // ADJCALLSTACKUP
2005
74.9k
    40789U, // ATOMIC_CMP_SWAP_16_P
2006
74.9k
    40108U, // ATOMIC_CMP_SWAP_32_P
2007
74.9k
    41469U, // ATOMIC_CMP_SWAP_8_P
2008
74.9k
    40647U, // ATOMIC_LOAD_ADD_16_P
2009
74.9k
    39944U, // ATOMIC_LOAD_ADD_32_P
2010
74.9k
    41333U, // ATOMIC_LOAD_ADD_8_P
2011
74.9k
    40671U, // ATOMIC_LOAD_AND_16_P
2012
74.9k
    39968U, // ATOMIC_LOAD_AND_32_P
2013
74.9k
    41356U, // ATOMIC_LOAD_AND_8_P
2014
74.9k
    40908U, // ATOMIC_LOAD_MAX_16_P
2015
74.9k
    40295U, // ATOMIC_LOAD_MAX_32_P
2016
74.9k
    41583U, // ATOMIC_LOAD_MAX_8_P
2017
74.9k
    40720U, // ATOMIC_LOAD_MIN_16_P
2018
74.9k
    40039U, // ATOMIC_LOAD_MIN_32_P
2019
74.9k
    41403U, // ATOMIC_LOAD_MIN_8_P
2020
74.9k
    40695U, // ATOMIC_LOAD_NAND_16_P
2021
74.9k
    39992U, // ATOMIC_LOAD_NAND_32_P
2022
74.9k
    41379U, // ATOMIC_LOAD_NAND_8_P
2023
74.9k
    40861U, // ATOMIC_LOAD_OR_16_P
2024
74.9k
    40226U, // ATOMIC_LOAD_OR_32_P
2025
74.9k
    41538U, // ATOMIC_LOAD_OR_8_P
2026
74.9k
    40599U, // ATOMIC_LOAD_SUB_16_P
2027
74.9k
    39896U, // ATOMIC_LOAD_SUB_32_P
2028
74.9k
    41287U, // ATOMIC_LOAD_SUB_8_P
2029
74.9k
    40932U, // ATOMIC_LOAD_UMAX_16_P
2030
74.9k
    40319U, // ATOMIC_LOAD_UMAX_32_P
2031
74.9k
    41606U, // ATOMIC_LOAD_UMAX_8_P
2032
74.9k
    40744U, // ATOMIC_LOAD_UMIN_16_P
2033
74.9k
    40063U, // ATOMIC_LOAD_UMIN_32_P
2034
74.9k
    41426U, // ATOMIC_LOAD_UMIN_8_P
2035
74.9k
    40884U, // ATOMIC_LOAD_XOR_16_P
2036
74.9k
    40249U, // ATOMIC_LOAD_XOR_32_P
2037
74.9k
    41560U, // ATOMIC_LOAD_XOR_8_P
2038
74.9k
    40769U, // ATOMIC_SWAP_16_P
2039
74.9k
    40088U, // ATOMIC_SWAP_32_P
2040
74.9k
    41450U, // ATOMIC_SWAP_8_P
2041
74.9k
    60398U, // BRCC_FP
2042
74.9k
    67156522U,  // BR_JT
2043
74.9k
    30590U, // CONSTPOOL_ENTRY
2044
74.9k
    539048393U, // EE_ANDQ_P
2045
74.9k
    67189301U,  // EE_BITREV_P
2046
74.9k
    536946937U, // EE_CMUL_S16_LD_INCP_P
2047
74.9k
    539041817U, // EE_CMUL_S16_P
2048
74.9k
    536947631U, // EE_CMUL_S16_ST_INCP_P
2049
74.9k
    536947099U, // EE_FFT_AMS_S16_LD_INCP_P
2050
74.9k
    536949305U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P
2051
74.9k
    536946544U, // EE_FFT_AMS_S16_LD_R32_DECP_P
2052
74.9k
    2174033U, // EE_FFT_AMS_S16_ST_INCP_P
2053
74.9k
    79748U, // EE_FFT_CMUL_S16_LD_XP_P
2054
74.9k
    539048195U, // EE_FFT_CMUL_S16_ST_XP_P
2055
74.9k
    539041789U, // EE_FFT_R2BF_S16_P
2056
74.9k
    539044747U, // EE_FFT_R2BF_S16_ST_INCP_P
2057
74.9k
    1073817495U,  // EE_FFT_VST_R32_DECP_P
2058
74.9k
    44924U, // EE_LDF_128_IP_P
2059
74.9k
    46876U, // EE_LDF_128_XP_P
2060
74.9k
    44591U, // EE_LDF_64_IP_P
2061
74.9k
    46543U, // EE_LDF_64_XP_P
2062
74.9k
    4239080U, // EE_LDQA_S16_128_IP_P
2063
74.9k
    67155592U,  // EE_LDQA_S16_128_XP_P
2064
74.9k
    4239142U, // EE_LDQA_S8_128_IP_P
2065
74.9k
    67155654U,  // EE_LDQA_S8_128_XP_P
2066
74.9k
    4239111U, // EE_LDQA_U16_128_IP_P
2067
74.9k
    67155623U,  // EE_LDQA_U16_128_XP_P
2068
74.9k
    4239172U, // EE_LDQA_U8_128_IP_P
2069
74.9k
    67155684U,  // EE_LDQA_U8_128_XP_P
2070
74.9k
    2170100U, // EE_LDXQ_32_P
2071
74.9k
    1610691047U,  // EE_LD_128_USAR_IP_P
2072
74.9k
    80101U, // EE_LD_128_USAR_XP_P
2073
74.9k
    6337029U, // EE_LD_ACCX_IP_P
2074
74.9k
    8433067U, // EE_LD_QACC_H_H_32_IP_P
2075
74.9k
    4239280U, // EE_LD_QACC_H_L_128_IP_P
2076
74.9k
    8433133U, // EE_LD_QACC_L_H_32_IP_P
2077
74.9k
    4239348U, // EE_LD_QACC_L_L_128_IP_P
2078
74.9k
    4239787U, // EE_LD_UA_STATE_IP_P
2079
74.9k
    2147558313U,  // EE_MOVI_32_A_P
2080
74.9k
    2147563909U,  // EE_MOVI_32_Q_P
2081
74.9k
    599071U,  // EE_MOV_S16_QACC_P
2082
74.9k
    599248U,  // EE_MOV_S8_QACC_P
2083
74.9k
    599130U,  // EE_MOV_U16_QACC_P
2084
74.9k
    599305U,  // EE_MOV_U8_QACC_P
2085
74.9k
    69286404U,  // EE_NOTQ_P
2086
74.9k
    539048413U, // EE_ORQ_P
2087
74.9k
    2686531877U,  // EE_SLCI_2Q_P
2088
74.9k
    2177363U, // EE_SLCXXP_2Q_P
2089
74.9k
    2686531900U,  // EE_SRCI_2Q_P
2090
74.9k
    1073816514U,  // EE_SRCMB_S16_QACC_P
2091
74.9k
    1073816694U,  // EE_SRCMB_S8_QACC_P
2092
74.9k
    2174132U, // EE_SRCQ_128_ST_INCP_P
2093
74.9k
    2177388U, // EE_SRCXXP_2Q_P
2094
74.9k
    1610690814U,  // EE_SRC_Q_LD_IP_P
2095
74.9k
    79928U, // EE_SRC_Q_LD_XP_P
2096
74.9k
    539048350U, // EE_SRC_Q_P
2097
74.9k
    539047323U, // EE_SRC_Q_QUP_P
2098
74.9k
    1073789637U,  // EE_SRS_ACCX_P
2099
74.9k
    44950U, // EE_STF_128_IP_P
2100
74.9k
    46902U, // EE_STF_128_XP_P
2101
74.9k
    44616U, // EE_STF_64_IP_P
2102
74.9k
    46568U, // EE_STF_64_XP_P
2103
74.9k
    2170123U, // EE_STXQ_32_P
2104
74.9k
    6337055U, // EE_ST_ACCX_IP_P
2105
74.9k
    8433100U, // EE_ST_QACC_H_H_32_IP_P
2106
74.9k
    4239314U, // EE_ST_QACC_H_L_128_IP_P
2107
74.9k
    8433166U, // EE_ST_QACC_L_H_32_IP_P
2108
74.9k
    4239382U, // EE_ST_QACC_L_L_128_IP_P
2109
74.9k
    4239817U, // EE_ST_UA_STATE_IP_P
2110
74.9k
    536947066U, // EE_VADDS_S16_LD_INCP_P
2111
74.9k
    539041941U, // EE_VADDS_S16_P
2112
74.9k
    536947760U, // EE_VADDS_S16_ST_INCP_P
2113
74.9k
    536946872U, // EE_VADDS_S32_LD_INCP_P
2114
74.9k
    539041252U, // EE_VADDS_S32_P
2115
74.9k
    536947530U, // EE_VADDS_S32_ST_INCP_P
2116
74.9k
    536947292U, // EE_VADDS_S8_LD_INCP_P
2117
74.9k
    539042558U, // EE_VADDS_S8_P
2118
74.9k
    536948018U, // EE_VADDS_S8_ST_INCP_P
2119
74.9k
    539041889U, // EE_VCMP_EQ_S16_P
2120
74.9k
    539041200U, // EE_VCMP_EQ_S32_P
2121
74.9k
    539042508U, // EE_VCMP_EQ_S8_P
2122
74.9k
    539041966U, // EE_VCMP_GT_S16_P
2123
74.9k
    539041277U, // EE_VCMP_GT_S32_P
2124
74.9k
    539042582U, // EE_VCMP_GT_S8_P
2125
74.9k
    539041993U, // EE_VCMP_LT_S16_P
2126
74.9k
    539041304U, // EE_VCMP_LT_S32_P
2127
74.9k
    539042608U, // EE_VCMP_LT_S8_P
2128
74.9k
    3221302989U,  // EE_VLDBC_16_IP_P
2129
74.9k
    67182255U,  // EE_VLDBC_16_P
2130
74.9k
    79469U, // EE_VLDBC_16_XP_P
2131
74.9k
    3758173584U,  // EE_VLDBC_32_IP_P
2132
74.9k
    67181552U,  // EE_VLDBC_32_P
2133
74.9k
    79284U, // EE_VLDBC_32_XP_P
2134
74.9k
    77906U, // EE_VLDBC_8_IP_P
2135
74.9k
    67182942U,  // EE_VLDBC_8_P
2136
74.9k
    79722U, // EE_VLDBC_8_XP_P
2137
74.9k
    2172855U, // EE_VLDHBC_16_INCP_P
2138
74.9k
    1610690402U,  // EE_VLD_128_IP_P
2139
74.9k
    79618U, // EE_VLD_128_XP_P
2140
74.9k
    536948321U, // EE_VLD_H_64_IP_P
2141
74.9k
    79361U, // EE_VLD_H_64_XP_P
2142
74.9k
    536948375U, // EE_VLD_L_64_IP_P
2143
74.9k
    79415U, // EE_VLD_L_64_XP_P
2144
74.9k
    536947134U, // EE_VMAX_S16_LD_INCP_P
2145
74.9k
    539042071U, // EE_VMAX_S16_P
2146
74.9k
    536947828U, // EE_VMAX_S16_ST_INCP_P
2147
74.9k
    536946905U, // EE_VMAX_S32_LD_INCP_P
2148
74.9k
    539041331U, // EE_VMAX_S32_P
2149
74.9k
    536947563U, // EE_VMAX_S32_ST_INCP_P
2150
74.9k
    536947324U, // EE_VMAX_S8_LD_INCP_P
2151
74.9k
    539042683U, // EE_VMAX_S8_P
2152
74.9k
    536948050U, // EE_VMAX_S8_ST_INCP_P
2153
74.9k
    536947001U, // EE_VMIN_S16_LD_INCP_P
2154
74.9k
    539041865U, // EE_VMIN_S16_P
2155
74.9k
    536947695U, // EE_VMIN_S16_ST_INCP_P
2156
74.9k
    536946807U, // EE_VMIN_S32_LD_INCP_P
2157
74.9k
    539041176U, // EE_VMIN_S32_P
2158
74.9k
    536947465U, // EE_VMIN_S32_ST_INCP_P
2159
74.9k
    536947229U, // EE_VMIN_S8_LD_INCP_P
2160
74.9k
    539042485U, // EE_VMIN_S8_P
2161
74.9k
    536947955U, // EE_VMIN_S8_ST_INCP_P
2162
74.9k
    1073819929U,  // EE_VMULAS_S16_ACCX_LD_IP_P
2163
74.9k
    1073820597U,  // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
2164
74.9k
    79955U, // EE_VMULAS_S16_ACCX_LD_XP_P
2165
74.9k
    79097U, // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
2166
74.9k
    69286475U,  // EE_VMULAS_S16_ACCX_P
2167
74.9k
    536946645U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
2168
74.9k
    536949345U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
2169
74.9k
    1073819756U,  // EE_VMULAS_S16_QACC_LD_IP_P
2170
74.9k
    1073820435U,  // EE_VMULAS_S16_QACC_LD_IP_QUP_P
2171
74.9k
    79782U, // EE_VMULAS_S16_QACC_LD_XP_P
2172
74.9k
    78935U, // EE_VMULAS_S16_QACC_LD_XP_QUP_P
2173
74.9k
    69280768U,  // EE_VMULAS_S16_QACC_P
2174
74.9k
    1073820003U,  // EE_VMULAS_S8_ACCX_LD_IP_P
2175
74.9k
    1073820679U,  // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
2176
74.9k
    80029U, // EE_VMULAS_S8_ACCX_LD_XP_P
2177
74.9k
    79179U, // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
2178
74.9k
    69286537U,  // EE_VMULAS_S8_ACCX_P
2179
74.9k
    536946727U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
2180
74.9k
    536949435U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
2181
74.9k
    1073819830U,  // EE_VMULAS_S8_QACC_LD_IP_P
2182
74.9k
    1073820517U,  // EE_VMULAS_S8_QACC_LD_IP_QUP_P
2183
74.9k
    79856U, // EE_VMULAS_S8_QACC_LD_XP_P
2184
74.9k
    79017U, // EE_VMULAS_S8_QACC_LD_XP_QUP_P
2185
74.9k
    69280946U,  // EE_VMULAS_S8_QACC_P
2186
74.9k
    1073819966U,  // EE_VMULAS_U16_ACCX_LD_IP_P
2187
74.9k
    1073820638U,  // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
2188
74.9k
    79992U, // EE_VMULAS_U16_ACCX_LD_XP_P
2189
74.9k
    79138U, // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
2190
74.9k
    69286506U,  // EE_VMULAS_U16_ACCX_P
2191
74.9k
    536946686U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
2192
74.9k
    536949390U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
2193
74.9k
    1073819793U,  // EE_VMULAS_U16_QACC_LD_IP_P
2194
74.9k
    1073820476U,  // EE_VMULAS_U16_QACC_LD_IP_QUP_P
2195
74.9k
    79819U, // EE_VMULAS_U16_QACC_LD_XP_P
2196
74.9k
    78976U, // EE_VMULAS_U16_QACC_LD_XP_QUP_P
2197
74.9k
    69280827U,  // EE_VMULAS_U16_QACC_P
2198
74.9k
    1073820039U,  // EE_VMULAS_U8_ACCX_LD_IP_P
2199
74.9k
    1073820719U,  // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
2200
74.9k
    80065U, // EE_VMULAS_U8_ACCX_LD_XP_P
2201
74.9k
    79219U, // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
2202
74.9k
    69286567U,  // EE_VMULAS_U8_ACCX_P
2203
74.9k
    536946767U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
2204
74.9k
    536949479U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
2205
74.9k
    1073819866U,  // EE_VMULAS_U8_QACC_LD_IP_P
2206
74.9k
    1073820557U,  // EE_VMULAS_U8_QACC_LD_IP_QUP_P
2207
74.9k
    79892U, // EE_VMULAS_U8_QACC_LD_XP_P
2208
74.9k
    79057U, // EE_VMULAS_U8_QACC_LD_XP_QUP_P
2209
74.9k
    69281003U,  // EE_VMULAS_U8_QACC_P
2210
74.9k
    536946969U, // EE_VMUL_S16_LD_INCP_P
2211
74.9k
    539041841U, // EE_VMUL_S16_P
2212
74.9k
    536947663U, // EE_VMUL_S16_ST_INCP_P
2213
74.9k
    536947198U, // EE_VMUL_S8_LD_INCP_P
2214
74.9k
    539042462U, // EE_VMUL_S8_P
2215
74.9k
    536947924U, // EE_VMUL_S8_ST_INCP_P
2216
74.9k
    536947166U, // EE_VMUL_U16_LD_INCP_P
2217
74.9k
    539042095U, // EE_VMUL_U16_P
2218
74.9k
    536947860U, // EE_VMUL_U16_ST_INCP_P
2219
74.9k
    536947355U, // EE_VMUL_U8_LD_INCP_P
2220
74.9k
    539042706U, // EE_VMUL_U8_P
2221
74.9k
    536948081U, // EE_VMUL_U8_ST_INCP_P
2222
74.9k
    539042020U, // EE_VPRELU_S16_P
2223
74.9k
    539042634U, // EE_VPRELU_S8_P
2224
74.9k
    73982U, // EE_VRELU_S16_P
2225
74.9k
    74595U, // EE_VRELU_S8_P
2226
74.9k
    69278801U,  // EE_VSL_32_P
2227
74.9k
    536947386U, // EE_VSMULAS_S16_QACC_LD_INCP_P
2228
74.9k
    1612784608U,  // EE_VSMULAS_S16_QACC_P
2229
74.9k
    536947426U, // EE_VSMULAS_S8_QACC_LD_INCP_P
2230
74.9k
    2686526611U,  // EE_VSMULAS_S8_QACC_P
2231
74.9k
    69279057U,  // EE_VSR_32_P
2232
74.9k
    1610690616U,  // EE_VST_128_IP_P
2233
74.9k
    79696U, // EE_VST_128_XP_P
2234
74.9k
    536948348U, // EE_VST_H_64_IP_P
2235
74.9k
    79388U, // EE_VST_H_64_XP_P
2236
74.9k
    536948402U, // EE_VST_L_64_IP_P
2237
74.9k
    79442U, // EE_VST_L_64_XP_P
2238
74.9k
    536947033U, // EE_VSUBS_S16_LD_INCP_P
2239
74.9k
    539041916U, // EE_VSUBS_S16_P
2240
74.9k
    536947727U, // EE_VSUBS_S16_ST_INCP_P
2241
74.9k
    536946839U, // EE_VSUBS_S32_LD_INCP_P
2242
74.9k
    539041227U, // EE_VSUBS_S32_P
2243
74.9k
    536947497U, // EE_VSUBS_S32_ST_INCP_P
2244
74.9k
    536947260U, // EE_VSUBS_S8_LD_INCP_P
2245
74.9k
    539042534U, // EE_VSUBS_S8_P
2246
74.9k
    536947986U, // EE_VSUBS_S8_ST_INCP_P
2247
74.9k
    69279597U,  // EE_VUNZIP_16_P
2248
74.9k
    69278916U,  // EE_VUNZIP_32_P
2249
74.9k
    69280276U,  // EE_VUNZIP_8_P
2250
74.9k
    69279622U,  // EE_VZIP_16_P
2251
74.9k
    69278941U,  // EE_VZIP_32_P
2252
74.9k
    69280300U,  // EE_VZIP_8_P
2253
74.9k
    539048432U, // EE_XORQ_P
2254
74.9k
    30622U, // EE_ZERO_ACCX_P
2255
74.9k
    30599U, // EE_ZERO_QACC_P
2256
74.9k
    604595U,  // EE_ZERO_Q_P
2257
74.9k
    50510U, // EXTUI_BR2_P
2258
74.9k
    55748U, // EXTUI_BR4_P
2259
74.9k
    61533U, // EXTUI_BR_P
2260
74.9k
    10541699U,  // L8I_P
2261
74.9k
    67183908U,  // LDDEC_P
2262
74.9k
    67184158U,  // LDINC_P
2263
74.9k
    12644456U,  // LOOPBR
2264
74.9k
    67164961U,  // LOOPDEC
2265
74.9k
    122623U,  // LOOPEND
2266
74.9k
    67171337U,  // LOOPINIT
2267
74.9k
    12645415U,  // LOOPSTART
2268
74.9k
    67158791U,  // MOVBA2_P
2269
74.9k
    55965U, // MOVBA2_P2
2270
74.9k
    67164603U,  // MOVBA4_P
2271
74.9k
    55739U, // MOVBA4_P2
2272
74.9k
    67164829U,  // MOVBA_P
2273
74.9k
    55965U, // MOVBA_P2
2274
74.9k
    536945974U, // MULA_DA_HH_LDDEC_P
2275
74.9k
    536946224U, // MULA_DA_HH_LDINC_P
2276
74.9k
    536946090U, // MULA_DA_HL_LDDEC_P
2277
74.9k
    536946340U, // MULA_DA_HL_LDINC_P
2278
74.9k
    536946032U, // MULA_DA_LH_LDDEC_P
2279
74.9k
    536946282U, // MULA_DA_LH_LDINC_P
2280
74.9k
    536946148U, // MULA_DA_LL_LDDEC_P
2281
74.9k
    536946398U, // MULA_DA_LL_LDINC_P
2282
74.9k
    536946003U, // MULA_DD_HH_LDDEC_P
2283
74.9k
    536946253U, // MULA_DD_HH_LDINC_P
2284
74.9k
    536946119U, // MULA_DD_HL_LDDEC_P
2285
74.9k
    536946369U, // MULA_DD_HL_LDINC_P
2286
74.9k
    536946061U, // MULA_DD_LH_LDDEC_P
2287
74.9k
    536946311U, // MULA_DD_LH_LDINC_P
2288
74.9k
    536946177U, // MULA_DD_LL_LDDEC_P
2289
74.9k
    536946427U, // MULA_DD_LL_LDINC_P
2290
74.9k
    10545657U,  // RESTORE_BOOL
2291
74.9k
    62415U, // SELECT
2292
74.9k
    60408U, // SELECT_CC_FP_FP
2293
74.9k
    62484U, // SELECT_CC_FP_INT
2294
74.9k
    60426U, // SELECT_CC_INT_FP
2295
74.9k
    61523U, // SLLI_BR_P
2296
74.9k
    55947U, // SLL_P
2297
74.9k
    10545672U,  // SPILL_BOOL
2298
74.9k
    55930U, // SRA_P
2299
74.9k
    55956U, // SRL_P
2300
74.9k
    567064U,  // WSR_ACCHI_P
2301
74.9k
    567108U,  // WSR_ACCLO_P
2302
74.9k
    564108U,  // WSR_M0_P
2303
74.9k
    564146U,  // WSR_M1_P
2304
74.9k
    564811U,  // WSR_M2_P
2305
74.9k
    564849U,  // WSR_M3_P
2306
74.9k
    567086U,  // XSR_ACCHI_P
2307
74.9k
    567130U,  // XSR_ACCLO_P
2308
74.9k
    564127U,  // XSR_M0_P
2309
74.9k
    564165U,  // XSR_M1_P
2310
74.9k
    564830U,  // XSR_M2_P
2311
74.9k
    564868U,  // XSR_M3_P
2312
74.9k
    69286424U,  // mv_QR_P
2313
74.9k
    67143192U,  // ABS
2314
74.9k
    67143089U,  // ABS_S
2315
74.9k
    32973U, // ADD
2316
74.9k
    81921390U,  // ADDEXPM_S
2317
74.9k
    81921424U,  // ADDEXP_S
2318
74.9k
    536904286U, // ADDI
2319
74.9k
    2147517513U,  // ADDI_N
2320
74.9k
    2684387971U,  // ADDMI
2321
74.9k
    32818U, // ADDX2
2322
74.9k
    32839U, // ADDX4
2323
74.9k
    32874U, // ADDX8
2324
74.9k
    33840U, // ADD_N
2325
74.9k
    34078U, // ADD_S
2326
74.9k
    67170934U,  // AE_ABS16S
2327
74.9k
    67170682U,  // AE_ABS24S
2328
74.9k
    67158740U,  // AE_ABS32
2329
74.9k
    67170586U,  // AE_ABS32S
2330
74.9k
    67164552U,  // AE_ABS64
2331
74.9k
    67170811U,  // AE_ABS64S
2332
74.9k
    55858U, // AE_ADD16
2333
74.9k
    62036U, // AE_ADD16S
2334
74.9k
    61772U, // AE_ADD24S
2335
74.9k
    49749U, // AE_ADD32
2336
74.9k
    61662U, // AE_ADD32S
2337
74.9k
    58299U, // AE_ADD32_HL_LH
2338
74.9k
    55561U, // AE_ADD64
2339
74.9k
    61863U, // AE_ADD64S
2340
74.9k
    49679U, // AE_ADDBRBA32
2341
74.9k
    49736U, // AE_ADDSUB32
2342
74.9k
    61648U, // AE_ADDSUB32S
2343
74.9k
    57070U, // AE_AND
2344
74.9k
    67156887U,  // AE_CVT32X2F16_10
2345
74.9k
    67158414U,  // AE_CVT32X2F16_32
2346
74.9k
    67158508U,  // AE_CVT48A32
2347
74.9k
    67158495U,  // AE_CVT64A32
2348
74.9k
    67166072U,  // AE_CVT64F32_H
2349
74.9k
    67166234U,  // AE_CVTA32F24S_H
2350
74.9k
    67167740U,  // AE_CVTA32F24S_L
2351
74.9k
    67170462U,  // AE_CVTQ56A32S
2352
74.9k
    67166217U,  // AE_CVTQ56P32S_H
2353
74.9k
    67167723U,  // AE_CVTQ56P32S_L
2354
74.9k
    81943284U,  // AE_DB
2355
74.9k
    16934148U,  // AE_DBI
2356
74.9k
    16931818U,  // AE_DBI_IC
2357
74.9k
    16936311U,  // AE_DBI_IP
2358
74.9k
    81943469U,  // AE_DB_IC
2359
74.9k
    81947962U,  // AE_DB_IP
2360
74.9k
    81944411U,  // AE_DIV64D32_H
2361
74.9k
    81945919U,  // AE_DIV64D32_L
2362
74.9k
    55888U, // AE_EQ16
2363
74.9k
    49834U, // AE_EQ32
2364
74.9k
    55657U, // AE_EQ64
2365
74.9k
    3221284048U,  // AE_L16M_I
2366
74.9k
    3772839029U,  // AE_L16M_IU
2367
74.9k
    62944U, // AE_L16M_X
2368
74.9k
    14737024U,  // AE_L16M_XC
2369
74.9k
    14742723U,  // AE_L16M_XU
2370
74.9k
    536929462U, // AE_L16X2M_I
2371
74.9k
    1088484441U,  // AE_L16X2M_IU
2372
74.9k
    62918U, // AE_L16X2M_X
2373
74.9k
    14736996U,  // AE_L16X2M_XC
2374
74.9k
    14742695U,  // AE_L16X2M_XU
2375
74.9k
    1610671190U,  // AE_L16X4_I
2376
74.9k
    2162224405U,  // AE_L16X4_IP
2377
74.9k
    81845463U,  // AE_L16X4_RIC
2378
74.9k
    81850053U,  // AE_L16X4_RIP
2379
74.9k
    62822U, // AE_L16X4_X
2380
74.9k
    14736892U,  // AE_L16X4_XC
2381
74.9k
    14741362U,  // AE_L16X4_XP
2382
74.9k
    3221283950U,  // AE_L16_I
2383
74.9k
    3772837167U,  // AE_L16_IP
2384
74.9k
    62846U, // AE_L16_X
2385
74.9k
    14736918U,  // AE_L16_XC
2386
74.9k
    14741388U,  // AE_L16_XP
2387
74.9k
    536929273U, // AE_L32F24_I
2388
74.9k
    1088482451U,  // AE_L32F24_IP
2389
74.9k
    62759U, // AE_L32F24_X
2390
74.9k
    14736824U,  // AE_L32F24_XC
2391
74.9k
    14741294U,  // AE_L32F24_XP
2392
74.9k
    536929440U, // AE_L32M_I
2393
74.9k
    1088484417U,  // AE_L32M_IU
2394
74.9k
    62896U, // AE_L32M_X
2395
74.9k
    14736972U,  // AE_L32M_XC
2396
74.9k
    14742671U,  // AE_L32M_XU
2397
74.9k
    1610671110U,  // AE_L32X2F24_I
2398
74.9k
    2162224323U,  // AE_L32X2F24_IP
2399
74.9k
    81845399U,  // AE_L32X2F24_RIC
2400
74.9k
    81849989U,  // AE_L32X2F24_RIP
2401
74.9k
    62772U, // AE_L32X2F24_X
2402
74.9k
    14736838U,  // AE_L32X2F24_XC
2403
74.9k
    14741308U,  // AE_L32X2F24_XP
2404
74.9k
    1610671073U,  // AE_L32X2_I
2405
74.9k
    2162224209U,  // AE_L32X2_IP
2406
74.9k
    81845292U,  // AE_L32X2_RIC
2407
74.9k
    81849882U,  // AE_L32X2_RIP
2408
74.9k
    62735U, // AE_L32X2_X
2409
74.9k
    14736798U,  // AE_L32X2_XC
2410
74.9k
    14741268U,  // AE_L32X2_XP
2411
74.9k
    536929239U, // AE_L32_I
2412
74.9k
    1088482346U,  // AE_L32_IP
2413
74.9k
    62725U, // AE_L32_X
2414
74.9k
    14736787U,  // AE_L32_XC
2415
74.9k
    14741257U,  // AE_L32_XP
2416
74.9k
    1610671140U,  // AE_L64_I
2417
74.9k
    2699095267U,  // AE_L64_IP
2418
74.9k
    62802U, // AE_L64_X
2419
74.9k
    14736870U,  // AE_L64_XC
2420
74.9k
    14741340U,  // AE_L64_XP
2421
74.9k
    81845555U,  // AE_LA16X4NEG_PC
2422
74.9k
    81845621U,  // AE_LA16X4POS_PC
2423
74.9k
    3374373777U,  // AE_LA16X4_IC
2424
74.9k
    3374378233U,  // AE_LA16X4_IP
2425
74.9k
    3374374073U,  // AE_LA16X4_RIC
2426
74.9k
    3374378663U,  // AE_LA16X4_RIP
2427
74.9k
    81845540U,  // AE_LA24NEG_PC
2428
74.9k
    81845606U,  // AE_LA24POS_PC
2429
74.9k
    81845523U,  // AE_LA24X2NEG_PC
2430
74.9k
    81845589U,  // AE_LA24X2POS_PC
2431
74.9k
    3374373703U,  // AE_LA24X2_IC
2432
74.9k
    3374378091U,  // AE_LA24X2_IP
2433
74.9k
    3374373960U,  // AE_LA24X2_RIC
2434
74.9k
    3374378550U,  // AE_LA24X2_RIP
2435
74.9k
    3374373731U,  // AE_LA24_IC
2436
74.9k
    3374378119U,  // AE_LA24_IP
2437
74.9k
    3374373990U,  // AE_LA24_RIC
2438
74.9k
    3374378580U,  // AE_LA24_RIP
2439
74.9k
    3374373743U,  // AE_LA32X2F24_IC
2440
74.9k
    3374378145U,  // AE_LA32X2F24_IP
2441
74.9k
    3374374003U,  // AE_LA32X2F24_RIC
2442
74.9k
    3374378593U,  // AE_LA32X2F24_RIP
2443
74.9k
    81845506U,  // AE_LA32X2NEG_PC
2444
74.9k
    81845572U,  // AE_LA32X2POS_PC
2445
74.9k
    3374373675U,  // AE_LA32X2_IC
2446
74.9k
    3374378037U,  // AE_LA32X2_IP
2447
74.9k
    3374373902U,  // AE_LA32X2_RIC
2448
74.9k
    3374378492U,  // AE_LA32X2_RIP
2449
74.9k
    67170032U,  // AE_LA64_PP
2450
74.9k
    1610671150U,  // AE_LALIGN64_I
2451
74.9k
    67164923U,  // AE_LB
2452
74.9k
    21030156U,  // AE_LBI
2453
74.9k
    58679U, // AE_LBK
2454
74.9k
    3758155036U,  // AE_LBKI
2455
74.9k
    67171066U,  // AE_LBS
2456
74.9k
    21030181U,  // AE_LBSI
2457
74.9k
    55868U, // AE_LE16
2458
74.9k
    49772U, // AE_LE32
2459
74.9k
    55571U, // AE_LE64
2460
74.9k
    55897U, // AE_LT16
2461
74.9k
    49897U, // AE_LT32
2462
74.9k
    55709U, // AE_LT64
2463
74.9k
    49917U, // AE_MAX32
2464
74.9k
    55729U, // AE_MAX64
2465
74.9k
    61747U, // AE_MAXABS32S
2466
74.9k
    61972U, // AE_MAXABS64S
2467
74.9k
    49824U, // AE_MIN32
2468
74.9k
    55647U, // AE_MIN64
2469
74.9k
    61733U, // AE_MINABS32S
2470
74.9k
    61958U, // AE_MINABS64S
2471
74.9k
    67171535U,  // AE_MOV
2472
74.9k
    67156701U,  // AE_MOVAD16_0
2473
74.9k
    67157689U,  // AE_MOVAD16_1
2474
74.9k
    67158151U,  // AE_MOVAD16_2
2475
74.9k
    67163910U,  // AE_MOVAD16_3
2476
74.9k
    67166058U,  // AE_MOVAD32_H
2477
74.9k
    67167566U,  // AE_MOVAD32_L
2478
74.9k
    67169101U,  // AE_MOVALIGN
2479
74.9k
    67164700U,  // AE_MOVDA16
2480
74.9k
    55032U, // AE_MOVDA16X2
2481
74.9k
    67158557U,  // AE_MOVDA32
2482
74.9k
    54910U, // AE_MOVDA32X2
2483
74.9k
    14834141U,  // AE_MOVF16X4
2484
74.9k
    14833292U,  // AE_MOVF32X2
2485
74.9k
    14833948U,  // AE_MOVF64
2486
74.9k
    23127342U,  // AE_MOVI
2487
74.9k
    14834191U,  // AE_MOVT16X4
2488
74.9k
    14833346U,  // AE_MOVT32X2
2489
74.9k
    14834086U,  // AE_MOVT64
2490
74.9k
    55786U, // AE_MUL16X4
2491
74.9k
    59868U, // AE_MUL32U_LL
2492
74.9k
    48289U, // AE_MUL32X16_H0
2493
74.9k
    50765U, // AE_MUL32X16_H0_S2
2494
74.9k
    49059U, // AE_MUL32X16_H1
2495
74.9k
    51423U, // AE_MUL32X16_H1_S2
2496
74.9k
    50006U, // AE_MUL32X16_H2
2497
74.9k
    51973U, // AE_MUL32X16_H2_S2
2498
74.9k
    55180U, // AE_MUL32X16_H3
2499
74.9k
    52681U, // AE_MUL32X16_H3_S2
2500
74.9k
    48760U, // AE_MUL32X16_L0
2501
74.9k
    51302U, // AE_MUL32X16_L0_S2
2502
74.9k
    49254U, // AE_MUL32X16_L1
2503
74.9k
    51648U, // AE_MUL32X16_L1_S2
2504
74.9k
    50477U, // AE_MUL32X16_L2
2505
74.9k
    52510U, // AE_MUL32X16_L2_S2
2506
74.9k
    55375U, // AE_MUL32X16_L3
2507
74.9k
    52906U, // AE_MUL32X16_L3_S2
2508
74.9k
    57575U, // AE_MUL32_HH
2509
74.9k
    57824U, // AE_MUL32_LH
2510
74.9k
    59298U, // AE_MUL32_LL
2511
74.9k
    54303U, // AE_MUL32_LL_S2
2512
74.9k
    25352656U,  // AE_MULA16X4
2513
74.9k
    14838221U,  // AE_MULA32U_LL
2514
74.9k
    14826587U,  // AE_MULA32X16_H0
2515
74.9k
    14829051U,  // AE_MULA32X16_H0_S2
2516
74.9k
    14827357U,  // AE_MULA32X16_H1
2517
74.9k
    14829709U,  // AE_MULA32X16_H1_S2
2518
74.9k
    14828304U,  // AE_MULA32X16_H2
2519
74.9k
    14830259U,  // AE_MULA32X16_H2_S2
2520
74.9k
    14833478U,  // AE_MULA32X16_H3
2521
74.9k
    14830967U,  // AE_MULA32X16_H3_S2
2522
74.9k
    14827058U,  // AE_MULA32X16_L0
2523
74.9k
    14829588U,  // AE_MULA32X16_L0_S2
2524
74.9k
    14827552U,  // AE_MULA32X16_L1
2525
74.9k
    14829934U,  // AE_MULA32X16_L1_S2
2526
74.9k
    14828775U,  // AE_MULA32X16_L2
2527
74.9k
    14830796U,  // AE_MULA32X16_L2_S2
2528
74.9k
    14833673U,  // AE_MULA32X16_L3
2529
74.9k
    14831192U,  // AE_MULA32X16_L3_S2
2530
74.9k
    14835929U,  // AE_MULA32_HH
2531
74.9k
    14836178U,  // AE_MULA32_LH
2532
74.9k
    14837652U,  // AE_MULA32_LL
2533
74.9k
    14832654U,  // AE_MULA32_LL_S2
2534
74.9k
    14837693U,  // AE_MULAAD24_HH_LL
2535
74.9k
    14832687U,  // AE_MULAAD24_HH_LL_S2
2536
74.9k
    14836219U,  // AE_MULAAD24_HL_LH
2537
74.9k
    14831736U,  // AE_MULAAD24_HL_LH_S2
2538
74.9k
    14827460U,  // AE_MULAAD32X16_H0_L1
2539
74.9k
    14829830U,  // AE_MULAAD32X16_H0_L1_S2
2540
74.9k
    14826690U,  // AE_MULAAD32X16_H1_L0
2541
74.9k
    14829172U,  // AE_MULAAD32X16_H1_L0_S2
2542
74.9k
    14833581U,  // AE_MULAAD32X16_H2_L3
2543
74.9k
    14831088U,  // AE_MULAAD32X16_H2_L3_S2
2544
74.9k
    14828407U,  // AE_MULAAD32X16_H3_L2
2545
74.9k
    14830380U,  // AE_MULAAD32X16_H3_L2_S2
2546
74.9k
    14826282U,  // AE_MULAAFD16SS_11_00
2547
74.9k
    14828949U,  // AE_MULAAFD16SS_11_00_S2
2548
74.9k
    14827669U,  // AE_MULAAFD16SS_13_02
2549
74.9k
    14830055U,  // AE_MULAAFD16SS_13_02_S2
2550
74.9k
    14827809U,  // AE_MULAAFD16SS_33_22
2551
74.9k
    14830157U,  // AE_MULAAFD16SS_33_22_S2
2552
74.9k
    14837771U,  // AE_MULAAFD24_HH_LL
2553
74.9k
    14832777U,  // AE_MULAAFD24_HH_LL_S2
2554
74.9k
    14836258U,  // AE_MULAAFD24_HL_LH
2555
74.9k
    14831781U,  // AE_MULAAFD24_HL_LH_S2
2556
74.9k
    14827505U,  // AE_MULAAFD32X16_H0_L1
2557
74.9k
    14829881U,  // AE_MULAAFD32X16_H0_L1_S2
2558
74.9k
    14826780U,  // AE_MULAAFD32X16_H1_L0
2559
74.9k
    14829274U,  // AE_MULAAFD32X16_H1_L0_S2
2560
74.9k
    14833626U,  // AE_MULAAFD32X16_H2_L3
2561
74.9k
    14831139U,  // AE_MULAAFD32X16_H2_L3_S2
2562
74.9k
    14828497U,  // AE_MULAAFD32X16_H3_L2
2563
74.9k
    14830482U,  // AE_MULAAFD32X16_H3_L2_S2
2564
74.9k
    14833776U,  // AE_MULAC24
2565
74.9k
    14835647U,  // AE_MULAC32X16_H
2566
74.9k
    14837153U,  // AE_MULAC32X16_L
2567
74.9k
    14826232U,  // AE_MULAF16SS_00
2568
74.9k
    14828890U,  // AE_MULAF16SS_00_S2
2569
74.9k
    14826409U,  // AE_MULAF16SS_10
2570
74.9k
    14827207U,  // AE_MULAF16SS_11
2571
74.9k
    14826459U,  // AE_MULAF16SS_20
2572
74.9k
    14827257U,  // AE_MULAF16SS_21
2573
74.9k
    14827759U,  // AE_MULAF16SS_22
2574
74.9k
    14826509U,  // AE_MULAF16SS_30
2575
74.9k
    14827307U,  // AE_MULAF16SS_31
2576
74.9k
    14827936U,  // AE_MULAF16SS_32
2577
74.9k
    14833428U,  // AE_MULAF16SS_33
2578
74.9k
    25359182U,  // AE_MULAF16X4SS
2579
74.9k
    14835970U,  // AE_MULAF32R_HH
2580
74.9k
    14836459U,  // AE_MULAF32R_LH
2581
74.9k
    14838013U,  // AE_MULAF32R_LL
2582
74.9k
    14833055U,  // AE_MULAF32R_LL_S2
2583
74.9k
    14836066U,  // AE_MULAF32S_HH
2584
74.9k
    14836555U,  // AE_MULAF32S_LH
2585
74.9k
    14838109U,  // AE_MULAF32S_LL
2586
74.9k
    14833111U,  // AE_MULAF32S_LL_S2
2587
74.9k
    14826604U,  // AE_MULAF32X16_H0
2588
74.9k
    14829071U,  // AE_MULAF32X16_H0_S2
2589
74.9k
    14827374U,  // AE_MULAF32X16_H1
2590
74.9k
    14829729U,  // AE_MULAF32X16_H1_S2
2591
74.9k
    14828321U,  // AE_MULAF32X16_H2
2592
74.9k
    14830279U,  // AE_MULAF32X16_H2_S2
2593
74.9k
    14833495U,  // AE_MULAF32X16_H3
2594
74.9k
    14830987U,  // AE_MULAF32X16_H3_S2
2595
74.9k
    14827075U,  // AE_MULAF32X16_L0
2596
74.9k
    14829608U,  // AE_MULAF32X16_L0_S2
2597
74.9k
    14827569U,  // AE_MULAF32X16_L1
2598
74.9k
    14829954U,  // AE_MULAF32X16_L1_S2
2599
74.9k
    14828792U,  // AE_MULAF32X16_L2
2600
74.9k
    14830816U,  // AE_MULAF32X16_L2_S2
2601
74.9k
    14833690U,  // AE_MULAF32X16_L3
2602
74.9k
    14831212U,  // AE_MULAF32X16_L3_S2
2603
74.9k
    14837299U,  // AE_MULAF48Q32SP16S_L
2604
74.9k
    14832225U,  // AE_MULAF48Q32SP16S_L_S2
2605
74.9k
    14837538U,  // AE_MULAF48Q32SP16U_L
2606
74.9k
    14832515U,  // AE_MULAF48Q32SP16U_L_S2
2607
74.9k
    14834391U,  // AE_MULAFC24RA
2608
74.9k
    14835823U,  // AE_MULAFC32X16RAS_H
2609
74.9k
    14837432U,  // AE_MULAFC32X16RAS_L
2610
74.9k
    25354208U,  // AE_MULAFD24X2_FIR_H
2611
74.9k
    25355714U,  // AE_MULAFD24X2_FIR_L
2612
74.9k
    25354545U,  // AE_MULAFD32X16X2_FIR_HH
2613
74.9k
    25356131U,  // AE_MULAFD32X16X2_FIR_HL
2614
74.9k
    25355034U,  // AE_MULAFD32X16X2_FIR_LH
2615
74.9k
    25356588U,  // AE_MULAFD32X16X2_FIR_LL
2616
74.9k
    14839776U,  // AE_MULAFP24X2R
2617
74.9k
    14834341U,  // AE_MULAFP24X2RA
2618
74.9k
    14831313U,  // AE_MULAFP24X2RA_S2
2619
74.9k
    14833222U,  // AE_MULAFP24X2R_S2
2620
74.9k
    14835755U,  // AE_MULAFP32X16X2RAS_H
2621
74.9k
    14831511U,  // AE_MULAFP32X16X2RAS_H_S2
2622
74.9k
    14837364U,  // AE_MULAFP32X16X2RAS_L
2623
74.9k
    14832364U,  // AE_MULAFP32X16X2RAS_L_S2
2624
74.9k
    14835864U,  // AE_MULAFP32X16X2RS_H
2625
74.9k
    14831588U,  // AE_MULAFP32X16X2RS_H_S2
2626
74.9k
    14837473U,  // AE_MULAFP32X16X2RS_L
2627
74.9k
    14832441U,  // AE_MULAFP32X16X2RS_L_S2
2628
74.9k
    14840500U,  // AE_MULAFP32X2RAS
2629
74.9k
    14840591U,  // AE_MULAFP32X2RS
2630
74.9k
    14831372U,  // AE_MULAFQ32SP24S_H_S2
2631
74.9k
    14832086U,  // AE_MULAFQ32SP24S_L_S2
2632
74.9k
    14833359U,  // AE_MULAP24X2
2633
74.9k
    14830917U,  // AE_MULAP24X2_S2
2634
74.9k
    14835591U,  // AE_MULAP32X16X2_H
2635
74.9k
    14837097U,  // AE_MULAP32X16X2_L
2636
74.9k
    14833305U,  // AE_MULAP32X2
2637
74.9k
    14832299U,  // AE_MULAQ32SP16S_L_S2
2638
74.9k
    14832589U,  // AE_MULAQ32SP16U_L_S2
2639
74.9k
    14831417U,  // AE_MULARFQ32SP24S_H_S2
2640
74.9k
    14832131U,  // AE_MULARFQ32SP24S_L_S2
2641
74.9k
    14836113U,  // AE_MULAS32F48P16S_HH
2642
74.9k
    14831662U,  // AE_MULAS32F48P16S_HH_S2
2643
74.9k
    14836602U,  // AE_MULAS32F48P16S_LH
2644
74.9k
    14832012U,  // AE_MULAS32F48P16S_LH_S2
2645
74.9k
    14838156U,  // AE_MULAS32F48P16S_LL
2646
74.9k
    14833148U,  // AE_MULAS32F48P16S_LL_S2
2647
74.9k
    14837935U,  // AE_MULASD24_HH_LL
2648
74.9k
    14832965U,  // AE_MULASD24_HH_LL_S2
2649
74.9k
    14836381U,  // AE_MULASD24_HL_LH
2650
74.9k
    14831922U,  // AE_MULASD24_HL_LH_S2
2651
74.9k
    14826968U,  // AE_MULASD32X16_H1_L0
2652
74.9k
    14829486U,  // AE_MULASD32X16_H1_L0_S2
2653
74.9k
    14828685U,  // AE_MULASD32X16_H3_L2
2654
74.9k
    14830694U,  // AE_MULASD32X16_H3_L2_S2
2655
74.9k
    14837853U,  // AE_MULASFD24_HH_LL
2656
74.9k
    14832871U,  // AE_MULASFD24_HH_LL_S2
2657
74.9k
    14836299U,  // AE_MULASFD24_HL_LH
2658
74.9k
    14831828U,  // AE_MULASFD24_HL_LH_S2
2659
74.9k
    14826874U,  // AE_MULASFD32X16_H1_L0
2660
74.9k
    14829380U,  // AE_MULASFD32X16_H1_L0_S2
2661
74.9k
    14828591U,  // AE_MULASFD32X16_H3_L2
2662
74.9k
    14830588U,  // AE_MULASFD32X16_H3_L2_S2
2663
74.9k
    55420U, // AE_MULC24
2664
74.9k
    57296U, // AE_MULC32X16_H
2665
74.9k
    58802U, // AE_MULC32X16_L
2666
74.9k
    47881U, // AE_MULF16SS_00
2667
74.9k
    50542U, // AE_MULF16SS_00_S2
2668
74.9k
    48058U, // AE_MULF16SS_10
2669
74.9k
    48856U, // AE_MULF16SS_11
2670
74.9k
    48108U, // AE_MULF16SS_20
2671
74.9k
    48906U, // AE_MULF16SS_21
2672
74.9k
    49408U, // AE_MULF16SS_22
2673
74.9k
    48158U, // AE_MULF16SS_30
2674
74.9k
    48956U, // AE_MULF16SS_31
2675
74.9k
    49585U, // AE_MULF16SS_32
2676
74.9k
    55077U, // AE_MULF16SS_33
2677
74.9k
    62302U, // AE_MULF16X4SS
2678
74.9k
    57618U, // AE_MULF32R_HH
2679
74.9k
    58107U, // AE_MULF32R_LH
2680
74.9k
    59661U, // AE_MULF32R_LL
2681
74.9k
    54706U, // AE_MULF32R_LL_S2
2682
74.9k
    57714U, // AE_MULF32S_HH
2683
74.9k
    58203U, // AE_MULF32S_LH
2684
74.9k
    59757U, // AE_MULF32S_LL
2685
74.9k
    54762U, // AE_MULF32S_LL_S2
2686
74.9k
    48254U, // AE_MULF32X16_H0
2687
74.9k
    50724U, // AE_MULF32X16_H0_S2
2688
74.9k
    49024U, // AE_MULF32X16_H1
2689
74.9k
    51382U, // AE_MULF32X16_H1_S2
2690
74.9k
    49971U, // AE_MULF32X16_H2
2691
74.9k
    51932U, // AE_MULF32X16_H2_S2
2692
74.9k
    55145U, // AE_MULF32X16_H3
2693
74.9k
    52640U, // AE_MULF32X16_H3_S2
2694
74.9k
    48725U, // AE_MULF32X16_L0
2695
74.9k
    51261U, // AE_MULF32X16_L0_S2
2696
74.9k
    49219U, // AE_MULF32X16_L1
2697
74.9k
    51607U, // AE_MULF32X16_L1_S2
2698
74.9k
    50442U, // AE_MULF32X16_L2
2699
74.9k
    52469U, // AE_MULF32X16_L2_S2
2700
74.9k
    55340U, // AE_MULF32X16_L3
2701
74.9k
    52865U, // AE_MULF32X16_L3_S2
2702
74.9k
    58953U, // AE_MULF48Q32SP16S_L
2703
74.9k
    53882U, // AE_MULF48Q32SP16S_L_S2
2704
74.9k
    59192U, // AE_MULF48Q32SP16U_L
2705
74.9k
    54172U, // AE_MULF48Q32SP16U_L_S2
2706
74.9k
    56038U, // AE_MULFC24RA
2707
74.9k
    57476U, // AE_MULFC32X16RAS_H
2708
74.9k
    59085U, // AE_MULFC32X16RAS_L
2709
74.9k
    57333U, // AE_MULFD24X2_FIR_H
2710
74.9k
    58839U, // AE_MULFD24X2_FIR_L
2711
74.9k
    57674U, // AE_MULFD32X16X2_FIR_HH
2712
74.9k
    59260U, // AE_MULFD32X16X2_FIR_HL
2713
74.9k
    58163U, // AE_MULFD32X16X2_FIR_LH
2714
74.9k
    59717U, // AE_MULFD32X16X2_FIR_LL
2715
74.9k
    62185U, // AE_MULFP16X4RAS
2716
74.9k
    61986U, // AE_MULFP16X4S
2717
74.9k
    61424U, // AE_MULFP24X2R
2718
74.9k
    55990U, // AE_MULFP24X2RA
2719
74.9k
    52965U, // AE_MULFP24X2RA_S2
2720
74.9k
    54873U, // AE_MULFP24X2R_S2
2721
74.9k
    57410U, // AE_MULFP32X16X2RAS_H
2722
74.9k
    53169U, // AE_MULFP32X16X2RAS_H_S2
2723
74.9k
    59019U, // AE_MULFP32X16X2RAS_L
2724
74.9k
    54022U, // AE_MULFP32X16X2RAS_L_S2
2725
74.9k
    57518U, // AE_MULFP32X16X2RS_H
2726
74.9k
    53245U, // AE_MULFP32X16X2RS_H_S2
2727
74.9k
    59127U, // AE_MULFP32X16X2RS_L
2728
74.9k
    54098U, // AE_MULFP32X16X2RS_L_S2
2729
74.9k
    62150U, // AE_MULFP32X2RAS
2730
74.9k
    62240U, // AE_MULFP32X2RS
2731
74.9k
    53027U, // AE_MULFQ32SP24S_H_S2
2732
74.9k
    53741U, // AE_MULFQ32SP24S_L_S2
2733
74.9k
    55005U, // AE_MULP24X2
2734
74.9k
    52566U, // AE_MULP24X2_S2
2735
74.9k
    57242U, // AE_MULP32X16X2_H
2736
74.9k
    58748U, // AE_MULP32X16X2_L
2737
74.9k
    54951U, // AE_MULP32X2
2738
74.9k
    53953U, // AE_MULQ32SP16S_L_S2
2739
74.9k
    54243U, // AE_MULQ32SP16U_L_S2
2740
74.9k
    53073U, // AE_MULRFQ32SP24S_H_S2
2741
74.9k
    53787U, // AE_MULRFQ32SP24S_L_S2
2742
74.9k
    25352694U,  // AE_MULS16X4
2743
74.9k
    57767U, // AE_MULS32F48P16S_HH
2744
74.9k
    53319U, // AE_MULS32F48P16S_HH_S2
2745
74.9k
    58256U, // AE_MULS32F48P16S_LH
2746
74.9k
    53669U, // AE_MULS32F48P16S_LH_S2
2747
74.9k
    59810U, // AE_MULS32F48P16S_LL
2748
74.9k
    54805U, // AE_MULS32F48P16S_LL_S2
2749
74.9k
    14838250U,  // AE_MULS32U_LL
2750
74.9k
    14826673U,  // AE_MULS32X16_H0
2751
74.9k
    14829152U,  // AE_MULS32X16_H0_S2
2752
74.9k
    14827443U,  // AE_MULS32X16_H1
2753
74.9k
    14829810U,  // AE_MULS32X16_H1_S2
2754
74.9k
    14828390U,  // AE_MULS32X16_H2
2755
74.9k
    14830360U,  // AE_MULS32X16_H2_S2
2756
74.9k
    14833564U,  // AE_MULS32X16_H3
2757
74.9k
    14831068U,  // AE_MULS32X16_H3_S2
2758
74.9k
    14827144U,  // AE_MULS32X16_L0
2759
74.9k
    14829689U,  // AE_MULS32X16_L0_S2
2760
74.9k
    14827638U,  // AE_MULS32X16_L1
2761
74.9k
    14830035U,  // AE_MULS32X16_L1_S2
2762
74.9k
    14828861U,  // AE_MULS32X16_L2
2763
74.9k
    14830897U,  // AE_MULS32X16_L2_S2
2764
74.9k
    14833759U,  // AE_MULS32X16_L3
2765
74.9k
    14831293U,  // AE_MULS32X16_L3_S2
2766
74.9k
    14835956U,  // AE_MULS32_HH
2767
74.9k
    14836205U,  // AE_MULS32_LH
2768
74.9k
    14837679U,  // AE_MULS32_LL
2769
74.9k
    14837732U,  // AE_MULSAD24_HH_LL
2770
74.9k
    14832732U,  // AE_MULSAD24_HH_LL_S2
2771
74.9k
    14826735U,  // AE_MULSAD32X16_H1_L0
2772
74.9k
    14829223U,  // AE_MULSAD32X16_H1_L0_S2
2773
74.9k
    14828452U,  // AE_MULSAD32X16_H3_L2
2774
74.9k
    14830431U,  // AE_MULSAD32X16_H3_L2_S2
2775
74.9k
    14837812U,  // AE_MULSAFD24_HH_LL
2776
74.9k
    14832824U,  // AE_MULSAFD24_HH_LL_S2
2777
74.9k
    14826827U,  // AE_MULSAFD32X16_H1_L0
2778
74.9k
    14829327U,  // AE_MULSAFD32X16_H1_L0_S2
2779
74.9k
    14828544U,  // AE_MULSAFD32X16_H3_L2
2780
74.9k
    14830535U,  // AE_MULSAFD32X16_H3_L2_S2
2781
74.9k
    14826265U,  // AE_MULSF16SS_00
2782
74.9k
    14828929U,  // AE_MULSF16SS_00_S2
2783
74.9k
    14826442U,  // AE_MULSF16SS_10
2784
74.9k
    14827240U,  // AE_MULSF16SS_11
2785
74.9k
    14826492U,  // AE_MULSF16SS_20
2786
74.9k
    14827290U,  // AE_MULSF16SS_21
2787
74.9k
    14827792U,  // AE_MULSF16SS_22
2788
74.9k
    14826542U,  // AE_MULSF16SS_30
2789
74.9k
    14827340U,  // AE_MULSF16SS_31
2790
74.9k
    14827969U,  // AE_MULSF16SS_32
2791
74.9k
    14833461U,  // AE_MULSF16SS_33
2792
74.9k
    25359213U,  // AE_MULSF16X4SS
2793
74.9k
    14836001U,  // AE_MULSF32R_HH
2794
74.9k
    14836490U,  // AE_MULSF32R_LH
2795
74.9k
    14838044U,  // AE_MULSF32R_LL
2796
74.9k
    14833092U,  // AE_MULSF32R_LL_S2
2797
74.9k
    14836097U,  // AE_MULSF32S_HH
2798
74.9k
    14836586U,  // AE_MULSF32S_LH
2799
74.9k
    14838140U,  // AE_MULSF32S_LL
2800
74.9k
    14826639U,  // AE_MULSF32X16_H0
2801
74.9k
    14829112U,  // AE_MULSF32X16_H0_S2
2802
74.9k
    14827409U,  // AE_MULSF32X16_H1
2803
74.9k
    14829770U,  // AE_MULSF32X16_H1_S2
2804
74.9k
    14828356U,  // AE_MULSF32X16_H2
2805
74.9k
    14830320U,  // AE_MULSF32X16_H2_S2
2806
74.9k
    14833530U,  // AE_MULSF32X16_H3
2807
74.9k
    14831028U,  // AE_MULSF32X16_H3_S2
2808
74.9k
    14827110U,  // AE_MULSF32X16_L0
2809
74.9k
    14829649U,  // AE_MULSF32X16_L0_S2
2810
74.9k
    14827604U,  // AE_MULSF32X16_L1
2811
74.9k
    14829995U,  // AE_MULSF32X16_L1_S2
2812
74.9k
    14828827U,  // AE_MULSF32X16_L2
2813
74.9k
    14830857U,  // AE_MULSF32X16_L2_S2
2814
74.9k
    14833725U,  // AE_MULSF32X16_L3
2815
74.9k
    14831253U,  // AE_MULSF32X16_L3_S2
2816
74.9k
    14837342U,  // AE_MULSF48Q32SP16S_L
2817
74.9k
    14832274U,  // AE_MULSF48Q32SP16S_L_S2
2818
74.9k
    14837581U,  // AE_MULSF48Q32SP16U_L
2819
74.9k
    14832564U,  // AE_MULSF48Q32SP16U_L_S2
2820
74.9k
    14839807U,  // AE_MULSFP24X2R
2821
74.9k
    14834374U,  // AE_MULSFP24X2RA
2822
74.9k
    14831352U,  // AE_MULSFP24X2RA_S2
2823
74.9k
    14833259U,  // AE_MULSFP24X2R_S2
2824
74.9k
    14835800U,  // AE_MULSFP32X16X2RAS_H
2825
74.9k
    14831562U,  // AE_MULSFP32X16X2RAS_H_S2
2826
74.9k
    14837409U,  // AE_MULSFP32X16X2RAS_L
2827
74.9k
    14832415U,  // AE_MULSFP32X16X2RAS_L_S2
2828
74.9k
    14835907U,  // AE_MULSFP32X16X2RS_H
2829
74.9k
    14831637U,  // AE_MULSFP32X16X2RS_H_S2
2830
74.9k
    14837516U,  // AE_MULSFP32X16X2RS_L
2831
74.9k
    14832490U,  // AE_MULSFP32X16X2RS_L_S2
2832
74.9k
    14840535U,  // AE_MULSFP32X2RAS
2833
74.9k
    14840624U,  // AE_MULSFP32X2RS
2834
74.9k
    14831488U,  // AE_MULSFQ32SP24S_H_S2
2835
74.9k
    14832202U,  // AE_MULSFQ32SP24S_L_S2
2836
74.9k
    14833386U,  // AE_MULSP24X2
2837
74.9k
    14830950U,  // AE_MULSP24X2_S2
2838
74.9k
    14835628U,  // AE_MULSP32X16X2_H
2839
74.9k
    14837134U,  // AE_MULSP32X16X2_L
2840
74.9k
    14833332U,  // AE_MULSP32X2
2841
74.9k
    14832342U,  // AE_MULSQ32SP16S_L_S2
2842
74.9k
    14832632U,  // AE_MULSQ32SP16U_L_S2
2843
74.9k
    14831464U,  // AE_MULSRFQ32SP24S_H_S2
2844
74.9k
    14832178U,  // AE_MULSRFQ32SP24S_L_S2
2845
74.9k
    14836156U,  // AE_MULSS32F48P16S_HH
2846
74.9k
    14831711U,  // AE_MULSS32F48P16S_HH_S2
2847
74.9k
    14836645U,  // AE_MULSS32F48P16S_LH
2848
74.9k
    14832061U,  // AE_MULSS32F48P16S_LH_S2
2849
74.9k
    14838199U,  // AE_MULSS32F48P16S_LL
2850
74.9k
    14833197U,  // AE_MULSS32F48P16S_LL_S2
2851
74.9k
    14837974U,  // AE_MULSSD24_HH_LL
2852
74.9k
    14833010U,  // AE_MULSSD24_HH_LL_S2
2853
74.9k
    14836420U,  // AE_MULSSD24_HL_LH
2854
74.9k
    14831967U,  // AE_MULSSD24_HL_LH_S2
2855
74.9k
    14827013U,  // AE_MULSSD32X16_H1_L0
2856
74.9k
    14829537U,  // AE_MULSSD32X16_H1_L0_S2
2857
74.9k
    14828730U,  // AE_MULSSD32X16_H3_L2
2858
74.9k
    14830745U,  // AE_MULSSD32X16_H3_L2_S2
2859
74.9k
    14826327U,  // AE_MULSSFD16SS_11_00
2860
74.9k
    14829000U,  // AE_MULSSFD16SS_11_00_S2
2861
74.9k
    14827714U,  // AE_MULSSFD16SS_13_02
2862
74.9k
    14830106U,  // AE_MULSSFD16SS_13_02_S2
2863
74.9k
    14827854U,  // AE_MULSSFD16SS_33_22
2864
74.9k
    14830208U,  // AE_MULSSFD16SS_33_22_S2
2865
74.9k
    14837894U,  // AE_MULSSFD24_HH_LL
2866
74.9k
    14832918U,  // AE_MULSSFD24_HH_LL_S2
2867
74.9k
    14836340U,  // AE_MULSSFD24_HL_LH
2868
74.9k
    14831875U,  // AE_MULSSFD24_HL_LH_S2
2869
74.9k
    14826921U,  // AE_MULSSFD32X16_H1_L0
2870
74.9k
    14829433U,  // AE_MULSSFD32X16_H1_L0_S2
2871
74.9k
    14828638U,  // AE_MULSSFD32X16_H3_L2
2872
74.9k
    14830641U,  // AE_MULSSFD32X16_H3_L2_S2
2873
74.9k
    59344U, // AE_MULZAAD24_HH_LL
2874
74.9k
    54341U, // AE_MULZAAD24_HH_LL_S2
2875
74.9k
    57870U, // AE_MULZAAD24_HL_LH
2876
74.9k
    53390U, // AE_MULZAAD24_HL_LH_S2
2877
74.9k
    49114U, // AE_MULZAAD32X16_H0_L1
2878
74.9k
    51487U, // AE_MULZAAD32X16_H0_L1_S2
2879
74.9k
    48344U, // AE_MULZAAD32X16_H1_L0
2880
74.9k
    50829U, // AE_MULZAAD32X16_H1_L0_S2
2881
74.9k
    55235U, // AE_MULZAAD32X16_H2_L3
2882
74.9k
    52745U, // AE_MULZAAD32X16_H2_L3_S2
2883
74.9k
    50061U, // AE_MULZAAD32X16_H3_L2
2884
74.9k
    52037U, // AE_MULZAAD32X16_H3_L2_S2
2885
74.9k
    47936U, // AE_MULZAAFD16SS_11_00
2886
74.9k
    50606U, // AE_MULZAAFD16SS_11_00_S2
2887
74.9k
    49323U, // AE_MULZAAFD16SS_13_02
2888
74.9k
    51712U, // AE_MULZAAFD16SS_13_02_S2
2889
74.9k
    49463U, // AE_MULZAAFD16SS_33_22
2890
74.9k
    51814U, // AE_MULZAAFD16SS_33_22_S2
2891
74.9k
    59423U, // AE_MULZAAFD24_HH_LL
2892
74.9k
    54432U, // AE_MULZAAFD24_HH_LL_S2
2893
74.9k
    57910U, // AE_MULZAAFD24_HL_LH
2894
74.9k
    53436U, // AE_MULZAAFD24_HL_LH_S2
2895
74.9k
    49160U, // AE_MULZAAFD32X16_H0_L1
2896
74.9k
    51539U, // AE_MULZAAFD32X16_H0_L1_S2
2897
74.9k
    48435U, // AE_MULZAAFD32X16_H1_L0
2898
74.9k
    50932U, // AE_MULZAAFD32X16_H1_L0_S2
2899
74.9k
    55281U, // AE_MULZAAFD32X16_H2_L3
2900
74.9k
    52797U, // AE_MULZAAFD32X16_H2_L3_S2
2901
74.9k
    50152U, // AE_MULZAAFD32X16_H3_L2
2902
74.9k
    52140U, // AE_MULZAAFD32X16_H3_L2_S2
2903
74.9k
    59586U, // AE_MULZASD24_HH_LL
2904
74.9k
    54619U, // AE_MULZASD24_HH_LL_S2
2905
74.9k
    58032U, // AE_MULZASD24_HL_LH
2906
74.9k
    53576U, // AE_MULZASD24_HL_LH_S2
2907
74.9k
    48622U, // AE_MULZASD32X16_H1_L0
2908
74.9k
    51143U, // AE_MULZASD32X16_H1_L0_S2
2909
74.9k
    50339U, // AE_MULZASD32X16_H3_L2
2910
74.9k
    52351U, // AE_MULZASD32X16_H3_L2_S2
2911
74.9k
    59505U, // AE_MULZASFD24_HH_LL
2912
74.9k
    54526U, // AE_MULZASFD24_HH_LL_S2
2913
74.9k
    57951U, // AE_MULZASFD24_HL_LH
2914
74.9k
    53483U, // AE_MULZASFD24_HL_LH_S2
2915
74.9k
    48529U, // AE_MULZASFD32X16_H1_L0
2916
74.9k
    51038U, // AE_MULZASFD32X16_H1_L0_S2
2917
74.9k
    50246U, // AE_MULZASFD32X16_H3_L2
2918
74.9k
    52246U, // AE_MULZASFD32X16_H3_L2_S2
2919
74.9k
    59383U, // AE_MULZSAD24_HH_LL
2920
74.9k
    54386U, // AE_MULZSAD24_HH_LL_S2
2921
74.9k
    48389U, // AE_MULZSAD32X16_H1_L0
2922
74.9k
    50880U, // AE_MULZSAD32X16_H1_L0_S2
2923
74.9k
    50106U, // AE_MULZSAD32X16_H3_L2
2924
74.9k
    52088U, // AE_MULZSAD32X16_H3_L2_S2
2925
74.9k
    59464U, // AE_MULZSAFD24_HH_LL
2926
74.9k
    54479U, // AE_MULZSAFD24_HH_LL_S2
2927
74.9k
    48482U, // AE_MULZSAFD32X16_H1_L0
2928
74.9k
    50985U, // AE_MULZSAFD32X16_H1_L0_S2
2929
74.9k
    50199U, // AE_MULZSAFD32X16_H3_L2
2930
74.9k
    52193U, // AE_MULZSAFD32X16_H3_L2_S2
2931
74.9k
    59625U, // AE_MULZSSD24_HH_LL
2932
74.9k
    54664U, // AE_MULZSSD24_HH_LL_S2
2933
74.9k
    58071U, // AE_MULZSSD24_HL_LH
2934
74.9k
    53621U, // AE_MULZSSD24_HL_LH_S2
2935
74.9k
    48667U, // AE_MULZSSD32X16_H1_L0
2936
74.9k
    51194U, // AE_MULZSSD32X16_H1_L0_S2
2937
74.9k
    50384U, // AE_MULZSSD32X16_H3_L2
2938
74.9k
    52402U, // AE_MULZSSD32X16_H3_L2_S2
2939
74.9k
    47981U, // AE_MULZSSFD16SS_11_00
2940
74.9k
    50657U, // AE_MULZSSFD16SS_11_00_S2
2941
74.9k
    49368U, // AE_MULZSSFD16SS_13_02
2942
74.9k
    51763U, // AE_MULZSSFD16SS_13_02_S2
2943
74.9k
    49508U, // AE_MULZSSFD16SS_33_22
2944
74.9k
    51865U, // AE_MULZSSFD16SS_33_22_S2
2945
74.9k
    59546U, // AE_MULZSSFD24_HH_LL
2946
74.9k
    54573U, // AE_MULZSSFD24_HH_LL_S2
2947
74.9k
    57992U, // AE_MULZSSFD24_HL_LH
2948
74.9k
    53530U, // AE_MULZSSFD24_HL_LH_S2
2949
74.9k
    48576U, // AE_MULZSSFD32X16_H1_L0
2950
74.9k
    51091U, // AE_MULZSSFD32X16_H1_L0_S2
2951
74.9k
    50293U, // AE_MULZSSFD32X16_H3_L2
2952
74.9k
    52299U, // AE_MULZSSFD32X16_H3_L2_S2
2953
74.9k
    57078U, // AE_NAND
2954
74.9k
    67170911U,  // AE_NEG16S
2955
74.9k
    67170647U,  // AE_NEG24S
2956
74.9k
    67158645U,  // AE_NEG32
2957
74.9k
    67170551U,  // AE_NEG32S
2958
74.9k
    67164455U,  // AE_NEG64
2959
74.9k
    67170776U,  // AE_NEG64S
2960
74.9k
    67164405U,  // AE_NSA64
2961
74.9k
    67156715U,  // AE_NSAZ16_0
2962
74.9k
    67167580U,  // AE_NSAZ32_L
2963
74.9k
    61553U, // AE_OR
2964
74.9k
    551704744U, // AE_PKSR24
2965
74.9k
    551699123U, // AE_PKSR32
2966
74.9k
    60052U, // AE_ROUND16X4F32SASYM
2967
74.9k
    60140U, // AE_ROUND16X4F32SSYM
2968
74.9k
    60118U, // AE_ROUND24X2F48SASYM
2969
74.9k
    60203U, // AE_ROUND24X2F48SSYM
2970
74.9k
    60096U, // AE_ROUND32X2F48SASYM
2971
74.9k
    60182U, // AE_ROUND32X2F48SSYM
2972
74.9k
    60074U, // AE_ROUND32X2F64SASYM
2973
74.9k
    60161U, // AE_ROUND32X2F64SSYM
2974
74.9k
    67168874U,  // AE_ROUNDSP16F24ASYM
2975
74.9k
    67168811U,  // AE_ROUNDSP16F24SYM
2976
74.9k
    59987U, // AE_ROUNDSP16Q48X2ASYM
2977
74.9k
    59925U, // AE_ROUNDSP16Q48X2SYM
2978
74.9k
    67168895U,  // AE_ROUNDSQ32F48ASYM
2979
74.9k
    67168831U,  // AE_ROUNDSQ32F48SYM
2980
74.9k
    3221283987U,  // AE_S16M_L_I
2981
74.9k
    3772937267U,  // AE_S16M_L_IU
2982
74.9k
    62883U, // AE_S16M_L_X
2983
74.9k
    14835262U,  // AE_S16M_L_XC
2984
74.9k
    14840961U,  // AE_S16M_L_XU
2985
74.9k
    536929475U, // AE_S16X2M_I
2986
74.9k
    1088582759U,  // AE_S16X2M_IU
2987
74.9k
    62931U, // AE_S16X2M_X
2988
74.9k
    14835314U,  // AE_S16X2M_XC
2989
74.9k
    14841013U,  // AE_S16X2M_XU
2990
74.9k
    1610671202U,  // AE_S16X4_I
2991
74.9k
    2162322722U,  // AE_S16X4_IP
2992
74.9k
    81943781U,  // AE_S16X4_RIC
2993
74.9k
    81948371U,  // AE_S16X4_RIP
2994
74.9k
    62834U, // AE_S16X4_X
2995
74.9k
    14835209U,  // AE_S16X4_XC
2996
74.9k
    14839679U,  // AE_S16X4_XP
2997
74.9k
    3221283787U,  // AE_S16_0_I
2998
74.9k
    3772935197U,  // AE_S16_0_IP
2999
74.9k
    62713U, // AE_S16_0_X
3000
74.9k
    14835078U,  // AE_S16_0_XC
3001
74.9k
    14839548U,  // AE_S16_0_XP
3002
74.9k
    536929514U, // AE_S24RA64S_I
3003
74.9k
    1088581100U,  // AE_S24RA64S_IP
3004
74.9k
    62970U, // AE_S24RA64S_X
3005
74.9k
    14835356U,  // AE_S24RA64S_XC
3006
74.9k
    14839748U,  // AE_S24RA64S_XP
3007
74.9k
    14839258U,  // AE_S24X2RA64S_IP
3008
74.9k
    536929412U, // AE_S32F24_L_I
3009
74.9k
    1088581032U,  // AE_S32F24_L_IP
3010
74.9k
    62868U, // AE_S32F24_L_X
3011
74.9k
    14835246U,  // AE_S32F24_L_XC
3012
74.9k
    14839716U,  // AE_S32F24_L_XP
3013
74.9k
    536929451U, // AE_S32M_I
3014
74.9k
    1088582733U,  // AE_S32M_IU
3015
74.9k
    62907U, // AE_S32M_X
3016
74.9k
    14835288U,  // AE_S32M_XC
3017
74.9k
    14840987U,  // AE_S32M_XU
3018
74.9k
    536929499U, // AE_S32RA64S_I
3019
74.9k
    1088581048U,  // AE_S32RA64S_IP
3020
74.9k
    62955U, // AE_S32RA64S_X
3021
74.9k
    14835340U,  // AE_S32RA64S_XC
3022
74.9k
    14839732U,  // AE_S32RA64S_XP
3023
74.9k
    1610671125U,  // AE_S32X2F24_I
3024
74.9k
    2162322643U,  // AE_S32X2F24_IP
3025
74.9k
    81943720U,  // AE_S32X2F24_RIC
3026
74.9k
    81948310U,  // AE_S32X2F24_RIP
3027
74.9k
    62787U, // AE_S32X2F24_X
3028
74.9k
    14835158U,  // AE_S32X2F24_XC
3029
74.9k
    14839628U,  // AE_S32X2F24_XP
3030
74.9k
    14839240U,  // AE_S32X2RA64S_IP
3031
74.9k
    1610671085U,  // AE_S32X2_I
3032
74.9k
    2162322526U,  // AE_S32X2_IP
3033
74.9k
    81943610U,  // AE_S32X2_RIC
3034
74.9k
    81948200U,  // AE_S32X2_RIP
3035
74.9k
    62747U, // AE_S32X2_X
3036
74.9k
    14835115U,  // AE_S32X2_XC
3037
74.9k
    14839585U,  // AE_S32X2_XP
3038
74.9k
    536929400U, // AE_S32_L_I
3039
74.9k
    1088581005U,  // AE_S32_L_IP
3040
74.9k
    62856U, // AE_S32_L_X
3041
74.9k
    14835233U,  // AE_S32_L_XC
3042
74.9k
    14839703U,  // AE_S32_L_XP
3043
74.9k
    1610671180U,  // AE_S64_I
3044
74.9k
    2699193582U,  // AE_S64_IP
3045
74.9k
    62812U, // AE_S64_X
3046
74.9k
    14835185U,  // AE_S64_XC
3047
74.9k
    14839655U,  // AE_S64_XP
3048
74.9k
    92461983U,  // AE_SA16X4_IC
3049
74.9k
    92466439U,  // AE_SA16X4_IP
3050
74.9k
    92462280U,  // AE_SA16X4_RIC
3051
74.9k
    92466870U,  // AE_SA16X4_RIP
3052
74.9k
    92461909U,  // AE_SA24X2_IC
3053
74.9k
    92466297U,  // AE_SA24X2_IP
3054
74.9k
    92462167U,  // AE_SA24X2_RIC
3055
74.9k
    92466757U,  // AE_SA24X2_RIP
3056
74.9k
    92462080U,  // AE_SA24_L_IC
3057
74.9k
    92466586U,  // AE_SA24_L_IP
3058
74.9k
    92462323U,  // AE_SA24_L_RIC
3059
74.9k
    92466913U,  // AE_SA24_L_RIP
3060
74.9k
    92461952U,  // AE_SA32X2F24_IC
3061
74.9k
    92466354U,  // AE_SA32X2F24_IP
3062
74.9k
    92462213U,  // AE_SA32X2F24_RIC
3063
74.9k
    92466803U,  // AE_SA32X2F24_RIP
3064
74.9k
    92461881U,  // AE_SA32X2_IC
3065
74.9k
    92466243U,  // AE_SA32X2_IP
3066
74.9k
    92462109U,  // AE_SA32X2_RIC
3067
74.9k
    92466699U,  // AE_SA32X2_RIP
3068
74.9k
    81947600U,  // AE_SA64NEG_FP
3069
74.9k
    81947615U,  // AE_SA64POS_FP
3070
74.9k
    1610671165U,  // AE_SALIGN64_I
3071
74.9k
    55811U, // AE_SAT16X4
3072
74.9k
    67170693U,  // AE_SAT24S
3073
74.9k
    67170985U,  // AE_SAT48S
3074
74.9k
    67170973U,  // AE_SATQ56S
3075
74.9k
    81943298U,  // AE_SB
3076
74.9k
    679763U,  // AE_SBF
3077
74.9k
    678879U,  // AE_SBF_IC
3078
74.9k
    683372U,  // AE_SBF_IP
3079
74.9k
    1088578836U,  // AE_SBI
3080
74.9k
    1088576501U,  // AE_SBI_IC
3081
74.9k
    1088580994U,  // AE_SBI_IP
3082
74.9k
    81943479U,  // AE_SB_IC
3083
74.9k
    81947972U,  // AE_SB_IP
3084
74.9k
    58617U, // AE_SEL16I
3085
74.9k
    60224U, // AE_SEL16I_N
3086
74.9k
    1610662642U,  // AE_SEXT32
3087
74.9k
    67156868U,  // AE_SEXT32X2D16_10
3088
74.9k
    67158395U,  // AE_SEXT32X2D16_32
3089
74.9k
    67158569U,  // AE_SHA32
3090
74.9k
    67169176U,  // AE_SHORTSWAP
3091
74.9k
    62001U, // AE_SLAA16S
3092
74.9k
    49657U, // AE_SLAA32
3093
74.9k
    61613U, // AE_SLAA32S
3094
74.9k
    55508U, // AE_SLAA64
3095
74.9k
    61840U, // AE_SLAA64S
3096
74.9k
    55906U, // AE_SLAAQ56
3097
74.9k
    2147545706U,  // AE_SLAI16S
3098
74.9k
    2684409991U,  // AE_SLAI24
3099
74.9k
    2684416354U,  // AE_SLAI24S
3100
74.9k
    2684404351U,  // AE_SLAI32
3101
74.9k
    2684416258U,  // AE_SLAI32S
3102
74.9k
    3221281073U,  // AE_SLAI64
3103
74.9k
    3221287395U,  // AE_SLAI64S
3104
74.9k
    3221287553U,  // AE_SLAISQ56S
3105
74.9k
    67164339U,  // AE_SLAS24
3106
74.9k
    67170670U,  // AE_SLAS24S
3107
74.9k
    67158718U,  // AE_SLAS32
3108
74.9k
    67170574U,  // AE_SLAS32S
3109
74.9k
    67164530U,  // AE_SLAS64
3110
74.9k
    67170799U,  // AE_SLAS64S
3111
74.9k
    67164782U,  // AE_SLASQ56
3112
74.9k
    67170959U,  // AE_SLASSQ56S
3113
74.9k
    49618U, // AE_SRA64_32
3114
74.9k
    62273U, // AE_SRAA16RS
3115
74.9k
    62013U, // AE_SRAA16S
3116
74.9k
    49668U, // AE_SRAA32
3117
74.9k
    62210U, // AE_SRAA32RS
3118
74.9k
    61625U, // AE_SRAA32S
3119
74.9k
    55519U, // AE_SRAA64
3120
74.9k
    2147539525U,  // AE_SRAI16
3121
74.9k
    2147545103U,  // AE_SRAI16R
3122
74.9k
    2684410002U,  // AE_SRAI24
3123
74.9k
    2684404362U,  // AE_SRAI32
3124
74.9k
    2684415956U,  // AE_SRAI32R
3125
74.9k
    3221281084U,  // AE_SRAI64
3126
74.9k
    67164350U,  // AE_SRAS24
3127
74.9k
    67158729U,  // AE_SRAS32
3128
74.9k
    67164541U,  // AE_SRAS64
3129
74.9k
    49715U, // AE_SRLA32
3130
74.9k
    55530U, // AE_SRLA64
3131
74.9k
    2684410013U,  // AE_SRLI24
3132
74.9k
    2684404373U,  // AE_SRLI32
3133
74.9k
    3221281095U,  // AE_SRLI64
3134
74.9k
    67164361U,  // AE_SRLS24
3135
74.9k
    67158750U,  // AE_SRLS32
3136
74.9k
    67164562U,  // AE_SRLS64
3137
74.9k
    55848U, // AE_SUB16
3138
74.9k
    62025U, // AE_SUB16S
3139
74.9k
    61761U, // AE_SUB24S
3140
74.9k
    49726U, // AE_SUB32
3141
74.9k
    61637U, // AE_SUB32S
3142
74.9k
    55551U, // AE_SUB64
3143
74.9k
    61852U, // AE_SUB64S
3144
74.9k
    49759U, // AE_SUBADD32
3145
74.9k
    61673U, // AE_SUBADD32S
3146
74.9k
    58893U, // AE_TRUNCA32F64S_L
3147
74.9k
    61874U, // AE_TRUNCA32X2F64S
3148
74.9k
    58912U, // AE_TRUNCI32F64S_L
3149
74.9k
    61893U, // AE_TRUNCI32X2F64S
3150
74.9k
    678665U,  // AE_VLDL16C
3151
74.9k
    678849U,  // AE_VLDL16C_IC
3152
74.9k
    683342U,  // AE_VLDL16C_IP
3153
74.9k
    62391U, // AE_VLDL16T
3154
74.9k
    62367U, // AE_VLDL32T
3155
74.9k
    586750U,  // AE_VLDSHT
3156
74.9k
    14742467U,  // AE_VLEL16T
3157
74.9k
    14742443U,  // AE_VLEL32T
3158
74.9k
    678677U,  // AE_VLES16C
3159
74.9k
    678864U,  // AE_VLES16C_IC
3160
74.9k
    683357U,  // AE_VLES16C_IP
3161
74.9k
    61560U, // AE_XOR
3162
74.9k
    579922U,  // AE_ZALIGN64
3163
74.9k
    67141690U,  // ALL4
3164
74.9k
    67141725U,  // ALL8
3165
74.9k
    32978U, // AND
3166
74.9k
    32905U, // ANDB
3167
74.9k
    32941U, // ANDBC
3168
74.9k
    67141718U,  // ANY4
3169
74.9k
    67141753U,  // ANY8
3170
74.9k
    3758130190U,  // BALL
3171
74.9k
    3758130915U,  // BANY
3172
74.9k
    3758129320U,  // BBC
3173
74.9k
    27296344U,  // BBCI
3174
74.9k
    3758130717U,  // BBS
3175
74.9k
    27296407U,  // BBSI
3176
74.9k
    3758130339U,  // BEQ
3177
74.9k
    29393546U,  // BEQI
3178
74.9k
    12617493U,  // BEQZ
3179
74.9k
    12615924U,  // BF
3180
74.9k
    3758129379U,  // BGE
3181
74.9k
    29393508U,  // BGEI
3182
74.9k
    3758130840U,  // BGEU
3183
74.9k
    31490753U,  // BGEUI
3184
74.9k
    12617456U,  // BGEZ
3185
74.9k
    3758130746U,  // BLT
3186
74.9k
    29393582U,  // BLTI
3187
74.9k
    3758130864U,  // BLTU
3188
74.9k
    31490760U,  // BLTUI
3189
74.9k
    12617516U,  // BLTZ
3190
74.9k
    3758130196U,  // BNALL
3191
74.9k
    3758129384U,  // BNE
3192
74.9k
    29393514U,  // BNEI
3193
74.9k
    12617470U,  // BNEZ
3194
74.9k
    3758129389U,  // BNONE
3195
74.9k
    33751776U,  // BREAK
3196
74.9k
    722009U,  // BREAK_N
3197
74.9k
    12617270U,  // BT
3198
74.9k
    229387U,  // CALL0
3199
74.9k
    229402U,  // CALL12
3200
74.9k
    229433U,  // CALL4
3201
74.9k
    229468U,  // CALL8
3202
74.9k
    557074U,  // CALLX0
3203
74.9k
    557090U,  // CALLX12
3204
74.9k
    557134U,  // CALLX4
3205
74.9k
    557169U,  // CALLX8
3206
74.9k
    2147517791U,  // CEIL_S
3207
74.9k
    1610647086U,  // CLAMPS
3208
74.9k
    263767U,  // CLR_BIT_GPIO_OUT
3209
74.9k
    33588688U,  // CONST_S
3210
74.9k
    67142905U,  // DIV0_S
3211
74.9k
    14812552U,  // DIVN_S
3212
74.9k
    30504U, // DSYNC
3213
74.9k
    39625U, // EE_ANDQ
3214
74.9k
    81828640U,  // EE_BITREV
3215
74.9k
    263764U,  // EE_CLR_BIT_GPIO_OUT
3216
74.9k
    35367U, // EE_CMUL_S16
3217
74.9k
    220237611U, // EE_CMUL_S16_LD_INCP
3218
74.9k
    537039119U, // EE_CMUL_S16_ST_INCP
3219
74.9k
    25202587U,  // EE_FFT_AMS_S16_LD_INCP
3220
74.9k
    25204093U,  // EE_FFT_AMS_S16_LD_INCP_UAUP
3221
74.9k
    25202192U,  // EE_FFT_AMS_S16_LD_R32_DECP
3222
74.9k
    1347967U, // EE_FFT_AMS_S16_ST_INCP
3223
74.9k
    153131330U, // EE_FFT_CMUL_S16_LD_XP
3224
74.9k
    14817875U,  // EE_FFT_CMUL_S16_ST_XP
3225
74.9k
    35349U, // EE_FFT_R2BF_S16
3226
74.9k
    14717173U,  // EE_FFT_R2BF_S16_ST_INCP
3227
74.9k
    1088556589U,  // EE_FFT_VST_R32_DECP
3228
74.9k
    558185U,  // EE_GET_GPIO_IN
3229
74.9k
    37804U, // EE_LDF_128_IP
3230
74.9k
    39186U, // EE_LDF_128_XP
3231
74.9k
    37575U, // EE_LDF_64_IP
3232
74.9k
    38957U, // EE_LDF_64_XP
3233
74.9k
    35787594U,  // EE_LDQA_S16_128_IP
3234
74.9k
    81926320U,  // EE_LDQA_S16_128_XP
3235
74.9k
    35787636U,  // EE_LDQA_S8_128_IP
3236
74.9k
    81926362U,  // EE_LDQA_S8_128_XP
3237
74.9k
    35787615U,  // EE_LDQA_U16_128_IP
3238
74.9k
    81926341U,  // EE_LDQA_U16_128_XP
3239
74.9k
    35787656U,  // EE_LDQA_U8_128_IP
3240
74.9k
    81926382U,  // EE_LDQA_U8_128_XP
3241
74.9k
    34912U, // EE_LDXQ_32
3242
74.9k
    1625331017U,  // EE_LD_128_USAR_IP
3243
74.9k
    14719551U,  // EE_LD_128_USAR_XP
3244
74.9k
    37885277U,  // EE_LD_ACCX_IP
3245
74.9k
    39981675U,  // EE_LD_QACC_H_H_32_IP
3246
74.9k
    35787724U,  // EE_LD_QACC_H_L_128_IP
3247
74.9k
    39981721U,  // EE_LD_QACC_L_H_32_IP
3248
74.9k
    35787772U,  // EE_LD_QACC_L_L_128_IP
3249
74.9k
    35788065U,  // EE_LD_UA_STATE_IP
3250
74.9k
    2189560737U,  // EE_MOVI_32_A
3251
74.9k
    2147523179U,  // EE_MOVI_32_Q
3252
74.9k
    560111U,  // EE_MOV_S16_QACC
3253
74.9k
    560228U,  // EE_MOV_S8_QACC
3254
74.9k
    560150U,  // EE_MOV_U16_QACC
3255
74.9k
    560265U,  // EE_MOV_U8_QACC
3256
74.9k
    67148518U,  // EE_NOTQ
3257
74.9k
    39635U, // EE_ORQ
3258
74.9k
    263785U,  // EE_SET_BIT_GPIO_OUT
3259
74.9k
    44210833U,  // EE_SLCI_2Q
3260
74.9k
    1874603U, // EE_SLCXXP_2Q
3261
74.9k
    44210846U,  // EE_SRCI_2Q
3262
74.9k
    1073777584U,  // EE_SRCMB_S16_QACC
3263
74.9k
    1073777704U,  // EE_SRCMB_S8_QACC
3264
74.9k
    14815684U,  // EE_SRCQ_128_ST_INCP
3265
74.9k
    1874618U, // EE_SRCXXP_2Q
3266
74.9k
    39546U, // EE_SRC_Q
3267
74.9k
    287347878U, // EE_SRC_Q_LD_IP
3268
74.9k
    153131460U, // EE_SRC_Q_LD_XP
3269
74.9k
    14718989U,  // EE_SRC_Q_QUP
3270
74.9k
    1073781630U,  // EE_SRS_ACCX
3271
74.9k
    14816188U,  // EE_STF_128_IP
3272
74.9k
    14817570U,  // EE_STF_128_XP
3273
74.9k
    14815958U,  // EE_STF_64_IP
3274
74.9k
    14817340U,  // EE_STF_64_XP
3275
74.9k
    34925U, // EE_STXQ_32
3276
74.9k
    37885293U,  // EE_ST_ACCX_IP
3277
74.9k
    39981698U,  // EE_ST_QACC_H_H_32_IP
3278
74.9k
    35787748U,  // EE_ST_QACC_H_L_128_IP
3279
74.9k
    39981744U,  // EE_ST_QACC_L_H_32_IP
3280
74.9k
    35787796U,  // EE_ST_QACC_L_L_128_IP
3281
74.9k
    35788085U,  // EE_ST_UA_STATE_IP
3282
74.9k
    35441U, // EE_VADDS_S16
3283
74.9k
    3441463172U,  // EE_VADDS_S16_LD_INCP
3284
74.9k
    537039208U, // EE_VADDS_S16_ST_INCP
3285
74.9k
    34996U, // EE_VADDS_S32
3286
74.9k
    3441463038U,  // EE_VADDS_S32_LD_INCP
3287
74.9k
    537039048U, // EE_VADDS_S32_ST_INCP
3288
74.9k
    35644U, // EE_VADDS_S8
3289
74.9k
    3441463328U,  // EE_VADDS_S8_LD_INCP
3290
74.9k
    537039386U, // EE_VADDS_S8_ST_INCP
3291
74.9k
    35409U, // EE_VCMP_EQ_S16
3292
74.9k
    34964U, // EE_VCMP_EQ_S32
3293
74.9k
    35614U, // EE_VCMP_EQ_S8
3294
74.9k
    35456U, // EE_VCMP_GT_S16
3295
74.9k
    35011U, // EE_VCMP_GT_S32
3296
74.9k
    35658U, // EE_VCMP_GT_S8
3297
74.9k
    35473U, // EE_VCMP_LT_S16
3298
74.9k
    35028U, // EE_VCMP_LT_S32
3299
74.9k
    35674U, // EE_VCMP_LT_S8
3300
74.9k
    67144171U,  // EE_VLDBC_16
3301
74.9k
    2162201385U,  // EE_VLDBC_16_IP
3302
74.9k
    14719119U,  // EE_VLDBC_16_XP
3303
74.9k
    67143722U,  // EE_VLDBC_32
3304
74.9k
    2699072090U,  // EE_VLDBC_32_IP
3305
74.9k
    14719004U,  // EE_VLDBC_32_XP
3306
74.9k
    67144413U,  // EE_VLDBC_8
3307
74.9k
    3235943226U,  // EE_VLDBC_8_IP
3308
74.9k
    14719136U,  // EE_VLDBC_8_XP
3309
74.9k
    36419U, // EE_VLDHBC_16_INCP
3310
74.9k
    1625330588U,  // EE_VLD_128_IP
3311
74.9k
    14719234U,  // EE_VLD_128_XP
3312
74.9k
    3772814053U,  // EE_VLD_H_64_IP
3313
74.9k
    14719051U,  // EE_VLD_H_64_XP
3314
74.9k
    3772814087U,  // EE_VLD_L_64_IP
3315
74.9k
    14719085U,  // EE_VLD_L_64_XP
3316
74.9k
    35521U, // EE_VMAX_S16
3317
74.9k
    3441463220U,  // EE_VMAX_S16_LD_INCP
3318
74.9k
    537039256U, // EE_VMAX_S16_ST_INCP
3319
74.9k
    35045U, // EE_VMAX_S32
3320
74.9k
    3441463061U,  // EE_VMAX_S32_LD_INCP
3321
74.9k
    537039071U, // EE_VMAX_S32_ST_INCP
3322
74.9k
    35719U, // EE_VMAX_S8
3323
74.9k
    3441463350U,  // EE_VMAX_S8_LD_INCP
3324
74.9k
    537039408U, // EE_VMAX_S8_ST_INCP
3325
74.9k
    35395U, // EE_VMIN_S16
3326
74.9k
    3441463127U,  // EE_VMIN_S16_LD_INCP
3327
74.9k
    537039163U, // EE_VMIN_S16_ST_INCP
3328
74.9k
    34950U, // EE_VMIN_S32
3329
74.9k
    3441462993U,  // EE_VMIN_S32_LD_INCP
3330
74.9k
    537039003U, // EE_VMIN_S32_ST_INCP
3331
74.9k
    35601U, // EE_VMIN_S8
3332
74.9k
    3441463285U,  // EE_VMIN_S8_LD_INCP
3333
74.9k
    537039343U, // EE_VMIN_S8_ST_INCP
3334
74.9k
    67148588U,  // EE_VMULAS_S16_ACCX
3335
74.9k
    14718135U,  // EE_VMULAS_S16_ACCX_LD_IP
3336
74.9k
    354457247U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
3337
74.9k
    14719445U,  // EE_VMULAS_S16_ACCX_LD_XP
3338
74.9k
    153130899U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
3339
74.9k
    67144666U,  // EE_VMULAS_S16_QACC
3340
74.9k
    14716503U,  // EE_VMULAS_S16_QACC_LDBC_INCP
3341
74.9k
    153130395U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
3342
74.9k
    14718012U,  // EE_VMULAS_S16_QACC_LD_IP
3343
74.9k
    354457125U, // EE_VMULAS_S16_QACC_LD_IP_QUP
3344
74.9k
    14719322U,  // EE_VMULAS_S16_QACC_LD_XP
3345
74.9k
    153130777U, // EE_VMULAS_S16_QACC_LD_XP_QUP
3346
74.9k
    67148630U,  // EE_VMULAS_S8_ACCX
3347
74.9k
    14718189U,  // EE_VMULAS_S8_ACCX_LD_IP
3348
74.9k
    354457309U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
3349
74.9k
    14719499U,  // EE_VMULAS_S8_ACCX_LD_XP
3350
74.9k
    153130961U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
3351
74.9k
    67144784U,  // EE_VMULAS_S8_QACC
3352
74.9k
    14716565U,  // EE_VMULAS_S8_QACC_LDBC_INCP
3353
74.9k
    153130465U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
3354
74.9k
    14718066U,  // EE_VMULAS_S8_QACC_LD_IP
3355
74.9k
    354457187U, // EE_VMULAS_S8_QACC_LD_IP_QUP
3356
74.9k
    14719376U,  // EE_VMULAS_S8_QACC_LD_XP
3357
74.9k
    153130839U, // EE_VMULAS_S8_QACC_LD_XP_QUP
3358
74.9k
    67148609U,  // EE_VMULAS_U16_ACCX
3359
74.9k
    14718162U,  // EE_VMULAS_U16_ACCX_LD_IP
3360
74.9k
    354457278U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
3361
74.9k
    14719472U,  // EE_VMULAS_U16_ACCX_LD_XP
3362
74.9k
    153130930U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
3363
74.9k
    67144705U,  // EE_VMULAS_U16_QACC
3364
74.9k
    14716534U,  // EE_VMULAS_U16_QACC_LDBC_INCP
3365
74.9k
    153130430U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
3366
74.9k
    14718039U,  // EE_VMULAS_U16_QACC_LD_IP
3367
74.9k
    354457156U, // EE_VMULAS_U16_QACC_LD_IP_QUP
3368
74.9k
    14719349U,  // EE_VMULAS_U16_QACC_LD_XP
3369
74.9k
    153130808U, // EE_VMULAS_U16_QACC_LD_XP_QUP
3370
74.9k
    67148650U,  // EE_VMULAS_U8_ACCX
3371
74.9k
    14718215U,  // EE_VMULAS_U8_ACCX_LD_IP
3372
74.9k
    354457339U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
3373
74.9k
    14719525U,  // EE_VMULAS_U8_ACCX_LD_XP
3374
74.9k
    153130991U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
3375
74.9k
    67144821U,  // EE_VMULAS_U8_QACC
3376
74.9k
    14716595U,  // EE_VMULAS_U8_QACC_LDBC_INCP
3377
74.9k
    153130499U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
3378
74.9k
    14718092U,  // EE_VMULAS_U8_QACC_LD_IP
3379
74.9k
    354457217U, // EE_VMULAS_U8_QACC_LD_IP_QUP
3380
74.9k
    14719402U,  // EE_VMULAS_U8_QACC_LD_XP
3381
74.9k
    153130869U, // EE_VMULAS_U8_QACC_LD_XP_QUP
3382
74.9k
    35381U, // EE_VMUL_S16
3383
74.9k
    3441463105U,  // EE_VMUL_S16_LD_INCP
3384
74.9k
    537039141U, // EE_VMUL_S16_ST_INCP
3385
74.9k
    35588U, // EE_VMUL_S8
3386
74.9k
    3441463264U,  // EE_VMUL_S8_LD_INCP
3387
74.9k
    537039322U, // EE_VMUL_S8_ST_INCP
3388
74.9k
    35535U, // EE_VMUL_U16
3389
74.9k
    3441463242U,  // EE_VMUL_U16_LD_INCP
3390
74.9k
    537039278U, // EE_VMUL_U16_ST_INCP
3391
74.9k
    35732U, // EE_VMUL_U8
3392
74.9k
    3441463371U,  // EE_VMUL_U8_LD_INCP
3393
74.9k
    537039429U, // EE_VMUL_U8_ST_INCP
3394
74.9k
    35490U, // EE_VPRELU_S16
3395
74.9k
    35690U, // EE_VPRELU_S8
3396
74.9k
    14813874U,  // EE_VRELU_S16
3397
74.9k
    14814073U,  // EE_VRELU_S8
3398
74.9k
    67143736U,  // EE_VSL_32
3399
74.9k
    1610648516U,  // EE_VSMULAS_S16_QACC
3400
74.9k
    14717024U,  // EE_VSMULAS_S16_QACC_LD_INCP
3401
74.9k
    2684390459U,  // EE_VSMULAS_S8_QACC
3402
74.9k
    14717054U,  // EE_VSMULAS_S8_QACC_LD_INCP
3403
74.9k
    67143802U,  // EE_VSR_32
3404
74.9k
    1625429036U,  // EE_VST_128_IP
3405
74.9k
    14817586U,  // EE_VST_128_XP
3406
74.9k
    3772912374U,  // EE_VST_H_64_IP
3407
74.9k
    14817372U,  // EE_VST_H_64_XP
3408
74.9k
    3772912408U,  // EE_VST_L_64_IP
3409
74.9k
    14817406U,  // EE_VST_L_64_XP
3410
74.9k
    35426U, // EE_VSUBS_S16
3411
74.9k
    3441463149U,  // EE_VSUBS_S16_LD_INCP
3412
74.9k
    537039185U, // EE_VSUBS_S16_ST_INCP
3413
74.9k
    34981U, // EE_VSUBS_S32
3414
74.9k
    3441463015U,  // EE_VSUBS_S32_LD_INCP
3415
74.9k
    537039025U, // EE_VSUBS_S32_ST_INCP
3416
74.9k
    35630U, // EE_VSUBS_S8
3417
74.9k
    3441463306U,  // EE_VSUBS_S8_LD_INCP
3418
74.9k
    537039364U, // EE_VSUBS_S8_ST_INCP
3419
74.9k
    690681U,  // EE_VUNZIP_16
3420
74.9k
    690244U,  // EE_VUNZIP_32
3421
74.9k
    690922U,  // EE_VUNZIP_8
3422
74.9k
    690696U,  // EE_VZIP_16
3423
74.9k
    690259U,  // EE_VZIP_32
3424
74.9k
    690936U,  // EE_VZIP_8
3425
74.9k
    67143231U,  // EE_WR_MASK_GPIO_OUT
3426
74.9k
    39644U, // EE_XORQ
3427
74.9k
    1735U,  // EE_ZERO_ACCX
3428
74.9k
    563845U,  // EE_ZERO_Q
3429
74.9k
    186U, // EE_ZERO_QACC
3430
74.9k
    46171881U,  // ENTRY
3431
74.9k
    30510U, // ESYNC
3432
74.9k
    30658U, // EXCW
3433
74.9k
    2684388047U,  // EXTUI
3434
74.9k
    30673U, // EXTW
3435
74.9k
    2147517881U,  // FLOAT_S
3436
74.9k
    2147517864U,  // FLOOR_S
3437
74.9k
    558188U,  // GET_GPIO_IN
3438
74.9k
    30567U, // ILL
3439
74.9k
    30571U, // ILL_N
3440
74.9k
    30516U, // ISYNC
3441
74.9k
    328413U,  // J
3442
74.9k
    558805U,  // JX
3443
74.9k
    10519184U,  // L16SI
3444
74.9k
    10519220U,  // L16UI
3445
74.9k
    536903895U, // L32E
3446
74.9k
    10519092U,  // L32I
3447
74.9k
    10519608U,  // L32I_N
3448
74.9k
    48268456U,  // L32R
3449
74.9k
    10519227U,  // L8UI
3450
74.9k
    81824933U,  // LDDEC
3451
74.9k
    81825085U,  // LDINC
3452
74.9k
    10519134U,  // LEA_ADD
3453
74.9k
    50365578U,  // LOOP
3454
74.9k
    50366243U,  // LOOPGTZ
3455
74.9k
    50366212U,  // LOOPNEZ
3456
74.9k
    10519197U,  // LSI
3457
74.9k
    1088455806U,  // LSIP
3458
74.9k
    34521U, // LSX
3459
74.9k
    14714007U,  // LSXP
3460
74.9k
    14714233U,  // MADDN_S
3461
74.9k
    14714141U,  // MADD_S
3462
74.9k
    34498U, // MAX
3463
74.9k
    34486U, // MAXU
3464
74.9k
    30663U, // MEMW
3465
74.9k
    33913U, // MIN
3466
74.9k
    34468U, // MINU
3467
74.9k
    81921355U,  // MKDADJ_S
3468
74.9k
    67142997U,  // MKSADJ_S
3469
74.9k
    34587U, // MOVEQZ
3470
74.9k
    14812668U,  // MOVEQZ_S
3471
74.9k
    14811384U,  // MOVF
3472
74.9k
    14812476U,  // MOVF_S
3473
74.9k
    34550U, // MOVGEZ
3474
74.9k
    14812648U,  // MOVGEZ_S
3475
74.9k
    52462295U,  // MOVI
3476
74.9k
    54559825U,  // MOVI_N
3477
74.9k
    34610U, // MOVLTZ
3478
74.9k
    14812678U,  // MOVLTZ_S
3479
74.9k
    34573U, // MOVNEZ
3480
74.9k
    14812658U,  // MOVNEZ_S
3481
74.9k
    67142800U,  // MOVSP
3482
74.9k
    14812798U,  // MOVT
3483
74.9k
    14812633U,  // MOVT_S
3484
74.9k
    67142754U,  // MOV_N
3485
74.9k
    67143137U,  // MOV_S
3486
74.9k
    14714123U,  // MSUB_S
3487
74.9k
    34320U, // MUL16S
3488
74.9k
    34442U, // MUL16U
3489
74.9k
    67141891U,  // MULA_AA_HH
3490
74.9k
    67142382U,  // MULA_AA_HL
3491
74.9k
    67142032U,  // MULA_AA_LH
3492
74.9k
    67142529U,  // MULA_AA_LL
3493
74.9k
    67141962U,  // MULA_AD_HH
3494
74.9k
    67142453U,  // MULA_AD_HL
3495
74.9k
    67142103U,  // MULA_AD_LH
3496
74.9k
    67142600U,  // MULA_AD_LL
3497
74.9k
    67141927U,  // MULA_DA_HH
3498
74.9k
    14716058U,  // MULA_DA_HH_LDDEC
3499
74.9k
    14716210U,  // MULA_DA_HH_LDINC
3500
74.9k
    67142418U,  // MULA_DA_HL
3501
74.9k
    14716134U,  // MULA_DA_HL_LDDEC
3502
74.9k
    14716286U,  // MULA_DA_HL_LDINC
3503
74.9k
    67142068U,  // MULA_DA_LH
3504
74.9k
    14716096U,  // MULA_DA_LH_LDDEC
3505
74.9k
    14716248U,  // MULA_DA_LH_LDINC
3506
74.9k
    67142565U,  // MULA_DA_LL
3507
74.9k
    14716172U,  // MULA_DA_LL_LDDEC
3508
74.9k
    14716324U,  // MULA_DA_LL_LDINC
3509
74.9k
    67141997U,  // MULA_DD_HH
3510
74.9k
    14716077U,  // MULA_DD_HH_LDDEC
3511
74.9k
    14716229U,  // MULA_DD_HH_LDINC
3512
74.9k
    67142488U,  // MULA_DD_HL
3513
74.9k
    14716153U,  // MULA_DD_HL_LDDEC
3514
74.9k
    14716305U,  // MULA_DD_HL_LDINC
3515
74.9k
    67142138U,  // MULA_DD_LH
3516
74.9k
    14716115U,  // MULA_DD_LH_LDDEC
3517
74.9k
    14716267U,  // MULA_DD_LH_LDINC
3518
74.9k
    67142635U,  // MULA_DD_LL
3519
74.9k
    14716191U,  // MULA_DD_LL_LDDEC
3520
74.9k
    14716343U,  // MULA_DD_LL_LDINC
3521
74.9k
    33824U, // MULL
3522
74.9k
    33309U, // MULSH
3523
74.9k
    67141915U,  // MULS_AA_HH
3524
74.9k
    67142406U,  // MULS_AA_HL
3525
74.9k
    67142056U,  // MULS_AA_LH
3526
74.9k
    67142553U,  // MULS_AA_LL
3527
74.9k
    67141985U,  // MULS_AD_HH
3528
74.9k
    67142476U,  // MULS_AD_HL
3529
74.9k
    67142126U,  // MULS_AD_LH
3530
74.9k
    67142623U,  // MULS_AD_LL
3531
74.9k
    67141950U,  // MULS_DA_HH
3532
74.9k
    67142441U,  // MULS_DA_HL
3533
74.9k
    67142091U,  // MULS_DA_LH
3534
74.9k
    67142588U,  // MULS_DA_LL
3535
74.9k
    67142020U,  // MULS_DD_HH
3536
74.9k
    67142511U,  // MULS_DD_HL
3537
74.9k
    67142161U,  // MULS_DD_LH
3538
74.9k
    67142658U,  // MULS_DD_LL
3539
74.9k
    33316U, // MULUH
3540
74.9k
    67141904U,  // MUL_AA_HH
3541
74.9k
    67142395U,  // MUL_AA_HL
3542
74.9k
    67142045U,  // MUL_AA_LH
3543
74.9k
    67142542U,  // MUL_AA_LL
3544
74.9k
    67141974U,  // MUL_AD_HH
3545
74.9k
    67142465U,  // MUL_AD_HL
3546
74.9k
    67142115U,  // MUL_AD_LH
3547
74.9k
    67142612U,  // MUL_AD_LL
3548
74.9k
    67141939U,  // MUL_DA_HH
3549
74.9k
    67142430U,  // MUL_DA_HL
3550
74.9k
    67142080U,  // MUL_DA_LH
3551
74.9k
    67142577U,  // MUL_DA_LL
3552
74.9k
    67142009U,  // MUL_DD_HH
3553
74.9k
    67142500U,  // MUL_DD_HL
3554
74.9k
    67142150U,  // MUL_DD_LH
3555
74.9k
    67142647U,  // MUL_DD_LL
3556
74.9k
    34151U, // MUL_S
3557
74.9k
    67141886U,  // NEG
3558
74.9k
    67142980U,  // NEG_S
3559
74.9k
    67142913U,  // NEXP01_S
3560
74.9k
    30645U, // NOP
3561
74.9k
    67141764U,  // NSA
3562
74.9k
    67143314U,  // NSAU
3563
74.9k
    34202U, // OEQ_S
3564
74.9k
    34094U, // OLE_S
3565
74.9k
    34242U, // OLT_S
3566
74.9k
    33987U, // OR
3567
74.9k
    32926U, // ORB
3568
74.9k
    32948U, // ORBC
3569
74.9k
    34344U, // QUOS
3570
74.9k
    34474U, // QUOU
3571
74.9k
    67142885U,  // RECIP0_S
3572
74.9k
    34338U, // REMS
3573
74.9k
    34462U, // REMU
3574
74.9k
    67142830U,  // RER
3575
74.9k
    30649U, // RET
3576
74.9k
    30668U, // RETW
3577
74.9k
    30583U, // RETW_N
3578
74.9k
    30577U, // RET_N
3579
74.9k
    30528U, // RFDE
3580
74.9k
    30533U, // RFE
3581
74.9k
    721520U,  // RFI
3582
74.9k
    67142840U,  // RFR
3583
74.9k
    30594U, // RFWO
3584
74.9k
    30653U, // RFWU
3585
74.9k
    362172U,  // ROTW
3586
74.9k
    2147517733U,  // ROUND_S
3587
74.9k
    33588091U,  // RSIL
3588
74.9k
    67142895U,  // RSQRT0_S
3589
74.9k
    67142855U,  // RSR
3590
74.9k
    30522U, // RSYNC
3591
74.9k
    67142875U,  // RUR
3592
74.9k
    559000U,  // RUR_ACCX_0
3593
74.9k
    559120U,  // RUR_ACCX_1
3594
74.9k
    581292U,  // RUR_AE_BITHEAD
3595
74.9k
    585856U,  // RUR_AE_BITPTR
3596
74.9k
    581324U,  // RUR_AE_BITSUSED
3597
74.9k
    573081U,  // RUR_AE_CBEGIN0
3598
74.9k
    572479U,  // RUR_AE_CEND0
3599
74.9k
    584572U,  // RUR_AE_CWRAP
3600
74.9k
    584538U,  // RUR_AE_CW_SD_NO
3601
74.9k
    586621U,  // RUR_AE_FIRST_TS
3602
74.9k
    586712U,  // RUR_AE_NEXTOFFSET
3603
74.9k
    586967U,  // RUR_AE_OVERFLOW
3604
74.9k
    585779U,  // RUR_AE_OVF_SAR
3605
74.9k
    585755U,  // RUR_AE_SAR
3606
74.9k
    581385U,  // RUR_AE_SEARCHDONE
3607
74.9k
    581423U,  // RUR_AE_TABLESIZE
3608
74.9k
    584614U,  // RUR_AE_TS_FTS_BU_BP
3609
74.9k
    560616U,  // RUR_FFT_BIT_WIDTH
3610
74.9k
    563970U,  // RUR_GPIO_OUT
3611
74.9k
    558940U,  // RUR_QACC_H_0
3612
74.9k
    559060U,  // RUR_QACC_H_1
3613
74.9k
    559381U,  // RUR_QACC_H_2
3614
74.9k
    559475U,  // RUR_QACC_H_3
3615
74.9k
    559535U,  // RUR_QACC_H_4
3616
74.9k
    558970U,  // RUR_QACC_L_0
3617
74.9k
    559090U,  // RUR_QACC_L_1
3618
74.9k
    559411U,  // RUR_QACC_L_2
3619
74.9k
    559505U,  // RUR_QACC_L_3
3620
74.9k
    559565U,  // RUR_QACC_L_4
3621
74.9k
    560586U,  // RUR_SAR_BYTE
3622
74.9k
    558906U,  // RUR_UA_STATE_0
3623
74.9k
    559026U,  // RUR_UA_STATE_1
3624
74.9k
    559347U,  // RUR_UA_STATE_2
3625
74.9k
    559441U,  // RUR_UA_STATE_3
3626
74.9k
    10519105U,  // S16I
3627
74.9k
    56754731U,  // S32C1I
3628
74.9k
    536903901U, // S32E
3629
74.9k
    10519099U,  // S32I
3630
74.9k
    10519617U,  // S32I_N
3631
74.9k
    10519111U,  // S8I
3632
74.9k
    263788U,  // SET_BIT_GPIO_OUT
3633
74.9k
    1610647172U,  // SEXT
3634
74.9k
    30551U, // SIMCALL
3635
74.9k
    67142683U,  // SLL
3636
74.9k
    1610646134U,  // SLLI
3637
74.9k
    67142896U,  // SQRT0_S
3638
74.9k
    67141759U,  // SRA
3639
74.9k
    2684387916U,  // SRAI
3640
74.9k
    32968U, // SRC
3641
74.9k
    67142694U,  // SRL
3642
74.9k
    2684387965U,  // SRLI
3643
74.9k
    557799U,  // SSA8L
3644
74.9k
    393810U,  // SSAI
3645
74.9k
    10519202U,  // SSI
3646
74.9k
    1088554116U,  // SSIP
3647
74.9k
    558123U,  // SSL
3648
74.9k
    558284U,  // SSR
3649
74.9k
    34526U, // SSX
3650
74.9k
    14812317U,  // SSXP
3651
74.9k
    32931U, // SUB
3652
74.9k
    32811U, // SUBX2
3653
74.9k
    32832U, // SUBX4
3654
74.9k
    32867U, // SUBX8
3655
74.9k
    34060U, // SUB_S
3656
74.9k
    30559U, // SYSCALL
3657
74.9k
    2147517716U,  // TRUNC_S
3658
74.9k
    34209U, // UEQ_S
3659
74.9k
    2147517880U,  // UFLOAT_S
3660
74.9k
    34101U, // ULE_S
3661
74.9k
    34249U, // ULT_S
3662
74.9k
    67141903U,  // UMUL_AA_HH
3663
74.9k
    67142394U,  // UMUL_AA_HL
3664
74.9k
    67142044U,  // UMUL_AA_LH
3665
74.9k
    67142541U,  // UMUL_AA_LL
3666
74.9k
    34178U, // UN_S
3667
74.9k
    2147517715U,  // UTRUNC_S
3668
74.9k
    721575U,  // WAITI
3669
74.9k
    67141775U,  // WDTLB
3670
74.9k
    67142835U,  // WER
3671
74.9k
    67142845U,  // WFR
3672
74.9k
    67141782U,  // WITLB
3673
74.9k
    67143234U,  // WR_MASK_GPIO_OUT
3674
74.9k
    109184209U, // WSR
3675
74.9k
    109184224U, // WUR
3676
74.9k
    559013U,  // WUR_ACCX_0
3677
74.9k
    559133U,  // WUR_ACCX_1
3678
74.9k
    581308U,  // WUR_AE_BITHEAD
3679
74.9k
    585871U,  // WUR_AE_BITPTR
3680
74.9k
    581341U,  // WUR_AE_BITSUSED
3681
74.9k
    573097U,  // WUR_AE_CBEGIN0
3682
74.9k
    572493U,  // WUR_AE_CEND0
3683
74.9k
    584586U,  // WUR_AE_CWRAP
3684
74.9k
    584555U,  // WUR_AE_CW_SD_NO
3685
74.9k
    586638U,  // WUR_AE_FIRST_TS
3686
74.9k
    586731U,  // WUR_AE_NEXTOFFSET
3687
74.9k
    586984U,  // WUR_AE_OVERFLOW
3688
74.9k
    585795U,  // WUR_AE_OVF_SAR
3689
74.9k
    585767U,  // WUR_AE_SAR
3690
74.9k
    581404U,  // WUR_AE_SEARCHDONE
3691
74.9k
    581441U,  // WUR_AE_TABLESIZE
3692
74.9k
    584635U,  // WUR_AE_TS_FTS_BU_BP
3693
74.9k
    557057U,  // WUR_FCR
3694
74.9k
    560636U,  // WUR_FFT_BIT_WIDTH
3695
74.9k
    563960U,  // WUR_FSR
3696
74.9k
    563985U,  // WUR_GPIO_OUT
3697
74.9k
    558955U,  // WUR_QACC_H_0
3698
74.9k
    559075U,  // WUR_QACC_H_1
3699
74.9k
    559396U,  // WUR_QACC_H_2
3700
74.9k
    559490U,  // WUR_QACC_H_3
3701
74.9k
    559550U,  // WUR_QACC_H_4
3702
74.9k
    558985U,  // WUR_QACC_L_0
3703
74.9k
    559105U,  // WUR_QACC_L_1
3704
74.9k
    559426U,  // WUR_QACC_L_2
3705
74.9k
    559520U,  // WUR_QACC_L_3
3706
74.9k
    559580U,  // WUR_QACC_L_4
3707
74.9k
    560601U,  // WUR_SAR_BYTE
3708
74.9k
    558923U,  // WUR_UA_STATE_0
3709
74.9k
    559043U,  // WUR_UA_STATE_1
3710
74.9k
    559364U,  // WUR_UA_STATE_2
3711
74.9k
    559458U,  // WUR_UA_STATE_3
3712
74.9k
    33986U, // XOR
3713
74.9k
    32925U, // XORB
3714
74.9k
    689366U,  // XSR
3715
74.9k
    10519091U,  // _L32I
3716
74.9k
    10519607U,  // _L32I_N
3717
74.9k
    58753750U,  // _MOVI
3718
74.9k
    10519098U,  // _S32I
3719
74.9k
    10519616U,  // _S32I_N
3720
74.9k
    2147517045U,  // _SLLI
3721
74.9k
    2147517052U,  // _SRLI
3722
74.9k
    67148528U,  // mv_QR
3723
74.9k
  };
3724
3725
74.9k
  static const uint16_t OpInfo1[] = {
3726
74.9k
    0U, // PHI
3727
74.9k
    0U, // INLINEASM
3728
74.9k
    0U, // INLINEASM_BR
3729
74.9k
    0U, // CFI_INSTRUCTION
3730
74.9k
    0U, // EH_LABEL
3731
74.9k
    0U, // GC_LABEL
3732
74.9k
    0U, // ANNOTATION_LABEL
3733
74.9k
    0U, // KILL
3734
74.9k
    0U, // EXTRACT_SUBREG
3735
74.9k
    0U, // INSERT_SUBREG
3736
74.9k
    0U, // IMPLICIT_DEF
3737
74.9k
    0U, // SUBREG_TO_REG
3738
74.9k
    0U, // COPY_TO_REGCLASS
3739
74.9k
    0U, // DBG_VALUE
3740
74.9k
    0U, // DBG_VALUE_LIST
3741
74.9k
    0U, // DBG_INSTR_REF
3742
74.9k
    0U, // DBG_PHI
3743
74.9k
    0U, // DBG_LABEL
3744
74.9k
    0U, // REG_SEQUENCE
3745
74.9k
    0U, // COPY
3746
74.9k
    0U, // BUNDLE
3747
74.9k
    0U, // LIFETIME_START
3748
74.9k
    0U, // LIFETIME_END
3749
74.9k
    0U, // PSEUDO_PROBE
3750
74.9k
    0U, // ARITH_FENCE
3751
74.9k
    0U, // STACKMAP
3752
74.9k
    0U, // FENTRY_CALL
3753
74.9k
    0U, // PATCHPOINT
3754
74.9k
    0U, // LOAD_STACK_GUARD
3755
74.9k
    0U, // PREALLOCATED_SETUP
3756
74.9k
    0U, // PREALLOCATED_ARG
3757
74.9k
    0U, // STATEPOINT
3758
74.9k
    0U, // LOCAL_ESCAPE
3759
74.9k
    0U, // FAULTING_OP
3760
74.9k
    0U, // PATCHABLE_OP
3761
74.9k
    0U, // PATCHABLE_FUNCTION_ENTER
3762
74.9k
    0U, // PATCHABLE_RET
3763
74.9k
    0U, // PATCHABLE_FUNCTION_EXIT
3764
74.9k
    0U, // PATCHABLE_TAIL_CALL
3765
74.9k
    0U, // PATCHABLE_EVENT_CALL
3766
74.9k
    0U, // PATCHABLE_TYPED_EVENT_CALL
3767
74.9k
    0U, // ICALL_BRANCH_FUNNEL
3768
74.9k
    0U, // MEMBARRIER
3769
74.9k
    0U, // JUMP_TABLE_DEBUG_INFO
3770
74.9k
    0U, // G_ASSERT_SEXT
3771
74.9k
    0U, // G_ASSERT_ZEXT
3772
74.9k
    0U, // G_ASSERT_ALIGN
3773
74.9k
    0U, // G_ADD
3774
74.9k
    0U, // G_SUB
3775
74.9k
    0U, // G_MUL
3776
74.9k
    0U, // G_SDIV
3777
74.9k
    0U, // G_UDIV
3778
74.9k
    0U, // G_SREM
3779
74.9k
    0U, // G_UREM
3780
74.9k
    0U, // G_SDIVREM
3781
74.9k
    0U, // G_UDIVREM
3782
74.9k
    0U, // G_AND
3783
74.9k
    0U, // G_OR
3784
74.9k
    0U, // G_XOR
3785
74.9k
    0U, // G_IMPLICIT_DEF
3786
74.9k
    0U, // G_PHI
3787
74.9k
    0U, // G_FRAME_INDEX
3788
74.9k
    0U, // G_GLOBAL_VALUE
3789
74.9k
    0U, // G_CONSTANT_POOL
3790
74.9k
    0U, // G_EXTRACT
3791
74.9k
    0U, // G_UNMERGE_VALUES
3792
74.9k
    0U, // G_INSERT
3793
74.9k
    0U, // G_MERGE_VALUES
3794
74.9k
    0U, // G_BUILD_VECTOR
3795
74.9k
    0U, // G_BUILD_VECTOR_TRUNC
3796
74.9k
    0U, // G_CONCAT_VECTORS
3797
74.9k
    0U, // G_PTRTOINT
3798
74.9k
    0U, // G_INTTOPTR
3799
74.9k
    0U, // G_BITCAST
3800
74.9k
    0U, // G_FREEZE
3801
74.9k
    0U, // G_CONSTANT_FOLD_BARRIER
3802
74.9k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
3803
74.9k
    0U, // G_INTRINSIC_TRUNC
3804
74.9k
    0U, // G_INTRINSIC_ROUND
3805
74.9k
    0U, // G_INTRINSIC_LRINT
3806
74.9k
    0U, // G_INTRINSIC_ROUNDEVEN
3807
74.9k
    0U, // G_READCYCLECOUNTER
3808
74.9k
    0U, // G_LOAD
3809
74.9k
    0U, // G_SEXTLOAD
3810
74.9k
    0U, // G_ZEXTLOAD
3811
74.9k
    0U, // G_INDEXED_LOAD
3812
74.9k
    0U, // G_INDEXED_SEXTLOAD
3813
74.9k
    0U, // G_INDEXED_ZEXTLOAD
3814
74.9k
    0U, // G_STORE
3815
74.9k
    0U, // G_INDEXED_STORE
3816
74.9k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
3817
74.9k
    0U, // G_ATOMIC_CMPXCHG
3818
74.9k
    0U, // G_ATOMICRMW_XCHG
3819
74.9k
    0U, // G_ATOMICRMW_ADD
3820
74.9k
    0U, // G_ATOMICRMW_SUB
3821
74.9k
    0U, // G_ATOMICRMW_AND
3822
74.9k
    0U, // G_ATOMICRMW_NAND
3823
74.9k
    0U, // G_ATOMICRMW_OR
3824
74.9k
    0U, // G_ATOMICRMW_XOR
3825
74.9k
    0U, // G_ATOMICRMW_MAX
3826
74.9k
    0U, // G_ATOMICRMW_MIN
3827
74.9k
    0U, // G_ATOMICRMW_UMAX
3828
74.9k
    0U, // G_ATOMICRMW_UMIN
3829
74.9k
    0U, // G_ATOMICRMW_FADD
3830
74.9k
    0U, // G_ATOMICRMW_FSUB
3831
74.9k
    0U, // G_ATOMICRMW_FMAX
3832
74.9k
    0U, // G_ATOMICRMW_FMIN
3833
74.9k
    0U, // G_ATOMICRMW_UINC_WRAP
3834
74.9k
    0U, // G_ATOMICRMW_UDEC_WRAP
3835
74.9k
    0U, // G_FENCE
3836
74.9k
    0U, // G_PREFETCH
3837
74.9k
    0U, // G_BRCOND
3838
74.9k
    0U, // G_BRINDIRECT
3839
74.9k
    0U, // G_INVOKE_REGION_START
3840
74.9k
    0U, // G_INTRINSIC
3841
74.9k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
3842
74.9k
    0U, // G_INTRINSIC_CONVERGENT
3843
74.9k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
3844
74.9k
    0U, // G_ANYEXT
3845
74.9k
    0U, // G_TRUNC
3846
74.9k
    0U, // G_CONSTANT
3847
74.9k
    0U, // G_FCONSTANT
3848
74.9k
    0U, // G_VASTART
3849
74.9k
    0U, // G_VAARG
3850
74.9k
    0U, // G_SEXT
3851
74.9k
    0U, // G_SEXT_INREG
3852
74.9k
    0U, // G_ZEXT
3853
74.9k
    0U, // G_SHL
3854
74.9k
    0U, // G_LSHR
3855
74.9k
    0U, // G_ASHR
3856
74.9k
    0U, // G_FSHL
3857
74.9k
    0U, // G_FSHR
3858
74.9k
    0U, // G_ROTR
3859
74.9k
    0U, // G_ROTL
3860
74.9k
    0U, // G_ICMP
3861
74.9k
    0U, // G_FCMP
3862
74.9k
    0U, // G_SELECT
3863
74.9k
    0U, // G_UADDO
3864
74.9k
    0U, // G_UADDE
3865
74.9k
    0U, // G_USUBO
3866
74.9k
    0U, // G_USUBE
3867
74.9k
    0U, // G_SADDO
3868
74.9k
    0U, // G_SADDE
3869
74.9k
    0U, // G_SSUBO
3870
74.9k
    0U, // G_SSUBE
3871
74.9k
    0U, // G_UMULO
3872
74.9k
    0U, // G_SMULO
3873
74.9k
    0U, // G_UMULH
3874
74.9k
    0U, // G_SMULH
3875
74.9k
    0U, // G_UADDSAT
3876
74.9k
    0U, // G_SADDSAT
3877
74.9k
    0U, // G_USUBSAT
3878
74.9k
    0U, // G_SSUBSAT
3879
74.9k
    0U, // G_USHLSAT
3880
74.9k
    0U, // G_SSHLSAT
3881
74.9k
    0U, // G_SMULFIX
3882
74.9k
    0U, // G_UMULFIX
3883
74.9k
    0U, // G_SMULFIXSAT
3884
74.9k
    0U, // G_UMULFIXSAT
3885
74.9k
    0U, // G_SDIVFIX
3886
74.9k
    0U, // G_UDIVFIX
3887
74.9k
    0U, // G_SDIVFIXSAT
3888
74.9k
    0U, // G_UDIVFIXSAT
3889
74.9k
    0U, // G_FADD
3890
74.9k
    0U, // G_FSUB
3891
74.9k
    0U, // G_FMUL
3892
74.9k
    0U, // G_FMA
3893
74.9k
    0U, // G_FMAD
3894
74.9k
    0U, // G_FDIV
3895
74.9k
    0U, // G_FREM
3896
74.9k
    0U, // G_FPOW
3897
74.9k
    0U, // G_FPOWI
3898
74.9k
    0U, // G_FEXP
3899
74.9k
    0U, // G_FEXP2
3900
74.9k
    0U, // G_FEXP10
3901
74.9k
    0U, // G_FLOG
3902
74.9k
    0U, // G_FLOG2
3903
74.9k
    0U, // G_FLOG10
3904
74.9k
    0U, // G_FLDEXP
3905
74.9k
    0U, // G_FFREXP
3906
74.9k
    0U, // G_FNEG
3907
74.9k
    0U, // G_FPEXT
3908
74.9k
    0U, // G_FPTRUNC
3909
74.9k
    0U, // G_FPTOSI
3910
74.9k
    0U, // G_FPTOUI
3911
74.9k
    0U, // G_SITOFP
3912
74.9k
    0U, // G_UITOFP
3913
74.9k
    0U, // G_FABS
3914
74.9k
    0U, // G_FCOPYSIGN
3915
74.9k
    0U, // G_IS_FPCLASS
3916
74.9k
    0U, // G_FCANONICALIZE
3917
74.9k
    0U, // G_FMINNUM
3918
74.9k
    0U, // G_FMAXNUM
3919
74.9k
    0U, // G_FMINNUM_IEEE
3920
74.9k
    0U, // G_FMAXNUM_IEEE
3921
74.9k
    0U, // G_FMINIMUM
3922
74.9k
    0U, // G_FMAXIMUM
3923
74.9k
    0U, // G_GET_FPENV
3924
74.9k
    0U, // G_SET_FPENV
3925
74.9k
    0U, // G_RESET_FPENV
3926
74.9k
    0U, // G_GET_FPMODE
3927
74.9k
    0U, // G_SET_FPMODE
3928
74.9k
    0U, // G_RESET_FPMODE
3929
74.9k
    0U, // G_PTR_ADD
3930
74.9k
    0U, // G_PTRMASK
3931
74.9k
    0U, // G_SMIN
3932
74.9k
    0U, // G_SMAX
3933
74.9k
    0U, // G_UMIN
3934
74.9k
    0U, // G_UMAX
3935
74.9k
    0U, // G_ABS
3936
74.9k
    0U, // G_LROUND
3937
74.9k
    0U, // G_LLROUND
3938
74.9k
    0U, // G_BR
3939
74.9k
    0U, // G_BRJT
3940
74.9k
    0U, // G_INSERT_VECTOR_ELT
3941
74.9k
    0U, // G_EXTRACT_VECTOR_ELT
3942
74.9k
    0U, // G_SHUFFLE_VECTOR
3943
74.9k
    0U, // G_CTTZ
3944
74.9k
    0U, // G_CTTZ_ZERO_UNDEF
3945
74.9k
    0U, // G_CTLZ
3946
74.9k
    0U, // G_CTLZ_ZERO_UNDEF
3947
74.9k
    0U, // G_CTPOP
3948
74.9k
    0U, // G_BSWAP
3949
74.9k
    0U, // G_BITREVERSE
3950
74.9k
    0U, // G_FCEIL
3951
74.9k
    0U, // G_FCOS
3952
74.9k
    0U, // G_FSIN
3953
74.9k
    0U, // G_FSQRT
3954
74.9k
    0U, // G_FFLOOR
3955
74.9k
    0U, // G_FRINT
3956
74.9k
    0U, // G_FNEARBYINT
3957
74.9k
    0U, // G_ADDRSPACE_CAST
3958
74.9k
    0U, // G_BLOCK_ADDR
3959
74.9k
    0U, // G_JUMP_TABLE
3960
74.9k
    0U, // G_DYN_STACKALLOC
3961
74.9k
    0U, // G_STACKSAVE
3962
74.9k
    0U, // G_STACKRESTORE
3963
74.9k
    0U, // G_STRICT_FADD
3964
74.9k
    0U, // G_STRICT_FSUB
3965
74.9k
    0U, // G_STRICT_FMUL
3966
74.9k
    0U, // G_STRICT_FDIV
3967
74.9k
    0U, // G_STRICT_FREM
3968
74.9k
    0U, // G_STRICT_FMA
3969
74.9k
    0U, // G_STRICT_FSQRT
3970
74.9k
    0U, // G_STRICT_FLDEXP
3971
74.9k
    0U, // G_READ_REGISTER
3972
74.9k
    0U, // G_WRITE_REGISTER
3973
74.9k
    0U, // G_MEMCPY
3974
74.9k
    0U, // G_MEMCPY_INLINE
3975
74.9k
    0U, // G_MEMMOVE
3976
74.9k
    0U, // G_MEMSET
3977
74.9k
    0U, // G_BZERO
3978
74.9k
    0U, // G_VECREDUCE_SEQ_FADD
3979
74.9k
    0U, // G_VECREDUCE_SEQ_FMUL
3980
74.9k
    0U, // G_VECREDUCE_FADD
3981
74.9k
    0U, // G_VECREDUCE_FMUL
3982
74.9k
    0U, // G_VECREDUCE_FMAX
3983
74.9k
    0U, // G_VECREDUCE_FMIN
3984
74.9k
    0U, // G_VECREDUCE_FMAXIMUM
3985
74.9k
    0U, // G_VECREDUCE_FMINIMUM
3986
74.9k
    0U, // G_VECREDUCE_ADD
3987
74.9k
    0U, // G_VECREDUCE_MUL
3988
74.9k
    0U, // G_VECREDUCE_AND
3989
74.9k
    0U, // G_VECREDUCE_OR
3990
74.9k
    0U, // G_VECREDUCE_XOR
3991
74.9k
    0U, // G_VECREDUCE_SMAX
3992
74.9k
    0U, // G_VECREDUCE_SMIN
3993
74.9k
    0U, // G_VECREDUCE_UMAX
3994
74.9k
    0U, // G_VECREDUCE_UMIN
3995
74.9k
    0U, // G_SBFX
3996
74.9k
    0U, // G_UBFX
3997
74.9k
    0U, // ADJCALLSTACKDOWN
3998
74.9k
    0U, // ADJCALLSTACKUP
3999
74.9k
    0U, // ATOMIC_CMP_SWAP_16_P
4000
74.9k
    0U, // ATOMIC_CMP_SWAP_32_P
4001
74.9k
    0U, // ATOMIC_CMP_SWAP_8_P
4002
74.9k
    8U, // ATOMIC_LOAD_ADD_16_P
4003
74.9k
    8U, // ATOMIC_LOAD_ADD_32_P
4004
74.9k
    8U, // ATOMIC_LOAD_ADD_8_P
4005
74.9k
    8U, // ATOMIC_LOAD_AND_16_P
4006
74.9k
    8U, // ATOMIC_LOAD_AND_32_P
4007
74.9k
    8U, // ATOMIC_LOAD_AND_8_P
4008
74.9k
    8U, // ATOMIC_LOAD_MAX_16_P
4009
74.9k
    8U, // ATOMIC_LOAD_MAX_32_P
4010
74.9k
    8U, // ATOMIC_LOAD_MAX_8_P
4011
74.9k
    8U, // ATOMIC_LOAD_MIN_16_P
4012
74.9k
    8U, // ATOMIC_LOAD_MIN_32_P
4013
74.9k
    8U, // ATOMIC_LOAD_MIN_8_P
4014
74.9k
    8U, // ATOMIC_LOAD_NAND_16_P
4015
74.9k
    8U, // ATOMIC_LOAD_NAND_32_P
4016
74.9k
    8U, // ATOMIC_LOAD_NAND_8_P
4017
74.9k
    8U, // ATOMIC_LOAD_OR_16_P
4018
74.9k
    8U, // ATOMIC_LOAD_OR_32_P
4019
74.9k
    8U, // ATOMIC_LOAD_OR_8_P
4020
74.9k
    8U, // ATOMIC_LOAD_SUB_16_P
4021
74.9k
    8U, // ATOMIC_LOAD_SUB_32_P
4022
74.9k
    8U, // ATOMIC_LOAD_SUB_8_P
4023
74.9k
    8U, // ATOMIC_LOAD_UMAX_16_P
4024
74.9k
    8U, // ATOMIC_LOAD_UMAX_32_P
4025
74.9k
    8U, // ATOMIC_LOAD_UMAX_8_P
4026
74.9k
    8U, // ATOMIC_LOAD_UMIN_16_P
4027
74.9k
    8U, // ATOMIC_LOAD_UMIN_32_P
4028
74.9k
    8U, // ATOMIC_LOAD_UMIN_8_P
4029
74.9k
    8U, // ATOMIC_LOAD_XOR_16_P
4030
74.9k
    8U, // ATOMIC_LOAD_XOR_32_P
4031
74.9k
    8U, // ATOMIC_LOAD_XOR_8_P
4032
74.9k
    8U, // ATOMIC_SWAP_16_P
4033
74.9k
    8U, // ATOMIC_SWAP_32_P
4034
74.9k
    8U, // ATOMIC_SWAP_8_P
4035
74.9k
    64U,  // BRCC_FP
4036
74.9k
    0U, // BR_JT
4037
74.9k
    0U, // CONSTPOOL_ENTRY
4038
74.9k
    8U, // EE_ANDQ_P
4039
74.9k
    0U, // EE_BITREV_P
4040
74.9k
    1152U,  // EE_CMUL_S16_LD_INCP_P
4041
74.9k
    192U, // EE_CMUL_S16_P
4042
74.9k
    1152U,  // EE_CMUL_S16_ST_INCP_P
4043
74.9k
    1152U,  // EE_FFT_AMS_S16_LD_INCP_P
4044
74.9k
    1152U,  // EE_FFT_AMS_S16_LD_INCP_UAUP_P
4045
74.9k
    1152U,  // EE_FFT_AMS_S16_LD_R32_DECP_P
4046
74.9k
    1024U,  // EE_FFT_AMS_S16_ST_INCP_P
4047
74.9k
    1152U,  // EE_FFT_CMUL_S16_LD_XP_P
4048
74.9k
    3072U,  // EE_FFT_CMUL_S16_ST_XP_P
4049
74.9k
    5248U,  // EE_FFT_R2BF_S16_P
4050
74.9k
    7168U,  // EE_FFT_R2BF_S16_ST_INCP_P
4051
74.9k
    0U, // EE_FFT_VST_R32_DECP_P
4052
74.9k
    3072U,  // EE_LDF_128_IP_P
4053
74.9k
    3072U,  // EE_LDF_128_XP_P
4054
74.9k
    256U, // EE_LDF_64_IP_P
4055
74.9k
    0U, // EE_LDF_64_XP_P
4056
74.9k
    0U, // EE_LDQA_S16_128_IP_P
4057
74.9k
    0U, // EE_LDQA_S16_128_XP_P
4058
74.9k
    0U, // EE_LDQA_S8_128_IP_P
4059
74.9k
    0U, // EE_LDQA_S8_128_XP_P
4060
74.9k
    0U, // EE_LDQA_U16_128_IP_P
4061
74.9k
    0U, // EE_LDQA_U16_128_XP_P
4062
74.9k
    0U, // EE_LDQA_U8_128_IP_P
4063
74.9k
    0U, // EE_LDQA_U8_128_XP_P
4064
74.9k
    9408U,  // EE_LDXQ_32_P
4065
74.9k
    8U, // EE_LD_128_USAR_IP_P
4066
74.9k
    8U, // EE_LD_128_USAR_XP_P
4067
74.9k
    0U, // EE_LD_ACCX_IP_P
4068
74.9k
    0U, // EE_LD_QACC_H_H_32_IP_P
4069
74.9k
    0U, // EE_LD_QACC_H_L_128_IP_P
4070
74.9k
    0U, // EE_LD_QACC_L_H_32_IP_P
4071
74.9k
    0U, // EE_LD_QACC_L_L_128_IP_P
4072
74.9k
    0U, // EE_LD_UA_STATE_IP_P
4073
74.9k
    0U, // EE_MOVI_32_A_P
4074
74.9k
    0U, // EE_MOVI_32_Q_P
4075
74.9k
    0U, // EE_MOV_S16_QACC_P
4076
74.9k
    0U, // EE_MOV_S8_QACC_P
4077
74.9k
    0U, // EE_MOV_U16_QACC_P
4078
74.9k
    0U, // EE_MOV_U8_QACC_P
4079
74.9k
    0U, // EE_NOTQ_P
4080
74.9k
    8U, // EE_ORQ_P
4081
74.9k
    0U, // EE_SLCI_2Q_P
4082
74.9k
    0U, // EE_SLCXXP_2Q_P
4083
74.9k
    0U, // EE_SRCI_2Q_P
4084
74.9k
    0U, // EE_SRCMB_S16_QACC_P
4085
74.9k
    0U, // EE_SRCMB_S8_QACC_P
4086
74.9k
    8U, // EE_SRCQ_128_ST_INCP_P
4087
74.9k
    0U, // EE_SRCXXP_2Q_P
4088
74.9k
    33920U, // EE_SRC_Q_LD_IP_P
4089
74.9k
    33920U, // EE_SRC_Q_LD_XP_P
4090
74.9k
    8U, // EE_SRC_Q_P
4091
74.9k
    8U, // EE_SRC_Q_QUP_P
4092
74.9k
    0U, // EE_SRS_ACCX_P
4093
74.9k
    3072U,  // EE_STF_128_IP_P
4094
74.9k
    3072U,  // EE_STF_128_XP_P
4095
74.9k
    256U, // EE_STF_64_IP_P
4096
74.9k
    0U, // EE_STF_64_XP_P
4097
74.9k
    9408U,  // EE_STXQ_32_P
4098
74.9k
    0U, // EE_ST_ACCX_IP_P
4099
74.9k
    0U, // EE_ST_QACC_H_H_32_IP_P
4100
74.9k
    0U, // EE_ST_QACC_H_L_128_IP_P
4101
74.9k
    0U, // EE_ST_QACC_L_H_32_IP_P
4102
74.9k
    0U, // EE_ST_QACC_L_L_128_IP_P
4103
74.9k
    0U, // EE_ST_UA_STATE_IP_P
4104
74.9k
    33920U, // EE_VADDS_S16_LD_INCP_P
4105
74.9k
    8U, // EE_VADDS_S16_P
4106
74.9k
    33920U, // EE_VADDS_S16_ST_INCP_P
4107
74.9k
    33920U, // EE_VADDS_S32_LD_INCP_P
4108
74.9k
    8U, // EE_VADDS_S32_P
4109
74.9k
    33920U, // EE_VADDS_S32_ST_INCP_P
4110
74.9k
    33920U, // EE_VADDS_S8_LD_INCP_P
4111
74.9k
    8U, // EE_VADDS_S8_P
4112
74.9k
    33920U, // EE_VADDS_S8_ST_INCP_P
4113
74.9k
    8U, // EE_VCMP_EQ_S16_P
4114
74.9k
    8U, // EE_VCMP_EQ_S32_P
4115
74.9k
    8U, // EE_VCMP_EQ_S8_P
4116
74.9k
    8U, // EE_VCMP_GT_S16_P
4117
74.9k
    8U, // EE_VCMP_GT_S32_P
4118
74.9k
    8U, // EE_VCMP_GT_S8_P
4119
74.9k
    8U, // EE_VCMP_LT_S16_P
4120
74.9k
    8U, // EE_VCMP_LT_S32_P
4121
74.9k
    8U, // EE_VCMP_LT_S8_P
4122
74.9k
    0U, // EE_VLDBC_16_IP_P
4123
74.9k
    0U, // EE_VLDBC_16_P
4124
74.9k
    8U, // EE_VLDBC_16_XP_P
4125
74.9k
    0U, // EE_VLDBC_32_IP_P
4126
74.9k
    0U, // EE_VLDBC_32_P
4127
74.9k
    8U, // EE_VLDBC_32_XP_P
4128
74.9k
    1U, // EE_VLDBC_8_IP_P
4129
74.9k
    0U, // EE_VLDBC_8_P
4130
74.9k
    8U, // EE_VLDBC_8_XP_P
4131
74.9k
    8U, // EE_VLDHBC_16_INCP_P
4132
74.9k
    8U, // EE_VLD_128_IP_P
4133
74.9k
    8U, // EE_VLD_128_XP_P
4134
74.9k
    1U, // EE_VLD_H_64_IP_P
4135
74.9k
    8U, // EE_VLD_H_64_XP_P
4136
74.9k
    1U, // EE_VLD_L_64_IP_P
4137
74.9k
    8U, // EE_VLD_L_64_XP_P
4138
74.9k
    33920U, // EE_VMAX_S16_LD_INCP_P
4139
74.9k
    8U, // EE_VMAX_S16_P
4140
74.9k
    33920U, // EE_VMAX_S16_ST_INCP_P
4141
74.9k
    33920U, // EE_VMAX_S32_LD_INCP_P
4142
74.9k
    8U, // EE_VMAX_S32_P
4143
74.9k
    33920U, // EE_VMAX_S32_ST_INCP_P
4144
74.9k
    33920U, // EE_VMAX_S8_LD_INCP_P
4145
74.9k
    8U, // EE_VMAX_S8_P
4146
74.9k
    33920U, // EE_VMAX_S8_ST_INCP_P
4147
74.9k
    33920U, // EE_VMIN_S16_LD_INCP_P
4148
74.9k
    8U, // EE_VMIN_S16_P
4149
74.9k
    33920U, // EE_VMIN_S16_ST_INCP_P
4150
74.9k
    33920U, // EE_VMIN_S32_LD_INCP_P
4151
74.9k
    8U, // EE_VMIN_S32_P
4152
74.9k
    33920U, // EE_VMIN_S32_ST_INCP_P
4153
74.9k
    33920U, // EE_VMIN_S8_LD_INCP_P
4154
74.9k
    8U, // EE_VMIN_S8_P
4155
74.9k
    33920U, // EE_VMIN_S8_ST_INCP_P
4156
74.9k
    9U, // EE_VMULAS_S16_ACCX_LD_IP_P
4157
74.9k
    321U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
4158
74.9k
    33920U, // EE_VMULAS_S16_ACCX_LD_XP_P
4159
74.9k
    1152U,  // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
4160
74.9k
    0U, // EE_VMULAS_S16_ACCX_P
4161
74.9k
    128U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
4162
74.9k
    1152U,  // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
4163
74.9k
    9U, // EE_VMULAS_S16_QACC_LD_IP_P
4164
74.9k
    321U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P
4165
74.9k
    33920U, // EE_VMULAS_S16_QACC_LD_XP_P
4166
74.9k
    1152U,  // EE_VMULAS_S16_QACC_LD_XP_QUP_P
4167
74.9k
    0U, // EE_VMULAS_S16_QACC_P
4168
74.9k
    9U, // EE_VMULAS_S8_ACCX_LD_IP_P
4169
74.9k
    321U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
4170
74.9k
    33920U, // EE_VMULAS_S8_ACCX_LD_XP_P
4171
74.9k
    1152U,  // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
4172
74.9k
    0U, // EE_VMULAS_S8_ACCX_P
4173
74.9k
    128U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
4174
74.9k
    1152U,  // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
4175
74.9k
    9U, // EE_VMULAS_S8_QACC_LD_IP_P
4176
74.9k
    321U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P
4177
74.9k
    33920U, // EE_VMULAS_S8_QACC_LD_XP_P
4178
74.9k
    1152U,  // EE_VMULAS_S8_QACC_LD_XP_QUP_P
4179
74.9k
    0U, // EE_VMULAS_S8_QACC_P
4180
74.9k
    9U, // EE_VMULAS_U16_ACCX_LD_IP_P
4181
74.9k
    321U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
4182
74.9k
    33920U, // EE_VMULAS_U16_ACCX_LD_XP_P
4183
74.9k
    1152U,  // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
4184
74.9k
    0U, // EE_VMULAS_U16_ACCX_P
4185
74.9k
    128U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
4186
74.9k
    1152U,  // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
4187
74.9k
    9U, // EE_VMULAS_U16_QACC_LD_IP_P
4188
74.9k
    321U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P
4189
74.9k
    33920U, // EE_VMULAS_U16_QACC_LD_XP_P
4190
74.9k
    1152U,  // EE_VMULAS_U16_QACC_LD_XP_QUP_P
4191
74.9k
    0U, // EE_VMULAS_U16_QACC_P
4192
74.9k
    9U, // EE_VMULAS_U8_ACCX_LD_IP_P
4193
74.9k
    321U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
4194
74.9k
    33920U, // EE_VMULAS_U8_ACCX_LD_XP_P
4195
74.9k
    1152U,  // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
4196
74.9k
    0U, // EE_VMULAS_U8_ACCX_P
4197
74.9k
    128U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
4198
74.9k
    1152U,  // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
4199
74.9k
    9U, // EE_VMULAS_U8_QACC_LD_IP_P
4200
74.9k
    321U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P
4201
74.9k
    33920U, // EE_VMULAS_U8_QACC_LD_XP_P
4202
74.9k
    1152U,  // EE_VMULAS_U8_QACC_LD_XP_QUP_P
4203
74.9k
    0U, // EE_VMULAS_U8_QACC_P
4204
74.9k
    33920U, // EE_VMUL_S16_LD_INCP_P
4205
74.9k
    8U, // EE_VMUL_S16_P
4206
74.9k
    33920U, // EE_VMUL_S16_ST_INCP_P
4207
74.9k
    33920U, // EE_VMUL_S8_LD_INCP_P
4208
74.9k
    8U, // EE_VMUL_S8_P
4209
74.9k
    33920U, // EE_VMUL_S8_ST_INCP_P
4210
74.9k
    33920U, // EE_VMUL_U16_LD_INCP_P
4211
74.9k
    8U, // EE_VMUL_U16_P
4212
74.9k
    33920U, // EE_VMUL_U16_ST_INCP_P
4213
74.9k
    33920U, // EE_VMUL_U8_LD_INCP_P
4214
74.9k
    8U, // EE_VMUL_U8_P
4215
74.9k
    33920U, // EE_VMUL_U8_ST_INCP_P
4216
74.9k
    0U, // EE_VPRELU_S16_P
4217
74.9k
    0U, // EE_VPRELU_S8_P
4218
74.9k
    8U, // EE_VRELU_S16_P
4219
74.9k
    8U, // EE_VRELU_S8_P
4220
74.9k
    0U, // EE_VSL_32_P
4221
74.9k
    9344U,  // EE_VSMULAS_S16_QACC_LD_INCP_P
4222
74.9k
    1U, // EE_VSMULAS_S16_QACC_P
4223
74.9k
    11392U, // EE_VSMULAS_S8_QACC_LD_INCP_P
4224
74.9k
    0U, // EE_VSMULAS_S8_QACC_P
4225
74.9k
    0U, // EE_VSR_32_P
4226
74.9k
    8U, // EE_VST_128_IP_P
4227
74.9k
    8U, // EE_VST_128_XP_P
4228
74.9k
    1U, // EE_VST_H_64_IP_P
4229
74.9k
    8U, // EE_VST_H_64_XP_P
4230
74.9k
    1U, // EE_VST_L_64_IP_P
4231
74.9k
    8U, // EE_VST_L_64_XP_P
4232
74.9k
    33920U, // EE_VSUBS_S16_LD_INCP_P
4233
74.9k
    8U, // EE_VSUBS_S16_P
4234
74.9k
    33920U, // EE_VSUBS_S16_ST_INCP_P
4235
74.9k
    33920U, // EE_VSUBS_S32_LD_INCP_P
4236
74.9k
    8U, // EE_VSUBS_S32_P
4237
74.9k
    33920U, // EE_VSUBS_S32_ST_INCP_P
4238
74.9k
    33920U, // EE_VSUBS_S8_LD_INCP_P
4239
74.9k
    8U, // EE_VSUBS_S8_P
4240
74.9k
    33920U, // EE_VSUBS_S8_ST_INCP_P
4241
74.9k
    0U, // EE_VUNZIP_16_P
4242
74.9k
    0U, // EE_VUNZIP_32_P
4243
74.9k
    0U, // EE_VUNZIP_8_P
4244
74.9k
    0U, // EE_VZIP_16_P
4245
74.9k
    0U, // EE_VZIP_32_P
4246
74.9k
    0U, // EE_VZIP_8_P
4247
74.9k
    8U, // EE_XORQ_P
4248
74.9k
    0U, // EE_ZERO_ACCX_P
4249
74.9k
    0U, // EE_ZERO_QACC_P
4250
74.9k
    0U, // EE_ZERO_Q_P
4251
74.9k
    8U, // EXTUI_BR2_P
4252
74.9k
    8U, // EXTUI_BR4_P
4253
74.9k
    8U, // EXTUI_BR_P
4254
74.9k
    0U, // L8I_P
4255
74.9k
    0U, // LDDEC_P
4256
74.9k
    0U, // LDINC_P
4257
74.9k
    0U, // LOOPBR
4258
74.9k
    0U, // LOOPDEC
4259
74.9k
    0U, // LOOPEND
4260
74.9k
    0U, // LOOPINIT
4261
74.9k
    0U, // LOOPSTART
4262
74.9k
    0U, // MOVBA2_P
4263
74.9k
    0U, // MOVBA2_P2
4264
74.9k
    0U, // MOVBA4_P
4265
74.9k
    0U, // MOVBA4_P2
4266
74.9k
    0U, // MOVBA_P
4267
74.9k
    0U, // MOVBA_P2
4268
74.9k
    0U, // MULA_DA_HH_LDDEC_P
4269
74.9k
    0U, // MULA_DA_HH_LDINC_P
4270
74.9k
    0U, // MULA_DA_HL_LDDEC_P
4271
74.9k
    0U, // MULA_DA_HL_LDINC_P
4272
74.9k
    0U, // MULA_DA_LH_LDDEC_P
4273
74.9k
    0U, // MULA_DA_LH_LDINC_P
4274
74.9k
    0U, // MULA_DA_LL_LDDEC_P
4275
74.9k
    0U, // MULA_DA_LL_LDINC_P
4276
74.9k
    128U, // MULA_DD_HH_LDDEC_P
4277
74.9k
    128U, // MULA_DD_HH_LDINC_P
4278
74.9k
    128U, // MULA_DD_HL_LDDEC_P
4279
74.9k
    128U, // MULA_DD_HL_LDINC_P
4280
74.9k
    128U, // MULA_DD_LH_LDDEC_P
4281
74.9k
    128U, // MULA_DD_LH_LDINC_P
4282
74.9k
    128U, // MULA_DD_LL_LDDEC_P
4283
74.9k
    128U, // MULA_DD_LL_LDINC_P
4284
74.9k
    0U, // RESTORE_BOOL
4285
74.9k
    3072U,  // SELECT
4286
74.9k
    3072U,  // SELECT_CC_FP_FP
4287
74.9k
    3072U,  // SELECT_CC_FP_INT
4288
74.9k
    3072U,  // SELECT_CC_INT_FP
4289
74.9k
    8U, // SLLI_BR_P
4290
74.9k
    8U, // SLL_P
4291
74.9k
    0U, // SPILL_BOOL
4292
74.9k
    8U, // SRA_P
4293
74.9k
    8U, // SRL_P
4294
74.9k
    0U, // WSR_ACCHI_P
4295
74.9k
    0U, // WSR_ACCLO_P
4296
74.9k
    0U, // WSR_M0_P
4297
74.9k
    0U, // WSR_M1_P
4298
74.9k
    0U, // WSR_M2_P
4299
74.9k
    0U, // WSR_M3_P
4300
74.9k
    0U, // XSR_ACCHI_P
4301
74.9k
    0U, // XSR_ACCLO_P
4302
74.9k
    0U, // XSR_M0_P
4303
74.9k
    0U, // XSR_M1_P
4304
74.9k
    0U, // XSR_M2_P
4305
74.9k
    0U, // XSR_M3_P
4306
74.9k
    0U, // mv_QR_P
4307
74.9k
    0U, // ABS
4308
74.9k
    0U, // ABS_S
4309
74.9k
    8U, // ADD
4310
74.9k
    0U, // ADDEXPM_S
4311
74.9k
    0U, // ADDEXP_S
4312
74.9k
    8U, // ADDI
4313
74.9k
    1U, // ADDI_N
4314
74.9k
    1U, // ADDMI
4315
74.9k
    8U, // ADDX2
4316
74.9k
    8U, // ADDX4
4317
74.9k
    8U, // ADDX8
4318
74.9k
    8U, // ADD_N
4319
74.9k
    8U, // ADD_S
4320
74.9k
    0U, // AE_ABS16S
4321
74.9k
    0U, // AE_ABS24S
4322
74.9k
    0U, // AE_ABS32
4323
74.9k
    0U, // AE_ABS32S
4324
74.9k
    0U, // AE_ABS64
4325
74.9k
    0U, // AE_ABS64S
4326
74.9k
    8U, // AE_ADD16
4327
74.9k
    8U, // AE_ADD16S
4328
74.9k
    8U, // AE_ADD24S
4329
74.9k
    8U, // AE_ADD32
4330
74.9k
    8U, // AE_ADD32S
4331
74.9k
    8U, // AE_ADD32_HL_LH
4332
74.9k
    8U, // AE_ADD64
4333
74.9k
    8U, // AE_ADD64S
4334
74.9k
    8U, // AE_ADDBRBA32
4335
74.9k
    8U, // AE_ADDSUB32
4336
74.9k
    8U, // AE_ADDSUB32S
4337
74.9k
    8U, // AE_AND
4338
74.9k
    0U, // AE_CVT32X2F16_10
4339
74.9k
    0U, // AE_CVT32X2F16_32
4340
74.9k
    0U, // AE_CVT48A32
4341
74.9k
    0U, // AE_CVT64A32
4342
74.9k
    0U, // AE_CVT64F32_H
4343
74.9k
    0U, // AE_CVTA32F24S_H
4344
74.9k
    0U, // AE_CVTA32F24S_L
4345
74.9k
    0U, // AE_CVTQ56A32S
4346
74.9k
    0U, // AE_CVTQ56P32S_H
4347
74.9k
    0U, // AE_CVTQ56P32S_L
4348
74.9k
    0U, // AE_DB
4349
74.9k
    0U, // AE_DBI
4350
74.9k
    0U, // AE_DBI_IC
4351
74.9k
    0U, // AE_DBI_IP
4352
74.9k
    0U, // AE_DB_IC
4353
74.9k
    0U, // AE_DB_IP
4354
74.9k
    0U, // AE_DIV64D32_H
4355
74.9k
    0U, // AE_DIV64D32_L
4356
74.9k
    8U, // AE_EQ16
4357
74.9k
    8U, // AE_EQ32
4358
74.9k
    8U, // AE_EQ64
4359
74.9k
    1U, // AE_L16M_I
4360
74.9k
    1U, // AE_L16M_IU
4361
74.9k
    8U, // AE_L16M_X
4362
74.9k
    10U,  // AE_L16M_XC
4363
74.9k
    10U,  // AE_L16M_XU
4364
74.9k
    2U, // AE_L16X2M_I
4365
74.9k
    2U, // AE_L16X2M_IU
4366
74.9k
    8U, // AE_L16X2M_X
4367
74.9k
    10U,  // AE_L16X2M_XC
4368
74.9k
    10U,  // AE_L16X2M_XU
4369
74.9k
    2U, // AE_L16X4_I
4370
74.9k
    2U, // AE_L16X4_IP
4371
74.9k
    0U, // AE_L16X4_RIC
4372
74.9k
    0U, // AE_L16X4_RIP
4373
74.9k
    8U, // AE_L16X4_X
4374
74.9k
    10U,  // AE_L16X4_XC
4375
74.9k
    10U,  // AE_L16X4_XP
4376
74.9k
    1U, // AE_L16_I
4377
74.9k
    1U, // AE_L16_IP
4378
74.9k
    8U, // AE_L16_X
4379
74.9k
    10U,  // AE_L16_XC
4380
74.9k
    10U,  // AE_L16_XP
4381
74.9k
    2U, // AE_L32F24_I
4382
74.9k
    2U, // AE_L32F24_IP
4383
74.9k
    8U, // AE_L32F24_X
4384
74.9k
    10U,  // AE_L32F24_XC
4385
74.9k
    10U,  // AE_L32F24_XP
4386
74.9k
    2U, // AE_L32M_I
4387
74.9k
    2U, // AE_L32M_IU
4388
74.9k
    8U, // AE_L32M_X
4389
74.9k
    10U,  // AE_L32M_XC
4390
74.9k
    10U,  // AE_L32M_XU
4391
74.9k
    2U, // AE_L32X2F24_I
4392
74.9k
    2U, // AE_L32X2F24_IP
4393
74.9k
    0U, // AE_L32X2F24_RIC
4394
74.9k
    0U, // AE_L32X2F24_RIP
4395
74.9k
    8U, // AE_L32X2F24_X
4396
74.9k
    10U,  // AE_L32X2F24_XC
4397
74.9k
    10U,  // AE_L32X2F24_XP
4398
74.9k
    2U, // AE_L32X2_I
4399
74.9k
    2U, // AE_L32X2_IP
4400
74.9k
    0U, // AE_L32X2_RIC
4401
74.9k
    0U, // AE_L32X2_RIP
4402
74.9k
    8U, // AE_L32X2_X
4403
74.9k
    10U,  // AE_L32X2_XC
4404
74.9k
    10U,  // AE_L32X2_XP
4405
74.9k
    2U, // AE_L32_I
4406
74.9k
    2U, // AE_L32_IP
4407
74.9k
    8U, // AE_L32_X
4408
74.9k
    10U,  // AE_L32_XC
4409
74.9k
    10U,  // AE_L32_XP
4410
74.9k
    2U, // AE_L64_I
4411
74.9k
    2U, // AE_L64_IP
4412
74.9k
    8U, // AE_L64_X
4413
74.9k
    10U,  // AE_L64_XC
4414
74.9k
    10U,  // AE_L64_XP
4415
74.9k
    0U, // AE_LA16X4NEG_PC
4416
74.9k
    0U, // AE_LA16X4POS_PC
4417
74.9k
    2U, // AE_LA16X4_IC
4418
74.9k
    2U, // AE_LA16X4_IP
4419
74.9k
    2U, // AE_LA16X4_RIC
4420
74.9k
    2U, // AE_LA16X4_RIP
4421
74.9k
    0U, // AE_LA24NEG_PC
4422
74.9k
    0U, // AE_LA24POS_PC
4423
74.9k
    0U, // AE_LA24X2NEG_PC
4424
74.9k
    0U, // AE_LA24X2POS_PC
4425
74.9k
    2U, // AE_LA24X2_IC
4426
74.9k
    2U, // AE_LA24X2_IP
4427
74.9k
    2U, // AE_LA24X2_RIC
4428
74.9k
    2U, // AE_LA24X2_RIP
4429
74.9k
    2U, // AE_LA24_IC
4430
74.9k
    2U, // AE_LA24_IP
4431
74.9k
    2U, // AE_LA24_RIC
4432
74.9k
    2U, // AE_LA24_RIP
4433
74.9k
    2U, // AE_LA32X2F24_IC
4434
74.9k
    2U, // AE_LA32X2F24_IP
4435
74.9k
    2U, // AE_LA32X2F24_RIC
4436
74.9k
    2U, // AE_LA32X2F24_RIP
4437
74.9k
    0U, // AE_LA32X2NEG_PC
4438
74.9k
    0U, // AE_LA32X2POS_PC
4439
74.9k
    2U, // AE_LA32X2_IC
4440
74.9k
    2U, // AE_LA32X2_IP
4441
74.9k
    2U, // AE_LA32X2_RIC
4442
74.9k
    2U, // AE_LA32X2_RIP
4443
74.9k
    0U, // AE_LA64_PP
4444
74.9k
    2U, // AE_LALIGN64_I
4445
74.9k
    0U, // AE_LB
4446
74.9k
    0U, // AE_LBI
4447
74.9k
    8U, // AE_LBK
4448
74.9k
    2U, // AE_LBKI
4449
74.9k
    0U, // AE_LBS
4450
74.9k
    0U, // AE_LBSI
4451
74.9k
    8U, // AE_LE16
4452
74.9k
    8U, // AE_LE32
4453
74.9k
    8U, // AE_LE64
4454
74.9k
    8U, // AE_LT16
4455
74.9k
    8U, // AE_LT32
4456
74.9k
    8U, // AE_LT64
4457
74.9k
    8U, // AE_MAX32
4458
74.9k
    8U, // AE_MAX64
4459
74.9k
    8U, // AE_MAXABS32S
4460
74.9k
    8U, // AE_MAXABS64S
4461
74.9k
    8U, // AE_MIN32
4462
74.9k
    8U, // AE_MIN64
4463
74.9k
    8U, // AE_MINABS32S
4464
74.9k
    8U, // AE_MINABS64S
4465
74.9k
    0U, // AE_MOV
4466
74.9k
    0U, // AE_MOVAD16_0
4467
74.9k
    0U, // AE_MOVAD16_1
4468
74.9k
    0U, // AE_MOVAD16_2
4469
74.9k
    0U, // AE_MOVAD16_3
4470
74.9k
    0U, // AE_MOVAD32_H
4471
74.9k
    0U, // AE_MOVAD32_L
4472
74.9k
    0U, // AE_MOVALIGN
4473
74.9k
    0U, // AE_MOVDA16
4474
74.9k
    8U, // AE_MOVDA16X2
4475
74.9k
    0U, // AE_MOVDA32
4476
74.9k
    8U, // AE_MOVDA32X2
4477
74.9k
    10U,  // AE_MOVF16X4
4478
74.9k
    10U,  // AE_MOVF32X2
4479
74.9k
    10U,  // AE_MOVF64
4480
74.9k
    0U, // AE_MOVI
4481
74.9k
    10U,  // AE_MOVT16X4
4482
74.9k
    10U,  // AE_MOVT32X2
4483
74.9k
    10U,  // AE_MOVT64
4484
74.9k
    0U, // AE_MUL16X4
4485
74.9k
    8U, // AE_MUL32U_LL
4486
74.9k
    8U, // AE_MUL32X16_H0
4487
74.9k
    8U, // AE_MUL32X16_H0_S2
4488
74.9k
    8U, // AE_MUL32X16_H1
4489
74.9k
    8U, // AE_MUL32X16_H1_S2
4490
74.9k
    8U, // AE_MUL32X16_H2
4491
74.9k
    8U, // AE_MUL32X16_H2_S2
4492
74.9k
    8U, // AE_MUL32X16_H3
4493
74.9k
    8U, // AE_MUL32X16_H3_S2
4494
74.9k
    8U, // AE_MUL32X16_L0
4495
74.9k
    8U, // AE_MUL32X16_L0_S2
4496
74.9k
    8U, // AE_MUL32X16_L1
4497
74.9k
    8U, // AE_MUL32X16_L1_S2
4498
74.9k
    8U, // AE_MUL32X16_L2
4499
74.9k
    8U, // AE_MUL32X16_L2_S2
4500
74.9k
    8U, // AE_MUL32X16_L3
4501
74.9k
    8U, // AE_MUL32X16_L3_S2
4502
74.9k
    8U, // AE_MUL32_HH
4503
74.9k
    8U, // AE_MUL32_LH
4504
74.9k
    8U, // AE_MUL32_LL
4505
74.9k
    8U, // AE_MUL32_LL_S2
4506
74.9k
    11U,  // AE_MULA16X4
4507
74.9k
    10U,  // AE_MULA32U_LL
4508
74.9k
    10U,  // AE_MULA32X16_H0
4509
74.9k
    10U,  // AE_MULA32X16_H0_S2
4510
74.9k
    10U,  // AE_MULA32X16_H1
4511
74.9k
    10U,  // AE_MULA32X16_H1_S2
4512
74.9k
    10U,  // AE_MULA32X16_H2
4513
74.9k
    10U,  // AE_MULA32X16_H2_S2
4514
74.9k
    10U,  // AE_MULA32X16_H3
4515
74.9k
    10U,  // AE_MULA32X16_H3_S2
4516
74.9k
    10U,  // AE_MULA32X16_L0
4517
74.9k
    10U,  // AE_MULA32X16_L0_S2
4518
74.9k
    10U,  // AE_MULA32X16_L1
4519
74.9k
    10U,  // AE_MULA32X16_L1_S2
4520
74.9k
    10U,  // AE_MULA32X16_L2
4521
74.9k
    10U,  // AE_MULA32X16_L2_S2
4522
74.9k
    10U,  // AE_MULA32X16_L3
4523
74.9k
    10U,  // AE_MULA32X16_L3_S2
4524
74.9k
    10U,  // AE_MULA32_HH
4525
74.9k
    10U,  // AE_MULA32_LH
4526
74.9k
    10U,  // AE_MULA32_LL
4527
74.9k
    10U,  // AE_MULA32_LL_S2
4528
74.9k
    10U,  // AE_MULAAD24_HH_LL
4529
74.9k
    10U,  // AE_MULAAD24_HH_LL_S2
4530
74.9k
    10U,  // AE_MULAAD24_HL_LH
4531
74.9k
    10U,  // AE_MULAAD24_HL_LH_S2
4532
74.9k
    10U,  // AE_MULAAD32X16_H0_L1
4533
74.9k
    10U,  // AE_MULAAD32X16_H0_L1_S2
4534
74.9k
    10U,  // AE_MULAAD32X16_H1_L0
4535
74.9k
    10U,  // AE_MULAAD32X16_H1_L0_S2
4536
74.9k
    10U,  // AE_MULAAD32X16_H2_L3
4537
74.9k
    10U,  // AE_MULAAD32X16_H2_L3_S2
4538
74.9k
    10U,  // AE_MULAAD32X16_H3_L2
4539
74.9k
    10U,  // AE_MULAAD32X16_H3_L2_S2
4540
74.9k
    10U,  // AE_MULAAFD16SS_11_00
4541
74.9k
    10U,  // AE_MULAAFD16SS_11_00_S2
4542
74.9k
    10U,  // AE_MULAAFD16SS_13_02
4543
74.9k
    10U,  // AE_MULAAFD16SS_13_02_S2
4544
74.9k
    10U,  // AE_MULAAFD16SS_33_22
4545
74.9k
    10U,  // AE_MULAAFD16SS_33_22_S2
4546
74.9k
    10U,  // AE_MULAAFD24_HH_LL
4547
74.9k
    10U,  // AE_MULAAFD24_HH_LL_S2
4548
74.9k
    10U,  // AE_MULAAFD24_HL_LH
4549
74.9k
    10U,  // AE_MULAAFD24_HL_LH_S2
4550
74.9k
    10U,  // AE_MULAAFD32X16_H0_L1
4551
74.9k
    10U,  // AE_MULAAFD32X16_H0_L1_S2
4552
74.9k
    10U,  // AE_MULAAFD32X16_H1_L0
4553
74.9k
    10U,  // AE_MULAAFD32X16_H1_L0_S2
4554
74.9k
    10U,  // AE_MULAAFD32X16_H2_L3
4555
74.9k
    10U,  // AE_MULAAFD32X16_H2_L3_S2
4556
74.9k
    10U,  // AE_MULAAFD32X16_H3_L2
4557
74.9k
    10U,  // AE_MULAAFD32X16_H3_L2_S2
4558
74.9k
    10U,  // AE_MULAC24
4559
74.9k
    10U,  // AE_MULAC32X16_H
4560
74.9k
    10U,  // AE_MULAC32X16_L
4561
74.9k
    10U,  // AE_MULAF16SS_00
4562
74.9k
    10U,  // AE_MULAF16SS_00_S2
4563
74.9k
    10U,  // AE_MULAF16SS_10
4564
74.9k
    10U,  // AE_MULAF16SS_11
4565
74.9k
    10U,  // AE_MULAF16SS_20
4566
74.9k
    10U,  // AE_MULAF16SS_21
4567
74.9k
    10U,  // AE_MULAF16SS_22
4568
74.9k
    10U,  // AE_MULAF16SS_30
4569
74.9k
    10U,  // AE_MULAF16SS_31
4570
74.9k
    10U,  // AE_MULAF16SS_32
4571
74.9k
    10U,  // AE_MULAF16SS_33
4572
74.9k
    11U,  // AE_MULAF16X4SS
4573
74.9k
    10U,  // AE_MULAF32R_HH
4574
74.9k
    10U,  // AE_MULAF32R_LH
4575
74.9k
    10U,  // AE_MULAF32R_LL
4576
74.9k
    10U,  // AE_MULAF32R_LL_S2
4577
74.9k
    10U,  // AE_MULAF32S_HH
4578
74.9k
    10U,  // AE_MULAF32S_LH
4579
74.9k
    10U,  // AE_MULAF32S_LL
4580
74.9k
    10U,  // AE_MULAF32S_LL_S2
4581
74.9k
    10U,  // AE_MULAF32X16_H0
4582
74.9k
    10U,  // AE_MULAF32X16_H0_S2
4583
74.9k
    10U,  // AE_MULAF32X16_H1
4584
74.9k
    10U,  // AE_MULAF32X16_H1_S2
4585
74.9k
    10U,  // AE_MULAF32X16_H2
4586
74.9k
    10U,  // AE_MULAF32X16_H2_S2
4587
74.9k
    10U,  // AE_MULAF32X16_H3
4588
74.9k
    10U,  // AE_MULAF32X16_H3_S2
4589
74.9k
    10U,  // AE_MULAF32X16_L0
4590
74.9k
    10U,  // AE_MULAF32X16_L0_S2
4591
74.9k
    10U,  // AE_MULAF32X16_L1
4592
74.9k
    10U,  // AE_MULAF32X16_L1_S2
4593
74.9k
    10U,  // AE_MULAF32X16_L2
4594
74.9k
    10U,  // AE_MULAF32X16_L2_S2
4595
74.9k
    10U,  // AE_MULAF32X16_L3
4596
74.9k
    10U,  // AE_MULAF32X16_L3_S2
4597
74.9k
    10U,  // AE_MULAF48Q32SP16S_L
4598
74.9k
    10U,  // AE_MULAF48Q32SP16S_L_S2
4599
74.9k
    10U,  // AE_MULAF48Q32SP16U_L
4600
74.9k
    10U,  // AE_MULAF48Q32SP16U_L_S2
4601
74.9k
    10U,  // AE_MULAFC24RA
4602
74.9k
    10U,  // AE_MULAFC32X16RAS_H
4603
74.9k
    10U,  // AE_MULAFC32X16RAS_L
4604
74.9k
    387U, // AE_MULAFD24X2_FIR_H
4605
74.9k
    387U, // AE_MULAFD24X2_FIR_L
4606
74.9k
    387U, // AE_MULAFD32X16X2_FIR_HH
4607
74.9k
    387U, // AE_MULAFD32X16X2_FIR_HL
4608
74.9k
    387U, // AE_MULAFD32X16X2_FIR_LH
4609
74.9k
    387U, // AE_MULAFD32X16X2_FIR_LL
4610
74.9k
    10U,  // AE_MULAFP24X2R
4611
74.9k
    10U,  // AE_MULAFP24X2RA
4612
74.9k
    10U,  // AE_MULAFP24X2RA_S2
4613
74.9k
    10U,  // AE_MULAFP24X2R_S2
4614
74.9k
    10U,  // AE_MULAFP32X16X2RAS_H
4615
74.9k
    10U,  // AE_MULAFP32X16X2RAS_H_S2
4616
74.9k
    10U,  // AE_MULAFP32X16X2RAS_L
4617
74.9k
    10U,  // AE_MULAFP32X16X2RAS_L_S2
4618
74.9k
    10U,  // AE_MULAFP32X16X2RS_H
4619
74.9k
    10U,  // AE_MULAFP32X16X2RS_H_S2
4620
74.9k
    10U,  // AE_MULAFP32X16X2RS_L
4621
74.9k
    10U,  // AE_MULAFP32X16X2RS_L_S2
4622
74.9k
    10U,  // AE_MULAFP32X2RAS
4623
74.9k
    10U,  // AE_MULAFP32X2RS
4624
74.9k
    10U,  // AE_MULAFQ32SP24S_H_S2
4625
74.9k
    10U,  // AE_MULAFQ32SP24S_L_S2
4626
74.9k
    10U,  // AE_MULAP24X2
4627
74.9k
    10U,  // AE_MULAP24X2_S2
4628
74.9k
    10U,  // AE_MULAP32X16X2_H
4629
74.9k
    10U,  // AE_MULAP32X16X2_L
4630
74.9k
    10U,  // AE_MULAP32X2
4631
74.9k
    10U,  // AE_MULAQ32SP16S_L_S2
4632
74.9k
    10U,  // AE_MULAQ32SP16U_L_S2
4633
74.9k
    10U,  // AE_MULARFQ32SP24S_H_S2
4634
74.9k
    10U,  // AE_MULARFQ32SP24S_L_S2
4635
74.9k
    10U,  // AE_MULAS32F48P16S_HH
4636
74.9k
    10U,  // AE_MULAS32F48P16S_HH_S2
4637
74.9k
    10U,  // AE_MULAS32F48P16S_LH
4638
74.9k
    10U,  // AE_MULAS32F48P16S_LH_S2
4639
74.9k
    10U,  // AE_MULAS32F48P16S_LL
4640
74.9k
    10U,  // AE_MULAS32F48P16S_LL_S2
4641
74.9k
    10U,  // AE_MULASD24_HH_LL
4642
74.9k
    10U,  // AE_MULASD24_HH_LL_S2
4643
74.9k
    10U,  // AE_MULASD24_HL_LH
4644
74.9k
    10U,  // AE_MULASD24_HL_LH_S2
4645
74.9k
    10U,  // AE_MULASD32X16_H1_L0
4646
74.9k
    10U,  // AE_MULASD32X16_H1_L0_S2
4647
74.9k
    10U,  // AE_MULASD32X16_H3_L2
4648
74.9k
    10U,  // AE_MULASD32X16_H3_L2_S2
4649
74.9k
    10U,  // AE_MULASFD24_HH_LL
4650
74.9k
    10U,  // AE_MULASFD24_HH_LL_S2
4651
74.9k
    10U,  // AE_MULASFD24_HL_LH
4652
74.9k
    10U,  // AE_MULASFD24_HL_LH_S2
4653
74.9k
    10U,  // AE_MULASFD32X16_H1_L0
4654
74.9k
    10U,  // AE_MULASFD32X16_H1_L0_S2
4655
74.9k
    10U,  // AE_MULASFD32X16_H3_L2
4656
74.9k
    10U,  // AE_MULASFD32X16_H3_L2_S2
4657
74.9k
    8U, // AE_MULC24
4658
74.9k
    8U, // AE_MULC32X16_H
4659
74.9k
    8U, // AE_MULC32X16_L
4660
74.9k
    8U, // AE_MULF16SS_00
4661
74.9k
    8U, // AE_MULF16SS_00_S2
4662
74.9k
    8U, // AE_MULF16SS_10
4663
74.9k
    8U, // AE_MULF16SS_11
4664
74.9k
    8U, // AE_MULF16SS_20
4665
74.9k
    8U, // AE_MULF16SS_21
4666
74.9k
    8U, // AE_MULF16SS_22
4667
74.9k
    8U, // AE_MULF16SS_30
4668
74.9k
    8U, // AE_MULF16SS_31
4669
74.9k
    8U, // AE_MULF16SS_32
4670
74.9k
    8U, // AE_MULF16SS_33
4671
74.9k
    0U, // AE_MULF16X4SS
4672
74.9k
    8U, // AE_MULF32R_HH
4673
74.9k
    8U, // AE_MULF32R_LH
4674
74.9k
    8U, // AE_MULF32R_LL
4675
74.9k
    8U, // AE_MULF32R_LL_S2
4676
74.9k
    8U, // AE_MULF32S_HH
4677
74.9k
    8U, // AE_MULF32S_LH
4678
74.9k
    8U, // AE_MULF32S_LL
4679
74.9k
    8U, // AE_MULF32S_LL_S2
4680
74.9k
    8U, // AE_MULF32X16_H0
4681
74.9k
    8U, // AE_MULF32X16_H0_S2
4682
74.9k
    8U, // AE_MULF32X16_H1
4683
74.9k
    8U, // AE_MULF32X16_H1_S2
4684
74.9k
    8U, // AE_MULF32X16_H2
4685
74.9k
    8U, // AE_MULF32X16_H2_S2
4686
74.9k
    8U, // AE_MULF32X16_H3
4687
74.9k
    8U, // AE_MULF32X16_H3_S2
4688
74.9k
    8U, // AE_MULF32X16_L0
4689
74.9k
    8U, // AE_MULF32X16_L0_S2
4690
74.9k
    8U, // AE_MULF32X16_L1
4691
74.9k
    8U, // AE_MULF32X16_L1_S2
4692
74.9k
    8U, // AE_MULF32X16_L2
4693
74.9k
    8U, // AE_MULF32X16_L2_S2
4694
74.9k
    8U, // AE_MULF32X16_L3
4695
74.9k
    8U, // AE_MULF32X16_L3_S2
4696
74.9k
    8U, // AE_MULF48Q32SP16S_L
4697
74.9k
    8U, // AE_MULF48Q32SP16S_L_S2
4698
74.9k
    8U, // AE_MULF48Q32SP16U_L
4699
74.9k
    8U, // AE_MULF48Q32SP16U_L_S2
4700
74.9k
    8U, // AE_MULFC24RA
4701
74.9k
    8U, // AE_MULFC32X16RAS_H
4702
74.9k
    8U, // AE_MULFC32X16RAS_L
4703
74.9k
    35840U, // AE_MULFD24X2_FIR_H
4704
74.9k
    35840U, // AE_MULFD24X2_FIR_L
4705
74.9k
    35840U, // AE_MULFD32X16X2_FIR_HH
4706
74.9k
    35840U, // AE_MULFD32X16X2_FIR_HL
4707
74.9k
    35840U, // AE_MULFD32X16X2_FIR_LH
4708
74.9k
    35840U, // AE_MULFD32X16X2_FIR_LL
4709
74.9k
    8U, // AE_MULFP16X4RAS
4710
74.9k
    8U, // AE_MULFP16X4S
4711
74.9k
    8U, // AE_MULFP24X2R
4712
74.9k
    8U, // AE_MULFP24X2RA
4713
74.9k
    8U, // AE_MULFP24X2RA_S2
4714
74.9k
    8U, // AE_MULFP24X2R_S2
4715
74.9k
    8U, // AE_MULFP32X16X2RAS_H
4716
74.9k
    8U, // AE_MULFP32X16X2RAS_H_S2
4717
74.9k
    8U, // AE_MULFP32X16X2RAS_L
4718
74.9k
    8U, // AE_MULFP32X16X2RAS_L_S2
4719
74.9k
    8U, // AE_MULFP32X16X2RS_H
4720
74.9k
    8U, // AE_MULFP32X16X2RS_H_S2
4721
74.9k
    8U, // AE_MULFP32X16X2RS_L
4722
74.9k
    8U, // AE_MULFP32X16X2RS_L_S2
4723
74.9k
    8U, // AE_MULFP32X2RAS
4724
74.9k
    8U, // AE_MULFP32X2RS
4725
74.9k
    8U, // AE_MULFQ32SP24S_H_S2
4726
74.9k
    8U, // AE_MULFQ32SP24S_L_S2
4727
74.9k
    8U, // AE_MULP24X2
4728
74.9k
    8U, // AE_MULP24X2_S2
4729
74.9k
    8U, // AE_MULP32X16X2_H
4730
74.9k
    8U, // AE_MULP32X16X2_L
4731
74.9k
    8U, // AE_MULP32X2
4732
74.9k
    8U, // AE_MULQ32SP16S_L_S2
4733
74.9k
    8U, // AE_MULQ32SP16U_L_S2
4734
74.9k
    8U, // AE_MULRFQ32SP24S_H_S2
4735
74.9k
    8U, // AE_MULRFQ32SP24S_L_S2
4736
74.9k
    11U,  // AE_MULS16X4
4737
74.9k
    8U, // AE_MULS32F48P16S_HH
4738
74.9k
    8U, // AE_MULS32F48P16S_HH_S2
4739
74.9k
    8U, // AE_MULS32F48P16S_LH
4740
74.9k
    8U, // AE_MULS32F48P16S_LH_S2
4741
74.9k
    8U, // AE_MULS32F48P16S_LL
4742
74.9k
    8U, // AE_MULS32F48P16S_LL_S2
4743
74.9k
    10U,  // AE_MULS32U_LL
4744
74.9k
    10U,  // AE_MULS32X16_H0
4745
74.9k
    10U,  // AE_MULS32X16_H0_S2
4746
74.9k
    10U,  // AE_MULS32X16_H1
4747
74.9k
    10U,  // AE_MULS32X16_H1_S2
4748
74.9k
    10U,  // AE_MULS32X16_H2
4749
74.9k
    10U,  // AE_MULS32X16_H2_S2
4750
74.9k
    10U,  // AE_MULS32X16_H3
4751
74.9k
    10U,  // AE_MULS32X16_H3_S2
4752
74.9k
    10U,  // AE_MULS32X16_L0
4753
74.9k
    10U,  // AE_MULS32X16_L0_S2
4754
74.9k
    10U,  // AE_MULS32X16_L1
4755
74.9k
    10U,  // AE_MULS32X16_L1_S2
4756
74.9k
    10U,  // AE_MULS32X16_L2
4757
74.9k
    10U,  // AE_MULS32X16_L2_S2
4758
74.9k
    10U,  // AE_MULS32X16_L3
4759
74.9k
    10U,  // AE_MULS32X16_L3_S2
4760
74.9k
    10U,  // AE_MULS32_HH
4761
74.9k
    10U,  // AE_MULS32_LH
4762
74.9k
    10U,  // AE_MULS32_LL
4763
74.9k
    10U,  // AE_MULSAD24_HH_LL
4764
74.9k
    10U,  // AE_MULSAD24_HH_LL_S2
4765
74.9k
    10U,  // AE_MULSAD32X16_H1_L0
4766
74.9k
    10U,  // AE_MULSAD32X16_H1_L0_S2
4767
74.9k
    10U,  // AE_MULSAD32X16_H3_L2
4768
74.9k
    10U,  // AE_MULSAD32X16_H3_L2_S2
4769
74.9k
    10U,  // AE_MULSAFD24_HH_LL
4770
74.9k
    10U,  // AE_MULSAFD24_HH_LL_S2
4771
74.9k
    10U,  // AE_MULSAFD32X16_H1_L0
4772
74.9k
    10U,  // AE_MULSAFD32X16_H1_L0_S2
4773
74.9k
    10U,  // AE_MULSAFD32X16_H3_L2
4774
74.9k
    10U,  // AE_MULSAFD32X16_H3_L2_S2
4775
74.9k
    10U,  // AE_MULSF16SS_00
4776
74.9k
    10U,  // AE_MULSF16SS_00_S2
4777
74.9k
    10U,  // AE_MULSF16SS_10
4778
74.9k
    10U,  // AE_MULSF16SS_11
4779
74.9k
    10U,  // AE_MULSF16SS_20
4780
74.9k
    10U,  // AE_MULSF16SS_21
4781
74.9k
    10U,  // AE_MULSF16SS_22
4782
74.9k
    10U,  // AE_MULSF16SS_30
4783
74.9k
    10U,  // AE_MULSF16SS_31
4784
74.9k
    10U,  // AE_MULSF16SS_32
4785
74.9k
    10U,  // AE_MULSF16SS_33
4786
74.9k
    11U,  // AE_MULSF16X4SS
4787
74.9k
    10U,  // AE_MULSF32R_HH
4788
74.9k
    10U,  // AE_MULSF32R_LH
4789
74.9k
    10U,  // AE_MULSF32R_LL
4790
74.9k
    10U,  // AE_MULSF32R_LL_S2
4791
74.9k
    10U,  // AE_MULSF32S_HH
4792
74.9k
    10U,  // AE_MULSF32S_LH
4793
74.9k
    10U,  // AE_MULSF32S_LL
4794
74.9k
    10U,  // AE_MULSF32X16_H0
4795
74.9k
    10U,  // AE_MULSF32X16_H0_S2
4796
74.9k
    10U,  // AE_MULSF32X16_H1
4797
74.9k
    10U,  // AE_MULSF32X16_H1_S2
4798
74.9k
    10U,  // AE_MULSF32X16_H2
4799
74.9k
    10U,  // AE_MULSF32X16_H2_S2
4800
74.9k
    10U,  // AE_MULSF32X16_H3
4801
74.9k
    10U,  // AE_MULSF32X16_H3_S2
4802
74.9k
    10U,  // AE_MULSF32X16_L0
4803
74.9k
    10U,  // AE_MULSF32X16_L0_S2
4804
74.9k
    10U,  // AE_MULSF32X16_L1
4805
74.9k
    10U,  // AE_MULSF32X16_L1_S2
4806
74.9k
    10U,  // AE_MULSF32X16_L2
4807
74.9k
    10U,  // AE_MULSF32X16_L2_S2
4808
74.9k
    10U,  // AE_MULSF32X16_L3
4809
74.9k
    10U,  // AE_MULSF32X16_L3_S2
4810
74.9k
    10U,  // AE_MULSF48Q32SP16S_L
4811
74.9k
    10U,  // AE_MULSF48Q32SP16S_L_S2
4812
74.9k
    10U,  // AE_MULSF48Q32SP16U_L
4813
74.9k
    10U,  // AE_MULSF48Q32SP16U_L_S2
4814
74.9k
    10U,  // AE_MULSFP24X2R
4815
74.9k
    10U,  // AE_MULSFP24X2RA
4816
74.9k
    10U,  // AE_MULSFP24X2RA_S2
4817
74.9k
    10U,  // AE_MULSFP24X2R_S2
4818
74.9k
    10U,  // AE_MULSFP32X16X2RAS_H
4819
74.9k
    10U,  // AE_MULSFP32X16X2RAS_H_S2
4820
74.9k
    10U,  // AE_MULSFP32X16X2RAS_L
4821
74.9k
    10U,  // AE_MULSFP32X16X2RAS_L_S2
4822
74.9k
    10U,  // AE_MULSFP32X16X2RS_H
4823
74.9k
    10U,  // AE_MULSFP32X16X2RS_H_S2
4824
74.9k
    10U,  // AE_MULSFP32X16X2RS_L
4825
74.9k
    10U,  // AE_MULSFP32X16X2RS_L_S2
4826
74.9k
    10U,  // AE_MULSFP32X2RAS
4827
74.9k
    10U,  // AE_MULSFP32X2RS
4828
74.9k
    10U,  // AE_MULSFQ32SP24S_H_S2
4829
74.9k
    10U,  // AE_MULSFQ32SP24S_L_S2
4830
74.9k
    10U,  // AE_MULSP24X2
4831
74.9k
    10U,  // AE_MULSP24X2_S2
4832
74.9k
    10U,  // AE_MULSP32X16X2_H
4833
74.9k
    10U,  // AE_MULSP32X16X2_L
4834
74.9k
    10U,  // AE_MULSP32X2
4835
74.9k
    10U,  // AE_MULSQ32SP16S_L_S2
4836
74.9k
    10U,  // AE_MULSQ32SP16U_L_S2
4837
74.9k
    10U,  // AE_MULSRFQ32SP24S_H_S2
4838
74.9k
    10U,  // AE_MULSRFQ32SP24S_L_S2
4839
74.9k
    10U,  // AE_MULSS32F48P16S_HH
4840
74.9k
    10U,  // AE_MULSS32F48P16S_HH_S2
4841
74.9k
    10U,  // AE_MULSS32F48P16S_LH
4842
74.9k
    10U,  // AE_MULSS32F48P16S_LH_S2
4843
74.9k
    10U,  // AE_MULSS32F48P16S_LL
4844
74.9k
    10U,  // AE_MULSS32F48P16S_LL_S2
4845
74.9k
    10U,  // AE_MULSSD24_HH_LL
4846
74.9k
    10U,  // AE_MULSSD24_HH_LL_S2
4847
74.9k
    10U,  // AE_MULSSD24_HL_LH
4848
74.9k
    10U,  // AE_MULSSD24_HL_LH_S2
4849
74.9k
    10U,  // AE_MULSSD32X16_H1_L0
4850
74.9k
    10U,  // AE_MULSSD32X16_H1_L0_S2
4851
74.9k
    10U,  // AE_MULSSD32X16_H3_L2
4852
74.9k
    10U,  // AE_MULSSD32X16_H3_L2_S2
4853
74.9k
    10U,  // AE_MULSSFD16SS_11_00
4854
74.9k
    10U,  // AE_MULSSFD16SS_11_00_S2
4855
74.9k
    10U,  // AE_MULSSFD16SS_13_02
4856
74.9k
    10U,  // AE_MULSSFD16SS_13_02_S2
4857
74.9k
    10U,  // AE_MULSSFD16SS_33_22
4858
74.9k
    10U,  // AE_MULSSFD16SS_33_22_S2
4859
74.9k
    10U,  // AE_MULSSFD24_HH_LL
4860
74.9k
    10U,  // AE_MULSSFD24_HH_LL_S2
4861
74.9k
    10U,  // AE_MULSSFD24_HL_LH
4862
74.9k
    10U,  // AE_MULSSFD24_HL_LH_S2
4863
74.9k
    10U,  // AE_MULSSFD32X16_H1_L0
4864
74.9k
    10U,  // AE_MULSSFD32X16_H1_L0_S2
4865
74.9k
    10U,  // AE_MULSSFD32X16_H3_L2
4866
74.9k
    10U,  // AE_MULSSFD32X16_H3_L2_S2
4867
74.9k
    8U, // AE_MULZAAD24_HH_LL
4868
74.9k
    8U, // AE_MULZAAD24_HH_LL_S2
4869
74.9k
    8U, // AE_MULZAAD24_HL_LH
4870
74.9k
    8U, // AE_MULZAAD24_HL_LH_S2
4871
74.9k
    8U, // AE_MULZAAD32X16_H0_L1
4872
74.9k
    8U, // AE_MULZAAD32X16_H0_L1_S2
4873
74.9k
    8U, // AE_MULZAAD32X16_H1_L0
4874
74.9k
    8U, // AE_MULZAAD32X16_H1_L0_S2
4875
74.9k
    8U, // AE_MULZAAD32X16_H2_L3
4876
74.9k
    8U, // AE_MULZAAD32X16_H2_L3_S2
4877
74.9k
    8U, // AE_MULZAAD32X16_H3_L2
4878
74.9k
    8U, // AE_MULZAAD32X16_H3_L2_S2
4879
74.9k
    8U, // AE_MULZAAFD16SS_11_00
4880
74.9k
    8U, // AE_MULZAAFD16SS_11_00_S2
4881
74.9k
    8U, // AE_MULZAAFD16SS_13_02
4882
74.9k
    8U, // AE_MULZAAFD16SS_13_02_S2
4883
74.9k
    8U, // AE_MULZAAFD16SS_33_22
4884
74.9k
    8U, // AE_MULZAAFD16SS_33_22_S2
4885
74.9k
    8U, // AE_MULZAAFD24_HH_LL
4886
74.9k
    8U, // AE_MULZAAFD24_HH_LL_S2
4887
74.9k
    8U, // AE_MULZAAFD24_HL_LH
4888
74.9k
    8U, // AE_MULZAAFD24_HL_LH_S2
4889
74.9k
    8U, // AE_MULZAAFD32X16_H0_L1
4890
74.9k
    8U, // AE_MULZAAFD32X16_H0_L1_S2
4891
74.9k
    8U, // AE_MULZAAFD32X16_H1_L0
4892
74.9k
    8U, // AE_MULZAAFD32X16_H1_L0_S2
4893
74.9k
    8U, // AE_MULZAAFD32X16_H2_L3
4894
74.9k
    8U, // AE_MULZAAFD32X16_H2_L3_S2
4895
74.9k
    8U, // AE_MULZAAFD32X16_H3_L2
4896
74.9k
    8U, // AE_MULZAAFD32X16_H3_L2_S2
4897
74.9k
    8U, // AE_MULZASD24_HH_LL
4898
74.9k
    8U, // AE_MULZASD24_HH_LL_S2
4899
74.9k
    8U, // AE_MULZASD24_HL_LH
4900
74.9k
    8U, // AE_MULZASD24_HL_LH_S2
4901
74.9k
    8U, // AE_MULZASD32X16_H1_L0
4902
74.9k
    8U, // AE_MULZASD32X16_H1_L0_S2
4903
74.9k
    8U, // AE_MULZASD32X16_H3_L2
4904
74.9k
    8U, // AE_MULZASD32X16_H3_L2_S2
4905
74.9k
    8U, // AE_MULZASFD24_HH_LL
4906
74.9k
    8U, // AE_MULZASFD24_HH_LL_S2
4907
74.9k
    8U, // AE_MULZASFD24_HL_LH
4908
74.9k
    8U, // AE_MULZASFD24_HL_LH_S2
4909
74.9k
    8U, // AE_MULZASFD32X16_H1_L0
4910
74.9k
    8U, // AE_MULZASFD32X16_H1_L0_S2
4911
74.9k
    8U, // AE_MULZASFD32X16_H3_L2
4912
74.9k
    8U, // AE_MULZASFD32X16_H3_L2_S2
4913
74.9k
    8U, // AE_MULZSAD24_HH_LL
4914
74.9k
    8U, // AE_MULZSAD24_HH_LL_S2
4915
74.9k
    8U, // AE_MULZSAD32X16_H1_L0
4916
74.9k
    8U, // AE_MULZSAD32X16_H1_L0_S2
4917
74.9k
    8U, // AE_MULZSAD32X16_H3_L2
4918
74.9k
    8U, // AE_MULZSAD32X16_H3_L2_S2
4919
74.9k
    8U, // AE_MULZSAFD24_HH_LL
4920
74.9k
    8U, // AE_MULZSAFD24_HH_LL_S2
4921
74.9k
    8U, // AE_MULZSAFD32X16_H1_L0
4922
74.9k
    8U, // AE_MULZSAFD32X16_H1_L0_S2
4923
74.9k
    8U, // AE_MULZSAFD32X16_H3_L2
4924
74.9k
    8U, // AE_MULZSAFD32X16_H3_L2_S2
4925
74.9k
    8U, // AE_MULZSSD24_HH_LL
4926
74.9k
    8U, // AE_MULZSSD24_HH_LL_S2
4927
74.9k
    8U, // AE_MULZSSD24_HL_LH
4928
74.9k
    8U, // AE_MULZSSD24_HL_LH_S2
4929
74.9k
    8U, // AE_MULZSSD32X16_H1_L0
4930
74.9k
    8U, // AE_MULZSSD32X16_H1_L0_S2
4931
74.9k
    8U, // AE_MULZSSD32X16_H3_L2
4932
74.9k
    8U, // AE_MULZSSD32X16_H3_L2_S2
4933
74.9k
    8U, // AE_MULZSSFD16SS_11_00
4934
74.9k
    8U, // AE_MULZSSFD16SS_11_00_S2
4935
74.9k
    8U, // AE_MULZSSFD16SS_13_02
4936
74.9k
    8U, // AE_MULZSSFD16SS_13_02_S2
4937
74.9k
    8U, // AE_MULZSSFD16SS_33_22
4938
74.9k
    8U, // AE_MULZSSFD16SS_33_22_S2
4939
74.9k
    8U, // AE_MULZSSFD24_HH_LL
4940
74.9k
    8U, // AE_MULZSSFD24_HH_LL_S2
4941
74.9k
    8U, // AE_MULZSSFD24_HL_LH
4942
74.9k
    8U, // AE_MULZSSFD24_HL_LH_S2
4943
74.9k
    8U, // AE_MULZSSFD32X16_H1_L0
4944
74.9k
    8U, // AE_MULZSSFD32X16_H1_L0_S2
4945
74.9k
    8U, // AE_MULZSSFD32X16_H3_L2
4946
74.9k
    8U, // AE_MULZSSFD32X16_H3_L2_S2
4947
74.9k
    8U, // AE_NAND
4948
74.9k
    0U, // AE_NEG16S
4949
74.9k
    0U, // AE_NEG24S
4950
74.9k
    0U, // AE_NEG32
4951
74.9k
    0U, // AE_NEG32S
4952
74.9k
    0U, // AE_NEG64
4953
74.9k
    0U, // AE_NEG64S
4954
74.9k
    0U, // AE_NSA64
4955
74.9k
    0U, // AE_NSAZ16_0
4956
74.9k
    0U, // AE_NSAZ32_L
4957
74.9k
    8U, // AE_OR
4958
74.9k
    3U, // AE_PKSR24
4959
74.9k
    3U, // AE_PKSR32
4960
74.9k
    8U, // AE_ROUND16X4F32SASYM
4961
74.9k
    8U, // AE_ROUND16X4F32SSYM
4962
74.9k
    8U, // AE_ROUND24X2F48SASYM
4963
74.9k
    8U, // AE_ROUND24X2F48SSYM
4964
74.9k
    8U, // AE_ROUND32X2F48SASYM
4965
74.9k
    8U, // AE_ROUND32X2F48SSYM
4966
74.9k
    8U, // AE_ROUND32X2F64SASYM
4967
74.9k
    8U, // AE_ROUND32X2F64SSYM
4968
74.9k
    0U, // AE_ROUNDSP16F24ASYM
4969
74.9k
    0U, // AE_ROUNDSP16F24SYM
4970
74.9k
    8U, // AE_ROUNDSP16Q48X2ASYM
4971
74.9k
    8U, // AE_ROUNDSP16Q48X2SYM
4972
74.9k
    0U, // AE_ROUNDSQ32F48ASYM
4973
74.9k
    0U, // AE_ROUNDSQ32F48SYM
4974
74.9k
    1U, // AE_S16M_L_I
4975
74.9k
    1U, // AE_S16M_L_IU
4976
74.9k
    8U, // AE_S16M_L_X
4977
74.9k
    10U,  // AE_S16M_L_XC
4978
74.9k
    10U,  // AE_S16M_L_XU
4979
74.9k
    2U, // AE_S16X2M_I
4980
74.9k
    2U, // AE_S16X2M_IU
4981
74.9k
    8U, // AE_S16X2M_X
4982
74.9k
    10U,  // AE_S16X2M_XC
4983
74.9k
    10U,  // AE_S16X2M_XU
4984
74.9k
    2U, // AE_S16X4_I
4985
74.9k
    2U, // AE_S16X4_IP
4986
74.9k
    0U, // AE_S16X4_RIC
4987
74.9k
    0U, // AE_S16X4_RIP
4988
74.9k
    8U, // AE_S16X4_X
4989
74.9k
    10U,  // AE_S16X4_XC
4990
74.9k
    10U,  // AE_S16X4_XP
4991
74.9k
    1U, // AE_S16_0_I
4992
74.9k
    1U, // AE_S16_0_IP
4993
74.9k
    8U, // AE_S16_0_X
4994
74.9k
    10U,  // AE_S16_0_XC
4995
74.9k
    10U,  // AE_S16_0_XP
4996
74.9k
    2U, // AE_S24RA64S_I
4997
74.9k
    2U, // AE_S24RA64S_IP
4998
74.9k
    8U, // AE_S24RA64S_X
4999
74.9k
    10U,  // AE_S24RA64S_XC
5000
74.9k
    10U,  // AE_S24RA64S_XP
5001
74.9k
    10U,  // AE_S24X2RA64S_IP
5002
74.9k
    2U, // AE_S32F24_L_I
5003
74.9k
    2U, // AE_S32F24_L_IP
5004
74.9k
    8U, // AE_S32F24_L_X
5005
74.9k
    10U,  // AE_S32F24_L_XC
5006
74.9k
    10U,  // AE_S32F24_L_XP
5007
74.9k
    2U, // AE_S32M_I
5008
74.9k
    2U, // AE_S32M_IU
5009
74.9k
    8U, // AE_S32M_X
5010
74.9k
    10U,  // AE_S32M_XC
5011
74.9k
    10U,  // AE_S32M_XU
5012
74.9k
    2U, // AE_S32RA64S_I
5013
74.9k
    2U, // AE_S32RA64S_IP
5014
74.9k
    8U, // AE_S32RA64S_X
5015
74.9k
    10U,  // AE_S32RA64S_XC
5016
74.9k
    10U,  // AE_S32RA64S_XP
5017
74.9k
    2U, // AE_S32X2F24_I
5018
74.9k
    2U, // AE_S32X2F24_IP
5019
74.9k
    0U, // AE_S32X2F24_RIC
5020
74.9k
    0U, // AE_S32X2F24_RIP
5021
74.9k
    8U, // AE_S32X2F24_X
5022
74.9k
    10U,  // AE_S32X2F24_XC
5023
74.9k
    10U,  // AE_S32X2F24_XP
5024
74.9k
    10U,  // AE_S32X2RA64S_IP
5025
74.9k
    2U, // AE_S32X2_I
5026
74.9k
    2U, // AE_S32X2_IP
5027
74.9k
    0U, // AE_S32X2_RIC
5028
74.9k
    0U, // AE_S32X2_RIP
5029
74.9k
    8U, // AE_S32X2_X
5030
74.9k
    10U,  // AE_S32X2_XC
5031
74.9k
    10U,  // AE_S32X2_XP
5032
74.9k
    2U, // AE_S32_L_I
5033
74.9k
    2U, // AE_S32_L_IP
5034
74.9k
    8U, // AE_S32_L_X
5035
74.9k
    10U,  // AE_S32_L_XC
5036
74.9k
    10U,  // AE_S32_L_XP
5037
74.9k
    2U, // AE_S64_I
5038
74.9k
    2U, // AE_S64_IP
5039
74.9k
    8U, // AE_S64_X
5040
74.9k
    10U,  // AE_S64_XC
5041
74.9k
    10U,  // AE_S64_XP
5042
74.9k
    0U, // AE_SA16X4_IC
5043
74.9k
    0U, // AE_SA16X4_IP
5044
74.9k
    0U, // AE_SA16X4_RIC
5045
74.9k
    0U, // AE_SA16X4_RIP
5046
74.9k
    0U, // AE_SA24X2_IC
5047
74.9k
    0U, // AE_SA24X2_IP
5048
74.9k
    0U, // AE_SA24X2_RIC
5049
74.9k
    0U, // AE_SA24X2_RIP
5050
74.9k
    0U, // AE_SA24_L_IC
5051
74.9k
    0U, // AE_SA24_L_IP
5052
74.9k
    0U, // AE_SA24_L_RIC
5053
74.9k
    0U, // AE_SA24_L_RIP
5054
74.9k
    0U, // AE_SA32X2F24_IC
5055
74.9k
    0U, // AE_SA32X2F24_IP
5056
74.9k
    0U, // AE_SA32X2F24_RIC
5057
74.9k
    0U, // AE_SA32X2F24_RIP
5058
74.9k
    0U, // AE_SA32X2_IC
5059
74.9k
    0U, // AE_SA32X2_IP
5060
74.9k
    0U, // AE_SA32X2_RIC
5061
74.9k
    0U, // AE_SA32X2_RIP
5062
74.9k
    0U, // AE_SA64NEG_FP
5063
74.9k
    0U, // AE_SA64POS_FP
5064
74.9k
    2U, // AE_SALIGN64_I
5065
74.9k
    8U, // AE_SAT16X4
5066
74.9k
    0U, // AE_SAT24S
5067
74.9k
    0U, // AE_SAT48S
5068
74.9k
    0U, // AE_SATQ56S
5069
74.9k
    0U, // AE_SB
5070
74.9k
    0U, // AE_SBF
5071
74.9k
    0U, // AE_SBF_IC
5072
74.9k
    0U, // AE_SBF_IP
5073
74.9k
    3U, // AE_SBI
5074
74.9k
    3U, // AE_SBI_IC
5075
74.9k
    3U, // AE_SBI_IP
5076
74.9k
    0U, // AE_SB_IC
5077
74.9k
    0U, // AE_SB_IP
5078
74.9k
    448U, // AE_SEL16I
5079
74.9k
    512U, // AE_SEL16I_N
5080
74.9k
    3U, // AE_SEXT32
5081
74.9k
    0U, // AE_SEXT32X2D16_10
5082
74.9k
    0U, // AE_SEXT32X2D16_32
5083
74.9k
    0U, // AE_SHA32
5084
74.9k
    0U, // AE_SHORTSWAP
5085
74.9k
    8U, // AE_SLAA16S
5086
74.9k
    8U, // AE_SLAA32
5087
74.9k
    8U, // AE_SLAA32S
5088
74.9k
    8U, // AE_SLAA64
5089
74.9k
    8U, // AE_SLAA64S
5090
74.9k
    8U, // AE_SLAAQ56
5091
74.9k
    3U, // AE_SLAI16S
5092
74.9k
    11U,  // AE_SLAI24
5093
74.9k
    11U,  // AE_SLAI24S
5094
74.9k
    11U,  // AE_SLAI32
5095
74.9k
    11U,  // AE_SLAI32S
5096
74.9k
    3U, // AE_SLAI64
5097
74.9k
    3U, // AE_SLAI64S
5098
74.9k
    3U, // AE_SLAISQ56S
5099
74.9k
    0U, // AE_SLAS24
5100
74.9k
    0U, // AE_SLAS24S
5101
74.9k
    0U, // AE_SLAS32
5102
74.9k
    0U, // AE_SLAS32S
5103
74.9k
    0U, // AE_SLAS64
5104
74.9k
    0U, // AE_SLAS64S
5105
74.9k
    0U, // AE_SLASQ56
5106
74.9k
    0U, // AE_SLASSQ56S
5107
74.9k
    8U, // AE_SRA64_32
5108
74.9k
    8U, // AE_SRAA16RS
5109
74.9k
    8U, // AE_SRAA16S
5110
74.9k
    8U, // AE_SRAA32
5111
74.9k
    8U, // AE_SRAA32RS
5112
74.9k
    8U, // AE_SRAA32S
5113
74.9k
    8U, // AE_SRAA64
5114
74.9k
    3U, // AE_SRAI16
5115
74.9k
    3U, // AE_SRAI16R
5116
74.9k
    11U,  // AE_SRAI24
5117
74.9k
    11U,  // AE_SRAI32
5118
74.9k
    11U,  // AE_SRAI32R
5119
74.9k
    3U, // AE_SRAI64
5120
74.9k
    0U, // AE_SRAS24
5121
74.9k
    0U, // AE_SRAS32
5122
74.9k
    0U, // AE_SRAS64
5123
74.9k
    8U, // AE_SRLA32
5124
74.9k
    8U, // AE_SRLA64
5125
74.9k
    11U,  // AE_SRLI24
5126
74.9k
    11U,  // AE_SRLI32
5127
74.9k
    3U, // AE_SRLI64
5128
74.9k
    0U, // AE_SRLS24
5129
74.9k
    0U, // AE_SRLS32
5130
74.9k
    0U, // AE_SRLS64
5131
74.9k
    8U, // AE_SUB16
5132
74.9k
    8U, // AE_SUB16S
5133
74.9k
    8U, // AE_SUB24S
5134
74.9k
    8U, // AE_SUB32
5135
74.9k
    8U, // AE_SUB32S
5136
74.9k
    8U, // AE_SUB64
5137
74.9k
    8U, // AE_SUB64S
5138
74.9k
    8U, // AE_SUBADD32
5139
74.9k
    8U, // AE_SUBADD32S
5140
74.9k
    0U, // AE_TRUNCA32F64S_L
5141
74.9k
    0U, // AE_TRUNCA32X2F64S
5142
74.9k
    448U, // AE_TRUNCI32F64S_L
5143
74.9k
    448U, // AE_TRUNCI32X2F64S
5144
74.9k
    0U, // AE_VLDL16C
5145
74.9k
    0U, // AE_VLDL16C_IC
5146
74.9k
    0U, // AE_VLDL16C_IP
5147
74.9k
    8U, // AE_VLDL16T
5148
74.9k
    8U, // AE_VLDL32T
5149
74.9k
    0U, // AE_VLDSHT
5150
74.9k
    10U,  // AE_VLEL16T
5151
74.9k
    10U,  // AE_VLEL32T
5152
74.9k
    0U, // AE_VLES16C
5153
74.9k
    0U, // AE_VLES16C_IC
5154
74.9k
    0U, // AE_VLES16C_IP
5155
74.9k
    8U, // AE_XOR
5156
74.9k
    0U, // AE_ZALIGN64
5157
74.9k
    0U, // ALL4
5158
74.9k
    0U, // ALL8
5159
74.9k
    8U, // AND
5160
74.9k
    8U, // ANDB
5161
74.9k
    8U, // ANDBC
5162
74.9k
    0U, // ANY4
5163
74.9k
    0U, // ANY8
5164
74.9k
    3U, // BALL
5165
74.9k
    3U, // BANY
5166
74.9k
    3U, // BBC
5167
74.9k
    0U, // BBCI
5168
74.9k
    3U, // BBS
5169
74.9k
    0U, // BBSI
5170
74.9k
    3U, // BEQ
5171
74.9k
    0U, // BEQI
5172
74.9k
    0U, // BEQZ
5173
74.9k
    0U, // BF
5174
74.9k
    3U, // BGE
5175
74.9k
    0U, // BGEI
5176
74.9k
    3U, // BGEU
5177
74.9k
    0U, // BGEUI
5178
74.9k
    0U, // BGEZ
5179
74.9k
    3U, // BLT
5180
74.9k
    0U, // BLTI
5181
74.9k
    3U, // BLTU
5182
74.9k
    0U, // BLTUI
5183
74.9k
    0U, // BLTZ
5184
74.9k
    3U, // BNALL
5185
74.9k
    3U, // BNE
5186
74.9k
    0U, // BNEI
5187
74.9k
    0U, // BNEZ
5188
74.9k
    3U, // BNONE
5189
74.9k
    0U, // BREAK
5190
74.9k
    0U, // BREAK_N
5191
74.9k
    0U, // BT
5192
74.9k
    0U, // CALL0
5193
74.9k
    0U, // CALL12
5194
74.9k
    0U, // CALL4
5195
74.9k
    0U, // CALL8
5196
74.9k
    0U, // CALLX0
5197
74.9k
    0U, // CALLX12
5198
74.9k
    0U, // CALLX4
5199
74.9k
    0U, // CALLX8
5200
74.9k
    3U, // CEIL_S
5201
74.9k
    3U, // CLAMPS
5202
74.9k
    0U, // CLR_BIT_GPIO_OUT
5203
74.9k
    0U, // CONST_S
5204
74.9k
    0U, // DIV0_S
5205
74.9k
    10U,  // DIVN_S
5206
74.9k
    0U, // DSYNC
5207
74.9k
    8U, // EE_ANDQ
5208
74.9k
    0U, // EE_BITREV
5209
74.9k
    0U, // EE_CLR_BIT_GPIO_OUT
5210
74.9k
    192U, // EE_CMUL_S16
5211
74.9k
    20U,  // EE_CMUL_S16_LD_INCP
5212
74.9k
    580U, // EE_CMUL_S16_ST_INCP
5213
74.9k
    13312U, // EE_FFT_AMS_S16_LD_INCP
5214
74.9k
    13312U, // EE_FFT_AMS_S16_LD_INCP_UAUP
5215
74.9k
    13312U, // EE_FFT_AMS_S16_LD_R32_DECP
5216
74.9k
    0U, // EE_FFT_AMS_S16_ST_INCP
5217
74.9k
    28U,  // EE_FFT_CMUL_S16_LD_XP
5218
74.9k
    13954U, // EE_FFT_CMUL_S16_ST_XP
5219
74.9k
    5120U,  // EE_FFT_R2BF_S16
5220
74.9k
    16002U, // EE_FFT_R2BF_S16_ST_INCP
5221
74.9k
    4U, // EE_FFT_VST_R32_DECP
5222
74.9k
    0U, // EE_GET_GPIO_IN
5223
74.9k
    13312U, // EE_LDF_128_IP
5224
74.9k
    13312U, // EE_LDF_128_XP
5225
74.9k
    706U, // EE_LDF_64_IP
5226
74.9k
    642U, // EE_LDF_64_XP
5227
74.9k
    0U, // EE_LDQA_S16_128_IP
5228
74.9k
    0U, // EE_LDQA_S16_128_XP
5229
74.9k
    0U, // EE_LDQA_S8_128_IP
5230
74.9k
    0U, // EE_LDQA_S8_128_XP
5231
74.9k
    0U, // EE_LDQA_U16_128_IP
5232
74.9k
    0U, // EE_LDQA_U16_128_XP
5233
74.9k
    0U, // EE_LDQA_U8_128_IP
5234
74.9k
    0U, // EE_LDQA_U8_128_XP
5235
74.9k
    9408U,  // EE_LDXQ_32
5236
74.9k
    4U, // EE_LD_128_USAR_IP
5237
74.9k
    10U,  // EE_LD_128_USAR_XP
5238
74.9k
    0U, // EE_LD_ACCX_IP
5239
74.9k
    0U, // EE_LD_QACC_H_H_32_IP
5240
74.9k
    0U, // EE_LD_QACC_H_L_128_IP
5241
74.9k
    0U, // EE_LD_QACC_L_H_32_IP
5242
74.9k
    0U, // EE_LD_QACC_L_L_128_IP
5243
74.9k
    0U, // EE_LD_UA_STATE_IP
5244
74.9k
    0U, // EE_MOVI_32_A
5245
74.9k
    0U, // EE_MOVI_32_Q
5246
74.9k
    0U, // EE_MOV_S16_QACC
5247
74.9k
    0U, // EE_MOV_S8_QACC
5248
74.9k
    0U, // EE_MOV_U16_QACC
5249
74.9k
    0U, // EE_MOV_U8_QACC
5250
74.9k
    0U, // EE_NOTQ
5251
74.9k
    8U, // EE_ORQ
5252
74.9k
    0U, // EE_SET_BIT_GPIO_OUT
5253
74.9k
    0U, // EE_SLCI_2Q
5254
74.9k
    0U, // EE_SLCXXP_2Q
5255
74.9k
    0U, // EE_SRCI_2Q
5256
74.9k
    0U, // EE_SRCMB_S16_QACC
5257
74.9k
    0U, // EE_SRCMB_S8_QACC
5258
74.9k
    10U,  // EE_SRCQ_128_ST_INCP
5259
74.9k
    0U, // EE_SRCXXP_2Q
5260
74.9k
    8U, // EE_SRC_Q
5261
74.9k
    0U, // EE_SRC_Q_LD_IP
5262
74.9k
    804U, // EE_SRC_Q_LD_XP
5263
74.9k
    10U,  // EE_SRC_Q_QUP
5264
74.9k
    0U, // EE_SRS_ACCX
5265
74.9k
    13954U, // EE_STF_128_IP
5266
74.9k
    13954U, // EE_STF_128_XP
5267
74.9k
    706U, // EE_STF_64_IP
5268
74.9k
    642U, // EE_STF_64_XP
5269
74.9k
    9408U,  // EE_STXQ_32
5270
74.9k
    0U, // EE_ST_ACCX_IP
5271
74.9k
    0U, // EE_ST_QACC_H_H_32_IP
5272
74.9k
    0U, // EE_ST_QACC_H_L_128_IP
5273
74.9k
    0U, // EE_ST_QACC_L_H_32_IP
5274
74.9k
    0U, // EE_ST_QACC_L_L_128_IP
5275
74.9k
    0U, // EE_ST_UA_STATE_IP
5276
74.9k
    8U, // EE_VADDS_S16
5277
74.9k
    2U, // EE_VADDS_S16_LD_INCP
5278
74.9k
    12U,  // EE_VADDS_S16_ST_INCP
5279
74.9k
    8U, // EE_VADDS_S32
5280
74.9k
    2U, // EE_VADDS_S32_LD_INCP
5281
74.9k
    12U,  // EE_VADDS_S32_ST_INCP
5282
74.9k
    8U, // EE_VADDS_S8
5283
74.9k
    2U, // EE_VADDS_S8_LD_INCP
5284
74.9k
    12U,  // EE_VADDS_S8_ST_INCP
5285
74.9k
    8U, // EE_VCMP_EQ_S16
5286
74.9k
    8U, // EE_VCMP_EQ_S32
5287
74.9k
    8U, // EE_VCMP_EQ_S8
5288
74.9k
    8U, // EE_VCMP_GT_S16
5289
74.9k
    8U, // EE_VCMP_GT_S32
5290
74.9k
    8U, // EE_VCMP_GT_S8
5291
74.9k
    8U, // EE_VCMP_LT_S16
5292
74.9k
    8U, // EE_VCMP_LT_S32
5293
74.9k
    8U, // EE_VCMP_LT_S8
5294
74.9k
    0U, // EE_VLDBC_16
5295
74.9k
    4U, // EE_VLDBC_16_IP
5296
74.9k
    10U,  // EE_VLDBC_16_XP
5297
74.9k
    0U, // EE_VLDBC_32
5298
74.9k
    4U, // EE_VLDBC_32_IP
5299
74.9k
    10U,  // EE_VLDBC_32_XP
5300
74.9k
    0U, // EE_VLDBC_8
5301
74.9k
    4U, // EE_VLDBC_8_IP
5302
74.9k
    10U,  // EE_VLDBC_8_XP
5303
74.9k
    10U,  // EE_VLDHBC_16_INCP
5304
74.9k
    4U, // EE_VLD_128_IP
5305
74.9k
    10U,  // EE_VLD_128_XP
5306
74.9k
    4U, // EE_VLD_H_64_IP
5307
74.9k
    10U,  // EE_VLD_H_64_XP
5308
74.9k
    4U, // EE_VLD_L_64_IP
5309
74.9k
    10U,  // EE_VLD_L_64_XP
5310
74.9k
    8U, // EE_VMAX_S16
5311
74.9k
    2U, // EE_VMAX_S16_LD_INCP
5312
74.9k
    12U,  // EE_VMAX_S16_ST_INCP
5313
74.9k
    8U, // EE_VMAX_S32
5314
74.9k
    2U, // EE_VMAX_S32_LD_INCP
5315
74.9k
    12U,  // EE_VMAX_S32_ST_INCP
5316
74.9k
    8U, // EE_VMAX_S8
5317
74.9k
    2U, // EE_VMAX_S8_LD_INCP
5318
74.9k
    12U,  // EE_VMAX_S8_ST_INCP
5319
74.9k
    8U, // EE_VMIN_S16
5320
74.9k
    2U, // EE_VMIN_S16_LD_INCP
5321
74.9k
    12U,  // EE_VMIN_S16_ST_INCP
5322
74.9k
    8U, // EE_VMIN_S32
5323
74.9k
    2U, // EE_VMIN_S32_LD_INCP
5324
74.9k
    12U,  // EE_VMIN_S32_ST_INCP
5325
74.9k
    8U, // EE_VMIN_S8
5326
74.9k
    2U, // EE_VMIN_S8_LD_INCP
5327
74.9k
    12U,  // EE_VMIN_S8_ST_INCP
5328
74.9k
    0U, // EE_VMULAS_S16_ACCX
5329
74.9k
    5U, // EE_VMULAS_S16_ACCX_LD_IP
5330
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
5331
74.9k
    46722U, // EE_VMULAS_S16_ACCX_LD_XP
5332
74.9k
    18276U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
5333
74.9k
    0U, // EE_VMULAS_S16_QACC
5334
74.9k
    642U, // EE_VMULAS_S16_QACC_LDBC_INCP
5335
74.9k
    868U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
5336
74.9k
    5U, // EE_VMULAS_S16_QACC_LD_IP
5337
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP
5338
74.9k
    46722U, // EE_VMULAS_S16_QACC_LD_XP
5339
74.9k
    18276U, // EE_VMULAS_S16_QACC_LD_XP_QUP
5340
74.9k
    0U, // EE_VMULAS_S8_ACCX
5341
74.9k
    5U, // EE_VMULAS_S8_ACCX_LD_IP
5342
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
5343
74.9k
    46722U, // EE_VMULAS_S8_ACCX_LD_XP
5344
74.9k
    18276U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
5345
74.9k
    0U, // EE_VMULAS_S8_QACC
5346
74.9k
    642U, // EE_VMULAS_S8_QACC_LDBC_INCP
5347
74.9k
    868U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
5348
74.9k
    5U, // EE_VMULAS_S8_QACC_LD_IP
5349
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP
5350
74.9k
    46722U, // EE_VMULAS_S8_QACC_LD_XP
5351
74.9k
    18276U, // EE_VMULAS_S8_QACC_LD_XP_QUP
5352
74.9k
    0U, // EE_VMULAS_U16_ACCX
5353
74.9k
    5U, // EE_VMULAS_U16_ACCX_LD_IP
5354
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
5355
74.9k
    46722U, // EE_VMULAS_U16_ACCX_LD_XP
5356
74.9k
    18276U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
5357
74.9k
    0U, // EE_VMULAS_U16_QACC
5358
74.9k
    642U, // EE_VMULAS_U16_QACC_LDBC_INCP
5359
74.9k
    868U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
5360
74.9k
    5U, // EE_VMULAS_U16_QACC_LD_IP
5361
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP
5362
74.9k
    46722U, // EE_VMULAS_U16_QACC_LD_XP
5363
74.9k
    18276U, // EE_VMULAS_U16_QACC_LD_XP_QUP
5364
74.9k
    0U, // EE_VMULAS_U8_ACCX
5365
74.9k
    5U, // EE_VMULAS_U8_ACCX_LD_IP
5366
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
5367
74.9k
    46722U, // EE_VMULAS_U8_ACCX_LD_XP
5368
74.9k
    18276U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
5369
74.9k
    0U, // EE_VMULAS_U8_QACC
5370
74.9k
    642U, // EE_VMULAS_U8_QACC_LDBC_INCP
5371
74.9k
    868U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
5372
74.9k
    5U, // EE_VMULAS_U8_QACC_LD_IP
5373
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP
5374
74.9k
    46722U, // EE_VMULAS_U8_QACC_LD_XP
5375
74.9k
    18276U, // EE_VMULAS_U8_QACC_LD_XP_QUP
5376
74.9k
    8U, // EE_VMUL_S16
5377
74.9k
    2U, // EE_VMUL_S16_LD_INCP
5378
74.9k
    12U,  // EE_VMUL_S16_ST_INCP
5379
74.9k
    8U, // EE_VMUL_S8
5380
74.9k
    2U, // EE_VMUL_S8_LD_INCP
5381
74.9k
    12U,  // EE_VMUL_S8_ST_INCP
5382
74.9k
    8U, // EE_VMUL_U16
5383
74.9k
    2U, // EE_VMUL_U16_LD_INCP
5384
74.9k
    12U,  // EE_VMUL_U16_ST_INCP
5385
74.9k
    8U, // EE_VMUL_U8
5386
74.9k
    2U, // EE_VMUL_U8_LD_INCP
5387
74.9k
    12U,  // EE_VMUL_U8_ST_INCP
5388
74.9k
    0U, // EE_VPRELU_S16
5389
74.9k
    0U, // EE_VPRELU_S8
5390
74.9k
    10U,  // EE_VRELU_S16
5391
74.9k
    10U,  // EE_VRELU_S8
5392
74.9k
    0U, // EE_VSL_32
5393
74.9k
    1U, // EE_VSMULAS_S16_QACC
5394
74.9k
    20098U, // EE_VSMULAS_S16_QACC_LD_INCP
5395
74.9k
    0U, // EE_VSMULAS_S8_QACC
5396
74.9k
    22146U, // EE_VSMULAS_S8_QACC_LD_INCP
5397
74.9k
    0U, // EE_VSR_32
5398
74.9k
    4U, // EE_VST_128_IP
5399
74.9k
    10U,  // EE_VST_128_XP
5400
74.9k
    4U, // EE_VST_H_64_IP
5401
74.9k
    10U,  // EE_VST_H_64_XP
5402
74.9k
    4U, // EE_VST_L_64_IP
5403
74.9k
    10U,  // EE_VST_L_64_XP
5404
74.9k
    8U, // EE_VSUBS_S16
5405
74.9k
    2U, // EE_VSUBS_S16_LD_INCP
5406
74.9k
    12U,  // EE_VSUBS_S16_ST_INCP
5407
74.9k
    8U, // EE_VSUBS_S32
5408
74.9k
    2U, // EE_VSUBS_S32_LD_INCP
5409
74.9k
    12U,  // EE_VSUBS_S32_ST_INCP
5410
74.9k
    8U, // EE_VSUBS_S8
5411
74.9k
    2U, // EE_VSUBS_S8_LD_INCP
5412
74.9k
    12U,  // EE_VSUBS_S8_ST_INCP
5413
74.9k
    0U, // EE_VUNZIP_16
5414
74.9k
    0U, // EE_VUNZIP_32
5415
74.9k
    0U, // EE_VUNZIP_8
5416
74.9k
    0U, // EE_VZIP_16
5417
74.9k
    0U, // EE_VZIP_32
5418
74.9k
    0U, // EE_VZIP_8
5419
74.9k
    0U, // EE_WR_MASK_GPIO_OUT
5420
74.9k
    8U, // EE_XORQ
5421
74.9k
    0U, // EE_ZERO_ACCX
5422
74.9k
    0U, // EE_ZERO_Q
5423
74.9k
    0U, // EE_ZERO_QACC
5424
74.9k
    0U, // ENTRY
5425
74.9k
    0U, // ESYNC
5426
74.9k
    0U, // EXCW
5427
74.9k
    899U, // EXTUI
5428
74.9k
    0U, // EXTW
5429
74.9k
    3U, // FLOAT_S
5430
74.9k
    3U, // FLOOR_S
5431
74.9k
    0U, // GET_GPIO_IN
5432
74.9k
    0U, // ILL
5433
74.9k
    0U, // ILL_N
5434
74.9k
    0U, // ISYNC
5435
74.9k
    0U, // J
5436
74.9k
    0U, // JX
5437
74.9k
    0U, // L16SI
5438
74.9k
    0U, // L16UI
5439
74.9k
    5U, // L32E
5440
74.9k
    0U, // L32I
5441
74.9k
    0U, // L32I_N
5442
74.9k
    0U, // L32R
5443
74.9k
    0U, // L8UI
5444
74.9k
    0U, // LDDEC
5445
74.9k
    0U, // LDINC
5446
74.9k
    0U, // LEA_ADD
5447
74.9k
    0U, // LOOP
5448
74.9k
    0U, // LOOPGTZ
5449
74.9k
    0U, // LOOPNEZ
5450
74.9k
    0U, // LSI
5451
74.9k
    5U, // LSIP
5452
74.9k
    8U, // LSX
5453
74.9k
    10U,  // LSXP
5454
74.9k
    10U,  // MADDN_S
5455
74.9k
    10U,  // MADD_S
5456
74.9k
    8U, // MAX
5457
74.9k
    8U, // MAXU
5458
74.9k
    0U, // MEMW
5459
74.9k
    8U, // MIN
5460
74.9k
    8U, // MINU
5461
74.9k
    0U, // MKDADJ_S
5462
74.9k
    0U, // MKSADJ_S
5463
74.9k
    8U, // MOVEQZ
5464
74.9k
    10U,  // MOVEQZ_S
5465
74.9k
    10U,  // MOVF
5466
74.9k
    10U,  // MOVF_S
5467
74.9k
    8U, // MOVGEZ
5468
74.9k
    10U,  // MOVGEZ_S
5469
74.9k
    0U, // MOVI
5470
74.9k
    0U, // MOVI_N
5471
74.9k
    8U, // MOVLTZ
5472
74.9k
    10U,  // MOVLTZ_S
5473
74.9k
    8U, // MOVNEZ
5474
74.9k
    10U,  // MOVNEZ_S
5475
74.9k
    0U, // MOVSP
5476
74.9k
    10U,  // MOVT
5477
74.9k
    10U,  // MOVT_S
5478
74.9k
    0U, // MOV_N
5479
74.9k
    0U, // MOV_S
5480
74.9k
    10U,  // MSUB_S
5481
74.9k
    8U, // MUL16S
5482
74.9k
    8U, // MUL16U
5483
74.9k
    0U, // MULA_AA_HH
5484
74.9k
    0U, // MULA_AA_HL
5485
74.9k
    0U, // MULA_AA_LH
5486
74.9k
    0U, // MULA_AA_LL
5487
74.9k
    0U, // MULA_AD_HH
5488
74.9k
    0U, // MULA_AD_HL
5489
74.9k
    0U, // MULA_AD_LH
5490
74.9k
    0U, // MULA_AD_LL
5491
74.9k
    0U, // MULA_DA_HH
5492
74.9k
    642U, // MULA_DA_HH_LDDEC
5493
74.9k
    642U, // MULA_DA_HH_LDINC
5494
74.9k
    0U, // MULA_DA_HL
5495
74.9k
    642U, // MULA_DA_HL_LDDEC
5496
74.9k
    642U, // MULA_DA_HL_LDINC
5497
74.9k
    0U, // MULA_DA_LH
5498
74.9k
    642U, // MULA_DA_LH_LDDEC
5499
74.9k
    642U, // MULA_DA_LH_LDINC
5500
74.9k
    0U, // MULA_DA_LL
5501
74.9k
    642U, // MULA_DA_LL_LDDEC
5502
74.9k
    642U, // MULA_DA_LL_LDINC
5503
74.9k
    0U, // MULA_DD_HH
5504
74.9k
    642U, // MULA_DD_HH_LDDEC
5505
74.9k
    642U, // MULA_DD_HH_LDINC
5506
74.9k
    0U, // MULA_DD_HL
5507
74.9k
    642U, // MULA_DD_HL_LDDEC
5508
74.9k
    642U, // MULA_DD_HL_LDINC
5509
74.9k
    0U, // MULA_DD_LH
5510
74.9k
    642U, // MULA_DD_LH_LDDEC
5511
74.9k
    642U, // MULA_DD_LH_LDINC
5512
74.9k
    0U, // MULA_DD_LL
5513
74.9k
    642U, // MULA_DD_LL_LDDEC
5514
74.9k
    642U, // MULA_DD_LL_LDINC
5515
74.9k
    8U, // MULL
5516
74.9k
    8U, // MULSH
5517
74.9k
    0U, // MULS_AA_HH
5518
74.9k
    0U, // MULS_AA_HL
5519
74.9k
    0U, // MULS_AA_LH
5520
74.9k
    0U, // MULS_AA_LL
5521
74.9k
    0U, // MULS_AD_HH
5522
74.9k
    0U, // MULS_AD_HL
5523
74.9k
    0U, // MULS_AD_LH
5524
74.9k
    0U, // MULS_AD_LL
5525
74.9k
    0U, // MULS_DA_HH
5526
74.9k
    0U, // MULS_DA_HL
5527
74.9k
    0U, // MULS_DA_LH
5528
74.9k
    0U, // MULS_DA_LL
5529
74.9k
    0U, // MULS_DD_HH
5530
74.9k
    0U, // MULS_DD_HL
5531
74.9k
    0U, // MULS_DD_LH
5532
74.9k
    0U, // MULS_DD_LL
5533
74.9k
    8U, // MULUH
5534
74.9k
    0U, // MUL_AA_HH
5535
74.9k
    0U, // MUL_AA_HL
5536
74.9k
    0U, // MUL_AA_LH
5537
74.9k
    0U, // MUL_AA_LL
5538
74.9k
    0U, // MUL_AD_HH
5539
74.9k
    0U, // MUL_AD_HL
5540
74.9k
    0U, // MUL_AD_LH
5541
74.9k
    0U, // MUL_AD_LL
5542
74.9k
    0U, // MUL_DA_HH
5543
74.9k
    0U, // MUL_DA_HL
5544
74.9k
    0U, // MUL_DA_LH
5545
74.9k
    0U, // MUL_DA_LL
5546
74.9k
    0U, // MUL_DD_HH
5547
74.9k
    0U, // MUL_DD_HL
5548
74.9k
    0U, // MUL_DD_LH
5549
74.9k
    0U, // MUL_DD_LL
5550
74.9k
    8U, // MUL_S
5551
74.9k
    0U, // NEG
5552
74.9k
    0U, // NEG_S
5553
74.9k
    0U, // NEXP01_S
5554
74.9k
    0U, // NOP
5555
74.9k
    0U, // NSA
5556
74.9k
    0U, // NSAU
5557
74.9k
    8U, // OEQ_S
5558
74.9k
    8U, // OLE_S
5559
74.9k
    8U, // OLT_S
5560
74.9k
    8U, // OR
5561
74.9k
    8U, // ORB
5562
74.9k
    8U, // ORBC
5563
74.9k
    8U, // QUOS
5564
74.9k
    8U, // QUOU
5565
74.9k
    0U, // RECIP0_S
5566
74.9k
    8U, // REMS
5567
74.9k
    8U, // REMU
5568
74.9k
    0U, // RER
5569
74.9k
    0U, // RET
5570
74.9k
    0U, // RETW
5571
74.9k
    0U, // RETW_N
5572
74.9k
    0U, // RET_N
5573
74.9k
    0U, // RFDE
5574
74.9k
    0U, // RFE
5575
74.9k
    0U, // RFI
5576
74.9k
    0U, // RFR
5577
74.9k
    0U, // RFWO
5578
74.9k
    0U, // RFWU
5579
74.9k
    0U, // ROTW
5580
74.9k
    3U, // ROUND_S
5581
74.9k
    0U, // RSIL
5582
74.9k
    0U, // RSQRT0_S
5583
74.9k
    0U, // RSR
5584
74.9k
    0U, // RSYNC
5585
74.9k
    0U, // RUR
5586
74.9k
    0U, // RUR_ACCX_0
5587
74.9k
    0U, // RUR_ACCX_1
5588
74.9k
    0U, // RUR_AE_BITHEAD
5589
74.9k
    0U, // RUR_AE_BITPTR
5590
74.9k
    0U, // RUR_AE_BITSUSED
5591
74.9k
    0U, // RUR_AE_CBEGIN0
5592
74.9k
    0U, // RUR_AE_CEND0
5593
74.9k
    0U, // RUR_AE_CWRAP
5594
74.9k
    0U, // RUR_AE_CW_SD_NO
5595
74.9k
    0U, // RUR_AE_FIRST_TS
5596
74.9k
    0U, // RUR_AE_NEXTOFFSET
5597
74.9k
    0U, // RUR_AE_OVERFLOW
5598
74.9k
    0U, // RUR_AE_OVF_SAR
5599
74.9k
    0U, // RUR_AE_SAR
5600
74.9k
    0U, // RUR_AE_SEARCHDONE
5601
74.9k
    0U, // RUR_AE_TABLESIZE
5602
74.9k
    0U, // RUR_AE_TS_FTS_BU_BP
5603
74.9k
    0U, // RUR_FFT_BIT_WIDTH
5604
74.9k
    0U, // RUR_GPIO_OUT
5605
74.9k
    0U, // RUR_QACC_H_0
5606
74.9k
    0U, // RUR_QACC_H_1
5607
74.9k
    0U, // RUR_QACC_H_2
5608
74.9k
    0U, // RUR_QACC_H_3
5609
74.9k
    0U, // RUR_QACC_H_4
5610
74.9k
    0U, // RUR_QACC_L_0
5611
74.9k
    0U, // RUR_QACC_L_1
5612
74.9k
    0U, // RUR_QACC_L_2
5613
74.9k
    0U, // RUR_QACC_L_3
5614
74.9k
    0U, // RUR_QACC_L_4
5615
74.9k
    0U, // RUR_SAR_BYTE
5616
74.9k
    0U, // RUR_UA_STATE_0
5617
74.9k
    0U, // RUR_UA_STATE_1
5618
74.9k
    0U, // RUR_UA_STATE_2
5619
74.9k
    0U, // RUR_UA_STATE_3
5620
74.9k
    0U, // S16I
5621
74.9k
    0U, // S32C1I
5622
74.9k
    5U, // S32E
5623
74.9k
    0U, // S32I
5624
74.9k
    0U, // S32I_N
5625
74.9k
    0U, // S8I
5626
74.9k
    0U, // SET_BIT_GPIO_OUT
5627
74.9k
    3U, // SEXT
5628
74.9k
    0U, // SIMCALL
5629
74.9k
    0U, // SLL
5630
74.9k
    5U, // SLLI
5631
74.9k
    0U, // SQRT0_S
5632
74.9k
    0U, // SRA
5633
74.9k
    11U,  // SRAI
5634
74.9k
    8U, // SRC
5635
74.9k
    0U, // SRL
5636
74.9k
    11U,  // SRLI
5637
74.9k
    0U, // SSA8L
5638
74.9k
    0U, // SSAI
5639
74.9k
    0U, // SSI
5640
74.9k
    5U, // SSIP
5641
74.9k
    0U, // SSL
5642
74.9k
    0U, // SSR
5643
74.9k
    8U, // SSX
5644
74.9k
    10U,  // SSXP
5645
74.9k
    8U, // SUB
5646
74.9k
    8U, // SUBX2
5647
74.9k
    8U, // SUBX4
5648
74.9k
    8U, // SUBX8
5649
74.9k
    8U, // SUB_S
5650
74.9k
    0U, // SYSCALL
5651
74.9k
    3U, // TRUNC_S
5652
74.9k
    8U, // UEQ_S
5653
74.9k
    3U, // UFLOAT_S
5654
74.9k
    8U, // ULE_S
5655
74.9k
    8U, // ULT_S
5656
74.9k
    0U, // UMUL_AA_HH
5657
74.9k
    0U, // UMUL_AA_HL
5658
74.9k
    0U, // UMUL_AA_LH
5659
74.9k
    0U, // UMUL_AA_LL
5660
74.9k
    8U, // UN_S
5661
74.9k
    3U, // UTRUNC_S
5662
74.9k
    0U, // WAITI
5663
74.9k
    0U, // WDTLB
5664
74.9k
    0U, // WER
5665
74.9k
    0U, // WFR
5666
74.9k
    0U, // WITLB
5667
74.9k
    0U, // WR_MASK_GPIO_OUT
5668
74.9k
    0U, // WSR
5669
74.9k
    0U, // WUR
5670
74.9k
    0U, // WUR_ACCX_0
5671
74.9k
    0U, // WUR_ACCX_1
5672
74.9k
    0U, // WUR_AE_BITHEAD
5673
74.9k
    0U, // WUR_AE_BITPTR
5674
74.9k
    0U, // WUR_AE_BITSUSED
5675
74.9k
    0U, // WUR_AE_CBEGIN0
5676
74.9k
    0U, // WUR_AE_CEND0
5677
74.9k
    0U, // WUR_AE_CWRAP
5678
74.9k
    0U, // WUR_AE_CW_SD_NO
5679
74.9k
    0U, // WUR_AE_FIRST_TS
5680
74.9k
    0U, // WUR_AE_NEXTOFFSET
5681
74.9k
    0U, // WUR_AE_OVERFLOW
5682
74.9k
    0U, // WUR_AE_OVF_SAR
5683
74.9k
    0U, // WUR_AE_SAR
5684
74.9k
    0U, // WUR_AE_SEARCHDONE
5685
74.9k
    0U, // WUR_AE_TABLESIZE
5686
74.9k
    0U, // WUR_AE_TS_FTS_BU_BP
5687
74.9k
    0U, // WUR_FCR
5688
74.9k
    0U, // WUR_FFT_BIT_WIDTH
5689
74.9k
    0U, // WUR_FSR
5690
74.9k
    0U, // WUR_GPIO_OUT
5691
74.9k
    0U, // WUR_QACC_H_0
5692
74.9k
    0U, // WUR_QACC_H_1
5693
74.9k
    0U, // WUR_QACC_H_2
5694
74.9k
    0U, // WUR_QACC_H_3
5695
74.9k
    0U, // WUR_QACC_H_4
5696
74.9k
    0U, // WUR_QACC_L_0
5697
74.9k
    0U, // WUR_QACC_L_1
5698
74.9k
    0U, // WUR_QACC_L_2
5699
74.9k
    0U, // WUR_QACC_L_3
5700
74.9k
    0U, // WUR_QACC_L_4
5701
74.9k
    0U, // WUR_SAR_BYTE
5702
74.9k
    0U, // WUR_UA_STATE_0
5703
74.9k
    0U, // WUR_UA_STATE_1
5704
74.9k
    0U, // WUR_UA_STATE_2
5705
74.9k
    0U, // WUR_UA_STATE_3
5706
74.9k
    8U, // XOR
5707
74.9k
    8U, // XORB
5708
74.9k
    0U, // XSR
5709
74.9k
    0U, // _L32I
5710
74.9k
    0U, // _L32I_N
5711
74.9k
    0U, // _MOVI
5712
74.9k
    0U, // _S32I
5713
74.9k
    0U, // _S32I_N
5714
74.9k
    5U, // _SLLI
5715
74.9k
    3U, // _SRLI
5716
74.9k
    0U, // mv_QR
5717
74.9k
  };
5718
5719
74.9k
  static const uint8_t OpInfo2[] = {
5720
74.9k
    0U, // PHI
5721
74.9k
    0U, // INLINEASM
5722
74.9k
    0U, // INLINEASM_BR
5723
74.9k
    0U, // CFI_INSTRUCTION
5724
74.9k
    0U, // EH_LABEL
5725
74.9k
    0U, // GC_LABEL
5726
74.9k
    0U, // ANNOTATION_LABEL
5727
74.9k
    0U, // KILL
5728
74.9k
    0U, // EXTRACT_SUBREG
5729
74.9k
    0U, // INSERT_SUBREG
5730
74.9k
    0U, // IMPLICIT_DEF
5731
74.9k
    0U, // SUBREG_TO_REG
5732
74.9k
    0U, // COPY_TO_REGCLASS
5733
74.9k
    0U, // DBG_VALUE
5734
74.9k
    0U, // DBG_VALUE_LIST
5735
74.9k
    0U, // DBG_INSTR_REF
5736
74.9k
    0U, // DBG_PHI
5737
74.9k
    0U, // DBG_LABEL
5738
74.9k
    0U, // REG_SEQUENCE
5739
74.9k
    0U, // COPY
5740
74.9k
    0U, // BUNDLE
5741
74.9k
    0U, // LIFETIME_START
5742
74.9k
    0U, // LIFETIME_END
5743
74.9k
    0U, // PSEUDO_PROBE
5744
74.9k
    0U, // ARITH_FENCE
5745
74.9k
    0U, // STACKMAP
5746
74.9k
    0U, // FENTRY_CALL
5747
74.9k
    0U, // PATCHPOINT
5748
74.9k
    0U, // LOAD_STACK_GUARD
5749
74.9k
    0U, // PREALLOCATED_SETUP
5750
74.9k
    0U, // PREALLOCATED_ARG
5751
74.9k
    0U, // STATEPOINT
5752
74.9k
    0U, // LOCAL_ESCAPE
5753
74.9k
    0U, // FAULTING_OP
5754
74.9k
    0U, // PATCHABLE_OP
5755
74.9k
    0U, // PATCHABLE_FUNCTION_ENTER
5756
74.9k
    0U, // PATCHABLE_RET
5757
74.9k
    0U, // PATCHABLE_FUNCTION_EXIT
5758
74.9k
    0U, // PATCHABLE_TAIL_CALL
5759
74.9k
    0U, // PATCHABLE_EVENT_CALL
5760
74.9k
    0U, // PATCHABLE_TYPED_EVENT_CALL
5761
74.9k
    0U, // ICALL_BRANCH_FUNNEL
5762
74.9k
    0U, // MEMBARRIER
5763
74.9k
    0U, // JUMP_TABLE_DEBUG_INFO
5764
74.9k
    0U, // G_ASSERT_SEXT
5765
74.9k
    0U, // G_ASSERT_ZEXT
5766
74.9k
    0U, // G_ASSERT_ALIGN
5767
74.9k
    0U, // G_ADD
5768
74.9k
    0U, // G_SUB
5769
74.9k
    0U, // G_MUL
5770
74.9k
    0U, // G_SDIV
5771
74.9k
    0U, // G_UDIV
5772
74.9k
    0U, // G_SREM
5773
74.9k
    0U, // G_UREM
5774
74.9k
    0U, // G_SDIVREM
5775
74.9k
    0U, // G_UDIVREM
5776
74.9k
    0U, // G_AND
5777
74.9k
    0U, // G_OR
5778
74.9k
    0U, // G_XOR
5779
74.9k
    0U, // G_IMPLICIT_DEF
5780
74.9k
    0U, // G_PHI
5781
74.9k
    0U, // G_FRAME_INDEX
5782
74.9k
    0U, // G_GLOBAL_VALUE
5783
74.9k
    0U, // G_CONSTANT_POOL
5784
74.9k
    0U, // G_EXTRACT
5785
74.9k
    0U, // G_UNMERGE_VALUES
5786
74.9k
    0U, // G_INSERT
5787
74.9k
    0U, // G_MERGE_VALUES
5788
74.9k
    0U, // G_BUILD_VECTOR
5789
74.9k
    0U, // G_BUILD_VECTOR_TRUNC
5790
74.9k
    0U, // G_CONCAT_VECTORS
5791
74.9k
    0U, // G_PTRTOINT
5792
74.9k
    0U, // G_INTTOPTR
5793
74.9k
    0U, // G_BITCAST
5794
74.9k
    0U, // G_FREEZE
5795
74.9k
    0U, // G_CONSTANT_FOLD_BARRIER
5796
74.9k
    0U, // G_INTRINSIC_FPTRUNC_ROUND
5797
74.9k
    0U, // G_INTRINSIC_TRUNC
5798
74.9k
    0U, // G_INTRINSIC_ROUND
5799
74.9k
    0U, // G_INTRINSIC_LRINT
5800
74.9k
    0U, // G_INTRINSIC_ROUNDEVEN
5801
74.9k
    0U, // G_READCYCLECOUNTER
5802
74.9k
    0U, // G_LOAD
5803
74.9k
    0U, // G_SEXTLOAD
5804
74.9k
    0U, // G_ZEXTLOAD
5805
74.9k
    0U, // G_INDEXED_LOAD
5806
74.9k
    0U, // G_INDEXED_SEXTLOAD
5807
74.9k
    0U, // G_INDEXED_ZEXTLOAD
5808
74.9k
    0U, // G_STORE
5809
74.9k
    0U, // G_INDEXED_STORE
5810
74.9k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
5811
74.9k
    0U, // G_ATOMIC_CMPXCHG
5812
74.9k
    0U, // G_ATOMICRMW_XCHG
5813
74.9k
    0U, // G_ATOMICRMW_ADD
5814
74.9k
    0U, // G_ATOMICRMW_SUB
5815
74.9k
    0U, // G_ATOMICRMW_AND
5816
74.9k
    0U, // G_ATOMICRMW_NAND
5817
74.9k
    0U, // G_ATOMICRMW_OR
5818
74.9k
    0U, // G_ATOMICRMW_XOR
5819
74.9k
    0U, // G_ATOMICRMW_MAX
5820
74.9k
    0U, // G_ATOMICRMW_MIN
5821
74.9k
    0U, // G_ATOMICRMW_UMAX
5822
74.9k
    0U, // G_ATOMICRMW_UMIN
5823
74.9k
    0U, // G_ATOMICRMW_FADD
5824
74.9k
    0U, // G_ATOMICRMW_FSUB
5825
74.9k
    0U, // G_ATOMICRMW_FMAX
5826
74.9k
    0U, // G_ATOMICRMW_FMIN
5827
74.9k
    0U, // G_ATOMICRMW_UINC_WRAP
5828
74.9k
    0U, // G_ATOMICRMW_UDEC_WRAP
5829
74.9k
    0U, // G_FENCE
5830
74.9k
    0U, // G_PREFETCH
5831
74.9k
    0U, // G_BRCOND
5832
74.9k
    0U, // G_BRINDIRECT
5833
74.9k
    0U, // G_INVOKE_REGION_START
5834
74.9k
    0U, // G_INTRINSIC
5835
74.9k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
5836
74.9k
    0U, // G_INTRINSIC_CONVERGENT
5837
74.9k
    0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
5838
74.9k
    0U, // G_ANYEXT
5839
74.9k
    0U, // G_TRUNC
5840
74.9k
    0U, // G_CONSTANT
5841
74.9k
    0U, // G_FCONSTANT
5842
74.9k
    0U, // G_VASTART
5843
74.9k
    0U, // G_VAARG
5844
74.9k
    0U, // G_SEXT
5845
74.9k
    0U, // G_SEXT_INREG
5846
74.9k
    0U, // G_ZEXT
5847
74.9k
    0U, // G_SHL
5848
74.9k
    0U, // G_LSHR
5849
74.9k
    0U, // G_ASHR
5850
74.9k
    0U, // G_FSHL
5851
74.9k
    0U, // G_FSHR
5852
74.9k
    0U, // G_ROTR
5853
74.9k
    0U, // G_ROTL
5854
74.9k
    0U, // G_ICMP
5855
74.9k
    0U, // G_FCMP
5856
74.9k
    0U, // G_SELECT
5857
74.9k
    0U, // G_UADDO
5858
74.9k
    0U, // G_UADDE
5859
74.9k
    0U, // G_USUBO
5860
74.9k
    0U, // G_USUBE
5861
74.9k
    0U, // G_SADDO
5862
74.9k
    0U, // G_SADDE
5863
74.9k
    0U, // G_SSUBO
5864
74.9k
    0U, // G_SSUBE
5865
74.9k
    0U, // G_UMULO
5866
74.9k
    0U, // G_SMULO
5867
74.9k
    0U, // G_UMULH
5868
74.9k
    0U, // G_SMULH
5869
74.9k
    0U, // G_UADDSAT
5870
74.9k
    0U, // G_SADDSAT
5871
74.9k
    0U, // G_USUBSAT
5872
74.9k
    0U, // G_SSUBSAT
5873
74.9k
    0U, // G_USHLSAT
5874
74.9k
    0U, // G_SSHLSAT
5875
74.9k
    0U, // G_SMULFIX
5876
74.9k
    0U, // G_UMULFIX
5877
74.9k
    0U, // G_SMULFIXSAT
5878
74.9k
    0U, // G_UMULFIXSAT
5879
74.9k
    0U, // G_SDIVFIX
5880
74.9k
    0U, // G_UDIVFIX
5881
74.9k
    0U, // G_SDIVFIXSAT
5882
74.9k
    0U, // G_UDIVFIXSAT
5883
74.9k
    0U, // G_FADD
5884
74.9k
    0U, // G_FSUB
5885
74.9k
    0U, // G_FMUL
5886
74.9k
    0U, // G_FMA
5887
74.9k
    0U, // G_FMAD
5888
74.9k
    0U, // G_FDIV
5889
74.9k
    0U, // G_FREM
5890
74.9k
    0U, // G_FPOW
5891
74.9k
    0U, // G_FPOWI
5892
74.9k
    0U, // G_FEXP
5893
74.9k
    0U, // G_FEXP2
5894
74.9k
    0U, // G_FEXP10
5895
74.9k
    0U, // G_FLOG
5896
74.9k
    0U, // G_FLOG2
5897
74.9k
    0U, // G_FLOG10
5898
74.9k
    0U, // G_FLDEXP
5899
74.9k
    0U, // G_FFREXP
5900
74.9k
    0U, // G_FNEG
5901
74.9k
    0U, // G_FPEXT
5902
74.9k
    0U, // G_FPTRUNC
5903
74.9k
    0U, // G_FPTOSI
5904
74.9k
    0U, // G_FPTOUI
5905
74.9k
    0U, // G_SITOFP
5906
74.9k
    0U, // G_UITOFP
5907
74.9k
    0U, // G_FABS
5908
74.9k
    0U, // G_FCOPYSIGN
5909
74.9k
    0U, // G_IS_FPCLASS
5910
74.9k
    0U, // G_FCANONICALIZE
5911
74.9k
    0U, // G_FMINNUM
5912
74.9k
    0U, // G_FMAXNUM
5913
74.9k
    0U, // G_FMINNUM_IEEE
5914
74.9k
    0U, // G_FMAXNUM_IEEE
5915
74.9k
    0U, // G_FMINIMUM
5916
74.9k
    0U, // G_FMAXIMUM
5917
74.9k
    0U, // G_GET_FPENV
5918
74.9k
    0U, // G_SET_FPENV
5919
74.9k
    0U, // G_RESET_FPENV
5920
74.9k
    0U, // G_GET_FPMODE
5921
74.9k
    0U, // G_SET_FPMODE
5922
74.9k
    0U, // G_RESET_FPMODE
5923
74.9k
    0U, // G_PTR_ADD
5924
74.9k
    0U, // G_PTRMASK
5925
74.9k
    0U, // G_SMIN
5926
74.9k
    0U, // G_SMAX
5927
74.9k
    0U, // G_UMIN
5928
74.9k
    0U, // G_UMAX
5929
74.9k
    0U, // G_ABS
5930
74.9k
    0U, // G_LROUND
5931
74.9k
    0U, // G_LLROUND
5932
74.9k
    0U, // G_BR
5933
74.9k
    0U, // G_BRJT
5934
74.9k
    0U, // G_INSERT_VECTOR_ELT
5935
74.9k
    0U, // G_EXTRACT_VECTOR_ELT
5936
74.9k
    0U, // G_SHUFFLE_VECTOR
5937
74.9k
    0U, // G_CTTZ
5938
74.9k
    0U, // G_CTTZ_ZERO_UNDEF
5939
74.9k
    0U, // G_CTLZ
5940
74.9k
    0U, // G_CTLZ_ZERO_UNDEF
5941
74.9k
    0U, // G_CTPOP
5942
74.9k
    0U, // G_BSWAP
5943
74.9k
    0U, // G_BITREVERSE
5944
74.9k
    0U, // G_FCEIL
5945
74.9k
    0U, // G_FCOS
5946
74.9k
    0U, // G_FSIN
5947
74.9k
    0U, // G_FSQRT
5948
74.9k
    0U, // G_FFLOOR
5949
74.9k
    0U, // G_FRINT
5950
74.9k
    0U, // G_FNEARBYINT
5951
74.9k
    0U, // G_ADDRSPACE_CAST
5952
74.9k
    0U, // G_BLOCK_ADDR
5953
74.9k
    0U, // G_JUMP_TABLE
5954
74.9k
    0U, // G_DYN_STACKALLOC
5955
74.9k
    0U, // G_STACKSAVE
5956
74.9k
    0U, // G_STACKRESTORE
5957
74.9k
    0U, // G_STRICT_FADD
5958
74.9k
    0U, // G_STRICT_FSUB
5959
74.9k
    0U, // G_STRICT_FMUL
5960
74.9k
    0U, // G_STRICT_FDIV
5961
74.9k
    0U, // G_STRICT_FREM
5962
74.9k
    0U, // G_STRICT_FMA
5963
74.9k
    0U, // G_STRICT_FSQRT
5964
74.9k
    0U, // G_STRICT_FLDEXP
5965
74.9k
    0U, // G_READ_REGISTER
5966
74.9k
    0U, // G_WRITE_REGISTER
5967
74.9k
    0U, // G_MEMCPY
5968
74.9k
    0U, // G_MEMCPY_INLINE
5969
74.9k
    0U, // G_MEMMOVE
5970
74.9k
    0U, // G_MEMSET
5971
74.9k
    0U, // G_BZERO
5972
74.9k
    0U, // G_VECREDUCE_SEQ_FADD
5973
74.9k
    0U, // G_VECREDUCE_SEQ_FMUL
5974
74.9k
    0U, // G_VECREDUCE_FADD
5975
74.9k
    0U, // G_VECREDUCE_FMUL
5976
74.9k
    0U, // G_VECREDUCE_FMAX
5977
74.9k
    0U, // G_VECREDUCE_FMIN
5978
74.9k
    0U, // G_VECREDUCE_FMAXIMUM
5979
74.9k
    0U, // G_VECREDUCE_FMINIMUM
5980
74.9k
    0U, // G_VECREDUCE_ADD
5981
74.9k
    0U, // G_VECREDUCE_MUL
5982
74.9k
    0U, // G_VECREDUCE_AND
5983
74.9k
    0U, // G_VECREDUCE_OR
5984
74.9k
    0U, // G_VECREDUCE_XOR
5985
74.9k
    0U, // G_VECREDUCE_SMAX
5986
74.9k
    0U, // G_VECREDUCE_SMIN
5987
74.9k
    0U, // G_VECREDUCE_UMAX
5988
74.9k
    0U, // G_VECREDUCE_UMIN
5989
74.9k
    0U, // G_SBFX
5990
74.9k
    0U, // G_UBFX
5991
74.9k
    0U, // ADJCALLSTACKDOWN
5992
74.9k
    0U, // ADJCALLSTACKUP
5993
74.9k
    0U, // ATOMIC_CMP_SWAP_16_P
5994
74.9k
    0U, // ATOMIC_CMP_SWAP_32_P
5995
74.9k
    0U, // ATOMIC_CMP_SWAP_8_P
5996
74.9k
    0U, // ATOMIC_LOAD_ADD_16_P
5997
74.9k
    0U, // ATOMIC_LOAD_ADD_32_P
5998
74.9k
    0U, // ATOMIC_LOAD_ADD_8_P
5999
74.9k
    0U, // ATOMIC_LOAD_AND_16_P
6000
74.9k
    0U, // ATOMIC_LOAD_AND_32_P
6001
74.9k
    0U, // ATOMIC_LOAD_AND_8_P
6002
74.9k
    0U, // ATOMIC_LOAD_MAX_16_P
6003
74.9k
    0U, // ATOMIC_LOAD_MAX_32_P
6004
74.9k
    0U, // ATOMIC_LOAD_MAX_8_P
6005
74.9k
    0U, // ATOMIC_LOAD_MIN_16_P
6006
74.9k
    0U, // ATOMIC_LOAD_MIN_32_P
6007
74.9k
    0U, // ATOMIC_LOAD_MIN_8_P
6008
74.9k
    0U, // ATOMIC_LOAD_NAND_16_P
6009
74.9k
    0U, // ATOMIC_LOAD_NAND_32_P
6010
74.9k
    0U, // ATOMIC_LOAD_NAND_8_P
6011
74.9k
    0U, // ATOMIC_LOAD_OR_16_P
6012
74.9k
    0U, // ATOMIC_LOAD_OR_32_P
6013
74.9k
    0U, // ATOMIC_LOAD_OR_8_P
6014
74.9k
    0U, // ATOMIC_LOAD_SUB_16_P
6015
74.9k
    0U, // ATOMIC_LOAD_SUB_32_P
6016
74.9k
    0U, // ATOMIC_LOAD_SUB_8_P
6017
74.9k
    0U, // ATOMIC_LOAD_UMAX_16_P
6018
74.9k
    0U, // ATOMIC_LOAD_UMAX_32_P
6019
74.9k
    0U, // ATOMIC_LOAD_UMAX_8_P
6020
74.9k
    0U, // ATOMIC_LOAD_UMIN_16_P
6021
74.9k
    0U, // ATOMIC_LOAD_UMIN_32_P
6022
74.9k
    0U, // ATOMIC_LOAD_UMIN_8_P
6023
74.9k
    0U, // ATOMIC_LOAD_XOR_16_P
6024
74.9k
    0U, // ATOMIC_LOAD_XOR_32_P
6025
74.9k
    0U, // ATOMIC_LOAD_XOR_8_P
6026
74.9k
    0U, // ATOMIC_SWAP_16_P
6027
74.9k
    0U, // ATOMIC_SWAP_32_P
6028
74.9k
    0U, // ATOMIC_SWAP_8_P
6029
74.9k
    0U, // BRCC_FP
6030
74.9k
    0U, // BR_JT
6031
74.9k
    0U, // CONSTPOOL_ENTRY
6032
74.9k
    0U, // EE_ANDQ_P
6033
74.9k
    0U, // EE_BITREV_P
6034
74.9k
    0U, // EE_CMUL_S16_LD_INCP_P
6035
74.9k
    0U, // EE_CMUL_S16_P
6036
74.9k
    0U, // EE_CMUL_S16_ST_INCP_P
6037
74.9k
    1U, // EE_FFT_AMS_S16_LD_INCP_P
6038
74.9k
    1U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P
6039
74.9k
    1U, // EE_FFT_AMS_S16_LD_R32_DECP_P
6040
74.9k
    1U, // EE_FFT_AMS_S16_ST_INCP_P
6041
74.9k
    17U,  // EE_FFT_CMUL_S16_LD_XP_P
6042
74.9k
    2U, // EE_FFT_CMUL_S16_ST_XP_P
6043
74.9k
    0U, // EE_FFT_R2BF_S16_P
6044
74.9k
    0U, // EE_FFT_R2BF_S16_ST_INCP_P
6045
74.9k
    0U, // EE_FFT_VST_R32_DECP_P
6046
74.9k
    3U, // EE_LDF_128_IP_P
6047
74.9k
    4U, // EE_LDF_128_XP_P
6048
74.9k
    0U, // EE_LDF_64_IP_P
6049
74.9k
    0U, // EE_LDF_64_XP_P
6050
74.9k
    0U, // EE_LDQA_S16_128_IP_P
6051
74.9k
    0U, // EE_LDQA_S16_128_XP_P
6052
74.9k
    0U, // EE_LDQA_S8_128_IP_P
6053
74.9k
    0U, // EE_LDQA_S8_128_XP_P
6054
74.9k
    0U, // EE_LDQA_U16_128_IP_P
6055
74.9k
    0U, // EE_LDQA_U16_128_XP_P
6056
74.9k
    0U, // EE_LDQA_U8_128_IP_P
6057
74.9k
    0U, // EE_LDQA_U8_128_XP_P
6058
74.9k
    0U, // EE_LDXQ_32_P
6059
74.9k
    0U, // EE_LD_128_USAR_IP_P
6060
74.9k
    0U, // EE_LD_128_USAR_XP_P
6061
74.9k
    0U, // EE_LD_ACCX_IP_P
6062
74.9k
    0U, // EE_LD_QACC_H_H_32_IP_P
6063
74.9k
    0U, // EE_LD_QACC_H_L_128_IP_P
6064
74.9k
    0U, // EE_LD_QACC_L_H_32_IP_P
6065
74.9k
    0U, // EE_LD_QACC_L_L_128_IP_P
6066
74.9k
    0U, // EE_LD_UA_STATE_IP_P
6067
74.9k
    0U, // EE_MOVI_32_A_P
6068
74.9k
    0U, // EE_MOVI_32_Q_P
6069
74.9k
    0U, // EE_MOV_S16_QACC_P
6070
74.9k
    0U, // EE_MOV_S8_QACC_P
6071
74.9k
    0U, // EE_MOV_U16_QACC_P
6072
74.9k
    0U, // EE_MOV_U8_QACC_P
6073
74.9k
    0U, // EE_NOTQ_P
6074
74.9k
    0U, // EE_ORQ_P
6075
74.9k
    0U, // EE_SLCI_2Q_P
6076
74.9k
    0U, // EE_SLCXXP_2Q_P
6077
74.9k
    0U, // EE_SRCI_2Q_P
6078
74.9k
    0U, // EE_SRCMB_S16_QACC_P
6079
74.9k
    0U, // EE_SRCMB_S8_QACC_P
6080
74.9k
    0U, // EE_SRCQ_128_ST_INCP_P
6081
74.9k
    0U, // EE_SRCXXP_2Q_P
6082
74.9k
    0U, // EE_SRC_Q_LD_IP_P
6083
74.9k
    0U, // EE_SRC_Q_LD_XP_P
6084
74.9k
    0U, // EE_SRC_Q_P
6085
74.9k
    0U, // EE_SRC_Q_QUP_P
6086
74.9k
    0U, // EE_SRS_ACCX_P
6087
74.9k
    3U, // EE_STF_128_IP_P
6088
74.9k
    4U, // EE_STF_128_XP_P
6089
74.9k
    0U, // EE_STF_64_IP_P
6090
74.9k
    0U, // EE_STF_64_XP_P
6091
74.9k
    0U, // EE_STXQ_32_P
6092
74.9k
    0U, // EE_ST_ACCX_IP_P
6093
74.9k
    0U, // EE_ST_QACC_H_H_32_IP_P
6094
74.9k
    0U, // EE_ST_QACC_H_L_128_IP_P
6095
74.9k
    0U, // EE_ST_QACC_L_H_32_IP_P
6096
74.9k
    0U, // EE_ST_QACC_L_L_128_IP_P
6097
74.9k
    0U, // EE_ST_UA_STATE_IP_P
6098
74.9k
    0U, // EE_VADDS_S16_LD_INCP_P
6099
74.9k
    0U, // EE_VADDS_S16_P
6100
74.9k
    0U, // EE_VADDS_S16_ST_INCP_P
6101
74.9k
    0U, // EE_VADDS_S32_LD_INCP_P
6102
74.9k
    0U, // EE_VADDS_S32_P
6103
74.9k
    0U, // EE_VADDS_S32_ST_INCP_P
6104
74.9k
    0U, // EE_VADDS_S8_LD_INCP_P
6105
74.9k
    0U, // EE_VADDS_S8_P
6106
74.9k
    0U, // EE_VADDS_S8_ST_INCP_P
6107
74.9k
    0U, // EE_VCMP_EQ_S16_P
6108
74.9k
    0U, // EE_VCMP_EQ_S32_P
6109
74.9k
    0U, // EE_VCMP_EQ_S8_P
6110
74.9k
    0U, // EE_VCMP_GT_S16_P
6111
74.9k
    0U, // EE_VCMP_GT_S32_P
6112
74.9k
    0U, // EE_VCMP_GT_S8_P
6113
74.9k
    0U, // EE_VCMP_LT_S16_P
6114
74.9k
    0U, // EE_VCMP_LT_S32_P
6115
74.9k
    0U, // EE_VCMP_LT_S8_P
6116
74.9k
    0U, // EE_VLDBC_16_IP_P
6117
74.9k
    0U, // EE_VLDBC_16_P
6118
74.9k
    0U, // EE_VLDBC_16_XP_P
6119
74.9k
    0U, // EE_VLDBC_32_IP_P
6120
74.9k
    0U, // EE_VLDBC_32_P
6121
74.9k
    0U, // EE_VLDBC_32_XP_P
6122
74.9k
    0U, // EE_VLDBC_8_IP_P
6123
74.9k
    0U, // EE_VLDBC_8_P
6124
74.9k
    0U, // EE_VLDBC_8_XP_P
6125
74.9k
    0U, // EE_VLDHBC_16_INCP_P
6126
74.9k
    0U, // EE_VLD_128_IP_P
6127
74.9k
    0U, // EE_VLD_128_XP_P
6128
74.9k
    0U, // EE_VLD_H_64_IP_P
6129
74.9k
    0U, // EE_VLD_H_64_XP_P
6130
74.9k
    0U, // EE_VLD_L_64_IP_P
6131
74.9k
    0U, // EE_VLD_L_64_XP_P
6132
74.9k
    0U, // EE_VMAX_S16_LD_INCP_P
6133
74.9k
    0U, // EE_VMAX_S16_P
6134
74.9k
    0U, // EE_VMAX_S16_ST_INCP_P
6135
74.9k
    0U, // EE_VMAX_S32_LD_INCP_P
6136
74.9k
    0U, // EE_VMAX_S32_P
6137
74.9k
    0U, // EE_VMAX_S32_ST_INCP_P
6138
74.9k
    0U, // EE_VMAX_S8_LD_INCP_P
6139
74.9k
    0U, // EE_VMAX_S8_P
6140
74.9k
    0U, // EE_VMAX_S8_ST_INCP_P
6141
74.9k
    0U, // EE_VMIN_S16_LD_INCP_P
6142
74.9k
    0U, // EE_VMIN_S16_P
6143
74.9k
    0U, // EE_VMIN_S16_ST_INCP_P
6144
74.9k
    0U, // EE_VMIN_S32_LD_INCP_P
6145
74.9k
    0U, // EE_VMIN_S32_P
6146
74.9k
    0U, // EE_VMIN_S32_ST_INCP_P
6147
74.9k
    0U, // EE_VMIN_S8_LD_INCP_P
6148
74.9k
    0U, // EE_VMIN_S8_P
6149
74.9k
    0U, // EE_VMIN_S8_ST_INCP_P
6150
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_P
6151
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P
6152
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_XP_P
6153
74.9k
    65U,  // EE_VMULAS_S16_ACCX_LD_XP_QUP_P
6154
74.9k
    0U, // EE_VMULAS_S16_ACCX_P
6155
74.9k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP_P
6156
74.9k
    9U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P
6157
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_IP_P
6158
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P
6159
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_XP_P
6160
74.9k
    65U,  // EE_VMULAS_S16_QACC_LD_XP_QUP_P
6161
74.9k
    0U, // EE_VMULAS_S16_QACC_P
6162
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_P
6163
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P
6164
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_XP_P
6165
74.9k
    65U,  // EE_VMULAS_S8_ACCX_LD_XP_QUP_P
6166
74.9k
    0U, // EE_VMULAS_S8_ACCX_P
6167
74.9k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP_P
6168
74.9k
    9U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P
6169
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_IP_P
6170
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P
6171
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_XP_P
6172
74.9k
    65U,  // EE_VMULAS_S8_QACC_LD_XP_QUP_P
6173
74.9k
    0U, // EE_VMULAS_S8_QACC_P
6174
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_P
6175
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P
6176
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_XP_P
6177
74.9k
    65U,  // EE_VMULAS_U16_ACCX_LD_XP_QUP_P
6178
74.9k
    0U, // EE_VMULAS_U16_ACCX_P
6179
74.9k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP_P
6180
74.9k
    9U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P
6181
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_IP_P
6182
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P
6183
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_XP_P
6184
74.9k
    65U,  // EE_VMULAS_U16_QACC_LD_XP_QUP_P
6185
74.9k
    0U, // EE_VMULAS_U16_QACC_P
6186
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_P
6187
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P
6188
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_XP_P
6189
74.9k
    65U,  // EE_VMULAS_U8_ACCX_LD_XP_QUP_P
6190
74.9k
    0U, // EE_VMULAS_U8_ACCX_P
6191
74.9k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP_P
6192
74.9k
    9U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P
6193
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_IP_P
6194
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P
6195
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_XP_P
6196
74.9k
    65U,  // EE_VMULAS_U8_QACC_LD_XP_QUP_P
6197
74.9k
    0U, // EE_VMULAS_U8_QACC_P
6198
74.9k
    0U, // EE_VMUL_S16_LD_INCP_P
6199
74.9k
    0U, // EE_VMUL_S16_P
6200
74.9k
    0U, // EE_VMUL_S16_ST_INCP_P
6201
74.9k
    0U, // EE_VMUL_S8_LD_INCP_P
6202
74.9k
    0U, // EE_VMUL_S8_P
6203
74.9k
    0U, // EE_VMUL_S8_ST_INCP_P
6204
74.9k
    0U, // EE_VMUL_U16_LD_INCP_P
6205
74.9k
    0U, // EE_VMUL_U16_P
6206
74.9k
    0U, // EE_VMUL_U16_ST_INCP_P
6207
74.9k
    0U, // EE_VMUL_U8_LD_INCP_P
6208
74.9k
    0U, // EE_VMUL_U8_P
6209
74.9k
    0U, // EE_VMUL_U8_ST_INCP_P
6210
74.9k
    0U, // EE_VPRELU_S16_P
6211
74.9k
    0U, // EE_VPRELU_S8_P
6212
74.9k
    0U, // EE_VRELU_S16_P
6213
74.9k
    0U, // EE_VRELU_S8_P
6214
74.9k
    0U, // EE_VSL_32_P
6215
74.9k
    0U, // EE_VSMULAS_S16_QACC_LD_INCP_P
6216
74.9k
    0U, // EE_VSMULAS_S16_QACC_P
6217
74.9k
    0U, // EE_VSMULAS_S8_QACC_LD_INCP_P
6218
74.9k
    0U, // EE_VSMULAS_S8_QACC_P
6219
74.9k
    0U, // EE_VSR_32_P
6220
74.9k
    0U, // EE_VST_128_IP_P
6221
74.9k
    0U, // EE_VST_128_XP_P
6222
74.9k
    0U, // EE_VST_H_64_IP_P
6223
74.9k
    0U, // EE_VST_H_64_XP_P
6224
74.9k
    0U, // EE_VST_L_64_IP_P
6225
74.9k
    0U, // EE_VST_L_64_XP_P
6226
74.9k
    0U, // EE_VSUBS_S16_LD_INCP_P
6227
74.9k
    0U, // EE_VSUBS_S16_P
6228
74.9k
    0U, // EE_VSUBS_S16_ST_INCP_P
6229
74.9k
    0U, // EE_VSUBS_S32_LD_INCP_P
6230
74.9k
    0U, // EE_VSUBS_S32_P
6231
74.9k
    0U, // EE_VSUBS_S32_ST_INCP_P
6232
74.9k
    0U, // EE_VSUBS_S8_LD_INCP_P
6233
74.9k
    0U, // EE_VSUBS_S8_P
6234
74.9k
    0U, // EE_VSUBS_S8_ST_INCP_P
6235
74.9k
    0U, // EE_VUNZIP_16_P
6236
74.9k
    0U, // EE_VUNZIP_32_P
6237
74.9k
    0U, // EE_VUNZIP_8_P
6238
74.9k
    0U, // EE_VZIP_16_P
6239
74.9k
    0U, // EE_VZIP_32_P
6240
74.9k
    0U, // EE_VZIP_8_P
6241
74.9k
    0U, // EE_XORQ_P
6242
74.9k
    0U, // EE_ZERO_ACCX_P
6243
74.9k
    0U, // EE_ZERO_QACC_P
6244
74.9k
    0U, // EE_ZERO_Q_P
6245
74.9k
    0U, // EXTUI_BR2_P
6246
74.9k
    0U, // EXTUI_BR4_P
6247
74.9k
    0U, // EXTUI_BR_P
6248
74.9k
    0U, // L8I_P
6249
74.9k
    0U, // LDDEC_P
6250
74.9k
    0U, // LDINC_P
6251
74.9k
    0U, // LOOPBR
6252
74.9k
    0U, // LOOPDEC
6253
74.9k
    0U, // LOOPEND
6254
74.9k
    0U, // LOOPINIT
6255
74.9k
    0U, // LOOPSTART
6256
74.9k
    0U, // MOVBA2_P
6257
74.9k
    0U, // MOVBA2_P2
6258
74.9k
    0U, // MOVBA4_P
6259
74.9k
    0U, // MOVBA4_P2
6260
74.9k
    0U, // MOVBA_P
6261
74.9k
    0U, // MOVBA_P2
6262
74.9k
    0U, // MULA_DA_HH_LDDEC_P
6263
74.9k
    0U, // MULA_DA_HH_LDINC_P
6264
74.9k
    0U, // MULA_DA_HL_LDDEC_P
6265
74.9k
    0U, // MULA_DA_HL_LDINC_P
6266
74.9k
    0U, // MULA_DA_LH_LDDEC_P
6267
74.9k
    0U, // MULA_DA_LH_LDINC_P
6268
74.9k
    0U, // MULA_DA_LL_LDDEC_P
6269
74.9k
    0U, // MULA_DA_LL_LDINC_P
6270
74.9k
    0U, // MULA_DD_HH_LDDEC_P
6271
74.9k
    0U, // MULA_DD_HH_LDINC_P
6272
74.9k
    0U, // MULA_DD_HL_LDDEC_P
6273
74.9k
    0U, // MULA_DD_HL_LDINC_P
6274
74.9k
    0U, // MULA_DD_LH_LDDEC_P
6275
74.9k
    0U, // MULA_DD_LH_LDINC_P
6276
74.9k
    0U, // MULA_DD_LL_LDDEC_P
6277
74.9k
    0U, // MULA_DD_LL_LDINC_P
6278
74.9k
    0U, // RESTORE_BOOL
6279
74.9k
    4U, // SELECT
6280
74.9k
    4U, // SELECT_CC_FP_FP
6281
74.9k
    4U, // SELECT_CC_FP_INT
6282
74.9k
    4U, // SELECT_CC_INT_FP
6283
74.9k
    0U, // SLLI_BR_P
6284
74.9k
    0U, // SLL_P
6285
74.9k
    0U, // SPILL_BOOL
6286
74.9k
    0U, // SRA_P
6287
74.9k
    0U, // SRL_P
6288
74.9k
    0U, // WSR_ACCHI_P
6289
74.9k
    0U, // WSR_ACCLO_P
6290
74.9k
    0U, // WSR_M0_P
6291
74.9k
    0U, // WSR_M1_P
6292
74.9k
    0U, // WSR_M2_P
6293
74.9k
    0U, // WSR_M3_P
6294
74.9k
    0U, // XSR_ACCHI_P
6295
74.9k
    0U, // XSR_ACCLO_P
6296
74.9k
    0U, // XSR_M0_P
6297
74.9k
    0U, // XSR_M1_P
6298
74.9k
    0U, // XSR_M2_P
6299
74.9k
    0U, // XSR_M3_P
6300
74.9k
    0U, // mv_QR_P
6301
74.9k
    0U, // ABS
6302
74.9k
    0U, // ABS_S
6303
74.9k
    0U, // ADD
6304
74.9k
    0U, // ADDEXPM_S
6305
74.9k
    0U, // ADDEXP_S
6306
74.9k
    0U, // ADDI
6307
74.9k
    0U, // ADDI_N
6308
74.9k
    0U, // ADDMI
6309
74.9k
    0U, // ADDX2
6310
74.9k
    0U, // ADDX4
6311
74.9k
    0U, // ADDX8
6312
74.9k
    0U, // ADD_N
6313
74.9k
    0U, // ADD_S
6314
74.9k
    0U, // AE_ABS16S
6315
74.9k
    0U, // AE_ABS24S
6316
74.9k
    0U, // AE_ABS32
6317
74.9k
    0U, // AE_ABS32S
6318
74.9k
    0U, // AE_ABS64
6319
74.9k
    0U, // AE_ABS64S
6320
74.9k
    0U, // AE_ADD16
6321
74.9k
    0U, // AE_ADD16S
6322
74.9k
    0U, // AE_ADD24S
6323
74.9k
    0U, // AE_ADD32
6324
74.9k
    0U, // AE_ADD32S
6325
74.9k
    0U, // AE_ADD32_HL_LH
6326
74.9k
    0U, // AE_ADD64
6327
74.9k
    0U, // AE_ADD64S
6328
74.9k
    0U, // AE_ADDBRBA32
6329
74.9k
    0U, // AE_ADDSUB32
6330
74.9k
    0U, // AE_ADDSUB32S
6331
74.9k
    0U, // AE_AND
6332
74.9k
    0U, // AE_CVT32X2F16_10
6333
74.9k
    0U, // AE_CVT32X2F16_32
6334
74.9k
    0U, // AE_CVT48A32
6335
74.9k
    0U, // AE_CVT64A32
6336
74.9k
    0U, // AE_CVT64F32_H
6337
74.9k
    0U, // AE_CVTA32F24S_H
6338
74.9k
    0U, // AE_CVTA32F24S_L
6339
74.9k
    0U, // AE_CVTQ56A32S
6340
74.9k
    0U, // AE_CVTQ56P32S_H
6341
74.9k
    0U, // AE_CVTQ56P32S_L
6342
74.9k
    0U, // AE_DB
6343
74.9k
    0U, // AE_DBI
6344
74.9k
    0U, // AE_DBI_IC
6345
74.9k
    0U, // AE_DBI_IP
6346
74.9k
    0U, // AE_DB_IC
6347
74.9k
    0U, // AE_DB_IP
6348
74.9k
    0U, // AE_DIV64D32_H
6349
74.9k
    0U, // AE_DIV64D32_L
6350
74.9k
    0U, // AE_EQ16
6351
74.9k
    0U, // AE_EQ32
6352
74.9k
    0U, // AE_EQ64
6353
74.9k
    0U, // AE_L16M_I
6354
74.9k
    0U, // AE_L16M_IU
6355
74.9k
    0U, // AE_L16M_X
6356
74.9k
    0U, // AE_L16M_XC
6357
74.9k
    0U, // AE_L16M_XU
6358
74.9k
    0U, // AE_L16X2M_I
6359
74.9k
    0U, // AE_L16X2M_IU
6360
74.9k
    0U, // AE_L16X2M_X
6361
74.9k
    0U, // AE_L16X2M_XC
6362
74.9k
    0U, // AE_L16X2M_XU
6363
74.9k
    0U, // AE_L16X4_I
6364
74.9k
    0U, // AE_L16X4_IP
6365
74.9k
    0U, // AE_L16X4_RIC
6366
74.9k
    0U, // AE_L16X4_RIP
6367
74.9k
    0U, // AE_L16X4_X
6368
74.9k
    0U, // AE_L16X4_XC
6369
74.9k
    0U, // AE_L16X4_XP
6370
74.9k
    0U, // AE_L16_I
6371
74.9k
    0U, // AE_L16_IP
6372
74.9k
    0U, // AE_L16_X
6373
74.9k
    0U, // AE_L16_XC
6374
74.9k
    0U, // AE_L16_XP
6375
74.9k
    0U, // AE_L32F24_I
6376
74.9k
    0U, // AE_L32F24_IP
6377
74.9k
    0U, // AE_L32F24_X
6378
74.9k
    0U, // AE_L32F24_XC
6379
74.9k
    0U, // AE_L32F24_XP
6380
74.9k
    0U, // AE_L32M_I
6381
74.9k
    0U, // AE_L32M_IU
6382
74.9k
    0U, // AE_L32M_X
6383
74.9k
    0U, // AE_L32M_XC
6384
74.9k
    0U, // AE_L32M_XU
6385
74.9k
    0U, // AE_L32X2F24_I
6386
74.9k
    0U, // AE_L32X2F24_IP
6387
74.9k
    0U, // AE_L32X2F24_RIC
6388
74.9k
    0U, // AE_L32X2F24_RIP
6389
74.9k
    0U, // AE_L32X2F24_X
6390
74.9k
    0U, // AE_L32X2F24_XC
6391
74.9k
    0U, // AE_L32X2F24_XP
6392
74.9k
    0U, // AE_L32X2_I
6393
74.9k
    0U, // AE_L32X2_IP
6394
74.9k
    0U, // AE_L32X2_RIC
6395
74.9k
    0U, // AE_L32X2_RIP
6396
74.9k
    0U, // AE_L32X2_X
6397
74.9k
    0U, // AE_L32X2_XC
6398
74.9k
    0U, // AE_L32X2_XP
6399
74.9k
    0U, // AE_L32_I
6400
74.9k
    0U, // AE_L32_IP
6401
74.9k
    0U, // AE_L32_X
6402
74.9k
    0U, // AE_L32_XC
6403
74.9k
    0U, // AE_L32_XP
6404
74.9k
    0U, // AE_L64_I
6405
74.9k
    0U, // AE_L64_IP
6406
74.9k
    0U, // AE_L64_X
6407
74.9k
    0U, // AE_L64_XC
6408
74.9k
    0U, // AE_L64_XP
6409
74.9k
    0U, // AE_LA16X4NEG_PC
6410
74.9k
    0U, // AE_LA16X4POS_PC
6411
74.9k
    0U, // AE_LA16X4_IC
6412
74.9k
    0U, // AE_LA16X4_IP
6413
74.9k
    0U, // AE_LA16X4_RIC
6414
74.9k
    0U, // AE_LA16X4_RIP
6415
74.9k
    0U, // AE_LA24NEG_PC
6416
74.9k
    0U, // AE_LA24POS_PC
6417
74.9k
    0U, // AE_LA24X2NEG_PC
6418
74.9k
    0U, // AE_LA24X2POS_PC
6419
74.9k
    0U, // AE_LA24X2_IC
6420
74.9k
    0U, // AE_LA24X2_IP
6421
74.9k
    0U, // AE_LA24X2_RIC
6422
74.9k
    0U, // AE_LA24X2_RIP
6423
74.9k
    0U, // AE_LA24_IC
6424
74.9k
    0U, // AE_LA24_IP
6425
74.9k
    0U, // AE_LA24_RIC
6426
74.9k
    0U, // AE_LA24_RIP
6427
74.9k
    0U, // AE_LA32X2F24_IC
6428
74.9k
    0U, // AE_LA32X2F24_IP
6429
74.9k
    0U, // AE_LA32X2F24_RIC
6430
74.9k
    0U, // AE_LA32X2F24_RIP
6431
74.9k
    0U, // AE_LA32X2NEG_PC
6432
74.9k
    0U, // AE_LA32X2POS_PC
6433
74.9k
    0U, // AE_LA32X2_IC
6434
74.9k
    0U, // AE_LA32X2_IP
6435
74.9k
    0U, // AE_LA32X2_RIC
6436
74.9k
    0U, // AE_LA32X2_RIP
6437
74.9k
    0U, // AE_LA64_PP
6438
74.9k
    0U, // AE_LALIGN64_I
6439
74.9k
    0U, // AE_LB
6440
74.9k
    0U, // AE_LBI
6441
74.9k
    0U, // AE_LBK
6442
74.9k
    0U, // AE_LBKI
6443
74.9k
    0U, // AE_LBS
6444
74.9k
    0U, // AE_LBSI
6445
74.9k
    0U, // AE_LE16
6446
74.9k
    0U, // AE_LE32
6447
74.9k
    0U, // AE_LE64
6448
74.9k
    0U, // AE_LT16
6449
74.9k
    0U, // AE_LT32
6450
74.9k
    0U, // AE_LT64
6451
74.9k
    0U, // AE_MAX32
6452
74.9k
    0U, // AE_MAX64
6453
74.9k
    0U, // AE_MAXABS32S
6454
74.9k
    0U, // AE_MAXABS64S
6455
74.9k
    0U, // AE_MIN32
6456
74.9k
    0U, // AE_MIN64
6457
74.9k
    0U, // AE_MINABS32S
6458
74.9k
    0U, // AE_MINABS64S
6459
74.9k
    0U, // AE_MOV
6460
74.9k
    0U, // AE_MOVAD16_0
6461
74.9k
    0U, // AE_MOVAD16_1
6462
74.9k
    0U, // AE_MOVAD16_2
6463
74.9k
    0U, // AE_MOVAD16_3
6464
74.9k
    0U, // AE_MOVAD32_H
6465
74.9k
    0U, // AE_MOVAD32_L
6466
74.9k
    0U, // AE_MOVALIGN
6467
74.9k
    0U, // AE_MOVDA16
6468
74.9k
    0U, // AE_MOVDA16X2
6469
74.9k
    0U, // AE_MOVDA32
6470
74.9k
    0U, // AE_MOVDA32X2
6471
74.9k
    0U, // AE_MOVF16X4
6472
74.9k
    0U, // AE_MOVF32X2
6473
74.9k
    0U, // AE_MOVF64
6474
74.9k
    0U, // AE_MOVI
6475
74.9k
    0U, // AE_MOVT16X4
6476
74.9k
    0U, // AE_MOVT32X2
6477
74.9k
    0U, // AE_MOVT64
6478
74.9k
    0U, // AE_MUL16X4
6479
74.9k
    0U, // AE_MUL32U_LL
6480
74.9k
    0U, // AE_MUL32X16_H0
6481
74.9k
    0U, // AE_MUL32X16_H0_S2
6482
74.9k
    0U, // AE_MUL32X16_H1
6483
74.9k
    0U, // AE_MUL32X16_H1_S2
6484
74.9k
    0U, // AE_MUL32X16_H2
6485
74.9k
    0U, // AE_MUL32X16_H2_S2
6486
74.9k
    0U, // AE_MUL32X16_H3
6487
74.9k
    0U, // AE_MUL32X16_H3_S2
6488
74.9k
    0U, // AE_MUL32X16_L0
6489
74.9k
    0U, // AE_MUL32X16_L0_S2
6490
74.9k
    0U, // AE_MUL32X16_L1
6491
74.9k
    0U, // AE_MUL32X16_L1_S2
6492
74.9k
    0U, // AE_MUL32X16_L2
6493
74.9k
    0U, // AE_MUL32X16_L2_S2
6494
74.9k
    0U, // AE_MUL32X16_L3
6495
74.9k
    0U, // AE_MUL32X16_L3_S2
6496
74.9k
    0U, // AE_MUL32_HH
6497
74.9k
    0U, // AE_MUL32_LH
6498
74.9k
    0U, // AE_MUL32_LL
6499
74.9k
    0U, // AE_MUL32_LL_S2
6500
74.9k
    0U, // AE_MULA16X4
6501
74.9k
    0U, // AE_MULA32U_LL
6502
74.9k
    0U, // AE_MULA32X16_H0
6503
74.9k
    0U, // AE_MULA32X16_H0_S2
6504
74.9k
    0U, // AE_MULA32X16_H1
6505
74.9k
    0U, // AE_MULA32X16_H1_S2
6506
74.9k
    0U, // AE_MULA32X16_H2
6507
74.9k
    0U, // AE_MULA32X16_H2_S2
6508
74.9k
    0U, // AE_MULA32X16_H3
6509
74.9k
    0U, // AE_MULA32X16_H3_S2
6510
74.9k
    0U, // AE_MULA32X16_L0
6511
74.9k
    0U, // AE_MULA32X16_L0_S2
6512
74.9k
    0U, // AE_MULA32X16_L1
6513
74.9k
    0U, // AE_MULA32X16_L1_S2
6514
74.9k
    0U, // AE_MULA32X16_L2
6515
74.9k
    0U, // AE_MULA32X16_L2_S2
6516
74.9k
    0U, // AE_MULA32X16_L3
6517
74.9k
    0U, // AE_MULA32X16_L3_S2
6518
74.9k
    0U, // AE_MULA32_HH
6519
74.9k
    0U, // AE_MULA32_LH
6520
74.9k
    0U, // AE_MULA32_LL
6521
74.9k
    0U, // AE_MULA32_LL_S2
6522
74.9k
    0U, // AE_MULAAD24_HH_LL
6523
74.9k
    0U, // AE_MULAAD24_HH_LL_S2
6524
74.9k
    0U, // AE_MULAAD24_HL_LH
6525
74.9k
    0U, // AE_MULAAD24_HL_LH_S2
6526
74.9k
    0U, // AE_MULAAD32X16_H0_L1
6527
74.9k
    0U, // AE_MULAAD32X16_H0_L1_S2
6528
74.9k
    0U, // AE_MULAAD32X16_H1_L0
6529
74.9k
    0U, // AE_MULAAD32X16_H1_L0_S2
6530
74.9k
    0U, // AE_MULAAD32X16_H2_L3
6531
74.9k
    0U, // AE_MULAAD32X16_H2_L3_S2
6532
74.9k
    0U, // AE_MULAAD32X16_H3_L2
6533
74.9k
    0U, // AE_MULAAD32X16_H3_L2_S2
6534
74.9k
    0U, // AE_MULAAFD16SS_11_00
6535
74.9k
    0U, // AE_MULAAFD16SS_11_00_S2
6536
74.9k
    0U, // AE_MULAAFD16SS_13_02
6537
74.9k
    0U, // AE_MULAAFD16SS_13_02_S2
6538
74.9k
    0U, // AE_MULAAFD16SS_33_22
6539
74.9k
    0U, // AE_MULAAFD16SS_33_22_S2
6540
74.9k
    0U, // AE_MULAAFD24_HH_LL
6541
74.9k
    0U, // AE_MULAAFD24_HH_LL_S2
6542
74.9k
    0U, // AE_MULAAFD24_HL_LH
6543
74.9k
    0U, // AE_MULAAFD24_HL_LH_S2
6544
74.9k
    0U, // AE_MULAAFD32X16_H0_L1
6545
74.9k
    0U, // AE_MULAAFD32X16_H0_L1_S2
6546
74.9k
    0U, // AE_MULAAFD32X16_H1_L0
6547
74.9k
    0U, // AE_MULAAFD32X16_H1_L0_S2
6548
74.9k
    0U, // AE_MULAAFD32X16_H2_L3
6549
74.9k
    0U, // AE_MULAAFD32X16_H2_L3_S2
6550
74.9k
    0U, // AE_MULAAFD32X16_H3_L2
6551
74.9k
    0U, // AE_MULAAFD32X16_H3_L2_S2
6552
74.9k
    0U, // AE_MULAC24
6553
74.9k
    0U, // AE_MULAC32X16_H
6554
74.9k
    0U, // AE_MULAC32X16_L
6555
74.9k
    0U, // AE_MULAF16SS_00
6556
74.9k
    0U, // AE_MULAF16SS_00_S2
6557
74.9k
    0U, // AE_MULAF16SS_10
6558
74.9k
    0U, // AE_MULAF16SS_11
6559
74.9k
    0U, // AE_MULAF16SS_20
6560
74.9k
    0U, // AE_MULAF16SS_21
6561
74.9k
    0U, // AE_MULAF16SS_22
6562
74.9k
    0U, // AE_MULAF16SS_30
6563
74.9k
    0U, // AE_MULAF16SS_31
6564
74.9k
    0U, // AE_MULAF16SS_32
6565
74.9k
    0U, // AE_MULAF16SS_33
6566
74.9k
    0U, // AE_MULAF16X4SS
6567
74.9k
    0U, // AE_MULAF32R_HH
6568
74.9k
    0U, // AE_MULAF32R_LH
6569
74.9k
    0U, // AE_MULAF32R_LL
6570
74.9k
    0U, // AE_MULAF32R_LL_S2
6571
74.9k
    0U, // AE_MULAF32S_HH
6572
74.9k
    0U, // AE_MULAF32S_LH
6573
74.9k
    0U, // AE_MULAF32S_LL
6574
74.9k
    0U, // AE_MULAF32S_LL_S2
6575
74.9k
    0U, // AE_MULAF32X16_H0
6576
74.9k
    0U, // AE_MULAF32X16_H0_S2
6577
74.9k
    0U, // AE_MULAF32X16_H1
6578
74.9k
    0U, // AE_MULAF32X16_H1_S2
6579
74.9k
    0U, // AE_MULAF32X16_H2
6580
74.9k
    0U, // AE_MULAF32X16_H2_S2
6581
74.9k
    0U, // AE_MULAF32X16_H3
6582
74.9k
    0U, // AE_MULAF32X16_H3_S2
6583
74.9k
    0U, // AE_MULAF32X16_L0
6584
74.9k
    0U, // AE_MULAF32X16_L0_S2
6585
74.9k
    0U, // AE_MULAF32X16_L1
6586
74.9k
    0U, // AE_MULAF32X16_L1_S2
6587
74.9k
    0U, // AE_MULAF32X16_L2
6588
74.9k
    0U, // AE_MULAF32X16_L2_S2
6589
74.9k
    0U, // AE_MULAF32X16_L3
6590
74.9k
    0U, // AE_MULAF32X16_L3_S2
6591
74.9k
    0U, // AE_MULAF48Q32SP16S_L
6592
74.9k
    0U, // AE_MULAF48Q32SP16S_L_S2
6593
74.9k
    0U, // AE_MULAF48Q32SP16U_L
6594
74.9k
    0U, // AE_MULAF48Q32SP16U_L_S2
6595
74.9k
    0U, // AE_MULAFC24RA
6596
74.9k
    0U, // AE_MULAFC32X16RAS_H
6597
74.9k
    0U, // AE_MULAFC32X16RAS_L
6598
74.9k
    0U, // AE_MULAFD24X2_FIR_H
6599
74.9k
    0U, // AE_MULAFD24X2_FIR_L
6600
74.9k
    0U, // AE_MULAFD32X16X2_FIR_HH
6601
74.9k
    0U, // AE_MULAFD32X16X2_FIR_HL
6602
74.9k
    0U, // AE_MULAFD32X16X2_FIR_LH
6603
74.9k
    0U, // AE_MULAFD32X16X2_FIR_LL
6604
74.9k
    0U, // AE_MULAFP24X2R
6605
74.9k
    0U, // AE_MULAFP24X2RA
6606
74.9k
    0U, // AE_MULAFP24X2RA_S2
6607
74.9k
    0U, // AE_MULAFP24X2R_S2
6608
74.9k
    0U, // AE_MULAFP32X16X2RAS_H
6609
74.9k
    0U, // AE_MULAFP32X16X2RAS_H_S2
6610
74.9k
    0U, // AE_MULAFP32X16X2RAS_L
6611
74.9k
    0U, // AE_MULAFP32X16X2RAS_L_S2
6612
74.9k
    0U, // AE_MULAFP32X16X2RS_H
6613
74.9k
    0U, // AE_MULAFP32X16X2RS_H_S2
6614
74.9k
    0U, // AE_MULAFP32X16X2RS_L
6615
74.9k
    0U, // AE_MULAFP32X16X2RS_L_S2
6616
74.9k
    0U, // AE_MULAFP32X2RAS
6617
74.9k
    0U, // AE_MULAFP32X2RS
6618
74.9k
    0U, // AE_MULAFQ32SP24S_H_S2
6619
74.9k
    0U, // AE_MULAFQ32SP24S_L_S2
6620
74.9k
    0U, // AE_MULAP24X2
6621
74.9k
    0U, // AE_MULAP24X2_S2
6622
74.9k
    0U, // AE_MULAP32X16X2_H
6623
74.9k
    0U, // AE_MULAP32X16X2_L
6624
74.9k
    0U, // AE_MULAP32X2
6625
74.9k
    0U, // AE_MULAQ32SP16S_L_S2
6626
74.9k
    0U, // AE_MULAQ32SP16U_L_S2
6627
74.9k
    0U, // AE_MULARFQ32SP24S_H_S2
6628
74.9k
    0U, // AE_MULARFQ32SP24S_L_S2
6629
74.9k
    0U, // AE_MULAS32F48P16S_HH
6630
74.9k
    0U, // AE_MULAS32F48P16S_HH_S2
6631
74.9k
    0U, // AE_MULAS32F48P16S_LH
6632
74.9k
    0U, // AE_MULAS32F48P16S_LH_S2
6633
74.9k
    0U, // AE_MULAS32F48P16S_LL
6634
74.9k
    0U, // AE_MULAS32F48P16S_LL_S2
6635
74.9k
    0U, // AE_MULASD24_HH_LL
6636
74.9k
    0U, // AE_MULASD24_HH_LL_S2
6637
74.9k
    0U, // AE_MULASD24_HL_LH
6638
74.9k
    0U, // AE_MULASD24_HL_LH_S2
6639
74.9k
    0U, // AE_MULASD32X16_H1_L0
6640
74.9k
    0U, // AE_MULASD32X16_H1_L0_S2
6641
74.9k
    0U, // AE_MULASD32X16_H3_L2
6642
74.9k
    0U, // AE_MULASD32X16_H3_L2_S2
6643
74.9k
    0U, // AE_MULASFD24_HH_LL
6644
74.9k
    0U, // AE_MULASFD24_HH_LL_S2
6645
74.9k
    0U, // AE_MULASFD24_HL_LH
6646
74.9k
    0U, // AE_MULASFD24_HL_LH_S2
6647
74.9k
    0U, // AE_MULASFD32X16_H1_L0
6648
74.9k
    0U, // AE_MULASFD32X16_H1_L0_S2
6649
74.9k
    0U, // AE_MULASFD32X16_H3_L2
6650
74.9k
    0U, // AE_MULASFD32X16_H3_L2_S2
6651
74.9k
    0U, // AE_MULC24
6652
74.9k
    0U, // AE_MULC32X16_H
6653
74.9k
    0U, // AE_MULC32X16_L
6654
74.9k
    0U, // AE_MULF16SS_00
6655
74.9k
    0U, // AE_MULF16SS_00_S2
6656
74.9k
    0U, // AE_MULF16SS_10
6657
74.9k
    0U, // AE_MULF16SS_11
6658
74.9k
    0U, // AE_MULF16SS_20
6659
74.9k
    0U, // AE_MULF16SS_21
6660
74.9k
    0U, // AE_MULF16SS_22
6661
74.9k
    0U, // AE_MULF16SS_30
6662
74.9k
    0U, // AE_MULF16SS_31
6663
74.9k
    0U, // AE_MULF16SS_32
6664
74.9k
    0U, // AE_MULF16SS_33
6665
74.9k
    0U, // AE_MULF16X4SS
6666
74.9k
    0U, // AE_MULF32R_HH
6667
74.9k
    0U, // AE_MULF32R_LH
6668
74.9k
    0U, // AE_MULF32R_LL
6669
74.9k
    0U, // AE_MULF32R_LL_S2
6670
74.9k
    0U, // AE_MULF32S_HH
6671
74.9k
    0U, // AE_MULF32S_LH
6672
74.9k
    0U, // AE_MULF32S_LL
6673
74.9k
    0U, // AE_MULF32S_LL_S2
6674
74.9k
    0U, // AE_MULF32X16_H0
6675
74.9k
    0U, // AE_MULF32X16_H0_S2
6676
74.9k
    0U, // AE_MULF32X16_H1
6677
74.9k
    0U, // AE_MULF32X16_H1_S2
6678
74.9k
    0U, // AE_MULF32X16_H2
6679
74.9k
    0U, // AE_MULF32X16_H2_S2
6680
74.9k
    0U, // AE_MULF32X16_H3
6681
74.9k
    0U, // AE_MULF32X16_H3_S2
6682
74.9k
    0U, // AE_MULF32X16_L0
6683
74.9k
    0U, // AE_MULF32X16_L0_S2
6684
74.9k
    0U, // AE_MULF32X16_L1
6685
74.9k
    0U, // AE_MULF32X16_L1_S2
6686
74.9k
    0U, // AE_MULF32X16_L2
6687
74.9k
    0U, // AE_MULF32X16_L2_S2
6688
74.9k
    0U, // AE_MULF32X16_L3
6689
74.9k
    0U, // AE_MULF32X16_L3_S2
6690
74.9k
    0U, // AE_MULF48Q32SP16S_L
6691
74.9k
    0U, // AE_MULF48Q32SP16S_L_S2
6692
74.9k
    0U, // AE_MULF48Q32SP16U_L
6693
74.9k
    0U, // AE_MULF48Q32SP16U_L_S2
6694
74.9k
    0U, // AE_MULFC24RA
6695
74.9k
    0U, // AE_MULFC32X16RAS_H
6696
74.9k
    0U, // AE_MULFC32X16RAS_L
6697
74.9k
    0U, // AE_MULFD24X2_FIR_H
6698
74.9k
    0U, // AE_MULFD24X2_FIR_L
6699
74.9k
    0U, // AE_MULFD32X16X2_FIR_HH
6700
74.9k
    0U, // AE_MULFD32X16X2_FIR_HL
6701
74.9k
    0U, // AE_MULFD32X16X2_FIR_LH
6702
74.9k
    0U, // AE_MULFD32X16X2_FIR_LL
6703
74.9k
    0U, // AE_MULFP16X4RAS
6704
74.9k
    0U, // AE_MULFP16X4S
6705
74.9k
    0U, // AE_MULFP24X2R
6706
74.9k
    0U, // AE_MULFP24X2RA
6707
74.9k
    0U, // AE_MULFP24X2RA_S2
6708
74.9k
    0U, // AE_MULFP24X2R_S2
6709
74.9k
    0U, // AE_MULFP32X16X2RAS_H
6710
74.9k
    0U, // AE_MULFP32X16X2RAS_H_S2
6711
74.9k
    0U, // AE_MULFP32X16X2RAS_L
6712
74.9k
    0U, // AE_MULFP32X16X2RAS_L_S2
6713
74.9k
    0U, // AE_MULFP32X16X2RS_H
6714
74.9k
    0U, // AE_MULFP32X16X2RS_H_S2
6715
74.9k
    0U, // AE_MULFP32X16X2RS_L
6716
74.9k
    0U, // AE_MULFP32X16X2RS_L_S2
6717
74.9k
    0U, // AE_MULFP32X2RAS
6718
74.9k
    0U, // AE_MULFP32X2RS
6719
74.9k
    0U, // AE_MULFQ32SP24S_H_S2
6720
74.9k
    0U, // AE_MULFQ32SP24S_L_S2
6721
74.9k
    0U, // AE_MULP24X2
6722
74.9k
    0U, // AE_MULP24X2_S2
6723
74.9k
    0U, // AE_MULP32X16X2_H
6724
74.9k
    0U, // AE_MULP32X16X2_L
6725
74.9k
    0U, // AE_MULP32X2
6726
74.9k
    0U, // AE_MULQ32SP16S_L_S2
6727
74.9k
    0U, // AE_MULQ32SP16U_L_S2
6728
74.9k
    0U, // AE_MULRFQ32SP24S_H_S2
6729
74.9k
    0U, // AE_MULRFQ32SP24S_L_S2
6730
74.9k
    0U, // AE_MULS16X4
6731
74.9k
    0U, // AE_MULS32F48P16S_HH
6732
74.9k
    0U, // AE_MULS32F48P16S_HH_S2
6733
74.9k
    0U, // AE_MULS32F48P16S_LH
6734
74.9k
    0U, // AE_MULS32F48P16S_LH_S2
6735
74.9k
    0U, // AE_MULS32F48P16S_LL
6736
74.9k
    0U, // AE_MULS32F48P16S_LL_S2
6737
74.9k
    0U, // AE_MULS32U_LL
6738
74.9k
    0U, // AE_MULS32X16_H0
6739
74.9k
    0U, // AE_MULS32X16_H0_S2
6740
74.9k
    0U, // AE_MULS32X16_H1
6741
74.9k
    0U, // AE_MULS32X16_H1_S2
6742
74.9k
    0U, // AE_MULS32X16_H2
6743
74.9k
    0U, // AE_MULS32X16_H2_S2
6744
74.9k
    0U, // AE_MULS32X16_H3
6745
74.9k
    0U, // AE_MULS32X16_H3_S2
6746
74.9k
    0U, // AE_MULS32X16_L0
6747
74.9k
    0U, // AE_MULS32X16_L0_S2
6748
74.9k
    0U, // AE_MULS32X16_L1
6749
74.9k
    0U, // AE_MULS32X16_L1_S2
6750
74.9k
    0U, // AE_MULS32X16_L2
6751
74.9k
    0U, // AE_MULS32X16_L2_S2
6752
74.9k
    0U, // AE_MULS32X16_L3
6753
74.9k
    0U, // AE_MULS32X16_L3_S2
6754
74.9k
    0U, // AE_MULS32_HH
6755
74.9k
    0U, // AE_MULS32_LH
6756
74.9k
    0U, // AE_MULS32_LL
6757
74.9k
    0U, // AE_MULSAD24_HH_LL
6758
74.9k
    0U, // AE_MULSAD24_HH_LL_S2
6759
74.9k
    0U, // AE_MULSAD32X16_H1_L0
6760
74.9k
    0U, // AE_MULSAD32X16_H1_L0_S2
6761
74.9k
    0U, // AE_MULSAD32X16_H3_L2
6762
74.9k
    0U, // AE_MULSAD32X16_H3_L2_S2
6763
74.9k
    0U, // AE_MULSAFD24_HH_LL
6764
74.9k
    0U, // AE_MULSAFD24_HH_LL_S2
6765
74.9k
    0U, // AE_MULSAFD32X16_H1_L0
6766
74.9k
    0U, // AE_MULSAFD32X16_H1_L0_S2
6767
74.9k
    0U, // AE_MULSAFD32X16_H3_L2
6768
74.9k
    0U, // AE_MULSAFD32X16_H3_L2_S2
6769
74.9k
    0U, // AE_MULSF16SS_00
6770
74.9k
    0U, // AE_MULSF16SS_00_S2
6771
74.9k
    0U, // AE_MULSF16SS_10
6772
74.9k
    0U, // AE_MULSF16SS_11
6773
74.9k
    0U, // AE_MULSF16SS_20
6774
74.9k
    0U, // AE_MULSF16SS_21
6775
74.9k
    0U, // AE_MULSF16SS_22
6776
74.9k
    0U, // AE_MULSF16SS_30
6777
74.9k
    0U, // AE_MULSF16SS_31
6778
74.9k
    0U, // AE_MULSF16SS_32
6779
74.9k
    0U, // AE_MULSF16SS_33
6780
74.9k
    0U, // AE_MULSF16X4SS
6781
74.9k
    0U, // AE_MULSF32R_HH
6782
74.9k
    0U, // AE_MULSF32R_LH
6783
74.9k
    0U, // AE_MULSF32R_LL
6784
74.9k
    0U, // AE_MULSF32R_LL_S2
6785
74.9k
    0U, // AE_MULSF32S_HH
6786
74.9k
    0U, // AE_MULSF32S_LH
6787
74.9k
    0U, // AE_MULSF32S_LL
6788
74.9k
    0U, // AE_MULSF32X16_H0
6789
74.9k
    0U, // AE_MULSF32X16_H0_S2
6790
74.9k
    0U, // AE_MULSF32X16_H1
6791
74.9k
    0U, // AE_MULSF32X16_H1_S2
6792
74.9k
    0U, // AE_MULSF32X16_H2
6793
74.9k
    0U, // AE_MULSF32X16_H2_S2
6794
74.9k
    0U, // AE_MULSF32X16_H3
6795
74.9k
    0U, // AE_MULSF32X16_H3_S2
6796
74.9k
    0U, // AE_MULSF32X16_L0
6797
74.9k
    0U, // AE_MULSF32X16_L0_S2
6798
74.9k
    0U, // AE_MULSF32X16_L1
6799
74.9k
    0U, // AE_MULSF32X16_L1_S2
6800
74.9k
    0U, // AE_MULSF32X16_L2
6801
74.9k
    0U, // AE_MULSF32X16_L2_S2
6802
74.9k
    0U, // AE_MULSF32X16_L3
6803
74.9k
    0U, // AE_MULSF32X16_L3_S2
6804
74.9k
    0U, // AE_MULSF48Q32SP16S_L
6805
74.9k
    0U, // AE_MULSF48Q32SP16S_L_S2
6806
74.9k
    0U, // AE_MULSF48Q32SP16U_L
6807
74.9k
    0U, // AE_MULSF48Q32SP16U_L_S2
6808
74.9k
    0U, // AE_MULSFP24X2R
6809
74.9k
    0U, // AE_MULSFP24X2RA
6810
74.9k
    0U, // AE_MULSFP24X2RA_S2
6811
74.9k
    0U, // AE_MULSFP24X2R_S2
6812
74.9k
    0U, // AE_MULSFP32X16X2RAS_H
6813
74.9k
    0U, // AE_MULSFP32X16X2RAS_H_S2
6814
74.9k
    0U, // AE_MULSFP32X16X2RAS_L
6815
74.9k
    0U, // AE_MULSFP32X16X2RAS_L_S2
6816
74.9k
    0U, // AE_MULSFP32X16X2RS_H
6817
74.9k
    0U, // AE_MULSFP32X16X2RS_H_S2
6818
74.9k
    0U, // AE_MULSFP32X16X2RS_L
6819
74.9k
    0U, // AE_MULSFP32X16X2RS_L_S2
6820
74.9k
    0U, // AE_MULSFP32X2RAS
6821
74.9k
    0U, // AE_MULSFP32X2RS
6822
74.9k
    0U, // AE_MULSFQ32SP24S_H_S2
6823
74.9k
    0U, // AE_MULSFQ32SP24S_L_S2
6824
74.9k
    0U, // AE_MULSP24X2
6825
74.9k
    0U, // AE_MULSP24X2_S2
6826
74.9k
    0U, // AE_MULSP32X16X2_H
6827
74.9k
    0U, // AE_MULSP32X16X2_L
6828
74.9k
    0U, // AE_MULSP32X2
6829
74.9k
    0U, // AE_MULSQ32SP16S_L_S2
6830
74.9k
    0U, // AE_MULSQ32SP16U_L_S2
6831
74.9k
    0U, // AE_MULSRFQ32SP24S_H_S2
6832
74.9k
    0U, // AE_MULSRFQ32SP24S_L_S2
6833
74.9k
    0U, // AE_MULSS32F48P16S_HH
6834
74.9k
    0U, // AE_MULSS32F48P16S_HH_S2
6835
74.9k
    0U, // AE_MULSS32F48P16S_LH
6836
74.9k
    0U, // AE_MULSS32F48P16S_LH_S2
6837
74.9k
    0U, // AE_MULSS32F48P16S_LL
6838
74.9k
    0U, // AE_MULSS32F48P16S_LL_S2
6839
74.9k
    0U, // AE_MULSSD24_HH_LL
6840
74.9k
    0U, // AE_MULSSD24_HH_LL_S2
6841
74.9k
    0U, // AE_MULSSD24_HL_LH
6842
74.9k
    0U, // AE_MULSSD24_HL_LH_S2
6843
74.9k
    0U, // AE_MULSSD32X16_H1_L0
6844
74.9k
    0U, // AE_MULSSD32X16_H1_L0_S2
6845
74.9k
    0U, // AE_MULSSD32X16_H3_L2
6846
74.9k
    0U, // AE_MULSSD32X16_H3_L2_S2
6847
74.9k
    0U, // AE_MULSSFD16SS_11_00
6848
74.9k
    0U, // AE_MULSSFD16SS_11_00_S2
6849
74.9k
    0U, // AE_MULSSFD16SS_13_02
6850
74.9k
    0U, // AE_MULSSFD16SS_13_02_S2
6851
74.9k
    0U, // AE_MULSSFD16SS_33_22
6852
74.9k
    0U, // AE_MULSSFD16SS_33_22_S2
6853
74.9k
    0U, // AE_MULSSFD24_HH_LL
6854
74.9k
    0U, // AE_MULSSFD24_HH_LL_S2
6855
74.9k
    0U, // AE_MULSSFD24_HL_LH
6856
74.9k
    0U, // AE_MULSSFD24_HL_LH_S2
6857
74.9k
    0U, // AE_MULSSFD32X16_H1_L0
6858
74.9k
    0U, // AE_MULSSFD32X16_H1_L0_S2
6859
74.9k
    0U, // AE_MULSSFD32X16_H3_L2
6860
74.9k
    0U, // AE_MULSSFD32X16_H3_L2_S2
6861
74.9k
    0U, // AE_MULZAAD24_HH_LL
6862
74.9k
    0U, // AE_MULZAAD24_HH_LL_S2
6863
74.9k
    0U, // AE_MULZAAD24_HL_LH
6864
74.9k
    0U, // AE_MULZAAD24_HL_LH_S2
6865
74.9k
    0U, // AE_MULZAAD32X16_H0_L1
6866
74.9k
    0U, // AE_MULZAAD32X16_H0_L1_S2
6867
74.9k
    0U, // AE_MULZAAD32X16_H1_L0
6868
74.9k
    0U, // AE_MULZAAD32X16_H1_L0_S2
6869
74.9k
    0U, // AE_MULZAAD32X16_H2_L3
6870
74.9k
    0U, // AE_MULZAAD32X16_H2_L3_S2
6871
74.9k
    0U, // AE_MULZAAD32X16_H3_L2
6872
74.9k
    0U, // AE_MULZAAD32X16_H3_L2_S2
6873
74.9k
    0U, // AE_MULZAAFD16SS_11_00
6874
74.9k
    0U, // AE_MULZAAFD16SS_11_00_S2
6875
74.9k
    0U, // AE_MULZAAFD16SS_13_02
6876
74.9k
    0U, // AE_MULZAAFD16SS_13_02_S2
6877
74.9k
    0U, // AE_MULZAAFD16SS_33_22
6878
74.9k
    0U, // AE_MULZAAFD16SS_33_22_S2
6879
74.9k
    0U, // AE_MULZAAFD24_HH_LL
6880
74.9k
    0U, // AE_MULZAAFD24_HH_LL_S2
6881
74.9k
    0U, // AE_MULZAAFD24_HL_LH
6882
74.9k
    0U, // AE_MULZAAFD24_HL_LH_S2
6883
74.9k
    0U, // AE_MULZAAFD32X16_H0_L1
6884
74.9k
    0U, // AE_MULZAAFD32X16_H0_L1_S2
6885
74.9k
    0U, // AE_MULZAAFD32X16_H1_L0
6886
74.9k
    0U, // AE_MULZAAFD32X16_H1_L0_S2
6887
74.9k
    0U, // AE_MULZAAFD32X16_H2_L3
6888
74.9k
    0U, // AE_MULZAAFD32X16_H2_L3_S2
6889
74.9k
    0U, // AE_MULZAAFD32X16_H3_L2
6890
74.9k
    0U, // AE_MULZAAFD32X16_H3_L2_S2
6891
74.9k
    0U, // AE_MULZASD24_HH_LL
6892
74.9k
    0U, // AE_MULZASD24_HH_LL_S2
6893
74.9k
    0U, // AE_MULZASD24_HL_LH
6894
74.9k
    0U, // AE_MULZASD24_HL_LH_S2
6895
74.9k
    0U, // AE_MULZASD32X16_H1_L0
6896
74.9k
    0U, // AE_MULZASD32X16_H1_L0_S2
6897
74.9k
    0U, // AE_MULZASD32X16_H3_L2
6898
74.9k
    0U, // AE_MULZASD32X16_H3_L2_S2
6899
74.9k
    0U, // AE_MULZASFD24_HH_LL
6900
74.9k
    0U, // AE_MULZASFD24_HH_LL_S2
6901
74.9k
    0U, // AE_MULZASFD24_HL_LH
6902
74.9k
    0U, // AE_MULZASFD24_HL_LH_S2
6903
74.9k
    0U, // AE_MULZASFD32X16_H1_L0
6904
74.9k
    0U, // AE_MULZASFD32X16_H1_L0_S2
6905
74.9k
    0U, // AE_MULZASFD32X16_H3_L2
6906
74.9k
    0U, // AE_MULZASFD32X16_H3_L2_S2
6907
74.9k
    0U, // AE_MULZSAD24_HH_LL
6908
74.9k
    0U, // AE_MULZSAD24_HH_LL_S2
6909
74.9k
    0U, // AE_MULZSAD32X16_H1_L0
6910
74.9k
    0U, // AE_MULZSAD32X16_H1_L0_S2
6911
74.9k
    0U, // AE_MULZSAD32X16_H3_L2
6912
74.9k
    0U, // AE_MULZSAD32X16_H3_L2_S2
6913
74.9k
    0U, // AE_MULZSAFD24_HH_LL
6914
74.9k
    0U, // AE_MULZSAFD24_HH_LL_S2
6915
74.9k
    0U, // AE_MULZSAFD32X16_H1_L0
6916
74.9k
    0U, // AE_MULZSAFD32X16_H1_L0_S2
6917
74.9k
    0U, // AE_MULZSAFD32X16_H3_L2
6918
74.9k
    0U, // AE_MULZSAFD32X16_H3_L2_S2
6919
74.9k
    0U, // AE_MULZSSD24_HH_LL
6920
74.9k
    0U, // AE_MULZSSD24_HH_LL_S2
6921
74.9k
    0U, // AE_MULZSSD24_HL_LH
6922
74.9k
    0U, // AE_MULZSSD24_HL_LH_S2
6923
74.9k
    0U, // AE_MULZSSD32X16_H1_L0
6924
74.9k
    0U, // AE_MULZSSD32X16_H1_L0_S2
6925
74.9k
    0U, // AE_MULZSSD32X16_H3_L2
6926
74.9k
    0U, // AE_MULZSSD32X16_H3_L2_S2
6927
74.9k
    0U, // AE_MULZSSFD16SS_11_00
6928
74.9k
    0U, // AE_MULZSSFD16SS_11_00_S2
6929
74.9k
    0U, // AE_MULZSSFD16SS_13_02
6930
74.9k
    0U, // AE_MULZSSFD16SS_13_02_S2
6931
74.9k
    0U, // AE_MULZSSFD16SS_33_22
6932
74.9k
    0U, // AE_MULZSSFD16SS_33_22_S2
6933
74.9k
    0U, // AE_MULZSSFD24_HH_LL
6934
74.9k
    0U, // AE_MULZSSFD24_HH_LL_S2
6935
74.9k
    0U, // AE_MULZSSFD24_HL_LH
6936
74.9k
    0U, // AE_MULZSSFD24_HL_LH_S2
6937
74.9k
    0U, // AE_MULZSSFD32X16_H1_L0
6938
74.9k
    0U, // AE_MULZSSFD32X16_H1_L0_S2
6939
74.9k
    0U, // AE_MULZSSFD32X16_H3_L2
6940
74.9k
    0U, // AE_MULZSSFD32X16_H3_L2_S2
6941
74.9k
    0U, // AE_NAND
6942
74.9k
    0U, // AE_NEG16S
6943
74.9k
    0U, // AE_NEG24S
6944
74.9k
    0U, // AE_NEG32
6945
74.9k
    0U, // AE_NEG32S
6946
74.9k
    0U, // AE_NEG64
6947
74.9k
    0U, // AE_NEG64S
6948
74.9k
    0U, // AE_NSA64
6949
74.9k
    0U, // AE_NSAZ16_0
6950
74.9k
    0U, // AE_NSAZ32_L
6951
74.9k
    0U, // AE_OR
6952
74.9k
    0U, // AE_PKSR24
6953
74.9k
    0U, // AE_PKSR32
6954
74.9k
    0U, // AE_ROUND16X4F32SASYM
6955
74.9k
    0U, // AE_ROUND16X4F32SSYM
6956
74.9k
    0U, // AE_ROUND24X2F48SASYM
6957
74.9k
    0U, // AE_ROUND24X2F48SSYM
6958
74.9k
    0U, // AE_ROUND32X2F48SASYM
6959
74.9k
    0U, // AE_ROUND32X2F48SSYM
6960
74.9k
    0U, // AE_ROUND32X2F64SASYM
6961
74.9k
    0U, // AE_ROUND32X2F64SSYM
6962
74.9k
    0U, // AE_ROUNDSP16F24ASYM
6963
74.9k
    0U, // AE_ROUNDSP16F24SYM
6964
74.9k
    0U, // AE_ROUNDSP16Q48X2ASYM
6965
74.9k
    0U, // AE_ROUNDSP16Q48X2SYM
6966
74.9k
    0U, // AE_ROUNDSQ32F48ASYM
6967
74.9k
    0U, // AE_ROUNDSQ32F48SYM
6968
74.9k
    0U, // AE_S16M_L_I
6969
74.9k
    0U, // AE_S16M_L_IU
6970
74.9k
    0U, // AE_S16M_L_X
6971
74.9k
    0U, // AE_S16M_L_XC
6972
74.9k
    0U, // AE_S16M_L_XU
6973
74.9k
    0U, // AE_S16X2M_I
6974
74.9k
    0U, // AE_S16X2M_IU
6975
74.9k
    0U, // AE_S16X2M_X
6976
74.9k
    0U, // AE_S16X2M_XC
6977
74.9k
    0U, // AE_S16X2M_XU
6978
74.9k
    0U, // AE_S16X4_I
6979
74.9k
    0U, // AE_S16X4_IP
6980
74.9k
    0U, // AE_S16X4_RIC
6981
74.9k
    0U, // AE_S16X4_RIP
6982
74.9k
    0U, // AE_S16X4_X
6983
74.9k
    0U, // AE_S16X4_XC
6984
74.9k
    0U, // AE_S16X4_XP
6985
74.9k
    0U, // AE_S16_0_I
6986
74.9k
    0U, // AE_S16_0_IP
6987
74.9k
    0U, // AE_S16_0_X
6988
74.9k
    0U, // AE_S16_0_XC
6989
74.9k
    0U, // AE_S16_0_XP
6990
74.9k
    0U, // AE_S24RA64S_I
6991
74.9k
    0U, // AE_S24RA64S_IP
6992
74.9k
    0U, // AE_S24RA64S_X
6993
74.9k
    0U, // AE_S24RA64S_XC
6994
74.9k
    0U, // AE_S24RA64S_XP
6995
74.9k
    0U, // AE_S24X2RA64S_IP
6996
74.9k
    0U, // AE_S32F24_L_I
6997
74.9k
    0U, // AE_S32F24_L_IP
6998
74.9k
    0U, // AE_S32F24_L_X
6999
74.9k
    0U, // AE_S32F24_L_XC
7000
74.9k
    0U, // AE_S32F24_L_XP
7001
74.9k
    0U, // AE_S32M_I
7002
74.9k
    0U, // AE_S32M_IU
7003
74.9k
    0U, // AE_S32M_X
7004
74.9k
    0U, // AE_S32M_XC
7005
74.9k
    0U, // AE_S32M_XU
7006
74.9k
    0U, // AE_S32RA64S_I
7007
74.9k
    0U, // AE_S32RA64S_IP
7008
74.9k
    0U, // AE_S32RA64S_X
7009
74.9k
    0U, // AE_S32RA64S_XC
7010
74.9k
    0U, // AE_S32RA64S_XP
7011
74.9k
    0U, // AE_S32X2F24_I
7012
74.9k
    0U, // AE_S32X2F24_IP
7013
74.9k
    0U, // AE_S32X2F24_RIC
7014
74.9k
    0U, // AE_S32X2F24_RIP
7015
74.9k
    0U, // AE_S32X2F24_X
7016
74.9k
    0U, // AE_S32X2F24_XC
7017
74.9k
    0U, // AE_S32X2F24_XP
7018
74.9k
    0U, // AE_S32X2RA64S_IP
7019
74.9k
    0U, // AE_S32X2_I
7020
74.9k
    0U, // AE_S32X2_IP
7021
74.9k
    0U, // AE_S32X2_RIC
7022
74.9k
    0U, // AE_S32X2_RIP
7023
74.9k
    0U, // AE_S32X2_X
7024
74.9k
    0U, // AE_S32X2_XC
7025
74.9k
    0U, // AE_S32X2_XP
7026
74.9k
    0U, // AE_S32_L_I
7027
74.9k
    0U, // AE_S32_L_IP
7028
74.9k
    0U, // AE_S32_L_X
7029
74.9k
    0U, // AE_S32_L_XC
7030
74.9k
    0U, // AE_S32_L_XP
7031
74.9k
    0U, // AE_S64_I
7032
74.9k
    0U, // AE_S64_IP
7033
74.9k
    0U, // AE_S64_X
7034
74.9k
    0U, // AE_S64_XC
7035
74.9k
    0U, // AE_S64_XP
7036
74.9k
    0U, // AE_SA16X4_IC
7037
74.9k
    0U, // AE_SA16X4_IP
7038
74.9k
    0U, // AE_SA16X4_RIC
7039
74.9k
    0U, // AE_SA16X4_RIP
7040
74.9k
    0U, // AE_SA24X2_IC
7041
74.9k
    0U, // AE_SA24X2_IP
7042
74.9k
    0U, // AE_SA24X2_RIC
7043
74.9k
    0U, // AE_SA24X2_RIP
7044
74.9k
    0U, // AE_SA24_L_IC
7045
74.9k
    0U, // AE_SA24_L_IP
7046
74.9k
    0U, // AE_SA24_L_RIC
7047
74.9k
    0U, // AE_SA24_L_RIP
7048
74.9k
    0U, // AE_SA32X2F24_IC
7049
74.9k
    0U, // AE_SA32X2F24_IP
7050
74.9k
    0U, // AE_SA32X2F24_RIC
7051
74.9k
    0U, // AE_SA32X2F24_RIP
7052
74.9k
    0U, // AE_SA32X2_IC
7053
74.9k
    0U, // AE_SA32X2_IP
7054
74.9k
    0U, // AE_SA32X2_RIC
7055
74.9k
    0U, // AE_SA32X2_RIP
7056
74.9k
    0U, // AE_SA64NEG_FP
7057
74.9k
    0U, // AE_SA64POS_FP
7058
74.9k
    0U, // AE_SALIGN64_I
7059
74.9k
    0U, // AE_SAT16X4
7060
74.9k
    0U, // AE_SAT24S
7061
74.9k
    0U, // AE_SAT48S
7062
74.9k
    0U, // AE_SATQ56S
7063
74.9k
    0U, // AE_SB
7064
74.9k
    0U, // AE_SBF
7065
74.9k
    0U, // AE_SBF_IC
7066
74.9k
    0U, // AE_SBF_IP
7067
74.9k
    0U, // AE_SBI
7068
74.9k
    0U, // AE_SBI_IC
7069
74.9k
    0U, // AE_SBI_IP
7070
74.9k
    0U, // AE_SB_IC
7071
74.9k
    0U, // AE_SB_IP
7072
74.9k
    0U, // AE_SEL16I
7073
74.9k
    0U, // AE_SEL16I_N
7074
74.9k
    0U, // AE_SEXT32
7075
74.9k
    0U, // AE_SEXT32X2D16_10
7076
74.9k
    0U, // AE_SEXT32X2D16_32
7077
74.9k
    0U, // AE_SHA32
7078
74.9k
    0U, // AE_SHORTSWAP
7079
74.9k
    0U, // AE_SLAA16S
7080
74.9k
    0U, // AE_SLAA32
7081
74.9k
    0U, // AE_SLAA32S
7082
74.9k
    0U, // AE_SLAA64
7083
74.9k
    0U, // AE_SLAA64S
7084
74.9k
    0U, // AE_SLAAQ56
7085
74.9k
    0U, // AE_SLAI16S
7086
74.9k
    0U, // AE_SLAI24
7087
74.9k
    0U, // AE_SLAI24S
7088
74.9k
    0U, // AE_SLAI32
7089
74.9k
    0U, // AE_SLAI32S
7090
74.9k
    0U, // AE_SLAI64
7091
74.9k
    0U, // AE_SLAI64S
7092
74.9k
    0U, // AE_SLAISQ56S
7093
74.9k
    0U, // AE_SLAS24
7094
74.9k
    0U, // AE_SLAS24S
7095
74.9k
    0U, // AE_SLAS32
7096
74.9k
    0U, // AE_SLAS32S
7097
74.9k
    0U, // AE_SLAS64
7098
74.9k
    0U, // AE_SLAS64S
7099
74.9k
    0U, // AE_SLASQ56
7100
74.9k
    0U, // AE_SLASSQ56S
7101
74.9k
    0U, // AE_SRA64_32
7102
74.9k
    0U, // AE_SRAA16RS
7103
74.9k
    0U, // AE_SRAA16S
7104
74.9k
    0U, // AE_SRAA32
7105
74.9k
    0U, // AE_SRAA32RS
7106
74.9k
    0U, // AE_SRAA32S
7107
74.9k
    0U, // AE_SRAA64
7108
74.9k
    0U, // AE_SRAI16
7109
74.9k
    0U, // AE_SRAI16R
7110
74.9k
    0U, // AE_SRAI24
7111
74.9k
    0U, // AE_SRAI32
7112
74.9k
    0U, // AE_SRAI32R
7113
74.9k
    0U, // AE_SRAI64
7114
74.9k
    0U, // AE_SRAS24
7115
74.9k
    0U, // AE_SRAS32
7116
74.9k
    0U, // AE_SRAS64
7117
74.9k
    0U, // AE_SRLA32
7118
74.9k
    0U, // AE_SRLA64
7119
74.9k
    0U, // AE_SRLI24
7120
74.9k
    0U, // AE_SRLI32
7121
74.9k
    0U, // AE_SRLI64
7122
74.9k
    0U, // AE_SRLS24
7123
74.9k
    0U, // AE_SRLS32
7124
74.9k
    0U, // AE_SRLS64
7125
74.9k
    0U, // AE_SUB16
7126
74.9k
    0U, // AE_SUB16S
7127
74.9k
    0U, // AE_SUB24S
7128
74.9k
    0U, // AE_SUB32
7129
74.9k
    0U, // AE_SUB32S
7130
74.9k
    0U, // AE_SUB64
7131
74.9k
    0U, // AE_SUB64S
7132
74.9k
    0U, // AE_SUBADD32
7133
74.9k
    0U, // AE_SUBADD32S
7134
74.9k
    0U, // AE_TRUNCA32F64S_L
7135
74.9k
    0U, // AE_TRUNCA32X2F64S
7136
74.9k
    0U, // AE_TRUNCI32F64S_L
7137
74.9k
    0U, // AE_TRUNCI32X2F64S
7138
74.9k
    0U, // AE_VLDL16C
7139
74.9k
    0U, // AE_VLDL16C_IC
7140
74.9k
    0U, // AE_VLDL16C_IP
7141
74.9k
    0U, // AE_VLDL16T
7142
74.9k
    0U, // AE_VLDL32T
7143
74.9k
    0U, // AE_VLDSHT
7144
74.9k
    0U, // AE_VLEL16T
7145
74.9k
    0U, // AE_VLEL32T
7146
74.9k
    0U, // AE_VLES16C
7147
74.9k
    0U, // AE_VLES16C_IC
7148
74.9k
    0U, // AE_VLES16C_IP
7149
74.9k
    0U, // AE_XOR
7150
74.9k
    0U, // AE_ZALIGN64
7151
74.9k
    0U, // ALL4
7152
74.9k
    0U, // ALL8
7153
74.9k
    0U, // AND
7154
74.9k
    0U, // ANDB
7155
74.9k
    0U, // ANDBC
7156
74.9k
    0U, // ANY4
7157
74.9k
    0U, // ANY8
7158
74.9k
    0U, // BALL
7159
74.9k
    0U, // BANY
7160
74.9k
    0U, // BBC
7161
74.9k
    0U, // BBCI
7162
74.9k
    0U, // BBS
7163
74.9k
    0U, // BBSI
7164
74.9k
    0U, // BEQ
7165
74.9k
    0U, // BEQI
7166
74.9k
    0U, // BEQZ
7167
74.9k
    0U, // BF
7168
74.9k
    0U, // BGE
7169
74.9k
    0U, // BGEI
7170
74.9k
    0U, // BGEU
7171
74.9k
    0U, // BGEUI
7172
74.9k
    0U, // BGEZ
7173
74.9k
    0U, // BLT
7174
74.9k
    0U, // BLTI
7175
74.9k
    0U, // BLTU
7176
74.9k
    0U, // BLTUI
7177
74.9k
    0U, // BLTZ
7178
74.9k
    0U, // BNALL
7179
74.9k
    0U, // BNE
7180
74.9k
    0U, // BNEI
7181
74.9k
    0U, // BNEZ
7182
74.9k
    0U, // BNONE
7183
74.9k
    0U, // BREAK
7184
74.9k
    0U, // BREAK_N
7185
74.9k
    0U, // BT
7186
74.9k
    0U, // CALL0
7187
74.9k
    0U, // CALL12
7188
74.9k
    0U, // CALL4
7189
74.9k
    0U, // CALL8
7190
74.9k
    0U, // CALLX0
7191
74.9k
    0U, // CALLX12
7192
74.9k
    0U, // CALLX4
7193
74.9k
    0U, // CALLX8
7194
74.9k
    0U, // CEIL_S
7195
74.9k
    0U, // CLAMPS
7196
74.9k
    0U, // CLR_BIT_GPIO_OUT
7197
74.9k
    0U, // CONST_S
7198
74.9k
    0U, // DIV0_S
7199
74.9k
    0U, // DIVN_S
7200
74.9k
    0U, // DSYNC
7201
74.9k
    0U, // EE_ANDQ
7202
74.9k
    0U, // EE_BITREV
7203
74.9k
    0U, // EE_CLR_BIT_GPIO_OUT
7204
74.9k
    0U, // EE_CMUL_S16
7205
74.9k
    0U, // EE_CMUL_S16_LD_INCP
7206
74.9k
    0U, // EE_CMUL_S16_ST_INCP
7207
74.9k
    37U,  // EE_FFT_AMS_S16_LD_INCP
7208
74.9k
    37U,  // EE_FFT_AMS_S16_LD_INCP_UAUP
7209
74.9k
    37U,  // EE_FFT_AMS_S16_LD_R32_DECP
7210
74.9k
    0U, // EE_FFT_AMS_S16_ST_INCP
7211
74.9k
    0U, // EE_FFT_CMUL_S16_LD_XP
7212
74.9k
    6U, // EE_FFT_CMUL_S16_ST_XP
7213
74.9k
    0U, // EE_FFT_R2BF_S16
7214
74.9k
    0U, // EE_FFT_R2BF_S16_ST_INCP
7215
74.9k
    0U, // EE_FFT_VST_R32_DECP
7216
74.9k
    0U, // EE_GET_GPIO_IN
7217
74.9k
    7U, // EE_LDF_128_IP
7218
74.9k
    13U,  // EE_LDF_128_XP
7219
74.9k
    0U, // EE_LDF_64_IP
7220
74.9k
    0U, // EE_LDF_64_XP
7221
74.9k
    0U, // EE_LDQA_S16_128_IP
7222
74.9k
    0U, // EE_LDQA_S16_128_XP
7223
74.9k
    0U, // EE_LDQA_S8_128_IP
7224
74.9k
    0U, // EE_LDQA_S8_128_XP
7225
74.9k
    0U, // EE_LDQA_U16_128_IP
7226
74.9k
    0U, // EE_LDQA_U16_128_XP
7227
74.9k
    0U, // EE_LDQA_U8_128_IP
7228
74.9k
    0U, // EE_LDQA_U8_128_XP
7229
74.9k
    0U, // EE_LDXQ_32
7230
74.9k
    0U, // EE_LD_128_USAR_IP
7231
74.9k
    0U, // EE_LD_128_USAR_XP
7232
74.9k
    0U, // EE_LD_ACCX_IP
7233
74.9k
    0U, // EE_LD_QACC_H_H_32_IP
7234
74.9k
    0U, // EE_LD_QACC_H_L_128_IP
7235
74.9k
    0U, // EE_LD_QACC_L_H_32_IP
7236
74.9k
    0U, // EE_LD_QACC_L_L_128_IP
7237
74.9k
    0U, // EE_LD_UA_STATE_IP
7238
74.9k
    0U, // EE_MOVI_32_A
7239
74.9k
    0U, // EE_MOVI_32_Q
7240
74.9k
    0U, // EE_MOV_S16_QACC
7241
74.9k
    0U, // EE_MOV_S8_QACC
7242
74.9k
    0U, // EE_MOV_U16_QACC
7243
74.9k
    0U, // EE_MOV_U8_QACC
7244
74.9k
    0U, // EE_NOTQ
7245
74.9k
    0U, // EE_ORQ
7246
74.9k
    0U, // EE_SET_BIT_GPIO_OUT
7247
74.9k
    0U, // EE_SLCI_2Q
7248
74.9k
    0U, // EE_SLCXXP_2Q
7249
74.9k
    0U, // EE_SRCI_2Q
7250
74.9k
    0U, // EE_SRCMB_S16_QACC
7251
74.9k
    0U, // EE_SRCMB_S8_QACC
7252
74.9k
    0U, // EE_SRCQ_128_ST_INCP
7253
74.9k
    0U, // EE_SRCXXP_2Q
7254
74.9k
    0U, // EE_SRC_Q
7255
74.9k
    0U, // EE_SRC_Q_LD_IP
7256
74.9k
    0U, // EE_SRC_Q_LD_XP
7257
74.9k
    0U, // EE_SRC_Q_QUP
7258
74.9k
    0U, // EE_SRS_ACCX
7259
74.9k
    7U, // EE_STF_128_IP
7260
74.9k
    13U,  // EE_STF_128_XP
7261
74.9k
    0U, // EE_STF_64_IP
7262
74.9k
    0U, // EE_STF_64_XP
7263
74.9k
    0U, // EE_STXQ_32
7264
74.9k
    0U, // EE_ST_ACCX_IP
7265
74.9k
    0U, // EE_ST_QACC_H_H_32_IP
7266
74.9k
    0U, // EE_ST_QACC_H_L_128_IP
7267
74.9k
    0U, // EE_ST_QACC_L_H_32_IP
7268
74.9k
    0U, // EE_ST_QACC_L_L_128_IP
7269
74.9k
    0U, // EE_ST_UA_STATE_IP
7270
74.9k
    0U, // EE_VADDS_S16
7271
74.9k
    0U, // EE_VADDS_S16_LD_INCP
7272
74.9k
    0U, // EE_VADDS_S16_ST_INCP
7273
74.9k
    0U, // EE_VADDS_S32
7274
74.9k
    0U, // EE_VADDS_S32_LD_INCP
7275
74.9k
    0U, // EE_VADDS_S32_ST_INCP
7276
74.9k
    0U, // EE_VADDS_S8
7277
74.9k
    0U, // EE_VADDS_S8_LD_INCP
7278
74.9k
    0U, // EE_VADDS_S8_ST_INCP
7279
74.9k
    0U, // EE_VCMP_EQ_S16
7280
74.9k
    0U, // EE_VCMP_EQ_S32
7281
74.9k
    0U, // EE_VCMP_EQ_S8
7282
74.9k
    0U, // EE_VCMP_GT_S16
7283
74.9k
    0U, // EE_VCMP_GT_S32
7284
74.9k
    0U, // EE_VCMP_GT_S8
7285
74.9k
    0U, // EE_VCMP_LT_S16
7286
74.9k
    0U, // EE_VCMP_LT_S32
7287
74.9k
    0U, // EE_VCMP_LT_S8
7288
74.9k
    0U, // EE_VLDBC_16
7289
74.9k
    0U, // EE_VLDBC_16_IP
7290
74.9k
    0U, // EE_VLDBC_16_XP
7291
74.9k
    0U, // EE_VLDBC_32
7292
74.9k
    0U, // EE_VLDBC_32_IP
7293
74.9k
    0U, // EE_VLDBC_32_XP
7294
74.9k
    0U, // EE_VLDBC_8
7295
74.9k
    0U, // EE_VLDBC_8_IP
7296
74.9k
    0U, // EE_VLDBC_8_XP
7297
74.9k
    0U, // EE_VLDHBC_16_INCP
7298
74.9k
    0U, // EE_VLD_128_IP
7299
74.9k
    0U, // EE_VLD_128_XP
7300
74.9k
    0U, // EE_VLD_H_64_IP
7301
74.9k
    0U, // EE_VLD_H_64_XP
7302
74.9k
    0U, // EE_VLD_L_64_IP
7303
74.9k
    0U, // EE_VLD_L_64_XP
7304
74.9k
    0U, // EE_VMAX_S16
7305
74.9k
    0U, // EE_VMAX_S16_LD_INCP
7306
74.9k
    0U, // EE_VMAX_S16_ST_INCP
7307
74.9k
    0U, // EE_VMAX_S32
7308
74.9k
    0U, // EE_VMAX_S32_LD_INCP
7309
74.9k
    0U, // EE_VMAX_S32_ST_INCP
7310
74.9k
    0U, // EE_VMAX_S8
7311
74.9k
    0U, // EE_VMAX_S8_LD_INCP
7312
74.9k
    0U, // EE_VMAX_S8_ST_INCP
7313
74.9k
    0U, // EE_VMIN_S16
7314
74.9k
    0U, // EE_VMIN_S16_LD_INCP
7315
74.9k
    0U, // EE_VMIN_S16_ST_INCP
7316
74.9k
    0U, // EE_VMIN_S32
7317
74.9k
    0U, // EE_VMIN_S32_LD_INCP
7318
74.9k
    0U, // EE_VMIN_S32_ST_INCP
7319
74.9k
    0U, // EE_VMIN_S8
7320
74.9k
    0U, // EE_VMIN_S8_LD_INCP
7321
74.9k
    0U, // EE_VMIN_S8_ST_INCP
7322
74.9k
    0U, // EE_VMULAS_S16_ACCX
7323
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_IP
7324
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP
7325
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_XP
7326
74.9k
    0U, // EE_VMULAS_S16_ACCX_LD_XP_QUP
7327
74.9k
    0U, // EE_VMULAS_S16_QACC
7328
74.9k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP
7329
74.9k
    0U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP
7330
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_IP
7331
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_IP_QUP
7332
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_XP
7333
74.9k
    0U, // EE_VMULAS_S16_QACC_LD_XP_QUP
7334
74.9k
    0U, // EE_VMULAS_S8_ACCX
7335
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_IP
7336
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP
7337
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_XP
7338
74.9k
    0U, // EE_VMULAS_S8_ACCX_LD_XP_QUP
7339
74.9k
    0U, // EE_VMULAS_S8_QACC
7340
74.9k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP
7341
74.9k
    0U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP
7342
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_IP
7343
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_IP_QUP
7344
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_XP
7345
74.9k
    0U, // EE_VMULAS_S8_QACC_LD_XP_QUP
7346
74.9k
    0U, // EE_VMULAS_U16_ACCX
7347
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_IP
7348
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP
7349
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_XP
7350
74.9k
    0U, // EE_VMULAS_U16_ACCX_LD_XP_QUP
7351
74.9k
    0U, // EE_VMULAS_U16_QACC
7352
74.9k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP
7353
74.9k
    0U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP
7354
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_IP
7355
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_IP_QUP
7356
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_XP
7357
74.9k
    0U, // EE_VMULAS_U16_QACC_LD_XP_QUP
7358
74.9k
    0U, // EE_VMULAS_U8_ACCX
7359
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_IP
7360
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP
7361
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_XP
7362
74.9k
    0U, // EE_VMULAS_U8_ACCX_LD_XP_QUP
7363
74.9k
    0U, // EE_VMULAS_U8_QACC
7364
74.9k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP
7365
74.9k
    0U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP
7366
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_IP
7367
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_IP_QUP
7368
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_XP
7369
74.9k
    0U, // EE_VMULAS_U8_QACC_LD_XP_QUP
7370
74.9k
    0U, // EE_VMUL_S16
7371
74.9k
    0U, // EE_VMUL_S16_LD_INCP
7372
74.9k
    0U, // EE_VMUL_S16_ST_INCP
7373
74.9k
    0U, // EE_VMUL_S8
7374
74.9k
    0U, // EE_VMUL_S8_LD_INCP
7375
74.9k
    0U, // EE_VMUL_S8_ST_INCP
7376
74.9k
    0U, // EE_VMUL_U16
7377
74.9k
    0U, // EE_VMUL_U16_LD_INCP
7378
74.9k
    0U, // EE_VMUL_U16_ST_INCP
7379
74.9k
    0U, // EE_VMUL_U8
7380
74.9k
    0U, // EE_VMUL_U8_LD_INCP
7381
74.9k
    0U, // EE_VMUL_U8_ST_INCP
7382
74.9k
    0U, // EE_VPRELU_S16
7383
74.9k
    0U, // EE_VPRELU_S8
7384
74.9k
    0U, // EE_VRELU_S16
7385
74.9k
    0U, // EE_VRELU_S8
7386
74.9k
    0U, // EE_VSL_32
7387
74.9k
    0U, // EE_VSMULAS_S16_QACC
7388
74.9k
    0U, // EE_VSMULAS_S16_QACC_LD_INCP
7389
74.9k
    0U, // EE_VSMULAS_S8_QACC
7390
74.9k
    0U, // EE_VSMULAS_S8_QACC_LD_INCP
7391
74.9k
    0U, // EE_VSR_32
7392
74.9k
    0U, // EE_VST_128_IP
7393
74.9k
    0U, // EE_VST_128_XP
7394
74.9k
    0U, // EE_VST_H_64_IP
7395
74.9k
    0U, // EE_VST_H_64_XP
7396
74.9k
    0U, // EE_VST_L_64_IP
7397
74.9k
    0U, // EE_VST_L_64_XP
7398
74.9k
    0U, // EE_VSUBS_S16
7399
74.9k
    0U, // EE_VSUBS_S16_LD_INCP
7400
74.9k
    0U, // EE_VSUBS_S16_ST_INCP
7401
74.9k
    0U, // EE_VSUBS_S32
7402
74.9k
    0U, // EE_VSUBS_S32_LD_INCP
7403
74.9k
    0U, // EE_VSUBS_S32_ST_INCP
7404
74.9k
    0U, // EE_VSUBS_S8
7405
74.9k
    0U, // EE_VSUBS_S8_LD_INCP
7406
74.9k
    0U, // EE_VSUBS_S8_ST_INCP
7407
74.9k
    0U, // EE_VUNZIP_16
7408
74.9k
    0U, // EE_VUNZIP_32
7409
74.9k
    0U, // EE_VUNZIP_8
7410
74.9k
    0U, // EE_VZIP_16
7411
74.9k
    0U, // EE_VZIP_32
7412
74.9k
    0U, // EE_VZIP_8
7413
74.9k
    0U, // EE_WR_MASK_GPIO_OUT
7414
74.9k
    0U, // EE_XORQ
7415
74.9k
    0U, // EE_ZERO_ACCX
7416
74.9k
    0U, // EE_ZERO_Q
7417
74.9k
    0U, // EE_ZERO_QACC
7418
74.9k
    0U, // ENTRY
7419
74.9k
    0U, // ESYNC
7420
74.9k
    0U, // EXCW
7421
74.9k
    0U, // EXTUI
7422
74.9k
    0U, // EXTW
7423
74.9k
    0U, // FLOAT_S
7424
74.9k
    0U, // FLOOR_S
7425
74.9k
    0U, // GET_GPIO_IN
7426
74.9k
    0U, // ILL
7427
74.9k
    0U, // ILL_N
7428
74.9k
    0U, // ISYNC
7429
74.9k
    0U, // J
7430
74.9k
    0U, // JX
7431
74.9k
    0U, // L16SI
7432
74.9k
    0U, // L16UI
7433
74.9k
    0U, // L32E
7434
74.9k
    0U, // L32I
7435
74.9k
    0U, // L32I_N
7436
74.9k
    0U, // L32R
7437
74.9k
    0U, // L8UI
7438
74.9k
    0U, // LDDEC
7439
74.9k
    0U, // LDINC
7440
74.9k
    0U, // LEA_ADD
7441
74.9k
    0U, // LOOP
7442
74.9k
    0U, // LOOPGTZ
7443
74.9k
    0U, // LOOPNEZ
7444
74.9k
    0U, // LSI
7445
74.9k
    0U, // LSIP
7446
74.9k
    0U, // LSX
7447
74.9k
    0U, // LSXP
7448
74.9k
    0U, // MADDN_S
7449
74.9k
    0U, // MADD_S
7450
74.9k
    0U, // MAX
7451
74.9k
    0U, // MAXU
7452
74.9k
    0U, // MEMW
7453
74.9k
    0U, // MIN
7454
74.9k
    0U, // MINU
7455
74.9k
    0U, // MKDADJ_S
7456
74.9k
    0U, // MKSADJ_S
7457
74.9k
    0U, // MOVEQZ
7458
74.9k
    0U, // MOVEQZ_S
7459
74.9k
    0U, // MOVF
7460
74.9k
    0U, // MOVF_S
7461
74.9k
    0U, // MOVGEZ
7462
74.9k
    0U, // MOVGEZ_S
7463
74.9k
    0U, // MOVI
7464
74.9k
    0U, // MOVI_N
7465
74.9k
    0U, // MOVLTZ
7466
74.9k
    0U, // MOVLTZ_S
7467
74.9k
    0U, // MOVNEZ
7468
74.9k
    0U, // MOVNEZ_S
7469
74.9k
    0U, // MOVSP
7470
74.9k
    0U, // MOVT
7471
74.9k
    0U, // MOVT_S
7472
74.9k
    0U, // MOV_N
7473
74.9k
    0U, // MOV_S
7474
74.9k
    0U, // MSUB_S
7475
74.9k
    0U, // MUL16S
7476
74.9k
    0U, // MUL16U
7477
74.9k
    0U, // MULA_AA_HH
7478
74.9k
    0U, // MULA_AA_HL
7479
74.9k
    0U, // MULA_AA_LH
7480
74.9k
    0U, // MULA_AA_LL
7481
74.9k
    0U, // MULA_AD_HH
7482
74.9k
    0U, // MULA_AD_HL
7483
74.9k
    0U, // MULA_AD_LH
7484
74.9k
    0U, // MULA_AD_LL
7485
74.9k
    0U, // MULA_DA_HH
7486
74.9k
    0U, // MULA_DA_HH_LDDEC
7487
74.9k
    0U, // MULA_DA_HH_LDINC
7488
74.9k
    0U, // MULA_DA_HL
7489
74.9k
    0U, // MULA_DA_HL_LDDEC
7490
74.9k
    0U, // MULA_DA_HL_LDINC
7491
74.9k
    0U, // MULA_DA_LH
7492
74.9k
    0U, // MULA_DA_LH_LDDEC
7493
74.9k
    0U, // MULA_DA_LH_LDINC
7494
74.9k
    0U, // MULA_DA_LL
7495
74.9k
    0U, // MULA_DA_LL_LDDEC
7496
74.9k
    0U, // MULA_DA_LL_LDINC
7497
74.9k
    0U, // MULA_DD_HH
7498
74.9k
    0U, // MULA_DD_HH_LDDEC
7499
74.9k
    0U, // MULA_DD_HH_LDINC
7500
74.9k
    0U, // MULA_DD_HL
7501
74.9k
    0U, // MULA_DD_HL_LDDEC
7502
74.9k
    0U, // MULA_DD_HL_LDINC
7503
74.9k
    0U, // MULA_DD_LH
7504
74.9k
    0U, // MULA_DD_LH_LDDEC
7505
74.9k
    0U, // MULA_DD_LH_LDINC
7506
74.9k
    0U, // MULA_DD_LL
7507
74.9k
    0U, // MULA_DD_LL_LDDEC
7508
74.9k
    0U, // MULA_DD_LL_LDINC
7509
74.9k
    0U, // MULL
7510
74.9k
    0U, // MULSH
7511
74.9k
    0U, // MULS_AA_HH
7512
74.9k
    0U, // MULS_AA_HL
7513
74.9k
    0U, // MULS_AA_LH
7514
74.9k
    0U, // MULS_AA_LL
7515
74.9k
    0U, // MULS_AD_HH
7516
74.9k
    0U, // MULS_AD_HL
7517
74.9k
    0U, // MULS_AD_LH
7518
74.9k
    0U, // MULS_AD_LL
7519
74.9k
    0U, // MULS_DA_HH
7520
74.9k
    0U, // MULS_DA_HL
7521
74.9k
    0U, // MULS_DA_LH
7522
74.9k
    0U, // MULS_DA_LL
7523
74.9k
    0U, // MULS_DD_HH
7524
74.9k
    0U, // MULS_DD_HL
7525
74.9k
    0U, // MULS_DD_LH
7526
74.9k
    0U, // MULS_DD_LL
7527
74.9k
    0U, // MULUH
7528
74.9k
    0U, // MUL_AA_HH
7529
74.9k
    0U, // MUL_AA_HL
7530
74.9k
    0U, // MUL_AA_LH
7531
74.9k
    0U, // MUL_AA_LL
7532
74.9k
    0U, // MUL_AD_HH
7533
74.9k
    0U, // MUL_AD_HL
7534
74.9k
    0U, // MUL_AD_LH
7535
74.9k
    0U, // MUL_AD_LL
7536
74.9k
    0U, // MUL_DA_HH
7537
74.9k
    0U, // MUL_DA_HL
7538
74.9k
    0U, // MUL_DA_LH
7539
74.9k
    0U, // MUL_DA_LL
7540
74.9k
    0U, // MUL_DD_HH
7541
74.9k
    0U, // MUL_DD_HL
7542
74.9k
    0U, // MUL_DD_LH
7543
74.9k
    0U, // MUL_DD_LL
7544
74.9k
    0U, // MUL_S
7545
74.9k
    0U, // NEG
7546
74.9k
    0U, // NEG_S
7547
74.9k
    0U, // NEXP01_S
7548
74.9k
    0U, // NOP
7549
74.9k
    0U, // NSA
7550
74.9k
    0U, // NSAU
7551
74.9k
    0U, // OEQ_S
7552
74.9k
    0U, // OLE_S
7553
74.9k
    0U, // OLT_S
7554
74.9k
    0U, // OR
7555
74.9k
    0U, // ORB
7556
74.9k
    0U, // ORBC
7557
74.9k
    0U, // QUOS
7558
74.9k
    0U, // QUOU
7559
74.9k
    0U, // RECIP0_S
7560
74.9k
    0U, // REMS
7561
74.9k
    0U, // REMU
7562
74.9k
    0U, // RER
7563
74.9k
    0U, // RET
7564
74.9k
    0U, // RETW
7565
74.9k
    0U, // RETW_N
7566
74.9k
    0U, // RET_N
7567
74.9k
    0U, // RFDE
7568
74.9k
    0U, // RFE
7569
74.9k
    0U, // RFI
7570
74.9k
    0U, // RFR
7571
74.9k
    0U, // RFWO
7572
74.9k
    0U, // RFWU
7573
74.9k
    0U, // ROTW
7574
74.9k
    0U, // ROUND_S
7575
74.9k
    0U, // RSIL
7576
74.9k
    0U, // RSQRT0_S
7577
74.9k
    0U, // RSR
7578
74.9k
    0U, // RSYNC
7579
74.9k
    0U, // RUR
7580
74.9k
    0U, // RUR_ACCX_0
7581
74.9k
    0U, // RUR_ACCX_1
7582
74.9k
    0U, // RUR_AE_BITHEAD
7583
74.9k
    0U, // RUR_AE_BITPTR
7584
74.9k
    0U, // RUR_AE_BITSUSED
7585
74.9k
    0U, // RUR_AE_CBEGIN0
7586
74.9k
    0U, // RUR_AE_CEND0
7587
74.9k
    0U, // RUR_AE_CWRAP
7588
74.9k
    0U, // RUR_AE_CW_SD_NO
7589
74.9k
    0U, // RUR_AE_FIRST_TS
7590
74.9k
    0U, // RUR_AE_NEXTOFFSET
7591
74.9k
    0U, // RUR_AE_OVERFLOW
7592
74.9k
    0U, // RUR_AE_OVF_SAR
7593
74.9k
    0U, // RUR_AE_SAR
7594
74.9k
    0U, // RUR_AE_SEARCHDONE
7595
74.9k
    0U, // RUR_AE_TABLESIZE
7596
74.9k
    0U, // RUR_AE_TS_FTS_BU_BP
7597
74.9k
    0U, // RUR_FFT_BIT_WIDTH
7598
74.9k
    0U, // RUR_GPIO_OUT
7599
74.9k
    0U, // RUR_QACC_H_0
7600
74.9k
    0U, // RUR_QACC_H_1
7601
74.9k
    0U, // RUR_QACC_H_2
7602
74.9k
    0U, // RUR_QACC_H_3
7603
74.9k
    0U, // RUR_QACC_H_4
7604
74.9k
    0U, // RUR_QACC_L_0
7605
74.9k
    0U, // RUR_QACC_L_1
7606
74.9k
    0U, // RUR_QACC_L_2
7607
74.9k
    0U, // RUR_QACC_L_3
7608
74.9k
    0U, // RUR_QACC_L_4
7609
74.9k
    0U, // RUR_SAR_BYTE
7610
74.9k
    0U, // RUR_UA_STATE_0
7611
74.9k
    0U, // RUR_UA_STATE_1
7612
74.9k
    0U, // RUR_UA_STATE_2
7613
74.9k
    0U, // RUR_UA_STATE_3
7614
74.9k
    0U, // S16I
7615
74.9k
    0U, // S32C1I
7616
74.9k
    0U, // S32E
7617
74.9k
    0U, // S32I
7618
74.9k
    0U, // S32I_N
7619
74.9k
    0U, // S8I
7620
74.9k
    0U, // SET_BIT_GPIO_OUT
7621
74.9k
    0U, // SEXT
7622
74.9k
    0U, // SIMCALL
7623
74.9k
    0U, // SLL
7624
74.9k
    0U, // SLLI
7625
74.9k
    0U, // SQRT0_S
7626
74.9k
    0U, // SRA
7627
74.9k
    0U, // SRAI
7628
74.9k
    0U, // SRC
7629
74.9k
    0U, // SRL
7630
74.9k
    0U, // SRLI
7631
74.9k
    0U, // SSA8L
7632
74.9k
    0U, // SSAI
7633
74.9k
    0U, // SSI
7634
74.9k
    0U, // SSIP
7635
74.9k
    0U, // SSL
7636
74.9k
    0U, // SSR
7637
74.9k
    0U, // SSX
7638
74.9k
    0U, // SSXP
7639
74.9k
    0U, // SUB
7640
74.9k
    0U, // SUBX2
7641
74.9k
    0U, // SUBX4
7642
74.9k
    0U, // SUBX8
7643
74.9k
    0U, // SUB_S
7644
74.9k
    0U, // SYSCALL
7645
74.9k
    0U, // TRUNC_S
7646
74.9k
    0U, // UEQ_S
7647
74.9k
    0U, // UFLOAT_S
7648
74.9k
    0U, // ULE_S
7649
74.9k
    0U, // ULT_S
7650
74.9k
    0U, // UMUL_AA_HH
7651
74.9k
    0U, // UMUL_AA_HL
7652
74.9k
    0U, // UMUL_AA_LH
7653
74.9k
    0U, // UMUL_AA_LL
7654
74.9k
    0U, // UN_S
7655
74.9k
    0U, // UTRUNC_S
7656
74.9k
    0U, // WAITI
7657
74.9k
    0U, // WDTLB
7658
74.9k
    0U, // WER
7659
74.9k
    0U, // WFR
7660
74.9k
    0U, // WITLB
7661
74.9k
    0U, // WR_MASK_GPIO_OUT
7662
74.9k
    0U, // WSR
7663
74.9k
    0U, // WUR
7664
74.9k
    0U, // WUR_ACCX_0
7665
74.9k
    0U, // WUR_ACCX_1
7666
74.9k
    0U, // WUR_AE_BITHEAD
7667
74.9k
    0U, // WUR_AE_BITPTR
7668
74.9k
    0U, // WUR_AE_BITSUSED
7669
74.9k
    0U, // WUR_AE_CBEGIN0
7670
74.9k
    0U, // WUR_AE_CEND0
7671
74.9k
    0U, // WUR_AE_CWRAP
7672
74.9k
    0U, // WUR_AE_CW_SD_NO
7673
74.9k
    0U, // WUR_AE_FIRST_TS
7674
74.9k
    0U, // WUR_AE_NEXTOFFSET
7675
74.9k
    0U, // WUR_AE_OVERFLOW
7676
74.9k
    0U, // WUR_AE_OVF_SAR
7677
74.9k
    0U, // WUR_AE_SAR
7678
74.9k
    0U, // WUR_AE_SEARCHDONE
7679
74.9k
    0U, // WUR_AE_TABLESIZE
7680
74.9k
    0U, // WUR_AE_TS_FTS_BU_BP
7681
74.9k
    0U, // WUR_FCR
7682
74.9k
    0U, // WUR_FFT_BIT_WIDTH
7683
74.9k
    0U, // WUR_FSR
7684
74.9k
    0U, // WUR_GPIO_OUT
7685
74.9k
    0U, // WUR_QACC_H_0
7686
74.9k
    0U, // WUR_QACC_H_1
7687
74.9k
    0U, // WUR_QACC_H_2
7688
74.9k
    0U, // WUR_QACC_H_3
7689
74.9k
    0U, // WUR_QACC_H_4
7690
74.9k
    0U, // WUR_QACC_L_0
7691
74.9k
    0U, // WUR_QACC_L_1
7692
74.9k
    0U, // WUR_QACC_L_2
7693
74.9k
    0U, // WUR_QACC_L_3
7694
74.9k
    0U, // WUR_QACC_L_4
7695
74.9k
    0U, // WUR_SAR_BYTE
7696
74.9k
    0U, // WUR_UA_STATE_0
7697
74.9k
    0U, // WUR_UA_STATE_1
7698
74.9k
    0U, // WUR_UA_STATE_2
7699
74.9k
    0U, // WUR_UA_STATE_3
7700
74.9k
    0U, // XOR
7701
74.9k
    0U, // XORB
7702
74.9k
    0U, // XSR
7703
74.9k
    0U, // _L32I
7704
74.9k
    0U, // _L32I_N
7705
74.9k
    0U, // _MOVI
7706
74.9k
    0U, // _S32I
7707
74.9k
    0U, // _S32I_N
7708
74.9k
    0U, // _SLLI
7709
74.9k
    0U, // _SRLI
7710
74.9k
    0U, // mv_QR
7711
74.9k
  };
7712
7713
  // Emit the opcode for the instruction.
7714
74.9k
  uint64_t Bits = 0;
7715
74.9k
  Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0;
7716
74.9k
  Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32;
7717
74.9k
  Bits |= (uint64_t)OpInfo2[MCInst_getOpcode(MI)] << 48;
7718
74.9k
  MnemonicBitsInfo MBI = {
7719
74.9k
#ifndef CAPSTONE_DIET
7720
74.9k
    AsmStrs+(Bits & 32767)-1,
7721
#else
7722
    NULL,
7723
#endif // CAPSTONE_DIET
7724
74.9k
    Bits
7725
74.9k
  };
7726
74.9k
  return MBI;
7727
74.9k
}
7728
7729
/// printInstruction - This method is automatically generated by tablegen
7730
/// from the instruction set description.
7731
74.9k
static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) {
7732
74.9k
  SStream_concat0(O, "");
7733
74.9k
  MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O);
7734
7735
74.9k
  SStream_concat0(O, MnemonicInfo.first);
7736
7737
74.9k
  uint64_t Bits = MnemonicInfo.second;
7738
74.9k
  CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction.");
7739
7740
  // Fragment 0 encoded into 4 bits for 13 unique commands.
7741
74.9k
  switch ((Bits >> 15) & 15) {
7742
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7743
3.34k
  case 0:
7744
    // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
7745
3.34k
    return;
7746
0
    break;
7747
55.8k
  case 1:
7748
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7749
55.8k
    printOperand(MI, 0, O);
7750
55.8k
    break;
7751
0
  case 2:
7752
    // EE_ANDQ_P, EE_BITREV_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_...
7753
0
    printImm8_AsmOperand(MI, 0, O);
7754
0
    break;
7755
0
  case 3:
7756
    // LOOPEND
7757
0
    printBranchTarget(MI, 0, O);
7758
0
    return;
7759
0
    break;
7760
7.64k
  case 4:
7761
    // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DBI, AE_DBI_IC, AE_DBI_IP, AE_DB_IC, AE...
7762
7.64k
    printOperand(MI, 1, O);
7763
7.64k
    break;
7764
3.26k
  case 5:
7765
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
7766
3.26k
    printOperand(MI, 2, O);
7767
3.26k
    SStream_concat0(O, ", ");
7768
3.26k
    printOperand(MI, 3, O);
7769
3.26k
    break;
7770
466
  case 6:
7771
    // BREAK, BREAK_N, RFI, WAITI
7772
466
    printUimm4_AsmOperand(MI, 0, O);
7773
466
    break;
7774
1.99k
  case 7:
7775
    // CALL0, CALL12, CALL4, CALL8
7776
1.99k
    printCallOperand(MI, 0, O);
7777
1.99k
    return;
7778
0
    break;
7779
81
  case 8:
7780
    // CLR_BIT_GPIO_OUT, EE_CLR_BIT_GPIO_OUT, EE_SET_BIT_GPIO_OUT, SET_BIT_GP...
7781
81
    printSelect_256_AsmOperand(MI, 0, O);
7782
81
    return;
7783
0
    break;
7784
447
  case 9:
7785
    // EE_FFT_AMS_S16_ST_INCP, EE_SLCXXP_2Q, EE_SRCXXP_2Q
7786
447
    printOperand(MI, 3, O);
7787
447
    SStream_concat0(O, ", ");
7788
447
    break;
7789
1.29k
  case 10:
7790
    // J
7791
1.29k
    printJumpTarget(MI, 0, O);
7792
1.29k
    return;
7793
0
    break;
7794
120
  case 11:
7795
    // ROTW
7796
120
    printImm8n_7_AsmOperand(MI, 0, O);
7797
120
    return;
7798
0
    break;
7799
480
  case 12:
7800
    // SSAI
7801
480
    printUimm5_AsmOperand(MI, 0, O);
7802
480
    return;
7803
0
    break;
7804
74.9k
  }
7805
7806
7807
  // Fragment 1 encoded into 2 bits for 4 unique commands.
7808
67.6k
  switch ((Bits >> 19) & 3) {
7809
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7810
63.3k
  case 0:
7811
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7812
63.3k
    SStream_concat0(O, ", ");
7813
63.3k
    break;
7814
3.91k
  case 1:
7815
    // EE_MOV_S16_QACC_P, EE_MOV_S8_QACC_P, EE_MOV_U16_QACC_P, EE_MOV_U8_QACC...
7816
3.91k
    return;
7817
0
    break;
7818
242
  case 2:
7819
    // EE_FFT_AMS_S16_ST_INCP
7820
242
    printOperand(MI, 0, O);
7821
242
    SStream_concat0(O, ", ");
7822
242
    printOperand(MI, 4, O);
7823
242
    SStream_concat0(O, ", ");
7824
242
    printOperand(MI, 5, O);
7825
242
    SStream_concat0(O, ", ");
7826
242
    printOperand(MI, 6, O);
7827
242
    SStream_concat0(O, ", ");
7828
242
    printOperand(MI, 7, O);
7829
242
    SStream_concat0(O, ", ");
7830
242
    printOperand(MI, 8, O);
7831
242
    SStream_concat0(O, ", ");
7832
242
    printSelect_2_AsmOperand(MI, 9, O);
7833
242
    return;
7834
0
    break;
7835
205
  case 3:
7836
    // EE_SLCXXP_2Q, EE_SRCXXP_2Q
7837
205
    printOperand(MI, 4, O);
7838
205
    SStream_concat0(O, ", ");
7839
205
    printOperand(MI, 5, O);
7840
205
    SStream_concat0(O, ", ");
7841
205
    printOperand(MI, 6, O);
7842
205
    return;
7843
0
    break;
7844
67.6k
  }
7845
7846
7847
  // Fragment 2 encoded into 5 bits for 29 unique commands.
7848
63.3k
  switch ((Bits >> 21) & 31) {
7849
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
7850
25.4k
  case 0:
7851
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
7852
25.4k
    printOperand(MI, 1, O);
7853
25.4k
    break;
7854
0
  case 1:
7855
    // EE_ANDQ_P, EE_CMUL_S16_P, EE_FFT_AMS_S16_ST_INCP_P, EE_FFT_CMUL_S16_ST...
7856
0
    printImm8_AsmOperand(MI, 1, O);
7857
0
    break;
7858
0
  case 2:
7859
    // EE_LDQA_S16_128_IP_P, EE_LDQA_S8_128_IP_P, EE_LDQA_U16_128_IP_P, EE_LD...
7860
0
    printOffset_256_16_AsmOperand(MI, 1, O);
7861
0
    return;
7862
0
    break;
7863
0
  case 3:
7864
    // EE_LD_ACCX_IP_P, EE_ST_ACCX_IP_P
7865
0
    printOffset_256_8_AsmOperand(MI, 1, O);
7866
0
    return;
7867
0
    break;
7868
0
  case 4:
7869
    // EE_LD_QACC_H_H_32_IP_P, EE_LD_QACC_L_H_32_IP_P, EE_ST_QACC_H_H_32_IP_P...
7870
0
    printOffset_256_4_AsmOperand(MI, 1, O);
7871
0
    return;
7872
0
    break;
7873
8.64k
  case 5:
7874
    // L8I_P, RESTORE_BOOL, SPILL_BOOL, L16SI, L16UI, L32I, L32I_N, L8UI, LEA...
7875
8.64k
    printMemOperand(MI, 1, O);
7876
8.64k
    return;
7877
0
    break;
7878
1.90k
  case 6:
7879
    // LOOPBR, LOOPSTART, BEQZ, BF, BGEZ, BLTZ, BNEZ, BT
7880
1.90k
    printBranchTarget(MI, 1, O);
7881
1.90k
    return;
7882
0
    break;
7883
10.6k
  case 7:
7884
    // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DB_IC, AE_DB_IP, AE_DIV64D32_H, AE_DIV6...
7885
10.6k
    printOperand(MI, 2, O);
7886
10.6k
    break;
7887
0
  case 8:
7888
    // AE_DBI, AE_DBI_IC, AE_DBI_IP
7889
0
    printImm1_16_AsmOperand(MI, 2, O);
7890
0
    return;
7891
0
    break;
7892
3.65k
  case 9:
7893
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
7894
3.65k
    printOperand(MI, 3, O);
7895
3.65k
    SStream_concat0(O, ", ");
7896
3.65k
    break;
7897
0
  case 10:
7898
    // AE_LBI, AE_LBSI
7899
0
    printImm1_16_AsmOperand(MI, 1, O);
7900
0
    return;
7901
0
    break;
7902
0
  case 11:
7903
    // AE_MOVI
7904
0
    printImmOperand_minus16_47_1(MI, 1, O);
7905
0
    return;
7906
0
    break;
7907
250
  case 12:
7908
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
7909
250
    printOperand(MI, 4, O);
7910
250
    break;
7911
1.02k
  case 13:
7912
    // BBCI, BBSI
7913
1.02k
    printUimm5_AsmOperand(MI, 1, O);
7914
1.02k
    SStream_concat0(O, ", ");
7915
1.02k
    printBranchTarget(MI, 2, O);
7916
1.02k
    return;
7917
0
    break;
7918
1.17k
  case 14:
7919
    // BEQI, BGEI, BLTI, BNEI
7920
1.17k
    printB4const_AsmOperand(MI, 1, O);
7921
1.17k
    SStream_concat0(O, ", ");
7922
1.17k
    printBranchTarget(MI, 2, O);
7923
1.17k
    return;
7924
0
    break;
7925
486
  case 15:
7926
    // BGEUI, BLTUI
7927
486
    printB4constu_AsmOperand(MI, 1, O);
7928
486
    SStream_concat0(O, ", ");
7929
486
    printBranchTarget(MI, 2, O);
7930
486
    return;
7931
0
    break;
7932
984
  case 16:
7933
    // BREAK, CONST_S, RSIL
7934
984
    printUimm4_AsmOperand(MI, 1, O);
7935
984
    return;
7936
0
    break;
7937
385
  case 17:
7938
    // EE_LDQA_S16_128_IP, EE_LDQA_S8_128_IP, EE_LDQA_U16_128_IP, EE_LDQA_U8_...
7939
385
    printOffset_256_16_AsmOperand(MI, 2, O);
7940
385
    return;
7941
0
    break;
7942
307
  case 18:
7943
    // EE_LD_ACCX_IP, EE_ST_ACCX_IP
7944
307
    printOffset_256_8_AsmOperand(MI, 2, O);
7945
307
    return;
7946
0
    break;
7947
147
  case 19:
7948
    // EE_LD_QACC_H_H_32_IP, EE_LD_QACC_L_H_32_IP, EE_ST_QACC_H_H_32_IP, EE_S...
7949
147
    printOffset_256_4_AsmOperand(MI, 2, O);
7950
147
    return;
7951
0
    break;
7952
878
  case 20:
7953
    // EE_MOVI_32_A, WSR, WUR
7954
878
    printOperand(MI, 0, O);
7955
878
    break;
7956
37
  case 21:
7957
    // EE_SLCI_2Q, EE_SRCI_2Q
7958
37
    printSelect_16_AsmOperand(MI, 4, O);
7959
37
    return;
7960
0
    break;
7961
430
  case 22:
7962
    // ENTRY
7963
430
    printEntry_Imm12_AsmOperand(MI, 1, O);
7964
430
    return;
7965
0
    break;
7966
4.93k
  case 23:
7967
    // L32R
7968
4.93k
    printL32RTarget(MI, 1, O);
7969
4.93k
    return;
7970
0
    break;
7971
117
  case 24:
7972
    // LOOP, LOOPGTZ, LOOPNEZ
7973
117
    printLoopTarget(MI, 1, O);
7974
117
    return;
7975
0
    break;
7976
267
  case 25:
7977
    // MOVI
7978
267
    printImm12m_AsmOperand(MI, 1, O);
7979
267
    return;
7980
0
    break;
7981
1.17k
  case 26:
7982
    // MOVI_N
7983
1.17k
    printImm32n_95_AsmOperand(MI, 1, O);
7984
1.17k
    return;
7985
0
    break;
7986
429
  case 27:
7987
    // S32C1I
7988
429
    printMemOperand(MI, 2, O);
7989
429
    return;
7990
0
    break;
7991
0
  case 28:
7992
    // _MOVI
7993
0
    printImm12_AsmOperand(MI, 1, O);
7994
0
    return;
7995
0
    break;
7996
63.3k
  }
7997
7998
7999
  // Fragment 3 encoded into 3 bits for 6 unique commands.
8000
40.8k
  switch ((Bits >> 26) & 7) {
8001
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8002
31.0k
  case 0:
8003
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
8004
31.0k
    SStream_concat0(O, ", ");
8005
31.0k
    break;
8006
6.15k
  case 1:
8007
    // BR_JT, EE_BITREV_P, EE_LDQA_S16_128_XP_P, EE_LDQA_S8_128_XP_P, EE_LDQA...
8008
6.15k
    return;
8009
0
    break;
8010
1.37k
  case 2:
8011
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
8012
1.37k
    printOperand(MI, 4, O);
8013
1.37k
    break;
8014
145
  case 3:
8015
    // EE_CMUL_S16_LD_INCP, EE_VADDS_S16_LD_INCP, EE_VADDS_S32_LD_INCP, EE_VA...
8016
145
    printOperand(MI, 2, O);
8017
145
    SStream_concat0(O, ", ");
8018
145
    printOperand(MI, 4, O);
8019
145
    SStream_concat0(O, ", ");
8020
145
    printOperand(MI, 5, O);
8021
145
    break;
8022
267
  case 4:
8023
    // EE_SRC_Q_LD_IP
8024
267
    printOffset_256_16_AsmOperand(MI, 4, O);
8025
267
    SStream_concat0(O, ", ");
8026
267
    printOperand(MI, 5, O);
8027
267
    SStream_concat0(O, ", ");
8028
267
    printOperand(MI, 6, O);
8029
267
    return;
8030
0
    break;
8031
1.86k
  case 5:
8032
    // EE_VMULAS_S16_ACCX_LD_IP_QUP, EE_VMULAS_S16_QACC_LD_IP_QUP, EE_VMULAS_...
8033
1.86k
    printOffset_64_16_AsmOperand(MI, 4, O);
8034
1.86k
    SStream_concat0(O, ", ");
8035
1.86k
    printOperand(MI, 5, O);
8036
1.86k
    SStream_concat0(O, ", ");
8037
1.86k
    printOperand(MI, 6, O);
8038
1.86k
    SStream_concat0(O, ", ");
8039
1.86k
    printOperand(MI, 7, O);
8040
1.86k
    SStream_concat0(O, ", ");
8041
1.86k
    printOperand(MI, 8, O);
8042
1.86k
    return;
8043
0
    break;
8044
40.8k
  }
8045
8046
8047
  // Fragment 4 encoded into 6 bits for 45 unique commands.
8048
32.5k
  switch ((Bits >> 29) & 63) {
8049
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8050
7.77k
  case 0:
8051
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI...
8052
7.77k
    printOperand(MI, 2, O);
8053
7.77k
    break;
8054
390
  case 1:
8055
    // EE_ANDQ_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_S16_ST_INCP_P...
8056
390
    printImm8_AsmOperand(MI, 2, O);
8057
390
    break;
8058
301
  case 2:
8059
    // EE_FFT_VST_R32_DECP_P, EE_SRCMB_S16_QACC_P, EE_SRCMB_S8_QACC_P, EE_SRS...
8060
301
    printSelect_2_AsmOperand(MI, 2, O);
8061
301
    return;
8062
0
    break;
8063
0
  case 3:
8064
    // EE_LD_128_USAR_IP_P, EE_SRC_Q_LD_IP_P, EE_VLD_128_IP_P, EE_VST_128_IP_...
8065
0
    printOffset_256_16_AsmOperand(MI, 2, O);
8066
0
    break;
8067
119
  case 4:
8068
    // EE_MOVI_32_A_P, EE_MOVI_32_Q_P, EE_MOVI_32_A, EE_MOVI_32_Q
8069
119
    printSelect_4_AsmOperand(MI, 2, O);
8070
119
    return;
8071
0
    break;
8072
74
  case 5:
8073
    // EE_SLCI_2Q_P, EE_SRCI_2Q_P, EE_VSMULAS_S8_QACC_P, EE_VSMULAS_S8_QACC
8074
74
    printSelect_16_AsmOperand(MI, 2, O);
8075
74
    return;
8076
0
    break;
8077
0
  case 6:
8078
    // EE_VLDBC_16_IP_P
8079
0
    printOffset_128_2_AsmOperand(MI, 2, O);
8080
0
    return;
8081
0
    break;
8082
0
  case 7:
8083
    // EE_VLDBC_32_IP_P
8084
0
    printOffset_256_4_AsmOperand(MI, 2, O);
8085
0
    return;
8086
0
    break;
8087
0
  case 8:
8088
    // EE_VLDBC_8_IP_P
8089
0
    printOffset_128_1_AsmOperand(MI, 2, O);
8090
0
    return;
8091
0
    break;
8092
0
  case 9:
8093
    // EE_VLD_H_64_IP_P, EE_VLD_L_64_IP_P, EE_VST_H_64_IP_P, EE_VST_L_64_IP_P
8094
0
    printOffset_256_8_AsmOperand(MI, 2, O);
8095
0
    return;
8096
0
    break;
8097
0
  case 10:
8098
    // EE_VMULAS_S16_ACCX_LD_IP_P, EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_...
8099
0
    printOffset_64_16_AsmOperand(MI, 2, O);
8100
0
    SStream_concat0(O, ", ");
8101
0
    printImm8_AsmOperand(MI, 3, O);
8102
0
    SStream_concat0(O, ", ");
8103
0
    printImm8_AsmOperand(MI, 4, O);
8104
0
    break;
8105
399
  case 11:
8106
    // EE_VSMULAS_S16_QACC_P, EE_VSMULAS_S16_QACC
8107
399
    printSelect_8_AsmOperand(MI, 2, O);
8108
399
    return;
8109
0
    break;
8110
5.44k
  case 12:
8111
    // ADDI_N
8112
5.44k
    printImm1n_15_AsmOperand(MI, 2, O);
8113
5.44k
    return;
8114
0
    break;
8115
220
  case 13:
8116
    // ADDMI
8117
220
    printImm8_sh8_AsmOperand(MI, 2, O);
8118
220
    return;
8119
0
    break;
8120
0
  case 14:
8121
    // AE_L16M_I, AE_L16_I, AE_S16M_L_I, AE_S16_0_I
8122
0
    printImmOperand_minus16_14_2(MI, 2, O);
8123
0
    return;
8124
0
    break;
8125
0
  case 15:
8126
    // AE_L16M_IU, AE_L16_IP, AE_S16M_L_IU, AE_S16_0_IP
8127
0
    printImmOperand_minus16_14_2(MI, 3, O);
8128
0
    return;
8129
0
    break;
8130
6.16k
  case 16:
8131
    // AE_L16M_XC, AE_L16M_XU, AE_L16X2M_XC, AE_L16X2M_XU, AE_L16X4_XC, AE_L1...
8132
6.16k
    printOperand(MI, 3, O);
8133
6.16k
    break;
8134
10
  case 17:
8135
    // AE_L16X2M_I, AE_L32F24_I, AE_L32M_I, AE_L32_I, AE_S16X2M_I, AE_S24RA64...
8136
10
    printImmOperand_minus32_28_4(MI, 2, O);
8137
10
    return;
8138
0
    break;
8139
50
  case 18:
8140
    // AE_L16X2M_IU, AE_L32F24_IP, AE_L32M_IU, AE_L32_IP, AE_S16X2M_IU, AE_S2...
8141
50
    printImmOperand_minus32_28_4(MI, 3, O);
8142
50
    return;
8143
0
    break;
8144
13
  case 19:
8145
    // AE_L16X4_I, AE_L32X2F24_I, AE_L32X2_I, AE_L64_I, AE_LALIGN64_I, AE_S16...
8146
13
    printImmOperand_minus64_56_8(MI, 2, O);
8147
13
    return;
8148
0
    break;
8149
0
  case 20:
8150
    // AE_L16X4_IP, AE_L32X2F24_IP, AE_L32X2_IP, AE_S16X4_IP, AE_S32X2F24_IP,...
8151
0
    printImmOperand_0_56_8(MI, 3, O);
8152
0
    return;
8153
0
    break;
8154
0
  case 21:
8155
    // AE_L64_IP, AE_S64_IP
8156
0
    printImmOperand_minus64_56_8(MI, 3, O);
8157
0
    return;
8158
0
    break;
8159
79
  case 22:
8160
    // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC...
8161
79
    return;
8162
0
    break;
8163
0
  case 23:
8164
    // AE_LBKI
8165
0
    printImm1_16_AsmOperand(MI, 2, O);
8166
0
    return;
8167
0
    break;
8168
0
  case 24:
8169
    // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,...
8170
0
    printOperand(MI, 5, O);
8171
0
    break;
8172
0
  case 25:
8173
    // AE_PKSR24, AE_PKSR32
8174
0
    printImmOperand_0_3_1(MI, 3, O);
8175
0
    return;
8176
0
    break;
8177
0
  case 26:
8178
    // AE_SBI, AE_SBI_IC, AE_SBI_IP
8179
0
    printImm1_16_AsmOperand(MI, 3, O);
8180
0
    return;
8181
0
    break;
8182
290
  case 27:
8183
    // AE_SEXT32, CLAMPS, SEXT
8184
290
    printImm7_22_AsmOperand(MI, 2, O);
8185
290
    return;
8186
0
    break;
8187
588
  case 28:
8188
    // AE_SLAI16S, AE_SRAI16, AE_SRAI16R, CEIL_S, FLOAT_S, FLOOR_S, ROUND_S, ...
8189
588
    printUimm4_AsmOperand(MI, 2, O);
8190
588
    return;
8191
0
    break;
8192
1.68k
  case 29:
8193
    // AE_SLAI24, AE_SLAI24S, AE_SLAI32, AE_SLAI32S, AE_SRAI24, AE_SRAI32, AE...
8194
1.68k
    printUimm5_AsmOperand(MI, 2, O);
8195
1.68k
    break;
8196
0
  case 30:
8197
    // AE_SLAI64, AE_SLAI64S, AE_SLAISQ56S, AE_SRAI64, AE_SRLI64
8198
0
    printImmOperand_0_63_1(MI, 2, O);
8199
0
    return;
8200
0
    break;
8201
1.62k
  case 31:
8202
    // BALL, BANY, BBC, BBS, BEQ, BGE, BGEU, BLT, BLTU, BNALL, BNE, BNONE
8203
1.62k
    printBranchTarget(MI, 2, O);
8204
1.62k
    return;
8205
0
    break;
8206
1.44k
  case 32:
8207
    // EE_CMUL_S16_LD_INCP, EE_FFT_CMUL_S16_LD_XP, EE_SRC_Q_LD_XP, EE_VMULAS_...
8208
1.44k
    SStream_concat0(O, ", ");
8209
1.44k
    break;
8210
318
  case 33:
8211
    // EE_CMUL_S16_ST_INCP, EE_VADDS_S16_ST_INCP, EE_VADDS_S32_ST_INCP, EE_VA...
8212
318
    printOperand(MI, 4, O);
8213
318
    SStream_concat0(O, ", ");
8214
318
    printOperand(MI, 5, O);
8215
318
    break;
8216
74
  case 34:
8217
    // EE_FFT_VST_R32_DECP
8218
74
    printSelect_2_AsmOperand(MI, 3, O);
8219
74
    return;
8220
0
    break;
8221
473
  case 35:
8222
    // EE_LD_128_USAR_IP, EE_VLD_128_IP, EE_VST_128_IP
8223
473
    printOffset_256_16_AsmOperand(MI, 3, O);
8224
473
    return;
8225
0
    break;
8226
888
  case 36:
8227
    // EE_VLDBC_16_IP
8228
888
    printOffset_128_2_AsmOperand(MI, 3, O);
8229
888
    return;
8230
0
    break;
8231
210
  case 37:
8232
    // EE_VLDBC_32_IP
8233
210
    printOffset_256_4_AsmOperand(MI, 3, O);
8234
210
    return;
8235
0
    break;
8236
88
  case 38:
8237
    // EE_VLDBC_8_IP
8238
88
    printOffset_128_1_AsmOperand(MI, 3, O);
8239
88
    return;
8240
0
    break;
8241
1.24k
  case 39:
8242
    // EE_VLD_H_64_IP, EE_VLD_L_64_IP, EE_VST_H_64_IP, EE_VST_L_64_IP
8243
1.24k
    printOffset_256_8_AsmOperand(MI, 3, O);
8244
1.24k
    return;
8245
0
    break;
8246
280
  case 40:
8247
    // EE_VMULAS_S16_ACCX_LD_IP, EE_VMULAS_S16_QACC_LD_IP, EE_VMULAS_S8_ACCX_...
8248
280
    printOffset_64_16_AsmOperand(MI, 3, O);
8249
280
    SStream_concat0(O, ", ");
8250
280
    printOperand(MI, 4, O);
8251
280
    SStream_concat0(O, ", ");
8252
280
    printOperand(MI, 5, O);
8253
280
    return;
8254
0
    break;
8255
221
  case 41:
8256
    // L32E, S32E
8257
221
    printImm64n_4n_AsmOperand(MI, 2, O);
8258
221
    return;
8259
0
    break;
8260
1.56k
  case 42:
8261
    // LSIP, SSIP
8262
1.56k
    printOffset8m32_AsmOperand(MI, 3, O);
8263
1.56k
    return;
8264
0
    break;
8265
564
  case 43:
8266
    // SLLI
8267
564
    printShimm0_31_AsmOperand(MI, 2, O);
8268
564
    return;
8269
0
    break;
8270
0
  case 44:
8271
    // _SLLI
8272
0
    printShimm1_31_AsmOperand(MI, 2, O);
8273
0
    return;
8274
0
    break;
8275
32.5k
  }
8276
8277
8278
  // Fragment 5 encoded into 3 bits for 5 unique commands.
8279
17.7k
  switch ((Bits >> 35) & 7) {
8280
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8281
7.17k
  case 0:
8282
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, BRCC_...
8283
7.17k
    SStream_concat0(O, ", ");
8284
7.17k
    break;
8285
9.15k
  case 1:
8286
    // ATOMIC_LOAD_ADD_16_P, ATOMIC_LOAD_ADD_32_P, ATOMIC_LOAD_ADD_8_P, ATOMI...
8287
9.15k
    return;
8288
0
    break;
8289
76
  case 2:
8290
    // EE_CMUL_S16_LD_INCP
8291
76
    printSelect_4_AsmOperand(MI, 6, O);
8292
76
    return;
8293
0
    break;
8294
244
  case 3:
8295
    // EE_FFT_CMUL_S16_LD_XP
8296
244
    printOperand(MI, 2, O);
8297
244
    SStream_concat0(O, ", ");
8298
244
    printOperand(MI, 5, O);
8299
244
    SStream_concat0(O, ", ");
8300
244
    printOperand(MI, 6, O);
8301
244
    SStream_concat0(O, ", ");
8302
244
    printSelect_8_AsmOperand(MI, 7, O);
8303
244
    return;
8304
0
    break;
8305
1.12k
  case 4:
8306
    // EE_SRC_Q_LD_XP, EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_...
8307
1.12k
    printOperand(MI, 5, O);
8308
1.12k
    SStream_concat0(O, ", ");
8309
1.12k
    printOperand(MI, 6, O);
8310
1.12k
    break;
8311
17.7k
  }
8312
8313
8314
  // Fragment 6 encoded into 4 bits for 15 unique commands.
8315
8.30k
  switch ((Bits >> 38) & 15) {
8316
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8317
1.48k
  case 0:
8318
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_FF...
8319
1.48k
    printOperand(MI, 3, O);
8320
1.48k
    break;
8321
0
  case 1:
8322
    // BRCC_FP
8323
0
    printBranchTarget(MI, 3, O);
8324
0
    return;
8325
0
    break;
8326
0
  case 2:
8327
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8328
0
    printImm8_AsmOperand(MI, 3, O);
8329
0
    break;
8330
451
  case 3:
8331
    // EE_CMUL_S16_P, EE_LDXQ_32_P, EE_STXQ_32_P, EE_CMUL_S16, EE_LDXQ_32, EE...
8332
451
    printSelect_4_AsmOperand(MI, 3, O);
8333
451
    break;
8334
0
  case 4:
8335
    // EE_LDF_64_IP_P, EE_STF_64_IP_P
8336
0
    printOffset_256_8_AsmOperand(MI, 3, O);
8337
0
    return;
8338
0
    break;
8339
0
  case 5:
8340
    // EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_S16_QACC_LD_IP_QUP_P, EE_VMU...
8341
0
    printImm8_AsmOperand(MI, 5, O);
8342
0
    SStream_concat0(O, ", ");
8343
0
    printImm8_AsmOperand(MI, 6, O);
8344
0
    return;
8345
0
    break;
8346
0
  case 6:
8347
    // AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L, AE_MULAFD32X16X2_FIR_HH, AE_...
8348
0
    printOperand(MI, 6, O);
8349
0
    return;
8350
0
    break;
8351
0
  case 7:
8352
    // AE_SEL16I, AE_TRUNCI32F64S_L, AE_TRUNCI32X2F64S
8353
0
    printUimm4_AsmOperand(MI, 3, O);
8354
0
    return;
8355
0
    break;
8356
0
  case 8:
8357
    // AE_SEL16I_N
8358
0
    printImmOperand_0_3_1(MI, 3, O);
8359
0
    return;
8360
0
    break;
8361
146
  case 9:
8362
    // EE_CMUL_S16_ST_INCP
8363
146
    printSelect_4_AsmOperand(MI, 6, O);
8364
146
    return;
8365
0
    break;
8366
3.52k
  case 10:
8367
    // EE_FFT_CMUL_S16_ST_XP, EE_FFT_R2BF_S16_ST_INCP, EE_LDF_64_XP, EE_STF_1...
8368
3.52k
    printOperand(MI, 4, O);
8369
3.52k
    break;
8370
434
  case 11:
8371
    // EE_LDF_64_IP, EE_STF_64_IP
8372
434
    printOffset_256_8_AsmOperand(MI, 4, O);
8373
434
    return;
8374
0
    break;
8375
71
  case 12:
8376
    // EE_SRC_Q_LD_XP
8377
71
    return;
8378
0
    break;
8379
1.05k
  case 13:
8380
    // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_INCP_QUP, EE_VMU...
8381
1.05k
    SStream_concat0(O, ", ");
8382
1.05k
    printOperand(MI, 7, O);
8383
1.05k
    break;
8384
1.13k
  case 14:
8385
    // EXTUI
8386
1.13k
    printImm1_16_AsmOperand(MI, 3, O);
8387
1.13k
    return;
8388
0
    break;
8389
8.30k
  }
8390
8391
8392
  // Fragment 7 encoded into 1 bits for 2 unique commands.
8393
6.51k
  if ((Bits >> 42) & 1) {
8394
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8395
4.05k
    SStream_concat0(O, ", ");
8396
4.05k
  } else {
8397
    // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_CM...
8398
2.46k
    return;
8399
2.46k
  }
8400
8401
8402
  // Fragment 8 encoded into 4 bits for 11 unique commands.
8403
4.05k
  switch ((Bits >> 43) & 15) {
8404
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8405
0
  case 0:
8406
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8407
0
    printImm8_AsmOperand(MI, 4, O);
8408
0
    break;
8409
0
  case 1:
8410
    // EE_FFT_CMUL_S16_ST_XP_P, EE_LDF_128_IP_P, EE_LDF_128_XP_P, EE_STF_128_...
8411
0
    printOperand(MI, 4, O);
8412
0
    break;
8413
517
  case 2:
8414
    // EE_FFT_R2BF_S16_P, EE_FFT_R2BF_S16
8415
517
    printSelect_2_AsmOperand(MI, 4, O);
8416
517
    return;
8417
0
    break;
8418
0
  case 3:
8419
    // EE_FFT_R2BF_S16_ST_INCP_P
8420
0
    printSelect_4_AsmOperand(MI, 4, O);
8421
0
    return;
8422
0
    break;
8423
168
  case 4:
8424
    // EE_LDXQ_32_P, EE_STXQ_32_P, EE_VSMULAS_S16_QACC_LD_INCP_P, EE_LDXQ_32,...
8425
168
    printSelect_8_AsmOperand(MI, 4, O);
8426
168
    return;
8427
0
    break;
8428
0
  case 5:
8429
    // EE_VSMULAS_S8_QACC_LD_INCP_P
8430
0
    printSelect_16_AsmOperand(MI, 4, O);
8431
0
    return;
8432
0
    break;
8433
2.15k
  case 6:
8434
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8435
2.15k
    printOperand(MI, 5, O);
8436
2.15k
    break;
8437
73
  case 7:
8438
    // EE_FFT_R2BF_S16_ST_INCP
8439
73
    printSelect_4_AsmOperand(MI, 5, O);
8440
73
    return;
8441
0
    break;
8442
882
  case 8:
8443
    // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LD_XP_QUP, EE_VMULAS_...
8444
882
    printOperand(MI, 8, O);
8445
882
    return;
8446
0
    break;
8447
70
  case 9:
8448
    // EE_VSMULAS_S16_QACC_LD_INCP
8449
70
    printSelect_8_AsmOperand(MI, 5, O);
8450
70
    return;
8451
0
    break;
8452
195
  case 10:
8453
    // EE_VSMULAS_S8_QACC_LD_INCP
8454
195
    printSelect_16_AsmOperand(MI, 5, O);
8455
195
    return;
8456
0
    break;
8457
4.05k
  }
8458
8459
8460
  // Fragment 9 encoded into 1 bits for 2 unique commands.
8461
2.15k
  if ((Bits >> 47) & 1) {
8462
    // EE_SRC_Q_LD_IP_P, EE_SRC_Q_LD_XP_P, EE_VADDS_S16_LD_INCP_P, EE_VADDS_S...
8463
207
    return;
8464
1.94k
  } else {
8465
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P...
8466
1.94k
    SStream_concat0(O, ", ");
8467
1.94k
  }
8468
8469
8470
  // Fragment 10 encoded into 3 bits for 8 unique commands.
8471
1.94k
  switch ((Bits >> 48) & 7) {
8472
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8473
0
  case 0:
8474
    // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P
8475
0
    printSelect_4_AsmOperand(MI, 5, O);
8476
0
    return;
8477
0
    break;
8478
0
  case 1:
8479
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8480
0
    printImm8_AsmOperand(MI, 5, O);
8481
0
    break;
8482
0
  case 2:
8483
    // EE_FFT_CMUL_S16_ST_XP_P
8484
0
    printSelect_8_AsmOperand(MI, 5, O);
8485
0
    SStream_concat0(O, ", ");
8486
0
    printSelect_4_AsmOperand(MI, 6, O);
8487
0
    SStream_concat0(O, ", ");
8488
0
    printSelect_4_AsmOperand(MI, 7, O);
8489
0
    return;
8490
0
    break;
8491
0
  case 3:
8492
    // EE_LDF_128_IP_P, EE_STF_128_IP_P
8493
0
    printOffset_16_16_AsmOperand(MI, 5, O);
8494
0
    return;
8495
0
    break;
8496
0
  case 4:
8497
    // EE_LDF_128_XP_P, EE_STF_128_XP_P, SELECT, SELECT_CC_FP_FP, SELECT_CC_F...
8498
0
    printOperand(MI, 5, O);
8499
0
    return;
8500
0
    break;
8501
802
  case 5:
8502
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8503
802
    printOperand(MI, 6, O);
8504
802
    break;
8505
549
  case 6:
8506
    // EE_FFT_CMUL_S16_ST_XP
8507
549
    printSelect_8_AsmOperand(MI, 6, O);
8508
549
    SStream_concat0(O, ", ");
8509
549
    printSelect_4_AsmOperand(MI, 7, O);
8510
549
    SStream_concat0(O, ", ");
8511
549
    printSelect_4_AsmOperand(MI, 8, O);
8512
549
    return;
8513
0
    break;
8514
595
  case 7:
8515
    // EE_LDF_128_IP, EE_STF_128_IP
8516
595
    printOffset_16_16_AsmOperand(MI, 6, O);
8517
595
    return;
8518
0
    break;
8519
1.94k
  }
8520
8521
8522
  // Fragment 11 encoded into 1 bits for 2 unique commands.
8523
802
  if ((Bits >> 51) & 1) {
8524
    // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P, EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P,...
8525
572
    return;
8526
572
  } else {
8527
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8528
230
    SStream_concat0(O, ", ");
8529
230
  }
8530
8531
8532
  // Fragment 12 encoded into 2 bits for 3 unique commands.
8533
230
  switch ((Bits >> 52) & 3) {
8534
0
  default: CS_ASSERT_RET(0 && "Invalid command number.");
8535
0
  case 0:
8536
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8537
0
    printImm8_AsmOperand(MI, 6, O);
8538
0
    break;
8539
0
  case 1:
8540
    // EE_FFT_CMUL_S16_LD_XP_P
8541
0
    printSelect_8_AsmOperand(MI, 6, O);
8542
0
    return;
8543
0
    break;
8544
230
  case 2:
8545
    // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD...
8546
230
    printOperand(MI, 7, O);
8547
230
    SStream_concat0(O, ", ");
8548
230
    printSelect_2_AsmOperand(MI, 8, O);
8549
230
    return;
8550
0
    break;
8551
230
  }
8552
8553
8554
  // Fragment 13 encoded into 1 bits for 2 unique commands.
8555
0
  if ((Bits >> 54) & 1) {
8556
    // EE_VMULAS_S16_ACCX_LD_XP_QUP_P, EE_VMULAS_S16_QACC_LD_XP_QUP_P, EE_VMU...
8557
0
    return;
8558
0
  } else {
8559
    // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1...
8560
0
    SStream_concat0(O, ", ");
8561
0
    printSelect_2_AsmOperand(MI, 7, O);
8562
0
    return;
8563
0
  }
8564
8565
0
}
8566
8567
8568
/// getRegisterName - This method is automatically generated by tblgen
8569
/// from the register set description.  This returns the assembler name
8570
/// for the specified register.
8571
170k
static const char *getRegisterName(unsigned RegNo) {
8572
170k
#ifndef CAPSTONE_DIET
8573
170k
  CS_ASSERT_RET_VAL(RegNo && RegNo < 170 && "Invalid register number!", NULL);
8574
8575
170k
  static const char AsmStrs[] = {
8576
170k
  /* 0 */ "a10\0"
8577
170k
  /* 4 */ "b10\0"
8578
170k
  /* 8 */ "aed10\0"
8579
170k
  /* 14 */ "f10\0"
8580
170k
  /* 18 */ "dbreaka0\0"
8581
170k
  /* 27 */ "ibreaka0\0"
8582
170k
  /* 36 */ "b0\0"
8583
170k
  /* 39 */ "dbreakc0\0"
8584
170k
  /* 48 */ "misc0\0"
8585
170k
  /* 54 */ "aed0\0"
8586
170k
  /* 59 */ "configid0\0"
8587
170k
  /* 69 */ "ccompare0\0"
8588
170k
  /* 79 */ "f0\0"
8589
170k
  /* 82 */ "m0\0"
8590
170k
  /* 85 */ "q0\0"
8591
170k
  /* 88 */ "u0\0"
8592
170k
  /* 91 */ "B8_B9_B10_B11\0"
8593
170k
  /* 105 */ "a11\0"
8594
170k
  /* 109 */ "b11\0"
8595
170k
  /* 113 */ "aed11\0"
8596
170k
  /* 119 */ "f11\0"
8597
170k
  /* 123 */ "B0_B1\0"
8598
170k
  /* 129 */ "dbreaka1\0"
8599
170k
  /* 138 */ "ibreaka1\0"
8600
170k
  /* 147 */ "b1\0"
8601
170k
  /* 150 */ "dbreakc1\0"
8602
170k
  /* 159 */ "epc1\0"
8603
170k
  /* 164 */ "misc1\0"
8604
170k
  /* 170 */ "aed1\0"
8605
170k
  /* 175 */ "configid1\0"
8606
170k
  /* 185 */ "ccompare1\0"
8607
170k
  /* 195 */ "scompare1\0"
8608
170k
  /* 205 */ "excsave1\0"
8609
170k
  /* 214 */ "f1\0"
8610
170k
  /* 217 */ "m1\0"
8611
170k
  /* 220 */ "q1\0"
8612
170k
  /* 223 */ "u1\0"
8613
170k
  /* 226 */ "a12\0"
8614
170k
  /* 230 */ "b12\0"
8615
170k
  /* 234 */ "aed12\0"
8616
170k
  /* 240 */ "f12\0"
8617
170k
  /* 244 */ "a2\0"
8618
170k
  /* 247 */ "b2\0"
8619
170k
  /* 250 */ "epc2\0"
8620
170k
  /* 255 */ "misc2\0"
8621
170k
  /* 261 */ "aed2\0"
8622
170k
  /* 266 */ "ccompare2\0"
8623
170k
  /* 276 */ "excsave2\0"
8624
170k
  /* 285 */ "f2\0"
8625
170k
  /* 288 */ "m2\0"
8626
170k
  /* 291 */ "q2\0"
8627
170k
  /* 294 */ "eps2\0"
8628
170k
  /* 299 */ "u2\0"
8629
170k
  /* 302 */ "B12_B13\0"
8630
170k
  /* 310 */ "a13\0"
8631
170k
  /* 314 */ "b13\0"
8632
170k
  /* 318 */ "aed13\0"
8633
170k
  /* 324 */ "f13\0"
8634
170k
  /* 328 */ "B0_B1_B2_B3\0"
8635
170k
  /* 340 */ "a3\0"
8636
170k
  /* 343 */ "b3\0"
8637
170k
  /* 346 */ "epc3\0"
8638
170k
  /* 351 */ "misc3\0"
8639
170k
  /* 357 */ "aed3\0"
8640
170k
  /* 362 */ "excsave3\0"
8641
170k
  /* 371 */ "f3\0"
8642
170k
  /* 374 */ "m3\0"
8643
170k
  /* 377 */ "q3\0"
8644
170k
  /* 380 */ "eps3\0"
8645
170k
  /* 385 */ "u3\0"
8646
170k
  /* 388 */ "a14\0"
8647
170k
  /* 392 */ "b14\0"
8648
170k
  /* 396 */ "aed14\0"
8649
170k
  /* 402 */ "f14\0"
8650
170k
  /* 406 */ "a4\0"
8651
170k
  /* 409 */ "b4\0"
8652
170k
  /* 412 */ "epc4\0"
8653
170k
  /* 417 */ "aed4\0"
8654
170k
  /* 422 */ "excsave4\0"
8655
170k
  /* 431 */ "f4\0"
8656
170k
  /* 434 */ "q4\0"
8657
170k
  /* 437 */ "eps4\0"
8658
170k
  /* 442 */ "B12_B13_B14_B15\0"
8659
170k
  /* 458 */ "a15\0"
8660
170k
  /* 462 */ "b15\0"
8661
170k
  /* 466 */ "aed15\0"
8662
170k
  /* 472 */ "f15\0"
8663
170k
  /* 476 */ "B4_B5\0"
8664
170k
  /* 482 */ "a5\0"
8665
170k
  /* 485 */ "b5\0"
8666
170k
  /* 488 */ "epc5\0"
8667
170k
  /* 493 */ "aed5\0"
8668
170k
  /* 498 */ "excsave5\0"
8669
170k
  /* 507 */ "f5\0"
8670
170k
  /* 510 */ "q5\0"
8671
170k
  /* 513 */ "eps5\0"
8672
170k
  /* 518 */ "a6\0"
8673
170k
  /* 521 */ "b6\0"
8674
170k
  /* 524 */ "epc6\0"
8675
170k
  /* 529 */ "aed6\0"
8676
170k
  /* 534 */ "excsave6\0"
8677
170k
  /* 543 */ "f6\0"
8678
170k
  /* 546 */ "q6\0"
8679
170k
  /* 549 */ "eps6\0"
8680
170k
  /* 554 */ "B4_B5_B6_B7\0"
8681
170k
  /* 566 */ "a7\0"
8682
170k
  /* 569 */ "b7\0"
8683
170k
  /* 572 */ "epc7\0"
8684
170k
  /* 577 */ "aed7\0"
8685
170k
  /* 582 */ "excsave7\0"
8686
170k
  /* 591 */ "f7\0"
8687
170k
  /* 594 */ "q7\0"
8688
170k
  /* 597 */ "eps7\0"
8689
170k
  /* 602 */ "a8\0"
8690
170k
  /* 605 */ "b8\0"
8691
170k
  /* 608 */ "aed8\0"
8692
170k
  /* 613 */ "f8\0"
8693
170k
  /* 616 */ "B8_B9\0"
8694
170k
  /* 622 */ "a9\0"
8695
170k
  /* 625 */ "b9\0"
8696
170k
  /* 628 */ "aed9\0"
8697
170k
  /* 633 */ "f9\0"
8698
170k
  /* 636 */ "qacc\0"
8699
170k
  /* 641 */ "depc\0"
8700
170k
  /* 646 */ "prid\0"
8701
170k
  /* 651 */ "lend\0"
8702
170k
  /* 656 */ "ibreakenable\0"
8703
170k
  /* 669 */ "cpenable\0"
8704
170k
  /* 678 */ "intenable\0"
8705
170k
  /* 688 */ "vecbase\0"
8706
170k
  /* 696 */ "litbase\0"
8707
170k
  /* 704 */ "windowbase\0"
8708
170k
  /* 715 */ "exccause\0"
8709
170k
  /* 724 */ "debugcause\0"
8710
170k
  /* 735 */ "ua_state\0"
8711
170k
  /* 744 */ "expstate\0"
8712
170k
  /* 753 */ "sar_byte\0"
8713
170k
  /* 762 */ "lbeg\0"
8714
170k
  /* 767 */ "fft_bit_width\0"
8715
170k
  /* 781 */ "f64r_hi\0"
8716
170k
  /* 789 */ "acchi\0"
8717
170k
  /* 795 */ "icountlevel\0"
8718
170k
  /* 807 */ "memctl\0"
8719
170k
  /* 814 */ "atomctl\0"
8720
170k
  /* 822 */ "f64r_lo\0"
8721
170k
  /* 830 */ "acclo\0"
8722
170k
  /* 836 */ "intclear\0"
8723
170k
  /* 845 */ "sar\0"
8724
170k
  /* 849 */ "br\0"
8725
170k
  /* 852 */ "fcr\0"
8726
170k
  /* 856 */ "excvaddr\0"
8727
170k
  /* 865 */ "fsr\0"
8728
170k
  /* 869 */ "threadptr\0"
8729
170k
  /* 879 */ "f64s\0"
8730
170k
  /* 884 */ "ps\0"
8731
170k
  /* 887 */ "ccount\0"
8732
170k
  /* 894 */ "icount\0"
8733
170k
  /* 901 */ "lcount\0"
8734
170k
  /* 908 */ "interrupt\0"
8735
170k
  /* 918 */ "windowstart\0"
8736
170k
  /* 930 */ "gpio_out\0"
8737
170k
  /* 939 */ "accx\0"
8738
170k
};
8739
170k
  static const uint16_t RegAsmOffset[] = {
8740
170k
    789, 830, 939, 814, 849, 887, 669, 861, 724, 641, 715, 856, 744, 852, 
8741
170k
    767, 865, 930, 656, 894, 795, 836, 678, 908, 762, 901, 651, 696, 807, 
8742
170k
    646, 884, 636, 845, 753, 135, 869, 735, 688, 704, 918, 24, 244, 340, 
8743
170k
    406, 482, 518, 566, 602, 622, 0, 105, 226, 310, 388, 458, 54, 170, 
8744
170k
    261, 357, 417, 493, 529, 577, 608, 628, 8, 113, 234, 318, 396, 466, 
8745
170k
    36, 147, 247, 343, 409, 485, 521, 569, 605, 625, 4, 109, 230, 314, 
8746
170k
    392, 462, 69, 185, 266, 59, 175, 18, 129, 39, 150, 159, 250, 346, 
8747
170k
    412, 488, 524, 572, 294, 380, 437, 513, 549, 597, 205, 276, 362, 422, 
8748
170k
    498, 534, 582, 79, 214, 285, 371, 431, 507, 543, 591, 613, 633, 14, 
8749
170k
    119, 240, 324, 402, 472, 27, 138, 82, 217, 288, 374, 48, 164, 255, 
8750
170k
    351, 85, 220, 291, 377, 434, 510, 546, 594, 195, 88, 223, 299, 385, 
8751
170k
    781, 822, 879, 123, 334, 476, 560, 616, 97, 302, 450, 328, 554, 91, 
8752
170k
    442, 
8753
170k
  };
8754
8755
170k
  CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) &&
8756
170k
          "Invalid alt name index for register!", NULL);
8757
170k
  return AsmStrs+RegAsmOffset[RegNo-1];
8758
#else
8759
  return NULL;
8760
#endif // CAPSTONE_DIET
8761
170k
}
8762
#ifdef PRINT_ALIAS_INSTR
8763
#undef PRINT_ALIAS_INSTR
8764
8765
static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) {
8766
#ifndef CAPSTONE_DIET
8767
  static const PatternsForOpcode OpToPatterns[] = {
8768
    {Xtensa_ADD, 0, 1 },
8769
    {Xtensa_ADDI, 1, 1 },
8770
    {Xtensa_ADDI_N, 2, 1 },
8771
    {Xtensa_ADD_N, 3, 1 },
8772
    {Xtensa_BALL, 4, 1 },
8773
    {Xtensa_BANY, 5, 1 },
8774
    {Xtensa_BBC, 6, 1 },
8775
    {Xtensa_BBS, 7, 1 },
8776
    {Xtensa_BEQ, 8, 1 },
8777
    {Xtensa_BEQI, 9, 1 },
8778
    {Xtensa_BEQZ, 10, 1 },
8779
    {Xtensa_BF, 11, 1 },
8780
    {Xtensa_BGE, 12, 1 },
8781
    {Xtensa_BGEI, 13, 1 },
8782
    {Xtensa_BGEU, 14, 1 },
8783
    {Xtensa_BGEUI, 15, 1 },
8784
    {Xtensa_BGEZ, 16, 1 },
8785
    {Xtensa_BLT, 17, 1 },
8786
    {Xtensa_BLTI, 18, 1 },
8787
    {Xtensa_BLTU, 19, 1 },
8788
    {Xtensa_BLTUI, 20, 1 },
8789
    {Xtensa_BLTZ, 21, 1 },
8790
    {Xtensa_BNALL, 22, 1 },
8791
    {Xtensa_BNE, 23, 1 },
8792
    {Xtensa_BNEI, 24, 1 },
8793
    {Xtensa_BNEZ, 25, 1 },
8794
    {Xtensa_BNONE, 26, 1 },
8795
    {Xtensa_BREAK_N, 27, 1 },
8796
    {Xtensa_BT, 28, 1 },
8797
    {Xtensa_LOOP, 29, 1 },
8798
    {Xtensa_LOOPGTZ, 30, 1 },
8799
    {Xtensa_LOOPNEZ, 31, 1 },
8800
    {Xtensa_MOVI_N, 32, 1 },
8801
    {Xtensa_NOP, 33, 1 },
8802
    {Xtensa_OR, 34, 1 },
8803
    {Xtensa_RET, 35, 1 },
8804
    {Xtensa_RETW, 36, 1 },
8805
    {Xtensa_RETW_N, 37, 1 },
8806
    {Xtensa_RET_N, 38, 1 },
8807
  {0},  };
8808
8809
  static const AliasPattern Patterns[] = {
8810
    // Xtensa_ADD - 0
8811
    {0, 0, 3, 3 },
8812
    // Xtensa_ADDI - 1
8813
    {16, 3, 3, 2 },
8814
    // Xtensa_ADDI_N - 2
8815
    {35, 5, 3, 2 },
8816
    // Xtensa_ADD_N - 3
8817
    {56, 7, 3, 3 },
8818
    // Xtensa_BALL - 4
8819
    {74, 10, 3, 2 },
8820
    // Xtensa_BANY - 5
8821
    {93, 12, 3, 2 },
8822
    // Xtensa_BBC - 6
8823
    {112, 14, 3, 2 },
8824
    // Xtensa_BBS - 7
8825
    {130, 16, 3, 2 },
8826
    // Xtensa_BEQ - 8
8827
    {148, 18, 3, 2 },
8828
    // Xtensa_BEQI - 9
8829
    {166, 20, 3, 2 },
8830
    // Xtensa_BEQZ - 10
8831
    {187, 22, 2, 1 },
8832
    // Xtensa_BF - 11
8833
    {202, 23, 2, 1 },
8834
    // Xtensa_BGE - 12
8835
    {215, 24, 3, 2 },
8836
    // Xtensa_BGEI - 13
8837
    {233, 26, 3, 2 },
8838
    // Xtensa_BGEU - 14
8839
    {254, 28, 3, 2 },
8840
    // Xtensa_BGEUI - 15
8841
    {273, 30, 3, 2 },
8842
    // Xtensa_BGEZ - 16
8843
    {295, 32, 2, 1 },
8844
    // Xtensa_BLT - 17
8845
    {310, 33, 3, 2 },
8846
    // Xtensa_BLTI - 18
8847
    {328, 35, 3, 2 },
8848
    // Xtensa_BLTU - 19
8849
    {349, 37, 3, 2 },
8850
    // Xtensa_BLTUI - 20
8851
    {368, 39, 3, 2 },
8852
    // Xtensa_BLTZ - 21
8853
    {390, 41, 2, 1 },
8854
    // Xtensa_BNALL - 22
8855
    {405, 42, 3, 2 },
8856
    // Xtensa_BNE - 23
8857
    {425, 44, 3, 2 },
8858
    // Xtensa_BNEI - 24
8859
    {443, 46, 3, 2 },
8860
    // Xtensa_BNEZ - 25
8861
    {464, 48, 2, 1 },
8862
    // Xtensa_BNONE - 26
8863
    {479, 49, 3, 2 },
8864
    // Xtensa_BREAK_N - 27
8865
    {499, 51, 1, 0 },
8866
    // Xtensa_BT - 28
8867
    {513, 51, 2, 1 },
8868
    // Xtensa_LOOP - 29
8869
    {526, 52, 2, 1 },
8870
    // Xtensa_LOOPGTZ - 30
8871
    {541, 53, 2, 1 },
8872
    // Xtensa_LOOPNEZ - 31
8873
    {559, 54, 2, 1 },
8874
    // Xtensa_MOVI_N - 32
8875
    {577, 55, 2, 1 },
8876
    // Xtensa_NOP - 33
8877
    {594, 56, 0, 0 },
8878
    // Xtensa_OR - 34
8879
    {599, 56, 3, 3 },
8880
    // Xtensa_RET - 35
8881
    {611, 59, 0, 0 },
8882
    // Xtensa_RETW - 36
8883
    {616, 59, 0, 0 },
8884
    // Xtensa_RETW_N - 37
8885
    {622, 59, 0, 0 },
8886
    // Xtensa_RET_N - 38
8887
    {630, 59, 0, 0 },
8888
  {0},  };
8889
8890
  static const AliasPatternCond Conds[] = {
8891
    // (ADD AR:$r, AR:$s, AR:$t) - 0
8892
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8893
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8894
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8895
    // (ADDI AR:$r, AR:$s, imm8:$imm8) - 3
8896
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8897
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8898
    // (ADDI_N AR:$r, AR:$s, imm1n_15:$imm) - 5
8899
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8900
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8901
    // (ADD_N AR:$r, AR:$s, AR:$t) - 7
8902
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8903
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8904
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8905
    // (BALL AR:$s, AR:$t, brtarget:$target) - 10
8906
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8907
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8908
    // (BANY AR:$s, AR:$t, brtarget:$target) - 12
8909
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8910
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8911
    // (BBC AR:$s, AR:$t, brtarget:$target) - 14
8912
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8913
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8914
    // (BBS AR:$s, AR:$t, brtarget:$target) - 16
8915
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8916
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8917
    // (BEQ AR:$s, AR:$t, brtarget:$target) - 18
8918
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8919
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8920
    // (BEQI AR:$s, b4const:$imm, brtarget:$target) - 20
8921
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8922
    {AliasPatternCond_K_Ignore, 0},
8923
    // (BEQZ AR:$s, brtarget:$target) - 22
8924
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8925
    // (BF BR:$b, brtarget:$target) - 23
8926
    {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID},
8927
    // (BGE AR:$s, AR:$t, brtarget:$target) - 24
8928
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8929
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8930
    // (BGEI AR:$s, b4const:$imm, brtarget:$target) - 26
8931
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8932
    {AliasPatternCond_K_Ignore, 0},
8933
    // (BGEU AR:$s, AR:$t, brtarget:$target) - 28
8934
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8935
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8936
    // (BGEUI AR:$s, b4constu:$imm, brtarget:$target) - 30
8937
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8938
    {AliasPatternCond_K_Ignore, 0},
8939
    // (BGEZ AR:$s, brtarget:$target) - 32
8940
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8941
    // (BLT AR:$s, AR:$t, brtarget:$target) - 33
8942
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8943
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8944
    // (BLTI AR:$s, b4const:$imm, brtarget:$target) - 35
8945
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8946
    {AliasPatternCond_K_Ignore, 0},
8947
    // (BLTU AR:$s, AR:$t, brtarget:$target) - 37
8948
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8949
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8950
    // (BLTUI AR:$s, b4constu:$imm, brtarget:$target) - 39
8951
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8952
    {AliasPatternCond_K_Ignore, 0},
8953
    // (BLTZ AR:$s, brtarget:$target) - 41
8954
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8955
    // (BNALL AR:$s, AR:$t, brtarget:$target) - 42
8956
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8957
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8958
    // (BNE AR:$s, AR:$t, brtarget:$target) - 44
8959
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8960
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8961
    // (BNEI AR:$s, b4const:$imm, brtarget:$target) - 46
8962
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8963
    {AliasPatternCond_K_Ignore, 0},
8964
    // (BNEZ AR:$s, brtarget:$target) - 48
8965
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8966
    // (BNONE AR:$s, AR:$t, brtarget:$target) - 49
8967
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8968
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8969
    // (BREAK_N uimm4:$imm) - 51
8970
    // (BT BR:$b, brtarget:$target) - 51
8971
    {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID},
8972
    // (LOOP AR:$s, ltarget:$target) - 52
8973
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8974
    // (LOOPGTZ AR:$s, ltarget:$target) - 53
8975
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8976
    // (LOOPNEZ AR:$s, ltarget:$target) - 54
8977
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8978
    // (MOVI_N AR:$s, imm32n_95:$imm7) - 55
8979
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8980
    // (NOP) - 56
8981
    // (OR AR:$t, AR:$s, AR:$s) - 56
8982
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8983
    {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID},
8984
    {AliasPatternCond_K_TiedReg, 1},
8985
    // (RET) - 59
8986
    // (RETW) - 59
8987
    // (RETW_N) - 59
8988
    // (RET_N) - 59
8989
  {0},  };
8990
8991
  static const char AsmStrings[] =
8992
    /* 0 */ "_add $\x01, $\x02, $\x03\0"
8993
    /* 16 */ "_addi $\x01, $\x02, $\xFF\x03\x01\0"
8994
    /* 35 */ "_addi.n $\x01, $\x02, $\xFF\x03\x02\0"
8995
    /* 56 */ "_add.n  $\x01, $\x02, $\x03\0"
8996
    /* 74 */ "_ball $\x01, $\x02, $\xFF\x03\x03\0"
8997
    /* 93 */ "_bany $\x01, $\x02, $\xFF\x03\x03\0"
8998
    /* 112 */ "_bbc $\x01, $\x02, $\xFF\x03\x03\0"
8999
    /* 130 */ "_bbs $\x01, $\x02, $\xFF\x03\x03\0"
9000
    /* 148 */ "_beq $\x01, $\x02, $\xFF\x03\x03\0"
9001
    /* 166 */ "_beqi  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9002
    /* 187 */ "_beqz  $\x01, $\xFF\x02\x03\0"
9003
    /* 202 */ "_BF  $\x01, $\xFF\x02\x03\0"
9004
    /* 215 */ "_bge $\x01, $\x02, $\xFF\x03\x03\0"
9005
    /* 233 */ "_bgei  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9006
    /* 254 */ "_bgeu  $\x01, $\x02, $\xFF\x03\x03\0"
9007
    /* 273 */ "_bgeui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0"
9008
    /* 295 */ "_bgez  $\x01, $\xFF\x02\x03\0"
9009
    /* 310 */ "_blt $\x01, $\x02, $\xFF\x03\x03\0"
9010
    /* 328 */ "_blti  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9011
    /* 349 */ "_bltu  $\x01, $\x02, $\xFF\x03\x03\0"
9012
    /* 368 */ "_bltui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0"
9013
    /* 390 */ "_bltz  $\x01, $\xFF\x02\x03\0"
9014
    /* 405 */ "_bnall $\x01, $\x02, $\xFF\x03\x03\0"
9015
    /* 425 */ "_bne $\x01, $\x02, $\xFF\x03\x03\0"
9016
    /* 443 */ "_bnei  $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0"
9017
    /* 464 */ "_bnez  $\x01, $\xFF\x02\x03\0"
9018
    /* 479 */ "_bnone $\x01, $\x02, $\xFF\x03\x03\0"
9019
    /* 499 */ "_break.n $\xFF\x01\x07\0"
9020
    /* 513 */ "_BT  $\x01, $\xFF\x02\x03\0"
9021
    /* 526 */ "_loop  $\x01, $\xFF\x02\x08\0"
9022
    /* 541 */ "_loopgtz $\x01, $\xFF\x02\x08\0"
9023
    /* 559 */ "_loopnez $\x01, $\xFF\x02\x08\0"
9024
    /* 577 */ "_movi.n  $\x01, $\xFF\x02\x09\0"
9025
    /* 594 */ "_nop\0"
9026
    /* 599 */ "mov   $\x01, $\x02\0"
9027
    /* 611 */ "_ret\0"
9028
    /* 616 */ "_retw\0"
9029
    /* 622 */ "_retw.n\0"
9030
    /* 630 */ "_ret.n\0"
9031
  ;
9032
9033
#ifndef NDEBUG
9034
  //static struct SortCheck {
9035
  //  SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
9036
  //    assert(std::is_sorted(
9037
  //               OpToPatterns.begin(), OpToPatterns.end(),
9038
  //               [](const PatternsForOpcode &L, const //PatternsForOpcode &R) {
9039
  //                 return L.Opcode < R.Opcode;
9040
  //               }) &&
9041
  //           "tablegen failed to sort opcode patterns");
9042
  //  }
9043
  //} sortCheckVar(OpToPatterns);
9044
#endif
9045
9046
  AliasMatchingData M = {
9047
    OpToPatterns,
9048
    Patterns,
9049
    Conds,
9050
    AsmStrings,
9051
    NULL,
9052
  };
9053
  const char *AsmString = matchAliasPatterns(MI, &M);
9054
  if (!AsmString) return false;
9055
9056
  unsigned I = 0;
9057
  while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
9058
         AsmString[I] != '$' && AsmString[I] != '\0')
9059
    ++I;
9060
  SStream_concat1(OS, '\t');
9061
  char *substr = malloc(I+1);
9062
  memcpy(substr, AsmString, I);
9063
  substr[I] = '\0';
9064
  SStream_concat0(OS, substr);
9065
  free(substr);
9066
  if (AsmString[I] != '\0') {
9067
    if (AsmString[I] == ' ' || AsmString[I] == '\t') {
9068
      SStream_concat1(OS, '\t');
9069
      ++I;
9070
    }
9071
    do {
9072
      if (AsmString[I] == '$') {
9073
        ++I;
9074
        if (AsmString[I] == (char)0xff) {
9075
          ++I;
9076
          int OpIdx = AsmString[I++] - 1;
9077
          int PrintMethodIdx = AsmString[I++] - 1;
9078
          printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS);
9079
        } else
9080
          printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS);
9081
      } else {
9082
        SStream_concat1(OS, AsmString[I++]);
9083
      }
9084
    } while (AsmString[I] != '\0');
9085
  }
9086
9087
  return true;
9088
#else
9089
  return false;
9090
#endif // CAPSTONE_DIET
9091
}
9092
9093
static void printCustomAliasOperand(
9094
         MCInst *MI, uint64_t Address, unsigned OpIdx,
9095
         unsigned PrintMethodIdx,
9096
         SStream *OS) {
9097
#ifndef CAPSTONE_DIET
9098
  switch (PrintMethodIdx) {
9099
  default:
9100
    CS_ASSERT_RET(0 && "Unknown PrintMethod kind");
9101
    break;
9102
  case 0:
9103
    printImm8_AsmOperand(MI, OpIdx, OS);
9104
    break;
9105
  case 1:
9106
    printImm1n_15_AsmOperand(MI, OpIdx, OS);
9107
    break;
9108
  case 2:
9109
    printBranchTarget(MI, OpIdx, OS);
9110
    break;
9111
  case 3:
9112
    printUimm5_AsmOperand(MI, OpIdx, OS);
9113
    break;
9114
  case 4:
9115
    printB4const_AsmOperand(MI, OpIdx, OS);
9116
    break;
9117
  case 5:
9118
    printB4constu_AsmOperand(MI, OpIdx, OS);
9119
    break;
9120
  case 6:
9121
    printUimm4_AsmOperand(MI, OpIdx, OS);
9122
    break;
9123
  case 7:
9124
    printLoopTarget(MI, OpIdx, OS);
9125
    break;
9126
  case 8:
9127
    printImm32n_95_AsmOperand(MI, OpIdx, OS);
9128
    break;
9129
  }
9130
#endif // CAPSTONE_DIET
9131
}
9132
9133
#endif // PRINT_ALIAS_INSTR