Coverage Report

Created: 2026-01-09 06:55

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
24.1k
{
50
24.1k
  uint8_t Imm =
51
24.1k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
24.1k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
9.43k
  case 0:
56
9.43k
    SStream_concat0(O, "eq");
57
9.43k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
9.43k
    break;
59
1.90k
  case 1:
60
1.90k
    SStream_concat0(O, "lt");
61
1.90k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.90k
    break;
63
1.70k
  case 2:
64
1.70k
    SStream_concat0(O, "le");
65
1.70k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.70k
    break;
67
684
  case 3:
68
684
    SStream_concat0(O, "unord");
69
684
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
684
    break;
71
322
  case 4:
72
322
    SStream_concat0(O, "neq");
73
322
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
322
    break;
75
634
  case 5:
76
634
    SStream_concat0(O, "nlt");
77
634
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
634
    break;
79
167
  case 6:
80
167
    SStream_concat0(O, "nle");
81
167
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
167
    break;
83
297
  case 7:
84
297
    SStream_concat0(O, "ord");
85
297
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
297
    break;
87
1.22k
  case 8:
88
1.22k
    SStream_concat0(O, "eq_uq");
89
1.22k
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
1.22k
    break;
91
481
  case 9:
92
481
    SStream_concat0(O, "nge");
93
481
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
481
    break;
95
108
  case 0xa:
96
108
    SStream_concat0(O, "ngt");
97
108
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
108
    break;
99
270
  case 0xb:
100
270
    SStream_concat0(O, "false");
101
270
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
270
    break;
103
665
  case 0xc:
104
665
    SStream_concat0(O, "neq_oq");
105
665
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
665
    break;
107
306
  case 0xd:
108
306
    SStream_concat0(O, "ge");
109
306
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
306
    break;
111
194
  case 0xe:
112
194
    SStream_concat0(O, "gt");
113
194
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
194
    break;
115
272
  case 0xf:
116
272
    SStream_concat0(O, "true");
117
272
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
272
    break;
119
448
  case 0x10:
120
448
    SStream_concat0(O, "eq_os");
121
448
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
448
    break;
123
592
  case 0x11:
124
592
    SStream_concat0(O, "lt_oq");
125
592
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
592
    break;
127
495
  case 0x12:
128
495
    SStream_concat0(O, "le_oq");
129
495
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
495
    break;
131
207
  case 0x13:
132
207
    SStream_concat0(O, "unord_s");
133
207
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
207
    break;
135
149
  case 0x14:
136
149
    SStream_concat0(O, "neq_us");
137
149
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
149
    break;
139
534
  case 0x15:
140
534
    SStream_concat0(O, "nlt_uq");
141
534
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
534
    break;
143
230
  case 0x16:
144
230
    SStream_concat0(O, "nle_uq");
145
230
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
230
    break;
147
300
  case 0x17:
148
300
    SStream_concat0(O, "ord_s");
149
300
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
300
    break;
151
236
  case 0x18:
152
236
    SStream_concat0(O, "eq_us");
153
236
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
236
    break;
155
218
  case 0x19:
156
218
    SStream_concat0(O, "nge_uq");
157
218
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
218
    break;
159
309
  case 0x1a:
160
309
    SStream_concat0(O, "ngt_uq");
161
309
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
309
    break;
163
447
  case 0x1b:
164
447
    SStream_concat0(O, "false_os");
165
447
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
447
    break;
167
404
  case 0x1c:
168
404
    SStream_concat0(O, "neq_os");
169
404
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
404
    break;
171
381
  case 0x1d:
172
381
    SStream_concat0(O, "ge_oq");
173
381
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
381
    break;
175
199
  case 0x1e:
176
199
    SStream_concat0(O, "gt_oq");
177
199
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
199
    break;
179
311
  case 0x1f:
180
311
    SStream_concat0(O, "true_us");
181
311
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
311
    break;
183
24.1k
  }
184
185
24.1k
  MI->popcode_adjust = Imm + 1;
186
24.1k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
5.33k
{
190
5.33k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
5.33k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
1.52k
  case 0:
195
1.52k
    SStream_concat0(O, "lt");
196
1.52k
    op_addXopCC(MI, X86_XOP_CC_LT);
197
1.52k
    break;
198
171
  case 1:
199
171
    SStream_concat0(O, "le");
200
171
    op_addXopCC(MI, X86_XOP_CC_LE);
201
171
    break;
202
595
  case 2:
203
595
    SStream_concat0(O, "gt");
204
595
    op_addXopCC(MI, X86_XOP_CC_GT);
205
595
    break;
206
452
  case 3:
207
452
    SStream_concat0(O, "ge");
208
452
    op_addXopCC(MI, X86_XOP_CC_GE);
209
452
    break;
210
372
  case 4:
211
372
    SStream_concat0(O, "eq");
212
372
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
372
    break;
214
294
  case 5:
215
294
    SStream_concat0(O, "neq");
216
294
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
294
    break;
218
1.37k
  case 6:
219
1.37k
    SStream_concat0(O, "false");
220
1.37k
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
1.37k
    break;
222
552
  case 7:
223
552
    SStream_concat0(O, "true");
224
552
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
552
    break;
226
5.33k
  }
227
5.33k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
4.99k
{
231
4.99k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
4.99k
  switch (Imm) {
233
2.16k
  case 0:
234
2.16k
    SStream_concat0(O, "{rn-sae}");
235
2.16k
    op_addAvxSae(MI);
236
2.16k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.16k
    break;
238
1.28k
  case 1:
239
1.28k
    SStream_concat0(O, "{rd-sae}");
240
1.28k
    op_addAvxSae(MI);
241
1.28k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
1.28k
    break;
243
966
  case 2:
244
966
    SStream_concat0(O, "{ru-sae}");
245
966
    op_addAvxSae(MI);
246
966
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
966
    break;
248
581
  case 3:
249
581
    SStream_concat0(O, "{rz-sae}");
250
581
    op_addAvxSae(MI);
251
581
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
581
    break;
253
0
  default:
254
0
    break; // never reach
255
4.99k
  }
256
4.99k
}
257
#endif