Coverage Report

Created: 2026-01-12 07:13

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
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#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
24.4k
{
50
24.4k
  uint8_t Imm =
51
24.4k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
24.4k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
9.53k
  case 0:
56
9.53k
    SStream_concat0(O, "eq");
57
9.53k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
9.53k
    break;
59
1.64k
  case 1:
60
1.64k
    SStream_concat0(O, "lt");
61
1.64k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.64k
    break;
63
1.88k
  case 2:
64
1.88k
    SStream_concat0(O, "le");
65
1.88k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.88k
    break;
67
759
  case 3:
68
759
    SStream_concat0(O, "unord");
69
759
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
759
    break;
71
588
  case 4:
72
588
    SStream_concat0(O, "neq");
73
588
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
588
    break;
75
535
  case 5:
76
535
    SStream_concat0(O, "nlt");
77
535
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
535
    break;
79
222
  case 6:
80
222
    SStream_concat0(O, "nle");
81
222
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
222
    break;
83
317
  case 7:
84
317
    SStream_concat0(O, "ord");
85
317
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
317
    break;
87
1.16k
  case 8:
88
1.16k
    SStream_concat0(O, "eq_uq");
89
1.16k
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
1.16k
    break;
91
383
  case 9:
92
383
    SStream_concat0(O, "nge");
93
383
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
383
    break;
95
73
  case 0xa:
96
73
    SStream_concat0(O, "ngt");
97
73
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
73
    break;
99
178
  case 0xb:
100
178
    SStream_concat0(O, "false");
101
178
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
178
    break;
103
640
  case 0xc:
104
640
    SStream_concat0(O, "neq_oq");
105
640
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
640
    break;
107
444
  case 0xd:
108
444
    SStream_concat0(O, "ge");
109
444
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
444
    break;
111
198
  case 0xe:
112
198
    SStream_concat0(O, "gt");
113
198
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
198
    break;
115
286
  case 0xf:
116
286
    SStream_concat0(O, "true");
117
286
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
286
    break;
119
325
  case 0x10:
120
325
    SStream_concat0(O, "eq_os");
121
325
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
325
    break;
123
544
  case 0x11:
124
544
    SStream_concat0(O, "lt_oq");
125
544
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
544
    break;
127
409
  case 0x12:
128
409
    SStream_concat0(O, "le_oq");
129
409
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
409
    break;
131
368
  case 0x13:
132
368
    SStream_concat0(O, "unord_s");
133
368
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
368
    break;
135
159
  case 0x14:
136
159
    SStream_concat0(O, "neq_us");
137
159
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
159
    break;
139
508
  case 0x15:
140
508
    SStream_concat0(O, "nlt_uq");
141
508
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
508
    break;
143
233
  case 0x16:
144
233
    SStream_concat0(O, "nle_uq");
145
233
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
233
    break;
147
493
  case 0x17:
148
493
    SStream_concat0(O, "ord_s");
149
493
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
493
    break;
151
274
  case 0x18:
152
274
    SStream_concat0(O, "eq_us");
153
274
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
274
    break;
155
194
  case 0x19:
156
194
    SStream_concat0(O, "nge_uq");
157
194
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
194
    break;
159
243
  case 0x1a:
160
243
    SStream_concat0(O, "ngt_uq");
161
243
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
243
    break;
163
402
  case 0x1b:
164
402
    SStream_concat0(O, "false_os");
165
402
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
402
    break;
167
476
  case 0x1c:
168
476
    SStream_concat0(O, "neq_os");
169
476
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
476
    break;
171
472
  case 0x1d:
172
472
    SStream_concat0(O, "ge_oq");
173
472
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
472
    break;
175
192
  case 0x1e:
176
192
    SStream_concat0(O, "gt_oq");
177
192
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
192
    break;
179
340
  case 0x1f:
180
340
    SStream_concat0(O, "true_us");
181
340
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
340
    break;
183
24.4k
  }
184
185
24.4k
  MI->popcode_adjust = Imm + 1;
186
24.4k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
5.36k
{
190
5.36k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
5.36k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
1.43k
  case 0:
195
1.43k
    SStream_concat0(O, "lt");
196
1.43k
    op_addXopCC(MI, X86_XOP_CC_LT);
197
1.43k
    break;
198
144
  case 1:
199
144
    SStream_concat0(O, "le");
200
144
    op_addXopCC(MI, X86_XOP_CC_LE);
201
144
    break;
202
534
  case 2:
203
534
    SStream_concat0(O, "gt");
204
534
    op_addXopCC(MI, X86_XOP_CC_GT);
205
534
    break;
206
343
  case 3:
207
343
    SStream_concat0(O, "ge");
208
343
    op_addXopCC(MI, X86_XOP_CC_GE);
209
343
    break;
210
359
  case 4:
211
359
    SStream_concat0(O, "eq");
212
359
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
359
    break;
214
201
  case 5:
215
201
    SStream_concat0(O, "neq");
216
201
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
201
    break;
218
1.59k
  case 6:
219
1.59k
    SStream_concat0(O, "false");
220
1.59k
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
1.59k
    break;
222
744
  case 7:
223
744
    SStream_concat0(O, "true");
224
744
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
744
    break;
226
5.36k
  }
227
5.36k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
5.85k
{
231
5.85k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
5.85k
  switch (Imm) {
233
2.94k
  case 0:
234
2.94k
    SStream_concat0(O, "{rn-sae}");
235
2.94k
    op_addAvxSae(MI);
236
2.94k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.94k
    break;
238
1.37k
  case 1:
239
1.37k
    SStream_concat0(O, "{rd-sae}");
240
1.37k
    op_addAvxSae(MI);
241
1.37k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
1.37k
    break;
243
965
  case 2:
244
965
    SStream_concat0(O, "{ru-sae}");
245
965
    op_addAvxSae(MI);
246
965
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
965
    break;
248
572
  case 3:
249
572
    SStream_concat0(O, "{rz-sae}");
250
572
    op_addAvxSae(MI);
251
572
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
572
    break;
253
0
  default:
254
0
    break; // never reach
255
5.85k
  }
256
5.85k
}
257
#endif