Coverage Report

Created: 2026-01-17 06:58

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
24.7k
{
50
24.7k
  uint8_t Imm =
51
24.7k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
24.7k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
9.42k
  case 0:
56
9.42k
    SStream_concat0(O, "eq");
57
9.42k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
9.42k
    break;
59
2.32k
  case 1:
60
2.32k
    SStream_concat0(O, "lt");
61
2.32k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
2.32k
    break;
63
1.56k
  case 2:
64
1.56k
    SStream_concat0(O, "le");
65
1.56k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.56k
    break;
67
727
  case 3:
68
727
    SStream_concat0(O, "unord");
69
727
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
727
    break;
71
470
  case 4:
72
470
    SStream_concat0(O, "neq");
73
470
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
470
    break;
75
603
  case 5:
76
603
    SStream_concat0(O, "nlt");
77
603
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
603
    break;
79
309
  case 6:
80
309
    SStream_concat0(O, "nle");
81
309
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
309
    break;
83
337
  case 7:
84
337
    SStream_concat0(O, "ord");
85
337
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
337
    break;
87
835
  case 8:
88
835
    SStream_concat0(O, "eq_uq");
89
835
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
835
    break;
91
251
  case 9:
92
251
    SStream_concat0(O, "nge");
93
251
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
251
    break;
95
140
  case 0xa:
96
140
    SStream_concat0(O, "ngt");
97
140
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
140
    break;
99
568
  case 0xb:
100
568
    SStream_concat0(O, "false");
101
568
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
568
    break;
103
601
  case 0xc:
104
601
    SStream_concat0(O, "neq_oq");
105
601
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
601
    break;
107
212
  case 0xd:
108
212
    SStream_concat0(O, "ge");
109
212
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
212
    break;
111
219
  case 0xe:
112
219
    SStream_concat0(O, "gt");
113
219
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
219
    break;
115
269
  case 0xf:
116
269
    SStream_concat0(O, "true");
117
269
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
269
    break;
119
361
  case 0x10:
120
361
    SStream_concat0(O, "eq_os");
121
361
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
361
    break;
123
750
  case 0x11:
124
750
    SStream_concat0(O, "lt_oq");
125
750
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
750
    break;
127
394
  case 0x12:
128
394
    SStream_concat0(O, "le_oq");
129
394
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
394
    break;
131
230
  case 0x13:
132
230
    SStream_concat0(O, "unord_s");
133
230
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
230
    break;
135
125
  case 0x14:
136
125
    SStream_concat0(O, "neq_us");
137
125
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
125
    break;
139
549
  case 0x15:
140
549
    SStream_concat0(O, "nlt_uq");
141
549
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
549
    break;
143
224
  case 0x16:
144
224
    SStream_concat0(O, "nle_uq");
145
224
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
224
    break;
147
426
  case 0x17:
148
426
    SStream_concat0(O, "ord_s");
149
426
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
426
    break;
151
573
  case 0x18:
152
573
    SStream_concat0(O, "eq_us");
153
573
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
573
    break;
155
359
  case 0x19:
156
359
    SStream_concat0(O, "nge_uq");
157
359
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
359
    break;
159
291
  case 0x1a:
160
291
    SStream_concat0(O, "ngt_uq");
161
291
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
291
    break;
163
428
  case 0x1b:
164
428
    SStream_concat0(O, "false_os");
165
428
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
428
    break;
167
373
  case 0x1c:
168
373
    SStream_concat0(O, "neq_os");
169
373
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
373
    break;
171
526
  case 0x1d:
172
526
    SStream_concat0(O, "ge_oq");
173
526
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
526
    break;
175
142
  case 0x1e:
176
142
    SStream_concat0(O, "gt_oq");
177
142
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
142
    break;
179
143
  case 0x1f:
180
143
    SStream_concat0(O, "true_us");
181
143
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
143
    break;
183
24.7k
  }
184
185
24.7k
  MI->popcode_adjust = Imm + 1;
186
24.7k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
5.19k
{
190
5.19k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
5.19k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
1.57k
  case 0:
195
1.57k
    SStream_concat0(O, "lt");
196
1.57k
    op_addXopCC(MI, X86_XOP_CC_LT);
197
1.57k
    break;
198
212
  case 1:
199
212
    SStream_concat0(O, "le");
200
212
    op_addXopCC(MI, X86_XOP_CC_LE);
201
212
    break;
202
427
  case 2:
203
427
    SStream_concat0(O, "gt");
204
427
    op_addXopCC(MI, X86_XOP_CC_GT);
205
427
    break;
206
422
  case 3:
207
422
    SStream_concat0(O, "ge");
208
422
    op_addXopCC(MI, X86_XOP_CC_GE);
209
422
    break;
210
576
  case 4:
211
576
    SStream_concat0(O, "eq");
212
576
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
576
    break;
214
161
  case 5:
215
161
    SStream_concat0(O, "neq");
216
161
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
161
    break;
218
1.23k
  case 6:
219
1.23k
    SStream_concat0(O, "false");
220
1.23k
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
1.23k
    break;
222
588
  case 7:
223
588
    SStream_concat0(O, "true");
224
588
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
588
    break;
226
5.19k
  }
227
5.19k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
6.95k
{
231
6.95k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
6.95k
  switch (Imm) {
233
2.65k
  case 0:
234
2.65k
    SStream_concat0(O, "{rn-sae}");
235
2.65k
    op_addAvxSae(MI);
236
2.65k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.65k
    break;
238
1.03k
  case 1:
239
1.03k
    SStream_concat0(O, "{rd-sae}");
240
1.03k
    op_addAvxSae(MI);
241
1.03k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
1.03k
    break;
243
1.84k
  case 2:
244
1.84k
    SStream_concat0(O, "{ru-sae}");
245
1.84k
    op_addAvxSae(MI);
246
1.84k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
1.84k
    break;
248
1.42k
  case 3:
249
1.42k
    SStream_concat0(O, "{rz-sae}");
250
1.42k
    op_addAvxSae(MI);
251
1.42k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
1.42k
    break;
253
0
  default:
254
0
    break; // never reach
255
6.95k
  }
256
6.95k
}
257
#endif