Coverage Report

Created: 2026-02-26 07:11

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonev5/arch/AArch64/AArch64GenAsmWriter.inc
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Source
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/* Capstone Disassembly Engine, http://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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4
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
5
|*                                                                            *|
6
|* Assembly Writer Source Fragment                                            *|
7
|*                                                                            *|
8
|* Automatically generated file, do not edit!                                 *|
9
|*                                                                            *|
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\*===----------------------------------------------------------------------===*/
11
12
/// getMnemonic - This method is automatically generated by tablegen
13
/// from the instruction set description.
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static uint64_t getMnemonic(MCInst *MI, SStream *O, unsigned int opcode) {
15
16
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#ifdef __GNUC__
17
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#pragma GCC diagnostic push
18
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#pragma GCC diagnostic ignored "-Woverlength-strings"
19
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#endif
20
21
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#ifndef CAPSTONE_DIET
22
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  static const char AsmStrs[] = {
23
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  /* 0 */ "sha1su0\t\0"
24
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  /* 9 */ "sha512su0\t\0"
25
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  /* 20 */ "sha256su0\t\0"
26
500k
  /* 31 */ "st64bv0\t\0"
27
500k
  /* 40 */ "ld1\t\0"
28
500k
  /* 45 */ "trn1\t\0"
29
500k
  /* 51 */ "zip1\t\0"
30
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  /* 57 */ "uzp1\t\0"
31
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  /* 63 */ "dcps1\t\0"
32
500k
  /* 70 */ "sm3ss1\t\0"
33
500k
  /* 78 */ "st1\t\0"
34
500k
  /* 83 */ "sha1su1\t\0"
35
500k
  /* 92 */ "sha512su1\t\0"
36
500k
  /* 103 */ "sha256su1\t\0"
37
500k
  /* 114 */ "sm3partw1\t\0"
38
500k
  /* 125 */ "rax1\t\0"
39
500k
  /* 131 */ "rev32\t\0"
40
500k
  /* 138 */ "ld2\t\0"
41
500k
  /* 143 */ "sha512h2\t\0"
42
500k
  /* 153 */ "sha256h2\t\0"
43
500k
  /* 163 */ "sabal2\t\0"
44
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  /* 171 */ "uabal2\t\0"
45
500k
  /* 179 */ "sqdmlal2\t\0"
46
500k
  /* 189 */ "fmlal2\t\0"
47
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  /* 197 */ "smlal2\t\0"
48
500k
  /* 205 */ "umlal2\t\0"
49
500k
  /* 213 */ "ssubl2\t\0"
50
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  /* 221 */ "usubl2\t\0"
51
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  /* 229 */ "sabdl2\t\0"
52
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  /* 237 */ "uabdl2\t\0"
53
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  /* 245 */ "saddl2\t\0"
54
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  /* 253 */ "uaddl2\t\0"
55
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  /* 261 */ "sshll2\t\0"
56
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  /* 269 */ "ushll2\t\0"
57
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  /* 277 */ "sqdmull2\t\0"
58
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  /* 287 */ "pmull2\t\0"
59
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  /* 295 */ "smull2\t\0"
60
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  /* 303 */ "umull2\t\0"
61
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  /* 311 */ "sqdmlsl2\t\0"
62
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  /* 321 */ "fmlsl2\t\0"
63
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  /* 329 */ "smlsl2\t\0"
64
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  /* 337 */ "umlsl2\t\0"
65
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  /* 345 */ "fcvtl2\t\0"
66
500k
  /* 353 */ "rsubhn2\t\0"
67
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  /* 362 */ "raddhn2\t\0"
68
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  /* 371 */ "sqshrn2\t\0"
69
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  /* 380 */ "uqshrn2\t\0"
70
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  /* 389 */ "sqrshrn2\t\0"
71
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  /* 399 */ "uqrshrn2\t\0"
72
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  /* 409 */ "trn2\t\0"
73
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  /* 415 */ "bfcvtn2\t\0"
74
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  /* 424 */ "sqxtn2\t\0"
75
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  /* 432 */ "uqxtn2\t\0"
76
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  /* 440 */ "sqshrun2\t\0"
77
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  /* 450 */ "sqrshrun2\t\0"
78
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  /* 461 */ "sqxtun2\t\0"
79
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  /* 470 */ "fcvtxn2\t\0"
80
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  /* 479 */ "zip2\t\0"
81
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  /* 485 */ "uzp2\t\0"
82
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  /* 491 */ "dcps2\t\0"
83
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  /* 498 */ "st2\t\0"
84
500k
  /* 503 */ "ssubw2\t\0"
85
500k
  /* 511 */ "usubw2\t\0"
86
500k
  /* 519 */ "saddw2\t\0"
87
500k
  /* 527 */ "uaddw2\t\0"
88
500k
  /* 535 */ "sm3partw2\t\0"
89
500k
  /* 546 */ "ld3\t\0"
90
500k
  /* 551 */ "eor3\t\0"
91
500k
  /* 557 */ "dcps3\t\0"
92
500k
  /* 564 */ "st3\t\0"
93
500k
  /* 569 */ "rev64\t\0"
94
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  /* 576 */ "ld4\t\0"
95
500k
  /* 581 */ "st4\t\0"
96
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  /* 586 */ "setf16\t\0"
97
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  /* 594 */ "rev16\t\0"
98
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  /* 601 */ "setf8\t\0"
99
500k
  /* 608 */ "sm3tt1a\t\0"
100
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  /* 617 */ "sm3tt2a\t\0"
101
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  /* 626 */ "braa\t\0"
102
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  /* 632 */ "ldraa\t\0"
103
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  /* 639 */ "blraa\t\0"
104
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  /* 646 */ "saba\t\0"
105
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  /* 652 */ "uaba\t\0"
106
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  /* 658 */ "pacda\t\0"
107
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  /* 665 */ "ldadda\t\0"
108
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  /* 673 */ "fadda\t\0"
109
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  /* 680 */ "autda\t\0"
110
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  /* 687 */ "pacga\t\0"
111
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  /* 694 */ "addha\t\0"
112
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  /* 701 */ "pacia\t\0"
113
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  /* 708 */ "autia\t\0"
114
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  /* 715 */ "brka\t\0"
115
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  /* 721 */ "fcmla\t\0"
116
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  /* 728 */ "fmla\t\0"
117
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  /* 734 */ "bfmmla\t\0"
118
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  /* 742 */ "usmmla\t\0"
119
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  /* 750 */ "ummla\t\0"
120
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  /* 757 */ "fnmla\t\0"
121
500k
  /* 764 */ "ldsmina\t\0"
122
500k
  /* 773 */ "ldumina\t\0"
123
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  /* 782 */ "brkpa\t\0"
124
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  /* 789 */ "bfmopa\t\0"
125
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  /* 797 */ "usmopa\t\0"
126
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  /* 805 */ "sumopa\t\0"
127
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  /* 813 */ "caspa\t\0"
128
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  /* 820 */ "swpa\t\0"
129
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  /* 826 */ "fexpa\t\0"
130
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  /* 833 */ "ldclra\t\0"
131
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  /* 841 */ "ldeora\t\0"
132
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  /* 849 */ "srsra\t\0"
133
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  /* 856 */ "ursra\t\0"
134
500k
  /* 863 */ "ssra\t\0"
135
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  /* 869 */ "usra\t\0"
136
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  /* 875 */ "casa\t\0"
137
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  /* 881 */ "ldseta\t\0"
138
500k
  /* 889 */ "frinta\t\0"
139
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  /* 897 */ "clasta\t\0"
140
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  /* 905 */ "addva\t\0"
141
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  /* 912 */ "mova\t\0"
142
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  /* 918 */ "ldsmaxa\t\0"
143
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  /* 927 */ "ldumaxa\t\0"
144
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  /* 936 */ "pacdza\t\0"
145
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  /* 944 */ "autdza\t\0"
146
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  /* 952 */ "paciza\t\0"
147
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  /* 960 */ "autiza\t\0"
148
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  /* 968 */ "ld1b\t\0"
149
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  /* 974 */ "ldff1b\t\0"
150
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  /* 982 */ "ldnf1b\t\0"
151
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  /* 990 */ "ldnt1b\t\0"
152
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  /* 998 */ "stnt1b\t\0"
153
500k
  /* 1006 */ "st1b\t\0"
154
500k
  /* 1012 */ "sm3tt1b\t\0"
155
500k
  /* 1021 */ "crc32b\t\0"
156
500k
  /* 1029 */ "ld2b\t\0"
157
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  /* 1035 */ "st2b\t\0"
158
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  /* 1041 */ "sm3tt2b\t\0"
159
500k
  /* 1050 */ "ld3b\t\0"
160
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  /* 1056 */ "st3b\t\0"
161
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  /* 1062 */ "ld64b\t\0"
162
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  /* 1069 */ "st64b\t\0"
163
500k
  /* 1076 */ "ld4b\t\0"
164
500k
  /* 1082 */ "st4b\t\0"
165
500k
  /* 1088 */ "ldaddab\t\0"
166
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  /* 1097 */ "ldsminab\t\0"
167
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  /* 1107 */ "lduminab\t\0"
168
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  /* 1117 */ "swpab\t\0"
169
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  /* 1124 */ "brab\t\0"
170
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  /* 1130 */ "ldrab\t\0"
171
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  /* 1137 */ "blrab\t\0"
172
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  /* 1144 */ "ldclrab\t\0"
173
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  /* 1153 */ "ldeorab\t\0"
174
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  /* 1162 */ "casab\t\0"
175
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  /* 1169 */ "ldsetab\t\0"
176
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  /* 1178 */ "ldsmaxab\t\0"
177
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  /* 1188 */ "ldumaxab\t\0"
178
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  /* 1198 */ "crc32cb\t\0"
179
500k
  /* 1207 */ "sqdecb\t\0"
180
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  /* 1215 */ "uqdecb\t\0"
181
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  /* 1223 */ "sqincb\t\0"
182
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  /* 1231 */ "uqincb\t\0"
183
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  /* 1239 */ "pacdb\t\0"
184
500k
  /* 1246 */ "ldaddb\t\0"
185
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  /* 1254 */ "autdb\t\0"
186
500k
  /* 1261 */ "prfb\t\0"
187
500k
  /* 1267 */ "flogb\t\0"
188
500k
  /* 1274 */ "pacib\t\0"
189
500k
  /* 1281 */ "autib\t\0"
190
500k
  /* 1288 */ "brkb\t\0"
191
500k
  /* 1294 */ "sabalb\t\0"
192
500k
  /* 1302 */ "uabalb\t\0"
193
500k
  /* 1310 */ "ldaddalb\t\0"
194
500k
  /* 1320 */ "sqdmlalb\t\0"
195
500k
  /* 1330 */ "bfmlalb\t\0"
196
500k
  /* 1339 */ "smlalb\t\0"
197
500k
  /* 1347 */ "umlalb\t\0"
198
500k
  /* 1355 */ "ldsminalb\t\0"
199
500k
  /* 1366 */ "lduminalb\t\0"
200
500k
  /* 1377 */ "swpalb\t\0"
201
500k
  /* 1385 */ "ldclralb\t\0"
202
500k
  /* 1395 */ "ldeoralb\t\0"
203
500k
  /* 1405 */ "casalb\t\0"
204
500k
  /* 1413 */ "ldsetalb\t\0"
205
500k
  /* 1423 */ "ldsmaxalb\t\0"
206
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  /* 1434 */ "ldumaxalb\t\0"
207
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  /* 1445 */ "ssublb\t\0"
208
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  /* 1453 */ "usublb\t\0"
209
500k
  /* 1461 */ "sbclb\t\0"
210
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  /* 1468 */ "adclb\t\0"
211
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  /* 1475 */ "sabdlb\t\0"
212
500k
  /* 1483 */ "uabdlb\t\0"
213
500k
  /* 1491 */ "ldaddlb\t\0"
214
500k
  /* 1500 */ "saddlb\t\0"
215
500k
  /* 1508 */ "uaddlb\t\0"
216
500k
  /* 1516 */ "sshllb\t\0"
217
500k
  /* 1524 */ "ushllb\t\0"
218
500k
  /* 1532 */ "sqdmullb\t\0"
219
500k
  /* 1542 */ "pmullb\t\0"
220
500k
  /* 1550 */ "smullb\t\0"
221
500k
  /* 1558 */ "umullb\t\0"
222
500k
  /* 1566 */ "ldsminlb\t\0"
223
500k
  /* 1576 */ "lduminlb\t\0"
224
500k
  /* 1586 */ "swplb\t\0"
225
500k
  /* 1593 */ "ldclrlb\t\0"
226
500k
  /* 1602 */ "ldeorlb\t\0"
227
500k
  /* 1611 */ "caslb\t\0"
228
500k
  /* 1618 */ "sqdmlslb\t\0"
229
500k
  /* 1628 */ "fmlslb\t\0"
230
500k
  /* 1636 */ "smlslb\t\0"
231
500k
  /* 1644 */ "umlslb\t\0"
232
500k
  /* 1652 */ "ldsetlb\t\0"
233
500k
  /* 1661 */ "ldsmaxlb\t\0"
234
500k
  /* 1671 */ "ldumaxlb\t\0"
235
500k
  /* 1681 */ "dmb\t\0"
236
500k
  /* 1686 */ "rsubhnb\t\0"
237
500k
  /* 1695 */ "raddhnb\t\0"
238
500k
  /* 1704 */ "ldsminb\t\0"
239
500k
  /* 1713 */ "lduminb\t\0"
240
500k
  /* 1722 */ "sqshrnb\t\0"
241
500k
  /* 1731 */ "uqshrnb\t\0"
242
500k
  /* 1740 */ "sqrshrnb\t\0"
243
500k
  /* 1750 */ "uqrshrnb\t\0"
244
500k
  /* 1760 */ "sqxtnb\t\0"
245
500k
  /* 1768 */ "uqxtnb\t\0"
246
500k
  /* 1776 */ "sqshrunb\t\0"
247
500k
  /* 1786 */ "sqrshrunb\t\0"
248
500k
  /* 1797 */ "sqxtunb\t\0"
249
500k
  /* 1806 */ "ld1rob\t\0"
250
500k
  /* 1814 */ "brkpb\t\0"
251
500k
  /* 1821 */ "swpb\t\0"
252
500k
  /* 1827 */ "ld1rqb\t\0"
253
500k
  /* 1835 */ "ld1rb\t\0"
254
500k
  /* 1842 */ "ldarb\t\0"
255
500k
  /* 1849 */ "ldlarb\t\0"
256
500k
  /* 1857 */ "ldrb\t\0"
257
500k
  /* 1863 */ "ldclrb\t\0"
258
500k
  /* 1871 */ "stllrb\t\0"
259
500k
  /* 1879 */ "stlrb\t\0"
260
500k
  /* 1886 */ "ldeorb\t\0"
261
500k
  /* 1894 */ "ldaprb\t\0"
262
500k
  /* 1902 */ "ldtrb\t\0"
263
500k
  /* 1909 */ "strb\t\0"
264
500k
  /* 1915 */ "sttrb\t\0"
265
500k
  /* 1922 */ "ldurb\t\0"
266
500k
  /* 1929 */ "stlurb\t\0"
267
500k
  /* 1937 */ "ldapurb\t\0"
268
500k
  /* 1946 */ "sturb\t\0"
269
500k
  /* 1953 */ "ldaxrb\t\0"
270
500k
  /* 1961 */ "ldxrb\t\0"
271
500k
  /* 1968 */ "stlxrb\t\0"
272
500k
  /* 1976 */ "stxrb\t\0"
273
500k
  /* 1983 */ "ld1sb\t\0"
274
500k
  /* 1990 */ "ldff1sb\t\0"
275
500k
  /* 1999 */ "ldnf1sb\t\0"
276
500k
  /* 2008 */ "ldnt1sb\t\0"
277
500k
  /* 2017 */ "casb\t\0"
278
500k
  /* 2023 */ "dsb\t\0"
279
500k
  /* 2028 */ "isb\t\0"
280
500k
  /* 2033 */ "fmsb\t\0"
281
500k
  /* 2039 */ "fnmsb\t\0"
282
500k
  /* 2046 */ "ld1rsb\t\0"
283
500k
  /* 2054 */ "ldrsb\t\0"
284
500k
  /* 2061 */ "ldtrsb\t\0"
285
500k
  /* 2069 */ "ldursb\t\0"
286
500k
  /* 2077 */ "ldapursb\t\0"
287
500k
  /* 2087 */ "tsb\t\0"
288
500k
  /* 2092 */ "ldsetb\t\0"
289
500k
  /* 2100 */ "ssubltb\t\0"
290
500k
  /* 2109 */ "cntb\t\0"
291
500k
  /* 2115 */ "eortb\t\0"
292
500k
  /* 2122 */ "clastb\t\0"
293
500k
  /* 2130 */ "sxtb\t\0"
294
500k
  /* 2136 */ "uxtb\t\0"
295
500k
  /* 2142 */ "fsub\t\0"
296
500k
  /* 2148 */ "shsub\t\0"
297
500k
  /* 2155 */ "uhsub\t\0"
298
500k
  /* 2162 */ "fmsub\t\0"
299
500k
  /* 2169 */ "fnmsub\t\0"
300
500k
  /* 2177 */ "sqsub\t\0"
301
500k
  /* 2184 */ "uqsub\t\0"
302
500k
  /* 2191 */ "revb\t\0"
303
500k
  /* 2197 */ "ssubwb\t\0"
304
500k
  /* 2205 */ "usubwb\t\0"
305
500k
  /* 2213 */ "saddwb\t\0"
306
500k
  /* 2221 */ "uaddwb\t\0"
307
500k
  /* 2229 */ "ldsmaxb\t\0"
308
500k
  /* 2238 */ "ldumaxb\t\0"
309
500k
  /* 2247 */ "pacdzb\t\0"
310
500k
  /* 2255 */ "autdzb\t\0"
311
500k
  /* 2263 */ "pacizb\t\0"
312
500k
  /* 2271 */ "autizb\t\0"
313
500k
  /* 2279 */ "sha1c\t\0"
314
500k
  /* 2286 */ "sbc\t\0"
315
500k
  /* 2291 */ "adc\t\0"
316
500k
  /* 2296 */ "bic\t\0"
317
500k
  /* 2301 */ "aesimc\t\0"
318
500k
  /* 2309 */ "aesmc\t\0"
319
500k
  /* 2316 */ "csinc\t\0"
320
500k
  /* 2323 */ "hvc\t\0"
321
500k
  /* 2328 */ "svc\t\0"
322
500k
  /* 2333 */ "ld1d\t\0"
323
500k
  /* 2339 */ "ldff1d\t\0"
324
500k
  /* 2347 */ "ldnf1d\t\0"
325
500k
  /* 2355 */ "ldnt1d\t\0"
326
500k
  /* 2363 */ "stnt1d\t\0"
327
500k
  /* 2371 */ "st1d\t\0"
328
500k
  /* 2377 */ "ld2d\t\0"
329
500k
  /* 2383 */ "st2d\t\0"
330
500k
  /* 2389 */ "ld3d\t\0"
331
500k
  /* 2395 */ "st3d\t\0"
332
500k
  /* 2401 */ "ld4d\t\0"
333
500k
  /* 2407 */ "st4d\t\0"
334
500k
  /* 2413 */ "fmad\t\0"
335
500k
  /* 2419 */ "fnmad\t\0"
336
500k
  /* 2426 */ "ftmad\t\0"
337
500k
  /* 2433 */ "fabd\t\0"
338
500k
  /* 2439 */ "sabd\t\0"
339
500k
  /* 2445 */ "uabd\t\0"
340
500k
  /* 2451 */ "xpacd\t\0"
341
500k
  /* 2458 */ "sqdecd\t\0"
342
500k
  /* 2466 */ "uqdecd\t\0"
343
500k
  /* 2474 */ "sqincd\t\0"
344
500k
  /* 2482 */ "uqincd\t\0"
345
500k
  /* 2490 */ "fcadd\t\0"
346
500k
  /* 2497 */ "sqcadd\t\0"
347
500k
  /* 2505 */ "ldadd\t\0"
348
500k
  /* 2512 */ "fadd\t\0"
349
500k
  /* 2518 */ "srhadd\t\0"
350
500k
  /* 2526 */ "urhadd\t\0"
351
500k
  /* 2534 */ "shadd\t\0"
352
500k
  /* 2541 */ "uhadd\t\0"
353
500k
  /* 2548 */ "fmadd\t\0"
354
500k
  /* 2555 */ "fnmadd\t\0"
355
500k
  /* 2563 */ "usqadd\t\0"
356
500k
  /* 2571 */ "suqadd\t\0"
357
500k
  /* 2579 */ "prfd\t\0"
358
500k
  /* 2585 */ "nand\t\0"
359
500k
  /* 2591 */ "ld1rod\t\0"
360
500k
  /* 2599 */ "ld1rqd\t\0"
361
500k
  /* 2607 */ "ld1rd\t\0"
362
500k
  /* 2614 */ "asrd\t\0"
363
500k
  /* 2620 */ "aesd\t\0"
364
500k
  /* 2626 */ "cntd\t\0"
365
500k
  /* 2632 */ "revd\t\0"
366
500k
  /* 2638 */ "sm4e\t\0"
367
500k
  /* 2644 */ "splice\t\0"
368
500k
  /* 2652 */ "facge\t\0"
369
500k
  /* 2659 */ "whilege\t\0"
370
500k
  /* 2668 */ "fcmge\t\0"
371
500k
  /* 2675 */ "cmpge\t\0"
372
500k
  /* 2682 */ "fscale\t\0"
373
500k
  /* 2690 */ "whilele\t\0"
374
500k
  /* 2699 */ "fcmle\t\0"
375
500k
  /* 2706 */ "cmple\t\0"
376
500k
  /* 2713 */ "fcmne\t\0"
377
500k
  /* 2720 */ "ctermne\t\0"
378
500k
  /* 2729 */ "cmpne\t\0"
379
500k
  /* 2736 */ "frecpe\t\0"
380
500k
  /* 2744 */ "urecpe\t\0"
381
500k
  /* 2752 */ "fccmpe\t\0"
382
500k
  /* 2760 */ "fcmpe\t\0"
383
500k
  /* 2767 */ "aese\t\0"
384
500k
  /* 2773 */ "pfalse\t\0"
385
500k
  /* 2781 */ "frsqrte\t\0"
386
500k
  /* 2790 */ "ursqrte\t\0"
387
500k
  /* 2799 */ "ptrue\t\0"
388
500k
  /* 2806 */ "udf\t\0"
389
500k
  /* 2811 */ "bif\t\0"
390
500k
  /* 2816 */ "rmif\t\0"
391
500k
  /* 2822 */ "scvtf\t\0"
392
500k
  /* 2829 */ "ucvtf\t\0"
393
500k
  /* 2836 */ "st2g\t\0"
394
500k
  /* 2842 */ "stz2g\t\0"
395
500k
  /* 2849 */ "subg\t\0"
396
500k
  /* 2855 */ "addg\t\0"
397
500k
  /* 2861 */ "ldg\t\0"
398
500k
  /* 2866 */ "fneg\t\0"
399
500k
  /* 2872 */ "sqneg\t\0"
400
500k
  /* 2879 */ "csneg\t\0"
401
500k
  /* 2886 */ "histseg\t\0"
402
500k
  /* 2895 */ "irg\t\0"
403
500k
  /* 2900 */ "stg\t\0"
404
500k
  /* 2905 */ "stzg\t\0"
405
500k
  /* 2911 */ "sha1h\t\0"
406
500k
  /* 2918 */ "ld1h\t\0"
407
500k
  /* 2924 */ "ldff1h\t\0"
408
500k
  /* 2932 */ "ldnf1h\t\0"
409
500k
  /* 2940 */ "ldnt1h\t\0"
410
500k
  /* 2948 */ "stnt1h\t\0"
411
500k
  /* 2956 */ "st1h\t\0"
412
500k
  /* 2962 */ "sha512h\t\0"
413
500k
  /* 2971 */ "crc32h\t\0"
414
500k
  /* 2979 */ "ld2h\t\0"
415
500k
  /* 2985 */ "st2h\t\0"
416
500k
  /* 2991 */ "ld3h\t\0"
417
500k
  /* 2997 */ "st3h\t\0"
418
500k
  /* 3003 */ "ld4h\t\0"
419
500k
  /* 3009 */ "st4h\t\0"
420
500k
  /* 3015 */ "sha256h\t\0"
421
500k
  /* 3024 */ "ldaddah\t\0"
422
500k
  /* 3033 */ "sqrdcmlah\t\0"
423
500k
  /* 3044 */ "sqrdmlah\t\0"
424
500k
  /* 3054 */ "ldsminah\t\0"
425
500k
  /* 3064 */ "lduminah\t\0"
426
500k
  /* 3074 */ "swpah\t\0"
427
500k
  /* 3081 */ "ldclrah\t\0"
428
500k
  /* 3090 */ "ldeorah\t\0"
429
500k
  /* 3099 */ "casah\t\0"
430
500k
  /* 3106 */ "ldsetah\t\0"
431
500k
  /* 3115 */ "ldsmaxah\t\0"
432
500k
  /* 3125 */ "ldumaxah\t\0"
433
500k
  /* 3135 */ "crc32ch\t\0"
434
500k
  /* 3144 */ "sqdech\t\0"
435
500k
  /* 3152 */ "uqdech\t\0"
436
500k
  /* 3160 */ "sqinch\t\0"
437
500k
  /* 3168 */ "uqinch\t\0"
438
500k
  /* 3176 */ "nmatch\t\0"
439
500k
  /* 3184 */ "ldaddh\t\0"
440
500k
  /* 3192 */ "prfh\t\0"
441
500k
  /* 3198 */ "ldaddalh\t\0"
442
500k
  /* 3208 */ "ldsminalh\t\0"
443
500k
  /* 3219 */ "lduminalh\t\0"
444
500k
  /* 3230 */ "swpalh\t\0"
445
500k
  /* 3238 */ "ldclralh\t\0"
446
500k
  /* 3248 */ "ldeoralh\t\0"
447
500k
  /* 3258 */ "casalh\t\0"
448
500k
  /* 3266 */ "ldsetalh\t\0"
449
500k
  /* 3276 */ "ldsmaxalh\t\0"
450
500k
  /* 3287 */ "ldumaxalh\t\0"
451
500k
  /* 3298 */ "ldaddlh\t\0"
452
500k
  /* 3307 */ "ldsminlh\t\0"
453
500k
  /* 3317 */ "lduminlh\t\0"
454
500k
  /* 3327 */ "swplh\t\0"
455
500k
  /* 3334 */ "ldclrlh\t\0"
456
500k
  /* 3343 */ "ldeorlh\t\0"
457
500k
  /* 3352 */ "caslh\t\0"
458
500k
  /* 3359 */ "ldsetlh\t\0"
459
500k
  /* 3368 */ "sqdmulh\t\0"
460
500k
  /* 3377 */ "sqrdmulh\t\0"
461
500k
  /* 3387 */ "smulh\t\0"
462
500k
  /* 3394 */ "umulh\t\0"
463
500k
  /* 3401 */ "ldsmaxlh\t\0"
464
500k
  /* 3411 */ "ldumaxlh\t\0"
465
500k
  /* 3421 */ "ldsminh\t\0"
466
500k
  /* 3430 */ "lduminh\t\0"
467
500k
  /* 3439 */ "ld1roh\t\0"
468
500k
  /* 3447 */ "swph\t\0"
469
500k
  /* 3453 */ "ld1rqh\t\0"
470
500k
  /* 3461 */ "ld1rh\t\0"
471
500k
  /* 3468 */ "ldarh\t\0"
472
500k
  /* 3475 */ "ldlarh\t\0"
473
500k
  /* 3483 */ "ldrh\t\0"
474
500k
  /* 3489 */ "ldclrh\t\0"
475
500k
  /* 3497 */ "stllrh\t\0"
476
500k
  /* 3505 */ "stlrh\t\0"
477
500k
  /* 3512 */ "ldeorh\t\0"
478
500k
  /* 3520 */ "ldaprh\t\0"
479
500k
  /* 3528 */ "ldtrh\t\0"
480
500k
  /* 3535 */ "strh\t\0"
481
500k
  /* 3541 */ "sttrh\t\0"
482
500k
  /* 3548 */ "ldurh\t\0"
483
500k
  /* 3555 */ "stlurh\t\0"
484
500k
  /* 3563 */ "ldapurh\t\0"
485
500k
  /* 3572 */ "sturh\t\0"
486
500k
  /* 3579 */ "ldaxrh\t\0"
487
500k
  /* 3587 */ "ldxrh\t\0"
488
500k
  /* 3594 */ "stlxrh\t\0"
489
500k
  /* 3602 */ "stxrh\t\0"
490
500k
  /* 3609 */ "ld1sh\t\0"
491
500k
  /* 3616 */ "ldff1sh\t\0"
492
500k
  /* 3625 */ "ldnf1sh\t\0"
493
500k
  /* 3634 */ "ldnt1sh\t\0"
494
500k
  /* 3643 */ "cash\t\0"
495
500k
  /* 3649 */ "sqrdmlsh\t\0"
496
500k
  /* 3659 */ "ld1rsh\t\0"
497
500k
  /* 3667 */ "ldrsh\t\0"
498
500k
  /* 3674 */ "ldtrsh\t\0"
499
500k
  /* 3682 */ "ldursh\t\0"
500
500k
  /* 3690 */ "ldapursh\t\0"
501
500k
  /* 3700 */ "ldseth\t\0"
502
500k
  /* 3708 */ "cnth\t\0"
503
500k
  /* 3714 */ "sxth\t\0"
504
500k
  /* 3720 */ "uxth\t\0"
505
500k
  /* 3726 */ "revh\t\0"
506
500k
  /* 3732 */ "ldsmaxh\t\0"
507
500k
  /* 3741 */ "ldumaxh\t\0"
508
500k
  /* 3750 */ "xpaci\t\0"
509
500k
  /* 3757 */ "whilehi\t\0"
510
500k
  /* 3766 */ "punpkhi\t\0"
511
500k
  /* 3775 */ "sunpkhi\t\0"
512
500k
  /* 3784 */ "uunpkhi\t\0"
513
500k
  /* 3793 */ "cmhi\t\0"
514
500k
  /* 3799 */ "cmphi\t\0"
515
500k
  /* 3806 */ "sli\t\0"
516
500k
  /* 3811 */ "gmi\t\0"
517
500k
  /* 3816 */ "mvni\t\0"
518
500k
  /* 3822 */ "sri\t\0"
519
500k
  /* 3827 */ "frinti\t\0"
520
500k
  /* 3835 */ "movi\t\0"
521
500k
  /* 3841 */ "brk\t\0"
522
500k
  /* 3846 */ "movk\t\0"
523
500k
  /* 3852 */ "sabal\t\0"
524
500k
  /* 3859 */ "uabal\t\0"
525
500k
  /* 3866 */ "ldaddal\t\0"
526
500k
  /* 3875 */ "sqdmlal\t\0"
527
500k
  /* 3884 */ "fmlal\t\0"
528
500k
  /* 3891 */ "smlal\t\0"
529
500k
  /* 3898 */ "umlal\t\0"
530
500k
  /* 3905 */ "ldsminal\t\0"
531
500k
  /* 3915 */ "lduminal\t\0"
532
500k
  /* 3925 */ "caspal\t\0"
533
500k
  /* 3933 */ "swpal\t\0"
534
500k
  /* 3940 */ "ldclral\t\0"
535
500k
  /* 3949 */ "ldeoral\t\0"
536
500k
  /* 3958 */ "casal\t\0"
537
500k
  /* 3965 */ "ldsetal\t\0"
538
500k
  /* 3974 */ "ldsmaxal\t\0"
539
500k
  /* 3984 */ "ldumaxal\t\0"
540
500k
  /* 3994 */ "tbl\t\0"
541
500k
  /* 3999 */ "smsubl\t\0"
542
500k
  /* 4007 */ "umsubl\t\0"
543
500k
  /* 4015 */ "ssubl\t\0"
544
500k
  /* 4022 */ "usubl\t\0"
545
500k
  /* 4029 */ "sabdl\t\0"
546
500k
  /* 4036 */ "uabdl\t\0"
547
500k
  /* 4043 */ "ldaddl\t\0"
548
500k
  /* 4051 */ "smaddl\t\0"
549
500k
  /* 4059 */ "umaddl\t\0"
550
500k
  /* 4067 */ "saddl\t\0"
551
500k
  /* 4074 */ "uaddl\t\0"
552
500k
  /* 4081 */ "tcancel\t\0"
553
500k
  /* 4090 */ "fcsel\t\0"
554
500k
  /* 4097 */ "psel\t\0"
555
500k
  /* 4103 */ "ftssel\t\0"
556
500k
  /* 4111 */ "sqshl\t\0"
557
500k
  /* 4118 */ "uqshl\t\0"
558
500k
  /* 4125 */ "sqrshl\t\0"
559
500k
  /* 4133 */ "uqrshl\t\0"
560
500k
  /* 4141 */ "srshl\t\0"
561
500k
  /* 4148 */ "urshl\t\0"
562
500k
  /* 4155 */ "sshl\t\0"
563
500k
  /* 4161 */ "ushl\t\0"
564
500k
  /* 4167 */ "sshll\t\0"
565
500k
  /* 4174 */ "ushll\t\0"
566
500k
  /* 4181 */ "sqdmull\t\0"
567
500k
  /* 4190 */ "pmull\t\0"
568
500k
  /* 4197 */ "smull\t\0"
569
500k
  /* 4204 */ "umull\t\0"
570
500k
  /* 4211 */ "ldsminl\t\0"
571
500k
  /* 4220 */ "lduminl\t\0"
572
500k
  /* 4229 */ "addpl\t\0"
573
500k
  /* 4236 */ "caspl\t\0"
574
500k
  /* 4243 */ "swpl\t\0"
575
500k
  /* 4249 */ "ldclrl\t\0"
576
500k
  /* 4257 */ "ldeorl\t\0"
577
500k
  /* 4265 */ "casl\t\0"
578
500k
  /* 4271 */ "nbsl\t\0"
579
500k
  /* 4277 */ "sqdmlsl\t\0"
580
500k
  /* 4286 */ "fmlsl\t\0"
581
500k
  /* 4293 */ "smlsl\t\0"
582
500k
  /* 4300 */ "umlsl\t\0"
583
500k
  /* 4307 */ "sysl\t\0"
584
500k
  /* 4313 */ "ldsetl\t\0"
585
500k
  /* 4321 */ "fcvtl\t\0"
586
500k
  /* 4328 */ "fmul\t\0"
587
500k
  /* 4334 */ "fnmul\t\0"
588
500k
  /* 4341 */ "pmul\t\0"
589
500k
  /* 4347 */ "ftsmul\t\0"
590
500k
  /* 4355 */ "addvl\t\0"
591
500k
  /* 4362 */ "rdvl\t\0"
592
500k
  /* 4368 */ "ldsmaxl\t\0"
593
500k
  /* 4377 */ "ldumaxl\t\0"
594
500k
  /* 4386 */ "sha1m\t\0"
595
500k
  /* 4393 */ "sbfm\t\0"
596
500k
  /* 4399 */ "ubfm\t\0"
597
500k
  /* 4405 */ "prfm\t\0"
598
500k
  /* 4411 */ "ldgm\t\0"
599
500k
  /* 4417 */ "stgm\t\0"
600
500k
  /* 4423 */ "stzgm\t\0"
601
500k
  /* 4430 */ "fminnm\t\0"
602
500k
  /* 4438 */ "fmaxnm\t\0"
603
500k
  /* 4446 */ "dupm\t\0"
604
500k
  /* 4452 */ "frintm\t\0"
605
500k
  /* 4460 */ "prfum\t\0"
606
500k
  /* 4467 */ "bsl1n\t\0"
607
500k
  /* 4474 */ "bsl2n\t\0"
608
500k
  /* 4481 */ "rsubhn\t\0"
609
500k
  /* 4489 */ "raddhn\t\0"
610
500k
  /* 4497 */ "fmin\t\0"
611
500k
  /* 4503 */ "ldsmin\t\0"
612
500k
  /* 4511 */ "ldumin\t\0"
613
500k
  /* 4519 */ "brkn\t\0"
614
500k
  /* 4525 */ "ccmn\t\0"
615
500k
  /* 4531 */ "eon\t\0"
616
500k
  /* 4536 */ "sqshrn\t\0"
617
500k
  /* 4544 */ "uqshrn\t\0"
618
500k
  /* 4552 */ "sqrshrn\t\0"
619
500k
  /* 4561 */ "uqrshrn\t\0"
620
500k
  /* 4570 */ "orn\t\0"
621
500k
  /* 4575 */ "frintn\t\0"
622
500k
  /* 4583 */ "bfcvtn\t\0"
623
500k
  /* 4591 */ "sqxtn\t\0"
624
500k
  /* 4598 */ "uqxtn\t\0"
625
500k
  /* 4605 */ "sqshrun\t\0"
626
500k
  /* 4614 */ "sqrshrun\t\0"
627
500k
  /* 4624 */ "sqxtun\t\0"
628
500k
  /* 4632 */ "movn\t\0"
629
500k
  /* 4638 */ "fcvtxn\t\0"
630
500k
  /* 4646 */ "whilelo\t\0"
631
500k
  /* 4655 */ "punpklo\t\0"
632
500k
  /* 4664 */ "sunpklo\t\0"
633
500k
  /* 4673 */ "uunpklo\t\0"
634
500k
  /* 4682 */ "cmplo\t\0"
635
500k
  /* 4689 */ "zero\t\0"
636
500k
  /* 4695 */ "fcmuo\t\0"
637
500k
  /* 4702 */ "sha1p\t\0"
638
500k
  /* 4709 */ "subp\t\0"
639
500k
  /* 4715 */ "sqdecp\t\0"
640
500k
  /* 4723 */ "uqdecp\t\0"
641
500k
  /* 4731 */ "sqincp\t\0"
642
500k
  /* 4739 */ "uqincp\t\0"
643
500k
  /* 4747 */ "faddp\t\0"
644
500k
  /* 4754 */ "ldp\t\0"
645
500k
  /* 4759 */ "bdep\t\0"
646
500k
  /* 4765 */ "stgp\t\0"
647
500k
  /* 4771 */ "sadalp\t\0"
648
500k
  /* 4779 */ "uadalp\t\0"
649
500k
  /* 4787 */ "saddlp\t\0"
650
500k
  /* 4795 */ "uaddlp\t\0"
651
500k
  /* 4803 */ "sclamp\t\0"
652
500k
  /* 4811 */ "uclamp\t\0"
653
500k
  /* 4819 */ "fccmp\t\0"
654
500k
  /* 4826 */ "fcmp\t\0"
655
500k
  /* 4832 */ "fminnmp\t\0"
656
500k
  /* 4841 */ "fmaxnmp\t\0"
657
500k
  /* 4850 */ "ldnp\t\0"
658
500k
  /* 4856 */ "fminp\t\0"
659
500k
  /* 4863 */ "sminp\t\0"
660
500k
  /* 4870 */ "uminp\t\0"
661
500k
  /* 4877 */ "stnp\t\0"
662
500k
  /* 4883 */ "adrp\t\0"
663
500k
  /* 4889 */ "bgrp\t\0"
664
500k
  /* 4895 */ "casp\t\0"
665
500k
  /* 4901 */ "cntp\t\0"
666
500k
  /* 4907 */ "frintp\t\0"
667
500k
  /* 4915 */ "stp\t\0"
668
500k
  /* 4920 */ "fdup\t\0"
669
500k
  /* 4926 */ "swp\t\0"
670
500k
  /* 4931 */ "ldaxp\t\0"
671
500k
  /* 4938 */ "fmaxp\t\0"
672
500k
  /* 4945 */ "smaxp\t\0"
673
500k
  /* 4952 */ "umaxp\t\0"
674
500k
  /* 4959 */ "ldxp\t\0"
675
500k
  /* 4965 */ "stlxp\t\0"
676
500k
  /* 4972 */ "stxp\t\0"
677
500k
  /* 4978 */ "fcmeq\t\0"
678
500k
  /* 4985 */ "ctermeq\t\0"
679
500k
  /* 4994 */ "cmpeq\t\0"
680
500k
  /* 5001 */ "ld1r\t\0"
681
500k
  /* 5007 */ "ld2r\t\0"
682
500k
  /* 5013 */ "ld3r\t\0"
683
500k
  /* 5019 */ "ld4r\t\0"
684
500k
  /* 5025 */ "ldar\t\0"
685
500k
  /* 5031 */ "ldlar\t\0"
686
500k
  /* 5038 */ "xar\t\0"
687
500k
  /* 5043 */ "fsubr\t\0"
688
500k
  /* 5050 */ "shsubr\t\0"
689
500k
  /* 5058 */ "uhsubr\t\0"
690
500k
  /* 5066 */ "sqsubr\t\0"
691
500k
  /* 5074 */ "uqsubr\t\0"
692
500k
  /* 5082 */ "adr\t\0"
693
500k
  /* 5087 */ "ldr\t\0"
694
500k
  /* 5092 */ "rdffr\t\0"
695
500k
  /* 5099 */ "wrffr\t\0"
696
500k
  /* 5106 */ "srshr\t\0"
697
500k
  /* 5113 */ "urshr\t\0"
698
500k
  /* 5120 */ "sshr\t\0"
699
500k
  /* 5126 */ "ushr\t\0"
700
500k
  /* 5132 */ "blr\t\0"
701
500k
  /* 5137 */ "ldclr\t\0"
702
500k
  /* 5144 */ "sqshlr\t\0"
703
500k
  /* 5152 */ "uqshlr\t\0"
704
500k
  /* 5160 */ "sqrshlr\t\0"
705
500k
  /* 5169 */ "uqrshlr\t\0"
706
500k
  /* 5178 */ "srshlr\t\0"
707
500k
  /* 5186 */ "urshlr\t\0"
708
500k
  /* 5194 */ "stllr\t\0"
709
500k
  /* 5201 */ "lslr\t\0"
710
500k
  /* 5207 */ "stlr\t\0"
711
500k
  /* 5213 */ "ldeor\t\0"
712
500k
  /* 5220 */ "nor\t\0"
713
500k
  /* 5225 */ "ror\t\0"
714
500k
  /* 5230 */ "ldapr\t\0"
715
500k
  /* 5237 */ "orr\t\0"
716
500k
  /* 5242 */ "asrr\t\0"
717
500k
  /* 5248 */ "lsrr\t\0"
718
500k
  /* 5254 */ "asr\t\0"
719
500k
  /* 5259 */ "lsr\t\0"
720
500k
  /* 5264 */ "msr\t\0"
721
500k
  /* 5269 */ "insr\t\0"
722
500k
  /* 5275 */ "ldtr\t\0"
723
500k
  /* 5281 */ "str\t\0"
724
500k
  /* 5286 */ "sttr\t\0"
725
500k
  /* 5292 */ "extr\t\0"
726
500k
  /* 5298 */ "ldur\t\0"
727
500k
  /* 5304 */ "stlur\t\0"
728
500k
  /* 5311 */ "ldapur\t\0"
729
500k
  /* 5319 */ "stur\t\0"
730
500k
  /* 5325 */ "fdivr\t\0"
731
500k
  /* 5332 */ "sdivr\t\0"
732
500k
  /* 5339 */ "udivr\t\0"
733
500k
  /* 5346 */ "whilewr\t\0"
734
500k
  /* 5355 */ "ldaxr\t\0"
735
500k
  /* 5362 */ "ldxr\t\0"
736
500k
  /* 5368 */ "stlxr\t\0"
737
500k
  /* 5375 */ "stxr\t\0"
738
500k
  /* 5381 */ "cas\t\0"
739
500k
  /* 5386 */ "brkas\t\0"
740
500k
  /* 5393 */ "brkpas\t\0"
741
500k
  /* 5401 */ "fcvtas\t\0"
742
500k
  /* 5409 */ "fabs\t\0"
743
500k
  /* 5415 */ "sqabs\t\0"
744
500k
  /* 5422 */ "brkbs\t\0"
745
500k
  /* 5429 */ "brkpbs\t\0"
746
500k
  /* 5437 */ "subs\t\0"
747
500k
  /* 5443 */ "sbcs\t\0"
748
500k
  /* 5449 */ "adcs\t\0"
749
500k
  /* 5455 */ "bics\t\0"
750
500k
  /* 5461 */ "adds\t\0"
751
500k
  /* 5467 */ "nands\t\0"
752
500k
  /* 5474 */ "ptrues\t\0"
753
500k
  /* 5482 */ "whilehs\t\0"
754
500k
  /* 5491 */ "cmhs\t\0"
755
500k
  /* 5497 */ "cmphs\t\0"
756
500k
  /* 5504 */ "cls\t\0"
757
500k
  /* 5509 */ "whilels\t\0"
758
500k
  /* 5518 */ "fmls\t\0"
759
500k
  /* 5524 */ "fnmls\t\0"
760
500k
  /* 5531 */ "cmpls\t\0"
761
500k
  /* 5538 */ "fcvtms\t\0"
762
500k
  /* 5546 */ "ins\t\0"
763
500k
  /* 5551 */ "brkns\t\0"
764
500k
  /* 5558 */ "orns\t\0"
765
500k
  /* 5564 */ "fcvtns\t\0"
766
500k
  /* 5572 */ "subps\t\0"
767
500k
  /* 5579 */ "frecps\t\0"
768
500k
  /* 5587 */ "bfmops\t\0"
769
500k
  /* 5595 */ "usmops\t\0"
770
500k
  /* 5603 */ "sumops\t\0"
771
500k
  /* 5611 */ "fcvtps\t\0"
772
500k
  /* 5619 */ "rdffrs\t\0"
773
500k
  /* 5627 */ "mrs\t\0"
774
500k
  /* 5632 */ "eors\t\0"
775
500k
  /* 5638 */ "nors\t\0"
776
500k
  /* 5644 */ "orrs\t\0"
777
500k
  /* 5650 */ "frsqrts\t\0"
778
500k
  /* 5659 */ "sys\t\0"
779
500k
  /* 5664 */ "fcvtzs\t\0"
780
500k
  /* 5672 */ "fjcvtzs\t\0"
781
500k
  /* 5681 */ "sqdmlalbt\t\0"
782
500k
  /* 5692 */ "ssublbt\t\0"
783
500k
  /* 5701 */ "saddlbt\t\0"
784
500k
  /* 5710 */ "sqdmlslbt\t\0"
785
500k
  /* 5721 */ "eorbt\t\0"
786
500k
  /* 5728 */ "compact\t\0"
787
500k
  /* 5737 */ "wfet\t\0"
788
500k
  /* 5743 */ "ret\t\0"
789
500k
  /* 5748 */ "ldset\t\0"
790
500k
  /* 5755 */ "facgt\t\0"
791
500k
  /* 5762 */ "whilegt\t\0"
792
500k
  /* 5771 */ "fcmgt\t\0"
793
500k
  /* 5778 */ "cmpgt\t\0"
794
500k
  /* 5785 */ "rbit\t\0"
795
500k
  /* 5791 */ "wfit\t\0"
796
500k
  /* 5797 */ "sabalt\t\0"
797
500k
  /* 5805 */ "uabalt\t\0"
798
500k
  /* 5813 */ "sqdmlalt\t\0"
799
500k
  /* 5823 */ "bfmlalt\t\0"
800
500k
  /* 5832 */ "smlalt\t\0"
801
500k
  /* 5840 */ "umlalt\t\0"
802
500k
  /* 5848 */ "ssublt\t\0"
803
500k
  /* 5856 */ "usublt\t\0"
804
500k
  /* 5864 */ "sbclt\t\0"
805
500k
  /* 5871 */ "adclt\t\0"
806
500k
  /* 5878 */ "sabdlt\t\0"
807
500k
  /* 5886 */ "uabdlt\t\0"
808
500k
  /* 5894 */ "saddlt\t\0"
809
500k
  /* 5902 */ "uaddlt\t\0"
810
500k
  /* 5910 */ "whilelt\t\0"
811
500k
  /* 5919 */ "hlt\t\0"
812
500k
  /* 5924 */ "sshllt\t\0"
813
500k
  /* 5932 */ "ushllt\t\0"
814
500k
  /* 5940 */ "sqdmullt\t\0"
815
500k
  /* 5950 */ "pmullt\t\0"
816
500k
  /* 5958 */ "smullt\t\0"
817
500k
  /* 5966 */ "umullt\t\0"
818
500k
  /* 5974 */ "fcmlt\t\0"
819
500k
  /* 5981 */ "cmplt\t\0"
820
500k
  /* 5988 */ "sqdmlslt\t\0"
821
500k
  /* 5998 */ "fmlslt\t\0"
822
500k
  /* 6006 */ "smlslt\t\0"
823
500k
  /* 6014 */ "umlslt\t\0"
824
500k
  /* 6022 */ "fcvtlt\t\0"
825
500k
  /* 6030 */ "histcnt\t\0"
826
500k
  /* 6039 */ "rsubhnt\t\0"
827
500k
  /* 6048 */ "raddhnt\t\0"
828
500k
  /* 6057 */ "hint\t\0"
829
500k
  /* 6063 */ "sqshrnt\t\0"
830
500k
  /* 6072 */ "uqshrnt\t\0"
831
500k
  /* 6081 */ "sqrshrnt\t\0"
832
500k
  /* 6091 */ "uqrshrnt\t\0"
833
500k
  /* 6101 */ "bfcvtnt\t\0"
834
500k
  /* 6110 */ "sqxtnt\t\0"
835
500k
  /* 6118 */ "uqxtnt\t\0"
836
500k
  /* 6126 */ "sqshrunt\t\0"
837
500k
  /* 6136 */ "sqrshrunt\t\0"
838
500k
  /* 6147 */ "sqxtunt\t\0"
839
500k
  /* 6156 */ "fcvtxnt\t\0"
840
500k
  /* 6165 */ "cdot\t\0"
841
500k
  /* 6171 */ "bfdot\t\0"
842
500k
  /* 6178 */ "usdot\t\0"
843
500k
  /* 6185 */ "sudot\t\0"
844
500k
  /* 6192 */ "cnot\t\0"
845
500k
  /* 6198 */ "tstart\t\0"
846
500k
  /* 6206 */ "fsqrt\t\0"
847
500k
  /* 6213 */ "ptest\t\0"
848
500k
  /* 6220 */ "ttest\t\0"
849
500k
  /* 6227 */ "pfirst\t\0"
850
500k
  /* 6235 */ "cmtst\t\0"
851
500k
  /* 6242 */ "bfcvt\t\0"
852
500k
  /* 6249 */ "ssubwt\t\0"
853
500k
  /* 6257 */ "usubwt\t\0"
854
500k
  /* 6265 */ "saddwt\t\0"
855
500k
  /* 6273 */ "uaddwt\t\0"
856
500k
  /* 6281 */ "bext\t\0"
857
500k
  /* 6287 */ "pnext\t\0"
858
500k
  /* 6294 */ "fcvtau\t\0"
859
500k
  /* 6302 */ "sqshlu\t\0"
860
500k
  /* 6310 */ "fcvtmu\t\0"
861
500k
  /* 6318 */ "fcvtnu\t\0"
862
500k
  /* 6326 */ "fcvtpu\t\0"
863
500k
  /* 6334 */ "fcvtzu\t\0"
864
500k
  /* 6342 */ "st64bv\t\0"
865
500k
  /* 6350 */ "faddv\t\0"
866
500k
  /* 6357 */ "saddv\t\0"
867
500k
  /* 6364 */ "uaddv\t\0"
868
500k
  /* 6371 */ "andv\t\0"
869
500k
  /* 6377 */ "rev\t\0"
870
500k
  /* 6382 */ "fdiv\t\0"
871
500k
  /* 6388 */ "sdiv\t\0"
872
500k
  /* 6394 */ "udiv\t\0"
873
500k
  /* 6400 */ "saddlv\t\0"
874
500k
  /* 6408 */ "uaddlv\t\0"
875
500k
  /* 6416 */ "fminnmv\t\0"
876
500k
  /* 6425 */ "fmaxnmv\t\0"
877
500k
  /* 6434 */ "fminv\t\0"
878
500k
  /* 6441 */ "sminv\t\0"
879
500k
  /* 6448 */ "uminv\t\0"
880
500k
  /* 6455 */ "csinv\t\0"
881
500k
  /* 6462 */ "fmov\t\0"
882
500k
  /* 6468 */ "smov\t\0"
883
500k
  /* 6474 */ "umov\t\0"
884
500k
  /* 6480 */ "eorv\t\0"
885
500k
  /* 6486 */ "fmaxv\t\0"
886
500k
  /* 6493 */ "smaxv\t\0"
887
500k
  /* 6500 */ "umaxv\t\0"
888
500k
  /* 6507 */ "ld1w\t\0"
889
500k
  /* 6513 */ "ldff1w\t\0"
890
500k
  /* 6521 */ "ldnf1w\t\0"
891
500k
  /* 6529 */ "ldnt1w\t\0"
892
500k
  /* 6537 */ "stnt1w\t\0"
893
500k
  /* 6545 */ "st1w\t\0"
894
500k
  /* 6551 */ "crc32w\t\0"
895
500k
  /* 6559 */ "ld2w\t\0"
896
500k
  /* 6565 */ "st2w\t\0"
897
500k
  /* 6571 */ "ld3w\t\0"
898
500k
  /* 6577 */ "st3w\t\0"
899
500k
  /* 6583 */ "ld4w\t\0"
900
500k
  /* 6589 */ "st4w\t\0"
901
500k
  /* 6595 */ "ssubw\t\0"
902
500k
  /* 6602 */ "usubw\t\0"
903
500k
  /* 6609 */ "crc32cw\t\0"
904
500k
  /* 6618 */ "sqdecw\t\0"
905
500k
  /* 6626 */ "uqdecw\t\0"
906
500k
  /* 6634 */ "sqincw\t\0"
907
500k
  /* 6642 */ "uqincw\t\0"
908
500k
  /* 6650 */ "saddw\t\0"
909
500k
  /* 6657 */ "uaddw\t\0"
910
500k
  /* 6664 */ "prfw\t\0"
911
500k
  /* 6670 */ "ld1row\t\0"
912
500k
  /* 6678 */ "ld1rqw\t\0"
913
500k
  /* 6686 */ "ld1rw\t\0"
914
500k
  /* 6693 */ "whilerw\t\0"
915
500k
  /* 6702 */ "ld1sw\t\0"
916
500k
  /* 6709 */ "ldff1sw\t\0"
917
500k
  /* 6718 */ "ldnf1sw\t\0"
918
500k
  /* 6727 */ "ldnt1sw\t\0"
919
500k
  /* 6736 */ "ldpsw\t\0"
920
500k
  /* 6743 */ "ld1rsw\t\0"
921
500k
  /* 6751 */ "ldrsw\t\0"
922
500k
  /* 6758 */ "ldtrsw\t\0"
923
500k
  /* 6766 */ "ldursw\t\0"
924
500k
  /* 6774 */ "ldapursw\t\0"
925
500k
  /* 6784 */ "cntw\t\0"
926
500k
  /* 6790 */ "sxtw\t\0"
927
500k
  /* 6796 */ "uxtw\t\0"
928
500k
  /* 6802 */ "revw\t\0"
929
500k
  /* 6808 */ "crc32x\t\0"
930
500k
  /* 6816 */ "frint32x\t\0"
931
500k
  /* 6826 */ "frint64x\t\0"
932
500k
  /* 6836 */ "bcax\t\0"
933
500k
  /* 6842 */ "fmax\t\0"
934
500k
  /* 6848 */ "ldsmax\t\0"
935
500k
  /* 6856 */ "ldumax\t\0"
936
500k
  /* 6864 */ "tbx\t\0"
937
500k
  /* 6869 */ "crc32cx\t\0"
938
500k
  /* 6878 */ "index\t\0"
939
500k
  /* 6885 */ "clrex\t\0"
940
500k
  /* 6892 */ "movprfx\t\0"
941
500k
  /* 6901 */ "fmulx\t\0"
942
500k
  /* 6908 */ "frecpx\t\0"
943
500k
  /* 6916 */ "frintx\t\0"
944
500k
  /* 6924 */ "fcvtx\t\0"
945
500k
  /* 6931 */ "sm4ekey\t\0"
946
500k
  /* 6940 */ "fcpy\t\0"
947
500k
  /* 6946 */ "frint32z\t\0"
948
500k
  /* 6956 */ "frint64z\t\0"
949
500k
  /* 6966 */ "braaz\t\0"
950
500k
  /* 6973 */ "blraaz\t\0"
951
500k
  /* 6981 */ "brabz\t\0"
952
500k
  /* 6988 */ "blrabz\t\0"
953
500k
  /* 6996 */ "cbz\t\0"
954
500k
  /* 7001 */ "tbz\t\0"
955
500k
  /* 7006 */ "clz\t\0"
956
500k
  /* 7011 */ "cbnz\t\0"
957
500k
  /* 7017 */ "tbnz\t\0"
958
500k
  /* 7023 */ "frintz\t\0"
959
500k
  /* 7031 */ "movz\t\0"
960
500k
  /* 7037 */ ".tlsdesccall \0"
961
500k
  /* 7051 */ "# XRay Function Patchable RET.\0"
962
500k
  /* 7082 */ "b.\0"
963
500k
  /* 7085 */ "bc.\0"
964
500k
  /* 7089 */ "# XRay Typed Event Log.\0"
965
500k
  /* 7113 */ "# XRay Custom Event Log.\0"
966
500k
  /* 7138 */ "# XRay Function Enter.\0"
967
500k
  /* 7161 */ "# XRay Tail Call Exit.\0"
968
500k
  /* 7184 */ "# XRay Function Exit.\0"
969
500k
  /* 7206 */ "hint\t#10\0"
970
500k
  /* 7215 */ "hint\t#30\0"
971
500k
  /* 7224 */ "hint\t#31\0"
972
500k
  /* 7233 */ "hint\t#12\0"
973
500k
  /* 7242 */ "hint\t#14\0"
974
500k
  /* 7251 */ "hint\t#24\0"
975
500k
  /* 7260 */ "hint\t#25\0"
976
500k
  /* 7269 */ "hint\t#26\0"
977
500k
  /* 7278 */ "hint\t#7\0"
978
500k
  /* 7286 */ "hint\t#27\0"
979
500k
  /* 7295 */ "hint\t#8\0"
980
500k
  /* 7303 */ "hint\t#28\0"
981
500k
  /* 7312 */ "hint\t#29\0"
982
500k
  /* 7321 */ "LIFETIME_END\0"
983
500k
  /* 7334 */ "PSEUDO_PROBE\0"
984
500k
  /* 7347 */ "BUNDLE\0"
985
500k
  /* 7354 */ "DBG_VALUE\0"
986
500k
  /* 7364 */ "DBG_INSTR_REF\0"
987
500k
  /* 7378 */ "DBG_PHI\0"
988
500k
  /* 7386 */ "DBG_LABEL\0"
989
500k
  /* 7396 */ "LIFETIME_START\0"
990
500k
  /* 7411 */ "DBG_VALUE_LIST\0"
991
500k
  /* 7426 */ "cpyfe\t[\0"
992
500k
  /* 7434 */ "setge\t[\0"
993
500k
  /* 7442 */ "sete\t[\0"
994
500k
  /* 7449 */ "cpye\t[\0"
995
500k
  /* 7456 */ "cpyfm\t[\0"
996
500k
  /* 7464 */ "setgm\t[\0"
997
500k
  /* 7472 */ "setm\t[\0"
998
500k
  /* 7479 */ "cpym\t[\0"
999
500k
  /* 7486 */ "cpyfen\t[\0"
1000
500k
  /* 7495 */ "setgen\t[\0"
1001
500k
  /* 7504 */ "seten\t[\0"
1002
500k
  /* 7512 */ "cpyen\t[\0"
1003
500k
  /* 7520 */ "cpyfmn\t[\0"
1004
500k
  /* 7529 */ "setgmn\t[\0"
1005
500k
  /* 7538 */ "setmn\t[\0"
1006
500k
  /* 7546 */ "cpymn\t[\0"
1007
500k
  /* 7554 */ "cpyfpn\t[\0"
1008
500k
  /* 7563 */ "setgpn\t[\0"
1009
500k
  /* 7572 */ "setpn\t[\0"
1010
500k
  /* 7580 */ "cpypn\t[\0"
1011
500k
  /* 7588 */ "cpyfern\t[\0"
1012
500k
  /* 7598 */ "cpyern\t[\0"
1013
500k
  /* 7607 */ "cpyfmrn\t[\0"
1014
500k
  /* 7617 */ "cpymrn\t[\0"
1015
500k
  /* 7626 */ "cpyfprn\t[\0"
1016
500k
  /* 7636 */ "cpyprn\t[\0"
1017
500k
  /* 7645 */ "cpyfetrn\t[\0"
1018
500k
  /* 7656 */ "cpyetrn\t[\0"
1019
500k
  /* 7666 */ "cpyfmtrn\t[\0"
1020
500k
  /* 7677 */ "cpymtrn\t[\0"
1021
500k
  /* 7687 */ "cpyfptrn\t[\0"
1022
500k
  /* 7698 */ "cpyptrn\t[\0"
1023
500k
  /* 7708 */ "cpyfertrn\t[\0"
1024
500k
  /* 7720 */ "cpyertrn\t[\0"
1025
500k
  /* 7731 */ "cpyfmrtrn\t[\0"
1026
500k
  /* 7743 */ "cpymrtrn\t[\0"
1027
500k
  /* 7754 */ "cpyfprtrn\t[\0"
1028
500k
  /* 7766 */ "cpyprtrn\t[\0"
1029
500k
  /* 7777 */ "cpyfewtrn\t[\0"
1030
500k
  /* 7789 */ "cpyewtrn\t[\0"
1031
500k
  /* 7800 */ "cpyfmwtrn\t[\0"
1032
500k
  /* 7812 */ "cpymwtrn\t[\0"
1033
500k
  /* 7823 */ "cpyfpwtrn\t[\0"
1034
500k
  /* 7835 */ "cpypwtrn\t[\0"
1035
500k
  /* 7846 */ "cpyfetn\t[\0"
1036
500k
  /* 7856 */ "setgetn\t[\0"
1037
500k
  /* 7866 */ "setetn\t[\0"
1038
500k
  /* 7875 */ "cpyetn\t[\0"
1039
500k
  /* 7884 */ "cpyfmtn\t[\0"
1040
500k
  /* 7894 */ "setgmtn\t[\0"
1041
500k
  /* 7904 */ "setmtn\t[\0"
1042
500k
  /* 7913 */ "cpymtn\t[\0"
1043
500k
  /* 7922 */ "cpyfptn\t[\0"
1044
500k
  /* 7932 */ "setgptn\t[\0"
1045
500k
  /* 7942 */ "setptn\t[\0"
1046
500k
  /* 7951 */ "cpyptn\t[\0"
1047
500k
  /* 7960 */ "cpyfertn\t[\0"
1048
500k
  /* 7971 */ "cpyertn\t[\0"
1049
500k
  /* 7981 */ "cpyfmrtn\t[\0"
1050
500k
  /* 7992 */ "cpymrtn\t[\0"
1051
500k
  /* 8002 */ "cpyfprtn\t[\0"
1052
500k
  /* 8013 */ "cpyprtn\t[\0"
1053
500k
  /* 8023 */ "cpyfewtn\t[\0"
1054
500k
  /* 8034 */ "cpyewtn\t[\0"
1055
500k
  /* 8044 */ "cpyfmwtn\t[\0"
1056
500k
  /* 8055 */ "cpymwtn\t[\0"
1057
500k
  /* 8065 */ "cpyfpwtn\t[\0"
1058
500k
  /* 8076 */ "cpypwtn\t[\0"
1059
500k
  /* 8086 */ "cpyfewn\t[\0"
1060
500k
  /* 8096 */ "cpyewn\t[\0"
1061
500k
  /* 8105 */ "cpyfmwn\t[\0"
1062
500k
  /* 8115 */ "cpymwn\t[\0"
1063
500k
  /* 8124 */ "cpyfpwn\t[\0"
1064
500k
  /* 8134 */ "cpypwn\t[\0"
1065
500k
  /* 8143 */ "cpyfetwn\t[\0"
1066
500k
  /* 8154 */ "cpyetwn\t[\0"
1067
500k
  /* 8164 */ "cpyfmtwn\t[\0"
1068
500k
  /* 8175 */ "cpymtwn\t[\0"
1069
500k
  /* 8185 */ "cpyfptwn\t[\0"
1070
500k
  /* 8196 */ "cpyptwn\t[\0"
1071
500k
  /* 8206 */ "cpyfertwn\t[\0"
1072
500k
  /* 8218 */ "cpyertwn\t[\0"
1073
500k
  /* 8229 */ "cpyfmrtwn\t[\0"
1074
500k
  /* 8241 */ "cpymrtwn\t[\0"
1075
500k
  /* 8252 */ "cpyfprtwn\t[\0"
1076
500k
  /* 8264 */ "cpyprtwn\t[\0"
1077
500k
  /* 8275 */ "cpyfewtwn\t[\0"
1078
500k
  /* 8287 */ "cpyewtwn\t[\0"
1079
500k
  /* 8298 */ "cpyfmwtwn\t[\0"
1080
500k
  /* 8310 */ "cpymwtwn\t[\0"
1081
500k
  /* 8321 */ "cpyfpwtwn\t[\0"
1082
500k
  /* 8333 */ "cpypwtwn\t[\0"
1083
500k
  /* 8344 */ "cpyfp\t[\0"
1084
500k
  /* 8352 */ "setgp\t[\0"
1085
500k
  /* 8360 */ "setp\t[\0"
1086
500k
  /* 8367 */ "cpyp\t[\0"
1087
500k
  /* 8374 */ "cpyfet\t[\0"
1088
500k
  /* 8383 */ "setget\t[\0"
1089
500k
  /* 8392 */ "setet\t[\0"
1090
500k
  /* 8400 */ "cpyet\t[\0"
1091
500k
  /* 8408 */ "cpyfmt\t[\0"
1092
500k
  /* 8417 */ "setgmt\t[\0"
1093
500k
  /* 8426 */ "setmt\t[\0"
1094
500k
  /* 8434 */ "cpymt\t[\0"
1095
500k
  /* 8442 */ "cpyfpt\t[\0"
1096
500k
  /* 8451 */ "setgpt\t[\0"
1097
500k
  /* 8460 */ "setpt\t[\0"
1098
500k
  /* 8468 */ "cpypt\t[\0"
1099
500k
  /* 8476 */ "cpyfert\t[\0"
1100
500k
  /* 8486 */ "cpyert\t[\0"
1101
500k
  /* 8495 */ "cpyfmrt\t[\0"
1102
500k
  /* 8505 */ "cpymrt\t[\0"
1103
500k
  /* 8514 */ "cpyfprt\t[\0"
1104
500k
  /* 8524 */ "cpyprt\t[\0"
1105
500k
  /* 8533 */ "cpyfewt\t[\0"
1106
500k
  /* 8543 */ "cpyewt\t[\0"
1107
500k
  /* 8552 */ "cpyfmwt\t[\0"
1108
500k
  /* 8562 */ "cpymwt\t[\0"
1109
500k
  /* 8571 */ "cpyfpwt\t[\0"
1110
500k
  /* 8581 */ "cpypwt\t[\0"
1111
500k
  /* 8590 */ "eretaa\0"
1112
500k
  /* 8597 */ "eretab\0"
1113
500k
  /* 8604 */ "sb\0"
1114
500k
  /* 8607 */ "xaflag\0"
1115
500k
  /* 8614 */ "axflag\0"
1116
500k
  /* 8621 */ "brb\tinj\0"
1117
500k
  /* 8629 */ "# FEntry call\0"
1118
500k
  /* 8643 */ "brb\tiall\0"
1119
500k
  /* 8652 */ "setffr\0"
1120
500k
  /* 8659 */ "drps\0"
1121
500k
  /* 8664 */ "eret\0"
1122
500k
  /* 8669 */ "tcommit\0"
1123
500k
  /* 8677 */ "cfinv\0"
1124
500k
  /* 8683 */ "ld1b\t{\0"
1125
500k
  /* 8690 */ "st1b\t{\0"
1126
500k
  /* 8697 */ "ld1d\t{\0"
1127
500k
  /* 8704 */ "st1d\t{\0"
1128
500k
  /* 8711 */ "ld1h\t{\0"
1129
500k
  /* 8718 */ "st1h\t{\0"
1130
500k
  /* 8725 */ "ld1q\t{\0"
1131
500k
  /* 8732 */ "st1q\t{\0"
1132
500k
  /* 8739 */ "ld1w\t{\0"
1133
500k
  /* 8746 */ "st1w\t{\0"
1134
500k
};
1135
500k
#endif
1136
1137
500k
#ifdef __GNUC__
1138
500k
#pragma GCC diagnostic pop
1139
500k
#endif
1140
1141
500k
  static const uint32_t OpInfo0[] = {
1142
500k
    0U, // PHI
1143
500k
    0U, // INLINEASM
1144
500k
    0U, // INLINEASM_BR
1145
500k
    0U, // CFI_INSTRUCTION
1146
500k
    0U, // EH_LABEL
1147
500k
    0U, // GC_LABEL
1148
500k
    0U, // ANNOTATION_LABEL
1149
500k
    0U, // KILL
1150
500k
    0U, // EXTRACT_SUBREG
1151
500k
    0U, // INSERT_SUBREG
1152
500k
    0U, // IMPLICIT_DEF
1153
500k
    0U, // SUBREG_TO_REG
1154
500k
    0U, // COPY_TO_REGCLASS
1155
500k
    7355U,  // DBG_VALUE
1156
500k
    7412U,  // DBG_VALUE_LIST
1157
500k
    7365U,  // DBG_INSTR_REF
1158
500k
    7379U,  // DBG_PHI
1159
500k
    7387U,  // DBG_LABEL
1160
500k
    0U, // REG_SEQUENCE
1161
500k
    0U, // COPY
1162
500k
    7348U,  // BUNDLE
1163
500k
    7397U,  // LIFETIME_START
1164
500k
    7322U,  // LIFETIME_END
1165
500k
    7335U,  // PSEUDO_PROBE
1166
500k
    0U, // ARITH_FENCE
1167
500k
    0U, // STACKMAP
1168
500k
    8630U,  // FENTRY_CALL
1169
500k
    0U, // PATCHPOINT
1170
500k
    0U, // LOAD_STACK_GUARD
1171
500k
    0U, // PREALLOCATED_SETUP
1172
500k
    0U, // PREALLOCATED_ARG
1173
500k
    0U, // STATEPOINT
1174
500k
    0U, // LOCAL_ESCAPE
1175
500k
    0U, // FAULTING_OP
1176
500k
    0U, // PATCHABLE_OP
1177
500k
    7139U,  // PATCHABLE_FUNCTION_ENTER
1178
500k
    7052U,  // PATCHABLE_RET
1179
500k
    7185U,  // PATCHABLE_FUNCTION_EXIT
1180
500k
    7162U,  // PATCHABLE_TAIL_CALL
1181
500k
    7114U,  // PATCHABLE_EVENT_CALL
1182
500k
    7090U,  // PATCHABLE_TYPED_EVENT_CALL
1183
500k
    0U, // ICALL_BRANCH_FUNNEL
1184
500k
    0U, // G_ASSERT_SEXT
1185
500k
    0U, // G_ASSERT_ZEXT
1186
500k
    0U, // G_ASSERT_ALIGN
1187
500k
    0U, // G_ADD
1188
500k
    0U, // G_SUB
1189
500k
    0U, // G_MUL
1190
500k
    0U, // G_SDIV
1191
500k
    0U, // G_UDIV
1192
500k
    0U, // G_SREM
1193
500k
    0U, // G_UREM
1194
500k
    0U, // G_SDIVREM
1195
500k
    0U, // G_UDIVREM
1196
500k
    0U, // G_AND
1197
500k
    0U, // G_OR
1198
500k
    0U, // G_XOR
1199
500k
    0U, // G_IMPLICIT_DEF
1200
500k
    0U, // G_PHI
1201
500k
    0U, // G_FRAME_INDEX
1202
500k
    0U, // G_GLOBAL_VALUE
1203
500k
    0U, // G_EXTRACT
1204
500k
    0U, // G_UNMERGE_VALUES
1205
500k
    0U, // G_INSERT
1206
500k
    0U, // G_MERGE_VALUES
1207
500k
    0U, // G_BUILD_VECTOR
1208
500k
    0U, // G_BUILD_VECTOR_TRUNC
1209
500k
    0U, // G_CONCAT_VECTORS
1210
500k
    0U, // G_PTRTOINT
1211
500k
    0U, // G_INTTOPTR
1212
500k
    0U, // G_BITCAST
1213
500k
    0U, // G_FREEZE
1214
500k
    0U, // G_INTRINSIC_TRUNC
1215
500k
    0U, // G_INTRINSIC_ROUND
1216
500k
    0U, // G_INTRINSIC_LRINT
1217
500k
    0U, // G_INTRINSIC_ROUNDEVEN
1218
500k
    0U, // G_READCYCLECOUNTER
1219
500k
    0U, // G_LOAD
1220
500k
    0U, // G_SEXTLOAD
1221
500k
    0U, // G_ZEXTLOAD
1222
500k
    0U, // G_INDEXED_LOAD
1223
500k
    0U, // G_INDEXED_SEXTLOAD
1224
500k
    0U, // G_INDEXED_ZEXTLOAD
1225
500k
    0U, // G_STORE
1226
500k
    0U, // G_INDEXED_STORE
1227
500k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
1228
500k
    0U, // G_ATOMIC_CMPXCHG
1229
500k
    0U, // G_ATOMICRMW_XCHG
1230
500k
    0U, // G_ATOMICRMW_ADD
1231
500k
    0U, // G_ATOMICRMW_SUB
1232
500k
    0U, // G_ATOMICRMW_AND
1233
500k
    0U, // G_ATOMICRMW_NAND
1234
500k
    0U, // G_ATOMICRMW_OR
1235
500k
    0U, // G_ATOMICRMW_XOR
1236
500k
    0U, // G_ATOMICRMW_MAX
1237
500k
    0U, // G_ATOMICRMW_MIN
1238
500k
    0U, // G_ATOMICRMW_UMAX
1239
500k
    0U, // G_ATOMICRMW_UMIN
1240
500k
    0U, // G_ATOMICRMW_FADD
1241
500k
    0U, // G_ATOMICRMW_FSUB
1242
500k
    0U, // G_FENCE
1243
500k
    0U, // G_BRCOND
1244
500k
    0U, // G_BRINDIRECT
1245
500k
    0U, // G_INTRINSIC
1246
500k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
1247
500k
    0U, // G_ANYEXT
1248
500k
    0U, // G_TRUNC
1249
500k
    0U, // G_CONSTANT
1250
500k
    0U, // G_FCONSTANT
1251
500k
    0U, // G_VASTART
1252
500k
    0U, // G_VAARG
1253
500k
    0U, // G_SEXT
1254
500k
    0U, // G_SEXT_INREG
1255
500k
    0U, // G_ZEXT
1256
500k
    0U, // G_SHL
1257
500k
    0U, // G_LSHR
1258
500k
    0U, // G_ASHR
1259
500k
    0U, // G_FSHL
1260
500k
    0U, // G_FSHR
1261
500k
    0U, // G_ROTR
1262
500k
    0U, // G_ROTL
1263
500k
    0U, // G_ICMP
1264
500k
    0U, // G_FCMP
1265
500k
    0U, // G_SELECT
1266
500k
    0U, // G_UADDO
1267
500k
    0U, // G_UADDE
1268
500k
    0U, // G_USUBO
1269
500k
    0U, // G_USUBE
1270
500k
    0U, // G_SADDO
1271
500k
    0U, // G_SADDE
1272
500k
    0U, // G_SSUBO
1273
500k
    0U, // G_SSUBE
1274
500k
    0U, // G_UMULO
1275
500k
    0U, // G_SMULO
1276
500k
    0U, // G_UMULH
1277
500k
    0U, // G_SMULH
1278
500k
    0U, // G_UADDSAT
1279
500k
    0U, // G_SADDSAT
1280
500k
    0U, // G_USUBSAT
1281
500k
    0U, // G_SSUBSAT
1282
500k
    0U, // G_USHLSAT
1283
500k
    0U, // G_SSHLSAT
1284
500k
    0U, // G_SMULFIX
1285
500k
    0U, // G_UMULFIX
1286
500k
    0U, // G_SMULFIXSAT
1287
500k
    0U, // G_UMULFIXSAT
1288
500k
    0U, // G_SDIVFIX
1289
500k
    0U, // G_UDIVFIX
1290
500k
    0U, // G_SDIVFIXSAT
1291
500k
    0U, // G_UDIVFIXSAT
1292
500k
    0U, // G_FADD
1293
500k
    0U, // G_FSUB
1294
500k
    0U, // G_FMUL
1295
500k
    0U, // G_FMA
1296
500k
    0U, // G_FMAD
1297
500k
    0U, // G_FDIV
1298
500k
    0U, // G_FREM
1299
500k
    0U, // G_FPOW
1300
500k
    0U, // G_FPOWI
1301
500k
    0U, // G_FEXP
1302
500k
    0U, // G_FEXP2
1303
500k
    0U, // G_FLOG
1304
500k
    0U, // G_FLOG2
1305
500k
    0U, // G_FLOG10
1306
500k
    0U, // G_FNEG
1307
500k
    0U, // G_FPEXT
1308
500k
    0U, // G_FPTRUNC
1309
500k
    0U, // G_FPTOSI
1310
500k
    0U, // G_FPTOUI
1311
500k
    0U, // G_SITOFP
1312
500k
    0U, // G_UITOFP
1313
500k
    0U, // G_FABS
1314
500k
    0U, // G_FCOPYSIGN
1315
500k
    0U, // G_FCANONICALIZE
1316
500k
    0U, // G_FMINNUM
1317
500k
    0U, // G_FMAXNUM
1318
500k
    0U, // G_FMINNUM_IEEE
1319
500k
    0U, // G_FMAXNUM_IEEE
1320
500k
    0U, // G_FMINIMUM
1321
500k
    0U, // G_FMAXIMUM
1322
500k
    0U, // G_PTR_ADD
1323
500k
    0U, // G_PTRMASK
1324
500k
    0U, // G_SMIN
1325
500k
    0U, // G_SMAX
1326
500k
    0U, // G_UMIN
1327
500k
    0U, // G_UMAX
1328
500k
    0U, // G_ABS
1329
500k
    0U, // G_LROUND
1330
500k
    0U, // G_LLROUND
1331
500k
    0U, // G_BR
1332
500k
    0U, // G_BRJT
1333
500k
    0U, // G_INSERT_VECTOR_ELT
1334
500k
    0U, // G_EXTRACT_VECTOR_ELT
1335
500k
    0U, // G_SHUFFLE_VECTOR
1336
500k
    0U, // G_CTTZ
1337
500k
    0U, // G_CTTZ_ZERO_UNDEF
1338
500k
    0U, // G_CTLZ
1339
500k
    0U, // G_CTLZ_ZERO_UNDEF
1340
500k
    0U, // G_CTPOP
1341
500k
    0U, // G_BSWAP
1342
500k
    0U, // G_BITREVERSE
1343
500k
    0U, // G_FCEIL
1344
500k
    0U, // G_FCOS
1345
500k
    0U, // G_FSIN
1346
500k
    0U, // G_FSQRT
1347
500k
    0U, // G_FFLOOR
1348
500k
    0U, // G_FRINT
1349
500k
    0U, // G_FNEARBYINT
1350
500k
    0U, // G_ADDRSPACE_CAST
1351
500k
    0U, // G_BLOCK_ADDR
1352
500k
    0U, // G_JUMP_TABLE
1353
500k
    0U, // G_DYN_STACKALLOC
1354
500k
    0U, // G_STRICT_FADD
1355
500k
    0U, // G_STRICT_FSUB
1356
500k
    0U, // G_STRICT_FMUL
1357
500k
    0U, // G_STRICT_FDIV
1358
500k
    0U, // G_STRICT_FREM
1359
500k
    0U, // G_STRICT_FMA
1360
500k
    0U, // G_STRICT_FSQRT
1361
500k
    0U, // G_READ_REGISTER
1362
500k
    0U, // G_WRITE_REGISTER
1363
500k
    0U, // G_MEMCPY
1364
500k
    0U, // G_MEMCPY_INLINE
1365
500k
    0U, // G_MEMMOVE
1366
500k
    0U, // G_MEMSET
1367
500k
    0U, // G_BZERO
1368
500k
    0U, // G_VECREDUCE_SEQ_FADD
1369
500k
    0U, // G_VECREDUCE_SEQ_FMUL
1370
500k
    0U, // G_VECREDUCE_FADD
1371
500k
    0U, // G_VECREDUCE_FMUL
1372
500k
    0U, // G_VECREDUCE_FMAX
1373
500k
    0U, // G_VECREDUCE_FMIN
1374
500k
    0U, // G_VECREDUCE_ADD
1375
500k
    0U, // G_VECREDUCE_MUL
1376
500k
    0U, // G_VECREDUCE_AND
1377
500k
    0U, // G_VECREDUCE_OR
1378
500k
    0U, // G_VECREDUCE_XOR
1379
500k
    0U, // G_VECREDUCE_SMAX
1380
500k
    0U, // G_VECREDUCE_SMIN
1381
500k
    0U, // G_VECREDUCE_UMAX
1382
500k
    0U, // G_VECREDUCE_UMIN
1383
500k
    0U, // G_SBFX
1384
500k
    0U, // G_UBFX
1385
500k
    0U, // ABS_ZPmZ_UNDEF_B
1386
500k
    0U, // ABS_ZPmZ_UNDEF_D
1387
500k
    0U, // ABS_ZPmZ_UNDEF_H
1388
500k
    0U, // ABS_ZPmZ_UNDEF_S
1389
500k
    0U, // ADDSWrr
1390
500k
    0U, // ADDSXrr
1391
500k
    0U, // ADDWrr
1392
500k
    0U, // ADDXrr
1393
500k
    0U, // ADD_ZPZZ_UNDEF_B
1394
500k
    0U, // ADD_ZPZZ_UNDEF_D
1395
500k
    0U, // ADD_ZPZZ_UNDEF_H
1396
500k
    0U, // ADD_ZPZZ_UNDEF_S
1397
500k
    0U, // ADD_ZPZZ_ZERO_B
1398
500k
    0U, // ADD_ZPZZ_ZERO_D
1399
500k
    0U, // ADD_ZPZZ_ZERO_H
1400
500k
    0U, // ADD_ZPZZ_ZERO_S
1401
500k
    0U, // ADDlowTLS
1402
500k
    0U, // ADJCALLSTACKDOWN
1403
500k
    0U, // ADJCALLSTACKUP
1404
500k
    0U, // AESIMCrrTied
1405
500k
    0U, // AESMCrrTied
1406
500k
    0U, // ANDSWrr
1407
500k
    0U, // ANDSXrr
1408
500k
    0U, // ANDWrr
1409
500k
    0U, // ANDXrr
1410
500k
    0U, // ASRD_ZPZI_ZERO_B
1411
500k
    0U, // ASRD_ZPZI_ZERO_D
1412
500k
    0U, // ASRD_ZPZI_ZERO_H
1413
500k
    0U, // ASRD_ZPZI_ZERO_S
1414
500k
    0U, // ASR_ZPZI_UNDEF_B
1415
500k
    0U, // ASR_ZPZI_UNDEF_D
1416
500k
    0U, // ASR_ZPZI_UNDEF_H
1417
500k
    0U, // ASR_ZPZI_UNDEF_S
1418
500k
    0U, // ASR_ZPZZ_UNDEF_B
1419
500k
    0U, // ASR_ZPZZ_UNDEF_D
1420
500k
    0U, // ASR_ZPZZ_UNDEF_H
1421
500k
    0U, // ASR_ZPZZ_UNDEF_S
1422
500k
    0U, // ASR_ZPZZ_ZERO_B
1423
500k
    0U, // ASR_ZPZZ_ZERO_D
1424
500k
    0U, // ASR_ZPZZ_ZERO_H
1425
500k
    0U, // ASR_ZPZZ_ZERO_S
1426
500k
    0U, // BICSWrr
1427
500k
    0U, // BICSXrr
1428
500k
    0U, // BICWrr
1429
500k
    0U, // BICXrr
1430
500k
    0U, // BLRNoIP
1431
500k
    0U, // BLR_BTI
1432
500k
    0U, // BLR_RVMARKER
1433
500k
    0U, // BSPv16i8
1434
500k
    0U, // BSPv8i8
1435
500k
    0U, // CATCHRET
1436
500k
    0U, // CLEANUPRET
1437
500k
    0U, // CLS_ZPmZ_UNDEF_B
1438
500k
    0U, // CLS_ZPmZ_UNDEF_D
1439
500k
    0U, // CLS_ZPmZ_UNDEF_H
1440
500k
    0U, // CLS_ZPmZ_UNDEF_S
1441
500k
    0U, // CLZ_ZPmZ_UNDEF_B
1442
500k
    0U, // CLZ_ZPmZ_UNDEF_D
1443
500k
    0U, // CLZ_ZPmZ_UNDEF_H
1444
500k
    0U, // CLZ_ZPmZ_UNDEF_S
1445
500k
    0U, // CMP_SWAP_128
1446
500k
    0U, // CMP_SWAP_128_ACQUIRE
1447
500k
    0U, // CMP_SWAP_128_MONOTONIC
1448
500k
    0U, // CMP_SWAP_128_RELEASE
1449
500k
    0U, // CMP_SWAP_16
1450
500k
    0U, // CMP_SWAP_32
1451
500k
    0U, // CMP_SWAP_64
1452
500k
    0U, // CMP_SWAP_8
1453
500k
    0U, // CNOT_ZPmZ_UNDEF_B
1454
500k
    0U, // CNOT_ZPmZ_UNDEF_D
1455
500k
    0U, // CNOT_ZPmZ_UNDEF_H
1456
500k
    0U, // CNOT_ZPmZ_UNDEF_S
1457
500k
    0U, // CNT_ZPmZ_UNDEF_B
1458
500k
    0U, // CNT_ZPmZ_UNDEF_D
1459
500k
    0U, // CNT_ZPmZ_UNDEF_H
1460
500k
    0U, // CNT_ZPmZ_UNDEF_S
1461
500k
    0U, // CompilerBarrier
1462
500k
    0U, // EMITBKEY
1463
500k
    0U, // EONWrr
1464
500k
    0U, // EONXrr
1465
500k
    0U, // EORWrr
1466
500k
    0U, // EORXrr
1467
500k
    0U, // F128CSEL
1468
500k
    0U, // FABD_ZPZZ_UNDEF_D
1469
500k
    0U, // FABD_ZPZZ_UNDEF_H
1470
500k
    0U, // FABD_ZPZZ_UNDEF_S
1471
500k
    0U, // FABD_ZPZZ_ZERO_D
1472
500k
    0U, // FABD_ZPZZ_ZERO_H
1473
500k
    0U, // FABD_ZPZZ_ZERO_S
1474
500k
    0U, // FABS_ZPmZ_UNDEF_D
1475
500k
    0U, // FABS_ZPmZ_UNDEF_H
1476
500k
    0U, // FABS_ZPmZ_UNDEF_S
1477
500k
    0U, // FADD_ZPZI_UNDEF_D
1478
500k
    0U, // FADD_ZPZI_UNDEF_H
1479
500k
    0U, // FADD_ZPZI_UNDEF_S
1480
500k
    0U, // FADD_ZPZI_ZERO_D
1481
500k
    0U, // FADD_ZPZI_ZERO_H
1482
500k
    0U, // FADD_ZPZI_ZERO_S
1483
500k
    0U, // FADD_ZPZZ_UNDEF_D
1484
500k
    0U, // FADD_ZPZZ_UNDEF_H
1485
500k
    0U, // FADD_ZPZZ_UNDEF_S
1486
500k
    0U, // FADD_ZPZZ_ZERO_D
1487
500k
    0U, // FADD_ZPZZ_ZERO_H
1488
500k
    0U, // FADD_ZPZZ_ZERO_S
1489
500k
    0U, // FCVTZS_ZPmZ_DtoD_UNDEF
1490
500k
    0U, // FCVTZS_ZPmZ_DtoS_UNDEF
1491
500k
    0U, // FCVTZS_ZPmZ_HtoD_UNDEF
1492
500k
    0U, // FCVTZS_ZPmZ_HtoH_UNDEF
1493
500k
    0U, // FCVTZS_ZPmZ_HtoS_UNDEF
1494
500k
    0U, // FCVTZS_ZPmZ_StoD_UNDEF
1495
500k
    0U, // FCVTZS_ZPmZ_StoS_UNDEF
1496
500k
    0U, // FCVTZU_ZPmZ_DtoD_UNDEF
1497
500k
    0U, // FCVTZU_ZPmZ_DtoS_UNDEF
1498
500k
    0U, // FCVTZU_ZPmZ_HtoD_UNDEF
1499
500k
    0U, // FCVTZU_ZPmZ_HtoH_UNDEF
1500
500k
    0U, // FCVTZU_ZPmZ_HtoS_UNDEF
1501
500k
    0U, // FCVTZU_ZPmZ_StoD_UNDEF
1502
500k
    0U, // FCVTZU_ZPmZ_StoS_UNDEF
1503
500k
    0U, // FCVT_ZPmZ_DtoH_UNDEF
1504
500k
    0U, // FCVT_ZPmZ_DtoS_UNDEF
1505
500k
    0U, // FCVT_ZPmZ_HtoD_UNDEF
1506
500k
    0U, // FCVT_ZPmZ_HtoS_UNDEF
1507
500k
    0U, // FCVT_ZPmZ_StoD_UNDEF
1508
500k
    0U, // FCVT_ZPmZ_StoH_UNDEF
1509
500k
    0U, // FDIVR_ZPZZ_ZERO_D
1510
500k
    0U, // FDIVR_ZPZZ_ZERO_H
1511
500k
    0U, // FDIVR_ZPZZ_ZERO_S
1512
500k
    0U, // FDIV_ZPZZ_UNDEF_D
1513
500k
    0U, // FDIV_ZPZZ_UNDEF_H
1514
500k
    0U, // FDIV_ZPZZ_UNDEF_S
1515
500k
    0U, // FDIV_ZPZZ_ZERO_D
1516
500k
    0U, // FDIV_ZPZZ_ZERO_H
1517
500k
    0U, // FDIV_ZPZZ_ZERO_S
1518
500k
    0U, // FMAXNM_ZPZI_UNDEF_D
1519
500k
    0U, // FMAXNM_ZPZI_UNDEF_H
1520
500k
    0U, // FMAXNM_ZPZI_UNDEF_S
1521
500k
    0U, // FMAXNM_ZPZI_ZERO_D
1522
500k
    0U, // FMAXNM_ZPZI_ZERO_H
1523
500k
    0U, // FMAXNM_ZPZI_ZERO_S
1524
500k
    0U, // FMAXNM_ZPZZ_UNDEF_D
1525
500k
    0U, // FMAXNM_ZPZZ_UNDEF_H
1526
500k
    0U, // FMAXNM_ZPZZ_UNDEF_S
1527
500k
    0U, // FMAXNM_ZPZZ_ZERO_D
1528
500k
    0U, // FMAXNM_ZPZZ_ZERO_H
1529
500k
    0U, // FMAXNM_ZPZZ_ZERO_S
1530
500k
    0U, // FMAX_ZPZI_UNDEF_D
1531
500k
    0U, // FMAX_ZPZI_UNDEF_H
1532
500k
    0U, // FMAX_ZPZI_UNDEF_S
1533
500k
    0U, // FMAX_ZPZI_ZERO_D
1534
500k
    0U, // FMAX_ZPZI_ZERO_H
1535
500k
    0U, // FMAX_ZPZI_ZERO_S
1536
500k
    0U, // FMAX_ZPZZ_UNDEF_D
1537
500k
    0U, // FMAX_ZPZZ_UNDEF_H
1538
500k
    0U, // FMAX_ZPZZ_UNDEF_S
1539
500k
    0U, // FMAX_ZPZZ_ZERO_D
1540
500k
    0U, // FMAX_ZPZZ_ZERO_H
1541
500k
    0U, // FMAX_ZPZZ_ZERO_S
1542
500k
    0U, // FMINNM_ZPZI_UNDEF_D
1543
500k
    0U, // FMINNM_ZPZI_UNDEF_H
1544
500k
    0U, // FMINNM_ZPZI_UNDEF_S
1545
500k
    0U, // FMINNM_ZPZI_ZERO_D
1546
500k
    0U, // FMINNM_ZPZI_ZERO_H
1547
500k
    0U, // FMINNM_ZPZI_ZERO_S
1548
500k
    0U, // FMINNM_ZPZZ_UNDEF_D
1549
500k
    0U, // FMINNM_ZPZZ_UNDEF_H
1550
500k
    0U, // FMINNM_ZPZZ_UNDEF_S
1551
500k
    0U, // FMINNM_ZPZZ_ZERO_D
1552
500k
    0U, // FMINNM_ZPZZ_ZERO_H
1553
500k
    0U, // FMINNM_ZPZZ_ZERO_S
1554
500k
    0U, // FMIN_ZPZI_UNDEF_D
1555
500k
    0U, // FMIN_ZPZI_UNDEF_H
1556
500k
    0U, // FMIN_ZPZI_UNDEF_S
1557
500k
    0U, // FMIN_ZPZI_ZERO_D
1558
500k
    0U, // FMIN_ZPZI_ZERO_H
1559
500k
    0U, // FMIN_ZPZI_ZERO_S
1560
500k
    0U, // FMIN_ZPZZ_UNDEF_D
1561
500k
    0U, // FMIN_ZPZZ_UNDEF_H
1562
500k
    0U, // FMIN_ZPZZ_UNDEF_S
1563
500k
    0U, // FMIN_ZPZZ_ZERO_D
1564
500k
    0U, // FMIN_ZPZZ_ZERO_H
1565
500k
    0U, // FMIN_ZPZZ_ZERO_S
1566
500k
    0U, // FMLA_ZPZZZ_UNDEF_D
1567
500k
    0U, // FMLA_ZPZZZ_UNDEF_H
1568
500k
    0U, // FMLA_ZPZZZ_UNDEF_S
1569
500k
    0U, // FMLS_ZPZZZ_UNDEF_D
1570
500k
    0U, // FMLS_ZPZZZ_UNDEF_H
1571
500k
    0U, // FMLS_ZPZZZ_UNDEF_S
1572
500k
    0U, // FMOVD0
1573
500k
    0U, // FMOVH0
1574
500k
    0U, // FMOVS0
1575
500k
    0U, // FMULX_ZPZZ_ZERO_D
1576
500k
    0U, // FMULX_ZPZZ_ZERO_H
1577
500k
    0U, // FMULX_ZPZZ_ZERO_S
1578
500k
    0U, // FMUL_ZPZI_UNDEF_D
1579
500k
    0U, // FMUL_ZPZI_UNDEF_H
1580
500k
    0U, // FMUL_ZPZI_UNDEF_S
1581
500k
    0U, // FMUL_ZPZI_ZERO_D
1582
500k
    0U, // FMUL_ZPZI_ZERO_H
1583
500k
    0U, // FMUL_ZPZI_ZERO_S
1584
500k
    0U, // FMUL_ZPZZ_UNDEF_D
1585
500k
    0U, // FMUL_ZPZZ_UNDEF_H
1586
500k
    0U, // FMUL_ZPZZ_UNDEF_S
1587
500k
    0U, // FMUL_ZPZZ_ZERO_D
1588
500k
    0U, // FMUL_ZPZZ_ZERO_H
1589
500k
    0U, // FMUL_ZPZZ_ZERO_S
1590
500k
    0U, // FNEG_ZPmZ_UNDEF_D
1591
500k
    0U, // FNEG_ZPmZ_UNDEF_H
1592
500k
    0U, // FNEG_ZPmZ_UNDEF_S
1593
500k
    0U, // FNMLA_ZPZZZ_UNDEF_D
1594
500k
    0U, // FNMLA_ZPZZZ_UNDEF_H
1595
500k
    0U, // FNMLA_ZPZZZ_UNDEF_S
1596
500k
    0U, // FNMLS_ZPZZZ_UNDEF_D
1597
500k
    0U, // FNMLS_ZPZZZ_UNDEF_H
1598
500k
    0U, // FNMLS_ZPZZZ_UNDEF_S
1599
500k
    0U, // FRECPX_ZPmZ_UNDEF_D
1600
500k
    0U, // FRECPX_ZPmZ_UNDEF_H
1601
500k
    0U, // FRECPX_ZPmZ_UNDEF_S
1602
500k
    0U, // FRINTA_ZPmZ_UNDEF_D
1603
500k
    0U, // FRINTA_ZPmZ_UNDEF_H
1604
500k
    0U, // FRINTA_ZPmZ_UNDEF_S
1605
500k
    0U, // FRINTI_ZPmZ_UNDEF_D
1606
500k
    0U, // FRINTI_ZPmZ_UNDEF_H
1607
500k
    0U, // FRINTI_ZPmZ_UNDEF_S
1608
500k
    0U, // FRINTM_ZPmZ_UNDEF_D
1609
500k
    0U, // FRINTM_ZPmZ_UNDEF_H
1610
500k
    0U, // FRINTM_ZPmZ_UNDEF_S
1611
500k
    0U, // FRINTN_ZPmZ_UNDEF_D
1612
500k
    0U, // FRINTN_ZPmZ_UNDEF_H
1613
500k
    0U, // FRINTN_ZPmZ_UNDEF_S
1614
500k
    0U, // FRINTP_ZPmZ_UNDEF_D
1615
500k
    0U, // FRINTP_ZPmZ_UNDEF_H
1616
500k
    0U, // FRINTP_ZPmZ_UNDEF_S
1617
500k
    0U, // FRINTX_ZPmZ_UNDEF_D
1618
500k
    0U, // FRINTX_ZPmZ_UNDEF_H
1619
500k
    0U, // FRINTX_ZPmZ_UNDEF_S
1620
500k
    0U, // FRINTZ_ZPmZ_UNDEF_D
1621
500k
    0U, // FRINTZ_ZPmZ_UNDEF_H
1622
500k
    0U, // FRINTZ_ZPmZ_UNDEF_S
1623
500k
    0U, // FSQRT_ZPmZ_UNDEF_D
1624
500k
    0U, // FSQRT_ZPmZ_UNDEF_H
1625
500k
    0U, // FSQRT_ZPmZ_UNDEF_S
1626
500k
    0U, // FSUBR_ZPZI_UNDEF_D
1627
500k
    0U, // FSUBR_ZPZI_UNDEF_H
1628
500k
    0U, // FSUBR_ZPZI_UNDEF_S
1629
500k
    0U, // FSUBR_ZPZI_ZERO_D
1630
500k
    0U, // FSUBR_ZPZI_ZERO_H
1631
500k
    0U, // FSUBR_ZPZI_ZERO_S
1632
500k
    0U, // FSUBR_ZPZZ_ZERO_D
1633
500k
    0U, // FSUBR_ZPZZ_ZERO_H
1634
500k
    0U, // FSUBR_ZPZZ_ZERO_S
1635
500k
    0U, // FSUB_ZPZI_UNDEF_D
1636
500k
    0U, // FSUB_ZPZI_UNDEF_H
1637
500k
    0U, // FSUB_ZPZI_UNDEF_S
1638
500k
    0U, // FSUB_ZPZI_ZERO_D
1639
500k
    0U, // FSUB_ZPZI_ZERO_H
1640
500k
    0U, // FSUB_ZPZI_ZERO_S
1641
500k
    0U, // FSUB_ZPZZ_UNDEF_D
1642
500k
    0U, // FSUB_ZPZZ_UNDEF_H
1643
500k
    0U, // FSUB_ZPZZ_UNDEF_S
1644
500k
    0U, // FSUB_ZPZZ_ZERO_D
1645
500k
    0U, // FSUB_ZPZZ_ZERO_H
1646
500k
    0U, // FSUB_ZPZZ_ZERO_S
1647
500k
    0U, // GLD1B_D
1648
500k
    0U, // GLD1B_D_IMM
1649
500k
    0U, // GLD1B_D_SXTW
1650
500k
    0U, // GLD1B_D_UXTW
1651
500k
    0U, // GLD1B_S_IMM
1652
500k
    0U, // GLD1B_S_SXTW
1653
500k
    0U, // GLD1B_S_UXTW
1654
500k
    0U, // GLD1D
1655
500k
    0U, // GLD1D_IMM
1656
500k
    0U, // GLD1D_SCALED
1657
500k
    0U, // GLD1D_SXTW
1658
500k
    0U, // GLD1D_SXTW_SCALED
1659
500k
    0U, // GLD1D_UXTW
1660
500k
    0U, // GLD1D_UXTW_SCALED
1661
500k
    0U, // GLD1H_D
1662
500k
    0U, // GLD1H_D_IMM
1663
500k
    0U, // GLD1H_D_SCALED
1664
500k
    0U, // GLD1H_D_SXTW
1665
500k
    0U, // GLD1H_D_SXTW_SCALED
1666
500k
    0U, // GLD1H_D_UXTW
1667
500k
    0U, // GLD1H_D_UXTW_SCALED
1668
500k
    0U, // GLD1H_S_IMM
1669
500k
    0U, // GLD1H_S_SXTW
1670
500k
    0U, // GLD1H_S_SXTW_SCALED
1671
500k
    0U, // GLD1H_S_UXTW
1672
500k
    0U, // GLD1H_S_UXTW_SCALED
1673
500k
    0U, // GLD1SB_D
1674
500k
    0U, // GLD1SB_D_IMM
1675
500k
    0U, // GLD1SB_D_SXTW
1676
500k
    0U, // GLD1SB_D_UXTW
1677
500k
    0U, // GLD1SB_S_IMM
1678
500k
    0U, // GLD1SB_S_SXTW
1679
500k
    0U, // GLD1SB_S_UXTW
1680
500k
    0U, // GLD1SH_D
1681
500k
    0U, // GLD1SH_D_IMM
1682
500k
    0U, // GLD1SH_D_SCALED
1683
500k
    0U, // GLD1SH_D_SXTW
1684
500k
    0U, // GLD1SH_D_SXTW_SCALED
1685
500k
    0U, // GLD1SH_D_UXTW
1686
500k
    0U, // GLD1SH_D_UXTW_SCALED
1687
500k
    0U, // GLD1SH_S_IMM
1688
500k
    0U, // GLD1SH_S_SXTW
1689
500k
    0U, // GLD1SH_S_SXTW_SCALED
1690
500k
    0U, // GLD1SH_S_UXTW
1691
500k
    0U, // GLD1SH_S_UXTW_SCALED
1692
500k
    0U, // GLD1SW_D
1693
500k
    0U, // GLD1SW_D_IMM
1694
500k
    0U, // GLD1SW_D_SCALED
1695
500k
    0U, // GLD1SW_D_SXTW
1696
500k
    0U, // GLD1SW_D_SXTW_SCALED
1697
500k
    0U, // GLD1SW_D_UXTW
1698
500k
    0U, // GLD1SW_D_UXTW_SCALED
1699
500k
    0U, // GLD1W_D
1700
500k
    0U, // GLD1W_D_IMM
1701
500k
    0U, // GLD1W_D_SCALED
1702
500k
    0U, // GLD1W_D_SXTW
1703
500k
    0U, // GLD1W_D_SXTW_SCALED
1704
500k
    0U, // GLD1W_D_UXTW
1705
500k
    0U, // GLD1W_D_UXTW_SCALED
1706
500k
    0U, // GLD1W_IMM
1707
500k
    0U, // GLD1W_SXTW
1708
500k
    0U, // GLD1W_SXTW_SCALED
1709
500k
    0U, // GLD1W_UXTW
1710
500k
    0U, // GLD1W_UXTW_SCALED
1711
500k
    0U, // GLDFF1B_D
1712
500k
    0U, // GLDFF1B_D_IMM
1713
500k
    0U, // GLDFF1B_D_SXTW
1714
500k
    0U, // GLDFF1B_D_UXTW
1715
500k
    0U, // GLDFF1B_S_IMM
1716
500k
    0U, // GLDFF1B_S_SXTW
1717
500k
    0U, // GLDFF1B_S_UXTW
1718
500k
    0U, // GLDFF1D
1719
500k
    0U, // GLDFF1D_IMM
1720
500k
    0U, // GLDFF1D_SCALED
1721
500k
    0U, // GLDFF1D_SXTW
1722
500k
    0U, // GLDFF1D_SXTW_SCALED
1723
500k
    0U, // GLDFF1D_UXTW
1724
500k
    0U, // GLDFF1D_UXTW_SCALED
1725
500k
    0U, // GLDFF1H_D
1726
500k
    0U, // GLDFF1H_D_IMM
1727
500k
    0U, // GLDFF1H_D_SCALED
1728
500k
    0U, // GLDFF1H_D_SXTW
1729
500k
    0U, // GLDFF1H_D_SXTW_SCALED
1730
500k
    0U, // GLDFF1H_D_UXTW
1731
500k
    0U, // GLDFF1H_D_UXTW_SCALED
1732
500k
    0U, // GLDFF1H_S_IMM
1733
500k
    0U, // GLDFF1H_S_SXTW
1734
500k
    0U, // GLDFF1H_S_SXTW_SCALED
1735
500k
    0U, // GLDFF1H_S_UXTW
1736
500k
    0U, // GLDFF1H_S_UXTW_SCALED
1737
500k
    0U, // GLDFF1SB_D
1738
500k
    0U, // GLDFF1SB_D_IMM
1739
500k
    0U, // GLDFF1SB_D_SXTW
1740
500k
    0U, // GLDFF1SB_D_UXTW
1741
500k
    0U, // GLDFF1SB_S_IMM
1742
500k
    0U, // GLDFF1SB_S_SXTW
1743
500k
    0U, // GLDFF1SB_S_UXTW
1744
500k
    0U, // GLDFF1SH_D
1745
500k
    0U, // GLDFF1SH_D_IMM
1746
500k
    0U, // GLDFF1SH_D_SCALED
1747
500k
    0U, // GLDFF1SH_D_SXTW
1748
500k
    0U, // GLDFF1SH_D_SXTW_SCALED
1749
500k
    0U, // GLDFF1SH_D_UXTW
1750
500k
    0U, // GLDFF1SH_D_UXTW_SCALED
1751
500k
    0U, // GLDFF1SH_S_IMM
1752
500k
    0U, // GLDFF1SH_S_SXTW
1753
500k
    0U, // GLDFF1SH_S_SXTW_SCALED
1754
500k
    0U, // GLDFF1SH_S_UXTW
1755
500k
    0U, // GLDFF1SH_S_UXTW_SCALED
1756
500k
    0U, // GLDFF1SW_D
1757
500k
    0U, // GLDFF1SW_D_IMM
1758
500k
    0U, // GLDFF1SW_D_SCALED
1759
500k
    0U, // GLDFF1SW_D_SXTW
1760
500k
    0U, // GLDFF1SW_D_SXTW_SCALED
1761
500k
    0U, // GLDFF1SW_D_UXTW
1762
500k
    0U, // GLDFF1SW_D_UXTW_SCALED
1763
500k
    0U, // GLDFF1W_D
1764
500k
    0U, // GLDFF1W_D_IMM
1765
500k
    0U, // GLDFF1W_D_SCALED
1766
500k
    0U, // GLDFF1W_D_SXTW
1767
500k
    0U, // GLDFF1W_D_SXTW_SCALED
1768
500k
    0U, // GLDFF1W_D_UXTW
1769
500k
    0U, // GLDFF1W_D_UXTW_SCALED
1770
500k
    0U, // GLDFF1W_IMM
1771
500k
    0U, // GLDFF1W_SXTW
1772
500k
    0U, // GLDFF1W_SXTW_SCALED
1773
500k
    0U, // GLDFF1W_UXTW
1774
500k
    0U, // GLDFF1W_UXTW_SCALED
1775
500k
    0U, // G_ADD_LOW
1776
500k
    0U, // G_DUP
1777
500k
    0U, // G_DUPLANE16
1778
500k
    0U, // G_DUPLANE32
1779
500k
    0U, // G_DUPLANE64
1780
500k
    0U, // G_DUPLANE8
1781
500k
    0U, // G_EXT
1782
500k
    0U, // G_FCMEQ
1783
500k
    0U, // G_FCMEQZ
1784
500k
    0U, // G_FCMGE
1785
500k
    0U, // G_FCMGEZ
1786
500k
    0U, // G_FCMGT
1787
500k
    0U, // G_FCMGTZ
1788
500k
    0U, // G_FCMLEZ
1789
500k
    0U, // G_FCMLTZ
1790
500k
    0U, // G_REV16
1791
500k
    0U, // G_REV32
1792
500k
    0U, // G_REV64
1793
500k
    0U, // G_SITOF
1794
500k
    0U, // G_TRN1
1795
500k
    0U, // G_TRN2
1796
500k
    0U, // G_UITOF
1797
500k
    0U, // G_UZP1
1798
500k
    0U, // G_UZP2
1799
500k
    0U, // G_VASHR
1800
500k
    0U, // G_VLSHR
1801
500k
    0U, // G_ZIP1
1802
500k
    0U, // G_ZIP2
1803
500k
    0U, // HOM_Epilog
1804
500k
    0U, // HOM_Prolog
1805
500k
    0U, // HWASAN_CHECK_MEMACCESS
1806
500k
    0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES
1807
500k
    0U, // IRGstack
1808
500k
    0U, // JumpTableDest16
1809
500k
    0U, // JumpTableDest32
1810
500k
    0U, // JumpTableDest8
1811
500k
    0U, // LD1B_D_IMM
1812
500k
    0U, // LD1B_H_IMM
1813
500k
    0U, // LD1B_IMM
1814
500k
    0U, // LD1B_S_IMM
1815
500k
    0U, // LD1D_IMM
1816
500k
    0U, // LD1H_D_IMM
1817
500k
    0U, // LD1H_IMM
1818
500k
    0U, // LD1H_S_IMM
1819
500k
    0U, // LD1SB_D_IMM
1820
500k
    0U, // LD1SB_H_IMM
1821
500k
    0U, // LD1SB_S_IMM
1822
500k
    0U, // LD1SH_D_IMM
1823
500k
    0U, // LD1SH_S_IMM
1824
500k
    0U, // LD1SW_D_IMM
1825
500k
    0U, // LD1W_D_IMM
1826
500k
    0U, // LD1W_IMM
1827
500k
    0U, // LDFF1B
1828
500k
    0U, // LDFF1B_D
1829
500k
    0U, // LDFF1B_H
1830
500k
    0U, // LDFF1B_S
1831
500k
    0U, // LDFF1D
1832
500k
    0U, // LDFF1H
1833
500k
    0U, // LDFF1H_D
1834
500k
    0U, // LDFF1H_S
1835
500k
    0U, // LDFF1SB_D
1836
500k
    0U, // LDFF1SB_H
1837
500k
    0U, // LDFF1SB_S
1838
500k
    0U, // LDFF1SH_D
1839
500k
    0U, // LDFF1SH_S
1840
500k
    0U, // LDFF1SW_D
1841
500k
    0U, // LDFF1W
1842
500k
    0U, // LDFF1W_D
1843
500k
    0U, // LDNF1B_D_IMM
1844
500k
    0U, // LDNF1B_H_IMM
1845
500k
    0U, // LDNF1B_IMM
1846
500k
    0U, // LDNF1B_S_IMM
1847
500k
    0U, // LDNF1D_IMM
1848
500k
    0U, // LDNF1H_D_IMM
1849
500k
    0U, // LDNF1H_IMM
1850
500k
    0U, // LDNF1H_S_IMM
1851
500k
    0U, // LDNF1SB_D_IMM
1852
500k
    0U, // LDNF1SB_H_IMM
1853
500k
    0U, // LDNF1SB_S_IMM
1854
500k
    0U, // LDNF1SH_D_IMM
1855
500k
    0U, // LDNF1SH_S_IMM
1856
500k
    0U, // LDNF1SW_D_IMM
1857
500k
    0U, // LDNF1W_D_IMM
1858
500k
    0U, // LDNF1W_IMM
1859
500k
    0U, // LDR_ZZXI
1860
500k
    0U, // LDR_ZZZXI
1861
500k
    0U, // LDR_ZZZZXI
1862
500k
    0U, // LOADgot
1863
500k
    0U, // LSL_ZPZI_UNDEF_B
1864
500k
    0U, // LSL_ZPZI_UNDEF_D
1865
500k
    0U, // LSL_ZPZI_UNDEF_H
1866
500k
    0U, // LSL_ZPZI_UNDEF_S
1867
500k
    0U, // LSL_ZPZZ_UNDEF_B
1868
500k
    0U, // LSL_ZPZZ_UNDEF_D
1869
500k
    0U, // LSL_ZPZZ_UNDEF_H
1870
500k
    0U, // LSL_ZPZZ_UNDEF_S
1871
500k
    0U, // LSL_ZPZZ_ZERO_B
1872
500k
    0U, // LSL_ZPZZ_ZERO_D
1873
500k
    0U, // LSL_ZPZZ_ZERO_H
1874
500k
    0U, // LSL_ZPZZ_ZERO_S
1875
500k
    0U, // LSR_ZPZI_UNDEF_B
1876
500k
    0U, // LSR_ZPZI_UNDEF_D
1877
500k
    0U, // LSR_ZPZI_UNDEF_H
1878
500k
    0U, // LSR_ZPZI_UNDEF_S
1879
500k
    0U, // LSR_ZPZZ_UNDEF_B
1880
500k
    0U, // LSR_ZPZZ_UNDEF_D
1881
500k
    0U, // LSR_ZPZZ_UNDEF_H
1882
500k
    0U, // LSR_ZPZZ_UNDEF_S
1883
500k
    0U, // LSR_ZPZZ_ZERO_B
1884
500k
    0U, // LSR_ZPZZ_ZERO_D
1885
500k
    0U, // LSR_ZPZZ_ZERO_H
1886
500k
    0U, // LSR_ZPZZ_ZERO_S
1887
500k
    0U, // MOPSMemoryCopyPseudo
1888
500k
    0U, // MOPSMemoryMovePseudo
1889
500k
    0U, // MOPSMemorySetPseudo
1890
500k
    0U, // MOPSMemorySetTaggingPseudo
1891
500k
    0U, // MOVMCSym
1892
500k
    0U, // MOVaddr
1893
500k
    0U, // MOVaddrBA
1894
500k
    0U, // MOVaddrCP
1895
500k
    0U, // MOVaddrEXT
1896
500k
    0U, // MOVaddrJT
1897
500k
    0U, // MOVaddrTLS
1898
500k
    0U, // MOVbaseTLS
1899
500k
    0U, // MOVi32imm
1900
500k
    0U, // MOVi64imm
1901
500k
    0U, // MUL_ZPZZ_UNDEF_B
1902
500k
    0U, // MUL_ZPZZ_UNDEF_D
1903
500k
    0U, // MUL_ZPZZ_UNDEF_H
1904
500k
    0U, // MUL_ZPZZ_UNDEF_S
1905
500k
    0U, // NEG_ZPmZ_UNDEF_B
1906
500k
    0U, // NEG_ZPmZ_UNDEF_D
1907
500k
    0U, // NEG_ZPmZ_UNDEF_H
1908
500k
    0U, // NEG_ZPmZ_UNDEF_S
1909
500k
    0U, // NOT_ZPmZ_UNDEF_B
1910
500k
    0U, // NOT_ZPmZ_UNDEF_D
1911
500k
    0U, // NOT_ZPmZ_UNDEF_H
1912
500k
    0U, // NOT_ZPmZ_UNDEF_S
1913
500k
    0U, // ORNWrr
1914
500k
    0U, // ORNXrr
1915
500k
    0U, // ORRWrr
1916
500k
    0U, // ORRXrr
1917
500k
    0U, // RDFFR_P
1918
500k
    0U, // RDFFR_PPz
1919
500k
    0U, // RET_ReallyLR
1920
500k
    0U, // SABD_ZPZZ_UNDEF_B
1921
500k
    0U, // SABD_ZPZZ_UNDEF_D
1922
500k
    0U, // SABD_ZPZZ_UNDEF_H
1923
500k
    0U, // SABD_ZPZZ_UNDEF_S
1924
500k
    0U, // SCVTF_ZPmZ_DtoD_UNDEF
1925
500k
    0U, // SCVTF_ZPmZ_DtoH_UNDEF
1926
500k
    0U, // SCVTF_ZPmZ_DtoS_UNDEF
1927
500k
    0U, // SCVTF_ZPmZ_HtoH_UNDEF
1928
500k
    0U, // SCVTF_ZPmZ_StoD_UNDEF
1929
500k
    0U, // SCVTF_ZPmZ_StoH_UNDEF
1930
500k
    0U, // SCVTF_ZPmZ_StoS_UNDEF
1931
500k
    0U, // SDIV_ZPZZ_UNDEF_D
1932
500k
    0U, // SDIV_ZPZZ_UNDEF_S
1933
500k
    0U, // SEH_AddFP
1934
500k
    0U, // SEH_EpilogEnd
1935
500k
    0U, // SEH_EpilogStart
1936
500k
    0U, // SEH_Nop
1937
500k
    0U, // SEH_PrologEnd
1938
500k
    0U, // SEH_SaveFPLR
1939
500k
    0U, // SEH_SaveFPLR_X
1940
500k
    0U, // SEH_SaveFReg
1941
500k
    0U, // SEH_SaveFRegP
1942
500k
    0U, // SEH_SaveFRegP_X
1943
500k
    0U, // SEH_SaveFReg_X
1944
500k
    0U, // SEH_SaveReg
1945
500k
    0U, // SEH_SaveRegP
1946
500k
    0U, // SEH_SaveRegP_X
1947
500k
    0U, // SEH_SaveReg_X
1948
500k
    0U, // SEH_SetFP
1949
500k
    0U, // SEH_StackAlloc
1950
500k
    0U, // SMAX_ZPZZ_UNDEF_B
1951
500k
    0U, // SMAX_ZPZZ_UNDEF_D
1952
500k
    0U, // SMAX_ZPZZ_UNDEF_H
1953
500k
    0U, // SMAX_ZPZZ_UNDEF_S
1954
500k
    0U, // SMIN_ZPZZ_UNDEF_B
1955
500k
    0U, // SMIN_ZPZZ_UNDEF_D
1956
500k
    0U, // SMIN_ZPZZ_UNDEF_H
1957
500k
    0U, // SMIN_ZPZZ_UNDEF_S
1958
500k
    0U, // SMULH_ZPZZ_UNDEF_B
1959
500k
    0U, // SMULH_ZPZZ_UNDEF_D
1960
500k
    0U, // SMULH_ZPZZ_UNDEF_H
1961
500k
    0U, // SMULH_ZPZZ_UNDEF_S
1962
500k
    0U, // SPACE
1963
500k
    0U, // SQABS_ZPmZ_UNDEF_B
1964
500k
    0U, // SQABS_ZPmZ_UNDEF_D
1965
500k
    0U, // SQABS_ZPmZ_UNDEF_H
1966
500k
    0U, // SQABS_ZPmZ_UNDEF_S
1967
500k
    0U, // SQNEG_ZPmZ_UNDEF_B
1968
500k
    0U, // SQNEG_ZPmZ_UNDEF_D
1969
500k
    0U, // SQNEG_ZPmZ_UNDEF_H
1970
500k
    0U, // SQNEG_ZPmZ_UNDEF_S
1971
500k
    0U, // SQRSHL_ZPZZ_UNDEF_B
1972
500k
    0U, // SQRSHL_ZPZZ_UNDEF_D
1973
500k
    0U, // SQRSHL_ZPZZ_UNDEF_H
1974
500k
    0U, // SQRSHL_ZPZZ_UNDEF_S
1975
500k
    0U, // SQSHLU_ZPZI_ZERO_B
1976
500k
    0U, // SQSHLU_ZPZI_ZERO_D
1977
500k
    0U, // SQSHLU_ZPZI_ZERO_H
1978
500k
    0U, // SQSHLU_ZPZI_ZERO_S
1979
500k
    0U, // SQSHL_ZPZI_ZERO_B
1980
500k
    0U, // SQSHL_ZPZI_ZERO_D
1981
500k
    0U, // SQSHL_ZPZI_ZERO_H
1982
500k
    0U, // SQSHL_ZPZI_ZERO_S
1983
500k
    0U, // SQSHL_ZPZZ_UNDEF_B
1984
500k
    0U, // SQSHL_ZPZZ_UNDEF_D
1985
500k
    0U, // SQSHL_ZPZZ_UNDEF_H
1986
500k
    0U, // SQSHL_ZPZZ_UNDEF_S
1987
500k
    0U, // SRSHL_ZPZZ_UNDEF_B
1988
500k
    0U, // SRSHL_ZPZZ_UNDEF_D
1989
500k
    0U, // SRSHL_ZPZZ_UNDEF_H
1990
500k
    0U, // SRSHL_ZPZZ_UNDEF_S
1991
500k
    0U, // SRSHR_ZPZI_ZERO_B
1992
500k
    0U, // SRSHR_ZPZI_ZERO_D
1993
500k
    0U, // SRSHR_ZPZI_ZERO_H
1994
500k
    0U, // SRSHR_ZPZI_ZERO_S
1995
500k
    0U, // STGloop
1996
500k
    0U, // STGloop_wback
1997
500k
    0U, // STR_ZZXI
1998
500k
    0U, // STR_ZZZXI
1999
500k
    0U, // STR_ZZZZXI
2000
500k
    0U, // STZGloop
2001
500k
    0U, // STZGloop_wback
2002
500k
    0U, // SUBR_ZPZZ_ZERO_B
2003
500k
    0U, // SUBR_ZPZZ_ZERO_D
2004
500k
    0U, // SUBR_ZPZZ_ZERO_H
2005
500k
    0U, // SUBR_ZPZZ_ZERO_S
2006
500k
    0U, // SUBSWrr
2007
500k
    0U, // SUBSXrr
2008
500k
    0U, // SUBWrr
2009
500k
    0U, // SUBXrr
2010
500k
    0U, // SUB_ZPZZ_UNDEF_B
2011
500k
    0U, // SUB_ZPZZ_UNDEF_D
2012
500k
    0U, // SUB_ZPZZ_UNDEF_H
2013
500k
    0U, // SUB_ZPZZ_UNDEF_S
2014
500k
    0U, // SUB_ZPZZ_ZERO_B
2015
500k
    0U, // SUB_ZPZZ_ZERO_D
2016
500k
    0U, // SUB_ZPZZ_ZERO_H
2017
500k
    0U, // SUB_ZPZZ_ZERO_S
2018
500k
    0U, // SXTB_ZPmZ_UNDEF_D
2019
500k
    0U, // SXTB_ZPmZ_UNDEF_H
2020
500k
    0U, // SXTB_ZPmZ_UNDEF_S
2021
500k
    0U, // SXTH_ZPmZ_UNDEF_D
2022
500k
    0U, // SXTH_ZPmZ_UNDEF_S
2023
500k
    0U, // SXTW_ZPmZ_UNDEF_D
2024
500k
    0U, // SpeculationBarrierISBDSBEndBB
2025
500k
    0U, // SpeculationBarrierSBEndBB
2026
500k
    0U, // SpeculationSafeValueW
2027
500k
    0U, // SpeculationSafeValueX
2028
500k
    0U, // StoreSwiftAsyncContext
2029
500k
    0U, // TAGPstack
2030
500k
    0U, // TCRETURNdi
2031
500k
    0U, // TCRETURNri
2032
500k
    0U, // TCRETURNriALL
2033
500k
    0U, // TCRETURNriBTI
2034
500k
    23422U, // TLSDESCCALL
2035
500k
    0U, // TLSDESC_CALLSEQ
2036
500k
    0U, // UABD_ZPZZ_UNDEF_B
2037
500k
    0U, // UABD_ZPZZ_UNDEF_D
2038
500k
    0U, // UABD_ZPZZ_UNDEF_H
2039
500k
    0U, // UABD_ZPZZ_UNDEF_S
2040
500k
    0U, // UCVTF_ZPmZ_DtoD_UNDEF
2041
500k
    0U, // UCVTF_ZPmZ_DtoH_UNDEF
2042
500k
    0U, // UCVTF_ZPmZ_DtoS_UNDEF
2043
500k
    0U, // UCVTF_ZPmZ_HtoH_UNDEF
2044
500k
    0U, // UCVTF_ZPmZ_StoD_UNDEF
2045
500k
    0U, // UCVTF_ZPmZ_StoH_UNDEF
2046
500k
    0U, // UCVTF_ZPmZ_StoS_UNDEF
2047
500k
    0U, // UDIV_ZPZZ_UNDEF_D
2048
500k
    0U, // UDIV_ZPZZ_UNDEF_S
2049
500k
    0U, // UMAX_ZPZZ_UNDEF_B
2050
500k
    0U, // UMAX_ZPZZ_UNDEF_D
2051
500k
    0U, // UMAX_ZPZZ_UNDEF_H
2052
500k
    0U, // UMAX_ZPZZ_UNDEF_S
2053
500k
    0U, // UMIN_ZPZZ_UNDEF_B
2054
500k
    0U, // UMIN_ZPZZ_UNDEF_D
2055
500k
    0U, // UMIN_ZPZZ_UNDEF_H
2056
500k
    0U, // UMIN_ZPZZ_UNDEF_S
2057
500k
    0U, // UMULH_ZPZZ_UNDEF_B
2058
500k
    0U, // UMULH_ZPZZ_UNDEF_D
2059
500k
    0U, // UMULH_ZPZZ_UNDEF_H
2060
500k
    0U, // UMULH_ZPZZ_UNDEF_S
2061
500k
    0U, // UQRSHL_ZPZZ_UNDEF_B
2062
500k
    0U, // UQRSHL_ZPZZ_UNDEF_D
2063
500k
    0U, // UQRSHL_ZPZZ_UNDEF_H
2064
500k
    0U, // UQRSHL_ZPZZ_UNDEF_S
2065
500k
    0U, // UQSHL_ZPZI_ZERO_B
2066
500k
    0U, // UQSHL_ZPZI_ZERO_D
2067
500k
    0U, // UQSHL_ZPZI_ZERO_H
2068
500k
    0U, // UQSHL_ZPZI_ZERO_S
2069
500k
    0U, // UQSHL_ZPZZ_UNDEF_B
2070
500k
    0U, // UQSHL_ZPZZ_UNDEF_D
2071
500k
    0U, // UQSHL_ZPZZ_UNDEF_H
2072
500k
    0U, // UQSHL_ZPZZ_UNDEF_S
2073
500k
    0U, // URECPE_ZPmZ_UNDEF_S
2074
500k
    0U, // URSHL_ZPZZ_UNDEF_B
2075
500k
    0U, // URSHL_ZPZZ_UNDEF_D
2076
500k
    0U, // URSHL_ZPZZ_UNDEF_H
2077
500k
    0U, // URSHL_ZPZZ_UNDEF_S
2078
500k
    0U, // URSHR_ZPZI_ZERO_B
2079
500k
    0U, // URSHR_ZPZI_ZERO_D
2080
500k
    0U, // URSHR_ZPZI_ZERO_H
2081
500k
    0U, // URSHR_ZPZI_ZERO_S
2082
500k
    0U, // URSQRTE_ZPmZ_UNDEF_S
2083
500k
    0U, // UXTB_ZPmZ_UNDEF_D
2084
500k
    0U, // UXTB_ZPmZ_UNDEF_H
2085
500k
    0U, // UXTB_ZPmZ_UNDEF_S
2086
500k
    0U, // UXTH_ZPmZ_UNDEF_D
2087
500k
    0U, // UXTH_ZPmZ_UNDEF_S
2088
500k
    0U, // UXTW_ZPmZ_UNDEF_D
2089
500k
    2135331U, // ABS_ZPmZ_B
2090
500k
    2151715U, // ABS_ZPmZ_D
2091
500k
    272700707U, // ABS_ZPmZ_H
2092
500k
    2184483U, // ABS_ZPmZ_S
2093
500k
    543266083U, // ABSv16i8
2094
500k
    807425315U, // ABSv1i64
2095
500k
    545363235U, // ABSv2i32
2096
500k
    547460387U, // ABSv2i64
2097
500k
    549557539U, // ABSv4i16
2098
500k
    551654691U, // ABSv4i32
2099
500k
    553751843U, // ABSv8i16
2100
500k
    555848995U, // ABSv8i8
2101
500k
    1075889597U,  // ADCLB_ZZZ_D
2102
500k
    1344357821U,  // ADCLB_ZZZ_S
2103
500k
    1075894000U,  // ADCLT_ZZZ_D
2104
500k
    1344362224U,  // ADCLT_ZZZ_S
2105
500k
    807425354U, // ADCSWr
2106
500k
    807425354U, // ADCSXr
2107
500k
    807422196U, // ADCWr
2108
500k
    807422196U, // ADCXr
2109
500k
    807422760U, // ADDG
2110
500k
    1631699639U,  // ADDHA_MPPZ_D
2111
500k
    1633796791U,  // ADDHA_MPPZ_S
2112
500k
    1881179809U,  // ADDHNB_ZZZ_B
2113
500k
    2172716705U,  // ADDHNB_ZZZ_H
2114
500k
    2418099873U,  // ADDHNB_ZZZ_S
2115
500k
    2686490530U,  // ADDHNT_ZZZ_B
2116
500k
    2174818210U,  // ADDHNT_ZZZ_H
2117
500k
    1075926946U,  // ADDHNT_ZZZ_S
2118
500k
    545362315U, // ADDHNv2i64_v2i32
2119
500k
    2967601516U,  // ADDHNv2i64_v4i32
2120
500k
    549556619U, // ADDHNv4i32_v4i16
2121
500k
    2969698668U,  // ADDHNv4i32_v8i16
2122
500k
    2959212908U,  // ADDHNv8i16_v16i8
2123
500k
    555848075U, // ADDHNv8i16_v8i8
2124
500k
    807424134U, // ADDPL_XXI
2125
500k
    3223360141U,  // ADDP_ZPmZ_B
2126
500k
    3223376525U,  // ADDP_ZPmZ_D
2127
500k
    3519091341U,  // ADDP_ZPmZ_H
2128
500k
    3223409293U,  // ADDP_ZPmZ_S
2129
500k
    543265421U, // ADDPv16i8
2130
500k
    545362573U, // ADDPv2i32
2131
500k
    547459725U, // ADDPv2i64
2132
500k
    538989197U, // ADDPv2i64p
2133
500k
    549556877U, // ADDPv4i16
2134
500k
    551654029U, // ADDPv4i32
2135
500k
    553751181U, // ADDPv8i16
2136
500k
    555848333U, // ADDPv8i8
2137
500k
    807425366U, // ADDSWri
2138
500k
    807425366U, // ADDSWrs
2139
500k
    807425366U, // ADDSWrx
2140
500k
    807425366U, // ADDSXri
2141
500k
    807425366U, // ADDSXrs
2142
500k
    807425366U, // ADDSXrx
2143
500k
    807425366U, // ADDSXrx64
2144
500k
    1631699850U,  // ADDVA_MPPZ_D
2145
500k
    1633797002U,  // ADDVA_MPPZ_S
2146
500k
    807424260U, // ADDVL_XXI
2147
500k
    538990800U, // ADDVv16i8v
2148
500k
    538990800U, // ADDVv4i16v
2149
500k
    538990800U, // ADDVv4i32v
2150
500k
    538990800U, // ADDVv8i16v
2151
500k
    538990800U, // ADDVv8i8v
2152
500k
    807422397U, // ADDWri
2153
500k
    807422397U, // ADDWrs
2154
500k
    807422397U, // ADDWrx
2155
500k
    807422397U, // ADDXri
2156
500k
    807422397U, // ADDXrs
2157
500k
    807422397U, // ADDXrx
2158
500k
    807422397U, // ADDXrx64
2159
500k
    3760228797U,  // ADD_ZI_B
2160
500k
    2418067901U,  // ADD_ZI_D
2161
500k
    2179008957U,  // ADD_ZI_H
2162
500k
    4028713405U,  // ADD_ZI_S
2163
500k
    3223357885U,  // ADD_ZPmZ_B
2164
500k
    3223374269U,  // ADD_ZPmZ_D
2165
500k
    3519089085U,  // ADD_ZPmZ_H
2166
500k
    3223407037U,  // ADD_ZPmZ_S
2167
500k
    3760228797U,  // ADD_ZZZ_B
2168
500k
    2418067901U,  // ADD_ZZZ_D
2169
500k
    2179008957U,  // ADD_ZZZ_H
2170
500k
    4028713405U,  // ADD_ZZZ_S
2171
500k
    543263165U, // ADDv16i8
2172
500k
    807422397U, // ADDv1i64
2173
500k
    545360317U, // ADDv2i32
2174
500k
    547457469U, // ADDv2i64
2175
500k
    549554621U, // ADDv4i16
2176
500k
    551651773U, // ADDv4i32
2177
500k
    553748925U, // ADDv8i16
2178
500k
    555846077U, // ADDv8i8
2179
500k
    807424987U, // ADR
2180
500k
    2118420U, // ADRP
2181
500k
    2449527771U,  // ADR_LSL_ZZZ_D_0
2182
500k
    2449527771U,  // ADR_LSL_ZZZ_D_1
2183
500k
    2449527771U,  // ADR_LSL_ZZZ_D_2
2184
500k
    2449527771U,  // ADR_LSL_ZZZ_D_3
2185
500k
    4060173275U,  // ADR_LSL_ZZZ_S_0
2186
500k
    4060173275U,  // ADR_LSL_ZZZ_S_1
2187
500k
    4060173275U,  // ADR_LSL_ZZZ_S_2
2188
500k
    4060173275U,  // ADR_LSL_ZZZ_S_3
2189
500k
    2449527771U,  // ADR_SXTW_ZZZ_D_0
2190
500k
    2449527771U,  // ADR_SXTW_ZZZ_D_1
2191
500k
    2449527771U,  // ADR_SXTW_ZZZ_D_2
2192
500k
    2449527771U,  // ADR_SXTW_ZZZ_D_3
2193
500k
    2449527771U,  // ADR_UXTW_ZZZ_D_0
2194
500k
    2449527771U,  // ADR_UXTW_ZZZ_D_1
2195
500k
    2449527771U,  // ADR_UXTW_ZZZ_D_2
2196
500k
    2449527771U,  // ADR_UXTW_ZZZ_D_3
2197
500k
    3760228925U,  // AESD_ZZZ_B
2198
500k
    2959215165U,  // AESDrr
2199
500k
    3760229072U,  // AESE_ZZZ_B
2200
500k
    2959215312U,  // AESErr
2201
500k
    3760228606U,  // AESIMC_ZZ_B
2202
500k
    543262974U, // AESIMCrr
2203
500k
    3760228614U,  // AESMC_ZZ_B
2204
500k
    543262982U, // AESMCrr
2205
500k
    807425373U, // ANDSWri
2206
500k
    807425373U, // ANDSWrs
2207
500k
    807425373U, // ANDSXri
2208
500k
    807425373U, // ANDSXrs
2209
500k
    3223360861U,  // ANDS_PPzPP
2210
500k
    153828U,  // ANDV_VPZ_B
2211
500k
    1646434532U,  // ANDV_VPZ_D
2212
500k
    1648548068U,  // ANDV_VPZ_H
2213
500k
    1638078692U,  // ANDV_VPZ_S
2214
500k
    807422491U, // ANDWri
2215
500k
    807422491U, // ANDWrs
2216
500k
    807422491U, // ANDXri
2217
500k
    807422491U, // ANDXrs
2218
500k
    3223357979U,  // AND_PPzPP
2219
500k
    2418067995U,  // AND_ZI
2220
500k
    3223357979U,  // AND_ZPmZ_B
2221
500k
    3223374363U,  // AND_ZPmZ_D
2222
500k
    3519089179U,  // AND_ZPmZ_H
2223
500k
    3223407131U,  // AND_ZPmZ_S
2224
500k
    2418067995U,  // AND_ZZZ
2225
500k
    543263259U, // ANDv16i8
2226
500k
    555846171U, // ANDv8i8
2227
500k
    3223358007U,  // ASRD_ZPmI_B
2228
500k
    3223374391U,  // ASRD_ZPmI_D
2229
500k
    3519089207U,  // ASRD_ZPmI_H
2230
500k
    3223407159U,  // ASRD_ZPmI_S
2231
500k
    3223360635U,  // ASRR_ZPmZ_B
2232
500k
    3223377019U,  // ASRR_ZPmZ_D
2233
500k
    3519091835U,  // ASRR_ZPmZ_H
2234
500k
    3223409787U,  // ASRR_ZPmZ_S
2235
500k
    807425159U, // ASRVWr
2236
500k
    807425159U, // ASRVXr
2237
500k
    3223360647U,  // ASR_WIDE_ZPmZ_B
2238
500k
    3519091847U,  // ASR_WIDE_ZPmZ_H
2239
500k
    3223409799U,  // ASR_WIDE_ZPmZ_S
2240
500k
    3760231559U,  // ASR_WIDE_ZZZ_B
2241
500k
    2179011719U,  // ASR_WIDE_ZZZ_H
2242
500k
    4028716167U,  // ASR_WIDE_ZZZ_S
2243
500k
    3223360647U,  // ASR_ZPmI_B
2244
500k
    3223377031U,  // ASR_ZPmI_D
2245
500k
    3519091847U,  // ASR_ZPmI_H
2246
500k
    3223409799U,  // ASR_ZPmI_S
2247
500k
    3223360647U,  // ASR_ZPmZ_B
2248
500k
    3223377031U,  // ASR_ZPmZ_D
2249
500k
    3519091847U,  // ASR_ZPmZ_H
2250
500k
    3223409799U,  // ASR_ZPmZ_S
2251
500k
    3760231559U,  // ASR_ZZI_B
2252
500k
    2418070663U,  // ASR_ZZI_D
2253
500k
    2179011719U,  // ASR_ZZI_H
2254
500k
    4028716167U,  // ASR_ZZI_S
2255
500k
    270746281U, // AUTDA
2256
500k
    270746855U, // AUTDB
2257
500k
    213937U,  // AUTDZA
2258
500k
    215248U,  // AUTDZB
2259
500k
    270746309U, // AUTIA
2260
500k
    7234U,  // AUTIA1716
2261
500k
    7313U,  // AUTIASP
2262
500k
    7304U,  // AUTIAZ
2263
500k
    270746882U, // AUTIB
2264
500k
    7243U,  // AUTIB1716
2265
500k
    7225U,  // AUTIBSP
2266
500k
    7216U,  // AUTIBZ
2267
500k
    213953U,  // AUTIZA
2268
500k
    215264U,  // AUTIZB
2269
500k
    8615U,  // AXFLAG
2270
500k
    230348U,  // B
2271
500k
    543267509U, // BCAX
2272
500k
    2418072245U,  // BCAX_ZZZZ
2273
500k
    252846U,  // BCcc
2274
500k
    3760231064U,  // BDEP_ZZZ_B
2275
500k
    2418070168U,  // BDEP_ZZZ_D
2276
500k
    2179011224U,  // BDEP_ZZZ_H
2277
500k
    4028715672U,  // BDEP_ZZZ_S
2278
500k
    3760232586U,  // BEXT_ZZZ_B
2279
500k
    2418071690U,  // BEXT_ZZZ_D
2280
500k
    2179012746U,  // BEXT_ZZZ_H
2281
500k
    4028717194U,  // BEXT_ZZZ_S
2282
500k
    2961315868U,  // BF16DOTlanev4bf16
2283
500k
    2967607324U,  // BF16DOTlanev8bf16
2284
500k
    807426147U, // BFCVT
2285
500k
    549556712U, // BFCVTN
2286
500k
    2969698720U,  // BFCVTN2
2287
500k
    541136854U, // BFCVTNT_ZPmZ
2288
500k
    541136995U, // BFCVT_ZPmZ
2289
500k
    2686539804U,  // BFDOT_ZZI
2290
500k
    2686539804U,  // BFDOT_ZZZ
2291
500k
    2961315868U,  // BFDOTv4bf16
2292
500k
    2967607324U,  // BFDOTv8bf16
2293
500k
    2967602483U,  // BFMLALB
2294
500k
    2967602483U,  // BFMLALBIdx
2295
500k
    2967606976U,  // BFMLALT
2296
500k
    2967606976U,  // BFMLALTIdx
2297
500k
    2967601887U,  // BFMMLA
2298
500k
    2686534963U,  // BFMMLA_B_ZZI
2299
500k
    2686534963U,  // BFMMLA_B_ZZZ
2300
500k
    2686539456U,  // BFMMLA_T_ZZI
2301
500k
    2686539456U,  // BFMMLA_T_ZZZ
2302
500k
    2686534367U,  // BFMMLA_ZZZ
2303
500k
    270553387U, // BFMWri
2304
500k
    270553387U, // BFMXri
2305
500k
    3760231194U,  // BGRP_ZZZ_B
2306
500k
    2418070298U,  // BGRP_ZZZ_D
2307
500k
    2179011354U,  // BGRP_ZZZ_H
2308
500k
    4028715802U,  // BGRP_ZZZ_S
2309
500k
    807425360U, // BICSWrs
2310
500k
    807425360U, // BICSXrs
2311
500k
    3223360848U,  // BICS_PPzPP
2312
500k
    807422201U, // BICWrs
2313
500k
    807422201U, // BICXrs
2314
500k
    3223357689U,  // BIC_PPzPP
2315
500k
    3223357689U,  // BIC_ZPmZ_B
2316
500k
    3223374073U,  // BIC_ZPmZ_D
2317
500k
    3519088889U,  // BIC_ZPmZ_H
2318
500k
    3223406841U,  // BIC_ZPmZ_S
2319
500k
    2418067705U,  // BIC_ZZZ
2320
500k
    543262969U, // BICv16i8
2321
500k
    813828345U, // BICv2i32
2322
500k
    818022649U, // BICv4i16
2323
500k
    820119801U, // BICv4i32
2324
500k
    822216953U, // BICv8i16
2325
500k
    555845881U, // BICv8i8
2326
500k
    2959215356U,  // BIFv16i8
2327
500k
    2971798268U,  // BIFv8i8
2328
500k
    2959218331U,  // BITv16i8
2329
500k
    2971801243U,  // BITv8i8
2330
500k
    233372U,  // BL
2331
500k
    21517U, // BLR
2332
500k
    807420544U, // BLRAA
2333
500k
    23358U, // BLRAAZ
2334
500k
    807421042U, // BLRAB
2335
500k
    23373U, // BLRABZ
2336
500k
    21431U, // BR
2337
500k
    807420531U, // BRAA
2338
500k
    23351U, // BRAAZ
2339
500k
    807421029U, // BRAB
2340
500k
    23366U, // BRABZ
2341
500k
    8644U,  // BRB_IALL
2342
500k
    8622U,  // BRB_INJ
2343
500k
    265986U,  // BRK
2344
500k
    3223360779U,  // BRKAS_PPzP
2345
500k
    2130636U, // BRKA_PPmP
2346
500k
    3223356108U,  // BRKA_PPzP
2347
500k
    3223360815U,  // BRKBS_PPzP
2348
500k
    2131209U, // BRKB_PPmP
2349
500k
    3223356681U,  // BRKB_PPzP
2350
500k
    3223360944U,  // BRKNS_PPzP
2351
500k
    3223359912U,  // BRKN_PPzP
2352
500k
    3223360786U,  // BRKPAS_PPzPP
2353
500k
    3223356175U,  // BRKPA_PPzPP
2354
500k
    3223360822U,  // BRKPBS_PPzPP
2355
500k
    3223357207U,  // BRKPB_PPzPP
2356
500k
    2418069876U,  // BSL1N_ZZZZ
2357
500k
    2418069883U,  // BSL2N_ZZZZ
2358
500k
    2418069681U,  // BSL_ZZZZ
2359
500k
    2959216817U,  // BSLv16i8
2360
500k
    2971799729U,  // BSLv8i8
2361
500k
    252843U,  // Bcc
2362
500k
    3760228796U,  // CADD_ZZI_B
2363
500k
    2418067900U,  // CADD_ZZI_D
2364
500k
    2179008956U,  // CADD_ZZI_H
2365
500k
    4028713404U,  // CADD_ZZI_S
2366
500k
    270746763U, // CASAB
2367
500k
    270748700U, // CASAH
2368
500k
    270747006U, // CASALB
2369
500k
    270748859U, // CASALH
2370
500k
    270749559U, // CASALW
2371
500k
    270749559U, // CASALX
2372
500k
    270746476U, // CASAW
2373
500k
    270746476U, // CASAX
2374
500k
    270747618U, // CASB
2375
500k
    270749244U, // CASH
2376
500k
    270747212U, // CASLB
2377
500k
    270748953U, // CASLH
2378
500k
    270749866U, // CASLW
2379
500k
    270749866U, // CASLX
2380
500k
    282454U,  // CASPALW
2381
500k
    298838U,  // CASPALX
2382
500k
    279342U,  // CASPAW
2383
500k
    295726U,  // CASPAX
2384
500k
    282765U,  // CASPLW
2385
500k
    299149U,  // CASPLX
2386
500k
    283424U,  // CASPW
2387
500k
    299808U,  // CASPX
2388
500k
    270750982U, // CASW
2389
500k
    270750982U, // CASX
2390
500k
    1075862372U,  // CBNZW
2391
500k
    1075862372U,  // CBNZX
2392
500k
    1075862357U,  // CBZW
2393
500k
    1075862357U,  // CBZX
2394
500k
    807424430U, // CCMNWi
2395
500k
    807424430U, // CCMNWr
2396
500k
    807424430U, // CCMNXi
2397
500k
    807424430U, // CCMNXr
2398
500k
    807424725U, // CCMPWi
2399
500k
    807424725U, // CCMPWr
2400
500k
    807424725U, // CCMPXi
2401
500k
    807424725U, // CCMPXr
2402
500k
    2686507030U,  // CDOT_ZZZI_D
2403
500k
    1344362518U,  // CDOT_ZZZI_S
2404
500k
    2686507030U,  // CDOT_ZZZ_D
2405
500k
    1344362518U,  // CDOT_ZZZ_S
2406
500k
    8678U,  // CFINV
2407
500k
    3223339906U,  // CLASTA_RPZ_B
2408
500k
    3223339906U,  // CLASTA_RPZ_D
2409
500k
    3223339906U,  // CLASTA_RPZ_H
2410
500k
    3223339906U,  // CLASTA_RPZ_S
2411
500k
    3223339906U,  // CLASTA_VPZ_B
2412
500k
    3223339906U,  // CLASTA_VPZ_D
2413
500k
    3223339906U,  // CLASTA_VPZ_H
2414
500k
    3223339906U,  // CLASTA_VPZ_S
2415
500k
    3223356290U,  // CLASTA_ZPZ_B
2416
500k
    3223372674U,  // CLASTA_ZPZ_D
2417
500k
    2176910210U,  // CLASTA_ZPZ_H
2418
500k
    3223405442U,  // CLASTA_ZPZ_S
2419
500k
    3223341131U,  // CLASTB_RPZ_B
2420
500k
    3223341131U,  // CLASTB_RPZ_D
2421
500k
    3223341131U,  // CLASTB_RPZ_H
2422
500k
    3223341131U,  // CLASTB_RPZ_S
2423
500k
    3223341131U,  // CLASTB_VPZ_B
2424
500k
    3223341131U,  // CLASTB_VPZ_D
2425
500k
    3223341131U,  // CLASTB_VPZ_H
2426
500k
    3223341131U,  // CLASTB_VPZ_S
2427
500k
    3223357515U,  // CLASTB_ZPZ_B
2428
500k
    3223373899U,  // CLASTB_ZPZ_D
2429
500k
    2176911435U,  // CLASTB_ZPZ_H
2430
500k
    3223406667U,  // CLASTB_ZPZ_S
2431
500k
    23270U, // CLREX
2432
500k
    807425409U, // CLSWr
2433
500k
    807425409U, // CLSXr
2434
500k
    2135425U, // CLS_ZPmZ_B
2435
500k
    2151809U, // CLS_ZPmZ_D
2436
500k
    272700801U, // CLS_ZPmZ_H
2437
500k
    2184577U, // CLS_ZPmZ_S
2438
500k
    543266177U, // CLSv16i8
2439
500k
    545363329U, // CLSv2i32
2440
500k
    549557633U, // CLSv4i16
2441
500k
    551654785U, // CLSv4i32
2442
500k
    553751937U, // CLSv8i16
2443
500k
    555849089U, // CLSv8i8
2444
500k
    807426911U, // CLZWr
2445
500k
    807426911U, // CLZXr
2446
500k
    2136927U, // CLZ_ZPmZ_B
2447
500k
    2153311U, // CLZ_ZPmZ_D
2448
500k
    272702303U, // CLZ_ZPmZ_H
2449
500k
    2186079U, // CLZ_ZPmZ_S
2450
500k
    543267679U, // CLZv16i8
2451
500k
    545364831U, // CLZv2i32
2452
500k
    549559135U, // CLZv4i16
2453
500k
    551656287U, // CLZv4i32
2454
500k
    553753439U, // CLZv8i16
2455
500k
    555850591U, // CLZv8i8
2456
500k
    543265652U, // CMEQv16i8
2457
500k
    543265652U, // CMEQv16i8rz
2458
500k
    807424884U, // CMEQv1i64
2459
500k
    807424884U, // CMEQv1i64rz
2460
500k
    545362804U, // CMEQv2i32
2461
500k
    545362804U, // CMEQv2i32rz
2462
500k
    547459956U, // CMEQv2i64
2463
500k
    547459956U, // CMEQv2i64rz
2464
500k
    549557108U, // CMEQv4i16
2465
500k
    549557108U, // CMEQv4i16rz
2466
500k
    551654260U, // CMEQv4i32
2467
500k
    551654260U, // CMEQv4i32rz
2468
500k
    553751412U, // CMEQv8i16
2469
500k
    553751412U, // CMEQv8i16rz
2470
500k
    555848564U, // CMEQv8i8
2471
500k
    555848564U, // CMEQv8i8rz
2472
500k
    543263342U, // CMGEv16i8
2473
500k
    543263342U, // CMGEv16i8rz
2474
500k
    807422574U, // CMGEv1i64
2475
500k
    807422574U, // CMGEv1i64rz
2476
500k
    545360494U, // CMGEv2i32
2477
500k
    545360494U, // CMGEv2i32rz
2478
500k
    547457646U, // CMGEv2i64
2479
500k
    547457646U, // CMGEv2i64rz
2480
500k
    549554798U, // CMGEv4i16
2481
500k
    549554798U, // CMGEv4i16rz
2482
500k
    551651950U, // CMGEv4i32
2483
500k
    551651950U, // CMGEv4i32rz
2484
500k
    553749102U, // CMGEv8i16
2485
500k
    553749102U, // CMGEv8i16rz
2486
500k
    555846254U, // CMGEv8i8
2487
500k
    555846254U, // CMGEv8i8rz
2488
500k
    543266445U, // CMGTv16i8
2489
500k
    543266445U, // CMGTv16i8rz
2490
500k
    807425677U, // CMGTv1i64
2491
500k
    807425677U, // CMGTv1i64rz
2492
500k
    545363597U, // CMGTv2i32
2493
500k
    545363597U, // CMGTv2i32rz
2494
500k
    547460749U, // CMGTv2i64
2495
500k
    547460749U, // CMGTv2i64rz
2496
500k
    549557901U, // CMGTv4i16
2497
500k
    549557901U, // CMGTv4i16rz
2498
500k
    551655053U, // CMGTv4i32
2499
500k
    551655053U, // CMGTv4i32rz
2500
500k
    553752205U, // CMGTv8i16
2501
500k
    553752205U, // CMGTv8i16rz
2502
500k
    555849357U, // CMGTv8i8
2503
500k
    555849357U, // CMGTv8i8rz
2504
500k
    543264466U, // CMHIv16i8
2505
500k
    807423698U, // CMHIv1i64
2506
500k
    545361618U, // CMHIv2i32
2507
500k
    547458770U, // CMHIv2i64
2508
500k
    549555922U, // CMHIv4i16
2509
500k
    551653074U, // CMHIv4i32
2510
500k
    553750226U, // CMHIv8i16
2511
500k
    555847378U, // CMHIv8i8
2512
500k
    543266164U, // CMHSv16i8
2513
500k
    807425396U, // CMHSv1i64
2514
500k
    545363316U, // CMHSv2i32
2515
500k
    547460468U, // CMHSv2i64
2516
500k
    549557620U, // CMHSv4i16
2517
500k
    551654772U, // CMHSv4i32
2518
500k
    553751924U, // CMHSv8i16
2519
500k
    555849076U, // CMHSv8i8
2520
500k
    2185298643U,  // CMLA_ZZZI_H
2521
500k
    1344357075U,  // CMLA_ZZZI_S
2522
500k
    1344307923U,  // CMLA_ZZZ_B
2523
500k
    1075888851U,  // CMLA_ZZZ_D
2524
500k
    2185298643U,  // CMLA_ZZZ_H
2525
500k
    1344357075U,  // CMLA_ZZZ_S
2526
500k
    543263373U, // CMLEv16i8rz
2527
500k
    807422605U, // CMLEv1i64rz
2528
500k
    545360525U, // CMLEv2i32rz
2529
500k
    547457677U, // CMLEv2i64rz
2530
500k
    549554829U, // CMLEv4i16rz
2531
500k
    551651981U, // CMLEv4i32rz
2532
500k
    553749133U, // CMLEv8i16rz
2533
500k
    555846285U, // CMLEv8i8rz
2534
500k
    543266648U, // CMLTv16i8rz
2535
500k
    807425880U, // CMLTv1i64rz
2536
500k
    545363800U, // CMLTv2i32rz
2537
500k
    547460952U, // CMLTv2i64rz
2538
500k
    549558104U, // CMLTv4i16rz
2539
500k
    551655256U, // CMLTv4i32rz
2540
500k
    553752408U, // CMLTv8i16rz
2541
500k
    555849560U, // CMLTv8i8rz
2542
500k
    3223360387U,  // CMPEQ_PPzZI_B
2543
500k
    3223376771U,  // CMPEQ_PPzZI_D
2544
500k
    1640043395U,  // CMPEQ_PPzZI_H
2545
500k
    3223409539U,  // CMPEQ_PPzZI_S
2546
500k
    3223360387U,  // CMPEQ_PPzZZ_B
2547
500k
    3223376771U,  // CMPEQ_PPzZZ_D
2548
500k
    1640043395U,  // CMPEQ_PPzZZ_H
2549
500k
    3223409539U,  // CMPEQ_PPzZZ_S
2550
500k
    3223360387U,  // CMPEQ_WIDE_PPzZZ_B
2551
500k
    1640043395U,  // CMPEQ_WIDE_PPzZZ_H
2552
500k
    3223409539U,  // CMPEQ_WIDE_PPzZZ_S
2553
500k
    3223358068U,  // CMPGE_PPzZI_B
2554
500k
    3223374452U,  // CMPGE_PPzZI_D
2555
500k
    1640041076U,  // CMPGE_PPzZI_H
2556
500k
    3223407220U,  // CMPGE_PPzZI_S
2557
500k
    3223358068U,  // CMPGE_PPzZZ_B
2558
500k
    3223374452U,  // CMPGE_PPzZZ_D
2559
500k
    1640041076U,  // CMPGE_PPzZZ_H
2560
500k
    3223407220U,  // CMPGE_PPzZZ_S
2561
500k
    3223358068U,  // CMPGE_WIDE_PPzZZ_B
2562
500k
    1640041076U,  // CMPGE_WIDE_PPzZZ_H
2563
500k
    3223407220U,  // CMPGE_WIDE_PPzZZ_S
2564
500k
    3223361171U,  // CMPGT_PPzZI_B
2565
500k
    3223377555U,  // CMPGT_PPzZI_D
2566
500k
    1640044179U,  // CMPGT_PPzZI_H
2567
500k
    3223410323U,  // CMPGT_PPzZI_S
2568
500k
    3223361171U,  // CMPGT_PPzZZ_B
2569
500k
    3223377555U,  // CMPGT_PPzZZ_D
2570
500k
    1640044179U,  // CMPGT_PPzZZ_H
2571
500k
    3223410323U,  // CMPGT_PPzZZ_S
2572
500k
    3223361171U,  // CMPGT_WIDE_PPzZZ_B
2573
500k
    1640044179U,  // CMPGT_WIDE_PPzZZ_H
2574
500k
    3223410323U,  // CMPGT_WIDE_PPzZZ_S
2575
500k
    3223359192U,  // CMPHI_PPzZI_B
2576
500k
    3223375576U,  // CMPHI_PPzZI_D
2577
500k
    1640042200U,  // CMPHI_PPzZI_H
2578
500k
    3223408344U,  // CMPHI_PPzZI_S
2579
500k
    3223359192U,  // CMPHI_PPzZZ_B
2580
500k
    3223375576U,  // CMPHI_PPzZZ_D
2581
500k
    1640042200U,  // CMPHI_PPzZZ_H
2582
500k
    3223408344U,  // CMPHI_PPzZZ_S
2583
500k
    3223359192U,  // CMPHI_WIDE_PPzZZ_B
2584
500k
    1640042200U,  // CMPHI_WIDE_PPzZZ_H
2585
500k
    3223408344U,  // CMPHI_WIDE_PPzZZ_S
2586
500k
    3223360890U,  // CMPHS_PPzZI_B
2587
500k
    3223377274U,  // CMPHS_PPzZI_D
2588
500k
    1640043898U,  // CMPHS_PPzZI_H
2589
500k
    3223410042U,  // CMPHS_PPzZI_S
2590
500k
    3223360890U,  // CMPHS_PPzZZ_B
2591
500k
    3223377274U,  // CMPHS_PPzZZ_D
2592
500k
    1640043898U,  // CMPHS_PPzZZ_H
2593
500k
    3223410042U,  // CMPHS_PPzZZ_S
2594
500k
    3223360890U,  // CMPHS_WIDE_PPzZZ_B
2595
500k
    1640043898U,  // CMPHS_WIDE_PPzZZ_H
2596
500k
    3223410042U,  // CMPHS_WIDE_PPzZZ_S
2597
500k
    3223358099U,  // CMPLE_PPzZI_B
2598
500k
    3223374483U,  // CMPLE_PPzZI_D
2599
500k
    1640041107U,  // CMPLE_PPzZI_H
2600
500k
    3223407251U,  // CMPLE_PPzZI_S
2601
500k
    3223358099U,  // CMPLE_WIDE_PPzZZ_B
2602
500k
    1640041107U,  // CMPLE_WIDE_PPzZZ_H
2603
500k
    3223407251U,  // CMPLE_WIDE_PPzZZ_S
2604
500k
    3223360075U,  // CMPLO_PPzZI_B
2605
500k
    3223376459U,  // CMPLO_PPzZI_D
2606
500k
    1640043083U,  // CMPLO_PPzZI_H
2607
500k
    3223409227U,  // CMPLO_PPzZI_S
2608
500k
    3223360075U,  // CMPLO_WIDE_PPzZZ_B
2609
500k
    1640043083U,  // CMPLO_WIDE_PPzZZ_H
2610
500k
    3223409227U,  // CMPLO_WIDE_PPzZZ_S
2611
500k
    3223360924U,  // CMPLS_PPzZI_B
2612
500k
    3223377308U,  // CMPLS_PPzZI_D
2613
500k
    1640043932U,  // CMPLS_PPzZI_H
2614
500k
    3223410076U,  // CMPLS_PPzZI_S
2615
500k
    3223360924U,  // CMPLS_WIDE_PPzZZ_B
2616
500k
    1640043932U,  // CMPLS_WIDE_PPzZZ_H
2617
500k
    3223410076U,  // CMPLS_WIDE_PPzZZ_S
2618
500k
    3223361374U,  // CMPLT_PPzZI_B
2619
500k
    3223377758U,  // CMPLT_PPzZI_D
2620
500k
    1640044382U,  // CMPLT_PPzZI_H
2621
500k
    3223410526U,  // CMPLT_PPzZI_S
2622
500k
    3223361374U,  // CMPLT_WIDE_PPzZZ_B
2623
500k
    1640044382U,  // CMPLT_WIDE_PPzZZ_H
2624
500k
    3223410526U,  // CMPLT_WIDE_PPzZZ_S
2625
500k
    3223358122U,  // CMPNE_PPzZI_B
2626
500k
    3223374506U,  // CMPNE_PPzZI_D
2627
500k
    1640041130U,  // CMPNE_PPzZI_H
2628
500k
    3223407274U,  // CMPNE_PPzZI_S
2629
500k
    3223358122U,  // CMPNE_PPzZZ_B
2630
500k
    3223374506U,  // CMPNE_PPzZZ_D
2631
500k
    1640041130U,  // CMPNE_PPzZZ_H
2632
500k
    3223407274U,  // CMPNE_PPzZZ_S
2633
500k
    3223358122U,  // CMPNE_WIDE_PPzZZ_B
2634
500k
    1640041130U,  // CMPNE_WIDE_PPzZZ_H
2635
500k
    3223407274U,  // CMPNE_WIDE_PPzZZ_S
2636
500k
    543266908U, // CMTSTv16i8
2637
500k
    807426140U, // CMTSTv1i64
2638
500k
    545364060U, // CMTSTv2i32
2639
500k
    547461212U, // CMTSTv2i64
2640
500k
    549558364U, // CMTSTv4i16
2641
500k
    551655516U, // CMTSTv4i32
2642
500k
    553752668U, // CMTSTv8i16
2643
500k
    555849820U, // CMTSTv8i8
2644
500k
    2136113U, // CNOT_ZPmZ_B
2645
500k
    2152497U, // CNOT_ZPmZ_D
2646
500k
    272701489U, // CNOT_ZPmZ_H
2647
500k
    2185265U, // CNOT_ZPmZ_S
2648
500k
    1881163838U,  // CNTB_XPiI
2649
500k
    1881164355U,  // CNTD_XPiI
2650
500k
    1881165437U,  // CNTH_XPiI
2651
500k
    3223343910U,  // CNTP_XPP_B
2652
500k
    3223343910U,  // CNTP_XPP_D
2653
500k
    3223343910U,  // CNTP_XPP_H
2654
500k
    3223343910U,  // CNTP_XPP_S
2655
500k
    1881168513U,  // CNTW_XPiI
2656
500k
    2135955U, // CNT_ZPmZ_B
2657
500k
    2152339U, // CNT_ZPmZ_D
2658
500k
    272701331U, // CNT_ZPmZ_H
2659
500k
    2185107U, // CNT_ZPmZ_S
2660
500k
    543266707U, // CNTv16i8
2661
500k
    555849619U, // CNTv8i8
2662
500k
    3223377505U,  // COMPACT_ZPZ_D
2663
500k
    3223410273U,  // COMPACT_ZPZ_S
2664
500k
    318746U,  // CPYE
2665
500k
    318809U,  // CPYEN
2666
500k
    318895U,  // CPYERN
2667
500k
    319783U,  // CPYERT
2668
500k
    319268U,  // CPYERTN
2669
500k
    319017U,  // CPYERTRN
2670
500k
    319515U,  // CPYERTWN
2671
500k
    319697U,  // CPYET
2672
500k
    319172U,  // CPYETN
2673
500k
    318953U,  // CPYETRN
2674
500k
    319451U,  // CPYETWN
2675
500k
    319393U,  // CPYEWN
2676
500k
    319840U,  // CPYEWT
2677
500k
    319331U,  // CPYEWTN
2678
500k
    319086U,  // CPYEWTRN
2679
500k
    319584U,  // CPYEWTWN
2680
500k
    318723U,  // CPYFE
2681
500k
    318783U,  // CPYFEN
2682
500k
    318885U,  // CPYFERN
2683
500k
    319773U,  // CPYFERT
2684
500k
    319257U,  // CPYFERTN
2685
500k
    319005U,  // CPYFERTRN
2686
500k
    319503U,  // CPYFERTWN
2687
500k
    319671U,  // CPYFET
2688
500k
    319143U,  // CPYFETN
2689
500k
    318942U,  // CPYFETRN
2690
500k
    319440U,  // CPYFETWN
2691
500k
    319383U,  // CPYFEWN
2692
500k
    319830U,  // CPYFEWT
2693
500k
    319320U,  // CPYFEWTN
2694
500k
    319074U,  // CPYFEWTRN
2695
500k
    319572U,  // CPYFEWTWN
2696
500k
    318753U,  // CPYFM
2697
500k
    318817U,  // CPYFMN
2698
500k
    318904U,  // CPYFMRN
2699
500k
    319792U,  // CPYFMRT
2700
500k
    319278U,  // CPYFMRTN
2701
500k
    319028U,  // CPYFMRTRN
2702
500k
    319526U,  // CPYFMRTWN
2703
500k
    319705U,  // CPYFMT
2704
500k
    319181U,  // CPYFMTN
2705
500k
    318963U,  // CPYFMTRN
2706
500k
    319461U,  // CPYFMTWN
2707
500k
    319402U,  // CPYFMWN
2708
500k
    319849U,  // CPYFMWT
2709
500k
    319341U,  // CPYFMWTN
2710
500k
    319097U,  // CPYFMWTRN
2711
500k
    319595U,  // CPYFMWTWN
2712
500k
    319641U,  // CPYFP
2713
500k
    318851U,  // CPYFPN
2714
500k
    318923U,  // CPYFPRN
2715
500k
    319811U,  // CPYFPRT
2716
500k
    319299U,  // CPYFPRTN
2717
500k
    319051U,  // CPYFPRTRN
2718
500k
    319549U,  // CPYFPRTWN
2719
500k
    319739U,  // CPYFPT
2720
500k
    319219U,  // CPYFPTN
2721
500k
    318984U,  // CPYFPTRN
2722
500k
    319482U,  // CPYFPTWN
2723
500k
    319421U,  // CPYFPWN
2724
500k
    319868U,  // CPYFPWT
2725
500k
    319362U,  // CPYFPWTN
2726
500k
    319120U,  // CPYFPWTRN
2727
500k
    319618U,  // CPYFPWTWN
2728
500k
    318776U,  // CPYM
2729
500k
    318843U,  // CPYMN
2730
500k
    318914U,  // CPYMRN
2731
500k
    319802U,  // CPYMRT
2732
500k
    319289U,  // CPYMRTN
2733
500k
    319040U,  // CPYMRTRN
2734
500k
    319538U,  // CPYMRTWN
2735
500k
    319731U,  // CPYMT
2736
500k
    319210U,  // CPYMTN
2737
500k
    318974U,  // CPYMTRN
2738
500k
    319472U,  // CPYMTWN
2739
500k
    319412U,  // CPYMWN
2740
500k
    319859U,  // CPYMWT
2741
500k
    319352U,  // CPYMWTN
2742
500k
    319109U,  // CPYMWTRN
2743
500k
    319607U,  // CPYMWTWN
2744
500k
    319664U,  // CPYP
2745
500k
    318877U,  // CPYPN
2746
500k
    318933U,  // CPYPRN
2747
500k
    319821U,  // CPYPRT
2748
500k
    319310U,  // CPYPRTN
2749
500k
    319063U,  // CPYPRTRN
2750
500k
    319561U,  // CPYPRTWN
2751
500k
    319765U,  // CPYPT
2752
500k
    319248U,  // CPYPTN
2753
500k
    318995U,  // CPYPTRN
2754
500k
    319493U,  // CPYPTWN
2755
500k
    319431U,  // CPYPWN
2756
500k
    319878U,  // CPYPWT
2757
500k
    319373U,  // CPYPWTN
2758
500k
    319132U,  // CPYPWTRN
2759
500k
    319630U,  // CPYPWTWN
2760
500k
    2136862U, // CPY_ZPmI_B
2761
500k
    2153246U, // CPY_ZPmI_D
2762
500k
    2151750430U,  // CPY_ZPmI_H
2763
500k
    2186014U, // CPY_ZPmI_S
2764
500k
    2136862U, // CPY_ZPmR_B
2765
500k
    2153246U, // CPY_ZPmR_D
2766
500k
    2420185886U,  // CPY_ZPmR_H
2767
500k
    2186014U, // CPY_ZPmR_S
2768
500k
    2136862U, // CPY_ZPmV_B
2769
500k
    2153246U, // CPY_ZPmV_D
2770
500k
    2420185886U,  // CPY_ZPmV_H
2771
500k
    2186014U, // CPY_ZPmV_S
2772
500k
    3223362334U,  // CPY_ZPzI_B
2773
500k
    3223378718U,  // CPY_ZPzI_D
2774
500k
    1640045342U,  // CPY_ZPzI_H
2775
500k
    3223411486U,  // CPY_ZPzI_S
2776
500k
    807420926U, // CRC32Brr
2777
500k
    807421103U, // CRC32CBrr
2778
500k
    807423040U, // CRC32CHrr
2779
500k
    807426514U, // CRC32CWrr
2780
500k
    807426774U, // CRC32CXrr
2781
500k
    807422876U, // CRC32Hrr
2782
500k
    807426456U, // CRC32Wrr
2783
500k
    807426713U, // CRC32Xrr
2784
500k
    807423996U, // CSELWr
2785
500k
    807423996U, // CSELXr
2786
500k
    807422221U, // CSINCWr
2787
500k
    807422221U, // CSINCXr
2788
500k
    807426360U, // CSINVWr
2789
500k
    807426360U, // CSINVXr
2790
500k
    807422784U, // CSNEGWr
2791
500k
    807422784U, // CSNEGXr
2792
500k
    807424890U, // CTERMEQ_WW
2793
500k
    807424890U, // CTERMEQ_XX
2794
500k
    807422625U, // CTERMNE_WW
2795
500k
    807422625U, // CTERMNE_XX
2796
500k
    262208U,  // DCPS1
2797
500k
    262636U,  // DCPS2
2798
500k
    262702U,  // DCPS3
2799
500k
    2686469306U,  // DECB_XPiI
2800
500k
    2686470557U,  // DECD_XPiI
2801
500k
    2686503325U,  // DECD_ZPiI
2802
500k
    2686471243U,  // DECH_XPiI
2803
500k
    39914571U,  // DECH_ZPiI
2804
500k
    3760214638U,  // DECP_XP_B
2805
500k
    2418037358U,  // DECP_XP_D
2806
500k
    1881166446U,  // DECP_XP_H
2807
500k
    4028650094U,  // DECP_XP_S
2808
500k
    1075892846U,  // DECP_ZP_D
2809
500k
    1648431726U,  // DECP_ZP_H
2810
500k
    1344361070U,  // DECP_ZP_S
2811
500k
    2686474717U,  // DECW_XPiI
2812
500k
    2686540253U,  // DECW_ZPiI
2813
500k
    329362U,  // DMB
2814
500k
    8660U,  // DRPS
2815
500k
    329704U,  // DSB
2816
500k
    346088U,  // DSBnXS
2817
500k
    2954940767U,  // DUPM_ZI
2818
500k
    3223360314U,  // DUP_ZI_B
2819
500k
    3491812154U,  // DUP_ZI_D
2820
500k
    42013498U,  // DUP_ZI_H
2821
500k
    3760280378U,  // DUP_ZI_S
2822
500k
    807441210U, // DUP_ZR_B
2823
500k
    807457594U, // DUP_ZR_D
2824
500k
    1654723386U,  // DUP_ZR_H
2825
500k
    807490362U, // DUP_ZR_S
2826
500k
    3760231226U,  // DUP_ZZI_B
2827
500k
    2418070330U,  // DUP_ZZI_D
2828
500k
    4058059578U,  // DUP_ZZI_H
2829
500k
    4073034554U,  // DUP_ZZI_Q
2830
500k
    4028715834U,  // DUP_ZZI_S
2831
500k
    538990912U, // DUPi16
2832
500k
    538990912U, // DUPi32
2833
500k
    538990912U, // DUPi64
2834
500k
    538990912U, // DUPi8
2835
500k
    811701050U, // DUPv16i8gpr
2836
500k
    543265594U, // DUPv16i8lane
2837
500k
    813798202U, // DUPv2i32gpr
2838
500k
    545362746U, // DUPv2i32lane
2839
500k
    815895354U, // DUPv2i64gpr
2840
500k
    547459898U, // DUPv2i64lane
2841
500k
    817992506U, // DUPv4i16gpr
2842
500k
    549557050U, // DUPv4i16lane
2843
500k
    820089658U, // DUPv4i32gpr
2844
500k
    551654202U, // DUPv4i32lane
2845
500k
    822186810U, // DUPv8i16gpr
2846
500k
    553751354U, // DUPv8i16lane
2847
500k
    824283962U, // DUPv8i8gpr
2848
500k
    555848506U, // DUPv8i8lane
2849
500k
    807424436U, // EONWrs
2850
500k
    807424436U, // EONXrs
2851
500k
    543261224U, // EOR3
2852
500k
    2418065960U,  // EOR3_ZZZZ
2853
500k
    1344312922U,  // EORBT_ZZZ_B
2854
500k
    1075893850U,  // EORBT_ZZZ_D
2855
500k
    2185303642U,  // EORBT_ZZZ_H
2856
500k
    1344362074U,  // EORBT_ZZZ_S
2857
500k
    3223361025U,  // EORS_PPzPP
2858
500k
    1344309316U,  // EORTB_ZZZ_B
2859
500k
    1075890244U,  // EORTB_ZZZ_D
2860
500k
    2185300036U,  // EORTB_ZZZ_H
2861
500k
    1344358468U,  // EORTB_ZZZ_S
2862
500k
    153937U,  // EORV_VPZ_B
2863
500k
    1646434641U,  // EORV_VPZ_D
2864
500k
    1648548177U,  // EORV_VPZ_H
2865
500k
    1638078801U,  // EORV_VPZ_S
2866
500k
    807425120U, // EORWri
2867
500k
    807425120U, // EORWrs
2868
500k
    807425120U, // EORXri
2869
500k
    807425120U, // EORXrs
2870
500k
    3223360608U,  // EOR_PPzPP
2871
500k
    2418070624U,  // EOR_ZI
2872
500k
    3223360608U,  // EOR_ZPmZ_B
2873
500k
    3223376992U,  // EOR_ZPmZ_D
2874
500k
    3519091808U,  // EOR_ZPmZ_H
2875
500k
    3223409760U,  // EOR_ZPmZ_S
2876
500k
    2418070624U,  // EOR_ZZZ
2877
500k
    543265888U, // EORv16i8
2878
500k
    555848800U, // EORv8i8
2879
500k
    8665U,  // ERET
2880
500k
    8591U,  // ERETAA
2881
500k
    8598U,  // ERETAB
2882
500k
    3223356305U,  // EXTRACT_ZPMXI_H_B
2883
500k
    3223372689U,  // EXTRACT_ZPMXI_H_D
2884
500k
    3519087505U,  // EXTRACT_ZPMXI_H_H
2885
500k
    3519382417U,  // EXTRACT_ZPMXI_H_Q
2886
500k
    3223405457U,  // EXTRACT_ZPMXI_H_S
2887
500k
    3223356305U,  // EXTRACT_ZPMXI_V_B
2888
500k
    3223372689U,  // EXTRACT_ZPMXI_V_D
2889
500k
    3519087505U,  // EXTRACT_ZPMXI_V_H
2890
500k
    3519382417U,  // EXTRACT_ZPMXI_V_Q
2891
500k
    3223405457U,  // EXTRACT_ZPMXI_V_S
2892
500k
    807425197U, // EXTRWrri
2893
500k
    807425197U, // EXTRXrri
2894
500k
    3760232587U,  // EXT_ZZI
2895
500k
    2136203U, // EXT_ZZI_B
2896
500k
    543266955U, // EXTv16i8
2897
500k
    555849867U, // EXTv8i8
2898
500k
    807422338U, // FABD16
2899
500k
    807422338U, // FABD32
2900
500k
    807422338U, // FABD64
2901
500k
    3223374210U,  // FABD_ZPmZ_D
2902
500k
    3519089026U,  // FABD_ZPmZ_H
2903
500k
    3223406978U,  // FABD_ZPmZ_S
2904
500k
    545360258U, // FABDv2f32
2905
500k
    547457410U, // FABDv2f64
2906
500k
    549554562U, // FABDv4f16
2907
500k
    551651714U, // FABDv4f32
2908
500k
    553748866U, // FABDv8f16
2909
500k
    807425314U, // FABSDr
2910
500k
    807425314U, // FABSHr
2911
500k
    807425314U, // FABSSr
2912
500k
    2151714U, // FABS_ZPmZ_D
2913
500k
    272700706U, // FABS_ZPmZ_H
2914
500k
    2184482U, // FABS_ZPmZ_S
2915
500k
    545363234U, // FABSv2f32
2916
500k
    547460386U, // FABSv2f64
2917
500k
    549557538U, // FABSv4f16
2918
500k
    551654690U, // FABSv4f32
2919
500k
    553751842U, // FABSv8f16
2920
500k
    807422557U, // FACGE16
2921
500k
    807422557U, // FACGE32
2922
500k
    807422557U, // FACGE64
2923
500k
    3223374429U,  // FACGE_PPzZZ_D
2924
500k
    1640041053U,  // FACGE_PPzZZ_H
2925
500k
    3223407197U,  // FACGE_PPzZZ_S
2926
500k
    545360477U, // FACGEv2f32
2927
500k
    547457629U, // FACGEv2f64
2928
500k
    549554781U, // FACGEv4f16
2929
500k
    551651933U, // FACGEv4f32
2930
500k
    553749085U, // FACGEv8f16
2931
500k
    807425660U, // FACGT16
2932
500k
    807425660U, // FACGT32
2933
500k
    807425660U, // FACGT64
2934
500k
    3223377532U,  // FACGT_PPzZZ_D
2935
500k
    1640044156U,  // FACGT_PPzZZ_H
2936
500k
    3223410300U,  // FACGT_PPzZZ_S
2937
500k
    545363580U, // FACGTv2f32
2938
500k
    547460732U, // FACGTv2f64
2939
500k
    549557884U, // FACGTv4f16
2940
500k
    551655036U, // FACGTv4f32
2941
500k
    553752188U, // FACGTv8f16
2942
500k
    48399010U,  // FADDA_VPZ_D
2943
500k
    2197996194U,  // FADDA_VPZ_H
2944
500k
    52626082U,  // FADDA_VPZ_S
2945
500k
    807422417U, // FADDDrr
2946
500k
    807422417U, // FADDHrr
2947
500k
    3223376524U,  // FADDP_ZPmZZ_D
2948
500k
    3519091340U,  // FADDP_ZPmZZ_H
2949
500k
    3223409292U,  // FADDP_ZPmZZ_S
2950
500k
    545362572U, // FADDPv2f32
2951
500k
    547459724U, // FADDPv2f64
2952
500k
    538989196U, // FADDPv2i16p
2953
500k
    538989196U, // FADDPv2i32p
2954
500k
    538989196U, // FADDPv2i64p
2955
500k
    549556876U, // FADDPv4f16
2956
500k
    551654028U, // FADDPv4f32
2957
500k
    553751180U, // FADDPv8f16
2958
500k
    807422417U, // FADDSrr
2959
500k
    1646434511U,  // FADDV_VPZ_D
2960
500k
    1648548047U,  // FADDV_VPZ_H
2961
500k
    1638078671U,  // FADDV_VPZ_S
2962
500k
    3223374289U,  // FADD_ZPmI_D
2963
500k
    3519089105U,  // FADD_ZPmI_H
2964
500k
    3223407057U,  // FADD_ZPmI_S
2965
500k
    3223374289U,  // FADD_ZPmZ_D
2966
500k
    3519089105U,  // FADD_ZPmZ_H
2967
500k
    3223407057U,  // FADD_ZPmZ_S
2968
500k
    2418067921U,  // FADD_ZZZ_D
2969
500k
    2179008977U,  // FADD_ZZZ_H
2970
500k
    4028713425U,  // FADD_ZZZ_S
2971
500k
    545360337U, // FADDv2f32
2972
500k
    547457489U, // FADDv2f64
2973
500k
    549554641U, // FADDv4f16
2974
500k
    551651793U, // FADDv4f32
2975
500k
    553748945U, // FADDv8f16
2976
500k
    3223374267U,  // FCADD_ZPmZ_D
2977
500k
    3519089083U,  // FCADD_ZPmZ_H
2978
500k
    3223407035U,  // FCADD_ZPmZ_S
2979
500k
    545360315U, // FCADDv2f32
2980
500k
    547457467U, // FCADDv2f64
2981
500k
    549554619U, // FCADDv4f16
2982
500k
    551651771U, // FCADDv4f32
2983
500k
    553748923U, // FCADDv8f16
2984
500k
    807424724U, // FCCMPDrr
2985
500k
    807422657U, // FCCMPEDrr
2986
500k
    807422657U, // FCCMPEHrr
2987
500k
    807422657U, // FCCMPESrr
2988
500k
    807424724U, // FCCMPHrr
2989
500k
    807424724U, // FCCMPSrr
2990
500k
    807424883U, // FCMEQ16
2991
500k
    807424883U, // FCMEQ32
2992
500k
    807424883U, // FCMEQ64
2993
500k
    3223376755U,  // FCMEQ_PPzZ0_D
2994
500k
    1640043379U,  // FCMEQ_PPzZ0_H
2995
500k
    3223409523U,  // FCMEQ_PPzZ0_S
2996
500k
    3223376755U,  // FCMEQ_PPzZZ_D
2997
500k
    1640043379U,  // FCMEQ_PPzZZ_H
2998
500k
    3223409523U,  // FCMEQ_PPzZZ_S
2999
500k
    807424883U, // FCMEQv1i16rz
3000
500k
    807424883U, // FCMEQv1i32rz
3001
500k
    807424883U, // FCMEQv1i64rz
3002
500k
    545362803U, // FCMEQv2f32
3003
500k
    547459955U, // FCMEQv2f64
3004
500k
    545362803U, // FCMEQv2i32rz
3005
500k
    547459955U, // FCMEQv2i64rz
3006
500k
    549557107U, // FCMEQv4f16
3007
500k
    551654259U, // FCMEQv4f32
3008
500k
    549557107U, // FCMEQv4i16rz
3009
500k
    551654259U, // FCMEQv4i32rz
3010
500k
    553751411U, // FCMEQv8f16
3011
500k
    553751411U, // FCMEQv8i16rz
3012
500k
    807422573U, // FCMGE16
3013
500k
    807422573U, // FCMGE32
3014
500k
    807422573U, // FCMGE64
3015
500k
    3223374445U,  // FCMGE_PPzZ0_D
3016
500k
    1640041069U,  // FCMGE_PPzZ0_H
3017
500k
    3223407213U,  // FCMGE_PPzZ0_S
3018
500k
    3223374445U,  // FCMGE_PPzZZ_D
3019
500k
    1640041069U,  // FCMGE_PPzZZ_H
3020
500k
    3223407213U,  // FCMGE_PPzZZ_S
3021
500k
    807422573U, // FCMGEv1i16rz
3022
500k
    807422573U, // FCMGEv1i32rz
3023
500k
    807422573U, // FCMGEv1i64rz
3024
500k
    545360493U, // FCMGEv2f32
3025
500k
    547457645U, // FCMGEv2f64
3026
500k
    545360493U, // FCMGEv2i32rz
3027
500k
    547457645U, // FCMGEv2i64rz
3028
500k
    549554797U, // FCMGEv4f16
3029
500k
    551651949U, // FCMGEv4f32
3030
500k
    549554797U, // FCMGEv4i16rz
3031
500k
    551651949U, // FCMGEv4i32rz
3032
500k
    553749101U, // FCMGEv8f16
3033
500k
    553749101U, // FCMGEv8i16rz
3034
500k
    807425676U, // FCMGT16
3035
500k
    807425676U, // FCMGT32
3036
500k
    807425676U, // FCMGT64
3037
500k
    3223377548U,  // FCMGT_PPzZ0_D
3038
500k
    1640044172U,  // FCMGT_PPzZ0_H
3039
500k
    3223410316U,  // FCMGT_PPzZ0_S
3040
500k
    3223377548U,  // FCMGT_PPzZZ_D
3041
500k
    1640044172U,  // FCMGT_PPzZZ_H
3042
500k
    3223410316U,  // FCMGT_PPzZZ_S
3043
500k
    807425676U, // FCMGTv1i16rz
3044
500k
    807425676U, // FCMGTv1i32rz
3045
500k
    807425676U, // FCMGTv1i64rz
3046
500k
    545363596U, // FCMGTv2f32
3047
500k
    547460748U, // FCMGTv2f64
3048
500k
    545363596U, // FCMGTv2i32rz
3049
500k
    547460748U, // FCMGTv2i64rz
3050
500k
    549557900U, // FCMGTv4f16
3051
500k
    551655052U, // FCMGTv4f32
3052
500k
    549557900U, // FCMGTv4i16rz
3053
500k
    551655052U, // FCMGTv4i32rz
3054
500k
    553752204U, // FCMGTv8f16
3055
500k
    553752204U, // FCMGTv8i16rz
3056
500k
    3223372498U,  // FCMLA_ZPmZZ_D
3057
500k
    3519087314U,  // FCMLA_ZPmZZ_H
3058
500k
    3223405266U,  // FCMLA_ZPmZZ_S
3059
500k
    2185298642U,  // FCMLA_ZZZI_H
3060
500k
    1344357074U,  // FCMLA_ZZZI_S
3061
500k
    2961310418U,  // FCMLAv2f32
3062
500k
    2963407570U,  // FCMLAv2f64
3063
500k
    2965504722U,  // FCMLAv4f16
3064
500k
    2965504722U,  // FCMLAv4f16_indexed
3065
500k
    2967601874U,  // FCMLAv4f32
3066
500k
    2967601874U,  // FCMLAv4f32_indexed
3067
500k
    2969699026U,  // FCMLAv8f16
3068
500k
    2969699026U,  // FCMLAv8f16_indexed
3069
500k
    3223374476U,  // FCMLE_PPzZ0_D
3070
500k
    1640041100U,  // FCMLE_PPzZ0_H
3071
500k
    3223407244U,  // FCMLE_PPzZ0_S
3072
500k
    807422604U, // FCMLEv1i16rz
3073
500k
    807422604U, // FCMLEv1i32rz
3074
500k
    807422604U, // FCMLEv1i64rz
3075
500k
    545360524U, // FCMLEv2i32rz
3076
500k
    547457676U, // FCMLEv2i64rz
3077
500k
    549554828U, // FCMLEv4i16rz
3078
500k
    551651980U, // FCMLEv4i32rz
3079
500k
    553749132U, // FCMLEv8i16rz
3080
500k
    3223377751U,  // FCMLT_PPzZ0_D
3081
500k
    1640044375U,  // FCMLT_PPzZ0_H
3082
500k
    3223410519U,  // FCMLT_PPzZ0_S
3083
500k
    807425879U, // FCMLTv1i16rz
3084
500k
    807425879U, // FCMLTv1i32rz
3085
500k
    807425879U, // FCMLTv1i64rz
3086
500k
    545363799U, // FCMLTv2i32rz
3087
500k
    547460951U, // FCMLTv2i64rz
3088
500k
    549558103U, // FCMLTv4i16rz
3089
500k
    551655255U, // FCMLTv4i32rz
3090
500k
    553752407U, // FCMLTv8i16rz
3091
500k
    3223374490U,  // FCMNE_PPzZ0_D
3092
500k
    1640041114U,  // FCMNE_PPzZ0_H
3093
500k
    3223407258U,  // FCMNE_PPzZ0_S
3094
500k
    3223374490U,  // FCMNE_PPzZZ_D
3095
500k
    1640041114U,  // FCMNE_PPzZZ_H
3096
500k
    3223407258U,  // FCMNE_PPzZZ_S
3097
500k
    54547163U,  // FCMPDri
3098
500k
    807424731U, // FCMPDrr
3099
500k
    54545097U,  // FCMPEDri
3100
500k
    807422665U, // FCMPEDrr
3101
500k
    54545097U,  // FCMPEHri
3102
500k
    807422665U, // FCMPEHrr
3103
500k
    54545097U,  // FCMPESri
3104
500k
    807422665U, // FCMPESrr
3105
500k
    54547163U,  // FCMPHri
3106
500k
    807424731U, // FCMPHrr
3107
500k
    54547163U,  // FCMPSri
3108
500k
    807424731U, // FCMPSrr
3109
500k
    3223376472U,  // FCMUO_PPzZZ_D
3110
500k
    1640043096U,  // FCMUO_PPzZZ_H
3111
500k
    3223409240U,  // FCMUO_PPzZZ_S
3112
500k
    2153245U, // FCPY_ZPmI_D
3113
500k
    272702237U, // FCPY_ZPmI_H
3114
500k
    2186013U, // FCPY_ZPmI_S
3115
500k
    807423995U, // FCSELDrrr
3116
500k
    807423995U, // FCSELHrrr
3117
500k
    807423995U, // FCSELSrrr
3118
500k
    807425306U, // FCVTASUWDr
3119
500k
    807425306U, // FCVTASUWHr
3120
500k
    807425306U, // FCVTASUWSr
3121
500k
    807425306U, // FCVTASUXDr
3122
500k
    807425306U, // FCVTASUXHr
3123
500k
    807425306U, // FCVTASUXSr
3124
500k
    807425306U, // FCVTASv1f16
3125
500k
    807425306U, // FCVTASv1i32
3126
500k
    807425306U, // FCVTASv1i64
3127
500k
    545363226U, // FCVTASv2f32
3128
500k
    547460378U, // FCVTASv2f64
3129
500k
    549557530U, // FCVTASv4f16
3130
500k
    551654682U, // FCVTASv4f32
3131
500k
    553751834U, // FCVTASv8f16
3132
500k
    807426199U, // FCVTAUUWDr
3133
500k
    807426199U, // FCVTAUUWHr
3134
500k
    807426199U, // FCVTAUUWSr
3135
500k
    807426199U, // FCVTAUUXDr
3136
500k
    807426199U, // FCVTAUUXHr
3137
500k
    807426199U, // FCVTAUUXSr
3138
500k
    807426199U, // FCVTAUv1f16
3139
500k
    807426199U, // FCVTAUv1i32
3140
500k
    807426199U, // FCVTAUv1i64
3141
500k
    545364119U, // FCVTAUv2f32
3142
500k
    547461271U, // FCVTAUv2f64
3143
500k
    549558423U, // FCVTAUv4f16
3144
500k
    551655575U, // FCVTAUv4f32
3145
500k
    553752727U, // FCVTAUv8f16
3146
500k
    807426148U, // FCVTDHr
3147
500k
    807426148U, // FCVTDSr
3148
500k
    807426148U, // FCVTHDr
3149
500k
    807426148U, // FCVTHSr
3150
500k
    2185095U, // FCVTLT_ZPmZ_HtoS
3151
500k
    2152327U, // FCVTLT_ZPmZ_StoD
3152
500k
    547459298U, // FCVTLv2i32
3153
500k
    551653602U, // FCVTLv4i16
3154
500k
    547455322U, // FCVTLv4i32
3155
500k
    551649626U, // FCVTLv8i16
3156
500k
    807425443U, // FCVTMSUWDr
3157
500k
    807425443U, // FCVTMSUWHr
3158
500k
    807425443U, // FCVTMSUWSr
3159
500k
    807425443U, // FCVTMSUXDr
3160
500k
    807425443U, // FCVTMSUXHr
3161
500k
    807425443U, // FCVTMSUXSr
3162
500k
    807425443U, // FCVTMSv1f16
3163
500k
    807425443U, // FCVTMSv1i32
3164
500k
    807425443U, // FCVTMSv1i64
3165
500k
    545363363U, // FCVTMSv2f32
3166
500k
    547460515U, // FCVTMSv2f64
3167
500k
    549557667U, // FCVTMSv4f16
3168
500k
    551654819U, // FCVTMSv4f32
3169
500k
    553751971U, // FCVTMSv8f16
3170
500k
    807426215U, // FCVTMUUWDr
3171
500k
    807426215U, // FCVTMUUWHr
3172
500k
    807426215U, // FCVTMUUWSr
3173
500k
    807426215U, // FCVTMUUXDr
3174
500k
    807426215U, // FCVTMUUXHr
3175
500k
    807426215U, // FCVTMUUXSr
3176
500k
    807426215U, // FCVTMUv1f16
3177
500k
    807426215U, // FCVTMUv1i32
3178
500k
    807426215U, // FCVTMUv1i64
3179
500k
    545364135U, // FCVTMUv2f32
3180
500k
    547461287U, // FCVTMUv2f64
3181
500k
    549558439U, // FCVTMUv4f16
3182
500k
    551655591U, // FCVTMUv4f32
3183
500k
    553752743U, // FCVTMUv8f16
3184
500k
    807425469U, // FCVTNSUWDr
3185
500k
    807425469U, // FCVTNSUWHr
3186
500k
    807425469U, // FCVTNSUWSr
3187
500k
    807425469U, // FCVTNSUXDr
3188
500k
    807425469U, // FCVTNSUXHr
3189
500k
    807425469U, // FCVTNSUXSr
3190
500k
    807425469U, // FCVTNSv1f16
3191
500k
    807425469U, // FCVTNSv1i32
3192
500k
    807425469U, // FCVTNSv1i64
3193
500k
    545363389U, // FCVTNSv2f32
3194
500k
    547460541U, // FCVTNSv2f64
3195
500k
    549557693U, // FCVTNSv4f16
3196
500k
    551654845U, // FCVTNSv4f32
3197
500k
    553751997U, // FCVTNSv8f16
3198
500k
    2185175U, // FCVTNT_ZPmZ_DtoS
3199
500k
    541136855U, // FCVTNT_ZPmZ_StoH
3200
500k
    807426223U, // FCVTNUUWDr
3201
500k
    807426223U, // FCVTNUUWHr
3202
500k
    807426223U, // FCVTNUUWSr
3203
500k
    807426223U, // FCVTNUUXDr
3204
500k
    807426223U, // FCVTNUUXHr
3205
500k
    807426223U, // FCVTNUUXSr
3206
500k
    807426223U, // FCVTNUv1f16
3207
500k
    807426223U, // FCVTNUv1i32
3208
500k
    807426223U, // FCVTNUv1i64
3209
500k
    545364143U, // FCVTNUv2f32
3210
500k
    547461295U, // FCVTNUv2f64
3211
500k
    549558447U, // FCVTNUv4f16
3212
500k
    551655599U, // FCVTNUv4f32
3213
500k
    553752751U, // FCVTNUv8f16
3214
500k
    545362409U, // FCVTNv2i32
3215
500k
    549556713U, // FCVTNv4i16
3216
500k
    2967601569U,  // FCVTNv4i32
3217
500k
    2969698721U,  // FCVTNv8i16
3218
500k
    807425516U, // FCVTPSUWDr
3219
500k
    807425516U, // FCVTPSUWHr
3220
500k
    807425516U, // FCVTPSUWSr
3221
500k
    807425516U, // FCVTPSUXDr
3222
500k
    807425516U, // FCVTPSUXHr
3223
500k
    807425516U, // FCVTPSUXSr
3224
500k
    807425516U, // FCVTPSv1f16
3225
500k
    807425516U, // FCVTPSv1i32
3226
500k
    807425516U, // FCVTPSv1i64
3227
500k
    545363436U, // FCVTPSv2f32
3228
500k
    547460588U, // FCVTPSv2f64
3229
500k
    549557740U, // FCVTPSv4f16
3230
500k
    551654892U, // FCVTPSv4f32
3231
500k
    553752044U, // FCVTPSv8f16
3232
500k
    807426231U, // FCVTPUUWDr
3233
500k
    807426231U, // FCVTPUUWHr
3234
500k
    807426231U, // FCVTPUUWSr
3235
500k
    807426231U, // FCVTPUUXDr
3236
500k
    807426231U, // FCVTPUUXHr
3237
500k
    807426231U, // FCVTPUUXSr
3238
500k
    807426231U, // FCVTPUv1f16
3239
500k
    807426231U, // FCVTPUv1i32
3240
500k
    807426231U, // FCVTPUv1i64
3241
500k
    545364151U, // FCVTPUv2f32
3242
500k
    547461303U, // FCVTPUv2f64
3243
500k
    549558455U, // FCVTPUv4f16
3244
500k
    551655607U, // FCVTPUv4f32
3245
500k
    553752759U, // FCVTPUv8f16
3246
500k
    807426148U, // FCVTSDr
3247
500k
    807426148U, // FCVTSHr
3248
500k
    2185229U, // FCVTXNT_ZPmZ_DtoS
3249
500k
    807424543U, // FCVTXNv1i64
3250
500k
    545362463U, // FCVTXNv2f32
3251
500k
    2967601623U,  // FCVTXNv4f32
3252
500k
    2185997U, // FCVTX_ZPmZ_DtoS
3253
500k
    807425569U, // FCVTZSSWDri
3254
500k
    807425569U, // FCVTZSSWHri
3255
500k
    807425569U, // FCVTZSSWSri
3256
500k
    807425569U, // FCVTZSSXDri
3257
500k
    807425569U, // FCVTZSSXHri
3258
500k
    807425569U, // FCVTZSSXSri
3259
500k
    807425569U, // FCVTZSUWDr
3260
500k
    807425569U, // FCVTZSUWHr
3261
500k
    807425569U, // FCVTZSUWSr
3262
500k
    807425569U, // FCVTZSUXDr
3263
500k
    807425569U, // FCVTZSUXHr
3264
500k
    807425569U, // FCVTZSUXSr
3265
500k
    2151969U, // FCVTZS_ZPmZ_DtoD
3266
500k
    2184737U, // FCVTZS_ZPmZ_DtoS
3267
500k
    2151969U, // FCVTZS_ZPmZ_HtoD
3268
500k
    272700961U, // FCVTZS_ZPmZ_HtoH
3269
500k
    2184737U, // FCVTZS_ZPmZ_HtoS
3270
500k
    2151969U, // FCVTZS_ZPmZ_StoD
3271
500k
    2184737U, // FCVTZS_ZPmZ_StoS
3272
500k
    807425569U, // FCVTZSd
3273
500k
    807425569U, // FCVTZSh
3274
500k
    807425569U, // FCVTZSs
3275
500k
    807425569U, // FCVTZSv1f16
3276
500k
    807425569U, // FCVTZSv1i32
3277
500k
    807425569U, // FCVTZSv1i64
3278
500k
    545363489U, // FCVTZSv2f32
3279
500k
    547460641U, // FCVTZSv2f64
3280
500k
    545363489U, // FCVTZSv2i32_shift
3281
500k
    547460641U, // FCVTZSv2i64_shift
3282
500k
    549557793U, // FCVTZSv4f16
3283
500k
    551654945U, // FCVTZSv4f32
3284
500k
    549557793U, // FCVTZSv4i16_shift
3285
500k
    551654945U, // FCVTZSv4i32_shift
3286
500k
    553752097U, // FCVTZSv8f16
3287
500k
    553752097U, // FCVTZSv8i16_shift
3288
500k
    807426239U, // FCVTZUSWDri
3289
500k
    807426239U, // FCVTZUSWHri
3290
500k
    807426239U, // FCVTZUSWSri
3291
500k
    807426239U, // FCVTZUSXDri
3292
500k
    807426239U, // FCVTZUSXHri
3293
500k
    807426239U, // FCVTZUSXSri
3294
500k
    807426239U, // FCVTZUUWDr
3295
500k
    807426239U, // FCVTZUUWHr
3296
500k
    807426239U, // FCVTZUUWSr
3297
500k
    807426239U, // FCVTZUUXDr
3298
500k
    807426239U, // FCVTZUUXHr
3299
500k
    807426239U, // FCVTZUUXSr
3300
500k
    2152639U, // FCVTZU_ZPmZ_DtoD
3301
500k
    2185407U, // FCVTZU_ZPmZ_DtoS
3302
500k
    2152639U, // FCVTZU_ZPmZ_HtoD
3303
500k
    272701631U, // FCVTZU_ZPmZ_HtoH
3304
500k
    2185407U, // FCVTZU_ZPmZ_HtoS
3305
500k
    2152639U, // FCVTZU_ZPmZ_StoD
3306
500k
    2185407U, // FCVTZU_ZPmZ_StoS
3307
500k
    807426239U, // FCVTZUd
3308
500k
    807426239U, // FCVTZUh
3309
500k
    807426239U, // FCVTZUs
3310
500k
    807426239U, // FCVTZUv1f16
3311
500k
    807426239U, // FCVTZUv1i32
3312
500k
    807426239U, // FCVTZUv1i64
3313
500k
    545364159U, // FCVTZUv2f32
3314
500k
    547461311U, // FCVTZUv2f64
3315
500k
    545364159U, // FCVTZUv2i32_shift
3316
500k
    547461311U, // FCVTZUv2i64_shift
3317
500k
    549558463U, // FCVTZUv4f16
3318
500k
    551655615U, // FCVTZUv4f32
3319
500k
    549558463U, // FCVTZUv4i16_shift
3320
500k
    551655615U, // FCVTZUv4i32_shift
3321
500k
    553752767U, // FCVTZUv8f16
3322
500k
    553752767U, // FCVTZUv8i16_shift
3323
500k
    541136996U, // FCVT_ZPmZ_DtoH
3324
500k
    2185316U, // FCVT_ZPmZ_DtoS
3325
500k
    2152548U, // FCVT_ZPmZ_HtoD
3326
500k
    2185316U, // FCVT_ZPmZ_HtoS
3327
500k
    2152548U, // FCVT_ZPmZ_StoD
3328
500k
    541136996U, // FCVT_ZPmZ_StoH
3329
500k
    807426287U, // FDIVDrr
3330
500k
    807426287U, // FDIVHrr
3331
500k
    3223377102U,  // FDIVR_ZPmZ_D
3332
500k
    3519091918U,  // FDIVR_ZPmZ_H
3333
500k
    3223409870U,  // FDIVR_ZPmZ_S
3334
500k
    807426287U, // FDIVSrr
3335
500k
    3223378159U,  // FDIV_ZPmZ_D
3336
500k
    3519092975U,  // FDIV_ZPmZ_H
3337
500k
    3223410927U,  // FDIV_ZPmZ_S
3338
500k
    545364207U, // FDIVv2f32
3339
500k
    547461359U, // FDIVv2f64
3340
500k
    549558511U, // FDIVv4f16
3341
500k
    551655663U, // FDIVv4f32
3342
500k
    553752815U, // FDIVv8f16
3343
500k
    807457593U, // FDUP_ZI_D
3344
500k
    56693561U,  // FDUP_ZI_H
3345
500k
    807490361U, // FDUP_ZI_S
3346
500k
    2418066235U,  // FEXPA_ZZ_D
3347
500k
    1642136379U,  // FEXPA_ZZ_H
3348
500k
    4028711739U,  // FEXPA_ZZ_S
3349
500k
    807425577U, // FJCVTZS
3350
500k
    2147572U, // FLOGB_ZPmZ_D
3351
500k
    272696564U, // FLOGB_ZPmZ_H
3352
500k
    2180340U, // FLOGB_ZPmZ_S
3353
500k
    807422453U, // FMADDDrrr
3354
500k
    807422453U, // FMADDHrrr
3355
500k
    807422453U, // FMADDSrrr
3356
500k
    3223374190U,  // FMAD_ZPmZZ_D
3357
500k
    3519089006U,  // FMAD_ZPmZZ_H
3358
500k
    3223406958U,  // FMAD_ZPmZZ_S
3359
500k
    807426747U, // FMAXDrr
3360
500k
    807426747U, // FMAXHrr
3361
500k
    807424343U, // FMAXNMDrr
3362
500k
    807424343U, // FMAXNMHrr
3363
500k
    3223376618U,  // FMAXNMP_ZPmZZ_D
3364
500k
    3519091434U,  // FMAXNMP_ZPmZZ_H
3365
500k
    3223409386U,  // FMAXNMP_ZPmZZ_S
3366
500k
    545362666U, // FMAXNMPv2f32
3367
500k
    547459818U, // FMAXNMPv2f64
3368
500k
    538989290U, // FMAXNMPv2i16p
3369
500k
    538989290U, // FMAXNMPv2i32p
3370
500k
    538989290U, // FMAXNMPv2i64p
3371
500k
    549556970U, // FMAXNMPv4f16
3372
500k
    551654122U, // FMAXNMPv4f32
3373
500k
    553751274U, // FMAXNMPv8f16
3374
500k
    807424343U, // FMAXNMSrr
3375
500k
    1646434586U,  // FMAXNMV_VPZ_D
3376
500k
    1648548122U,  // FMAXNMV_VPZ_H
3377
500k
    1638078746U,  // FMAXNMV_VPZ_S
3378
500k
    538990874U, // FMAXNMVv4i16v
3379
500k
    538990874U, // FMAXNMVv4i32v
3380
500k
    538990874U, // FMAXNMVv8i16v
3381
500k
    3223376215U,  // FMAXNM_ZPmI_D
3382
500k
    3519091031U,  // FMAXNM_ZPmI_H
3383
500k
    3223408983U,  // FMAXNM_ZPmI_S
3384
500k
    3223376215U,  // FMAXNM_ZPmZ_D
3385
500k
    3519091031U,  // FMAXNM_ZPmZ_H
3386
500k
    3223408983U,  // FMAXNM_ZPmZ_S
3387
500k
    545362263U, // FMAXNMv2f32
3388
500k
    547459415U, // FMAXNMv2f64
3389
500k
    549556567U, // FMAXNMv4f16
3390
500k
    551653719U, // FMAXNMv4f32
3391
500k
    553750871U, // FMAXNMv8f16
3392
500k
    3223376715U,  // FMAXP_ZPmZZ_D
3393
500k
    3519091531U,  // FMAXP_ZPmZZ_H
3394
500k
    3223409483U,  // FMAXP_ZPmZZ_S
3395
500k
    545362763U, // FMAXPv2f32
3396
500k
    547459915U, // FMAXPv2f64
3397
500k
    538989387U, // FMAXPv2i16p
3398
500k
    538989387U, // FMAXPv2i32p
3399
500k
    538989387U, // FMAXPv2i64p
3400
500k
    549557067U, // FMAXPv4f16
3401
500k
    551654219U, // FMAXPv4f32
3402
500k
    553751371U, // FMAXPv8f16
3403
500k
    807426747U, // FMAXSrr
3404
500k
    1646434647U,  // FMAXV_VPZ_D
3405
500k
    1648548183U,  // FMAXV_VPZ_H
3406
500k
    1638078807U,  // FMAXV_VPZ_S
3407
500k
    538990935U, // FMAXVv4i16v
3408
500k
    538990935U, // FMAXVv4i32v
3409
500k
    538990935U, // FMAXVv8i16v
3410
500k
    3223378619U,  // FMAX_ZPmI_D
3411
500k
    3519093435U,  // FMAX_ZPmI_H
3412
500k
    3223411387U,  // FMAX_ZPmI_S
3413
500k
    3223378619U,  // FMAX_ZPmZ_D
3414
500k
    3519093435U,  // FMAX_ZPmZ_H
3415
500k
    3223411387U,  // FMAX_ZPmZ_S
3416
500k
    545364667U, // FMAXv2f32
3417
500k
    547461819U, // FMAXv2f64
3418
500k
    549558971U, // FMAXv4f16
3419
500k
    551656123U, // FMAXv4f32
3420
500k
    553753275U, // FMAXv8f16
3421
500k
    807424402U, // FMINDrr
3422
500k
    807424402U, // FMINHrr
3423
500k
    807424335U, // FMINNMDrr
3424
500k
    807424335U, // FMINNMHrr
3425
500k
    3223376609U,  // FMINNMP_ZPmZZ_D
3426
500k
    3519091425U,  // FMINNMP_ZPmZZ_H
3427
500k
    3223409377U,  // FMINNMP_ZPmZZ_S
3428
500k
    545362657U, // FMINNMPv2f32
3429
500k
    547459809U, // FMINNMPv2f64
3430
500k
    538989281U, // FMINNMPv2i16p
3431
500k
    538989281U, // FMINNMPv2i32p
3432
500k
    538989281U, // FMINNMPv2i64p
3433
500k
    549556961U, // FMINNMPv4f16
3434
500k
    551654113U, // FMINNMPv4f32
3435
500k
    553751265U, // FMINNMPv8f16
3436
500k
    807424335U, // FMINNMSrr
3437
500k
    1646434577U,  // FMINNMV_VPZ_D
3438
500k
    1648548113U,  // FMINNMV_VPZ_H
3439
500k
    1638078737U,  // FMINNMV_VPZ_S
3440
500k
    538990865U, // FMINNMVv4i16v
3441
500k
    538990865U, // FMINNMVv4i32v
3442
500k
    538990865U, // FMINNMVv8i16v
3443
500k
    3223376207U,  // FMINNM_ZPmI_D
3444
500k
    3519091023U,  // FMINNM_ZPmI_H
3445
500k
    3223408975U,  // FMINNM_ZPmI_S
3446
500k
    3223376207U,  // FMINNM_ZPmZ_D
3447
500k
    3519091023U,  // FMINNM_ZPmZ_H
3448
500k
    3223408975U,  // FMINNM_ZPmZ_S
3449
500k
    545362255U, // FMINNMv2f32
3450
500k
    547459407U, // FMINNMv2f64
3451
500k
    549556559U, // FMINNMv4f16
3452
500k
    551653711U, // FMINNMv4f32
3453
500k
    553750863U, // FMINNMv8f16
3454
500k
    3223376633U,  // FMINP_ZPmZZ_D
3455
500k
    3519091449U,  // FMINP_ZPmZZ_H
3456
500k
    3223409401U,  // FMINP_ZPmZZ_S
3457
500k
    545362681U, // FMINPv2f32
3458
500k
    547459833U, // FMINPv2f64
3459
500k
    538989305U, // FMINPv2i16p
3460
500k
    538989305U, // FMINPv2i32p
3461
500k
    538989305U, // FMINPv2i64p
3462
500k
    549556985U, // FMINPv4f16
3463
500k
    551654137U, // FMINPv4f32
3464
500k
    553751289U, // FMINPv8f16
3465
500k
    807424402U, // FMINSrr
3466
500k
    1646434595U,  // FMINV_VPZ_D
3467
500k
    1648548131U,  // FMINV_VPZ_H
3468
500k
    1638078755U,  // FMINV_VPZ_S
3469
500k
    538990883U, // FMINVv4i16v
3470
500k
    538990883U, // FMINVv4i32v
3471
500k
    538990883U, // FMINVv8i16v
3472
500k
    3223376274U,  // FMIN_ZPmI_D
3473
500k
    3519091090U,  // FMIN_ZPmI_H
3474
500k
    3223409042U,  // FMIN_ZPmI_S
3475
500k
    3223376274U,  // FMIN_ZPmZ_D
3476
500k
    3519091090U,  // FMIN_ZPmZ_H
3477
500k
    3223409042U,  // FMIN_ZPmZ_S
3478
500k
    545362322U, // FMINv2f32
3479
500k
    547459474U, // FMINv2f64
3480
500k
    549556626U, // FMINv4f16
3481
500k
    551653778U, // FMINv4f32
3482
500k
    553750930U, // FMINv8f16
3483
500k
    2961309886U,  // FMLAL2lanev4f16
3484
500k
    2967601342U,  // FMLAL2lanev8f16
3485
500k
    2961309886U,  // FMLAL2v4f16
3486
500k
    2967601342U,  // FMLAL2v8f16
3487
500k
    2686534964U,  // FMLALB_ZZZI_SHH
3488
500k
    2686534964U,  // FMLALB_ZZZ_SHH
3489
500k
    2686539457U,  // FMLALT_ZZZI_SHH
3490
500k
    2686539457U,  // FMLALT_ZZZ_SHH
3491
500k
    2961313581U,  // FMLALlanev4f16
3492
500k
    2967605037U,  // FMLALlanev8f16
3493
500k
    2961313581U,  // FMLALv4f16
3494
500k
    2967605037U,  // FMLALv8f16
3495
500k
    3223372505U,  // FMLA_ZPmZZ_D
3496
500k
    3519087321U,  // FMLA_ZPmZZ_H
3497
500k
    3223405273U,  // FMLA_ZPmZZ_S
3498
500k
    1075888857U,  // FMLA_ZZZI_D
3499
500k
    2185298649U,  // FMLA_ZZZI_H
3500
500k
    1344357081U,  // FMLA_ZZZI_S
3501
500k
    270746329U, // FMLAv1i16_indexed
3502
500k
    270746329U, // FMLAv1i32_indexed
3503
500k
    270746329U, // FMLAv1i64_indexed
3504
500k
    2961310425U,  // FMLAv2f32
3505
500k
    2963407577U,  // FMLAv2f64
3506
500k
    2961310425U,  // FMLAv2i32_indexed
3507
500k
    2963407577U,  // FMLAv2i64_indexed
3508
500k
    2965504729U,  // FMLAv4f16
3509
500k
    2967601881U,  // FMLAv4f32
3510
500k
    2965504729U,  // FMLAv4i16_indexed
3511
500k
    2967601881U,  // FMLAv4i32_indexed
3512
500k
    2969699033U,  // FMLAv8f16
3513
500k
    2969699033U,  // FMLAv8i16_indexed
3514
500k
    2961310018U,  // FMLSL2lanev4f16
3515
500k
    2967601474U,  // FMLSL2lanev8f16
3516
500k
    2961310018U,  // FMLSL2v4f16
3517
500k
    2967601474U,  // FMLSL2v8f16
3518
500k
    2686535261U,  // FMLSLB_ZZZI_SHH
3519
500k
    2686535261U,  // FMLSLB_ZZZ_SHH
3520
500k
    2686539631U,  // FMLSLT_ZZZI_SHH
3521
500k
    2686539631U,  // FMLSLT_ZZZ_SHH
3522
500k
    2961313983U,  // FMLSLlanev4f16
3523
500k
    2967605439U,  // FMLSLlanev8f16
3524
500k
    2961313983U,  // FMLSLv4f16
3525
500k
    2967605439U,  // FMLSLv8f16
3526
500k
    3223377295U,  // FMLS_ZPmZZ_D
3527
500k
    3519092111U,  // FMLS_ZPmZZ_H
3528
500k
    3223410063U,  // FMLS_ZPmZZ_S
3529
500k
    1075893647U,  // FMLS_ZZZI_D
3530
500k
    2185303439U,  // FMLS_ZZZI_H
3531
500k
    1344361871U,  // FMLS_ZZZI_S
3532
500k
    270751119U, // FMLSv1i16_indexed
3533
500k
    270751119U, // FMLSv1i32_indexed
3534
500k
    270751119U, // FMLSv1i64_indexed
3535
500k
    2961315215U,  // FMLSv2f32
3536
500k
    2963412367U,  // FMLSv2f64
3537
500k
    2961315215U,  // FMLSv2i32_indexed
3538
500k
    2963412367U,  // FMLSv2i64_indexed
3539
500k
    2965509519U,  // FMLSv4f16
3540
500k
    2967606671U,  // FMLSv4f32
3541
500k
    2965509519U,  // FMLSv4i16_indexed
3542
500k
    2967606671U,  // FMLSv4i32_indexed
3543
500k
    2969703823U,  // FMLSv8f16
3544
500k
    2969703823U,  // FMLSv8i16_indexed
3545
500k
    1075888864U,  // FMMLA_ZZZ_D
3546
500k
    1344357088U,  // FMMLA_ZZZ_S
3547
500k
    2168570647U,  // FMOPA_MPPZZ_D
3548
500k
    2170667799U,  // FMOPA_MPPZZ_S
3549
500k
    2168575445U,  // FMOPS_MPPZZ_D
3550
500k
    2170672597U,  // FMOPS_MPPZZ_S
3551
500k
    538990911U, // FMOVDXHighr
3552
500k
    807426367U, // FMOVDXr
3553
500k
    807426367U, // FMOVDi
3554
500k
    807426367U, // FMOVDr
3555
500k
    807426367U, // FMOVHWr
3556
500k
    807426367U, // FMOVHXr
3557
500k
    807426367U, // FMOVHi
3558
500k
    807426367U, // FMOVHr
3559
500k
    807426367U, // FMOVSWr
3560
500k
    807426367U, // FMOVSi
3561
500k
    807426367U, // FMOVSr
3562
500k
    807426367U, // FMOVWHr
3563
500k
    807426367U, // FMOVWSr
3564
500k
    864131391U, // FMOVXDHighr
3565
500k
    807426367U, // FMOVXDr
3566
500k
    807426367U, // FMOVXHr
3567
500k
    813799743U, // FMOVv2f32_ns
3568
500k
    815896895U, // FMOVv2f64_ns
3569
500k
    817994047U, // FMOVv4f16_ns
3570
500k
    820091199U, // FMOVv4f32_ns
3571
500k
    822188351U, // FMOVv8f16_ns
3572
500k
    3223373810U,  // FMSB_ZPmZZ_D
3573
500k
    3519088626U,  // FMSB_ZPmZZ_H
3574
500k
    3223406578U,  // FMSB_ZPmZZ_S
3575
500k
    807422067U, // FMSUBDrrr
3576
500k
    807422067U, // FMSUBHrrr
3577
500k
    807422067U, // FMSUBSrrr
3578
500k
    807424233U, // FMULDrr
3579
500k
    807424233U, // FMULHrr
3580
500k
    807424233U, // FMULSrr
3581
500k
    807426806U, // FMULX16
3582
500k
    807426806U, // FMULX32
3583
500k
    807426806U, // FMULX64
3584
500k
    3223378678U,  // FMULX_ZPmZ_D
3585
500k
    3519093494U,  // FMULX_ZPmZ_H
3586
500k
    3223411446U,  // FMULX_ZPmZ_S
3587
500k
    807426806U, // FMULXv1i16_indexed
3588
500k
    807426806U, // FMULXv1i32_indexed
3589
500k
    807426806U, // FMULXv1i64_indexed
3590
500k
    545364726U, // FMULXv2f32
3591
500k
    547461878U, // FMULXv2f64
3592
500k
    545364726U, // FMULXv2i32_indexed
3593
500k
    547461878U, // FMULXv2i64_indexed
3594
500k
    549559030U, // FMULXv4f16
3595
500k
    551656182U, // FMULXv4f32
3596
500k
    549559030U, // FMULXv4i16_indexed
3597
500k
    551656182U, // FMULXv4i32_indexed
3598
500k
    553753334U, // FMULXv8f16
3599
500k
    553753334U, // FMULXv8i16_indexed
3600
500k
    3223376105U,  // FMUL_ZPmI_D
3601
500k
    3519090921U,  // FMUL_ZPmI_H
3602
500k
    3223408873U,  // FMUL_ZPmI_S
3603
500k
    3223376105U,  // FMUL_ZPmZ_D
3604
500k
    3519090921U,  // FMUL_ZPmZ_H
3605
500k
    3223408873U,  // FMUL_ZPmZ_S
3606
500k
    2418069737U,  // FMUL_ZZZI_D
3607
500k
    2179010793U,  // FMUL_ZZZI_H
3608
500k
    4028715241U,  // FMUL_ZZZI_S
3609
500k
    2418069737U,  // FMUL_ZZZ_D
3610
500k
    2179010793U,  // FMUL_ZZZ_H
3611
500k
    4028715241U,  // FMUL_ZZZ_S
3612
500k
    807424233U, // FMULv1i16_indexed
3613
500k
    807424233U, // FMULv1i32_indexed
3614
500k
    807424233U, // FMULv1i64_indexed
3615
500k
    545362153U, // FMULv2f32
3616
500k
    547459305U, // FMULv2f64
3617
500k
    545362153U, // FMULv2i32_indexed
3618
500k
    547459305U, // FMULv2i64_indexed
3619
500k
    549556457U, // FMULv4f16
3620
500k
    551653609U, // FMULv4f32
3621
500k
    549556457U, // FMULv4i16_indexed
3622
500k
    551653609U, // FMULv4i32_indexed
3623
500k
    553750761U, // FMULv8f16
3624
500k
    553750761U, // FMULv8i16_indexed
3625
500k
    807422771U, // FNEGDr
3626
500k
    807422771U, // FNEGHr
3627
500k
    807422771U, // FNEGSr
3628
500k
    2149171U, // FNEG_ZPmZ_D
3629
500k
    272698163U, // FNEG_ZPmZ_H
3630
500k
    2181939U, // FNEG_ZPmZ_S
3631
500k
    545360691U, // FNEGv2f32
3632
500k
    547457843U, // FNEGv2f64
3633
500k
    549554995U, // FNEGv4f16
3634
500k
    551652147U, // FNEGv4f32
3635
500k
    553749299U, // FNEGv8f16
3636
500k
    807422460U, // FNMADDDrrr
3637
500k
    807422460U, // FNMADDHrrr
3638
500k
    807422460U, // FNMADDSrrr
3639
500k
    3223374196U,  // FNMAD_ZPmZZ_D
3640
500k
    3519089012U,  // FNMAD_ZPmZZ_H
3641
500k
    3223406964U,  // FNMAD_ZPmZZ_S
3642
500k
    3223372534U,  // FNMLA_ZPmZZ_D
3643
500k
    3519087350U,  // FNMLA_ZPmZZ_H
3644
500k
    3223405302U,  // FNMLA_ZPmZZ_S
3645
500k
    3223377301U,  // FNMLS_ZPmZZ_D
3646
500k
    3519092117U,  // FNMLS_ZPmZZ_H
3647
500k
    3223410069U,  // FNMLS_ZPmZZ_S
3648
500k
    3223373816U,  // FNMSB_ZPmZZ_D
3649
500k
    3519088632U,  // FNMSB_ZPmZZ_H
3650
500k
    3223406584U,  // FNMSB_ZPmZZ_S
3651
500k
    807422074U, // FNMSUBDrrr
3652
500k
    807422074U, // FNMSUBHrrr
3653
500k
    807422074U, // FNMSUBSrrr
3654
500k
    807424239U, // FNMULDrr
3655
500k
    807424239U, // FNMULHrr
3656
500k
    807424239U, // FNMULSrr
3657
500k
    2418068145U,  // FRECPE_ZZ_D
3658
500k
    1642138289U,  // FRECPE_ZZ_H
3659
500k
    4028713649U,  // FRECPE_ZZ_S
3660
500k
    807422641U, // FRECPEv1f16
3661
500k
    807422641U, // FRECPEv1i32
3662
500k
    807422641U, // FRECPEv1i64
3663
500k
    545360561U, // FRECPEv2f32
3664
500k
    547457713U, // FRECPEv2f64
3665
500k
    549554865U, // FRECPEv4f16
3666
500k
    551652017U, // FRECPEv4f32
3667
500k
    553749169U, // FRECPEv8f16
3668
500k
    807425484U, // FRECPS16
3669
500k
    807425484U, // FRECPS32
3670
500k
    807425484U, // FRECPS64
3671
500k
    2418070988U,  // FRECPS_ZZZ_D
3672
500k
    2179012044U,  // FRECPS_ZZZ_H
3673
500k
    4028716492U,  // FRECPS_ZZZ_S
3674
500k
    545363404U, // FRECPSv2f32
3675
500k
    547460556U, // FRECPSv2f64
3676
500k
    549557708U, // FRECPSv4f16
3677
500k
    551654860U, // FRECPSv4f32
3678
500k
    553752012U, // FRECPSv8f16
3679
500k
    2153213U, // FRECPX_ZPmZ_D
3680
500k
    272702205U, // FRECPX_ZPmZ_H
3681
500k
    2185981U, // FRECPX_ZPmZ_S
3682
500k
    807426813U, // FRECPXv1f16
3683
500k
    807426813U, // FRECPXv1i32
3684
500k
    807426813U, // FRECPXv1i64
3685
500k
    807426721U, // FRINT32XDr
3686
500k
    807426721U, // FRINT32XSr
3687
500k
    545364641U, // FRINT32Xv2f32
3688
500k
    547461793U, // FRINT32Xv2f64
3689
500k
    551656097U, // FRINT32Xv4f32
3690
500k
    807426851U, // FRINT32ZDr
3691
500k
    807426851U, // FRINT32ZSr
3692
500k
    545364771U, // FRINT32Zv2f32
3693
500k
    547461923U, // FRINT32Zv2f64
3694
500k
    551656227U, // FRINT32Zv4f32
3695
500k
    807426731U, // FRINT64XDr
3696
500k
    807426731U, // FRINT64XSr
3697
500k
    545364651U, // FRINT64Xv2f32
3698
500k
    547461803U, // FRINT64Xv2f64
3699
500k
    551656107U, // FRINT64Xv4f32
3700
500k
    807426861U, // FRINT64ZDr
3701
500k
    807426861U, // FRINT64ZSr
3702
500k
    545364781U, // FRINT64Zv2f32
3703
500k
    547461933U, // FRINT64Zv2f64
3704
500k
    551656237U, // FRINT64Zv4f32
3705
500k
    807420794U, // FRINTADr
3706
500k
    807420794U, // FRINTAHr
3707
500k
    807420794U, // FRINTASr
3708
500k
    2147194U, // FRINTA_ZPmZ_D
3709
500k
    272696186U, // FRINTA_ZPmZ_H
3710
500k
    2179962U, // FRINTA_ZPmZ_S
3711
500k
    545358714U, // FRINTAv2f32
3712
500k
    547455866U, // FRINTAv2f64
3713
500k
    549553018U, // FRINTAv4f16
3714
500k
    551650170U, // FRINTAv4f32
3715
500k
    553747322U, // FRINTAv8f16
3716
500k
    807423732U, // FRINTIDr
3717
500k
    807423732U, // FRINTIHr
3718
500k
    807423732U, // FRINTISr
3719
500k
    2150132U, // FRINTI_ZPmZ_D
3720
500k
    272699124U, // FRINTI_ZPmZ_H
3721
500k
    2182900U, // FRINTI_ZPmZ_S
3722
500k
    545361652U, // FRINTIv2f32
3723
500k
    547458804U, // FRINTIv2f64
3724
500k
    549555956U, // FRINTIv4f16
3725
500k
    551653108U, // FRINTIv4f32
3726
500k
    553750260U, // FRINTIv8f16
3727
500k
    807424357U, // FRINTMDr
3728
500k
    807424357U, // FRINTMHr
3729
500k
    807424357U, // FRINTMSr
3730
500k
    2150757U, // FRINTM_ZPmZ_D
3731
500k
    272699749U, // FRINTM_ZPmZ_H
3732
500k
    2183525U, // FRINTM_ZPmZ_S
3733
500k
    545362277U, // FRINTMv2f32
3734
500k
    547459429U, // FRINTMv2f64
3735
500k
    549556581U, // FRINTMv4f16
3736
500k
    551653733U, // FRINTMv4f32
3737
500k
    553750885U, // FRINTMv8f16
3738
500k
    807424480U, // FRINTNDr
3739
500k
    807424480U, // FRINTNHr
3740
500k
    807424480U, // FRINTNSr
3741
500k
    2150880U, // FRINTN_ZPmZ_D
3742
500k
    272699872U, // FRINTN_ZPmZ_H
3743
500k
    2183648U, // FRINTN_ZPmZ_S
3744
500k
    545362400U, // FRINTNv2f32
3745
500k
    547459552U, // FRINTNv2f64
3746
500k
    549556704U, // FRINTNv4f16
3747
500k
    551653856U, // FRINTNv4f32
3748
500k
    553751008U, // FRINTNv8f16
3749
500k
    807424812U, // FRINTPDr
3750
500k
    807424812U, // FRINTPHr
3751
500k
    807424812U, // FRINTPSr
3752
500k
    2151212U, // FRINTP_ZPmZ_D
3753
500k
    272700204U, // FRINTP_ZPmZ_H
3754
500k
    2183980U, // FRINTP_ZPmZ_S
3755
500k
    545362732U, // FRINTPv2f32
3756
500k
    547459884U, // FRINTPv2f64
3757
500k
    549557036U, // FRINTPv4f16
3758
500k
    551654188U, // FRINTPv4f32
3759
500k
    553751340U, // FRINTPv8f16
3760
500k
    807426821U, // FRINTXDr
3761
500k
    807426821U, // FRINTXHr
3762
500k
    807426821U, // FRINTXSr
3763
500k
    2153221U, // FRINTX_ZPmZ_D
3764
500k
    272702213U, // FRINTX_ZPmZ_H
3765
500k
    2185989U, // FRINTX_ZPmZ_S
3766
500k
    545364741U, // FRINTXv2f32
3767
500k
    547461893U, // FRINTXv2f64
3768
500k
    549559045U, // FRINTXv4f16
3769
500k
    551656197U, // FRINTXv4f32
3770
500k
    553753349U, // FRINTXv8f16
3771
500k
    807426928U, // FRINTZDr
3772
500k
    807426928U, // FRINTZHr
3773
500k
    807426928U, // FRINTZSr
3774
500k
    2153328U, // FRINTZ_ZPmZ_D
3775
500k
    272702320U, // FRINTZ_ZPmZ_H
3776
500k
    2186096U, // FRINTZ_ZPmZ_S
3777
500k
    545364848U, // FRINTZv2f32
3778
500k
    547462000U, // FRINTZv2f64
3779
500k
    549559152U, // FRINTZv4f16
3780
500k
    551656304U, // FRINTZv4f32
3781
500k
    553753456U, // FRINTZv8f16
3782
500k
    2418068190U,  // FRSQRTE_ZZ_D
3783
500k
    1642138334U,  // FRSQRTE_ZZ_H
3784
500k
    4028713694U,  // FRSQRTE_ZZ_S
3785
500k
    807422686U, // FRSQRTEv1f16
3786
500k
    807422686U, // FRSQRTEv1i32
3787
500k
    807422686U, // FRSQRTEv1i64
3788
500k
    545360606U, // FRSQRTEv2f32
3789
500k
    547457758U, // FRSQRTEv2f64
3790
500k
    549554910U, // FRSQRTEv4f16
3791
500k
    551652062U, // FRSQRTEv4f32
3792
500k
    553749214U, // FRSQRTEv8f16
3793
500k
    807425555U, // FRSQRTS16
3794
500k
    807425555U, // FRSQRTS32
3795
500k
    807425555U, // FRSQRTS64
3796
500k
    2418071059U,  // FRSQRTS_ZZZ_D
3797
500k
    2179012115U,  // FRSQRTS_ZZZ_H
3798
500k
    4028716563U,  // FRSQRTS_ZZZ_S
3799
500k
    545363475U, // FRSQRTSv2f32
3800
500k
    547460627U, // FRSQRTSv2f64
3801
500k
    549557779U, // FRSQRTSv4f16
3802
500k
    551654931U, // FRSQRTSv4f32
3803
500k
    553752083U, // FRSQRTSv8f16
3804
500k
    3223374459U,  // FSCALE_ZPmZ_D
3805
500k
    3519089275U,  // FSCALE_ZPmZ_H
3806
500k
    3223407227U,  // FSCALE_ZPmZ_S
3807
500k
    807426111U, // FSQRTDr
3808
500k
    807426111U, // FSQRTHr
3809
500k
    807426111U, // FSQRTSr
3810
500k
    2152511U, // FSQRT_ZPmZ_D
3811
500k
    272701503U, // FSQRT_ZPmZ_H
3812
500k
    2185279U, // FSQRT_ZPmZ_S
3813
500k
    545364031U, // FSQRTv2f32
3814
500k
    547461183U, // FSQRTv2f64
3815
500k
    549558335U, // FSQRTv4f16
3816
500k
    551655487U, // FSQRTv4f32
3817
500k
    553752639U, // FSQRTv8f16
3818
500k
    807422047U, // FSUBDrr
3819
500k
    807422047U, // FSUBHrr
3820
500k
    3223376820U,  // FSUBR_ZPmI_D
3821
500k
    3519091636U,  // FSUBR_ZPmI_H
3822
500k
    3223409588U,  // FSUBR_ZPmI_S
3823
500k
    3223376820U,  // FSUBR_ZPmZ_D
3824
500k
    3519091636U,  // FSUBR_ZPmZ_H
3825
500k
    3223409588U,  // FSUBR_ZPmZ_S
3826
500k
    807422047U, // FSUBSrr
3827
500k
    3223373919U,  // FSUB_ZPmI_D
3828
500k
    3519088735U,  // FSUB_ZPmI_H
3829
500k
    3223406687U,  // FSUB_ZPmI_S
3830
500k
    3223373919U,  // FSUB_ZPmZ_D
3831
500k
    3519088735U,  // FSUB_ZPmZ_H
3832
500k
    3223406687U,  // FSUB_ZPmZ_S
3833
500k
    2418067551U,  // FSUB_ZZZ_D
3834
500k
    2179008607U,  // FSUB_ZZZ_H
3835
500k
    4028713055U,  // FSUB_ZZZ_S
3836
500k
    545359967U, // FSUBv2f32
3837
500k
    547457119U, // FSUBv2f64
3838
500k
    549554271U, // FSUBv4f16
3839
500k
    551651423U, // FSUBv4f32
3840
500k
    553748575U, // FSUBv8f16
3841
500k
    2418067835U,  // FTMAD_ZZI_D
3842
500k
    2179008891U,  // FTMAD_ZZI_H
3843
500k
    4028713339U,  // FTMAD_ZZI_S
3844
500k
    2418069756U,  // FTSMUL_ZZZ_D
3845
500k
    2179010812U,  // FTSMUL_ZZZ_H
3846
500k
    4028715260U,  // FTSMUL_ZZZ_S
3847
500k
    2418069512U,  // FTSSEL_ZZZ_D
3848
500k
    2179010568U,  // FTSSEL_ZZZ_H
3849
500k
    4028715016U,  // FTSSEL_ZZZ_S
3850
500k
    1134937033U,  // GLD1B_D_IMM_REAL
3851
500k
    329630665U, // GLD1B_D_REAL
3852
500k
    329630665U, // GLD1B_D_SXTW_REAL
3853
500k
    329630665U, // GLD1B_D_UXTW_REAL
3854
500k
    1403388873U,  // GLD1B_S_IMM_REAL
3855
500k
    329647049U, // GLD1B_S_SXTW_REAL
3856
500k
    329647049U, // GLD1B_S_UXTW_REAL
3857
500k
    1134938398U,  // GLD1D_IMM_REAL
3858
500k
    329632030U, // GLD1D_REAL
3859
500k
    329632030U, // GLD1D_SCALED_REAL
3860
500k
    329632030U, // GLD1D_SXTW_REAL
3861
500k
    329632030U, // GLD1D_SXTW_SCALED_REAL
3862
500k
    329632030U, // GLD1D_UXTW_REAL
3863
500k
    329632030U, // GLD1D_UXTW_SCALED_REAL
3864
500k
    1134938983U,  // GLD1H_D_IMM_REAL
3865
500k
    329632615U, // GLD1H_D_REAL
3866
500k
    329632615U, // GLD1H_D_SCALED_REAL
3867
500k
    329632615U, // GLD1H_D_SXTW_REAL
3868
500k
    329632615U, // GLD1H_D_SXTW_SCALED_REAL
3869
500k
    329632615U, // GLD1H_D_UXTW_REAL
3870
500k
    329632615U, // GLD1H_D_UXTW_SCALED_REAL
3871
500k
    1403390823U,  // GLD1H_S_IMM_REAL
3872
500k
    329648999U, // GLD1H_S_SXTW_REAL
3873
500k
    329648999U, // GLD1H_S_SXTW_SCALED_REAL
3874
500k
    329648999U, // GLD1H_S_UXTW_REAL
3875
500k
    329648999U, // GLD1H_S_UXTW_SCALED_REAL
3876
500k
    1134938048U,  // GLD1SB_D_IMM_REAL
3877
500k
    329631680U, // GLD1SB_D_REAL
3878
500k
    329631680U, // GLD1SB_D_SXTW_REAL
3879
500k
    329631680U, // GLD1SB_D_UXTW_REAL
3880
500k
    1403389888U,  // GLD1SB_S_IMM_REAL
3881
500k
    329648064U, // GLD1SB_S_SXTW_REAL
3882
500k
    329648064U, // GLD1SB_S_UXTW_REAL
3883
500k
    1134939674U,  // GLD1SH_D_IMM_REAL
3884
500k
    329633306U, // GLD1SH_D_REAL
3885
500k
    329633306U, // GLD1SH_D_SCALED_REAL
3886
500k
    329633306U, // GLD1SH_D_SXTW_REAL
3887
500k
    329633306U, // GLD1SH_D_SXTW_SCALED_REAL
3888
500k
    329633306U, // GLD1SH_D_UXTW_REAL
3889
500k
    329633306U, // GLD1SH_D_UXTW_SCALED_REAL
3890
500k
    1403391514U,  // GLD1SH_S_IMM_REAL
3891
500k
    329649690U, // GLD1SH_S_SXTW_REAL
3892
500k
    329649690U, // GLD1SH_S_SXTW_SCALED_REAL
3893
500k
    329649690U, // GLD1SH_S_UXTW_REAL
3894
500k
    329649690U, // GLD1SH_S_UXTW_SCALED_REAL
3895
500k
    1134942767U,  // GLD1SW_D_IMM_REAL
3896
500k
    329636399U, // GLD1SW_D_REAL
3897
500k
    329636399U, // GLD1SW_D_SCALED_REAL
3898
500k
    329636399U, // GLD1SW_D_SXTW_REAL
3899
500k
    329636399U, // GLD1SW_D_SXTW_SCALED_REAL
3900
500k
    329636399U, // GLD1SW_D_UXTW_REAL
3901
500k
    329636399U, // GLD1SW_D_UXTW_SCALED_REAL
3902
500k
    1134942572U,  // GLD1W_D_IMM_REAL
3903
500k
    329636204U, // GLD1W_D_REAL
3904
500k
    329636204U, // GLD1W_D_SCALED_REAL
3905
500k
    329636204U, // GLD1W_D_SXTW_REAL
3906
500k
    329636204U, // GLD1W_D_SXTW_SCALED_REAL
3907
500k
    329636204U, // GLD1W_D_UXTW_REAL
3908
500k
    329636204U, // GLD1W_D_UXTW_SCALED_REAL
3909
500k
    1403394412U,  // GLD1W_IMM_REAL
3910
500k
    329652588U, // GLD1W_SXTW_REAL
3911
500k
    329652588U, // GLD1W_SXTW_SCALED_REAL
3912
500k
    329652588U, // GLD1W_UXTW_REAL
3913
500k
    329652588U, // GLD1W_UXTW_SCALED_REAL
3914
500k
    1134937039U,  // GLDFF1B_D_IMM_REAL
3915
500k
    329630671U, // GLDFF1B_D_REAL
3916
500k
    329630671U, // GLDFF1B_D_SXTW_REAL
3917
500k
    329630671U, // GLDFF1B_D_UXTW_REAL
3918
500k
    1403388879U,  // GLDFF1B_S_IMM_REAL
3919
500k
    329647055U, // GLDFF1B_S_SXTW_REAL
3920
500k
    329647055U, // GLDFF1B_S_UXTW_REAL
3921
500k
    1134938404U,  // GLDFF1D_IMM_REAL
3922
500k
    329632036U, // GLDFF1D_REAL
3923
500k
    329632036U, // GLDFF1D_SCALED_REAL
3924
500k
    329632036U, // GLDFF1D_SXTW_REAL
3925
500k
    329632036U, // GLDFF1D_SXTW_SCALED_REAL
3926
500k
    329632036U, // GLDFF1D_UXTW_REAL
3927
500k
    329632036U, // GLDFF1D_UXTW_SCALED_REAL
3928
500k
    1134938989U,  // GLDFF1H_D_IMM_REAL
3929
500k
    329632621U, // GLDFF1H_D_REAL
3930
500k
    329632621U, // GLDFF1H_D_SCALED_REAL
3931
500k
    329632621U, // GLDFF1H_D_SXTW_REAL
3932
500k
    329632621U, // GLDFF1H_D_SXTW_SCALED_REAL
3933
500k
    329632621U, // GLDFF1H_D_UXTW_REAL
3934
500k
    329632621U, // GLDFF1H_D_UXTW_SCALED_REAL
3935
500k
    1403390829U,  // GLDFF1H_S_IMM_REAL
3936
500k
    329649005U, // GLDFF1H_S_SXTW_REAL
3937
500k
    329649005U, // GLDFF1H_S_SXTW_SCALED_REAL
3938
500k
    329649005U, // GLDFF1H_S_UXTW_REAL
3939
500k
    329649005U, // GLDFF1H_S_UXTW_SCALED_REAL
3940
500k
    1134938055U,  // GLDFF1SB_D_IMM_REAL
3941
500k
    329631687U, // GLDFF1SB_D_REAL
3942
500k
    329631687U, // GLDFF1SB_D_SXTW_REAL
3943
500k
    329631687U, // GLDFF1SB_D_UXTW_REAL
3944
500k
    1403389895U,  // GLDFF1SB_S_IMM_REAL
3945
500k
    329648071U, // GLDFF1SB_S_SXTW_REAL
3946
500k
    329648071U, // GLDFF1SB_S_UXTW_REAL
3947
500k
    1134939681U,  // GLDFF1SH_D_IMM_REAL
3948
500k
    329633313U, // GLDFF1SH_D_REAL
3949
500k
    329633313U, // GLDFF1SH_D_SCALED_REAL
3950
500k
    329633313U, // GLDFF1SH_D_SXTW_REAL
3951
500k
    329633313U, // GLDFF1SH_D_SXTW_SCALED_REAL
3952
500k
    329633313U, // GLDFF1SH_D_UXTW_REAL
3953
500k
    329633313U, // GLDFF1SH_D_UXTW_SCALED_REAL
3954
500k
    1403391521U,  // GLDFF1SH_S_IMM_REAL
3955
500k
    329649697U, // GLDFF1SH_S_SXTW_REAL
3956
500k
    329649697U, // GLDFF1SH_S_SXTW_SCALED_REAL
3957
500k
    329649697U, // GLDFF1SH_S_UXTW_REAL
3958
500k
    329649697U, // GLDFF1SH_S_UXTW_SCALED_REAL
3959
500k
    1134942774U,  // GLDFF1SW_D_IMM_REAL
3960
500k
    329636406U, // GLDFF1SW_D_REAL
3961
500k
    329636406U, // GLDFF1SW_D_SCALED_REAL
3962
500k
    329636406U, // GLDFF1SW_D_SXTW_REAL
3963
500k
    329636406U, // GLDFF1SW_D_SXTW_SCALED_REAL
3964
500k
    329636406U, // GLDFF1SW_D_UXTW_REAL
3965
500k
    329636406U, // GLDFF1SW_D_UXTW_SCALED_REAL
3966
500k
    1134942578U,  // GLDFF1W_D_IMM_REAL
3967
500k
    329636210U, // GLDFF1W_D_REAL
3968
500k
    329636210U, // GLDFF1W_D_SCALED_REAL
3969
500k
    329636210U, // GLDFF1W_D_SXTW_REAL
3970
500k
    329636210U, // GLDFF1W_D_SXTW_SCALED_REAL
3971
500k
    329636210U, // GLDFF1W_D_UXTW_REAL
3972
500k
    329636210U, // GLDFF1W_D_UXTW_SCALED_REAL
3973
500k
    1403394418U,  // GLDFF1W_IMM_REAL
3974
500k
    329652594U, // GLDFF1W_SXTW_REAL
3975
500k
    329652594U, // GLDFF1W_SXTW_SCALED_REAL
3976
500k
    329652594U, // GLDFF1W_UXTW_REAL
3977
500k
    329652594U, // GLDFF1W_UXTW_SCALED_REAL
3978
500k
    807423716U, // GMI
3979
500k
    415658U,  // HINT
3980
500k
    3223377807U,  // HISTCNT_ZPzZZ_D
3981
500k
    3223410575U,  // HISTCNT_ZPzZZ_S
3982
500k
    3760229191U,  // HISTSEG_ZZZ
3983
500k
    268064U,  // HLT
3984
500k
    264468U,  // HVC
3985
500k
    2686469322U,  // INCB_XPiI
3986
500k
    2686470573U,  // INCD_XPiI
3987
500k
    2686503341U,  // INCD_ZPiI
3988
500k
    2686471259U,  // INCH_XPiI
3989
500k
    39914587U,  // INCH_ZPiI
3990
500k
    3760214654U,  // INCP_XP_B
3991
500k
    2418037374U,  // INCP_XP_D
3992
500k
    1881166462U,  // INCP_XP_H
3993
500k
    4028650110U,  // INCP_XP_S
3994
500k
    1075892862U,  // INCP_ZP_D
3995
500k
    1648431742U,  // INCP_ZP_H
3996
500k
    1344361086U,  // INCP_ZP_S
3997
500k
    2686474733U,  // INCW_XPiI
3998
500k
    2686540269U,  // INCW_ZPiI
3999
500k
    1075878623U,  // INDEX_II_B
4000
500k
    807459551U, // INDEX_II_D
4001
500k
    1405164255U,  // INDEX_II_H
4002
500k
    807492319U, // INDEX_II_S
4003
500k
    1075878623U,  // INDEX_IR_B
4004
500k
    807459551U, // INDEX_IR_D
4005
500k
    331422431U, // INDEX_IR_H
4006
500k
    807492319U, // INDEX_IR_S
4007
500k
    807443167U, // INDEX_RI_B
4008
500k
    807459551U, // INDEX_RI_D
4009
500k
    2191596255U,  // INDEX_RI_H
4010
500k
    807492319U, // INDEX_RI_S
4011
500k
    807443167U, // INDEX_RR_B
4012
500k
    807459551U, // INDEX_RR_D
4013
500k
    2191596255U,  // INDEX_RR_H
4014
500k
    807492319U, // INDEX_RR_S
4015
500k
    1676051345U,  // INSERT_MXIPZ_H_B
4016
500k
    1676051345U,  // INSERT_MXIPZ_H_D
4017
500k
    1676051345U,  // INSERT_MXIPZ_H_H
4018
500k
    1676051345U,  // INSERT_MXIPZ_H_Q
4019
500k
    1676051345U,  // INSERT_MXIPZ_H_S
4020
500k
    1676067729U,  // INSERT_MXIPZ_V_B
4021
500k
    1676067729U,  // INSERT_MXIPZ_V_D
4022
500k
    1676067729U,  // INSERT_MXIPZ_V_H
4023
500k
    1676067729U,  // INSERT_MXIPZ_V_Q
4024
500k
    1676067729U,  // INSERT_MXIPZ_V_S
4025
500k
    270570646U, // INSR_ZR_B
4026
500k
    270587030U, // INSR_ZR_D
4027
500k
    1677792406U,  // INSR_ZR_H
4028
500k
    270619798U, // INSR_ZR_S
4029
500k
    1881183382U,  // INSR_ZV_B
4030
500k
    2149635222U,  // INSR_ZV_D
4031
500k
    1661015190U,  // INSR_ZV_H
4032
500k
    2418103446U,  // INSR_ZV_S
4033
500k
    2485261739U,  // INSvi16gpr
4034
500k
    2753697195U,  // INSvi16lane
4035
500k
    2487358891U,  // INSvi32gpr
4036
500k
    2755794347U,  // INSvi32lane
4037
500k
    2474775979U,  // INSvi64gpr
4038
500k
    2743211435U,  // INSvi64lane
4039
500k
    2489456043U,  // INSvi8gpr
4040
500k
    2757891499U,  // INSvi8lane
4041
500k
    807422800U, // IRG
4042
500k
    329709U,  // ISB
4043
500k
    3223339907U,  // LASTA_RPZ_B
4044
500k
    3223339907U,  // LASTA_RPZ_D
4045
500k
    3223339907U,  // LASTA_RPZ_H
4046
500k
    3223339907U,  // LASTA_RPZ_S
4047
500k
    3223339907U,  // LASTA_VPZ_B
4048
500k
    3223339907U,  // LASTA_VPZ_D
4049
500k
    3223339907U,  // LASTA_VPZ_H
4050
500k
    3223339907U,  // LASTA_VPZ_S
4051
500k
    3223341132U,  // LASTB_RPZ_B
4052
500k
    3223341132U,  // LASTB_RPZ_D
4053
500k
    3223341132U,  // LASTB_RPZ_H
4054
500k
    3223341132U,  // LASTB_RPZ_S
4055
500k
    3223341132U,  // LASTB_VPZ_B
4056
500k
    3223341132U,  // LASTB_VPZ_D
4057
500k
    3223341132U,  // LASTB_VPZ_H
4058
500k
    3223341132U,  // LASTB_VPZ_S
4059
500k
    329712585U, // LD1B
4060
500k
    329630665U, // LD1B_D
4061
500k
    329630665U, // LD1B_D_IMM_REAL
4062
500k
    329728969U, // LD1B_H
4063
500k
    329728969U, // LD1B_H_IMM_REAL
4064
500k
    329712585U, // LD1B_IMM_REAL
4065
500k
    329647049U, // LD1B_S
4066
500k
    329647049U, // LD1B_S_IMM_REAL
4067
500k
    329632030U, // LD1D
4068
500k
    329632030U, // LD1D_IMM_REAL
4069
500k
    491561U,  // LD1Fourv16b
4070
500k
    76005417U,  // LD1Fourv16b_POST
4071
500k
    524329U,  // LD1Fourv1d
4072
500k
    78135337U,  // LD1Fourv1d_POST
4073
500k
    557097U,  // LD1Fourv2d
4074
500k
    76070953U,  // LD1Fourv2d_POST
4075
500k
    589865U,  // LD1Fourv2s
4076
500k
    78200873U,  // LD1Fourv2s_POST
4077
500k
    622633U,  // LD1Fourv4h
4078
500k
    78233641U,  // LD1Fourv4h_POST
4079
500k
    655401U,  // LD1Fourv4s
4080
500k
    76169257U,  // LD1Fourv4s_POST
4081
500k
    688169U,  // LD1Fourv8b
4082
500k
    78299177U,  // LD1Fourv8b_POST
4083
500k
    720937U,  // LD1Fourv8h
4084
500k
    76234793U,  // LD1Fourv8h_POST
4085
500k
    329730919U, // LD1H
4086
500k
    329632615U, // LD1H_D
4087
500k
    329632615U, // LD1H_D_IMM_REAL
4088
500k
    329730919U, // LD1H_IMM_REAL
4089
500k
    329648999U, // LD1H_S
4090
500k
    329648999U, // LD1H_S_IMM_REAL
4091
500k
    491561U,  // LD1Onev16b
4092
500k
    80199721U,  // LD1Onev16b_POST
4093
500k
    524329U,  // LD1Onev1d
4094
500k
    82329641U,  // LD1Onev1d_POST
4095
500k
    557097U,  // LD1Onev2d
4096
500k
    80265257U,  // LD1Onev2d_POST
4097
500k
    589865U,  // LD1Onev2s
4098
500k
    82395177U,  // LD1Onev2s_POST
4099
500k
    622633U,  // LD1Onev4h
4100
500k
    82427945U,  // LD1Onev4h_POST
4101
500k
    655401U,  // LD1Onev4s
4102
500k
    80363561U,  // LD1Onev4s_POST
4103
500k
    688169U,  // LD1Onev8b
4104
500k
    82493481U,  // LD1Onev8b_POST
4105
500k
    720937U,  // LD1Onev8h
4106
500k
    80429097U,  // LD1Onev8h_POST
4107
500k
    329631532U, // LD1RB_D_IMM
4108
500k
    329729836U, // LD1RB_H_IMM
4109
500k
    329713452U, // LD1RB_IMM
4110
500k
    329647916U, // LD1RB_S_IMM
4111
500k
    329632304U, // LD1RD_IMM
4112
500k
    329633158U, // LD1RH_D_IMM
4113
500k
    329731462U, // LD1RH_IMM
4114
500k
    329649542U, // LD1RH_S_IMM
4115
500k
    329713423U, // LD1RO_B
4116
500k
    329713423U, // LD1RO_B_IMM
4117
500k
    329632288U, // LD1RO_D
4118
500k
    329632288U, // LD1RO_D_IMM
4119
500k
    329731440U, // LD1RO_H
4120
500k
    329731440U, // LD1RO_H_IMM
4121
500k
    329652751U, // LD1RO_W
4122
500k
    329652751U, // LD1RO_W_IMM
4123
500k
    329713444U, // LD1RQ_B
4124
500k
    329713444U, // LD1RQ_B_IMM
4125
500k
    329632296U, // LD1RQ_D
4126
500k
    329632296U, // LD1RQ_D_IMM
4127
500k
    329731454U, // LD1RQ_H
4128
500k
    329731454U, // LD1RQ_H_IMM
4129
500k
    329652759U, // LD1RQ_W
4130
500k
    329652759U, // LD1RQ_W_IMM
4131
500k
    329631743U, // LD1RSB_D_IMM
4132
500k
    329730047U, // LD1RSB_H_IMM
4133
500k
    329648127U, // LD1RSB_S_IMM
4134
500k
    329633356U, // LD1RSH_D_IMM
4135
500k
    329649740U, // LD1RSH_S_IMM
4136
500k
    329636440U, // LD1RSW_IMM
4137
500k
    329636383U, // LD1RW_D_IMM
4138
500k
    329652767U, // LD1RW_IMM
4139
500k
    496522U,  // LD1Rv16b
4140
500k
    84398986U,  // LD1Rv16b_POST
4141
500k
    529290U,  // LD1Rv1d
4142
500k
    82334602U,  // LD1Rv1d_POST
4143
500k
    562058U,  // LD1Rv2d
4144
500k
    82367370U,  // LD1Rv2d_POST
4145
500k
    594826U,  // LD1Rv2s
4146
500k
    86594442U,  // LD1Rv2s_POST
4147
500k
    627594U,  // LD1Rv4h
4148
500k
    88724362U,  // LD1Rv4h_POST
4149
500k
    660362U,  // LD1Rv4s
4150
500k
    86659978U,  // LD1Rv4s_POST
4151
500k
    693130U,  // LD1Rv8b
4152
500k
    84595594U,  // LD1Rv8b_POST
4153
500k
    725898U,  // LD1Rv8h
4154
500k
    88822666U,  // LD1Rv8h_POST
4155
500k
    329631680U, // LD1SB_D
4156
500k
    329631680U, // LD1SB_D_IMM_REAL
4157
500k
    329729984U, // LD1SB_H
4158
500k
    329729984U, // LD1SB_H_IMM_REAL
4159
500k
    329648064U, // LD1SB_S
4160
500k
    329648064U, // LD1SB_S_IMM_REAL
4161
500k
    329633306U, // LD1SH_D
4162
500k
    329633306U, // LD1SH_D_IMM_REAL
4163
500k
    329649690U, // LD1SH_S
4164
500k
    329649690U, // LD1SH_S_IMM_REAL
4165
500k
    329636399U, // LD1SW_D
4166
500k
    329636399U, // LD1SW_D_IMM_REAL
4167
500k
    491561U,  // LD1Threev16b
4168
500k
    90685481U,  // LD1Threev16b_POST
4169
500k
    524329U,  // LD1Threev1d
4170
500k
    92815401U,  // LD1Threev1d_POST
4171
500k
    557097U,  // LD1Threev2d
4172
500k
    90751017U,  // LD1Threev2d_POST
4173
500k
    589865U,  // LD1Threev2s
4174
500k
    92880937U,  // LD1Threev2s_POST
4175
500k
    622633U,  // LD1Threev4h
4176
500k
    92913705U,  // LD1Threev4h_POST
4177
500k
    655401U,  // LD1Threev4s
4178
500k
    90849321U,  // LD1Threev4s_POST
4179
500k
    688169U,  // LD1Threev8b
4180
500k
    92979241U,  // LD1Threev8b_POST
4181
500k
    720937U,  // LD1Threev8h
4182
500k
    90914857U,  // LD1Threev8h_POST
4183
500k
    491561U,  // LD1Twov16b
4184
500k
    78102569U,  // LD1Twov16b_POST
4185
500k
    524329U,  // LD1Twov1d
4186
500k
    80232489U,  // LD1Twov1d_POST
4187
500k
    557097U,  // LD1Twov2d
4188
500k
    78168105U,  // LD1Twov2d_POST
4189
500k
    589865U,  // LD1Twov2s
4190
500k
    80298025U,  // LD1Twov2s_POST
4191
500k
    622633U,  // LD1Twov4h
4192
500k
    80330793U,  // LD1Twov4h_POST
4193
500k
    655401U,  // LD1Twov4s
4194
500k
    78266409U,  // LD1Twov4s_POST
4195
500k
    688169U,  // LD1Twov8b
4196
500k
    80396329U,  // LD1Twov8b_POST
4197
500k
    720937U,  // LD1Twov8h
4198
500k
    78331945U,  // LD1Twov8h_POST
4199
500k
    329652588U, // LD1W
4200
500k
    329636204U, // LD1W_D
4201
500k
    329636204U, // LD1W_D_IMM_REAL
4202
500k
    329652588U, // LD1W_IMM_REAL
4203
500k
    3047596524U,  // LD1_MXIPXX_H_B
4204
500k
    3047596538U,  // LD1_MXIPXX_H_D
4205
500k
    3047596552U,  // LD1_MXIPXX_H_H
4206
500k
    3047596566U,  // LD1_MXIPXX_H_Q
4207
500k
    3047596580U,  // LD1_MXIPXX_H_S
4208
500k
    3047612908U,  // LD1_MXIPXX_V_B
4209
500k
    3047612922U,  // LD1_MXIPXX_V_D
4210
500k
    3047612936U,  // LD1_MXIPXX_V_H
4211
500k
    3047612950U,  // LD1_MXIPXX_V_Q
4212
500k
    3047612964U,  // LD1_MXIPXX_V_S
4213
500k
    97222697U,  // LD1i16
4214
500k
    99336233U,  // LD1i16_POST
4215
500k
    97255465U,  // LD1i32
4216
500k
    101466153U, // LD1i32_POST
4217
500k
    97288233U,  // LD1i64
4218
500k
    103596073U, // LD1i64_POST
4219
500k
    97321001U,  // LD1i8
4220
500k
    105725993U, // LD1i8_POST
4221
500k
    329712646U, // LD2B
4222
500k
    329712646U, // LD2B_IMM
4223
500k
    329632074U, // LD2D
4224
500k
    329632074U, // LD2D_IMM
4225
500k
    329730980U, // LD2H
4226
500k
    329730980U, // LD2H_IMM
4227
500k
    496528U,  // LD2Rv16b
4228
500k
    88593296U,  // LD2Rv16b_POST
4229
500k
    529296U,  // LD2Rv1d
4230
500k
    80237456U,  // LD2Rv1d_POST
4231
500k
    562064U,  // LD2Rv2d
4232
500k
    80270224U,  // LD2Rv2d_POST
4233
500k
    594832U,  // LD2Rv2s
4234
500k
    82400144U,  // LD2Rv2s_POST
4235
500k
    627600U,  // LD2Rv4h
4236
500k
    86627216U,  // LD2Rv4h_POST
4237
500k
    660368U,  // LD2Rv4s
4238
500k
    82465680U,  // LD2Rv4s_POST
4239
500k
    693136U,  // LD2Rv8b
4240
500k
    88789904U,  // LD2Rv8b_POST
4241
500k
    725904U,  // LD2Rv8h
4242
500k
    86725520U,  // LD2Rv8h_POST
4243
500k
    491659U,  // LD2Twov16b
4244
500k
    78102667U,  // LD2Twov16b_POST
4245
500k
    557195U,  // LD2Twov2d
4246
500k
    78168203U,  // LD2Twov2d_POST
4247
500k
    589963U,  // LD2Twov2s
4248
500k
    80298123U,  // LD2Twov2s_POST
4249
500k
    622731U,  // LD2Twov4h
4250
500k
    80330891U,  // LD2Twov4h_POST
4251
500k
    655499U,  // LD2Twov4s
4252
500k
    78266507U,  // LD2Twov4s_POST
4253
500k
    688267U,  // LD2Twov8b
4254
500k
    80396427U,  // LD2Twov8b_POST
4255
500k
    721035U,  // LD2Twov8h
4256
500k
    78332043U,  // LD2Twov8h_POST
4257
500k
    329652640U, // LD2W
4258
500k
    329652640U, // LD2W_IMM
4259
500k
    97222795U,  // LD2i16
4260
500k
    101433483U, // LD2i16_POST
4261
500k
    97255563U,  // LD2i32
4262
500k
    103563403U, // LD2i32_POST
4263
500k
    97288331U,  // LD2i64
4264
500k
    107790475U, // LD2i64_POST
4265
500k
    97321099U,  // LD2i8
4266
500k
    99434635U,  // LD2i8_POST
4267
500k
    329712667U, // LD3B
4268
500k
    329712667U, // LD3B_IMM
4269
500k
    329632086U, // LD3D
4270
500k
    329632086U, // LD3D_IMM
4271
500k
    329730992U, // LD3H
4272
500k
    329730992U, // LD3H_IMM
4273
500k
    496534U,  // LD3Rv16b
4274
500k
    109564822U, // LD3Rv16b_POST
4275
500k
    529302U,  // LD3Rv1d
4276
500k
    92820374U,  // LD3Rv1d_POST
4277
500k
    562070U,  // LD3Rv2d
4278
500k
    92853142U,  // LD3Rv2d_POST
4279
500k
    594838U,  // LD3Rv2s
4280
500k
    111760278U, // LD3Rv2s_POST
4281
500k
    627606U,  // LD3Rv4h
4282
500k
    113890198U, // LD3Rv4h_POST
4283
500k
    660374U,  // LD3Rv4s
4284
500k
    111825814U, // LD3Rv4s_POST
4285
500k
    693142U,  // LD3Rv8b
4286
500k
    109761430U, // LD3Rv8b_POST
4287
500k
    725910U,  // LD3Rv8h
4288
500k
    113988502U, // LD3Rv8h_POST
4289
500k
    492067U,  // LD3Threev16b
4290
500k
    90685987U,  // LD3Threev16b_POST
4291
500k
    557603U,  // LD3Threev2d
4292
500k
    90751523U,  // LD3Threev2d_POST
4293
500k
    590371U,  // LD3Threev2s
4294
500k
    92881443U,  // LD3Threev2s_POST
4295
500k
    623139U,  // LD3Threev4h
4296
500k
    92914211U,  // LD3Threev4h_POST
4297
500k
    655907U,  // LD3Threev4s
4298
500k
    90849827U,  // LD3Threev4s_POST
4299
500k
    688675U,  // LD3Threev8b
4300
500k
    92979747U,  // LD3Threev8b_POST
4301
500k
    721443U,  // LD3Threev8h
4302
500k
    90915363U,  // LD3Threev8h_POST
4303
500k
    329652652U, // LD3W
4304
500k
    329652652U, // LD3W_IMM
4305
500k
    97223203U,  // LD3i16
4306
500k
    116113955U, // LD3i16_POST
4307
500k
    97255971U,  // LD3i32
4308
500k
    118243875U, // LD3i32_POST
4309
500k
    97288739U,  // LD3i64
4310
500k
    120373795U, // LD3i64_POST
4311
500k
    97321507U,  // LD3i8
4312
500k
    122503715U, // LD3i8_POST
4313
500k
    329712693U, // LD4B
4314
500k
    329712693U, // LD4B_IMM
4315
500k
    329632098U, // LD4D
4316
500k
    329632098U, // LD4D_IMM
4317
500k
    492097U,  // LD4Fourv16b
4318
500k
    76005953U,  // LD4Fourv16b_POST
4319
500k
    557633U,  // LD4Fourv2d
4320
500k
    76071489U,  // LD4Fourv2d_POST
4321
500k
    590401U,  // LD4Fourv2s
4322
500k
    78201409U,  // LD4Fourv2s_POST
4323
500k
    623169U,  // LD4Fourv4h
4324
500k
    78234177U,  // LD4Fourv4h_POST
4325
500k
    655937U,  // LD4Fourv4s
4326
500k
    76169793U,  // LD4Fourv4s_POST
4327
500k
    688705U,  // LD4Fourv8b
4328
500k
    78299713U,  // LD4Fourv8b_POST
4329
500k
    721473U,  // LD4Fourv8h
4330
500k
    76235329U,  // LD4Fourv8h_POST
4331
500k
    329731004U, // LD4H
4332
500k
    329731004U, // LD4H_IMM
4333
500k
    496540U,  // LD4Rv16b
4334
500k
    86496156U,  // LD4Rv16b_POST
4335
500k
    529308U,  // LD4Rv1d
4336
500k
    78140316U,  // LD4Rv1d_POST
4337
500k
    562076U,  // LD4Rv2d
4338
500k
    78173084U,  // LD4Rv2d_POST
4339
500k
    594844U,  // LD4Rv2s
4340
500k
    80303004U,  // LD4Rv2s_POST
4341
500k
    627612U,  // LD4Rv4h
4342
500k
    82432924U,  // LD4Rv4h_POST
4343
500k
    660380U,  // LD4Rv4s
4344
500k
    80368540U,  // LD4Rv4s_POST
4345
500k
    693148U,  // LD4Rv8b
4346
500k
    86692764U,  // LD4Rv8b_POST
4347
500k
    725916U,  // LD4Rv8h
4348
500k
    82531228U,  // LD4Rv8h_POST
4349
500k
    329652664U, // LD4W
4350
500k
    329652664U, // LD4W_IMM
4351
500k
    97223233U,  // LD4i16
4352
500k
    103531073U, // LD4i16_POST
4353
500k
    97256001U,  // LD4i32
4354
500k
    107758145U, // LD4i32_POST
4355
500k
    97288769U,  // LD4i64
4356
500k
    124568129U, // LD4i64_POST
4357
500k
    97321537U,  // LD4i8
4358
500k
    101532225U, // LD4i8_POST
4359
500k
    885799U,  // LD64B
4360
500k
    3223536705U,  // LDADDAB
4361
500k
    3223538641U,  // LDADDAH
4362
500k
    3223536927U,  // LDADDALB
4363
500k
    3223538815U,  // LDADDALH
4364
500k
    3223539483U,  // LDADDALW
4365
500k
    3223539483U,  // LDADDALX
4366
500k
    3223536282U,  // LDADDAW
4367
500k
    3223536282U,  // LDADDAX
4368
500k
    3223536863U,  // LDADDB
4369
500k
    3223538801U,  // LDADDH
4370
500k
    3223537108U,  // LDADDLB
4371
500k
    3223538915U,  // LDADDLH
4372
500k
    3223539660U,  // LDADDLW
4373
500k
    3223539660U,  // LDADDLX
4374
500k
    3223538122U,  // LDADDW
4375
500k
    3223538122U,  // LDADDX
4376
500k
    838879079U, // LDAPRB
4377
500k
    838880705U, // LDAPRH
4378
500k
    838882415U, // LDAPRW
4379
500k
    838882415U, // LDAPRX
4380
500k
    838879122U, // LDAPURBi
4381
500k
    838880748U, // LDAPURHi
4382
500k
    838879262U, // LDAPURSBWi
4383
500k
    838879262U, // LDAPURSBXi
4384
500k
    838880875U, // LDAPURSHWi
4385
500k
    838880875U, // LDAPURSHXi
4386
500k
    838883959U, // LDAPURSWi
4387
500k
    838882496U, // LDAPURXi
4388
500k
    838882496U, // LDAPURi
4389
500k
    838879027U, // LDARB
4390
500k
    838880653U, // LDARH
4391
500k
    838882210U, // LDARW
4392
500k
    838882210U, // LDARX
4393
500k
    807424836U, // LDAXPW
4394
500k
    807424836U, // LDAXPX
4395
500k
    838879138U, // LDAXRB
4396
500k
    838880764U, // LDAXRH
4397
500k
    838882540U, // LDAXRW
4398
500k
    838882540U, // LDAXRX
4399
500k
    3223536761U,  // LDCLRAB
4400
500k
    3223538698U,  // LDCLRAH
4401
500k
    3223537002U,  // LDCLRALB
4402
500k
    3223538855U,  // LDCLRALH
4403
500k
    3223539557U,  // LDCLRALW
4404
500k
    3223539557U,  // LDCLRALX
4405
500k
    3223536450U,  // LDCLRAW
4406
500k
    3223536450U,  // LDCLRAX
4407
500k
    3223537480U,  // LDCLRB
4408
500k
    3223539106U,  // LDCLRH
4409
500k
    3223537210U,  // LDCLRLB
4410
500k
    3223538951U,  // LDCLRLH
4411
500k
    3223539866U,  // LDCLRLW
4412
500k
    3223539866U,  // LDCLRLX
4413
500k
    3223540754U,  // LDCLRW
4414
500k
    3223540754U,  // LDCLRX
4415
500k
    3223536770U,  // LDEORAB
4416
500k
    3223538707U,  // LDEORAH
4417
500k
    3223537012U,  // LDEORALB
4418
500k
    3223538865U,  // LDEORALH
4419
500k
    3223539566U,  // LDEORALW
4420
500k
    3223539566U,  // LDEORALX
4421
500k
    3223536458U,  // LDEORAW
4422
500k
    3223536458U,  // LDEORAX
4423
500k
    3223537503U,  // LDEORB
4424
500k
    3223539129U,  // LDEORH
4425
500k
    3223537219U,  // LDEORLB
4426
500k
    3223538960U,  // LDEORLH
4427
500k
    3223539874U,  // LDEORLW
4428
500k
    3223539874U,  // LDEORLX
4429
500k
    3223540830U,  // LDEORW
4430
500k
    3223540830U,  // LDEORX
4431
500k
    329630671U, // LDFF1B_D_REAL
4432
500k
    329728975U, // LDFF1B_H_REAL
4433
500k
    329712591U, // LDFF1B_REAL
4434
500k
    329647055U, // LDFF1B_S_REAL
4435
500k
    329632036U, // LDFF1D_REAL
4436
500k
    329632621U, // LDFF1H_D_REAL
4437
500k
    329730925U, // LDFF1H_REAL
4438
500k
    329649005U, // LDFF1H_S_REAL
4439
500k
    329631687U, // LDFF1SB_D_REAL
4440
500k
    329729991U, // LDFF1SB_H_REAL
4441
500k
    329648071U, // LDFF1SB_S_REAL
4442
500k
    329633313U, // LDFF1SH_D_REAL
4443
500k
    329649697U, // LDFF1SH_S_REAL
4444
500k
    329636406U, // LDFF1SW_D_REAL
4445
500k
    329636210U, // LDFF1W_D_REAL
4446
500k
    329652594U, // LDFF1W_REAL
4447
500k
    302205742U, // LDG
4448
500k
    838881596U, // LDGM
4449
500k
    838879034U, // LDLARB
4450
500k
    838880660U, // LDLARH
4451
500k
    838882216U, // LDLARW
4452
500k
    838882216U, // LDLARX
4453
500k
    329630679U, // LDNF1B_D_IMM_REAL
4454
500k
    329728983U, // LDNF1B_H_IMM_REAL
4455
500k
    329712599U, // LDNF1B_IMM_REAL
4456
500k
    329647063U, // LDNF1B_S_IMM_REAL
4457
500k
    329632044U, // LDNF1D_IMM_REAL
4458
500k
    329632629U, // LDNF1H_D_IMM_REAL
4459
500k
    329730933U, // LDNF1H_IMM_REAL
4460
500k
    329649013U, // LDNF1H_S_IMM_REAL
4461
500k
    329631696U, // LDNF1SB_D_IMM_REAL
4462
500k
    329730000U, // LDNF1SB_H_IMM_REAL
4463
500k
    329648080U, // LDNF1SB_S_IMM_REAL
4464
500k
    329633322U, // LDNF1SH_D_IMM_REAL
4465
500k
    329649706U, // LDNF1SH_S_IMM_REAL
4466
500k
    329636415U, // LDNF1SW_D_IMM_REAL
4467
500k
    329636218U, // LDNF1W_D_IMM_REAL
4468
500k
    329652602U, // LDNF1W_IMM_REAL
4469
500k
    807424755U, // LDNPDi
4470
500k
    807424755U, // LDNPQi
4471
500k
    807424755U, // LDNPSi
4472
500k
    807424755U, // LDNPWi
4473
500k
    807424755U, // LDNPXi
4474
500k
    329712607U, // LDNT1B_ZRI
4475
500k
    329712607U, // LDNT1B_ZRR
4476
500k
    1134937055U,  // LDNT1B_ZZR_D_REAL
4477
500k
    1403388895U,  // LDNT1B_ZZR_S_REAL
4478
500k
    329632052U, // LDNT1D_ZRI
4479
500k
    329632052U, // LDNT1D_ZRR
4480
500k
    1134938420U,  // LDNT1D_ZZR_D_REAL
4481
500k
    329730941U, // LDNT1H_ZRI
4482
500k
    329730941U, // LDNT1H_ZRR
4483
500k
    1134939005U,  // LDNT1H_ZZR_D_REAL
4484
500k
    1403390845U,  // LDNT1H_ZZR_S_REAL
4485
500k
    1134938073U,  // LDNT1SB_ZZR_D_REAL
4486
500k
    1403389913U,  // LDNT1SB_ZZR_S_REAL
4487
500k
    1134939699U,  // LDNT1SH_ZZR_D_REAL
4488
500k
    1403391539U,  // LDNT1SH_ZZR_S_REAL
4489
500k
    1134942792U,  // LDNT1SW_ZZR_D_REAL
4490
500k
    329652610U, // LDNT1W_ZRI
4491
500k
    329652610U, // LDNT1W_ZRR
4492
500k
    1134942594U,  // LDNT1W_ZZR_D_REAL
4493
500k
    1403394434U,  // LDNT1W_ZZR_S_REAL
4494
500k
    807424659U, // LDPDi
4495
500k
    270750355U, // LDPDpost
4496
500k
    270750355U, // LDPDpre
4497
500k
    807424659U, // LDPQi
4498
500k
    270750355U, // LDPQpost
4499
500k
    270750355U, // LDPQpre
4500
500k
    807426641U, // LDPSWi
4501
500k
    270752337U, // LDPSWpost
4502
500k
    270752337U, // LDPSWpre
4503
500k
    807424659U, // LDPSi
4504
500k
    270750355U, // LDPSpost
4505
500k
    270750355U, // LDPSpre
4506
500k
    807424659U, // LDPWi
4507
500k
    270750355U, // LDPWpost
4508
500k
    270750355U, // LDPWpre
4509
500k
    807424659U, // LDPXi
4510
500k
    270750355U, // LDPXpost
4511
500k
    270750355U, // LDPXpre
4512
500k
    838877817U, // LDRAAindexed
4513
500k
    302203513U, // LDRAAwriteback
4514
500k
    838878315U, // LDRABindexed
4515
500k
    302204011U, // LDRABwriteback
4516
500k
    302204738U, // LDRBBpost
4517
500k
    302204738U, // LDRBBpre
4518
500k
    838879042U, // LDRBBroW
4519
500k
    838879042U, // LDRBBroX
4520
500k
    838879042U, // LDRBBui
4521
500k
    302207968U, // LDRBpost
4522
500k
    302207968U, // LDRBpre
4523
500k
    838882272U, // LDRBroW
4524
500k
    838882272U, // LDRBroX
4525
500k
    838882272U, // LDRBui
4526
500k
    1075860448U,  // LDRDl
4527
500k
    302207968U, // LDRDpost
4528
500k
    302207968U, // LDRDpre
4529
500k
    838882272U, // LDRDroW
4530
500k
    838882272U, // LDRDroX
4531
500k
    838882272U, // LDRDui
4532
500k
    302206364U, // LDRHHpost
4533
500k
    302206364U, // LDRHHpre
4534
500k
    838880668U, // LDRHHroW
4535
500k
    838880668U, // LDRHHroX
4536
500k
    838880668U, // LDRHHui
4537
500k
    302207968U, // LDRHpost
4538
500k
    302207968U, // LDRHpre
4539
500k
    838882272U, // LDRHroW
4540
500k
    838882272U, // LDRHroX
4541
500k
    838882272U, // LDRHui
4542
500k
    1075860448U,  // LDRQl
4543
500k
    302207968U, // LDRQpost
4544
500k
    302207968U, // LDRQpre
4545
500k
    838882272U, // LDRQroW
4546
500k
    838882272U, // LDRQroX
4547
500k
    838882272U, // LDRQui
4548
500k
    302204935U, // LDRSBWpost
4549
500k
    302204935U, // LDRSBWpre
4550
500k
    838879239U, // LDRSBWroW
4551
500k
    838879239U, // LDRSBWroX
4552
500k
    838879239U, // LDRSBWui
4553
500k
    302204935U, // LDRSBXpost
4554
500k
    302204935U, // LDRSBXpre
4555
500k
    838879239U, // LDRSBXroW
4556
500k
    838879239U, // LDRSBXroX
4557
500k
    838879239U, // LDRSBXui
4558
500k
    302206548U, // LDRSHWpost
4559
500k
    302206548U, // LDRSHWpre
4560
500k
    838880852U, // LDRSHWroW
4561
500k
    838880852U, // LDRSHWroX
4562
500k
    838880852U, // LDRSHWui
4563
500k
    302206548U, // LDRSHXpost
4564
500k
    302206548U, // LDRSHXpre
4565
500k
    838880852U, // LDRSHXroW
4566
500k
    838880852U, // LDRSHXroX
4567
500k
    838880852U, // LDRSHXui
4568
500k
    1075862112U,  // LDRSWl
4569
500k
    302209632U, // LDRSWpost
4570
500k
    302209632U, // LDRSWpre
4571
500k
    838883936U, // LDRSWroW
4572
500k
    838883936U, // LDRSWroX
4573
500k
    838883936U, // LDRSWui
4574
500k
    1075860448U,  // LDRSl
4575
500k
    302207968U, // LDRSpost
4576
500k
    302207968U, // LDRSpre
4577
500k
    838882272U, // LDRSroW
4578
500k
    838882272U, // LDRSroX
4579
500k
    838882272U, // LDRSui
4580
500k
    1075860448U,  // LDRWl
4581
500k
    302207968U, // LDRWpost
4582
500k
    302207968U, // LDRWpre
4583
500k
    838882272U, // LDRWroW
4584
500k
    838882272U, // LDRWroX
4585
500k
    838882272U, // LDRWui
4586
500k
    1075860448U,  // LDRXl
4587
500k
    302207968U, // LDRXpost
4588
500k
    302207968U, // LDRXpre
4589
500k
    838882272U, // LDRXroW
4590
500k
    838882272U, // LDRXroX
4591
500k
    838882272U, // LDRXui
4592
500k
    839767008U, // LDR_PXI
4593
500k
    922592U,  // LDR_ZA
4594
500k
    839767008U, // LDR_ZXI
4595
500k
    3223536786U,  // LDSETAB
4596
500k
    3223538723U,  // LDSETAH
4597
500k
    3223537030U,  // LDSETALB
4598
500k
    3223538883U,  // LDSETALH
4599
500k
    3223539582U,  // LDSETALW
4600
500k
    3223539582U,  // LDSETALX
4601
500k
    3223536498U,  // LDSETAW
4602
500k
    3223536498U,  // LDSETAX
4603
500k
    3223537709U,  // LDSETB
4604
500k
    3223539317U,  // LDSETH
4605
500k
    3223537269U,  // LDSETLB
4606
500k
    3223538976U,  // LDSETLH
4607
500k
    3223539930U,  // LDSETLW
4608
500k
    3223539930U,  // LDSETLX
4609
500k
    3223541365U,  // LDSETW
4610
500k
    3223541365U,  // LDSETX
4611
500k
    3223536795U,  // LDSMAXAB
4612
500k
    3223538732U,  // LDSMAXAH
4613
500k
    3223537040U,  // LDSMAXALB
4614
500k
    3223538893U,  // LDSMAXALH
4615
500k
    3223539591U,  // LDSMAXALW
4616
500k
    3223539591U,  // LDSMAXALX
4617
500k
    3223536535U,  // LDSMAXAW
4618
500k
    3223536535U,  // LDSMAXAX
4619
500k
    3223537846U,  // LDSMAXB
4620
500k
    3223539349U,  // LDSMAXH
4621
500k
    3223537278U,  // LDSMAXLB
4622
500k
    3223539018U,  // LDSMAXLH
4623
500k
    3223539985U,  // LDSMAXLW
4624
500k
    3223539985U,  // LDSMAXLX
4625
500k
    3223542465U,  // LDSMAXW
4626
500k
    3223542465U,  // LDSMAXX
4627
500k
    3223536714U,  // LDSMINAB
4628
500k
    3223538671U,  // LDSMINAH
4629
500k
    3223536972U,  // LDSMINALB
4630
500k
    3223538825U,  // LDSMINALH
4631
500k
    3223539522U,  // LDSMINALW
4632
500k
    3223539522U,  // LDSMINALX
4633
500k
    3223536381U,  // LDSMINAW
4634
500k
    3223536381U,  // LDSMINAX
4635
500k
    3223537321U,  // LDSMINB
4636
500k
    3223539038U,  // LDSMINH
4637
500k
    3223537183U,  // LDSMINLB
4638
500k
    3223538924U,  // LDSMINLH
4639
500k
    3223539828U,  // LDSMINLW
4640
500k
    3223539828U,  // LDSMINLX
4641
500k
    3223540120U,  // LDSMINW
4642
500k
    3223540120U,  // LDSMINX
4643
500k
    838879087U, // LDTRBi
4644
500k
    838880713U, // LDTRHi
4645
500k
    838879246U, // LDTRSBWi
4646
500k
    838879246U, // LDTRSBXi
4647
500k
    838880859U, // LDTRSHWi
4648
500k
    838880859U, // LDTRSHXi
4649
500k
    838883943U, // LDTRSWi
4650
500k
    838882460U, // LDTRWi
4651
500k
    838882460U, // LDTRXi
4652
500k
    3223536805U,  // LDUMAXAB
4653
500k
    3223538742U,  // LDUMAXAH
4654
500k
    3223537051U,  // LDUMAXALB
4655
500k
    3223538904U,  // LDUMAXALH
4656
500k
    3223539601U,  // LDUMAXALW
4657
500k
    3223539601U,  // LDUMAXALX
4658
500k
    3223536544U,  // LDUMAXAW
4659
500k
    3223536544U,  // LDUMAXAX
4660
500k
    3223537855U,  // LDUMAXB
4661
500k
    3223539358U,  // LDUMAXH
4662
500k
    3223537288U,  // LDUMAXLB
4663
500k
    3223539028U,  // LDUMAXLH
4664
500k
    3223539994U,  // LDUMAXLW
4665
500k
    3223539994U,  // LDUMAXLX
4666
500k
    3223542473U,  // LDUMAXW
4667
500k
    3223542473U,  // LDUMAXX
4668
500k
    3223536724U,  // LDUMINAB
4669
500k
    3223538681U,  // LDUMINAH
4670
500k
    3223536983U,  // LDUMINALB
4671
500k
    3223538836U,  // LDUMINALH
4672
500k
    3223539532U,  // LDUMINALW
4673
500k
    3223539532U,  // LDUMINALX
4674
500k
    3223536390U,  // LDUMINAW
4675
500k
    3223536390U,  // LDUMINAX
4676
500k
    3223537330U,  // LDUMINB
4677
500k
    3223539047U,  // LDUMINH
4678
500k
    3223537193U,  // LDUMINLB
4679
500k
    3223538934U,  // LDUMINLH
4680
500k
    3223539837U,  // LDUMINLW
4681
500k
    3223539837U,  // LDUMINLX
4682
500k
    3223540128U,  // LDUMINW
4683
500k
    3223540128U,  // LDUMINX
4684
500k
    838879107U, // LDURBBi
4685
500k
    838882483U, // LDURBi
4686
500k
    838882483U, // LDURDi
4687
500k
    838880733U, // LDURHHi
4688
500k
    838882483U, // LDURHi
4689
500k
    838882483U, // LDURQi
4690
500k
    838879254U, // LDURSBWi
4691
500k
    838879254U, // LDURSBXi
4692
500k
    838880867U, // LDURSHWi
4693
500k
    838880867U, // LDURSHXi
4694
500k
    838883951U, // LDURSWi
4695
500k
    838882483U, // LDURSi
4696
500k
    838882483U, // LDURWi
4697
500k
    838882483U, // LDURXi
4698
500k
    807424864U, // LDXPW
4699
500k
    807424864U, // LDXPX
4700
500k
    838879146U, // LDXRB
4701
500k
    838880772U, // LDXRH
4702
500k
    838882547U, // LDXRW
4703
500k
    838882547U, // LDXRX
4704
500k
    3223360594U,  // LSLR_ZPmZ_B
4705
500k
    3223376978U,  // LSLR_ZPmZ_D
4706
500k
    3519091794U,  // LSLR_ZPmZ_H
4707
500k
    3223409746U,  // LSLR_ZPmZ_S
4708
500k
    807424186U, // LSLVWr
4709
500k
    807424186U, // LSLVXr
4710
500k
    3223359674U,  // LSL_WIDE_ZPmZ_B
4711
500k
    3519090874U,  // LSL_WIDE_ZPmZ_H
4712
500k
    3223408826U,  // LSL_WIDE_ZPmZ_S
4713
500k
    3760230586U,  // LSL_WIDE_ZZZ_B
4714
500k
    2179010746U,  // LSL_WIDE_ZZZ_H
4715
500k
    4028715194U,  // LSL_WIDE_ZZZ_S
4716
500k
    3223359674U,  // LSL_ZPmI_B
4717
500k
    3223376058U,  // LSL_ZPmI_D
4718
500k
    3519090874U,  // LSL_ZPmI_H
4719
500k
    3223408826U,  // LSL_ZPmI_S
4720
500k
    3223359674U,  // LSL_ZPmZ_B
4721
500k
    3223376058U,  // LSL_ZPmZ_D
4722
500k
    3519090874U,  // LSL_ZPmZ_H
4723
500k
    3223408826U,  // LSL_ZPmZ_S
4724
500k
    3760230586U,  // LSL_ZZI_B
4725
500k
    2418069690U,  // LSL_ZZI_D
4726
500k
    2179010746U,  // LSL_ZZI_H
4727
500k
    4028715194U,  // LSL_ZZI_S
4728
500k
    3223360641U,  // LSRR_ZPmZ_B
4729
500k
    3223377025U,  // LSRR_ZPmZ_D
4730
500k
    3519091841U,  // LSRR_ZPmZ_H
4731
500k
    3223409793U,  // LSRR_ZPmZ_S
4732
500k
    807425164U, // LSRVWr
4733
500k
    807425164U, // LSRVXr
4734
500k
    3223360652U,  // LSR_WIDE_ZPmZ_B
4735
500k
    3519091852U,  // LSR_WIDE_ZPmZ_H
4736
500k
    3223409804U,  // LSR_WIDE_ZPmZ_S
4737
500k
    3760231564U,  // LSR_WIDE_ZZZ_B
4738
500k
    2179011724U,  // LSR_WIDE_ZZZ_H
4739
500k
    4028716172U,  // LSR_WIDE_ZZZ_S
4740
500k
    3223360652U,  // LSR_ZPmI_B
4741
500k
    3223377036U,  // LSR_ZPmI_D
4742
500k
    3519091852U,  // LSR_ZPmI_H
4743
500k
    3223409804U,  // LSR_ZPmI_S
4744
500k
    3223360652U,  // LSR_ZPmZ_B
4745
500k
    3223377036U,  // LSR_ZPmZ_D
4746
500k
    3519091852U,  // LSR_ZPmZ_H
4747
500k
    3223409804U,  // LSR_ZPmZ_S
4748
500k
    3760231564U,  // LSR_ZZI_B
4749
500k
    2418070668U,  // LSR_ZZI_D
4750
500k
    2179011724U,  // LSR_ZZI_H
4751
500k
    4028716172U,  // LSR_ZZI_S
4752
500k
    807422454U, // MADDWrrr
4753
500k
    807422454U, // MADDXrrr
4754
500k
    3223357807U,  // MAD_ZPmZZ_B
4755
500k
    3223374191U,  // MAD_ZPmZZ_D
4756
500k
    3519089007U,  // MAD_ZPmZZ_H
4757
500k
    3223406959U,  // MAD_ZPmZZ_S
4758
500k
    3223358570U,  // MATCH_PPzZZ_B
4759
500k
    1640041578U,  // MATCH_PPzZZ_H
4760
500k
    3223356116U,  // MLA_ZPmZZ_B
4761
500k
    3223372500U,  // MLA_ZPmZZ_D
4762
500k
    3519087316U,  // MLA_ZPmZZ_H
4763
500k
    3223405268U,  // MLA_ZPmZZ_S
4764
500k
    1075888852U,  // MLA_ZZZI_D
4765
500k
    2185298644U,  // MLA_ZZZI_H
4766
500k
    1344357076U,  // MLA_ZZZI_S
4767
500k
    2959213268U,  // MLAv16i8
4768
500k
    2961310420U,  // MLAv2i32
4769
500k
    2961310420U,  // MLAv2i32_indexed
4770
500k
    2965504724U,  // MLAv4i16
4771
500k
    2965504724U,  // MLAv4i16_indexed
4772
500k
    2967601876U,  // MLAv4i32
4773
500k
    2967601876U,  // MLAv4i32_indexed
4774
500k
    2969699028U,  // MLAv8i16
4775
500k
    2969699028U,  // MLAv8i16_indexed
4776
500k
    2971796180U,  // MLAv8i8
4777
500k
    3223360912U,  // MLS_ZPmZZ_B
4778
500k
    3223377296U,  // MLS_ZPmZZ_D
4779
500k
    3519092112U,  // MLS_ZPmZZ_H
4780
500k
    3223410064U,  // MLS_ZPmZZ_S
4781
500k
    1075893648U,  // MLS_ZZZI_D
4782
500k
    2185303440U,  // MLS_ZZZI_H
4783
500k
    1344361872U,  // MLS_ZZZI_S
4784
500k
    2959218064U,  // MLSv16i8
4785
500k
    2961315216U,  // MLSv2i32
4786
500k
    2961315216U,  // MLSv2i32_indexed
4787
500k
    2965509520U,  // MLSv4i16
4788
500k
    2965509520U,  // MLSv4i16_indexed
4789
500k
    2967606672U,  // MLSv4i32
4790
500k
    2967606672U,  // MLSv4i32_indexed
4791
500k
    2969703824U,  // MLSv8i16
4792
500k
    2969703824U,  // MLSv8i16_indexed
4793
500k
    2971800976U,  // MLSv8i8
4794
500k
    941323U,  // MOPSSETGE
4795
500k
    941384U,  // MOPSSETGEN
4796
500k
    942272U,  // MOPSSETGET
4797
500k
    941745U,  // MOPSSETGETN
4798
500k
    3491778300U,  // MOVID
4799
500k
    3764489980U,  // MOVIv16b_ns
4800
500k
    3500248828U,  // MOVIv2d_ns
4801
500k
    3766587132U,  // MOVIv2i32
4802
500k
    3766587132U,  // MOVIv2s_msl
4803
500k
    3770781436U,  // MOVIv4i16
4804
500k
    3772878588U,  // MOVIv4i32
4805
500k
    3772878588U,  // MOVIv4s_msl
4806
500k
    3777072892U,  // MOVIv8b_ns
4807
500k
    3774975740U,  // MOVIv8i16
4808
500k
    807423751U, // MOVKWi
4809
500k
    807423751U, // MOVKXi
4810
500k
    3760214553U,  // MOVNWi
4811
500k
    3760214553U,  // MOVNXi
4812
500k
    2136813U, // MOVPRFX_ZPmZ_B
4813
500k
    2153197U, // MOVPRFX_ZPmZ_D
4814
500k
    272702189U, // MOVPRFX_ZPmZ_H
4815
500k
    2185965U, // MOVPRFX_ZPmZ_S
4816
500k
    3223362285U,  // MOVPRFX_ZPzZ_B
4817
500k
    3223378669U,  // MOVPRFX_ZPzZ_D
4818
500k
    1640045293U,  // MOVPRFX_ZPzZ_H
4819
500k
    3223411437U,  // MOVPRFX_ZPzZ_S
4820
500k
    3224230637U,  // MOVPRFX_ZZ
4821
500k
    3760216952U,  // MOVZWi
4822
500k
    3760216952U,  // MOVZXi
4823
500k
    4028651004U,  // MRS
4824
500k
    3223357427U,  // MSB_ZPmZZ_B
4825
500k
    3223373811U,  // MSB_ZPmZZ_D
4826
500k
    3519088627U,  // MSB_ZPmZZ_H
4827
500k
    3223406579U,  // MSB_ZPmZZ_S
4828
500k
    955537U,  // MSR
4829
500k
    971921U,  // MSRpstateImm1
4830
500k
    971921U,  // MSRpstateImm4
4831
500k
    988305U,  // MSRpstatesvcrImm1
4832
500k
    807422068U, // MSUBWrrr
4833
500k
    807422068U, // MSUBXrrr
4834
500k
    3760230634U,  // MUL_ZI_B
4835
500k
    2418069738U,  // MUL_ZI_D
4836
500k
    2179010794U,  // MUL_ZI_H
4837
500k
    4028715242U,  // MUL_ZI_S
4838
500k
    3223359722U,  // MUL_ZPmZ_B
4839
500k
    3223376106U,  // MUL_ZPmZ_D
4840
500k
    3519090922U,  // MUL_ZPmZ_H
4841
500k
    3223408874U,  // MUL_ZPmZ_S
4842
500k
    2418069738U,  // MUL_ZZZI_D
4843
500k
    2179010794U,  // MUL_ZZZI_H
4844
500k
    4028715242U,  // MUL_ZZZI_S
4845
500k
    3760230634U,  // MUL_ZZZ_B
4846
500k
    2418069738U,  // MUL_ZZZ_D
4847
500k
    2179010794U,  // MUL_ZZZ_H
4848
500k
    4028715242U,  // MUL_ZZZ_S
4849
500k
    543265002U, // MULv16i8
4850
500k
    545362154U, // MULv2i32
4851
500k
    545362154U, // MULv2i32_indexed
4852
500k
    549556458U, // MULv4i16
4853
500k
    549556458U, // MULv4i16_indexed
4854
500k
    551653610U, // MULv4i32
4855
500k
    551653610U, // MULv4i32_indexed
4856
500k
    553750762U, // MULv8i16
4857
500k
    553750762U, // MULv8i16_indexed
4858
500k
    555847914U, // MULv8i8
4859
500k
    3766587113U,  // MVNIv2i32
4860
500k
    3766587113U,  // MVNIv2s_msl
4861
500k
    3770781417U,  // MVNIv4i16
4862
500k
    3772878569U,  // MVNIv4i32
4863
500k
    3772878569U,  // MVNIv4s_msl
4864
500k
    3774975721U,  // MVNIv8i16
4865
500k
    3223360860U,  // NANDS_PPzPP
4866
500k
    3223357978U,  // NAND_PPzPP
4867
500k
    2418069680U,  // NBSL_ZZZZ
4868
500k
    2132788U, // NEG_ZPmZ_B
4869
500k
    2149172U, // NEG_ZPmZ_D
4870
500k
    272698164U, // NEG_ZPmZ_H
4871
500k
    2181940U, // NEG_ZPmZ_S
4872
500k
    543263540U, // NEGv16i8
4873
500k
    807422772U, // NEGv1i64
4874
500k
    545360692U, // NEGv2i32
4875
500k
    547457844U, // NEGv2i64
4876
500k
    549554996U, // NEGv4i16
4877
500k
    551652148U, // NEGv4i32
4878
500k
    553749300U, // NEGv8i16
4879
500k
    555846452U, // NEGv8i8
4880
500k
    3223358569U,  // NMATCH_PPzZZ_B
4881
500k
    1640041577U,  // NMATCH_PPzZZ_H
4882
500k
    3223361031U,  // NORS_PPzPP
4883
500k
    3223360613U,  // NOR_PPzPP
4884
500k
    2136114U, // NOT_ZPmZ_B
4885
500k
    2152498U, // NOT_ZPmZ_D
4886
500k
    272701490U, // NOT_ZPmZ_H
4887
500k
    2185266U, // NOT_ZPmZ_S
4888
500k
    543266866U, // NOTv16i8
4889
500k
    555849778U, // NOTv8i8
4890
500k
    3223360951U,  // ORNS_PPzPP
4891
500k
    807424475U, // ORNWrs
4892
500k
    807424475U, // ORNXrs
4893
500k
    3223359963U,  // ORN_PPzPP
4894
500k
    543265243U, // ORNv16i8
4895
500k
    555848155U, // ORNv8i8
4896
500k
    3223361037U,  // ORRS_PPzPP
4897
500k
    807425142U, // ORRWri
4898
500k
    807425142U, // ORRWrs
4899
500k
    807425142U, // ORRXri
4900
500k
    807425142U, // ORRXrs
4901
500k
    3223360630U,  // ORR_PPzPP
4902
500k
    2418070646U,  // ORR_ZI
4903
500k
    3223360630U,  // ORR_ZPmZ_B
4904
500k
    3223377014U,  // ORR_ZPmZ_D
4905
500k
    3519091830U,  // ORR_ZPmZ_H
4906
500k
    3223409782U,  // ORR_ZPmZ_S
4907
500k
    2418070646U,  // ORR_ZZZ
4908
500k
    543265910U, // ORRv16i8
4909
500k
    813831286U, // ORRv2i32
4910
500k
    818025590U, // ORRv4i16
4911
500k
    820122742U, // ORRv4i32
4912
500k
    822219894U, // ORRv8i16
4913
500k
    555848822U, // ORRv8i8
4914
500k
    153938U,  // ORV_VPZ_B
4915
500k
    1646434642U,  // ORV_VPZ_D
4916
500k
    1648548178U,  // ORV_VPZ_H
4917
500k
    1638078802U,  // ORV_VPZ_S
4918
500k
    270746259U, // PACDA
4919
500k
    270746840U, // PACDB
4920
500k
    213929U,  // PACDZA
4921
500k
    215240U,  // PACDZB
4922
500k
    807420592U, // PACGA
4923
500k
    270746302U, // PACIA
4924
500k
    7296U,  // PACIA1716
4925
500k
    7261U,  // PACIASP
4926
500k
    7252U,  // PACIAZ
4927
500k
    270746875U, // PACIB
4928
500k
    7207U,  // PACIB1716
4929
500k
    7287U,  // PACIBSP
4930
500k
    7270U,  // PACIBZ
4931
500k
    213945U,  // PACIZA
4932
500k
    215256U,  // PACIZB
4933
500k
    35542U, // PFALSE
4934
500k
    3223361620U,  // PFIRST_B
4935
500k
    4028679687U,  // PMULLB_ZZZ_D
4936
500k
    2273379847U,  // PMULLB_ZZZ_H
4937
500k
    128288263U, // PMULLB_ZZZ_Q
4938
500k
    4028684095U,  // PMULLT_ZZZ_D
4939
500k
    2273384255U,  // PMULLT_ZZZ_H
4940
500k
    128292671U, // PMULLT_ZZZ_Q
4941
500k
    553746720U, // PMULLv16i8
4942
500k
    130125919U, // PMULLv1i64
4943
500k
    398557472U, // PMULLv2i64
4944
500k
    553750623U, // PMULLv8i8
4945
500k
    3760230646U,  // PMUL_ZZZ_B
4946
500k
    543265014U, // PMULv16i8
4947
500k
    555847926U, // PMULv8i8
4948
500k
    3223361680U,  // PNEXT_B
4949
500k
    3223378064U,  // PNEXT_D
4950
500k
    2176915600U,  // PNEXT_H
4951
500k
    3223410832U,  // PNEXT_S
4952
500k
    2184135918U,  // PRFB_D_PZI
4953
500k
    2215593198U,  // PRFB_D_SCALED
4954
500k
    2215593198U,  // PRFB_D_SXTW_SCALED
4955
500k
    2215593198U,  // PRFB_D_UXTW_SCALED
4956
500k
    2215593198U,  // PRFB_PRI
4957
500k
    2215593198U,  // PRFB_PRR
4958
500k
    2175747310U,  // PRFB_S_PZI
4959
500k
    2215593198U,  // PRFB_S_SXTW_SCALED
4960
500k
    2215593198U,  // PRFB_S_UXTW_SCALED
4961
500k
    2184137236U,  // PRFD_D_PZI
4962
500k
    2215594516U,  // PRFD_D_SCALED
4963
500k
    2215594516U,  // PRFD_D_SXTW_SCALED
4964
500k
    2215594516U,  // PRFD_D_UXTW_SCALED
4965
500k
    2215594516U,  // PRFD_PRI
4966
500k
    2215594516U,  // PRFD_PRR
4967
500k
    2175748628U,  // PRFD_S_PZI
4968
500k
    2215594516U,  // PRFD_S_SXTW_SCALED
4969
500k
    2215594516U,  // PRFD_S_UXTW_SCALED
4970
500k
    2184137849U,  // PRFH_D_PZI
4971
500k
    2215595129U,  // PRFH_D_SCALED
4972
500k
    2215595129U,  // PRFH_D_SXTW_SCALED
4973
500k
    2215595129U,  // PRFH_D_UXTW_SCALED
4974
500k
    2215595129U,  // PRFH_PRI
4975
500k
    2215595129U,  // PRFH_PRR
4976
500k
    2175749241U,  // PRFH_S_PZI
4977
500k
    2215595129U,  // PRFH_S_SXTW_SCALED
4978
500k
    2215595129U,  // PRFH_S_UXTW_SCALED
4979
500k
    1076859190U,  // PRFMl
4980
500k
    839881014U, // PRFMroW
4981
500k
    839881014U, // PRFMroX
4982
500k
    839881014U, // PRFMui
4983
500k
    2215598601U,  // PRFS_PRR
4984
500k
    839881069U, // PRFUMi
4985
500k
    2184141321U,  // PRFW_D_PZI
4986
500k
    2215598601U,  // PRFW_D_SCALED
4987
500k
    2215598601U,  // PRFW_D_SXTW_SCALED
4988
500k
    2215598601U,  // PRFW_D_UXTW_SCALED
4989
500k
    2215598601U,  // PRFW_PRI
4990
500k
    2175752713U,  // PRFW_S_PZI
4991
500k
    2215598601U,  // PRFW_S_SXTW_SCALED
4992
500k
    2215598601U,  // PRFW_S_UXTW_SCALED
4993
500k
    3224227842U,  // PSEL_PPPRI_B
4994
500k
    3224227842U,  // PSEL_PPPRI_D
4995
500k
    3224227842U,  // PSEL_PPPRI_H
4996
500k
    3224227842U,  // PSEL_PPPRI_S
4997
500k
    3761100870U,  // PTEST_PP
4998
500k
    1881183587U,  // PTRUES_B
4999
500k
    1881199971U,  // PTRUES_D
5000
500k
    132191587U, // PTRUES_H
5001
500k
    1881232739U,  // PTRUES_S
5002
500k
    1881180912U,  // PTRUE_B
5003
500k
    1881197296U,  // PTRUE_D
5004
500k
    132188912U, // PTRUE_H
5005
500k
    1881230064U,  // PTRUE_S
5006
500k
    1736511159U,  // PUNPKHI_PP
5007
500k
    1736512048U,  // PUNPKLO_PP
5008
500k
    1881179808U,  // RADDHNB_ZZZ_B
5009
500k
    2172716704U,  // RADDHNB_ZZZ_H
5010
500k
    2418099872U,  // RADDHNB_ZZZ_S
5011
500k
    2686490529U,  // RADDHNT_ZZZ_B
5012
500k
    2174818209U,  // RADDHNT_ZZZ_H
5013
500k
    1075926945U,  // RADDHNT_ZZZ_S
5014
500k
    545362314U, // RADDHNv2i64_v2i32
5015
500k
    2967601515U,  // RADDHNv2i64_v4i32
5016
500k
    549556618U, // RADDHNv4i32_v4i16
5017
500k
    2969698667U,  // RADDHNv4i32_v8i16
5018
500k
    2959212907U,  // RADDHNv8i16_v16i8
5019
500k
    555848074U, // RADDHNv8i16_v8i8
5020
500k
    547455102U, // RAX1
5021
500k
    2418065534U,  // RAX1_ZZZ_D
5022
500k
    807425690U, // RBITWr
5023
500k
    807425690U, // RBITXr
5024
500k
    2135706U, // RBIT_ZPmZ_B
5025
500k
    2152090U, // RBIT_ZPmZ_D
5026
500k
    272701082U, // RBIT_ZPmZ_H
5027
500k
    2184858U, // RBIT_ZPmZ_S
5028
500k
    543266458U, // RBITv16i8
5029
500k
    555849370U, // RBITv8i8
5030
500k
    3223361012U,  // RDFFRS_PPz
5031
500k
    3223360485U,  // RDFFR_PPz_REAL
5032
500k
    37861U, // RDFFR_P_REAL
5033
500k
    807424267U, // RDVLI_XI
5034
500k
    22128U, // RET
5035
500k
    8592U,  // RETAA
5036
500k
    8599U,  // RETAB
5037
500k
    807420499U, // REV16Wr
5038
500k
    807420499U, // REV16Xr
5039
500k
    543261267U, // REV16v16i8
5040
500k
    555844179U, // REV16v8i8
5041
500k
    807420036U, // REV32Xr
5042
500k
    543260804U, // REV32v16i8
5043
500k
    549552260U, // REV32v4i16
5044
500k
    553746564U, // REV32v8i16
5045
500k
    555843716U, // REV32v8i8
5046
500k
    543261242U, // REV64v16i8
5047
500k
    545358394U, // REV64v2i32
5048
500k
    549552698U, // REV64v4i16
5049
500k
    551649850U, // REV64v4i32
5050
500k
    553747002U, // REV64v8i16
5051
500k
    555844154U, // REV64v8i8
5052
500k
    2148496U, // REVB_ZPmZ_D
5053
500k
    272697488U, // REVB_ZPmZ_H
5054
500k
    2181264U, // REVB_ZPmZ_S
5055
500k
    541428297U, // REVD_ZPmZ
5056
500k
    2150031U, // REVH_ZPmZ_D
5057
500k
    2182799U, // REVH_ZPmZ_S
5058
500k
    2153107U, // REVW_ZPmZ_D
5059
500k
    807426282U, // REVWr
5060
500k
    807426282U, // REVXr
5061
500k
    3760232682U,  // REV_PP_B
5062
500k
    2418071786U,  // REV_PP_D
5063
500k
    1642141930U,  // REV_PP_H
5064
500k
    4028717290U,  // REV_PP_S
5065
500k
    3760232682U,  // REV_ZZ_B
5066
500k
    2418071786U,  // REV_ZZ_D
5067
500k
    1642141930U,  // REV_ZZ_H
5068
500k
    4028717290U,  // REV_ZZ_S
5069
500k
    807422721U, // RMIF
5070
500k
    807425130U, // RORVWr
5071
500k
    807425130U, // RORVXr
5072
500k
    1881179855U,  // RSHRNB_ZZI_B
5073
500k
    2172716751U,  // RSHRNB_ZZI_H
5074
500k
    2418099919U,  // RSHRNB_ZZI_S
5075
500k
    2686490564U,  // RSHRNT_ZZI_B
5076
500k
    2174818244U,  // RSHRNT_ZZI_H
5077
500k
    1075926980U,  // RSHRNT_ZZI_S
5078
500k
    2959212936U,  // RSHRNv16i8_shift
5079
500k
    545362379U, // RSHRNv2i32_shift
5080
500k
    549556683U, // RSHRNv4i16_shift
5081
500k
    2967601544U,  // RSHRNv4i32_shift
5082
500k
    2969698696U,  // RSHRNv8i16_shift
5083
500k
    555848139U, // RSHRNv8i8_shift
5084
500k
    1881179799U,  // RSUBHNB_ZZZ_B
5085
500k
    2172716695U,  // RSUBHNB_ZZZ_H
5086
500k
    2418099863U,  // RSUBHNB_ZZZ_S
5087
500k
    2686490520U,  // RSUBHNT_ZZZ_B
5088
500k
    2174818200U,  // RSUBHNT_ZZZ_H
5089
500k
    1075926936U,  // RSUBHNT_ZZZ_S
5090
500k
    545362306U, // RSUBHNv2i64_v2i32
5091
500k
    2967601506U,  // RSUBHNv2i64_v4i32
5092
500k
    549556610U, // RSUBHNv4i32_v4i16
5093
500k
    2969698658U,  // RSUBHNv4i32_v8i16
5094
500k
    2959212898U,  // RSUBHNv8i16_v16i8
5095
500k
    555848066U, // RSUBHNv8i16_v8i8
5096
500k
    1344324879U,  // SABALB_ZZZ_D
5097
500k
    2281768207U,  // SABALB_ZZZ_H
5098
500k
    2686534927U,  // SABALB_ZZZ_S
5099
500k
    1344329382U,  // SABALT_ZZZ_D
5100
500k
    2281772710U,  // SABALT_ZZZ_H
5101
500k
    2686539430U,  // SABALT_ZZZ_S
5102
500k
    2969698468U,  // SABALv16i8_v8i16
5103
500k
    2963410701U,  // SABALv2i32_v2i64
5104
500k
    2967605005U,  // SABALv4i16_v4i32
5105
500k
    2963407012U,  // SABALv4i32_v2i64
5106
500k
    2967601316U,  // SABALv8i16_v4i32
5107
500k
    2969702157U,  // SABALv8i8_v8i16
5108
500k
    1344307847U,  // SABA_ZZZ_B
5109
500k
    1075888775U,  // SABA_ZZZ_D
5110
500k
    2185298567U,  // SABA_ZZZ_H
5111
500k
    1344356999U,  // SABA_ZZZ_S
5112
500k
    2959213191U,  // SABAv16i8
5113
500k
    2961310343U,  // SABAv2i32
5114
500k
    2965504647U,  // SABAv4i16
5115
500k
    2967601799U,  // SABAv4i32
5116
500k
    2969698951U,  // SABAv8i16
5117
500k
    2971796103U,  // SABAv8i8
5118
500k
    4028679620U,  // SABDLB_ZZZ_D
5119
500k
    2273379780U,  // SABDLB_ZZZ_H
5120
500k
    1881228740U,  // SABDLB_ZZZ_S
5121
500k
    4028684023U,  // SABDLT_ZZZ_D
5122
500k
    2273384183U,  // SABDLT_ZZZ_H
5123
500k
    1881233143U,  // SABDLT_ZZZ_S
5124
500k
    553746662U, // SABDLv16i8_v8i16
5125
500k
    547459006U, // SABDLv2i32_v2i64
5126
500k
    551653310U, // SABDLv4i16_v4i32
5127
500k
    547455206U, // SABDLv4i32_v2i64
5128
500k
    551649510U, // SABDLv8i16_v4i32
5129
500k
    553750462U, // SABDLv8i8_v8i16
5130
500k
    3223357832U,  // SABD_ZPmZ_B
5131
500k
    3223374216U,  // SABD_ZPmZ_D
5132
500k
    3519089032U,  // SABD_ZPmZ_H
5133
500k
    3223406984U,  // SABD_ZPmZ_S
5134
500k
    543263112U, // SABDv16i8
5135
500k
    545360264U, // SABDv2i32
5136
500k
    549554568U, // SABDv4i16
5137
500k
    551651720U, // SABDv4i32
5138
500k
    553748872U, // SABDv8i16
5139
500k
    555846024U, // SABDv8i8
5140
500k
    3223376548U,  // SADALP_ZPmZ_D
5141
500k
    3519091364U,  // SADALP_ZPmZ_H
5142
500k
    3223409316U,  // SADALP_ZPmZ_S
5143
500k
    2969703076U,  // SADALPv16i8_v8i16
5144
500k
    3089240740U,  // SADALPv2i32_v1i64
5145
500k
    2961314468U,  // SADALPv4i16_v2i32
5146
500k
    2963411620U,  // SADALPv4i32_v2i64
5147
500k
    2967605924U,  // SADALPv8i16_v4i32
5148
500k
    2965508772U,  // SADALPv8i8_v4i16
5149
500k
    4028683846U,  // SADDLBT_ZZZ_D
5150
500k
    2273384006U,  // SADDLBT_ZZZ_H
5151
500k
    1881232966U,  // SADDLBT_ZZZ_S
5152
500k
    4028679645U,  // SADDLB_ZZZ_D
5153
500k
    2273379805U,  // SADDLB_ZZZ_H
5154
500k
    1881228765U,  // SADDLB_ZZZ_S
5155
500k
    553751220U, // SADDLPv16i8_v8i16
5156
500k
    673288884U, // SADDLPv2i32_v1i64
5157
500k
    545362612U, // SADDLPv4i16_v2i32
5158
500k
    547459764U, // SADDLPv4i32_v2i64
5159
500k
    551654068U, // SADDLPv8i16_v4i32
5160
500k
    549556916U, // SADDLPv8i8_v4i16
5161
500k
    4028684039U,  // SADDLT_ZZZ_D
5162
500k
    2273384199U,  // SADDLT_ZZZ_H
5163
500k
    1881233159U,  // SADDLT_ZZZ_S
5164
500k
    538990849U, // SADDLVv16i8v
5165
500k
    538990849U, // SADDLVv4i16v
5166
500k
    538990849U, // SADDLVv4i32v
5167
500k
    538990849U, // SADDLVv8i16v
5168
500k
    538990849U, // SADDLVv8i8v
5169
500k
    553746678U, // SADDLv16i8_v8i16
5170
500k
    547459044U, // SADDLv2i32_v2i64
5171
500k
    551653348U, // SADDLv4i16_v4i32
5172
500k
    547455222U, // SADDLv4i32_v2i64
5173
500k
    551649526U, // SADDLv8i16_v4i32
5174
500k
    553750500U, // SADDLv8i8_v8i16
5175
500k
    1745000662U,  // SADDV_VPZ_B
5176
500k
    1648531670U,  // SADDV_VPZ_H
5177
500k
    1638045910U,  // SADDV_VPZ_S
5178
500k
    2418067622U,  // SADDWB_ZZZ_D
5179
500k
    2179008678U,  // SADDWB_ZZZ_H
5180
500k
    4028713126U,  // SADDWB_ZZZ_S
5181
500k
    2418071674U,  // SADDWT_ZZZ_D
5182
500k
    2179012730U,  // SADDWT_ZZZ_H
5183
500k
    4028717178U,  // SADDWT_ZZZ_S
5184
500k
    553746952U, // SADDWv16i8_v8i16
5185
500k
    547461627U, // SADDWv2i32_v2i64
5186
500k
    551655931U, // SADDWv4i16_v4i32
5187
500k
    547455496U, // SADDWv4i32_v2i64
5188
500k
    551649800U, // SADDWv8i16_v4i32
5189
500k
    553753083U, // SADDWv8i8_v8i16
5190
500k
    8605U,  // SB
5191
500k
    1075889590U,  // SBCLB_ZZZ_D
5192
500k
    1344357814U,  // SBCLB_ZZZ_S
5193
500k
    1075893993U,  // SBCLT_ZZZ_D
5194
500k
    1344362217U,  // SBCLT_ZZZ_S
5195
500k
    807425348U, // SBCSWr
5196
500k
    807425348U, // SBCSXr
5197
500k
    807422191U, // SBCWr
5198
500k
    807422191U, // SBCXr
5199
500k
    807424298U, // SBFMWri
5200
500k
    807424298U, // SBFMXri
5201
500k
    3760231108U,  // SCLAMP_ZZZ_B
5202
500k
    2418070212U,  // SCLAMP_ZZZ_D
5203
500k
    2179011268U,  // SCLAMP_ZZZ_H
5204
500k
    4028715716U,  // SCLAMP_ZZZ_S
5205
500k
    807422727U, // SCVTFSWDri
5206
500k
    807422727U, // SCVTFSWHri
5207
500k
    807422727U, // SCVTFSWSri
5208
500k
    807422727U, // SCVTFSXDri
5209
500k
    807422727U, // SCVTFSXHri
5210
500k
    807422727U, // SCVTFSXSri
5211
500k
    807422727U, // SCVTFUWDri
5212
500k
    807422727U, // SCVTFUWHri
5213
500k
    807422727U, // SCVTFUWSri
5214
500k
    807422727U, // SCVTFUXDri
5215
500k
    807422727U, // SCVTFUXHri
5216
500k
    807422727U, // SCVTFUXSri
5217
500k
    2149127U, // SCVTF_ZPmZ_DtoD
5218
500k
    541133575U, // SCVTF_ZPmZ_DtoH
5219
500k
    2181895U, // SCVTF_ZPmZ_DtoS
5220
500k
    272698119U, // SCVTF_ZPmZ_HtoH
5221
500k
    2149127U, // SCVTF_ZPmZ_StoD
5222
500k
    541133575U, // SCVTF_ZPmZ_StoH
5223
500k
    2181895U, // SCVTF_ZPmZ_StoS
5224
500k
    807422727U, // SCVTFd
5225
500k
    807422727U, // SCVTFh
5226
500k
    807422727U, // SCVTFs
5227
500k
    807422727U, // SCVTFv1i16
5228
500k
    807422727U, // SCVTFv1i32
5229
500k
    807422727U, // SCVTFv1i64
5230
500k
    545360647U, // SCVTFv2f32
5231
500k
    547457799U, // SCVTFv2f64
5232
500k
    545360647U, // SCVTFv2i32_shift
5233
500k
    547457799U, // SCVTFv2i64_shift
5234
500k
    549554951U, // SCVTFv4f16
5235
500k
    551652103U, // SCVTFv4f32
5236
500k
    549554951U, // SCVTFv4i16_shift
5237
500k
    551652103U, // SCVTFv4i32_shift
5238
500k
    553749255U, // SCVTFv8f16
5239
500k
    553749255U, // SCVTFv8i16_shift
5240
500k
    3223377109U,  // SDIVR_ZPmZ_D
5241
500k
    3223409877U,  // SDIVR_ZPmZ_S
5242
500k
    807426293U, // SDIVWr
5243
500k
    807426293U, // SDIVXr
5244
500k
    3223378165U,  // SDIV_ZPmZ_D
5245
500k
    3223410933U,  // SDIV_ZPmZ_S
5246
500k
    2686507044U,  // SDOT_ZZZI_D
5247
500k
    1344362532U,  // SDOT_ZZZI_S
5248
500k
    2686507044U,  // SDOT_ZZZ_D
5249
500k
    1344362532U,  // SDOT_ZZZ_S
5250
500k
    2967607332U,  // SDOTlanev16i8
5251
500k
    2961315876U,  // SDOTlanev8i8
5252
500k
    2967607332U,  // SDOTv16i8
5253
500k
    2961315876U,  // SDOTv8i8
5254
500k
    3223359485U,  // SEL_PPPP
5255
500k
    3223359485U,  // SEL_ZPZZ_B
5256
500k
    3223375869U,  // SEL_ZPZZ_D
5257
500k
    2176913405U,  // SEL_ZPZZ_H
5258
500k
    3223408637U,  // SEL_ZPZZ_S
5259
500k
    941331U,  // SETE
5260
500k
    941393U,  // SETEN
5261
500k
    942281U,  // SETET
5262
500k
    941755U,  // SETETN
5263
500k
    16971U, // SETF16
5264
500k
    16986U, // SETF8
5265
500k
    8653U,  // SETFFR
5266
500k
    941353U,  // SETGM
5267
500k
    941418U,  // SETGMN
5268
500k
    942306U,  // SETGMT
5269
500k
    941783U,  // SETGMTN
5270
500k
    942241U,  // SETGP
5271
500k
    941452U,  // SETGPN
5272
500k
    942340U,  // SETGPT
5273
500k
    941821U,  // SETGPTN
5274
500k
    941361U,  // SETM
5275
500k
    941427U,  // SETMN
5276
500k
    942315U,  // SETMT
5277
500k
    941793U,  // SETMTN
5278
500k
    942249U,  // SETP
5279
500k
    941461U,  // SETPN
5280
500k
    942349U,  // SETPT
5281
500k
    941831U,  // SETPTN
5282
500k
    270747880U, // SHA1Crrr
5283
500k
    807422816U, // SHA1Hrr
5284
500k
    270749987U, // SHA1Mrrr
5285
500k
    270750303U, // SHA1Prrr
5286
500k
    2967601153U,  // SHA1SU0rrr
5287
500k
    2967601236U,  // SHA1SU1rr
5288
500k
    270745754U, // SHA256H2rrr
5289
500k
    270748616U, // SHA256Hrrr
5290
500k
    2967601173U,  // SHA256SU0rr
5291
500k
    2967601256U,  // SHA256SU1rrr
5292
500k
    270748563U, // SHA512H
5293
500k
    270745744U, // SHA512H2
5294
500k
    2963406858U,  // SHA512SU0
5295
500k
    2963406941U,  // SHA512SU1
5296
500k
    3223357927U,  // SHADD_ZPmZ_B
5297
500k
    3223374311U,  // SHADD_ZPmZ_D
5298
500k
    3519089127U,  // SHADD_ZPmZ_H
5299
500k
    3223407079U,  // SHADD_ZPmZ_S
5300
500k
    543263207U, // SHADDv16i8
5301
500k
    545360359U, // SHADDv2i32
5302
500k
    549554663U, // SHADDv4i16
5303
500k
    551651815U, // SHADDv4i32
5304
500k
    553748967U, // SHADDv8i16
5305
500k
    555846119U, // SHADDv8i8
5306
500k
    553746695U, // SHLLv16i8
5307
500k
    547459145U, // SHLLv2i32
5308
500k
    551653449U, // SHLLv4i16
5309
500k
    547455239U, // SHLLv4i32
5310
500k
    551649543U, // SHLLv8i16
5311
500k
    553750601U, // SHLLv8i8
5312
500k
    807424018U, // SHLd
5313
500k
    543264786U, // SHLv16i8_shift
5314
500k
    545361938U, // SHLv2i32_shift
5315
500k
    547459090U, // SHLv2i64_shift
5316
500k
    549556242U, // SHLv4i16_shift
5317
500k
    551653394U, // SHLv4i32_shift
5318
500k
    553750546U, // SHLv8i16_shift
5319
500k
    555847698U, // SHLv8i8_shift
5320
500k
    1881179837U,  // SHRNB_ZZI_B
5321
500k
    2172716733U,  // SHRNB_ZZI_H
5322
500k
    2418099901U,  // SHRNB_ZZI_S
5323
500k
    2686490546U,  // SHRNT_ZZI_B
5324
500k
    2174818226U,  // SHRNT_ZZI_H
5325
500k
    1075926962U,  // SHRNT_ZZI_S
5326
500k
    2959212918U,  // SHRNv16i8_shift
5327
500k
    545362363U, // SHRNv2i32_shift
5328
500k
    549556667U, // SHRNv4i16_shift
5329
500k
    2967601526U,  // SHRNv4i32_shift
5330
500k
    2969698678U,  // SHRNv8i16_shift
5331
500k
    555848123U, // SHRNv8i8_shift
5332
500k
    3223360443U,  // SHSUBR_ZPmZ_B
5333
500k
    3223376827U,  // SHSUBR_ZPmZ_D
5334
500k
    3519091643U,  // SHSUBR_ZPmZ_H
5335
500k
    3223409595U,  // SHSUBR_ZPmZ_S
5336
500k
    3223357541U,  // SHSUB_ZPmZ_B
5337
500k
    3223373925U,  // SHSUB_ZPmZ_D
5338
500k
    3519088741U,  // SHSUB_ZPmZ_H
5339
500k
    3223406693U,  // SHSUB_ZPmZ_S
5340
500k
    543262821U, // SHSUBv16i8
5341
500k
    545359973U, // SHSUBv2i32
5342
500k
    549554277U, // SHSUBv4i16
5343
500k
    551651429U, // SHSUBv4i32
5344
500k
    553748581U, // SHSUBv8i16
5345
500k
    555845733U, // SHSUBv8i8
5346
500k
    1344311007U,  // SLI_ZZI_B
5347
500k
    1075891935U,  // SLI_ZZI_D
5348
500k
    2185301727U,  // SLI_ZZI_H
5349
500k
    1344360159U,  // SLI_ZZI_S
5350
500k
    270749407U, // SLId
5351
500k
    2959216351U,  // SLIv16i8_shift
5352
500k
    2961313503U,  // SLIv2i32_shift
5353
500k
    2963410655U,  // SLIv2i64_shift
5354
500k
    2965507807U,  // SLIv4i16_shift
5355
500k
    2967604959U,  // SLIv4i32_shift
5356
500k
    2969702111U,  // SLIv8i16_shift
5357
500k
    2971799263U,  // SLIv8i8_shift
5358
500k
    2967601267U,  // SM3PARTW1
5359
500k
    2967601688U,  // SM3PARTW2
5360
500k
    551649351U, // SM3SS1
5361
500k
    2967601761U,  // SM3TT1A
5362
500k
    2967602165U,  // SM3TT1B
5363
500k
    2967601770U,  // SM3TT2A
5364
500k
    2967602194U,  // SM3TT2B
5365
500k
    2967603791U,  // SM4E
5366
500k
    4028717844U,  // SM4EKEY_ZZZ_S
5367
500k
    551656212U, // SM4ENCKEY
5368
500k
    4028713551U,  // SM4E_ZZZ_S
5369
500k
    807423956U, // SMADDLrrr
5370
500k
    3223360338U,  // SMAXP_ZPmZ_B
5371
500k
    3223376722U,  // SMAXP_ZPmZ_D
5372
500k
    3519091538U,  // SMAXP_ZPmZ_H
5373
500k
    3223409490U,  // SMAXP_ZPmZ_S
5374
500k
    543265618U, // SMAXPv16i8
5375
500k
    545362770U, // SMAXPv2i32
5376
500k
    549557074U, // SMAXPv4i16
5377
500k
    551654226U, // SMAXPv4i32
5378
500k
    553751378U, // SMAXPv8i16
5379
500k
    555848530U, // SMAXPv8i8
5380
500k
    153950U,  // SMAXV_VPZ_B
5381
500k
    1646434654U,  // SMAXV_VPZ_D
5382
500k
    1648548190U,  // SMAXV_VPZ_H
5383
500k
    1638078814U,  // SMAXV_VPZ_S
5384
500k
    538990942U, // SMAXVv16i8v
5385
500k
    538990942U, // SMAXVv4i16v
5386
500k
    538990942U, // SMAXVv4i32v
5387
500k
    538990942U, // SMAXVv8i16v
5388
500k
    538990942U, // SMAXVv8i8v
5389
500k
    3760233155U,  // SMAX_ZI_B
5390
500k
    2418072259U,  // SMAX_ZI_D
5391
500k
    2179013315U,  // SMAX_ZI_H
5392
500k
    4028717763U,  // SMAX_ZI_S
5393
500k
    3223362243U,  // SMAX_ZPmZ_B
5394
500k
    3223378627U,  // SMAX_ZPmZ_D
5395
500k
    3519093443U,  // SMAX_ZPmZ_H
5396
500k
    3223411395U,  // SMAX_ZPmZ_S
5397
500k
    543267523U, // SMAXv16i8
5398
500k
    545364675U, // SMAXv2i32
5399
500k
    549558979U, // SMAXv4i16
5400
500k
    551656131U, // SMAXv4i32
5401
500k
    553753283U, // SMAXv8i16
5402
500k
    555850435U, // SMAXv8i8
5403
500k
    264456U,  // SMC
5404
500k
    3223360256U,  // SMINP_ZPmZ_B
5405
500k
    3223376640U,  // SMINP_ZPmZ_D
5406
500k
    3519091456U,  // SMINP_ZPmZ_H
5407
500k
    3223409408U,  // SMINP_ZPmZ_S
5408
500k
    543265536U, // SMINPv16i8
5409
500k
    545362688U, // SMINPv2i32
5410
500k
    549556992U, // SMINPv4i16
5411
500k
    551654144U, // SMINPv4i32
5412
500k
    553751296U, // SMINPv8i16
5413
500k
    555848448U, // SMINPv8i8
5414
500k
    153898U,  // SMINV_VPZ_B
5415
500k
    1646434602U,  // SMINV_VPZ_D
5416
500k
    1648548138U,  // SMINV_VPZ_H
5417
500k
    1638078762U,  // SMINV_VPZ_S
5418
500k
    538990890U, // SMINVv16i8v
5419
500k
    538990890U, // SMINVv4i16v
5420
500k
    538990890U, // SMINVv4i32v
5421
500k
    538990890U, // SMINVv8i16v
5422
500k
    538990890U, // SMINVv8i8v
5423
500k
    3760230810U,  // SMIN_ZI_B
5424
500k
    2418069914U,  // SMIN_ZI_D
5425
500k
    2179010970U,  // SMIN_ZI_H
5426
500k
    4028715418U,  // SMIN_ZI_S
5427
500k
    3223359898U,  // SMIN_ZPmZ_B
5428
500k
    3223376282U,  // SMIN_ZPmZ_D
5429
500k
    3519091098U,  // SMIN_ZPmZ_H
5430
500k
    3223409050U,  // SMIN_ZPmZ_S
5431
500k
    543265178U, // SMINv16i8
5432
500k
    545362330U, // SMINv2i32
5433
500k
    549556634U, // SMINv4i16
5434
500k
    551653786U, // SMINv4i32
5435
500k
    553750938U, // SMINv8i16
5436
500k
    555848090U, // SMINv8i8
5437
500k
    1344324924U,  // SMLALB_ZZZI_D
5438
500k
    2686534972U,  // SMLALB_ZZZI_S
5439
500k
    1344324924U,  // SMLALB_ZZZ_D
5440
500k
    2281768252U,  // SMLALB_ZZZ_H
5441
500k
    2686534972U,  // SMLALB_ZZZ_S
5442
500k
    1344329417U,  // SMLALT_ZZZI_D
5443
500k
    2686539465U,  // SMLALT_ZZZI_S
5444
500k
    1344329417U,  // SMLALT_ZZZ_D
5445
500k
    2281772745U,  // SMLALT_ZZZ_H
5446
500k
    2686539465U,  // SMLALT_ZZZ_S
5447
500k
    2969698502U,  // SMLALv16i8_v8i16
5448
500k
    2963410740U,  // SMLALv2i32_indexed
5449
500k
    2963410740U,  // SMLALv2i32_v2i64
5450
500k
    2967605044U,  // SMLALv4i16_indexed
5451
500k
    2967605044U,  // SMLALv4i16_v4i32
5452
500k
    2963407046U,  // SMLALv4i32_indexed
5453
500k
    2963407046U,  // SMLALv4i32_v2i64
5454
500k
    2967601350U,  // SMLALv8i16_indexed
5455
500k
    2967601350U,  // SMLALv8i16_v4i32
5456
500k
    2969702196U,  // SMLALv8i8_v8i16
5457
500k
    1344325221U,  // SMLSLB_ZZZI_D
5458
500k
    2686535269U,  // SMLSLB_ZZZI_S
5459
500k
    1344325221U,  // SMLSLB_ZZZ_D
5460
500k
    2281768549U,  // SMLSLB_ZZZ_H
5461
500k
    2686535269U,  // SMLSLB_ZZZ_S
5462
500k
    1344329591U,  // SMLSLT_ZZZI_D
5463
500k
    2686539639U,  // SMLSLT_ZZZI_S
5464
500k
    1344329591U,  // SMLSLT_ZZZ_D
5465
500k
    2281772919U,  // SMLSLT_ZZZ_H
5466
500k
    2686539639U,  // SMLSLT_ZZZ_S
5467
500k
    2969698634U,  // SMLSLv16i8_v8i16
5468
500k
    2963411142U,  // SMLSLv2i32_indexed
5469
500k
    2963411142U,  // SMLSLv2i32_v2i64
5470
500k
    2967605446U,  // SMLSLv4i16_indexed
5471
500k
    2967605446U,  // SMLSLv4i16_v4i32
5472
500k
    2963407178U,  // SMLSLv4i32_indexed
5473
500k
    2963407178U,  // SMLSLv4i32_v2i64
5474
500k
    2967601482U,  // SMLSLv8i16_indexed
5475
500k
    2967601482U,  // SMLSLv8i16_v4i32
5476
500k
    2969702598U,  // SMLSLv8i8_v8i16
5477
500k
    2967601896U,  // SMMLA
5478
500k
    1344357096U,  // SMMLA_ZZZ
5479
500k
    138527519U, // SMOPA_MPPZZ_D
5480
500k
    140624671U, // SMOPA_MPPZZ_S
5481
500k
    138532317U, // SMOPS_MPPZZ_D
5482
500k
    140629469U, // SMOPS_MPPZZ_S
5483
500k
    538990917U, // SMOVvi16to32
5484
500k
    538990917U, // SMOVvi16to32_idx0
5485
500k
    538990917U, // SMOVvi16to64
5486
500k
    538990917U, // SMOVvi16to64_idx0
5487
500k
    538990917U, // SMOVvi32to64
5488
500k
    538990917U, // SMOVvi32to64_idx0
5489
500k
    538990917U, // SMOVvi8to32
5490
500k
    538990917U, // SMOVvi8to32_idx0
5491
500k
    538990917U, // SMOVvi8to64
5492
500k
    538990917U, // SMOVvi8to64_idx0
5493
500k
    807423904U, // SMSUBLrrr
5494
500k
    3223358780U,  // SMULH_ZPmZ_B
5495
500k
    3223375164U,  // SMULH_ZPmZ_D
5496
500k
    3519089980U,  // SMULH_ZPmZ_H
5497
500k
    3223407932U,  // SMULH_ZPmZ_S
5498
500k
    3760229692U,  // SMULH_ZZZ_B
5499
500k
    2418068796U,  // SMULH_ZZZ_D
5500
500k
    2179009852U,  // SMULH_ZZZ_H
5501
500k
    4028714300U,  // SMULH_ZZZ_S
5502
500k
    807423292U, // SMULHrr
5503
500k
    4028679695U,  // SMULLB_ZZZI_D
5504
500k
    1881228815U,  // SMULLB_ZZZI_S
5505
500k
    4028679695U,  // SMULLB_ZZZ_D
5506
500k
    2273379855U,  // SMULLB_ZZZ_H
5507
500k
    1881228815U,  // SMULLB_ZZZ_S
5508
500k
    4028684103U,  // SMULLT_ZZZI_D
5509
500k
    1881233223U,  // SMULLT_ZZZI_S
5510
500k
    4028684103U,  // SMULLT_ZZZ_D
5511
500k
    2273384263U,  // SMULLT_ZZZ_H
5512
500k
    1881233223U,  // SMULLT_ZZZ_S
5513
500k
    553746728U, // SMULLv16i8_v8i16
5514
500k
    547459174U, // SMULLv2i32_indexed
5515
500k
    547459174U, // SMULLv2i32_v2i64
5516
500k
    551653478U, // SMULLv4i16_indexed
5517
500k
    551653478U, // SMULLv4i16_v4i32
5518
500k
    547455272U, // SMULLv4i32_indexed
5519
500k
    547455272U, // SMULLv4i32_v2i64
5520
500k
    551649576U, // SMULLv8i16_indexed
5521
500k
    551649576U, // SMULLv8i16_v4i32
5522
500k
    553750630U, // SMULLv8i8_v8i16
5523
500k
    3223358037U,  // SPLICE_ZPZZ_B
5524
500k
    3223374421U,  // SPLICE_ZPZZ_D
5525
500k
    2176911957U,  // SPLICE_ZPZZ_H
5526
500k
    3223407189U,  // SPLICE_ZPZZ_S
5527
500k
    3223358037U,  // SPLICE_ZPZ_B
5528
500k
    3223374421U,  // SPLICE_ZPZ_D
5529
500k
    2176911957U,  // SPLICE_ZPZ_H
5530
500k
    3223407189U,  // SPLICE_ZPZ_S
5531
500k
    2135336U, // SQABS_ZPmZ_B
5532
500k
    2151720U, // SQABS_ZPmZ_D
5533
500k
    272700712U, // SQABS_ZPmZ_H
5534
500k
    2184488U, // SQABS_ZPmZ_S
5535
500k
    543266088U, // SQABSv16i8
5536
500k
    807425320U, // SQABSv1i16
5537
500k
    807425320U, // SQABSv1i32
5538
500k
    807425320U, // SQABSv1i64
5539
500k
    807425320U, // SQABSv1i8
5540
500k
    545363240U, // SQABSv2i32
5541
500k
    547460392U, // SQABSv2i64
5542
500k
    549557544U, // SQABSv4i16
5543
500k
    551654696U, // SQABSv4i32
5544
500k
    553751848U, // SQABSv8i16
5545
500k
    555849000U, // SQABSv8i8
5546
500k
    3760228869U,  // SQADD_ZI_B
5547
500k
    2418067973U,  // SQADD_ZI_D
5548
500k
    2179009029U,  // SQADD_ZI_H
5549
500k
    4028713477U,  // SQADD_ZI_S
5550
500k
    3223357957U,  // SQADD_ZPmZ_B
5551
500k
    3223374341U,  // SQADD_ZPmZ_D
5552
500k
    3519089157U,  // SQADD_ZPmZ_H
5553
500k
    3223407109U,  // SQADD_ZPmZ_S
5554
500k
    3760228869U,  // SQADD_ZZZ_B
5555
500k
    2418067973U,  // SQADD_ZZZ_D
5556
500k
    2179009029U,  // SQADD_ZZZ_H
5557
500k
    4028713477U,  // SQADD_ZZZ_S
5558
500k
    543263237U, // SQADDv16i8
5559
500k
    807422469U, // SQADDv1i16
5560
500k
    807422469U, // SQADDv1i32
5561
500k
    807422469U, // SQADDv1i64
5562
500k
    807422469U, // SQADDv1i8
5563
500k
    545360389U, // SQADDv2i32
5564
500k
    547457541U, // SQADDv2i64
5565
500k
    549554693U, // SQADDv4i16
5566
500k
    551651845U, // SQADDv4i32
5567
500k
    553748997U, // SQADDv8i16
5568
500k
    555846149U, // SQADDv8i8
5569
500k
    3760228802U,  // SQCADD_ZZI_B
5570
500k
    2418067906U,  // SQCADD_ZZI_D
5571
500k
    2179008962U,  // SQCADD_ZZI_H
5572
500k
    4028713410U,  // SQCADD_ZZI_S
5573
500k
    2686469304U,  // SQDECB_XPiI
5574
500k
    807421112U, // SQDECB_XPiWdI
5575
500k
    2686470555U,  // SQDECD_XPiI
5576
500k
    807422363U, // SQDECD_XPiWdI
5577
500k
    2686503323U,  // SQDECD_ZPiI
5578
500k
    2686471241U,  // SQDECH_XPiI
5579
500k
    807423049U, // SQDECH_XPiWdI
5580
500k
    39914569U,  // SQDECH_ZPiI
5581
500k
    3760214636U,  // SQDECP_XPWd_B
5582
500k
    2418037356U,  // SQDECP_XPWd_D
5583
500k
    1881166444U,  // SQDECP_XPWd_H
5584
500k
    4028650092U,  // SQDECP_XPWd_S
5585
500k
    3760214636U,  // SQDECP_XP_B
5586
500k
    2418037356U,  // SQDECP_XP_D
5587
500k
    1881166444U,  // SQDECP_XP_H
5588
500k
    4028650092U,  // SQDECP_XP_S
5589
500k
    1075892844U,  // SQDECP_ZP_D
5590
500k
    1648431724U,  // SQDECP_ZP_H
5591
500k
    1344361068U,  // SQDECP_ZP_S
5592
500k
    2686474715U,  // SQDECW_XPiI
5593
500k
    807426523U, // SQDECW_XPiWdI
5594
500k
    2686540251U,  // SQDECW_ZPiI
5595
500k
    1344329266U,  // SQDMLALBT_ZZZ_D
5596
500k
    2281772594U,  // SQDMLALBT_ZZZ_H
5597
500k
    2686539314U,  // SQDMLALBT_ZZZ_S
5598
500k
    1344324905U,  // SQDMLALB_ZZZI_D
5599
500k
    2686534953U,  // SQDMLALB_ZZZI_S
5600
500k
    1344324905U,  // SQDMLALB_ZZZ_D
5601
500k
    2281768233U,  // SQDMLALB_ZZZ_H
5602
500k
    2686534953U,  // SQDMLALB_ZZZ_S
5603
500k
    1344329398U,  // SQDMLALT_ZZZI_D
5604
500k
    2686539446U,  // SQDMLALT_ZZZI_S
5605
500k
    1344329398U,  // SQDMLALT_ZZZ_D
5606
500k
    2281772726U,  // SQDMLALT_ZZZ_H
5607
500k
    2686539446U,  // SQDMLALT_ZZZ_S
5608
500k
    270749476U, // SQDMLALi16
5609
500k
    270749476U, // SQDMLALi32
5610
500k
    270749476U, // SQDMLALv1i32_indexed
5611
500k
    270749476U, // SQDMLALv1i64_indexed
5612
500k
    2963410724U,  // SQDMLALv2i32_indexed
5613
500k
    2963410724U,  // SQDMLALv2i32_v2i64
5614
500k
    2967605028U,  // SQDMLALv4i16_indexed
5615
500k
    2967605028U,  // SQDMLALv4i16_v4i32
5616
500k
    2963407028U,  // SQDMLALv4i32_indexed
5617
500k
    2963407028U,  // SQDMLALv4i32_v2i64
5618
500k
    2967601332U,  // SQDMLALv8i16_indexed
5619
500k
    2967601332U,  // SQDMLALv8i16_v4i32
5620
500k
    1344329295U,  // SQDMLSLBT_ZZZ_D
5621
500k
    2281772623U,  // SQDMLSLBT_ZZZ_H
5622
500k
    2686539343U,  // SQDMLSLBT_ZZZ_S
5623
500k
    1344325203U,  // SQDMLSLB_ZZZI_D
5624
500k
    2686535251U,  // SQDMLSLB_ZZZI_S
5625
500k
    1344325203U,  // SQDMLSLB_ZZZ_D
5626
500k
    2281768531U,  // SQDMLSLB_ZZZ_H
5627
500k
    2686535251U,  // SQDMLSLB_ZZZ_S
5628
500k
    1344329573U,  // SQDMLSLT_ZZZI_D
5629
500k
    2686539621U,  // SQDMLSLT_ZZZI_S
5630
500k
    1344329573U,  // SQDMLSLT_ZZZ_D
5631
500k
    2281772901U,  // SQDMLSLT_ZZZ_H
5632
500k
    2686539621U,  // SQDMLSLT_ZZZ_S
5633
500k
    270749878U, // SQDMLSLi16
5634
500k
    270749878U, // SQDMLSLi32
5635
500k
    270749878U, // SQDMLSLv1i32_indexed
5636
500k
    270749878U, // SQDMLSLv1i64_indexed
5637
500k
    2963411126U,  // SQDMLSLv2i32_indexed
5638
500k
    2963411126U,  // SQDMLSLv2i32_v2i64
5639
500k
    2967605430U,  // SQDMLSLv4i16_indexed
5640
500k
    2967605430U,  // SQDMLSLv4i16_v4i32
5641
500k
    2963407160U,  // SQDMLSLv4i32_indexed
5642
500k
    2963407160U,  // SQDMLSLv4i32_v2i64
5643
500k
    2967601464U,  // SQDMLSLv8i16_indexed
5644
500k
    2967601464U,  // SQDMLSLv8i16_v4i32
5645
500k
    2418068777U,  // SQDMULH_ZZZI_D
5646
500k
    2179009833U,  // SQDMULH_ZZZI_H
5647
500k
    4028714281U,  // SQDMULH_ZZZI_S
5648
500k
    3760229673U,  // SQDMULH_ZZZ_B
5649
500k
    2418068777U,  // SQDMULH_ZZZ_D
5650
500k
    2179009833U,  // SQDMULH_ZZZ_H
5651
500k
    4028714281U,  // SQDMULH_ZZZ_S
5652
500k
    807423273U, // SQDMULHv1i16
5653
500k
    807423273U, // SQDMULHv1i16_indexed
5654
500k
    807423273U, // SQDMULHv1i32
5655
500k
    807423273U, // SQDMULHv1i32_indexed
5656
500k
    545361193U, // SQDMULHv2i32
5657
500k
    545361193U, // SQDMULHv2i32_indexed
5658
500k
    549555497U, // SQDMULHv4i16
5659
500k
    549555497U, // SQDMULHv4i16_indexed
5660
500k
    551652649U, // SQDMULHv4i32
5661
500k
    551652649U, // SQDMULHv4i32_indexed
5662
500k
    553749801U, // SQDMULHv8i16
5663
500k
    553749801U, // SQDMULHv8i16_indexed
5664
500k
    4028679677U,  // SQDMULLB_ZZZI_D
5665
500k
    1881228797U,  // SQDMULLB_ZZZI_S
5666
500k
    4028679677U,  // SQDMULLB_ZZZ_D
5667
500k
    2273379837U,  // SQDMULLB_ZZZ_H
5668
500k
    1881228797U,  // SQDMULLB_ZZZ_S
5669
500k
    4028684085U,  // SQDMULLT_ZZZI_D
5670
500k
    1881233205U,  // SQDMULLT_ZZZI_S
5671
500k
    4028684085U,  // SQDMULLT_ZZZ_D
5672
500k
    2273384245U,  // SQDMULLT_ZZZ_H
5673
500k
    1881233205U,  // SQDMULLT_ZZZ_S
5674
500k
    807424086U, // SQDMULLi16
5675
500k
    807424086U, // SQDMULLi32
5676
500k
    807424086U, // SQDMULLv1i32_indexed
5677
500k
    807424086U, // SQDMULLv1i64_indexed
5678
500k
    547459158U, // SQDMULLv2i32_indexed
5679
500k
    547459158U, // SQDMULLv2i32_v2i64
5680
500k
    551653462U, // SQDMULLv4i16_indexed
5681
500k
    551653462U, // SQDMULLv4i16_v4i32
5682
500k
    547455254U, // SQDMULLv4i32_indexed
5683
500k
    547455254U, // SQDMULLv4i32_v2i64
5684
500k
    551649558U, // SQDMULLv8i16_indexed
5685
500k
    551649558U, // SQDMULLv8i16_v4i32
5686
500k
    2686469320U,  // SQINCB_XPiI
5687
500k
    807421128U, // SQINCB_XPiWdI
5688
500k
    2686470571U,  // SQINCD_XPiI
5689
500k
    807422379U, // SQINCD_XPiWdI
5690
500k
    2686503339U,  // SQINCD_ZPiI
5691
500k
    2686471257U,  // SQINCH_XPiI
5692
500k
    807423065U, // SQINCH_XPiWdI
5693
500k
    39914585U,  // SQINCH_ZPiI
5694
500k
    3760214652U,  // SQINCP_XPWd_B
5695
500k
    2418037372U,  // SQINCP_XPWd_D
5696
500k
    1881166460U,  // SQINCP_XPWd_H
5697
500k
    4028650108U,  // SQINCP_XPWd_S
5698
500k
    3760214652U,  // SQINCP_XP_B
5699
500k
    2418037372U,  // SQINCP_XP_D
5700
500k
    1881166460U,  // SQINCP_XP_H
5701
500k
    4028650108U,  // SQINCP_XP_S
5702
500k
    1075892860U,  // SQINCP_ZP_D
5703
500k
    1648431740U,  // SQINCP_ZP_H
5704
500k
    1344361084U,  // SQINCP_ZP_S
5705
500k
    2686474731U,  // SQINCW_XPiI
5706
500k
    807426539U, // SQINCW_XPiWdI
5707
500k
    2686540267U,  // SQINCW_ZPiI
5708
500k
    2132793U, // SQNEG_ZPmZ_B
5709
500k
    2149177U, // SQNEG_ZPmZ_D
5710
500k
    272698169U, // SQNEG_ZPmZ_H
5711
500k
    2181945U, // SQNEG_ZPmZ_S
5712
500k
    543263545U, // SQNEGv16i8
5713
500k
    807422777U, // SQNEGv1i16
5714
500k
    807422777U, // SQNEGv1i32
5715
500k
    807422777U, // SQNEGv1i64
5716
500k
    807422777U, // SQNEGv1i8
5717
500k
    545360697U, // SQNEGv2i32
5718
500k
    547457849U, // SQNEGv2i64
5719
500k
    549555001U, // SQNEGv4i16
5720
500k
    551652153U, // SQNEGv4i32
5721
500k
    553749305U, // SQNEGv8i16
5722
500k
    555846457U, // SQNEGv8i8
5723
500k
    2185300954U,  // SQRDCMLAH_ZZZI_H
5724
500k
    1344359386U,  // SQRDCMLAH_ZZZI_S
5725
500k
    1344310234U,  // SQRDCMLAH_ZZZ_B
5726
500k
    1075891162U,  // SQRDCMLAH_ZZZ_D
5727
500k
    2185300954U,  // SQRDCMLAH_ZZZ_H
5728
500k
    1344359386U,  // SQRDCMLAH_ZZZ_S
5729
500k
    1075891173U,  // SQRDMLAH_ZZZI_D
5730
500k
    2185300965U,  // SQRDMLAH_ZZZI_H
5731
500k
    1344359397U,  // SQRDMLAH_ZZZI_S
5732
500k
    1344310245U,  // SQRDMLAH_ZZZ_B
5733
500k
    1075891173U,  // SQRDMLAH_ZZZ_D
5734
500k
    2185300965U,  // SQRDMLAH_ZZZ_H
5735
500k
    1344359397U,  // SQRDMLAH_ZZZ_S
5736
500k
    270748645U, // SQRDMLAHi16_indexed
5737
500k
    270748645U, // SQRDMLAHi32_indexed
5738
500k
    270748645U, // SQRDMLAHv1i16
5739
500k
    270748645U, // SQRDMLAHv1i32
5740
500k
    2961312741U,  // SQRDMLAHv2i32
5741
500k
    2961312741U,  // SQRDMLAHv2i32_indexed
5742
500k
    2965507045U,  // SQRDMLAHv4i16
5743
500k
    2965507045U,  // SQRDMLAHv4i16_indexed
5744
500k
    2967604197U,  // SQRDMLAHv4i32
5745
500k
    2967604197U,  // SQRDMLAHv4i32_indexed
5746
500k
    2969701349U,  // SQRDMLAHv8i16
5747
500k
    2969701349U,  // SQRDMLAHv8i16_indexed
5748
500k
    1075891778U,  // SQRDMLSH_ZZZI_D
5749
500k
    2185301570U,  // SQRDMLSH_ZZZI_H
5750
500k
    1344360002U,  // SQRDMLSH_ZZZI_S
5751
500k
    1344310850U,  // SQRDMLSH_ZZZ_B
5752
500k
    1075891778U,  // SQRDMLSH_ZZZ_D
5753
500k
    2185301570U,  // SQRDMLSH_ZZZ_H
5754
500k
    1344360002U,  // SQRDMLSH_ZZZ_S
5755
500k
    270749250U, // SQRDMLSHi16_indexed
5756
500k
    270749250U, // SQRDMLSHi32_indexed
5757
500k
    270749250U, // SQRDMLSHv1i16
5758
500k
    270749250U, // SQRDMLSHv1i32
5759
500k
    2961313346U,  // SQRDMLSHv2i32
5760
500k
    2961313346U,  // SQRDMLSHv2i32_indexed
5761
500k
    2965507650U,  // SQRDMLSHv4i16
5762
500k
    2965507650U,  // SQRDMLSHv4i16_indexed
5763
500k
    2967604802U,  // SQRDMLSHv4i32
5764
500k
    2967604802U,  // SQRDMLSHv4i32_indexed
5765
500k
    2969701954U,  // SQRDMLSHv8i16
5766
500k
    2969701954U,  // SQRDMLSHv8i16_indexed
5767
500k
    2418068786U,  // SQRDMULH_ZZZI_D
5768
500k
    2179009842U,  // SQRDMULH_ZZZI_H
5769
500k
    4028714290U,  // SQRDMULH_ZZZI_S
5770
500k
    3760229682U,  // SQRDMULH_ZZZ_B
5771
500k
    2418068786U,  // SQRDMULH_ZZZ_D
5772
500k
    2179009842U,  // SQRDMULH_ZZZ_H
5773
500k
    4028714290U,  // SQRDMULH_ZZZ_S
5774
500k
    807423282U, // SQRDMULHv1i16
5775
500k
    807423282U, // SQRDMULHv1i16_indexed
5776
500k
    807423282U, // SQRDMULHv1i32
5777
500k
    807423282U, // SQRDMULHv1i32_indexed
5778
500k
    545361202U, // SQRDMULHv2i32
5779
500k
    545361202U, // SQRDMULHv2i32_indexed
5780
500k
    549555506U, // SQRDMULHv4i16
5781
500k
    549555506U, // SQRDMULHv4i16_indexed
5782
500k
    551652658U, // SQRDMULHv4i32
5783
500k
    551652658U, // SQRDMULHv4i32_indexed
5784
500k
    553749810U, // SQRDMULHv8i16
5785
500k
    553749810U, // SQRDMULHv8i16_indexed
5786
500k
    3223360553U,  // SQRSHLR_ZPmZ_B
5787
500k
    3223376937U,  // SQRSHLR_ZPmZ_D
5788
500k
    3519091753U,  // SQRSHLR_ZPmZ_H
5789
500k
    3223409705U,  // SQRSHLR_ZPmZ_S
5790
500k
    3223359518U,  // SQRSHL_ZPmZ_B
5791
500k
    3223375902U,  // SQRSHL_ZPmZ_D
5792
500k
    3519090718U,  // SQRSHL_ZPmZ_H
5793
500k
    3223408670U,  // SQRSHL_ZPmZ_S
5794
500k
    543264798U, // SQRSHLv16i8
5795
500k
    807424030U, // SQRSHLv1i16
5796
500k
    807424030U, // SQRSHLv1i32
5797
500k
    807424030U, // SQRSHLv1i64
5798
500k
    807424030U, // SQRSHLv1i8
5799
500k
    545361950U, // SQRSHLv2i32
5800
500k
    547459102U, // SQRSHLv2i64
5801
500k
    549556254U, // SQRSHLv4i16
5802
500k
    551653406U, // SQRSHLv4i32
5803
500k
    553750558U, // SQRSHLv8i16
5804
500k
    555847710U, // SQRSHLv8i8
5805
500k
    1881179853U,  // SQRSHRNB_ZZI_B
5806
500k
    2172716749U,  // SQRSHRNB_ZZI_H
5807
500k
    2418099917U,  // SQRSHRNB_ZZI_S
5808
500k
    2686490562U,  // SQRSHRNT_ZZI_B
5809
500k
    2174818242U,  // SQRSHRNT_ZZI_H
5810
500k
    1075926978U,  // SQRSHRNT_ZZI_S
5811
500k
    807424457U, // SQRSHRNb
5812
500k
    807424457U, // SQRSHRNh
5813
500k
    807424457U, // SQRSHRNs
5814
500k
    2959212934U,  // SQRSHRNv16i8_shift
5815
500k
    545362377U, // SQRSHRNv2i32_shift
5816
500k
    549556681U, // SQRSHRNv4i16_shift
5817
500k
    2967601542U,  // SQRSHRNv4i32_shift
5818
500k
    2969698694U,  // SQRSHRNv8i16_shift
5819
500k
    555848137U, // SQRSHRNv8i8_shift
5820
500k
    1881179899U,  // SQRSHRUNB_ZZI_B
5821
500k
    2172716795U,  // SQRSHRUNB_ZZI_H
5822
500k
    2418099963U,  // SQRSHRUNB_ZZI_S
5823
500k
    2686490617U,  // SQRSHRUNT_ZZI_B
5824
500k
    2174818297U,  // SQRSHRUNT_ZZI_H
5825
500k
    1075927033U,  // SQRSHRUNT_ZZI_S
5826
500k
    807424519U, // SQRSHRUNb
5827
500k
    807424519U, // SQRSHRUNh
5828
500k
    807424519U, // SQRSHRUNs
5829
500k
    2959212995U,  // SQRSHRUNv16i8_shift
5830
500k
    545362439U, // SQRSHRUNv2i32_shift
5831
500k
    549556743U, // SQRSHRUNv4i16_shift
5832
500k
    2967601603U,  // SQRSHRUNv4i32_shift
5833
500k
    2969698755U,  // SQRSHRUNv8i16_shift
5834
500k
    555848199U, // SQRSHRUNv8i8_shift
5835
500k
    3223360537U,  // SQSHLR_ZPmZ_B
5836
500k
    3223376921U,  // SQSHLR_ZPmZ_D
5837
500k
    3519091737U,  // SQSHLR_ZPmZ_H
5838
500k
    3223409689U,  // SQSHLR_ZPmZ_S
5839
500k
    3223361695U,  // SQSHLU_ZPmI_B
5840
500k
    3223378079U,  // SQSHLU_ZPmI_D
5841
500k
    3519092895U,  // SQSHLU_ZPmI_H
5842
500k
    3223410847U,  // SQSHLU_ZPmI_S
5843
500k
    807426207U, // SQSHLUb
5844
500k
    807426207U, // SQSHLUd
5845
500k
    807426207U, // SQSHLUh
5846
500k
    807426207U, // SQSHLUs
5847
500k
    543266975U, // SQSHLUv16i8_shift
5848
500k
    545364127U, // SQSHLUv2i32_shift
5849
500k
    547461279U, // SQSHLUv2i64_shift
5850
500k
    549558431U, // SQSHLUv4i16_shift
5851
500k
    551655583U, // SQSHLUv4i32_shift
5852
500k
    553752735U, // SQSHLUv8i16_shift
5853
500k
    555849887U, // SQSHLUv8i8_shift
5854
500k
    3223359504U,  // SQSHL_ZPmI_B
5855
500k
    3223375888U,  // SQSHL_ZPmI_D
5856
500k
    3519090704U,  // SQSHL_ZPmI_H
5857
500k
    3223408656U,  // SQSHL_ZPmI_S
5858
500k
    3223359504U,  // SQSHL_ZPmZ_B
5859
500k
    3223375888U,  // SQSHL_ZPmZ_D
5860
500k
    3519090704U,  // SQSHL_ZPmZ_H
5861
500k
    3223408656U,  // SQSHL_ZPmZ_S
5862
500k
    807424016U, // SQSHLb
5863
500k
    807424016U, // SQSHLd
5864
500k
    807424016U, // SQSHLh
5865
500k
    807424016U, // SQSHLs
5866
500k
    543264784U, // SQSHLv16i8
5867
500k
    543264784U, // SQSHLv16i8_shift
5868
500k
    807424016U, // SQSHLv1i16
5869
500k
    807424016U, // SQSHLv1i32
5870
500k
    807424016U, // SQSHLv1i64
5871
500k
    807424016U, // SQSHLv1i8
5872
500k
    545361936U, // SQSHLv2i32
5873
500k
    545361936U, // SQSHLv2i32_shift
5874
500k
    547459088U, // SQSHLv2i64
5875
500k
    547459088U, // SQSHLv2i64_shift
5876
500k
    549556240U, // SQSHLv4i16
5877
500k
    549556240U, // SQSHLv4i16_shift
5878
500k
    551653392U, // SQSHLv4i32
5879
500k
    551653392U, // SQSHLv4i32_shift
5880
500k
    553750544U, // SQSHLv8i16
5881
500k
    553750544U, // SQSHLv8i16_shift
5882
500k
    555847696U, // SQSHLv8i8
5883
500k
    555847696U, // SQSHLv8i8_shift
5884
500k
    1881179835U,  // SQSHRNB_ZZI_B
5885
500k
    2172716731U,  // SQSHRNB_ZZI_H
5886
500k
    2418099899U,  // SQSHRNB_ZZI_S
5887
500k
    2686490544U,  // SQSHRNT_ZZI_B
5888
500k
    2174818224U,  // SQSHRNT_ZZI_H
5889
500k
    1075926960U,  // SQSHRNT_ZZI_S
5890
500k
    807424441U, // SQSHRNb
5891
500k
    807424441U, // SQSHRNh
5892
500k
    807424441U, // SQSHRNs
5893
500k
    2959212916U,  // SQSHRNv16i8_shift
5894
500k
    545362361U, // SQSHRNv2i32_shift
5895
500k
    549556665U, // SQSHRNv4i16_shift
5896
500k
    2967601524U,  // SQSHRNv4i32_shift
5897
500k
    2969698676U,  // SQSHRNv8i16_shift
5898
500k
    555848121U, // SQSHRNv8i8_shift
5899
500k
    1881179889U,  // SQSHRUNB_ZZI_B
5900
500k
    2172716785U,  // SQSHRUNB_ZZI_H
5901
500k
    2418099953U,  // SQSHRUNB_ZZI_S
5902
500k
    2686490607U,  // SQSHRUNT_ZZI_B
5903
500k
    2174818287U,  // SQSHRUNT_ZZI_H
5904
500k
    1075927023U,  // SQSHRUNT_ZZI_S
5905
500k
    807424510U, // SQSHRUNb
5906
500k
    807424510U, // SQSHRUNh
5907
500k
    807424510U, // SQSHRUNs
5908
500k
    2959212985U,  // SQSHRUNv16i8_shift
5909
500k
    545362430U, // SQSHRUNv2i32_shift
5910
500k
    549556734U, // SQSHRUNv4i16_shift
5911
500k
    2967601593U,  // SQSHRUNv4i32_shift
5912
500k
    2969698745U,  // SQSHRUNv8i16_shift
5913
500k
    555848190U, // SQSHRUNv8i8_shift
5914
500k
    3223360459U,  // SQSUBR_ZPmZ_B
5915
500k
    3223376843U,  // SQSUBR_ZPmZ_D
5916
500k
    3519091659U,  // SQSUBR_ZPmZ_H
5917
500k
    3223409611U,  // SQSUBR_ZPmZ_S
5918
500k
    3760228482U,  // SQSUB_ZI_B
5919
500k
    2418067586U,  // SQSUB_ZI_D
5920
500k
    2179008642U,  // SQSUB_ZI_H
5921
500k
    4028713090U,  // SQSUB_ZI_S
5922
500k
    3223357570U,  // SQSUB_ZPmZ_B
5923
500k
    3223373954U,  // SQSUB_ZPmZ_D
5924
500k
    3519088770U,  // SQSUB_ZPmZ_H
5925
500k
    3223406722U,  // SQSUB_ZPmZ_S
5926
500k
    3760228482U,  // SQSUB_ZZZ_B
5927
500k
    2418067586U,  // SQSUB_ZZZ_D
5928
500k
    2179008642U,  // SQSUB_ZZZ_H
5929
500k
    4028713090U,  // SQSUB_ZZZ_S
5930
500k
    543262850U, // SQSUBv16i8
5931
500k
    807422082U, // SQSUBv1i16
5932
500k
    807422082U, // SQSUBv1i32
5933
500k
    807422082U, // SQSUBv1i64
5934
500k
    807422082U, // SQSUBv1i8
5935
500k
    545360002U, // SQSUBv2i32
5936
500k
    547457154U, // SQSUBv2i64
5937
500k
    549554306U, // SQSUBv4i16
5938
500k
    551651458U, // SQSUBv4i32
5939
500k
    553748610U, // SQSUBv8i16
5940
500k
    555845762U, // SQSUBv8i8
5941
500k
    1881179873U,  // SQXTNB_ZZ_B
5942
500k
    1635845857U,  // SQXTNB_ZZ_H
5943
500k
    2418099937U,  // SQXTNB_ZZ_S
5944
500k
    2686490591U,  // SQXTNT_ZZ_B
5945
500k
    1637947359U,  // SQXTNT_ZZ_H
5946
500k
    1075927007U,  // SQXTNT_ZZ_S
5947
500k
    2959212969U,  // SQXTNv16i8
5948
500k
    807424496U, // SQXTNv1i16
5949
500k
    807424496U, // SQXTNv1i32
5950
500k
    807424496U, // SQXTNv1i8
5951
500k
    545362416U, // SQXTNv2i32
5952
500k
    549556720U, // SQXTNv4i16
5953
500k
    2967601577U,  // SQXTNv4i32
5954
500k
    2969698729U,  // SQXTNv8i16
5955
500k
    555848176U, // SQXTNv8i8
5956
500k
    1881179910U,  // SQXTUNB_ZZ_B
5957
500k
    1635845894U,  // SQXTUNB_ZZ_H
5958
500k
    2418099974U,  // SQXTUNB_ZZ_S
5959
500k
    2686490628U,  // SQXTUNT_ZZ_B
5960
500k
    1637947396U,  // SQXTUNT_ZZ_H
5961
500k
    1075927044U,  // SQXTUNT_ZZ_S
5962
500k
    2959213006U,  // SQXTUNv16i8
5963
500k
    807424529U, // SQXTUNv1i16
5964
500k
    807424529U, // SQXTUNv1i32
5965
500k
    807424529U, // SQXTUNv1i8
5966
500k
    545362449U, // SQXTUNv2i32
5967
500k
    549556753U, // SQXTUNv4i16
5968
500k
    2967601614U,  // SQXTUNv4i32
5969
500k
    2969698766U,  // SQXTUNv8i16
5970
500k
    555848209U, // SQXTUNv8i8
5971
500k
    3223357911U,  // SRHADD_ZPmZ_B
5972
500k
    3223374295U,  // SRHADD_ZPmZ_D
5973
500k
    3519089111U,  // SRHADD_ZPmZ_H
5974
500k
    3223407063U,  // SRHADD_ZPmZ_S
5975
500k
    543263191U, // SRHADDv16i8
5976
500k
    545360343U, // SRHADDv2i32
5977
500k
    549554647U, // SRHADDv4i16
5978
500k
    551651799U, // SRHADDv4i32
5979
500k
    553748951U, // SRHADDv8i16
5980
500k
    555846103U, // SRHADDv8i8
5981
500k
    1344311023U,  // SRI_ZZI_B
5982
500k
    1075891951U,  // SRI_ZZI_D
5983
500k
    2185301743U,  // SRI_ZZI_H
5984
500k
    1344360175U,  // SRI_ZZI_S
5985
500k
    270749423U, // SRId
5986
500k
    2959216367U,  // SRIv16i8_shift
5987
500k
    2961313519U,  // SRIv2i32_shift
5988
500k
    2963410671U,  // SRIv2i64_shift
5989
500k
    2965507823U,  // SRIv4i16_shift
5990
500k
    2967604975U,  // SRIv4i32_shift
5991
500k
    2969702127U,  // SRIv8i16_shift
5992
500k
    2971799279U,  // SRIv8i8_shift
5993
500k
    3223360571U,  // SRSHLR_ZPmZ_B
5994
500k
    3223376955U,  // SRSHLR_ZPmZ_D
5995
500k
    3519091771U,  // SRSHLR_ZPmZ_H
5996
500k
    3223409723U,  // SRSHLR_ZPmZ_S
5997
500k
    3223359534U,  // SRSHL_ZPmZ_B
5998
500k
    3223375918U,  // SRSHL_ZPmZ_D
5999
500k
    3519090734U,  // SRSHL_ZPmZ_H
6000
500k
    3223408686U,  // SRSHL_ZPmZ_S
6001
500k
    543264814U, // SRSHLv16i8
6002
500k
    807424046U, // SRSHLv1i64
6003
500k
    545361966U, // SRSHLv2i32
6004
500k
    547459118U, // SRSHLv2i64
6005
500k
    549556270U, // SRSHLv4i16
6006
500k
    551653422U, // SRSHLv4i32
6007
500k
    553750574U, // SRSHLv8i16
6008
500k
    555847726U, // SRSHLv8i8
6009
500k
    3223360499U,  // SRSHR_ZPmI_B
6010
500k
    3223376883U,  // SRSHR_ZPmI_D
6011
500k
    3519091699U,  // SRSHR_ZPmI_H
6012
500k
    3223409651U,  // SRSHR_ZPmI_S
6013
500k
    807425011U, // SRSHRd
6014
500k
    543265779U, // SRSHRv16i8_shift
6015
500k
    545362931U, // SRSHRv2i32_shift
6016
500k
    547460083U, // SRSHRv2i64_shift
6017
500k
    549557235U, // SRSHRv4i16_shift
6018
500k
    551654387U, // SRSHRv4i32_shift
6019
500k
    553751539U, // SRSHRv8i16_shift
6020
500k
    555848691U, // SRSHRv8i8_shift
6021
500k
    1344308050U,  // SRSRA_ZZI_B
6022
500k
    1075888978U,  // SRSRA_ZZI_D
6023
500k
    2185298770U,  // SRSRA_ZZI_H
6024
500k
    1344357202U,  // SRSRA_ZZI_S
6025
500k
    270746450U, // SRSRAd
6026
500k
    2959213394U,  // SRSRAv16i8_shift
6027
500k
    2961310546U,  // SRSRAv2i32_shift
6028
500k
    2963407698U,  // SRSRAv2i64_shift
6029
500k
    2965504850U,  // SRSRAv4i16_shift
6030
500k
    2967602002U,  // SRSRAv4i32_shift
6031
500k
    2969699154U,  // SRSRAv8i16_shift
6032
500k
    2971796306U,  // SRSRAv8i8_shift
6033
500k
    4028679661U,  // SSHLLB_ZZI_D
6034
500k
    2273379821U,  // SSHLLB_ZZI_H
6035
500k
    1881228781U,  // SSHLLB_ZZI_S
6036
500k
    4028684069U,  // SSHLLT_ZZI_D
6037
500k
    2273384229U,  // SSHLLT_ZZI_H
6038
500k
    1881233189U,  // SSHLLT_ZZI_S
6039
500k
    553746694U, // SSHLLv16i8_shift
6040
500k
    547459144U, // SSHLLv2i32_shift
6041
500k
    551653448U, // SSHLLv4i16_shift
6042
500k
    547455238U, // SSHLLv4i32_shift
6043
500k
    551649542U, // SSHLLv8i16_shift
6044
500k
    553750600U, // SSHLLv8i8_shift
6045
500k
    543264828U, // SSHLv16i8
6046
500k
    807424060U, // SSHLv1i64
6047
500k
    545361980U, // SSHLv2i32
6048
500k
    547459132U, // SSHLv2i64
6049
500k
    549556284U, // SSHLv4i16
6050
500k
    551653436U, // SSHLv4i32
6051
500k
    553750588U, // SSHLv8i16
6052
500k
    555847740U, // SSHLv8i8
6053
500k
    807425025U, // SSHRd
6054
500k
    543265793U, // SSHRv16i8_shift
6055
500k
    545362945U, // SSHRv2i32_shift
6056
500k
    547460097U, // SSHRv2i64_shift
6057
500k
    549557249U, // SSHRv4i16_shift
6058
500k
    551654401U, // SSHRv4i32_shift
6059
500k
    553751553U, // SSHRv8i16_shift
6060
500k
    555848705U, // SSHRv8i8_shift
6061
500k
    1344308064U,  // SSRA_ZZI_B
6062
500k
    1075888992U,  // SSRA_ZZI_D
6063
500k
    2185298784U,  // SSRA_ZZI_H
6064
500k
    1344357216U,  // SSRA_ZZI_S
6065
500k
    270746464U, // SSRAd
6066
500k
    2959213408U,  // SSRAv16i8_shift
6067
500k
    2961310560U,  // SSRAv2i32_shift
6068
500k
    2963407712U,  // SSRAv2i64_shift
6069
500k
    2965504864U,  // SSRAv4i16_shift
6070
500k
    2967602016U,  // SSRAv4i32_shift
6071
500k
    2969699168U,  // SSRAv8i16_shift
6072
500k
    2971796320U,  // SSRAv8i8_shift
6073
500k
    1107674095U,  // SST1B_D_IMM
6074
500k
    302367727U, // SST1B_D_REAL
6075
500k
    302367727U, // SST1B_D_SXTW
6076
500k
    302367727U, // SST1B_D_UXTW
6077
500k
    1376125935U,  // SST1B_S_IMM
6078
500k
    302384111U, // SST1B_S_SXTW
6079
500k
    302384111U, // SST1B_S_UXTW
6080
500k
    1107675460U,  // SST1D_IMM
6081
500k
    302369092U, // SST1D_REAL
6082
500k
    302369092U, // SST1D_SCALED_SCALED_REAL
6083
500k
    302369092U, // SST1D_SXTW
6084
500k
    302369092U, // SST1D_SXTW_SCALED
6085
500k
    302369092U, // SST1D_UXTW
6086
500k
    302369092U, // SST1D_UXTW_SCALED
6087
500k
    1107676045U,  // SST1H_D_IMM
6088
500k
    302369677U, // SST1H_D_REAL
6089
500k
    302369677U, // SST1H_D_SCALED_SCALED_REAL
6090
500k
    302369677U, // SST1H_D_SXTW
6091
500k
    302369677U, // SST1H_D_SXTW_SCALED
6092
500k
    302369677U, // SST1H_D_UXTW
6093
500k
    302369677U, // SST1H_D_UXTW_SCALED
6094
500k
    1376127885U,  // SST1H_S_IMM
6095
500k
    302386061U, // SST1H_S_SXTW
6096
500k
    302386061U, // SST1H_S_SXTW_SCALED
6097
500k
    302386061U, // SST1H_S_UXTW
6098
500k
    302386061U, // SST1H_S_UXTW_SCALED
6099
500k
    1107679634U,  // SST1W_D_IMM
6100
500k
    302373266U, // SST1W_D_REAL
6101
500k
    302373266U, // SST1W_D_SCALED_SCALED_REAL
6102
500k
    302373266U, // SST1W_D_SXTW
6103
500k
    302373266U, // SST1W_D_SXTW_SCALED
6104
500k
    302373266U, // SST1W_D_UXTW
6105
500k
    302373266U, // SST1W_D_UXTW_SCALED
6106
500k
    1376131474U,  // SST1W_IMM
6107
500k
    302389650U, // SST1W_SXTW
6108
500k
    302389650U, // SST1W_SXTW_SCALED
6109
500k
    302389650U, // SST1W_UXTW
6110
500k
    302389650U, // SST1W_UXTW_SCALED
6111
500k
    4028683837U,  // SSUBLBT_ZZZ_D
6112
500k
    2273383997U,  // SSUBLBT_ZZZ_H
6113
500k
    1881232957U,  // SSUBLBT_ZZZ_S
6114
500k
    4028679590U,  // SSUBLB_ZZZ_D
6115
500k
    2273379750U,  // SSUBLB_ZZZ_H
6116
500k
    1881228710U,  // SSUBLB_ZZZ_S
6117
500k
    4028680245U,  // SSUBLTB_ZZZ_D
6118
500k
    2273380405U,  // SSUBLTB_ZZZ_H
6119
500k
    1881229365U,  // SSUBLTB_ZZZ_S
6120
500k
    4028683993U,  // SSUBLT_ZZZ_D
6121
500k
    2273384153U,  // SSUBLT_ZZZ_H
6122
500k
    1881233113U,  // SSUBLT_ZZZ_S
6123
500k
    553746646U, // SSUBLv16i8_v8i16
6124
500k
    547458992U, // SSUBLv2i32_v2i64
6125
500k
    551653296U, // SSUBLv4i16_v4i32
6126
500k
    547455190U, // SSUBLv4i32_v2i64
6127
500k
    551649494U, // SSUBLv8i16_v4i32
6128
500k
    553750448U, // SSUBLv8i8_v8i16
6129
500k
    2418067606U,  // SSUBWB_ZZZ_D
6130
500k
    2179008662U,  // SSUBWB_ZZZ_H
6131
500k
    4028713110U,  // SSUBWB_ZZZ_S
6132
500k
    2418071658U,  // SSUBWT_ZZZ_D
6133
500k
    2179012714U,  // SSUBWT_ZZZ_H
6134
500k
    4028717162U,  // SSUBWT_ZZZ_S
6135
500k
    553746936U, // SSUBWv16i8_v8i16
6136
500k
    547461572U, // SSUBWv2i32_v2i64
6137
500k
    551655876U, // SSUBWv4i16_v4i32
6138
500k
    547455480U, // SSUBWv4i32_v2i64
6139
500k
    551649784U, // SSUBWv8i16_v4i32
6140
500k
    553753028U, // SSUBWv8i8_v8i16
6141
500k
    302449647U, // ST1B
6142
500k
    302367727U, // ST1B_D
6143
500k
    302367727U, // ST1B_D_IMM
6144
500k
    302466031U, // ST1B_H
6145
500k
    302466031U, // ST1B_H_IMM
6146
500k
    302449647U, // ST1B_IMM
6147
500k
    302384111U, // ST1B_S
6148
500k
    302384111U, // ST1B_S_IMM
6149
500k
    302369092U, // ST1D
6150
500k
    302369092U, // ST1D_IMM
6151
500k
    491599U,  // ST1Fourv16b
6152
500k
    76005455U,  // ST1Fourv16b_POST
6153
500k
    524367U,  // ST1Fourv1d
6154
500k
    78135375U,  // ST1Fourv1d_POST
6155
500k
    557135U,  // ST1Fourv2d
6156
500k
    76070991U,  // ST1Fourv2d_POST
6157
500k
    589903U,  // ST1Fourv2s
6158
500k
    78200911U,  // ST1Fourv2s_POST
6159
500k
    622671U,  // ST1Fourv4h
6160
500k
    78233679U,  // ST1Fourv4h_POST
6161
500k
    655439U,  // ST1Fourv4s
6162
500k
    76169295U,  // ST1Fourv4s_POST
6163
500k
    688207U,  // ST1Fourv8b
6164
500k
    78299215U,  // ST1Fourv8b_POST
6165
500k
    720975U,  // ST1Fourv8h
6166
500k
    76234831U,  // ST1Fourv8h_POST
6167
500k
    302467981U, // ST1H
6168
500k
    302369677U, // ST1H_D
6169
500k
    302369677U, // ST1H_D_IMM
6170
500k
    302467981U, // ST1H_IMM
6171
500k
    302386061U, // ST1H_S
6172
500k
    302386061U, // ST1H_S_IMM
6173
500k
    491599U,  // ST1Onev16b
6174
500k
    80199759U,  // ST1Onev16b_POST
6175
500k
    524367U,  // ST1Onev1d
6176
500k
    82329679U,  // ST1Onev1d_POST
6177
500k
    557135U,  // ST1Onev2d
6178
500k
    80265295U,  // ST1Onev2d_POST
6179
500k
    589903U,  // ST1Onev2s
6180
500k
    82395215U,  // ST1Onev2s_POST
6181
500k
    622671U,  // ST1Onev4h
6182
500k
    82427983U,  // ST1Onev4h_POST
6183
500k
    655439U,  // ST1Onev4s
6184
500k
    80363599U,  // ST1Onev4s_POST
6185
500k
    688207U,  // ST1Onev8b
6186
500k
    82493519U,  // ST1Onev8b_POST
6187
500k
    720975U,  // ST1Onev8h
6188
500k
    80429135U,  // ST1Onev8h_POST
6189
500k
    491599U,  // ST1Threev16b
6190
500k
    90685519U,  // ST1Threev16b_POST
6191
500k
    524367U,  // ST1Threev1d
6192
500k
    92815439U,  // ST1Threev1d_POST
6193
500k
    557135U,  // ST1Threev2d
6194
500k
    90751055U,  // ST1Threev2d_POST
6195
500k
    589903U,  // ST1Threev2s
6196
500k
    92880975U,  // ST1Threev2s_POST
6197
500k
    622671U,  // ST1Threev4h
6198
500k
    92913743U,  // ST1Threev4h_POST
6199
500k
    655439U,  // ST1Threev4s
6200
500k
    90849359U,  // ST1Threev4s_POST
6201
500k
    688207U,  // ST1Threev8b
6202
500k
    92979279U,  // ST1Threev8b_POST
6203
500k
    720975U,  // ST1Threev8h
6204
500k
    90914895U,  // ST1Threev8h_POST
6205
500k
    491599U,  // ST1Twov16b
6206
500k
    78102607U,  // ST1Twov16b_POST
6207
500k
    524367U,  // ST1Twov1d
6208
500k
    80232527U,  // ST1Twov1d_POST
6209
500k
    557135U,  // ST1Twov2d
6210
500k
    78168143U,  // ST1Twov2d_POST
6211
500k
    589903U,  // ST1Twov2s
6212
500k
    80298063U,  // ST1Twov2s_POST
6213
500k
    622671U,  // ST1Twov4h
6214
500k
    80330831U,  // ST1Twov4h_POST
6215
500k
    655439U,  // ST1Twov4s
6216
500k
    78266447U,  // ST1Twov4s_POST
6217
500k
    688207U,  // ST1Twov8b
6218
500k
    80396367U,  // ST1Twov8b_POST
6219
500k
    720975U,  // ST1Twov8h
6220
500k
    78331983U,  // ST1Twov8h_POST
6221
500k
    302389650U, // ST1W
6222
500k
    302373266U, // ST1W_D
6223
500k
    302373266U, // ST1W_D_IMM
6224
500k
    302389650U, // ST1W_IMM
6225
500k
    1168548339U,  // ST1_MXIPXX_H_B
6226
500k
    1168548353U,  // ST1_MXIPXX_H_D
6227
500k
    1168548367U,  // ST1_MXIPXX_H_H
6228
500k
    1168548381U,  // ST1_MXIPXX_H_Q
6229
500k
    1168548395U,  // ST1_MXIPXX_H_S
6230
500k
    1168564723U,  // ST1_MXIPXX_V_B
6231
500k
    1168564737U,  // ST1_MXIPXX_V_D
6232
500k
    1168564751U,  // ST1_MXIPXX_V_H
6233
500k
    1168564765U,  // ST1_MXIPXX_V_Q
6234
500k
    1168564779U,  // ST1_MXIPXX_V_S
6235
500k
    1032271U, // ST1i16
6236
500k
    1407942735U,  // ST1i16_POST
6237
500k
    1048655U, // ST1i32
6238
500k
    1676410959U,  // ST1i32_POST
6239
500k
    1065039U, // ST1i64
6240
500k
    1944879183U,  // ST1i64_POST
6241
500k
    1081423U, // ST1i8
6242
500k
    2213347407U,  // ST1i8_POST
6243
500k
    302449676U, // ST2B
6244
500k
    302449676U, // ST2B_IMM
6245
500k
    302369104U, // ST2D
6246
500k
    302369104U, // ST2D_IMM
6247
500k
    838880021U, // ST2GOffset
6248
500k
    302205717U, // ST2GPostIndex
6249
500k
    302205717U, // ST2GPreIndex
6250
500k
    302468010U, // ST2H
6251
500k
    302468010U, // ST2H_IMM
6252
500k
    492019U,  // ST2Twov16b
6253
500k
    78103027U,  // ST2Twov16b_POST
6254
500k
    557555U,  // ST2Twov2d
6255
500k
    78168563U,  // ST2Twov2d_POST
6256
500k
    590323U,  // ST2Twov2s
6257
500k
    80298483U,  // ST2Twov2s_POST
6258
500k
    623091U,  // ST2Twov4h
6259
500k
    80331251U,  // ST2Twov4h_POST
6260
500k
    655859U,  // ST2Twov4s
6261
500k
    78266867U,  // ST2Twov4s_POST
6262
500k
    688627U,  // ST2Twov8b
6263
500k
    80396787U,  // ST2Twov8b_POST
6264
500k
    721395U,  // ST2Twov8h
6265
500k
    78332403U,  // ST2Twov8h_POST
6266
500k
    302389670U, // ST2W
6267
500k
    302389670U, // ST2W_IMM
6268
500k
    1032691U, // ST2i16
6269
500k
    1676378611U,  // ST2i16_POST
6270
500k
    1049075U, // ST2i32
6271
500k
    1944846835U,  // ST2i32_POST
6272
500k
    1065459U, // ST2i64
6273
500k
    2481750515U,  // ST2i64_POST
6274
500k
    1081843U, // ST2i8
6275
500k
    1408041459U,  // ST2i8_POST
6276
500k
    302449697U, // ST3B
6277
500k
    302449697U, // ST3B_IMM
6278
500k
    302369116U, // ST3D
6279
500k
    302369116U, // ST3D_IMM
6280
500k
    302468022U, // ST3H
6281
500k
    302468022U, // ST3H_IMM
6282
500k
    492085U,  // ST3Threev16b
6283
500k
    90686005U,  // ST3Threev16b_POST
6284
500k
    557621U,  // ST3Threev2d
6285
500k
    90751541U,  // ST3Threev2d_POST
6286
500k
    590389U,  // ST3Threev2s
6287
500k
    92881461U,  // ST3Threev2s_POST
6288
500k
    623157U,  // ST3Threev4h
6289
500k
    92914229U,  // ST3Threev4h_POST
6290
500k
    655925U,  // ST3Threev4s
6291
500k
    90849845U,  // ST3Threev4s_POST
6292
500k
    688693U,  // ST3Threev8b
6293
500k
    92979765U,  // ST3Threev8b_POST
6294
500k
    721461U,  // ST3Threev8h
6295
500k
    90915381U,  // ST3Threev8h_POST
6296
500k
    302389682U, // ST3W
6297
500k
    302389682U, // ST3W_IMM
6298
500k
    1032757U, // ST3i16
6299
500k
    2750120501U,  // ST3i16_POST
6300
500k
    1049141U, // ST3i32
6301
500k
    3018588725U,  // ST3i32_POST
6302
500k
    1065525U, // ST3i64
6303
500k
    3287056949U,  // ST3i64_POST
6304
500k
    1081909U, // ST3i8
6305
500k
    3555525173U,  // ST3i8_POST
6306
500k
    302449723U, // ST4B
6307
500k
    302449723U, // ST4B_IMM
6308
500k
    302369128U, // ST4D
6309
500k
    302369128U, // ST4D_IMM
6310
500k
    492102U,  // ST4Fourv16b
6311
500k
    76005958U,  // ST4Fourv16b_POST
6312
500k
    557638U,  // ST4Fourv2d
6313
500k
    76071494U,  // ST4Fourv2d_POST
6314
500k
    590406U,  // ST4Fourv2s
6315
500k
    78201414U,  // ST4Fourv2s_POST
6316
500k
    623174U,  // ST4Fourv4h
6317
500k
    78234182U,  // ST4Fourv4h_POST
6318
500k
    655942U,  // ST4Fourv4s
6319
500k
    76169798U,  // ST4Fourv4s_POST
6320
500k
    688710U,  // ST4Fourv8b
6321
500k
    78299718U,  // ST4Fourv8b_POST
6322
500k
    721478U,  // ST4Fourv8h
6323
500k
    76235334U,  // ST4Fourv8h_POST
6324
500k
    302468034U, // ST4H
6325
500k
    302468034U, // ST4H_IMM
6326
500k
    302389694U, // ST4W
6327
500k
    302389694U, // ST4W_IMM
6328
500k
    1032774U, // ST4i16
6329
500k
    1944814150U,  // ST4i16_POST
6330
500k
    1049158U, // ST4i32
6331
500k
    2481717830U,  // ST4i32_POST
6332
500k
    1065542U, // ST4i64
6333
500k
    3823927878U,  // ST4i64_POST
6334
500k
    1081926U, // ST4i8
6335
500k
    1676476998U,  // ST4i8_POST
6336
500k
    885806U,  // ST64B
6337
500k
    4028651719U,  // ST64BV
6338
500k
    4028645408U,  // ST64BV0
6339
500k
    838881602U, // STGM
6340
500k
    838880085U, // STGOffset
6341
500k
    807424670U, // STGPi
6342
500k
    302205781U, // STGPostIndex
6343
500k
    270750366U, // STGPpost
6344
500k
    270750366U, // STGPpre
6345
500k
    302205781U, // STGPreIndex
6346
500k
    838879056U, // STLLRB
6347
500k
    838880682U, // STLLRH
6348
500k
    838882379U, // STLLRW
6349
500k
    838882379U, // STLLRX
6350
500k
    838879064U, // STLRB
6351
500k
    838880690U, // STLRH
6352
500k
    838882392U, // STLRW
6353
500k
    838882392U, // STLRX
6354
500k
    838879114U, // STLURBi
6355
500k
    838880740U, // STLURHi
6356
500k
    838882489U, // STLURWi
6357
500k
    838882489U, // STLURXi
6358
500k
    807424870U, // STLXPW
6359
500k
    807424870U, // STLXPX
6360
500k
    807421873U, // STLXRB
6361
500k
    807423499U, // STLXRH
6362
500k
    807425273U, // STLXRW
6363
500k
    807425273U, // STLXRX
6364
500k
    807424782U, // STNPDi
6365
500k
    807424782U, // STNPQi
6366
500k
    807424782U, // STNPSi
6367
500k
    807424782U, // STNPWi
6368
500k
    807424782U, // STNPXi
6369
500k
    302449639U, // STNT1B_ZRI
6370
500k
    302449639U, // STNT1B_ZRR
6371
500k
    1107674087U,  // STNT1B_ZZR_D_REAL
6372
500k
    1376125927U,  // STNT1B_ZZR_S_REAL
6373
500k
    302369084U, // STNT1D_ZRI
6374
500k
    302369084U, // STNT1D_ZRR
6375
500k
    1107675452U,  // STNT1D_ZZR_D_REAL
6376
500k
    302467973U, // STNT1H_ZRI
6377
500k
    302467973U, // STNT1H_ZRR
6378
500k
    1107676037U,  // STNT1H_ZZR_D_REAL
6379
500k
    1376127877U,  // STNT1H_ZZR_S_REAL
6380
500k
    302389642U, // STNT1W_ZRI
6381
500k
    302389642U, // STNT1W_ZRR
6382
500k
    1107679626U,  // STNT1W_ZZR_D_REAL
6383
500k
    1376131466U,  // STNT1W_ZZR_S_REAL
6384
500k
    807424820U, // STPDi
6385
500k
    270750516U, // STPDpost
6386
500k
    270750516U, // STPDpre
6387
500k
    807424820U, // STPQi
6388
500k
    270750516U, // STPQpost
6389
500k
    270750516U, // STPQpre
6390
500k
    807424820U, // STPSi
6391
500k
    270750516U, // STPSpost
6392
500k
    270750516U, // STPSpre
6393
500k
    807424820U, // STPWi
6394
500k
    270750516U, // STPWpost
6395
500k
    270750516U, // STPWpre
6396
500k
    807424820U, // STPXi
6397
500k
    270750516U, // STPXpost
6398
500k
    270750516U, // STPXpre
6399
500k
    302204790U, // STRBBpost
6400
500k
    302204790U, // STRBBpre
6401
500k
    838879094U, // STRBBroW
6402
500k
    838879094U, // STRBBroX
6403
500k
    838879094U, // STRBBui
6404
500k
    302208162U, // STRBpost
6405
500k
    302208162U, // STRBpre
6406
500k
    838882466U, // STRBroW
6407
500k
    838882466U, // STRBroX
6408
500k
    838882466U, // STRBui
6409
500k
    302208162U, // STRDpost
6410
500k
    302208162U, // STRDpre
6411
500k
    838882466U, // STRDroW
6412
500k
    838882466U, // STRDroX
6413
500k
    838882466U, // STRDui
6414
500k
    302206416U, // STRHHpost
6415
500k
    302206416U, // STRHHpre
6416
500k
    838880720U, // STRHHroW
6417
500k
    838880720U, // STRHHroX
6418
500k
    838880720U, // STRHHui
6419
500k
    302208162U, // STRHpost
6420
500k
    302208162U, // STRHpre
6421
500k
    838882466U, // STRHroW
6422
500k
    838882466U, // STRHroX
6423
500k
    838882466U, // STRHui
6424
500k
    302208162U, // STRQpost
6425
500k
    302208162U, // STRQpre
6426
500k
    838882466U, // STRQroW
6427
500k
    838882466U, // STRQroX
6428
500k
    838882466U, // STRQui
6429
500k
    302208162U, // STRSpost
6430
500k
    302208162U, // STRSpre
6431
500k
    838882466U, // STRSroW
6432
500k
    838882466U, // STRSroX
6433
500k
    838882466U, // STRSui
6434
500k
    302208162U, // STRWpost
6435
500k
    302208162U, // STRWpre
6436
500k
    838882466U, // STRWroW
6437
500k
    838882466U, // STRWroX
6438
500k
    838882466U, // STRWui
6439
500k
    302208162U, // STRXpost
6440
500k
    302208162U, // STRXpre
6441
500k
    838882466U, // STRXroW
6442
500k
    838882466U, // STRXroX
6443
500k
    838882466U, // STRXui
6444
500k
    839767202U, // STR_PXI
6445
500k
    922786U,  // STR_ZA
6446
500k
    839767202U, // STR_ZXI
6447
500k
    838879100U, // STTRBi
6448
500k
    838880726U, // STTRHi
6449
500k
    838882471U, // STTRWi
6450
500k
    838882471U, // STTRXi
6451
500k
    838879131U, // STURBBi
6452
500k
    838882504U, // STURBi
6453
500k
    838882504U, // STURDi
6454
500k
    838880757U, // STURHHi
6455
500k
    838882504U, // STURHi
6456
500k
    838882504U, // STURQi
6457
500k
    838882504U, // STURSi
6458
500k
    838882504U, // STURWi
6459
500k
    838882504U, // STURXi
6460
500k
    807424877U, // STXPW
6461
500k
    807424877U, // STXPX
6462
500k
    807421881U, // STXRB
6463
500k
    807423507U, // STXRH
6464
500k
    807425280U, // STXRW
6465
500k
    807425280U, // STXRX
6466
500k
    838880027U, // STZ2GOffset
6467
500k
    302205723U, // STZ2GPostIndex
6468
500k
    302205723U, // STZ2GPreIndex
6469
500k
    838881608U, // STZGM
6470
500k
    838880090U, // STZGOffset
6471
500k
    302205786U, // STZGPostIndex
6472
500k
    302205786U, // STZGPreIndex
6473
500k
    807422754U, // SUBG
6474
500k
    1881179800U,  // SUBHNB_ZZZ_B
6475
500k
    2172716696U,  // SUBHNB_ZZZ_H
6476
500k
    2418099864U,  // SUBHNB_ZZZ_S
6477
500k
    2686490521U,  // SUBHNT_ZZZ_B
6478
500k
    2174818201U,  // SUBHNT_ZZZ_H
6479
500k
    1075926937U,  // SUBHNT_ZZZ_S
6480
500k
    545362307U, // SUBHNv2i64_v2i32
6481
500k
    2967601507U,  // SUBHNv2i64_v4i32
6482
500k
    549556611U, // SUBHNv4i32_v4i16
6483
500k
    2969698659U,  // SUBHNv4i32_v8i16
6484
500k
    2959212899U,  // SUBHNv8i16_v16i8
6485
500k
    555848067U, // SUBHNv8i16_v8i8
6486
500k
    807424614U, // SUBP
6487
500k
    807425477U, // SUBPS
6488
500k
    3760231349U,  // SUBR_ZI_B
6489
500k
    2418070453U,  // SUBR_ZI_D
6490
500k
    2179011509U,  // SUBR_ZI_H
6491
500k
    4028715957U,  // SUBR_ZI_S
6492
500k
    3223360437U,  // SUBR_ZPmZ_B
6493
500k
    3223376821U,  // SUBR_ZPmZ_D
6494
500k
    3519091637U,  // SUBR_ZPmZ_H
6495
500k
    3223409589U,  // SUBR_ZPmZ_S
6496
500k
    807425342U, // SUBSWri
6497
500k
    807425342U, // SUBSWrs
6498
500k
    807425342U, // SUBSWrx
6499
500k
    807425342U, // SUBSXri
6500
500k
    807425342U, // SUBSXrs
6501
500k
    807425342U, // SUBSXrx
6502
500k
    807425342U, // SUBSXrx64
6503
500k
    807422048U, // SUBWri
6504
500k
    807422048U, // SUBWrs
6505
500k
    807422048U, // SUBWrx
6506
500k
    807422048U, // SUBXri
6507
500k
    807422048U, // SUBXrs
6508
500k
    807422048U, // SUBXrx
6509
500k
    807422048U, // SUBXrx64
6510
500k
    3760228448U,  // SUB_ZI_B
6511
500k
    2418067552U,  // SUB_ZI_D
6512
500k
    2179008608U,  // SUB_ZI_H
6513
500k
    4028713056U,  // SUB_ZI_S
6514
500k
    3223357536U,  // SUB_ZPmZ_B
6515
500k
    3223373920U,  // SUB_ZPmZ_D
6516
500k
    3519088736U,  // SUB_ZPmZ_H
6517
500k
    3223406688U,  // SUB_ZPmZ_S
6518
500k
    3760228448U,  // SUB_ZZZ_B
6519
500k
    2418067552U,  // SUB_ZZZ_D
6520
500k
    2179008608U,  // SUB_ZZZ_H
6521
500k
    4028713056U,  // SUB_ZZZ_S
6522
500k
    543262816U, // SUBv16i8
6523
500k
    807422048U, // SUBv1i64
6524
500k
    545359968U, // SUBv2i32
6525
500k
    547457120U, // SUBv2i64
6526
500k
    549554272U, // SUBv4i16
6527
500k
    551651424U, // SUBv4i32
6528
500k
    553748576U, // SUBv8i16
6529
500k
    555845728U, // SUBv8i8
6530
500k
    1344362538U,  // SUDOT_ZZZI
6531
500k
    2967607338U,  // SUDOTlanev16i8
6532
500k
    2961315882U,  // SUDOTlanev8i8
6533
500k
    138527526U, // SUMOPA_MPPZZ_D
6534
500k
    140624678U, // SUMOPA_MPPZZ_S
6535
500k
    138532324U, // SUMOPS_MPPZZ_D
6536
500k
    140629476U, // SUMOPS_MPPZZ_S
6537
500k
    4028681920U,  // SUNPKHI_ZZ_D
6538
500k
    1736511168U,  // SUNPKHI_ZZ_H
6539
500k
    1881231040U,  // SUNPKHI_ZZ_S
6540
500k
    4028682809U,  // SUNPKLO_ZZ_D
6541
500k
    1736512057U,  // SUNPKLO_ZZ_H
6542
500k
    1881231929U,  // SUNPKLO_ZZ_S
6543
500k
    3223357964U,  // SUQADD_ZPmZ_B
6544
500k
    3223374348U,  // SUQADD_ZPmZ_D
6545
500k
    3519089164U,  // SUQADD_ZPmZ_H
6546
500k
    3223407116U,  // SUQADD_ZPmZ_S
6547
500k
    2959215116U,  // SUQADDv16i8
6548
500k
    270748172U, // SUQADDv1i16
6549
500k
    270748172U, // SUQADDv1i32
6550
500k
    270748172U, // SUQADDv1i64
6551
500k
    270748172U, // SUQADDv1i8
6552
500k
    2961312268U,  // SUQADDv2i32
6553
500k
    2963409420U,  // SUQADDv2i64
6554
500k
    2965506572U,  // SUQADDv4i16
6555
500k
    2967603724U,  // SUQADDv4i32
6556
500k
    2969700876U,  // SUQADDv8i16
6557
500k
    2971798028U,  // SUQADDv8i8
6558
500k
    264473U,  // SVC
6559
500k
    3223536734U,  // SWPAB
6560
500k
    3223538691U,  // SWPAH
6561
500k
    3223536994U,  // SWPALB
6562
500k
    3223538847U,  // SWPALH
6563
500k
    3223539550U,  // SWPALW
6564
500k
    3223539550U,  // SWPALX
6565
500k
    3223536437U,  // SWPAW
6566
500k
    3223536437U,  // SWPAX
6567
500k
    3223537438U,  // SWPB
6568
500k
    3223539064U,  // SWPH
6569
500k
    3223537203U,  // SWPLB
6570
500k
    3223538944U,  // SWPLH
6571
500k
    3223539860U,  // SWPLW
6572
500k
    3223539860U,  // SWPLX
6573
500k
    3223540543U,  // SWPW
6574
500k
    3223540543U,  // SWPX
6575
500k
    2148435U, // SXTB_ZPmZ_D
6576
500k
    272697427U, // SXTB_ZPmZ_H
6577
500k
    2181203U, // SXTB_ZPmZ_S
6578
500k
    2150019U, // SXTH_ZPmZ_D
6579
500k
    2182787U, // SXTH_ZPmZ_S
6580
500k
    2153095U, // SXTW_ZPmZ_D
6581
500k
    807424212U, // SYSLxt
6582
500k
    2119196U, // SYSxt
6583
500k
    2133915U, // TBL_ZZZZ_B
6584
500k
    270585755U, // TBL_ZZZZ_D
6585
500k
    142675867U, // TBL_ZZZZ_H
6586
500k
    539053979U, // TBL_ZZZZ_S
6587
500k
    2133915U, // TBL_ZZZ_B
6588
500k
    270585755U, // TBL_ZZZ_D
6589
500k
    142675867U, // TBL_ZZZ_H
6590
500k
    539053979U, // TBL_ZZZ_S
6591
500k
    811700123U, // TBLv16i8Four
6592
500k
    811700123U, // TBLv16i8One
6593
500k
    811700123U, // TBLv16i8Three
6594
500k
    811700123U, // TBLv16i8Two
6595
500k
    824283035U, // TBLv8i8Four
6596
500k
    824283035U, // TBLv8i8One
6597
500k
    824283035U, // TBLv8i8Three
6598
500k
    824283035U, // TBLv8i8Two
6599
500k
    807426922U, // TBNZW
6600
500k
    807426922U, // TBNZX
6601
500k
    1344314065U,  // TBX_ZZZ_B
6602
500k
    1075894993U,  // TBX_ZZZ_D
6603
500k
    2185304785U,  // TBX_ZZZ_H
6604
500k
    1344363217U,  // TBX_ZZZ_S
6605
500k
    1080171217U,  // TBXv16i8Four
6606
500k
    1080171217U,  // TBXv16i8One
6607
500k
    1080171217U,  // TBXv16i8Three
6608
500k
    1080171217U,  // TBXv16i8Two
6609
500k
    1092754129U,  // TBXv8i8Four
6610
500k
    1092754129U,  // TBXv8i8One
6611
500k
    1092754129U,  // TBXv8i8Three
6612
500k
    1092754129U,  // TBXv8i8Two
6613
500k
    807426906U, // TBZW
6614
500k
    807426906U, // TBZX
6615
500k
    266226U,  // TCANCEL
6616
500k
    8670U,  // TCOMMIT
6617
500k
    3760226350U,  // TRN1_PPP_B
6618
500k
    2418065454U,  // TRN1_PPP_D
6619
500k
    2179006510U,  // TRN1_PPP_H
6620
500k
    4028710958U,  // TRN1_PPP_S
6621
500k
    3760226350U,  // TRN1_ZZZ_B
6622
500k
    2418065454U,  // TRN1_ZZZ_D
6623
500k
    2179006510U,  // TRN1_ZZZ_H
6624
500k
    2193981486U,  // TRN1_ZZZ_Q
6625
500k
    4028710958U,  // TRN1_ZZZ_S
6626
500k
    543260718U, // TRN1v16i8
6627
500k
    545357870U, // TRN1v2i32
6628
500k
    547455022U, // TRN1v2i64
6629
500k
    549552174U, // TRN1v4i16
6630
500k
    551649326U, // TRN1v4i32
6631
500k
    553746478U, // TRN1v8i16
6632
500k
    555843630U, // TRN1v8i8
6633
500k
    3760226714U,  // TRN2_PPP_B
6634
500k
    2418065818U,  // TRN2_PPP_D
6635
500k
    2179006874U,  // TRN2_PPP_H
6636
500k
    4028711322U,  // TRN2_PPP_S
6637
500k
    3760226714U,  // TRN2_ZZZ_B
6638
500k
    2418065818U,  // TRN2_ZZZ_D
6639
500k
    2179006874U,  // TRN2_ZZZ_H
6640
500k
    2193981850U,  // TRN2_ZZZ_Q
6641
500k
    4028711322U,  // TRN2_ZZZ_S
6642
500k
    543261082U, // TRN2v16i8
6643
500k
    545358234U, // TRN2v2i32
6644
500k
    547455386U, // TRN2v2i64
6645
500k
    549552538U, // TRN2v4i16
6646
500k
    551649690U, // TRN2v4i32
6647
500k
    553746842U, // TRN2v8i16
6648
500k
    555843994U, // TRN2v8i8
6649
500k
    329768U,  // TSB
6650
500k
    22583U, // TSTART
6651
500k
    22605U, // TTEST
6652
500k
    1344324887U,  // UABALB_ZZZ_D
6653
500k
    2281768215U,  // UABALB_ZZZ_H
6654
500k
    2686534935U,  // UABALB_ZZZ_S
6655
500k
    1344329390U,  // UABALT_ZZZ_D
6656
500k
    2281772718U,  // UABALT_ZZZ_H
6657
500k
    2686539438U,  // UABALT_ZZZ_S
6658
500k
    2969698476U,  // UABALv16i8_v8i16
6659
500k
    2963410708U,  // UABALv2i32_v2i64
6660
500k
    2967605012U,  // UABALv4i16_v4i32
6661
500k
    2963407020U,  // UABALv4i32_v2i64
6662
500k
    2967601324U,  // UABALv8i16_v4i32
6663
500k
    2969702164U,  // UABALv8i8_v8i16
6664
500k
    1344307853U,  // UABA_ZZZ_B
6665
500k
    1075888781U,  // UABA_ZZZ_D
6666
500k
    2185298573U,  // UABA_ZZZ_H
6667
500k
    1344357005U,  // UABA_ZZZ_S
6668
500k
    2959213197U,  // UABAv16i8
6669
500k
    2961310349U,  // UABAv2i32
6670
500k
    2965504653U,  // UABAv4i16
6671
500k
    2967601805U,  // UABAv4i32
6672
500k
    2969698957U,  // UABAv8i16
6673
500k
    2971796109U,  // UABAv8i8
6674
500k
    4028679628U,  // UABDLB_ZZZ_D
6675
500k
    2273379788U,  // UABDLB_ZZZ_H
6676
500k
    1881228748U,  // UABDLB_ZZZ_S
6677
500k
    4028684031U,  // UABDLT_ZZZ_D
6678
500k
    2273384191U,  // UABDLT_ZZZ_H
6679
500k
    1881233151U,  // UABDLT_ZZZ_S
6680
500k
    553746670U, // UABDLv16i8_v8i16
6681
500k
    547459013U, // UABDLv2i32_v2i64
6682
500k
    551653317U, // UABDLv4i16_v4i32
6683
500k
    547455214U, // UABDLv4i32_v2i64
6684
500k
    551649518U, // UABDLv8i16_v4i32
6685
500k
    553750469U, // UABDLv8i8_v8i16
6686
500k
    3223357838U,  // UABD_ZPmZ_B
6687
500k
    3223374222U,  // UABD_ZPmZ_D
6688
500k
    3519089038U,  // UABD_ZPmZ_H
6689
500k
    3223406990U,  // UABD_ZPmZ_S
6690
500k
    543263118U, // UABDv16i8
6691
500k
    545360270U, // UABDv2i32
6692
500k
    549554574U, // UABDv4i16
6693
500k
    551651726U, // UABDv4i32
6694
500k
    553748878U, // UABDv8i16
6695
500k
    555846030U, // UABDv8i8
6696
500k
    3223376556U,  // UADALP_ZPmZ_D
6697
500k
    3519091372U,  // UADALP_ZPmZ_H
6698
500k
    3223409324U,  // UADALP_ZPmZ_S
6699
500k
    2969703084U,  // UADALPv16i8_v8i16
6700
500k
    3089240748U,  // UADALPv2i32_v1i64
6701
500k
    2961314476U,  // UADALPv4i16_v2i32
6702
500k
    2963411628U,  // UADALPv4i32_v2i64
6703
500k
    2967605932U,  // UADALPv8i16_v4i32
6704
500k
    2965508780U,  // UADALPv8i8_v4i16
6705
500k
    4028679653U,  // UADDLB_ZZZ_D
6706
500k
    2273379813U,  // UADDLB_ZZZ_H
6707
500k
    1881228773U,  // UADDLB_ZZZ_S
6708
500k
    553751228U, // UADDLPv16i8_v8i16
6709
500k
    673288892U, // UADDLPv2i32_v1i64
6710
500k
    545362620U, // UADDLPv4i16_v2i32
6711
500k
    547459772U, // UADDLPv4i32_v2i64
6712
500k
    551654076U, // UADDLPv8i16_v4i32
6713
500k
    549556924U, // UADDLPv8i8_v4i16
6714
500k
    4028684047U,  // UADDLT_ZZZ_D
6715
500k
    2273384207U,  // UADDLT_ZZZ_H
6716
500k
    1881233167U,  // UADDLT_ZZZ_S
6717
500k
    538990857U, // UADDLVv16i8v
6718
500k
    538990857U, // UADDLVv4i16v
6719
500k
    538990857U, // UADDLVv4i32v
6720
500k
    538990857U, // UADDLVv8i16v
6721
500k
    538990857U, // UADDLVv8i8v
6722
500k
    553746686U, // UADDLv16i8_v8i16
6723
500k
    547459051U, // UADDLv2i32_v2i64
6724
500k
    551653355U, // UADDLv4i16_v4i32
6725
500k
    547455230U, // UADDLv4i32_v2i64
6726
500k
    551649534U, // UADDLv8i16_v4i32
6727
500k
    553750507U, // UADDLv8i8_v8i16
6728
500k
    1745000669U,  // UADDV_VPZ_B
6729
500k
    1646434525U,  // UADDV_VPZ_D
6730
500k
    1648531677U,  // UADDV_VPZ_H
6731
500k
    1638045917U,  // UADDV_VPZ_S
6732
500k
    2418067630U,  // UADDWB_ZZZ_D
6733
500k
    2179008686U,  // UADDWB_ZZZ_H
6734
500k
    4028713134U,  // UADDWB_ZZZ_S
6735
500k
    2418071682U,  // UADDWT_ZZZ_D
6736
500k
    2179012738U,  // UADDWT_ZZZ_H
6737
500k
    4028717186U,  // UADDWT_ZZZ_S
6738
500k
    553746960U, // UADDWv16i8_v8i16
6739
500k
    547461634U, // UADDWv2i32_v2i64
6740
500k
    551655938U, // UADDWv4i16_v4i32
6741
500k
    547455504U, // UADDWv4i32_v2i64
6742
500k
    551649808U, // UADDWv8i16_v4i32
6743
500k
    553753090U, // UADDWv8i8_v8i16
6744
500k
    807424304U, // UBFMWri
6745
500k
    807424304U, // UBFMXri
6746
500k
    3760231116U,  // UCLAMP_ZZZ_B
6747
500k
    2418070220U,  // UCLAMP_ZZZ_D
6748
500k
    2179011276U,  // UCLAMP_ZZZ_H
6749
500k
    4028715724U,  // UCLAMP_ZZZ_S
6750
500k
    807422734U, // UCVTFSWDri
6751
500k
    807422734U, // UCVTFSWHri
6752
500k
    807422734U, // UCVTFSWSri
6753
500k
    807422734U, // UCVTFSXDri
6754
500k
    807422734U, // UCVTFSXHri
6755
500k
    807422734U, // UCVTFSXSri
6756
500k
    807422734U, // UCVTFUWDri
6757
500k
    807422734U, // UCVTFUWHri
6758
500k
    807422734U, // UCVTFUWSri
6759
500k
    807422734U, // UCVTFUXDri
6760
500k
    807422734U, // UCVTFUXHri
6761
500k
    807422734U, // UCVTFUXSri
6762
500k
    2149134U, // UCVTF_ZPmZ_DtoD
6763
500k
    541133582U, // UCVTF_ZPmZ_DtoH
6764
500k
    2181902U, // UCVTF_ZPmZ_DtoS
6765
500k
    272698126U, // UCVTF_ZPmZ_HtoH
6766
500k
    2149134U, // UCVTF_ZPmZ_StoD
6767
500k
    541133582U, // UCVTF_ZPmZ_StoH
6768
500k
    2181902U, // UCVTF_ZPmZ_StoS
6769
500k
    807422734U, // UCVTFd
6770
500k
    807422734U, // UCVTFh
6771
500k
    807422734U, // UCVTFs
6772
500k
    807422734U, // UCVTFv1i16
6773
500k
    807422734U, // UCVTFv1i32
6774
500k
    807422734U, // UCVTFv1i64
6775
500k
    545360654U, // UCVTFv2f32
6776
500k
    547457806U, // UCVTFv2f64
6777
500k
    545360654U, // UCVTFv2i32_shift
6778
500k
    547457806U, // UCVTFv2i64_shift
6779
500k
    549554958U, // UCVTFv4f16
6780
500k
    551652110U, // UCVTFv4f32
6781
500k
    549554958U, // UCVTFv4i16_shift
6782
500k
    551652110U, // UCVTFv4i32_shift
6783
500k
    553749262U, // UCVTFv8f16
6784
500k
    553749262U, // UCVTFv8i16_shift
6785
500k
    19191U, // UDF
6786
500k
    3223377116U,  // UDIVR_ZPmZ_D
6787
500k
    3223409884U,  // UDIVR_ZPmZ_S
6788
500k
    807426299U, // UDIVWr
6789
500k
    807426299U, // UDIVXr
6790
500k
    3223378171U,  // UDIV_ZPmZ_D
6791
500k
    3223410939U,  // UDIV_ZPmZ_S
6792
500k
    2686507051U,  // UDOT_ZZZI_D
6793
500k
    1344362539U,  // UDOT_ZZZI_S
6794
500k
    2686507051U,  // UDOT_ZZZ_D
6795
500k
    1344362539U,  // UDOT_ZZZ_S
6796
500k
    2967607339U,  // UDOTlanev16i8
6797
500k
    2961315883U,  // UDOTlanev8i8
6798
500k
    2967607339U,  // UDOTv16i8
6799
500k
    2961315883U,  // UDOTv8i8
6800
500k
    3223357934U,  // UHADD_ZPmZ_B
6801
500k
    3223374318U,  // UHADD_ZPmZ_D
6802
500k
    3519089134U,  // UHADD_ZPmZ_H
6803
500k
    3223407086U,  // UHADD_ZPmZ_S
6804
500k
    543263214U, // UHADDv16i8
6805
500k
    545360366U, // UHADDv2i32
6806
500k
    549554670U, // UHADDv4i16
6807
500k
    551651822U, // UHADDv4i32
6808
500k
    553748974U, // UHADDv8i16
6809
500k
    555846126U, // UHADDv8i8
6810
500k
    3223360451U,  // UHSUBR_ZPmZ_B
6811
500k
    3223376835U,  // UHSUBR_ZPmZ_D
6812
500k
    3519091651U,  // UHSUBR_ZPmZ_H
6813
500k
    3223409603U,  // UHSUBR_ZPmZ_S
6814
500k
    3223357548U,  // UHSUB_ZPmZ_B
6815
500k
    3223373932U,  // UHSUB_ZPmZ_D
6816
500k
    3519088748U,  // UHSUB_ZPmZ_H
6817
500k
    3223406700U,  // UHSUB_ZPmZ_S
6818
500k
    543262828U, // UHSUBv16i8
6819
500k
    545359980U, // UHSUBv2i32
6820
500k
    549554284U, // UHSUBv4i16
6821
500k
    551651436U, // UHSUBv4i32
6822
500k
    553748588U, // UHSUBv8i16
6823
500k
    555845740U, // UHSUBv8i8
6824
500k
    807423964U, // UMADDLrrr
6825
500k
    3223360345U,  // UMAXP_ZPmZ_B
6826
500k
    3223376729U,  // UMAXP_ZPmZ_D
6827
500k
    3519091545U,  // UMAXP_ZPmZ_H
6828
500k
    3223409497U,  // UMAXP_ZPmZ_S
6829
500k
    543265625U, // UMAXPv16i8
6830
500k
    545362777U, // UMAXPv2i32
6831
500k
    549557081U, // UMAXPv4i16
6832
500k
    551654233U, // UMAXPv4i32
6833
500k
    553751385U, // UMAXPv8i16
6834
500k
    555848537U, // UMAXPv8i8
6835
500k
    153957U,  // UMAXV_VPZ_B
6836
500k
    1646434661U,  // UMAXV_VPZ_D
6837
500k
    1648548197U,  // UMAXV_VPZ_H
6838
500k
    1638078821U,  // UMAXV_VPZ_S
6839
500k
    538990949U, // UMAXVv16i8v
6840
500k
    538990949U, // UMAXVv4i16v
6841
500k
    538990949U, // UMAXVv4i32v
6842
500k
    538990949U, // UMAXVv8i16v
6843
500k
    538990949U, // UMAXVv8i8v
6844
500k
    3760233163U,  // UMAX_ZI_B
6845
500k
    2418072267U,  // UMAX_ZI_D
6846
500k
    2179013323U,  // UMAX_ZI_H
6847
500k
    4028717771U,  // UMAX_ZI_S
6848
500k
    3223362251U,  // UMAX_ZPmZ_B
6849
500k
    3223378635U,  // UMAX_ZPmZ_D
6850
500k
    3519093451U,  // UMAX_ZPmZ_H
6851
500k
    3223411403U,  // UMAX_ZPmZ_S
6852
500k
    543267531U, // UMAXv16i8
6853
500k
    545364683U, // UMAXv2i32
6854
500k
    549558987U, // UMAXv4i16
6855
500k
    551656139U, // UMAXv4i32
6856
500k
    553753291U, // UMAXv8i16
6857
500k
    555850443U, // UMAXv8i8
6858
500k
    3223360263U,  // UMINP_ZPmZ_B
6859
500k
    3223376647U,  // UMINP_ZPmZ_D
6860
500k
    3519091463U,  // UMINP_ZPmZ_H
6861
500k
    3223409415U,  // UMINP_ZPmZ_S
6862
500k
    543265543U, // UMINPv16i8
6863
500k
    545362695U, // UMINPv2i32
6864
500k
    549556999U, // UMINPv4i16
6865
500k
    551654151U, // UMINPv4i32
6866
500k
    553751303U, // UMINPv8i16
6867
500k
    555848455U, // UMINPv8i8
6868
500k
    153905U,  // UMINV_VPZ_B
6869
500k
    1646434609U,  // UMINV_VPZ_D
6870
500k
    1648548145U,  // UMINV_VPZ_H
6871
500k
    1638078769U,  // UMINV_VPZ_S
6872
500k
    538990897U, // UMINVv16i8v
6873
500k
    538990897U, // UMINVv4i16v
6874
500k
    538990897U, // UMINVv4i32v
6875
500k
    538990897U, // UMINVv8i16v
6876
500k
    538990897U, // UMINVv8i8v
6877
500k
    3760230818U,  // UMIN_ZI_B
6878
500k
    2418069922U,  // UMIN_ZI_D
6879
500k
    2179010978U,  // UMIN_ZI_H
6880
500k
    4028715426U,  // UMIN_ZI_S
6881
500k
    3223359906U,  // UMIN_ZPmZ_B
6882
500k
    3223376290U,  // UMIN_ZPmZ_D
6883
500k
    3519091106U,  // UMIN_ZPmZ_H
6884
500k
    3223409058U,  // UMIN_ZPmZ_S
6885
500k
    543265186U, // UMINv16i8
6886
500k
    545362338U, // UMINv2i32
6887
500k
    549556642U, // UMINv4i16
6888
500k
    551653794U, // UMINv4i32
6889
500k
    553750946U, // UMINv8i16
6890
500k
    555848098U, // UMINv8i8
6891
500k
    1344324932U,  // UMLALB_ZZZI_D
6892
500k
    2686534980U,  // UMLALB_ZZZI_S
6893
500k
    1344324932U,  // UMLALB_ZZZ_D
6894
500k
    2281768260U,  // UMLALB_ZZZ_H
6895
500k
    2686534980U,  // UMLALB_ZZZ_S
6896
500k
    1344329425U,  // UMLALT_ZZZI_D
6897
500k
    2686539473U,  // UMLALT_ZZZI_S
6898
500k
    1344329425U,  // UMLALT_ZZZ_D
6899
500k
    2281772753U,  // UMLALT_ZZZ_H
6900
500k
    2686539473U,  // UMLALT_ZZZ_S
6901
500k
    2969698510U,  // UMLALv16i8_v8i16
6902
500k
    2963410747U,  // UMLALv2i32_indexed
6903
500k
    2963410747U,  // UMLALv2i32_v2i64
6904
500k
    2967605051U,  // UMLALv4i16_indexed
6905
500k
    2967605051U,  // UMLALv4i16_v4i32
6906
500k
    2963407054U,  // UMLALv4i32_indexed
6907
500k
    2963407054U,  // UMLALv4i32_v2i64
6908
500k
    2967601358U,  // UMLALv8i16_indexed
6909
500k
    2967601358U,  // UMLALv8i16_v4i32
6910
500k
    2969702203U,  // UMLALv8i8_v8i16
6911
500k
    1344325229U,  // UMLSLB_ZZZI_D
6912
500k
    2686535277U,  // UMLSLB_ZZZI_S
6913
500k
    1344325229U,  // UMLSLB_ZZZ_D
6914
500k
    2281768557U,  // UMLSLB_ZZZ_H
6915
500k
    2686535277U,  // UMLSLB_ZZZ_S
6916
500k
    1344329599U,  // UMLSLT_ZZZI_D
6917
500k
    2686539647U,  // UMLSLT_ZZZI_S
6918
500k
    1344329599U,  // UMLSLT_ZZZ_D
6919
500k
    2281772927U,  // UMLSLT_ZZZ_H
6920
500k
    2686539647U,  // UMLSLT_ZZZ_S
6921
500k
    2969698642U,  // UMLSLv16i8_v8i16
6922
500k
    2963411149U,  // UMLSLv2i32_indexed
6923
500k
    2963411149U,  // UMLSLv2i32_v2i64
6924
500k
    2967605453U,  // UMLSLv4i16_indexed
6925
500k
    2967605453U,  // UMLSLv4i16_v4i32
6926
500k
    2963407186U,  // UMLSLv4i32_indexed
6927
500k
    2963407186U,  // UMLSLv4i32_v2i64
6928
500k
    2967601490U,  // UMLSLv8i16_indexed
6929
500k
    2967601490U,  // UMLSLv8i16_v4i32
6930
500k
    2969702605U,  // UMLSLv8i8_v8i16
6931
500k
    2967601903U,  // UMMLA
6932
500k
    1344357103U,  // UMMLA_ZZZ
6933
500k
    138527527U, // UMOPA_MPPZZ_D
6934
500k
    140624679U, // UMOPA_MPPZZ_S
6935
500k
    138532325U, // UMOPS_MPPZZ_D
6936
500k
    140629477U, // UMOPS_MPPZZ_S
6937
500k
    538990923U, // UMOVvi16
6938
500k
    538990923U, // UMOVvi16_idx0
6939
500k
    538990923U, // UMOVvi32
6940
500k
    538990923U, // UMOVvi32_idx0
6941
500k
    538990923U, // UMOVvi64
6942
500k
    538990923U, // UMOVvi64_idx0
6943
500k
    538990923U, // UMOVvi8
6944
500k
    538990923U, // UMOVvi8_idx0
6945
500k
    807423912U, // UMSUBLrrr
6946
500k
    3223358787U,  // UMULH_ZPmZ_B
6947
500k
    3223375171U,  // UMULH_ZPmZ_D
6948
500k
    3519089987U,  // UMULH_ZPmZ_H
6949
500k
    3223407939U,  // UMULH_ZPmZ_S
6950
500k
    3760229699U,  // UMULH_ZZZ_B
6951
500k
    2418068803U,  // UMULH_ZZZ_D
6952
500k
    2179009859U,  // UMULH_ZZZ_H
6953
500k
    4028714307U,  // UMULH_ZZZ_S
6954
500k
    807423299U, // UMULHrr
6955
500k
    4028679703U,  // UMULLB_ZZZI_D
6956
500k
    1881228823U,  // UMULLB_ZZZI_S
6957
500k
    4028679703U,  // UMULLB_ZZZ_D
6958
500k
    2273379863U,  // UMULLB_ZZZ_H
6959
500k
    1881228823U,  // UMULLB_ZZZ_S
6960
500k
    4028684111U,  // UMULLT_ZZZI_D
6961
500k
    1881233231U,  // UMULLT_ZZZI_S
6962
500k
    4028684111U,  // UMULLT_ZZZ_D
6963
500k
    2273384271U,  // UMULLT_ZZZ_H
6964
500k
    1881233231U,  // UMULLT_ZZZ_S
6965
500k
    553746736U, // UMULLv16i8_v8i16
6966
500k
    547459181U, // UMULLv2i32_indexed
6967
500k
    547459181U, // UMULLv2i32_v2i64
6968
500k
    551653485U, // UMULLv4i16_indexed
6969
500k
    551653485U, // UMULLv4i16_v4i32
6970
500k
    547455280U, // UMULLv4i32_indexed
6971
500k
    547455280U, // UMULLv4i32_v2i64
6972
500k
    551649584U, // UMULLv8i16_indexed
6973
500k
    551649584U, // UMULLv8i16_v4i32
6974
500k
    553750637U, // UMULLv8i8_v8i16
6975
500k
    3760228877U,  // UQADD_ZI_B
6976
500k
    2418067981U,  // UQADD_ZI_D
6977
500k
    2179009037U,  // UQADD_ZI_H
6978
500k
    4028713485U,  // UQADD_ZI_S
6979
500k
    3223357965U,  // UQADD_ZPmZ_B
6980
500k
    3223374349U,  // UQADD_ZPmZ_D
6981
500k
    3519089165U,  // UQADD_ZPmZ_H
6982
500k
    3223407117U,  // UQADD_ZPmZ_S
6983
500k
    3760228877U,  // UQADD_ZZZ_B
6984
500k
    2418067981U,  // UQADD_ZZZ_D
6985
500k
    2179009037U,  // UQADD_ZZZ_H
6986
500k
    4028713485U,  // UQADD_ZZZ_S
6987
500k
    543263245U, // UQADDv16i8
6988
500k
    807422477U, // UQADDv1i16
6989
500k
    807422477U, // UQADDv1i32
6990
500k
    807422477U, // UQADDv1i64
6991
500k
    807422477U, // UQADDv1i8
6992
500k
    545360397U, // UQADDv2i32
6993
500k
    547457549U, // UQADDv2i64
6994
500k
    549554701U, // UQADDv4i16
6995
500k
    551651853U, // UQADDv4i32
6996
500k
    553749005U, // UQADDv8i16
6997
500k
    555846157U, // UQADDv8i8
6998
500k
    2686469312U,  // UQDECB_WPiI
6999
500k
    2686469312U,  // UQDECB_XPiI
7000
500k
    2686470563U,  // UQDECD_WPiI
7001
500k
    2686470563U,  // UQDECD_XPiI
7002
500k
    2686503331U,  // UQDECD_ZPiI
7003
500k
    2686471249U,  // UQDECH_WPiI
7004
500k
    2686471249U,  // UQDECH_XPiI
7005
500k
    39914577U,  // UQDECH_ZPiI
7006
500k
    3760214644U,  // UQDECP_WP_B
7007
500k
    2418037364U,  // UQDECP_WP_D
7008
500k
    1881166452U,  // UQDECP_WP_H
7009
500k
    4028650100U,  // UQDECP_WP_S
7010
500k
    3760214644U,  // UQDECP_XP_B
7011
500k
    2418037364U,  // UQDECP_XP_D
7012
500k
    1881166452U,  // UQDECP_XP_H
7013
500k
    4028650100U,  // UQDECP_XP_S
7014
500k
    1075892852U,  // UQDECP_ZP_D
7015
500k
    1648431732U,  // UQDECP_ZP_H
7016
500k
    1344361076U,  // UQDECP_ZP_S
7017
500k
    2686474723U,  // UQDECW_WPiI
7018
500k
    2686474723U,  // UQDECW_XPiI
7019
500k
    2686540259U,  // UQDECW_ZPiI
7020
500k
    2686469328U,  // UQINCB_WPiI
7021
500k
    2686469328U,  // UQINCB_XPiI
7022
500k
    2686470579U,  // UQINCD_WPiI
7023
500k
    2686470579U,  // UQINCD_XPiI
7024
500k
    2686503347U,  // UQINCD_ZPiI
7025
500k
    2686471265U,  // UQINCH_WPiI
7026
500k
    2686471265U,  // UQINCH_XPiI
7027
500k
    39914593U,  // UQINCH_ZPiI
7028
500k
    3760214660U,  // UQINCP_WP_B
7029
500k
    2418037380U,  // UQINCP_WP_D
7030
500k
    1881166468U,  // UQINCP_WP_H
7031
500k
    4028650116U,  // UQINCP_WP_S
7032
500k
    3760214660U,  // UQINCP_XP_B
7033
500k
    2418037380U,  // UQINCP_XP_D
7034
500k
    1881166468U,  // UQINCP_XP_H
7035
500k
    4028650116U,  // UQINCP_XP_S
7036
500k
    1075892868U,  // UQINCP_ZP_D
7037
500k
    1648431748U,  // UQINCP_ZP_H
7038
500k
    1344361092U,  // UQINCP_ZP_S
7039
500k
    2686474739U,  // UQINCW_WPiI
7040
500k
    2686474739U,  // UQINCW_XPiI
7041
500k
    2686540275U,  // UQINCW_ZPiI
7042
500k
    3223360562U,  // UQRSHLR_ZPmZ_B
7043
500k
    3223376946U,  // UQRSHLR_ZPmZ_D
7044
500k
    3519091762U,  // UQRSHLR_ZPmZ_H
7045
500k
    3223409714U,  // UQRSHLR_ZPmZ_S
7046
500k
    3223359526U,  // UQRSHL_ZPmZ_B
7047
500k
    3223375910U,  // UQRSHL_ZPmZ_D
7048
500k
    3519090726U,  // UQRSHL_ZPmZ_H
7049
500k
    3223408678U,  // UQRSHL_ZPmZ_S
7050
500k
    543264806U, // UQRSHLv16i8
7051
500k
    807424038U, // UQRSHLv1i16
7052
500k
    807424038U, // UQRSHLv1i32
7053
500k
    807424038U, // UQRSHLv1i64
7054
500k
    807424038U, // UQRSHLv1i8
7055
500k
    545361958U, // UQRSHLv2i32
7056
500k
    547459110U, // UQRSHLv2i64
7057
500k
    549556262U, // UQRSHLv4i16
7058
500k
    551653414U, // UQRSHLv4i32
7059
500k
    553750566U, // UQRSHLv8i16
7060
500k
    555847718U, // UQRSHLv8i8
7061
500k
    1881179863U,  // UQRSHRNB_ZZI_B
7062
500k
    2172716759U,  // UQRSHRNB_ZZI_H
7063
500k
    2418099927U,  // UQRSHRNB_ZZI_S
7064
500k
    2686490572U,  // UQRSHRNT_ZZI_B
7065
500k
    2174818252U,  // UQRSHRNT_ZZI_H
7066
500k
    1075926988U,  // UQRSHRNT_ZZI_S
7067
500k
    807424466U, // UQRSHRNb
7068
500k
    807424466U, // UQRSHRNh
7069
500k
    807424466U, // UQRSHRNs
7070
500k
    2959212944U,  // UQRSHRNv16i8_shift
7071
500k
    545362386U, // UQRSHRNv2i32_shift
7072
500k
    549556690U, // UQRSHRNv4i16_shift
7073
500k
    2967601552U,  // UQRSHRNv4i32_shift
7074
500k
    2969698704U,  // UQRSHRNv8i16_shift
7075
500k
    555848146U, // UQRSHRNv8i8_shift
7076
500k
    3223360545U,  // UQSHLR_ZPmZ_B
7077
500k
    3223376929U,  // UQSHLR_ZPmZ_D
7078
500k
    3519091745U,  // UQSHLR_ZPmZ_H
7079
500k
    3223409697U,  // UQSHLR_ZPmZ_S
7080
500k
    3223359511U,  // UQSHL_ZPmI_B
7081
500k
    3223375895U,  // UQSHL_ZPmI_D
7082
500k
    3519090711U,  // UQSHL_ZPmI_H
7083
500k
    3223408663U,  // UQSHL_ZPmI_S
7084
500k
    3223359511U,  // UQSHL_ZPmZ_B
7085
500k
    3223375895U,  // UQSHL_ZPmZ_D
7086
500k
    3519090711U,  // UQSHL_ZPmZ_H
7087
500k
    3223408663U,  // UQSHL_ZPmZ_S
7088
500k
    807424023U, // UQSHLb
7089
500k
    807424023U, // UQSHLd
7090
500k
    807424023U, // UQSHLh
7091
500k
    807424023U, // UQSHLs
7092
500k
    543264791U, // UQSHLv16i8
7093
500k
    543264791U, // UQSHLv16i8_shift
7094
500k
    807424023U, // UQSHLv1i16
7095
500k
    807424023U, // UQSHLv1i32
7096
500k
    807424023U, // UQSHLv1i64
7097
500k
    807424023U, // UQSHLv1i8
7098
500k
    545361943U, // UQSHLv2i32
7099
500k
    545361943U, // UQSHLv2i32_shift
7100
500k
    547459095U, // UQSHLv2i64
7101
500k
    547459095U, // UQSHLv2i64_shift
7102
500k
    549556247U, // UQSHLv4i16
7103
500k
    549556247U, // UQSHLv4i16_shift
7104
500k
    551653399U, // UQSHLv4i32
7105
500k
    551653399U, // UQSHLv4i32_shift
7106
500k
    553750551U, // UQSHLv8i16
7107
500k
    553750551U, // UQSHLv8i16_shift
7108
500k
    555847703U, // UQSHLv8i8
7109
500k
    555847703U, // UQSHLv8i8_shift
7110
500k
    1881179844U,  // UQSHRNB_ZZI_B
7111
500k
    2172716740U,  // UQSHRNB_ZZI_H
7112
500k
    2418099908U,  // UQSHRNB_ZZI_S
7113
500k
    2686490553U,  // UQSHRNT_ZZI_B
7114
500k
    2174818233U,  // UQSHRNT_ZZI_H
7115
500k
    1075926969U,  // UQSHRNT_ZZI_S
7116
500k
    807424449U, // UQSHRNb
7117
500k
    807424449U, // UQSHRNh
7118
500k
    807424449U, // UQSHRNs
7119
500k
    2959212925U,  // UQSHRNv16i8_shift
7120
500k
    545362369U, // UQSHRNv2i32_shift
7121
500k
    549556673U, // UQSHRNv4i16_shift
7122
500k
    2967601533U,  // UQSHRNv4i32_shift
7123
500k
    2969698685U,  // UQSHRNv8i16_shift
7124
500k
    555848129U, // UQSHRNv8i8_shift
7125
500k
    3223360467U,  // UQSUBR_ZPmZ_B
7126
500k
    3223376851U,  // UQSUBR_ZPmZ_D
7127
500k
    3519091667U,  // UQSUBR_ZPmZ_H
7128
500k
    3223409619U,  // UQSUBR_ZPmZ_S
7129
500k
    3760228489U,  // UQSUB_ZI_B
7130
500k
    2418067593U,  // UQSUB_ZI_D
7131
500k
    2179008649U,  // UQSUB_ZI_H
7132
500k
    4028713097U,  // UQSUB_ZI_S
7133
500k
    3223357577U,  // UQSUB_ZPmZ_B
7134
500k
    3223373961U,  // UQSUB_ZPmZ_D
7135
500k
    3519088777U,  // UQSUB_ZPmZ_H
7136
500k
    3223406729U,  // UQSUB_ZPmZ_S
7137
500k
    3760228489U,  // UQSUB_ZZZ_B
7138
500k
    2418067593U,  // UQSUB_ZZZ_D
7139
500k
    2179008649U,  // UQSUB_ZZZ_H
7140
500k
    4028713097U,  // UQSUB_ZZZ_S
7141
500k
    543262857U, // UQSUBv16i8
7142
500k
    807422089U, // UQSUBv1i16
7143
500k
    807422089U, // UQSUBv1i32
7144
500k
    807422089U, // UQSUBv1i64
7145
500k
    807422089U, // UQSUBv1i8
7146
500k
    545360009U, // UQSUBv2i32
7147
500k
    547457161U, // UQSUBv2i64
7148
500k
    549554313U, // UQSUBv4i16
7149
500k
    551651465U, // UQSUBv4i32
7150
500k
    553748617U, // UQSUBv8i16
7151
500k
    555845769U, // UQSUBv8i8
7152
500k
    1881179881U,  // UQXTNB_ZZ_B
7153
500k
    1635845865U,  // UQXTNB_ZZ_H
7154
500k
    2418099945U,  // UQXTNB_ZZ_S
7155
500k
    2686490599U,  // UQXTNT_ZZ_B
7156
500k
    1637947367U,  // UQXTNT_ZZ_H
7157
500k
    1075927015U,  // UQXTNT_ZZ_S
7158
500k
    2959212977U,  // UQXTNv16i8
7159
500k
    807424503U, // UQXTNv1i16
7160
500k
    807424503U, // UQXTNv1i32
7161
500k
    807424503U, // UQXTNv1i8
7162
500k
    545362423U, // UQXTNv2i32
7163
500k
    549556727U, // UQXTNv4i16
7164
500k
    2967601585U,  // UQXTNv4i32
7165
500k
    2969698737U,  // UQXTNv8i16
7166
500k
    555848183U, // UQXTNv8i8
7167
500k
    2181817U, // URECPE_ZPmZ_S
7168
500k
    545360569U, // URECPEv2i32
7169
500k
    551652025U, // URECPEv4i32
7170
500k
    3223357919U,  // URHADD_ZPmZ_B
7171
500k
    3223374303U,  // URHADD_ZPmZ_D
7172
500k
    3519089119U,  // URHADD_ZPmZ_H
7173
500k
    3223407071U,  // URHADD_ZPmZ_S
7174
500k
    543263199U, // URHADDv16i8
7175
500k
    545360351U, // URHADDv2i32
7176
500k
    549554655U, // URHADDv4i16
7177
500k
    551651807U, // URHADDv4i32
7178
500k
    553748959U, // URHADDv8i16
7179
500k
    555846111U, // URHADDv8i8
7180
500k
    3223360579U,  // URSHLR_ZPmZ_B
7181
500k
    3223376963U,  // URSHLR_ZPmZ_D
7182
500k
    3519091779U,  // URSHLR_ZPmZ_H
7183
500k
    3223409731U,  // URSHLR_ZPmZ_S
7184
500k
    3223359541U,  // URSHL_ZPmZ_B
7185
500k
    3223375925U,  // URSHL_ZPmZ_D
7186
500k
    3519090741U,  // URSHL_ZPmZ_H
7187
500k
    3223408693U,  // URSHL_ZPmZ_S
7188
500k
    543264821U, // URSHLv16i8
7189
500k
    807424053U, // URSHLv1i64
7190
500k
    545361973U, // URSHLv2i32
7191
500k
    547459125U, // URSHLv2i64
7192
500k
    549556277U, // URSHLv4i16
7193
500k
    551653429U, // URSHLv4i32
7194
500k
    553750581U, // URSHLv8i16
7195
500k
    555847733U, // URSHLv8i8
7196
500k
    3223360506U,  // URSHR_ZPmI_B
7197
500k
    3223376890U,  // URSHR_ZPmI_D
7198
500k
    3519091706U,  // URSHR_ZPmI_H
7199
500k
    3223409658U,  // URSHR_ZPmI_S
7200
500k
    807425018U, // URSHRd
7201
500k
    543265786U, // URSHRv16i8_shift
7202
500k
    545362938U, // URSHRv2i32_shift
7203
500k
    547460090U, // URSHRv2i64_shift
7204
500k
    549557242U, // URSHRv4i16_shift
7205
500k
    551654394U, // URSHRv4i32_shift
7206
500k
    553751546U, // URSHRv8i16_shift
7207
500k
    555848698U, // URSHRv8i8_shift
7208
500k
    2181863U, // URSQRTE_ZPmZ_S
7209
500k
    545360615U, // URSQRTEv2i32
7210
500k
    551652071U, // URSQRTEv4i32
7211
500k
    1344308057U,  // URSRA_ZZI_B
7212
500k
    1075888985U,  // URSRA_ZZI_D
7213
500k
    2185298777U,  // URSRA_ZZI_H
7214
500k
    1344357209U,  // URSRA_ZZI_S
7215
500k
    270746457U, // URSRAd
7216
500k
    2959213401U,  // URSRAv16i8_shift
7217
500k
    2961310553U,  // URSRAv2i32_shift
7218
500k
    2963407705U,  // URSRAv2i64_shift
7219
500k
    2965504857U,  // URSRAv4i16_shift
7220
500k
    2967602009U,  // URSRAv4i32_shift
7221
500k
    2969699161U,  // URSRAv8i16_shift
7222
500k
    2971796313U,  // URSRAv8i8_shift
7223
500k
    1344362531U,  // USDOT_ZZZ
7224
500k
    1344362531U,  // USDOT_ZZZI
7225
500k
    2967607331U,  // USDOTlanev16i8
7226
500k
    2961315875U,  // USDOTlanev8i8
7227
500k
    2967607331U,  // USDOTv16i8
7228
500k
    2961315875U,  // USDOTv8i8
7229
500k
    4028679669U,  // USHLLB_ZZI_D
7230
500k
    2273379829U,  // USHLLB_ZZI_H
7231
500k
    1881228789U,  // USHLLB_ZZI_S
7232
500k
    4028684077U,  // USHLLT_ZZI_D
7233
500k
    2273384237U,  // USHLLT_ZZI_H
7234
500k
    1881233197U,  // USHLLT_ZZI_S
7235
500k
    553746702U, // USHLLv16i8_shift
7236
500k
    547459151U, // USHLLv2i32_shift
7237
500k
    551653455U, // USHLLv4i16_shift
7238
500k
    547455246U, // USHLLv4i32_shift
7239
500k
    551649550U, // USHLLv8i16_shift
7240
500k
    553750607U, // USHLLv8i8_shift
7241
500k
    543264834U, // USHLv16i8
7242
500k
    807424066U, // USHLv1i64
7243
500k
    545361986U, // USHLv2i32
7244
500k
    547459138U, // USHLv2i64
7245
500k
    549556290U, // USHLv4i16
7246
500k
    551653442U, // USHLv4i32
7247
500k
    553750594U, // USHLv8i16
7248
500k
    555847746U, // USHLv8i8
7249
500k
    807425031U, // USHRd
7250
500k
    543265799U, // USHRv16i8_shift
7251
500k
    545362951U, // USHRv2i32_shift
7252
500k
    547460103U, // USHRv2i64_shift
7253
500k
    549557255U, // USHRv4i16_shift
7254
500k
    551654407U, // USHRv4i32_shift
7255
500k
    553751559U, // USHRv8i16_shift
7256
500k
    555848711U, // USHRv8i8_shift
7257
500k
    2967601895U,  // USMMLA
7258
500k
    1344357095U,  // USMMLA_ZZZ
7259
500k
    138527518U, // USMOPA_MPPZZ_D
7260
500k
    140624670U, // USMOPA_MPPZZ_S
7261
500k
    138532316U, // USMOPS_MPPZZ_D
7262
500k
    140629468U, // USMOPS_MPPZZ_S
7263
500k
    3223357956U,  // USQADD_ZPmZ_B
7264
500k
    3223374340U,  // USQADD_ZPmZ_D
7265
500k
    3519089156U,  // USQADD_ZPmZ_H
7266
500k
    3223407108U,  // USQADD_ZPmZ_S
7267
500k
    2959215108U,  // USQADDv16i8
7268
500k
    270748164U, // USQADDv1i16
7269
500k
    270748164U, // USQADDv1i32
7270
500k
    270748164U, // USQADDv1i64
7271
500k
    270748164U, // USQADDv1i8
7272
500k
    2961312260U,  // USQADDv2i32
7273
500k
    2963409412U,  // USQADDv2i64
7274
500k
    2965506564U,  // USQADDv4i16
7275
500k
    2967603716U,  // USQADDv4i32
7276
500k
    2969700868U,  // USQADDv8i16
7277
500k
    2971798020U,  // USQADDv8i8
7278
500k
    1344308070U,  // USRA_ZZI_B
7279
500k
    1075888998U,  // USRA_ZZI_D
7280
500k
    2185298790U,  // USRA_ZZI_H
7281
500k
    1344357222U,  // USRA_ZZI_S
7282
500k
    270746470U, // USRAd
7283
500k
    2959213414U,  // USRAv16i8_shift
7284
500k
    2961310566U,  // USRAv2i32_shift
7285
500k
    2963407718U,  // USRAv2i64_shift
7286
500k
    2965504870U,  // USRAv4i16_shift
7287
500k
    2967602022U,  // USRAv4i32_shift
7288
500k
    2969699174U,  // USRAv8i16_shift
7289
500k
    2971796326U,  // USRAv8i8_shift
7290
500k
    4028679598U,  // USUBLB_ZZZ_D
7291
500k
    2273379758U,  // USUBLB_ZZZ_H
7292
500k
    1881228718U,  // USUBLB_ZZZ_S
7293
500k
    4028684001U,  // USUBLT_ZZZ_D
7294
500k
    2273384161U,  // USUBLT_ZZZ_H
7295
500k
    1881233121U,  // USUBLT_ZZZ_S
7296
500k
    553746654U, // USUBLv16i8_v8i16
7297
500k
    547458999U, // USUBLv2i32_v2i64
7298
500k
    551653303U, // USUBLv4i16_v4i32
7299
500k
    547455198U, // USUBLv4i32_v2i64
7300
500k
    551649502U, // USUBLv8i16_v4i32
7301
500k
    553750455U, // USUBLv8i8_v8i16
7302
500k
    2418067614U,  // USUBWB_ZZZ_D
7303
500k
    2179008670U,  // USUBWB_ZZZ_H
7304
500k
    4028713118U,  // USUBWB_ZZZ_S
7305
500k
    2418071666U,  // USUBWT_ZZZ_D
7306
500k
    2179012722U,  // USUBWT_ZZZ_H
7307
500k
    4028717170U,  // USUBWT_ZZZ_S
7308
500k
    553746944U, // USUBWv16i8_v8i16
7309
500k
    547461579U, // USUBWv2i32_v2i64
7310
500k
    551655883U, // USUBWv4i16_v4i32
7311
500k
    547455488U, // USUBWv4i32_v2i64
7312
500k
    551649792U, // USUBWv8i16_v4i32
7313
500k
    553753035U, // USUBWv8i8_v8i16
7314
500k
    4028681929U,  // UUNPKHI_ZZ_D
7315
500k
    1736511177U,  // UUNPKHI_ZZ_H
7316
500k
    1881231049U,  // UUNPKHI_ZZ_S
7317
500k
    4028682818U,  // UUNPKLO_ZZ_D
7318
500k
    1736512066U,  // UUNPKLO_ZZ_H
7319
500k
    1881231938U,  // UUNPKLO_ZZ_S
7320
500k
    2148441U, // UXTB_ZPmZ_D
7321
500k
    272697433U, // UXTB_ZPmZ_H
7322
500k
    2181209U, // UXTB_ZPmZ_S
7323
500k
    2150025U, // UXTH_ZPmZ_D
7324
500k
    2182793U, // UXTH_ZPmZ_S
7325
500k
    2153101U, // UXTW_ZPmZ_D
7326
500k
    3760226362U,  // UZP1_PPP_B
7327
500k
    2418065466U,  // UZP1_PPP_D
7328
500k
    2179006522U,  // UZP1_PPP_H
7329
500k
    4028710970U,  // UZP1_PPP_S
7330
500k
    3760226362U,  // UZP1_ZZZ_B
7331
500k
    2418065466U,  // UZP1_ZZZ_D
7332
500k
    2179006522U,  // UZP1_ZZZ_H
7333
500k
    2193981498U,  // UZP1_ZZZ_Q
7334
500k
    4028710970U,  // UZP1_ZZZ_S
7335
500k
    543260730U, // UZP1v16i8
7336
500k
    545357882U, // UZP1v2i32
7337
500k
    547455034U, // UZP1v2i64
7338
500k
    549552186U, // UZP1v4i16
7339
500k
    551649338U, // UZP1v4i32
7340
500k
    553746490U, // UZP1v8i16
7341
500k
    555843642U, // UZP1v8i8
7342
500k
    3760226790U,  // UZP2_PPP_B
7343
500k
    2418065894U,  // UZP2_PPP_D
7344
500k
    2179006950U,  // UZP2_PPP_H
7345
500k
    4028711398U,  // UZP2_PPP_S
7346
500k
    3760226790U,  // UZP2_ZZZ_B
7347
500k
    2418065894U,  // UZP2_ZZZ_D
7348
500k
    2179006950U,  // UZP2_ZZZ_H
7349
500k
    2193981926U,  // UZP2_ZZZ_Q
7350
500k
    4028711398U,  // UZP2_ZZZ_S
7351
500k
    543261158U, // UZP2v16i8
7352
500k
    545358310U, // UZP2v2i32
7353
500k
    547455462U, // UZP2v2i64
7354
500k
    549552614U, // UZP2v4i16
7355
500k
    551649766U, // UZP2v4i32
7356
500k
    553746918U, // UZP2v8i16
7357
500k
    555844070U, // UZP2v8i8
7358
500k
    22122U, // WFET
7359
500k
    22176U, // WFIT
7360
500k
    807438948U, // WHILEGE_PWW_B
7361
500k
    807455332U, // WHILEGE_PWW_D
7362
500k
    2191592036U,  // WHILEGE_PWW_H
7363
500k
    807488100U, // WHILEGE_PWW_S
7364
500k
    807438948U, // WHILEGE_PXX_B
7365
500k
    807455332U, // WHILEGE_PXX_D
7366
500k
    2191592036U,  // WHILEGE_PXX_H
7367
500k
    807488100U, // WHILEGE_PXX_S
7368
500k
    807442051U, // WHILEGT_PWW_B
7369
500k
    807458435U, // WHILEGT_PWW_D
7370
500k
    2191595139U,  // WHILEGT_PWW_H
7371
500k
    807491203U, // WHILEGT_PWW_S
7372
500k
    807442051U, // WHILEGT_PXX_B
7373
500k
    807458435U, // WHILEGT_PXX_D
7374
500k
    2191595139U,  // WHILEGT_PXX_H
7375
500k
    807491203U, // WHILEGT_PXX_S
7376
500k
    807440046U, // WHILEHI_PWW_B
7377
500k
    807456430U, // WHILEHI_PWW_D
7378
500k
    2191593134U,  // WHILEHI_PWW_H
7379
500k
    807489198U, // WHILEHI_PWW_S
7380
500k
    807440046U, // WHILEHI_PXX_B
7381
500k
    807456430U, // WHILEHI_PXX_D
7382
500k
    2191593134U,  // WHILEHI_PXX_H
7383
500k
    807489198U, // WHILEHI_PXX_S
7384
500k
    807441771U, // WHILEHS_PWW_B
7385
500k
    807458155U, // WHILEHS_PWW_D
7386
500k
    2191594859U,  // WHILEHS_PWW_H
7387
500k
    807490923U, // WHILEHS_PWW_S
7388
500k
    807441771U, // WHILEHS_PXX_B
7389
500k
    807458155U, // WHILEHS_PXX_D
7390
500k
    2191594859U,  // WHILEHS_PXX_H
7391
500k
    807490923U, // WHILEHS_PXX_S
7392
500k
    807438979U, // WHILELE_PWW_B
7393
500k
    807455363U, // WHILELE_PWW_D
7394
500k
    2191592067U,  // WHILELE_PWW_H
7395
500k
    807488131U, // WHILELE_PWW_S
7396
500k
    807438979U, // WHILELE_PXX_B
7397
500k
    807455363U, // WHILELE_PXX_D
7398
500k
    2191592067U,  // WHILELE_PXX_H
7399
500k
    807488131U, // WHILELE_PXX_S
7400
500k
    807440935U, // WHILELO_PWW_B
7401
500k
    807457319U, // WHILELO_PWW_D
7402
500k
    2191594023U,  // WHILELO_PWW_H
7403
500k
    807490087U, // WHILELO_PWW_S
7404
500k
    807440935U, // WHILELO_PXX_B
7405
500k
    807457319U, // WHILELO_PXX_D
7406
500k
    2191594023U,  // WHILELO_PXX_H
7407
500k
    807490087U, // WHILELO_PXX_S
7408
500k
    807441798U, // WHILELS_PWW_B
7409
500k
    807458182U, // WHILELS_PWW_D
7410
500k
    2191594886U,  // WHILELS_PWW_H
7411
500k
    807490950U, // WHILELS_PWW_S
7412
500k
    807441798U, // WHILELS_PXX_B
7413
500k
    807458182U, // WHILELS_PXX_D
7414
500k
    2191594886U,  // WHILELS_PXX_H
7415
500k
    807490950U, // WHILELS_PXX_S
7416
500k
    807442199U, // WHILELT_PWW_B
7417
500k
    807458583U, // WHILELT_PWW_D
7418
500k
    2191595287U,  // WHILELT_PWW_H
7419
500k
    807491351U, // WHILELT_PWW_S
7420
500k
    807442199U, // WHILELT_PXX_B
7421
500k
    807458583U, // WHILELT_PXX_D
7422
500k
    2191595287U,  // WHILELT_PXX_H
7423
500k
    807491351U, // WHILELT_PXX_S
7424
500k
    807442982U, // WHILERW_PXX_B
7425
500k
    807459366U, // WHILERW_PXX_D
7426
500k
    2191596070U,  // WHILERW_PXX_H
7427
500k
    807492134U, // WHILERW_PXX_S
7428
500k
    807441635U, // WHILEWR_PXX_B
7429
500k
    807458019U, // WHILEWR_PXX_D
7430
500k
    2191594723U,  // WHILEWR_PXX_H
7431
500k
    807490787U, // WHILEWR_PXX_S
7432
500k
    37868U, // WRFFR
7433
500k
    8608U,  // XAFLAG
7434
500k
    547460015U, // XAR
7435
500k
    3760231343U,  // XAR_ZZZI_B
7436
500k
    2418070447U,  // XAR_ZZZI_D
7437
500k
    2179011503U,  // XAR_ZZZI_H
7438
500k
    4028715951U,  // XAR_ZZZI_S
7439
500k
    18836U, // XPACD
7440
500k
    20135U, // XPACI
7441
500k
    7279U,  // XPACLRI
7442
500k
    2959212971U,  // XTNv16i8
7443
500k
    545362418U, // XTNv2i32
7444
500k
    549556722U, // XTNv4i16
7445
500k
    2967601579U,  // XTNv4i32
7446
500k
    2969698731U,  // XTNv8i16
7447
500k
    555848178U, // XTNv8i8
7448
500k
    1102418U, // ZERO_M
7449
500k
    3760226356U,  // ZIP1_PPP_B
7450
500k
    2418065460U,  // ZIP1_PPP_D
7451
500k
    2179006516U,  // ZIP1_PPP_H
7452
500k
    4028710964U,  // ZIP1_PPP_S
7453
500k
    3760226356U,  // ZIP1_ZZZ_B
7454
500k
    2418065460U,  // ZIP1_ZZZ_D
7455
500k
    2179006516U,  // ZIP1_ZZZ_H
7456
500k
    2193981492U,  // ZIP1_ZZZ_Q
7457
500k
    4028710964U,  // ZIP1_ZZZ_S
7458
500k
    543260724U, // ZIP1v16i8
7459
500k
    545357876U, // ZIP1v2i32
7460
500k
    547455028U, // ZIP1v2i64
7461
500k
    549552180U, // ZIP1v4i16
7462
500k
    551649332U, // ZIP1v4i32
7463
500k
    553746484U, // ZIP1v8i16
7464
500k
    555843636U, // ZIP1v8i8
7465
500k
    3760226784U,  // ZIP2_PPP_B
7466
500k
    2418065888U,  // ZIP2_PPP_D
7467
500k
    2179006944U,  // ZIP2_PPP_H
7468
500k
    4028711392U,  // ZIP2_PPP_S
7469
500k
    3760226784U,  // ZIP2_ZZZ_B
7470
500k
    2418065888U,  // ZIP2_ZZZ_D
7471
500k
    2179006944U,  // ZIP2_ZZZ_H
7472
500k
    2193981920U,  // ZIP2_ZZZ_Q
7473
500k
    4028711392U,  // ZIP2_ZZZ_S
7474
500k
    543261152U, // ZIP2v16i8
7475
500k
    545358304U, // ZIP2v2i32
7476
500k
    547455456U, // ZIP2v2i64
7477
500k
    549552608U, // ZIP2v4i16
7478
500k
    551649760U, // ZIP2v4i32
7479
500k
    553746912U, // ZIP2v8i16
7480
500k
    555844064U, // ZIP2v8i8
7481
500k
    138532308U, // anonymous_13987
7482
500k
    138532309U, // anonymous_13988
7483
500k
    138527510U, // anonymous_5384
7484
500k
    138527511U, // anonymous_5385
7485
500k
  };
7486
7487
500k
  static const uint32_t OpInfo1[] = {
7488
500k
    0U, // PHI
7489
500k
    0U, // INLINEASM
7490
500k
    0U, // INLINEASM_BR
7491
500k
    0U, // CFI_INSTRUCTION
7492
500k
    0U, // EH_LABEL
7493
500k
    0U, // GC_LABEL
7494
500k
    0U, // ANNOTATION_LABEL
7495
500k
    0U, // KILL
7496
500k
    0U, // EXTRACT_SUBREG
7497
500k
    0U, // INSERT_SUBREG
7498
500k
    0U, // IMPLICIT_DEF
7499
500k
    0U, // SUBREG_TO_REG
7500
500k
    0U, // COPY_TO_REGCLASS
7501
500k
    0U, // DBG_VALUE
7502
500k
    0U, // DBG_VALUE_LIST
7503
500k
    0U, // DBG_INSTR_REF
7504
500k
    0U, // DBG_PHI
7505
500k
    0U, // DBG_LABEL
7506
500k
    0U, // REG_SEQUENCE
7507
500k
    0U, // COPY
7508
500k
    0U, // BUNDLE
7509
500k
    0U, // LIFETIME_START
7510
500k
    0U, // LIFETIME_END
7511
500k
    0U, // PSEUDO_PROBE
7512
500k
    0U, // ARITH_FENCE
7513
500k
    0U, // STACKMAP
7514
500k
    0U, // FENTRY_CALL
7515
500k
    0U, // PATCHPOINT
7516
500k
    0U, // LOAD_STACK_GUARD
7517
500k
    0U, // PREALLOCATED_SETUP
7518
500k
    0U, // PREALLOCATED_ARG
7519
500k
    0U, // STATEPOINT
7520
500k
    0U, // LOCAL_ESCAPE
7521
500k
    0U, // FAULTING_OP
7522
500k
    0U, // PATCHABLE_OP
7523
500k
    0U, // PATCHABLE_FUNCTION_ENTER
7524
500k
    0U, // PATCHABLE_RET
7525
500k
    0U, // PATCHABLE_FUNCTION_EXIT
7526
500k
    0U, // PATCHABLE_TAIL_CALL
7527
500k
    0U, // PATCHABLE_EVENT_CALL
7528
500k
    0U, // PATCHABLE_TYPED_EVENT_CALL
7529
500k
    0U, // ICALL_BRANCH_FUNNEL
7530
500k
    0U, // G_ASSERT_SEXT
7531
500k
    0U, // G_ASSERT_ZEXT
7532
500k
    0U, // G_ASSERT_ALIGN
7533
500k
    0U, // G_ADD
7534
500k
    0U, // G_SUB
7535
500k
    0U, // G_MUL
7536
500k
    0U, // G_SDIV
7537
500k
    0U, // G_UDIV
7538
500k
    0U, // G_SREM
7539
500k
    0U, // G_UREM
7540
500k
    0U, // G_SDIVREM
7541
500k
    0U, // G_UDIVREM
7542
500k
    0U, // G_AND
7543
500k
    0U, // G_OR
7544
500k
    0U, // G_XOR
7545
500k
    0U, // G_IMPLICIT_DEF
7546
500k
    0U, // G_PHI
7547
500k
    0U, // G_FRAME_INDEX
7548
500k
    0U, // G_GLOBAL_VALUE
7549
500k
    0U, // G_EXTRACT
7550
500k
    0U, // G_UNMERGE_VALUES
7551
500k
    0U, // G_INSERT
7552
500k
    0U, // G_MERGE_VALUES
7553
500k
    0U, // G_BUILD_VECTOR
7554
500k
    0U, // G_BUILD_VECTOR_TRUNC
7555
500k
    0U, // G_CONCAT_VECTORS
7556
500k
    0U, // G_PTRTOINT
7557
500k
    0U, // G_INTTOPTR
7558
500k
    0U, // G_BITCAST
7559
500k
    0U, // G_FREEZE
7560
500k
    0U, // G_INTRINSIC_TRUNC
7561
500k
    0U, // G_INTRINSIC_ROUND
7562
500k
    0U, // G_INTRINSIC_LRINT
7563
500k
    0U, // G_INTRINSIC_ROUNDEVEN
7564
500k
    0U, // G_READCYCLECOUNTER
7565
500k
    0U, // G_LOAD
7566
500k
    0U, // G_SEXTLOAD
7567
500k
    0U, // G_ZEXTLOAD
7568
500k
    0U, // G_INDEXED_LOAD
7569
500k
    0U, // G_INDEXED_SEXTLOAD
7570
500k
    0U, // G_INDEXED_ZEXTLOAD
7571
500k
    0U, // G_STORE
7572
500k
    0U, // G_INDEXED_STORE
7573
500k
    0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
7574
500k
    0U, // G_ATOMIC_CMPXCHG
7575
500k
    0U, // G_ATOMICRMW_XCHG
7576
500k
    0U, // G_ATOMICRMW_ADD
7577
500k
    0U, // G_ATOMICRMW_SUB
7578
500k
    0U, // G_ATOMICRMW_AND
7579
500k
    0U, // G_ATOMICRMW_NAND
7580
500k
    0U, // G_ATOMICRMW_OR
7581
500k
    0U, // G_ATOMICRMW_XOR
7582
500k
    0U, // G_ATOMICRMW_MAX
7583
500k
    0U, // G_ATOMICRMW_MIN
7584
500k
    0U, // G_ATOMICRMW_UMAX
7585
500k
    0U, // G_ATOMICRMW_UMIN
7586
500k
    0U, // G_ATOMICRMW_FADD
7587
500k
    0U, // G_ATOMICRMW_FSUB
7588
500k
    0U, // G_FENCE
7589
500k
    0U, // G_BRCOND
7590
500k
    0U, // G_BRINDIRECT
7591
500k
    0U, // G_INTRINSIC
7592
500k
    0U, // G_INTRINSIC_W_SIDE_EFFECTS
7593
500k
    0U, // G_ANYEXT
7594
500k
    0U, // G_TRUNC
7595
500k
    0U, // G_CONSTANT
7596
500k
    0U, // G_FCONSTANT
7597
500k
    0U, // G_VASTART
7598
500k
    0U, // G_VAARG
7599
500k
    0U, // G_SEXT
7600
500k
    0U, // G_SEXT_INREG
7601
500k
    0U, // G_ZEXT
7602
500k
    0U, // G_SHL
7603
500k
    0U, // G_LSHR
7604
500k
    0U, // G_ASHR
7605
500k
    0U, // G_FSHL
7606
500k
    0U, // G_FSHR
7607
500k
    0U, // G_ROTR
7608
500k
    0U, // G_ROTL
7609
500k
    0U, // G_ICMP
7610
500k
    0U, // G_FCMP
7611
500k
    0U, // G_SELECT
7612
500k
    0U, // G_UADDO
7613
500k
    0U, // G_UADDE
7614
500k
    0U, // G_USUBO
7615
500k
    0U, // G_USUBE
7616
500k
    0U, // G_SADDO
7617
500k
    0U, // G_SADDE
7618
500k
    0U, // G_SSUBO
7619
500k
    0U, // G_SSUBE
7620
500k
    0U, // G_UMULO
7621
500k
    0U, // G_SMULO
7622
500k
    0U, // G_UMULH
7623
500k
    0U, // G_SMULH
7624
500k
    0U, // G_UADDSAT
7625
500k
    0U, // G_SADDSAT
7626
500k
    0U, // G_USUBSAT
7627
500k
    0U, // G_SSUBSAT
7628
500k
    0U, // G_USHLSAT
7629
500k
    0U, // G_SSHLSAT
7630
500k
    0U, // G_SMULFIX
7631
500k
    0U, // G_UMULFIX
7632
500k
    0U, // G_SMULFIXSAT
7633
500k
    0U, // G_UMULFIXSAT
7634
500k
    0U, // G_SDIVFIX
7635
500k
    0U, // G_UDIVFIX
7636
500k
    0U, // G_SDIVFIXSAT
7637
500k
    0U, // G_UDIVFIXSAT
7638
500k
    0U, // G_FADD
7639
500k
    0U, // G_FSUB
7640
500k
    0U, // G_FMUL
7641
500k
    0U, // G_FMA
7642
500k
    0U, // G_FMAD
7643
500k
    0U, // G_FDIV
7644
500k
    0U, // G_FREM
7645
500k
    0U, // G_FPOW
7646
500k
    0U, // G_FPOWI
7647
500k
    0U, // G_FEXP
7648
500k
    0U, // G_FEXP2
7649
500k
    0U, // G_FLOG
7650
500k
    0U, // G_FLOG2
7651
500k
    0U, // G_FLOG10
7652
500k
    0U, // G_FNEG
7653
500k
    0U, // G_FPEXT
7654
500k
    0U, // G_FPTRUNC
7655
500k
    0U, // G_FPTOSI
7656
500k
    0U, // G_FPTOUI
7657
500k
    0U, // G_SITOFP
7658
500k
    0U, // G_UITOFP
7659
500k
    0U, // G_FABS
7660
500k
    0U, // G_FCOPYSIGN
7661
500k
    0U, // G_FCANONICALIZE
7662
500k
    0U, // G_FMINNUM
7663
500k
    0U, // G_FMAXNUM
7664
500k
    0U, // G_FMINNUM_IEEE
7665
500k
    0U, // G_FMAXNUM_IEEE
7666
500k
    0U, // G_FMINIMUM
7667
500k
    0U, // G_FMAXIMUM
7668
500k
    0U, // G_PTR_ADD
7669
500k
    0U, // G_PTRMASK
7670
500k
    0U, // G_SMIN
7671
500k
    0U, // G_SMAX
7672
500k
    0U, // G_UMIN
7673
500k
    0U, // G_UMAX
7674
500k
    0U, // G_ABS
7675
500k
    0U, // G_LROUND
7676
500k
    0U, // G_LLROUND
7677
500k
    0U, // G_BR
7678
500k
    0U, // G_BRJT
7679
500k
    0U, // G_INSERT_VECTOR_ELT
7680
500k
    0U, // G_EXTRACT_VECTOR_ELT
7681
500k
    0U, // G_SHUFFLE_VECTOR
7682
500k
    0U, // G_CTTZ
7683
500k
    0U, // G_CTTZ_ZERO_UNDEF
7684
500k
    0U, // G_CTLZ
7685
500k
    0U, // G_CTLZ_ZERO_UNDEF
7686
500k
    0U, // G_CTPOP
7687
500k
    0U, // G_BSWAP
7688
500k
    0U, // G_BITREVERSE
7689
500k
    0U, // G_FCEIL
7690
500k
    0U, // G_FCOS
7691
500k
    0U, // G_FSIN
7692
500k
    0U, // G_FSQRT
7693
500k
    0U, // G_FFLOOR
7694
500k
    0U, // G_FRINT
7695
500k
    0U, // G_FNEARBYINT
7696
500k
    0U, // G_ADDRSPACE_CAST
7697
500k
    0U, // G_BLOCK_ADDR
7698
500k
    0U, // G_JUMP_TABLE
7699
500k
    0U, // G_DYN_STACKALLOC
7700
500k
    0U, // G_STRICT_FADD
7701
500k
    0U, // G_STRICT_FSUB
7702
500k
    0U, // G_STRICT_FMUL
7703
500k
    0U, // G_STRICT_FDIV
7704
500k
    0U, // G_STRICT_FREM
7705
500k
    0U, // G_STRICT_FMA
7706
500k
    0U, // G_STRICT_FSQRT
7707
500k
    0U, // G_READ_REGISTER
7708
500k
    0U, // G_WRITE_REGISTER
7709
500k
    0U, // G_MEMCPY
7710
500k
    0U, // G_MEMCPY_INLINE
7711
500k
    0U, // G_MEMMOVE
7712
500k
    0U, // G_MEMSET
7713
500k
    0U, // G_BZERO
7714
500k
    0U, // G_VECREDUCE_SEQ_FADD
7715
500k
    0U, // G_VECREDUCE_SEQ_FMUL
7716
500k
    0U, // G_VECREDUCE_FADD
7717
500k
    0U, // G_VECREDUCE_FMUL
7718
500k
    0U, // G_VECREDUCE_FMAX
7719
500k
    0U, // G_VECREDUCE_FMIN
7720
500k
    0U, // G_VECREDUCE_ADD
7721
500k
    0U, // G_VECREDUCE_MUL
7722
500k
    0U, // G_VECREDUCE_AND
7723
500k
    0U, // G_VECREDUCE_OR
7724
500k
    0U, // G_VECREDUCE_XOR
7725
500k
    0U, // G_VECREDUCE_SMAX
7726
500k
    0U, // G_VECREDUCE_SMIN
7727
500k
    0U, // G_VECREDUCE_UMAX
7728
500k
    0U, // G_VECREDUCE_UMIN
7729
500k
    0U, // G_SBFX
7730
500k
    0U, // G_UBFX
7731
500k
    0U, // ABS_ZPmZ_UNDEF_B
7732
500k
    0U, // ABS_ZPmZ_UNDEF_D
7733
500k
    0U, // ABS_ZPmZ_UNDEF_H
7734
500k
    0U, // ABS_ZPmZ_UNDEF_S
7735
500k
    0U, // ADDSWrr
7736
500k
    0U, // ADDSXrr
7737
500k
    0U, // ADDWrr
7738
500k
    0U, // ADDXrr
7739
500k
    0U, // ADD_ZPZZ_UNDEF_B
7740
500k
    0U, // ADD_ZPZZ_UNDEF_D
7741
500k
    0U, // ADD_ZPZZ_UNDEF_H
7742
500k
    0U, // ADD_ZPZZ_UNDEF_S
7743
500k
    0U, // ADD_ZPZZ_ZERO_B
7744
500k
    0U, // ADD_ZPZZ_ZERO_D
7745
500k
    0U, // ADD_ZPZZ_ZERO_H
7746
500k
    0U, // ADD_ZPZZ_ZERO_S
7747
500k
    0U, // ADDlowTLS
7748
500k
    0U, // ADJCALLSTACKDOWN
7749
500k
    0U, // ADJCALLSTACKUP
7750
500k
    0U, // AESIMCrrTied
7751
500k
    0U, // AESMCrrTied
7752
500k
    0U, // ANDSWrr
7753
500k
    0U, // ANDSXrr
7754
500k
    0U, // ANDWrr
7755
500k
    0U, // ANDXrr
7756
500k
    0U, // ASRD_ZPZI_ZERO_B
7757
500k
    0U, // ASRD_ZPZI_ZERO_D
7758
500k
    0U, // ASRD_ZPZI_ZERO_H
7759
500k
    0U, // ASRD_ZPZI_ZERO_S
7760
500k
    0U, // ASR_ZPZI_UNDEF_B
7761
500k
    0U, // ASR_ZPZI_UNDEF_D
7762
500k
    0U, // ASR_ZPZI_UNDEF_H
7763
500k
    0U, // ASR_ZPZI_UNDEF_S
7764
500k
    0U, // ASR_ZPZZ_UNDEF_B
7765
500k
    0U, // ASR_ZPZZ_UNDEF_D
7766
500k
    0U, // ASR_ZPZZ_UNDEF_H
7767
500k
    0U, // ASR_ZPZZ_UNDEF_S
7768
500k
    0U, // ASR_ZPZZ_ZERO_B
7769
500k
    0U, // ASR_ZPZZ_ZERO_D
7770
500k
    0U, // ASR_ZPZZ_ZERO_H
7771
500k
    0U, // ASR_ZPZZ_ZERO_S
7772
500k
    0U, // BICSWrr
7773
500k
    0U, // BICSXrr
7774
500k
    0U, // BICWrr
7775
500k
    0U, // BICXrr
7776
500k
    0U, // BLRNoIP
7777
500k
    0U, // BLR_BTI
7778
500k
    0U, // BLR_RVMARKER
7779
500k
    0U, // BSPv16i8
7780
500k
    0U, // BSPv8i8
7781
500k
    0U, // CATCHRET
7782
500k
    0U, // CLEANUPRET
7783
500k
    0U, // CLS_ZPmZ_UNDEF_B
7784
500k
    0U, // CLS_ZPmZ_UNDEF_D
7785
500k
    0U, // CLS_ZPmZ_UNDEF_H
7786
500k
    0U, // CLS_ZPmZ_UNDEF_S
7787
500k
    0U, // CLZ_ZPmZ_UNDEF_B
7788
500k
    0U, // CLZ_ZPmZ_UNDEF_D
7789
500k
    0U, // CLZ_ZPmZ_UNDEF_H
7790
500k
    0U, // CLZ_ZPmZ_UNDEF_S
7791
500k
    0U, // CMP_SWAP_128
7792
500k
    0U, // CMP_SWAP_128_ACQUIRE
7793
500k
    0U, // CMP_SWAP_128_MONOTONIC
7794
500k
    0U, // CMP_SWAP_128_RELEASE
7795
500k
    0U, // CMP_SWAP_16
7796
500k
    0U, // CMP_SWAP_32
7797
500k
    0U, // CMP_SWAP_64
7798
500k
    0U, // CMP_SWAP_8
7799
500k
    0U, // CNOT_ZPmZ_UNDEF_B
7800
500k
    0U, // CNOT_ZPmZ_UNDEF_D
7801
500k
    0U, // CNOT_ZPmZ_UNDEF_H
7802
500k
    0U, // CNOT_ZPmZ_UNDEF_S
7803
500k
    0U, // CNT_ZPmZ_UNDEF_B
7804
500k
    0U, // CNT_ZPmZ_UNDEF_D
7805
500k
    0U, // CNT_ZPmZ_UNDEF_H
7806
500k
    0U, // CNT_ZPmZ_UNDEF_S
7807
500k
    0U, // CompilerBarrier
7808
500k
    0U, // EMITBKEY
7809
500k
    0U, // EONWrr
7810
500k
    0U, // EONXrr
7811
500k
    0U, // EORWrr
7812
500k
    0U, // EORXrr
7813
500k
    0U, // F128CSEL
7814
500k
    0U, // FABD_ZPZZ_UNDEF_D
7815
500k
    0U, // FABD_ZPZZ_UNDEF_H
7816
500k
    0U, // FABD_ZPZZ_UNDEF_S
7817
500k
    0U, // FABD_ZPZZ_ZERO_D
7818
500k
    0U, // FABD_ZPZZ_ZERO_H
7819
500k
    0U, // FABD_ZPZZ_ZERO_S
7820
500k
    0U, // FABS_ZPmZ_UNDEF_D
7821
500k
    0U, // FABS_ZPmZ_UNDEF_H
7822
500k
    0U, // FABS_ZPmZ_UNDEF_S
7823
500k
    0U, // FADD_ZPZI_UNDEF_D
7824
500k
    0U, // FADD_ZPZI_UNDEF_H
7825
500k
    0U, // FADD_ZPZI_UNDEF_S
7826
500k
    0U, // FADD_ZPZI_ZERO_D
7827
500k
    0U, // FADD_ZPZI_ZERO_H
7828
500k
    0U, // FADD_ZPZI_ZERO_S
7829
500k
    0U, // FADD_ZPZZ_UNDEF_D
7830
500k
    0U, // FADD_ZPZZ_UNDEF_H
7831
500k
    0U, // FADD_ZPZZ_UNDEF_S
7832
500k
    0U, // FADD_ZPZZ_ZERO_D
7833
500k
    0U, // FADD_ZPZZ_ZERO_H
7834
500k
    0U, // FADD_ZPZZ_ZERO_S
7835
500k
    0U, // FCVTZS_ZPmZ_DtoD_UNDEF
7836
500k
    0U, // FCVTZS_ZPmZ_DtoS_UNDEF
7837
500k
    0U, // FCVTZS_ZPmZ_HtoD_UNDEF
7838
500k
    0U, // FCVTZS_ZPmZ_HtoH_UNDEF
7839
500k
    0U, // FCVTZS_ZPmZ_HtoS_UNDEF
7840
500k
    0U, // FCVTZS_ZPmZ_StoD_UNDEF
7841
500k
    0U, // FCVTZS_ZPmZ_StoS_UNDEF
7842
500k
    0U, // FCVTZU_ZPmZ_DtoD_UNDEF
7843
500k
    0U, // FCVTZU_ZPmZ_DtoS_UNDEF
7844
500k
    0U, // FCVTZU_ZPmZ_HtoD_UNDEF
7845
500k
    0U, // FCVTZU_ZPmZ_HtoH_UNDEF
7846
500k
    0U, // FCVTZU_ZPmZ_HtoS_UNDEF
7847
500k
    0U, // FCVTZU_ZPmZ_StoD_UNDEF
7848
500k
    0U, // FCVTZU_ZPmZ_StoS_UNDEF
7849
500k
    0U, // FCVT_ZPmZ_DtoH_UNDEF
7850
500k
    0U, // FCVT_ZPmZ_DtoS_UNDEF
7851
500k
    0U, // FCVT_ZPmZ_HtoD_UNDEF
7852
500k
    0U, // FCVT_ZPmZ_HtoS_UNDEF
7853
500k
    0U, // FCVT_ZPmZ_StoD_UNDEF
7854
500k
    0U, // FCVT_ZPmZ_StoH_UNDEF
7855
500k
    0U, // FDIVR_ZPZZ_ZERO_D
7856
500k
    0U, // FDIVR_ZPZZ_ZERO_H
7857
500k
    0U, // FDIVR_ZPZZ_ZERO_S
7858
500k
    0U, // FDIV_ZPZZ_UNDEF_D
7859
500k
    0U, // FDIV_ZPZZ_UNDEF_H
7860
500k
    0U, // FDIV_ZPZZ_UNDEF_S
7861
500k
    0U, // FDIV_ZPZZ_ZERO_D
7862
500k
    0U, // FDIV_ZPZZ_ZERO_H
7863
500k
    0U, // FDIV_ZPZZ_ZERO_S
7864
500k
    0U, // FMAXNM_ZPZI_UNDEF_D
7865
500k
    0U, // FMAXNM_ZPZI_UNDEF_H
7866
500k
    0U, // FMAXNM_ZPZI_UNDEF_S
7867
500k
    0U, // FMAXNM_ZPZI_ZERO_D
7868
500k
    0U, // FMAXNM_ZPZI_ZERO_H
7869
500k
    0U, // FMAXNM_ZPZI_ZERO_S
7870
500k
    0U, // FMAXNM_ZPZZ_UNDEF_D
7871
500k
    0U, // FMAXNM_ZPZZ_UNDEF_H
7872
500k
    0U, // FMAXNM_ZPZZ_UNDEF_S
7873
500k
    0U, // FMAXNM_ZPZZ_ZERO_D
7874
500k
    0U, // FMAXNM_ZPZZ_ZERO_H
7875
500k
    0U, // FMAXNM_ZPZZ_ZERO_S
7876
500k
    0U, // FMAX_ZPZI_UNDEF_D
7877
500k
    0U, // FMAX_ZPZI_UNDEF_H
7878
500k
    0U, // FMAX_ZPZI_UNDEF_S
7879
500k
    0U, // FMAX_ZPZI_ZERO_D
7880
500k
    0U, // FMAX_ZPZI_ZERO_H
7881
500k
    0U, // FMAX_ZPZI_ZERO_S
7882
500k
    0U, // FMAX_ZPZZ_UNDEF_D
7883
500k
    0U, // FMAX_ZPZZ_UNDEF_H
7884
500k
    0U, // FMAX_ZPZZ_UNDEF_S
7885
500k
    0U, // FMAX_ZPZZ_ZERO_D
7886
500k
    0U, // FMAX_ZPZZ_ZERO_H
7887
500k
    0U, // FMAX_ZPZZ_ZERO_S
7888
500k
    0U, // FMINNM_ZPZI_UNDEF_D
7889
500k
    0U, // FMINNM_ZPZI_UNDEF_H
7890
500k
    0U, // FMINNM_ZPZI_UNDEF_S
7891
500k
    0U, // FMINNM_ZPZI_ZERO_D
7892
500k
    0U, // FMINNM_ZPZI_ZERO_H
7893
500k
    0U, // FMINNM_ZPZI_ZERO_S
7894
500k
    0U, // FMINNM_ZPZZ_UNDEF_D
7895
500k
    0U, // FMINNM_ZPZZ_UNDEF_H
7896
500k
    0U, // FMINNM_ZPZZ_UNDEF_S
7897
500k
    0U, // FMINNM_ZPZZ_ZERO_D
7898
500k
    0U, // FMINNM_ZPZZ_ZERO_H
7899
500k
    0U, // FMINNM_ZPZZ_ZERO_S
7900
500k
    0U, // FMIN_ZPZI_UNDEF_D
7901
500k
    0U, // FMIN_ZPZI_UNDEF_H
7902
500k
    0U, // FMIN_ZPZI_UNDEF_S
7903
500k
    0U, // FMIN_ZPZI_ZERO_D
7904
500k
    0U, // FMIN_ZPZI_ZERO_H
7905
500k
    0U, // FMIN_ZPZI_ZERO_S
7906
500k
    0U, // FMIN_ZPZZ_UNDEF_D
7907
500k
    0U, // FMIN_ZPZZ_UNDEF_H
7908
500k
    0U, // FMIN_ZPZZ_UNDEF_S
7909
500k
    0U, // FMIN_ZPZZ_ZERO_D
7910
500k
    0U, // FMIN_ZPZZ_ZERO_H
7911
500k
    0U, // FMIN_ZPZZ_ZERO_S
7912
500k
    0U, // FMLA_ZPZZZ_UNDEF_D
7913
500k
    0U, // FMLA_ZPZZZ_UNDEF_H
7914
500k
    0U, // FMLA_ZPZZZ_UNDEF_S
7915
500k
    0U, // FMLS_ZPZZZ_UNDEF_D
7916
500k
    0U, // FMLS_ZPZZZ_UNDEF_H
7917
500k
    0U, // FMLS_ZPZZZ_UNDEF_S
7918
500k
    0U, // FMOVD0
7919
500k
    0U, // FMOVH0
7920
500k
    0U, // FMOVS0
7921
500k
    0U, // FMULX_ZPZZ_ZERO_D
7922
500k
    0U, // FMULX_ZPZZ_ZERO_H
7923
500k
    0U, // FMULX_ZPZZ_ZERO_S
7924
500k
    0U, // FMUL_ZPZI_UNDEF_D
7925
500k
    0U, // FMUL_ZPZI_UNDEF_H
7926
500k
    0U, // FMUL_ZPZI_UNDEF_S
7927
500k
    0U, // FMUL_ZPZI_ZERO_D
7928
500k
    0U, // FMUL_ZPZI_ZERO_H
7929
500k
    0U, // FMUL_ZPZI_ZERO_S
7930
500k
    0U, // FMUL_ZPZZ_UNDEF_D
7931
500k
    0U, // FMUL_ZPZZ_UNDEF_H
7932
500k
    0U, // FMUL_ZPZZ_UNDEF_S
7933
500k
    0U, // FMUL_ZPZZ_ZERO_D
7934
500k
    0U, // FMUL_ZPZZ_ZERO_H
7935
500k
    0U, // FMUL_ZPZZ_ZERO_S
7936
500k
    0U, // FNEG_ZPmZ_UNDEF_D
7937
500k
    0U, // FNEG_ZPmZ_UNDEF_H
7938
500k
    0U, // FNEG_ZPmZ_UNDEF_S
7939
500k
    0U, // FNMLA_ZPZZZ_UNDEF_D
7940
500k
    0U, // FNMLA_ZPZZZ_UNDEF_H
7941
500k
    0U, // FNMLA_ZPZZZ_UNDEF_S
7942
500k
    0U, // FNMLS_ZPZZZ_UNDEF_D
7943
500k
    0U, // FNMLS_ZPZZZ_UNDEF_H
7944
500k
    0U, // FNMLS_ZPZZZ_UNDEF_S
7945
500k
    0U, // FRECPX_ZPmZ_UNDEF_D
7946
500k
    0U, // FRECPX_ZPmZ_UNDEF_H
7947
500k
    0U, // FRECPX_ZPmZ_UNDEF_S
7948
500k
    0U, // FRINTA_ZPmZ_UNDEF_D
7949
500k
    0U, // FRINTA_ZPmZ_UNDEF_H
7950
500k
    0U, // FRINTA_ZPmZ_UNDEF_S
7951
500k
    0U, // FRINTI_ZPmZ_UNDEF_D
7952
500k
    0U, // FRINTI_ZPmZ_UNDEF_H
7953
500k
    0U, // FRINTI_ZPmZ_UNDEF_S
7954
500k
    0U, // FRINTM_ZPmZ_UNDEF_D
7955
500k
    0U, // FRINTM_ZPmZ_UNDEF_H
7956
500k
    0U, // FRINTM_ZPmZ_UNDEF_S
7957
500k
    0U, // FRINTN_ZPmZ_UNDEF_D
7958
500k
    0U, // FRINTN_ZPmZ_UNDEF_H
7959
500k
    0U, // FRINTN_ZPmZ_UNDEF_S
7960
500k
    0U, // FRINTP_ZPmZ_UNDEF_D
7961
500k
    0U, // FRINTP_ZPmZ_UNDEF_H
7962
500k
    0U, // FRINTP_ZPmZ_UNDEF_S
7963
500k
    0U, // FRINTX_ZPmZ_UNDEF_D
7964
500k
    0U, // FRINTX_ZPmZ_UNDEF_H
7965
500k
    0U, // FRINTX_ZPmZ_UNDEF_S
7966
500k
    0U, // FRINTZ_ZPmZ_UNDEF_D
7967
500k
    0U, // FRINTZ_ZPmZ_UNDEF_H
7968
500k
    0U, // FRINTZ_ZPmZ_UNDEF_S
7969
500k
    0U, // FSQRT_ZPmZ_UNDEF_D
7970
500k
    0U, // FSQRT_ZPmZ_UNDEF_H
7971
500k
    0U, // FSQRT_ZPmZ_UNDEF_S
7972
500k
    0U, // FSUBR_ZPZI_UNDEF_D
7973
500k
    0U, // FSUBR_ZPZI_UNDEF_H
7974
500k
    0U, // FSUBR_ZPZI_UNDEF_S
7975
500k
    0U, // FSUBR_ZPZI_ZERO_D
7976
500k
    0U, // FSUBR_ZPZI_ZERO_H
7977
500k
    0U, // FSUBR_ZPZI_ZERO_S
7978
500k
    0U, // FSUBR_ZPZZ_ZERO_D
7979
500k
    0U, // FSUBR_ZPZZ_ZERO_H
7980
500k
    0U, // FSUBR_ZPZZ_ZERO_S
7981
500k
    0U, // FSUB_ZPZI_UNDEF_D
7982
500k
    0U, // FSUB_ZPZI_UNDEF_H
7983
500k
    0U, // FSUB_ZPZI_UNDEF_S
7984
500k
    0U, // FSUB_ZPZI_ZERO_D
7985
500k
    0U, // FSUB_ZPZI_ZERO_H
7986
500k
    0U, // FSUB_ZPZI_ZERO_S
7987
500k
    0U, // FSUB_ZPZZ_UNDEF_D
7988
500k
    0U, // FSUB_ZPZZ_UNDEF_H
7989
500k
    0U, // FSUB_ZPZZ_UNDEF_S
7990
500k
    0U, // FSUB_ZPZZ_ZERO_D
7991
500k
    0U, // FSUB_ZPZZ_ZERO_H
7992
500k
    0U, // FSUB_ZPZZ_ZERO_S
7993
500k
    0U, // GLD1B_D
7994
500k
    0U, // GLD1B_D_IMM
7995
500k
    0U, // GLD1B_D_SXTW
7996
500k
    0U, // GLD1B_D_UXTW
7997
500k
    0U, // GLD1B_S_IMM
7998
500k
    0U, // GLD1B_S_SXTW
7999
500k
    0U, // GLD1B_S_UXTW
8000
500k
    0U, // GLD1D
8001
500k
    0U, // GLD1D_IMM
8002
500k
    0U, // GLD1D_SCALED
8003
500k
    0U, // GLD1D_SXTW
8004
500k
    0U, // GLD1D_SXTW_SCALED
8005
500k
    0U, // GLD1D_UXTW
8006
500k
    0U, // GLD1D_UXTW_SCALED
8007
500k
    0U, // GLD1H_D
8008
500k
    0U, // GLD1H_D_IMM
8009
500k
    0U, // GLD1H_D_SCALED
8010
500k
    0U, // GLD1H_D_SXTW
8011
500k
    0U, // GLD1H_D_SXTW_SCALED
8012
500k
    0U, // GLD1H_D_UXTW
8013
500k
    0U, // GLD1H_D_UXTW_SCALED
8014
500k
    0U, // GLD1H_S_IMM
8015
500k
    0U, // GLD1H_S_SXTW
8016
500k
    0U, // GLD1H_S_SXTW_SCALED
8017
500k
    0U, // GLD1H_S_UXTW
8018
500k
    0U, // GLD1H_S_UXTW_SCALED
8019
500k
    0U, // GLD1SB_D
8020
500k
    0U, // GLD1SB_D_IMM
8021
500k
    0U, // GLD1SB_D_SXTW
8022
500k
    0U, // GLD1SB_D_UXTW
8023
500k
    0U, // GLD1SB_S_IMM
8024
500k
    0U, // GLD1SB_S_SXTW
8025
500k
    0U, // GLD1SB_S_UXTW
8026
500k
    0U, // GLD1SH_D
8027
500k
    0U, // GLD1SH_D_IMM
8028
500k
    0U, // GLD1SH_D_SCALED
8029
500k
    0U, // GLD1SH_D_SXTW
8030
500k
    0U, // GLD1SH_D_SXTW_SCALED
8031
500k
    0U, // GLD1SH_D_UXTW
8032
500k
    0U, // GLD1SH_D_UXTW_SCALED
8033
500k
    0U, // GLD1SH_S_IMM
8034
500k
    0U, // GLD1SH_S_SXTW
8035
500k
    0U, // GLD1SH_S_SXTW_SCALED
8036
500k
    0U, // GLD1SH_S_UXTW
8037
500k
    0U, // GLD1SH_S_UXTW_SCALED
8038
500k
    0U, // GLD1SW_D
8039
500k
    0U, // GLD1SW_D_IMM
8040
500k
    0U, // GLD1SW_D_SCALED
8041
500k
    0U, // GLD1SW_D_SXTW
8042
500k
    0U, // GLD1SW_D_SXTW_SCALED
8043
500k
    0U, // GLD1SW_D_UXTW
8044
500k
    0U, // GLD1SW_D_UXTW_SCALED
8045
500k
    0U, // GLD1W_D
8046
500k
    0U, // GLD1W_D_IMM
8047
500k
    0U, // GLD1W_D_SCALED
8048
500k
    0U, // GLD1W_D_SXTW
8049
500k
    0U, // GLD1W_D_SXTW_SCALED
8050
500k
    0U, // GLD1W_D_UXTW
8051
500k
    0U, // GLD1W_D_UXTW_SCALED
8052
500k
    0U, // GLD1W_IMM
8053
500k
    0U, // GLD1W_SXTW
8054
500k
    0U, // GLD1W_SXTW_SCALED
8055
500k
    0U, // GLD1W_UXTW
8056
500k
    0U, // GLD1W_UXTW_SCALED
8057
500k
    0U, // GLDFF1B_D
8058
500k
    0U, // GLDFF1B_D_IMM
8059
500k
    0U, // GLDFF1B_D_SXTW
8060
500k
    0U, // GLDFF1B_D_UXTW
8061
500k
    0U, // GLDFF1B_S_IMM
8062
500k
    0U, // GLDFF1B_S_SXTW
8063
500k
    0U, // GLDFF1B_S_UXTW
8064
500k
    0U, // GLDFF1D
8065
500k
    0U, // GLDFF1D_IMM
8066
500k
    0U, // GLDFF1D_SCALED
8067
500k
    0U, // GLDFF1D_SXTW
8068
500k
    0U, // GLDFF1D_SXTW_SCALED
8069
500k
    0U, // GLDFF1D_UXTW
8070
500k
    0U, // GLDFF1D_UXTW_SCALED
8071
500k
    0U, // GLDFF1H_D
8072
500k
    0U, // GLDFF1H_D_IMM
8073
500k
    0U, // GLDFF1H_D_SCALED
8074
500k
    0U, // GLDFF1H_D_SXTW
8075
500k
    0U, // GLDFF1H_D_SXTW_SCALED
8076
500k
    0U, // GLDFF1H_D_UXTW
8077
500k
    0U, // GLDFF1H_D_UXTW_SCALED
8078
500k
    0U, // GLDFF1H_S_IMM
8079
500k
    0U, // GLDFF1H_S_SXTW
8080
500k
    0U, // GLDFF1H_S_SXTW_SCALED
8081
500k
    0U, // GLDFF1H_S_UXTW
8082
500k
    0U, // GLDFF1H_S_UXTW_SCALED
8083
500k
    0U, // GLDFF1SB_D
8084
500k
    0U, // GLDFF1SB_D_IMM
8085
500k
    0U, // GLDFF1SB_D_SXTW
8086
500k
    0U, // GLDFF1SB_D_UXTW
8087
500k
    0U, // GLDFF1SB_S_IMM
8088
500k
    0U, // GLDFF1SB_S_SXTW
8089
500k
    0U, // GLDFF1SB_S_UXTW
8090
500k
    0U, // GLDFF1SH_D
8091
500k
    0U, // GLDFF1SH_D_IMM
8092
500k
    0U, // GLDFF1SH_D_SCALED
8093
500k
    0U, // GLDFF1SH_D_SXTW
8094
500k
    0U, // GLDFF1SH_D_SXTW_SCALED
8095
500k
    0U, // GLDFF1SH_D_UXTW
8096
500k
    0U, // GLDFF1SH_D_UXTW_SCALED
8097
500k
    0U, // GLDFF1SH_S_IMM
8098
500k
    0U, // GLDFF1SH_S_SXTW
8099
500k
    0U, // GLDFF1SH_S_SXTW_SCALED
8100
500k
    0U, // GLDFF1SH_S_UXTW
8101
500k
    0U, // GLDFF1SH_S_UXTW_SCALED
8102
500k
    0U, // GLDFF1SW_D
8103
500k
    0U, // GLDFF1SW_D_IMM
8104
500k
    0U, // GLDFF1SW_D_SCALED
8105
500k
    0U, // GLDFF1SW_D_SXTW
8106
500k
    0U, // GLDFF1SW_D_SXTW_SCALED
8107
500k
    0U, // GLDFF1SW_D_UXTW
8108
500k
    0U, // GLDFF1SW_D_UXTW_SCALED
8109
500k
    0U, // GLDFF1W_D
8110
500k
    0U, // GLDFF1W_D_IMM
8111
500k
    0U, // GLDFF1W_D_SCALED
8112
500k
    0U, // GLDFF1W_D_SXTW
8113
500k
    0U, // GLDFF1W_D_SXTW_SCALED
8114
500k
    0U, // GLDFF1W_D_UXTW
8115
500k
    0U, // GLDFF1W_D_UXTW_SCALED
8116
500k
    0U, // GLDFF1W_IMM
8117
500k
    0U, // GLDFF1W_SXTW
8118
500k
    0U, // GLDFF1W_SXTW_SCALED
8119
500k
    0U, // GLDFF1W_UXTW
8120
500k
    0U, // GLDFF1W_UXTW_SCALED
8121
500k
    0U, // G_ADD_LOW
8122
500k
    0U, // G_DUP
8123
500k
    0U, // G_DUPLANE16
8124
500k
    0U, // G_DUPLANE32
8125
500k
    0U, // G_DUPLANE64
8126
500k
    0U, // G_DUPLANE8
8127
500k
    0U, // G_EXT
8128
500k
    0U, // G_FCMEQ
8129
500k
    0U, // G_FCMEQZ
8130
500k
    0U, // G_FCMGE
8131
500k
    0U, // G_FCMGEZ
8132
500k
    0U, // G_FCMGT
8133
500k
    0U, // G_FCMGTZ
8134
500k
    0U, // G_FCMLEZ
8135
500k
    0U, // G_FCMLTZ
8136
500k
    0U, // G_REV16
8137
500k
    0U, // G_REV32
8138
500k
    0U, // G_REV64
8139
500k
    0U, // G_SITOF
8140
500k
    0U, // G_TRN1
8141
500k
    0U, // G_TRN2
8142
500k
    0U, // G_UITOF
8143
500k
    0U, // G_UZP1
8144
500k
    0U, // G_UZP2
8145
500k
    0U, // G_VASHR
8146
500k
    0U, // G_VLSHR
8147
500k
    0U, // G_ZIP1
8148
500k
    0U, // G_ZIP2
8149
500k
    0U, // HOM_Epilog
8150
500k
    0U, // HOM_Prolog
8151
500k
    0U, // HWASAN_CHECK_MEMACCESS
8152
500k
    0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES
8153
500k
    0U, // IRGstack
8154
500k
    0U, // JumpTableDest16
8155
500k
    0U, // JumpTableDest32
8156
500k
    0U, // JumpTableDest8
8157
500k
    0U, // LD1B_D_IMM
8158
500k
    0U, // LD1B_H_IMM
8159
500k
    0U, // LD1B_IMM
8160
500k
    0U, // LD1B_S_IMM
8161
500k
    0U, // LD1D_IMM
8162
500k
    0U, // LD1H_D_IMM
8163
500k
    0U, // LD1H_IMM
8164
500k
    0U, // LD1H_S_IMM
8165
500k
    0U, // LD1SB_D_IMM
8166
500k
    0U, // LD1SB_H_IMM
8167
500k
    0U, // LD1SB_S_IMM
8168
500k
    0U, // LD1SH_D_IMM
8169
500k
    0U, // LD1SH_S_IMM
8170
500k
    0U, // LD1SW_D_IMM
8171
500k
    0U, // LD1W_D_IMM
8172
500k
    0U, // LD1W_IMM
8173
500k
    0U, // LDFF1B
8174
500k
    0U, // LDFF1B_D
8175
500k
    0U, // LDFF1B_H
8176
500k
    0U, // LDFF1B_S
8177
500k
    0U, // LDFF1D
8178
500k
    0U, // LDFF1H
8179
500k
    0U, // LDFF1H_D
8180
500k
    0U, // LDFF1H_S
8181
500k
    0U, // LDFF1SB_D
8182
500k
    0U, // LDFF1SB_H
8183
500k
    0U, // LDFF1SB_S
8184
500k
    0U, // LDFF1SH_D
8185
500k
    0U, // LDFF1SH_S
8186
500k
    0U, // LDFF1SW_D
8187
500k
    0U, // LDFF1W
8188
500k
    0U, // LDFF1W_D
8189
500k
    0U, // LDNF1B_D_IMM
8190
500k
    0U, // LDNF1B_H_IMM
8191
500k
    0U, // LDNF1B_IMM
8192
500k
    0U, // LDNF1B_S_IMM
8193
500k
    0U, // LDNF1D_IMM
8194
500k
    0U, // LDNF1H_D_IMM
8195
500k
    0U, // LDNF1H_IMM
8196
500k
    0U, // LDNF1H_S_IMM
8197
500k
    0U, // LDNF1SB_D_IMM
8198
500k
    0U, // LDNF1SB_H_IMM
8199
500k
    0U, // LDNF1SB_S_IMM
8200
500k
    0U, // LDNF1SH_D_IMM
8201
500k
    0U, // LDNF1SH_S_IMM
8202
500k
    0U, // LDNF1SW_D_IMM
8203
500k
    0U, // LDNF1W_D_IMM
8204
500k
    0U, // LDNF1W_IMM
8205
500k
    0U, // LDR_ZZXI
8206
500k
    0U, // LDR_ZZZXI
8207
500k
    0U, // LDR_ZZZZXI
8208
500k
    0U, // LOADgot
8209
500k
    0U, // LSL_ZPZI_UNDEF_B
8210
500k
    0U, // LSL_ZPZI_UNDEF_D
8211
500k
    0U, // LSL_ZPZI_UNDEF_H
8212
500k
    0U, // LSL_ZPZI_UNDEF_S
8213
500k
    0U, // LSL_ZPZZ_UNDEF_B
8214
500k
    0U, // LSL_ZPZZ_UNDEF_D
8215
500k
    0U, // LSL_ZPZZ_UNDEF_H
8216
500k
    0U, // LSL_ZPZZ_UNDEF_S
8217
500k
    0U, // LSL_ZPZZ_ZERO_B
8218
500k
    0U, // LSL_ZPZZ_ZERO_D
8219
500k
    0U, // LSL_ZPZZ_ZERO_H
8220
500k
    0U, // LSL_ZPZZ_ZERO_S
8221
500k
    0U, // LSR_ZPZI_UNDEF_B
8222
500k
    0U, // LSR_ZPZI_UNDEF_D
8223
500k
    0U, // LSR_ZPZI_UNDEF_H
8224
500k
    0U, // LSR_ZPZI_UNDEF_S
8225
500k
    0U, // LSR_ZPZZ_UNDEF_B
8226
500k
    0U, // LSR_ZPZZ_UNDEF_D
8227
500k
    0U, // LSR_ZPZZ_UNDEF_H
8228
500k
    0U, // LSR_ZPZZ_UNDEF_S
8229
500k
    0U, // LSR_ZPZZ_ZERO_B
8230
500k
    0U, // LSR_ZPZZ_ZERO_D
8231
500k
    0U, // LSR_ZPZZ_ZERO_H
8232
500k
    0U, // LSR_ZPZZ_ZERO_S
8233
500k
    0U, // MOPSMemoryCopyPseudo
8234
500k
    0U, // MOPSMemoryMovePseudo
8235
500k
    0U, // MOPSMemorySetPseudo
8236
500k
    0U, // MOPSMemorySetTaggingPseudo
8237
500k
    0U, // MOVMCSym
8238
500k
    0U, // MOVaddr
8239
500k
    0U, // MOVaddrBA
8240
500k
    0U, // MOVaddrCP
8241
500k
    0U, // MOVaddrEXT
8242
500k
    0U, // MOVaddrJT
8243
500k
    0U, // MOVaddrTLS
8244
500k
    0U, // MOVbaseTLS
8245
500k
    0U, // MOVi32imm
8246
500k
    0U, // MOVi64imm
8247
500k
    0U, // MUL_ZPZZ_UNDEF_B
8248
500k
    0U, // MUL_ZPZZ_UNDEF_D
8249
500k
    0U, // MUL_ZPZZ_UNDEF_H
8250
500k
    0U, // MUL_ZPZZ_UNDEF_S
8251
500k
    0U, // NEG_ZPmZ_UNDEF_B
8252
500k
    0U, // NEG_ZPmZ_UNDEF_D
8253
500k
    0U, // NEG_ZPmZ_UNDEF_H
8254
500k
    0U, // NEG_ZPmZ_UNDEF_S
8255
500k
    0U, // NOT_ZPmZ_UNDEF_B
8256
500k
    0U, // NOT_ZPmZ_UNDEF_D
8257
500k
    0U, // NOT_ZPmZ_UNDEF_H
8258
500k
    0U, // NOT_ZPmZ_UNDEF_S
8259
500k
    0U, // ORNWrr
8260
500k
    0U, // ORNXrr
8261
500k
    0U, // ORRWrr
8262
500k
    0U, // ORRXrr
8263
500k
    0U, // RDFFR_P
8264
500k
    0U, // RDFFR_PPz
8265
500k
    0U, // RET_ReallyLR
8266
500k
    0U, // SABD_ZPZZ_UNDEF_B
8267
500k
    0U, // SABD_ZPZZ_UNDEF_D
8268
500k
    0U, // SABD_ZPZZ_UNDEF_H
8269
500k
    0U, // SABD_ZPZZ_UNDEF_S
8270
500k
    0U, // SCVTF_ZPmZ_DtoD_UNDEF
8271
500k
    0U, // SCVTF_ZPmZ_DtoH_UNDEF
8272
500k
    0U, // SCVTF_ZPmZ_DtoS_UNDEF
8273
500k
    0U, // SCVTF_ZPmZ_HtoH_UNDEF
8274
500k
    0U, // SCVTF_ZPmZ_StoD_UNDEF
8275
500k
    0U, // SCVTF_ZPmZ_StoH_UNDEF
8276
500k
    0U, // SCVTF_ZPmZ_StoS_UNDEF
8277
500k
    0U, // SDIV_ZPZZ_UNDEF_D
8278
500k
    0U, // SDIV_ZPZZ_UNDEF_S
8279
500k
    0U, // SEH_AddFP
8280
500k
    0U, // SEH_EpilogEnd
8281
500k
    0U, // SEH_EpilogStart
8282
500k
    0U, // SEH_Nop
8283
500k
    0U, // SEH_PrologEnd
8284
500k
    0U, // SEH_SaveFPLR
8285
500k
    0U, // SEH_SaveFPLR_X
8286
500k
    0U, // SEH_SaveFReg
8287
500k
    0U, // SEH_SaveFRegP
8288
500k
    0U, // SEH_SaveFRegP_X
8289
500k
    0U, // SEH_SaveFReg_X
8290
500k
    0U, // SEH_SaveReg
8291
500k
    0U, // SEH_SaveRegP
8292
500k
    0U, // SEH_SaveRegP_X
8293
500k
    0U, // SEH_SaveReg_X
8294
500k
    0U, // SEH_SetFP
8295
500k
    0U, // SEH_StackAlloc
8296
500k
    0U, // SMAX_ZPZZ_UNDEF_B
8297
500k
    0U, // SMAX_ZPZZ_UNDEF_D
8298
500k
    0U, // SMAX_ZPZZ_UNDEF_H
8299
500k
    0U, // SMAX_ZPZZ_UNDEF_S
8300
500k
    0U, // SMIN_ZPZZ_UNDEF_B
8301
500k
    0U, // SMIN_ZPZZ_UNDEF_D
8302
500k
    0U, // SMIN_ZPZZ_UNDEF_H
8303
500k
    0U, // SMIN_ZPZZ_UNDEF_S
8304
500k
    0U, // SMULH_ZPZZ_UNDEF_B
8305
500k
    0U, // SMULH_ZPZZ_UNDEF_D
8306
500k
    0U, // SMULH_ZPZZ_UNDEF_H
8307
500k
    0U, // SMULH_ZPZZ_UNDEF_S
8308
500k
    0U, // SPACE
8309
500k
    0U, // SQABS_ZPmZ_UNDEF_B
8310
500k
    0U, // SQABS_ZPmZ_UNDEF_D
8311
500k
    0U, // SQABS_ZPmZ_UNDEF_H
8312
500k
    0U, // SQABS_ZPmZ_UNDEF_S
8313
500k
    0U, // SQNEG_ZPmZ_UNDEF_B
8314
500k
    0U, // SQNEG_ZPmZ_UNDEF_D
8315
500k
    0U, // SQNEG_ZPmZ_UNDEF_H
8316
500k
    0U, // SQNEG_ZPmZ_UNDEF_S
8317
500k
    0U, // SQRSHL_ZPZZ_UNDEF_B
8318
500k
    0U, // SQRSHL_ZPZZ_UNDEF_D
8319
500k
    0U, // SQRSHL_ZPZZ_UNDEF_H
8320
500k
    0U, // SQRSHL_ZPZZ_UNDEF_S
8321
500k
    0U, // SQSHLU_ZPZI_ZERO_B
8322
500k
    0U, // SQSHLU_ZPZI_ZERO_D
8323
500k
    0U, // SQSHLU_ZPZI_ZERO_H
8324
500k
    0U, // SQSHLU_ZPZI_ZERO_S
8325
500k
    0U, // SQSHL_ZPZI_ZERO_B
8326
500k
    0U, // SQSHL_ZPZI_ZERO_D
8327
500k
    0U, // SQSHL_ZPZI_ZERO_H
8328
500k
    0U, // SQSHL_ZPZI_ZERO_S
8329
500k
    0U, // SQSHL_ZPZZ_UNDEF_B
8330
500k
    0U, // SQSHL_ZPZZ_UNDEF_D
8331
500k
    0U, // SQSHL_ZPZZ_UNDEF_H
8332
500k
    0U, // SQSHL_ZPZZ_UNDEF_S
8333
500k
    0U, // SRSHL_ZPZZ_UNDEF_B
8334
500k
    0U, // SRSHL_ZPZZ_UNDEF_D
8335
500k
    0U, // SRSHL_ZPZZ_UNDEF_H
8336
500k
    0U, // SRSHL_ZPZZ_UNDEF_S
8337
500k
    0U, // SRSHR_ZPZI_ZERO_B
8338
500k
    0U, // SRSHR_ZPZI_ZERO_D
8339
500k
    0U, // SRSHR_ZPZI_ZERO_H
8340
500k
    0U, // SRSHR_ZPZI_ZERO_S
8341
500k
    0U, // STGloop
8342
500k
    0U, // STGloop_wback
8343
500k
    0U, // STR_ZZXI
8344
500k
    0U, // STR_ZZZXI
8345
500k
    0U, // STR_ZZZZXI
8346
500k
    0U, // STZGloop
8347
500k
    0U, // STZGloop_wback
8348
500k
    0U, // SUBR_ZPZZ_ZERO_B
8349
500k
    0U, // SUBR_ZPZZ_ZERO_D
8350
500k
    0U, // SUBR_ZPZZ_ZERO_H
8351
500k
    0U, // SUBR_ZPZZ_ZERO_S
8352
500k
    0U, // SUBSWrr
8353
500k
    0U, // SUBSXrr
8354
500k
    0U, // SUBWrr
8355
500k
    0U, // SUBXrr
8356
500k
    0U, // SUB_ZPZZ_UNDEF_B
8357
500k
    0U, // SUB_ZPZZ_UNDEF_D
8358
500k
    0U, // SUB_ZPZZ_UNDEF_H
8359
500k
    0U, // SUB_ZPZZ_UNDEF_S
8360
500k
    0U, // SUB_ZPZZ_ZERO_B
8361
500k
    0U, // SUB_ZPZZ_ZERO_D
8362
500k
    0U, // SUB_ZPZZ_ZERO_H
8363
500k
    0U, // SUB_ZPZZ_ZERO_S
8364
500k
    0U, // SXTB_ZPmZ_UNDEF_D
8365
500k
    0U, // SXTB_ZPmZ_UNDEF_H
8366
500k
    0U, // SXTB_ZPmZ_UNDEF_S
8367
500k
    0U, // SXTH_ZPmZ_UNDEF_D
8368
500k
    0U, // SXTH_ZPmZ_UNDEF_S
8369
500k
    0U, // SXTW_ZPmZ_UNDEF_D
8370
500k
    0U, // SpeculationBarrierISBDSBEndBB
8371
500k
    0U, // SpeculationBarrierSBEndBB
8372
500k
    0U, // SpeculationSafeValueW
8373
500k
    0U, // SpeculationSafeValueX
8374
500k
    0U, // StoreSwiftAsyncContext
8375
500k
    0U, // TAGPstack
8376
500k
    0U, // TCRETURNdi
8377
500k
    0U, // TCRETURNri
8378
500k
    0U, // TCRETURNriALL
8379
500k
    0U, // TCRETURNriBTI
8380
500k
    0U, // TLSDESCCALL
8381
500k
    0U, // TLSDESC_CALLSEQ
8382
500k
    0U, // UABD_ZPZZ_UNDEF_B
8383
500k
    0U, // UABD_ZPZZ_UNDEF_D
8384
500k
    0U, // UABD_ZPZZ_UNDEF_H
8385
500k
    0U, // UABD_ZPZZ_UNDEF_S
8386
500k
    0U, // UCVTF_ZPmZ_DtoD_UNDEF
8387
500k
    0U, // UCVTF_ZPmZ_DtoH_UNDEF
8388
500k
    0U, // UCVTF_ZPmZ_DtoS_UNDEF
8389
500k
    0U, // UCVTF_ZPmZ_HtoH_UNDEF
8390
500k
    0U, // UCVTF_ZPmZ_StoD_UNDEF
8391
500k
    0U, // UCVTF_ZPmZ_StoH_UNDEF
8392
500k
    0U, // UCVTF_ZPmZ_StoS_UNDEF
8393
500k
    0U, // UDIV_ZPZZ_UNDEF_D
8394
500k
    0U, // UDIV_ZPZZ_UNDEF_S
8395
500k
    0U, // UMAX_ZPZZ_UNDEF_B
8396
500k
    0U, // UMAX_ZPZZ_UNDEF_D
8397
500k
    0U, // UMAX_ZPZZ_UNDEF_H
8398
500k
    0U, // UMAX_ZPZZ_UNDEF_S
8399
500k
    0U, // UMIN_ZPZZ_UNDEF_B
8400
500k
    0U, // UMIN_ZPZZ_UNDEF_D
8401
500k
    0U, // UMIN_ZPZZ_UNDEF_H
8402
500k
    0U, // UMIN_ZPZZ_UNDEF_S
8403
500k
    0U, // UMULH_ZPZZ_UNDEF_B
8404
500k
    0U, // UMULH_ZPZZ_UNDEF_D
8405
500k
    0U, // UMULH_ZPZZ_UNDEF_H
8406
500k
    0U, // UMULH_ZPZZ_UNDEF_S
8407
500k
    0U, // UQRSHL_ZPZZ_UNDEF_B
8408
500k
    0U, // UQRSHL_ZPZZ_UNDEF_D
8409
500k
    0U, // UQRSHL_ZPZZ_UNDEF_H
8410
500k
    0U, // UQRSHL_ZPZZ_UNDEF_S
8411
500k
    0U, // UQSHL_ZPZI_ZERO_B
8412
500k
    0U, // UQSHL_ZPZI_ZERO_D
8413
500k
    0U, // UQSHL_ZPZI_ZERO_H
8414
500k
    0U, // UQSHL_ZPZI_ZERO_S
8415
500k
    0U, // UQSHL_ZPZZ_UNDEF_B
8416
500k
    0U, // UQSHL_ZPZZ_UNDEF_D
8417
500k
    0U, // UQSHL_ZPZZ_UNDEF_H
8418
500k
    0U, // UQSHL_ZPZZ_UNDEF_S
8419
500k
    0U, // URECPE_ZPmZ_UNDEF_S
8420
500k
    0U, // URSHL_ZPZZ_UNDEF_B
8421
500k
    0U, // URSHL_ZPZZ_UNDEF_D
8422
500k
    0U, // URSHL_ZPZZ_UNDEF_H
8423
500k
    0U, // URSHL_ZPZZ_UNDEF_S
8424
500k
    0U, // URSHR_ZPZI_ZERO_B
8425
500k
    0U, // URSHR_ZPZI_ZERO_D
8426
500k
    0U, // URSHR_ZPZI_ZERO_H
8427
500k
    0U, // URSHR_ZPZI_ZERO_S
8428
500k
    0U, // URSQRTE_ZPmZ_UNDEF_S
8429
500k
    0U, // UXTB_ZPmZ_UNDEF_D
8430
500k
    0U, // UXTB_ZPmZ_UNDEF_H
8431
500k
    0U, // UXTB_ZPmZ_UNDEF_S
8432
500k
    0U, // UXTH_ZPmZ_UNDEF_D
8433
500k
    0U, // UXTH_ZPmZ_UNDEF_S
8434
500k
    0U, // UXTW_ZPmZ_UNDEF_D
8435
500k
    0U, // ABS_ZPmZ_B
8436
500k
    8U, // ABS_ZPmZ_D
8437
500k
    0U, // ABS_ZPmZ_H
8438
500k
    16U,  // ABS_ZPmZ_S
8439
500k
    24U,  // ABSv16i8
8440
500k
    32U,  // ABSv1i64
8441
500k
    40U,  // ABSv2i32
8442
500k
    48U,  // ABSv2i64
8443
500k
    56U,  // ABSv4i16
8444
500k
    64U,  // ABSv4i32
8445
500k
    72U,  // ABSv8i16
8446
500k
    80U,  // ABSv8i8
8447
500k
    1112U,  // ADCLB_ZZZ_D
8448
500k
    2136U,  // ADCLB_ZZZ_S
8449
500k
    1112U,  // ADCLT_ZZZ_D
8450
500k
    2136U,  // ADCLT_ZZZ_S
8451
500k
    3160U,  // ADCSWr
8452
500k
    3160U,  // ADCSXr
8453
500k
    3160U,  // ADCWr
8454
500k
    3160U,  // ADCXr
8455
500k
    135256U,  // ADDG
8456
500k
    0U, // ADDHA_MPPZ_D
8457
500k
    0U, // ADDHA_MPPZ_S
8458
500k
    5208U,  // ADDHNB_ZZZ_B
8459
500k
    96U,  // ADDHNB_ZZZ_H
8460
500k
    6232U,  // ADDHNB_ZZZ_S
8461
500k
    7256U,  // ADDHNT_ZZZ_B
8462
500k
    16U,  // ADDHNT_ZZZ_H
8463
500k
    1112U,  // ADDHNT_ZZZ_S
8464
500k
    270440U,  // ADDHNv2i64_v2i32
8465
500k
    271464U,  // ADDHNv2i64_v4i32
8466
500k
    401520U,  // ADDHNv4i32_v4i16
8467
500k
    402544U,  // ADDHNv4i32_v8i16
8468
500k
    533624U,  // ADDHNv8i16_v16i8
8469
500k
    532600U,  // ADDHNv8i16_v8i8
8470
500k
    3160U,  // ADDPL_XXI
8471
500k
    8530048U, // ADDP_ZPmZ_B
8472
500k
    16914560U,  // ADDP_ZPmZ_D
8473
500k
    25832584U,  // ADDP_ZPmZ_H
8474
500k
    33697920U,  // ADDP_ZPmZ_S
8475
500k
    794768U,  // ADDPv16i8
8476
500k
    925848U,  // ADDPv2i32
8477
500k
    270440U,  // ADDPv2i64
8478
500k
    48U,  // ADDPv2i64p
8479
500k
    1056928U, // ADDPv4i16
8480
500k
    401520U,  // ADDPv4i32
8481
500k
    532600U,  // ADDPv8i16
8482
500k
    1188008U, // ADDPv8i8
8483
500k
    13400U, // ADDSWri
8484
500k
    14424U, // ADDSWrs
8485
500k
    15448U, // ADDSWrx
8486
500k
    13400U, // ADDSXri
8487
500k
    14424U, // ADDSXrs
8488
500k
    15448U, // ADDSXrx
8489
500k
    1313880U, // ADDSXrx64
8490
500k
    0U, // ADDVA_MPPZ_D
8491
500k
    0U, // ADDVA_MPPZ_S
8492
500k
    3160U,  // ADDVL_XXI
8493
500k
    24U,  // ADDVv16i8v
8494
500k
    56U,  // ADDVv4i16v
8495
500k
    64U,  // ADDVv4i32v
8496
500k
    72U,  // ADDVv8i16v
8497
500k
    80U,  // ADDVv8i8v
8498
500k
    13400U, // ADDWri
8499
500k
    14424U, // ADDWrs
8500
500k
    15448U, // ADDWrx
8501
500k
    13400U, // ADDXri
8502
500k
    14424U, // ADDXrs
8503
500k
    15448U, // ADDXrx
8504
500k
    1313880U, // ADDXrx64
8505
500k
    16472U, // ADD_ZI_B
8506
500k
    17496U, // ADD_ZI_D
8507
500k
    176U, // ADD_ZI_H
8508
500k
    18520U, // ADD_ZI_S
8509
500k
    8530048U, // ADD_ZPmZ_B
8510
500k
    16914560U,  // ADD_ZPmZ_D
8511
500k
    25832584U,  // ADD_ZPmZ_H
8512
500k
    33697920U,  // ADD_ZPmZ_S
8513
500k
    10328U, // ADD_ZZZ_B
8514
500k
    6232U,  // ADD_ZZZ_D
8515
500k
    136U, // ADD_ZZZ_H
8516
500k
    12376U, // ADD_ZZZ_S
8517
500k
    794768U,  // ADDv16i8
8518
500k
    3160U,  // ADDv1i64
8519
500k
    925848U,  // ADDv2i32
8520
500k
    270440U,  // ADDv2i64
8521
500k
    1056928U, // ADDv4i16
8522
500k
    401520U,  // ADDv4i32
8523
500k
    532600U,  // ADDv8i16
8524
500k
    1188008U, // ADDv8i8
8525
500k
    32U,  // ADR
8526
500k
    1U, // ADRP
8527
500k
    19544U, // ADR_LSL_ZZZ_D_0
8528
500k
    20568U, // ADR_LSL_ZZZ_D_1
8529
500k
    21592U, // ADR_LSL_ZZZ_D_2
8530
500k
    22616U, // ADR_LSL_ZZZ_D_3
8531
500k
    23640U, // ADR_LSL_ZZZ_S_0
8532
500k
    24664U, // ADR_LSL_ZZZ_S_1
8533
500k
    25688U, // ADR_LSL_ZZZ_S_2
8534
500k
    26712U, // ADR_LSL_ZZZ_S_3
8535
500k
    27736U, // ADR_SXTW_ZZZ_D_0
8536
500k
    28760U, // ADR_SXTW_ZZZ_D_1
8537
500k
    29784U, // ADR_SXTW_ZZZ_D_2
8538
500k
    30808U, // ADR_SXTW_ZZZ_D_3
8539
500k
    31832U, // ADR_UXTW_ZZZ_D_0
8540
500k
    32856U, // ADR_UXTW_ZZZ_D_1
8541
500k
    33880U, // ADR_UXTW_ZZZ_D_2
8542
500k
    34904U, // ADR_UXTW_ZZZ_D_3
8543
500k
    10328U, // AESD_ZZZ_B
8544
500k
    24U,  // AESDrr
8545
500k
    10328U, // AESE_ZZZ_B
8546
500k
    24U,  // AESErr
8547
500k
    32U,  // AESIMC_ZZ_B
8548
500k
    24U,  // AESIMCrr
8549
500k
    32U,  // AESMC_ZZ_B
8550
500k
    24U,  // AESMCrr
8551
500k
    35928U, // ANDSWri
8552
500k
    14424U, // ANDSWrs
8553
500k
    36952U, // ANDSXri
8554
500k
    14424U, // ANDSXrs
8555
500k
    8530104U, // ANDS_PPzPP
8556
500k
    0U, // ANDV_VPZ_B
8557
500k
    0U, // ANDV_VPZ_D
8558
500k
    0U, // ANDV_VPZ_H
8559
500k
    0U, // ANDV_VPZ_S
8560
500k
    35928U, // ANDWri
8561
500k
    14424U, // ANDWrs
8562
500k
    36952U, // ANDXri
8563
500k
    14424U, // ANDXrs
8564
500k
    8530104U, // AND_PPzPP
8565
500k
    36952U, // AND_ZI
8566
500k
    8530048U, // AND_ZPmZ_B
8567
500k
    16914560U,  // AND_ZPmZ_D
8568
500k
    25832584U,  // AND_ZPmZ_H
8569
500k
    33697920U,  // AND_ZPmZ_S
8570
500k
    6232U,  // AND_ZZZ
8571
500k
    794768U,  // ANDv16i8
8572
500k
    1188008U, // ANDv8i8
8573
500k
    141440U,  // ASRD_ZPmI_B
8574
500k
    137344U,  // ASRD_ZPmI_D
8575
500k
    1453192U, // ASRD_ZPmI_H
8576
500k
    143488U,  // ASRD_ZPmI_S
8577
500k
    8530048U, // ASRR_ZPmZ_B
8578
500k
    16914560U,  // ASRR_ZPmZ_D
8579
500k
    25832584U,  // ASRR_ZPmZ_H
8580
500k
    33697920U,  // ASRR_ZPmZ_S
8581
500k
    3160U,  // ASRVWr
8582
500k
    3160U,  // ASRVXr
8583
500k
    16918656U,  // ASR_WIDE_ZPmZ_B
8584
500k
    1584264U, // ASR_WIDE_ZPmZ_H
8585
500k
    16920704U,  // ASR_WIDE_ZPmZ_S
8586
500k
    6232U,  // ASR_WIDE_ZZZ_B
8587
500k
    192U, // ASR_WIDE_ZZZ_H
8588
500k
    6232U,  // ASR_WIDE_ZZZ_S
8589
500k
    141440U,  // ASR_ZPmI_B
8590
500k
    137344U,  // ASR_ZPmI_D
8591
500k
    1453192U, // ASR_ZPmI_H
8592
500k
    143488U,  // ASR_ZPmI_S
8593
500k
    8530048U, // ASR_ZPmZ_B
8594
500k
    16914560U,  // ASR_ZPmZ_D
8595
500k
    25832584U,  // ASR_ZPmZ_H
8596
500k
    33697920U,  // ASR_ZPmZ_S
8597
500k
    3160U,  // ASR_ZZI_B
8598
500k
    3160U,  // ASR_ZZI_D
8599
500k
    200U, // ASR_ZZI_H
8600
500k
    3160U,  // ASR_ZZI_S
8601
500k
    33U,  // AUTDA
8602
500k
    33U,  // AUTDB
8603
500k
    0U, // AUTDZA
8604
500k
    0U, // AUTDZB
8605
500k
    33U,  // AUTIA
8606
500k
    0U, // AUTIA1716
8607
500k
    0U, // AUTIASP
8608
500k
    0U, // AUTIAZ
8609
500k
    33U,  // AUTIB
8610
500k
    0U, // AUTIB1716
8611
500k
    0U, // AUTIBSP
8612
500k
    0U, // AUTIBZ
8613
500k
    0U, // AUTIZA
8614
500k
    0U, // AUTIZB
8615
500k
    0U, // AXFLAG
8616
500k
    0U, // B
8617
500k
    580526224U, // BCAX
8618
500k
    16914520U,  // BCAX_ZZZZ
8619
500k
    0U, // BCcc
8620
500k
    10328U, // BDEP_ZZZ_B
8621
500k
    6232U,  // BDEP_ZZZ_D
8622
500k
    136U, // BDEP_ZZZ_H
8623
500k
    12376U, // BDEP_ZZZ_S
8624
500k
    10328U, // BEXT_ZZZ_B
8625
500k
    6232U,  // BEXT_ZZZ_D
8626
500k
    136U, // BEXT_ZZZ_H
8627
500k
    12376U, // BEXT_ZZZ_S
8628
500k
    1844384U, // BF16DOTlanev4bf16
8629
500k
    1844344U, // BF16DOTlanev8bf16
8630
500k
    32U,  // BFCVT
8631
500k
    64U,  // BFCVTN
8632
500k
    64U,  // BFCVTN2
8633
500k
    1U, // BFCVTNT_ZPmZ
8634
500k
    1U, // BFCVT_ZPmZ
8635
500k
    27139160U,  // BFDOT_ZZI
8636
500k
    7256U,  // BFDOT_ZZZ
8637
500k
    1057952U, // BFDOTv4bf16
8638
500k
    533624U,  // BFDOTv8bf16
8639
500k
    533624U,  // BFMLALB
8640
500k
    52438136U,  // BFMLALBIdx
8641
500k
    533624U,  // BFMLALT
8642
500k
    52438136U,  // BFMLALTIdx
8643
500k
    533624U,  // BFMMLA
8644
500k
    27139160U,  // BFMMLA_B_ZZI
8645
500k
    7256U,  // BFMMLA_B_ZZZ
8646
500k
    27139160U,  // BFMMLA_T_ZZI
8647
500k
    7256U,  // BFMMLA_T_ZZZ
8648
500k
    7256U,  // BFMMLA_ZZZ
8649
500k
    58889305U,  // BFMWri
8650
500k
    58889305U,  // BFMXri
8651
500k
    10328U, // BGRP_ZZZ_B
8652
500k
    6232U,  // BGRP_ZZZ_D
8653
500k
    136U, // BGRP_ZZZ_H
8654
500k
    12376U, // BGRP_ZZZ_S
8655
500k
    14424U, // BICSWrs
8656
500k
    14424U, // BICSXrs
8657
500k
    8530104U, // BICS_PPzPP
8658
500k
    14424U, // BICWrs
8659
500k
    14424U, // BICXrs
8660
500k
    8530104U, // BIC_PPzPP
8661
500k
    8530048U, // BIC_ZPmZ_B
8662
500k
    16914560U,  // BIC_ZPmZ_D
8663
500k
    25832584U,  // BIC_ZPmZ_H
8664
500k
    33697920U,  // BIC_ZPmZ_S
8665
500k
    6232U,  // BIC_ZZZ
8666
500k
    794768U,  // BICv16i8
8667
500k
    1U, // BICv2i32
8668
500k
    1U, // BICv4i16
8669
500k
    1U, // BICv4i32
8670
500k
    1U, // BICv8i16
8671
500k
    1188008U, // BICv8i8
8672
500k
    795792U,  // BIFv16i8
8673
500k
    1189032U, // BIFv8i8
8674
500k
    795792U,  // BITv16i8
8675
500k
    1189032U, // BITv8i8
8676
500k
    0U, // BL
8677
500k
    0U, // BLR
8678
500k
    32U,  // BLRAA
8679
500k
    0U, // BLRAAZ
8680
500k
    32U,  // BLRAB
8681
500k
    0U, // BLRABZ
8682
500k
    0U, // BR
8683
500k
    32U,  // BRAA
8684
500k
    0U, // BRAAZ
8685
500k
    32U,  // BRAB
8686
500k
    0U, // BRABZ
8687
500k
    0U, // BRB_IALL
8688
500k
    0U, // BRB_INJ
8689
500k
    0U, // BRK
8690
500k
    10424U, // BRKAS_PPzP
8691
500k
    0U, // BRKA_PPmP
8692
500k
    10424U, // BRKA_PPzP
8693
500k
    10424U, // BRKBS_PPzP
8694
500k
    0U, // BRKB_PPmP
8695
500k
    10424U, // BRKB_PPzP
8696
500k
    8530104U, // BRKNS_PPzP
8697
500k
    8530104U, // BRKN_PPzP
8698
500k
    8530104U, // BRKPAS_PPzPP
8699
500k
    8530104U, // BRKPA_PPzPP
8700
500k
    8530104U, // BRKPBS_PPzPP
8701
500k
    8530104U, // BRKPB_PPzPP
8702
500k
    16914520U,  // BSL1N_ZZZZ
8703
500k
    16914520U,  // BSL2N_ZZZZ
8704
500k
    16914520U,  // BSL_ZZZZ
8705
500k
    795792U,  // BSLv16i8
8706
500k
    1189032U, // BSLv8i8
8707
500k
    0U, // Bcc
8708
500k
    67250264U,  // CADD_ZZI_B
8709
500k
    67246168U,  // CADD_ZZI_D
8710
500k
    2239624U, // CADD_ZZI_H
8711
500k
    67252312U,  // CADD_ZZI_S
8712
500k
    2397393U, // CASAB
8713
500k
    2397393U, // CASAH
8714
500k
    2397393U, // CASALB
8715
500k
    2397393U, // CASALH
8716
500k
    2397393U, // CASALW
8717
500k
    2397393U, // CASALX
8718
500k
    2397393U, // CASAW
8719
500k
    2397393U, // CASAX
8720
500k
    2397393U, // CASB
8721
500k
    2397393U, // CASH
8722
500k
    2397393U, // CASLB
8723
500k
    2397393U, // CASLH
8724
500k
    2397393U, // CASLW
8725
500k
    2397393U, // CASLX
8726
500k
    0U, // CASPALW
8727
500k
    0U, // CASPALX
8728
500k
    0U, // CASPAW
8729
500k
    0U, // CASPAX
8730
500k
    0U, // CASPLW
8731
500k
    0U, // CASPLX
8732
500k
    0U, // CASPW
8733
500k
    0U, // CASPX
8734
500k
    2397393U, // CASW
8735
500k
    2397393U, // CASX
8736
500k
    1U, // CBNZW
8737
500k
    1U, // CBNZX
8738
500k
    1U, // CBZW
8739
500k
    1U, // CBZX
8740
500k
    75631704U,  // CCMNWi
8741
500k
    75631704U,  // CCMNWr
8742
500k
    75631704U,  // CCMNXi
8743
500k
    75631704U,  // CCMNXr
8744
500k
    75631704U,  // CCMPWi
8745
500k
    75631704U,  // CCMPWr
8746
500k
    75631704U,  // CCMPXi
8747
500k
    75631704U,  // CCMPXr
8748
500k
    1159601240U,  // CDOT_ZZZI_D
8749
500k
    92444673U,  // CDOT_ZZZI_S
8750
500k
    100801624U, // CDOT_ZZZ_D
8751
500k
    2501633U, // CDOT_ZZZ_S
8752
500k
    0U, // CFINV
8753
500k
    8522840U, // CLASTA_RPZ_B
8754
500k
    16911448U,  // CLASTA_RPZ_D
8755
500k
    109186136U, // CLASTA_RPZ_H
8756
500k
    33688664U,  // CLASTA_RPZ_S
8757
500k
    8522840U, // CLASTA_VPZ_B
8758
500k
    16911448U,  // CLASTA_VPZ_D
8759
500k
    109186136U, // CLASTA_VPZ_H
8760
500k
    33688664U,  // CLASTA_VPZ_S
8761
500k
    8530008U, // CLASTA_ZPZ_B
8762
500k
    16914520U,  // CLASTA_ZPZ_D
8763
500k
    25832584U,  // CLASTA_ZPZ_H
8764
500k
    33697880U,  // CLASTA_ZPZ_S
8765
500k
    8522840U, // CLASTB_RPZ_B
8766
500k
    16911448U,  // CLASTB_RPZ_D
8767
500k
    109186136U, // CLASTB_RPZ_H
8768
500k
    33688664U,  // CLASTB_RPZ_S
8769
500k
    8522840U, // CLASTB_VPZ_B
8770
500k
    16911448U,  // CLASTB_VPZ_D
8771
500k
    109186136U, // CLASTB_VPZ_H
8772
500k
    33688664U,  // CLASTB_VPZ_S
8773
500k
    8530008U, // CLASTB_ZPZ_B
8774
500k
    16914520U,  // CLASTB_ZPZ_D
8775
500k
    25832584U,  // CLASTB_ZPZ_H
8776
500k
    33697880U,  // CLASTB_ZPZ_S
8777
500k
    0U, // CLREX
8778
500k
    32U,  // CLSWr
8779
500k
    32U,  // CLSXr
8780
500k
    0U, // CLS_ZPmZ_B
8781
500k
    8U, // CLS_ZPmZ_D
8782
500k
    0U, // CLS_ZPmZ_H
8783
500k
    16U,  // CLS_ZPmZ_S
8784
500k
    24U,  // CLSv16i8
8785
500k
    40U,  // CLSv2i32
8786
500k
    56U,  // CLSv4i16
8787
500k
    64U,  // CLSv4i32
8788
500k
    72U,  // CLSv8i16
8789
500k
    80U,  // CLSv8i8
8790
500k
    32U,  // CLZWr
8791
500k
    32U,  // CLZXr
8792
500k
    0U, // CLZ_ZPmZ_B
8793
500k
    8U, // CLZ_ZPmZ_D
8794
500k
    0U, // CLZ_ZPmZ_H
8795
500k
    16U,  // CLZ_ZPmZ_S
8796
500k
    24U,  // CLZv16i8
8797
500k
    40U,  // CLZv2i32
8798
500k
    56U,  // CLZv4i16
8799
500k
    64U,  // CLZv4i32
8800
500k
    72U,  // CLZv8i16
8801
500k
    80U,  // CLZv8i8
8802
500k
    794768U,  // CMEQv16i8
8803
500k
    216U, // CMEQv16i8rz
8804
500k
    3160U,  // CMEQv1i64
8805
500k
    224U, // CMEQv1i64rz
8806
500k
    925848U,  // CMEQv2i32
8807
500k
    232U, // CMEQv2i32rz
8808
500k
    270440U,  // CMEQv2i64
8809
500k
    240U, // CMEQv2i64rz
8810
500k
    1056928U, // CMEQv4i16
8811
500k
    248U, // CMEQv4i16rz
8812
500k
    401520U,  // CMEQv4i32
8813
500k
    256U, // CMEQv4i32rz
8814
500k
    532600U,  // CMEQv8i16
8815
500k
    264U, // CMEQv8i16rz
8816
500k
    1188008U, // CMEQv8i8
8817
500k
    272U, // CMEQv8i8rz
8818
500k
    794768U,  // CMGEv16i8
8819
500k
    216U, // CMGEv16i8rz
8820
500k
    3160U,  // CMGEv1i64
8821
500k
    224U, // CMGEv1i64rz
8822
500k
    925848U,  // CMGEv2i32
8823
500k
    232U, // CMGEv2i32rz
8824
500k
    270440U,  // CMGEv2i64
8825
500k
    240U, // CMGEv2i64rz
8826
500k
    1056928U, // CMGEv4i16
8827
500k
    248U, // CMGEv4i16rz
8828
500k
    401520U,  // CMGEv4i32
8829
500k
    256U, // CMGEv4i32rz
8830
500k
    532600U,  // CMGEv8i16
8831
500k
    264U, // CMGEv8i16rz
8832
500k
    1188008U, // CMGEv8i8
8833
500k
    272U, // CMGEv8i8rz
8834
500k
    794768U,  // CMGTv16i8
8835
500k
    216U, // CMGTv16i8rz
8836
500k
    3160U,  // CMGTv1i64
8837
500k
    224U, // CMGTv1i64rz
8838
500k
    925848U,  // CMGTv2i32
8839
500k
    232U, // CMGTv2i32rz
8840
500k
    270440U,  // CMGTv2i64
8841
500k
    240U, // CMGTv2i64rz
8842
500k
    1056928U, // CMGTv4i16
8843
500k
    248U, // CMGTv4i16rz
8844
500k
    401520U,  // CMGTv4i32
8845
500k
    256U, // CMGTv4i32rz
8846
500k
    532600U,  // CMGTv8i16
8847
500k
    264U, // CMGTv8i16rz
8848
500k
    1188008U, // CMGTv8i8
8849
500k
    272U, // CMGTv8i8rz
8850
500k
    794768U,  // CMHIv16i8
8851
500k
    3160U,  // CMHIv1i64
8852
500k
    925848U,  // CMHIv2i32
8853
500k
    270440U,  // CMHIv2i64
8854
500k
    1056928U, // CMHIv4i16
8855
500k
    401520U,  // CMHIv4i32
8856
500k
    532600U,  // CMHIv8i16
8857
500k
    1188008U, // CMHIv8i8
8858
500k
    794768U,  // CMHSv16i8
8859
500k
    3160U,  // CMHSv1i64
8860
500k
    925848U,  // CMHSv2i32
8861
500k
    270440U,  // CMHSv2i64
8862
500k
    1056928U, // CMHSv4i16
8863
500k
    401520U,  // CMHSv4i32
8864
500k
    532600U,  // CMHSv8i16
8865
500k
    1188008U, // CMHSv8i8
8866
500k
    92444952U,  // CMLA_ZZZI_H
8867
500k
    1159596120U,  // CMLA_ZZZI_S
8868
500k
    2501633U, // CMLA_ZZZ_B
8869
500k
    100795480U, // CMLA_ZZZ_D
8870
500k
    2501912U, // CMLA_ZZZ_H
8871
500k
    100796504U, // CMLA_ZZZ_S
8872
500k
    216U, // CMLEv16i8rz
8873
500k
    224U, // CMLEv1i64rz
8874
500k
    232U, // CMLEv2i32rz
8875
500k
    240U, // CMLEv2i64rz
8876
500k
    248U, // CMLEv4i16rz
8877
500k
    256U, // CMLEv4i32rz
8878
500k
    264U, // CMLEv8i16rz
8879
500k
    272U, // CMLEv8i8rz
8880
500k
    216U, // CMLTv16i8rz
8881
500k
    224U, // CMLTv1i64rz
8882
500k
    232U, // CMLTv2i32rz
8883
500k
    240U, // CMLTv2i64rz
8884
500k
    248U, // CMLTv4i16rz
8885
500k
    256U, // CMLTv4i32rz
8886
500k
    264U, // CMLTv8i16rz
8887
500k
    272U, // CMLTv8i8rz
8888
500k
    141496U,  // CMPEQ_PPzZI_B
8889
500k
    137400U,  // CMPEQ_PPzZI_D
8890
500k
    1453193U, // CMPEQ_PPzZI_H
8891
500k
    143544U,  // CMPEQ_PPzZI_S
8892
500k
    8530104U, // CMPEQ_PPzZZ_B
8893
500k
    16914616U,  // CMPEQ_PPzZZ_D
8894
500k
    25832585U,  // CMPEQ_PPzZZ_H
8895
500k
    33697976U,  // CMPEQ_PPzZZ_S
8896
500k
    16918712U,  // CMPEQ_WIDE_PPzZZ_B
8897
500k
    1584265U, // CMPEQ_WIDE_PPzZZ_H
8898
500k
    16920760U,  // CMPEQ_WIDE_PPzZZ_S
8899
500k
    141496U,  // CMPGE_PPzZI_B
8900
500k
    137400U,  // CMPGE_PPzZI_D
8901
500k
    1453193U, // CMPGE_PPzZI_H
8902
500k
    143544U,  // CMPGE_PPzZI_S
8903
500k
    8530104U, // CMPGE_PPzZZ_B
8904
500k
    16914616U,  // CMPGE_PPzZZ_D
8905
500k
    25832585U,  // CMPGE_PPzZZ_H
8906
500k
    33697976U,  // CMPGE_PPzZZ_S
8907
500k
    16918712U,  // CMPGE_WIDE_PPzZZ_B
8908
500k
    1584265U, // CMPGE_WIDE_PPzZZ_H
8909
500k
    16920760U,  // CMPGE_WIDE_PPzZZ_S
8910
500k
    141496U,  // CMPGT_PPzZI_B
8911
500k
    137400U,  // CMPGT_PPzZI_D
8912
500k
    1453193U, // CMPGT_PPzZI_H
8913
500k
    143544U,  // CMPGT_PPzZI_S
8914
500k
    8530104U, // CMPGT_PPzZZ_B
8915
500k
    16914616U,  // CMPGT_PPzZZ_D
8916
500k
    25832585U,  // CMPGT_PPzZZ_H
8917
500k
    33697976U,  // CMPGT_PPzZZ_S
8918
500k
    16918712U,  // CMPGT_WIDE_PPzZZ_B
8919
500k
    1584265U, // CMPGT_WIDE_PPzZZ_H
8920
500k
    16920760U,  // CMPGT_WIDE_PPzZZ_S
8921
500k
    117582008U, // CMPHI_PPzZI_B
8922
500k
    117577912U, // CMPHI_PPzZI_D
8923
500k
    2632841U, // CMPHI_PPzZI_H
8924
500k
    117584056U, // CMPHI_PPzZI_S
8925
500k
    8530104U, // CMPHI_PPzZZ_B
8926
500k
    16914616U,  // CMPHI_PPzZZ_D
8927
500k
    25832585U,  // CMPHI_PPzZZ_H
8928
500k
    33697976U,  // CMPHI_PPzZZ_S
8929
500k
    16918712U,  // CMPHI_WIDE_PPzZZ_B
8930
500k
    1584265U, // CMPHI_WIDE_PPzZZ_H
8931
500k
    16920760U,  // CMPHI_WIDE_PPzZZ_S
8932
500k
    117582008U, // CMPHS_PPzZI_B
8933
500k
    117577912U, // CMPHS_PPzZI_D
8934
500k
    2632841U, // CMPHS_PPzZI_H
8935
500k
    117584056U, // CMPHS_PPzZI_S
8936
500k
    8530104U, // CMPHS_PPzZZ_B
8937
500k
    16914616U,  // CMPHS_PPzZZ_D
8938
500k
    25832585U,  // CMPHS_PPzZZ_H
8939
500k
    33697976U,  // CMPHS_PPzZZ_S
8940
500k
    16918712U,  // CMPHS_WIDE_PPzZZ_B
8941
500k
    1584265U, // CMPHS_WIDE_PPzZZ_H
8942
500k
    16920760U,  // CMPHS_WIDE_PPzZZ_S
8943
500k
    141496U,  // CMPLE_PPzZI_B
8944
500k
    137400U,  // CMPLE_PPzZI_D
8945
500k
    1453193U, // CMPLE_PPzZI_H
8946
500k
    143544U,  // CMPLE_PPzZI_S
8947
500k
    16918712U,  // CMPLE_WIDE_PPzZZ_B
8948
500k
    1584265U, // CMPLE_WIDE_PPzZZ_H
8949
500k
    16920760U,  // CMPLE_WIDE_PPzZZ_S
8950
500k
    117582008U, // CMPLO_PPzZI_B
8951
500k
    117577912U, // CMPLO_PPzZI_D
8952
500k
    2632841U, // CMPLO_PPzZI_H
8953
500k
    117584056U, // CMPLO_PPzZI_S
8954
500k
    16918712U,  // CMPLO_WIDE_PPzZZ_B
8955
500k
    1584265U, // CMPLO_WIDE_PPzZZ_H
8956
500k
    16920760U,  // CMPLO_WIDE_PPzZZ_S
8957
500k
    117582008U, // CMPLS_PPzZI_B
8958
500k
    117577912U, // CMPLS_PPzZI_D
8959
500k
    2632841U, // CMPLS_PPzZI_H
8960
500k
    117584056U, // CMPLS_PPzZI_S
8961
500k
    16918712U,  // CMPLS_WIDE_PPzZZ_B
8962
500k
    1584265U, // CMPLS_WIDE_PPzZZ_H
8963
500k
    16920760U,  // CMPLS_WIDE_PPzZZ_S
8964
500k
    141496U,  // CMPLT_PPzZI_B
8965
500k
    137400U,  // CMPLT_PPzZI_D
8966
500k
    1453193U, // CMPLT_PPzZI_H
8967
500k
    143544U,  // CMPLT_PPzZI_S
8968
500k
    16918712U,  // CMPLT_WIDE_PPzZZ_B
8969
500k
    1584265U, // CMPLT_WIDE_PPzZZ_H
8970
500k
    16920760U,  // CMPLT_WIDE_PPzZZ_S
8971
500k
    141496U,  // CMPNE_PPzZI_B
8972
500k
    137400U,  // CMPNE_PPzZI_D
8973
500k
    1453193U, // CMPNE_PPzZI_H
8974
500k
    143544U,  // CMPNE_PPzZI_S
8975
500k
    8530104U, // CMPNE_PPzZZ_B
8976
500k
    16914616U,  // CMPNE_PPzZZ_D
8977
500k
    25832585U,  // CMPNE_PPzZZ_H
8978
500k
    33697976U,  // CMPNE_PPzZZ_S
8979
500k
    16918712U,  // CMPNE_WIDE_PPzZZ_B
8980
500k
    1584265U, // CMPNE_WIDE_PPzZZ_H
8981
500k
    16920760U,  // CMPNE_WIDE_PPzZZ_S
8982
500k
    794768U,  // CMTSTv16i8
8983
500k
    3160U,  // CMTSTv1i64
8984
500k
    925848U,  // CMTSTv2i32
8985
500k
    270440U,  // CMTSTv2i64
8986
500k
    1056928U, // CMTSTv4i16
8987
500k
    401520U,  // CMTSTv4i32
8988
500k
    532600U,  // CMTSTv8i16
8989
500k
    1188008U, // CMTSTv8i8
8990
500k
    0U, // CNOT_ZPmZ_B
8991
500k
    8U, // CNOT_ZPmZ_D
8992
500k
    0U, // CNOT_ZPmZ_H
8993
500k
    16U,  // CNOT_ZPmZ_S
8994
500k
    289U, // CNTB_XPiI
8995
500k
    289U, // CNTD_XPiI
8996
500k
    289U, // CNTH_XPiI
8997
500k
    10328U, // CNTP_XPP_B
8998
500k
    6232U,  // CNTP_XPP_D
8999
500k
    5208U,  // CNTP_XPP_H
9000
500k
    12376U, // CNTP_XPP_S
9001
500k
    289U, // CNTW_XPiI
9002
500k
    0U, // CNT_ZPmZ_B
9003
500k
    8U, // CNT_ZPmZ_D
9004
500k
    0U, // CNT_ZPmZ_H
9005
500k
    16U,  // CNT_ZPmZ_S
9006
500k
    24U,  // CNTv16i8
9007
500k
    80U,  // CNTv8i8
9008
500k
    6232U,  // COMPACT_ZPZ_D
9009
500k
    12376U, // COMPACT_ZPZ_S
9010
500k
    0U, // CPYE
9011
500k
    0U, // CPYEN
9012
500k
    0U, // CPYERN
9013
500k
    0U, // CPYERT
9014
500k
    0U, // CPYERTN
9015
500k
    0U, // CPYERTRN
9016
500k
    0U, // CPYERTWN
9017
500k
    0U, // CPYET
9018
500k
    0U, // CPYETN
9019
500k
    0U, // CPYETRN
9020
500k
    0U, // CPYETWN
9021
500k
    0U, // CPYEWN
9022
500k
    0U, // CPYEWT
9023
500k
    0U, // CPYEWTN
9024
500k
    0U, // CPYEWTRN
9025
500k
    0U, // CPYEWTWN
9026
500k
    0U, // CPYFE
9027
500k
    0U, // CPYFEN
9028
500k
    0U, // CPYFERN
9029
500k
    0U, // CPYFERT
9030
500k
    0U, // CPYFERTN
9031
500k
    0U, // CPYFERTRN
9032
500k
    0U, // CPYFERTWN
9033
500k
    0U, // CPYFET
9034
500k
    0U, // CPYFETN
9035
500k
    0U, // CPYFETRN
9036
500k
    0U, // CPYFETWN
9037
500k
    0U, // CPYFEWN
9038
500k
    0U, // CPYFEWT
9039
500k
    0U, // CPYFEWTN
9040
500k
    0U, // CPYFEWTRN
9041
500k
    0U, // CPYFEWTWN
9042
500k
    0U, // CPYFM
9043
500k
    0U, // CPYFMN
9044
500k
    0U, // CPYFMRN
9045
500k
    0U, // CPYFMRT
9046
500k
    0U, // CPYFMRTN
9047
500k
    0U, // CPYFMRTRN
9048
500k
    0U, // CPYFMRTWN
9049
500k
    0U, // CPYFMT
9050
500k
    0U, // CPYFMTN
9051
500k
    0U, // CPYFMTRN
9052
500k
    0U, // CPYFMTWN
9053
500k
    0U, // CPYFMWN
9054
500k
    0U, // CPYFMWT
9055
500k
    0U, // CPYFMWTN
9056
500k
    0U, // CPYFMWTRN
9057
500k
    0U, // CPYFMWTWN
9058
500k
    0U, // CPYFP
9059
500k
    0U, // CPYFPN
9060
500k
    0U, // CPYFPRN
9061
500k
    0U, // CPYFPRT
9062
500k
    0U, // CPYFPRTN
9063
500k
    0U, // CPYFPRTRN
9064
500k
    0U, // CPYFPRTWN
9065
500k
    0U, // CPYFPT
9066
500k
    0U, // CPYFPTN
9067
500k
    0U, // CPYFPTRN
9068
500k
    0U, // CPYFPTWN
9069
500k
    0U, // CPYFPWN
9070
500k
    0U, // CPYFPWT
9071
500k
    0U, // CPYFPWTN
9072
500k
    0U, // CPYFPWTRN
9073
500k
    0U, // CPYFPWTWN
9074
500k
    0U, // CPYM
9075
500k
    0U, // CPYMN
9076
500k
    0U, // CPYMRN
9077
500k
    0U, // CPYMRT
9078
500k
    0U, // CPYMRTN
9079
500k
    0U, // CPYMRTRN
9080
500k
    0U, // CPYMRTWN
9081
500k
    0U, // CPYMT
9082
500k
    0U, // CPYMTN
9083
500k
    0U, // CPYMTRN
9084
500k
    0U, // CPYMTWN
9085
500k
    0U, // CPYMWN
9086
500k
    0U, // CPYMWT
9087
500k
    0U, // CPYMWTN
9088
500k
    0U, // CPYMWTRN
9089
500k
    0U, // CPYMWTWN
9090
500k
    0U, // CPYP
9091
500k
    0U, // CPYPN
9092
500k
    0U, // CPYPRN
9093
500k
    0U, // CPYPRT
9094
500k
    0U, // CPYPRTN
9095
500k
    0U, // CPYPRTRN
9096
500k
    0U, // CPYPRTWN
9097
500k
    0U, // CPYPT
9098
500k
    0U, // CPYPTN
9099
500k
    0U, // CPYPTRN
9100
500k
    0U, // CPYPTWN
9101
500k
    0U, // CPYPWN
9102
500k
    0U, // CPYPWT
9103
500k
    0U, // CPYPWTN
9104
500k
    0U, // CPYPWTRN
9105
500k
    0U, // CPYPWTWN
9106
500k
    296U, // CPY_ZPmI_B
9107
500k
    304U, // CPY_ZPmI_D
9108
500k
    1U, // CPY_ZPmI_H
9109
500k
    312U, // CPY_ZPmI_S
9110
500k
    320U, // CPY_ZPmR_B
9111
500k
    320U, // CPY_ZPmR_D
9112
500k
    1U, // CPY_ZPmR_H
9113
500k
    320U, // CPY_ZPmR_S
9114
500k
    320U, // CPY_ZPmV_B
9115
500k
    320U, // CPY_ZPmV_D
9116
500k
    1U, // CPY_ZPmV_H
9117
500k
    320U, // CPY_ZPmV_S
9118
500k
    40120U, // CPY_ZPzI_B
9119
500k
    41144U, // CPY_ZPzI_D
9120
500k
    329U, // CPY_ZPzI_H
9121
500k
    42168U, // CPY_ZPzI_S
9122
500k
    3160U,  // CRC32Brr
9123
500k
    3160U,  // CRC32CBrr
9124
500k
    3160U,  // CRC32CHrr
9125
500k
    3160U,  // CRC32CWrr
9126
500k
    3160U,  // CRC32CXrr
9127
500k
    3160U,  // CRC32Hrr
9128
500k
    3160U,  // CRC32Wrr
9129
500k
    3160U,  // CRC32Xrr
9130
500k
    75631704U,  // CSELWr
9131
500k
    75631704U,  // CSELXr
9132
500k
    75631704U,  // CSINCWr
9133
500k
    75631704U,  // CSINCXr
9134
500k
    75631704U,  // CSINVWr
9135
500k
    75631704U,  // CSINVXr
9136
500k
    75631704U,  // CSNEGWr
9137
500k
    75631704U,  // CSNEGXr
9138
500k
    32U,  // CTERMEQ_WW
9139
500k
    32U,  // CTERMEQ_XX
9140
500k
    32U,  // CTERMNE_WW
9141
500k
    32U,  // CTERMNE_XX
9142
500k
    0U, // DCPS1
9143
500k
    0U, // DCPS2
9144
500k
    0U, // DCPS3
9145
500k
    1U, // DECB_XPiI
9146
500k
    1U, // DECD_XPiI
9147
500k
    1U, // DECD_ZPiI
9148
500k
    1U, // DECH_XPiI
9149
500k
    0U, // DECH_ZPiI
9150
500k
    32U,  // DECP_XP_B
9151
500k
    32U,  // DECP_XP_D
9152
500k
    32U,  // DECP_XP_H
9153
500k
    32U,  // DECP_XP_S
9154
500k
    32U,  // DECP_ZP_D
9155
500k
    0U, // DECP_ZP_H
9156
500k
    32U,  // DECP_ZP_S
9157
500k
    1U, // DECW_XPiI
9158
500k
    1U, // DECW_ZPiI
9159
500k
    0U, // DMB
9160
500k
    0U, // DRPS
9161
500k
    0U, // DSB
9162
500k
    0U, // DSBnXS
9163
500k
    1U, // DUPM_ZI
9164
500k
    1U, // DUP_ZI_B
9165
500k
    1U, // DUP_ZI_D
9166
500k
    0U, // DUP_ZI_H
9167
500k
    1U, // DUP_ZI_S
9168
500k
    32U,  // DUP_ZR_B
9169
500k
    32U,  // DUP_ZR_D
9170
500k
    0U, // DUP_ZR_H
9171
500k
    32U,  // DUP_ZR_S
9172
500k
    336U, // DUP_ZZI_B
9173
500k
    336U, // DUP_ZZI_D
9174
500k
    1U, // DUP_ZZI_H
9175
500k
    1U, // DUP_ZZI_Q
9176
500k
    336U, // DUP_ZZI_S
9177
500k
    43352U, // DUPi16
9178
500k
    43360U, // DUPi32
9179
500k
    43368U, // DUPi64
9180
500k
    43376U, // DUPi8
9181
500k
    32U,  // DUPv16i8gpr
9182
500k
    43376U, // DUPv16i8lane
9183
500k
    32U,  // DUPv2i32gpr
9184
500k
    43360U, // DUPv2i32lane
9185
500k
    32U,  // DUPv2i64gpr
9186
500k
    43368U, // DUPv2i64lane
9187
500k
    32U,  // DUPv4i16gpr
9188
500k
    43352U, // DUPv4i16lane
9189
500k
    32U,  // DUPv4i32gpr
9190
500k
    43360U, // DUPv4i32lane
9191
500k
    32U,  // DUPv8i16gpr
9192
500k
    43352U, // DUPv8i16lane
9193
500k
    32U,  // DUPv8i8gpr
9194
500k
    43376U, // DUPv8i8lane
9195
500k
    14424U, // EONWrs
9196
500k
    14424U, // EONXrs
9197
500k
    580526224U, // EOR3
9198
500k
    16914520U,  // EOR3_ZZZZ
9199
500k
    1U, // EORBT_ZZZ_B
9200
500k
    1112U,  // EORBT_ZZZ_D
9201
500k
    280U, // EORBT_ZZZ_H
9202
500k
    2136U,  // EORBT_ZZZ_S
9203
500k
    8530104U, // EORS_PPzPP
9204
500k
    1U, // EORTB_ZZZ_B
9205
500k
    1112U,  // EORTB_ZZZ_D
9206
500k
    280U, // EORTB_ZZZ_H
9207
500k
    2136U,  // EORTB_ZZZ_S
9208
500k
    0U, // EORV_VPZ_B
9209
500k
    0U, // EORV_VPZ_D
9210
500k
    0U, // EORV_VPZ_H
9211
500k
    0U, // EORV_VPZ_S
9212
500k
    35928U, // EORWri
9213
500k
    14424U, // EORWrs
9214
500k
    36952U, // EORXri
9215
500k
    14424U, // EORXrs
9216
500k
    8530104U, // EOR_PPzPP
9217
500k
    36952U, // EOR_ZI
9218
500k
    8530048U, // EOR_ZPmZ_B
9219
500k
    16914560U,  // EOR_ZPmZ_D
9220
500k
    25832584U,  // EOR_ZPmZ_H
9221
500k
    33697920U,  // EOR_ZPmZ_S
9222
500k
    6232U,  // EOR_ZZZ
9223
500k
    794768U,  // EORv16i8
9224
500k
    1188008U, // EORv8i8
9225
500k
    0U, // ERET
9226
500k
    0U, // ERETAA
9227
500k
    0U, // ERETAB
9228
500k
    44160U, // EXTRACT_ZPMXI_H_B
9229
500k
    44160U, // EXTRACT_ZPMXI_H_D
9230
500k
    376U, // EXTRACT_ZPMXI_H_H
9231
500k
    376U, // EXTRACT_ZPMXI_H_Q
9232
500k
    44160U, // EXTRACT_ZPMXI_H_S
9233
500k
    45184U, // EXTRACT_ZPMXI_V_B
9234
500k
    45184U, // EXTRACT_ZPMXI_V_D
9235
500k
    384U, // EXTRACT_ZPMXI_V_H
9236
500k
    384U, // EXTRACT_ZPMXI_V_Q
9237
500k
    45184U, // EXTRACT_ZPMXI_V_S
9238
500k
    134232U,  // EXTRWrri
9239
500k
    134232U,  // EXTRXrri
9240
500k
    117581912U, // EXT_ZZI
9241
500k
    394U, // EXT_ZZI_B
9242
500k
    1712272U, // EXTv16i8
9243
500k
    2760872U, // EXTv8i8
9244
500k
    3160U,  // FABD16
9245
500k
    3160U,  // FABD32
9246
500k
    3160U,  // FABD64
9247
500k
    16914560U,  // FABD_ZPmZ_D
9248
500k
    25832584U,  // FABD_ZPmZ_H
9249
500k
    33697920U,  // FABD_ZPmZ_S
9250
500k
    925848U,  // FABDv2f32
9251
500k
    270440U,  // FABDv2f64
9252
500k
    1056928U, // FABDv4f16
9253
500k
    401520U,  // FABDv4f32
9254
500k
    532600U,  // FABDv8f16
9255
500k
    32U,  // FABSDr
9256
500k
    32U,  // FABSHr
9257
500k
    32U,  // FABSSr
9258
500k
    8U, // FABS_ZPmZ_D
9259
500k
    0U, // FABS_ZPmZ_H
9260
500k
    16U,  // FABS_ZPmZ_S
9261
500k
    40U,  // FABSv2f32
9262
500k
    48U,  // FABSv2f64
9263
500k
    56U,  // FABSv4f16
9264
500k
    64U,  // FABSv4f32
9265
500k
    72U,  // FABSv8f16
9266
500k
    3160U,  // FACGE16
9267
500k
    3160U,  // FACGE32
9268
500k
    3160U,  // FACGE64
9269
500k
    16914616U,  // FACGE_PPzZZ_D
9270
500k
    25832585U,  // FACGE_PPzZZ_H
9271
500k
    33697976U,  // FACGE_PPzZZ_S
9272
500k
    925848U,  // FACGEv2f32
9273
500k
    270440U,  // FACGEv2f64
9274
500k
    1056928U, // FACGEv4f16
9275
500k
    401520U,  // FACGEv4f32
9276
500k
    532600U,  // FACGEv8f16
9277
500k
    3160U,  // FACGT16
9278
500k
    3160U,  // FACGT32
9279
500k
    3160U,  // FACGT64
9280
500k
    16914616U,  // FACGT_PPzZZ_D
9281
500k
    25832585U,  // FACGT_PPzZZ_H
9282
500k
    33697976U,  // FACGT_PPzZZ_S
9283
500k
    925848U,  // FACGTv2f32
9284
500k
    270440U,  // FACGTv2f64
9285
500k
    1056928U, // FACGTv4f16
9286
500k
    401520U,  // FACGTv4f32
9287
500k
    532600U,  // FACGTv8f16
9288
500k
    0U, // FADDA_VPZ_D
9289
500k
    280U, // FADDA_VPZ_H
9290
500k
    0U, // FADDA_VPZ_S
9291
500k
    3160U,  // FADDDrr
9292
500k
    3160U,  // FADDHrr
9293
500k
    16914560U,  // FADDP_ZPmZZ_D
9294
500k
    25832584U,  // FADDP_ZPmZZ_H
9295
500k
    33697920U,  // FADDP_ZPmZZ_S
9296
500k
    925848U,  // FADDPv2f32
9297
500k
    270440U,  // FADDPv2f64
9298
500k
    400U, // FADDPv2i16p
9299
500k
    40U,  // FADDPv2i32p
9300
500k
    48U,  // FADDPv2i64p
9301
500k
    1056928U, // FADDPv4f16
9302
500k
    401520U,  // FADDPv4f32
9303
500k
    532600U,  // FADDPv8f16
9304
500k
    3160U,  // FADDSrr
9305
500k
    0U, // FADDV_VPZ_D
9306
500k
    0U, // FADDV_VPZ_H
9307
500k
    0U, // FADDV_VPZ_S
9308
500k
    125966464U, // FADD_ZPmI_D
9309
500k
    2894984U, // FADD_ZPmI_H
9310
500k
    125972608U, // FADD_ZPmI_S
9311
500k
    16914560U,  // FADD_ZPmZ_D
9312
500k
    25832584U,  // FADD_ZPmZ_H
9313
500k
    33697920U,  // FADD_ZPmZ_S
9314
500k
    6232U,  // FADD_ZZZ_D
9315
500k
    136U, // FADD_ZZZ_H
9316
500k
    12376U, // FADD_ZZZ_S
9317
500k
    925848U,  // FADDv2f32
9318
500k
    270440U,  // FADDv2f64
9319
500k
    1056928U, // FADDv4f16
9320
500k
    401520U,  // FADDv4f32
9321
500k
    532600U,  // FADDv8f16
9322
500k
    1627527296U,  // FCADD_ZPmZ_D
9323
500k
    2232036488U,  // FCADD_ZPmZ_H
9324
500k
    1644310656U,  // FCADD_ZPmZ_S
9325
500k
    70131864U,  // FCADDv2f32
9326
500k
    70262888U,  // FCADDv2f64
9327
500k
    70394016U,  // FCADDv4f16
9328
500k
    70525040U,  // FCADDv4f32
9329
500k
    70656120U,  // FCADDv8f16
9330
500k
    75631704U,  // FCCMPDrr
9331
500k
    75631704U,  // FCCMPEDrr
9332
500k
    75631704U,  // FCCMPEHrr
9333
500k
    75631704U,  // FCCMPESrr
9334
500k
    75631704U,  // FCCMPHrr
9335
500k
    75631704U,  // FCCMPSrr
9336
500k
    3160U,  // FCMEQ16
9337
500k
    3160U,  // FCMEQ32
9338
500k
    3160U,  // FCMEQ64
9339
500k
    3676344U, // FCMEQ_PPzZ0_D
9340
500k
    46217U, // FCMEQ_PPzZ0_H
9341
500k
    3682488U, // FCMEQ_PPzZ0_S
9342
500k
    16914616U,  // FCMEQ_PPzZZ_D
9343
500k
    25832585U,  // FCMEQ_PPzZZ_H
9344
500k
    33697976U,  // FCMEQ_PPzZZ_S
9345
500k
    408U, // FCMEQv1i16rz
9346
500k
    408U, // FCMEQv1i32rz
9347
500k
    408U, // FCMEQv1i64rz
9348
500k
    925848U,  // FCMEQv2f32
9349
500k
    270440U,  // FCMEQv2f64
9350
500k
    416U, // FCMEQv2i32rz
9351
500k
    424U, // FCMEQv2i64rz
9352
500k
    1056928U, // FCMEQv4f16
9353
500k
    401520U,  // FCMEQv4f32
9354
500k
    432U, // FCMEQv4i16rz
9355
500k
    440U, // FCMEQv4i32rz
9356
500k
    532600U,  // FCMEQv8f16
9357
500k
    448U, // FCMEQv8i16rz
9358
500k
    3160U,  // FCMGE16
9359
500k
    3160U,  // FCMGE32
9360
500k
    3160U,  // FCMGE64
9361
500k
    3676344U, // FCMGE_PPzZ0_D
9362
500k
    46217U, // FCMGE_PPzZ0_H
9363
500k
    3682488U, // FCMGE_PPzZ0_S
9364
500k
    16914616U,  // FCMGE_PPzZZ_D
9365
500k
    25832585U,  // FCMGE_PPzZZ_H
9366
500k
    33697976U,  // FCMGE_PPzZZ_S
9367
500k
    408U, // FCMGEv1i16rz
9368
500k
    408U, // FCMGEv1i32rz
9369
500k
    408U, // FCMGEv1i64rz
9370
500k
    925848U,  // FCMGEv2f32
9371
500k
    270440U,  // FCMGEv2f64
9372
500k
    416U, // FCMGEv2i32rz
9373
500k
    424U, // FCMGEv2i64rz
9374
500k
    1056928U, // FCMGEv4f16
9375
500k
    401520U,  // FCMGEv4f32
9376
500k
    432U, // FCMGEv4i16rz
9377
500k
    440U, // FCMGEv4i32rz
9378
500k
    532600U,  // FCMGEv8f16
9379
500k
    448U, // FCMGEv8i16rz
9380
500k
    3160U,  // FCMGT16
9381
500k
    3160U,  // FCMGT32
9382
500k
    3160U,  // FCMGT64
9383
500k
    3676344U, // FCMGT_PPzZ0_D
9384
500k
    46217U, // FCMGT_PPzZ0_H
9385
500k
    3682488U, // FCMGT_PPzZ0_S
9386
500k
    16914616U,  // FCMGT_PPzZZ_D
9387
500k
    25832585U,  // FCMGT_PPzZZ_H
9388
500k
    33697976U,  // FCMGT_PPzZZ_S
9389
500k
    408U, // FCMGTv1i16rz
9390
500k
    408U, // FCMGTv1i32rz
9391
500k
    408U, // FCMGTv1i64rz
9392
500k
    925848U,  // FCMGTv2f32
9393
500k
    270440U,  // FCMGTv2f64
9394
500k
    416U, // FCMGTv2i32rz
9395
500k
    424U, // FCMGTv2i64rz
9396
500k
    1056928U, // FCMGTv4f16
9397
500k
    401520U,  // FCMGTv4f32
9398
500k
    432U, // FCMGTv4i16rz
9399
500k
    440U, // FCMGTv4i32rz
9400
500k
    532600U,  // FCMGTv8f16
9401
500k
    448U, // FCMGTv8i16rz
9402
500k
    1744962688U,  // FCMLA_ZPmZZ_D
9403
500k
    1161440536U,  // FCMLA_ZPmZZ_H
9404
500k
    1753352320U,  // FCMLA_ZPmZZ_S
9405
500k
    92444952U,  // FCMLA_ZZZI_H
9406
500k
    1159596120U,  // FCMLA_ZZZI_S
9407
500k
    103687320U, // FCMLAv2f32
9408
500k
    103818344U, // FCMLAv2f64
9409
500k
    103949472U, // FCMLAv4f16
9410
500k
    1663050912U,  // FCMLAv4f16_indexed
9411
500k
    104080496U, // FCMLAv4f32
9412
500k
    1664885872U,  // FCMLAv4f32_indexed
9413
500k
    104211576U, // FCMLAv8f16
9414
500k
    1663050872U,  // FCMLAv8f16_indexed
9415
500k
    3676344U, // FCMLE_PPzZ0_D
9416
500k
    46217U, // FCMLE_PPzZ0_H
9417
500k
    3682488U, // FCMLE_PPzZ0_S
9418
500k
    408U, // FCMLEv1i16rz
9419
500k
    408U, // FCMLEv1i32rz
9420
500k
    408U, // FCMLEv1i64rz
9421
500k
    416U, // FCMLEv2i32rz
9422
500k
    424U, // FCMLEv2i64rz
9423
500k
    432U, // FCMLEv4i16rz
9424
500k
    440U, // FCMLEv4i32rz
9425
500k
    448U, // FCMLEv8i16rz
9426
500k
    3676344U, // FCMLT_PPzZ0_D
9427
500k
    46217U, // FCMLT_PPzZ0_H
9428
500k
    3682488U, // FCMLT_PPzZ0_S
9429
500k
    408U, // FCMLTv1i16rz
9430
500k
    408U, // FCMLTv1i32rz
9431
500k
    408U, // FCMLTv1i64rz
9432
500k
    416U, // FCMLTv2i32rz
9433
500k
    424U, // FCMLTv2i64rz
9434
500k
    432U, // FCMLTv4i16rz
9435
500k
    440U, // FCMLTv4i32rz
9436
500k
    448U, // FCMLTv8i16rz
9437
500k
    3676344U, // FCMNE_PPzZ0_D
9438
500k
    46217U, // FCMNE_PPzZ0_H
9439
500k
    3682488U, // FCMNE_PPzZ0_S
9440
500k
    16914616U,  // FCMNE_PPzZZ_D
9441
500k
    25832585U,  // FCMNE_PPzZZ_H
9442
500k
    33697976U,  // FCMNE_PPzZZ_S
9443
500k
    0U, // FCMPDri
9444
500k
    32U,  // FCMPDrr
9445
500k
    0U, // FCMPEDri
9446
500k
    32U,  // FCMPEDrr
9447
500k
    0U, // FCMPEHri
9448
500k
    32U,  // FCMPEHrr
9449
500k
    0U, // FCMPESri
9450
500k
    32U,  // FCMPESrr
9451
500k
    0U, // FCMPHri
9452
500k
    32U,  // FCMPHrr
9453
500k
    0U, // FCMPSri
9454
500k
    32U,  // FCMPSrr
9455
500k
    16914616U,  // FCMUO_PPzZZ_D
9456
500k
    25832585U,  // FCMUO_PPzZZ_H
9457
500k
    33697976U,  // FCMUO_PPzZZ_S
9458
500k
    456U, // FCPY_ZPmI_D
9459
500k
    2U, // FCPY_ZPmI_H
9460
500k
    456U, // FCPY_ZPmI_S
9461
500k
    75631704U,  // FCSELDrrr
9462
500k
    75631704U,  // FCSELHrrr
9463
500k
    75631704U,  // FCSELSrrr
9464
500k
    32U,  // FCVTASUWDr
9465
500k
    32U,  // FCVTASUWHr
9466
500k
    32U,  // FCVTASUWSr
9467
500k
    32U,  // FCVTASUXDr
9468
500k
    32U,  // FCVTASUXHr
9469
500k
    32U,  // FCVTASUXSr
9470
500k
    32U,  // FCVTASv1f16
9471
500k
    32U,  // FCVTASv1i32
9472
500k
    32U,  // FCVTASv1i64
9473
500k
    40U,  // FCVTASv2f32
9474
500k
    48U,  // FCVTASv2f64
9475
500k
    56U,  // FCVTASv4f16
9476
500k
    64U,  // FCVTASv4f32
9477
500k
    72U,  // FCVTASv8f16
9478
500k
    32U,  // FCVTAUUWDr
9479
500k
    32U,  // FCVTAUUWHr
9480
500k
    32U,  // FCVTAUUWSr
9481
500k
    32U,  // FCVTAUUXDr
9482
500k
    32U,  // FCVTAUUXHr
9483
500k
    32U,  // FCVTAUUXSr
9484
500k
    32U,  // FCVTAUv1f16
9485
500k
    32U,  // FCVTAUv1i32
9486
500k
    32U,  // FCVTAUv1i64
9487
500k
    40U,  // FCVTAUv2f32
9488
500k
    48U,  // FCVTAUv2f64
9489
500k
    56U,  // FCVTAUv4f16
9490
500k
    64U,  // FCVTAUv4f32
9491
500k
    72U,  // FCVTAUv8f16
9492
500k
    32U,  // FCVTDHr
9493
500k
    32U,  // FCVTDSr
9494
500k
    32U,  // FCVTHDr
9495
500k
    32U,  // FCVTHSr
9496
500k
    280U, // FCVTLT_ZPmZ_HtoS
9497
500k
    16U,  // FCVTLT_ZPmZ_StoD
9498
500k
    40U,  // FCVTLv2i32
9499
500k
    56U,  // FCVTLv4i16
9500
500k
    64U,  // FCVTLv4i32
9501
500k
    72U,  // FCVTLv8i16
9502
500k
    32U,  // FCVTMSUWDr
9503
500k
    32U,  // FCVTMSUWHr
9504
500k
    32U,  // FCVTMSUWSr
9505
500k
    32U,  // FCVTMSUXDr
9506
500k
    32U,  // FCVTMSUXHr
9507
500k
    32U,  // FCVTMSUXSr
9508
500k
    32U,  // FCVTMSv1f16
9509
500k
    32U,  // FCVTMSv1i32
9510
500k
    32U,  // FCVTMSv1i64
9511
500k
    40U,  // FCVTMSv2f32
9512
500k
    48U,  // FCVTMSv2f64
9513
500k
    56U,  // FCVTMSv4f16
9514
500k
    64U,  // FCVTMSv4f32
9515
500k
    72U,  // FCVTMSv8f16
9516
500k
    32U,  // FCVTMUUWDr
9517
500k
    32U,  // FCVTMUUWHr
9518
500k
    32U,  // FCVTMUUWSr
9519
500k
    32U,  // FCVTMUUXDr
9520
500k
    32U,  // FCVTMUUXHr
9521
500k
    32U,  // FCVTMUUXSr
9522
500k
    32U,  // FCVTMUv1f16
9523
500k
    32U,  // FCVTMUv1i32
9524
500k
    32U,  // FCVTMUv1i64
9525
500k
    40U,  // FCVTMUv2f32
9526
500k
    48U,  // FCVTMUv2f64
9527
500k
    56U,  // FCVTMUv4f16
9528
500k
    64U,  // FCVTMUv4f32
9529
500k
    72U,  // FCVTMUv8f16
9530
500k
    32U,  // FCVTNSUWDr
9531
500k
    32U,  // FCVTNSUWHr
9532
500k
    32U,  // FCVTNSUWSr
9533
500k
    32U,  // FCVTNSUXDr
9534
500k
    32U,  // FCVTNSUXHr
9535
500k
    32U,  // FCVTNSUXSr
9536
500k
    32U,  // FCVTNSv1f16
9537
500k
    32U,  // FCVTNSv1i32
9538
500k
    32U,  // FCVTNSv1i64
9539
500k
    40U,  // FCVTNSv2f32
9540
500k
    48U,  // FCVTNSv2f64
9541
500k
    56U,  // FCVTNSv4f16
9542
500k
    64U,  // FCVTNSv4f32
9543
500k
    72U,  // FCVTNSv8f16
9544
500k
    8U, // FCVTNT_ZPmZ_DtoS
9545
500k
    1U, // FCVTNT_ZPmZ_StoH
9546
500k
    32U,  // FCVTNUUWDr
9547
500k
    32U,  // FCVTNUUWHr
9548
500k
    32U,  // FCVTNUUWSr
9549
500k
    32U,  // FCVTNUUXDr
9550
500k
    32U,  // FCVTNUUXHr
9551
500k
    32U,  // FCVTNUUXSr
9552
500k
    32U,  // FCVTNUv1f16
9553
500k
    32U,  // FCVTNUv1i32
9554
500k
    32U,  // FCVTNUv1i64
9555
500k
    40U,  // FCVTNUv2f32
9556
500k
    48U,  // FCVTNUv2f64
9557
500k
    56U,  // FCVTNUv4f16
9558
500k
    64U,  // FCVTNUv4f32
9559
500k
    72U,  // FCVTNUv8f16
9560
500k
    48U,  // FCVTNv2i32
9561
500k
    64U,  // FCVTNv4i16
9562
500k
    48U,  // FCVTNv4i32
9563
500k
    64U,  // FCVTNv8i16
9564
500k
    32U,  // FCVTPSUWDr
9565
500k
    32U,  // FCVTPSUWHr
9566
500k
    32U,  // FCVTPSUWSr
9567
500k
    32U,  // FCVTPSUXDr
9568
500k
    32U,  // FCVTPSUXHr
9569
500k
    32U,  // FCVTPSUXSr
9570
500k
    32U,  // FCVTPSv1f16
9571
500k
    32U,  // FCVTPSv1i32
9572
500k
    32U,  // FCVTPSv1i64
9573
500k
    40U,  // FCVTPSv2f32
9574
500k
    48U,  // FCVTPSv2f64
9575
500k
    56U,  // FCVTPSv4f16
9576
500k
    64U,  // FCVTPSv4f32
9577
500k
    72U,  // FCVTPSv8f16
9578
500k
    32U,  // FCVTPUUWDr
9579
500k
    32U,  // FCVTPUUWHr
9580
500k
    32U,  // FCVTPUUWSr
9581
500k
    32U,  // FCVTPUUXDr
9582
500k
    32U,  // FCVTPUUXHr
9583
500k
    32U,  // FCVTPUUXSr
9584
500k
    32U,  // FCVTPUv1f16
9585
500k
    32U,  // FCVTPUv1i32
9586
500k
    32U,  // FCVTPUv1i64
9587
500k
    40U,  // FCVTPUv2f32
9588
500k
    48U,  // FCVTPUv2f64
9589
500k
    56U,  // FCVTPUv4f16
9590
500k
    64U,  // FCVTPUv4f32
9591
500k
    72U,  // FCVTPUv8f16
9592
500k
    32U,  // FCVTSDr
9593
500k
    32U,  // FCVTSHr
9594
500k
    8U, // FCVTXNT_ZPmZ_DtoS
9595
500k
    32U,  // FCVTXNv1i64
9596
500k
    48U,  // FCVTXNv2f32
9597
500k
    48U,  // FCVTXNv4f32
9598
500k
    8U, // FCVTX_ZPmZ_DtoS
9599
500k
    3160U,  // FCVTZSSWDri
9600
500k
    3160U,  // FCVTZSSWHri
9601
500k
    3160U,  // FCVTZSSWSri
9602
500k
    3160U,  // FCVTZSSXDri
9603
500k
    3160U,  // FCVTZSSXHri
9604
500k
    3160U,  // FCVTZSSXSri
9605
500k
    32U,  // FCVTZSUWDr
9606
500k
    32U,  // FCVTZSUWHr
9607
500k
    32U,  // FCVTZSUWSr
9608
500k
    32U,  // FCVTZSUXDr
9609
500k
    32U,  // FCVTZSUXHr
9610
500k
    32U,  // FCVTZSUXSr
9611
500k
    8U, // FCVTZS_ZPmZ_DtoD
9612
500k
    8U, // FCVTZS_ZPmZ_DtoS
9613
500k
    280U, // FCVTZS_ZPmZ_HtoD
9614
500k
    0U, // FCVTZS_ZPmZ_HtoH
9615
500k
    280U, // FCVTZS_ZPmZ_HtoS
9616
500k
    16U,  // FCVTZS_ZPmZ_StoD
9617
500k
    16U,  // FCVTZS_ZPmZ_StoS
9618
500k
    3160U,  // FCVTZSd
9619
500k
    3160U,  // FCVTZSh
9620
500k
    3160U,  // FCVTZSs
9621
500k
    32U,  // FCVTZSv1f16
9622
500k
    32U,  // FCVTZSv1i32
9623
500k
    32U,  // FCVTZSv1i64
9624
500k
    40U,  // FCVTZSv2f32
9625
500k
    48U,  // FCVTZSv2f64
9626
500k
    3224U,  // FCVTZSv2i32_shift
9627
500k
    3176U,  // FCVTZSv2i64_shift
9628
500k
    56U,  // FCVTZSv4f16
9629
500k
    64U,  // FCVTZSv4f32
9630
500k
    3232U,  // FCVTZSv4i16_shift
9631
500k
    3184U,  // FCVTZSv4i32_shift
9632
500k
    72U,  // FCVTZSv8f16
9633
500k
    3192U,  // FCVTZSv8i16_shift
9634
500k
    3160U,  // FCVTZUSWDri
9635
500k
    3160U,  // FCVTZUSWHri
9636
500k
    3160U,  // FCVTZUSWSri
9637
500k
    3160U,  // FCVTZUSXDri
9638
500k
    3160U,  // FCVTZUSXHri
9639
500k
    3160U,  // FCVTZUSXSri
9640
500k
    32U,  // FCVTZUUWDr
9641
500k
    32U,  // FCVTZUUWHr
9642
500k
    32U,  // FCVTZUUWSr
9643
500k
    32U,  // FCVTZUUXDr
9644
500k
    32U,  // FCVTZUUXHr
9645
500k
    32U,  // FCVTZUUXSr
9646
500k
    8U, // FCVTZU_ZPmZ_DtoD
9647
500k
    8U, // FCVTZU_ZPmZ_DtoS
9648
500k
    280U, // FCVTZU_ZPmZ_HtoD
9649
500k
    0U, // FCVTZU_ZPmZ_HtoH
9650
500k
    280U, // FCVTZU_ZPmZ_HtoS
9651
500k
    16U,  // FCVTZU_ZPmZ_StoD
9652
500k
    16U,  // FCVTZU_ZPmZ_StoS
9653
500k
    3160U,  // FCVTZUd
9654
500k
    3160U,  // FCVTZUh
9655
500k
    3160U,  // FCVTZUs
9656
500k
    32U,  // FCVTZUv1f16
9657
500k
    32U,  // FCVTZUv1i32
9658
500k
    32U,  // FCVTZUv1i64
9659
500k
    40U,  // FCVTZUv2f32
9660
500k
    48U,  // FCVTZUv2f64
9661
500k
    3224U,  // FCVTZUv2i32_shift
9662
500k
    3176U,  // FCVTZUv2i64_shift
9663
500k
    56U,  // FCVTZUv4f16
9664
500k
    64U,  // FCVTZUv4f32
9665
500k
    3232U,  // FCVTZUv4i16_shift
9666
500k
    3184U,  // FCVTZUv4i32_shift
9667
500k
    72U,  // FCVTZUv8f16
9668
500k
    3192U,  // FCVTZUv8i16_shift
9669
500k
    2U, // FCVT_ZPmZ_DtoH
9670
500k
    8U, // FCVT_ZPmZ_DtoS
9671
500k
    280U, // FCVT_ZPmZ_HtoD
9672
500k
    280U, // FCVT_ZPmZ_HtoS
9673
500k
    16U,  // FCVT_ZPmZ_StoD
9674
500k
    1U, // FCVT_ZPmZ_StoH
9675
500k
    3160U,  // FDIVDrr
9676
500k
    3160U,  // FDIVHrr
9677
500k
    16914560U,  // FDIVR_ZPmZ_D
9678
500k
    25832584U,  // FDIVR_ZPmZ_H
9679
500k
    33697920U,  // FDIVR_ZPmZ_S
9680
500k
    3160U,  // FDIVSrr
9681
500k
    16914560U,  // FDIV_ZPmZ_D
9682
500k
    25832584U,  // FDIV_ZPmZ_H
9683
500k
    33697920U,  // FDIV_ZPmZ_S
9684
500k
    925848U,  // FDIVv2f32
9685
500k
    270440U,  // FDIVv2f64
9686
500k
    1056928U, // FDIVv4f16
9687
500k
    401520U,  // FDIVv4f32
9688
500k
    532600U,  // FDIVv8f16
9689
500k
    2U, // FDUP_ZI_D
9690
500k
    0U, // FDUP_ZI_H
9691
500k
    2U, // FDUP_ZI_S
9692
500k
    32U,  // FEXPA_ZZ_D
9693
500k
    0U, // FEXPA_ZZ_H
9694
500k
    32U,  // FEXPA_ZZ_S
9695
500k
    32U,  // FJCVTZS
9696
500k
    8U, // FLOGB_ZPmZ_D
9697
500k
    0U, // FLOGB_ZPmZ_H
9698
500k
    16U,  // FLOGB_ZPmZ_S
9699
500k
    134232U,  // FMADDDrrr
9700
500k
    134232U,  // FMADDHrrr
9701
500k
    134232U,  // FMADDSrrr
9702
500k
    134349952U, // FMAD_ZPmZZ_D
9703
500k
    28978456U,  // FMAD_ZPmZZ_H
9704
500k
    142739584U, // FMAD_ZPmZZ_S
9705
500k
    3160U,  // FMAXDrr
9706
500k
    3160U,  // FMAXHrr
9707
500k
    3160U,  // FMAXNMDrr
9708
500k
    3160U,  // FMAXNMHrr
9709
500k
    16914560U,  // FMAXNMP_ZPmZZ_D
9710
500k
    25832584U,  // FMAXNMP_ZPmZZ_H
9711
500k
    33697920U,  // FMAXNMP_ZPmZZ_S
9712
500k
    925848U,  // FMAXNMPv2f32
9713
500k
    270440U,  // FMAXNMPv2f64
9714
500k
    400U, // FMAXNMPv2i16p
9715
500k
    40U,  // FMAXNMPv2i32p
9716
500k
    48U,  // FMAXNMPv2i64p
9717
500k
    1056928U, // FMAXNMPv4f16
9718
500k
    401520U,  // FMAXNMPv4f32
9719
500k
    532600U,  // FMAXNMPv8f16
9720
500k
    3160U,  // FMAXNMSrr
9721
500k
    0U, // FMAXNMV_VPZ_D
9722
500k
    0U, // FMAXNMV_VPZ_H
9723
500k
    0U, // FMAXNMV_VPZ_S
9724
500k
    56U,  // FMAXNMVv4i16v
9725
500k
    64U,  // FMAXNMVv4i32v
9726
500k
    72U,  // FMAXNMVv8i16v
9727
500k
    151132288U, // FMAXNM_ZPmI_D
9728
500k
    4074632U, // FMAXNM_ZPmI_H
9729
500k
    151138432U, // FMAXNM_ZPmI_S
9730
500k
    16914560U,  // FMAXNM_ZPmZ_D
9731
500k
    25832584U,  // FMAXNM_ZPmZ_H
9732
500k
    33697920U,  // FMAXNM_ZPmZ_S
9733
500k
    925848U,  // FMAXNMv2f32
9734
500k
    270440U,  // FMAXNMv2f64
9735
500k
    1056928U, // FMAXNMv4f16
9736
500k
    401520U,  // FMAXNMv4f32
9737
500k
    532600U,  // FMAXNMv8f16
9738
500k
    16914560U,  // FMAXP_ZPmZZ_D
9739
500k
    25832584U,  // FMAXP_ZPmZZ_H
9740
500k
    33697920U,  // FMAXP_ZPmZZ_S
9741
500k
    925848U,  // FMAXPv2f32
9742
500k
    270440U,  // FMAXPv2f64
9743
500k
    400U, // FMAXPv2i16p
9744
500k
    40U,  // FMAXPv2i32p
9745
500k
    48U,  // FMAXPv2i64p
9746
500k
    1056928U, // FMAXPv4f16
9747
500k
    401520U,  // FMAXPv4f32
9748
500k
    532600U,  // FMAXPv8f16
9749
500k
    3160U,  // FMAXSrr
9750
500k
    0U, // FMAXV_VPZ_D
9751
500k
    0U, // FMAXV_VPZ_H
9752
500k
    0U, // FMAXV_VPZ_S
9753
500k
    56U,  // FMAXVv4i16v
9754
500k
    64U,  // FMAXVv4i32v
9755
500k
    72U,  // FMAXVv8i16v
9756
500k
    151132288U, // FMAX_ZPmI_D
9757
500k
    4074632U, // FMAX_ZPmI_H
9758
500k
    151138432U, // FMAX_ZPmI_S
9759
500k
    16914560U,  // FMAX_ZPmZ_D
9760
500k
    25832584U,  // FMAX_ZPmZ_H
9761
500k
    33697920U,  // FMAX_ZPmZ_S
9762
500k
    925848U,  // FMAXv2f32
9763
500k
    270440U,  // FMAXv2f64
9764
500k
    1056928U, // FMAXv4f16
9765
500k
    401520U,  // FMAXv4f32
9766
500k
    532600U,  // FMAXv8f16
9767
500k
    3160U,  // FMINDrr
9768
500k
    3160U,  // FMINHrr
9769
500k
    3160U,  // FMINNMDrr
9770
500k
    3160U,  // FMINNMHrr
9771
500k
    16914560U,  // FMINNMP_ZPmZZ_D
9772
500k
    25832584U,  // FMINNMP_ZPmZZ_H
9773
500k
    33697920U,  // FMINNMP_ZPmZZ_S
9774
500k
    925848U,  // FMINNMPv2f32
9775
500k
    270440U,  // FMINNMPv2f64
9776
500k
    400U, // FMINNMPv2i16p
9777
500k
    40U,  // FMINNMPv2i32p
9778
500k
    48U,  // FMINNMPv2i64p
9779
500k
    1056928U, // FMINNMPv4f16
9780
500k
    401520U,  // FMINNMPv4f32
9781
500k
    532600U,  // FMINNMPv8f16
9782
500k
    3160U,  // FMINNMSrr
9783
500k
    0U, // FMINNMV_VPZ_D
9784
500k
    0U, // FMINNMV_VPZ_H
9785
500k
    0U, // FMINNMV_VPZ_S
9786
500k
    56U,  // FMINNMVv4i16v
9787
500k
    64U,  // FMINNMVv4i32v
9788
500k
    72U,  // FMINNMVv8i16v
9789
500k
    151132288U, // FMINNM_ZPmI_D
9790
500k
    4074632U, // FMINNM_ZPmI_H
9791
500k
    151138432U, // FMINNM_ZPmI_S
9792
500k
    16914560U,  // FMINNM_ZPmZ_D
9793
500k
    25832584U,  // FMINNM_ZPmZ_H
9794
500k
    33697920U,  // FMINNM_ZPmZ_S
9795
500k
    925848U,  // FMINNMv2f32
9796
500k
    270440U,  // FMINNMv2f64
9797
500k
    1056928U, // FMINNMv4f16
9798
500k
    401520U,  // FMINNMv4f32
9799
500k
    532600U,  // FMINNMv8f16
9800
500k
    16914560U,  // FMINP_ZPmZZ_D
9801
500k
    25832584U,  // FMINP_ZPmZZ_H
9802
500k
    33697920U,  // FMINP_ZPmZZ_S
9803
500k
    925848U,  // FMINPv2f32
9804
500k
    270440U,  // FMINPv2f64
9805
500k
    400U, // FMINPv2i16p
9806
500k
    40U,  // FMINPv2i32p
9807
500k
    48U,  // FMINPv2i64p
9808
500k
    1056928U, // FMINPv4f16
9809
500k
    401520U,  // FMINPv4f32
9810
500k
    532600U,  // FMINPv8f16
9811
500k
    3160U,  // FMINSrr
9812
500k
    0U, // FMINV_VPZ_D
9813
500k
    0U, // FMINV_VPZ_H
9814
500k
    0U, // FMINV_VPZ_S
9815
500k
    56U,  // FMINVv4i16v
9816
500k
    64U,  // FMINVv4i32v
9817
500k
    72U,  // FMINVv8i16v
9818
500k
    151132288U, // FMIN_ZPmI_D
9819
500k
    4074632U, // FMIN_ZPmI_H
9820
500k
    151138432U, // FMIN_ZPmI_S
9821
500k
    16914560U,  // FMIN_ZPmZ_D
9822
500k
    25832584U,  // FMIN_ZPmZ_H
9823
500k
    33697920U,  // FMIN_ZPmZ_S
9824
500k
    925848U,  // FMINv2f32
9825
500k
    270440U,  // FMINv2f64
9826
500k
    1056928U, // FMINv4f16
9827
500k
    401520U,  // FMINv4f32
9828
500k
    532600U,  // FMINv8f16
9829
500k
    47568U, // FMLAL2lanev4f16
9830
500k
    52438176U,  // FMLAL2lanev8f16
9831
500k
    48592U, // FMLAL2v4f16
9832
500k
    1057952U, // FMLAL2v8f16
9833
500k
    27139160U,  // FMLALB_ZZZI_SHH
9834
500k
    7256U,  // FMLALB_ZZZ_SHH
9835
500k
    27139160U,  // FMLALT_ZZZI_SHH
9836
500k
    7256U,  // FMLALT_ZZZ_SHH
9837
500k
    47568U, // FMLALlanev4f16
9838
500k
    52438176U,  // FMLALlanev8f16
9839
500k
    48592U, // FMLALv4f16
9840
500k
    1057952U, // FMLALv8f16
9841
500k
    134349952U, // FMLA_ZPmZZ_D
9842
500k
    28978456U,  // FMLA_ZPmZZ_H
9843
500k
    142739584U, // FMLA_ZPmZZ_S
9844
500k
    27133016U,  // FMLA_ZZZI_D
9845
500k
    39192U, // FMLA_ZZZI_H
9846
500k
    27134040U,  // FMLA_ZZZI_S
9847
500k
    52438105U,  // FMLAv1i16_indexed
9848
500k
    54273113U,  // FMLAv1i32_indexed
9849
500k
    54535257U,  // FMLAv1i64_indexed
9850
500k
    926872U,  // FMLAv2f32
9851
500k
    271464U,  // FMLAv2f64
9852
500k
    54273176U,  // FMLAv2i32_indexed
9853
500k
    54535272U,  // FMLAv2i64_indexed
9854
500k
    1057952U, // FMLAv4f16
9855
500k
    402544U,  // FMLAv4f32
9856
500k
    52438176U,  // FMLAv4i16_indexed
9857
500k
    54273136U,  // FMLAv4i32_indexed
9858
500k
    533624U,  // FMLAv8f16
9859
500k
    52438136U,  // FMLAv8i16_indexed
9860
500k
    47568U, // FMLSL2lanev4f16
9861
500k
    52438176U,  // FMLSL2lanev8f16
9862
500k
    48592U, // FMLSL2v4f16
9863
500k
    1057952U, // FMLSL2v8f16
9864
500k
    27139160U,  // FMLSLB_ZZZI_SHH
9865
500k
    7256U,  // FMLSLB_ZZZ_SHH
9866
500k
    27139160U,  // FMLSLT_ZZZI_SHH
9867
500k
    7256U,  // FMLSLT_ZZZ_SHH
9868
500k
    47568U, // FMLSLlanev4f16
9869
500k
    52438176U,  // FMLSLlanev8f16
9870
500k
    48592U, // FMLSLv4f16
9871
500k
    1057952U, // FMLSLv8f16
9872
500k
    134349952U, // FMLS_ZPmZZ_D
9873
500k
    28978456U,  // FMLS_ZPmZZ_H
9874
500k
    142739584U, // FMLS_ZPmZZ_S
9875
500k
    27133016U,  // FMLS_ZZZI_D
9876
500k
    39192U, // FMLS_ZZZI_H
9877
500k
    27134040U,  // FMLS_ZZZI_S
9878
500k
    52438105U,  // FMLSv1i16_indexed
9879
500k
    54273113U,  // FMLSv1i32_indexed
9880
500k
    54535257U,  // FMLSv1i64_indexed
9881
500k
    926872U,  // FMLSv2f32
9882
500k
    271464U,  // FMLSv2f64
9883
500k
    54273176U,  // FMLSv2i32_indexed
9884
500k
    54535272U,  // FMLSv2i64_indexed
9885
500k
    1057952U, // FMLSv4f16
9886
500k
    402544U,  // FMLSv4f32
9887
500k
    52438176U,  // FMLSv4i16_indexed
9888
500k
    54273136U,  // FMLSv4i32_indexed
9889
500k
    533624U,  // FMLSv8f16
9890
500k
    52438136U,  // FMLSv8i16_indexed
9891
500k
    1112U,  // FMMLA_ZZZ_D
9892
500k
    2136U,  // FMMLA_ZZZ_S
9893
500k
    472U, // FMOPA_MPPZZ_D
9894
500k
    480U, // FMOPA_MPPZZ_S
9895
500k
    472U, // FMOPS_MPPZZ_D
9896
500k
    480U, // FMOPS_MPPZZ_S
9897
500k
    43368U, // FMOVDXHighr
9898
500k
    32U,  // FMOVDXr
9899
500k
    2U, // FMOVDi
9900
500k
    32U,  // FMOVDr
9901
500k
    32U,  // FMOVHWr
9902
500k
    32U,  // FMOVHXr
9903
500k
    2U, // FMOVHi
9904
500k
    32U,  // FMOVHr
9905
500k
    32U,  // FMOVSWr
9906
500k
    2U, // FMOVSi
9907
500k
    32U,  // FMOVSr
9908
500k
    32U,  // FMOVWHr
9909
500k
    32U,  // FMOVWSr
9910
500k
    32U,  // FMOVXDHighr
9911
500k
    32U,  // FMOVXDr
9912
500k
    32U,  // FMOVXHr
9913
500k
    2U, // FMOVv2f32_ns
9914
500k
    2U, // FMOVv2f64_ns
9915
500k
    2U, // FMOVv4f16_ns
9916
500k
    2U, // FMOVv4f32_ns
9917
500k
    2U, // FMOVv8f16_ns
9918
500k
    134349952U, // FMSB_ZPmZZ_D
9919
500k
    28978456U,  // FMSB_ZPmZZ_H
9920
500k
    142739584U, // FMSB_ZPmZZ_S
9921
500k
    134232U,  // FMSUBDrrr
9922
500k
    134232U,  // FMSUBHrrr
9923
500k
    134232U,  // FMSUBSrrr
9924
500k
    3160U,  // FMULDrr
9925
500k
    3160U,  // FMULHrr
9926
500k
    3160U,  // FMULSrr
9927
500k
    3160U,  // FMULX16
9928
500k
    3160U,  // FMULX32
9929
500k
    3160U,  // FMULX64
9930
500k
    16914560U,  // FMULX_ZPmZ_D
9931
500k
    25832584U,  // FMULX_ZPmZ_H
9932
500k
    33697920U,  // FMULX_ZPmZ_S
9933
500k
    161488984U, // FMULXv1i16_indexed
9934
500k
    163323992U, // FMULXv1i32_indexed
9935
500k
    163586136U, // FMULXv1i64_indexed
9936
500k
    925848U,  // FMULXv2f32
9937
500k
    270440U,  // FMULXv2f64
9938
500k
    163324056U, // FMULXv2i32_indexed
9939
500k
    163586152U, // FMULXv2i64_indexed
9940
500k
    1056928U, // FMULXv4f16
9941
500k
    401520U,  // FMULXv4f32
9942
500k
    161489056U, // FMULXv4i16_indexed
9943
500k
    163324016U, // FMULXv4i32_indexed
9944
500k
    532600U,  // FMULXv8f16
9945
500k
    161489016U, // FMULXv8i16_indexed
9946
500k
    167909504U, // FMUL_ZPmI_D
9947
500k
    4336776U, // FMUL_ZPmI_H
9948
500k
    167915648U, // FMUL_ZPmI_S
9949
500k
    16914560U,  // FMUL_ZPmZ_D
9950
500k
    25832584U,  // FMUL_ZPmZ_H
9951
500k
    33697920U,  // FMUL_ZPmZ_S
9952
500k
    4462680U, // FMUL_ZZZI_D
9953
500k
    49288U, // FMUL_ZZZI_H
9954
500k
    4468824U, // FMUL_ZZZI_S
9955
500k
    6232U,  // FMUL_ZZZ_D
9956
500k
    136U, // FMUL_ZZZ_H
9957
500k
    12376U, // FMUL_ZZZ_S
9958
500k
    161488984U, // FMULv1i16_indexed
9959
500k
    163323992U, // FMULv1i32_indexed
9960
500k
    163586136U, // FMULv1i64_indexed
9961
500k
    925848U,  // FMULv2f32
9962
500k
    270440U,  // FMULv2f64
9963
500k
    163324056U, // FMULv2i32_indexed
9964
500k
    163586152U, // FMULv2i64_indexed
9965
500k
    1056928U, // FMULv4f16
9966
500k
    401520U,  // FMULv4f32
9967
500k
    161489056U, // FMULv4i16_indexed
9968
500k
    163324016U, // FMULv4i32_indexed
9969
500k
    532600U,  // FMULv8f16
9970
500k
    161489016U, // FMULv8i16_indexed
9971
500k
    32U,  // FNEGDr
9972
500k
    32U,  // FNEGHr
9973
500k
    32U,  // FNEGSr
9974
500k
    8U, // FNEG_ZPmZ_D
9975
500k
    0U, // FNEG_ZPmZ_H
9976
500k
    16U,  // FNEG_ZPmZ_S
9977
500k
    40U,  // FNEGv2f32
9978
500k
    48U,  // FNEGv2f64
9979
500k
    56U,  // FNEGv4f16
9980
500k
    64U,  // FNEGv4f32
9981
500k
    72U,  // FNEGv8f16
9982
500k
    134232U,  // FNMADDDrrr
9983
500k
    134232U,  // FNMADDHrrr
9984
500k
    134232U,  // FNMADDSrrr
9985
500k
    134349952U, // FNMAD_ZPmZZ_D
9986
500k
    28978456U,  // FNMAD_ZPmZZ_H
9987
500k
    142739584U, // FNMAD_ZPmZZ_S
9988
500k
    134349952U, // FNMLA_ZPmZZ_D
9989
500k
    28978456U,  // FNMLA_ZPmZZ_H
9990
500k
    142739584U, // FNMLA_ZPmZZ_S
9991
500k
    134349952U, // FNMLS_ZPmZZ_D
9992
500k
    28978456U,  // FNMLS_ZPmZZ_H
9993
500k
    142739584U, // FNMLS_ZPmZZ_S
9994
500k
    134349952U, // FNMSB_ZPmZZ_D
9995
500k
    28978456U,  // FNMSB_ZPmZZ_H
9996
500k
    142739584U, // FNMSB_ZPmZZ_S
9997
500k
    134232U,  // FNMSUBDrrr
9998
500k
    134232U,  // FNMSUBHrrr
9999
500k
    134232U,  // FNMSUBSrrr
10000
500k
    3160U,  // FNMULDrr
10001
500k
    3160U,  // FNMULHrr
10002
500k
    3160U,  // FNMULSrr
10003
500k
    32U,  // FRECPE_ZZ_D
10004
500k
    0U, // FRECPE_ZZ_H
10005
500k
    32U,  // FRECPE_ZZ_S
10006
500k
    32U,  // FRECPEv1f16
10007
500k
    32U,  // FRECPEv1i32
10008
500k
    32U,  // FRECPEv1i64
10009
500k
    40U,  // FRECPEv2f32
10010
500k
    48U,  // FRECPEv2f64
10011
500k
    56U,  // FRECPEv4f16
10012
500k
    64U,  // FRECPEv4f32
10013
500k
    72U,  // FRECPEv8f16
10014
500k
    3160U,  // FRECPS16
10015
500k
    3160U,  // FRECPS32
10016
500k
    3160U,  // FRECPS64
10017
500k
    6232U,  // FRECPS_ZZZ_D
10018
500k
    136U, // FRECPS_ZZZ_H
10019
500k
    12376U, // FRECPS_ZZZ_S
10020
500k
    925848U,  // FRECPSv2f32
10021
500k
    270440U,  // FRECPSv2f64
10022
500k
    1056928U, // FRECPSv4f16
10023
500k
    401520U,  // FRECPSv4f32
10024
500k
    532600U,  // FRECPSv8f16
10025
500k
    8U, // FRECPX_ZPmZ_D
10026
500k
    0U, // FRECPX_ZPmZ_H
10027
500k
    16U,  // FRECPX_ZPmZ_S
10028
500k
    32U,  // FRECPXv1f16
10029
500k
    32U,  // FRECPXv1i32
10030
500k
    32U,  // FRECPXv1i64
10031
500k
    32U,  // FRINT32XDr
10032
500k
    32U,  // FRINT32XSr
10033
500k
    40U,  // FRINT32Xv2f32
10034
500k
    48U,  // FRINT32Xv2f64
10035
500k
    64U,  // FRINT32Xv4f32
10036
500k
    32U,  // FRINT32ZDr
10037
500k
    32U,  // FRINT32ZSr
10038
500k
    40U,  // FRINT32Zv2f32
10039
500k
    48U,  // FRINT32Zv2f64
10040
500k
    64U,  // FRINT32Zv4f32
10041
500k
    32U,  // FRINT64XDr
10042
500k
    32U,  // FRINT64XSr
10043
500k
    40U,  // FRINT64Xv2f32
10044
500k
    48U,  // FRINT64Xv2f64
10045
500k
    64U,  // FRINT64Xv4f32
10046
500k
    32U,  // FRINT64ZDr
10047
500k
    32U,  // FRINT64ZSr
10048
500k
    40U,  // FRINT64Zv2f32
10049
500k
    48U,  // FRINT64Zv2f64
10050
500k
    64U,  // FRINT64Zv4f32
10051
500k
    32U,  // FRINTADr
10052
500k
    32U,  // FRINTAHr
10053
500k
    32U,  // FRINTASr
10054
500k
    8U, // FRINTA_ZPmZ_D
10055
500k
    0U, // FRINTA_ZPmZ_H
10056
500k
    16U,  // FRINTA_ZPmZ_S
10057
500k
    40U,  // FRINTAv2f32
10058
500k
    48U,  // FRINTAv2f64
10059
500k
    56U,  // FRINTAv4f16
10060
500k
    64U,  // FRINTAv4f32
10061
500k
    72U,  // FRINTAv8f16
10062
500k
    32U,  // FRINTIDr
10063
500k
    32U,  // FRINTIHr
10064
500k
    32U,  // FRINTISr
10065
500k
    8U, // FRINTI_ZPmZ_D
10066
500k
    0U, // FRINTI_ZPmZ_H
10067
500k
    16U,  // FRINTI_ZPmZ_S
10068
500k
    40U,  // FRINTIv2f32
10069
500k
    48U,  // FRINTIv2f64
10070
500k
    56U,  // FRINTIv4f16
10071
500k
    64U,  // FRINTIv4f32
10072
500k
    72U,  // FRINTIv8f16
10073
500k
    32U,  // FRINTMDr
10074
500k
    32U,  // FRINTMHr
10075
500k
    32U,  // FRINTMSr
10076
500k
    8U, // FRINTM_ZPmZ_D
10077
500k
    0U, // FRINTM_ZPmZ_H
10078
500k
    16U,  // FRINTM_ZPmZ_S
10079
500k
    40U,  // FRINTMv2f32
10080
500k
    48U,  // FRINTMv2f64
10081
500k
    56U,  // FRINTMv4f16
10082
500k
    64U,  // FRINTMv4f32
10083
500k
    72U,  // FRINTMv8f16
10084
500k
    32U,  // FRINTNDr
10085
500k
    32U,  // FRINTNHr
10086
500k
    32U,  // FRINTNSr
10087
500k
    8U, // FRINTN_ZPmZ_D
10088
500k
    0U, // FRINTN_ZPmZ_H
10089
500k
    16U,  // FRINTN_ZPmZ_S
10090
500k
    40U,  // FRINTNv2f32
10091
500k
    48U,  // FRINTNv2f64
10092
500k
    56U,  // FRINTNv4f16
10093
500k
    64U,  // FRINTNv4f32
10094
500k
    72U,  // FRINTNv8f16
10095
500k
    32U,  // FRINTPDr
10096
500k
    32U,  // FRINTPHr
10097
500k
    32U,  // FRINTPSr
10098
500k
    8U, // FRINTP_ZPmZ_D
10099
500k
    0U, // FRINTP_ZPmZ_H
10100
500k
    16U,  // FRINTP_ZPmZ_S
10101
500k
    40U,  // FRINTPv2f32
10102
500k
    48U,  // FRINTPv2f64
10103
500k
    56U,  // FRINTPv4f16
10104
500k
    64U,  // FRINTPv4f32
10105
500k
    72U,  // FRINTPv8f16
10106
500k
    32U,  // FRINTXDr
10107
500k
    32U,  // FRINTXHr
10108
500k
    32U,  // FRINTXSr
10109
500k
    8U, // FRINTX_ZPmZ_D
10110
500k
    0U, // FRINTX_ZPmZ_H
10111
500k
    16U,  // FRINTX_ZPmZ_S
10112
500k
    40U,  // FRINTXv2f32
10113
500k
    48U,  // FRINTXv2f64
10114
500k
    56U,  // FRINTXv4f16
10115
500k
    64U,  // FRINTXv4f32
10116
500k
    72U,  // FRINTXv8f16
10117
500k
    32U,  // FRINTZDr
10118
500k
    32U,  // FRINTZHr
10119
500k
    32U,  // FRINTZSr
10120
500k
    8U, // FRINTZ_ZPmZ_D
10121
500k
    0U, // FRINTZ_ZPmZ_H
10122
500k
    16U,  // FRINTZ_ZPmZ_S
10123
500k
    40U,  // FRINTZv2f32
10124
500k
    48U,  // FRINTZv2f64
10125
500k
    56U,  // FRINTZv4f16
10126
500k
    64U,  // FRINTZv4f32
10127
500k
    72U,  // FRINTZv8f16
10128
500k
    32U,  // FRSQRTE_ZZ_D
10129
500k
    0U, // FRSQRTE_ZZ_H
10130
500k
    32U,  // FRSQRTE_ZZ_S
10131
500k
    32U,  // FRSQRTEv1f16
10132
500k
    32U,  // FRSQRTEv1i32
10133
500k
    32U,  // FRSQRTEv1i64
10134
500k
    40U,  // FRSQRTEv2f32
10135
500k
    48U,  // FRSQRTEv2f64
10136
500k
    56U,  // FRSQRTEv4f16
10137
500k
    64U,  // FRSQRTEv4f32
10138
500k
    72U,  // FRSQRTEv8f16
10139
500k
    3160U,  // FRSQRTS16
10140
500k
    3160U,  // FRSQRTS32
10141
500k
    3160U,  // FRSQRTS64
10142
500k
    6232U,  // FRSQRTS_ZZZ_D
10143
500k
    136U, // FRSQRTS_ZZZ_H
10144
500k
    12376U, // FRSQRTS_ZZZ_S
10145
500k
    925848U,  // FRSQRTSv2f32
10146
500k
    270440U,  // FRSQRTSv2f64
10147
500k
    1056928U, // FRSQRTSv4f16
10148
500k
    401520U,  // FRSQRTSv4f32
10149
500k
    532600U,  // FRSQRTSv8f16
10150
500k
    16914560U,  // FSCALE_ZPmZ_D
10151
500k
    25832584U,  // FSCALE_ZPmZ_H
10152
500k
    33697920U,  // FSCALE_ZPmZ_S
10153
500k
    32U,  // FSQRTDr
10154
500k
    32U,  // FSQRTHr
10155
500k
    32U,  // FSQRTSr
10156
500k
    8U, // FSQRT_ZPmZ_D
10157
500k
    0U, // FSQRT_ZPmZ_H
10158
500k
    16U,  // FSQRT_ZPmZ_S
10159
500k
    40U,  // FSQRTv2f32
10160
500k
    48U,  // FSQRTv2f64
10161
500k
    56U,  // FSQRTv4f16
10162
500k
    64U,  // FSQRTv4f32
10163
500k
    72U,  // FSQRTv8f16
10164
500k
    3160U,  // FSUBDrr
10165
500k
    3160U,  // FSUBHrr
10166
500k
    125966464U, // FSUBR_ZPmI_D
10167
500k
    2894984U, // FSUBR_ZPmI_H
10168
500k
    125972608U, // FSUBR_ZPmI_S
10169
500k
    16914560U,  // FSUBR_ZPmZ_D
10170
500k
    25832584U,  // FSUBR_ZPmZ_H
10171
500k
    33697920U,  // FSUBR_ZPmZ_S
10172
500k
    3160U,  // FSUBSrr
10173
500k
    125966464U, // FSUB_ZPmI_D
10174
500k
    2894984U, // FSUB_ZPmI_H
10175
500k
    125972608U, // FSUB_ZPmI_S
10176
500k
    16914560U,  // FSUB_ZPmZ_D
10177
500k
    25832584U,  // FSUB_ZPmZ_H
10178
500k
    33697920U,  // FSUB_ZPmZ_S
10179
500k
    6232U,  // FSUB_ZZZ_D
10180
500k
    136U, // FSUB_ZZZ_H
10181
500k
    12376U, // FSUB_ZZZ_S
10182
500k
    925848U,  // FSUBv2f32
10183
500k
    270440U,  // FSUBv2f64
10184
500k
    1056928U, // FSUBv4f16
10185
500k
    401520U,  // FSUBv4f32
10186
500k
    532600U,  // FSUBv8f16
10187
500k
    137304U,  // FTMAD_ZZI_D
10188
500k
    1453192U, // FTMAD_ZZI_H
10189
500k
    143448U,  // FTMAD_ZZI_S
10190
500k
    6232U,  // FTSMUL_ZZZ_D
10191
500k
    136U, // FTSMUL_ZZZ_H
10192
500k
    12376U, // FTSMUL_ZZZ_S
10193
500k
    6232U,  // FTSSEL_ZZZ_D
10194
500k
    136U, // FTSSEL_ZZZ_H
10195
500k
    12376U, // FTSSEL_ZZZ_S
10196
500k
    2397272U, // GLD1B_D_IMM_REAL
10197
500k
    50265U, // GLD1B_D_REAL
10198
500k
    51289U, // GLD1B_D_SXTW_REAL
10199
500k
    52313U, // GLD1B_D_UXTW_REAL
10200
500k
    2397272U, // GLD1B_S_IMM_REAL
10201
500k
    53337U, // GLD1B_S_SXTW_REAL
10202
500k
    54361U, // GLD1B_S_UXTW_REAL
10203
500k
    2414680U, // GLD1D_IMM_REAL
10204
500k
    50265U, // GLD1D_REAL
10205
500k
    56409U, // GLD1D_SCALED_REAL
10206
500k
    51289U, // GLD1D_SXTW_REAL
10207
500k
    57433U, // GLD1D_SXTW_SCALED_REAL
10208
500k
    52313U, // GLD1D_UXTW_REAL
10209
500k
    58457U, // GLD1D_UXTW_SCALED_REAL
10210
500k
    2418776U, // GLD1H_D_IMM_REAL
10211
500k
    50265U, // GLD1H_D_REAL
10212
500k
    60505U, // GLD1H_D_SCALED_REAL
10213
500k
    51289U, // GLD1H_D_SXTW_REAL
10214
500k
    61529U, // GLD1H_D_SXTW_SCALED_REAL
10215
500k
    52313U, // GLD1H_D_UXTW_REAL
10216
500k
    62553U, // GLD1H_D_UXTW_SCALED_REAL
10217
500k
    2418776U, // GLD1H_S_IMM_REAL
10218
500k
    53337U, // GLD1H_S_SXTW_REAL
10219
500k
    63577U, // GLD1H_S_SXTW_SCALED_REAL
10220
500k
    54361U, // GLD1H_S_UXTW_REAL
10221
500k
    64601U, // GLD1H_S_UXTW_SCALED_REAL
10222
500k
    2397272U, // GLD1SB_D_IMM_REAL
10223
500k
    50265U, // GLD1SB_D_REAL
10224
500k
    51289U, // GLD1SB_D_SXTW_REAL
10225
500k
    52313U, // GLD1SB_D_UXTW_REAL
10226
500k
    2397272U, // GLD1SB_S_IMM_REAL
10227
500k
    53337U, // GLD1SB_S_SXTW_REAL
10228
500k
    54361U, // GLD1SB_S_UXTW_REAL
10229
500k
    2418776U, // GLD1SH_D_IMM_REAL
10230
500k
    50265U, // GLD1SH_D_REAL
10231
500k
    60505U, // GLD1SH_D_SCALED_REAL
10232
500k
    51289U, // GLD1SH_D_SXTW_REAL
10233
500k
    61529U, // GLD1SH_D_SXTW_SCALED_REAL
10234
500k
    52313U, // GLD1SH_D_UXTW_REAL
10235
500k
    62553U, // GLD1SH_D_UXTW_SCALED_REAL
10236
500k
    2418776U, // GLD1SH_S_IMM_REAL
10237
500k
    53337U, // GLD1SH_S_SXTW_REAL
10238
500k
    63577U, // GLD1SH_S_SXTW_SCALED_REAL
10239
500k
    54361U, // GLD1SH_S_UXTW_REAL
10240
500k
    64601U, // GLD1SH_S_UXTW_SCALED_REAL
10241
500k
    2424920U, // GLD1SW_D_IMM_REAL
10242
500k
    50265U, // GLD1SW_D_REAL
10243
500k
    66649U, // GLD1SW_D_SCALED_REAL
10244
500k
    51289U, // GLD1SW_D_SXTW_REAL
10245
500k
    67673U, // GLD1SW_D_SXTW_SCALED_REAL
10246
500k
    52313U, // GLD1SW_D_UXTW_REAL
10247
500k
    68697U, // GLD1SW_D_UXTW_SCALED_REAL
10248
500k
    2424920U, // GLD1W_D_IMM_REAL
10249
500k
    50265U, // GLD1W_D_REAL
10250
500k
    66649U, // GLD1W_D_SCALED_REAL
10251
500k
    51289U, // GLD1W_D_SXTW_REAL
10252
500k
    67673U, // GLD1W_D_SXTW_SCALED_REAL
10253
500k
    52313U, // GLD1W_D_UXTW_REAL
10254
500k
    68697U, // GLD1W_D_UXTW_SCALED_REAL
10255
500k
    2424920U, // GLD1W_IMM_REAL
10256
500k
    53337U, // GLD1W_SXTW_REAL
10257
500k
    69721U, // GLD1W_SXTW_SCALED_REAL
10258
500k
    54361U, // GLD1W_UXTW_REAL
10259
500k
    70745U, // GLD1W_UXTW_SCALED_REAL
10260
500k
    2397272U, // GLDFF1B_D_IMM_REAL
10261
500k
    50265U, // GLDFF1B_D_REAL
10262
500k
    51289U, // GLDFF1B_D_SXTW_REAL
10263
500k
    52313U, // GLDFF1B_D_UXTW_REAL
10264
500k
    2397272U, // GLDFF1B_S_IMM_REAL
10265
500k
    53337U, // GLDFF1B_S_SXTW_REAL
10266
500k
    54361U, // GLDFF1B_S_UXTW_REAL
10267
500k
    2414680U, // GLDFF1D_IMM_REAL
10268
500k
    50265U, // GLDFF1D_REAL
10269
500k
    56409U, // GLDFF1D_SCALED_REAL
10270
500k
    51289U, // GLDFF1D_SXTW_REAL
10271
500k
    57433U, // GLDFF1D_SXTW_SCALED_REAL
10272
500k
    52313U, // GLDFF1D_UXTW_REAL
10273
500k
    58457U, // GLDFF1D_UXTW_SCALED_REAL
10274
500k
    2418776U, // GLDFF1H_D_IMM_REAL
10275
500k
    50265U, // GLDFF1H_D_REAL
10276
500k
    60505U, // GLDFF1H_D_SCALED_REAL
10277
500k
    51289U, // GLDFF1H_D_SXTW_REAL
10278
500k
    61529U, // GLDFF1H_D_SXTW_SCALED_REAL
10279
500k
    52313U, // GLDFF1H_D_UXTW_REAL
10280
500k
    62553U, // GLDFF1H_D_UXTW_SCALED_REAL
10281
500k
    2418776U, // GLDFF1H_S_IMM_REAL
10282
500k
    53337U, // GLDFF1H_S_SXTW_REAL
10283
500k
    63577U, // GLDFF1H_S_SXTW_SCALED_REAL
10284
500k
    54361U, // GLDFF1H_S_UXTW_REAL
10285
500k
    64601U, // GLDFF1H_S_UXTW_SCALED_REAL
10286
500k
    2397272U, // GLDFF1SB_D_IMM_REAL
10287
500k
    50265U, // GLDFF1SB_D_REAL
10288
500k
    51289U, // GLDFF1SB_D_SXTW_REAL
10289
500k
    52313U, // GLDFF1SB_D_UXTW_REAL
10290
500k
    2397272U, // GLDFF1SB_S_IMM_REAL
10291
500k
    53337U, // GLDFF1SB_S_SXTW_REAL
10292
500k
    54361U, // GLDFF1SB_S_UXTW_REAL
10293
500k
    2418776U, // GLDFF1SH_D_IMM_REAL
10294
500k
    50265U, // GLDFF1SH_D_REAL
10295
500k
    60505U, // GLDFF1SH_D_SCALED_REAL
10296
500k
    51289U, // GLDFF1SH_D_SXTW_REAL
10297
500k
    61529U, // GLDFF1SH_D_SXTW_SCALED_REAL
10298
500k
    52313U, // GLDFF1SH_D_UXTW_REAL
10299
500k
    62553U, // GLDFF1SH_D_UXTW_SCALED_REAL
10300
500k
    2418776U, // GLDFF1SH_S_IMM_REAL
10301
500k
    53337U, // GLDFF1SH_S_SXTW_REAL
10302
500k
    63577U, // GLDFF1SH_S_SXTW_SCALED_REAL
10303
500k
    54361U, // GLDFF1SH_S_UXTW_REAL
10304
500k
    64601U, // GLDFF1SH_S_UXTW_SCALED_REAL
10305
500k
    2424920U, // GLDFF1SW_D_IMM_REAL
10306
500k
    50265U, // GLDFF1SW_D_REAL
10307
500k
    66649U, // GLDFF1SW_D_SCALED_REAL
10308
500k
    51289U, // GLDFF1SW_D_SXTW_REAL
10309
500k
    67673U, // GLDFF1SW_D_SXTW_SCALED_REAL
10310
500k
    52313U, // GLDFF1SW_D_UXTW_REAL
10311
500k
    68697U, // GLDFF1SW_D_UXTW_SCALED_REAL
10312
500k
    2424920U, // GLDFF1W_D_IMM_REAL
10313
500k
    50265U, // GLDFF1W_D_REAL
10314
500k
    66649U, // GLDFF1W_D_SCALED_REAL
10315
500k
    51289U, // GLDFF1W_D_SXTW_REAL
10316
500k
    67673U, // GLDFF1W_D_SXTW_SCALED_REAL
10317
500k
    52313U, // GLDFF1W_D_UXTW_REAL
10318
500k
    68697U, // GLDFF1W_D_UXTW_SCALED_REAL
10319
500k
    2424920U, // GLDFF1W_IMM_REAL
10320
500k
    53337U, // GLDFF1W_SXTW_REAL
10321
500k
    69721U, // GLDFF1W_SXTW_SCALED_REAL
10322
500k
    54361U, // GLDFF1W_UXTW_REAL
10323
500k
    70745U, // GLDFF1W_UXTW_SCALED_REAL
10324
500k
    3160U,  // GMI
10325
500k
    0U, // HINT
10326
500k
    16914616U,  // HISTCNT_ZPzZZ_D
10327
500k
    33697976U,  // HISTCNT_ZPzZZ_S
10328
500k
    10328U, // HISTSEG_ZZZ
10329
500k
    0U, // HLT
10330
500k
    0U, // HVC
10331
500k
    1U, // INCB_XPiI
10332
500k
    1U, // INCD_XPiI
10333
500k
    1U, // INCD_ZPiI
10334
500k
    1U, // INCH_XPiI
10335
500k
    0U, // INCH_ZPiI
10336
500k
    32U,  // INCP_XP_B
10337
500k
    32U,  // INCP_XP_D
10338
500k
    32U,  // INCP_XP_H
10339
500k
    32U,  // INCP_XP_S
10340
500k
    32U,  // INCP_ZP_D
10341
500k
    0U, // INCP_ZP_H
10342
500k
    32U,  // INCP_ZP_S
10343
500k
    1U, // INCW_XPiI
10344
500k
    1U, // INCW_ZPiI
10345
500k
    490U, // INDEX_II_B
10346
500k
    3160U,  // INDEX_II_D
10347
500k
    2U, // INDEX_II_H
10348
500k
    3160U,  // INDEX_II_S
10349
500k
    202U, // INDEX_IR_B
10350
500k
    3160U,  // INDEX_IR_D
10351
500k
    33U,  // INDEX_IR_H
10352
500k
    3160U,  // INDEX_IR_S
10353
500k
    71768U, // INDEX_RI_B
10354
500k
    3160U,  // INDEX_RI_D
10355
500k
    496U, // INDEX_RI_H
10356
500k
    3160U,  // INDEX_RI_S
10357
500k
    3160U,  // INDEX_RR_B
10358
500k
    3160U,  // INDEX_RR_D
10359
500k
    200U, // INDEX_RR_H
10360
500k
    3160U,  // INDEX_RR_S
10361
500k
    506U, // INSERT_MXIPZ_H_B
10362
500k
    474U, // INSERT_MXIPZ_H_D
10363
500k
    514U, // INSERT_MXIPZ_H_H
10364
500k
    522U, // INSERT_MXIPZ_H_Q
10365
500k
    482U, // INSERT_MXIPZ_H_S
10366
500k
    506U, // INSERT_MXIPZ_V_B
10367
500k
    474U, // INSERT_MXIPZ_V_D
10368
500k
    514U, // INSERT_MXIPZ_V_H
10369
500k
    522U, // INSERT_MXIPZ_V_Q
10370
500k
    482U, // INSERT_MXIPZ_V_S
10371
500k
    33U,  // INSR_ZR_B
10372
500k
    33U,  // INSR_ZR_D
10373
500k
    0U, // INSR_ZR_H
10374
500k
    33U,  // INSR_ZR_S
10375
500k
    2U, // INSR_ZV_B
10376
500k
    2U, // INSR_ZV_D
10377
500k
    0U, // INSR_ZV_H
10378
500k
    2U, // INSR_ZV_S
10379
500k
    1U, // INSvi16gpr
10380
500k
    39258U, // INSvi16lane
10381
500k
    1U, // INSvi32gpr
10382
500k
    39266U, // INSvi32lane
10383
500k
    1U, // INSvi64gpr
10384
500k
    39274U, // INSvi64lane
10385
500k
    1U, // INSvi8gpr
10386
500k
    39282U, // INSvi8lane
10387
500k
    3160U,  // IRG
10388
500k
    0U, // ISB
10389
500k
    10328U, // LASTA_RPZ_B
10390
500k
    6232U,  // LASTA_RPZ_D
10391
500k
    5208U,  // LASTA_RPZ_H
10392
500k
    12376U, // LASTA_RPZ_S
10393
500k
    10328U, // LASTA_VPZ_B
10394
500k
    6232U,  // LASTA_VPZ_D
10395
500k
    5208U,  // LASTA_VPZ_H
10396
500k
    12376U, // LASTA_VPZ_S
10397
500k
    10328U, // LASTB_RPZ_B
10398
500k
    6232U,  // LASTB_RPZ_D
10399
500k
    5208U,  // LASTB_RPZ_H
10400
500k
    12376U, // LASTB_RPZ_S
10401
500k
    10328U, // LASTB_VPZ_B
10402
500k
    6232U,  // LASTB_VPZ_D
10403
500k
    5208U,  // LASTB_VPZ_H
10404
500k
    12376U, // LASTB_VPZ_S
10405
500k
    72793U, // LD1B
10406
500k
    72793U, // LD1B_D
10407
500k
    4625497U, // LD1B_D_IMM_REAL
10408
500k
    72793U, // LD1B_H
10409
500k
    4625497U, // LD1B_H_IMM_REAL
10410
500k
    4625497U, // LD1B_IMM_REAL
10411
500k
    72793U, // LD1B_S
10412
500k
    4625497U, // LD1B_S_IMM_REAL
10413
500k
    73817U, // LD1D
10414
500k
    4625497U, // LD1D_IMM_REAL
10415
500k
    0U, // LD1Fourv16b
10416
500k
    0U, // LD1Fourv16b_POST
10417
500k
    0U, // LD1Fourv1d
10418
500k
    0U, // LD1Fourv1d_POST
10419
500k
    0U, // LD1Fourv2d
10420
500k
    0U, // LD1Fourv2d_POST
10421
500k
    0U, // LD1Fourv2s
10422
500k
    0U, // LD1Fourv2s_POST
10423
500k
    0U, // LD1Fourv4h
10424
500k
    0U, // LD1Fourv4h_POST
10425
500k
    0U, // LD1Fourv4s
10426
500k
    0U, // LD1Fourv4s_POST
10427
500k
    0U, // LD1Fourv8b
10428
500k
    0U, // LD1Fourv8b_POST
10429
500k
    0U, // LD1Fourv8h
10430
500k
    0U, // LD1Fourv8h_POST
10431
500k
    74841U, // LD1H
10432
500k
    74841U, // LD1H_D
10433
500k
    4625497U, // LD1H_D_IMM_REAL
10434
500k
    4625497U, // LD1H_IMM_REAL
10435
500k
    74841U, // LD1H_S
10436
500k
    4625497U, // LD1H_S_IMM_REAL
10437
500k
    0U, // LD1Onev16b
10438
500k
    0U, // LD1Onev16b_POST
10439
500k
    0U, // LD1Onev1d
10440
500k
    0U, // LD1Onev1d_POST
10441
500k
    0U, // LD1Onev2d
10442
500k
    0U, // LD1Onev2d_POST
10443
500k
    0U, // LD1Onev2s
10444
500k
    0U, // LD1Onev2s_POST
10445
500k
    0U, // LD1Onev4h
10446
500k
    0U, // LD1Onev4h_POST
10447
500k
    0U, // LD1Onev4s
10448
500k
    0U, // LD1Onev4s_POST
10449
500k
    0U, // LD1Onev8b
10450
500k
    0U, // LD1Onev8b_POST
10451
500k
    0U, // LD1Onev8h
10452
500k
    0U, // LD1Onev8h_POST
10453
500k
    2397273U, // LD1RB_D_IMM
10454
500k
    2397273U, // LD1RB_H_IMM
10455
500k
    2397273U, // LD1RB_IMM
10456
500k
    2397273U, // LD1RB_S_IMM
10457
500k
    2414681U, // LD1RD_IMM
10458
500k
    2418777U, // LD1RH_D_IMM
10459
500k
    2418777U, // LD1RH_IMM
10460
500k
    2418777U, // LD1RH_S_IMM
10461
500k
    72793U, // LD1RO_B
10462
500k
    75865U, // LD1RO_B_IMM
10463
500k
    73817U, // LD1RO_D
10464
500k
    75865U, // LD1RO_D_IMM
10465
500k
    74841U, // LD1RO_H
10466
500k
    75865U, // LD1RO_H_IMM
10467
500k
    76889U, // LD1RO_W
10468
500k
    75865U, // LD1RO_W_IMM
10469
500k
    72793U, // LD1RQ_B
10470
500k
    2437209U, // LD1RQ_B_IMM
10471
500k
    73817U, // LD1RQ_D
10472
500k
    2437209U, // LD1RQ_D_IMM
10473
500k
    74841U, // LD1RQ_H
10474
500k
    2437209U, // LD1RQ_H_IMM
10475
500k
    76889U, // LD1RQ_W
10476
500k
    2437209U, // LD1RQ_W_IMM
10477
500k
    2397273U, // LD1RSB_D_IMM
10478
500k
    2397273U, // LD1RSB_H_IMM
10479
500k
    2397273U, // LD1RSB_S_IMM
10480
500k
    2418777U, // LD1RSH_D_IMM
10481
500k
    2418777U, // LD1RSH_S_IMM
10482
500k
    2424921U, // LD1RSW_IMM
10483
500k
    2424921U, // LD1RW_D_IMM
10484
500k
    2424921U, // LD1RW_IMM
10485
500k
    0U, // LD1Rv16b
10486
500k
    0U, // LD1Rv16b_POST
10487
500k
    0U, // LD1Rv1d
10488
500k
    0U, // LD1Rv1d_POST
10489
500k
    0U, // LD1Rv2d
10490
500k
    0U, // LD1Rv2d_POST
10491
500k
    0U, // LD1Rv2s
10492
500k
    0U, // LD1Rv2s_POST
10493
500k
    0U, // LD1Rv4h
10494
500k
    0U, // LD1Rv4h_POST
10495
500k
    0U, // LD1Rv4s
10496
500k
    0U, // LD1Rv4s_POST
10497
500k
    0U, // LD1Rv8b
10498
500k
    0U, // LD1Rv8b_POST
10499
500k
    0U, // LD1Rv8h
10500
500k
    0U, // LD1Rv8h_POST
10501
500k
    72793U, // LD1SB_D
10502
500k
    4625497U, // LD1SB_D_IMM_REAL
10503
500k
    72793U, // LD1SB_H
10504
500k
    4625497U, // LD1SB_H_IMM_REAL
10505
500k
    72793U, // LD1SB_S
10506
500k
    4625497U, // LD1SB_S_IMM_REAL
10507
500k
    74841U, // LD1SH_D
10508
500k
    4625497U, // LD1SH_D_IMM_REAL
10509
500k
    74841U, // LD1SH_S
10510
500k
    4625497U, // LD1SH_S_IMM_REAL
10511
500k
    76889U, // LD1SW_D
10512
500k
    4625497U, // LD1SW_D_IMM_REAL
10513
500k
    0U, // LD1Threev16b
10514
500k
    0U, // LD1Threev16b_POST
10515
500k
    0U, // LD1Threev1d
10516
500k
    0U, // LD1Threev1d_POST
10517
500k
    0U, // LD1Threev2d
10518
500k
    0U, // LD1Threev2d_POST
10519
500k
    0U, // LD1Threev2s
10520
500k
    0U, // LD1Threev2s_POST
10521
500k
    0U, // LD1Threev4h
10522
500k
    0U, // LD1Threev4h_POST
10523
500k
    0U, // LD1Threev4s
10524
500k
    0U, // LD1Threev4s_POST
10525
500k
    0U, // LD1Threev8b
10526
500k
    0U, // LD1Threev8b_POST
10527
500k
    0U, // LD1Threev8h
10528
500k
    0U, // LD1Threev8h_POST
10529
500k
    0U, // LD1Twov16b
10530
500k
    0U, // LD1Twov16b_POST
10531
500k
    0U, // LD1Twov1d
10532
500k
    0U, // LD1Twov1d_POST
10533
500k
    0U, // LD1Twov2d
10534
500k
    0U, // LD1Twov2d_POST
10535
500k
    0U, // LD1Twov2s
10536
500k
    0U, // LD1Twov2s_POST
10537
500k
    0U, // LD1Twov4h
10538
500k
    0U, // LD1Twov4h_POST
10539
500k
    0U, // LD1Twov4s
10540
500k
    0U, // LD1Twov4s_POST
10541
500k
    0U, // LD1Twov8b
10542
500k
    0U, // LD1Twov8b_POST
10543
500k
    0U, // LD1Twov8h
10544
500k
    0U, // LD1Twov8h_POST
10545
500k
    76889U, // LD1W
10546
500k
    76889U, // LD1W_D
10547
500k
    4625497U, // LD1W_D_IMM_REAL
10548
500k
    4625497U, // LD1W_IMM_REAL
10549
500k
    530U, // LD1_MXIPXX_H_B
10550
500k
    538U, // LD1_MXIPXX_H_D
10551
500k
    546U, // LD1_MXIPXX_H_H
10552
500k
    554U, // LD1_MXIPXX_H_Q
10553
500k
    562U, // LD1_MXIPXX_H_S
10554
500k
    530U, // LD1_MXIPXX_V_B
10555
500k
    538U, // LD1_MXIPXX_V_D
10556
500k
    546U, // LD1_MXIPXX_V_H
10557
500k
    554U, // LD1_MXIPXX_V_Q
10558
500k
    562U, // LD1_MXIPXX_V_S
10559
500k
    0U, // LD1i16
10560
500k
    0U, // LD1i16_POST
10561
500k
    0U, // LD1i32
10562
500k
    0U, // LD1i32_POST
10563
500k
    0U, // LD1i64
10564
500k
    0U, // LD1i64_POST
10565
500k
    0U, // LD1i8
10566
500k
    0U, // LD1i8_POST
10567
500k
    72793U, // LD2B
10568
500k
    4647001U, // LD2B_IMM
10569
500k
    73817U, // LD2D
10570
500k
    4647001U, // LD2D_IMM
10571
500k
    74841U, // LD2H
10572
500k
    4647001U, // LD2H_IMM
10573
500k
    0U, // LD2Rv16b
10574
500k
    0U, // LD2Rv16b_POST
10575
500k
    0U, // LD2Rv1d
10576
500k
    0U, // LD2Rv1d_POST
10577
500k
    0U, // LD2Rv2d
10578
500k
    0U, // LD2Rv2d_POST
10579
500k
    0U, // LD2Rv2s
10580
500k
    0U, // LD2Rv2s_POST
10581
500k
    0U, // LD2Rv4h
10582
500k
    0U, // LD2Rv4h_POST
10583
500k
    0U, // LD2Rv4s
10584
500k
    0U, // LD2Rv4s_POST
10585
500k
    0U, // LD2Rv8b
10586
500k
    0U, // LD2Rv8b_POST
10587
500k
    0U, // LD2Rv8h
10588
500k
    0U, // LD2Rv8h_POST
10589
500k
    0U, // LD2Twov16b
10590
500k
    0U, // LD2Twov16b_POST
10591
500k
    0U, // LD2Twov2d
10592
500k
    0U, // LD2Twov2d_POST
10593
500k
    0U, // LD2Twov2s
10594
500k
    0U, // LD2Twov2s_POST
10595
500k
    0U, // LD2Twov4h
10596
500k
    0U, // LD2Twov4h_POST
10597
500k
    0U, // LD2Twov4s
10598
500k
    0U, // LD2Twov4s_POST
10599
500k
    0U, // LD2Twov8b
10600
500k
    0U, // LD2Twov8b_POST
10601
500k
    0U, // LD2Twov8h
10602
500k
    0U, // LD2Twov8h_POST
10603
500k
    76889U, // LD2W
10604
500k
    4647001U, // LD2W_IMM
10605
500k
    0U, // LD2i16
10606
500k
    0U, // LD2i16_POST
10607
500k
    0U, // LD2i32
10608
500k
    0U, // LD2i32_POST
10609
500k
    0U, // LD2i64
10610
500k
    0U, // LD2i64_POST
10611
500k
    0U, // LD2i8
10612
500k
    0U, // LD2i8_POST
10613
500k
    72793U, // LD3B
10614
500k
    78937U, // LD3B_IMM
10615
500k
    73817U, // LD3D
10616
500k
    78937U, // LD3D_IMM
10617
500k
    74841U, // LD3H
10618
500k
    78937U, // LD3H_IMM
10619
500k
    0U, // LD3Rv16b
10620
500k
    0U, // LD3Rv16b_POST
10621
500k
    0U, // LD3Rv1d
10622
500k
    0U, // LD3Rv1d_POST
10623
500k
    0U, // LD3Rv2d
10624
500k
    0U, // LD3Rv2d_POST
10625
500k
    0U, // LD3Rv2s
10626
500k
    0U, // LD3Rv2s_POST
10627
500k
    0U, // LD3Rv4h
10628
500k
    0U, // LD3Rv4h_POST
10629
500k
    0U, // LD3Rv4s
10630
500k
    0U, // LD3Rv4s_POST
10631
500k
    0U, // LD3Rv8b
10632
500k
    0U, // LD3Rv8b_POST
10633
500k
    0U, // LD3Rv8h
10634
500k
    0U, // LD3Rv8h_POST
10635
500k
    0U, // LD3Threev16b
10636
500k
    0U, // LD3Threev16b_POST
10637
500k
    0U, // LD3Threev2d
10638
500k
    0U, // LD3Threev2d_POST
10639
500k
    0U, // LD3Threev2s
10640
500k
    0U, // LD3Threev2s_POST
10641
500k
    0U, // LD3Threev4h
10642
500k
    0U, // LD3Threev4h_POST
10643
500k
    0U, // LD3Threev4s
10644
500k
    0U, // LD3Threev4s_POST
10645
500k
    0U, // LD3Threev8b
10646
500k
    0U, // LD3Threev8b_POST
10647
500k
    0U, // LD3Threev8h
10648
500k
    0U, // LD3Threev8h_POST
10649
500k
    76889U, // LD3W
10650
500k
    78937U, // LD3W_IMM
10651
500k
    0U, // LD3i16
10652
500k
    0U, // LD3i16_POST
10653
500k
    0U, // LD3i32
10654
500k
    0U, // LD3i32_POST
10655
500k
    0U, // LD3i64
10656
500k
    0U, // LD3i64_POST
10657
500k
    0U, // LD3i8
10658
500k
    0U, // LD3i8_POST
10659
500k
    72793U, // LD4B
10660
500k
    4653145U, // LD4B_IMM
10661
500k
    73817U, // LD4D
10662
500k
    4653145U, // LD4D_IMM
10663
500k
    0U, // LD4Fourv16b
10664
500k
    0U, // LD4Fourv16b_POST
10665
500k
    0U, // LD4Fourv2d
10666
500k
    0U, // LD4Fourv2d_POST
10667
500k
    0U, // LD4Fourv2s
10668
500k
    0U, // LD4Fourv2s_POST
10669
500k
    0U, // LD4Fourv4h
10670
500k
    0U, // LD4Fourv4h_POST
10671
500k
    0U, // LD4Fourv4s
10672
500k
    0U, // LD4Fourv4s_POST
10673
500k
    0U, // LD4Fourv8b
10674
500k
    0U, // LD4Fourv8b_POST
10675
500k
    0U, // LD4Fourv8h
10676
500k
    0U, // LD4Fourv8h_POST
10677
500k
    74841U, // LD4H
10678
500k
    4653145U, // LD4H_IMM
10679
500k
    0U, // LD4Rv16b
10680
500k
    0U, // LD4Rv16b_POST
10681
500k
    0U, // LD4Rv1d
10682
500k
    0U, // LD4Rv1d_POST
10683
500k
    0U, // LD4Rv2d
10684
500k
    0U, // LD4Rv2d_POST
10685
500k
    0U, // LD4Rv2s
10686
500k
    0U, // LD4Rv2s_POST
10687
500k
    0U, // LD4Rv4h
10688
500k
    0U, // LD4Rv4h_POST
10689
500k
    0U, // LD4Rv4s
10690
500k
    0U, // LD4Rv4s_POST
10691
500k
    0U, // LD4Rv8b
10692
500k
    0U, // LD4Rv8b_POST
10693
500k
    0U, // LD4Rv8h
10694
500k
    0U, // LD4Rv8h_POST
10695
500k
    76889U, // LD4W
10696
500k
    4653145U, // LD4W_IMM
10697
500k
    0U, // LD4i16
10698
500k
    0U, // LD4i16_POST
10699
500k
    0U, // LD4i32
10700
500k
    0U, // LD4i32_POST
10701
500k
    0U, // LD4i64
10702
500k
    0U, // LD4i64_POST
10703
500k
    0U, // LD4i8
10704
500k
    0U, // LD4i8_POST
10705
500k
    0U, // LD64B
10706
500k
    2U, // LDADDAB
10707
500k
    2U, // LDADDAH
10708
500k
    2U, // LDADDALB
10709
500k
    2U, // LDADDALH
10710
500k
    2U, // LDADDALW
10711
500k
    2U, // LDADDALX
10712
500k
    2U, // LDADDAW
10713
500k
    2U, // LDADDAX
10714
500k
    2U, // LDADDB
10715
500k
    2U, // LDADDH
10716
500k
    2U, // LDADDLB
10717
500k
    2U, // LDADDLH
10718
500k
    2U, // LDADDLW
10719
500k
    2U, // LDADDLX
10720
500k
    2U, // LDADDW
10721
500k
    2U, // LDADDX
10722
500k
    568U, // LDAPRB
10723
500k
    568U, // LDAPRH
10724
500k
    568U, // LDAPRW
10725
500k
    568U, // LDAPRX
10726
500k
    2362456U, // LDAPURBi
10727
500k
    2362456U, // LDAPURHi
10728
500k
    2362456U, // LDAPURSBWi
10729
500k
    2362456U, // LDAPURSBXi
10730
500k
    2362456U, // LDAPURSHWi
10731
500k
    2362456U, // LDAPURSHXi
10732
500k
    2362456U, // LDAPURSWi
10733
500k
    2362456U, // LDAPURXi
10734
500k
    2362456U, // LDAPURi
10735
500k
    568U, // LDARB
10736
500k
    568U, // LDARH
10737
500k
    568U, // LDARW
10738
500k
    568U, // LDARX
10739
500k
    2362576U, // LDAXPW
10740
500k
    2362576U, // LDAXPX
10741
500k
    568U, // LDAXRB
10742
500k
    568U, // LDAXRH
10743
500k
    568U, // LDAXRW
10744
500k
    568U, // LDAXRX
10745
500k
    2U, // LDCLRAB
10746
500k
    2U, // LDCLRAH
10747
500k
    2U, // LDCLRALB
10748
500k
    2U, // LDCLRALH
10749
500k
    2U, // LDCLRALW
10750
500k
    2U, // LDCLRALX
10751
500k
    2U, // LDCLRAW
10752
500k
    2U, // LDCLRAX
10753
500k
    2U, // LDCLRB
10754
500k
    2U, // LDCLRH
10755
500k
    2U, // LDCLRLB
10756
500k
    2U, // LDCLRLH
10757
500k
    2U, // LDCLRLW
10758
500k
    2U, // LDCLRLX
10759
500k
    2U, // LDCLRW
10760
500k
    2U, // LDCLRX
10761
500k
    2U, // LDEORAB
10762
500k
    2U, // LDEORAH
10763
500k
    2U, // LDEORALB
10764
500k
    2U, // LDEORALH
10765
500k
    2U, // LDEORALW
10766
500k
    2U, // LDEORALX
10767
500k
    2U, // LDEORAW
10768
500k
    2U, // LDEORAX
10769
500k
    2U, // LDEORB
10770
500k
    2U, // LDEORH
10771
500k
    2U, // LDEORLB
10772
500k
    2U, // LDEORLH
10773
500k
    2U, // LDEORLW
10774
500k
    2U, // LDEORLX
10775
500k
    2U, // LDEORW
10776
500k
    2U, // LDEORX
10777
500k
    72793U, // LDFF1B_D_REAL
10778
500k
    72793U, // LDFF1B_H_REAL
10779
500k
    72793U, // LDFF1B_REAL
10780
500k
    72793U, // LDFF1B_S_REAL
10781
500k
    73817U, // LDFF1D_REAL
10782
500k
    74841U, // LDFF1H_D_REAL
10783
500k
    74841U, // LDFF1H_REAL
10784
500k
    74841U, // LDFF1H_S_REAL
10785
500k
    72793U, // LDFF1SB_D_REAL
10786
500k
    72793U, // LDFF1SB_H_REAL
10787
500k
    72793U, // LDFF1SB_S_REAL
10788
500k
    74841U, // LDFF1SH_D_REAL
10789
500k
    74841U, // LDFF1SH_S_REAL
10790
500k
    76889U, // LDFF1SW_D_REAL
10791
500k
    76889U, // LDFF1W_D_REAL
10792
500k
    76889U, // LDFF1W_REAL
10793
500k
    2437209U, // LDG
10794
500k
    568U, // LDGM
10795
500k
    568U, // LDLARB
10796
500k
    568U, // LDLARH
10797
500k
    568U, // LDLARW
10798
500k
    568U, // LDLARX
10799
500k
    4625497U, // LDNF1B_D_IMM_REAL
10800
500k
    4625497U, // LDNF1B_H_IMM_REAL
10801
500k
    4625497U, // LDNF1B_IMM_REAL
10802
500k
    4625497U, // LDNF1B_S_IMM_REAL
10803
500k
    4625497U, // LDNF1D_IMM_REAL
10804
500k
    4625497U, // LDNF1H_D_IMM_REAL
10805
500k
    4625497U, // LDNF1H_IMM_REAL
10806
500k
    4625497U, // LDNF1H_S_IMM_REAL
10807
500k
    4625497U, // LDNF1SB_D_IMM_REAL
10808
500k
    4625497U, // LDNF1SB_H_IMM_REAL
10809
500k
    4625497U, // LDNF1SB_S_IMM_REAL
10810
500k
    4625497U, // LDNF1SH_D_IMM_REAL
10811
500k
    4625497U, // LDNF1SH_S_IMM_REAL
10812
500k
    4625497U, // LDNF1SW_D_IMM_REAL
10813
500k
    4625497U, // LDNF1W_D_IMM_REAL
10814
500k
    4625497U, // LDNF1W_IMM_REAL
10815
500k
    176295120U, // LDNPDi
10816
500k
    184683728U, // LDNPQi
10817
500k
    193072336U, // LDNPSi
10818
500k
    193072336U, // LDNPWi
10819
500k
    176295120U, // LDNPXi
10820
500k
    4625497U, // LDNT1B_ZRI
10821
500k
    72793U, // LDNT1B_ZRR
10822
500k
    2397272U, // LDNT1B_ZZR_D_REAL
10823
500k
    2397272U, // LDNT1B_ZZR_S_REAL
10824
500k
    4625497U, // LDNT1D_ZRI
10825
500k
    73817U, // LDNT1D_ZRR
10826
500k
    2397272U, // LDNT1D_ZZR_D_REAL
10827
500k
    4625497U, // LDNT1H_ZRI
10828
500k
    74841U, // LDNT1H_ZRR
10829
500k
    2397272U, // LDNT1H_ZZR_D_REAL
10830
500k
    2397272U, // LDNT1H_ZZR_S_REAL
10831
500k
    2397272U, // LDNT1SB_ZZR_D_REAL
10832
500k
    2397272U, // LDNT1SB_ZZR_S_REAL
10833
500k
    2397272U, // LDNT1SH_ZZR_D_REAL
10834
500k
    2397272U, // LDNT1SH_ZZR_S_REAL
10835
500k
    2397272U, // LDNT1SW_ZZR_D_REAL
10836
500k
    4625497U, // LDNT1W_ZRI
10837
500k
    76889U, // LDNT1W_ZRR
10838
500k
    2397272U, // LDNT1W_ZZR_D_REAL
10839
500k
    2397272U, // LDNT1W_ZZR_S_REAL
10840
500k
    176295120U, // LDPDi
10841
500k
    206083281U, // LDPDpost
10842
500k
    2885850321U,  // LDPDpre
10843
500k
    184683728U, // LDPQi
10844
500k
    214471889U, // LDPQpost
10845
500k
    2894238929U,  // LDPQpre
10846
500k
    193072336U, // LDPSWi
10847
500k
    222860497U, // LDPSWpost
10848
500k
    2902627537U,  // LDPSWpre
10849
500k
    193072336U, // LDPSi
10850
500k
    222860497U, // LDPSpost
10851
500k
    2902627537U,  // LDPSpre
10852
500k
    193072336U, // LDPWi
10853
500k
    222860497U, // LDPWpost
10854
500k
    2902627537U,  // LDPWpre
10855
500k
    176295120U, // LDPXi
10856
500k
    206083281U, // LDPXpost
10857
500k
    2885850321U,  // LDPXpre
10858
500k
    79960U, // LDRAAindexed
10859
500k
    4905049U, // LDRAAwriteback
10860
500k
    79960U, // LDRABindexed
10861
500k
    4905049U, // LDRABwriteback
10862
500k
    38465U, // LDRBBpost
10863
500k
    4887641U, // LDRBBpre
10864
500k
    226626648U, // LDRBBroW
10865
500k
    235015256U, // LDRBBroX
10866
500k
    80984U, // LDRBBui
10867
500k
    38465U, // LDRBpost
10868
500k
    4887641U, // LDRBpre
10869
500k
    226626648U, // LDRBroW
10870
500k
    235015256U, // LDRBroX
10871
500k
    80984U, // LDRBui
10872
500k
    1U, // LDRDl
10873
500k
    38465U, // LDRDpost
10874
500k
    4887641U, // LDRDpre
10875
500k
    243403864U, // LDRDroW
10876
500k
    251792472U, // LDRDroX
10877
500k
    82008U, // LDRDui
10878
500k
    38465U, // LDRHHpost
10879
500k
    4887641U, // LDRHHpre
10880
500k
    260181080U, // LDRHHroW
10881
500k
    268569688U, // LDRHHroX
10882
500k
    83032U, // LDRHHui
10883
500k
    38465U, // LDRHpost
10884
500k
    4887641U, // LDRHpre
10885
500k
    260181080U, // LDRHroW
10886
500k
    268569688U, // LDRHroX
10887
500k
    83032U, // LDRHui
10888
500k
    1U, // LDRQl
10889
500k
    38465U, // LDRQpost
10890
500k
    4887641U, // LDRQpre
10891
500k
    276958296U, // LDRQroW
10892
500k
    285346904U, // LDRQroX
10893
500k
    84056U, // LDRQui
10894
500k
    38465U, // LDRSBWpost
10895
500k
    4887641U, // LDRSBWpre
10896
500k
    226626648U, // LDRSBWroW
10897
500k
    235015256U, // LDRSBWroX
10898
500k
    80984U, // LDRSBWui
10899
500k
    38465U, // LDRSBXpost
10900
500k
    4887641U, // LDRSBXpre
10901
500k
    226626648U, // LDRSBXroW
10902
500k
    235015256U, // LDRSBXroX
10903
500k
    80984U, // LDRSBXui
10904
500k
    38465U, // LDRSHWpost
10905
500k
    4887641U, // LDRSHWpre
10906
500k
    260181080U, // LDRSHWroW
10907
500k
    268569688U, // LDRSHWroX
10908
500k
    83032U, // LDRSHWui
10909
500k
    38465U, // LDRSHXpost
10910
500k
    4887641U, // LDRSHXpre
10911
500k
    260181080U, // LDRSHXroW
10912
500k
    268569688U, // LDRSHXroX
10913
500k
    83032U, // LDRSHXui
10914
500k
    1U, // LDRSWl
10915
500k
    38465U, // LDRSWpost
10916
500k
    4887641U, // LDRSWpre
10917
500k
    293735512U, // LDRSWroW
10918
500k
    302124120U, // LDRSWroX
10919
500k
    85080U, // LDRSWui
10920
500k
    1U, // LDRSl
10921
500k
    38465U, // LDRSpost
10922
500k
    4887641U, // LDRSpre
10923
500k
    293735512U, // LDRSroW
10924
500k
    302124120U, // LDRSroX
10925
500k
    85080U, // LDRSui
10926
500k
    1U, // LDRWl
10927
500k
    38465U, // LDRWpost
10928
500k
    4887641U, // LDRWpre
10929
500k
    293735512U, // LDRWroW
10930
500k
    302124120U, // LDRWroX
10931
500k
    85080U, // LDRWui
10932
500k
    1U, // LDRXl
10933
500k
    38465U, // LDRXpost
10934
500k
    4887641U, // LDRXpre
10935
500k
    243403864U, // LDRXroW
10936
500k
    251792472U, // LDRXroX
10937
500k
    82008U, // LDRXui
10938
500k
    4590680U, // LDR_PXI
10939
500k
    0U, // LDR_ZA
10940
500k
    4590680U, // LDR_ZXI
10941
500k
    2U, // LDSETAB
10942
500k
    2U, // LDSETAH
10943
500k
    2U, // LDSETALB
10944
500k
    2U, // LDSETALH
10945
500k
    2U, // LDSETALW
10946
500k
    2U, // LDSETALX
10947
500k
    2U, // LDSETAW
10948
500k
    2U, // LDSETAX
10949
500k
    2U, // LDSETB
10950
500k
    2U, // LDSETH
10951
500k
    2U, // LDSETLB
10952
500k
    2U, // LDSETLH
10953
500k
    2U, // LDSETLW
10954
500k
    2U, // LDSETLX
10955
500k
    2U, // LDSETW
10956
500k
    2U, // LDSETX
10957
500k
    2U, // LDSMAXAB
10958
500k
    2U, // LDSMAXAH
10959
500k
    2U, // LDSMAXALB
10960
500k
    2U, // LDSMAXALH
10961
500k
    2U, // LDSMAXALW
10962
500k
    2U, // LDSMAXALX
10963
500k
    2U, // LDSMAXAW
10964
500k
    2U, // LDSMAXAX
10965
500k
    2U, // LDSMAXB
10966
500k
    2U, // LDSMAXH
10967
500k
    2U, // LDSMAXLB
10968
500k
    2U, // LDSMAXLH
10969
500k
    2U, // LDSMAXLW
10970
500k
    2U, // LDSMAXLX
10971
500k
    2U, // LDSMAXW
10972
500k
    2U, // LDSMAXX
10973
500k
    2U, // LDSMINAB
10974
500k
    2U, // LDSMINAH
10975
500k
    2U, // LDSMINALB
10976
500k
    2U, // LDSMINALH
10977
500k
    2U, // LDSMINALW
10978
500k
    2U, // LDSMINALX
10979
500k
    2U, // LDSMINAW
10980
500k
    2U, // LDSMINAX
10981
500k
    2U, // LDSMINB
10982
500k
    2U, // LDSMINH
10983
500k
    2U, // LDSMINLB
10984
500k
    2U, // LDSMINLH
10985
500k
    2U, // LDSMINLW
10986
500k
    2U, // LDSMINLX
10987
500k
    2U, // LDSMINW
10988
500k
    2U, // LDSMINX
10989
500k
    2362456U, // LDTRBi
10990
500k
    2362456U, // LDTRHi
10991
500k
    2362456U, // LDTRSBWi
10992
500k
    2362456U, // LDTRSBXi
10993
500k
    2362456U, // LDTRSHWi
10994
500k
    2362456U, // LDTRSHXi
10995
500k
    2362456U, // LDTRSWi
10996
500k
    2362456U, // LDTRWi
10997
500k
    2362456U, // LDTRXi
10998
500k
    2U, // LDUMAXAB
10999
500k
    2U, // LDUMAXAH
11000
500k
    2U, // LDUMAXALB
11001
500k
    2U, // LDUMAXALH
11002
500k
    2U, // LDUMAXALW
11003
500k
    2U, // LDUMAXALX
11004
500k
    2U, // LDUMAXAW
11005
500k
    2U, // LDUMAXAX
11006
500k
    2U, // LDUMAXB
11007
500k
    2U, // LDUMAXH
11008
500k
    2U, // LDUMAXLB
11009
500k
    2U, // LDUMAXLH
11010
500k
    2U, // LDUMAXLW
11011
500k
    2U, // LDUMAXLX
11012
500k
    2U, // LDUMAXW
11013
500k
    2U, // LDUMAXX
11014
500k
    2U, // LDUMINAB
11015
500k
    2U, // LDUMINAH
11016
500k
    2U, // LDUMINALB
11017
500k
    2U, // LDUMINALH
11018
500k
    2U, // LDUMINALW
11019
500k
    2U, // LDUMINALX
11020
500k
    2U, // LDUMINAW
11021
500k
    2U, // LDUMINAX
11022
500k
    2U, // LDUMINB
11023
500k
    2U, // LDUMINH
11024
500k
    2U, // LDUMINLB
11025
500k
    2U, // LDUMINLH
11026
500k
    2U, // LDUMINLW
11027
500k
    2U, // LDUMINLX
11028
500k
    2U, // LDUMINW
11029
500k
    2U, // LDUMINX
11030
500k
    2362456U, // LDURBBi
11031
500k
    2362456U, // LDURBi
11032
500k
    2362456U, // LDURDi
11033
500k
    2362456U, // LDURHHi
11034
500k
    2362456U, // LDURHi
11035
500k
    2362456U, // LDURQi
11036
500k
    2362456U, // LDURSBWi
11037
500k
    2362456U, // LDURSBXi
11038
500k
    2362456U, // LDURSHWi
11039
500k
    2362456U, // LDURSHXi
11040
500k
    2362456U, // LDURSWi
11041
500k
    2362456U, // LDURSi
11042
500k
    2362456U, // LDURWi
11043
500k
    2362456U, // LDURXi
11044
500k
    2362576U, // LDXPW
11045
500k
    2362576U, // LDXPX
11046
500k
    568U, // LDXRB
11047
500k
    568U, // LDXRH
11048
500k
    568U, // LDXRW
11049
500k
    568U, // LDXRX
11050
500k
    8530048U, // LSLR_ZPmZ_B
11051
500k
    16914560U,  // LSLR_ZPmZ_D
11052
500k
    25832584U,  // LSLR_ZPmZ_H
11053
500k
    33697920U,  // LSLR_ZPmZ_S
11054
500k
    3160U,  // LSLVWr
11055
500k
    3160U,  // LSLVXr
11056
500k
    16918656U,  // LSL_WIDE_ZPmZ_B
11057
500k
    1584264U, // LSL_WIDE_ZPmZ_H
11058
500k
    16920704U,  // LSL_WIDE_ZPmZ_S
11059
500k
    6232U,  // LSL_WIDE_ZZZ_B
11060
500k
    192U, // LSL_WIDE_ZZZ_H
11061
500k
    6232U,  // LSL_WIDE_ZZZ_S
11062
500k
    141440U,  // LSL_ZPmI_B
11063
500k
    137344U,  // LSL_ZPmI_D
11064
500k
    1453192U, // LSL_ZPmI_H
11065
500k
    143488U,  // LSL_ZPmI_S
11066
500k
    8530048U, // LSL_ZPmZ_B
11067
500k
    16914560U,  // LSL_ZPmZ_D
11068
500k
    25832584U,  // LSL_ZPmZ_H
11069
500k
    33697920U,  // LSL_ZPmZ_S
11070
500k
    3160U,  // LSL_ZZI_B
11071
500k
    3160U,  // LSL_ZZI_D
11072
500k
    200U, // LSL_ZZI_H
11073
500k
    3160U,  // LSL_ZZI_S
11074
500k
    8530048U, // LSRR_ZPmZ_B
11075
500k
    16914560U,  // LSRR_ZPmZ_D
11076
500k
    25832584U,  // LSRR_ZPmZ_H
11077
500k
    33697920U,  // LSRR_ZPmZ_S
11078
500k
    3160U,  // LSRVWr
11079
500k
    3160U,  // LSRVXr
11080
500k
    16918656U,  // LSR_WIDE_ZPmZ_B
11081
500k
    1584264U, // LSR_WIDE_ZPmZ_H
11082
500k
    16920704U,  // LSR_WIDE_ZPmZ_S
11083
500k
    6232U,  // LSR_WIDE_ZZZ_B
11084
500k
    192U, // LSR_WIDE_ZZZ_H
11085
500k
    6232U,  // LSR_WIDE_ZZZ_S
11086
500k
    141440U,  // LSR_ZPmI_B
11087
500k
    137344U,  // LSR_ZPmI_D
11088
500k
    1453192U, // LSR_ZPmI_H
11089
500k
    143488U,  // LSR_ZPmI_S
11090
500k
    8530048U, // LSR_ZPmZ_B
11091
500k
    16914560U,  // LSR_ZPmZ_D
11092
500k
    25832584U,  // LSR_ZPmZ_H
11093
500k
    33697920U,  // LSR_ZPmZ_S
11094
500k
    3160U,  // LSR_ZZI_B
11095
500k
    3160U,  // LSR_ZZI_D
11096
500k
    200U, // LSR_ZZI_H
11097
500k
    3160U,  // LSR_ZZI_S
11098
500k
    134232U,  // MADDWrrr
11099
500k
    134232U,  // MADDXrrr
11100
500k
    86144U, // MAD_ZPmZZ_B
11101
500k
    134349952U, // MAD_ZPmZZ_D
11102
500k
    28978456U,  // MAD_ZPmZZ_H
11103
500k
    142739584U, // MAD_ZPmZZ_S
11104
500k
    8530104U, // MATCH_PPzZZ_B
11105
500k
    25832585U,  // MATCH_PPzZZ_H
11106
500k
    86144U, // MLA_ZPmZZ_B
11107
500k
    134349952U, // MLA_ZPmZZ_D
11108
500k
    28978456U,  // MLA_ZPmZZ_H
11109
500k
    142739584U, // MLA_ZPmZZ_S
11110
500k
    27133016U,  // MLA_ZZZI_D
11111
500k
    39192U, // MLA_ZZZI_H
11112
500k
    27134040U,  // MLA_ZZZI_S
11113
500k
    795792U,  // MLAv16i8
11114
500k
    926872U,  // MLAv2i32
11115
500k
    54273176U,  // MLAv2i32_indexed
11116
500k
    1057952U, // MLAv4i16
11117
500k
    52438176U,  // MLAv4i16_indexed
11118
500k
    402544U,  // MLAv4i32
11119
500k
    54273136U,  // MLAv4i32_indexed
11120
500k
    533624U,  // MLAv8i16
11121
500k
    52438136U,  // MLAv8i16_indexed
11122
500k
    1189032U, // MLAv8i8
11123
500k
    86144U, // MLS_ZPmZZ_B
11124
500k
    134349952U, // MLS_ZPmZZ_D
11125
500k
    28978456U,  // MLS_ZPmZZ_H
11126
500k
    142739584U, // MLS_ZPmZZ_S
11127
500k
    27133016U,  // MLS_ZZZI_D
11128
500k
    39192U, // MLS_ZZZI_H
11129
500k
    27134040U,  // MLS_ZZZI_S
11130
500k
    795792U,  // MLSv16i8
11131
500k
    926872U,  // MLSv2i32
11132
500k
    54273176U,  // MLSv2i32_indexed
11133
500k
    1057952U, // MLSv4i16
11134
500k
    52438176U,  // MLSv4i16_indexed
11135
500k
    402544U,  // MLSv4i32
11136
500k
    54273136U,  // MLSv4i32_indexed
11137
500k
    533624U,  // MLSv8i16
11138
500k
    52438136U,  // MLSv8i16_indexed
11139
500k
    1189032U, // MLSv8i8
11140
500k
    0U, // MOPSSETGE
11141
500k
    0U, // MOPSSETGEN
11142
500k
    0U, // MOPSSETGET
11143
500k
    0U, // MOPSSETGETN
11144
500k
    2U, // MOVID
11145
500k
    34U,  // MOVIv16b_ns
11146
500k
    2U, // MOVIv2d_ns
11147
500k
    586U, // MOVIv2i32
11148
500k
    586U, // MOVIv2s_msl
11149
500k
    586U, // MOVIv4i16
11150
500k
    586U, // MOVIv4i32
11151
500k
    586U, // MOVIv4s_msl
11152
500k
    34U,  // MOVIv8b_ns
11153
500k
    586U, // MOVIv8i16
11154
500k
    1U, // MOVKWi
11155
500k
    1U, // MOVKXi
11156
500k
    586U, // MOVNWi
11157
500k
    586U, // MOVNXi
11158
500k
    0U, // MOVPRFX_ZPmZ_B
11159
500k
    8U, // MOVPRFX_ZPmZ_D
11160
500k
    0U, // MOVPRFX_ZPmZ_H
11161
500k
    16U,  // MOVPRFX_ZPmZ_S
11162
500k
    10424U, // MOVPRFX_ZPzZ_B
11163
500k
    6328U,  // MOVPRFX_ZPzZ_D
11164
500k
    137U, // MOVPRFX_ZPzZ_H
11165
500k
    12472U, // MOVPRFX_ZPzZ_S
11166
500k
    32U,  // MOVPRFX_ZZ
11167
500k
    586U, // MOVZWi
11168
500k
    586U, // MOVZXi
11169
500k
    2U, // MRS
11170
500k
    86144U, // MSB_ZPmZZ_B
11171
500k
    134349952U, // MSB_ZPmZZ_D
11172
500k
    28978456U,  // MSB_ZPmZZ_H
11173
500k
    142739584U, // MSB_ZPmZZ_S
11174
500k
    0U, // MSR
11175
500k
    0U, // MSRpstateImm1
11176
500k
    0U, // MSRpstateImm4
11177
500k
    0U, // MSRpstatesvcrImm1
11178
500k
    134232U,  // MSUBWrrr
11179
500k
    134232U,  // MSUBXrrr
11180
500k
    3160U,  // MUL_ZI_B
11181
500k
    3160U,  // MUL_ZI_D
11182
500k
    200U, // MUL_ZI_H
11183
500k
    3160U,  // MUL_ZI_S
11184
500k
    8530048U, // MUL_ZPmZ_B
11185
500k
    16914560U,  // MUL_ZPmZ_D
11186
500k
    25832584U,  // MUL_ZPmZ_H
11187
500k
    33697920U,  // MUL_ZPmZ_S
11188
500k
    4462680U, // MUL_ZZZI_D
11189
500k
    49288U, // MUL_ZZZI_H
11190
500k
    4468824U, // MUL_ZZZI_S
11191
500k
    10328U, // MUL_ZZZ_B
11192
500k
    6232U,  // MUL_ZZZ_D
11193
500k
    136U, // MUL_ZZZ_H
11194
500k
    12376U, // MUL_ZZZ_S
11195
500k
    794768U,  // MULv16i8
11196
500k
    925848U,  // MULv2i32
11197
500k
    163324056U, // MULv2i32_indexed
11198
500k
    1056928U, // MULv4i16
11199
500k
    161489056U, // MULv4i16_indexed
11200
500k
    401520U,  // MULv4i32
11201
500k
    163324016U, // MULv4i32_indexed
11202
500k
    532600U,  // MULv8i16
11203
500k
    161489016U, // MULv8i16_indexed
11204
500k
    1188008U, // MULv8i8
11205
500k
    586U, // MVNIv2i32
11206
500k
    586U, // MVNIv2s_msl
11207
500k
    586U, // MVNIv4i16
11208
500k
    586U, // MVNIv4i32
11209
500k
    586U, // MVNIv4s_msl
11210
500k
    586U, // MVNIv8i16
11211
500k
    8530104U, // NANDS_PPzPP
11212
500k
    8530104U, // NAND_PPzPP
11213
500k
    16914520U,  // NBSL_ZZZZ
11214
500k
    0U, // NEG_ZPmZ_B
11215
500k
    8U, // NEG_ZPmZ_D
11216
500k
    0U, // NEG_ZPmZ_H
11217
500k
    16U,  // NEG_ZPmZ_S
11218
500k
    24U,  // NEGv16i8
11219
500k
    32U,  // NEGv1i64
11220
500k
    40U,  // NEGv2i32
11221
500k
    48U,  // NEGv2i64
11222
500k
    56U,  // NEGv4i16
11223
500k
    64U,  // NEGv4i32
11224
500k
    72U,  // NEGv8i16
11225
500k
    80U,  // NEGv8i8
11226
500k
    8530104U, // NMATCH_PPzZZ_B
11227
500k
    25832585U,  // NMATCH_PPzZZ_H
11228
500k
    8530104U, // NORS_PPzPP
11229
500k
    8530104U, // NOR_PPzPP
11230
500k
    0U, // NOT_ZPmZ_B
11231
500k
    8U, // NOT_ZPmZ_D
11232
500k
    0U, // NOT_ZPmZ_H
11233
500k
    16U,  // NOT_ZPmZ_S
11234
500k
    24U,  // NOTv16i8
11235
500k
    80U,  // NOTv8i8
11236
500k
    8530104U, // ORNS_PPzPP
11237
500k
    14424U, // ORNWrs
11238
500k
    14424U, // ORNXrs
11239
500k
    8530104U, // ORN_PPzPP
11240
500k
    794768U,  // ORNv16i8
11241
500k
    1188008U, // ORNv8i8
11242
500k
    8530104U, // ORRS_PPzPP
11243
500k
    35928U, // ORRWri
11244
500k
    14424U, // ORRWrs
11245
500k
    36952U, // ORRXri
11246
500k
    14424U, // ORRXrs
11247
500k
    8530104U, // ORR_PPzPP
11248
500k
    36952U, // ORR_ZI
11249
500k
    8530048U, // ORR_ZPmZ_B
11250
500k
    16914560U,  // ORR_ZPmZ_D
11251
500k
    25832584U,  // ORR_ZPmZ_H
11252
500k
    33697920U,  // ORR_ZPmZ_S
11253
500k
    6232U,  // ORR_ZZZ
11254
500k
    794768U,  // ORRv16i8
11255
500k
    1U, // ORRv2i32
11256
500k
    1U, // ORRv4i16
11257
500k
    1U, // ORRv4i32
11258
500k
    1U, // ORRv8i16
11259
500k
    1188008U, // ORRv8i8
11260
500k
    0U, // ORV_VPZ_B
11261
500k
    0U, // ORV_VPZ_D
11262
500k
    0U, // ORV_VPZ_H
11263
500k
    0U, // ORV_VPZ_S
11264
500k
    33U,  // PACDA
11265
500k
    33U,  // PACDB
11266
500k
    0U, // PACDZA
11267
500k
    0U, // PACDZB
11268
500k
    3160U,  // PACGA
11269
500k
    33U,  // PACIA
11270
500k
    0U, // PACIA1716
11271
500k
    0U, // PACIASP
11272
500k
    0U, // PACIAZ
11273
500k
    33U,  // PACIB
11274
500k
    0U, // PACIB1716
11275
500k
    0U, // PACIBSP
11276
500k
    0U, // PACIBZ
11277
500k
    0U, // PACIZA
11278
500k
    0U, // PACIZB
11279
500k
    0U, // PFALSE
11280
500k
    10328U, // PFIRST_B
11281
500k
    12376U, // PMULLB_ZZZ_D
11282
500k
    592U, // PMULLB_ZZZ_H
11283
500k
    0U, // PMULLB_ZZZ_Q
11284
500k
    12376U, // PMULLT_ZZZ_D
11285
500k
    592U, // PMULLT_ZZZ_H
11286
500k
    0U, // PMULLT_ZZZ_Q
11287
500k
    794768U,  // PMULLv16i8
11288
500k
    3U, // PMULLv1i64
11289
500k
    3U, // PMULLv2i64
11290
500k
    1188008U, // PMULLv8i8
11291
500k
    10328U, // PMUL_ZZZ_B
11292
500k
    794768U,  // PMULv16i8
11293
500k
    1188008U, // PMULv8i8
11294
500k
    10328U, // PNEXT_B
11295
500k
    6232U,  // PNEXT_D
11296
500k
    136U, // PNEXT_H
11297
500k
    12376U, // PNEXT_S
11298
500k
    87360U, // PRFB_D_PZI
11299
500k
    600U, // PRFB_D_SCALED
11300
500k
    608U, // PRFB_D_SXTW_SCALED
11301
500k
    616U, // PRFB_D_UXTW_SCALED
11302
500k
    88384U, // PRFB_PRI
11303
500k
    624U, // PRFB_PRR
11304
500k
    87360U, // PRFB_S_PZI
11305
500k
    632U, // PRFB_S_SXTW_SCALED
11306
500k
    640U, // PRFB_S_UXTW_SCALED
11307
500k
    648U, // PRFD_D_PZI
11308
500k
    656U, // PRFD_D_SCALED
11309
500k
    664U, // PRFD_D_SXTW_SCALED
11310
500k
    672U, // PRFD_D_UXTW_SCALED
11311
500k
    88384U, // PRFD_PRI
11312
500k
    680U, // PRFD_PRR
11313
500k
    648U, // PRFD_S_PZI
11314
500k
    688U, // PRFD_S_SXTW_SCALED
11315
500k
    696U, // PRFD_S_UXTW_SCALED
11316
500k
    704U, // PRFH_D_PZI
11317
500k
    712U, // PRFH_D_SCALED
11318
500k
    720U, // PRFH_D_SXTW_SCALED
11319
500k
    728U, // PRFH_D_UXTW_SCALED
11320
500k
    88384U, // PRFH_PRI
11321
500k
    736U, // PRFH_PRR
11322
500k
    704U, // PRFH_S_PZI
11323
500k
    744U, // PRFH_S_SXTW_SCALED
11324
500k
    752U, // PRFH_S_UXTW_SCALED
11325
500k
    1U, // PRFMl
11326
500k
    243403864U, // PRFMroW
11327
500k
    251792472U, // PRFMroX
11328
500k
    82008U, // PRFMui
11329
500k
    760U, // PRFS_PRR
11330
500k
    2362456U, // PRFUMi
11331
500k
    768U, // PRFW_D_PZI
11332
500k
    776U, // PRFW_D_SCALED
11333
500k
    784U, // PRFW_D_SXTW_SCALED
11334
500k
    792U, // PRFW_D_UXTW_SCALED
11335
500k
    88384U, // PRFW_PRI
11336
500k
    768U, // PRFW_S_PZI
11337
500k
    800U, // PRFW_S_SXTW_SCALED
11338
500k
    808U, // PRFW_S_UXTW_SCALED
11339
500k
    4991064U, // PSEL_PPPRI_B
11340
500k
    4986968U, // PSEL_PPPRI_D
11341
500k
    4985944U, // PSEL_PPPRI_H
11342
500k
    4993112U, // PSEL_PPPRI_S
11343
500k
    32U,  // PTEST_PP
11344
500k
    33U,  // PTRUES_B
11345
500k
    33U,  // PTRUES_D
11346
500k
    0U, // PTRUES_H
11347
500k
    33U,  // PTRUES_S
11348
500k
    33U,  // PTRUE_B
11349
500k
    33U,  // PTRUE_D
11350
500k
    0U, // PTRUE_H
11351
500k
    33U,  // PTRUE_S
11352
500k
    0U, // PUNPKHI_PP
11353
500k
    0U, // PUNPKLO_PP
11354
500k
    5208U,  // RADDHNB_ZZZ_B
11355
500k
    96U,  // RADDHNB_ZZZ_H
11356
500k
    6232U,  // RADDHNB_ZZZ_S
11357
500k
    7256U,  // RADDHNT_ZZZ_B
11358
500k
    16U,  // RADDHNT_ZZZ_H
11359
500k
    1112U,  // RADDHNT_ZZZ_S
11360
500k
    270440U,  // RADDHNv2i64_v2i32
11361
500k
    271464U,  // RADDHNv2i64_v4i32
11362
500k
    401520U,  // RADDHNv4i32_v4i16
11363
500k
    402544U,  // RADDHNv4i32_v8i16
11364
500k
    533624U,  // RADDHNv8i16_v16i8
11365
500k
    532600U,  // RADDHNv8i16_v8i8
11366
500k
    270440U,  // RAX1
11367
500k
    6232U,  // RAX1_ZZZ_D
11368
500k
    32U,  // RBITWr
11369
500k
    32U,  // RBITXr
11370
500k
    0U, // RBIT_ZPmZ_B
11371
500k
    8U, // RBIT_ZPmZ_D
11372
500k
    0U, // RBIT_ZPmZ_H
11373
500k
    16U,  // RBIT_ZPmZ_S
11374
500k
    24U,  // RBITv16i8
11375
500k
    80U,  // RBITv8i8
11376
500k
    816U, // RDFFRS_PPz
11377
500k
    816U, // RDFFR_PPz_REAL
11378
500k
    0U, // RDFFR_P_REAL
11379
500k
    32U,  // RDVLI_XI
11380
500k
    0U, // RET
11381
500k
    0U, // RETAA
11382
500k
    0U, // RETAB
11383
500k
    32U,  // REV16Wr
11384
500k
    32U,  // REV16Xr
11385
500k
    24U,  // REV16v16i8
11386
500k
    80U,  // REV16v8i8
11387
500k
    32U,  // REV32Xr
11388
500k
    24U,  // REV32v16i8
11389
500k
    56U,  // REV32v4i16
11390
500k
    72U,  // REV32v8i16
11391
500k
    80U,  // REV32v8i8
11392
500k
    24U,  // REV64v16i8
11393
500k
    40U,  // REV64v2i32
11394
500k
    56U,  // REV64v4i16
11395
500k
    64U,  // REV64v4i32
11396
500k
    72U,  // REV64v8i16
11397
500k
    80U,  // REV64v8i8
11398
500k
    8U, // REVB_ZPmZ_D
11399
500k
    0U, // REVB_ZPmZ_H
11400
500k
    16U,  // REVB_ZPmZ_S
11401
500k
    3U, // REVD_ZPmZ
11402
500k
    8U, // REVH_ZPmZ_D
11403
500k
    16U,  // REVH_ZPmZ_S
11404
500k
    8U, // REVW_ZPmZ_D
11405
500k
    32U,  // REVWr
11406
500k
    32U,  // REVXr
11407
500k
    32U,  // REV_PP_B
11408
500k
    32U,  // REV_PP_D
11409
500k
    0U, // REV_PP_H
11410
500k
    32U,  // REV_PP_S
11411
500k
    32U,  // REV_ZZ_B
11412
500k
    32U,  // REV_ZZ_D
11413
500k
    0U, // REV_ZZ_H
11414
500k
    32U,  // REV_ZZ_S
11415
500k
    3160U,  // RMIF
11416
500k
    3160U,  // RORVWr
11417
500k
    3160U,  // RORVXr
11418
500k
    3160U,  // RSHRNB_ZZI_B
11419
500k
    200U, // RSHRNB_ZZI_H
11420
500k
    3160U,  // RSHRNB_ZZI_S
11421
500k
    37976U, // RSHRNT_ZZI_B
11422
500k
    320U, // RSHRNT_ZZI_H
11423
500k
    37976U, // RSHRNT_ZZI_S
11424
500k
    38008U, // RSHRNv16i8_shift
11425
500k
    3176U,  // RSHRNv2i32_shift
11426
500k
    3184U,  // RSHRNv4i16_shift
11427
500k
    37992U, // RSHRNv4i32_shift
11428
500k
    38000U, // RSHRNv8i16_shift
11429
500k
    3192U,  // RSHRNv8i8_shift
11430
500k
    5208U,  // RSUBHNB_ZZZ_B
11431
500k
    96U,  // RSUBHNB_ZZZ_H
11432
500k
    6232U,  // RSUBHNB_ZZZ_S
11433
500k
    7256U,  // RSUBHNT_ZZZ_B
11434
500k
    16U,  // RSUBHNT_ZZZ_H
11435
500k
    1112U,  // RSUBHNT_ZZZ_S
11436
500k
    270440U,  // RSUBHNv2i64_v2i32
11437
500k
    271464U,  // RSUBHNv2i64_v4i32
11438
500k
    401520U,  // RSUBHNv4i32_v4i16
11439
500k
    402544U,  // RSUBHNv4i32_v8i16
11440
500k
    533624U,  // RSUBHNv8i16_v16i8
11441
500k
    532600U,  // RSUBHNv8i16_v8i8
11442
500k
    2136U,  // SABALB_ZZZ_D
11443
500k
    0U, // SABALB_ZZZ_H
11444
500k
    7256U,  // SABALB_ZZZ_S
11445
500k
    2136U,  // SABALT_ZZZ_D
11446
500k
    0U, // SABALT_ZZZ_H
11447
500k
    7256U,  // SABALT_ZZZ_S
11448
500k
    795792U,  // SABALv16i8_v8i16
11449
500k
    926872U,  // SABALv2i32_v2i64
11450
500k
    1057952U, // SABALv4i16_v4i32
11451
500k
    402544U,  // SABALv4i32_v2i64
11452
500k
    533624U,  // SABALv8i16_v4i32
11453
500k
    1189032U, // SABALv8i8_v8i16
11454
500k
    1U, // SABA_ZZZ_B
11455
500k
    1112U,  // SABA_ZZZ_D
11456
500k
    280U, // SABA_ZZZ_H
11457
500k
    2136U,  // SABA_ZZZ_S
11458
500k
    795792U,  // SABAv16i8
11459
500k
    926872U,  // SABAv2i32
11460
500k
    1057952U, // SABAv4i16
11461
500k
    402544U,  // SABAv4i32
11462
500k
    533624U,  // SABAv8i16
11463
500k
    1189032U, // SABAv8i8
11464
500k
    12376U, // SABDLB_ZZZ_D
11465
500k
    592U, // SABDLB_ZZZ_H
11466
500k
    5208U,  // SABDLB_ZZZ_S
11467
500k
    12376U, // SABDLT_ZZZ_D
11468
500k
    592U, // SABDLT_ZZZ_H
11469
500k
    5208U,  // SABDLT_ZZZ_S
11470
500k
    794768U,  // SABDLv16i8_v8i16
11471
500k
    925848U,  // SABDLv2i32_v2i64
11472
500k
    1056928U, // SABDLv4i16_v4i32
11473
500k
    401520U,  // SABDLv4i32_v2i64
11474
500k
    532600U,  // SABDLv8i16_v4i32
11475
500k
    1188008U, // SABDLv8i8_v8i16
11476
500k
    8530048U, // SABD_ZPmZ_B
11477
500k
    16914560U,  // SABD_ZPmZ_D
11478
500k
    25832584U,  // SABD_ZPmZ_H
11479
500k
    33697920U,  // SABD_ZPmZ_S
11480
500k
    794768U,  // SABDv16i8
11481
500k
    925848U,  // SABDv2i32
11482
500k
    1056928U, // SABDv4i16
11483
500k
    401520U,  // SABDv4i32
11484
500k
    532600U,  // SABDv8i16
11485
500k
    1188008U, // SABDv8i8
11486
500k
    2176U,  // SADALP_ZPmZ_D
11487
500k
    0U, // SADALP_ZPmZ_H
11488
500k
    7296U,  // SADALP_ZPmZ_S
11489
500k
    24U,  // SADALPv16i8_v8i16
11490
500k
    40U,  // SADALPv2i32_v1i64
11491
500k
    56U,  // SADALPv4i16_v2i32
11492
500k
    64U,  // SADALPv4i32_v2i64
11493
500k
    72U,  // SADALPv8i16_v4i32
11494
500k
    80U,  // SADALPv8i8_v4i16
11495
500k
    12376U, // SADDLBT_ZZZ_D
11496
500k
    592U, // SADDLBT_ZZZ_H
11497
500k
    5208U,  // SADDLBT_ZZZ_S
11498
500k
    12376U, // SADDLB_ZZZ_D
11499
500k
    592U, // SADDLB_ZZZ_H
11500
500k
    5208U,  // SADDLB_ZZZ_S
11501
500k
    24U,  // SADDLPv16i8_v8i16
11502
500k
    40U,  // SADDLPv2i32_v1i64
11503
500k
    56U,  // SADDLPv4i16_v2i32
11504
500k
    64U,  // SADDLPv4i32_v2i64
11505
500k
    72U,  // SADDLPv8i16_v4i32
11506
500k
    80U,  // SADDLPv8i8_v4i16
11507
500k
    12376U, // SADDLT_ZZZ_D
11508
500k
    592U, // SADDLT_ZZZ_H
11509
500k
    5208U,  // SADDLT_ZZZ_S
11510
500k
    24U,  // SADDLVv16i8v
11511
500k
    56U,  // SADDLVv4i16v
11512
500k
    64U,  // SADDLVv4i32v
11513
500k
    72U,  // SADDLVv8i16v
11514
500k
    80U,  // SADDLVv8i8v
11515
500k
    794768U,  // SADDLv16i8_v8i16
11516
500k
    925848U,  // SADDLv2i32_v2i64
11517
500k
    1056928U, // SADDLv4i16_v4i32
11518
500k
    401520U,  // SADDLv4i32_v2i64
11519
500k
    532600U,  // SADDLv8i16_v4i32
11520
500k
    1188008U, // SADDLv8i8_v8i16
11521
500k
    0U, // SADDV_VPZ_B
11522
500k
    0U, // SADDV_VPZ_H
11523
500k
    0U, // SADDV_VPZ_S
11524
500k
    12376U, // SADDWB_ZZZ_D
11525
500k
    592U, // SADDWB_ZZZ_H
11526
500k
    5208U,  // SADDWB_ZZZ_S
11527
500k
    12376U, // SADDWT_ZZZ_D
11528
500k
    592U, // SADDWT_ZZZ_H
11529
500k
    5208U,  // SADDWT_ZZZ_S
11530
500k
    794744U,  // SADDWv16i8_v8i16
11531
500k
    925800U,  // SADDWv2i32_v2i64
11532
500k
    1056880U, // SADDWv4i16_v4i32
11533
500k
    401512U,  // SADDWv4i32_v2i64
11534
500k
    532592U,  // SADDWv8i16_v4i32
11535
500k
    1187960U, // SADDWv8i8_v8i16
11536
500k
    0U, // SB
11537
500k
    1112U,  // SBCLB_ZZZ_D
11538
500k
    2136U,  // SBCLB_ZZZ_S
11539
500k
    1112U,  // SBCLT_ZZZ_D
11540
500k
    2136U,  // SBCLT_ZZZ_S
11541
500k
    3160U,  // SBCSWr
11542
500k
    3160U,  // SBCSXr
11543
500k
    3160U,  // SBCWr
11544
500k
    3160U,  // SBCXr
11545
500k
    134232U,  // SBFMWri
11546
500k
    134232U,  // SBFMXri
11547
500k
    10328U, // SCLAMP_ZZZ_B
11548
500k
    6232U,  // SCLAMP_ZZZ_D
11549
500k
    136U, // SCLAMP_ZZZ_H
11550
500k
    12376U, // SCLAMP_ZZZ_S
11551
500k
    3160U,  // SCVTFSWDri
11552
500k
    3160U,  // SCVTFSWHri
11553
500k
    3160U,  // SCVTFSWSri
11554
500k
    3160U,  // SCVTFSXDri
11555
500k
    3160U,  // SCVTFSXHri
11556
500k
    3160U,  // SCVTFSXSri
11557
500k
    32U,  // SCVTFUWDri
11558
500k
    32U,  // SCVTFUWHri
11559
500k
    32U,  // SCVTFUWSri
11560
500k
    32U,  // SCVTFUXDri
11561
500k
    32U,  // SCVTFUXHri
11562
500k
    32U,  // SCVTFUXSri
11563
500k
    8U, // SCVTF_ZPmZ_DtoD
11564
500k
    2U, // SCVTF_ZPmZ_DtoH
11565
500k
    8U, // SCVTF_ZPmZ_DtoS
11566
500k
    0U, // SCVTF_ZPmZ_HtoH
11567
500k
    16U,  // SCVTF_ZPmZ_StoD
11568
500k
    1U, // SCVTF_ZPmZ_StoH
11569
500k
    16U,  // SCVTF_ZPmZ_StoS
11570
500k
    3160U,  // SCVTFd
11571
500k
    3160U,  // SCVTFh
11572
500k
    3160U,  // SCVTFs
11573
500k
    32U,  // SCVTFv1i16
11574
500k
    32U,  // SCVTFv1i32
11575
500k
    32U,  // SCVTFv1i64
11576
500k
    40U,  // SCVTFv2f32
11577
500k
    48U,  // SCVTFv2f64
11578
500k
    3224U,  // SCVTFv2i32_shift
11579
500k
    3176U,  // SCVTFv2i64_shift
11580
500k
    56U,  // SCVTFv4f16
11581
500k
    64U,  // SCVTFv4f32
11582
500k
    3232U,  // SCVTFv4i16_shift
11583
500k
    3184U,  // SCVTFv4i32_shift
11584
500k
    72U,  // SCVTFv8f16
11585
500k
    3192U,  // SCVTFv8i16_shift
11586
500k
    16914560U,  // SDIVR_ZPmZ_D
11587
500k
    33697920U,  // SDIVR_ZPmZ_S
11588
500k
    3160U,  // SDIVWr
11589
500k
    3160U,  // SDIVXr
11590
500k
    16914560U,  // SDIV_ZPmZ_D
11591
500k
    33697920U,  // SDIV_ZPmZ_S
11592
500k
    27139160U,  // SDOT_ZZZI_D
11593
500k
    38913U, // SDOT_ZZZI_S
11594
500k
    7256U,  // SDOT_ZZZ_D
11595
500k
    1U, // SDOT_ZZZ_S
11596
500k
    5121168U, // SDOTlanev16i8
11597
500k
    5121192U, // SDOTlanev8i8
11598
500k
    795792U,  // SDOTv16i8
11599
500k
    1189032U, // SDOTv8i8
11600
500k
    8530008U, // SEL_PPPP
11601
500k
    8530008U, // SEL_ZPZZ_B
11602
500k
    16914520U,  // SEL_ZPZZ_D
11603
500k
    25832584U,  // SEL_ZPZZ_H
11604
500k
    33697880U,  // SEL_ZPZZ_S
11605
500k
    0U, // SETE
11606
500k
    0U, // SETEN
11607
500k
    0U, // SETET
11608
500k
    0U, // SETETN
11609
500k
    0U, // SETF16
11610
500k
    0U, // SETF8
11611
500k
    0U, // SETFFR
11612
500k
    0U, // SETGM
11613
500k
    0U, // SETGMN
11614
500k
    0U, // SETGMT
11615
500k
    0U, // SETGMTN
11616
500k
    0U, // SETGP
11617
500k
    0U, // SETGPN
11618
500k
    0U, // SETGPT
11619
500k
    0U, // SETGPTN
11620
500k
    0U, // SETM
11621
500k
    0U, // SETMN
11622
500k
    0U, // SETMT
11623
500k
    0U, // SETMTN
11624
500k
    0U, // SETP
11625
500k
    0U, // SETPN
11626
500k
    0U, // SETPT
11627
500k
    0U, // SETPTN
11628
500k
    402521U,  // SHA1Crrr
11629
500k
    32U,  // SHA1Hrr
11630
500k
    402521U,  // SHA1Mrrr
11631
500k
    402521U,  // SHA1Prrr
11632
500k
    402544U,  // SHA1SU0rrr
11633
500k
    64U,  // SHA1SU1rr
11634
500k
    402521U,  // SHA256H2rrr
11635
500k
    402521U,  // SHA256Hrrr
11636
500k
    64U,  // SHA256SU0rr
11637
500k
    402544U,  // SHA256SU1rrr
11638
500k
    271449U,  // SHA512H
11639
500k
    271449U,  // SHA512H2
11640
500k
    48U,  // SHA512SU0
11641
500k
    271464U,  // SHA512SU1
11642
500k
    8530048U, // SHADD_ZPmZ_B
11643
500k
    16914560U,  // SHADD_ZPmZ_D
11644
500k
    25832584U,  // SHADD_ZPmZ_H
11645
500k
    33697920U,  // SHADD_ZPmZ_S
11646
500k
    794768U,  // SHADDv16i8
11647
500k
    925848U,  // SHADDv2i32
11648
500k
    1056928U, // SHADDv4i16
11649
500k
    401520U,  // SHADDv4i32
11650
500k
    532600U,  // SHADDv8i16
11651
500k
    1188008U, // SHADDv8i8
11652
500k
    824U, // SHLLv16i8
11653
500k
    832U, // SHLLv2i32
11654
500k
    840U, // SHLLv4i16
11655
500k
    848U, // SHLLv4i32
11656
500k
    856U, // SHLLv8i16
11657
500k
    864U, // SHLLv8i8
11658
500k
    3160U,  // SHLd
11659
500k
    3216U,  // SHLv16i8_shift
11660
500k
    3224U,  // SHLv2i32_shift
11661
500k
    3176U,  // SHLv2i64_shift
11662
500k
    3232U,  // SHLv4i16_shift
11663
500k
    3184U,  // SHLv4i32_shift
11664
500k
    3192U,  // SHLv8i16_shift
11665
500k
    3240U,  // SHLv8i8_shift
11666
500k
    3160U,  // SHRNB_ZZI_B
11667
500k
    200U, // SHRNB_ZZI_H
11668
500k
    3160U,  // SHRNB_ZZI_S
11669
500k
    37976U, // SHRNT_ZZI_B
11670
500k
    320U, // SHRNT_ZZI_H
11671
500k
    37976U, // SHRNT_ZZI_S
11672
500k
    38008U, // SHRNv16i8_shift
11673
500k
    3176U,  // SHRNv2i32_shift
11674
500k
    3184U,  // SHRNv4i16_shift
11675
500k
    37992U, // SHRNv4i32_shift
11676
500k
    38000U, // SHRNv8i16_shift
11677
500k
    3192U,  // SHRNv8i8_shift
11678
500k
    8530048U, // SHSUBR_ZPmZ_B
11679
500k
    16914560U,  // SHSUBR_ZPmZ_D
11680
500k
    25832584U,  // SHSUBR_ZPmZ_H
11681
500k
    33697920U,  // SHSUBR_ZPmZ_S
11682
500k
    8530048U, // SHSUB_ZPmZ_B
11683
500k
    16914560U,  // SHSUB_ZPmZ_D
11684
500k
    25832584U,  // SHSUB_ZPmZ_H
11685
500k
    33697920U,  // SHSUB_ZPmZ_S
11686
500k
    794768U,  // SHSUBv16i8
11687
500k
    925848U,  // SHSUBv2i32
11688
500k
    1056928U, // SHSUBv4i16
11689
500k
    401520U,  // SHSUBv4i32
11690
500k
    532600U,  // SHSUBv8i16
11691
500k
    1188008U, // SHSUBv8i8
11692
500k
    321U, // SLI_ZZI_B
11693
500k
    37976U, // SLI_ZZI_D
11694
500k
    320U, // SLI_ZZI_H
11695
500k
    37976U, // SLI_ZZI_S
11696
500k
    37977U, // SLId
11697
500k
    38032U, // SLIv16i8_shift
11698
500k
    38040U, // SLIv2i32_shift
11699
500k
    37992U, // SLIv2i64_shift
11700
500k
    38048U, // SLIv4i16_shift
11701
500k
    38000U, // SLIv4i32_shift
11702
500k
    38008U, // SLIv8i16_shift
11703
500k
    38056U, // SLIv8i8_shift
11704
500k
    402544U,  // SM3PARTW1
11705
500k
    402544U,  // SM3PARTW2
11706
500k
    3266584688U,  // SM3SS1
11707
500k
    54273136U,  // SM3TT1A
11708
500k
    54273136U,  // SM3TT1B
11709
500k
    54273136U,  // SM3TT2A
11710
500k
    54273136U,  // SM3TT2B
11711
500k
    64U,  // SM4E
11712
500k
    12376U, // SM4EKEY_ZZZ_S
11713
500k
    401520U,  // SM4ENCKEY
11714
500k
    12376U, // SM4E_ZZZ_S
11715
500k
    134232U,  // SMADDLrrr
11716
500k
    8530048U, // SMAXP_ZPmZ_B
11717
500k
    16914560U,  // SMAXP_ZPmZ_D
11718
500k
    25832584U,  // SMAXP_ZPmZ_H
11719
500k
    33697920U,  // SMAXP_ZPmZ_S
11720
500k
    794768U,  // SMAXPv16i8
11721
500k
    925848U,  // SMAXPv2i32
11722
500k
    1056928U, // SMAXPv4i16
11723
500k
    401520U,  // SMAXPv4i32
11724
500k
    532600U,  // SMAXPv8i16
11725
500k
    1188008U, // SMAXPv8i8
11726
500k
    0U, // SMAXV_VPZ_B
11727
500k
    0U, // SMAXV_VPZ_D
11728
500k
    0U, // SMAXV_VPZ_H
11729
500k
    0U, // SMAXV_VPZ_S
11730
500k
    24U,  // SMAXVv16i8v
11731
500k
    56U,  // SMAXVv4i16v
11732
500k
    64U,  // SMAXVv4i32v
11733
500k
    72U,  // SMAXVv8i16v
11734
500k
    80U,  // SMAXVv8i8v
11735
500k
    3160U,  // SMAX_ZI_B
11736
500k
    3160U,  // SMAX_ZI_D
11737
500k
    200U, // SMAX_ZI_H
11738
500k
    3160U,  // SMAX_ZI_S
11739
500k
    8530048U, // SMAX_ZPmZ_B
11740
500k
    16914560U,  // SMAX_ZPmZ_D
11741
500k
    25832584U,  // SMAX_ZPmZ_H
11742
500k
    33697920U,  // SMAX_ZPmZ_S
11743
500k
    794768U,  // SMAXv16i8
11744
500k
    925848U,  // SMAXv2i32
11745
500k
    1056928U, // SMAXv4i16
11746
500k
    401520U,  // SMAXv4i32
11747
500k
    532600U,  // SMAXv8i16
11748
500k
    1188008U, // SMAXv8i8
11749
500k
    0U, // SMC
11750
500k
    8530048U, // SMINP_ZPmZ_B
11751
500k
    16914560U,  // SMINP_ZPmZ_D
11752
500k
    25832584U,  // SMINP_ZPmZ_H
11753
500k
    33697920U,  // SMINP_ZPmZ_S
11754
500k
    794768U,  // SMINPv16i8
11755
500k
    925848U,  // SMINPv2i32
11756
500k
    1056928U, // SMINPv4i16
11757
500k
    401520U,  // SMINPv4i32
11758
500k
    532600U,  // SMINPv8i16
11759
500k
    1188008U, // SMINPv8i8
11760
500k
    0U, // SMINV_VPZ_B
11761
500k
    0U, // SMINV_VPZ_D
11762
500k
    0U, // SMINV_VPZ_H
11763
500k
    0U, // SMINV_VPZ_S
11764
500k
    24U,  // SMINVv16i8v
11765
500k
    56U,  // SMINVv4i16v
11766
500k
    64U,  // SMINVv4i32v
11767
500k
    72U,  // SMINVv8i16v
11768
500k
    80U,  // SMINVv8i8v
11769
500k
    3160U,  // SMIN_ZI_B
11770
500k
    3160U,  // SMIN_ZI_D
11771
500k
    200U, // SMIN_ZI_H
11772
500k
    3160U,  // SMIN_ZI_S
11773
500k
    8530048U, // SMIN_ZPmZ_B
11774
500k
    16914560U,  // SMIN_ZPmZ_D
11775
500k
    25832584U,  // SMIN_ZPmZ_H
11776
500k
    33697920U,  // SMIN_ZPmZ_S
11777
500k
    794768U,  // SMINv16i8
11778
500k
    925848U,  // SMINv2i32
11779
500k
    1056928U, // SMINv4i16
11780
500k
    401520U,  // SMINv4i32
11781
500k
    532600U,  // SMINv8i16
11782
500k
    1188008U, // SMINv8i8
11783
500k
    27134040U,  // SMLALB_ZZZI_D
11784
500k
    27139160U,  // SMLALB_ZZZI_S
11785
500k
    2136U,  // SMLALB_ZZZ_D
11786
500k
    0U, // SMLALB_ZZZ_H
11787
500k
    7256U,  // SMLALB_ZZZ_S
11788
500k
    27134040U,  // SMLALT_ZZZI_D
11789
500k
    27139160U,  // SMLALT_ZZZI_S
11790
500k
    2136U,  // SMLALT_ZZZ_D
11791
500k
    0U, // SMLALT_ZZZ_H
11792
500k
    7256U,  // SMLALT_ZZZ_S
11793
500k
    795792U,  // SMLALv16i8_v8i16
11794
500k
    54273176U,  // SMLALv2i32_indexed
11795
500k
    926872U,  // SMLALv2i32_v2i64
11796
500k
    52438176U,  // SMLALv4i16_indexed
11797
500k
    1057952U, // SMLALv4i16_v4i32
11798
500k
    54273136U,  // SMLALv4i32_indexed
11799
500k
    402544U,  // SMLALv4i32_v2i64
11800
500k
    52438136U,  // SMLALv8i16_indexed
11801
500k
    533624U,  // SMLALv8i16_v4i32
11802
500k
    1189032U, // SMLALv8i8_v8i16
11803
500k
    27134040U,  // SMLSLB_ZZZI_D
11804
500k
    27139160U,  // SMLSLB_ZZZI_S
11805
500k
    2136U,  // SMLSLB_ZZZ_D
11806
500k
    0U, // SMLSLB_ZZZ_H
11807
500k
    7256U,  // SMLSLB_ZZZ_S
11808
500k
    27134040U,  // SMLSLT_ZZZI_D
11809
500k
    27139160U,  // SMLSLT_ZZZI_S
11810
500k
    2136U,  // SMLSLT_ZZZ_D
11811
500k
    0U, // SMLSLT_ZZZ_H
11812
500k
    7256U,  // SMLSLT_ZZZ_S
11813
500k
    795792U,  // SMLSLv16i8_v8i16
11814
500k
    54273176U,  // SMLSLv2i32_indexed
11815
500k
    926872U,  // SMLSLv2i32_v2i64
11816
500k
    52438176U,  // SMLSLv4i16_indexed
11817
500k
    1057952U, // SMLSLv4i16_v4i32
11818
500k
    54273136U,  // SMLSLv4i32_indexed
11819
500k
    402544U,  // SMLSLv4i32_v2i64
11820
500k
    52438136U,  // SMLSLv8i16_indexed
11821
500k
    533624U,  // SMLSLv8i16_v4i32
11822
500k
    1189032U, // SMLSLv8i8_v8i16
11823
500k
    795792U,  // SMMLA
11824
500k
    1U, // SMMLA_ZZZ
11825
500k
    0U, // SMOPA_MPPZZ_D
11826
500k
    0U, // SMOPA_MPPZZ_S
11827
500k
    0U, // SMOPS_MPPZZ_D
11828
500k
    0U, // SMOPS_MPPZZ_S
11829
500k
    43352U, // SMOVvi16to32
11830
500k
    43352U, // SMOVvi16to32_idx0
11831
500k
    43352U, // SMOVvi16to64
11832
500k
    43352U, // SMOVvi16to64_idx0
11833
500k
    43360U, // SMOVvi32to64
11834
500k
    43360U, // SMOVvi32to64_idx0
11835
500k
    43376U, // SMOVvi8to32
11836
500k
    43376U, // SMOVvi8to32_idx0
11837
500k
    43376U, // SMOVvi8to64
11838
500k
    43376U, // SMOVvi8to64_idx0
11839
500k
    134232U,  // SMSUBLrrr
11840
500k
    8530048U, // SMULH_ZPmZ_B
11841
500k
    16914560U,  // SMULH_ZPmZ_D
11842
500k
    25832584U,  // SMULH_ZPmZ_H
11843
500k
    33697920U,  // SMULH_ZPmZ_S
11844
500k
    10328U, // SMULH_ZZZ_B
11845
500k
    6232U,  // SMULH_ZZZ_D
11846
500k
    136U, // SMULH_ZZZ_H
11847
500k
    12376U, // SMULH_ZZZ_S
11848
500k
    3160U,  // SMULHrr
11849
500k
    4468824U, // SMULLB_ZZZI_D
11850
500k
    4461656U, // SMULLB_ZZZI_S
11851
500k
    12376U, // SMULLB_ZZZ_D
11852
500k
    592U, // SMULLB_ZZZ_H
11853
500k
    5208U,  // SMULLB_ZZZ_S
11854
500k
    4468824U, // SMULLT_ZZZI_D
11855
500k
    4461656U, // SMULLT_ZZZI_S
11856
500k
    12376U, // SMULLT_ZZZ_D
11857
500k
    592U, // SMULLT_ZZZ_H
11858
500k
    5208U,  // SMULLT_ZZZ_S
11859
500k
    794768U,  // SMULLv16i8_v8i16
11860
500k
    163324056U, // SMULLv2i32_indexed
11861
500k
    925848U,  // SMULLv2i32_v2i64
11862
500k
    161489056U, // SMULLv4i16_indexed
11863
500k
    1056928U, // SMULLv4i16_v4i32
11864
500k
    163324016U, // SMULLv4i32_indexed
11865
500k
    401520U,  // SMULLv4i32_v2i64
11866
500k
    161489016U, // SMULLv8i16_indexed
11867
500k
    532600U,  // SMULLv8i16_v4i32
11868
500k
    1188008U, // SMULLv8i8_v8i16
11869
500k
    89176U, // SPLICE_ZPZZ_B
11870
500k
    90200U, // SPLICE_ZPZZ_D
11871
500k
    872U, // SPLICE_ZPZZ_H
11872
500k
    91224U, // SPLICE_ZPZZ_S
11873
500k
    8530008U, // SPLICE_ZPZ_B
11874
500k
    16914520U,  // SPLICE_ZPZ_D
11875
500k
    25832584U,  // SPLICE_ZPZ_H
11876
500k
    33697880U,  // SPLICE_ZPZ_S
11877
500k
    0U, // SQABS_ZPmZ_B
11878
500k
    8U, // SQABS_ZPmZ_D
11879
500k
    0U, // SQABS_ZPmZ_H
11880
500k
    16U,  // SQABS_ZPmZ_S
11881
500k
    24U,  // SQABSv16i8
11882
500k
    32U,  // SQABSv1i16
11883
500k
    32U,  // SQABSv1i32
11884
500k
    32U,  // SQABSv1i64
11885
500k
    32U,  // SQABSv1i8
11886
500k
    40U,  // SQABSv2i32
11887
500k
    48U,  // SQABSv2i64
11888
500k
    56U,  // SQABSv4i16
11889
500k
    64U,  // SQABSv4i32
11890
500k
    72U,  // SQABSv8i16
11891
500k
    80U,  // SQABSv8i8
11892
500k
    16472U, // SQADD_ZI_B
11893
500k
    17496U, // SQADD_ZI_D
11894
500k
    176U, // SQADD_ZI_H
11895
500k
    18520U, // SQADD_ZI_S
11896
500k
    8530048U, // SQADD_ZPmZ_B
11897
500k
    16914560U,  // SQADD_ZPmZ_D
11898
500k
    25832584U,  // SQADD_ZPmZ_H
11899
500k
    33697920U,  // SQADD_ZPmZ_S
11900
500k
    10328U, // SQADD_ZZZ_B
11901
500k
    6232U,  // SQADD_ZZZ_D
11902
500k
    136U, // SQADD_ZZZ_H
11903
500k
    12376U, // SQADD_ZZZ_S
11904
500k
    794768U,  // SQADDv16i8
11905
500k
    3160U,  // SQADDv1i16
11906
500k
    3160U,  // SQADDv1i32
11907
500k
    3160U,  // SQADDv1i64
11908
500k
    3160U,  // SQADDv1i8
11909
500k
    925848U,  // SQADDv2i32
11910
500k
    270440U,  // SQADDv2i64
11911
500k
    1056928U, // SQADDv4i16
11912
500k
    401520U,  // SQADDv4i32
11913
500k
    532600U,  // SQADDv8i16
11914
500k
    1188008U, // SQADDv8i8
11915
500k
    67250264U,  // SQCADD_ZZI_B
11916
500k
    67246168U,  // SQCADD_ZZI_D
11917
500k
    2239624U, // SQCADD_ZZI_H
11918
500k
    67252312U,  // SQCADD_ZZI_S
11919
500k
    1U, // SQDECB_XPiI
11920
500k
    3U, // SQDECB_XPiWdI
11921
500k
    1U, // SQDECD_XPiI
11922
500k
    3U, // SQDECD_XPiWdI
11923
500k
    1U, // SQDECD_ZPiI
11924
500k
    1U, // SQDECH_XPiI
11925
500k
    3U, // SQDECH_XPiWdI
11926
500k
    0U, // SQDECH_ZPiI
11927
500k
    92248U, // SQDECP_XPWd_B
11928
500k
    92248U, // SQDECP_XPWd_D
11929
500k
    92248U, // SQDECP_XPWd_H
11930
500k
    92248U, // SQDECP_XPWd_S
11931
500k
    32U,  // SQDECP_XP_B
11932
500k
    32U,  // SQDECP_XP_D
11933
500k
    32U,  // SQDECP_XP_H
11934
500k
    32U,  // SQDECP_XP_S
11935
500k
    32U,  // SQDECP_ZP_D
11936
500k
    0U, // SQDECP_ZP_H
11937
500k
    32U,  // SQDECP_ZP_S
11938
500k
    1U, // SQDECW_XPiI
11939
500k
    3U, // SQDECW_XPiWdI
11940
500k
    1U, // SQDECW_ZPiI
11941
500k
    2136U,  // SQDMLALBT_ZZZ_D
11942
500k
    0U, // SQDMLALBT_ZZZ_H
11943
500k
    7256U,  // SQDMLALBT_ZZZ_S
11944
500k
    27134040U,  // SQDMLALB_ZZZI_D
11945
500k
    27139160U,  // SQDMLALB_ZZZI_S
11946
500k
    2136U,  // SQDMLALB_ZZZ_D
11947
500k
    0U, // SQDMLALB_ZZZ_H
11948
500k
    7256U,  // SQDMLALB_ZZZ_S
11949
500k
    27134040U,  // SQDMLALT_ZZZI_D
11950
500k
    27139160U,  // SQDMLALT_ZZZI_S
11951
500k
    2136U,  // SQDMLALT_ZZZ_D
11952
500k
    0U, // SQDMLALT_ZZZ_H
11953
500k
    7256U,  // SQDMLALT_ZZZ_S
11954
500k
    37977U, // SQDMLALi16
11955
500k
    37977U, // SQDMLALi32
11956
500k
    52438105U,  // SQDMLALv1i32_indexed
11957
500k
    54273113U,  // SQDMLALv1i64_indexed
11958
500k
    54273176U,  // SQDMLALv2i32_indexed
11959
500k
    926872U,  // SQDMLALv2i32_v2i64
11960
500k
    52438176U,  // SQDMLALv4i16_indexed
11961
500k
    1057952U, // SQDMLALv4i16_v4i32
11962
500k
    54273136U,  // SQDMLALv4i32_indexed
11963
500k
    402544U,  // SQDMLALv4i32_v2i64
11964
500k
    52438136U,  // SQDMLALv8i16_indexed
11965
500k
    533624U,  // SQDMLALv8i16_v4i32
11966
500k
    2136U,  // SQDMLSLBT_ZZZ_D
11967
500k
    0U, // SQDMLSLBT_ZZZ_H
11968
500k
    7256U,  // SQDMLSLBT_ZZZ_S
11969
500k
    27134040U,  // SQDMLSLB_ZZZI_D
11970
500k
    27139160U,  // SQDMLSLB_ZZZI_S
11971
500k
    2136U,  // SQDMLSLB_ZZZ_D
11972
500k
    0U, // SQDMLSLB_ZZZ_H
11973
500k
    7256U,  // SQDMLSLB_ZZZ_S
11974
500k
    27134040U,  // SQDMLSLT_ZZZI_D
11975
500k
    27139160U,  // SQDMLSLT_ZZZI_S
11976
500k
    2136U,  // SQDMLSLT_ZZZ_D
11977
500k
    0U, // SQDMLSLT_ZZZ_H
11978
500k
    7256U,  // SQDMLSLT_ZZZ_S
11979
500k
    37977U, // SQDMLSLi16
11980
500k
    37977U, // SQDMLSLi32
11981
500k
    52438105U,  // SQDMLSLv1i32_indexed
11982
500k
    54273113U,  // SQDMLSLv1i64_indexed
11983
500k
    54273176U,  // SQDMLSLv2i32_indexed
11984
500k
    926872U,  // SQDMLSLv2i32_v2i64
11985
500k
    52438176U,  // SQDMLSLv4i16_indexed
11986
500k
    1057952U, // SQDMLSLv4i16_v4i32
11987
500k
    54273136U,  // SQDMLSLv4i32_indexed
11988
500k
    402544U,  // SQDMLSLv4i32_v2i64
11989
500k
    52438136U,  // SQDMLSLv8i16_indexed
11990
500k
    533624U,  // SQDMLSLv8i16_v4i32
11991
500k
    4462680U, // SQDMULH_ZZZI_D
11992
500k
    49288U, // SQDMULH_ZZZI_H
11993
500k
    4468824U, // SQDMULH_ZZZI_S
11994
500k
    10328U, // SQDMULH_ZZZ_B
11995
500k
    6232U,  // SQDMULH_ZZZ_D
11996
500k
    136U, // SQDMULH_ZZZ_H
11997
500k
    12376U, // SQDMULH_ZZZ_S
11998
500k
    3160U,  // SQDMULHv1i16
11999
500k
    161488984U, // SQDMULHv1i16_indexed
12000
500k
    3160U,  // SQDMULHv1i32
12001
500k
    163323992U, // SQDMULHv1i32_indexed
12002
500k
    925848U,  // SQDMULHv2i32
12003
500k
    163324056U, // SQDMULHv2i32_indexed
12004
500k
    1056928U, // SQDMULHv4i16
12005
500k
    161489056U, // SQDMULHv4i16_indexed
12006
500k
    401520U,  // SQDMULHv4i32
12007
500k
    163324016U, // SQDMULHv4i32_indexed
12008
500k
    532600U,  // SQDMULHv8i16
12009
500k
    161489016U, // SQDMULHv8i16_indexed
12010
500k
    4468824U, // SQDMULLB_ZZZI_D
12011
500k
    4461656U, // SQDMULLB_ZZZI_S
12012
500k
    12376U, // SQDMULLB_ZZZ_D
12013
500k
    592U, // SQDMULLB_ZZZ_H
12014
500k
    5208U,  // SQDMULLB_ZZZ_S
12015
500k
    4468824U, // SQDMULLT_ZZZI_D
12016
500k
    4461656U, // SQDMULLT_ZZZI_S
12017
500k
    12376U, // SQDMULLT_ZZZ_D
12018
500k
    592U, // SQDMULLT_ZZZ_H
12019
500k
    5208U,  // SQDMULLT_ZZZ_S
12020
500k
    3160U,  // SQDMULLi16
12021
500k
    3160U,  // SQDMULLi32
12022
500k
    161488984U, // SQDMULLv1i32_indexed
12023
500k
    163323992U, // SQDMULLv1i64_indexed
12024
500k
    163324056U, // SQDMULLv2i32_indexed
12025
500k
    925848U,  // SQDMULLv2i32_v2i64
12026
500k
    161489056U, // SQDMULLv4i16_indexed
12027
500k
    1056928U, // SQDMULLv4i16_v4i32
12028
500k
    163324016U, // SQDMULLv4i32_indexed
12029
500k
    401520U,  // SQDMULLv4i32_v2i64
12030
500k
    161489016U, // SQDMULLv8i16_indexed
12031
500k
    532600U,  // SQDMULLv8i16_v4i32
12032
500k
    1U, // SQINCB_XPiI
12033
500k
    3U, // SQINCB_XPiWdI
12034
500k
    1U, // SQINCD_XPiI
12035
500k
    3U, // SQINCD_XPiWdI
12036
500k
    1U, // SQINCD_ZPiI
12037
500k
    1U, // SQINCH_XPiI
12038
500k
    3U, // SQINCH_XPiWdI
12039
500k
    0U, // SQINCH_ZPiI
12040
500k
    92248U, // SQINCP_XPWd_B
12041
500k
    92248U, // SQINCP_XPWd_D
12042
500k
    92248U, // SQINCP_XPWd_H
12043
500k
    92248U, // SQINCP_XPWd_S
12044
500k
    32U,  // SQINCP_XP_B
12045
500k
    32U,  // SQINCP_XP_D
12046
500k
    32U,  // SQINCP_XP_H
12047
500k
    32U,  // SQINCP_XP_S
12048
500k
    32U,  // SQINCP_ZP_D
12049
500k
    0U, // SQINCP_ZP_H
12050
500k
    32U,  // SQINCP_ZP_S
12051
500k
    1U, // SQINCW_XPiI
12052
500k
    3U, // SQINCW_XPiWdI
12053
500k
    1U, // SQINCW_ZPiI
12054
500k
    0U, // SQNEG_ZPmZ_B
12055
500k
    8U, // SQNEG_ZPmZ_D
12056
500k
    0U, // SQNEG_ZPmZ_H
12057
500k
    16U,  // SQNEG_ZPmZ_S
12058
500k
    24U,  // SQNEGv16i8
12059
500k
    32U,  // SQNEGv1i16
12060
500k
    32U,  // SQNEGv1i32
12061
500k
    32U,  // SQNEGv1i64
12062
500k
    32U,  // SQNEGv1i8
12063
500k
    40U,  // SQNEGv2i32
12064
500k
    48U,  // SQNEGv2i64
12065
500k
    56U,  // SQNEGv4i16
12066
500k
    64U,  // SQNEGv4i32
12067
500k
    72U,  // SQNEGv8i16
12068
500k
    80U,  // SQNEGv8i8
12069
500k
    92444952U,  // SQRDCMLAH_ZZZI_H
12070
500k
    1159596120U,  // SQRDCMLAH_ZZZI_S
12071
500k
    2501633U, // SQRDCMLAH_ZZZ_B
12072
500k
    100795480U, // SQRDCMLAH_ZZZ_D
12073
500k
    2501912U, // SQRDCMLAH_ZZZ_H
12074
500k
    100796504U, // SQRDCMLAH_ZZZ_S
12075
500k
    27133016U,  // SQRDMLAH_ZZZI_D
12076
500k
    39192U, // SQRDMLAH_ZZZI_H
12077
500k
    27134040U,  // SQRDMLAH_ZZZI_S
12078
500k
    1U, // SQRDMLAH_ZZZ_B
12079
500k
    1112U,  // SQRDMLAH_ZZZ_D
12080
500k
    280U, // SQRDMLAH_ZZZ_H
12081
500k
    2136U,  // SQRDMLAH_ZZZ_S
12082
500k
    52438105U,  // SQRDMLAHi16_indexed
12083
500k
    54273113U,  // SQRDMLAHi32_indexed
12084
500k
    37977U, // SQRDMLAHv1i16
12085
500k
    37977U, // SQRDMLAHv1i32
12086
500k
    926872U,  // SQRDMLAHv2i32
12087
500k
    54273176U,  // SQRDMLAHv2i32_indexed
12088
500k
    1057952U, // SQRDMLAHv4i16
12089
500k
    52438176U,  // SQRDMLAHv4i16_indexed
12090
500k
    402544U,  // SQRDMLAHv4i32
12091
500k
    54273136U,  // SQRDMLAHv4i32_indexed
12092
500k
    533624U,  // SQRDMLAHv8i16
12093
500k
    52438136U,  // SQRDMLAHv8i16_indexed
12094
500k
    27133016U,  // SQRDMLSH_ZZZI_D
12095
500k
    39192U, // SQRDMLSH_ZZZI_H
12096
500k
    27134040U,  // SQRDMLSH_ZZZI_S
12097
500k
    1U, // SQRDMLSH_ZZZ_B
12098
500k
    1112U,  // SQRDMLSH_ZZZ_D
12099
500k
    280U, // SQRDMLSH_ZZZ_H
12100
500k
    2136U,  // SQRDMLSH_ZZZ_S
12101
500k
    52438105U,  // SQRDMLSHi16_indexed
12102
500k
    54273113U,  // SQRDMLSHi32_indexed
12103
500k
    37977U, // SQRDMLSHv1i16
12104
500k
    37977U, // SQRDMLSHv1i32
12105
500k
    926872U,  // SQRDMLSHv2i32
12106
500k
    54273176U,  // SQRDMLSHv2i32_indexed
12107
500k
    1057952U, // SQRDMLSHv4i16
12108
500k
    52438176U,  // SQRDMLSHv4i16_indexed
12109
500k
    402544U,  // SQRDMLSHv4i32
12110
500k
    54273136U,  // SQRDMLSHv4i32_indexed
12111
500k
    533624U,  // SQRDMLSHv8i16
12112
500k
    52438136U,  // SQRDMLSHv8i16_indexed
12113
500k
    4462680U, // SQRDMULH_ZZZI_D
12114
500k
    49288U, // SQRDMULH_ZZZI_H
12115
500k
    4468824U, // SQRDMULH_ZZZI_S
12116
500k
    10328U, // SQRDMULH_ZZZ_B
12117
500k
    6232U,  // SQRDMULH_ZZZ_D
12118
500k
    136U, // SQRDMULH_ZZZ_H
12119
500k
    12376U, // SQRDMULH_ZZZ_S
12120
500k
    3160U,  // SQRDMULHv1i16
12121
500k
    161488984U, // SQRDMULHv1i16_indexed
12122
500k
    3160U,  // SQRDMULHv1i32
12123
500k
    163323992U, // SQRDMULHv1i32_indexed
12124
500k
    925848U,  // SQRDMULHv2i32
12125
500k
    163324056U, // SQRDMULHv2i32_indexed
12126
500k
    1056928U, // SQRDMULHv4i16
12127
500k
    161489056U, // SQRDMULHv4i16_indexed
12128
500k
    401520U,  // SQRDMULHv4i32
12129
500k
    163324016U, // SQRDMULHv4i32_indexed
12130
500k
    532600U,  // SQRDMULHv8i16
12131
500k
    161489016U, // SQRDMULHv8i16_indexed
12132
500k
    8530048U, // SQRSHLR_ZPmZ_B
12133
500k
    16914560U,  // SQRSHLR_ZPmZ_D
12134
500k
    25832584U,  // SQRSHLR_ZPmZ_H
12135
500k
    33697920U,  // SQRSHLR_ZPmZ_S
12136
500k
    8530048U, // SQRSHL_ZPmZ_B
12137
500k
    16914560U,  // SQRSHL_ZPmZ_D
12138
500k
    25832584U,  // SQRSHL_ZPmZ_H
12139
500k
    33697920U,  // SQRSHL_ZPmZ_S
12140
500k
    794768U,  // SQRSHLv16i8
12141
500k
    3160U,  // SQRSHLv1i16
12142
500k
    3160U,  // SQRSHLv1i32
12143
500k
    3160U,  // SQRSHLv1i64
12144
500k
    3160U,  // SQRSHLv1i8
12145
500k
    925848U,  // SQRSHLv2i32
12146
500k
    270440U,  // SQRSHLv2i64
12147
500k
    1056928U, // SQRSHLv4i16
12148
500k
    401520U,  // SQRSHLv4i32
12149
500k
    532600U,  // SQRSHLv8i16
12150
500k
    1188008U, // SQRSHLv8i8
12151
500k
    3160U,  // SQRSHRNB_ZZI_B
12152
500k
    200U, // SQRSHRNB_ZZI_H
12153
500k
    3160U,  // SQRSHRNB_ZZI_S
12154
500k
    37976U, // SQRSHRNT_ZZI_B
12155
500k
    320U, // SQRSHRNT_ZZI_H
12156
500k
    37976U, // SQRSHRNT_ZZI_S
12157
500k
    3160U,  // SQRSHRNb
12158
500k
    3160U,  // SQRSHRNh
12159
500k
    3160U,  // SQRSHRNs
12160
500k
    38008U, // SQRSHRNv16i8_shift
12161
500k
    3176U,  // SQRSHRNv2i32_shift
12162
500k
    3184U,  // SQRSHRNv4i16_shift
12163
500k
    37992U, // SQRSHRNv4i32_shift
12164
500k
    38000U, // SQRSHRNv8i16_shift
12165
500k
    3192U,  // SQRSHRNv8i8_shift
12166
500k
    3160U,  // SQRSHRUNB_ZZI_B
12167
500k
    200U, // SQRSHRUNB_ZZI_H
12168
500k
    3160U,  // SQRSHRUNB_ZZI_S
12169
500k
    37976U, // SQRSHRUNT_ZZI_B
12170
500k
    320U, // SQRSHRUNT_ZZI_H
12171
500k
    37976U, // SQRSHRUNT_ZZI_S
12172
500k
    3160U,  // SQRSHRUNb
12173
500k
    3160U,  // SQRSHRUNh
12174
500k
    3160U,  // SQRSHRUNs
12175
500k
    38008U, // SQRSHRUNv16i8_shift
12176
500k
    3176U,  // SQRSHRUNv2i32_shift
12177
500k
    3184U,  // SQRSHRUNv4i16_shift
12178
500k
    37992U, // SQRSHRUNv4i32_shift
12179
500k
    38000U, // SQRSHRUNv8i16_shift
12180
500k
    3192U,  // SQRSHRUNv8i8_shift
12181
500k
    8530048U, // SQSHLR_ZPmZ_B
12182
500k
    16914560U,  // SQSHLR_ZPmZ_D
12183
500k
    25832584U,  // SQSHLR_ZPmZ_H
12184
500k
    33697920U,  // SQSHLR_ZPmZ_S
12185
500k
    141440U,  // SQSHLU_ZPmI_B
12186
500k
    137344U,  // SQSHLU_ZPmI_D
12187
500k
    1453192U, // SQSHLU_ZPmI_H
12188
500k
    143488U,  // SQSHLU_ZPmI_S
12189
500k
    3160U,  // SQSHLUb
12190
500k
    3160U,  // SQSHLUd
12191
500k
    3160U,  // SQSHLUh
12192
500k
    3160U,  // SQSHLUs
12193
500k
    3216U,  // SQSHLUv16i8_shift
12194
500k
    3224U,  // SQSHLUv2i32_shift
12195
500k
    3176U,  // SQSHLUv2i64_shift
12196
500k
    3232U,  // SQSHLUv4i16_shift
12197
500k
    3184U,  // SQSHLUv4i32_shift
12198
500k
    3192U,  // SQSHLUv8i16_shift
12199
500k
    3240U,  // SQSHLUv8i8_shift
12200
500k
    141440U,  // SQSHL_ZPmI_B
12201
500k
    137344U,  // SQSHL_ZPmI_D
12202
500k
    1453192U, // SQSHL_ZPmI_H
12203
500k
    143488U,  // SQSHL_ZPmI_S
12204
500k
    8530048U, // SQSHL_ZPmZ_B
12205
500k
    16914560U,  // SQSHL_ZPmZ_D
12206
500k
    25832584U,  // SQSHL_ZPmZ_H
12207
500k
    33697920U,  // SQSHL_ZPmZ_S
12208
500k
    3160U,  // SQSHLb
12209
500k
    3160U,  // SQSHLd
12210
500k
    3160U,  // SQSHLh
12211
500k
    3160U,  // SQSHLs
12212
500k
    794768U,  // SQSHLv16i8
12213
500k
    3216U,  // SQSHLv16i8_shift
12214
500k
    3160U,  // SQSHLv1i16
12215
500k
    3160U,  // SQSHLv1i32
12216
500k
    3160U,  // SQSHLv1i64
12217
500k
    3160U,  // SQSHLv1i8
12218
500k
    925848U,  // SQSHLv2i32
12219
500k
    3224U,  // SQSHLv2i32_shift
12220
500k
    270440U,  // SQSHLv2i64
12221
500k
    3176U,  // SQSHLv2i64_shift
12222
500k
    1056928U, // SQSHLv4i16
12223
500k
    3232U,  // SQSHLv4i16_shift
12224
500k
    401520U,  // SQSHLv4i32
12225
500k
    3184U,  // SQSHLv4i32_shift
12226
500k
    532600U,  // SQSHLv8i16
12227
500k
    3192U,  // SQSHLv8i16_shift
12228
500k
    1188008U, // SQSHLv8i8
12229
500k
    3240U,  // SQSHLv8i8_shift
12230
500k
    3160U,  // SQSHRNB_ZZI_B
12231
500k
    200U, // SQSHRNB_ZZI_H
12232
500k
    3160U,  // SQSHRNB_ZZI_S
12233
500k
    37976U, // SQSHRNT_ZZI_B
12234
500k
    320U, // SQSHRNT_ZZI_H
12235
500k
    37976U, // SQSHRNT_ZZI_S
12236
500k
    3160U,  // SQSHRNb
12237
500k
    3160U,  // SQSHRNh
12238
500k
    3160U,  // SQSHRNs
12239
500k
    38008U, // SQSHRNv16i8_shift
12240
500k
    3176U,  // SQSHRNv2i32_shift
12241
500k
    3184U,  // SQSHRNv4i16_shift
12242
500k
    37992U, // SQSHRNv4i32_shift
12243
500k
    38000U, // SQSHRNv8i16_shift
12244
500k
    3192U,  // SQSHRNv8i8_shift
12245
500k
    3160U,  // SQSHRUNB_ZZI_B
12246
500k
    200U, // SQSHRUNB_ZZI_H
12247
500k
    3160U,  // SQSHRUNB_ZZI_S
12248
500k
    37976U, // SQSHRUNT_ZZI_B
12249
500k
    320U, // SQSHRUNT_ZZI_H
12250
500k
    37976U, // SQSHRUNT_ZZI_S
12251
500k
    3160U,  // SQSHRUNb
12252
500k
    3160U,  // SQSHRUNh
12253
500k
    3160U,  // SQSHRUNs
12254
500k
    38008U, // SQSHRUNv16i8_shift
12255
500k
    3176U,  // SQSHRUNv2i32_shift
12256
500k
    3184U,  // SQSHRUNv4i16_shift
12257
500k
    37992U, // SQSHRUNv4i32_shift
12258
500k
    38000U, // SQSHRUNv8i16_shift
12259
500k
    3192U,  // SQSHRUNv8i8_shift
12260
500k
    8530048U, // SQSUBR_ZPmZ_B
12261
500k
    16914560U,  // SQSUBR_ZPmZ_D
12262
500k
    25832584U,  // SQSUBR_ZPmZ_H
12263
500k
    33697920U,  // SQSUBR_ZPmZ_S
12264
500k
    16472U, // SQSUB_ZI_B
12265
500k
    17496U, // SQSUB_ZI_D
12266
500k
    176U, // SQSUB_ZI_H
12267
500k
    18520U, // SQSUB_ZI_S
12268
500k
    8530048U, // SQSUB_ZPmZ_B
12269
500k
    16914560U,  // SQSUB_ZPmZ_D
12270
500k
    25832584U,  // SQSUB_ZPmZ_H
12271
500k
    33697920U,  // SQSUB_ZPmZ_S
12272
500k
    10328U, // SQSUB_ZZZ_B
12273
500k
    6232U,  // SQSUB_ZZZ_D
12274
500k
    136U, // SQSUB_ZZZ_H
12275
500k
    12376U, // SQSUB_ZZZ_S
12276
500k
    794768U,  // SQSUBv16i8
12277
500k
    3160U,  // SQSUBv1i16
12278
500k
    3160U,  // SQSUBv1i32
12279
500k
    3160U,  // SQSUBv1i64
12280
500k
    3160U,  // SQSUBv1i8
12281
500k
    925848U,  // SQSUBv2i32
12282
500k
    270440U,  // SQSUBv2i64
12283
500k
    1056928U, // SQSUBv4i16
12284
500k
    401520U,  // SQSUBv4i32
12285
500k
    532600U,  // SQSUBv8i16
12286
500k
    1188008U, // SQSUBv8i8
12287
500k
    32U,  // SQXTNB_ZZ_B
12288
500k
    0U, // SQXTNB_ZZ_H
12289
500k
    32U,  // SQXTNB_ZZ_S
12290
500k
    32U,  // SQXTNT_ZZ_B
12291
500k
    0U, // SQXTNT_ZZ_H
12292
500k
    32U,  // SQXTNT_ZZ_S
12293
500k
    72U,  // SQXTNv16i8
12294
500k
    32U,  // SQXTNv1i16
12295
500k
    32U,  // SQXTNv1i32
12296
500k
    32U,  // SQXTNv1i8
12297
500k
    48U,  // SQXTNv2i32
12298
500k
    64U,  // SQXTNv4i16
12299
500k
    48U,  // SQXTNv4i32
12300
500k
    64U,  // SQXTNv8i16
12301
500k
    72U,  // SQXTNv8i8
12302
500k
    32U,  // SQXTUNB_ZZ_B
12303
500k
    0U, // SQXTUNB_ZZ_H
12304
500k
    32U,  // SQXTUNB_ZZ_S
12305
500k
    32U,  // SQXTUNT_ZZ_B
12306
500k
    0U, // SQXTUNT_ZZ_H
12307
500k
    32U,  // SQXTUNT_ZZ_S
12308
500k
    72U,  // SQXTUNv16i8
12309
500k
    32U,  // SQXTUNv1i16
12310
500k
    32U,  // SQXTUNv1i32
12311
500k
    32U,  // SQXTUNv1i8
12312
500k
    48U,  // SQXTUNv2i32
12313
500k
    64U,  // SQXTUNv4i16
12314
500k
    48U,  // SQXTUNv4i32
12315
500k
    64U,  // SQXTUNv8i16
12316
500k
    72U,  // SQXTUNv8i8
12317
500k
    8530048U, // SRHADD_ZPmZ_B
12318
500k
    16914560U,  // SRHADD_ZPmZ_D
12319
500k
    25832584U,  // SRHADD_ZPmZ_H
12320
500k
    33697920U,  // SRHADD_ZPmZ_S
12321
500k
    794768U,  // SRHADDv16i8
12322
500k
    925848U,  // SRHADDv2i32
12323
500k
    1056928U, // SRHADDv4i16
12324
500k
    401520U,  // SRHADDv4i32
12325
500k
    532600U,  // SRHADDv8i16
12326
500k
    1188008U, // SRHADDv8i8
12327
500k
    321U, // SRI_ZZI_B
12328
500k
    37976U, // SRI_ZZI_D
12329
500k
    320U, // SRI_ZZI_H
12330
500k
    37976U, // SRI_ZZI_S
12331
500k
    37977U, // SRId
12332
500k
    38032U, // SRIv16i8_shift
12333
500k
    38040U, // SRIv2i32_shift
12334
500k
    37992U, // SRIv2i64_shift
12335
500k
    38048U, // SRIv4i16_shift
12336
500k
    38000U, // SRIv4i32_shift
12337
500k
    38008U, // SRIv8i16_shift
12338
500k
    38056U, // SRIv8i8_shift
12339
500k
    8530048U, // SRSHLR_ZPmZ_B
12340
500k
    16914560U,  // SRSHLR_ZPmZ_D
12341
500k
    25832584U,  // SRSHLR_ZPmZ_H
12342
500k
    33697920U,  // SRSHLR_ZPmZ_S
12343
500k
    8530048U, // SRSHL_ZPmZ_B
12344
500k
    16914560U,  // SRSHL_ZPmZ_D
12345
500k
    25832584U,  // SRSHL_ZPmZ_H
12346
500k
    33697920U,  // SRSHL_ZPmZ_S
12347
500k
    794768U,  // SRSHLv16i8
12348
500k
    3160U,  // SRSHLv1i64
12349
500k
    925848U,  // SRSHLv2i32
12350
500k
    270440U,  // SRSHLv2i64
12351
500k
    1056928U, // SRSHLv4i16
12352
500k
    401520U,  // SRSHLv4i32
12353
500k
    532600U,  // SRSHLv8i16
12354
500k
    1188008U, // SRSHLv8i8
12355
500k
    141440U,  // SRSHR_ZPmI_B
12356
500k
    137344U,  // SRSHR_ZPmI_D
12357
500k
    1453192U, // SRSHR_ZPmI_H
12358
500k
    143488U,  // SRSHR_ZPmI_S
12359
500k
    3160U,  // SRSHRd
12360
500k
    3216U,  // SRSHRv16i8_shift
12361
500k
    3224U,  // SRSHRv2i32_shift
12362
500k
    3176U,  // SRSHRv2i64_shift
12363
500k
    3232U,  // SRSHRv4i16_shift
12364
500k
    3184U,  // SRSHRv4i32_shift
12365
500k
    3192U,  // SRSHRv8i16_shift
12366
500k
    3240U,  // SRSHRv8i8_shift
12367
500k
    321U, // SRSRA_ZZI_B
12368
500k
    37976U, // SRSRA_ZZI_D
12369
500k
    320U, // SRSRA_ZZI_H
12370
500k
    37976U, // SRSRA_ZZI_S
12371
500k
    37977U, // SRSRAd
12372
500k
    38032U, // SRSRAv16i8_shift
12373
500k
    38040U, // SRSRAv2i32_shift
12374
500k
    37992U, // SRSRAv2i64_shift
12375
500k
    38048U, // SRSRAv4i16_shift
12376
500k
    38000U, // SRSRAv4i32_shift
12377
500k
    38008U, // SRSRAv8i16_shift
12378
500k
    38056U, // SRSRAv8i8_shift
12379
500k
    3160U,  // SSHLLB_ZZI_D
12380
500k
    200U, // SSHLLB_ZZI_H
12381
500k
    3160U,  // SSHLLB_ZZI_S
12382
500k
    3160U,  // SSHLLT_ZZI_D
12383
500k
    200U, // SSHLLT_ZZI_H
12384
500k
    3160U,  // SSHLLT_ZZI_S
12385
500k
    3216U,  // SSHLLv16i8_shift
12386
500k
    3224U,  // SSHLLv2i32_shift
12387
500k
    3232U,  // SSHLLv4i16_shift
12388
500k
    3184U,  // SSHLLv4i32_shift
12389
500k
    3192U,  // SSHLLv8i16_shift
12390
500k
    3240U,  // SSHLLv8i8_shift
12391
500k
    794768U,  // SSHLv16i8
12392
500k
    3160U,  // SSHLv1i64
12393
500k
    925848U,  // SSHLv2i32
12394
500k
    270440U,  // SSHLv2i64
12395
500k
    1056928U, // SSHLv4i16
12396
500k
    401520U,  // SSHLv4i32
12397
500k
    532600U,  // SSHLv8i16
12398
500k
    1188008U, // SSHLv8i8
12399
500k
    3160U,  // SSHRd
12400
500k
    3216U,  // SSHRv16i8_shift
12401
500k
    3224U,  // SSHRv2i32_shift
12402
500k
    3176U,  // SSHRv2i64_shift
12403
500k
    3232U,  // SSHRv4i16_shift
12404
500k
    3184U,  // SSHRv4i32_shift
12405
500k
    3192U,  // SSHRv8i16_shift
12406
500k
    3240U,  // SSHRv8i8_shift
12407
500k
    321U, // SSRA_ZZI_B
12408
500k
    37976U, // SSRA_ZZI_D
12409
500k
    320U, // SSRA_ZZI_H
12410
500k
    37976U, // SSRA_ZZI_S
12411
500k
    37977U, // SSRAd
12412
500k
    38032U, // SSRAv16i8_shift
12413
500k
    38040U, // SSRAv2i32_shift
12414
500k
    37992U, // SSRAv2i64_shift
12415
500k
    38048U, // SSRAv4i16_shift
12416
500k
    38000U, // SSRAv4i32_shift
12417
500k
    38008U, // SSRAv8i16_shift
12418
500k
    38056U, // SSRAv8i8_shift
12419
500k
    2397272U, // SST1B_D_IMM
12420
500k
    50265U, // SST1B_D_REAL
12421
500k
    51289U, // SST1B_D_SXTW
12422
500k
    52313U, // SST1B_D_UXTW
12423
500k
    2397272U, // SST1B_S_IMM
12424
500k
    53337U, // SST1B_S_SXTW
12425
500k
    54361U, // SST1B_S_UXTW
12426
500k
    2414680U, // SST1D_IMM
12427
500k
    50265U, // SST1D_REAL
12428
500k
    56409U, // SST1D_SCALED_SCALED_REAL
12429
500k
    51289U, // SST1D_SXTW
12430
500k
    57433U, // SST1D_SXTW_SCALED
12431
500k
    52313U, // SST1D_UXTW
12432
500k
    58457U, // SST1D_UXTW_SCALED
12433
500k
    2418776U, // SST1H_D_IMM
12434
500k
    50265U, // SST1H_D_REAL
12435
500k
    60505U, // SST1H_D_SCALED_SCALED_REAL
12436
500k
    51289U, // SST1H_D_SXTW
12437
500k
    61529U, // SST1H_D_SXTW_SCALED
12438
500k
    52313U, // SST1H_D_UXTW
12439
500k
    62553U, // SST1H_D_UXTW_SCALED
12440
500k
    2418776U, // SST1H_S_IMM
12441
500k
    53337U, // SST1H_S_SXTW
12442
500k
    63577U, // SST1H_S_SXTW_SCALED
12443
500k
    54361U, // SST1H_S_UXTW
12444
500k
    64601U, // SST1H_S_UXTW_SCALED
12445
500k
    2424920U, // SST1W_D_IMM
12446
500k
    50265U, // SST1W_D_REAL
12447
500k
    66649U, // SST1W_D_SCALED_SCALED_REAL
12448
500k
    51289U, // SST1W_D_SXTW
12449
500k
    67673U, // SST1W_D_SXTW_SCALED
12450
500k
    52313U, // SST1W_D_UXTW
12451
500k
    68697U, // SST1W_D_UXTW_SCALED
12452
500k
    2424920U, // SST1W_IMM
12453
500k
    53337U, // SST1W_SXTW
12454
500k
    69721U, // SST1W_SXTW_SCALED
12455
500k
    54361U, // SST1W_UXTW
12456
500k
    70745U, // SST1W_UXTW_SCALED
12457
500k
    12376U, // SSUBLBT_ZZZ_D
12458
500k
    592U, // SSUBLBT_ZZZ_H
12459
500k
    5208U,  // SSUBLBT_ZZZ_S
12460
500k
    12376U, // SSUBLB_ZZZ_D
12461
500k
    592U, // SSUBLB_ZZZ_H
12462
500k
    5208U,  // SSUBLB_ZZZ_S
12463
500k
    12376U, // SSUBLTB_ZZZ_D
12464
500k
    592U, // SSUBLTB_ZZZ_H
12465
500k
    5208U,  // SSUBLTB_ZZZ_S
12466
500k
    12376U, // SSUBLT_ZZZ_D
12467
500k
    592U, // SSUBLT_ZZZ_H
12468
500k
    5208U,  // SSUBLT_ZZZ_S
12469
500k
    794768U,  // SSUBLv16i8_v8i16
12470
500k
    925848U,  // SSUBLv2i32_v2i64
12471
500k
    1056928U, // SSUBLv4i16_v4i32
12472
500k
    401520U,  // SSUBLv4i32_v2i64
12473
500k
    532600U,  // SSUBLv8i16_v4i32
12474
500k
    1188008U, // SSUBLv8i8_v8i16
12475
500k
    12376U, // SSUBWB_ZZZ_D
12476
500k
    592U, // SSUBWB_ZZZ_H
12477
500k
    5208U,  // SSUBWB_ZZZ_S
12478
500k
    12376U, // SSUBWT_ZZZ_D
12479
500k
    592U, // SSUBWT_ZZZ_H
12480
500k
    5208U,  // SSUBWT_ZZZ_S
12481
500k
    794744U,  // SSUBWv16i8_v8i16
12482
500k
    925800U,  // SSUBWv2i32_v2i64
12483
500k
    1056880U, // SSUBWv4i16_v4i32
12484
500k
    401512U,  // SSUBWv4i32_v2i64
12485
500k
    532592U,  // SSUBWv8i16_v4i32
12486
500k
    1187960U, // SSUBWv8i8_v8i16
12487
500k
    72793U, // ST1B
12488
500k
    72793U, // ST1B_D
12489
500k
    4625497U, // ST1B_D_IMM
12490
500k
    72793U, // ST1B_H
12491
500k
    4625497U, // ST1B_H_IMM
12492
500k
    4625497U, // ST1B_IMM
12493
500k
    72793U, // ST1B_S
12494
500k
    4625497U, // ST1B_S_IMM
12495
500k
    73817U, // ST1D
12496
500k
    4625497U, // ST1D_IMM
12497
500k
    0U, // ST1Fourv16b
12498
500k
    0U, // ST1Fourv16b_POST
12499
500k
    0U, // ST1Fourv1d
12500
500k
    0U, // ST1Fourv1d_POST
12501
500k
    0U, // ST1Fourv2d
12502
500k
    0U, // ST1Fourv2d_POST
12503
500k
    0U, // ST1Fourv2s
12504
500k
    0U, // ST1Fourv2s_POST
12505
500k
    0U, // ST1Fourv4h
12506
500k
    0U, // ST1Fourv4h_POST
12507
500k
    0U, // ST1Fourv4s
12508
500k
    0U, // ST1Fourv4s_POST
12509
500k
    0U, // ST1Fourv8b
12510
500k
    0U, // ST1Fourv8b_POST
12511
500k
    0U, // ST1Fourv8h
12512
500k
    0U, // ST1Fourv8h_POST
12513
500k
    74841U, // ST1H
12514
500k
    74841U, // ST1H_D
12515
500k
    4625497U, // ST1H_D_IMM
12516
500k
    4625497U, // ST1H_IMM
12517
500k
    74841U, // ST1H_S
12518
500k
    4625497U, // ST1H_S_IMM
12519
500k
    0U, // ST1Onev16b
12520
500k
    0U, // ST1Onev16b_POST
12521
500k
    0U, // ST1Onev1d
12522
500k
    0U, // ST1Onev1d_POST
12523
500k
    0U, // ST1Onev2d
12524
500k
    0U, // ST1Onev2d_POST
12525
500k
    0U, // ST1Onev2s
12526
500k
    0U, // ST1Onev2s_POST
12527
500k
    0U, // ST1Onev4h
12528
500k
    0U, // ST1Onev4h_POST
12529
500k
    0U, // ST1Onev4s
12530
500k
    0U, // ST1Onev4s_POST
12531
500k
    0U, // ST1Onev8b
12532
500k
    0U, // ST1Onev8b_POST
12533
500k
    0U, // ST1Onev8h
12534
500k
    0U, // ST1Onev8h_POST
12535
500k
    0U, // ST1Threev16b
12536
500k
    0U, // ST1Threev16b_POST
12537
500k
    0U, // ST1Threev1d
12538
500k
    0U, // ST1Threev1d_POST
12539
500k
    0U, // ST1Threev2d
12540
500k
    0U, // ST1Threev2d_POST
12541
500k
    0U, // ST1Threev2s
12542
500k
    0U, // ST1Threev2s_POST
12543
500k
    0U, // ST1Threev4h
12544
500k
    0U, // ST1Threev4h_POST
12545
500k
    0U, // ST1Threev4s
12546
500k
    0U, // ST1Threev4s_POST
12547
500k
    0U, // ST1Threev8b
12548
500k
    0U, // ST1Threev8b_POST
12549
500k
    0U, // ST1Threev8h
12550
500k
    0U, // ST1Threev8h_POST
12551
500k
    0U, // ST1Twov16b
12552
500k
    0U, // ST1Twov16b_POST
12553
500k
    0U, // ST1Twov1d
12554
500k
    0U, // ST1Twov1d_POST
12555
500k
    0U, // ST1Twov2d
12556
500k
    0U, // ST1Twov2d_POST
12557
500k
    0U, // ST1Twov2s
12558
500k
    0U, // ST1Twov2s_POST
12559
500k
    0U, // ST1Twov4h
12560
500k
    0U, // ST1Twov4h_POST
12561
500k
    0U, // ST1Twov4s
12562
500k
    0U, // ST1Twov4s_POST
12563
500k
    0U, // ST1Twov8b
12564
500k
    0U, // ST1Twov8b_POST
12565
500k
    0U, // ST1Twov8h
12566
500k
    0U, // ST1Twov8h_POST
12567
500k
    76889U, // ST1W
12568
500k
    76889U, // ST1W_D
12569
500k
    4625497U, // ST1W_D_IMM
12570
500k
    4625497U, // ST1W_IMM
12571
500k
    531U, // ST1_MXIPXX_H_B
12572
500k
    539U, // ST1_MXIPXX_H_D
12573
500k
    547U, // ST1_MXIPXX_H_H
12574
500k
    555U, // ST1_MXIPXX_H_Q
12575
500k
    563U, // ST1_MXIPXX_H_S
12576
500k
    531U, // ST1_MXIPXX_V_B
12577
500k
    539U, // ST1_MXIPXX_V_D
12578
500k
    547U, // ST1_MXIPXX_V_H
12579
500k
    555U, // ST1_MXIPXX_V_Q
12580
500k
    563U, // ST1_MXIPXX_V_S
12581
500k
    0U, // ST1i16
12582
500k
    3U, // ST1i16_POST
12583
500k
    0U, // ST1i32
12584
500k
    3U, // ST1i32_POST
12585
500k
    0U, // ST1i64
12586
500k
    3U, // ST1i64_POST
12587
500k
    0U, // ST1i8
12588
500k
    3U, // ST1i8_POST
12589
500k
    72793U, // ST2B
12590
500k
    4647001U, // ST2B_IMM
12591
500k
    73817U, // ST2D
12592
500k
    4647001U, // ST2D_IMM
12593
500k
    2363480U, // ST2GOffset
12594
500k
    78401U, // ST2GPostIndex
12595
500k
    4927577U, // ST2GPreIndex
12596
500k
    74841U, // ST2H
12597
500k
    4647001U, // ST2H_IMM
12598
500k
    0U, // ST2Twov16b
12599
500k
    0U, // ST2Twov16b_POST
12600
500k
    0U, // ST2Twov2d
12601
500k
    0U, // ST2Twov2d_POST
12602
500k
    0U, // ST2Twov2s
12603
500k
    0U, // ST2Twov2s_POST
12604
500k
    0U, // ST2Twov4h
12605
500k
    0U, // ST2Twov4h_POST
12606
500k
    0U, // ST2Twov4s
12607
500k
    0U, // ST2Twov4s_POST
12608
500k
    0U, // ST2Twov8b
12609
500k
    0U, // ST2Twov8b_POST
12610
500k
    0U, // ST2Twov8h
12611
500k
    0U, // ST2Twov8h_POST
12612
500k
    76889U, // ST2W
12613
500k
    4647001U, // ST2W_IMM
12614
500k
    0U, // ST2i16
12615
500k
    3U, // ST2i16_POST
12616
500k
    0U, // ST2i32
12617
500k
    3U, // ST2i32_POST
12618
500k
    0U, // ST2i64
12619
500k
    3U, // ST2i64_POST
12620
500k
    0U, // ST2i8
12621
500k
    3U, // ST2i8_POST
12622
500k
    72793U, // ST3B
12623
500k
    78937U, // ST3B_IMM
12624
500k
    73817U, // ST3D
12625
500k
    78937U, // ST3D_IMM
12626
500k
    74841U, // ST3H
12627
500k
    78937U, // ST3H_IMM
12628
500k
    0U, // ST3Threev16b
12629
500k
    0U, // ST3Threev16b_POST
12630
500k
    0U, // ST3Threev2d
12631
500k
    0U, // ST3Threev2d_POST
12632
500k
    0U, // ST3Threev2s
12633
500k
    0U, // ST3Threev2s_POST
12634
500k
    0U, // ST3Threev4h
12635
500k
    0U, // ST3Threev4h_POST
12636
500k
    0U, // ST3Threev4s
12637
500k
    0U, // ST3Threev4s_POST
12638
500k
    0U, // ST3Threev8b
12639
500k
    0U, // ST3Threev8b_POST
12640
500k
    0U, // ST3Threev8h
12641
500k
    0U, // ST3Threev8h_POST
12642
500k
    76889U, // ST3W
12643
500k
    78937U, // ST3W_IMM
12644
500k
    0U, // ST3i16
12645
500k
    3U, // ST3i16_POST
12646
500k
    0U, // ST3i32
12647
500k
    3U, // ST3i32_POST
12648
500k
    0U, // ST3i64
12649
500k
    3U, // ST3i64_POST
12650
500k
    0U, // ST3i8
12651
500k
    3U, // ST3i8_POST
12652
500k
    72793U, // ST4B
12653
500k
    4653145U, // ST4B_IMM
12654
500k
    73817U, // ST4D
12655
500k
    4653145U, // ST4D_IMM
12656
500k
    0U, // ST4Fourv16b
12657
500k
    0U, // ST4Fourv16b_POST
12658
500k
    0U, // ST4Fourv2d
12659
500k
    0U, // ST4Fourv2d_POST
12660
500k
    0U, // ST4Fourv2s
12661
500k
    0U, // ST4Fourv2s_POST
12662
500k
    0U, // ST4Fourv4h
12663
500k
    0U, // ST4Fourv4h_POST
12664
500k
    0U, // ST4Fourv4s
12665
500k
    0U, // ST4Fourv4s_POST
12666
500k
    0U, // ST4Fourv8b
12667
500k
    0U, // ST4Fourv8b_POST
12668
500k
    0U, // ST4Fourv8h
12669
500k
    0U, // ST4Fourv8h_POST
12670
500k
    74841U, // ST4H
12671
500k
    4653145U, // ST4H_IMM
12672
500k
    76889U, // ST4W
12673
500k
    4653145U, // ST4W_IMM
12674
500k
    0U, // ST4i16
12675
500k
    3U, // ST4i16_POST
12676
500k
    0U, // ST4i32
12677
500k
    3U, // ST4i32_POST
12678
500k
    0U, // ST4i64
12679
500k
    3U, // ST4i64_POST
12680
500k
    0U, // ST4i8
12681
500k
    3U, // ST4i8_POST
12682
500k
    0U, // ST64B
12683
500k
    3U, // ST64BV
12684
500k
    3U, // ST64BV0
12685
500k
    568U, // STGM
12686
500k
    2363480U, // STGOffset
12687
500k
    184683728U, // STGPi
12688
500k
    78401U, // STGPostIndex
12689
500k
    214471889U, // STGPpost
12690
500k
    2894238929U,  // STGPpre
12691
500k
    4927577U, // STGPreIndex
12692
500k
    568U, // STLLRB
12693
500k
    568U, // STLLRH
12694
500k
    568U, // STLLRW
12695
500k
    568U, // STLLRX
12696
500k
    568U, // STLRB
12697
500k
    568U, // STLRH
12698
500k
    568U, // STLRW
12699
500k
    568U, // STLRX
12700
500k
    2362456U, // STLURBi
12701
500k
    2362456U, // STLURHi
12702
500k
    2362456U, // STLURWi
12703
500k
    2362456U, // STLURXi
12704
500k
    5246040U, // STLXPW
12705
500k
    5246040U, // STLXPX
12706
500k
    2362576U, // STLXRB
12707
500k
    2362576U, // STLXRH
12708
500k
    2362576U, // STLXRW
12709
500k
    2362576U, // STLXRX
12710
500k
    176295120U, // STNPDi
12711
500k
    184683728U, // STNPQi
12712
500k
    193072336U, // STNPSi
12713
500k
    193072336U, // STNPWi
12714
500k
    176295120U, // STNPXi
12715
500k
    4625497U, // STNT1B_ZRI
12716
500k
    72793U, // STNT1B_ZRR
12717
500k
    2397272U, // STNT1B_ZZR_D_REAL
12718
500k
    2397272U, // STNT1B_ZZR_S_REAL
12719
500k
    4625497U, // STNT1D_ZRI
12720
500k
    73817U, // STNT1D_ZRR
12721
500k
    2397272U, // STNT1D_ZZR_D_REAL
12722
500k
    4625497U, // STNT1H_ZRI
12723
500k
    74841U, // STNT1H_ZRR
12724
500k
    2397272U, // STNT1H_ZZR_D_REAL
12725
500k
    2397272U, // STNT1H_ZZR_S_REAL
12726
500k
    4625497U, // STNT1W_ZRI
12727
500k
    76889U, // STNT1W_ZRR
12728
500k
    2397272U, // STNT1W_ZZR_D_REAL
12729
500k
    2397272U, // STNT1W_ZZR_S_REAL
12730
500k
    176295120U, // STPDi
12731
500k
    206083281U, // STPDpost
12732
500k
    2885850321U,  // STPDpre
12733
500k
    184683728U, // STPQi
12734
500k
    214471889U, // STPQpost
12735
500k
    2894238929U,  // STPQpre
12736
500k
    193072336U, // STPSi
12737
500k
    222860497U, // STPSpost
12738
500k
    2902627537U,  // STPSpre
12739
500k
    193072336U, // STPWi
12740
500k
    222860497U, // STPWpost
12741
500k
    2902627537U,  // STPWpre
12742
500k
    176295120U, // STPXi
12743
500k
    206083281U, // STPXpost
12744
500k
    2885850321U,  // STPXpre
12745
500k
    38465U, // STRBBpost
12746
500k
    4887641U, // STRBBpre
12747
500k
    226626648U, // STRBBroW
12748
500k
    235015256U, // STRBBroX
12749
500k
    80984U, // STRBBui
12750
500k
    38465U, // STRBpost
12751
500k
    4887641U, // STRBpre
12752
500k
    226626648U, // STRBroW
12753
500k
    235015256U, // STRBroX
12754
500k
    80984U, // STRBui
12755
500k
    38465U, // STRDpost
12756
500k
    4887641U, // STRDpre
12757
500k
    243403864U, // STRDroW
12758
500k
    251792472U, // STRDroX
12759
500k
    82008U, // STRDui
12760
500k
    38465U, // STRHHpost
12761
500k
    4887641U, // STRHHpre
12762
500k
    260181080U, // STRHHroW
12763
500k
    268569688U, // STRHHroX
12764
500k
    83032U, // STRHHui
12765
500k
    38465U, // STRHpost
12766
500k
    4887641U, // STRHpre
12767
500k
    260181080U, // STRHroW
12768
500k
    268569688U, // STRHroX
12769
500k
    83032U, // STRHui
12770
500k
    38465U, // STRQpost
12771
500k
    4887641U, // STRQpre
12772
500k
    276958296U, // STRQroW
12773
500k
    285346904U, // STRQroX
12774
500k
    84056U, // STRQui
12775
500k
    38465U, // STRSpost
12776
500k
    4887641U, // STRSpre
12777
500k
    293735512U, // STRSroW
12778
500k
    302124120U, // STRSroX
12779
500k
    85080U, // STRSui
12780
500k
    38465U, // STRWpost
12781
500k
    4887641U, // STRWpre
12782
500k
    293735512U, // STRWroW
12783
500k
    302124120U, // STRWroX
12784
500k
    85080U, // STRWui
12785
500k
    38465U, // STRXpost
12786
500k
    4887641U, // STRXpre
12787
500k
    243403864U, // STRXroW
12788
500k
    251792472U, // STRXroX
12789
500k
    82008U, // STRXui
12790
500k
    4590680U, // STR_PXI
12791
500k
    0U, // STR_ZA
12792
500k
    4590680U, // STR_ZXI
12793
500k
    2362456U, // STTRBi
12794
500k
    2362456U, // STTRHi
12795
500k
    2362456U, // STTRWi
12796
500k
    2362456U, // STTRXi
12797
500k
    2362456U, // STURBBi
12798
500k
    2362456U, // STURBi
12799
500k
    2362456U, // STURDi
12800
500k
    2362456U, // STURHHi
12801
500k
    2362456U, // STURHi
12802
500k
    2362456U, // STURQi
12803
500k
    2362456U, // STURSi
12804
500k
    2362456U, // STURWi
12805
500k
    2362456U, // STURXi
12806
500k
    5246040U, // STXPW
12807
500k
    5246040U, // STXPX
12808
500k
    2362576U, // STXRB
12809
500k
    2362576U, // STXRH
12810
500k
    2362576U, // STXRW
12811
500k
    2362576U, // STXRX
12812
500k
    2363480U, // STZ2GOffset
12813
500k
    78401U, // STZ2GPostIndex
12814
500k
    4927577U, // STZ2GPreIndex
12815
500k
    568U, // STZGM
12816
500k
    2363480U, // STZGOffset
12817
500k
    78401U, // STZGPostIndex
12818
500k
    4927577U, // STZGPreIndex
12819
500k
    135256U,  // SUBG
12820
500k
    5208U,  // SUBHNB_ZZZ_B
12821
500k
    96U,  // SUBHNB_ZZZ_H
12822
500k
    6232U,  // SUBHNB_ZZZ_S
12823
500k
    7256U,  // SUBHNT_ZZZ_B
12824
500k
    16U,  // SUBHNT_ZZZ_H
12825
500k
    1112U,  // SUBHNT_ZZZ_S
12826
500k
    270440U,  // SUBHNv2i64_v2i32
12827
500k
    271464U,  // SUBHNv2i64_v4i32
12828
500k
    401520U,  // SUBHNv4i32_v4i16
12829
500k
    402544U,  // SUBHNv4i32_v8i16
12830
500k
    533624U,  // SUBHNv8i16_v16i8
12831
500k
    532600U,  // SUBHNv8i16_v8i8
12832
500k
    3160U,  // SUBP
12833
500k
    3160U,  // SUBPS
12834
500k
    16472U, // SUBR_ZI_B
12835
500k
    17496U, // SUBR_ZI_D
12836
500k
    176U, // SUBR_ZI_H
12837
500k
    18520U, // SUBR_ZI_S
12838
500k
    8530048U, // SUBR_ZPmZ_B
12839
500k
    16914560U,  // SUBR_ZPmZ_D
12840
500k
    25832584U,  // SUBR_ZPmZ_H
12841
500k
    33697920U,  // SUBR_ZPmZ_S
12842
500k
    13400U, // SUBSWri
12843
500k
    14424U, // SUBSWrs
12844
500k
    15448U, // SUBSWrx
12845
500k
    13400U, // SUBSXri
12846
500k
    14424U, // SUBSXrs
12847
500k
    15448U, // SUBSXrx
12848
500k
    1313880U, // SUBSXrx64
12849
500k
    13400U, // SUBWri
12850
500k
    14424U, // SUBWrs
12851
500k
    15448U, // SUBWrx
12852
500k
    13400U, // SUBXri
12853
500k
    14424U, // SUBXrs
12854
500k
    15448U, // SUBXrx
12855
500k
    1313880U, // SUBXrx64
12856
500k
    16472U, // SUB_ZI_B
12857
500k
    17496U, // SUB_ZI_D
12858
500k
    176U, // SUB_ZI_H
12859
500k
    18520U, // SUB_ZI_S
12860
500k
    8530048U, // SUB_ZPmZ_B
12861
500k
    16914560U,  // SUB_ZPmZ_D
12862
500k
    25832584U,  // SUB_ZPmZ_H
12863
500k
    33697920U,  // SUB_ZPmZ_S
12864
500k
    10328U, // SUB_ZZZ_B
12865
500k
    6232U,  // SUB_ZZZ_D
12866
500k
    136U, // SUB_ZZZ_H
12867
500k
    12376U, // SUB_ZZZ_S
12868
500k
    794768U,  // SUBv16i8
12869
500k
    3160U,  // SUBv1i64
12870
500k
    925848U,  // SUBv2i32
12871
500k
    270440U,  // SUBv2i64
12872
500k
    1056928U, // SUBv4i16
12873
500k
    401520U,  // SUBv4i32
12874
500k
    532600U,  // SUBv8i16
12875
500k
    1188008U, // SUBv8i8
12876
500k
    38913U, // SUDOT_ZZZI
12877
500k
    5121168U, // SUDOTlanev16i8
12878
500k
    5121192U, // SUDOTlanev8i8
12879
500k
    0U, // SUMOPA_MPPZZ_D
12880
500k
    0U, // SUMOPA_MPPZZ_S
12881
500k
    0U, // SUMOPS_MPPZZ_D
12882
500k
    0U, // SUMOPS_MPPZZ_S
12883
500k
    32U,  // SUNPKHI_ZZ_D
12884
500k
    0U, // SUNPKHI_ZZ_H
12885
500k
    32U,  // SUNPKHI_ZZ_S
12886
500k
    32U,  // SUNPKLO_ZZ_D
12887
500k
    0U, // SUNPKLO_ZZ_H
12888
500k
    32U,  // SUNPKLO_ZZ_S
12889
500k
    8530048U, // SUQADD_ZPmZ_B
12890
500k
    16914560U,  // SUQADD_ZPmZ_D
12891
500k
    25832584U,  // SUQADD_ZPmZ_H
12892
500k
    33697920U,  // SUQADD_ZPmZ_S
12893
500k
    24U,  // SUQADDv16i8
12894
500k
    33U,  // SUQADDv1i16
12895
500k
    33U,  // SUQADDv1i32
12896
500k
    33U,  // SUQADDv1i64
12897
500k
    33U,  // SUQADDv1i8
12898
500k
    40U,  // SUQADDv2i32
12899
500k
    48U,  // SUQADDv2i64
12900
500k
    56U,  // SUQADDv4i16
12901
500k
    64U,  // SUQADDv4i32
12902
500k
    72U,  // SUQADDv8i16
12903
500k
    80U,  // SUQADDv8i8
12904
500k
    0U, // SVC
12905
500k
    2U, // SWPAB
12906
500k
    2U, // SWPAH
12907
500k
    2U, // SWPALB
12908
500k
    2U, // SWPALH
12909
500k
    2U, // SWPALW
12910
500k
    2U, // SWPALX
12911
500k
    2U, // SWPAW
12912
500k
    2U, // SWPAX
12913
500k
    2U, // SWPB
12914
500k
    2U, // SWPH
12915
500k
    2U, // SWPLB
12916
500k
    2U, // SWPLH
12917
500k
    2U, // SWPLW
12918
500k
    2U, // SWPLX
12919
500k
    2U, // SWPW
12920
500k
    2U, // SWPX
12921
500k
    8U, // SXTB_ZPmZ_D
12922
500k
    0U, // SXTB_ZPmZ_H
12923
500k
    16U,  // SXTB_ZPmZ_S
12924
500k
    8U, // SXTH_ZPmZ_D
12925
500k
    16U,  // SXTH_ZPmZ_S
12926
500k
    8U, // SXTW_ZPmZ_D
12927
500k
    93272U, // SYSLxt
12928
500k
    4U, // SYSxt
12929
500k
    594U, // TBL_ZZZZ_B
12930
500k
    4U, // TBL_ZZZZ_D
12931
500k
    0U, // TBL_ZZZZ_H
12932
500k
    4U, // TBL_ZZZZ_S
12933
500k
    594U, // TBL_ZZZ_B
12934
500k
    4U, // TBL_ZZZ_D
12935
500k
    0U, // TBL_ZZZ_H
12936
500k
    4U, // TBL_ZZZ_S
12937
500k
    28U,  // TBLv16i8Four
12938
500k
    28U,  // TBLv16i8One
12939
500k
    28U,  // TBLv16i8Three
12940
500k
    28U,  // TBLv16i8Two
12941
500k
    84U,  // TBLv8i8Four
12942
500k
    84U,  // TBLv8i8One
12943
500k
    84U,  // TBLv8i8Three
12944
500k
    84U,  // TBLv8i8Two
12945
500k
    94296U, // TBNZW
12946
500k
    94296U, // TBNZX
12947
500k
    1U, // TBX_ZZZ_B
12948
500k
    1112U,  // TBX_ZZZ_D
12949
500k
    280U, // TBX_ZZZ_H
12950
500k
    2136U,  // TBX_ZZZ_S
12951
500k
    28U,  // TBXv16i8Four
12952
500k
    28U,  // TBXv16i8One
12953
500k
    28U,  // TBXv16i8Three
12954
500k
    28U,  // TBXv16i8Two
12955
500k
    84U,  // TBXv8i8Four
12956
500k
    84U,  // TBXv8i8One
12957
500k
    84U,  // TBXv8i8Three
12958
500k
    84U,  // TBXv8i8Two
12959
500k
    94296U, // TBZW
12960
500k
    94296U, // TBZX
12961
500k
    0U, // TCANCEL
12962
500k
    0U, // TCOMMIT
12963
500k
    10328U, // TRN1_PPP_B
12964
500k
    6232U,  // TRN1_PPP_D
12965
500k
    136U, // TRN1_PPP_H
12966
500k
    12376U, // TRN1_PPP_S
12967
500k
    10328U, // TRN1_ZZZ_B
12968
500k
    6232U,  // TRN1_ZZZ_D
12969
500k
    136U, // TRN1_ZZZ_H
12970
500k
    880U, // TRN1_ZZZ_Q
12971
500k
    12376U, // TRN1_ZZZ_S
12972
500k
    794768U,  // TRN1v16i8
12973
500k
    925848U,  // TRN1v2i32
12974
500k
    270440U,  // TRN1v2i64
12975
500k
    1056928U, // TRN1v4i16
12976
500k
    401520U,  // TRN1v4i32
12977
500k
    532600U,  // TRN1v8i16
12978
500k
    1188008U, // TRN1v8i8
12979
500k
    10328U, // TRN2_PPP_B
12980
500k
    6232U,  // TRN2_PPP_D
12981
500k
    136U, // TRN2_PPP_H
12982
500k
    12376U, // TRN2_PPP_S
12983
500k
    10328U, // TRN2_ZZZ_B
12984
500k
    6232U,  // TRN2_ZZZ_D
12985
500k
    136U, // TRN2_ZZZ_H
12986
500k
    880U, // TRN2_ZZZ_Q
12987
500k
    12376U, // TRN2_ZZZ_S
12988
500k
    794768U,  // TRN2v16i8
12989
500k
    925848U,  // TRN2v2i32
12990
500k
    270440U,  // TRN2v2i64
12991
500k
    1056928U, // TRN2v4i16
12992
500k
    401520U,  // TRN2v4i32
12993
500k
    532600U,  // TRN2v8i16
12994
500k
    1188008U, // TRN2v8i8
12995
500k
    0U, // TSB
12996
500k
    0U, // TSTART
12997
500k
    0U, // TTEST
12998
500k
    2136U,  // UABALB_ZZZ_D
12999
500k
    0U, // UABALB_ZZZ_H
13000
500k
    7256U,  // UABALB_ZZZ_S
13001
500k
    2136U,  // UABALT_ZZZ_D
13002
500k
    0U, // UABALT_ZZZ_H
13003
500k
    7256U,  // UABALT_ZZZ_S
13004
500k
    795792U,  // UABALv16i8_v8i16
13005
500k
    926872U,  // UABALv2i32_v2i64
13006
500k
    1057952U, // UABALv4i16_v4i32
13007
500k
    402544U,  // UABALv4i32_v2i64
13008
500k
    533624U,  // UABALv8i16_v4i32
13009
500k
    1189032U, // UABALv8i8_v8i16
13010
500k
    1U, // UABA_ZZZ_B
13011
500k
    1112U,  // UABA_ZZZ_D
13012
500k
    280U, // UABA_ZZZ_H
13013
500k
    2136U,  // UABA_ZZZ_S
13014
500k
    795792U,  // UABAv16i8
13015
500k
    926872U,  // UABAv2i32
13016
500k
    1057952U, // UABAv4i16
13017
500k
    402544U,  // UABAv4i32
13018
500k
    533624U,  // UABAv8i16
13019
500k
    1189032U, // UABAv8i8
13020
500k
    12376U, // UABDLB_ZZZ_D
13021
500k
    592U, // UABDLB_ZZZ_H
13022
500k
    5208U,  // UABDLB_ZZZ_S
13023
500k
    12376U, // UABDLT_ZZZ_D
13024
500k
    592U, // UABDLT_ZZZ_H
13025
500k
    5208U,  // UABDLT_ZZZ_S
13026
500k
    794768U,  // UABDLv16i8_v8i16
13027
500k
    925848U,  // UABDLv2i32_v2i64
13028
500k
    1056928U, // UABDLv4i16_v4i32
13029
500k
    401520U,  // UABDLv4i32_v2i64
13030
500k
    532600U,  // UABDLv8i16_v4i32
13031
500k
    1188008U, // UABDLv8i8_v8i16
13032
500k
    8530048U, // UABD_ZPmZ_B
13033
500k
    16914560U,  // UABD_ZPmZ_D
13034
500k
    25832584U,  // UABD_ZPmZ_H
13035
500k
    33697920U,  // UABD_ZPmZ_S
13036
500k
    794768U,  // UABDv16i8
13037
500k
    925848U,  // UABDv2i32
13038
500k
    1056928U, // UABDv4i16
13039
500k
    401520U,  // UABDv4i32
13040
500k
    532600U,  // UABDv8i16
13041
500k
    1188008U, // UABDv8i8
13042
500k
    2176U,  // UADALP_ZPmZ_D
13043
500k
    0U, // UADALP_ZPmZ_H
13044
500k
    7296U,  // UADALP_ZPmZ_S
13045
500k
    24U,  // UADALPv16i8_v8i16
13046
500k
    40U,  // UADALPv2i32_v1i64
13047
500k
    56U,  // UADALPv4i16_v2i32
13048
500k
    64U,  // UADALPv4i32_v2i64
13049
500k
    72U,  // UADALPv8i16_v4i32
13050
500k
    80U,  // UADALPv8i8_v4i16
13051
500k
    12376U, // UADDLB_ZZZ_D
13052
500k
    592U, // UADDLB_ZZZ_H
13053
500k
    5208U,  // UADDLB_ZZZ_S
13054
500k
    24U,  // UADDLPv16i8_v8i16
13055
500k
    40U,  // UADDLPv2i32_v1i64
13056
500k
    56U,  // UADDLPv4i16_v2i32
13057
500k
    64U,  // UADDLPv4i32_v2i64
13058
500k
    72U,  // UADDLPv8i16_v4i32
13059
500k
    80U,  // UADDLPv8i8_v4i16
13060
500k
    12376U, // UADDLT_ZZZ_D
13061
500k
    592U, // UADDLT_ZZZ_H
13062
500k
    5208U,  // UADDLT_ZZZ_S
13063
500k
    24U,  // UADDLVv16i8v
13064
500k
    56U,  // UADDLVv4i16v
13065
500k
    64U,  // UADDLVv4i32v
13066
500k
    72U,  // UADDLVv8i16v
13067
500k
    80U,  // UADDLVv8i8v
13068
500k
    794768U,  // UADDLv16i8_v8i16
13069
500k
    925848U,  // UADDLv2i32_v2i64
13070
500k
    1056928U, // UADDLv4i16_v4i32
13071
500k
    401520U,  // UADDLv4i32_v2i64
13072
500k
    532600U,  // UADDLv8i16_v4i32
13073
500k
    1188008U, // UADDLv8i8_v8i16
13074
500k
    0U, // UADDV_VPZ_B
13075
500k
    0U, // UADDV_VPZ_D
13076
500k
    0U, // UADDV_VPZ_H
13077
500k
    0U, // UADDV_VPZ_S
13078
500k
    12376U, // UADDWB_ZZZ_D
13079
500k
    592U, // UADDWB_ZZZ_H
13080
500k
    5208U,  // UADDWB_ZZZ_S
13081
500k
    12376U, // UADDWT_ZZZ_D
13082
500k
    592U, // UADDWT_ZZZ_H
13083
500k
    5208U,  // UADDWT_ZZZ_S
13084
500k
    794744U,  // UADDWv16i8_v8i16
13085
500k
    925800U,  // UADDWv2i32_v2i64
13086
500k
    1056880U, // UADDWv4i16_v4i32
13087
500k
    401512U,  // UADDWv4i32_v2i64
13088
500k
    532592U,  // UADDWv8i16_v4i32
13089
500k
    1187960U, // UADDWv8i8_v8i16
13090
500k
    134232U,  // UBFMWri
13091
500k
    134232U,  // UBFMXri
13092
500k
    10328U, // UCLAMP_ZZZ_B
13093
500k
    6232U,  // UCLAMP_ZZZ_D
13094
500k
    136U, // UCLAMP_ZZZ_H
13095
500k
    12376U, // UCLAMP_ZZZ_S
13096
500k
    3160U,  // UCVTFSWDri
13097
500k
    3160U,  // UCVTFSWHri
13098
500k
    3160U,  // UCVTFSWSri
13099
500k
    3160U,  // UCVTFSXDri
13100
500k
    3160U,  // UCVTFSXHri
13101
500k
    3160U,  // UCVTFSXSri
13102
500k
    32U,  // UCVTFUWDri
13103
500k
    32U,  // UCVTFUWHri
13104
500k
    32U,  // UCVTFUWSri
13105
500k
    32U,  // UCVTFUXDri
13106
500k
    32U,  // UCVTFUXHri
13107
500k
    32U,  // UCVTFUXSri
13108
500k
    8U, // UCVTF_ZPmZ_DtoD
13109
500k
    2U, // UCVTF_ZPmZ_DtoH
13110
500k
    8U, // UCVTF_ZPmZ_DtoS
13111
500k
    0U, // UCVTF_ZPmZ_HtoH
13112
500k
    16U,  // UCVTF_ZPmZ_StoD
13113
500k
    1U, // UCVTF_ZPmZ_StoH
13114
500k
    16U,  // UCVTF_ZPmZ_StoS
13115
500k
    3160U,  // UCVTFd
13116
500k
    3160U,  // UCVTFh
13117
500k
    3160U,  // UCVTFs
13118
500k
    32U,  // UCVTFv1i16
13119
500k
    32U,  // UCVTFv1i32
13120
500k
    32U,  // UCVTFv1i64
13121
500k
    40U,  // UCVTFv2f32
13122
500k
    48U,  // UCVTFv2f64
13123
500k
    3224U,  // UCVTFv2i32_shift
13124
500k
    3176U,  // UCVTFv2i64_shift
13125
500k
    56U,  // UCVTFv4f16
13126
500k
    64U,  // UCVTFv4f32
13127
500k
    3232U,  // UCVTFv4i16_shift
13128
500k
    3184U,  // UCVTFv4i32_shift
13129
500k
    72U,  // UCVTFv8f16
13130
500k
    3192U,  // UCVTFv8i16_shift
13131
500k
    0U, // UDF
13132
500k
    16914560U,  // UDIVR_ZPmZ_D
13133
500k
    33697920U,  // UDIVR_ZPmZ_S
13134
500k
    3160U,  // UDIVWr
13135
500k
    3160U,  // UDIVXr
13136
500k
    16914560U,  // UDIV_ZPmZ_D
13137
500k
    33697920U,  // UDIV_ZPmZ_S
13138
500k
    27139160U,  // UDOT_ZZZI_D
13139
500k
    38913U, // UDOT_ZZZI_S
13140
500k
    7256U,  // UDOT_ZZZ_D
13141
500k
    1U, // UDOT_ZZZ_S
13142
500k
    5121168U, // UDOTlanev16i8
13143
500k
    5121192U, // UDOTlanev8i8
13144
500k
    795792U,  // UDOTv16i8
13145
500k
    1189032U, // UDOTv8i8
13146
500k
    8530048U, // UHADD_ZPmZ_B
13147
500k
    16914560U,  // UHADD_ZPmZ_D
13148
500k
    25832584U,  // UHADD_ZPmZ_H
13149
500k
    33697920U,  // UHADD_ZPmZ_S
13150
500k
    794768U,  // UHADDv16i8
13151
500k
    925848U,  // UHADDv2i32
13152
500k
    1056928U, // UHADDv4i16
13153
500k
    401520U,  // UHADDv4i32
13154
500k
    532600U,  // UHADDv8i16
13155
500k
    1188008U, // UHADDv8i8
13156
500k
    8530048U, // UHSUBR_ZPmZ_B
13157
500k
    16914560U,  // UHSUBR_ZPmZ_D
13158
500k
    25832584U,  // UHSUBR_ZPmZ_H
13159
500k
    33697920U,  // UHSUBR_ZPmZ_S
13160
500k
    8530048U, // UHSUB_ZPmZ_B
13161
500k
    16914560U,  // UHSUB_ZPmZ_D
13162
500k
    25832584U,  // UHSUB_ZPmZ_H
13163
500k
    33697920U,  // UHSUB_ZPmZ_S
13164
500k
    794768U,  // UHSUBv16i8
13165
500k
    925848U,  // UHSUBv2i32
13166
500k
    1056928U, // UHSUBv4i16
13167
500k
    401520U,  // UHSUBv4i32
13168
500k
    532600U,  // UHSUBv8i16
13169
500k
    1188008U, // UHSUBv8i8
13170
500k
    134232U,  // UMADDLrrr
13171
500k
    8530048U, // UMAXP_ZPmZ_B
13172
500k
    16914560U,  // UMAXP_ZPmZ_D
13173
500k
    25832584U,  // UMAXP_ZPmZ_H
13174
500k
    33697920U,  // UMAXP_ZPmZ_S
13175
500k
    794768U,  // UMAXPv16i8
13176
500k
    925848U,  // UMAXPv2i32
13177
500k
    1056928U, // UMAXPv4i16
13178
500k
    401520U,  // UMAXPv4i32
13179
500k
    532600U,  // UMAXPv8i16
13180
500k
    1188008U, // UMAXPv8i8
13181
500k
    0U, // UMAXV_VPZ_B
13182
500k
    0U, // UMAXV_VPZ_D
13183
500k
    0U, // UMAXV_VPZ_H
13184
500k
    0U, // UMAXV_VPZ_S
13185
500k
    24U,  // UMAXVv16i8v
13186
500k
    56U,  // UMAXVv4i16v
13187
500k
    64U,  // UMAXVv4i32v
13188
500k
    72U,  // UMAXVv8i16v
13189
500k
    80U,  // UMAXVv8i8v
13190
500k
    95320U, // UMAX_ZI_B
13191
500k
    95320U, // UMAX_ZI_D
13192
500k
    392U, // UMAX_ZI_H
13193
500k
    95320U, // UMAX_ZI_S
13194
500k
    8530048U, // UMAX_ZPmZ_B
13195
500k
    16914560U,  // UMAX_ZPmZ_D
13196
500k
    25832584U,  // UMAX_ZPmZ_H
13197
500k
    33697920U,  // UMAX_ZPmZ_S
13198
500k
    794768U,  // UMAXv16i8
13199
500k
    925848U,  // UMAXv2i32
13200
500k
    1056928U, // UMAXv4i16
13201
500k
    401520U,  // UMAXv4i32
13202
500k
    532600U,  // UMAXv8i16
13203
500k
    1188008U, // UMAXv8i8
13204
500k
    8530048U, // UMINP_ZPmZ_B
13205
500k
    16914560U,  // UMINP_ZPmZ_D
13206
500k
    25832584U,  // UMINP_ZPmZ_H
13207
500k
    33697920U,  // UMINP_ZPmZ_S
13208
500k
    794768U,  // UMINPv16i8
13209
500k
    925848U,  // UMINPv2i32
13210
500k
    1056928U, // UMINPv4i16
13211
500k
    401520U,  // UMINPv4i32
13212
500k
    532600U,  // UMINPv8i16
13213
500k
    1188008U, // UMINPv8i8
13214
500k
    0U, // UMINV_VPZ_B
13215
500k
    0U, // UMINV_VPZ_D
13216
500k
    0U, // UMINV_VPZ_H
13217
500k
    0U, // UMINV_VPZ_S
13218
500k
    24U,  // UMINVv16i8v
13219
500k
    56U,  // UMINVv4i16v
13220
500k
    64U,  // UMINVv4i32v
13221
500k
    72U,  // UMINVv8i16v
13222
500k
    80U,  // UMINVv8i8v
13223
500k
    95320U, // UMIN_ZI_B
13224
500k
    95320U, // UMIN_ZI_D
13225
500k
    392U, // UMIN_ZI_H
13226
500k
    95320U, // UMIN_ZI_S
13227
500k
    8530048U, // UMIN_ZPmZ_B
13228
500k
    16914560U,  // UMIN_ZPmZ_D
13229
500k
    25832584U,  // UMIN_ZPmZ_H
13230
500k
    33697920U,  // UMIN_ZPmZ_S
13231
500k
    794768U,  // UMINv16i8
13232
500k
    925848U,  // UMINv2i32
13233
500k
    1056928U, // UMINv4i16
13234
500k
    401520U,  // UMINv4i32
13235
500k
    532600U,  // UMINv8i16
13236
500k
    1188008U, // UMINv8i8
13237
500k
    27134040U,  // UMLALB_ZZZI_D
13238
500k
    27139160U,  // UMLALB_ZZZI_S
13239
500k
    2136U,  // UMLALB_ZZZ_D
13240
500k
    0U, // UMLALB_ZZZ_H
13241
500k
    7256U,  // UMLALB_ZZZ_S
13242
500k
    27134040U,  // UMLALT_ZZZI_D
13243
500k
    27139160U,  // UMLALT_ZZZI_S
13244
500k
    2136U,  // UMLALT_ZZZ_D
13245
500k
    0U, // UMLALT_ZZZ_H
13246
500k
    7256U,  // UMLALT_ZZZ_S
13247
500k
    795792U,  // UMLALv16i8_v8i16
13248
500k
    54273176U,  // UMLALv2i32_indexed
13249
500k
    926872U,  // UMLALv2i32_v2i64
13250
500k
    52438176U,  // UMLALv4i16_indexed
13251
500k
    1057952U, // UMLALv4i16_v4i32
13252
500k
    54273136U,  // UMLALv4i32_indexed
13253
500k
    402544U,  // UMLALv4i32_v2i64
13254
500k
    52438136U,  // UMLALv8i16_indexed
13255
500k
    533624U,  // UMLALv8i16_v4i32
13256
500k
    1189032U, // UMLALv8i8_v8i16
13257
500k
    27134040U,  // UMLSLB_ZZZI_D
13258
500k
    27139160U,  // UMLSLB_ZZZI_S
13259
500k
    2136U,  // UMLSLB_ZZZ_D
13260
500k
    0U, // UMLSLB_ZZZ_H
13261
500k
    7256U,  // UMLSLB_ZZZ_S
13262
500k
    27134040U,  // UMLSLT_ZZZI_D
13263
500k
    27139160U,  // UMLSLT_ZZZI_S
13264
500k
    2136U,  // UMLSLT_ZZZ_D
13265
500k
    0U, // UMLSLT_ZZZ_H
13266
500k
    7256U,  // UMLSLT_ZZZ_S
13267
500k
    795792U,  // UMLSLv16i8_v8i16
13268
500k
    54273176U,  // UMLSLv2i32_indexed
13269
500k
    926872U,  // UMLSLv2i32_v2i64
13270
500k
    52438176U,  // UMLSLv4i16_indexed
13271
500k
    1057952U, // UMLSLv4i16_v4i32
13272
500k
    54273136U,  // UMLSLv4i32_indexed
13273
500k
    402544U,  // UMLSLv4i32_v2i64
13274
500k
    52438136U,  // UMLSLv8i16_indexed
13275
500k
    533624U,  // UMLSLv8i16_v4i32
13276
500k
    1189032U, // UMLSLv8i8_v8i16
13277
500k
    795792U,  // UMMLA
13278
500k
    1U, // UMMLA_ZZZ
13279
500k
    0U, // UMOPA_MPPZZ_D
13280
500k
    0U, // UMOPA_MPPZZ_S
13281
500k
    0U, // UMOPS_MPPZZ_D
13282
500k
    0U, // UMOPS_MPPZZ_S
13283
500k
    43352U, // UMOVvi16
13284
500k
    43352U, // UMOVvi16_idx0
13285
500k
    43360U, // UMOVvi32
13286
500k
    43360U, // UMOVvi32_idx0
13287
500k
    43368U, // UMOVvi64
13288
500k
    43368U, // UMOVvi64_idx0
13289
500k
    43376U, // UMOVvi8
13290
500k
    43376U, // UMOVvi8_idx0
13291
500k
    134232U,  // UMSUBLrrr
13292
500k
    8530048U, // UMULH_ZPmZ_B
13293
500k
    16914560U,  // UMULH_ZPmZ_D
13294
500k
    25832584U,  // UMULH_ZPmZ_H
13295
500k
    33697920U,  // UMULH_ZPmZ_S
13296
500k
    10328U, // UMULH_ZZZ_B
13297
500k
    6232U,  // UMULH_ZZZ_D
13298
500k
    136U, // UMULH_ZZZ_H
13299
500k
    12376U, // UMULH_ZZZ_S
13300
500k
    3160U,  // UMULHrr
13301
500k
    4468824U, // UMULLB_ZZZI_D
13302
500k
    4461656U, // UMULLB_ZZZI_S
13303
500k
    12376U, // UMULLB_ZZZ_D
13304
500k
    592U, // UMULLB_ZZZ_H
13305
500k
    5208U,  // UMULLB_ZZZ_S
13306
500k
    4468824U, // UMULLT_ZZZI_D
13307
500k
    4461656U, // UMULLT_ZZZI_S
13308
500k
    12376U, // UMULLT_ZZZ_D
13309
500k
    592U, // UMULLT_ZZZ_H
13310
500k
    5208U,  // UMULLT_ZZZ_S
13311
500k
    794768U,  // UMULLv16i8_v8i16
13312
500k
    163324056U, // UMULLv2i32_indexed
13313
500k
    925848U,  // UMULLv2i32_v2i64
13314
500k
    161489056U, // UMULLv4i16_indexed
13315
500k
    1056928U, // UMULLv4i16_v4i32
13316
500k
    163324016U, // UMULLv4i32_indexed
13317
500k
    401520U,  // UMULLv4i32_v2i64
13318
500k
    161489016U, // UMULLv8i16_indexed
13319
500k
    532600U,  // UMULLv8i16_v4i32
13320
500k
    1188008U, // UMULLv8i8_v8i16
13321
500k
    16472U, // UQADD_ZI_B
13322
500k
    17496U, // UQADD_ZI_D
13323
500k
    176U, // UQADD_ZI_H
13324
500k
    18520U, // UQADD_ZI_S
13325
500k
    8530048U, // UQADD_ZPmZ_B
13326
500k
    16914560U,  // UQADD_ZPmZ_D
13327
500k
    25832584U,  // UQADD_ZPmZ_H
13328
500k
    33697920U,  // UQADD_ZPmZ_S
13329
500k
    10328U, // UQADD_ZZZ_B
13330
500k
    6232U,  // UQADD_ZZZ_D
13331
500k
    136U, // UQADD_ZZZ_H
13332
500k
    12376U, // UQADD_ZZZ_S
13333
500k
    794768U,  // UQADDv16i8
13334
500k
    3160U,  // UQADDv1i16
13335
500k
    3160U,  // UQADDv1i32
13336
500k
    3160U,  // UQADDv1i64
13337
500k
    3160U,  // UQADDv1i8
13338
500k
    925848U,  // UQADDv2i32
13339
500k
    270440U,  // UQADDv2i64
13340
500k
    1056928U, // UQADDv4i16
13341
500k
    401520U,  // UQADDv4i32
13342
500k
    532600U,  // UQADDv8i16
13343
500k
    1188008U, // UQADDv8i8
13344
500k
    1U, // UQDECB_WPiI
13345
500k
    1U, // UQDECB_XPiI
13346
500k
    1U, // UQDECD_WPiI
13347
500k
    1U, // UQDECD_XPiI
13348
500k
    1U, // UQDECD_ZPiI
13349
500k
    1U, // UQDECH_WPiI
13350
500k
    1U, // UQDECH_XPiI
13351
500k
    0U, // UQDECH_ZPiI
13352
500k
    32U,  // UQDECP_WP_B
13353
500k
    32U,  // UQDECP_WP_D
13354
500k
    32U,  // UQDECP_WP_H
13355
500k
    32U,  // UQDECP_WP_S
13356
500k
    32U,  // UQDECP_XP_B
13357
500k
    32U,  // UQDECP_XP_D
13358
500k
    32U,  // UQDECP_XP_H
13359
500k
    32U,  // UQDECP_XP_S
13360
500k
    32U,  // UQDECP_ZP_D
13361
500k
    0U, // UQDECP_ZP_H
13362
500k
    32U,  // UQDECP_ZP_S
13363
500k
    1U, // UQDECW_WPiI
13364
500k
    1U, // UQDECW_XPiI
13365
500k
    1U, // UQDECW_ZPiI
13366
500k
    1U, // UQINCB_WPiI
13367
500k
    1U, // UQINCB_XPiI
13368
500k
    1U, // UQINCD_WPiI
13369
500k
    1U, // UQINCD_XPiI
13370
500k
    1U, // UQINCD_ZPiI
13371
500k
    1U, // UQINCH_WPiI
13372
500k
    1U, // UQINCH_XPiI
13373
500k
    0U, // UQINCH_ZPiI
13374
500k
    32U,  // UQINCP_WP_B
13375
500k
    32U,  // UQINCP_WP_D
13376
500k
    32U,  // UQINCP_WP_H
13377
500k
    32U,  // UQINCP_WP_S
13378
500k
    32U,  // UQINCP_XP_B
13379
500k
    32U,  // UQINCP_XP_D
13380
500k
    32U,  // UQINCP_XP_H
13381
500k
    32U,  // UQINCP_XP_S
13382
500k
    32U,  // UQINCP_ZP_D
13383
500k
    0U, // UQINCP_ZP_H
13384
500k
    32U,  // UQINCP_ZP_S
13385
500k
    1U, // UQINCW_WPiI
13386
500k
    1U, // UQINCW_XPiI
13387
500k
    1U, // UQINCW_ZPiI
13388
500k
    8530048U, // UQRSHLR_ZPmZ_B
13389
500k
    16914560U,  // UQRSHLR_ZPmZ_D
13390
500k
    25832584U,  // UQRSHLR_ZPmZ_H
13391
500k
    33697920U,  // UQRSHLR_ZPmZ_S
13392
500k
    8530048U, // UQRSHL_ZPmZ_B
13393
500k
    16914560U,  // UQRSHL_ZPmZ_D
13394
500k
    25832584U,  // UQRSHL_ZPmZ_H
13395
500k
    33697920U,  // UQRSHL_ZPmZ_S
13396
500k
    794768U,  // UQRSHLv16i8
13397
500k
    3160U,  // UQRSHLv1i16
13398
500k
    3160U,  // UQRSHLv1i32
13399
500k
    3160U,  // UQRSHLv1i64
13400
500k
    3160U,  // UQRSHLv1i8
13401
500k
    925848U,  // UQRSHLv2i32
13402
500k
    270440U,  // UQRSHLv2i64
13403
500k
    1056928U, // UQRSHLv4i16
13404
500k
    401520U,  // UQRSHLv4i32
13405
500k
    532600U,  // UQRSHLv8i16
13406
500k
    1188008U, // UQRSHLv8i8
13407
500k
    3160U,  // UQRSHRNB_ZZI_B
13408
500k
    200U, // UQRSHRNB_ZZI_H
13409
500k
    3160U,  // UQRSHRNB_ZZI_S
13410
500k
    37976U, // UQRSHRNT_ZZI_B
13411
500k
    320U, // UQRSHRNT_ZZI_H
13412
500k
    37976U, // UQRSHRNT_ZZI_S
13413
500k
    3160U,  // UQRSHRNb
13414
500k
    3160U,  // UQRSHRNh
13415
500k
    3160U,  // UQRSHRNs
13416
500k
    38008U, // UQRSHRNv16i8_shift
13417
500k
    3176U,  // UQRSHRNv2i32_shift
13418
500k
    3184U,  // UQRSHRNv4i16_shift
13419
500k
    37992U, // UQRSHRNv4i32_shift
13420
500k
    38000U, // UQRSHRNv8i16_shift
13421
500k
    3192U,  // UQRSHRNv8i8_shift
13422
500k
    8530048U, // UQSHLR_ZPmZ_B
13423
500k
    16914560U,  // UQSHLR_ZPmZ_D
13424
500k
    25832584U,  // UQSHLR_ZPmZ_H
13425
500k
    33697920U,  // UQSHLR_ZPmZ_S
13426
500k
    141440U,  // UQSHL_ZPmI_B
13427
500k
    137344U,  // UQSHL_ZPmI_D
13428
500k
    1453192U, // UQSHL_ZPmI_H
13429
500k
    143488U,  // UQSHL_ZPmI_S
13430
500k
    8530048U, // UQSHL_ZPmZ_B
13431
500k
    16914560U,  // UQSHL_ZPmZ_D
13432
500k
    25832584U,  // UQSHL_ZPmZ_H
13433
500k
    33697920U,  // UQSHL_ZPmZ_S
13434
500k
    3160U,  // UQSHLb
13435
500k
    3160U,  // UQSHLd
13436
500k
    3160U,  // UQSHLh
13437
500k
    3160U,  // UQSHLs
13438
500k
    794768U,  // UQSHLv16i8
13439
500k
    3216U,  // UQSHLv16i8_shift
13440
500k
    3160U,  // UQSHLv1i16
13441
500k
    3160U,  // UQSHLv1i32
13442
500k
    3160U,  // UQSHLv1i64
13443
500k
    3160U,  // UQSHLv1i8
13444
500k
    925848U,  // UQSHLv2i32
13445
500k
    3224U,  // UQSHLv2i32_shift
13446
500k
    270440U,  // UQSHLv2i64
13447
500k
    3176U,  // UQSHLv2i64_shift
13448
500k
    1056928U, // UQSHLv4i16
13449
500k
    3232U,  // UQSHLv4i16_shift
13450
500k
    401520U,  // UQSHLv4i32
13451
500k
    3184U,  // UQSHLv4i32_shift
13452
500k
    532600U,  // UQSHLv8i16
13453
500k
    3192U,  // UQSHLv8i16_shift
13454
500k
    1188008U, // UQSHLv8i8
13455
500k
    3240U,  // UQSHLv8i8_shift
13456
500k
    3160U,  // UQSHRNB_ZZI_B
13457
500k
    200U, // UQSHRNB_ZZI_H
13458
500k
    3160U,  // UQSHRNB_ZZI_S
13459
500k
    37976U, // UQSHRNT_ZZI_B
13460
500k
    320U, // UQSHRNT_ZZI_H
13461
500k
    37976U, // UQSHRNT_ZZI_S
13462
500k
    3160U,  // UQSHRNb
13463
500k
    3160U,  // UQSHRNh
13464
500k
    3160U,  // UQSHRNs
13465
500k
    38008U, // UQSHRNv16i8_shift
13466
500k
    3176U,  // UQSHRNv2i32_shift
13467
500k
    3184U,  // UQSHRNv4i16_shift
13468
500k
    37992U, // UQSHRNv4i32_shift
13469
500k
    38000U, // UQSHRNv8i16_shift
13470
500k
    3192U,  // UQSHRNv8i8_shift
13471
500k
    8530048U, // UQSUBR_ZPmZ_B
13472
500k
    16914560U,  // UQSUBR_ZPmZ_D
13473
500k
    25832584U,  // UQSUBR_ZPmZ_H
13474
500k
    33697920U,  // UQSUBR_ZPmZ_S
13475
500k
    16472U, // UQSUB_ZI_B
13476
500k
    17496U, // UQSUB_ZI_D
13477
500k
    176U, // UQSUB_ZI_H
13478
500k
    18520U, // UQSUB_ZI_S
13479
500k
    8530048U, // UQSUB_ZPmZ_B
13480
500k
    16914560U,  // UQSUB_ZPmZ_D
13481
500k
    25832584U,  // UQSUB_ZPmZ_H
13482
500k
    33697920U,  // UQSUB_ZPmZ_S
13483
500k
    10328U, // UQSUB_ZZZ_B
13484
500k
    6232U,  // UQSUB_ZZZ_D
13485
500k
    136U, // UQSUB_ZZZ_H
13486
500k
    12376U, // UQSUB_ZZZ_S
13487
500k
    794768U,  // UQSUBv16i8
13488
500k
    3160U,  // UQSUBv1i16
13489
500k
    3160U,  // UQSUBv1i32
13490
500k
    3160U,  // UQSUBv1i64
13491
500k
    3160U,  // UQSUBv1i8
13492
500k
    925848U,  // UQSUBv2i32
13493
500k
    270440U,  // UQSUBv2i64
13494
500k
    1056928U, // UQSUBv4i16
13495
500k
    401520U,  // UQSUBv4i32
13496
500k
    532600U,  // UQSUBv8i16
13497
500k
    1188008U, // UQSUBv8i8
13498
500k
    32U,  // UQXTNB_ZZ_B
13499
500k
    0U, // UQXTNB_ZZ_H
13500
500k
    32U,  // UQXTNB_ZZ_S
13501
500k
    32U,  // UQXTNT_ZZ_B
13502
500k
    0U, // UQXTNT_ZZ_H
13503
500k
    32U,  // UQXTNT_ZZ_S
13504
500k
    72U,  // UQXTNv16i8
13505
500k
    32U,  // UQXTNv1i16
13506
500k
    32U,  // UQXTNv1i32
13507
500k
    32U,  // UQXTNv1i8
13508
500k
    48U,  // UQXTNv2i32
13509
500k
    64U,  // UQXTNv4i16
13510
500k
    48U,  // UQXTNv4i32
13511
500k
    64U,  // UQXTNv8i16
13512
500k
    72U,  // UQXTNv8i8
13513
500k
    16U,  // URECPE_ZPmZ_S
13514
500k
    40U,  // URECPEv2i32
13515
500k
    64U,  // URECPEv4i32
13516
500k
    8530048U, // URHADD_ZPmZ_B
13517
500k
    16914560U,  // URHADD_ZPmZ_D
13518
500k
    25832584U,  // URHADD_ZPmZ_H
13519
500k
    33697920U,  // URHADD_ZPmZ_S
13520
500k
    794768U,  // URHADDv16i8
13521
500k
    925848U,  // URHADDv2i32
13522
500k
    1056928U, // URHADDv4i16
13523
500k
    401520U,  // URHADDv4i32
13524
500k
    532600U,  // URHADDv8i16
13525
500k
    1188008U, // URHADDv8i8
13526
500k
    8530048U, // URSHLR_ZPmZ_B
13527
500k
    16914560U,  // URSHLR_ZPmZ_D
13528
500k
    25832584U,  // URSHLR_ZPmZ_H
13529
500k
    33697920U,  // URSHLR_ZPmZ_S
13530
500k
    8530048U, // URSHL_ZPmZ_B
13531
500k
    16914560U,  // URSHL_ZPmZ_D
13532
500k
    25832584U,  // URSHL_ZPmZ_H
13533
500k
    33697920U,  // URSHL_ZPmZ_S
13534
500k
    794768U,  // URSHLv16i8
13535
500k
    3160U,  // URSHLv1i64
13536
500k
    925848U,  // URSHLv2i32
13537
500k
    270440U,  // URSHLv2i64
13538
500k
    1056928U, // URSHLv4i16
13539
500k
    401520U,  // URSHLv4i32
13540
500k
    532600U,  // URSHLv8i16
13541
500k
    1188008U, // URSHLv8i8
13542
500k
    141440U,  // URSHR_ZPmI_B
13543
500k
    137344U,  // URSHR_ZPmI_D
13544
500k
    1453192U, // URSHR_ZPmI_H
13545
500k
    143488U,  // URSHR_ZPmI_S
13546
500k
    3160U,  // URSHRd
13547
500k
    3216U,  // URSHRv16i8_shift
13548
500k
    3224U,  // URSHRv2i32_shift
13549
500k
    3176U,  // URSHRv2i64_shift
13550
500k
    3232U,  // URSHRv4i16_shift
13551
500k
    3184U,  // URSHRv4i32_shift
13552
500k
    3192U,  // URSHRv8i16_shift
13553
500k
    3240U,  // URSHRv8i8_shift
13554
500k
    16U,  // URSQRTE_ZPmZ_S
13555
500k
    40U,  // URSQRTEv2i32
13556
500k
    64U,  // URSQRTEv4i32
13557
500k
    321U, // URSRA_ZZI_B
13558
500k
    37976U, // URSRA_ZZI_D
13559
500k
    320U, // URSRA_ZZI_H
13560
500k
    37976U, // URSRA_ZZI_S
13561
500k
    37977U, // URSRAd
13562
500k
    38032U, // URSRAv16i8_shift
13563
500k
    38040U, // URSRAv2i32_shift
13564
500k
    37992U, // URSRAv2i64_shift
13565
500k
    38048U, // URSRAv4i16_shift
13566
500k
    38000U, // URSRAv4i32_shift
13567
500k
    38008U, // URSRAv8i16_shift
13568
500k
    38056U, // URSRAv8i8_shift
13569
500k
    1U, // USDOT_ZZZ
13570
500k
    38913U, // USDOT_ZZZI
13571
500k
    5121168U, // USDOTlanev16i8
13572
500k
    5121192U, // USDOTlanev8i8
13573
500k
    795792U,  // USDOTv16i8
13574
500k
    1189032U, // USDOTv8i8
13575
500k
    3160U,  // USHLLB_ZZI_D
13576
500k
    200U, // USHLLB_ZZI_H
13577
500k
    3160U,  // USHLLB_ZZI_S
13578
500k
    3160U,  // USHLLT_ZZI_D
13579
500k
    200U, // USHLLT_ZZI_H
13580
500k
    3160U,  // USHLLT_ZZI_S
13581
500k
    3216U,  // USHLLv16i8_shift
13582
500k
    3224U,  // USHLLv2i32_shift
13583
500k
    3232U,  // USHLLv4i16_shift
13584
500k
    3184U,  // USHLLv4i32_shift
13585
500k
    3192U,  // USHLLv8i16_shift
13586
500k
    3240U,  // USHLLv8i8_shift
13587
500k
    794768U,  // USHLv16i8
13588
500k
    3160U,  // USHLv1i64
13589
500k
    925848U,  // USHLv2i32
13590
500k
    270440U,  // USHLv2i64
13591
500k
    1056928U, // USHLv4i16
13592
500k
    401520U,  // USHLv4i32
13593
500k
    532600U,  // USHLv8i16
13594
500k
    1188008U, // USHLv8i8
13595
500k
    3160U,  // USHRd
13596
500k
    3216U,  // USHRv16i8_shift
13597
500k
    3224U,  // USHRv2i32_shift
13598
500k
    3176U,  // USHRv2i64_shift
13599
500k
    3232U,  // USHRv4i16_shift
13600
500k
    3184U,  // USHRv4i32_shift
13601
500k
    3192U,  // USHRv8i16_shift
13602
500k
    3240U,  // USHRv8i8_shift
13603
500k
    795792U,  // USMMLA
13604
500k
    1U, // USMMLA_ZZZ
13605
500k
    0U, // USMOPA_MPPZZ_D
13606
500k
    0U, // USMOPA_MPPZZ_S
13607
500k
    0U, // USMOPS_MPPZZ_D
13608
500k
    0U, // USMOPS_MPPZZ_S
13609
500k
    8530048U, // USQADD_ZPmZ_B
13610
500k
    16914560U,  // USQADD_ZPmZ_D
13611
500k
    25832584U,  // USQADD_ZPmZ_H
13612
500k
    33697920U,  // USQADD_ZPmZ_S
13613
500k
    24U,  // USQADDv16i8
13614
500k
    33U,  // USQADDv1i16
13615
500k
    33U,  // USQADDv1i32
13616
500k
    33U,  // USQADDv1i64
13617
500k
    33U,  // USQADDv1i8
13618
500k
    40U,  // USQADDv2i32
13619
500k
    48U,  // USQADDv2i64
13620
500k
    56U,  // USQADDv4i16
13621
500k
    64U,  // USQADDv4i32
13622
500k
    72U,  // USQADDv8i16
13623
500k
    80U,  // USQADDv8i8
13624
500k
    321U, // USRA_ZZI_B
13625
500k
    37976U, // USRA_ZZI_D
13626
500k
    320U, // USRA_ZZI_H
13627
500k
    37976U, // USRA_ZZI_S
13628
500k
    37977U, // USRAd
13629
500k
    38032U, // USRAv16i8_shift
13630
500k
    38040U, // USRAv2i32_shift
13631
500k
    37992U, // USRAv2i64_shift
13632
500k
    38048U, // USRAv4i16_shift
13633
500k
    38000U, // USRAv4i32_shift
13634
500k
    38008U, // USRAv8i16_shift
13635
500k
    38056U, // USRAv8i8_shift
13636
500k
    12376U, // USUBLB_ZZZ_D
13637
500k
    592U, // USUBLB_ZZZ_H
13638
500k
    5208U,  // USUBLB_ZZZ_S
13639
500k
    12376U, // USUBLT_ZZZ_D
13640
500k
    592U, // USUBLT_ZZZ_H
13641
500k
    5208U,  // USUBLT_ZZZ_S
13642
500k
    794768U,  // USUBLv16i8_v8i16
13643
500k
    925848U,  // USUBLv2i32_v2i64
13644
500k
    1056928U, // USUBLv4i16_v4i32
13645
500k
    401520U,  // USUBLv4i32_v2i64
13646
500k
    532600U,  // USUBLv8i16_v4i32
13647
500k
    1188008U, // USUBLv8i8_v8i16
13648
500k
    12376U, // USUBWB_ZZZ_D
13649
500k
    592U, // USUBWB_ZZZ_H
13650
500k
    5208U,  // USUBWB_ZZZ_S
13651
500k
    12376U, // USUBWT_ZZZ_D
13652
500k
    592U, // USUBWT_ZZZ_H
13653
500k
    5208U,  // USUBWT_ZZZ_S
13654
500k
    794744U,  // USUBWv16i8_v8i16
13655
500k
    925800U,  // USUBWv2i32_v2i64
13656
500k
    1056880U, // USUBWv4i16_v4i32
13657
500k
    401512U,  // USUBWv4i32_v2i64
13658
500k
    532592U,  // USUBWv8i16_v4i32
13659
500k
    1187960U, // USUBWv8i8_v8i16
13660
500k
    32U,  // UUNPKHI_ZZ_D
13661
500k
    0U, // UUNPKHI_ZZ_H
13662
500k
    32U,  // UUNPKHI_ZZ_S
13663
500k
    32U,  // UUNPKLO_ZZ_D
13664
500k
    0U, // UUNPKLO_ZZ_H
13665
500k
    32U,  // UUNPKLO_ZZ_S
13666
500k
    8U, // UXTB_ZPmZ_D
13667
500k
    0U, // UXTB_ZPmZ_H
13668
500k
    16U,  // UXTB_ZPmZ_S
13669
500k
    8U, // UXTH_ZPmZ_D
13670
500k
    16U,  // UXTH_ZPmZ_S
13671
500k
    8U, // UXTW_ZPmZ_D
13672
500k
    10328U, // UZP1_PPP_B
13673
500k
    6232U,  // UZP1_PPP_D
13674
500k
    136U, // UZP1_PPP_H
13675
500k
    12376U, // UZP1_PPP_S
13676
500k
    10328U, // UZP1_ZZZ_B
13677
500k
    6232U,  // UZP1_ZZZ_D
13678
500k
    136U, // UZP1_ZZZ_H
13679
500k
    880U, // UZP1_ZZZ_Q
13680
500k
    12376U, // UZP1_ZZZ_S
13681
500k
    794768U,  // UZP1v16i8
13682
500k
    925848U,  // UZP1v2i32
13683
500k
    270440U,  // UZP1v2i64
13684
500k
    1056928U, // UZP1v4i16
13685
500k
    401520U,  // UZP1v4i32
13686
500k
    532600U,  // UZP1v8i16
13687
500k
    1188008U, // UZP1v8i8
13688
500k
    10328U, // UZP2_PPP_B
13689
500k
    6232U,  // UZP2_PPP_D
13690
500k
    136U, // UZP2_PPP_H
13691
500k
    12376U, // UZP2_PPP_S
13692
500k
    10328U, // UZP2_ZZZ_B
13693
500k
    6232U,  // UZP2_ZZZ_D
13694
500k
    136U, // UZP2_ZZZ_H
13695
500k
    880U, // UZP2_ZZZ_Q
13696
500k
    12376U, // UZP2_ZZZ_S
13697
500k
    794768U,  // UZP2v16i8
13698
500k
    925848U,  // UZP2v2i32
13699
500k
    270440U,  // UZP2v2i64
13700
500k
    1056928U, // UZP2v4i16
13701
500k
    401520U,  // UZP2v4i32
13702
500k
    532600U,  // UZP2v8i16
13703
500k
    1188008U, // UZP2v8i8
13704
500k
    0U, // WFET
13705
500k
    0U, // WFIT
13706
500k
    3160U,  // WHILEGE_PWW_B
13707
500k
    3160U,  // WHILEGE_PWW_D
13708
500k
    200U, // WHILEGE_PWW_H
13709
500k
    3160U,  // WHILEGE_PWW_S
13710
500k
    3160U,  // WHILEGE_PXX_B
13711
500k
    3160U,  // WHILEGE_PXX_D
13712
500k
    200U, // WHILEGE_PXX_H
13713
500k
    3160U,  // WHILEGE_PXX_S
13714
500k
    3160U,  // WHILEGT_PWW_B
13715
500k
    3160U,  // WHILEGT_PWW_D
13716
500k
    200U, // WHILEGT_PWW_H
13717
500k
    3160U,  // WHILEGT_PWW_S
13718
500k
    3160U,  // WHILEGT_PXX_B
13719
500k
    3160U,  // WHILEGT_PXX_D
13720
500k
    200U, // WHILEGT_PXX_H
13721
500k
    3160U,  // WHILEGT_PXX_S
13722
500k
    3160U,  // WHILEHI_PWW_B
13723
500k
    3160U,  // WHILEHI_PWW_D
13724
500k
    200U, // WHILEHI_PWW_H
13725
500k
    3160U,  // WHILEHI_PWW_S
13726
500k
    3160U,  // WHILEHI_PXX_B
13727
500k
    3160U,  // WHILEHI_PXX_D
13728
500k
    200U, // WHILEHI_PXX_H
13729
500k
    3160U,  // WHILEHI_PXX_S
13730
500k
    3160U,  // WHILEHS_PWW_B
13731
500k
    3160U,  // WHILEHS_PWW_D
13732
500k
    200U, // WHILEHS_PWW_H
13733
500k
    3160U,  // WHILEHS_PWW_S
13734
500k
    3160U,  // WHILEHS_PXX_B
13735
500k
    3160U,  // WHILEHS_PXX_D
13736
500k
    200U, // WHILEHS_PXX_H
13737
500k
    3160U,  // WHILEHS_PXX_S
13738
500k
    3160U,  // WHILELE_PWW_B
13739
500k
    3160U,  // WHILELE_PWW_D
13740
500k
    200U, // WHILELE_PWW_H
13741
500k
    3160U,  // WHILELE_PWW_S
13742
500k
    3160U,  // WHILELE_PXX_B
13743
500k
    3160U,  // WHILELE_PXX_D
13744
500k
    200U, // WHILELE_PXX_H
13745
500k
    3160U,  // WHILELE_PXX_S
13746
500k
    3160U,  // WHILELO_PWW_B
13747
500k
    3160U,  // WHILELO_PWW_D
13748
500k
    200U, // WHILELO_PWW_H
13749
500k
    3160U,  // WHILELO_PWW_S
13750
500k
    3160U,  // WHILELO_PXX_B
13751
500k
    3160U,  // WHILELO_PXX_D
13752
500k
    200U, // WHILELO_PXX_H
13753
500k
    3160U,  // WHILELO_PXX_S
13754
500k
    3160U,  // WHILELS_PWW_B
13755
500k
    3160U,  // WHILELS_PWW_D
13756
500k
    200U, // WHILELS_PWW_H
13757
500k
    3160U,  // WHILELS_PWW_S
13758
500k
    3160U,  // WHILELS_PXX_B
13759
500k
    3160U,  // WHILELS_PXX_D
13760
500k
    200U, // WHILELS_PXX_H
13761
500k
    3160U,  // WHILELS_PXX_S
13762
500k
    3160U,  // WHILELT_PWW_B
13763
500k
    3160U,  // WHILELT_PWW_D
13764
500k
    200U, // WHILELT_PWW_H
13765
500k
    3160U,  // WHILELT_PWW_S
13766
500k
    3160U,  // WHILELT_PXX_B
13767
500k
    3160U,  // WHILELT_PXX_D
13768
500k
    200U, // WHILELT_PXX_H
13769
500k
    3160U,  // WHILELT_PXX_S
13770
500k
    3160U,  // WHILERW_PXX_B
13771
500k
    3160U,  // WHILERW_PXX_D
13772
500k
    200U, // WHILERW_PXX_H
13773
500k
    3160U,  // WHILERW_PXX_S
13774
500k
    3160U,  // WHILEWR_PXX_B
13775
500k
    3160U,  // WHILEWR_PXX_D
13776
500k
    200U, // WHILEWR_PXX_H
13777
500k
    3160U,  // WHILEWR_PXX_S
13778
500k
    0U, // WRFFR
13779
500k
    0U, // XAFLAG
13780
500k
    3154024U, // XAR
13781
500k
    141400U,  // XAR_ZZZI_B
13782
500k
    137304U,  // XAR_ZZZI_D
13783
500k
    1453192U, // XAR_ZZZI_H
13784
500k
    143448U,  // XAR_ZZZI_S
13785
500k
    0U, // XPACD
13786
500k
    0U, // XPACI
13787
500k
    0U, // XPACLRI
13788
500k
    72U,  // XTNv16i8
13789
500k
    48U,  // XTNv2i32
13790
500k
    64U,  // XTNv4i16
13791
500k
    48U,  // XTNv4i32
13792
500k
    64U,  // XTNv8i16
13793
500k
    72U,  // XTNv8i8
13794
500k
    0U, // ZERO_M
13795
500k
    10328U, // ZIP1_PPP_B
13796
500k
    6232U,  // ZIP1_PPP_D
13797
500k
    136U, // ZIP1_PPP_H
13798
500k
    12376U, // ZIP1_PPP_S
13799
500k
    10328U, // ZIP1_ZZZ_B
13800
500k
    6232U,  // ZIP1_ZZZ_D
13801
500k
    136U, // ZIP1_ZZZ_H
13802
500k
    880U, // ZIP1_ZZZ_Q
13803
500k
    12376U, // ZIP1_ZZZ_S
13804
500k
    794768U,  // ZIP1v16i8
13805
500k
    925848U,  // ZIP1v2i32
13806
500k
    270440U,  // ZIP1v2i64
13807
500k
    1056928U, // ZIP1v4i16
13808
500k
    401520U,  // ZIP1v4i32
13809
500k
    532600U,  // ZIP1v8i16
13810
500k
    1188008U, // ZIP1v8i8
13811
500k
    10328U, // ZIP2_PPP_B
13812
500k
    6232U,  // ZIP2_PPP_D
13813
500k
    136U, // ZIP2_PPP_H
13814
500k
    12376U, // ZIP2_PPP_S
13815
500k
    10328U, // ZIP2_ZZZ_B
13816
500k
    6232U,  // ZIP2_ZZZ_D
13817
500k
    136U, // ZIP2_ZZZ_H
13818
500k
    880U, // ZIP2_ZZZ_Q
13819
500k
    12376U, // ZIP2_ZZZ_S
13820
500k
    794768U,  // ZIP2v16i8
13821
500k
    925848U,  // ZIP2v2i32
13822
500k
    270440U,  // ZIP2v2i64
13823
500k
    1056928U, // ZIP2v4i16
13824
500k
    401520U,  // ZIP2v4i32
13825
500k
    532600U,  // ZIP2v8i16
13826
500k
    1188008U, // ZIP2v8i8
13827
500k
    0U, // anonymous_13987
13828
500k
    0U, // anonymous_13988
13829
500k
    0U, // anonymous_5384
13830
500k
    0U, // anonymous_5385
13831
500k
  };
13832
13833
  // Emit the opcode for the instruction.
13834
500k
  uint64_t Bits = 0;
13835
500k
  Bits |= (uint64_t)OpInfo0[opcode] << 0;
13836
500k
  Bits |= (uint64_t)OpInfo1[opcode] << 32;
13837
500k
#ifndef CAPSTONE_DIET
13838
500k
  SStream_concat0(O, AsmStrs+(Bits & 16383)-1);
13839
500k
#endif
13840
500k
  return Bits;
13841
13842
500k
}
13843
/// printInstruction - This method is automatically generated by tablegen
13844
/// from the instruction set description.
13845
static void printInstruction(MCInst *MI, SStream *O)
13846
224k
{
13847
224k
  unsigned int opcode = MCInst_getOpcode(MI);
13848
  // printf("opcode = %u\n", opcode);
13849
13850
13851
13852
224k
  uint64_t Bits = getMnemonic(MI, O, opcode);
13853
13854
  // Fragment 0 encoded into 7 bits for 68 unique commands.
13855
  // printf("Fragment 0: %"PRIu64"\n", ((Bits >> 14) & 127));
13856
224k
  switch ((Bits >> 14) & 127) {
13857
0
  default: // unreachable
13858
201
  case 0:
13859
    // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
13860
201
    return;
13861
0
    break;
13862
87.4k
  case 1:
13863
    // TLSDESCCALL, ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ...
13864
87.4k
    printOperand(MI, 0, O);
13865
87.4k
    break;
13866
7.49k
  case 2:
13867
    // ABS_ZPmZ_B, ADDHNB_ZZZ_B, ADDHNT_ZZZ_B, ADDP_ZPmZ_B, ADD_ZI_B, ADD_ZPm...
13868
7.49k
    printSVERegOp(MI, 0, O, 'b');
13869
7.49k
    break;
13870
5.75k
  case 3:
13871
    // ABS_ZPmZ_D, ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDP_ZPmZ_D, ADD_ZI_D, ADD_ZPmZ_...
13872
5.75k
    printSVERegOp(MI, 0, O, 'd');
13873
5.75k
    break;
13874
6.66k
  case 4:
13875
    // ABS_ZPmZ_H, ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADDP_ZPmZ_H, ADD_ZI_H, ADD_ZPm...
13876
6.66k
    printSVERegOp(MI, 0, O, 'h');
13877
6.66k
    SStream_concat0(O, ", ");
13878
6.66k
    break;
13879
5.07k
  case 5:
13880
    // ABS_ZPmZ_S, ADCLB_ZZZ_S, ADCLT_ZZZ_S, ADDHNB_ZZZ_S, ADDHNT_ZZZ_S, ADDP...
13881
5.07k
    printSVERegOp(MI, 0, O, 's');
13882
5.07k
    break;
13883
13.3k
  case 6:
13884
    // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
13885
13.3k
    printVRegOperand(MI, 0, O);
13886
13.3k
    break;
13887
1.65k
  case 7:
13888
    // ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, FMOPA_MPPZZ_D,...
13889
1.65k
    printMatrixTile(MI, 0, O);
13890
1.65k
    SStream_concat0(O, ", ");
13891
1.65k
    printSVERegOp(MI, 1, O, 0);
13892
1.65k
    SStream_concat0(O, "/m, ");
13893
1.65k
    printSVERegOp(MI, 2, O, 0);
13894
1.65k
    SStream_concat0(O, "/m, ");
13895
1.65k
    break;
13896
6.38k
  case 8:
13897
    // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
13898
6.38k
    printVRegOperand(MI, 1, O);
13899
6.38k
    break;
13900
233
  case 9:
13901
    // ANDV_VPZ_B, EORV_VPZ_B, ORV_VPZ_B, SMAXV_VPZ_B, SMINV_VPZ_B, UMAXV_VPZ...
13902
233
    printZPRasFPR(MI, 0, O, 8);
13903
233
    SStream_concat0(O, ", ");
13904
233
    printSVERegOp(MI, 1, O, 0);
13905
233
    SStream_concat0(O, ", ");
13906
233
    printSVERegOp(MI, 2, O, 'b');
13907
233
    return;
13908
0
    break;
13909
193
  case 10:
13910
    // ANDV_VPZ_D, EORV_VPZ_D, FADDA_VPZ_D, FADDV_VPZ_D, FMAXNMV_VPZ_D, FMAXV...
13911
193
    printZPRasFPR(MI, 0, O, 64);
13912
193
    SStream_concat0(O, ", ");
13913
193
    printSVERegOp(MI, 1, O, 0);
13914
193
    SStream_concat0(O, ", ");
13915
193
    break;
13916
213
  case 11:
13917
    // ANDV_VPZ_H, EORV_VPZ_H, FADDA_VPZ_H, FADDV_VPZ_H, FMAXNMV_VPZ_H, FMAXV...
13918
213
    printZPRasFPR(MI, 0, O, 16);
13919
213
    SStream_concat0(O, ", ");
13920
213
    printSVERegOp(MI, 1, O, 0);
13921
213
    SStream_concat0(O, ", ");
13922
213
    break;
13923
713
  case 12:
13924
    // ANDV_VPZ_S, EORV_VPZ_S, FADDA_VPZ_S, FADDV_VPZ_S, FMAXNMV_VPZ_S, FMAXV...
13925
713
    printZPRasFPR(MI, 0, O, 32);
13926
713
    SStream_concat0(O, ", ");
13927
713
    printSVERegOp(MI, 1, O, 0);
13928
713
    SStream_concat0(O, ", ");
13929
713
    break;
13930
14.9k
  case 13:
13931
    // AUTDA, AUTDB, AUTDZA, AUTDZB, AUTIA, AUTIB, AUTIZA, AUTIZB, CASAB, CAS...
13932
14.9k
    printOperand(MI, 1, O);
13933
14.9k
    break;
13934
1.66k
  case 14:
13935
    // B, BL
13936
1.66k
    printAlignedLabel(MI, 0, O);
13937
1.66k
    return;
13938
0
    break;
13939
1.33k
  case 15:
13940
    // BCcc, Bcc
13941
1.33k
    printCondCode(MI, 0, O);
13942
1.33k
    SStream_concat0(O, "\t");
13943
1.33k
    printAlignedLabel(MI, 1, O);
13944
1.33k
    return;
13945
0
    break;
13946
236
  case 16:
13947
    // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL
13948
236
    printImmHex(MI, 0, O);
13949
236
    return;
13950
0
    break;
13951
404
  case 17:
13952
    // CASPALW, CASPAW, CASPLW, CASPW
13953
404
    printGPRSeqPairsClassOperand(MI, 1, O, 32);
13954
404
    SStream_concat0(O, ", ");
13955
404
    printGPRSeqPairsClassOperand(MI, 2, O, 32);
13956
404
    SStream_concat0(O, ", [");
13957
404
    set_mem_access(MI, true);
13958
404
    printOperand(MI, 3, O);
13959
404
    SStream_concat0(O, "]");
13960
404
    set_mem_access(MI, false);
13961
404
    return;
13962
0
    break;
13963
554
  case 18:
13964
    // CASPALX, CASPAX, CASPLX, CASPX
13965
554
    printGPRSeqPairsClassOperand(MI, 1, O, 64);
13966
554
    SStream_concat0(O, ", ");
13967
554
    printGPRSeqPairsClassOperand(MI, 2, O, 64);
13968
554
    SStream_concat0(O, ", [");
13969
554
    set_mem_access(MI, true);
13970
554
    printOperand(MI, 3, O);
13971
554
    SStream_concat0(O, "]");
13972
554
    set_mem_access(MI, false);
13973
554
    return;
13974
0
    break;
13975
81
  case 19:
13976
    // CPYE, CPYEN, CPYERN, CPYERT, CPYERTN, CPYERTRN, CPYERTWN, CPYET, CPYET...
13977
81
    printOperand(MI, 3, O);
13978
81
    SStream_concat0(O, "]!, [");
13979
81
    set_mem_access(MI, false);
13980
81
    set_mem_access(MI, true);
13981
81
    printOperand(MI, 4, O);
13982
81
    SStream_concat0(O, "]!, ");
13983
81
    set_mem_access(MI, false);
13984
81
    printOperand(MI, 5, O);
13985
81
    SStream_concat0(O, "!");
13986
81
    return;
13987
0
    break;
13988
450
  case 20:
13989
    // DMB, DSB, ISB, TSB
13990
450
    printBarrierOption(MI, 0, O);
13991
450
    return;
13992
0
    break;
13993
68
  case 21:
13994
    // DSBnXS
13995
68
    printBarriernXSOption(MI, 0, O);
13996
68
    return;
13997
0
    break;
13998
411
  case 22:
13999
    // DUP_ZZI_Q, EXTRACT_ZPMXI_H_Q, EXTRACT_ZPMXI_V_Q, PMULLB_ZZZ_Q, PMULLT_...
14000
411
    printSVERegOp(MI, 0, O, 'q');
14001
411
    SStream_concat0(O, ", ");
14002
411
    break;
14003
6.38k
  case 23:
14004
    // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ...
14005
6.38k
    printTypedVectorList(MI, 0, O, 0,'d');
14006
6.38k
    SStream_concat0(O, ", ");
14007
6.38k
    printSVERegOp(MI, 1, O, 0);
14008
6.38k
    break;
14009
4.92k
  case 24:
14010
    // GLD1B_S_IMM_REAL, GLD1B_S_SXTW_REAL, GLD1B_S_UXTW_REAL, GLD1H_S_IMM_RE...
14011
4.92k
    printTypedVectorList(MI, 0, O, 0,'s');
14012
4.92k
    SStream_concat0(O, ", ");
14013
4.92k
    printSVERegOp(MI, 1, O, 0);
14014
4.92k
    break;
14015
745
  case 25:
14016
    // HINT
14017
745
    printImm(MI, 0, O);
14018
745
    return;
14019
0
    break;
14020
1.22k
  case 26:
14021
    // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
14022
1.22k
    printMatrixTileVector(MI, 0, O, 0);
14023
1.22k
    SStream_concat0(O, "[");
14024
1.22k
    set_sme_index(MI, true);
14025
1.22k
    printOperand(MI, 1, O);
14026
1.22k
    SStream_concat0(O, ", ");
14027
1.22k
    printMatrixIndex(MI, 2, O);
14028
1.22k
    break;
14029
1.29k
  case 27:
14030
    // INSERT_MXIPZ_V_B, INSERT_MXIPZ_V_D, INSERT_MXIPZ_V_H, INSERT_MXIPZ_V_Q...
14031
1.29k
    printMatrixTileVector(MI, 0, O, 1);
14032
1.29k
    SStream_concat0(O, "[");
14033
1.29k
    set_sme_index(MI, true);
14034
1.29k
    printOperand(MI, 1, O);
14035
1.29k
    SStream_concat0(O, ", ");
14036
1.29k
    printMatrixIndex(MI, 2, O);
14037
1.29k
    break;
14038
517
  case 28:
14039
    // LD1B, LD1B_IMM_REAL, LD1RB_IMM, LD1RO_B, LD1RO_B_IMM, LD1RQ_B, LD1RQ_B...
14040
517
    printTypedVectorList(MI, 0, O, 0,'b');
14041
517
    SStream_concat0(O, ", ");
14042
517
    printSVERegOp(MI, 1, O, 0);
14043
517
    break;
14044
766
  case 29:
14045
    // LD1B_H, LD1B_H_IMM_REAL, LD1H, LD1H_IMM_REAL, LD1RB_H_IMM, LD1RH_IMM, ...
14046
766
    printTypedVectorList(MI, 0, O, 0,'h');
14047
766
    SStream_concat0(O, ", ");
14048
766
    printSVERegOp(MI, 1, O, 0);
14049
766
    break;
14050
529
  case 30:
14051
    // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,...
14052
529
    printTypedVectorList(MI, 0, O, 16, 'b');
14053
529
    SStream_concat0(O, ", [");
14054
529
    set_mem_access(MI, true);
14055
529
    printOperand(MI, 1, O);
14056
529
    SStream_concat0(O, "]");
14057
529
    set_mem_access(MI, false);
14058
529
    return;
14059
0
    break;
14060
2.48k
  case 31:
14061
    // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L...
14062
2.48k
    printTypedVectorList(MI, 1, O, 16, 'b');
14063
2.48k
    SStream_concat0(O, ", [");
14064
2.48k
    set_mem_access(MI, true);
14065
2.48k
    printOperand(MI, 2, O);
14066
2.48k
    SStream_concat0(O, "], ");
14067
2.48k
    set_mem_access(MI, false);
14068
2.48k
    break;
14069
300
  case 32:
14070
    // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv...
14071
300
    printTypedVectorList(MI, 0, O, 1, 'd');
14072
300
    SStream_concat0(O, ", [");
14073
300
    set_mem_access(MI, true);
14074
300
    printOperand(MI, 1, O);
14075
300
    SStream_concat0(O, "]");
14076
300
    set_mem_access(MI, false);
14077
300
    return;
14078
0
    break;
14079
1.68k
  case 33:
14080
    // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw...
14081
1.68k
    printTypedVectorList(MI, 1, O, 1, 'd');
14082
1.68k
    SStream_concat0(O, ", [");
14083
1.68k
    set_mem_access(MI, true);
14084
1.68k
    printOperand(MI, 2, O);
14085
1.68k
    SStream_concat0(O, "], ");
14086
1.68k
    set_mem_access(MI, false);
14087
1.68k
    break;
14088
87
  case 34:
14089
    // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw...
14090
87
    printTypedVectorList(MI, 0, O, 2, 'd');
14091
87
    SStream_concat0(O, ", [");
14092
87
    set_mem_access(MI, true);
14093
87
    printOperand(MI, 1, O);
14094
87
    SStream_concat0(O, "]");
14095
87
    set_mem_access(MI, false);
14096
87
    return;
14097
0
    break;
14098
1.80k
  case 35:
14099
    // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw...
14100
1.80k
    printTypedVectorList(MI, 1, O, 2, 'd');
14101
1.80k
    SStream_concat0(O, ", [");
14102
1.80k
    set_mem_access(MI, true);
14103
1.80k
    printOperand(MI, 2, O);
14104
1.80k
    SStream_concat0(O, "], ");
14105
1.80k
    set_mem_access(MI, false);
14106
1.80k
    break;
14107
405
  case 36:
14108
    // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw...
14109
405
    printTypedVectorList(MI, 0, O, 2, 's');
14110
405
    SStream_concat0(O, ", [");
14111
405
    set_mem_access(MI, true);
14112
405
    printOperand(MI, 1, O);
14113
405
    SStream_concat0(O, "]");
14114
405
    set_mem_access(MI, false);
14115
405
    return;
14116
0
    break;
14117
2.85k
  case 37:
14118
    // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw...
14119
2.85k
    printTypedVectorList(MI, 1, O, 2, 's');
14120
2.85k
    SStream_concat0(O, ", [");
14121
2.85k
    set_mem_access(MI, true);
14122
2.85k
    printOperand(MI, 2, O);
14123
2.85k
    SStream_concat0(O, "], ");
14124
2.85k
    set_mem_access(MI, false);
14125
2.85k
    break;
14126
480
  case 38:
14127
    // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw...
14128
480
    printTypedVectorList(MI, 0, O, 4, 'h');
14129
480
    SStream_concat0(O, ", [");
14130
480
    set_mem_access(MI, true);
14131
480
    printOperand(MI, 1, O);
14132
480
    SStream_concat0(O, "]");
14133
480
    set_mem_access(MI, false);
14134
480
    return;
14135
0
    break;
14136
1.45k
  case 39:
14137
    // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw...
14138
1.45k
    printTypedVectorList(MI, 1, O, 4, 'h');
14139
1.45k
    SStream_concat0(O, ", [");
14140
1.45k
    set_mem_access(MI, true);
14141
1.45k
    printOperand(MI, 2, O);
14142
1.45k
    SStream_concat0(O, "], ");
14143
1.45k
    set_mem_access(MI, false);
14144
1.45k
    break;
14145
882
  case 40:
14146
    // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw...
14147
882
    printTypedVectorList(MI, 0, O, 4, 's');
14148
882
    SStream_concat0(O, ", [");
14149
882
    set_mem_access(MI, true);
14150
882
    printOperand(MI, 1, O);
14151
882
    SStream_concat0(O, "]");
14152
882
    set_mem_access(MI, false);
14153
882
    return;
14154
0
    break;
14155
2.35k
  case 41:
14156
    // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw...
14157
2.35k
    printTypedVectorList(MI, 1, O, 4, 's');
14158
2.35k
    SStream_concat0(O, ", [");
14159
2.35k
    set_mem_access(MI, true);
14160
2.35k
    printOperand(MI, 2, O);
14161
2.35k
    SStream_concat0(O, "], ");
14162
2.35k
    set_mem_access(MI, false);
14163
2.35k
    break;
14164
302
  case 42:
14165
    // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw...
14166
302
    printTypedVectorList(MI, 0, O, 8, 'b');
14167
302
    SStream_concat0(O, ", [");
14168
302
    set_mem_access(MI, true);
14169
302
    printOperand(MI, 1, O);
14170
302
    SStream_concat0(O, "]");
14171
302
    set_mem_access(MI, false);
14172
302
    return;
14173
0
    break;
14174
1.60k
  case 43:
14175
    // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw...
14176
1.60k
    printTypedVectorList(MI, 1, O, 8, 'b');
14177
1.60k
    SStream_concat0(O, ", [");
14178
1.60k
    set_mem_access(MI, true);
14179
1.60k
    printOperand(MI, 2, O);
14180
1.60k
    SStream_concat0(O, "], ");
14181
1.60k
    set_mem_access(MI, false);
14182
1.60k
    break;
14183
347
  case 44:
14184
    // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw...
14185
347
    printTypedVectorList(MI, 0, O, 8, 'h');
14186
347
    SStream_concat0(O, ", [");
14187
347
    set_mem_access(MI, true);
14188
347
    printOperand(MI, 1, O);
14189
347
    SStream_concat0(O, "]");
14190
347
    set_mem_access(MI, false);
14191
347
    return;
14192
0
    break;
14193
2.92k
  case 45:
14194
    // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw...
14195
2.92k
    printTypedVectorList(MI, 1, O, 8, 'h');
14196
2.92k
    SStream_concat0(O, ", [");
14197
2.92k
    set_mem_access(MI, true);
14198
2.92k
    printOperand(MI, 2, O);
14199
2.92k
    SStream_concat0(O, "], ");
14200
2.92k
    set_mem_access(MI, false);
14201
2.92k
    break;
14202
3.09k
  case 46:
14203
    // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,...
14204
3.09k
    printTypedVectorList(MI, 1, O, 0, 'h');
14205
3.09k
    printVectorIndex(MI, 2, O);
14206
3.09k
    SStream_concat0(O, ", [");
14207
3.09k
    set_mem_access(MI, true);
14208
3.09k
    printOperand(MI, 3, O);
14209
3.09k
    break;
14210
480
  case 47:
14211
    // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST
14212
480
    printTypedVectorList(MI, 2, O, 0, 'h');
14213
480
    printVectorIndex(MI, 3, O);
14214
480
    SStream_concat0(O, ", [");
14215
480
    set_mem_access(MI, true);
14216
480
    printOperand(MI, 4, O);
14217
480
    SStream_concat0(O, "], ");
14218
480
    set_mem_access(MI, false);
14219
480
    break;
14220
2.22k
  case 48:
14221
    // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,...
14222
2.22k
    printTypedVectorList(MI, 1, O, 0, 's');
14223
2.22k
    printVectorIndex(MI, 2, O);
14224
2.22k
    SStream_concat0(O, ", [");
14225
2.22k
    set_mem_access(MI, true);
14226
2.22k
    printOperand(MI, 3, O);
14227
2.22k
    break;
14228
1.38k
  case 49:
14229
    // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST
14230
1.38k
    printTypedVectorList(MI, 2, O, 0, 's');
14231
1.38k
    printVectorIndex(MI, 3, O);
14232
1.38k
    SStream_concat0(O, ", [");
14233
1.38k
    set_mem_access(MI, true);
14234
1.38k
    printOperand(MI, 4, O);
14235
1.38k
    SStream_concat0(O, "], ");
14236
1.38k
    set_mem_access(MI, false);
14237
1.38k
    break;
14238
1.10k
  case 50:
14239
    // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,...
14240
1.10k
    printTypedVectorList(MI, 1, O, 0, 'd');
14241
1.10k
    printVectorIndex(MI, 2, O);
14242
1.10k
    SStream_concat0(O, ", [");
14243
1.10k
    set_mem_access(MI, true);
14244
1.10k
    printOperand(MI, 3, O);
14245
1.10k
    break;
14246
2.05k
  case 51:
14247
    // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST
14248
2.05k
    printTypedVectorList(MI, 2, O, 0, 'd');
14249
2.05k
    printVectorIndex(MI, 3, O);
14250
2.05k
    SStream_concat0(O, ", [");
14251
2.05k
    set_mem_access(MI, true);
14252
2.05k
    printOperand(MI, 4, O);
14253
2.05k
    SStream_concat0(O, "], ");
14254
2.05k
    set_mem_access(MI, false);
14255
2.05k
    break;
14256
3.52k
  case 52:
14257
    // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_...
14258
3.52k
    printTypedVectorList(MI, 1, O, 0, 'b');
14259
3.52k
    printVectorIndex(MI, 2, O);
14260
3.52k
    SStream_concat0(O, ", [");
14261
3.52k
    set_mem_access(MI, true);
14262
3.52k
    printOperand(MI, 3, O);
14263
3.52k
    break;
14264
1.27k
  case 53:
14265
    // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST
14266
1.27k
    printTypedVectorList(MI, 2, O, 0, 'b');
14267
1.27k
    printVectorIndex(MI, 3, O);
14268
1.27k
    SStream_concat0(O, ", [");
14269
1.27k
    set_mem_access(MI, true);
14270
1.27k
    printOperand(MI, 4, O);
14271
1.27k
    SStream_concat0(O, "], ");
14272
1.27k
    set_mem_access(MI, false);
14273
1.27k
    break;
14274
433
  case 54:
14275
    // LD64B, ST64B
14276
433
    printGPR64x8(MI, 0, O);
14277
433
    SStream_concat0(O, ", [");
14278
433
    set_mem_access(MI, true);
14279
433
    printOperand(MI, 1, O);
14280
433
    SStream_concat0(O, "]");
14281
433
    set_mem_access(MI, false);
14282
433
    return;
14283
0
    break;
14284
938
  case 55:
14285
    // LDR_PXI, LDR_ZXI, MOVPRFX_ZZ, PSEL_PPPRI_B, PSEL_PPPRI_D, PSEL_PPPRI_H...
14286
938
    printSVERegOp(MI, 0, O, 0);
14287
938
    break;
14288
147
  case 56:
14289
    // LDR_ZA, STR_ZA
14290
147
    printMatrix(MI, 0, O, 0);
14291
147
    SStream_concat0(O, "[");
14292
147
    set_sme_index(MI, true);
14293
147
    printOperand(MI, 1, O);
14294
147
    SStream_concat0(O, ", ");
14295
147
    printMatrixIndex(MI, 2, O);
14296
147
    SStream_concat0(O, "], [");
14297
147
    set_mem_access(MI, false);
14298
147
    set_mem_access(MI, true);
14299
147
    printOperand(MI, 3, O);
14300
147
    SStream_concat0(O, ", ");
14301
147
    printOperand(MI, 4, O);
14302
147
    SStream_concat0(O, ", mul vl]");
14303
147
    set_mem_access(MI, false);
14304
147
    return;
14305
0
    break;
14306
14
  case 57:
14307
    // MOPSSETGE, MOPSSETGEN, MOPSSETGET, MOPSSETGETN, SETE, SETEN, SETET, SE...
14308
14
    printOperand(MI, 2, O);
14309
14
    SStream_concat0(O, "]!, ");
14310
14
    set_mem_access(MI, false);
14311
14
    printOperand(MI, 3, O);
14312
14
    SStream_concat0(O, "!, ");
14313
14
    printOperand(MI, 4, O);
14314
14
    return;
14315
0
    break;
14316
3.38k
  case 58:
14317
    // MSR
14318
3.38k
    printMSRSystemRegister(MI, 0, O);
14319
3.38k
    SStream_concat0(O, ", ");
14320
3.38k
    printOperand(MI, 1, O);
14321
3.38k
    return;
14322
0
    break;
14323
508
  case 59:
14324
    // MSRpstateImm1, MSRpstateImm4
14325
508
    printSystemPStateField(MI, 0, O);
14326
508
    SStream_concat0(O, ", ");
14327
508
    printOperand(MI, 1, O);
14328
508
    return;
14329
0
    break;
14330
0
  case 60:
14331
    // MSRpstatesvcrImm1
14332
0
    printSVCROp(MI, 0, O);
14333
0
    SStream_concat0(O, ", ");
14334
0
    printOperand(MI, 1, O);
14335
0
    return;
14336
0
    break;
14337
4.70k
  case 61:
14338
    // PRFB_D_PZI, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRF...
14339
4.70k
    printPrefetchOp(MI, 0, O, true);
14340
4.70k
    SStream_concat0(O, ", ");
14341
4.70k
    printSVERegOp(MI, 1, O, 0);
14342
4.70k
    SStream_concat0(O, ", [");
14343
4.70k
    set_mem_access(MI, true);
14344
4.70k
    break;
14345
1.28k
  case 62:
14346
    // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi
14347
1.28k
    printPrefetchOp(MI, 0, O, false);
14348
1.28k
    break;
14349
806
  case 63:
14350
    // ST1i16, ST2i16, ST3i16, ST4i16
14351
806
    printTypedVectorList(MI, 0, O, 0, 'h');
14352
806
    printVectorIndex(MI, 1, O);
14353
806
    SStream_concat0(O, ", [");
14354
806
    set_mem_access(MI, true);
14355
806
    printOperand(MI, 2, O);
14356
806
    SStream_concat0(O, "]");
14357
806
    set_mem_access(MI, false);
14358
806
    return;
14359
0
    break;
14360
1.23k
  case 64:
14361
    // ST1i32, ST2i32, ST3i32, ST4i32
14362
1.23k
    printTypedVectorList(MI, 0, O, 0, 's');
14363
1.23k
    printVectorIndex(MI, 1, O);
14364
1.23k
    SStream_concat0(O, ", [");
14365
1.23k
    set_mem_access(MI, true);
14366
1.23k
    printOperand(MI, 2, O);
14367
1.23k
    SStream_concat0(O, "]");
14368
1.23k
    set_mem_access(MI, false);
14369
1.23k
    return;
14370
0
    break;
14371
1.64k
  case 65:
14372
    // ST1i64, ST2i64, ST3i64, ST4i64
14373
1.64k
    printTypedVectorList(MI, 0, O, 0, 'd');
14374
1.64k
    printVectorIndex(MI, 1, O);
14375
1.64k
    SStream_concat0(O, ", [");
14376
1.64k
    set_mem_access(MI, true);
14377
1.64k
    printOperand(MI, 2, O);
14378
1.64k
    SStream_concat0(O, "]");
14379
1.64k
    set_mem_access(MI, false);
14380
1.64k
    return;
14381
0
    break;
14382
1.51k
  case 66:
14383
    // ST1i8, ST2i8, ST3i8, ST4i8
14384
1.51k
    printTypedVectorList(MI, 0, O, 0, 'b');
14385
1.51k
    printVectorIndex(MI, 1, O);
14386
1.51k
    SStream_concat0(O, ", [");
14387
1.51k
    set_mem_access(MI, true);
14388
1.51k
    printOperand(MI, 2, O);
14389
1.51k
    SStream_concat0(O, "]");
14390
1.51k
    set_mem_access(MI, false);
14391
1.51k
    return;
14392
0
    break;
14393
559
  case 67:
14394
    // ZERO_M
14395
559
    printMatrixTileList(MI, 0, O);
14396
559
    return;
14397
0
    break;
14398
224k
  }
14399
14400
14401
  // Fragment 1 encoded into 7 bits for 69 unique commands.
14402
  // printf("Fragment 1: %"PRIu64"\n", ((Bits >> 21) & 127));
14403
204k
  switch ((Bits >> 21) & 127) {
14404
0
  default: // unreachable
14405
7.49k
  case 0:
14406
    // TLSDESCCALL, AUTDZA, AUTDZB, AUTIZA, AUTIZB, BLR, BLRAAZ, BLRABZ, BR, ...
14407
7.49k
    return;
14408
0
    break;
14409
84.1k
  case 1:
14410
    // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, ABSv1i64, ADCLB_ZZZ_D, ADCLB_ZZZ_S...
14411
84.1k
    SStream_concat0(O, ", ");
14412
84.1k
    break;
14413
237
  case 2:
14414
    // ABS_ZPmZ_H, BFCVTNT_ZPmZ, BFCVT_ZPmZ, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPm...
14415
237
    printSVERegOp(MI, 2, O, 0);
14416
237
    SStream_concat0(O, "/m, ");
14417
237
    break;
14418
2.02k
  case 3:
14419
    // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM...
14420
2.02k
    SStream_concat0(O, ".16b, ");
14421
2.02k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
14422
2.02k
    break;
14423
2.23k
  case 4:
14424
    // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BF16DOTlanev4bf16, BF...
14425
2.23k
    SStream_concat0(O, ".2s, ");
14426
2.23k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
14427
2.23k
    break;
14428
2.81k
  case 5:
14429
    // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
14430
2.81k
    SStream_concat0(O, ".2d, ");
14431
2.81k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
14432
2.81k
    break;
14433
2.47k
  case 6:
14434
    // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BFCVTN, BICv4i16, CLS...
14435
2.47k
    SStream_concat0(O, ".4h, ");
14436
2.47k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
14437
2.47k
    break;
14438
5.04k
  case 7:
14439
    // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BF16DOTlanev8bf16, BF...
14440
5.04k
    SStream_concat0(O, ".4s, ");
14441
5.04k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
14442
5.04k
    break;
14443
2.44k
  case 8:
14444
    // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BFCVTN2, BICv8i16, CL...
14445
2.44k
    SStream_concat0(O, ".8h, ");
14446
2.44k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
14447
2.44k
    break;
14448
2.06k
  case 9:
14449
    // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8...
14450
2.06k
    SStream_concat0(O, ".8b, ");
14451
2.06k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
14452
2.06k
    break;
14453
112
  case 10:
14454
    // ADDHA_MPPZ_D, ADDVA_MPPZ_D, FMOPA_MPPZZ_D, FMOPS_MPPZZ_D
14455
112
    printSVERegOp(MI, 3, O, 'd');
14456
112
    break;
14457
901
  case 11:
14458
    // ADDHA_MPPZ_S, ADDVA_MPPZ_S, FMOPA_MPPZZ_S, FMOPS_MPPZZ_S
14459
901
    printSVERegOp(MI, 3, O, 's');
14460
901
    break;
14461
104
  case 12:
14462
    // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSHRNB_ZZI_H, RSUBHNB_ZZZ_H, SHRNB_ZZI_H,...
14463
104
    printSVERegOp(MI, 1, O, 's');
14464
104
    break;
14465
663
  case 13:
14466
    // ADDHNT_ZZZ_H, ANDV_VPZ_S, EORV_VPZ_S, FADDV_VPZ_S, FMAXNMV_VPZ_S, FMAX...
14467
663
    printSVERegOp(MI, 2, O, 's');
14468
663
    break;
14469
2.98k
  case 14:
14470
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID...
14471
2.98k
    printSVERegOp(MI, 1, O, 0);
14472
2.98k
    break;
14473
1.30k
  case 15:
14474
    // ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_ZZI_H, BDEP_ZZZ_H, BEXT_ZZZ_H...
14475
1.30k
    printSVERegOp(MI, 1, O, 'h');
14476
1.30k
    break;
14477
33.8k
  case 16:
14478
    // ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, ADR_LSL_ZZZ_D_2, ADR_LSL_ZZZ_D_3, AD...
14479
33.8k
    SStream_concat0(O, ", [");
14480
33.8k
    set_mem_access(MI, true);
14481
33.8k
    break;
14482
352
  case 17:
14483
    // ANDV_VPZ_D, EORV_VPZ_D, FADDV_VPZ_D, FMAXNMV_VPZ_D, FMAXV_VPZ_D, FMINN...
14484
352
    printSVERegOp(MI, 2, O, 'd');
14485
352
    break;
14486
717
  case 18:
14487
    // ANDV_VPZ_H, CMLA_ZZZI_H, CMLA_ZZZ_H, DECP_ZP_H, EORBT_ZZZ_H, EORTB_ZZZ...
14488
717
    printSVERegOp(MI, 2, O, 'h');
14489
717
    break;
14490
34
  case 19:
14491
    // DECH_ZPiI, INCH_ZPiI, SQDECH_ZPiI, SQINCH_ZPiI, UQDECH_ZPiI, UQINCH_ZP...
14492
34
    printSVEPattern(MI, 2, O);
14493
34
    SStream_concat0(O, ", mul ");
14494
34
    printOperand(MI, 3, O);
14495
34
    return;
14496
0
    break;
14497
0
  case 20:
14498
    // DUP_ZI_H
14499
0
    printImm8OptLsl32(MI, 1, O);
14500
0
    return;
14501
0
    break;
14502
153
  case 21:
14503
    // DUP_ZR_H, INDEX_RI_H, INDEX_RR_H, WHILEGE_PWW_H, WHILEGE_PXX_H, WHILEG...
14504
153
    printOperand(MI, 1, O);
14505
153
    break;
14506
344
  case 22:
14507
    // DUP_ZZI_Q, TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, ZIP1_ZZZ_Q,...
14508
344
    printSVERegOp(MI, 1, O, 'q');
14509
344
    break;
14510
168
  case 23:
14511
    // FADDA_VPZ_D
14512
168
    printZPRasFPR(MI, 2, O, 64);
14513
168
    SStream_concat0(O, ", ");
14514
168
    printSVERegOp(MI, 3, O, 'd');
14515
168
    return;
14516
0
    break;
14517
30
  case 24:
14518
    // FADDA_VPZ_H, INSR_ZV_H
14519
30
    printZPRasFPR(MI, 2, O, 16);
14520
30
    break;
14521
283
  case 25:
14522
    // FADDA_VPZ_S
14523
283
    printZPRasFPR(MI, 2, O, 32);
14524
283
    SStream_concat0(O, ", ");
14525
283
    printSVERegOp(MI, 3, O, 's');
14526
283
    return;
14527
0
    break;
14528
128
  case 26:
14529
    // FCMPDri, FCMPEDri, FCMPEHri, FCMPESri, FCMPHri, FCMPSri
14530
128
    SStream_concat0(O, ", #0.0");
14531
128
    arm64_op_addFP(MI, 0);
14532
128
    return;
14533
0
    break;
14534
0
  case 27:
14535
    // FDUP_ZI_H
14536
0
    printFPImmOperand(MI, 1, O);
14537
0
    return;
14538
0
    break;
14539
202
  case 28:
14540
    // FMOVXDHighr, INSvi64gpr, INSvi64lane
14541
202
    SStream_concat0(O, ".d");
14542
202
    printVectorIndex(MI, 2, O);
14543
202
    SStream_concat0(O, ", ");
14544
202
    break;
14545
9.98k
  case 29:
14546
    // GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ...
14547
9.98k
    SStream_concat0(O, "/z, [");
14548
9.98k
    set_mem_access(MI, true);
14549
9.98k
    break;
14550
249
  case 30:
14551
    // INDEX_II_H, INDEX_IR_H
14552
249
    printSImm(MI, 1, O, 16);
14553
249
    SStream_concat0(O, ", ");
14554
249
    break;
14555
4.28k
  case 31:
14556
    // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
14557
4.28k
    SStream_concat0(O, "], ");
14558
4.28k
    set_mem_access(MI, false);
14559
4.28k
    break;
14560
4.21k
  case 32:
14561
    // INSR_ZR_H, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRFB...
14562
4.21k
    printOperand(MI, 2, O);
14563
4.21k
    break;
14564
0
  case 33:
14565
    // INSvi16gpr, INSvi16lane
14566
0
    SStream_concat0(O, ".h");
14567
0
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H);
14568
0
    printVectorIndex(MI, 2, O);
14569
0
    SStream_concat0(O, ", ");
14570
0
    break;
14571
0
  case 34:
14572
    // INSvi32gpr, INSvi32lane
14573
0
    SStream_concat0(O, ".s");
14574
0
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S);
14575
0
    printVectorIndex(MI, 2, O);
14576
0
    SStream_concat0(O, ", ");
14577
0
    break;
14578
0
  case 35:
14579
    // INSvi8gpr, INSvi8lane
14580
0
    SStream_concat0(O, ".b");
14581
0
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1B);
14582
0
    printVectorIndex(MI, 2, O);
14583
0
    SStream_concat0(O, ", ");
14584
0
    break;
14585
3.15k
  case 36:
14586
    // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L...
14587
3.15k
    printPostIncOperand(MI, 3, O, 64);
14588
3.15k
    return;
14589
0
    break;
14590
3.06k
  case 37:
14591
    // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD...
14592
3.06k
    printPostIncOperand(MI, 3, O, 32);
14593
3.06k
    return;
14594
0
    break;
14595
3.29k
  case 38:
14596
    // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw...
14597
3.29k
    printPostIncOperand(MI, 3, O, 16);
14598
3.29k
    return;
14599
0
    break;
14600
1.48k
  case 39:
14601
    // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1...
14602
1.48k
    printPostIncOperand(MI, 3, O, 8);
14603
1.48k
    return;
14604
0
    break;
14605
67
  case 40:
14606
    // LD1Rv16b_POST, LD1Rv8b_POST
14607
67
    printPostIncOperand(MI, 3, O, 1);
14608
67
    return;
14609
0
    break;
14610
1.41k
  case 41:
14611
    // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,...
14612
1.41k
    printPostIncOperand(MI, 3, O, 4);
14613
1.41k
    return;
14614
0
    break;
14615
141
  case 42:
14616
    // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST
14617
141
    printPostIncOperand(MI, 3, O, 2);
14618
141
    return;
14619
0
    break;
14620
1.24k
  case 43:
14621
    // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS...
14622
1.24k
    printPostIncOperand(MI, 3, O, 48);
14623
1.24k
    return;
14624
0
    break;
14625
2.53k
  case 44:
14626
    // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST...
14627
2.53k
    printPostIncOperand(MI, 3, O, 24);
14628
2.53k
    return;
14629
0
    break;
14630
2.52k
  case 45:
14631
    // LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX...
14632
2.52k
    SStream_concat0(O, "]}, ");
14633
2.52k
    set_mem_access(MI, false);
14634
2.52k
    printSVERegOp(MI, 3, O, 0);
14635
2.52k
    break;
14636
5.65k
  case 46:
14637
    // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ...
14638
5.65k
    SStream_concat0(O, "]");
14639
5.65k
    set_mem_access(MI, false);
14640
5.65k
    return;
14641
0
    break;
14642
667
  case 47:
14643
    // LD1i16_POST, LD2i8_POST
14644
667
    printPostIncOperand(MI, 5, O, 2);
14645
667
    return;
14646
0
    break;
14647
568
  case 48:
14648
    // LD1i32_POST, LD2i16_POST, LD4i8_POST
14649
568
    printPostIncOperand(MI, 5, O, 4);
14650
568
    return;
14651
0
    break;
14652
326
  case 49:
14653
    // LD1i64_POST, LD2i32_POST, LD4i16_POST
14654
326
    printPostIncOperand(MI, 5, O, 8);
14655
326
    return;
14656
0
    break;
14657
95
  case 50:
14658
    // LD1i8_POST
14659
95
    printPostIncOperand(MI, 5, O, 1);
14660
95
    return;
14661
0
    break;
14662
944
  case 51:
14663
    // LD2i64_POST, LD4i32_POST
14664
944
    printPostIncOperand(MI, 5, O, 16);
14665
944
    return;
14666
0
    break;
14667
153
  case 52:
14668
    // LD3Rv16b_POST, LD3Rv8b_POST
14669
153
    printPostIncOperand(MI, 3, O, 3);
14670
153
    return;
14671
0
    break;
14672
296
  case 53:
14673
    // LD3Rv2s_POST, LD3Rv4s_POST
14674
296
    printPostIncOperand(MI, 3, O, 12);
14675
296
    return;
14676
0
    break;
14677
310
  case 54:
14678
    // LD3Rv4h_POST, LD3Rv8h_POST
14679
310
    printPostIncOperand(MI, 3, O, 6);
14680
310
    return;
14681
0
    break;
14682
221
  case 55:
14683
    // LD3i16_POST
14684
221
    printPostIncOperand(MI, 5, O, 6);
14685
221
    return;
14686
0
    break;
14687
454
  case 56:
14688
    // LD3i32_POST
14689
454
    printPostIncOperand(MI, 5, O, 12);
14690
454
    return;
14691
0
    break;
14692
702
  case 57:
14693
    // LD3i64_POST
14694
702
    printPostIncOperand(MI, 5, O, 24);
14695
702
    return;
14696
0
    break;
14697
388
  case 58:
14698
    // LD3i8_POST
14699
388
    printPostIncOperand(MI, 5, O, 3);
14700
388
    return;
14701
0
    break;
14702
819
  case 59:
14703
    // LD4i64_POST
14704
819
    printPostIncOperand(MI, 5, O, 32);
14705
819
    return;
14706
0
    break;
14707
87
  case 60:
14708
    // PMULLB_ZZZ_H, PMULLT_ZZZ_H, PUNPKHI_PP, PUNPKLO_PP, SABDLB_ZZZ_H, SABD...
14709
87
    printSVERegOp(MI, 1, O, 'b');
14710
87
    break;
14711
38
  case 61:
14712
    // PMULLB_ZZZ_Q, PMULLT_ZZZ_Q
14713
38
    printSVERegOp(MI, 1, O, 'd');
14714
38
    SStream_concat0(O, ", ");
14715
38
    printSVERegOp(MI, 2, O, 'd');
14716
38
    return;
14717
0
    break;
14718
117
  case 62:
14719
    // PMULLv1i64, PMULLv2i64
14720
117
    SStream_concat0(O, ".1q, ");
14721
117
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1Q);
14722
117
    printVRegOperand(MI, 1, O);
14723
117
    break;
14724
72
  case 63:
14725
    // PTRUES_H, PTRUE_H
14726
72
    printSVEPattern(MI, 1, O);
14727
72
    return;
14728
0
    break;
14729
412
  case 64:
14730
    // SABALB_ZZZ_H, SABALT_ZZZ_H, SADDV_VPZ_B, SMLALB_ZZZ_H, SMLALT_ZZZ_H, S...
14731
412
    printSVERegOp(MI, 2, O, 'b');
14732
412
    break;
14733
292
  case 65:
14734
    // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v...
14735
292
    SStream_concat0(O, ".1d, ");
14736
292
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
14737
292
    break;
14738
336
  case 66:
14739
    // SMOPA_MPPZZ_D, SMOPS_MPPZZ_D, SUMOPA_MPPZZ_D, SUMOPS_MPPZZ_D, UMOPA_MP...
14740
336
    printSVERegOp(MI, 3, O, 'h');
14741
336
    SStream_concat0(O, ", ");
14742
336
    printSVERegOp(MI, 4, O, 'h');
14743
336
    return;
14744
0
    break;
14745
306
  case 67:
14746
    // SMOPA_MPPZZ_S, SMOPS_MPPZZ_S, SUMOPA_MPPZZ_S, SUMOPS_MPPZZ_S, UMOPA_MP...
14747
306
    printSVERegOp(MI, 3, O, 'b');
14748
306
    SStream_concat0(O, ", ");
14749
306
    printSVERegOp(MI, 4, O, 'b');
14750
306
    return;
14751
0
    break;
14752
456
  case 68:
14753
    // TBL_ZZZZ_H, TBL_ZZZ_H
14754
456
    printTypedVectorList(MI, 1, O, 0,'h');
14755
456
    SStream_concat0(O, ", ");
14756
456
    printSVERegOp(MI, 2, O, 'h');
14757
456
    return;
14758
0
    break;
14759
204k
  }
14760
14761
14762
  // Fragment 2 encoded into 7 bits for 69 unique commands.
14763
  // printf("Fragment 2: %"PRIu64"\n", ((Bits >> 28) & 127));
14764
167k
  switch ((Bits >> 28) & 127) {
14765
0
  default: // unreachable
14766
1.03k
  case 0:
14767
    // ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, BRKA_PPmP, BRKB_PPmP, CLS_ZPmZ_B, ...
14768
1.03k
    printSVERegOp(MI, 2, O, 0);
14769
1.03k
    SStream_concat0(O, "/m, ");
14770
1.03k
    break;
14771
40
  case 1:
14772
    // ABS_ZPmZ_H, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPmZ_H, CNT_ZPmZ_H, FABS_ZPmZ...
14773
40
    printSVERegOp(MI, 3, O, 'h');
14774
40
    return;
14775
0
    break;
14776
11.6k
  case 2:
14777
    // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
14778
11.6k
    printVRegOperand(MI, 1, O);
14779
11.6k
    break;
14780
62.0k
  case 3:
14781
    // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDSWri, ADDS...
14782
62.0k
    printOperand(MI, 1, O);
14783
62.0k
    break;
14784
1.35k
  case 4:
14785
    // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, DECP_ZP_D, EORBT_Z...
14786
1.35k
    printSVERegOp(MI, 2, O, 'd');
14787
1.35k
    break;
14788
1.61k
  case 5:
14789
    // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, DECP_ZP_S, EORBT_ZZ...
14790
1.61k
    printSVERegOp(MI, 2, O, 's');
14791
1.61k
    break;
14792
1.26k
  case 6:
14793
    // ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, ANDV_VPZ_D, AN...
14794
1.26k
    return;
14795
0
    break;
14796
354
  case 7:
14797
    // ADDHNB_ZZZ_B, DECP_XP_H, INCP_XP_H, RADDHNB_ZZZ_B, RSHRNB_ZZI_B, RSUBH...
14798
354
    printSVERegOp(MI, 1, O, 'h');
14799
354
    break;
14800
8.21k
  case 8:
14801
    // ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_Z...
14802
8.21k
    SStream_concat0(O, ", ");
14803
8.21k
    break;
14804
2.07k
  case 9:
14805
    // ADDHNB_ZZZ_S, ADD_ZI_D, ADD_ZZZ_D, ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, A...
14806
2.07k
    printSVERegOp(MI, 1, O, 'd');
14807
2.07k
    break;
14808
418
  case 10:
14809
    // ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMMLA_B_ZZI, BFMMLA_B_ZZZ, BFMMLA...
14810
418
    printSVERegOp(MI, 2, O, 'h');
14811
418
    break;
14812
5.44k
  case 11:
14813
    // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
14814
5.44k
    printVRegOperand(MI, 2, O);
14815
5.44k
    break;
14816
9.34k
  case 12:
14817
    // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm...
14818
9.34k
    printSVERegOp(MI, 1, O, 0);
14819
9.34k
    break;
14820
1.14k
  case 13:
14821
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID...
14822
1.14k
    SStream_concat0(O, "/m, ");
14823
1.14k
    break;
14824
1.55k
  case 14:
14825
    // ADD_ZI_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, AESIMC_ZZ_B, AESMC_ZZ_B, ...
14826
1.55k
    printSVERegOp(MI, 1, O, 'b');
14827
1.55k
    break;
14828
2.77k
  case 15:
14829
    // ADD_ZI_S, ADD_ZZZ_S, ADR_LSL_ZZZ_S_0, ADR_LSL_ZZZ_S_1, ADR_LSL_ZZZ_S_2...
14830
2.77k
    printSVERegOp(MI, 1, O, 's');
14831
2.77k
    break;
14832
1.02k
  case 16:
14833
    // ADRP
14834
1.02k
    printAdrpLabel(MI, 1, O);
14835
1.02k
    return;
14836
0
    break;
14837
24.8k
  case 17:
14838
    // AUTDA, AUTDB, AUTIA, AUTIB, BFMWri, BFMXri, CASAB, CASAH, CASALB, CASA...
14839
24.8k
    printOperand(MI, 2, O);
14840
24.8k
    break;
14841
149
  case 18:
14842
    // BFCVTNT_ZPmZ, BFCVT_ZPmZ, FCVTNT_ZPmZ_StoH, FCVT_ZPmZ_StoH, SCVTF_ZPmZ...
14843
149
    printSVERegOp(MI, 3, O, 's');
14844
149
    return;
14845
0
    break;
14846
768
  case 19:
14847
    // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv...
14848
768
    printImm(MI, 2, O);
14849
768
    printShifter(MI, 3, O);
14850
768
    return;
14851
0
    break;
14852
4.61k
  case 20:
14853
    // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P...
14854
4.61k
    printAlignedLabel(MI, 1, O);
14855
4.61k
    return;
14856
0
    break;
14857
256
  case 21:
14858
    // CDOT_ZZZI_S, CDOT_ZZZ_S, CMLA_ZZZ_B, EORBT_ZZZ_B, EORTB_ZZZ_B, SABA_ZZ...
14859
256
    printSVERegOp(MI, 2, O, 'b');
14860
256
    SStream_concat0(O, ", ");
14861
256
    break;
14862
1.76k
  case 22:
14863
    // CMPEQ_PPzZI_H, CMPEQ_PPzZZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_PPzZI_H, CMPGE...
14864
1.76k
    SStream_concat0(O, "/z, ");
14865
1.76k
    break;
14866
583
  case 23:
14867
    // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI, PTRUES_B, PTRUES_D, PTRUES...
14868
583
    printSVEPattern(MI, 1, O);
14869
583
    break;
14870
0
  case 24:
14871
    // CPY_ZPmI_H
14872
0
    printImm8OptLsl32(MI, 3, O);
14873
0
    return;
14874
0
    break;
14875
0
  case 25:
14876
    // CPY_ZPmR_H, CPY_ZPmV_H, INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr
14877
0
    printOperand(MI, 3, O);
14878
0
    return;
14879
0
    break;
14880
153
  case 26:
14881
    // DECB_XPiI, DECD_XPiI, DECD_ZPiI, DECH_XPiI, DECW_XPiI, DECW_ZPiI, INCB...
14882
153
    printSVEPattern(MI, 2, O);
14883
153
    SStream_concat0(O, ", mul ");
14884
153
    printOperand(MI, 3, O);
14885
153
    return;
14886
0
    break;
14887
675
  case 27:
14888
    // DUPM_ZI
14889
675
    printLogicalImm64(MI, 1, O);
14890
675
    return;
14891
0
    break;
14892
0
  case 28:
14893
    // DUP_ZI_B
14894
0
    printImm8OptLsl32(MI, 1, O);
14895
0
    return;
14896
0
    break;
14897
0
  case 29:
14898
    // DUP_ZI_D
14899
0
    printImm8OptLsl64(MI, 1, O);
14900
0
    return;
14901
0
    break;
14902
0
  case 30:
14903
    // DUP_ZI_S
14904
0
    printImm8OptLsl32(MI, 1, O);
14905
0
    return;
14906
0
    break;
14907
0
  case 31:
14908
    // DUP_ZZI_H, DUP_ZZI_Q
14909
0
    printVectorIndex(MI, 2, O);
14910
0
    return;
14911
0
    break;
14912
425
  case 32:
14913
    // EXT_ZZI_B, TBL_ZZZZ_B, TBL_ZZZ_B
14914
425
    printTypedVectorList(MI, 1, O, 0,'b');
14915
425
    SStream_concat0(O, ", ");
14916
425
    break;
14917
0
  case 33:
14918
    // FCPY_ZPmI_H
14919
0
    printFPImmOperand(MI, 3, O);
14920
0
    return;
14921
0
    break;
14922
19
  case 34:
14923
    // FCVT_ZPmZ_DtoH, SCVTF_ZPmZ_DtoH, UCVTF_ZPmZ_DtoH
14924
19
    printSVERegOp(MI, 3, O, 'd');
14925
19
    return;
14926
0
    break;
14927
652
  case 35:
14928
    // FDUP_ZI_D, FDUP_ZI_S, FMOVDi, FMOVHi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_...
14929
652
    printFPImmOperand(MI, 1, O);
14930
652
    return;
14931
0
    break;
14932
902
  case 36:
14933
    // INDEX_II_B, INDEX_IR_B
14934
902
    printSImm(MI, 1, O, 8);
14935
902
    SStream_concat0(O, ", ");
14936
902
    break;
14937
248
  case 37:
14938
    // INDEX_II_H
14939
248
    printSImm(MI, 2, O, 16);
14940
248
    return;
14941
0
    break;
14942
0
  case 38:
14943
    // INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
14944
0
    printSVERegOp(MI, 3, O, 0);
14945
0
    SStream_concat0(O, "/m, ");
14946
0
    break;
14947
77
  case 39:
14948
    // INSR_ZV_B
14949
77
    printZPRasFPR(MI, 2, O, 8);
14950
77
    return;
14951
0
    break;
14952
59
  case 40:
14953
    // INSR_ZV_D
14954
59
    printZPRasFPR(MI, 2, O, 64);
14955
59
    return;
14956
0
    break;
14957
30
  case 41:
14958
    // INSR_ZV_S
14959
30
    printZPRasFPR(MI, 2, O, 32);
14960
30
    return;
14961
0
    break;
14962
0
  case 42:
14963
    // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane
14964
0
    printVRegOperand(MI, 3, O);
14965
0
    break;
14966
745
  case 43:
14967
    // LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX...
14968
745
    SStream_concat0(O, "/z, [");
14969
745
    set_mem_access(MI, true);
14970
745
    printOperand(MI, 4, O);
14971
745
    SStream_concat0(O, ", ");
14972
745
    break;
14973
749
  case 44:
14974
    // LDADDAB, LDADDAH, LDADDALB, LDADDALH, LDADDALW, LDADDALX, LDADDAW, LDA...
14975
749
    printOperand(MI, 0, O);
14976
749
    SStream_concat0(O, ", [");
14977
749
    set_mem_access(MI, true);
14978
749
    printOperand(MI, 2, O);
14979
749
    SStream_concat0(O, "]");
14980
749
    set_mem_access(MI, false);
14981
749
    return;
14982
0
    break;
14983
1.22k
  case 45:
14984
    // MOVID, MOVIv2d_ns
14985
1.22k
    printSIMDType10Operand(MI, 1, O);
14986
1.22k
    return;
14987
0
    break;
14988
2.40k
  case 46:
14989
    // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl...
14990
2.40k
    printImm(MI, 1, O);
14991
2.40k
    break;
14992
3.01k
  case 47:
14993
    // MRS
14994
3.01k
    printMRSSystemRegister(MI, 1, O);
14995
3.01k
    return;
14996
0
    break;
14997
67
  case 48:
14998
    // PMULLv1i64
14999
67
    SStream_concat0(O, ".1d, ");
15000
67
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
15001
67
    printVRegOperand(MI, 2, O);
15002
67
    SStream_concat0(O, ".1d");
15003
67
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D);
15004
67
    return;
15005
0
    break;
15006
50
  case 49:
15007
    // PMULLv2i64
15008
50
    SStream_concat0(O, ".2d, ");
15009
50
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15010
50
    printVRegOperand(MI, 2, O);
15011
50
    SStream_concat0(O, ".2d");
15012
50
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15013
50
    return;
15014
0
    break;
15015
29
  case 50:
15016
    // REVD_ZPmZ
15017
29
    printSVERegOp(MI, 3, O, 'q');
15018
29
    return;
15019
0
    break;
15020
1.41k
  case 51:
15021
    // SQDECB_XPiWdI, SQDECD_XPiWdI, SQDECH_XPiWdI, SQDECW_XPiWdI, SQINCB_XPi...
15022
1.41k
    printGPR64as32(MI, 1, O);
15023
1.41k
    SStream_concat0(O, ", ");
15024
1.41k
    printSVEPattern(MI, 2, O);
15025
1.41k
    SStream_concat0(O, ", mul ");
15026
1.41k
    printOperand(MI, 3, O);
15027
1.41k
    return;
15028
0
    break;
15029
1.78k
  case 52:
15030
    // ST1_MXIPXX_H_B, ST1_MXIPXX_H_D, ST1_MXIPXX_H_H, ST1_MXIPXX_H_Q, ST1_MX...
15031
1.78k
    SStream_concat0(O, ", [");
15032
1.78k
    set_mem_access(MI, true);
15033
1.78k
    printOperand(MI, 4, O);
15034
1.78k
    SStream_concat0(O, ", ");
15035
1.78k
    break;
15036
628
  case 53:
15037
    // ST1i16_POST, ST2i8_POST
15038
628
    printPostIncOperand(MI, 4, O, 2);
15039
628
    return;
15040
0
    break;
15041
1.06k
  case 54:
15042
    // ST1i32_POST, ST2i16_POST, ST4i8_POST
15043
1.06k
    printPostIncOperand(MI, 4, O, 4);
15044
1.06k
    return;
15045
0
    break;
15046
310
  case 55:
15047
    // ST1i64_POST, ST2i32_POST, ST4i16_POST
15048
310
    printPostIncOperand(MI, 4, O, 8);
15049
310
    return;
15050
0
    break;
15051
191
  case 56:
15052
    // ST1i8_POST
15053
191
    printPostIncOperand(MI, 4, O, 1);
15054
191
    return;
15055
0
    break;
15056
509
  case 57:
15057
    // ST2i64_POST, ST4i32_POST
15058
509
    printPostIncOperand(MI, 4, O, 16);
15059
509
    return;
15060
0
    break;
15061
472
  case 58:
15062
    // ST3i16_POST
15063
472
    printPostIncOperand(MI, 4, O, 6);
15064
472
    return;
15065
0
    break;
15066
439
  case 59:
15067
    // ST3i32_POST
15068
439
    printPostIncOperand(MI, 4, O, 12);
15069
439
    return;
15070
0
    break;
15071
89
  case 60:
15072
    // ST3i64_POST
15073
89
    printPostIncOperand(MI, 4, O, 24);
15074
89
    return;
15075
0
    break;
15076
559
  case 61:
15077
    // ST3i8_POST
15078
559
    printPostIncOperand(MI, 4, O, 3);
15079
559
    return;
15080
0
    break;
15081
25
  case 62:
15082
    // ST4i64_POST
15083
25
    printPostIncOperand(MI, 4, O, 32);
15084
25
    return;
15085
0
    break;
15086
166
  case 63:
15087
    // ST64BV, ST64BV0
15088
166
    printGPR64x8(MI, 1, O);
15089
166
    SStream_concat0(O, ", [");
15090
166
    set_mem_access(MI, true);
15091
166
    printOperand(MI, 2, O);
15092
166
    SStream_concat0(O, "]");
15093
166
    set_mem_access(MI, false);
15094
166
    return;
15095
0
    break;
15096
1.77k
  case 64:
15097
    // SYSxt
15098
1.77k
    printSysCROperand(MI, 1, O);
15099
1.77k
    SStream_concat0(O, ", ");
15100
1.77k
    printSysCROperand(MI, 2, O);
15101
1.77k
    SStream_concat0(O, ", ");
15102
1.77k
    printOperand(MI, 3, O);
15103
1.77k
    SStream_concat0(O, ", ");
15104
1.77k
    printOperand(MI, 4, O);
15105
1.77k
    return;
15106
0
    break;
15107
96
  case 65:
15108
    // TBL_ZZZZ_D, TBL_ZZZ_D
15109
96
    printTypedVectorList(MI, 1, O, 0,'d');
15110
96
    SStream_concat0(O, ", ");
15111
96
    printSVERegOp(MI, 2, O, 'd');
15112
96
    return;
15113
0
    break;
15114
221
  case 66:
15115
    // TBL_ZZZZ_S, TBL_ZZZ_S
15116
221
    printTypedVectorList(MI, 1, O, 0,'s');
15117
221
    SStream_concat0(O, ", ");
15118
221
    printSVERegOp(MI, 2, O, 's');
15119
221
    return;
15120
0
    break;
15121
1.01k
  case 67:
15122
    // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB...
15123
1.01k
    printTypedVectorList(MI, 1, O, 16, 'b');
15124
1.01k
    SStream_concat0(O, ", ");
15125
1.01k
    printVRegOperand(MI, 2, O);
15126
1.01k
    break;
15127
751
  case 68:
15128
    // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB...
15129
751
    printTypedVectorList(MI, 2, O, 16, 'b');
15130
751
    SStream_concat0(O, ", ");
15131
751
    printVRegOperand(MI, 3, O);
15132
751
    break;
15133
167k
  }
15134
15135
15136
  // Fragment 3 encoded into 7 bits for 111 unique commands.
15137
  // printf("Fragment 3: %"PRIu64"\n", ((Bits >> 35) & 127));
15138
144k
  switch ((Bits >> 35) & 127) {
15139
0
  default: // unreachable
15140
1.08k
  case 0:
15141
    // ABS_ZPmZ_B, BRKA_PPmP, BRKB_PPmP, CDOT_ZZZI_S, CDOT_ZZZ_S, CLS_ZPmZ_B,...
15142
1.08k
    printSVERegOp(MI, 3, O, 'b');
15143
1.08k
    break;
15144
173
  case 1:
15145
    // ABS_ZPmZ_D, CLS_ZPmZ_D, CLZ_ZPmZ_D, CNOT_ZPmZ_D, CNT_ZPmZ_D, FABS_ZPmZ...
15146
173
    printSVERegOp(MI, 3, O, 'd');
15147
173
    return;
15148
0
    break;
15149
385
  case 2:
15150
    // ABS_ZPmZ_S, ADDHNT_ZZZ_H, CLS_ZPmZ_S, CLZ_ZPmZ_S, CNOT_ZPmZ_S, CNT_ZPm...
15151
385
    printSVERegOp(MI, 3, O, 's');
15152
385
    return;
15153
0
    break;
15154
421
  case 3:
15155
    // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ...
15156
421
    SStream_concat0(O, ".16b");
15157
421
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
15158
421
    return;
15159
0
    break;
15160
8.73k
  case 4:
15161
    // ABSv1i64, ADR, AESIMC_ZZ_B, AESMC_ZZ_B, AUTDA, AUTDB, AUTIA, AUTIB, BF...
15162
8.73k
    return;
15163
0
    break;
15164
358
  case 5:
15165
    // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV...
15166
358
    SStream_concat0(O, ".2s");
15167
358
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
15168
358
    return;
15169
0
    break;
15170
1.08k
  case 6:
15171
    // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64...
15172
1.08k
    SStream_concat0(O, ".2d");
15173
1.08k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15174
1.08k
    return;
15175
0
    break;
15176
65
  case 7:
15177
    // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FABSv4f16, FCVTASv4f16, FCVT...
15178
65
    SStream_concat0(O, ".4h");
15179
65
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
15180
65
    return;
15181
0
    break;
15182
532
  case 8:
15183
    // ABSv4i32, ADDVv4i32v, BFCVTN, BFCVTN2, CLSv4i32, CLZv4i32, FABSv4f32, ...
15184
532
    SStream_concat0(O, ".4s");
15185
532
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
15186
532
    return;
15187
0
    break;
15188
69
  case 9:
15189
    // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FABSv8f16, FCVTASv8f16, FCVT...
15190
69
    SStream_concat0(O, ".8h");
15191
69
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
15192
69
    return;
15193
0
    break;
15194
1.48k
  case 10:
15195
    // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv...
15196
1.48k
    SStream_concat0(O, ".8b");
15197
1.48k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
15198
1.48k
    return;
15199
0
    break;
15200
72.3k
  case 11:
15201
    // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD...
15202
72.3k
    SStream_concat0(O, ", ");
15203
72.3k
    break;
15204
77
  case 12:
15205
    // ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSUBHNB_ZZZ_H, SUBHNB_ZZZ_H
15206
77
    printSVERegOp(MI, 2, O, 's');
15207
77
    return;
15208
0
    break;
15209
1.41k
  case 13:
15210
    // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
15211
1.41k
    SStream_concat0(O, ".2d, ");
15212
1.41k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15213
1.41k
    break;
15214
1.55k
  case 14:
15215
    // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
15216
1.55k
    SStream_concat0(O, ".4s, ");
15217
1.55k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
15218
1.55k
    break;
15219
1.25k
  case 15:
15220
    // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BF16DOTlanev8b...
15221
1.25k
    SStream_concat0(O, ".8h, ");
15222
1.25k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
15223
1.25k
    break;
15224
3.20k
  case 16:
15225
    // ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm...
15226
3.20k
    SStream_concat0(O, "/m, ");
15227
3.20k
    break;
15228
3.01k
  case 17:
15229
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, ADD_ZZZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ...
15230
3.01k
    printSVERegOp(MI, 2, O, 'h');
15231
3.01k
    break;
15232
1.20k
  case 18:
15233
    // ADDPv16i8, ADDv16i8, ANDv16i8, BCAX, BICv16i8, BIFv16i8, BITv16i8, BSL...
15234
1.20k
    SStream_concat0(O, ".16b, ");
15235
1.20k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
15236
1.20k
    break;
15237
986
  case 19:
15238
    // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
15239
986
    SStream_concat0(O, ".2s, ");
15240
986
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
15241
986
    break;
15242
2.25k
  case 20:
15243
    // ADDPv4i16, ADDv4i16, BF16DOTlanev4bf16, BFDOTv4bf16, CMEQv4i16, CMGEv4...
15244
2.25k
    SStream_concat0(O, ".4h, ");
15245
2.25k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
15246
2.25k
    break;
15247
783
  case 21:
15248
    // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
15249
783
    SStream_concat0(O, ".8b, ");
15250
783
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
15251
783
    break;
15252
69
  case 22:
15253
    // ADD_ZI_H, SQADD_ZI_H, SQSUB_ZI_H, SUBR_ZI_H, SUB_ZI_H, UQADD_ZI_H, UQS...
15254
69
    printImm8OptLsl32(MI, 2, O);
15255
69
    return;
15256
0
    break;
15257
3.51k
  case 23:
15258
    // ANDS_PPzPP, AND_PPzPP, BICS_PPzPP, BIC_PPzPP, BRKAS_PPzP, BRKA_PPzP, B...
15259
3.51k
    SStream_concat0(O, "/z, ");
15260
3.51k
    break;
15261
27
  case 24:
15262
    // ASR_WIDE_ZZZ_H, LSL_WIDE_ZZZ_H, LSR_WIDE_ZZZ_H
15263
27
    printSVERegOp(MI, 2, O, 'd');
15264
27
    return;
15265
0
    break;
15266
1.00k
  case 25:
15267
    // ASR_ZZI_H, INDEX_IR_B, INDEX_RR_H, LSL_ZZI_H, LSR_ZZI_H, MUL_ZI_H, RSH...
15268
1.00k
    printOperand(MI, 2, O);
15269
1.00k
    return;
15270
0
    break;
15271
12.6k
  case 26:
15272
    // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH...
15273
12.6k
    SStream_concat0(O, ", [");
15274
12.6k
    set_mem_access(MI, true);
15275
12.6k
    break;
15276
177
  case 27:
15277
    // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz
15278
177
    SStream_concat0(O, ".16b, #0");
15279
177
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
15280
177
    arm64_op_addImm(MI, 0);
15281
177
    return;
15282
0
    break;
15283
67
  case 28:
15284
    // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz
15285
67
    SStream_concat0(O, ", #0");
15286
67
    op_addImm(MI, 0);
15287
67
    arm64_op_addImm(MI, 0);
15288
67
    return;
15289
0
    break;
15290
8
  case 29:
15291
    // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz
15292
8
    SStream_concat0(O, ".2s, #0");
15293
8
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
15294
8
    arm64_op_addImm(MI, 0);
15295
8
    return;
15296
0
    break;
15297
42
  case 30:
15298
    // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz
15299
42
    SStream_concat0(O, ".2d, #0");
15300
42
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15301
42
    arm64_op_addImm(MI, 0);
15302
42
    return;
15303
0
    break;
15304
26
  case 31:
15305
    // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz
15306
26
    SStream_concat0(O, ".4h, #0");
15307
26
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
15308
26
    arm64_op_addImm(MI, 0);
15309
26
    return;
15310
0
    break;
15311
33
  case 32:
15312
    // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz
15313
33
    SStream_concat0(O, ".4s, #0");
15314
33
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
15315
33
    arm64_op_addImm(MI, 0);
15316
33
    return;
15317
0
    break;
15318
392
  case 33:
15319
    // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz
15320
392
    SStream_concat0(O, ".8h, #0");
15321
392
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
15322
392
    arm64_op_addImm(MI, 0);
15323
392
    return;
15324
0
    break;
15325
57
  case 34:
15326
    // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz
15327
57
    SStream_concat0(O, ".8b, #0");
15328
57
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
15329
57
    arm64_op_addImm(MI, 0);
15330
57
    return;
15331
0
    break;
15332
920
  case 35:
15333
    // CMLA_ZZZI_H, CMLA_ZZZ_H, EORBT_ZZZ_H, EORTB_ZZZ_H, FADDA_VPZ_H, FCMLA_...
15334
920
    printSVERegOp(MI, 3, O, 'h');
15335
920
    break;
15336
583
  case 36:
15337
    // CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI
15338
583
    SStream_concat0(O, ", mul ");
15339
583
    printOperand(MI, 2, O);
15340
583
    return;
15341
0
    break;
15342
0
  case 37:
15343
    // CPY_ZPmI_B
15344
0
    printImm8OptLsl32(MI, 3, O);
15345
0
    return;
15346
0
    break;
15347
0
  case 38:
15348
    // CPY_ZPmI_D
15349
0
    printImm8OptLsl64(MI, 3, O);
15350
0
    return;
15351
0
    break;
15352
0
  case 39:
15353
    // CPY_ZPmI_S
15354
0
    printImm8OptLsl32(MI, 3, O);
15355
0
    return;
15356
0
    break;
15357
909
  case 40:
15358
    // CPY_ZPmR_B, CPY_ZPmR_D, CPY_ZPmR_S, CPY_ZPmV_B, CPY_ZPmV_D, CPY_ZPmV_S...
15359
909
    printOperand(MI, 3, O);
15360
909
    break;
15361
0
  case 41:
15362
    // CPY_ZPzI_H
15363
0
    printImm8OptLsl32(MI, 2, O);
15364
0
    return;
15365
0
    break;
15366
0
  case 42:
15367
    // DUP_ZZI_B, DUP_ZZI_D, DUP_ZZI_S
15368
0
    printVectorIndex(MI, 2, O);
15369
0
    return;
15370
0
    break;
15371
998
  case 43:
15372
    // DUPi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1...
15373
998
    SStream_concat0(O, ".h");
15374
998
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H);
15375
998
    break;
15376
770
  case 44:
15377
    // DUPi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, SMOVvi3...
15378
770
    SStream_concat0(O, ".s");
15379
770
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S);
15380
770
    break;
15381
227
  case 45:
15382
    // DUPi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64, UMOVvi64_idx...
15383
227
    SStream_concat0(O, ".d");
15384
227
    break;
15385
1.29k
  case 46:
15386
    // DUPi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to32...
15387
1.29k
    SStream_concat0(O, ".b");
15388
1.29k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1B);
15389
1.29k
    break;
15390
0
  case 47:
15391
    // EXTRACT_ZPMXI_H_H, EXTRACT_ZPMXI_H_Q
15392
0
    printMatrixTileVector(MI, 2, O, 0);
15393
0
    SStream_concat0(O, "[");
15394
0
    set_sme_index(MI, true);
15395
0
    printOperand(MI, 3, O);
15396
0
    SStream_concat0(O, ", ");
15397
0
    printMatrixIndex(MI, 4, O);
15398
0
    SStream_concat0(O, "]");
15399
0
    set_mem_access(MI, false);
15400
0
    return;
15401
0
    break;
15402
0
  case 48:
15403
    // EXTRACT_ZPMXI_V_H, EXTRACT_ZPMXI_V_Q
15404
0
    printMatrixTileVector(MI, 2, O, 1);
15405
0
    SStream_concat0(O, "[");
15406
0
    set_sme_index(MI, true);
15407
0
    printOperand(MI, 3, O);
15408
0
    SStream_concat0(O, ", ");
15409
0
    printMatrixIndex(MI, 4, O);
15410
0
    SStream_concat0(O, "]");
15411
0
    set_mem_access(MI, false);
15412
0
    return;
15413
0
    break;
15414
254
  case 49:
15415
    // EXT_ZZI_B, UMAX_ZI_H, UMIN_ZI_H
15416
254
    printImm(MI, 2, O);
15417
254
    return;
15418
0
    break;
15419
43
  case 50:
15420
    // FADDPv2i16p, FMAXNMPv2i16p, FMAXPv2i16p, FMINNMPv2i16p, FMINPv2i16p
15421
43
    SStream_concat0(O, ".2h");
15422
43
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H);
15423
43
    return;
15424
0
    break;
15425
71
  case 51:
15426
    // FCMEQv1i16rz, FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i16rz, FCMGEv1i32rz, ...
15427
71
    SStream_concat0(O, ", #0.0");
15428
71
    arm64_op_addFP(MI, 0);
15429
71
    return;
15430
0
    break;
15431
80
  case 52:
15432
    // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz
15433
80
    SStream_concat0(O, ".2s, #0.0");
15434
80
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
15435
80
    arm64_op_addFP(MI, 0);
15436
80
    return;
15437
0
    break;
15438
34
  case 53:
15439
    // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz
15440
34
    SStream_concat0(O, ".2d, #0.0");
15441
34
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
15442
34
    arm64_op_addFP(MI, 0);
15443
34
    return;
15444
0
    break;
15445
24
  case 54:
15446
    // FCMEQv4i16rz, FCMGEv4i16rz, FCMGTv4i16rz, FCMLEv4i16rz, FCMLTv4i16rz
15447
24
    SStream_concat0(O, ".4h, #0.0");
15448
24
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
15449
24
    arm64_op_addFP(MI, 0);
15450
24
    return;
15451
0
    break;
15452
189
  case 55:
15453
    // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz
15454
189
    SStream_concat0(O, ".4s, #0.0");
15455
189
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
15456
189
    arm64_op_addFP(MI, 0);
15457
189
    return;
15458
0
    break;
15459
63
  case 56:
15460
    // FCMEQv8i16rz, FCMGEv8i16rz, FCMGTv8i16rz, FCMLEv8i16rz, FCMLTv8i16rz
15461
63
    SStream_concat0(O, ".8h, #0.0");
15462
63
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
15463
63
    arm64_op_addFP(MI, 0);
15464
63
    return;
15465
0
    break;
15466
0
  case 57:
15467
    // FCPY_ZPmI_D, FCPY_ZPmI_S
15468
0
    printFPImmOperand(MI, 3, O);
15469
0
    return;
15470
0
    break;
15471
238
  case 58:
15472
    // FMLAL2lanev4f16, FMLAL2v4f16, FMLALlanev4f16, FMLALv4f16, FMLSL2lanev4...
15473
238
    SStream_concat0(O, ".2h, ");
15474
238
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H);
15475
238
    printVRegOperand(MI, 3, O);
15476
238
    break;
15477
50
  case 59:
15478
    // FMOPA_MPPZZ_D, FMOPS_MPPZZ_D, INSERT_MXIPZ_H_D, INSERT_MXIPZ_V_D
15479
50
    printSVERegOp(MI, 4, O, 'd');
15480
50
    return;
15481
0
    break;
15482
463
  case 60:
15483
    // FMOPA_MPPZZ_S, FMOPS_MPPZZ_S, INSERT_MXIPZ_H_S, INSERT_MXIPZ_V_S
15484
463
    printSVERegOp(MI, 4, O, 's');
15485
463
    return;
15486
0
    break;
15487
272
  case 61:
15488
    // INDEX_II_B
15489
272
    printSImm(MI, 2, O, 8);
15490
272
    return;
15491
0
    break;
15492
50
  case 62:
15493
    // INDEX_RI_H
15494
50
    printSImm(MI, 2, O, 16);
15495
50
    return;
15496
0
    break;
15497
0
  case 63:
15498
    // INSERT_MXIPZ_H_B, INSERT_MXIPZ_V_B
15499
0
    printSVERegOp(MI, 4, O, 'b');
15500
0
    return;
15501
0
    break;
15502
0
  case 64:
15503
    // INSERT_MXIPZ_H_H, INSERT_MXIPZ_V_H
15504
0
    printSVERegOp(MI, 4, O, 'h');
15505
0
    return;
15506
0
    break;
15507
0
  case 65:
15508
    // INSERT_MXIPZ_H_Q, INSERT_MXIPZ_V_Q
15509
0
    printSVERegOp(MI, 4, O, 'q');
15510
0
    return;
15511
0
    break;
15512
1.12k
  case 66:
15513
    // LD1_MXIPXX_H_B, LD1_MXIPXX_V_B, ST1_MXIPXX_H_B, ST1_MXIPXX_V_B
15514
1.12k
    printRegWithShiftExtend(MI, 5, O, false, 8, 'x', 0);
15515
1.12k
    SStream_concat0(O, "]");
15516
1.12k
    set_mem_access(MI, false);
15517
1.12k
    return;
15518
0
    break;
15519
268
  case 67:
15520
    // LD1_MXIPXX_H_D, LD1_MXIPXX_V_D, ST1_MXIPXX_H_D, ST1_MXIPXX_V_D
15521
268
    printRegWithShiftExtend(MI, 5, O, false, 64, 'x', 0);
15522
268
    SStream_concat0(O, "]");
15523
268
    set_mem_access(MI, false);
15524
268
    return;
15525
0
    break;
15526
245
  case 68:
15527
    // LD1_MXIPXX_H_H, LD1_MXIPXX_V_H, ST1_MXIPXX_H_H, ST1_MXIPXX_V_H
15528
245
    printRegWithShiftExtend(MI, 5, O, false, 16, 'x', 0);
15529
245
    SStream_concat0(O, "]");
15530
245
    set_mem_access(MI, false);
15531
245
    return;
15532
0
    break;
15533
702
  case 69:
15534
    // LD1_MXIPXX_H_Q, LD1_MXIPXX_V_Q, ST1_MXIPXX_H_Q, ST1_MXIPXX_V_Q
15535
702
    printRegWithShiftExtend(MI, 5, O, false, 128, 'x', 0);
15536
702
    SStream_concat0(O, "]");
15537
702
    set_mem_access(MI, false);
15538
702
    return;
15539
0
    break;
15540
184
  case 70:
15541
    // LD1_MXIPXX_H_S, LD1_MXIPXX_V_S, ST1_MXIPXX_H_S, ST1_MXIPXX_V_S
15542
184
    printRegWithShiftExtend(MI, 5, O, false, 32, 'x', 0);
15543
184
    SStream_concat0(O, "]");
15544
184
    set_mem_access(MI, false);
15545
184
    return;
15546
0
    break;
15547
2.10k
  case 71:
15548
    // LDAPRB, LDAPRH, LDAPRW, LDAPRX, LDARB, LDARH, LDARW, LDARX, LDAXRB, LD...
15549
2.10k
    SStream_concat0(O, "]");
15550
2.10k
    set_mem_access(MI, false);
15551
2.10k
    return;
15552
0
    break;
15553
3.68k
  case 72:
15554
    // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo...
15555
3.68k
    SStream_concat0(O, "], ");
15556
3.68k
    set_mem_access(MI, false);
15557
3.68k
    break;
15558
2.40k
  case 73:
15559
    // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ...
15560
2.40k
    printShifter(MI, 2, O);
15561
2.40k
    return;
15562
0
    break;
15563
535
  case 74:
15564
    // PMULLB_ZZZ_H, PMULLT_ZZZ_H, SABDLB_ZZZ_H, SABDLT_ZZZ_H, SADDLBT_ZZZ_H,...
15565
535
    printSVERegOp(MI, 2, O, 'b');
15566
535
    return;
15567
0
    break;
15568
79
  case 75:
15569
    // PRFB_D_SCALED
15570
79
    printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 'd');
15571
79
    SStream_concat0(O, "]");
15572
79
    set_mem_access(MI, false);
15573
79
    return;
15574
0
    break;
15575
57
  case 76:
15576
    // PRFB_D_SXTW_SCALED
15577
57
    printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 'd');
15578
57
    SStream_concat0(O, "]");
15579
57
    set_mem_access(MI, false);
15580
57
    return;
15581
0
    break;
15582
3
  case 77:
15583
    // PRFB_D_UXTW_SCALED
15584
3
    printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 'd');
15585
3
    SStream_concat0(O, "]");
15586
3
    set_mem_access(MI, false);
15587
3
    return;
15588
0
    break;
15589
134
  case 78:
15590
    // PRFB_PRR
15591
134
    printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 0);
15592
134
    SStream_concat0(O, "]");
15593
134
    set_mem_access(MI, false);
15594
134
    return;
15595
0
    break;
15596
460
  case 79:
15597
    // PRFB_S_SXTW_SCALED
15598
460
    printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 's');
15599
460
    SStream_concat0(O, "]");
15600
460
    set_mem_access(MI, false);
15601
460
    return;
15602
0
    break;
15603
313
  case 80:
15604
    // PRFB_S_UXTW_SCALED
15605
313
    printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 's');
15606
313
    SStream_concat0(O, "]");
15607
313
    set_mem_access(MI, false);
15608
313
    return;
15609
0
    break;
15610
87
  case 81:
15611
    // PRFD_D_PZI, PRFD_S_PZI
15612
87
    printImmScale(MI, 3, O, 8);
15613
87
    SStream_concat0(O, "]");
15614
87
    set_mem_access(MI, false);
15615
87
    return;
15616
0
    break;
15617
169
  case 82:
15618
    // PRFD_D_SCALED
15619
169
    printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 'd');
15620
169
    SStream_concat0(O, "]");
15621
169
    set_mem_access(MI, false);
15622
169
    return;
15623
0
    break;
15624
166
  case 83:
15625
    // PRFD_D_SXTW_SCALED
15626
166
    printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 'd');
15627
166
    SStream_concat0(O, "]");
15628
166
    set_mem_access(MI, false);
15629
166
    return;
15630
0
    break;
15631
64
  case 84:
15632
    // PRFD_D_UXTW_SCALED
15633
64
    printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 'd');
15634
64
    SStream_concat0(O, "]");
15635
64
    set_mem_access(MI, false);
15636
64
    return;
15637
0
    break;
15638
100
  case 85:
15639
    // PRFD_PRR
15640
100
    printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 0);
15641
100
    SStream_concat0(O, "]");
15642
100
    set_mem_access(MI, false);
15643
100
    return;
15644
0
    break;
15645
43
  case 86:
15646
    // PRFD_S_SXTW_SCALED
15647
43
    printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 's');
15648
43
    SStream_concat0(O, "]");
15649
43
    set_mem_access(MI, false);
15650
43
    return;
15651
0
    break;
15652
49
  case 87:
15653
    // PRFD_S_UXTW_SCALED
15654
49
    printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 's');
15655
49
    SStream_concat0(O, "]");
15656
49
    set_mem_access(MI, false);
15657
49
    return;
15658
0
    break;
15659
277
  case 88:
15660
    // PRFH_D_PZI, PRFH_S_PZI
15661
277
    printImmScale(MI, 3, O, 2);
15662
277
    SStream_concat0(O, "]");
15663
277
    set_mem_access(MI, false);
15664
277
    return;
15665
0
    break;
15666
204
  case 89:
15667
    // PRFH_D_SCALED
15668
204
    printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 'd');
15669
204
    SStream_concat0(O, "]");
15670
204
    set_mem_access(MI, false);
15671
204
    return;
15672
0
    break;
15673
101
  case 90:
15674
    // PRFH_D_SXTW_SCALED
15675
101
    printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 'd');
15676
101
    SStream_concat0(O, "]");
15677
101
    set_mem_access(MI, false);
15678
101
    return;
15679
0
    break;
15680
357
  case 91:
15681
    // PRFH_D_UXTW_SCALED
15682
357
    printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 'd');
15683
357
    SStream_concat0(O, "]");
15684
357
    set_mem_access(MI, false);
15685
357
    return;
15686
0
    break;
15687
116
  case 92:
15688
    // PRFH_PRR
15689
116
    printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 0);
15690
116
    SStream_concat0(O, "]");
15691
116
    set_mem_access(MI, false);
15692
116
    return;
15693
0
    break;
15694
417
  case 93:
15695
    // PRFH_S_SXTW_SCALED
15696
417
    printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 's');
15697
417
    SStream_concat0(O, "]");
15698
417
    set_mem_access(MI, false);
15699
417
    return;
15700
0
    break;
15701
210
  case 94:
15702
    // PRFH_S_UXTW_SCALED
15703
210
    printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 's');
15704
210
    SStream_concat0(O, "]");
15705
210
    set_mem_access(MI, false);
15706
210
    return;
15707
0
    break;
15708
54
  case 95:
15709
    // PRFS_PRR
15710
54
    printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 0);
15711
54
    SStream_concat0(O, "]");
15712
54
    set_mem_access(MI, false);
15713
54
    return;
15714
0
    break;
15715
66
  case 96:
15716
    // PRFW_D_PZI, PRFW_S_PZI
15717
66
    printImmScale(MI, 3, O, 4);
15718
66
    SStream_concat0(O, "]");
15719
66
    set_mem_access(MI, false);
15720
66
    return;
15721
0
    break;
15722
187
  case 97:
15723
    // PRFW_D_SCALED
15724
187
    printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 'd');
15725
187
    SStream_concat0(O, "]");
15726
187
    set_mem_access(MI, false);
15727
187
    return;
15728
0
    break;
15729
66
  case 98:
15730
    // PRFW_D_SXTW_SCALED
15731
66
    printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 'd');
15732
66
    SStream_concat0(O, "]");
15733
66
    set_mem_access(MI, false);
15734
66
    return;
15735
0
    break;
15736
166
  case 99:
15737
    // PRFW_D_UXTW_SCALED
15738
166
    printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 'd');
15739
166
    SStream_concat0(O, "]");
15740
166
    set_mem_access(MI, false);
15741
166
    return;
15742
0
    break;
15743
39
  case 100:
15744
    // PRFW_S_SXTW_SCALED
15745
39
    printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 's');
15746
39
    SStream_concat0(O, "]");
15747
39
    set_mem_access(MI, false);
15748
39
    return;
15749
0
    break;
15750
90
  case 101:
15751
    // PRFW_S_UXTW_SCALED
15752
90
    printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 's');
15753
90
    SStream_concat0(O, "]");
15754
90
    set_mem_access(MI, false);
15755
90
    return;
15756
0
    break;
15757
24
  case 102:
15758
    // RDFFRS_PPz, RDFFR_PPz_REAL
15759
24
    SStream_concat0(O, "/z");
15760
24
    return;
15761
0
    break;
15762
439
  case 103:
15763
    // SHLLv16i8
15764
439
    SStream_concat0(O, ".16b, #8");
15765
439
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
15766
439
    arm64_op_addImm(MI, 8);
15767
439
    return;
15768
0
    break;
15769
89
  case 104:
15770
    // SHLLv2i32
15771
89
    SStream_concat0(O, ".2s, #32");
15772
89
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
15773
89
    arm64_op_addImm(MI, 32);
15774
89
    return;
15775
0
    break;
15776
47
  case 105:
15777
    // SHLLv4i16
15778
47
    SStream_concat0(O, ".4h, #16");
15779
47
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
15780
47
    arm64_op_addImm(MI, 16);
15781
47
    return;
15782
0
    break;
15783
70
  case 106:
15784
    // SHLLv4i32
15785
70
    SStream_concat0(O, ".4s, #32");
15786
70
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
15787
70
    arm64_op_addImm(MI, 32);
15788
70
    return;
15789
0
    break;
15790
16
  case 107:
15791
    // SHLLv8i16
15792
16
    SStream_concat0(O, ".8h, #16");
15793
16
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
15794
16
    arm64_op_addImm(MI, 16);
15795
16
    return;
15796
0
    break;
15797
29
  case 108:
15798
    // SHLLv8i8
15799
29
    SStream_concat0(O, ".8b, #8");
15800
29
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
15801
29
    arm64_op_addImm(MI, 8);
15802
29
    return;
15803
0
    break;
15804
22
  case 109:
15805
    // SPLICE_ZPZZ_H
15806
22
    printTypedVectorList(MI, 2, O, 0,'h');
15807
22
    return;
15808
0
    break;
15809
344
  case 110:
15810
    // TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, ZIP1_ZZZ_Q, ZIP2_ZZZ_Q
15811
344
    printSVERegOp(MI, 2, O, 'q');
15812
344
    return;
15813
0
    break;
15814
144k
  }
15815
15816
15817
  // Fragment 4 encoded into 7 bits for 94 unique commands.
15818
  // printf("Fragment 4: %"PRIu64"\n", ((Bits >> 42) & 127));
15819
114k
  switch ((Bits >> 42) & 127) {
15820
0
  default: // unreachable
15821
1.49k
  case 0:
15822
    // ABS_ZPmZ_B, ADD_ZZZ_H, BDEP_ZZZ_H, BEXT_ZZZ_H, BGRP_ZZZ_H, BRKA_PPmP, ...
15823
1.49k
    return;
15824
0
    break;
15825
508
  case 1:
15826
    // ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, EORBT_ZZZ_D, EORTB...
15827
508
    printSVERegOp(MI, 3, O, 'd');
15828
508
    break;
15829
910
  case 2:
15830
    // ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, EORBT_ZZZ_S, EORTB_...
15831
910
    printSVERegOp(MI, 3, O, 's');
15832
910
    break;
15833
31.3k
  case 3:
15834
    // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPL_XXI, ADDSXrx64, ADDVL_XXI, ADDXrx6...
15835
31.3k
    printOperand(MI, 2, O);
15836
31.3k
    break;
15837
886
  case 4:
15838
    // ADDG, ST2GOffset, STGOffset, STZ2GOffset, STZGOffset, SUBG
15839
886
    printImmScale(MI, 2, O, 16);
15840
886
    break;
15841
651
  case 5:
15842
    // ADDHNB_ZZZ_B, CNTP_XPP_H, LASTA_RPZ_H, LASTA_VPZ_H, LASTB_RPZ_H, LASTB...
15843
651
    printSVERegOp(MI, 2, O, 'h');
15844
651
    break;
15845
1.66k
  case 6:
15846
    // ADDHNB_ZZZ_S, ADDP_ZPmZ_D, ADD_ZPmZ_D, ADD_ZZZ_D, AND_ZPmZ_D, AND_ZZZ,...
15847
1.66k
    printSVERegOp(MI, 2, O, 'd');
15848
1.66k
    break;
15849
325
  case 7:
15850
    // ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMMLA_B_ZZI, BFMMLA_B_ZZZ, BFMMLA...
15851
325
    printSVERegOp(MI, 3, O, 'h');
15852
325
    break;
15853
4.11k
  case 8:
15854
    // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2...
15855
4.11k
    printVRegOperand(MI, 2, O);
15856
4.11k
    break;
15857
3.44k
  case 9:
15858
    // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BF16DOTlanev4bf1...
15859
3.44k
    printVRegOperand(MI, 3, O);
15860
3.44k
    break;
15861
3.93k
  case 10:
15862
    // ADDP_ZPmZ_B, ADD_ZPmZ_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, ANDS_PPzPP...
15863
3.93k
    printSVERegOp(MI, 2, O, 'b');
15864
3.93k
    break;
15865
2.68k
  case 11:
15866
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID...
15867
2.68k
    SStream_concat0(O, ", ");
15868
2.68k
    break;
15869
2.20k
  case 12:
15870
    // ADDP_ZPmZ_S, ADD_ZPmZ_S, ADD_ZZZ_S, AND_ZPmZ_S, ASRD_ZPmI_S, ASRR_ZPmZ...
15871
2.20k
    printSVERegOp(MI, 2, O, 's');
15872
2.20k
    break;
15873
2.02k
  case 13:
15874
    // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri
15875
2.02k
    printAddSubImm(MI, 2, O);
15876
2.02k
    return;
15877
0
    break;
15878
5.98k
  case 14:
15879
    // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI...
15880
5.98k
    printShiftedRegister(MI, 2, O);
15881
5.98k
    return;
15882
0
    break;
15883
1.67k
  case 15:
15884
    // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx
15885
1.67k
    printExtendedRegister(MI, 2, O);
15886
1.67k
    return;
15887
0
    break;
15888
184
  case 16:
15889
    // ADD_ZI_B, SQADD_ZI_B, SQSUB_ZI_B, SUBR_ZI_B, SUB_ZI_B, UQADD_ZI_B, UQS...
15890
184
    printImm8OptLsl32(MI, 2, O);
15891
184
    return;
15892
0
    break;
15893
52
  case 17:
15894
    // ADD_ZI_D, SQADD_ZI_D, SQSUB_ZI_D, SUBR_ZI_D, SUB_ZI_D, UQADD_ZI_D, UQS...
15895
52
    printImm8OptLsl64(MI, 2, O);
15896
52
    return;
15897
0
    break;
15898
38
  case 18:
15899
    // ADD_ZI_S, SQADD_ZI_S, SQSUB_ZI_S, SUBR_ZI_S, SUB_ZI_S, UQADD_ZI_S, UQS...
15900
38
    printImm8OptLsl32(MI, 2, O);
15901
38
    return;
15902
0
    break;
15903
44
  case 19:
15904
    // ADR_LSL_ZZZ_D_0
15905
44
    printRegWithShiftExtend(MI, 2, O, false, 8, 'x', 'd');
15906
44
    SStream_concat0(O, "]");
15907
44
    set_mem_access(MI, false);
15908
44
    return;
15909
0
    break;
15910
61
  case 20:
15911
    // ADR_LSL_ZZZ_D_1
15912
61
    printRegWithShiftExtend(MI, 2, O, false, 16, 'x', 'd');
15913
61
    SStream_concat0(O, "]");
15914
61
    set_mem_access(MI, false);
15915
61
    return;
15916
0
    break;
15917
164
  case 21:
15918
    // ADR_LSL_ZZZ_D_2
15919
164
    printRegWithShiftExtend(MI, 2, O, false, 32, 'x', 'd');
15920
164
    SStream_concat0(O, "]");
15921
164
    set_mem_access(MI, false);
15922
164
    return;
15923
0
    break;
15924
89
  case 22:
15925
    // ADR_LSL_ZZZ_D_3
15926
89
    printRegWithShiftExtend(MI, 2, O, false, 64, 'x', 'd');
15927
89
    SStream_concat0(O, "]");
15928
89
    set_mem_access(MI, false);
15929
89
    return;
15930
0
    break;
15931
62
  case 23:
15932
    // ADR_LSL_ZZZ_S_0
15933
62
    printRegWithShiftExtend(MI, 2, O, false, 8, 'x', 's');
15934
62
    SStream_concat0(O, "]");
15935
62
    set_mem_access(MI, false);
15936
62
    return;
15937
0
    break;
15938
66
  case 24:
15939
    // ADR_LSL_ZZZ_S_1
15940
66
    printRegWithShiftExtend(MI, 2, O, false, 16, 'x', 's');
15941
66
    SStream_concat0(O, "]");
15942
66
    set_mem_access(MI, false);
15943
66
    return;
15944
0
    break;
15945
92
  case 25:
15946
    // ADR_LSL_ZZZ_S_2
15947
92
    printRegWithShiftExtend(MI, 2, O, false, 32, 'x', 's');
15948
92
    SStream_concat0(O, "]");
15949
92
    set_mem_access(MI, false);
15950
92
    return;
15951
0
    break;
15952
53
  case 26:
15953
    // ADR_LSL_ZZZ_S_3
15954
53
    printRegWithShiftExtend(MI, 2, O, false, 64, 'x', 's');
15955
53
    SStream_concat0(O, "]");
15956
53
    set_mem_access(MI, false);
15957
53
    return;
15958
0
    break;
15959
20
  case 27:
15960
    // ADR_SXTW_ZZZ_D_0
15961
20
    printRegWithShiftExtend(MI, 2, O, true, 8, 'w', 'd');
15962
20
    SStream_concat0(O, "]");
15963
20
    set_mem_access(MI, false);
15964
20
    return;
15965
0
    break;
15966
189
  case 28:
15967
    // ADR_SXTW_ZZZ_D_1
15968
189
    printRegWithShiftExtend(MI, 2, O, true, 16, 'w', 'd');
15969
189
    SStream_concat0(O, "]");
15970
189
    set_mem_access(MI, false);
15971
189
    return;
15972
0
    break;
15973
13
  case 29:
15974
    // ADR_SXTW_ZZZ_D_2
15975
13
    printRegWithShiftExtend(MI, 2, O, true, 32, 'w', 'd');
15976
13
    SStream_concat0(O, "]");
15977
13
    set_mem_access(MI, false);
15978
13
    return;
15979
0
    break;
15980
166
  case 30:
15981
    // ADR_SXTW_ZZZ_D_3
15982
166
    printRegWithShiftExtend(MI, 2, O, true, 64, 'w', 'd');
15983
166
    SStream_concat0(O, "]");
15984
166
    set_mem_access(MI, false);
15985
166
    return;
15986
0
    break;
15987
61
  case 31:
15988
    // ADR_UXTW_ZZZ_D_0
15989
61
    printRegWithShiftExtend(MI, 2, O, false, 8, 'w', 'd');
15990
61
    SStream_concat0(O, "]");
15991
61
    set_mem_access(MI, false);
15992
61
    return;
15993
0
    break;
15994
169
  case 32:
15995
    // ADR_UXTW_ZZZ_D_1
15996
169
    printRegWithShiftExtend(MI, 2, O, false, 16, 'w', 'd');
15997
169
    SStream_concat0(O, "]");
15998
169
    set_mem_access(MI, false);
15999
169
    return;
16000
0
    break;
16001
201
  case 33:
16002
    // ADR_UXTW_ZZZ_D_2
16003
201
    printRegWithShiftExtend(MI, 2, O, false, 32, 'w', 'd');
16004
201
    SStream_concat0(O, "]");
16005
201
    set_mem_access(MI, false);
16006
201
    return;
16007
0
    break;
16008
35
  case 34:
16009
    // ADR_UXTW_ZZZ_D_3
16010
35
    printRegWithShiftExtend(MI, 2, O, false, 64, 'w', 'd');
16011
35
    SStream_concat0(O, "]");
16012
35
    set_mem_access(MI, false);
16013
35
    return;
16014
0
    break;
16015
773
  case 35:
16016
    // ANDSWri, ANDWri, EORWri, ORRWri
16017
773
    printLogicalImm32(MI, 2, O);
16018
773
    return;
16019
0
    break;
16020
2.57k
  case 36:
16021
    // ANDSXri, ANDXri, AND_ZI, EORXri, EOR_ZI, ORRXri, ORR_ZI
16022
2.57k
    printLogicalImm64(MI, 2, O);
16023
2.57k
    return;
16024
0
    break;
16025
15.2k
  case 37:
16026
    // BFMWri, BFMXri, CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, C...
16027
15.2k
    printOperand(MI, 3, O);
16028
15.2k
    break;
16029
310
  case 38:
16030
    // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, FMLA_ZZZI_H, FMLS_ZZZI_H, INSv...
16031
310
    printVectorIndex(MI, 4, O);
16032
310
    break;
16033
0
  case 39:
16034
    // CPY_ZPzI_B
16035
0
    printImm8OptLsl32(MI, 2, O);
16036
0
    return;
16037
0
    break;
16038
0
  case 40:
16039
    // CPY_ZPzI_D
16040
0
    printImm8OptLsl64(MI, 2, O);
16041
0
    return;
16042
0
    break;
16043
0
  case 41:
16044
    // CPY_ZPzI_S
16045
0
    printImm8OptLsl32(MI, 2, O);
16046
0
    return;
16047
0
    break;
16048
3.28k
  case 42:
16049
    // DUPi16, DUPi32, DUPi64, DUPi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan...
16050
3.28k
    printVectorIndex(MI, 2, O);
16051
3.28k
    return;
16052
0
    break;
16053
0
  case 43:
16054
    // EXTRACT_ZPMXI_H_B, EXTRACT_ZPMXI_H_D, EXTRACT_ZPMXI_H_S
16055
0
    printMatrixTileVector(MI, 2, O, 0);
16056
0
    SStream_concat0(O, "[");
16057
0
    set_sme_index(MI, true);
16058
0
    printOperand(MI, 3, O);
16059
0
    SStream_concat0(O, ", ");
16060
0
    printMatrixIndex(MI, 4, O);
16061
0
    SStream_concat0(O, "]");
16062
0
    set_mem_access(MI, false);
16063
0
    return;
16064
0
    break;
16065
0
  case 44:
16066
    // EXTRACT_ZPMXI_V_B, EXTRACT_ZPMXI_V_D, EXTRACT_ZPMXI_V_S
16067
0
    printMatrixTileVector(MI, 2, O, 1);
16068
0
    SStream_concat0(O, "[");
16069
0
    set_sme_index(MI, true);
16070
0
    printOperand(MI, 3, O);
16071
0
    SStream_concat0(O, ", ");
16072
0
    printMatrixIndex(MI, 4, O);
16073
0
    SStream_concat0(O, "]");
16074
0
    set_mem_access(MI, false);
16075
0
    return;
16076
0
    break;
16077
660
  case 45:
16078
    // FCMEQ_PPzZ0_H, FCMGE_PPzZ0_H, FCMGT_PPzZ0_H, FCMLE_PPzZ0_H, FCMLT_PPzZ...
16079
660
    SStream_concat0(O, ", #0.0");
16080
660
    arm64_op_addFP(MI, 0);
16081
660
    return;
16082
0
    break;
16083
68
  case 46:
16084
    // FMLAL2lanev4f16, FMLALlanev4f16, FMLSL2lanev4f16, FMLSLlanev4f16
16085
68
    SStream_concat0(O, ".h");
16086
68
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H);
16087
68
    printVectorIndex(MI, 4, O);
16088
68
    return;
16089
0
    break;
16090
170
  case 47:
16091
    // FMLAL2v4f16, FMLALv4f16, FMLSL2v4f16, FMLSLv4f16
16092
170
    SStream_concat0(O, ".2h");
16093
170
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H);
16094
170
    return;
16095
0
    break;
16096
152
  case 48:
16097
    // FMUL_ZZZI_H, MUL_ZZZI_H, SQDMULH_ZZZI_H, SQRDMULH_ZZZI_H
16098
152
    printVectorIndex(MI, 3, O);
16099
152
    return;
16100
0
    break;
16101
763
  case 49:
16102
    // GLD1B_D_REAL, GLD1D_REAL, GLD1H_D_REAL, GLD1SB_D_REAL, GLD1SH_D_REAL, ...
16103
763
    printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 'd');
16104
763
    SStream_concat0(O, "]");
16105
763
    set_mem_access(MI, false);
16106
763
    return;
16107
0
    break;
16108
431
  case 50:
16109
    // GLD1B_D_SXTW_REAL, GLD1D_SXTW_REAL, GLD1H_D_SXTW_REAL, GLD1SB_D_SXTW_R...
16110
431
    printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 'd');
16111
431
    SStream_concat0(O, "]");
16112
431
    set_mem_access(MI, false);
16113
431
    return;
16114
0
    break;
16115
908
  case 51:
16116
    // GLD1B_D_UXTW_REAL, GLD1D_UXTW_REAL, GLD1H_D_UXTW_REAL, GLD1SB_D_UXTW_R...
16117
908
    printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 'd');
16118
908
    SStream_concat0(O, "]");
16119
908
    set_mem_access(MI, false);
16120
908
    return;
16121
0
    break;
16122
545
  case 52:
16123
    // GLD1B_S_SXTW_REAL, GLD1H_S_SXTW_REAL, GLD1SB_S_SXTW_REAL, GLD1SH_S_SXT...
16124
545
    printRegWithShiftExtend(MI, 3, O, true, 8, 'w', 's');
16125
545
    SStream_concat0(O, "]");
16126
545
    set_mem_access(MI, false);
16127
545
    return;
16128
0
    break;
16129
543
  case 53:
16130
    // GLD1B_S_UXTW_REAL, GLD1H_S_UXTW_REAL, GLD1SB_S_UXTW_REAL, GLD1SH_S_UXT...
16131
543
    printRegWithShiftExtend(MI, 3, O, false, 8, 'w', 's');
16132
543
    SStream_concat0(O, "]");
16133
543
    set_mem_access(MI, false);
16134
543
    return;
16135
0
    break;
16136
566
  case 54:
16137
    // GLD1D_IMM_REAL, GLDFF1D_IMM_REAL, LD1RD_IMM, LDRAAwriteback, LDRABwrit...
16138
566
    printImmScale(MI, 3, O, 8);
16139
566
    break;
16140
384
  case 55:
16141
    // GLD1D_SCALED_REAL, GLDFF1D_SCALED_REAL, SST1D_SCALED_SCALED_REAL
16142
384
    printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 'd');
16143
384
    SStream_concat0(O, "]");
16144
384
    set_mem_access(MI, false);
16145
384
    return;
16146
0
    break;
16147
47
  case 56:
16148
    // GLD1D_SXTW_SCALED_REAL, GLDFF1D_SXTW_SCALED_REAL, SST1D_SXTW_SCALED
16149
47
    printRegWithShiftExtend(MI, 3, O, true, 64, 'w', 'd');
16150
47
    SStream_concat0(O, "]");
16151
47
    set_mem_access(MI, false);
16152
47
    return;
16153
0
    break;
16154
53
  case 57:
16155
    // GLD1D_UXTW_SCALED_REAL, GLDFF1D_UXTW_SCALED_REAL, SST1D_UXTW_SCALED
16156
53
    printRegWithShiftExtend(MI, 3, O, false, 64, 'w', 'd');
16157
53
    SStream_concat0(O, "]");
16158
53
    set_mem_access(MI, false);
16159
53
    return;
16160
0
    break;
16161
900
  case 58:
16162
    // GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL, GLD1SH_D_IMM_REAL, GLD1SH_S_IMM_RE...
16163
900
    printImmScale(MI, 3, O, 2);
16164
900
    break;
16165
250
  case 59:
16166
    // GLD1H_D_SCALED_REAL, GLD1SH_D_SCALED_REAL, GLDFF1H_D_SCALED_REAL, GLDF...
16167
250
    printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 'd');
16168
250
    SStream_concat0(O, "]");
16169
250
    set_mem_access(MI, false);
16170
250
    return;
16171
0
    break;
16172
391
  case 60:
16173
    // GLD1H_D_SXTW_SCALED_REAL, GLD1SH_D_SXTW_SCALED_REAL, GLDFF1H_D_SXTW_SC...
16174
391
    printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 'd');
16175
391
    SStream_concat0(O, "]");
16176
391
    set_mem_access(MI, false);
16177
391
    return;
16178
0
    break;
16179
27
  case 61:
16180
    // GLD1H_D_UXTW_SCALED_REAL, GLD1SH_D_UXTW_SCALED_REAL, GLDFF1H_D_UXTW_SC...
16181
27
    printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 'd');
16182
27
    SStream_concat0(O, "]");
16183
27
    set_mem_access(MI, false);
16184
27
    return;
16185
0
    break;
16186
385
  case 62:
16187
    // GLD1H_S_SXTW_SCALED_REAL, GLD1SH_S_SXTW_SCALED_REAL, GLDFF1H_S_SXTW_SC...
16188
385
    printRegWithShiftExtend(MI, 3, O, true, 16, 'w', 's');
16189
385
    SStream_concat0(O, "]");
16190
385
    set_mem_access(MI, false);
16191
385
    return;
16192
0
    break;
16193
144
  case 63:
16194
    // GLD1H_S_UXTW_SCALED_REAL, GLD1SH_S_UXTW_SCALED_REAL, GLDFF1H_S_UXTW_SC...
16195
144
    printRegWithShiftExtend(MI, 3, O, false, 16, 'w', 's');
16196
144
    SStream_concat0(O, "]");
16197
144
    set_mem_access(MI, false);
16198
144
    return;
16199
0
    break;
16200
1.03k
  case 64:
16201
    // GLD1SW_D_IMM_REAL, GLD1W_D_IMM_REAL, GLD1W_IMM_REAL, GLDFF1SW_D_IMM_RE...
16202
1.03k
    printImmScale(MI, 3, O, 4);
16203
1.03k
    break;
16204
360
  case 65:
16205
    // GLD1SW_D_SCALED_REAL, GLD1W_D_SCALED_REAL, GLDFF1SW_D_SCALED_REAL, GLD...
16206
360
    printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 'd');
16207
360
    SStream_concat0(O, "]");
16208
360
    set_mem_access(MI, false);
16209
360
    return;
16210
0
    break;
16211
77
  case 66:
16212
    // GLD1SW_D_SXTW_SCALED_REAL, GLD1W_D_SXTW_SCALED_REAL, GLDFF1SW_D_SXTW_S...
16213
77
    printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 'd');
16214
77
    SStream_concat0(O, "]");
16215
77
    set_mem_access(MI, false);
16216
77
    return;
16217
0
    break;
16218
30
  case 67:
16219
    // GLD1SW_D_UXTW_SCALED_REAL, GLD1W_D_UXTW_SCALED_REAL, GLDFF1SW_D_UXTW_S...
16220
30
    printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 'd');
16221
30
    SStream_concat0(O, "]");
16222
30
    set_mem_access(MI, false);
16223
30
    return;
16224
0
    break;
16225
149
  case 68:
16226
    // GLD1W_SXTW_SCALED_REAL, GLDFF1W_SXTW_SCALED_REAL, SST1W_SXTW_SCALED
16227
149
    printRegWithShiftExtend(MI, 3, O, true, 32, 'w', 's');
16228
149
    SStream_concat0(O, "]");
16229
149
    set_mem_access(MI, false);
16230
149
    return;
16231
0
    break;
16232
241
  case 69:
16233
    // GLD1W_UXTW_SCALED_REAL, GLDFF1W_UXTW_SCALED_REAL, SST1W_UXTW_SCALED
16234
241
    printRegWithShiftExtend(MI, 3, O, false, 32, 'w', 's');
16235
241
    SStream_concat0(O, "]");
16236
241
    set_mem_access(MI, false);
16237
241
    return;
16238
0
    break;
16239
85
  case 70:
16240
    // INDEX_RI_B
16241
85
    printSImm(MI, 2, O, 8);
16242
85
    return;
16243
0
    break;
16244
344
  case 71:
16245
    // LD1B, LD1B_D, LD1B_H, LD1B_S, LD1RO_B, LD1RQ_B, LD1SB_D, LD1SB_H, LD1S...
16246
344
    printRegWithShiftExtend(MI, 3, O, false, 8, 'x', 0);
16247
344
    SStream_concat0(O, "]");
16248
344
    set_mem_access(MI, false);
16249
344
    return;
16250
0
    break;
16251
445
  case 72:
16252
    // LD1D, LD1RO_D, LD1RQ_D, LD2D, LD3D, LD4D, LDFF1D_REAL, LDNT1D_ZRR, ST1...
16253
445
    printRegWithShiftExtend(MI, 3, O, false, 64, 'x', 0);
16254
445
    SStream_concat0(O, "]");
16255
445
    set_mem_access(MI, false);
16256
445
    return;
16257
0
    break;
16258
189
  case 73:
16259
    // LD1H, LD1H_D, LD1H_S, LD1RO_H, LD1RQ_H, LD1SH_D, LD1SH_S, LD2H, LD3H, ...
16260
189
    printRegWithShiftExtend(MI, 3, O, false, 16, 'x', 0);
16261
189
    SStream_concat0(O, "]");
16262
189
    set_mem_access(MI, false);
16263
189
    return;
16264
0
    break;
16265
217
  case 74:
16266
    // LD1RO_B_IMM, LD1RO_D_IMM, LD1RO_H_IMM, LD1RO_W_IMM
16267
217
    printImmScale(MI, 3, O, 32);
16268
217
    SStream_concat0(O, "]");
16269
217
    set_mem_access(MI, false);
16270
217
    return;
16271
0
    break;
16272
626
  case 75:
16273
    // LD1RO_W, LD1RQ_W, LD1SW_D, LD1W, LD1W_D, LD2W, LD3W, LD4W, LDFF1SW_D_R...
16274
626
    printRegWithShiftExtend(MI, 3, O, false, 32, 'x', 0);
16275
626
    SStream_concat0(O, "]");
16276
626
    set_mem_access(MI, false);
16277
626
    return;
16278
0
    break;
16279
1.85k
  case 76:
16280
    // LD1RQ_B_IMM, LD1RQ_D_IMM, LD1RQ_H_IMM, LD1RQ_W_IMM, LDG, ST2GPostIndex...
16281
1.85k
    printImmScale(MI, 3, O, 16);
16282
1.85k
    break;
16283
339
  case 77:
16284
    // LD3B_IMM, LD3D_IMM, LD3H_IMM, LD3W_IMM, ST3B_IMM, ST3D_IMM, ST3H_IMM, ...
16285
339
    printImmScale(MI, 3, O, 3);
16286
339
    SStream_concat0(O, ", mul vl]");
16287
339
    set_mem_access(MI, false);
16288
339
    return;
16289
0
    break;
16290
454
  case 78:
16291
    // LDRAAindexed, LDRABindexed
16292
454
    printImmScale(MI, 2, O, 8);
16293
454
    SStream_concat0(O, "]");
16294
454
    set_mem_access(MI, false);
16295
454
    return;
16296
0
    break;
16297
2.11k
  case 79:
16298
    // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui
16299
2.11k
    printUImm12Offset(MI, 2, O, 1);
16300
2.11k
    SStream_concat0(O, "]");
16301
2.11k
    set_mem_access(MI, false);
16302
2.11k
    return;
16303
0
    break;
16304
1.47k
  case 80:
16305
    // LDRDui, LDRXui, PRFMui, STRDui, STRXui
16306
1.47k
    printUImm12Offset(MI, 2, O, 8);
16307
1.47k
    SStream_concat0(O, "]");
16308
1.47k
    set_mem_access(MI, false);
16309
1.47k
    return;
16310
0
    break;
16311
2.64k
  case 81:
16312
    // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui
16313
2.64k
    printUImm12Offset(MI, 2, O, 2);
16314
2.64k
    SStream_concat0(O, "]");
16315
2.64k
    set_mem_access(MI, false);
16316
2.64k
    return;
16317
0
    break;
16318
364
  case 82:
16319
    // LDRQui, STRQui
16320
364
    printUImm12Offset(MI, 2, O, 16);
16321
364
    SStream_concat0(O, "]");
16322
364
    set_mem_access(MI, false);
16323
364
    return;
16324
0
    break;
16325
657
  case 83:
16326
    // LDRSWui, LDRSui, LDRWui, STRSui, STRWui
16327
657
    printUImm12Offset(MI, 2, O, 4);
16328
657
    SStream_concat0(O, "]");
16329
657
    set_mem_access(MI, false);
16330
657
    return;
16331
0
    break;
16332
445
  case 84:
16333
    // MAD_ZPmZZ_B, MLA_ZPmZZ_B, MLS_ZPmZZ_B, MSB_ZPmZZ_B
16334
445
    printSVERegOp(MI, 3, O, 'b');
16335
445
    SStream_concat0(O, ", ");
16336
445
    printSVERegOp(MI, 4, O, 'b');
16337
445
    return;
16338
0
    break;
16339
62
  case 85:
16340
    // PRFB_D_PZI, PRFB_S_PZI
16341
62
    SStream_concat0(O, "]");
16342
62
    set_mem_access(MI, false);
16343
62
    return;
16344
0
    break;
16345
571
  case 86:
16346
    // PRFB_PRI, PRFD_PRI, PRFH_PRI, PRFW_PRI
16347
571
    SStream_concat0(O, ", mul vl]");
16348
571
    set_mem_access(MI, false);
16349
571
    return;
16350
0
    break;
16351
67
  case 87:
16352
    // SPLICE_ZPZZ_B
16353
67
    printTypedVectorList(MI, 2, O, 0,'b');
16354
67
    return;
16355
0
    break;
16356
49
  case 88:
16357
    // SPLICE_ZPZZ_D
16358
49
    printTypedVectorList(MI, 2, O, 0,'d');
16359
49
    return;
16360
0
    break;
16361
62
  case 89:
16362
    // SPLICE_ZPZZ_S
16363
62
    printTypedVectorList(MI, 2, O, 0,'s');
16364
62
    return;
16365
0
    break;
16366
1.84k
  case 90:
16367
    // SQDECP_XPWd_B, SQDECP_XPWd_D, SQDECP_XPWd_H, SQDECP_XPWd_S, SQINCP_XPW...
16368
1.84k
    printGPR64as32(MI, 2, O);
16369
1.84k
    return;
16370
0
    break;
16371
60
  case 91:
16372
    // SYSLxt
16373
60
    printSysCROperand(MI, 2, O);
16374
60
    SStream_concat0(O, ", ");
16375
60
    printSysCROperand(MI, 3, O);
16376
60
    SStream_concat0(O, ", ");
16377
60
    printOperand(MI, 4, O);
16378
60
    return;
16379
0
    break;
16380
1.98k
  case 92:
16381
    // TBNZW, TBNZX, TBZW, TBZX
16382
1.98k
    printAlignedLabel(MI, 2, O);
16383
1.98k
    return;
16384
0
    break;
16385
261
  case 93:
16386
    // UMAX_ZI_B, UMAX_ZI_D, UMAX_ZI_S, UMIN_ZI_B, UMIN_ZI_D, UMIN_ZI_S
16387
261
    printImm(MI, 2, O);
16388
261
    return;
16389
0
    break;
16390
114k
  }
16391
16392
16393
  // Fragment 5 encoded into 6 bits for 41 unique commands.
16394
  // printf("Fragment 5: %"PRIu64"\n", ((Bits >> 49) & 63));
16395
72.5k
  switch ((Bits >> 49) & 63) {
16396
0
  default: // unreachable
16397
13.4k
  case 0:
16398
    // ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD...
16399
13.4k
    return;
16400
0
    break;
16401
25.2k
  case 1:
16402
    // ADDG, ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, A...
16403
25.2k
    SStream_concat0(O, ", ");
16404
25.2k
    break;
16405
95
  case 2:
16406
    // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
16407
95
    SStream_concat0(O, ".2d");
16408
95
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
16409
95
    return;
16410
0
    break;
16411
399
  case 3:
16412
    // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
16413
399
    SStream_concat0(O, ".4s");
16414
399
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
16415
399
    return;
16416
0
    break;
16417
372
  case 4:
16418
    // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BFDOTv8bf16, B...
16419
372
    SStream_concat0(O, ".8h");
16420
372
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
16421
372
    return;
16422
0
    break;
16423
278
  case 5:
16424
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BIC_ZPmZ...
16425
278
    printSVERegOp(MI, 3, O, 'h');
16426
278
    break;
16427
253
  case 6:
16428
    // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,...
16429
253
    SStream_concat0(O, ".16b");
16430
253
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
16431
253
    return;
16432
0
    break;
16433
280
  case 7:
16434
    // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
16435
280
    SStream_concat0(O, ".2s");
16436
280
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
16437
280
    return;
16438
0
    break;
16439
543
  case 8:
16440
    // ADDPv4i16, ADDv4i16, BFDOTv4bf16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMH...
16441
543
    SStream_concat0(O, ".4h");
16442
543
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
16443
543
    return;
16444
0
    break;
16445
366
  case 9:
16446
    // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
16447
366
    SStream_concat0(O, ".8b");
16448
366
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
16449
366
    return;
16450
0
    break;
16451
531
  case 10:
16452
    // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64
16453
531
    printArithExtend(MI, 3, O);
16454
531
    return;
16455
0
    break;
16456
389
  case 11:
16457
    // ASRD_ZPmI_H, ASR_ZPmI_H, CMPEQ_PPzZI_H, CMPGE_PPzZI_H, CMPGT_PPzZI_H, ...
16458
389
    printOperand(MI, 3, O);
16459
389
    return;
16460
0
    break;
16461
69
  case 12:
16462
    // ASR_WIDE_ZPmZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_WIDE_PPzZZ_H, CMPGT_WIDE_PP...
16463
69
    printSVERegOp(MI, 3, O, 'd');
16464
69
    return;
16465
0
    break;
16466
408
  case 13:
16467
    // BCAX, EOR3, EXTv16i8
16468
408
    SStream_concat0(O, ".16b, ");
16469
408
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
16470
408
    break;
16471
133
  case 14:
16472
    // BF16DOTlanev4bf16, BF16DOTlanev8bf16
16473
133
    SStream_concat0(O, ".2h");
16474
133
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2H);
16475
133
    printVectorIndex(MI, 4, O);
16476
133
    return;
16477
0
    break;
16478
555
  case 15:
16479
    // BFDOT_ZZI, BFMMLA_B_ZZI, BFMMLA_T_ZZI, CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA...
16480
555
    printVectorIndex(MI, 4, O);
16481
555
    break;
16482
1.60k
  case 16:
16483
    // BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv8f16_indexed, FMLAL2...
16484
1.60k
    SStream_concat0(O, ".h");
16485
1.60k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1H);
16486
1.60k
    break;
16487
49
  case 17:
16488
    // CADD_ZZI_H, SQCADD_ZZI_H
16489
49
    printComplexRotationOp(MI, 3, O, 180, 90);
16490
49
    return;
16491
0
    break;
16492
12.2k
  case 18:
16493
    // CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH...
16494
12.2k
    SStream_concat0(O, "]");
16495
12.2k
    set_mem_access(MI, false);
16496
12.2k
    return;
16497
0
    break;
16498
258
  case 19:
16499
    // CDOT_ZZZ_S, CMLA_ZZZ_B, CMLA_ZZZ_H, SQRDCMLAH_ZZZ_B, SQRDCMLAH_ZZZ_H
16500
258
    printComplexRotationOp(MI, 4, O, 90, 0);
16501
258
    return;
16502
0
    break;
16503
780
  case 20:
16504
    // CMPHI_PPzZI_H, CMPHS_PPzZI_H, CMPLO_PPzZI_H, CMPLS_PPzZI_H
16505
780
    printImm(MI, 3, O);
16506
780
    return;
16507
0
    break;
16508
203
  case 21:
16509
    // EXTv8i8
16510
203
    SStream_concat0(O, ".8b, ");
16511
203
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B);
16512
203
    printOperand(MI, 3, O);
16513
203
    return;
16514
0
    break;
16515
43
  case 22:
16516
    // FADD_ZPmI_H, FSUBR_ZPmI_H, FSUB_ZPmI_H
16517
43
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_one);
16518
43
    return;
16519
0
    break;
16520
141
  case 23:
16521
    // FCADDv2f32, FCMLAv2f32
16522
141
    SStream_concat0(O, ".2s, ");
16523
141
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S);
16524
141
    break;
16525
535
  case 24:
16526
    // FCADDv2f64, FCMLAv2f64, XAR
16527
535
    SStream_concat0(O, ".2d, ");
16528
535
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D);
16529
535
    break;
16530
101
  case 25:
16531
    // FCADDv4f16, FCMLAv4f16
16532
101
    SStream_concat0(O, ".4h, ");
16533
101
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H);
16534
101
    break;
16535
7
  case 26:
16536
    // FCADDv4f32, FCMLAv4f32, SM3SS1
16537
7
    SStream_concat0(O, ".4s, ");
16538
7
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
16539
7
    break;
16540
24
  case 27:
16541
    // FCADDv8f16, FCMLAv8f16
16542
24
    SStream_concat0(O, ".8h, ");
16543
24
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H);
16544
24
    break;
16545
51
  case 28:
16546
    // FCMEQ_PPzZ0_D, FCMEQ_PPzZ0_S, FCMGE_PPzZ0_D, FCMGE_PPzZ0_S, FCMGT_PPzZ...
16547
51
    SStream_concat0(O, ", #0.0");
16548
51
    arm64_op_addFP(MI, 0);
16549
51
    return;
16550
0
    break;
16551
557
  case 29:
16552
    // FCMLA_ZPmZZ_H, FMAD_ZPmZZ_H, FMLA_ZPmZZ_H, FMLS_ZPmZZ_H, FMSB_ZPmZZ_H,...
16553
557
    printSVERegOp(MI, 4, O, 'h');
16554
557
    break;
16555
1.70k
  case 30:
16556
    // FCMLAv4f32_indexed, FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_in...
16557
1.70k
    SStream_concat0(O, ".s");
16558
1.70k
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1S);
16559
1.70k
    break;
16560
203
  case 31:
16561
    // FMAXNM_ZPmI_H, FMAX_ZPmI_H, FMINNM_ZPmI_H, FMIN_ZPmI_H
16562
203
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_zero, AArch64ExactFPImm_one);
16563
203
    return;
16564
0
    break;
16565
145
  case 32:
16566
    // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind...
16567
145
    SStream_concat0(O, ".d");
16568
145
    break;
16569
56
  case 33:
16570
    // FMUL_ZPmI_H
16571
56
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_two);
16572
56
    return;
16573
0
    break;
16574
338
  case 34:
16575
    // FMUL_ZZZI_D, FMUL_ZZZI_S, MUL_ZZZI_D, MUL_ZZZI_S, SMULLB_ZZZI_D, SMULL...
16576
338
    printVectorIndex(MI, 3, O);
16577
338
    return;
16578
0
    break;
16579
2.26k
  case 35:
16580
    // LD1B_D_IMM_REAL, LD1B_H_IMM_REAL, LD1B_IMM_REAL, LD1B_S_IMM_REAL, LD1D...
16581
2.26k
    SStream_concat0(O, ", mul vl]");
16582
2.26k
    set_mem_access(MI, false);
16583
2.26k
    return;
16584
0
    break;
16585
2.02k
  case 36:
16586
    // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STGPpost,...
16587
2.02k
    SStream_concat0(O, "], ");
16588
2.02k
    set_mem_access(MI, false);
16589
2.02k
    break;
16590
4.48k
  case 37:
16591
    // LDRAAwriteback, LDRABwriteback, LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, ...
16592
4.48k
    SStream_concat0(O, "]!");
16593
4.48k
    set_mem_access(MI, false);
16594
4.48k
    return;
16595
0
    break;
16596
577
  case 38:
16597
    // PSEL_PPPRI_B, PSEL_PPPRI_D, PSEL_PPPRI_H, PSEL_PPPRI_S
16598
577
    SStream_concat0(O, "[");
16599
577
    set_sme_index(MI, true);
16600
577
    printOperand(MI, 3, O);
16601
577
    SStream_concat0(O, ", ");
16602
577
    printMatrixIndex(MI, 4, O);
16603
577
    SStream_concat0(O, "]");
16604
577
    set_mem_access(MI, false);
16605
577
    return;
16606
0
    break;
16607
245
  case 39:
16608
    // SDOTlanev16i8, SDOTlanev8i8, SUDOTlanev16i8, SUDOTlanev8i8, UDOTlanev1...
16609
245
    SStream_concat0(O, ".4b");
16610
245
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4B);
16611
245
    printVectorIndex(MI, 4, O);
16612
245
    return;
16613
0
    break;
16614
542
  case 40:
16615
    // STLXPW, STLXPX, STXPW, STXPX
16616
542
    SStream_concat0(O, ", [");
16617
542
    set_mem_access(MI, true);
16618
542
    printOperand(MI, 3, O);
16619
542
    SStream_concat0(O, "]");
16620
542
    set_mem_access(MI, false);
16621
542
    return;
16622
0
    break;
16623
72.5k
  }
16624
16625
16626
  // Fragment 6 encoded into 6 bits for 37 unique commands.
16627
  // printf("Fragment 6: %"PRIu64"\n", ((Bits >> 55) & 63));
16628
33.3k
  switch ((Bits >> 55) & 63) {
16629
0
  default: // unreachable
16630
5.12k
  case 0:
16631
    // ADDG, ASRD_ZPmI_B, ASRD_ZPmI_D, ASRD_ZPmI_S, ASR_ZPmI_B, ASR_ZPmI_D, A...
16632
5.12k
    printOperand(MI, 3, O);
16633
5.12k
    return;
16634
0
    break;
16635
1.39k
  case 1:
16636
    // ADDP_ZPmZ_B, ADD_ZPmZ_B, ANDS_PPzPP, AND_PPzPP, AND_ZPmZ_B, ASRR_ZPmZ_...
16637
1.39k
    printSVERegOp(MI, 3, O, 'b');
16638
1.39k
    return;
16639
0
    break;
16640
781
  case 2:
16641
    // ADDP_ZPmZ_D, ADD_ZPmZ_D, AND_ZPmZ_D, ASRR_ZPmZ_D, ASR_WIDE_ZPmZ_B, ASR...
16642
781
    printSVERegOp(MI, 3, O, 'd');
16643
781
    break;
16644
1.29k
  case 3:
16645
    // ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BFDOT_ZZ...
16646
1.29k
    return;
16647
0
    break;
16648
685
  case 4:
16649
    // ADDP_ZPmZ_S, ADD_ZPmZ_S, AND_ZPmZ_S, ASRR_ZPmZ_S, ASR_ZPmZ_S, BIC_ZPmZ...
16650
685
    printSVERegOp(MI, 3, O, 's');
16651
685
    break;
16652
67
  case 5:
16653
    // BCAX, EOR3, SM3SS1
16654
67
    printVRegOperand(MI, 3, O);
16655
67
    break;
16656
1.64k
  case 6:
16657
    // BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv4f32_indexed, FCMLAv...
16658
1.64k
    printVectorIndex(MI, 4, O);
16659
1.64k
    break;
16660
0
  case 7:
16661
    // BFMWri, BFMXri
16662
0
    printOperand(MI, 4, O);
16663
0
    return;
16664
0
    break;
16665
205
  case 8:
16666
    // CADD_ZZI_B, CADD_ZZI_D, CADD_ZZI_S, FCADDv2f32, FCADDv2f64, FCADDv4f16...
16667
205
    printComplexRotationOp(MI, 3, O, 180, 90);
16668
205
    return;
16669
0
    break;
16670
2.01k
  case 9:
16671
    // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr...
16672
2.01k
    printCondCode(MI, 3, O);
16673
2.01k
    return;
16674
0
    break;
16675
99
  case 10:
16676
    // CDOT_ZZZI_D, CMLA_ZZZI_S, FCADD_ZPmZ_H, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, S...
16677
99
    SStream_concat0(O, ", ");
16678
99
    break;
16679
219
  case 11:
16680
    // CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, SQRDCMLAH_ZZZI_H
16681
219
    printComplexRotationOp(MI, 5, O, 90, 0);
16682
219
    return;
16683
0
    break;
16684
537
  case 12:
16685
    // CDOT_ZZZ_D, CMLA_ZZZ_D, CMLA_ZZZ_S, FCMLAv2f32, FCMLAv2f64, FCMLAv4f16...
16686
537
    printComplexRotationOp(MI, 4, O, 90, 0);
16687
537
    return;
16688
0
    break;
16689
119
  case 13:
16690
    // CLASTA_RPZ_H, CLASTA_VPZ_H, CLASTB_RPZ_H, CLASTB_VPZ_H
16691
119
    printSVERegOp(MI, 3, O, 'h');
16692
119
    return;
16693
0
    break;
16694
1.33k
  case 14:
16695
    // CMPHI_PPzZI_B, CMPHI_PPzZI_D, CMPHI_PPzZI_S, CMPHS_PPzZI_B, CMPHS_PPzZ...
16696
1.33k
    printImm(MI, 3, O);
16697
1.33k
    return;
16698
0
    break;
16699
286
  case 15:
16700
    // FADD_ZPmI_D, FADD_ZPmI_S, FSUBR_ZPmI_D, FSUBR_ZPmI_S, FSUB_ZPmI_D, FSU...
16701
286
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_one);
16702
286
    return;
16703
0
    break;
16704
346
  case 16:
16705
    // FCMLA_ZPmZZ_D, FMAD_ZPmZZ_D, FMLA_ZPmZZ_D, FMLS_ZPmZZ_D, FMSB_ZPmZZ_D,...
16706
346
    printSVERegOp(MI, 4, O, 'd');
16707
346
    break;
16708
709
  case 17:
16709
    // FCMLA_ZPmZZ_S, FMAD_ZPmZZ_S, FMLA_ZPmZZ_S, FMLS_ZPmZZ_S, FMSB_ZPmZZ_S,...
16710
709
    printSVERegOp(MI, 4, O, 's');
16711
709
    break;
16712
109
  case 18:
16713
    // FMAXNM_ZPmI_D, FMAXNM_ZPmI_S, FMAX_ZPmI_D, FMAX_ZPmI_S, FMINNM_ZPmI_D,...
16714
109
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_zero, AArch64ExactFPImm_one);
16715
109
    return;
16716
0
    break;
16717
1.80k
  case 19:
16718
    // FMULXv1i16_indexed, FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32...
16719
1.80k
    printVectorIndex(MI, 3, O);
16720
1.80k
    return;
16721
0
    break;
16722
51
  case 20:
16723
    // FMUL_ZPmI_D, FMUL_ZPmI_S
16724
51
    printExactFPImm(MI, 3, O, AArch64ExactFPImm_half, AArch64ExactFPImm_two);
16725
51
    return;
16726
0
    break;
16727
2.48k
  case 21:
16728
    // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi
16729
2.48k
    printImmScale(MI, 3, O, 8);
16730
2.48k
    SStream_concat0(O, "]");
16731
2.48k
    set_mem_access(MI, false);
16732
2.48k
    return;
16733
0
    break;
16734
304
  case 22:
16735
    // LDNPQi, LDPQi, STGPi, STNPQi, STPQi
16736
304
    printImmScale(MI, 3, O, 16);
16737
304
    SStream_concat0(O, "]");
16738
304
    set_mem_access(MI, false);
16739
304
    return;
16740
0
    break;
16741
3.13k
  case 23:
16742
    // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi
16743
3.13k
    printImmScale(MI, 3, O, 4);
16744
3.13k
    SStream_concat0(O, "]");
16745
3.13k
    set_mem_access(MI, false);
16746
3.13k
    return;
16747
0
    break;
16748
1.29k
  case 24:
16749
    // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP...
16750
1.29k
    printImmScale(MI, 4, O, 8);
16751
1.29k
    break;
16752
901
  case 25:
16753
    // LDPQpost, LDPQpre, STGPpost, STGPpre, STPQpost, STPQpre
16754
901
    printImmScale(MI, 4, O, 16);
16755
901
    break;
16756
1.93k
  case 26:
16757
    // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S...
16758
1.93k
    printImmScale(MI, 4, O, 4);
16759
1.93k
    break;
16760
116
  case 27:
16761
    // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW
16762
116
    printMemExtend(MI, 3, O, 'w', 8);
16763
116
    SStream_concat0(O, "]");
16764
116
    set_mem_access(MI, false);
16765
116
    return;
16766
0
    break;
16767
132
  case 28:
16768
    // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX
16769
132
    printMemExtend(MI, 3, O, 'x', 8);
16770
132
    SStream_concat0(O, "]");
16771
132
    set_mem_access(MI, false);
16772
132
    return;
16773
0
    break;
16774
1.82k
  case 29:
16775
    // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW
16776
1.82k
    printMemExtend(MI, 3, O, 'w', 64);
16777
1.82k
    SStream_concat0(O, "]");
16778
1.82k
    set_mem_access(MI, false);
16779
1.82k
    return;
16780
0
    break;
16781
640
  case 30:
16782
    // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX
16783
640
    printMemExtend(MI, 3, O, 'x', 64);
16784
640
    SStream_concat0(O, "]");
16785
640
    set_mem_access(MI, false);
16786
640
    return;
16787
0
    break;
16788
608
  case 31:
16789
    // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW
16790
608
    printMemExtend(MI, 3, O, 'w', 16);
16791
608
    SStream_concat0(O, "]");
16792
608
    set_mem_access(MI, false);
16793
608
    return;
16794
0
    break;
16795
427
  case 32:
16796
    // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX
16797
427
    printMemExtend(MI, 3, O, 'x', 16);
16798
427
    SStream_concat0(O, "]");
16799
427
    set_mem_access(MI, false);
16800
427
    return;
16801
0
    break;
16802
122
  case 33:
16803
    // LDRQroW, STRQroW
16804
122
    printMemExtend(MI, 3, O, 'w', 128);
16805
122
    SStream_concat0(O, "]");
16806
122
    set_mem_access(MI, false);
16807
122
    return;
16808
0
    break;
16809
447
  case 34:
16810
    // LDRQroX, STRQroX
16811
447
    printMemExtend(MI, 3, O, 'x', 128);
16812
447
    SStream_concat0(O, "]");
16813
447
    set_mem_access(MI, false);
16814
447
    return;
16815
0
    break;
16816
50
  case 35:
16817
    // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW
16818
50
    printMemExtend(MI, 3, O, 'w', 32);
16819
50
    SStream_concat0(O, "]");
16820
50
    set_mem_access(MI, false);
16821
50
    return;
16822
0
    break;
16823
129
  case 36:
16824
    // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX
16825
129
    printMemExtend(MI, 3, O, 'x', 32);
16826
129
    SStream_concat0(O, "]");
16827
129
    set_mem_access(MI, false);
16828
129
    return;
16829
0
    break;
16830
33.3k
  }
16831
16832
16833
  // Fragment 7 encoded into 3 bits for 7 unique commands.
16834
  // printf("Fragment 7: %"PRIu64"\n", ((Bits >> 61) & 7));
16835
8.46k
  switch ((Bits >> 61) & 7) {
16836
0
  default: // unreachable
16837
5.05k
  case 0:
16838
    // ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_D, ADD_ZPmZ_S, AND_ZPmZ_D, AND_ZPmZ...
16839
5.05k
    return;
16840
0
    break;
16841
61
  case 1:
16842
    // BCAX, EOR3
16843
61
    SStream_concat0(O, ".16b");
16844
61
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B);
16845
61
    return;
16846
0
    break;
16847
30
  case 2:
16848
    // CDOT_ZZZI_D, CMLA_ZZZI_S, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, SQRDCMLAH_ZZZI_...
16849
30
    printComplexRotationOp(MI, 5, O, 90, 0);
16850
30
    return;
16851
0
    break;
16852
1.14k
  case 3:
16853
    // FCADD_ZPmZ_D, FCADD_ZPmZ_S, FCMLA_ZPmZZ_D, FCMLA_ZPmZZ_S, FCMLAv4f16_i...
16854
1.14k
    SStream_concat0(O, ", ");
16855
1.14k
    break;
16856
69
  case 4:
16857
    // FCADD_ZPmZ_H
16858
69
    printComplexRotationOp(MI, 4, O, 180, 90);
16859
69
    return;
16860
0
    break;
16861
2.10k
  case 5:
16862
    // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STGPpre, STPDpr...
16863
2.10k
    SStream_concat0(O, "]!");
16864
2.10k
    set_mem_access(MI, false);
16865
2.10k
    return;
16866
0
    break;
16867
6
  case 6:
16868
    // SM3SS1
16869
6
    SStream_concat0(O, ".4s");
16870
6
    arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S);
16871
6
    return;
16872
0
    break;
16873
8.46k
  }
16874
16875
1.14k
  switch (MCInst_getOpcode(MI)) {
16876
0
  default:
16877
0
  case AArch64_FCADD_ZPmZ_D:
16878
35
  case AArch64_FCADD_ZPmZ_S:
16879
310
  case AArch64_FCMLA_ZPmZZ_D:
16880
822
  case AArch64_FCMLA_ZPmZZ_S:
16881
873
  case AArch64_FCMLAv4f16_indexed:
16882
1.05k
  case AArch64_FCMLAv4f32_indexed:
16883
1.14k
  case AArch64_FCMLAv8f16_indexed:
16884
1.14k
    switch (MCInst_getOpcode(MI)) {
16885
0
  default:
16886
0
    case AArch64_FCADD_ZPmZ_D:
16887
35
    case AArch64_FCADD_ZPmZ_S:
16888
35
      printComplexRotationOp(MI, 4, O, 180, 90);
16889
35
      break;
16890
275
    case AArch64_FCMLA_ZPmZZ_D:
16891
787
    case AArch64_FCMLA_ZPmZZ_S:
16892
838
    case AArch64_FCMLAv4f16_indexed:
16893
1.02k
    case AArch64_FCMLAv4f32_indexed:
16894
1.10k
    case AArch64_FCMLAv8f16_indexed:
16895
1.10k
      printComplexRotationOp(MI, 5, O, 90, 0);
16896
1.10k
      break;
16897
1.14k
    }
16898
1.14k
    return;
16899
1.14k
    break;
16900
1.14k
  }
16901
1.14k
}
16902
16903
16904
16905
#ifdef PRINT_ALIAS_INSTR
16906
#undef PRINT_ALIAS_INSTR
16907
16908
static bool AArch64InstPrinterValidateMCOperand(MCOperand *MCOp,
16909
                  unsigned PredicateIndex);
16910
static char *printAliasInstr(MCInst *MI, SStream *OS, MCRegisterInfo *MRI)
16911
254k
{
16912
254k
  #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
16913
254k
  unsigned int I = 0, OpIdx, PrintMethodIdx;
16914
254k
  char *tmpString;
16915
254k
  static const PatternsForOpcode OpToPatterns[] = {
16916
254k
    {AArch64_ADDSWri, 0, 1 },
16917
254k
    {AArch64_ADDSWrs, 1, 3 },
16918
254k
    {AArch64_ADDSWrx, 4, 3 },
16919
254k
    {AArch64_ADDSXri, 7, 1 },
16920
254k
    {AArch64_ADDSXrs, 8, 3 },
16921
254k
    {AArch64_ADDSXrx, 11, 1 },
16922
254k
    {AArch64_ADDSXrx64, 12, 3 },
16923
254k
    {AArch64_ADDWri, 15, 2 },
16924
254k
    {AArch64_ADDWrs, 17, 1 },
16925
254k
    {AArch64_ADDWrx, 18, 2 },
16926
254k
    {AArch64_ADDXri, 20, 2 },
16927
254k
    {AArch64_ADDXrs, 22, 1 },
16928
254k
    {AArch64_ADDXrx64, 23, 2 },
16929
254k
    {AArch64_ANDSWri, 25, 1 },
16930
254k
    {AArch64_ANDSWrs, 26, 3 },
16931
254k
    {AArch64_ANDSXri, 29, 1 },
16932
254k
    {AArch64_ANDSXrs, 30, 3 },
16933
254k
    {AArch64_ANDS_PPzPP, 33, 1 },
16934
254k
    {AArch64_ANDWrs, 34, 1 },
16935
254k
    {AArch64_ANDXrs, 35, 1 },
16936
254k
    {AArch64_AND_PPzPP, 36, 1 },
16937
254k
    {AArch64_AND_ZI, 37, 3 },
16938
254k
    {AArch64_AUTIA1716, 40, 1 },
16939
254k
    {AArch64_AUTIASP, 41, 1 },
16940
254k
    {AArch64_AUTIAZ, 42, 1 },
16941
254k
    {AArch64_AUTIB1716, 43, 1 },
16942
254k
    {AArch64_AUTIBSP, 44, 1 },
16943
254k
    {AArch64_AUTIBZ, 45, 1 },
16944
254k
    {AArch64_BICSWrs, 46, 1 },
16945
254k
    {AArch64_BICSXrs, 47, 1 },
16946
254k
    {AArch64_BICWrs, 48, 1 },
16947
254k
    {AArch64_BICXrs, 49, 1 },
16948
254k
    {AArch64_CLREX, 50, 1 },
16949
254k
    {AArch64_CNTB_XPiI, 51, 2 },
16950
254k
    {AArch64_CNTD_XPiI, 53, 2 },
16951
254k
    {AArch64_CNTH_XPiI, 55, 2 },
16952
254k
    {AArch64_CNTW_XPiI, 57, 2 },
16953
254k
    {AArch64_CPY_ZPmI_B, 59, 1 },
16954
254k
    {AArch64_CPY_ZPmI_D, 60, 1 },
16955
254k
    {AArch64_CPY_ZPmI_H, 61, 1 },
16956
254k
    {AArch64_CPY_ZPmI_S, 62, 1 },
16957
254k
    {AArch64_CPY_ZPmR_B, 63, 1 },
16958
254k
    {AArch64_CPY_ZPmR_D, 64, 1 },
16959
254k
    {AArch64_CPY_ZPmR_H, 65, 1 },
16960
254k
    {AArch64_CPY_ZPmR_S, 66, 1 },
16961
254k
    {AArch64_CPY_ZPmV_B, 67, 1 },
16962
254k
    {AArch64_CPY_ZPmV_D, 68, 1 },
16963
254k
    {AArch64_CPY_ZPmV_H, 69, 1 },
16964
254k
    {AArch64_CPY_ZPmV_S, 70, 1 },
16965
254k
    {AArch64_CPY_ZPzI_B, 71, 1 },
16966
254k
    {AArch64_CPY_ZPzI_D, 72, 1 },
16967
254k
    {AArch64_CPY_ZPzI_H, 73, 1 },
16968
254k
    {AArch64_CPY_ZPzI_S, 74, 1 },
16969
254k
    {AArch64_CSINCWr, 75, 2 },
16970
254k
    {AArch64_CSINCXr, 77, 2 },
16971
254k
    {AArch64_CSINVWr, 79, 2 },
16972
254k
    {AArch64_CSINVXr, 81, 2 },
16973
254k
    {AArch64_CSNEGWr, 83, 1 },
16974
254k
    {AArch64_CSNEGXr, 84, 1 },
16975
254k
    {AArch64_DCPS1, 85, 1 },
16976
254k
    {AArch64_DCPS2, 86, 1 },
16977
254k
    {AArch64_DCPS3, 87, 1 },
16978
254k
    {AArch64_DECB_XPiI, 88, 2 },
16979
254k
    {AArch64_DECD_XPiI, 90, 2 },
16980
254k
    {AArch64_DECD_ZPiI, 92, 2 },
16981
254k
    {AArch64_DECH_XPiI, 94, 2 },
16982
254k
    {AArch64_DECH_ZPiI, 96, 2 },
16983
254k
    {AArch64_DECW_XPiI, 98, 2 },
16984
254k
    {AArch64_DECW_ZPiI, 100, 2 },
16985
254k
    {AArch64_DSB, 102, 3 },
16986
254k
    {AArch64_DUPM_ZI, 105, 6 },
16987
254k
    {AArch64_DUP_ZI_B, 111, 1 },
16988
254k
    {AArch64_DUP_ZI_D, 112, 2 },
16989
254k
    {AArch64_DUP_ZI_H, 114, 2 },
16990
254k
    {AArch64_DUP_ZI_S, 116, 2 },
16991
254k
    {AArch64_DUP_ZR_B, 118, 1 },
16992
254k
    {AArch64_DUP_ZR_D, 119, 1 },
16993
254k
    {AArch64_DUP_ZR_H, 120, 1 },
16994
254k
    {AArch64_DUP_ZR_S, 121, 1 },
16995
254k
    {AArch64_DUP_ZZI_B, 122, 2 },
16996
254k
    {AArch64_DUP_ZZI_D, 124, 2 },
16997
254k
    {AArch64_DUP_ZZI_H, 126, 2 },
16998
254k
    {AArch64_DUP_ZZI_Q, 128, 2 },
16999
254k
    {AArch64_DUP_ZZI_S, 130, 2 },
17000
254k
    {AArch64_EONWrs, 132, 1 },
17001
254k
    {AArch64_EONXrs, 133, 1 },
17002
254k
    {AArch64_EORS_PPzPP, 134, 1 },
17003
254k
    {AArch64_EORWrs, 135, 1 },
17004
254k
    {AArch64_EORXrs, 136, 1 },
17005
254k
    {AArch64_EOR_PPzPP, 137, 1 },
17006
254k
    {AArch64_EOR_ZI, 138, 3 },
17007
254k
    {AArch64_EXTRACT_ZPMXI_H_B, 141, 1 },
17008
254k
    {AArch64_EXTRACT_ZPMXI_H_D, 142, 1 },
17009
254k
    {AArch64_EXTRACT_ZPMXI_H_H, 143, 1 },
17010
254k
    {AArch64_EXTRACT_ZPMXI_H_Q, 144, 1 },
17011
254k
    {AArch64_EXTRACT_ZPMXI_H_S, 145, 1 },
17012
254k
    {AArch64_EXTRACT_ZPMXI_V_B, 146, 1 },
17013
254k
    {AArch64_EXTRACT_ZPMXI_V_D, 147, 1 },
17014
254k
    {AArch64_EXTRACT_ZPMXI_V_H, 148, 1 },
17015
254k
    {AArch64_EXTRACT_ZPMXI_V_Q, 149, 1 },
17016
254k
    {AArch64_EXTRACT_ZPMXI_V_S, 150, 1 },
17017
254k
    {AArch64_EXTRWrri, 151, 1 },
17018
254k
    {AArch64_EXTRXrri, 152, 1 },
17019
254k
    {AArch64_FCPY_ZPmI_D, 153, 1 },
17020
254k
    {AArch64_FCPY_ZPmI_H, 154, 1 },
17021
254k
    {AArch64_FCPY_ZPmI_S, 155, 1 },
17022
254k
    {AArch64_FDUP_ZI_D, 156, 1 },
17023
254k
    {AArch64_FDUP_ZI_H, 157, 1 },
17024
254k
    {AArch64_FDUP_ZI_S, 158, 1 },
17025
254k
    {AArch64_GLD1B_D_IMM_REAL, 159, 1 },
17026
254k
    {AArch64_GLD1B_S_IMM_REAL, 160, 1 },
17027
254k
    {AArch64_GLD1D_IMM_REAL, 161, 1 },
17028
254k
    {AArch64_GLD1H_D_IMM_REAL, 162, 1 },
17029
254k
    {AArch64_GLD1H_S_IMM_REAL, 163, 1 },
17030
254k
    {AArch64_GLD1SB_D_IMM_REAL, 164, 1 },
17031
254k
    {AArch64_GLD1SB_S_IMM_REAL, 165, 1 },
17032
254k
    {AArch64_GLD1SH_D_IMM_REAL, 166, 1 },
17033
254k
    {AArch64_GLD1SH_S_IMM_REAL, 167, 1 },
17034
254k
    {AArch64_GLD1SW_D_IMM_REAL, 168, 1 },
17035
254k
    {AArch64_GLD1W_D_IMM_REAL, 169, 1 },
17036
254k
    {AArch64_GLD1W_IMM_REAL, 170, 1 },
17037
254k
    {AArch64_GLDFF1B_D_IMM_REAL, 171, 1 },
17038
254k
    {AArch64_GLDFF1B_S_IMM_REAL, 172, 1 },
17039
254k
    {AArch64_GLDFF1D_IMM_REAL, 173, 1 },
17040
254k
    {AArch64_GLDFF1H_D_IMM_REAL, 174, 1 },
17041
254k
    {AArch64_GLDFF1H_S_IMM_REAL, 175, 1 },
17042
254k
    {AArch64_GLDFF1SB_D_IMM_REAL, 176, 1 },
17043
254k
    {AArch64_GLDFF1SB_S_IMM_REAL, 177, 1 },
17044
254k
    {AArch64_GLDFF1SH_D_IMM_REAL, 178, 1 },
17045
254k
    {AArch64_GLDFF1SH_S_IMM_REAL, 179, 1 },
17046
254k
    {AArch64_GLDFF1SW_D_IMM_REAL, 180, 1 },
17047
254k
    {AArch64_GLDFF1W_D_IMM_REAL, 181, 1 },
17048
254k
    {AArch64_GLDFF1W_IMM_REAL, 182, 1 },
17049
254k
    {AArch64_HINT, 183, 12 },
17050
254k
    {AArch64_INCB_XPiI, 195, 2 },
17051
254k
    {AArch64_INCD_XPiI, 197, 2 },
17052
254k
    {AArch64_INCD_ZPiI, 199, 2 },
17053
254k
    {AArch64_INCH_XPiI, 201, 2 },
17054
254k
    {AArch64_INCH_ZPiI, 203, 2 },
17055
254k
    {AArch64_INCW_XPiI, 205, 2 },
17056
254k
    {AArch64_INCW_ZPiI, 207, 2 },
17057
254k
    {AArch64_INSERT_MXIPZ_H_B, 209, 1 },
17058
254k
    {AArch64_INSERT_MXIPZ_H_D, 210, 1 },
17059
254k
    {AArch64_INSERT_MXIPZ_H_H, 211, 1 },
17060
254k
    {AArch64_INSERT_MXIPZ_H_Q, 212, 1 },
17061
254k
    {AArch64_INSERT_MXIPZ_H_S, 213, 1 },
17062
254k
    {AArch64_INSERT_MXIPZ_V_B, 214, 1 },
17063
254k
    {AArch64_INSERT_MXIPZ_V_D, 215, 1 },
17064
254k
    {AArch64_INSERT_MXIPZ_V_H, 216, 1 },
17065
254k
    {AArch64_INSERT_MXIPZ_V_Q, 217, 1 },
17066
254k
    {AArch64_INSERT_MXIPZ_V_S, 218, 1 },
17067
254k
    {AArch64_INSvi16gpr, 219, 1 },
17068
254k
    {AArch64_INSvi16lane, 220, 1 },
17069
254k
    {AArch64_INSvi32gpr, 221, 1 },
17070
254k
    {AArch64_INSvi32lane, 222, 1 },
17071
254k
    {AArch64_INSvi64gpr, 223, 1 },
17072
254k
    {AArch64_INSvi64lane, 224, 1 },
17073
254k
    {AArch64_INSvi8gpr, 225, 1 },
17074
254k
    {AArch64_INSvi8lane, 226, 1 },
17075
254k
    {AArch64_IRG, 227, 1 },
17076
254k
    {AArch64_ISB, 228, 1 },
17077
254k
    {AArch64_LD1B_D_IMM_REAL, 229, 1 },
17078
254k
    {AArch64_LD1B_H_IMM_REAL, 230, 1 },
17079
254k
    {AArch64_LD1B_IMM_REAL, 231, 1 },
17080
254k
    {AArch64_LD1B_S_IMM_REAL, 232, 1 },
17081
254k
    {AArch64_LD1D_IMM_REAL, 233, 1 },
17082
254k
    {AArch64_LD1Fourv16b_POST, 234, 1 },
17083
254k
    {AArch64_LD1Fourv1d_POST, 235, 1 },
17084
254k
    {AArch64_LD1Fourv2d_POST, 236, 1 },
17085
254k
    {AArch64_LD1Fourv2s_POST, 237, 1 },
17086
254k
    {AArch64_LD1Fourv4h_POST, 238, 1 },
17087
254k
    {AArch64_LD1Fourv4s_POST, 239, 1 },
17088
254k
    {AArch64_LD1Fourv8b_POST, 240, 1 },
17089
254k
    {AArch64_LD1Fourv8h_POST, 241, 1 },
17090
254k
    {AArch64_LD1H_D_IMM_REAL, 242, 1 },
17091
254k
    {AArch64_LD1H_IMM_REAL, 243, 1 },
17092
254k
    {AArch64_LD1H_S_IMM_REAL, 244, 1 },
17093
254k
    {AArch64_LD1Onev16b_POST, 245, 1 },
17094
254k
    {AArch64_LD1Onev1d_POST, 246, 1 },
17095
254k
    {AArch64_LD1Onev2d_POST, 247, 1 },
17096
254k
    {AArch64_LD1Onev2s_POST, 248, 1 },
17097
254k
    {AArch64_LD1Onev4h_POST, 249, 1 },
17098
254k
    {AArch64_LD1Onev4s_POST, 250, 1 },
17099
254k
    {AArch64_LD1Onev8b_POST, 251, 1 },
17100
254k
    {AArch64_LD1Onev8h_POST, 252, 1 },
17101
254k
    {AArch64_LD1RB_D_IMM, 253, 1 },
17102
254k
    {AArch64_LD1RB_H_IMM, 254, 1 },
17103
254k
    {AArch64_LD1RB_IMM, 255, 1 },
17104
254k
    {AArch64_LD1RB_S_IMM, 256, 1 },
17105
254k
    {AArch64_LD1RD_IMM, 257, 1 },
17106
254k
    {AArch64_LD1RH_D_IMM, 258, 1 },
17107
254k
    {AArch64_LD1RH_IMM, 259, 1 },
17108
254k
    {AArch64_LD1RH_S_IMM, 260, 1 },
17109
254k
    {AArch64_LD1RO_B_IMM, 261, 1 },
17110
254k
    {AArch64_LD1RO_D_IMM, 262, 1 },
17111
254k
    {AArch64_LD1RO_H_IMM, 263, 1 },
17112
254k
    {AArch64_LD1RO_W_IMM, 264, 1 },
17113
254k
    {AArch64_LD1RQ_B_IMM, 265, 1 },
17114
254k
    {AArch64_LD1RQ_D_IMM, 266, 1 },
17115
254k
    {AArch64_LD1RQ_H_IMM, 267, 1 },
17116
254k
    {AArch64_LD1RQ_W_IMM, 268, 1 },
17117
254k
    {AArch64_LD1RSB_D_IMM, 269, 1 },
17118
254k
    {AArch64_LD1RSB_H_IMM, 270, 1 },
17119
254k
    {AArch64_LD1RSB_S_IMM, 271, 1 },
17120
254k
    {AArch64_LD1RSH_D_IMM, 272, 1 },
17121
254k
    {AArch64_LD1RSH_S_IMM, 273, 1 },
17122
254k
    {AArch64_LD1RSW_IMM, 274, 1 },
17123
254k
    {AArch64_LD1RW_D_IMM, 275, 1 },
17124
254k
    {AArch64_LD1RW_IMM, 276, 1 },
17125
254k
    {AArch64_LD1Rv16b_POST, 277, 1 },
17126
254k
    {AArch64_LD1Rv1d_POST, 278, 1 },
17127
254k
    {AArch64_LD1Rv2d_POST, 279, 1 },
17128
254k
    {AArch64_LD1Rv2s_POST, 280, 1 },
17129
254k
    {AArch64_LD1Rv4h_POST, 281, 1 },
17130
254k
    {AArch64_LD1Rv4s_POST, 282, 1 },
17131
254k
    {AArch64_LD1Rv8b_POST, 283, 1 },
17132
254k
    {AArch64_LD1Rv8h_POST, 284, 1 },
17133
254k
    {AArch64_LD1SB_D_IMM_REAL, 285, 1 },
17134
254k
    {AArch64_LD1SB_H_IMM_REAL, 286, 1 },
17135
254k
    {AArch64_LD1SB_S_IMM_REAL, 287, 1 },
17136
254k
    {AArch64_LD1SH_D_IMM_REAL, 288, 1 },
17137
254k
    {AArch64_LD1SH_S_IMM_REAL, 289, 1 },
17138
254k
    {AArch64_LD1SW_D_IMM_REAL, 290, 1 },
17139
254k
    {AArch64_LD1Threev16b_POST, 291, 1 },
17140
254k
    {AArch64_LD1Threev1d_POST, 292, 1 },
17141
254k
    {AArch64_LD1Threev2d_POST, 293, 1 },
17142
254k
    {AArch64_LD1Threev2s_POST, 294, 1 },
17143
254k
    {AArch64_LD1Threev4h_POST, 295, 1 },
17144
254k
    {AArch64_LD1Threev4s_POST, 296, 1 },
17145
254k
    {AArch64_LD1Threev8b_POST, 297, 1 },
17146
254k
    {AArch64_LD1Threev8h_POST, 298, 1 },
17147
254k
    {AArch64_LD1Twov16b_POST, 299, 1 },
17148
254k
    {AArch64_LD1Twov1d_POST, 300, 1 },
17149
254k
    {AArch64_LD1Twov2d_POST, 301, 1 },
17150
254k
    {AArch64_LD1Twov2s_POST, 302, 1 },
17151
254k
    {AArch64_LD1Twov4h_POST, 303, 1 },
17152
254k
    {AArch64_LD1Twov4s_POST, 304, 1 },
17153
254k
    {AArch64_LD1Twov8b_POST, 305, 1 },
17154
254k
    {AArch64_LD1Twov8h_POST, 306, 1 },
17155
254k
    {AArch64_LD1W_D_IMM_REAL, 307, 1 },
17156
254k
    {AArch64_LD1W_IMM_REAL, 308, 1 },
17157
254k
    {AArch64_LD1_MXIPXX_H_B, 309, 1 },
17158
254k
    {AArch64_LD1_MXIPXX_H_D, 310, 1 },
17159
254k
    {AArch64_LD1_MXIPXX_H_H, 311, 1 },
17160
254k
    {AArch64_LD1_MXIPXX_H_Q, 312, 1 },
17161
254k
    {AArch64_LD1_MXIPXX_H_S, 313, 1 },
17162
254k
    {AArch64_LD1_MXIPXX_V_B, 314, 1 },
17163
254k
    {AArch64_LD1_MXIPXX_V_D, 315, 1 },
17164
254k
    {AArch64_LD1_MXIPXX_V_H, 316, 1 },
17165
254k
    {AArch64_LD1_MXIPXX_V_Q, 317, 1 },
17166
254k
    {AArch64_LD1_MXIPXX_V_S, 318, 1 },
17167
254k
    {AArch64_LD1i16_POST, 319, 1 },
17168
254k
    {AArch64_LD1i32_POST, 320, 1 },
17169
254k
    {AArch64_LD1i64_POST, 321, 1 },
17170
254k
    {AArch64_LD1i8_POST, 322, 1 },
17171
254k
    {AArch64_LD2B_IMM, 323, 1 },
17172
254k
    {AArch64_LD2D_IMM, 324, 1 },
17173
254k
    {AArch64_LD2H_IMM, 325, 1 },
17174
254k
    {AArch64_LD2Rv16b_POST, 326, 1 },
17175
254k
    {AArch64_LD2Rv1d_POST, 327, 1 },
17176
254k
    {AArch64_LD2Rv2d_POST, 328, 1 },
17177
254k
    {AArch64_LD2Rv2s_POST, 329, 1 },
17178
254k
    {AArch64_LD2Rv4h_POST, 330, 1 },
17179
254k
    {AArch64_LD2Rv4s_POST, 331, 1 },
17180
254k
    {AArch64_LD2Rv8b_POST, 332, 1 },
17181
254k
    {AArch64_LD2Rv8h_POST, 333, 1 },
17182
254k
    {AArch64_LD2Twov16b_POST, 334, 1 },
17183
254k
    {AArch64_LD2Twov2d_POST, 335, 1 },
17184
254k
    {AArch64_LD2Twov2s_POST, 336, 1 },
17185
254k
    {AArch64_LD2Twov4h_POST, 337, 1 },
17186
254k
    {AArch64_LD2Twov4s_POST, 338, 1 },
17187
254k
    {AArch64_LD2Twov8b_POST, 339, 1 },
17188
254k
    {AArch64_LD2Twov8h_POST, 340, 1 },
17189
254k
    {AArch64_LD2W_IMM, 341, 1 },
17190
254k
    {AArch64_LD2i16_POST, 342, 1 },
17191
254k
    {AArch64_LD2i32_POST, 343, 1 },
17192
254k
    {AArch64_LD2i64_POST, 344, 1 },
17193
254k
    {AArch64_LD2i8_POST, 345, 1 },
17194
254k
    {AArch64_LD3B_IMM, 346, 1 },
17195
254k
    {AArch64_LD3D_IMM, 347, 1 },
17196
254k
    {AArch64_LD3H_IMM, 348, 1 },
17197
254k
    {AArch64_LD3Rv16b_POST, 349, 1 },
17198
254k
    {AArch64_LD3Rv1d_POST, 350, 1 },
17199
254k
    {AArch64_LD3Rv2d_POST, 351, 1 },
17200
254k
    {AArch64_LD3Rv2s_POST, 352, 1 },
17201
254k
    {AArch64_LD3Rv4h_POST, 353, 1 },
17202
254k
    {AArch64_LD3Rv4s_POST, 354, 1 },
17203
254k
    {AArch64_LD3Rv8b_POST, 355, 1 },
17204
254k
    {AArch64_LD3Rv8h_POST, 356, 1 },
17205
254k
    {AArch64_LD3Threev16b_POST, 357, 1 },
17206
254k
    {AArch64_LD3Threev2d_POST, 358, 1 },
17207
254k
    {AArch64_LD3Threev2s_POST, 359, 1 },
17208
254k
    {AArch64_LD3Threev4h_POST, 360, 1 },
17209
254k
    {AArch64_LD3Threev4s_POST, 361, 1 },
17210
254k
    {AArch64_LD3Threev8b_POST, 362, 1 },
17211
254k
    {AArch64_LD3Threev8h_POST, 363, 1 },
17212
254k
    {AArch64_LD3W_IMM, 364, 1 },
17213
254k
    {AArch64_LD3i16_POST, 365, 1 },
17214
254k
    {AArch64_LD3i32_POST, 366, 1 },
17215
254k
    {AArch64_LD3i64_POST, 367, 1 },
17216
254k
    {AArch64_LD3i8_POST, 368, 1 },
17217
254k
    {AArch64_LD4B_IMM, 369, 1 },
17218
254k
    {AArch64_LD4D_IMM, 370, 1 },
17219
254k
    {AArch64_LD4Fourv16b_POST, 371, 1 },
17220
254k
    {AArch64_LD4Fourv2d_POST, 372, 1 },
17221
254k
    {AArch64_LD4Fourv2s_POST, 373, 1 },
17222
254k
    {AArch64_LD4Fourv4h_POST, 374, 1 },
17223
254k
    {AArch64_LD4Fourv4s_POST, 375, 1 },
17224
254k
    {AArch64_LD4Fourv8b_POST, 376, 1 },
17225
254k
    {AArch64_LD4Fourv8h_POST, 377, 1 },
17226
254k
    {AArch64_LD4H_IMM, 378, 1 },
17227
254k
    {AArch64_LD4Rv16b_POST, 379, 1 },
17228
254k
    {AArch64_LD4Rv1d_POST, 380, 1 },
17229
254k
    {AArch64_LD4Rv2d_POST, 381, 1 },
17230
254k
    {AArch64_LD4Rv2s_POST, 382, 1 },
17231
254k
    {AArch64_LD4Rv4h_POST, 383, 1 },
17232
254k
    {AArch64_LD4Rv4s_POST, 384, 1 },
17233
254k
    {AArch64_LD4Rv8b_POST, 385, 1 },
17234
254k
    {AArch64_LD4Rv8h_POST, 386, 1 },
17235
254k
    {AArch64_LD4W_IMM, 387, 1 },
17236
254k
    {AArch64_LD4i16_POST, 388, 1 },
17237
254k
    {AArch64_LD4i32_POST, 389, 1 },
17238
254k
    {AArch64_LD4i64_POST, 390, 1 },
17239
254k
    {AArch64_LD4i8_POST, 391, 1 },
17240
254k
    {AArch64_LDADDB, 392, 1 },
17241
254k
    {AArch64_LDADDH, 393, 1 },
17242
254k
    {AArch64_LDADDLB, 394, 1 },
17243
254k
    {AArch64_LDADDLH, 395, 1 },
17244
254k
    {AArch64_LDADDLW, 396, 1 },
17245
254k
    {AArch64_LDADDLX, 397, 1 },
17246
254k
    {AArch64_LDADDW, 398, 1 },
17247
254k
    {AArch64_LDADDX, 399, 1 },
17248
254k
    {AArch64_LDAPURBi, 400, 1 },
17249
254k
    {AArch64_LDAPURHi, 401, 1 },
17250
254k
    {AArch64_LDAPURSBWi, 402, 1 },
17251
254k
    {AArch64_LDAPURSBXi, 403, 1 },
17252
254k
    {AArch64_LDAPURSHWi, 404, 1 },
17253
254k
    {AArch64_LDAPURSHXi, 405, 1 },
17254
254k
    {AArch64_LDAPURSWi, 406, 1 },
17255
254k
    {AArch64_LDAPURXi, 407, 1 },
17256
254k
    {AArch64_LDAPURi, 408, 1 },
17257
254k
    {AArch64_LDCLRB, 409, 1 },
17258
254k
    {AArch64_LDCLRH, 410, 1 },
17259
254k
    {AArch64_LDCLRLB, 411, 1 },
17260
254k
    {AArch64_LDCLRLH, 412, 1 },
17261
254k
    {AArch64_LDCLRLW, 413, 1 },
17262
254k
    {AArch64_LDCLRLX, 414, 1 },
17263
254k
    {AArch64_LDCLRW, 415, 1 },
17264
254k
    {AArch64_LDCLRX, 416, 1 },
17265
254k
    {AArch64_LDEORB, 417, 1 },
17266
254k
    {AArch64_LDEORH, 418, 1 },
17267
254k
    {AArch64_LDEORLB, 419, 1 },
17268
254k
    {AArch64_LDEORLH, 420, 1 },
17269
254k
    {AArch64_LDEORLW, 421, 1 },
17270
254k
    {AArch64_LDEORLX, 422, 1 },
17271
254k
    {AArch64_LDEORW, 423, 1 },
17272
254k
    {AArch64_LDEORX, 424, 1 },
17273
254k
    {AArch64_LDFF1B_D_REAL, 425, 1 },
17274
254k
    {AArch64_LDFF1B_H_REAL, 426, 1 },
17275
254k
    {AArch64_LDFF1B_REAL, 427, 1 },
17276
254k
    {AArch64_LDFF1B_S_REAL, 428, 1 },
17277
254k
    {AArch64_LDFF1D_REAL, 429, 1 },
17278
254k
    {AArch64_LDFF1H_D_REAL, 430, 1 },
17279
254k
    {AArch64_LDFF1H_REAL, 431, 1 },
17280
254k
    {AArch64_LDFF1H_S_REAL, 432, 1 },
17281
254k
    {AArch64_LDFF1SB_D_REAL, 433, 1 },
17282
254k
    {AArch64_LDFF1SB_H_REAL, 434, 1 },
17283
254k
    {AArch64_LDFF1SB_S_REAL, 435, 1 },
17284
254k
    {AArch64_LDFF1SH_D_REAL, 436, 1 },
17285
254k
    {AArch64_LDFF1SH_S_REAL, 437, 1 },
17286
254k
    {AArch64_LDFF1SW_D_REAL, 438, 1 },
17287
254k
    {AArch64_LDFF1W_D_REAL, 439, 1 },
17288
254k
    {AArch64_LDFF1W_REAL, 440, 1 },
17289
254k
    {AArch64_LDG, 441, 1 },
17290
254k
    {AArch64_LDNF1B_D_IMM_REAL, 442, 1 },
17291
254k
    {AArch64_LDNF1B_H_IMM_REAL, 443, 1 },
17292
254k
    {AArch64_LDNF1B_IMM_REAL, 444, 1 },
17293
254k
    {AArch64_LDNF1B_S_IMM_REAL, 445, 1 },
17294
254k
    {AArch64_LDNF1D_IMM_REAL, 446, 1 },
17295
254k
    {AArch64_LDNF1H_D_IMM_REAL, 447, 1 },
17296
254k
    {AArch64_LDNF1H_IMM_REAL, 448, 1 },
17297
254k
    {AArch64_LDNF1H_S_IMM_REAL, 449, 1 },
17298
254k
    {AArch64_LDNF1SB_D_IMM_REAL, 450, 1 },
17299
254k
    {AArch64_LDNF1SB_H_IMM_REAL, 451, 1 },
17300
254k
    {AArch64_LDNF1SB_S_IMM_REAL, 452, 1 },
17301
254k
    {AArch64_LDNF1SH_D_IMM_REAL, 453, 1 },
17302
254k
    {AArch64_LDNF1SH_S_IMM_REAL, 454, 1 },
17303
254k
    {AArch64_LDNF1SW_D_IMM_REAL, 455, 1 },
17304
254k
    {AArch64_LDNF1W_D_IMM_REAL, 456, 1 },
17305
254k
    {AArch64_LDNF1W_IMM_REAL, 457, 1 },
17306
254k
    {AArch64_LDNPDi, 458, 1 },
17307
254k
    {AArch64_LDNPQi, 459, 1 },
17308
254k
    {AArch64_LDNPSi, 460, 1 },
17309
254k
    {AArch64_LDNPWi, 461, 1 },
17310
254k
    {AArch64_LDNPXi, 462, 1 },
17311
254k
    {AArch64_LDNT1B_ZRI, 463, 1 },
17312
254k
    {AArch64_LDNT1B_ZZR_D_REAL, 464, 1 },
17313
254k
    {AArch64_LDNT1B_ZZR_S_REAL, 465, 1 },
17314
254k
    {AArch64_LDNT1D_ZRI, 466, 1 },
17315
254k
    {AArch64_LDNT1D_ZZR_D_REAL, 467, 1 },
17316
254k
    {AArch64_LDNT1H_ZRI, 468, 1 },
17317
254k
    {AArch64_LDNT1H_ZZR_D_REAL, 469, 1 },
17318
254k
    {AArch64_LDNT1H_ZZR_S_REAL, 470, 1 },
17319
254k
    {AArch64_LDNT1SB_ZZR_D_REAL, 471, 1 },
17320
254k
    {AArch64_LDNT1SB_ZZR_S_REAL, 472, 1 },
17321
254k
    {AArch64_LDNT1SH_ZZR_D_REAL, 473, 1 },
17322
254k
    {AArch64_LDNT1SH_ZZR_S_REAL, 474, 1 },
17323
254k
    {AArch64_LDNT1SW_ZZR_D_REAL, 475, 1 },
17324
254k
    {AArch64_LDNT1W_ZRI, 476, 1 },
17325
254k
    {AArch64_LDNT1W_ZZR_D_REAL, 477, 1 },
17326
254k
    {AArch64_LDNT1W_ZZR_S_REAL, 478, 1 },
17327
254k
    {AArch64_LDPDi, 479, 1 },
17328
254k
    {AArch64_LDPQi, 480, 1 },
17329
254k
    {AArch64_LDPSWi, 481, 1 },
17330
254k
    {AArch64_LDPSi, 482, 1 },
17331
254k
    {AArch64_LDPWi, 483, 1 },
17332
254k
    {AArch64_LDPXi, 484, 1 },
17333
254k
    {AArch64_LDRAAindexed, 485, 1 },
17334
254k
    {AArch64_LDRABindexed, 486, 1 },
17335
254k
    {AArch64_LDRBBroX, 487, 1 },
17336
254k
    {AArch64_LDRBBui, 488, 1 },
17337
254k
    {AArch64_LDRBroX, 489, 1 },
17338
254k
    {AArch64_LDRBui, 490, 1 },
17339
254k
    {AArch64_LDRDroX, 491, 1 },
17340
254k
    {AArch64_LDRDui, 492, 1 },
17341
254k
    {AArch64_LDRHHroX, 493, 1 },
17342
254k
    {AArch64_LDRHHui, 494, 1 },
17343
254k
    {AArch64_LDRHroX, 495, 1 },
17344
254k
    {AArch64_LDRHui, 496, 1 },
17345
254k
    {AArch64_LDRQroX, 497, 1 },
17346
254k
    {AArch64_LDRQui, 498, 1 },
17347
254k
    {AArch64_LDRSBWroX, 499, 1 },
17348
254k
    {AArch64_LDRSBWui, 500, 1 },
17349
254k
    {AArch64_LDRSBXroX, 501, 1 },
17350
254k
    {AArch64_LDRSBXui, 502, 1 },
17351
254k
    {AArch64_LDRSHWroX, 503, 1 },
17352
254k
    {AArch64_LDRSHWui, 504, 1 },
17353
254k
    {AArch64_LDRSHXroX, 505, 1 },
17354
254k
    {AArch64_LDRSHXui, 506, 1 },
17355
254k
    {AArch64_LDRSWroX, 507, 1 },
17356
254k
    {AArch64_LDRSWui, 508, 1 },
17357
254k
    {AArch64_LDRSroX, 509, 1 },
17358
254k
    {AArch64_LDRSui, 510, 1 },
17359
254k
    {AArch64_LDRWroX, 511, 1 },
17360
254k
    {AArch64_LDRWui, 512, 1 },
17361
254k
    {AArch64_LDRXroX, 513, 1 },
17362
254k
    {AArch64_LDRXui, 514, 1 },
17363
254k
    {AArch64_LDR_PXI, 515, 1 },
17364
254k
    {AArch64_LDR_ZA, 516, 1 },
17365
254k
    {AArch64_LDR_ZXI, 517, 1 },
17366
254k
    {AArch64_LDSETB, 518, 1 },
17367
254k
    {AArch64_LDSETH, 519, 1 },
17368
254k
    {AArch64_LDSETLB, 520, 1 },
17369
254k
    {AArch64_LDSETLH, 521, 1 },
17370
254k
    {AArch64_LDSETLW, 522, 1 },
17371
254k
    {AArch64_LDSETLX, 523, 1 },
17372
254k
    {AArch64_LDSETW, 524, 1 },
17373
254k
    {AArch64_LDSETX, 525, 1 },
17374
254k
    {AArch64_LDSMAXB, 526, 1 },
17375
254k
    {AArch64_LDSMAXH, 527, 1 },
17376
254k
    {AArch64_LDSMAXLB, 528, 1 },
17377
254k
    {AArch64_LDSMAXLH, 529, 1 },
17378
254k
    {AArch64_LDSMAXLW, 530, 1 },
17379
254k
    {AArch64_LDSMAXLX, 531, 1 },
17380
254k
    {AArch64_LDSMAXW, 532, 1 },
17381
254k
    {AArch64_LDSMAXX, 533, 1 },
17382
254k
    {AArch64_LDSMINB, 534, 1 },
17383
254k
    {AArch64_LDSMINH, 535, 1 },
17384
254k
    {AArch64_LDSMINLB, 536, 1 },
17385
254k
    {AArch64_LDSMINLH, 537, 1 },
17386
254k
    {AArch64_LDSMINLW, 538, 1 },
17387
254k
    {AArch64_LDSMINLX, 539, 1 },
17388
254k
    {AArch64_LDSMINW, 540, 1 },
17389
254k
    {AArch64_LDSMINX, 541, 1 },
17390
254k
    {AArch64_LDTRBi, 542, 1 },
17391
254k
    {AArch64_LDTRHi, 543, 1 },
17392
254k
    {AArch64_LDTRSBWi, 544, 1 },
17393
254k
    {AArch64_LDTRSBXi, 545, 1 },
17394
254k
    {AArch64_LDTRSHWi, 546, 1 },
17395
254k
    {AArch64_LDTRSHXi, 547, 1 },
17396
254k
    {AArch64_LDTRSWi, 548, 1 },
17397
254k
    {AArch64_LDTRWi, 549, 1 },
17398
254k
    {AArch64_LDTRXi, 550, 1 },
17399
254k
    {AArch64_LDUMAXB, 551, 1 },
17400
254k
    {AArch64_LDUMAXH, 552, 1 },
17401
254k
    {AArch64_LDUMAXLB, 553, 1 },
17402
254k
    {AArch64_LDUMAXLH, 554, 1 },
17403
254k
    {AArch64_LDUMAXLW, 555, 1 },
17404
254k
    {AArch64_LDUMAXLX, 556, 1 },
17405
254k
    {AArch64_LDUMAXW, 557, 1 },
17406
254k
    {AArch64_LDUMAXX, 558, 1 },
17407
254k
    {AArch64_LDUMINB, 559, 1 },
17408
254k
    {AArch64_LDUMINH, 560, 1 },
17409
254k
    {AArch64_LDUMINLB, 561, 1 },
17410
254k
    {AArch64_LDUMINLH, 562, 1 },
17411
254k
    {AArch64_LDUMINLW, 563, 1 },
17412
254k
    {AArch64_LDUMINLX, 564, 1 },
17413
254k
    {AArch64_LDUMINW, 565, 1 },
17414
254k
    {AArch64_LDUMINX, 566, 1 },
17415
254k
    {AArch64_LDURBBi, 567, 1 },
17416
254k
    {AArch64_LDURBi, 568, 1 },
17417
254k
    {AArch64_LDURDi, 569, 1 },
17418
254k
    {AArch64_LDURHHi, 570, 1 },
17419
254k
    {AArch64_LDURHi, 571, 1 },
17420
254k
    {AArch64_LDURQi, 572, 1 },
17421
254k
    {AArch64_LDURSBWi, 573, 1 },
17422
254k
    {AArch64_LDURSBXi, 574, 1 },
17423
254k
    {AArch64_LDURSHWi, 575, 1 },
17424
254k
    {AArch64_LDURSHXi, 576, 1 },
17425
254k
    {AArch64_LDURSWi, 577, 1 },
17426
254k
    {AArch64_LDURSi, 578, 1 },
17427
254k
    {AArch64_LDURWi, 579, 1 },
17428
254k
    {AArch64_LDURXi, 580, 1 },
17429
254k
    {AArch64_MADDWrrr, 581, 1 },
17430
254k
    {AArch64_MADDXrrr, 582, 1 },
17431
254k
    {AArch64_MSRpstatesvcrImm1, 583, 6 },
17432
254k
    {AArch64_MSUBWrrr, 589, 1 },
17433
254k
    {AArch64_MSUBXrrr, 590, 1 },
17434
254k
    {AArch64_NOTv16i8, 591, 1 },
17435
254k
    {AArch64_NOTv8i8, 592, 1 },
17436
254k
    {AArch64_ORNWrs, 593, 3 },
17437
254k
    {AArch64_ORNXrs, 596, 3 },
17438
254k
    {AArch64_ORRS_PPzPP, 599, 1 },
17439
254k
    {AArch64_ORRWrs, 600, 2 },
17440
254k
    {AArch64_ORRXrs, 602, 2 },
17441
254k
    {AArch64_ORR_PPzPP, 604, 1 },
17442
254k
    {AArch64_ORR_ZI, 605, 3 },
17443
254k
    {AArch64_ORR_ZZZ, 608, 1 },
17444
254k
    {AArch64_ORRv16i8, 609, 1 },
17445
254k
    {AArch64_ORRv8i8, 610, 1 },
17446
254k
    {AArch64_PACIA1716, 611, 1 },
17447
254k
    {AArch64_PACIASP, 612, 1 },
17448
254k
    {AArch64_PACIAZ, 613, 1 },
17449
254k
    {AArch64_PACIB1716, 614, 1 },
17450
254k
    {AArch64_PACIBSP, 615, 1 },
17451
254k
    {AArch64_PACIBZ, 616, 1 },
17452
254k
    {AArch64_PRFB_D_PZI, 617, 1 },
17453
254k
    {AArch64_PRFB_PRI, 618, 1 },
17454
254k
    {AArch64_PRFB_S_PZI, 619, 1 },
17455
254k
    {AArch64_PRFD_D_PZI, 620, 1 },
17456
254k
    {AArch64_PRFD_PRI, 621, 1 },
17457
254k
    {AArch64_PRFD_S_PZI, 622, 1 },
17458
254k
    {AArch64_PRFH_D_PZI, 623, 1 },
17459
254k
    {AArch64_PRFH_PRI, 624, 1 },
17460
254k
    {AArch64_PRFH_S_PZI, 625, 1 },
17461
254k
    {AArch64_PRFMroX, 626, 1 },
17462
254k
    {AArch64_PRFMui, 627, 1 },
17463
254k
    {AArch64_PRFUMi, 628, 1 },
17464
254k
    {AArch64_PRFW_D_PZI, 629, 1 },
17465
254k
    {AArch64_PRFW_PRI, 630, 1 },
17466
254k
    {AArch64_PRFW_S_PZI, 631, 1 },
17467
254k
    {AArch64_PTRUES_B, 632, 1 },
17468
254k
    {AArch64_PTRUES_D, 633, 1 },
17469
254k
    {AArch64_PTRUES_H, 634, 1 },
17470
254k
    {AArch64_PTRUES_S, 635, 1 },
17471
254k
    {AArch64_PTRUE_B, 636, 1 },
17472
254k
    {AArch64_PTRUE_D, 637, 1 },
17473
254k
    {AArch64_PTRUE_H, 638, 1 },
17474
254k
    {AArch64_PTRUE_S, 639, 1 },
17475
254k
    {AArch64_RET, 640, 1 },
17476
254k
    {AArch64_SBCSWr, 641, 1 },
17477
254k
    {AArch64_SBCSXr, 642, 1 },
17478
254k
    {AArch64_SBCWr, 643, 1 },
17479
254k
    {AArch64_SBCXr, 644, 1 },
17480
254k
    {AArch64_SBFMWri, 645, 3 },
17481
254k
    {AArch64_SBFMXri, 648, 4 },
17482
254k
    {AArch64_SEL_PPPP, 652, 1 },
17483
254k
    {AArch64_SEL_ZPZZ_B, 653, 1 },
17484
254k
    {AArch64_SEL_ZPZZ_D, 654, 1 },
17485
254k
    {AArch64_SEL_ZPZZ_H, 655, 1 },
17486
254k
    {AArch64_SEL_ZPZZ_S, 656, 1 },
17487
254k
    {AArch64_SMADDLrrr, 657, 1 },
17488
254k
    {AArch64_SMSUBLrrr, 658, 1 },
17489
254k
    {AArch64_SQDECB_XPiI, 659, 2 },
17490
254k
    {AArch64_SQDECB_XPiWdI, 661, 2 },
17491
254k
    {AArch64_SQDECD_XPiI, 663, 2 },
17492
254k
    {AArch64_SQDECD_XPiWdI, 665, 2 },
17493
254k
    {AArch64_SQDECD_ZPiI, 667, 2 },
17494
254k
    {AArch64_SQDECH_XPiI, 669, 2 },
17495
254k
    {AArch64_SQDECH_XPiWdI, 671, 2 },
17496
254k
    {AArch64_SQDECH_ZPiI, 673, 2 },
17497
254k
    {AArch64_SQDECW_XPiI, 675, 2 },
17498
254k
    {AArch64_SQDECW_XPiWdI, 677, 2 },
17499
254k
    {AArch64_SQDECW_ZPiI, 679, 2 },
17500
254k
    {AArch64_SQINCB_XPiI, 681, 2 },
17501
254k
    {AArch64_SQINCB_XPiWdI, 683, 2 },
17502
254k
    {AArch64_SQINCD_XPiI, 685, 2 },
17503
254k
    {AArch64_SQINCD_XPiWdI, 687, 2 },
17504
254k
    {AArch64_SQINCD_ZPiI, 689, 2 },
17505
254k
    {AArch64_SQINCH_XPiI, 691, 2 },
17506
254k
    {AArch64_SQINCH_XPiWdI, 693, 2 },
17507
254k
    {AArch64_SQINCH_ZPiI, 695, 2 },
17508
254k
    {AArch64_SQINCW_XPiI, 697, 2 },
17509
254k
    {AArch64_SQINCW_XPiWdI, 699, 2 },
17510
254k
    {AArch64_SQINCW_ZPiI, 701, 2 },
17511
254k
    {AArch64_SST1B_D_IMM, 703, 1 },
17512
254k
    {AArch64_SST1B_S_IMM, 704, 1 },
17513
254k
    {AArch64_SST1D_IMM, 705, 1 },
17514
254k
    {AArch64_SST1H_D_IMM, 706, 1 },
17515
254k
    {AArch64_SST1H_S_IMM, 707, 1 },
17516
254k
    {AArch64_SST1W_D_IMM, 708, 1 },
17517
254k
    {AArch64_SST1W_IMM, 709, 1 },
17518
254k
    {AArch64_ST1B_D_IMM, 710, 1 },
17519
254k
    {AArch64_ST1B_H_IMM, 711, 1 },
17520
254k
    {AArch64_ST1B_IMM, 712, 1 },
17521
254k
    {AArch64_ST1B_S_IMM, 713, 1 },
17522
254k
    {AArch64_ST1D_IMM, 714, 1 },
17523
254k
    {AArch64_ST1Fourv16b_POST, 715, 1 },
17524
254k
    {AArch64_ST1Fourv1d_POST, 716, 1 },
17525
254k
    {AArch64_ST1Fourv2d_POST, 717, 1 },
17526
254k
    {AArch64_ST1Fourv2s_POST, 718, 1 },
17527
254k
    {AArch64_ST1Fourv4h_POST, 719, 1 },
17528
254k
    {AArch64_ST1Fourv4s_POST, 720, 1 },
17529
254k
    {AArch64_ST1Fourv8b_POST, 721, 1 },
17530
254k
    {AArch64_ST1Fourv8h_POST, 722, 1 },
17531
254k
    {AArch64_ST1H_D_IMM, 723, 1 },
17532
254k
    {AArch64_ST1H_IMM, 724, 1 },
17533
254k
    {AArch64_ST1H_S_IMM, 725, 1 },
17534
254k
    {AArch64_ST1Onev16b_POST, 726, 1 },
17535
254k
    {AArch64_ST1Onev1d_POST, 727, 1 },
17536
254k
    {AArch64_ST1Onev2d_POST, 728, 1 },
17537
254k
    {AArch64_ST1Onev2s_POST, 729, 1 },
17538
254k
    {AArch64_ST1Onev4h_POST, 730, 1 },
17539
254k
    {AArch64_ST1Onev4s_POST, 731, 1 },
17540
254k
    {AArch64_ST1Onev8b_POST, 732, 1 },
17541
254k
    {AArch64_ST1Onev8h_POST, 733, 1 },
17542
254k
    {AArch64_ST1Threev16b_POST, 734, 1 },
17543
254k
    {AArch64_ST1Threev1d_POST, 735, 1 },
17544
254k
    {AArch64_ST1Threev2d_POST, 736, 1 },
17545
254k
    {AArch64_ST1Threev2s_POST, 737, 1 },
17546
254k
    {AArch64_ST1Threev4h_POST, 738, 1 },
17547
254k
    {AArch64_ST1Threev4s_POST, 739, 1 },
17548
254k
    {AArch64_ST1Threev8b_POST, 740, 1 },
17549
254k
    {AArch64_ST1Threev8h_POST, 741, 1 },
17550
254k
    {AArch64_ST1Twov16b_POST, 742, 1 },
17551
254k
    {AArch64_ST1Twov1d_POST, 743, 1 },
17552
254k
    {AArch64_ST1Twov2d_POST, 744, 1 },
17553
254k
    {AArch64_ST1Twov2s_POST, 745, 1 },
17554
254k
    {AArch64_ST1Twov4h_POST, 746, 1 },
17555
254k
    {AArch64_ST1Twov4s_POST, 747, 1 },
17556
254k
    {AArch64_ST1Twov8b_POST, 748, 1 },
17557
254k
    {AArch64_ST1Twov8h_POST, 749, 1 },
17558
254k
    {AArch64_ST1W_D_IMM, 750, 1 },
17559
254k
    {AArch64_ST1W_IMM, 751, 1 },
17560
254k
    {AArch64_ST1_MXIPXX_H_B, 752, 1 },
17561
254k
    {AArch64_ST1_MXIPXX_H_D, 753, 1 },
17562
254k
    {AArch64_ST1_MXIPXX_H_H, 754, 1 },
17563
254k
    {AArch64_ST1_MXIPXX_H_Q, 755, 1 },
17564
254k
    {AArch64_ST1_MXIPXX_H_S, 756, 1 },
17565
254k
    {AArch64_ST1_MXIPXX_V_B, 757, 1 },
17566
254k
    {AArch64_ST1_MXIPXX_V_D, 758, 1 },
17567
254k
    {AArch64_ST1_MXIPXX_V_H, 759, 1 },
17568
254k
    {AArch64_ST1_MXIPXX_V_Q, 760, 1 },
17569
254k
    {AArch64_ST1_MXIPXX_V_S, 761, 1 },
17570
254k
    {AArch64_ST1i16_POST, 762, 1 },
17571
254k
    {AArch64_ST1i32_POST, 763, 1 },
17572
254k
    {AArch64_ST1i64_POST, 764, 1 },
17573
254k
    {AArch64_ST1i8_POST, 765, 1 },
17574
254k
    {AArch64_ST2B_IMM, 766, 1 },
17575
254k
    {AArch64_ST2D_IMM, 767, 1 },
17576
254k
    {AArch64_ST2GOffset, 768, 1 },
17577
254k
    {AArch64_ST2H_IMM, 769, 1 },
17578
254k
    {AArch64_ST2Twov16b_POST, 770, 1 },
17579
254k
    {AArch64_ST2Twov2d_POST, 771, 1 },
17580
254k
    {AArch64_ST2Twov2s_POST, 772, 1 },
17581
254k
    {AArch64_ST2Twov4h_POST, 773, 1 },
17582
254k
    {AArch64_ST2Twov4s_POST, 774, 1 },
17583
254k
    {AArch64_ST2Twov8b_POST, 775, 1 },
17584
254k
    {AArch64_ST2Twov8h_POST, 776, 1 },
17585
254k
    {AArch64_ST2W_IMM, 777, 1 },
17586
254k
    {AArch64_ST2i16_POST, 778, 1 },
17587
254k
    {AArch64_ST2i32_POST, 779, 1 },
17588
254k
    {AArch64_ST2i64_POST, 780, 1 },
17589
254k
    {AArch64_ST2i8_POST, 781, 1 },
17590
254k
    {AArch64_ST3B_IMM, 782, 1 },
17591
254k
    {AArch64_ST3D_IMM, 783, 1 },
17592
254k
    {AArch64_ST3H_IMM, 784, 1 },
17593
254k
    {AArch64_ST3Threev16b_POST, 785, 1 },
17594
254k
    {AArch64_ST3Threev2d_POST, 786, 1 },
17595
254k
    {AArch64_ST3Threev2s_POST, 787, 1 },
17596
254k
    {AArch64_ST3Threev4h_POST, 788, 1 },
17597
254k
    {AArch64_ST3Threev4s_POST, 789, 1 },
17598
254k
    {AArch64_ST3Threev8b_POST, 790, 1 },
17599
254k
    {AArch64_ST3Threev8h_POST, 791, 1 },
17600
254k
    {AArch64_ST3W_IMM, 792, 1 },
17601
254k
    {AArch64_ST3i16_POST, 793, 1 },
17602
254k
    {AArch64_ST3i32_POST, 794, 1 },
17603
254k
    {AArch64_ST3i64_POST, 795, 1 },
17604
254k
    {AArch64_ST3i8_POST, 796, 1 },
17605
254k
    {AArch64_ST4B_IMM, 797, 1 },
17606
254k
    {AArch64_ST4D_IMM, 798, 1 },
17607
254k
    {AArch64_ST4Fourv16b_POST, 799, 1 },
17608
254k
    {AArch64_ST4Fourv2d_POST, 800, 1 },
17609
254k
    {AArch64_ST4Fourv2s_POST, 801, 1 },
17610
254k
    {AArch64_ST4Fourv4h_POST, 802, 1 },
17611
254k
    {AArch64_ST4Fourv4s_POST, 803, 1 },
17612
254k
    {AArch64_ST4Fourv8b_POST, 804, 1 },
17613
254k
    {AArch64_ST4Fourv8h_POST, 805, 1 },
17614
254k
    {AArch64_ST4H_IMM, 806, 1 },
17615
254k
    {AArch64_ST4W_IMM, 807, 1 },
17616
254k
    {AArch64_ST4i16_POST, 808, 1 },
17617
254k
    {AArch64_ST4i32_POST, 809, 1 },
17618
254k
    {AArch64_ST4i64_POST, 810, 1 },
17619
254k
    {AArch64_ST4i8_POST, 811, 1 },
17620
254k
    {AArch64_STGOffset, 812, 1 },
17621
254k
    {AArch64_STGPi, 813, 1 },
17622
254k
    {AArch64_STLURBi, 814, 1 },
17623
254k
    {AArch64_STLURHi, 815, 1 },
17624
254k
    {AArch64_STLURWi, 816, 1 },
17625
254k
    {AArch64_STLURXi, 817, 1 },
17626
254k
    {AArch64_STNPDi, 818, 1 },
17627
254k
    {AArch64_STNPQi, 819, 1 },
17628
254k
    {AArch64_STNPSi, 820, 1 },
17629
254k
    {AArch64_STNPWi, 821, 1 },
17630
254k
    {AArch64_STNPXi, 822, 1 },
17631
254k
    {AArch64_STNT1B_ZRI, 823, 1 },
17632
254k
    {AArch64_STNT1B_ZZR_D_REAL, 824, 1 },
17633
254k
    {AArch64_STNT1B_ZZR_S_REAL, 825, 1 },
17634
254k
    {AArch64_STNT1D_ZRI, 826, 1 },
17635
254k
    {AArch64_STNT1D_ZZR_D_REAL, 827, 1 },
17636
254k
    {AArch64_STNT1H_ZRI, 828, 1 },
17637
254k
    {AArch64_STNT1H_ZZR_D_REAL, 829, 1 },
17638
254k
    {AArch64_STNT1H_ZZR_S_REAL, 830, 1 },
17639
254k
    {AArch64_STNT1W_ZRI, 831, 1 },
17640
254k
    {AArch64_STNT1W_ZZR_D_REAL, 832, 1 },
17641
254k
    {AArch64_STNT1W_ZZR_S_REAL, 833, 1 },
17642
254k
    {AArch64_STPDi, 834, 1 },
17643
254k
    {AArch64_STPQi, 835, 1 },
17644
254k
    {AArch64_STPSi, 836, 1 },
17645
254k
    {AArch64_STPWi, 837, 1 },
17646
254k
    {AArch64_STPXi, 838, 1 },
17647
254k
    {AArch64_STRBBroX, 839, 1 },
17648
254k
    {AArch64_STRBBui, 840, 1 },
17649
254k
    {AArch64_STRBroX, 841, 1 },
17650
254k
    {AArch64_STRBui, 842, 1 },
17651
254k
    {AArch64_STRDroX, 843, 1 },
17652
254k
    {AArch64_STRDui, 844, 1 },
17653
254k
    {AArch64_STRHHroX, 845, 1 },
17654
254k
    {AArch64_STRHHui, 846, 1 },
17655
254k
    {AArch64_STRHroX, 847, 1 },
17656
254k
    {AArch64_STRHui, 848, 1 },
17657
254k
    {AArch64_STRQroX, 849, 1 },
17658
254k
    {AArch64_STRQui, 850, 1 },
17659
254k
    {AArch64_STRSroX, 851, 1 },
17660
254k
    {AArch64_STRSui, 852, 1 },
17661
254k
    {AArch64_STRWroX, 853, 1 },
17662
254k
    {AArch64_STRWui, 854, 1 },
17663
254k
    {AArch64_STRXroX, 855, 1 },
17664
254k
    {AArch64_STRXui, 856, 1 },
17665
254k
    {AArch64_STR_PXI, 857, 1 },
17666
254k
    {AArch64_STR_ZA, 858, 1 },
17667
254k
    {AArch64_STR_ZXI, 859, 1 },
17668
254k
    {AArch64_STTRBi, 860, 1 },
17669
254k
    {AArch64_STTRHi, 861, 1 },
17670
254k
    {AArch64_STTRWi, 862, 1 },
17671
254k
    {AArch64_STTRXi, 863, 1 },
17672
254k
    {AArch64_STURBBi, 864, 1 },
17673
254k
    {AArch64_STURBi, 865, 1 },
17674
254k
    {AArch64_STURDi, 866, 1 },
17675
254k
    {AArch64_STURHHi, 867, 1 },
17676
254k
    {AArch64_STURHi, 868, 1 },
17677
254k
    {AArch64_STURQi, 869, 1 },
17678
254k
    {AArch64_STURSi, 870, 1 },
17679
254k
    {AArch64_STURWi, 871, 1 },
17680
254k
    {AArch64_STURXi, 872, 1 },
17681
254k
    {AArch64_STZ2GOffset, 873, 1 },
17682
254k
    {AArch64_STZGOffset, 874, 1 },
17683
254k
    {AArch64_SUBSWri, 875, 1 },
17684
254k
    {AArch64_SUBSWrs, 876, 5 },
17685
254k
    {AArch64_SUBSWrx, 881, 3 },
17686
254k
    {AArch64_SUBSXri, 884, 1 },
17687
254k
    {AArch64_SUBSXrs, 885, 5 },
17688
254k
    {AArch64_SUBSXrx, 890, 1 },
17689
254k
    {AArch64_SUBSXrx64, 891, 3 },
17690
254k
    {AArch64_SUBWrs, 894, 3 },
17691
254k
    {AArch64_SUBWrx, 897, 2 },
17692
254k
    {AArch64_SUBXrs, 899, 3 },
17693
254k
    {AArch64_SUBXrx64, 902, 2 },
17694
254k
    {AArch64_SYSxt, 904, 1 },
17695
254k
    {AArch64_UBFMWri, 905, 3 },
17696
254k
    {AArch64_UBFMXri, 908, 4 },
17697
254k
    {AArch64_UMADDLrrr, 912, 1 },
17698
254k
    {AArch64_UMOVvi32, 913, 1 },
17699
254k
    {AArch64_UMOVvi32_idx0, 914, 1 },
17700
254k
    {AArch64_UMOVvi64, 915, 1 },
17701
254k
    {AArch64_UMOVvi64_idx0, 916, 1 },
17702
254k
    {AArch64_UMSUBLrrr, 917, 1 },
17703
254k
    {AArch64_UQDECB_WPiI, 918, 2 },
17704
254k
    {AArch64_UQDECB_XPiI, 920, 2 },
17705
254k
    {AArch64_UQDECD_WPiI, 922, 2 },
17706
254k
    {AArch64_UQDECD_XPiI, 924, 2 },
17707
254k
    {AArch64_UQDECD_ZPiI, 926, 2 },
17708
254k
    {AArch64_UQDECH_WPiI, 928, 2 },
17709
254k
    {AArch64_UQDECH_XPiI, 930, 2 },
17710
254k
    {AArch64_UQDECH_ZPiI, 932, 2 },
17711
254k
    {AArch64_UQDECW_WPiI, 934, 2 },
17712
254k
    {AArch64_UQDECW_XPiI, 936, 2 },
17713
254k
    {AArch64_UQDECW_ZPiI, 938, 2 },
17714
254k
    {AArch64_UQINCB_WPiI, 940, 2 },
17715
254k
    {AArch64_UQINCB_XPiI, 942, 2 },
17716
254k
    {AArch64_UQINCD_WPiI, 944, 2 },
17717
254k
    {AArch64_UQINCD_XPiI, 946, 2 },
17718
254k
    {AArch64_UQINCD_ZPiI, 948, 2 },
17719
254k
    {AArch64_UQINCH_WPiI, 950, 2 },
17720
254k
    {AArch64_UQINCH_XPiI, 952, 2 },
17721
254k
    {AArch64_UQINCH_ZPiI, 954, 2 },
17722
254k
    {AArch64_UQINCW_WPiI, 956, 2 },
17723
254k
    {AArch64_UQINCW_XPiI, 958, 2 },
17724
254k
    {AArch64_UQINCW_ZPiI, 960, 2 },
17725
254k
    {AArch64_XPACLRI, 962, 1 },
17726
254k
    {AArch64_ZERO_M, 963, 15 },
17727
254k
  };
17728
17729
254k
  static const AliasPattern Patterns[] = {
17730
    // AArch64_ADDSWri - 0
17731
254k
    {0, 0, 4, 2 },
17732
    // AArch64_ADDSWrs - 1
17733
254k
    {13, 2, 4, 4 },
17734
254k
    {24, 6, 4, 3 },
17735
254k
    {39, 9, 4, 4 },
17736
    // AArch64_ADDSWrx - 4
17737
254k
    {13, 13, 4, 4 },
17738
254k
    {55, 17, 4, 3 },
17739
254k
    {39, 20, 4, 4 },
17740
    // AArch64_ADDSXri - 7
17741
254k
    {0, 24, 4, 2 },
17742
    // AArch64_ADDSXrs - 8
17743
254k
    {13, 26, 4, 4 },
17744
254k
    {24, 30, 4, 3 },
17745
254k
    {39, 33, 4, 4 },
17746
    // AArch64_ADDSXrx - 11
17747
254k
    {55, 37, 4, 3 },
17748
    // AArch64_ADDSXrx64 - 12
17749
254k
    {13, 40, 4, 4 },
17750
254k
    {55, 44, 4, 3 },
17751
254k
    {39, 47, 4, 4 },
17752
    // AArch64_ADDWri - 15
17753
254k
    {70, 51, 4, 4 },
17754
254k
    {70, 55, 4, 4 },
17755
    // AArch64_ADDWrs - 17
17756
254k
    {81, 59, 4, 4 },
17757
    // AArch64_ADDWrx - 18
17758
254k
    {81, 63, 4, 4 },
17759
254k
    {81, 67, 4, 4 },
17760
    // AArch64_ADDXri - 20
17761
254k
    {70, 71, 4, 4 },
17762
254k
    {70, 75, 4, 4 },
17763
    // AArch64_ADDXrs - 22
17764
254k
    {81, 79, 4, 4 },
17765
    // AArch64_ADDXrx64 - 23
17766
254k
    {81, 83, 4, 4 },
17767
254k
    {81, 87, 4, 4 },
17768
    // AArch64_ANDSWri - 25
17769
254k
    {96, 91, 3, 2 },
17770
    // AArch64_ANDSWrs - 26
17771
254k
    {109, 93, 4, 4 },
17772
254k
    {120, 97, 4, 3 },
17773
254k
    {135, 100, 4, 4 },
17774
    // AArch64_ANDSXri - 29
17775
254k
    {151, 104, 3, 2 },
17776
    // AArch64_ANDSXrs - 30
17777
254k
    {109, 106, 4, 4 },
17778
254k
    {120, 110, 4, 3 },
17779
254k
    {135, 113, 4, 4 },
17780
    // AArch64_ANDS_PPzPP - 33
17781
254k
    {164, 117, 4, 7 },
17782
    // AArch64_ANDWrs - 34
17783
254k
    {188, 124, 4, 4 },
17784
    // AArch64_ANDXrs - 35
17785
254k
    {188, 128, 4, 4 },
17786
    // AArch64_AND_PPzPP - 36
17787
254k
    {203, 132, 4, 7 },
17788
    // AArch64_AND_ZI - 37
17789
254k
    {226, 139, 3, 6 },
17790
254k
    {247, 145, 3, 6 },
17791
254k
    {268, 151, 3, 6 },
17792
    // AArch64_AUTIA1716 - 40
17793
254k
    {289, 157, 0, 1 },
17794
    // AArch64_AUTIASP - 41
17795
254k
    {299, 158, 0, 1 },
17796
    // AArch64_AUTIAZ - 42
17797
254k
    {307, 159, 0, 1 },
17798
    // AArch64_AUTIB1716 - 43
17799
254k
    {314, 160, 0, 1 },
17800
    // AArch64_AUTIBSP - 44
17801
254k
    {324, 161, 0, 1 },
17802
    // AArch64_AUTIBZ - 45
17803
254k
    {332, 162, 0, 1 },
17804
    // AArch64_BICSWrs - 46
17805
254k
    {339, 163, 4, 4 },
17806
    // AArch64_BICSXrs - 47
17807
254k
    {339, 167, 4, 4 },
17808
    // AArch64_BICWrs - 48
17809
254k
    {355, 171, 4, 4 },
17810
    // AArch64_BICXrs - 49
17811
254k
    {355, 175, 4, 4 },
17812
    // AArch64_CLREX - 50
17813
254k
    {370, 179, 1, 1 },
17814
    // AArch64_CNTB_XPiI - 51
17815
254k
    {376, 180, 3, 6 },
17816
254k
    {384, 186, 3, 6 },
17817
    // AArch64_CNTD_XPiI - 53
17818
254k
    {398, 192, 3, 6 },
17819
254k
    {406, 198, 3, 6 },
17820
    // AArch64_CNTH_XPiI - 55
17821
254k
    {420, 204, 3, 6 },
17822
254k
    {428, 210, 3, 6 },
17823
    // AArch64_CNTW_XPiI - 57
17824
254k
    {442, 216, 3, 6 },
17825
254k
    {450, 222, 3, 6 },
17826
    // AArch64_CPY_ZPmI_B - 59
17827
254k
    {464, 228, 5, 6 },
17828
    // AArch64_CPY_ZPmI_D - 60
17829
254k
    {487, 234, 5, 6 },
17830
    // AArch64_CPY_ZPmI_H - 61
17831
254k
    {510, 240, 5, 6 },
17832
    // AArch64_CPY_ZPmI_S - 62
17833
254k
    {533, 246, 5, 6 },
17834
    // AArch64_CPY_ZPmR_B - 63
17835
254k
    {556, 252, 4, 7 },
17836
    // AArch64_CPY_ZPmR_D - 64
17837
254k
    {577, 259, 4, 7 },
17838
    // AArch64_CPY_ZPmR_H - 65
17839
254k
    {598, 266, 4, 7 },
17840
    // AArch64_CPY_ZPmR_S - 66
17841
254k
    {619, 273, 4, 7 },
17842
    // AArch64_CPY_ZPmV_B - 67
17843
254k
    {556, 280, 4, 7 },
17844
    // AArch64_CPY_ZPmV_D - 68
17845
254k
    {577, 287, 4, 7 },
17846
    // AArch64_CPY_ZPmV_H - 69
17847
254k
    {598, 294, 4, 7 },
17848
    // AArch64_CPY_ZPmV_S - 70
17849
254k
    {619, 301, 4, 7 },
17850
    // AArch64_CPY_ZPzI_B - 71
17851
254k
    {640, 308, 4, 5 },
17852
    // AArch64_CPY_ZPzI_D - 72
17853
254k
    {663, 313, 4, 5 },
17854
    // AArch64_CPY_ZPzI_H - 73
17855
254k
    {686, 318, 4, 5 },
17856
    // AArch64_CPY_ZPzI_S - 74
17857
254k
    {709, 323, 4, 5 },
17858
    // AArch64_CSINCWr - 75
17859
254k
    {732, 328, 4, 4 },
17860
254k
    {746, 332, 4, 4 },
17861
    // AArch64_CSINCXr - 77
17862
254k
    {732, 336, 4, 4 },
17863
254k
    {746, 340, 4, 4 },
17864
    // AArch64_CSINVWr - 79
17865
254k
    {764, 344, 4, 4 },
17866
254k
    {779, 348, 4, 4 },
17867
    // AArch64_CSINVXr - 81
17868
254k
    {764, 352, 4, 4 },
17869
254k
    {779, 356, 4, 4 },
17870
    // AArch64_CSNEGWr - 83
17871
254k
    {797, 360, 4, 4 },
17872
    // AArch64_CSNEGXr - 84
17873
254k
    {797, 364, 4, 4 },
17874
    // AArch64_DCPS1 - 85
17875
254k
    {815, 368, 1, 1 },
17876
    // AArch64_DCPS2 - 86
17877
254k
    {821, 369, 1, 1 },
17878
    // AArch64_DCPS3 - 87
17879
254k
    {827, 370, 1, 2 },
17880
    // AArch64_DECB_XPiI - 88
17881
254k
    {833, 372, 4, 7 },
17882
254k
    {841, 379, 4, 7 },
17883
    // AArch64_DECD_XPiI - 90
17884
254k
    {855, 386, 4, 7 },
17885
254k
    {863, 393, 4, 7 },
17886
    // AArch64_DECD_ZPiI - 92
17887
254k
    {877, 400, 4, 7 },
17888
254k
    {887, 407, 4, 7 },
17889
    // AArch64_DECH_XPiI - 94
17890
254k
    {903, 414, 4, 7 },
17891
254k
    {911, 421, 4, 7 },
17892
    // AArch64_DECH_ZPiI - 96
17893
254k
    {925, 428, 4, 7 },
17894
254k
    {935, 435, 4, 7 },
17895
    // AArch64_DECW_XPiI - 98
17896
254k
    {951, 442, 4, 7 },
17897
254k
    {959, 449, 4, 7 },
17898
    // AArch64_DECW_ZPiI - 100
17899
254k
    {973, 456, 4, 7 },
17900
254k
    {983, 463, 4, 7 },
17901
    // AArch64_DSB - 102
17902
254k
    {999, 470, 1, 1 },
17903
254k
    {1004, 471, 1, 1 },
17904
254k
    {1010, 472, 1, 2 },
17905
    // AArch64_DUPM_ZI - 105
17906
254k
    {1014, 474, 2, 5 },
17907
254k
    {1029, 479, 2, 5 },
17908
254k
    {1044, 484, 2, 5 },
17909
254k
    {1059, 489, 2, 5 },
17910
254k
    {1075, 494, 2, 5 },
17911
254k
    {1091, 499, 2, 5 },
17912
    // AArch64_DUP_ZI_B - 111
17913
254k
    {1107, 504, 3, 4 },
17914
    // AArch64_DUP_ZI_D - 112
17915
254k
    {1122, 508, 3, 4 },
17916
254k
    {1137, 512, 3, 6 },
17917
    // AArch64_DUP_ZI_H - 114
17918
254k
    {1153, 518, 3, 4 },
17919
254k
    {1168, 522, 3, 6 },
17920
    // AArch64_DUP_ZI_S - 116
17921
254k
    {1184, 528, 3, 4 },
17922
254k
    {1199, 532, 3, 6 },
17923
    // AArch64_DUP_ZR_B - 118
17924
254k
    {1215, 538, 2, 5 },
17925
    // AArch64_DUP_ZR_D - 119
17926
254k
    {1228, 543, 2, 5 },
17927
    // AArch64_DUP_ZR_H - 120
17928
254k
    {1241, 548, 2, 5 },
17929
    // AArch64_DUP_ZR_S - 121
17930
254k
    {1254, 553, 2, 5 },
17931
    // AArch64_DUP_ZZI_B - 122
17932
254k
    {1267, 558, 3, 6 },
17933
254k
    {1282, 564, 3, 5 },
17934
    // AArch64_DUP_ZZI_D - 124
17935
254k
    {1301, 569, 3, 6 },
17936
254k
    {1316, 575, 3, 5 },
17937
    // AArch64_DUP_ZZI_H - 126
17938
254k
    {1335, 580, 3, 6 },
17939
254k
    {1350, 586, 3, 5 },
17940
    // AArch64_DUP_ZZI_Q - 128
17941
254k
    {1369, 591, 3, 6 },
17942
254k
    {1384, 597, 3, 5 },
17943
    // AArch64_DUP_ZZI_S - 130
17944
254k
    {1403, 602, 3, 6 },
17945
254k
    {1418, 608, 3, 5 },
17946
    // AArch64_EONWrs - 132
17947
254k
    {1437, 613, 4, 4 },
17948
    // AArch64_EONXrs - 133
17949
254k
    {1437, 617, 4, 4 },
17950
    // AArch64_EORS_PPzPP - 134
17951
254k
    {1452, 621, 4, 7 },
17952
    // AArch64_EORWrs - 135
17953
254k
    {1476, 628, 4, 4 },
17954
    // AArch64_EORXrs - 136
17955
254k
    {1476, 632, 4, 4 },
17956
    // AArch64_EOR_PPzPP - 137
17957
254k
    {1491, 636, 4, 7 },
17958
    // AArch64_EOR_ZI - 138
17959
254k
    {1514, 643, 3, 6 },
17960
254k
    {1535, 649, 3, 6 },
17961
254k
    {1556, 655, 3, 6 },
17962
    // AArch64_EXTRACT_ZPMXI_H_B - 141
17963
254k
    {1577, 661, 5, 5 },
17964
    // AArch64_EXTRACT_ZPMXI_H_D - 142
17965
254k
    {1610, 666, 5, 5 },
17966
    // AArch64_EXTRACT_ZPMXI_H_H - 143
17967
254k
    {1643, 671, 5, 5 },
17968
    // AArch64_EXTRACT_ZPMXI_H_Q - 144
17969
254k
    {1676, 676, 5, 5 },
17970
    // AArch64_EXTRACT_ZPMXI_H_S - 145
17971
254k
    {1709, 681, 5, 5 },
17972
    // AArch64_EXTRACT_ZPMXI_V_B - 146
17973
254k
    {1742, 686, 5, 5 },
17974
    // AArch64_EXTRACT_ZPMXI_V_D - 147
17975
254k
    {1775, 691, 5, 5 },
17976
    // AArch64_EXTRACT_ZPMXI_V_H - 148
17977
254k
    {1808, 696, 5, 5 },
17978
    // AArch64_EXTRACT_ZPMXI_V_Q - 149
17979
254k
    {1841, 701, 5, 5 },
17980
    // AArch64_EXTRACT_ZPMXI_V_S - 150
17981
254k
    {1874, 706, 5, 5 },
17982
    // AArch64_EXTRWrri - 151
17983
254k
    {1907, 711, 4, 3 },
17984
    // AArch64_EXTRXrri - 152
17985
254k
    {1907, 714, 4, 3 },
17986
    // AArch64_FCPY_ZPmI_D - 153
17987
254k
    {1922, 717, 4, 6 },
17988
    // AArch64_FCPY_ZPmI_H - 154
17989
254k
    {1946, 723, 4, 6 },
17990
    // AArch64_FCPY_ZPmI_S - 155
17991
254k
    {1970, 729, 4, 6 },
17992
    // AArch64_FDUP_ZI_D - 156
17993
254k
    {1994, 735, 2, 4 },
17994
    // AArch64_FDUP_ZI_H - 157
17995
254k
    {2010, 739, 2, 4 },
17996
    // AArch64_FDUP_ZI_S - 158
17997
254k
    {2026, 743, 2, 4 },
17998
    // AArch64_GLD1B_D_IMM_REAL - 159
17999
254k
    {2042, 747, 4, 5 },
18000
    // AArch64_GLD1B_S_IMM_REAL - 160
18001
254k
    {2068, 752, 4, 5 },
18002
    // AArch64_GLD1D_IMM_REAL - 161
18003
254k
    {2094, 757, 4, 5 },
18004
    // AArch64_GLD1H_D_IMM_REAL - 162
18005
254k
    {2120, 762, 4, 5 },
18006
    // AArch64_GLD1H_S_IMM_REAL - 163
18007
254k
    {2146, 767, 4, 5 },
18008
    // AArch64_GLD1SB_D_IMM_REAL - 164
18009
254k
    {2172, 772, 4, 5 },
18010
    // AArch64_GLD1SB_S_IMM_REAL - 165
18011
254k
    {2199, 777, 4, 5 },
18012
    // AArch64_GLD1SH_D_IMM_REAL - 166
18013
254k
    {2226, 782, 4, 5 },
18014
    // AArch64_GLD1SH_S_IMM_REAL - 167
18015
254k
    {2253, 787, 4, 5 },
18016
    // AArch64_GLD1SW_D_IMM_REAL - 168
18017
254k
    {2280, 792, 4, 5 },
18018
    // AArch64_GLD1W_D_IMM_REAL - 169
18019
254k
    {2307, 797, 4, 5 },
18020
    // AArch64_GLD1W_IMM_REAL - 170
18021
254k
    {2333, 802, 4, 5 },
18022
    // AArch64_GLDFF1B_D_IMM_REAL - 171
18023
254k
    {2359, 807, 4, 5 },
18024
    // AArch64_GLDFF1B_S_IMM_REAL - 172
18025
254k
    {2387, 812, 4, 5 },
18026
    // AArch64_GLDFF1D_IMM_REAL - 173
18027
254k
    {2415, 817, 4, 5 },
18028
    // AArch64_GLDFF1H_D_IMM_REAL - 174
18029
254k
    {2443, 822, 4, 5 },
18030
    // AArch64_GLDFF1H_S_IMM_REAL - 175
18031
254k
    {2471, 827, 4, 5 },
18032
    // AArch64_GLDFF1SB_D_IMM_REAL - 176
18033
254k
    {2499, 832, 4, 5 },
18034
    // AArch64_GLDFF1SB_S_IMM_REAL - 177
18035
254k
    {2528, 837, 4, 5 },
18036
    // AArch64_GLDFF1SH_D_IMM_REAL - 178
18037
254k
    {2557, 842, 4, 5 },
18038
    // AArch64_GLDFF1SH_S_IMM_REAL - 179
18039
254k
    {2586, 847, 4, 5 },
18040
    // AArch64_GLDFF1SW_D_IMM_REAL - 180
18041
254k
    {2615, 852, 4, 5 },
18042
    // AArch64_GLDFF1W_D_IMM_REAL - 181
18043
254k
    {2644, 857, 4, 5 },
18044
    // AArch64_GLDFF1W_IMM_REAL - 182
18045
254k
    {2672, 862, 4, 5 },
18046
    // AArch64_HINT - 183
18047
254k
    {2700, 867, 1, 1 },
18048
254k
    {2704, 868, 1, 1 },
18049
254k
    {2710, 869, 1, 1 },
18050
254k
    {2714, 870, 1, 1 },
18051
254k
    {2718, 871, 1, 1 },
18052
254k
    {2722, 872, 1, 1 },
18053
254k
    {2727, 873, 1, 1 },
18054
254k
    {2731, 874, 1, 2 },
18055
254k
    {2735, 876, 1, 1 },
18056
254k
    {2740, 877, 1, 2 },
18057
254k
    {2744, 879, 1, 2 },
18058
254k
    {2753, 881, 1, 2 },
18059
    // AArch64_INCB_XPiI - 195
18060
254k
    {2762, 883, 4, 7 },
18061
254k
    {2770, 890, 4, 7 },
18062
    // AArch64_INCD_XPiI - 197
18063
254k
    {2784, 897, 4, 7 },
18064
254k
    {2792, 904, 4, 7 },
18065
    // AArch64_INCD_ZPiI - 199
18066
254k
    {2806, 911, 4, 7 },
18067
254k
    {2816, 918, 4, 7 },
18068
    // AArch64_INCH_XPiI - 201
18069
254k
    {2832, 925, 4, 7 },
18070
254k
    {2840, 932, 4, 7 },
18071
    // AArch64_INCH_ZPiI - 203
18072
254k
    {2854, 939, 4, 7 },
18073
254k
    {2864, 946, 4, 7 },
18074
    // AArch64_INCW_XPiI - 205
18075
254k
    {2880, 953, 4, 7 },
18076
254k
    {2888, 960, 4, 7 },
18077
    // AArch64_INCW_ZPiI - 207
18078
254k
    {2902, 967, 4, 7 },
18079
254k
    {2912, 974, 4, 7 },
18080
    // AArch64_INSERT_MXIPZ_H_B - 209
18081
254k
    {2928, 981, 5, 6 },
18082
    // AArch64_INSERT_MXIPZ_H_D - 210
18083
254k
    {2961, 987, 5, 6 },
18084
    // AArch64_INSERT_MXIPZ_H_H - 211
18085
254k
    {2994, 993, 5, 6 },
18086
    // AArch64_INSERT_MXIPZ_H_Q - 212
18087
254k
    {3027, 999, 5, 6 },
18088
    // AArch64_INSERT_MXIPZ_H_S - 213
18089
254k
    {3060, 1005, 5, 6 },
18090
    // AArch64_INSERT_MXIPZ_V_B - 214
18091
254k
    {3093, 1011, 5, 6 },
18092
    // AArch64_INSERT_MXIPZ_V_D - 215
18093
254k
    {3126, 1017, 5, 6 },
18094
    // AArch64_INSERT_MXIPZ_V_H - 216
18095
254k
    {3159, 1023, 5, 6 },
18096
    // AArch64_INSERT_MXIPZ_V_Q - 217
18097
254k
    {3192, 1029, 5, 6 },
18098
    // AArch64_INSERT_MXIPZ_V_S - 218
18099
254k
    {3225, 1035, 5, 6 },
18100
    // AArch64_INSvi16gpr - 219
18101
254k
    {3258, 1041, 4, 5 },
18102
    // AArch64_INSvi16lane - 220
18103
254k
    {3277, 1046, 5, 5 },
18104
    // AArch64_INSvi32gpr - 221
18105
254k
    {3304, 1051, 4, 5 },
18106
    // AArch64_INSvi32lane - 222
18107
254k
    {3323, 1056, 5, 5 },
18108
    // AArch64_INSvi64gpr - 223
18109
254k
    {3350, 1061, 4, 5 },
18110
    // AArch64_INSvi64lane - 224
18111
254k
    {3369, 1066, 5, 5 },
18112
    // AArch64_INSvi8gpr - 225
18113
254k
    {3396, 1071, 4, 5 },
18114
    // AArch64_INSvi8lane - 226
18115
254k
    {3415, 1076, 5, 5 },
18116
    // AArch64_IRG - 227
18117
254k
    {3442, 1081, 3, 4 },
18118
    // AArch64_ISB - 228
18119
254k
    {3453, 1085, 1, 1 },
18120
    // AArch64_LD1B_D_IMM_REAL - 229
18121
254k
    {3457, 1086, 4, 7 },
18122
    // AArch64_LD1B_H_IMM_REAL - 230
18123
254k
    {3481, 1093, 4, 7 },
18124
    // AArch64_LD1B_IMM_REAL - 231
18125
254k
    {3505, 1100, 4, 7 },
18126
    // AArch64_LD1B_S_IMM_REAL - 232
18127
254k
    {3529, 1107, 4, 7 },
18128
    // AArch64_LD1D_IMM_REAL - 233
18129
254k
    {3553, 1114, 4, 7 },
18130
    // AArch64_LD1Fourv16b_POST - 234
18131
254k
    {3577, 1121, 4, 5 },
18132
    // AArch64_LD1Fourv1d_POST - 235
18133
254k
    {3597, 1126, 4, 5 },
18134
    // AArch64_LD1Fourv2d_POST - 236
18135
254k
    {3617, 1131, 4, 5 },
18136
    // AArch64_LD1Fourv2s_POST - 237
18137
254k
    {3637, 1136, 4, 5 },
18138
    // AArch64_LD1Fourv4h_POST - 238
18139
254k
    {3657, 1141, 4, 5 },
18140
    // AArch64_LD1Fourv4s_POST - 239
18141
254k
    {3677, 1146, 4, 5 },
18142
    // AArch64_LD1Fourv8b_POST - 240
18143
254k
    {3697, 1151, 4, 5 },
18144
    // AArch64_LD1Fourv8h_POST - 241
18145
254k
    {3717, 1156, 4, 5 },
18146
    // AArch64_LD1H_D_IMM_REAL - 242
18147
254k
    {3737, 1161, 4, 7 },
18148
    // AArch64_LD1H_IMM_REAL - 243
18149
254k
    {3761, 1168, 4, 7 },
18150
    // AArch64_LD1H_S_IMM_REAL - 244
18151
254k
    {3785, 1175, 4, 7 },
18152
    // AArch64_LD1Onev16b_POST - 245
18153
254k
    {3809, 1182, 4, 5 },
18154
    // AArch64_LD1Onev1d_POST - 246
18155
254k
    {3829, 1187, 4, 5 },
18156
    // AArch64_LD1Onev2d_POST - 247
18157
254k
    {3848, 1192, 4, 5 },
18158
    // AArch64_LD1Onev2s_POST - 248
18159
254k
    {3868, 1197, 4, 5 },
18160
    // AArch64_LD1Onev4h_POST - 249
18161
254k
    {3887, 1202, 4, 5 },
18162
    // AArch64_LD1Onev4s_POST - 250
18163
254k
    {3906, 1207, 4, 5 },
18164
    // AArch64_LD1Onev8b_POST - 251
18165
254k
    {3926, 1212, 4, 5 },
18166
    // AArch64_LD1Onev8h_POST - 252
18167
254k
    {3945, 1217, 4, 5 },
18168
    // AArch64_LD1RB_D_IMM - 253
18169
254k
    {3965, 1222, 4, 7 },
18170
    // AArch64_LD1RB_H_IMM - 254
18171
254k
    {3990, 1229, 4, 7 },
18172
    // AArch64_LD1RB_IMM - 255
18173
254k
    {4015, 1236, 4, 7 },
18174
    // AArch64_LD1RB_S_IMM - 256
18175
254k
    {4040, 1243, 4, 7 },
18176
    // AArch64_LD1RD_IMM - 257
18177
254k
    {4065, 1250, 4, 7 },
18178
    // AArch64_LD1RH_D_IMM - 258
18179
254k
    {4090, 1257, 4, 7 },
18180
    // AArch64_LD1RH_IMM - 259
18181
254k
    {4115, 1264, 4, 7 },
18182
    // AArch64_LD1RH_S_IMM - 260
18183
254k
    {4140, 1271, 4, 7 },
18184
    // AArch64_LD1RO_B_IMM - 261
18185
254k
    {4165, 1278, 4, 6 },
18186
    // AArch64_LD1RO_D_IMM - 262
18187
254k
    {4191, 1284, 4, 6 },
18188
    // AArch64_LD1RO_H_IMM - 263
18189
254k
    {4217, 1290, 4, 6 },
18190
    // AArch64_LD1RO_W_IMM - 264
18191
254k
    {4243, 1296, 4, 6 },
18192
    // AArch64_LD1RQ_B_IMM - 265
18193
254k
    {4269, 1302, 4, 7 },
18194
    // AArch64_LD1RQ_D_IMM - 266
18195
254k
    {4295, 1309, 4, 7 },
18196
    // AArch64_LD1RQ_H_IMM - 267
18197
254k
    {4321, 1316, 4, 7 },
18198
    // AArch64_LD1RQ_W_IMM - 268
18199
254k
    {4347, 1323, 4, 7 },
18200
    // AArch64_LD1RSB_D_IMM - 269
18201
254k
    {4373, 1330, 4, 7 },
18202
    // AArch64_LD1RSB_H_IMM - 270
18203
254k
    {4399, 1337, 4, 7 },
18204
    // AArch64_LD1RSB_S_IMM - 271
18205
254k
    {4425, 1344, 4, 7 },
18206
    // AArch64_LD1RSH_D_IMM - 272
18207
254k
    {4451, 1351, 4, 7 },
18208
    // AArch64_LD1RSH_S_IMM - 273
18209
254k
    {4477, 1358, 4, 7 },
18210
    // AArch64_LD1RSW_IMM - 274
18211
254k
    {4503, 1365, 4, 7 },
18212
    // AArch64_LD1RW_D_IMM - 275
18213
254k
    {4529, 1372, 4, 7 },
18214
    // AArch64_LD1RW_IMM - 276
18215
254k
    {4554, 1379, 4, 7 },
18216
    // AArch64_LD1Rv16b_POST - 277
18217
254k
    {4579, 1386, 4, 5 },
18218
    // AArch64_LD1Rv1d_POST - 278
18219
254k
    {4599, 1391, 4, 5 },
18220
    // AArch64_LD1Rv2d_POST - 279
18221
254k
    {4619, 1396, 4, 5 },
18222
    // AArch64_LD1Rv2s_POST - 280
18223
254k
    {4639, 1401, 4, 5 },
18224
    // AArch64_LD1Rv4h_POST - 281
18225
254k
    {4659, 1406, 4, 5 },
18226
    // AArch64_LD1Rv4s_POST - 282
18227
254k
    {4679, 1411, 4, 5 },
18228
    // AArch64_LD1Rv8b_POST - 283
18229
254k
    {4699, 1416, 4, 5 },
18230
    // AArch64_LD1Rv8h_POST - 284
18231
254k
    {4719, 1421, 4, 5 },
18232
    // AArch64_LD1SB_D_IMM_REAL - 285
18233
254k
    {4739, 1426, 4, 7 },
18234
    // AArch64_LD1SB_H_IMM_REAL - 286
18235
254k
    {4764, 1433, 4, 7 },
18236
    // AArch64_LD1SB_S_IMM_REAL - 287
18237
254k
    {4789, 1440, 4, 7 },
18238
    // AArch64_LD1SH_D_IMM_REAL - 288
18239
254k
    {4814, 1447, 4, 7 },
18240
    // AArch64_LD1SH_S_IMM_REAL - 289
18241
254k
    {4839, 1454, 4, 7 },
18242
    // AArch64_LD1SW_D_IMM_REAL - 290
18243
254k
    {4864, 1461, 4, 7 },
18244
    // AArch64_LD1Threev16b_POST - 291
18245
254k
    {4889, 1468, 4, 5 },
18246
    // AArch64_LD1Threev1d_POST - 292
18247
254k
    {4909, 1473, 4, 5 },
18248
    // AArch64_LD1Threev2d_POST - 293
18249
254k
    {4929, 1478, 4, 5 },
18250
    // AArch64_LD1Threev2s_POST - 294
18251
254k
    {4949, 1483, 4, 5 },
18252
    // AArch64_LD1Threev4h_POST - 295
18253
254k
    {4969, 1488, 4, 5 },
18254
    // AArch64_LD1Threev4s_POST - 296
18255
254k
    {4989, 1493, 4, 5 },
18256
    // AArch64_LD1Threev8b_POST - 297
18257
254k
    {5009, 1498, 4, 5 },
18258
    // AArch64_LD1Threev8h_POST - 298
18259
254k
    {5029, 1503, 4, 5 },
18260
    // AArch64_LD1Twov16b_POST - 299
18261
254k
    {5049, 1508, 4, 5 },
18262
    // AArch64_LD1Twov1d_POST - 300
18263
254k
    {5069, 1513, 4, 5 },
18264
    // AArch64_LD1Twov2d_POST - 301
18265
254k
    {5089, 1518, 4, 5 },
18266
    // AArch64_LD1Twov2s_POST - 302
18267
254k
    {5109, 1523, 4, 5 },
18268
    // AArch64_LD1Twov4h_POST - 303
18269
254k
    {5129, 1528, 4, 5 },
18270
    // AArch64_LD1Twov4s_POST - 304
18271
254k
    {5149, 1533, 4, 5 },
18272
    // AArch64_LD1Twov8b_POST - 305
18273
254k
    {5169, 1538, 4, 5 },
18274
    // AArch64_LD1Twov8h_POST - 306
18275
254k
    {5189, 1543, 4, 5 },
18276
    // AArch64_LD1W_D_IMM_REAL - 307
18277
254k
    {5209, 1548, 4, 7 },
18278
    // AArch64_LD1W_IMM_REAL - 308
18279
254k
    {5233, 1555, 4, 7 },
18280
    // AArch64_LD1_MXIPXX_H_B - 309
18281
254k
    {5257, 1562, 6, 7 },
18282
    // AArch64_LD1_MXIPXX_H_D - 310
18283
254k
    {5293, 1569, 6, 7 },
18284
    // AArch64_LD1_MXIPXX_H_H - 311
18285
254k
    {5329, 1576, 6, 7 },
18286
    // AArch64_LD1_MXIPXX_H_Q - 312
18287
254k
    {5365, 1583, 6, 7 },
18288
    // AArch64_LD1_MXIPXX_H_S - 313
18289
254k
    {5401, 1590, 6, 7 },
18290
    // AArch64_LD1_MXIPXX_V_B - 314
18291
254k
    {5437, 1597, 6, 7 },
18292
    // AArch64_LD1_MXIPXX_V_D - 315
18293
254k
    {5473, 1604, 6, 7 },
18294
    // AArch64_LD1_MXIPXX_V_H - 316
18295
254k
    {5509, 1611, 6, 7 },
18296
    // AArch64_LD1_MXIPXX_V_Q - 317
18297
254k
    {5545, 1618, 6, 7 },
18298
    // AArch64_LD1_MXIPXX_V_S - 318
18299
254k
    {5581, 1625, 6, 7 },
18300
    // AArch64_LD1i16_POST - 319
18301
254k
    {5617, 1632, 6, 7 },
18302
    // AArch64_LD1i32_POST - 320
18303
254k
    {5640, 1639, 6, 7 },
18304
    // AArch64_LD1i64_POST - 321
18305
254k
    {5663, 1646, 6, 7 },
18306
    // AArch64_LD1i8_POST - 322
18307
254k
    {5686, 1653, 6, 7 },
18308
    // AArch64_LD2B_IMM - 323
18309
254k
    {5709, 1660, 4, 7 },
18310
    // AArch64_LD2D_IMM - 324
18311
254k
    {5733, 1667, 4, 7 },
18312
    // AArch64_LD2H_IMM - 325
18313
254k
    {5757, 1674, 4, 7 },
18314
    // AArch64_LD2Rv16b_POST - 326
18315
254k
    {5781, 1681, 4, 5 },
18316
    // AArch64_LD2Rv1d_POST - 327
18317
254k
    {5801, 1686, 4, 5 },
18318
    // AArch64_LD2Rv2d_POST - 328
18319
254k
    {5822, 1691, 4, 5 },
18320
    // AArch64_LD2Rv2s_POST - 329
18321
254k
    {5843, 1696, 4, 5 },
18322
    // AArch64_LD2Rv4h_POST - 330
18323
254k
    {5863, 1701, 4, 5 },
18324
    // AArch64_LD2Rv4s_POST - 331
18325
254k
    {5883, 1706, 4, 5 },
18326
    // AArch64_LD2Rv8b_POST - 332
18327
254k
    {5903, 1711, 4, 5 },
18328
    // AArch64_LD2Rv8h_POST - 333
18329
254k
    {5923, 1716, 4, 5 },
18330
    // AArch64_LD2Twov16b_POST - 334
18331
254k
    {5943, 1721, 4, 5 },
18332
    // AArch64_LD2Twov2d_POST - 335
18333
254k
    {5963, 1726, 4, 5 },
18334
    // AArch64_LD2Twov2s_POST - 336
18335
254k
    {5983, 1731, 4, 5 },
18336
    // AArch64_LD2Twov4h_POST - 337
18337
254k
    {6003, 1736, 4, 5 },
18338
    // AArch64_LD2Twov4s_POST - 338
18339
254k
    {6023, 1741, 4, 5 },
18340
    // AArch64_LD2Twov8b_POST - 339
18341
254k
    {6043, 1746, 4, 5 },
18342
    // AArch64_LD2Twov8h_POST - 340
18343
254k
    {6063, 1751, 4, 5 },
18344
    // AArch64_LD2W_IMM - 341
18345
254k
    {6083, 1756, 4, 7 },
18346
    // AArch64_LD2i16_POST - 342
18347
254k
    {6107, 1763, 6, 7 },
18348
    // AArch64_LD2i32_POST - 343
18349
254k
    {6130, 1770, 6, 7 },
18350
    // AArch64_LD2i64_POST - 344
18351
254k
    {6153, 1777, 6, 7 },
18352
    // AArch64_LD2i8_POST - 345
18353
254k
    {6177, 1784, 6, 7 },
18354
    // AArch64_LD3B_IMM - 346
18355
254k
    {6200, 1791, 4, 7 },
18356
    // AArch64_LD3D_IMM - 347
18357
254k
    {6224, 1798, 4, 7 },
18358
    // AArch64_LD3H_IMM - 348
18359
254k
    {6248, 1805, 4, 7 },
18360
    // AArch64_LD3Rv16b_POST - 349
18361
254k
    {6272, 1812, 4, 5 },
18362
    // AArch64_LD3Rv1d_POST - 350
18363
254k
    {6292, 1817, 4, 5 },
18364
    // AArch64_LD3Rv2d_POST - 351
18365
254k
    {6313, 1822, 4, 5 },
18366
    // AArch64_LD3Rv2s_POST - 352
18367
254k
    {6334, 1827, 4, 5 },
18368
    // AArch64_LD3Rv4h_POST - 353
18369
254k
    {6355, 1832, 4, 5 },
18370
    // AArch64_LD3Rv4s_POST - 354
18371
254k
    {6375, 1837, 4, 5 },
18372
    // AArch64_LD3Rv8b_POST - 355
18373
254k
    {6396, 1842, 4, 5 },
18374
    // AArch64_LD3Rv8h_POST - 356
18375
254k
    {6416, 1847, 4, 5 },
18376
    // AArch64_LD3Threev16b_POST - 357
18377
254k
    {6436, 1852, 4, 5 },
18378
    // AArch64_LD3Threev2d_POST - 358
18379
254k
    {6456, 1857, 4, 5 },
18380
    // AArch64_LD3Threev2s_POST - 359
18381
254k
    {6476, 1862, 4, 5 },
18382
    // AArch64_LD3Threev4h_POST - 360
18383
254k
    {6496, 1867, 4, 5 },
18384
    // AArch64_LD3Threev4s_POST - 361
18385
254k
    {6516, 1872, 4, 5 },
18386
    // AArch64_LD3Threev8b_POST - 362
18387
254k
    {6536, 1877, 4, 5 },
18388
    // AArch64_LD3Threev8h_POST - 363
18389
254k
    {6556, 1882, 4, 5 },
18390
    // AArch64_LD3W_IMM - 364
18391
254k
    {6576, 1887, 4, 7 },
18392
    // AArch64_LD3i16_POST - 365
18393
254k
    {6600, 1894, 6, 7 },
18394
    // AArch64_LD3i32_POST - 366
18395
254k
    {6623, 1901, 6, 7 },
18396
    // AArch64_LD3i64_POST - 367
18397
254k
    {6647, 1908, 6, 7 },
18398
    // AArch64_LD3i8_POST - 368
18399
254k
    {6671, 1915, 6, 7 },
18400
    // AArch64_LD4B_IMM - 369
18401
254k
    {6694, 1922, 4, 7 },
18402
    // AArch64_LD4D_IMM - 370
18403
254k
    {6718, 1929, 4, 7 },
18404
    // AArch64_LD4Fourv16b_POST - 371
18405
254k
    {6742, 1936, 4, 5 },
18406
    // AArch64_LD4Fourv2d_POST - 372
18407
254k
    {6762, 1941, 4, 5 },
18408
    // AArch64_LD4Fourv2s_POST - 373
18409
254k
    {6782, 1946, 4, 5 },
18410
    // AArch64_LD4Fourv4h_POST - 374
18411
254k
    {6802, 1951, 4, 5 },
18412
    // AArch64_LD4Fourv4s_POST - 375
18413
254k
    {6822, 1956, 4, 5 },
18414
    // AArch64_LD4Fourv8b_POST - 376
18415
254k
    {6842, 1961, 4, 5 },
18416
    // AArch64_LD4Fourv8h_POST - 377
18417
254k
    {6862, 1966, 4, 5 },
18418
    // AArch64_LD4H_IMM - 378
18419
254k
    {6882, 1971, 4, 7 },
18420
    // AArch64_LD4Rv16b_POST - 379
18421
254k
    {6906, 1978, 4, 5 },
18422
    // AArch64_LD4Rv1d_POST - 380
18423
254k
    {6926, 1983, 4, 5 },
18424
    // AArch64_LD4Rv2d_POST - 381
18425
254k
    {6947, 1988, 4, 5 },
18426
    // AArch64_LD4Rv2s_POST - 382
18427
254k
    {6968, 1993, 4, 5 },
18428
    // AArch64_LD4Rv4h_POST - 383
18429
254k
    {6989, 1998, 4, 5 },
18430
    // AArch64_LD4Rv4s_POST - 384
18431
254k
    {7009, 2003, 4, 5 },
18432
    // AArch64_LD4Rv8b_POST - 385
18433
254k
    {7030, 2008, 4, 5 },
18434
    // AArch64_LD4Rv8h_POST - 386
18435
254k
    {7050, 2013, 4, 5 },
18436
    // AArch64_LD4W_IMM - 387
18437
254k
    {7070, 2018, 4, 7 },
18438
    // AArch64_LD4i16_POST - 388
18439
254k
    {7094, 2025, 6, 7 },
18440
    // AArch64_LD4i32_POST - 389
18441
254k
    {7117, 2032, 6, 7 },
18442
    // AArch64_LD4i64_POST - 390
18443
254k
    {7141, 2039, 6, 7 },
18444
    // AArch64_LD4i8_POST - 391
18445
254k
    {7165, 2046, 6, 7 },
18446
    // AArch64_LDADDB - 392
18447
254k
    {7188, 2053, 3, 4 },
18448
    // AArch64_LDADDH - 393
18449
254k
    {7204, 2057, 3, 4 },
18450
    // AArch64_LDADDLB - 394
18451
254k
    {7220, 2061, 3, 4 },
18452
    // AArch64_LDADDLH - 395
18453
254k
    {7237, 2065, 3, 4 },
18454
    // AArch64_LDADDLW - 396
18455
254k
    {7254, 2069, 3, 4 },
18456
    // AArch64_LDADDLX - 397
18457
254k
    {7254, 2073, 3, 4 },
18458
    // AArch64_LDADDW - 398
18459
254k
    {7270, 2077, 3, 4 },
18460
    // AArch64_LDADDX - 399
18461
254k
    {7270, 2081, 3, 4 },
18462
    // AArch64_LDAPURBi - 400
18463
254k
    {7285, 2085, 3, 4 },
18464
    // AArch64_LDAPURHi - 401
18465
254k
    {7302, 2089, 3, 4 },
18466
    // AArch64_LDAPURSBWi - 402
18467
254k
    {7319, 2093, 3, 4 },
18468
    // AArch64_LDAPURSBXi - 403
18469
254k
    {7319, 2097, 3, 4 },
18470
    // AArch64_LDAPURSHWi - 404
18471
254k
    {7337, 2101, 3, 4 },
18472
    // AArch64_LDAPURSHXi - 405
18473
254k
    {7337, 2105, 3, 4 },
18474
    // AArch64_LDAPURSWi - 406
18475
254k
    {7355, 2109, 3, 4 },
18476
    // AArch64_LDAPURXi - 407
18477
254k
    {7373, 2113, 3, 4 },
18478
    // AArch64_LDAPURi - 408
18479
254k
    {7373, 2117, 3, 4 },
18480
    // AArch64_LDCLRB - 409
18481
254k
    {7389, 2121, 3, 4 },
18482
    // AArch64_LDCLRH - 410
18483
254k
    {7405, 2125, 3, 4 },
18484
    // AArch64_LDCLRLB - 411
18485
254k
    {7421, 2129, 3, 4 },
18486
    // AArch64_LDCLRLH - 412
18487
254k
    {7438, 2133, 3, 4 },
18488
    // AArch64_LDCLRLW - 413
18489
254k
    {7455, 2137, 3, 4 },
18490
    // AArch64_LDCLRLX - 414
18491
254k
    {7455, 2141, 3, 4 },
18492
    // AArch64_LDCLRW - 415
18493
254k
    {7471, 2145, 3, 4 },
18494
    // AArch64_LDCLRX - 416
18495
254k
    {7471, 2149, 3, 4 },
18496
    // AArch64_LDEORB - 417
18497
254k
    {7486, 2153, 3, 4 },
18498
    // AArch64_LDEORH - 418
18499
254k
    {7502, 2157, 3, 4 },
18500
    // AArch64_LDEORLB - 419
18501
254k
    {7518, 2161, 3, 4 },
18502
    // AArch64_LDEORLH - 420
18503
254k
    {7535, 2165, 3, 4 },
18504
    // AArch64_LDEORLW - 421
18505
254k
    {7552, 2169, 3, 4 },
18506
    // AArch64_LDEORLX - 422
18507
254k
    {7552, 2173, 3, 4 },
18508
    // AArch64_LDEORW - 423
18509
254k
    {7568, 2177, 3, 4 },
18510
    // AArch64_LDEORX - 424
18511
254k
    {7568, 2181, 3, 4 },
18512
    // AArch64_LDFF1B_D_REAL - 425
18513
254k
    {7583, 2185, 4, 5 },
18514
    // AArch64_LDFF1B_H_REAL - 426
18515
254k
    {7609, 2190, 4, 5 },
18516
    // AArch64_LDFF1B_REAL - 427
18517
254k
    {7635, 2195, 4, 5 },
18518
    // AArch64_LDFF1B_S_REAL - 428
18519
254k
    {7661, 2200, 4, 5 },
18520
    // AArch64_LDFF1D_REAL - 429
18521
254k
    {7687, 2205, 4, 5 },
18522
    // AArch64_LDFF1H_D_REAL - 430
18523
254k
    {7713, 2210, 4, 5 },
18524
    // AArch64_LDFF1H_REAL - 431
18525
254k
    {7739, 2215, 4, 5 },
18526
    // AArch64_LDFF1H_S_REAL - 432
18527
254k
    {7765, 2220, 4, 5 },
18528
    // AArch64_LDFF1SB_D_REAL - 433
18529
254k
    {7791, 2225, 4, 5 },
18530
    // AArch64_LDFF1SB_H_REAL - 434
18531
254k
    {7818, 2230, 4, 5 },
18532
    // AArch64_LDFF1SB_S_REAL - 435
18533
254k
    {7845, 2235, 4, 5 },
18534
    // AArch64_LDFF1SH_D_REAL - 436
18535
254k
    {7872, 2240, 4, 5 },
18536
    // AArch64_LDFF1SH_S_REAL - 437
18537
254k
    {7899, 2245, 4, 5 },
18538
    // AArch64_LDFF1SW_D_REAL - 438
18539
254k
    {7926, 2250, 4, 5 },
18540
    // AArch64_LDFF1W_D_REAL - 439
18541
254k
    {7953, 2255, 4, 5 },
18542
    // AArch64_LDFF1W_REAL - 440
18543
254k
    {7979, 2260, 4, 5 },
18544
    // AArch64_LDG - 441
18545
254k
    {8005, 2265, 4, 5 },
18546
    // AArch64_LDNF1B_D_IMM_REAL - 442
18547
254k
    {8018, 2270, 4, 5 },
18548
    // AArch64_LDNF1B_H_IMM_REAL - 443
18549
254k
    {8044, 2275, 4, 5 },
18550
    // AArch64_LDNF1B_IMM_REAL - 444
18551
254k
    {8070, 2280, 4, 5 },
18552
    // AArch64_LDNF1B_S_IMM_REAL - 445
18553
254k
    {8096, 2285, 4, 5 },
18554
    // AArch64_LDNF1D_IMM_REAL - 446
18555
254k
    {8122, 2290, 4, 5 },
18556
    // AArch64_LDNF1H_D_IMM_REAL - 447
18557
254k
    {8148, 2295, 4, 5 },
18558
    // AArch64_LDNF1H_IMM_REAL - 448
18559
254k
    {8174, 2300, 4, 5 },
18560
    // AArch64_LDNF1H_S_IMM_REAL - 449
18561
254k
    {8200, 2305, 4, 5 },
18562
    // AArch64_LDNF1SB_D_IMM_REAL - 450
18563
254k
    {8226, 2310, 4, 5 },
18564
    // AArch64_LDNF1SB_H_IMM_REAL - 451
18565
254k
    {8253, 2315, 4, 5 },
18566
    // AArch64_LDNF1SB_S_IMM_REAL - 452
18567
254k
    {8280, 2320, 4, 5 },
18568
    // AArch64_LDNF1SH_D_IMM_REAL - 453
18569
254k
    {8307, 2325, 4, 5 },
18570
    // AArch64_LDNF1SH_S_IMM_REAL - 454
18571
254k
    {8334, 2330, 4, 5 },
18572
    // AArch64_LDNF1SW_D_IMM_REAL - 455
18573
254k
    {8361, 2335, 4, 5 },
18574
    // AArch64_LDNF1W_D_IMM_REAL - 456
18575
254k
    {8388, 2340, 4, 5 },
18576
    // AArch64_LDNF1W_IMM_REAL - 457
18577
254k
    {8414, 2345, 4, 5 },
18578
    // AArch64_LDNPDi - 458
18579
254k
    {8440, 2350, 4, 4 },
18580
    // AArch64_LDNPQi - 459
18581
254k
    {8440, 2354, 4, 4 },
18582
    // AArch64_LDNPSi - 460
18583
254k
    {8440, 2358, 4, 4 },
18584
    // AArch64_LDNPWi - 461
18585
254k
    {8440, 2362, 4, 4 },
18586
    // AArch64_LDNPXi - 462
18587
254k
    {8440, 2366, 4, 4 },
18588
    // AArch64_LDNT1B_ZRI - 463
18589
254k
    {8458, 2370, 4, 7 },
18590
    // AArch64_LDNT1B_ZZR_D_REAL - 464
18591
254k
    {8484, 2377, 4, 5 },
18592
    // AArch64_LDNT1B_ZZR_S_REAL - 465
18593
254k
    {8512, 2382, 4, 5 },
18594
    // AArch64_LDNT1D_ZRI - 466
18595
254k
    {8540, 2387, 4, 7 },
18596
    // AArch64_LDNT1D_ZZR_D_REAL - 467
18597
254k
    {8566, 2394, 4, 5 },
18598
    // AArch64_LDNT1H_ZRI - 468
18599
254k
    {8594, 2399, 4, 7 },
18600
    // AArch64_LDNT1H_ZZR_D_REAL - 469
18601
254k
    {8620, 2406, 4, 5 },
18602
    // AArch64_LDNT1H_ZZR_S_REAL - 470
18603
254k
    {8648, 2411, 4, 5 },
18604
    // AArch64_LDNT1SB_ZZR_D_REAL - 471
18605
254k
    {8676, 2416, 4, 5 },
18606
    // AArch64_LDNT1SB_ZZR_S_REAL - 472
18607
254k
    {8705, 2421, 4, 5 },
18608
    // AArch64_LDNT1SH_ZZR_D_REAL - 473
18609
254k
    {8734, 2426, 4, 5 },
18610
    // AArch64_LDNT1SH_ZZR_S_REAL - 474
18611
254k
    {8763, 2431, 4, 5 },
18612
    // AArch64_LDNT1SW_ZZR_D_REAL - 475
18613
254k
    {8792, 2436, 4, 5 },
18614
    // AArch64_LDNT1W_ZRI - 476
18615
254k
    {8821, 2441, 4, 7 },
18616
    // AArch64_LDNT1W_ZZR_D_REAL - 477
18617
254k
    {8847, 2448, 4, 5 },
18618
    // AArch64_LDNT1W_ZZR_S_REAL - 478
18619
254k
    {8875, 2453, 4, 5 },
18620
    // AArch64_LDPDi - 479
18621
254k
    {8903, 2458, 4, 4 },
18622
    // AArch64_LDPQi - 480
18623
254k
    {8903, 2462, 4, 4 },
18624
    // AArch64_LDPSWi - 481
18625
254k
    {8920, 2466, 4, 4 },
18626
    // AArch64_LDPSi - 482
18627
254k
    {8903, 2470, 4, 4 },
18628
    // AArch64_LDPWi - 483
18629
254k
    {8903, 2474, 4, 4 },
18630
    // AArch64_LDPXi - 484
18631
254k
    {8903, 2478, 4, 4 },
18632
    // AArch64_LDRAAindexed - 485
18633
254k
    {8939, 2482, 3, 4 },
18634
    // AArch64_LDRABindexed - 486
18635
254k
    {8954, 2486, 3, 4 },
18636
    // AArch64_LDRBBroX - 487
18637
254k
    {8969, 2490, 5, 5 },
18638
    // AArch64_LDRBBui - 488
18639
254k
    {8987, 2495, 3, 3 },
18640
    // AArch64_LDRBroX - 489
18641
254k
    {9001, 2498, 5, 5 },
18642
    // AArch64_LDRBui - 490
18643
254k
    {9018, 2503, 3, 3 },
18644
    // AArch64_LDRDroX - 491
18645
254k
    {9001, 2506, 5, 5 },
18646
    // AArch64_LDRDui - 492
18647
254k
    {9018, 2511, 3, 3 },
18648
    // AArch64_LDRHHroX - 493
18649
254k
    {9031, 2514, 5, 5 },
18650
    // AArch64_LDRHHui - 494
18651
254k
    {9049, 2519, 3, 3 },
18652
    // AArch64_LDRHroX - 495
18653
254k
    {9001, 2522, 5, 5 },
18654
    // AArch64_LDRHui - 496
18655
254k
    {9018, 2527, 3, 3 },
18656
    // AArch64_LDRQroX - 497
18657
254k
    {9001, 2530, 5, 5 },
18658
    // AArch64_LDRQui - 498
18659
254k
    {9018, 2535, 3, 3 },
18660
    // AArch64_LDRSBWroX - 499
18661
254k
    {9063, 2538, 5, 5 },
18662
    // AArch64_LDRSBWui - 500
18663
254k
    {9082, 2543, 3, 3 },
18664
    // AArch64_LDRSBXroX - 501
18665
254k
    {9063, 2546, 5, 5 },
18666
    // AArch64_LDRSBXui - 502
18667
254k
    {9082, 2551, 3, 3 },
18668
    // AArch64_LDRSHWroX - 503
18669
254k
    {9097, 2554, 5, 5 },
18670
    // AArch64_LDRSHWui - 504
18671
254k
    {9116, 2559, 3, 3 },
18672
    // AArch64_LDRSHXroX - 505
18673
254k
    {9097, 2562, 5, 5 },
18674
    // AArch64_LDRSHXui - 506
18675
254k
    {9116, 2567, 3, 3 },
18676
    // AArch64_LDRSWroX - 507
18677
254k
    {9131, 2570, 5, 5 },
18678
    // AArch64_LDRSWui - 508
18679
254k
    {9150, 2575, 3, 3 },
18680
    // AArch64_LDRSroX - 509
18681
254k
    {9001, 2578, 5, 5 },
18682
    // AArch64_LDRSui - 510
18683
254k
    {9018, 2583, 3, 3 },
18684
    // AArch64_LDRWroX - 511
18685
254k
    {9001, 2586, 5, 5 },
18686
    // AArch64_LDRWui - 512
18687
254k
    {9018, 2591, 3, 3 },
18688
    // AArch64_LDRXroX - 513
18689
254k
    {9001, 2594, 5, 5 },
18690
    // AArch64_LDRXui - 514
18691
254k
    {9018, 2599, 3, 3 },
18692
    // AArch64_LDR_PXI - 515
18693
254k
    {9165, 2602, 3, 6 },
18694
    // AArch64_LDR_ZA - 516
18695
254k
    {9180, 2608, 5, 6 },
18696
    // AArch64_LDR_ZXI - 517
18697
254k
    {9165, 2614, 3, 6 },
18698
    // AArch64_LDSETB - 518
18699
254k
    {9205, 2620, 3, 4 },
18700
    // AArch64_LDSETH - 519
18701
254k
    {9221, 2624, 3, 4 },
18702
    // AArch64_LDSETLB - 520
18703
254k
    {9237, 2628, 3, 4 },
18704
    // AArch64_LDSETLH - 521
18705
254k
    {9254, 2632, 3, 4 },
18706
    // AArch64_LDSETLW - 522
18707
254k
    {9271, 2636, 3, 4 },
18708
    // AArch64_LDSETLX - 523
18709
254k
    {9271, 2640, 3, 4 },
18710
    // AArch64_LDSETW - 524
18711
254k
    {9287, 2644, 3, 4 },
18712
    // AArch64_LDSETX - 525
18713
254k
    {9287, 2648, 3, 4 },
18714
    // AArch64_LDSMAXB - 526
18715
254k
    {9302, 2652, 3, 4 },
18716
    // AArch64_LDSMAXH - 527
18717
254k
    {9319, 2656, 3, 4 },
18718
    // AArch64_LDSMAXLB - 528
18719
254k
    {9336, 2660, 3, 4 },
18720
    // AArch64_LDSMAXLH - 529
18721
254k
    {9354, 2664, 3, 4 },
18722
    // AArch64_LDSMAXLW - 530
18723
254k
    {9372, 2668, 3, 4 },
18724
    // AArch64_LDSMAXLX - 531
18725
254k
    {9372, 2672, 3, 4 },
18726
    // AArch64_LDSMAXW - 532
18727
254k
    {9389, 2676, 3, 4 },
18728
    // AArch64_LDSMAXX - 533
18729
254k
    {9389, 2680, 3, 4 },
18730
    // AArch64_LDSMINB - 534
18731
254k
    {9405, 2684, 3, 4 },
18732
    // AArch64_LDSMINH - 535
18733
254k
    {9422, 2688, 3, 4 },
18734
    // AArch64_LDSMINLB - 536
18735
254k
    {9439, 2692, 3, 4 },
18736
    // AArch64_LDSMINLH - 537
18737
254k
    {9457, 2696, 3, 4 },
18738
    // AArch64_LDSMINLW - 538
18739
254k
    {9475, 2700, 3, 4 },
18740
    // AArch64_LDSMINLX - 539
18741
254k
    {9475, 2704, 3, 4 },
18742
    // AArch64_LDSMINW - 540
18743
254k
    {9492, 2708, 3, 4 },
18744
    // AArch64_LDSMINX - 541
18745
254k
    {9492, 2712, 3, 4 },
18746
    // AArch64_LDTRBi - 542
18747
254k
    {9508, 2716, 3, 3 },
18748
    // AArch64_LDTRHi - 543
18749
254k
    {9523, 2719, 3, 3 },
18750
    // AArch64_LDTRSBWi - 544
18751
254k
    {9538, 2722, 3, 3 },
18752
    // AArch64_LDTRSBXi - 545
18753
254k
    {9538, 2725, 3, 3 },
18754
    // AArch64_LDTRSHWi - 546
18755
254k
    {9554, 2728, 3, 3 },
18756
    // AArch64_LDTRSHXi - 547
18757
254k
    {9554, 2731, 3, 3 },
18758
    // AArch64_LDTRSWi - 548
18759
254k
    {9570, 2734, 3, 3 },
18760
    // AArch64_LDTRWi - 549
18761
254k
    {9586, 2737, 3, 3 },
18762
    // AArch64_LDTRXi - 550
18763
254k
    {9586, 2740, 3, 3 },
18764
    // AArch64_LDUMAXB - 551
18765
254k
    {9600, 2743, 3, 4 },
18766
    // AArch64_LDUMAXH - 552
18767
254k
    {9617, 2747, 3, 4 },
18768
    // AArch64_LDUMAXLB - 553
18769
254k
    {9634, 2751, 3, 4 },
18770
    // AArch64_LDUMAXLH - 554
18771
254k
    {9652, 2755, 3, 4 },
18772
    // AArch64_LDUMAXLW - 555
18773
254k
    {9670, 2759, 3, 4 },
18774
    // AArch64_LDUMAXLX - 556
18775
254k
    {9670, 2763, 3, 4 },
18776
    // AArch64_LDUMAXW - 557
18777
254k
    {9687, 2767, 3, 4 },
18778
    // AArch64_LDUMAXX - 558
18779
254k
    {9687, 2771, 3, 4 },
18780
    // AArch64_LDUMINB - 559
18781
254k
    {9703, 2775, 3, 4 },
18782
    // AArch64_LDUMINH - 560
18783
254k
    {9720, 2779, 3, 4 },
18784
    // AArch64_LDUMINLB - 561
18785
254k
    {9737, 2783, 3, 4 },
18786
    // AArch64_LDUMINLH - 562
18787
254k
    {9755, 2787, 3, 4 },
18788
    // AArch64_LDUMINLW - 563
18789
254k
    {9773, 2791, 3, 4 },
18790
    // AArch64_LDUMINLX - 564
18791
254k
    {9773, 2795, 3, 4 },
18792
    // AArch64_LDUMINW - 565
18793
254k
    {9790, 2799, 3, 4 },
18794
    // AArch64_LDUMINX - 566
18795
254k
    {9790, 2803, 3, 4 },
18796
    // AArch64_LDURBBi - 567
18797
254k
    {9806, 2807, 3, 3 },
18798
    // AArch64_LDURBi - 568
18799
254k
    {9821, 2810, 3, 3 },
18800
    // AArch64_LDURDi - 569
18801
254k
    {9821, 2813, 3, 3 },
18802
    // AArch64_LDURHHi - 570
18803
254k
    {9835, 2816, 3, 3 },
18804
    // AArch64_LDURHi - 571
18805
254k
    {9821, 2819, 3, 3 },
18806
    // AArch64_LDURQi - 572
18807
254k
    {9821, 2822, 3, 3 },
18808
    // AArch64_LDURSBWi - 573
18809
254k
    {9850, 2825, 3, 3 },
18810
    // AArch64_LDURSBXi - 574
18811
254k
    {9850, 2828, 3, 3 },
18812
    // AArch64_LDURSHWi - 575
18813
254k
    {9866, 2831, 3, 3 },
18814
    // AArch64_LDURSHXi - 576
18815
254k
    {9866, 2834, 3, 3 },
18816
    // AArch64_LDURSWi - 577
18817
254k
    {9882, 2837, 3, 3 },
18818
    // AArch64_LDURSi - 578
18819
254k
    {9821, 2840, 3, 3 },
18820
    // AArch64_LDURWi - 579
18821
254k
    {9821, 2843, 3, 3 },
18822
    // AArch64_LDURXi - 580
18823
254k
    {9821, 2846, 3, 3 },
18824
    // AArch64_MADDWrrr - 581
18825
254k
    {9898, 2849, 4, 4 },
18826
    // AArch64_MADDXrrr - 582
18827
254k
    {9898, 2853, 4, 4 },
18828
    // AArch64_MSRpstatesvcrImm1 - 583
18829
254k
    {9913, 2857, 2, 3 },
18830
254k
    {9921, 2860, 2, 3 },
18831
254k
    {9932, 2863, 2, 3 },
18832
254k
    {9943, 2866, 2, 3 },
18833
254k
    {9950, 2869, 2, 3 },
18834
254k
    {9960, 2872, 2, 3 },
18835
    // AArch64_MSUBWrrr - 589
18836
254k
    {9970, 2875, 4, 4 },
18837
    // AArch64_MSUBXrrr - 590
18838
254k
    {9970, 2879, 4, 4 },
18839
    // AArch64_NOTv16i8 - 591
18840
254k
    {9986, 2883, 2, 2 },
18841
    // AArch64_NOTv8i8 - 592
18842
254k
    {10009, 2885, 2, 2 },
18843
    // AArch64_ORNWrs - 593
18844
254k
    {10030, 2887, 4, 4 },
18845
254k
    {10041, 2891, 4, 3 },
18846
254k
    {10056, 2894, 4, 4 },
18847
    // AArch64_ORNXrs - 596
18848
254k
    {10030, 2898, 4, 4 },
18849
254k
    {10041, 2902, 4, 3 },
18850
254k
    {10056, 2905, 4, 4 },
18851
    // AArch64_ORRS_PPzPP - 599
18852
254k
    {10071, 2909, 4, 7 },
18853
    // AArch64_ORRWrs - 600
18854
254k
    {10087, 2916, 4, 4 },
18855
254k
    {10098, 2920, 4, 4 },
18856
    // AArch64_ORRXrs - 602
18857
254k
    {10087, 2924, 4, 4 },
18858
254k
    {10098, 2928, 4, 4 },
18859
    // AArch64_ORR_PPzPP - 604
18860
254k
    {10113, 2932, 4, 7 },
18861
    // AArch64_ORR_ZI - 605
18862
254k
    {10128, 2939, 3, 6 },
18863
254k
    {10149, 2945, 3, 6 },
18864
254k
    {10170, 2951, 3, 6 },
18865
    // AArch64_ORR_ZZZ - 608
18866
254k
    {10191, 2957, 3, 6 },
18867
    // AArch64_ORRv16i8 - 609
18868
254k
    {10206, 2963, 3, 3 },
18869
    // AArch64_ORRv8i8 - 610
18870
254k
    {10229, 2966, 3, 3 },
18871
    // AArch64_PACIA1716 - 611
18872
254k
    {10250, 2969, 0, 1 },
18873
    // AArch64_PACIASP - 612
18874
254k
    {10260, 2970, 0, 1 },
18875
    // AArch64_PACIAZ - 613
18876
254k
    {10268, 2971, 0, 1 },
18877
    // AArch64_PACIB1716 - 614
18878
254k
    {10275, 2972, 0, 1 },
18879
    // AArch64_PACIBSP - 615
18880
254k
    {10285, 2973, 0, 1 },
18881
    // AArch64_PACIBZ - 616
18882
254k
    {10293, 2974, 0, 1 },
18883
    // AArch64_PRFB_D_PZI - 617
18884
254k
    {10300, 2975, 4, 5 },
18885
    // AArch64_PRFB_PRI - 618
18886
254k
    {10324, 2980, 4, 7 },
18887
    // AArch64_PRFB_S_PZI - 619
18888
254k
    {10346, 2987, 4, 5 },
18889
    // AArch64_PRFD_D_PZI - 620
18890
254k
    {10370, 2992, 4, 5 },
18891
    // AArch64_PRFD_PRI - 621
18892
254k
    {10394, 2997, 4, 7 },
18893
    // AArch64_PRFD_S_PZI - 622
18894
254k
    {10416, 3004, 4, 5 },
18895
    // AArch64_PRFH_D_PZI - 623
18896
254k
    {10440, 3009, 4, 5 },
18897
    // AArch64_PRFH_PRI - 624
18898
254k
    {10464, 3014, 4, 7 },
18899
    // AArch64_PRFH_S_PZI - 625
18900
254k
    {10486, 3021, 4, 5 },
18901
    // AArch64_PRFMroX - 626
18902
254k
    {10510, 3026, 5, 5 },
18903
    // AArch64_PRFMui - 627
18904
254k
    {10530, 3031, 3, 3 },
18905
    // AArch64_PRFUMi - 628
18906
254k
    {10546, 3034, 3, 3 },
18907
    // AArch64_PRFW_D_PZI - 629
18908
254k
    {10563, 3037, 4, 5 },
18909
    // AArch64_PRFW_PRI - 630
18910
254k
    {10587, 3042, 4, 7 },
18911
    // AArch64_PRFW_S_PZI - 631
18912
254k
    {10609, 3049, 4, 5 },
18913
    // AArch64_PTRUES_B - 632
18914
254k
    {10633, 3054, 2, 5 },
18915
    // AArch64_PTRUES_D - 633
18916
254k
    {10645, 3059, 2, 5 },
18917
    // AArch64_PTRUES_H - 634
18918
254k
    {10657, 3064, 2, 5 },
18919
    // AArch64_PTRUES_S - 635
18920
254k
    {10669, 3069, 2, 5 },
18921
    // AArch64_PTRUE_B - 636
18922
254k
    {10681, 3074, 2, 5 },
18923
    // AArch64_PTRUE_D - 637
18924
254k
    {10692, 3079, 2, 5 },
18925
    // AArch64_PTRUE_H - 638
18926
254k
    {10703, 3084, 2, 5 },
18927
    // AArch64_PTRUE_S - 639
18928
254k
    {10714, 3089, 2, 5 },
18929
    // AArch64_RET - 640
18930
254k
    {10725, 3094, 1, 1 },
18931
    // AArch64_SBCSWr - 641
18932
254k
    {10729, 3095, 3, 3 },
18933
    // AArch64_SBCSXr - 642
18934
254k
    {10729, 3098, 3, 3 },
18935
    // AArch64_SBCWr - 643
18936
254k
    {10741, 3101, 3, 3 },
18937
    // AArch64_SBCXr - 644
18938
254k
    {10741, 3104, 3, 3 },
18939
    // AArch64_SBFMWri - 645
18940
254k
    {10752, 3107, 4, 4 },
18941
254k
    {10767, 3111, 4, 4 },
18942
254k
    {10779, 3115, 4, 4 },
18943
    // AArch64_SBFMXri - 648
18944
254k
    {10752, 3119, 4, 4 },
18945
254k
    {10767, 3123, 4, 4 },
18946
254k
    {10779, 3127, 4, 4 },
18947
254k
    {10791, 3131, 4, 4 },
18948
    // AArch64_SEL_PPPP - 652
18949
254k
    {10803, 3135, 4, 7 },
18950
    // AArch64_SEL_ZPZZ_B - 653
18951
254k
    {10803, 3142, 4, 7 },
18952
    // AArch64_SEL_ZPZZ_D - 654
18953
254k
    {10826, 3149, 4, 7 },
18954
    // AArch64_SEL_ZPZZ_H - 655
18955
254k
    {10849, 3156, 4, 7 },
18956
    // AArch64_SEL_ZPZZ_S - 656
18957
254k
    {10872, 3163, 4, 7 },
18958
    // AArch64_SMADDLrrr - 657
18959
254k
    {10895, 3170, 4, 4 },
18960
    // AArch64_SMSUBLrrr - 658
18961
254k
    {10912, 3174, 4, 4 },
18962
    // AArch64_SQDECB_XPiI - 659
18963
254k
    {10930, 3178, 4, 7 },
18964
254k
    {10940, 3185, 4, 7 },
18965
    // AArch64_SQDECB_XPiWdI - 661
18966
254k
    {10956, 3192, 4, 7 },
18967
254k
    {10972, 3199, 4, 7 },
18968
    // AArch64_SQDECD_XPiI - 663
18969
254k
    {10994, 3206, 4, 7 },
18970
254k
    {11004, 3213, 4, 7 },
18971
    // AArch64_SQDECD_XPiWdI - 665
18972
254k
    {11020, 3220, 4, 7 },
18973
254k
    {11036, 3227, 4, 7 },
18974
    // AArch64_SQDECD_ZPiI - 667
18975
254k
    {11058, 3234, 4, 7 },
18976
254k
    {11070, 3241, 4, 7 },
18977
    // AArch64_SQDECH_XPiI - 669
18978
254k
    {11088, 3248, 4, 7 },
18979
254k
    {11098, 3255, 4, 7 },
18980
    // AArch64_SQDECH_XPiWdI - 671
18981
254k
    {11114, 3262, 4, 7 },
18982
254k
    {11130, 3269, 4, 7 },
18983
    // AArch64_SQDECH_ZPiI - 673
18984
254k
    {11152, 3276, 4, 7 },
18985
254k
    {11164, 3283, 4, 7 },
18986
    // AArch64_SQDECW_XPiI - 675
18987
254k
    {11182, 3290, 4, 7 },
18988
254k
    {11192, 3297, 4, 7 },
18989
    // AArch64_SQDECW_XPiWdI - 677
18990
254k
    {11208, 3304, 4, 7 },
18991
254k
    {11224, 3311, 4, 7 },
18992
    // AArch64_SQDECW_ZPiI - 679
18993
254k
    {11246, 3318, 4, 7 },
18994
254k
    {11258, 3325, 4, 7 },
18995
    // AArch64_SQINCB_XPiI - 681
18996
254k
    {11276, 3332, 4, 7 },
18997
254k
    {11286, 3339, 4, 7 },
18998
    // AArch64_SQINCB_XPiWdI - 683
18999
254k
    {11302, 3346, 4, 7 },
19000
254k
    {11318, 3353, 4, 7 },
19001
    // AArch64_SQINCD_XPiI - 685
19002
254k
    {11340, 3360, 4, 7 },
19003
254k
    {11350, 3367, 4, 7 },
19004
    // AArch64_SQINCD_XPiWdI - 687
19005
254k
    {11366, 3374, 4, 7 },
19006
254k
    {11382, 3381, 4, 7 },
19007
    // AArch64_SQINCD_ZPiI - 689
19008
254k
    {11404, 3388, 4, 7 },
19009
254k
    {11416, 3395, 4, 7 },
19010
    // AArch64_SQINCH_XPiI - 691
19011
254k
    {11434, 3402, 4, 7 },
19012
254k
    {11444, 3409, 4, 7 },
19013
    // AArch64_SQINCH_XPiWdI - 693
19014
254k
    {11460, 3416, 4, 7 },
19015
254k
    {11476, 3423, 4, 7 },
19016
    // AArch64_SQINCH_ZPiI - 695
19017
254k
    {11498, 3430, 4, 7 },
19018
254k
    {11510, 3437, 4, 7 },
19019
    // AArch64_SQINCW_XPiI - 697
19020
254k
    {11528, 3444, 4, 7 },
19021
254k
    {11538, 3451, 4, 7 },
19022
    // AArch64_SQINCW_XPiWdI - 699
19023
254k
    {11554, 3458, 4, 7 },
19024
254k
    {11570, 3465, 4, 7 },
19025
    // AArch64_SQINCW_ZPiI - 701
19026
254k
    {11592, 3472, 4, 7 },
19027
254k
    {11604, 3479, 4, 7 },
19028
    // AArch64_SST1B_D_IMM - 703
19029
254k
    {11622, 3486, 4, 5 },
19030
    // AArch64_SST1B_S_IMM - 704
19031
254k
    {11646, 3491, 4, 5 },
19032
    // AArch64_SST1D_IMM - 705
19033
254k
    {11670, 3496, 4, 5 },
19034
    // AArch64_SST1H_D_IMM - 706
19035
254k
    {11694, 3501, 4, 5 },
19036
    // AArch64_SST1H_S_IMM - 707
19037
254k
    {11718, 3506, 4, 5 },
19038
    // AArch64_SST1W_D_IMM - 708
19039
254k
    {11742, 3511, 4, 5 },
19040
    // AArch64_SST1W_IMM - 709
19041
254k
    {11766, 3516, 4, 5 },
19042
    // AArch64_ST1B_D_IMM - 710
19043
254k
    {11790, 3521, 4, 7 },
19044
    // AArch64_ST1B_H_IMM - 711
19045
254k
    {11812, 3528, 4, 7 },
19046
    // AArch64_ST1B_IMM - 712
19047
254k
    {11834, 3535, 4, 7 },
19048
    // AArch64_ST1B_S_IMM - 713
19049
254k
    {11856, 3542, 4, 7 },
19050
    // AArch64_ST1D_IMM - 714
19051
254k
    {11878, 3549, 4, 7 },
19052
    // AArch64_ST1Fourv16b_POST - 715
19053
254k
    {11900, 3556, 4, 5 },
19054
    // AArch64_ST1Fourv1d_POST - 716
19055
254k
    {11920, 3561, 4, 5 },
19056
    // AArch64_ST1Fourv2d_POST - 717
19057
254k
    {11940, 3566, 4, 5 },
19058
    // AArch64_ST1Fourv2s_POST - 718
19059
254k
    {11960, 3571, 4, 5 },
19060
    // AArch64_ST1Fourv4h_POST - 719
19061
254k
    {11980, 3576, 4, 5 },
19062
    // AArch64_ST1Fourv4s_POST - 720
19063
254k
    {12000, 3581, 4, 5 },
19064
    // AArch64_ST1Fourv8b_POST - 721
19065
254k
    {12020, 3586, 4, 5 },
19066
    // AArch64_ST1Fourv8h_POST - 722
19067
254k
    {12040, 3591, 4, 5 },
19068
    // AArch64_ST1H_D_IMM - 723
19069
254k
    {12060, 3596, 4, 7 },
19070
    // AArch64_ST1H_IMM - 724
19071
254k
    {12082, 3603, 4, 7 },
19072
    // AArch64_ST1H_S_IMM - 725
19073
254k
    {12104, 3610, 4, 7 },
19074
    // AArch64_ST1Onev16b_POST - 726
19075
254k
    {12126, 3617, 4, 5 },
19076
    // AArch64_ST1Onev1d_POST - 727
19077
254k
    {12146, 3622, 4, 5 },
19078
    // AArch64_ST1Onev2d_POST - 728
19079
254k
    {12165, 3627, 4, 5 },
19080
    // AArch64_ST1Onev2s_POST - 729
19081
254k
    {12185, 3632, 4, 5 },
19082
    // AArch64_ST1Onev4h_POST - 730
19083
254k
    {12204, 3637, 4, 5 },
19084
    // AArch64_ST1Onev4s_POST - 731
19085
254k
    {12223, 3642, 4, 5 },
19086
    // AArch64_ST1Onev8b_POST - 732
19087
254k
    {12243, 3647, 4, 5 },
19088
    // AArch64_ST1Onev8h_POST - 733
19089
254k
    {12262, 3652, 4, 5 },
19090
    // AArch64_ST1Threev16b_POST - 734
19091
254k
    {12282, 3657, 4, 5 },
19092
    // AArch64_ST1Threev1d_POST - 735
19093
254k
    {12302, 3662, 4, 5 },
19094
    // AArch64_ST1Threev2d_POST - 736
19095
254k
    {12322, 3667, 4, 5 },
19096
    // AArch64_ST1Threev2s_POST - 737
19097
254k
    {12342, 3672, 4, 5 },
19098
    // AArch64_ST1Threev4h_POST - 738
19099
254k
    {12362, 3677, 4, 5 },
19100
    // AArch64_ST1Threev4s_POST - 739
19101
254k
    {12382, 3682, 4, 5 },
19102
    // AArch64_ST1Threev8b_POST - 740
19103
254k
    {12402, 3687, 4, 5 },
19104
    // AArch64_ST1Threev8h_POST - 741
19105
254k
    {12422, 3692, 4, 5 },
19106
    // AArch64_ST1Twov16b_POST - 742
19107
254k
    {12442, 3697, 4, 5 },
19108
    // AArch64_ST1Twov1d_POST - 743
19109
254k
    {12462, 3702, 4, 5 },
19110
    // AArch64_ST1Twov2d_POST - 744
19111
254k
    {12482, 3707, 4, 5 },
19112
    // AArch64_ST1Twov2s_POST - 745
19113
254k
    {12502, 3712, 4, 5 },
19114
    // AArch64_ST1Twov4h_POST - 746
19115
254k
    {12522, 3717, 4, 5 },
19116
    // AArch64_ST1Twov4s_POST - 747
19117
254k
    {12542, 3722, 4, 5 },
19118
    // AArch64_ST1Twov8b_POST - 748
19119
254k
    {12562, 3727, 4, 5 },
19120
    // AArch64_ST1Twov8h_POST - 749
19121
254k
    {12582, 3732, 4, 5 },
19122
    // AArch64_ST1W_D_IMM - 750
19123
254k
    {12602, 3737, 4, 7 },
19124
    // AArch64_ST1W_IMM - 751
19125
254k
    {12624, 3744, 4, 7 },
19126
    // AArch64_ST1_MXIPXX_H_B - 752
19127
254k
    {12646, 3751, 6, 7 },
19128
    // AArch64_ST1_MXIPXX_H_D - 753
19129
254k
    {12680, 3758, 6, 7 },
19130
    // AArch64_ST1_MXIPXX_H_H - 754
19131
254k
    {12714, 3765, 6, 7 },
19132
    // AArch64_ST1_MXIPXX_H_Q - 755
19133
254k
    {12748, 3772, 6, 7 },
19134
    // AArch64_ST1_MXIPXX_H_S - 756
19135
254k
    {12782, 3779, 6, 7 },
19136
    // AArch64_ST1_MXIPXX_V_B - 757
19137
254k
    {12816, 3786, 6, 7 },
19138
    // AArch64_ST1_MXIPXX_V_D - 758
19139
254k
    {12850, 3793, 6, 7 },
19140
    // AArch64_ST1_MXIPXX_V_H - 759
19141
254k
    {12884, 3800, 6, 7 },
19142
    // AArch64_ST1_MXIPXX_V_Q - 760
19143
254k
    {12918, 3807, 6, 7 },
19144
    // AArch64_ST1_MXIPXX_V_S - 761
19145
254k
    {12952, 3814, 6, 7 },
19146
    // AArch64_ST1i16_POST - 762
19147
254k
    {12986, 3821, 5, 6 },
19148
    // AArch64_ST1i32_POST - 763
19149
254k
    {13009, 3827, 5, 6 },
19150
    // AArch64_ST1i64_POST - 764
19151
254k
    {13032, 3833, 5, 6 },
19152
    // AArch64_ST1i8_POST - 765
19153
254k
    {13055, 3839, 5, 6 },
19154
    // AArch64_ST2B_IMM - 766
19155
254k
    {13078, 3845, 4, 7 },
19156
    // AArch64_ST2D_IMM - 767
19157
254k
    {13100, 3852, 4, 7 },
19158
    // AArch64_ST2GOffset - 768
19159
254k
    {13122, 3859, 3, 4 },
19160
    // AArch64_ST2H_IMM - 769
19161
254k
    {13136, 3863, 4, 7 },
19162
    // AArch64_ST2Twov16b_POST - 770
19163
254k
    {13158, 3870, 4, 5 },
19164
    // AArch64_ST2Twov2d_POST - 771
19165
254k
    {13178, 3875, 4, 5 },
19166
    // AArch64_ST2Twov2s_POST - 772
19167
254k
    {13198, 3880, 4, 5 },
19168
    // AArch64_ST2Twov4h_POST - 773
19169
254k
    {13218, 3885, 4, 5 },
19170
    // AArch64_ST2Twov4s_POST - 774
19171
254k
    {13238, 3890, 4, 5 },
19172
    // AArch64_ST2Twov8b_POST - 775
19173
254k
    {13258, 3895, 4, 5 },
19174
    // AArch64_ST2Twov8h_POST - 776
19175
254k
    {13278, 3900, 4, 5 },
19176
    // AArch64_ST2W_IMM - 777
19177
254k
    {13298, 3905, 4, 7 },
19178
    // AArch64_ST2i16_POST - 778
19179
254k
    {13320, 3912, 5, 6 },
19180
    // AArch64_ST2i32_POST - 779
19181
254k
    {13343, 3918, 5, 6 },
19182
    // AArch64_ST2i64_POST - 780
19183
254k
    {13366, 3924, 5, 6 },
19184
    // AArch64_ST2i8_POST - 781
19185
254k
    {13390, 3930, 5, 6 },
19186
    // AArch64_ST3B_IMM - 782
19187
254k
    {13413, 3936, 4, 7 },
19188
    // AArch64_ST3D_IMM - 783
19189
254k
    {13435, 3943, 4, 7 },
19190
    // AArch64_ST3H_IMM - 784
19191
254k
    {13457, 3950, 4, 7 },
19192
    // AArch64_ST3Threev16b_POST - 785
19193
254k
    {13479, 3957, 4, 5 },
19194
    // AArch64_ST3Threev2d_POST - 786
19195
254k
    {13499, 3962, 4, 5 },
19196
    // AArch64_ST3Threev2s_POST - 787
19197
254k
    {13519, 3967, 4, 5 },
19198
    // AArch64_ST3Threev4h_POST - 788
19199
254k
    {13539, 3972, 4, 5 },
19200
    // AArch64_ST3Threev4s_POST - 789
19201
254k
    {13559, 3977, 4, 5 },
19202
    // AArch64_ST3Threev8b_POST - 790
19203
254k
    {13579, 3982, 4, 5 },
19204
    // AArch64_ST3Threev8h_POST - 791
19205
254k
    {13599, 3987, 4, 5 },
19206
    // AArch64_ST3W_IMM - 792
19207
254k
    {13619, 3992, 4, 7 },
19208
    // AArch64_ST3i16_POST - 793
19209
254k
    {13641, 3999, 5, 6 },
19210
    // AArch64_ST3i32_POST - 794
19211
254k
    {13664, 4005, 5, 6 },
19212
    // AArch64_ST3i64_POST - 795
19213
254k
    {13688, 4011, 5, 6 },
19214
    // AArch64_ST3i8_POST - 796
19215
254k
    {13712, 4017, 5, 6 },
19216
    // AArch64_ST4B_IMM - 797
19217
254k
    {13735, 4023, 4, 7 },
19218
    // AArch64_ST4D_IMM - 798
19219
254k
    {13757, 4030, 4, 7 },
19220
    // AArch64_ST4Fourv16b_POST - 799
19221
254k
    {13779, 4037, 4, 5 },
19222
    // AArch64_ST4Fourv2d_POST - 800
19223
254k
    {13799, 4042, 4, 5 },
19224
    // AArch64_ST4Fourv2s_POST - 801
19225
254k
    {13819, 4047, 4, 5 },
19226
    // AArch64_ST4Fourv4h_POST - 802
19227
254k
    {13839, 4052, 4, 5 },
19228
    // AArch64_ST4Fourv4s_POST - 803
19229
254k
    {13859, 4057, 4, 5 },
19230
    // AArch64_ST4Fourv8b_POST - 804
19231
254k
    {13879, 4062, 4, 5 },
19232
    // AArch64_ST4Fourv8h_POST - 805
19233
254k
    {13899, 4067, 4, 5 },
19234
    // AArch64_ST4H_IMM - 806
19235
254k
    {13919, 4072, 4, 7 },
19236
    // AArch64_ST4W_IMM - 807
19237
254k
    {13941, 4079, 4, 7 },
19238
    // AArch64_ST4i16_POST - 808
19239
254k
    {13963, 4086, 5, 6 },
19240
    // AArch64_ST4i32_POST - 809
19241
254k
    {13986, 4092, 5, 6 },
19242
    // AArch64_ST4i64_POST - 810
19243
254k
    {14010, 4098, 5, 6 },
19244
    // AArch64_ST4i8_POST - 811
19245
254k
    {14034, 4104, 5, 6 },
19246
    // AArch64_STGOffset - 812
19247
254k
    {14057, 4110, 3, 4 },
19248
    // AArch64_STGPi - 813
19249
254k
    {14070, 4114, 4, 5 },
19250
    // AArch64_STLURBi - 814
19251
254k
    {14088, 4119, 3, 4 },
19252
    // AArch64_STLURHi - 815
19253
254k
    {14104, 4123, 3, 4 },
19254
    // AArch64_STLURWi - 816
19255
254k
    {14120, 4127, 3, 4 },
19256
    // AArch64_STLURXi - 817
19257
254k
    {14120, 4131, 3, 4 },
19258
    // AArch64_STNPDi - 818
19259
254k
    {14135, 4135, 4, 4 },
19260
    // AArch64_STNPQi - 819
19261
254k
    {14135, 4139, 4, 4 },
19262
    // AArch64_STNPSi - 820
19263
254k
    {14135, 4143, 4, 4 },
19264
    // AArch64_STNPWi - 821
19265
254k
    {14135, 4147, 4, 4 },
19266
    // AArch64_STNPXi - 822
19267
254k
    {14135, 4151, 4, 4 },
19268
    // AArch64_STNT1B_ZRI - 823
19269
254k
    {14153, 4155, 4, 7 },
19270
    // AArch64_STNT1B_ZZR_D_REAL - 824
19271
254k
    {14177, 4162, 4, 5 },
19272
    // AArch64_STNT1B_ZZR_S_REAL - 825
19273
254k
    {14203, 4167, 4, 5 },
19274
    // AArch64_STNT1D_ZRI - 826
19275
254k
    {14229, 4172, 4, 7 },
19276
    // AArch64_STNT1D_ZZR_D_REAL - 827
19277
254k
    {14253, 4179, 4, 5 },
19278
    // AArch64_STNT1H_ZRI - 828
19279
254k
    {14279, 4184, 4, 7 },
19280
    // AArch64_STNT1H_ZZR_D_REAL - 829
19281
254k
    {14303, 4191, 4, 5 },
19282
    // AArch64_STNT1H_ZZR_S_REAL - 830
19283
254k
    {14329, 4196, 4, 5 },
19284
    // AArch64_STNT1W_ZRI - 831
19285
254k
    {14355, 4201, 4, 7 },
19286
    // AArch64_STNT1W_ZZR_D_REAL - 832
19287
254k
    {14379, 4208, 4, 5 },
19288
    // AArch64_STNT1W_ZZR_S_REAL - 833
19289
254k
    {14405, 4213, 4, 5 },
19290
    // AArch64_STPDi - 834
19291
254k
    {14431, 4218, 4, 4 },
19292
    // AArch64_STPQi - 835
19293
254k
    {14431, 4222, 4, 4 },
19294
    // AArch64_STPSi - 836
19295
254k
    {14431, 4226, 4, 4 },
19296
    // AArch64_STPWi - 837
19297
254k
    {14431, 4230, 4, 4 },
19298
    // AArch64_STPXi - 838
19299
254k
    {14431, 4234, 4, 4 },
19300
    // AArch64_STRBBroX - 839
19301
254k
    {14448, 4238, 5, 5 },
19302
    // AArch64_STRBBui - 840
19303
254k
    {14466, 4243, 3, 3 },
19304
    // AArch64_STRBroX - 841
19305
254k
    {14480, 4246, 5, 5 },
19306
    // AArch64_STRBui - 842
19307
254k
    {14497, 4251, 3, 3 },
19308
    // AArch64_STRDroX - 843
19309
254k
    {14480, 4254, 5, 5 },
19310
    // AArch64_STRDui - 844
19311
254k
    {14497, 4259, 3, 3 },
19312
    // AArch64_STRHHroX - 845
19313
254k
    {14510, 4262, 5, 5 },
19314
    // AArch64_STRHHui - 846
19315
254k
    {14528, 4267, 3, 3 },
19316
    // AArch64_STRHroX - 847
19317
254k
    {14480, 4270, 5, 5 },
19318
    // AArch64_STRHui - 848
19319
254k
    {14497, 4275, 3, 3 },
19320
    // AArch64_STRQroX - 849
19321
254k
    {14480, 4278, 5, 5 },
19322
    // AArch64_STRQui - 850
19323
254k
    {14497, 4283, 3, 3 },
19324
    // AArch64_STRSroX - 851
19325
254k
    {14480, 4286, 5, 5 },
19326
    // AArch64_STRSui - 852
19327
254k
    {14497, 4291, 3, 3 },
19328
    // AArch64_STRWroX - 853
19329
254k
    {14480, 4294, 5, 5 },
19330
    // AArch64_STRWui - 854
19331
254k
    {14497, 4299, 3, 3 },
19332
    // AArch64_STRXroX - 855
19333
254k
    {14480, 4302, 5, 5 },
19334
    // AArch64_STRXui - 856
19335
254k
    {14497, 4307, 3, 3 },
19336
    // AArch64_STR_PXI - 857
19337
254k
    {14542, 4310, 3, 6 },
19338
    // AArch64_STR_ZA - 858
19339
254k
    {14557, 4316, 5, 6 },
19340
    // AArch64_STR_ZXI - 859
19341
254k
    {14542, 4322, 3, 6 },
19342
    // AArch64_STTRBi - 860
19343
254k
    {14582, 4328, 3, 3 },
19344
    // AArch64_STTRHi - 861
19345
254k
    {14597, 4331, 3, 3 },
19346
    // AArch64_STTRWi - 862
19347
254k
    {14612, 4334, 3, 3 },
19348
    // AArch64_STTRXi - 863
19349
254k
    {14612, 4337, 3, 3 },
19350
    // AArch64_STURBBi - 864
19351
254k
    {14626, 4340, 3, 3 },
19352
    // AArch64_STURBi - 865
19353
254k
    {14641, 4343, 3, 3 },
19354
    // AArch64_STURDi - 866
19355
254k
    {14641, 4346, 3, 3 },
19356
    // AArch64_STURHHi - 867
19357
254k
    {14655, 4349, 3, 3 },
19358
    // AArch64_STURHi - 868
19359
254k
    {14641, 4352, 3, 3 },
19360
    // AArch64_STURQi - 869
19361
254k
    {14641, 4355, 3, 3 },
19362
    // AArch64_STURSi - 870
19363
254k
    {14641, 4358, 3, 3 },
19364
    // AArch64_STURWi - 871
19365
254k
    {14641, 4361, 3, 3 },
19366
    // AArch64_STURXi - 872
19367
254k
    {14641, 4364, 3, 3 },
19368
    // AArch64_STZ2GOffset - 873
19369
254k
    {14670, 4367, 3, 4 },
19370
    // AArch64_STZGOffset - 874
19371
254k
    {14685, 4371, 3, 4 },
19372
    // AArch64_SUBSWri - 875
19373
254k
    {14699, 4375, 4, 2 },
19374
    // AArch64_SUBSWrs - 876
19375
254k
    {14712, 4377, 4, 4 },
19376
254k
    {14723, 4381, 4, 3 },
19377
254k
    {14738, 4384, 4, 4 },
19378
254k
    {14750, 4388, 4, 3 },
19379
254k
    {14766, 4391, 4, 4 },
19380
    // AArch64_SUBSWrx - 881
19381
254k
    {14712, 4395, 4, 4 },
19382
254k
    {14782, 4399, 4, 3 },
19383
254k
    {14766, 4402, 4, 4 },
19384
    // AArch64_SUBSXri - 884
19385
254k
    {14699, 4406, 4, 2 },
19386
    // AArch64_SUBSXrs - 885
19387
254k
    {14712, 4408, 4, 4 },
19388
254k
    {14723, 4412, 4, 3 },
19389
254k
    {14738, 4415, 4, 4 },
19390
254k
    {14750, 4419, 4, 3 },
19391
254k
    {14766, 4422, 4, 4 },
19392
    // AArch64_SUBSXrx - 890
19393
254k
    {14782, 4426, 4, 3 },
19394
    // AArch64_SUBSXrx64 - 891
19395
254k
    {14712, 4429, 4, 4 },
19396
254k
    {14782, 4433, 4, 3 },
19397
254k
    {14766, 4436, 4, 4 },
19398
    // AArch64_SUBWrs - 894
19399
254k
    {14797, 4440, 4, 4 },
19400
254k
    {14808, 4444, 4, 3 },
19401
254k
    {14823, 4447, 4, 4 },
19402
    // AArch64_SUBWrx - 897
19403
254k
    {14823, 4451, 4, 4 },
19404
254k
    {14823, 4455, 4, 4 },
19405
    // AArch64_SUBXrs - 899
19406
254k
    {14797, 4459, 4, 4 },
19407
254k
    {14808, 4463, 4, 3 },
19408
254k
    {14823, 4466, 4, 4 },
19409
    // AArch64_SUBXrx64 - 902
19410
254k
    {14823, 4470, 4, 4 },
19411
254k
    {14823, 4474, 4, 4 },
19412
    // AArch64_SYSxt - 904
19413
254k
    {14838, 4478, 5, 5 },
19414
    // AArch64_UBFMWri - 905
19415
254k
    {14861, 4483, 4, 4 },
19416
254k
    {14876, 4487, 4, 4 },
19417
254k
    {14888, 4491, 4, 4 },
19418
    // AArch64_UBFMXri - 908
19419
254k
    {14861, 4495, 4, 4 },
19420
254k
    {14876, 4499, 4, 4 },
19421
254k
    {14888, 4503, 4, 4 },
19422
254k
    {14900, 4507, 4, 4 },
19423
    // AArch64_UMADDLrrr - 912
19424
254k
    {14912, 4511, 4, 4 },
19425
    // AArch64_UMOVvi32 - 913
19426
254k
    {14929, 4515, 3, 3 },
19427
    // AArch64_UMOVvi32_idx0 - 914
19428
254k
    {14929, 4518, 3, 5 },
19429
    // AArch64_UMOVvi64 - 915
19430
254k
    {14948, 4523, 3, 3 },
19431
    // AArch64_UMOVvi64_idx0 - 916
19432
254k
    {14948, 4526, 3, 5 },
19433
    // AArch64_UMSUBLrrr - 917
19434
254k
    {14967, 4531, 4, 4 },
19435
    // AArch64_UQDECB_WPiI - 918
19436
254k
    {14985, 4535, 4, 7 },
19437
254k
    {14995, 4542, 4, 7 },
19438
    // AArch64_UQDECB_XPiI - 920
19439
254k
    {14985, 4549, 4, 7 },
19440
254k
    {14995, 4556, 4, 7 },
19441
    // AArch64_UQDECD_WPiI - 922
19442
254k
    {15011, 4563, 4, 7 },
19443
254k
    {15021, 4570, 4, 7 },
19444
    // AArch64_UQDECD_XPiI - 924
19445
254k
    {15011, 4577, 4, 7 },
19446
254k
    {15021, 4584, 4, 7 },
19447
    // AArch64_UQDECD_ZPiI - 926
19448
254k
    {15037, 4591, 4, 7 },
19449
254k
    {15049, 4598, 4, 7 },
19450
    // AArch64_UQDECH_WPiI - 928
19451
254k
    {15067, 4605, 4, 7 },
19452
254k
    {15077, 4612, 4, 7 },
19453
    // AArch64_UQDECH_XPiI - 930
19454
254k
    {15067, 4619, 4, 7 },
19455
254k
    {15077, 4626, 4, 7 },
19456
    // AArch64_UQDECH_ZPiI - 932
19457
254k
    {15093, 4633, 4, 7 },
19458
254k
    {15105, 4640, 4, 7 },
19459
    // AArch64_UQDECW_WPiI - 934
19460
254k
    {15123, 4647, 4, 7 },
19461
254k
    {15133, 4654, 4, 7 },
19462
    // AArch64_UQDECW_XPiI - 936
19463
254k
    {15123, 4661, 4, 7 },
19464
254k
    {15133, 4668, 4, 7 },
19465
    // AArch64_UQDECW_ZPiI - 938
19466
254k
    {15149, 4675, 4, 7 },
19467
254k
    {15161, 4682, 4, 7 },
19468
    // AArch64_UQINCB_WPiI - 940
19469
254k
    {15179, 4689, 4, 7 },
19470
254k
    {15189, 4696, 4, 7 },
19471
    // AArch64_UQINCB_XPiI - 942
19472
254k
    {15179, 4703, 4, 7 },
19473
254k
    {15189, 4710, 4, 7 },
19474
    // AArch64_UQINCD_WPiI - 944
19475
254k
    {15205, 4717, 4, 7 },
19476
254k
    {15215, 4724, 4, 7 },
19477
    // AArch64_UQINCD_XPiI - 946
19478
254k
    {15205, 4731, 4, 7 },
19479
254k
    {15215, 4738, 4, 7 },
19480
    // AArch64_UQINCD_ZPiI - 948
19481
254k
    {15231, 4745, 4, 7 },
19482
254k
    {15243, 4752, 4, 7 },
19483
    // AArch64_UQINCH_WPiI - 950
19484
254k
    {15261, 4759, 4, 7 },
19485
254k
    {15271, 4766, 4, 7 },
19486
    // AArch64_UQINCH_XPiI - 952
19487
254k
    {15261, 4773, 4, 7 },
19488
254k
    {15271, 4780, 4, 7 },
19489
    // AArch64_UQINCH_ZPiI - 954
19490
254k
    {15287, 4787, 4, 7 },
19491
254k
    {15299, 4794, 4, 7 },
19492
    // AArch64_UQINCW_WPiI - 956
19493
254k
    {15317, 4801, 4, 7 },
19494
254k
    {15327, 4808, 4, 7 },
19495
    // AArch64_UQINCW_XPiI - 958
19496
254k
    {15317, 4815, 4, 7 },
19497
254k
    {15327, 4822, 4, 7 },
19498
    // AArch64_UQINCW_ZPiI - 960
19499
254k
    {15343, 4829, 4, 7 },
19500
254k
    {15355, 4836, 4, 7 },
19501
    // AArch64_XPACLRI - 962
19502
254k
    {15373, 4843, 0, 1 },
19503
    // AArch64_ZERO_M - 963
19504
254k
    {15381, 4844, 1, 2 },
19505
254k
    {15391, 4846, 1, 2 },
19506
254k
    {15404, 4848, 1, 2 },
19507
254k
    {15417, 4850, 1, 2 },
19508
254k
    {15430, 4852, 1, 2 },
19509
254k
    {15443, 4854, 1, 2 },
19510
254k
    {15456, 4856, 1, 2 },
19511
254k
    {15469, 4858, 1, 2 },
19512
254k
    {15488, 4860, 1, 2 },
19513
254k
    {15507, 4862, 1, 2 },
19514
254k
    {15526, 4864, 1, 2 },
19515
254k
    {15545, 4866, 1, 2 },
19516
254k
    {15570, 4868, 1, 2 },
19517
254k
    {15595, 4870, 1, 2 },
19518
254k
    {15620, 4872, 1, 2 },
19519
254k
  };
19520
19521
254k
  static const AliasPatternCond Conds[] = {
19522
    // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 0
19523
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19524
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19525
    // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 2
19526
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19527
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19528
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19529
254k
    {AliasPatternCond_K_Imm, 0},
19530
    // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 6
19531
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19532
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19533
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19534
    // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 9
19535
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19536
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19537
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19538
254k
    {AliasPatternCond_K_Imm, 0},
19539
    // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 13
19540
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19541
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19542
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19543
254k
    {AliasPatternCond_K_Imm, 16},
19544
    // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 17
19545
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19546
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19547
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19548
    // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 20
19549
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19550
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19551
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19552
254k
    {AliasPatternCond_K_Imm, 16},
19553
    // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 24
19554
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19555
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19556
    // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 26
19557
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19558
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19559
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19560
254k
    {AliasPatternCond_K_Imm, 0},
19561
    // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 30
19562
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19563
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19564
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19565
    // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 33
19566
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19567
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19568
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19569
254k
    {AliasPatternCond_K_Imm, 0},
19570
    // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 37
19571
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19572
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19573
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19574
    // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 40
19575
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19576
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19577
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19578
254k
    {AliasPatternCond_K_Imm, 24},
19579
    // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 44
19580
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19581
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19582
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19583
    // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 47
19584
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19585
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19586
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19587
254k
    {AliasPatternCond_K_Imm, 24},
19588
    // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) - 51
19589
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19590
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19591
254k
    {AliasPatternCond_K_Imm, 0},
19592
254k
    {AliasPatternCond_K_Imm, 0},
19593
    // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) - 55
19594
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19595
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19596
254k
    {AliasPatternCond_K_Imm, 0},
19597
254k
    {AliasPatternCond_K_Imm, 0},
19598
    // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 59
19599
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19600
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19601
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19602
254k
    {AliasPatternCond_K_Imm, 0},
19603
    // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 63
19604
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19605
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19606
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19607
254k
    {AliasPatternCond_K_Imm, 16},
19608
    // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 67
19609
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19610
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
19611
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19612
254k
    {AliasPatternCond_K_Imm, 16},
19613
    // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) - 71
19614
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19615
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19616
254k
    {AliasPatternCond_K_Imm, 0},
19617
254k
    {AliasPatternCond_K_Imm, 0},
19618
    // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) - 75
19619
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19620
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19621
254k
    {AliasPatternCond_K_Imm, 0},
19622
254k
    {AliasPatternCond_K_Imm, 0},
19623
    // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 79
19624
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19625
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19626
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19627
254k
    {AliasPatternCond_K_Imm, 0},
19628
    // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 83
19629
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19630
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19631
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19632
254k
    {AliasPatternCond_K_Imm, 24},
19633
    // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 87
19634
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19635
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
19636
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19637
254k
    {AliasPatternCond_K_Imm, 24},
19638
    // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) - 91
19639
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19640
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19641
    // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 93
19642
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19643
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19644
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19645
254k
    {AliasPatternCond_K_Imm, 0},
19646
    // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) - 97
19647
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19648
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19649
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19650
    // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 100
19651
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19652
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19653
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19654
254k
    {AliasPatternCond_K_Imm, 0},
19655
    // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) - 104
19656
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19657
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19658
    // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 106
19659
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19660
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19661
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19662
254k
    {AliasPatternCond_K_Imm, 0},
19663
    // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) - 110
19664
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19665
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19666
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19667
    // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 113
19668
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19669
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19670
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19671
254k
    {AliasPatternCond_K_Imm, 0},
19672
    // (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 117
19673
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19674
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19675
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19676
254k
    {AliasPatternCond_K_TiedReg, 2},
19677
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19678
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19679
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19680
    // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 124
19681
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19682
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19683
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19684
254k
    {AliasPatternCond_K_Imm, 0},
19685
    // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 128
19686
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19687
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19688
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19689
254k
    {AliasPatternCond_K_Imm, 0},
19690
    // (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 132
19691
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19692
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19693
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19694
254k
    {AliasPatternCond_K_TiedReg, 2},
19695
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19696
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19697
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19698
    // (AND_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 139
19699
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19700
254k
    {AliasPatternCond_K_Ignore, 0},
19701
254k
    {AliasPatternCond_K_Custom, 1},
19702
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19703
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19704
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19705
    // (AND_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 145
19706
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19707
254k
    {AliasPatternCond_K_Ignore, 0},
19708
254k
    {AliasPatternCond_K_Custom, 2},
19709
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19710
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19711
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19712
    // (AND_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 151
19713
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19714
254k
    {AliasPatternCond_K_Ignore, 0},
19715
254k
    {AliasPatternCond_K_Custom, 3},
19716
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19717
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19718
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19719
    // (AUTIA1716) - 157
19720
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19721
    // (AUTIASP) - 158
19722
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19723
    // (AUTIAZ) - 159
19724
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19725
    // (AUTIB1716) - 160
19726
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19727
    // (AUTIBSP) - 161
19728
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19729
    // (AUTIBZ) - 162
19730
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
19731
    // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 163
19732
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19733
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19734
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19735
254k
    {AliasPatternCond_K_Imm, 0},
19736
    // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 167
19737
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19738
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19739
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19740
254k
    {AliasPatternCond_K_Imm, 0},
19741
    // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 171
19742
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19743
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19744
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19745
254k
    {AliasPatternCond_K_Imm, 0},
19746
    // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 175
19747
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19748
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19749
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19750
254k
    {AliasPatternCond_K_Imm, 0},
19751
    // (CLREX 15) - 179
19752
254k
    {AliasPatternCond_K_Imm, 15},
19753
    // (CNTB_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 180
19754
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19755
254k
    {AliasPatternCond_K_Imm, 31},
19756
254k
    {AliasPatternCond_K_Imm, 1},
19757
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19758
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19759
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19760
    // (CNTB_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 186
19761
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19762
254k
    {AliasPatternCond_K_Ignore, 0},
19763
254k
    {AliasPatternCond_K_Imm, 1},
19764
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19765
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19766
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19767
    // (CNTD_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 192
19768
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19769
254k
    {AliasPatternCond_K_Imm, 31},
19770
254k
    {AliasPatternCond_K_Imm, 1},
19771
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19772
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19773
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19774
    // (CNTD_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 198
19775
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19776
254k
    {AliasPatternCond_K_Ignore, 0},
19777
254k
    {AliasPatternCond_K_Imm, 1},
19778
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19779
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19780
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19781
    // (CNTH_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 204
19782
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19783
254k
    {AliasPatternCond_K_Imm, 31},
19784
254k
    {AliasPatternCond_K_Imm, 1},
19785
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19786
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19787
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19788
    // (CNTH_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 210
19789
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19790
254k
    {AliasPatternCond_K_Ignore, 0},
19791
254k
    {AliasPatternCond_K_Imm, 1},
19792
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19793
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19794
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19795
    // (CNTW_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 216
19796
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19797
254k
    {AliasPatternCond_K_Imm, 31},
19798
254k
    {AliasPatternCond_K_Imm, 1},
19799
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19800
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19801
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19802
    // (CNTW_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 222
19803
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19804
254k
    {AliasPatternCond_K_Ignore, 0},
19805
254k
    {AliasPatternCond_K_Imm, 1},
19806
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19807
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19808
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19809
    // (CPY_ZPmI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 228
19810
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19811
254k
    {AliasPatternCond_K_Ignore, 0},
19812
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19813
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19814
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19815
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19816
    // (CPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 234
19817
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19818
254k
    {AliasPatternCond_K_Ignore, 0},
19819
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19820
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19821
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19822
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19823
    // (CPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 240
19824
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19825
254k
    {AliasPatternCond_K_Ignore, 0},
19826
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19827
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19828
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19829
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19830
    // (CPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 246
19831
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19832
254k
    {AliasPatternCond_K_Ignore, 0},
19833
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19834
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19835
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19836
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19837
    // (CPY_ZPmR_B ZPR8:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 252
19838
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19839
254k
    {AliasPatternCond_K_Ignore, 0},
19840
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19841
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19842
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19843
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19844
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19845
    // (CPY_ZPmR_D ZPR64:$Zd, PPR3bAny:$Pg, GPR64sp:$Rn) - 259
19846
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19847
254k
    {AliasPatternCond_K_Ignore, 0},
19848
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19849
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
19850
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19851
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19852
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19853
    // (CPY_ZPmR_H ZPR16:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 266
19854
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19855
254k
    {AliasPatternCond_K_Ignore, 0},
19856
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19857
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19858
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19859
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19860
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19861
    // (CPY_ZPmR_S ZPR32:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 273
19862
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19863
254k
    {AliasPatternCond_K_Ignore, 0},
19864
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19865
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
19866
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19867
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19868
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19869
    // (CPY_ZPmV_B ZPR8:$Zd, PPR3bAny:$Pg, FPR8:$Vn) - 280
19870
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19871
254k
    {AliasPatternCond_K_Ignore, 0},
19872
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19873
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
19874
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19875
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19876
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19877
    // (CPY_ZPmV_D ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn) - 287
19878
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19879
254k
    {AliasPatternCond_K_Ignore, 0},
19880
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19881
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
19882
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19883
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19884
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19885
    // (CPY_ZPmV_H ZPR16:$Zd, PPR3bAny:$Pg, FPR16:$Vn) - 294
19886
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19887
254k
    {AliasPatternCond_K_Ignore, 0},
19888
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19889
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
19890
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19891
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19892
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19893
    // (CPY_ZPmV_S ZPR32:$Zd, PPR3bAny:$Pg, FPR32:$Vn) - 301
19894
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19895
254k
    {AliasPatternCond_K_Ignore, 0},
19896
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
19897
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
19898
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19899
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19900
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19901
    // (CPY_ZPzI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 308
19902
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19903
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19904
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19905
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19906
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19907
    // (CPY_ZPzI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 313
19908
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19909
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19910
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19911
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19912
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19913
    // (CPY_ZPzI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 318
19914
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19915
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19916
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19917
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19918
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19919
    // (CPY_ZPzI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 323
19920
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
19921
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
19922
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19923
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19924
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19925
    // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 328
19926
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19927
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19928
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19929
254k
    {AliasPatternCond_K_Custom, 4},
19930
    // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 332
19931
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19932
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19933
254k
    {AliasPatternCond_K_TiedReg, 1},
19934
254k
    {AliasPatternCond_K_Custom, 4},
19935
    // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 336
19936
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19937
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19938
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19939
254k
    {AliasPatternCond_K_Custom, 4},
19940
    // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 340
19941
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19942
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19943
254k
    {AliasPatternCond_K_TiedReg, 1},
19944
254k
    {AliasPatternCond_K_Custom, 4},
19945
    // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 344
19946
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19947
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19948
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
19949
254k
    {AliasPatternCond_K_Custom, 4},
19950
    // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 348
19951
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19952
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19953
254k
    {AliasPatternCond_K_TiedReg, 1},
19954
254k
    {AliasPatternCond_K_Custom, 4},
19955
    // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 352
19956
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19957
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19958
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
19959
254k
    {AliasPatternCond_K_Custom, 4},
19960
    // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 356
19961
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19962
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19963
254k
    {AliasPatternCond_K_TiedReg, 1},
19964
254k
    {AliasPatternCond_K_Custom, 4},
19965
    // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 360
19966
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19967
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
19968
254k
    {AliasPatternCond_K_TiedReg, 1},
19969
254k
    {AliasPatternCond_K_Custom, 4},
19970
    // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 364
19971
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19972
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19973
254k
    {AliasPatternCond_K_TiedReg, 1},
19974
254k
    {AliasPatternCond_K_Custom, 4},
19975
    // (DCPS1 0) - 368
19976
254k
    {AliasPatternCond_K_Imm, 0},
19977
    // (DCPS2 0) - 369
19978
254k
    {AliasPatternCond_K_Imm, 0},
19979
    // (DCPS3 0) - 370
19980
254k
    {AliasPatternCond_K_Imm, 0},
19981
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureEL3},
19982
    // (DECB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 372
19983
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19984
254k
    {AliasPatternCond_K_Ignore, 0},
19985
254k
    {AliasPatternCond_K_Imm, 31},
19986
254k
    {AliasPatternCond_K_Imm, 1},
19987
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19988
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19989
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19990
    // (DECB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 379
19991
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
19992
254k
    {AliasPatternCond_K_Ignore, 0},
19993
254k
    {AliasPatternCond_K_Ignore, 0},
19994
254k
    {AliasPatternCond_K_Imm, 1},
19995
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
19996
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
19997
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
19998
    // (DECD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 386
19999
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20000
254k
    {AliasPatternCond_K_Ignore, 0},
20001
254k
    {AliasPatternCond_K_Imm, 31},
20002
254k
    {AliasPatternCond_K_Imm, 1},
20003
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20004
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20005
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20006
    // (DECD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 393
20007
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20008
254k
    {AliasPatternCond_K_Ignore, 0},
20009
254k
    {AliasPatternCond_K_Ignore, 0},
20010
254k
    {AliasPatternCond_K_Imm, 1},
20011
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20012
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20013
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20014
    // (DECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 400
20015
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20016
254k
    {AliasPatternCond_K_Ignore, 0},
20017
254k
    {AliasPatternCond_K_Imm, 31},
20018
254k
    {AliasPatternCond_K_Imm, 1},
20019
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20020
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20021
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20022
    // (DECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 407
20023
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20024
254k
    {AliasPatternCond_K_Ignore, 0},
20025
254k
    {AliasPatternCond_K_Ignore, 0},
20026
254k
    {AliasPatternCond_K_Imm, 1},
20027
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20028
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20029
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20030
    // (DECH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 414
20031
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20032
254k
    {AliasPatternCond_K_Ignore, 0},
20033
254k
    {AliasPatternCond_K_Imm, 31},
20034
254k
    {AliasPatternCond_K_Imm, 1},
20035
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20036
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20037
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20038
    // (DECH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 421
20039
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20040
254k
    {AliasPatternCond_K_Ignore, 0},
20041
254k
    {AliasPatternCond_K_Ignore, 0},
20042
254k
    {AliasPatternCond_K_Imm, 1},
20043
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20044
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20045
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20046
    // (DECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 428
20047
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20048
254k
    {AliasPatternCond_K_Ignore, 0},
20049
254k
    {AliasPatternCond_K_Imm, 31},
20050
254k
    {AliasPatternCond_K_Imm, 1},
20051
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20052
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20053
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20054
    // (DECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 435
20055
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20056
254k
    {AliasPatternCond_K_Ignore, 0},
20057
254k
    {AliasPatternCond_K_Ignore, 0},
20058
254k
    {AliasPatternCond_K_Imm, 1},
20059
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20060
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20061
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20062
    // (DECW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 442
20063
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20064
254k
    {AliasPatternCond_K_Ignore, 0},
20065
254k
    {AliasPatternCond_K_Imm, 31},
20066
254k
    {AliasPatternCond_K_Imm, 1},
20067
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20068
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20069
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20070
    // (DECW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 449
20071
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20072
254k
    {AliasPatternCond_K_Ignore, 0},
20073
254k
    {AliasPatternCond_K_Ignore, 0},
20074
254k
    {AliasPatternCond_K_Imm, 1},
20075
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20076
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20077
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20078
    // (DECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 456
20079
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20080
254k
    {AliasPatternCond_K_Ignore, 0},
20081
254k
    {AliasPatternCond_K_Imm, 31},
20082
254k
    {AliasPatternCond_K_Imm, 1},
20083
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20084
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20085
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20086
    // (DECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 463
20087
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20088
254k
    {AliasPatternCond_K_Ignore, 0},
20089
254k
    {AliasPatternCond_K_Ignore, 0},
20090
254k
    {AliasPatternCond_K_Imm, 1},
20091
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20092
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20093
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20094
    // (DSB 0) - 470
20095
254k
    {AliasPatternCond_K_Imm, 0},
20096
    // (DSB 4) - 471
20097
254k
    {AliasPatternCond_K_Imm, 4},
20098
    // (DSB { 1, 1, 0, 0 }) - 472
20099
254k
    {AliasPatternCond_K_Imm, 12},
20100
254k
    {AliasPatternCond_K_Feature, AArch64_HasV8_0rOps},
20101
    // (DUPM_ZI ZPR16:$Zd, sve_preferred_logical_imm16:$imm) - 474
20102
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20103
254k
    {AliasPatternCond_K_Custom, 5},
20104
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20105
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20106
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20107
    // (DUPM_ZI ZPR32:$Zd, sve_preferred_logical_imm32:$imm) - 479
20108
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20109
254k
    {AliasPatternCond_K_Custom, 6},
20110
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20111
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20112
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20113
    // (DUPM_ZI ZPR64:$Zd, sve_preferred_logical_imm64:$imm) - 484
20114
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20115
254k
    {AliasPatternCond_K_Custom, 7},
20116
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20117
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20118
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20119
    // (DUPM_ZI ZPR8:$Zd, sve_logical_imm8:$imm) - 489
20120
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20121
254k
    {AliasPatternCond_K_Custom, 1},
20122
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20123
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20124
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20125
    // (DUPM_ZI ZPR16:$Zd, sve_logical_imm16:$imm) - 494
20126
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20127
254k
    {AliasPatternCond_K_Custom, 2},
20128
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20129
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20130
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20131
    // (DUPM_ZI ZPR32:$Zd, sve_logical_imm32:$imm) - 499
20132
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20133
254k
    {AliasPatternCond_K_Custom, 3},
20134
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20135
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20136
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20137
    // (DUP_ZI_B ZPR8:$Zd, cpy_imm8_opt_lsl_i8:$imm) - 504
20138
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20139
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20140
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20141
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20142
    // (DUP_ZI_D ZPR64:$Zd, cpy_imm8_opt_lsl_i64:$imm) - 508
20143
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20144
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20145
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20146
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20147
    // (DUP_ZI_D ZPR64:$Zd, 0, 0) - 512
20148
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20149
254k
    {AliasPatternCond_K_Imm, 0},
20150
254k
    {AliasPatternCond_K_Imm, 0},
20151
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20152
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20153
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20154
    // (DUP_ZI_H ZPR16:$Zd, cpy_imm8_opt_lsl_i16:$imm) - 518
20155
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20156
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20157
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20158
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20159
    // (DUP_ZI_H ZPR16:$Zd, 0, 0) - 522
20160
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20161
254k
    {AliasPatternCond_K_Imm, 0},
20162
254k
    {AliasPatternCond_K_Imm, 0},
20163
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20164
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20165
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20166
    // (DUP_ZI_S ZPR32:$Zd, cpy_imm8_opt_lsl_i32:$imm) - 528
20167
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20168
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20169
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20170
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20171
    // (DUP_ZI_S ZPR32:$Zd, 0, 0) - 532
20172
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20173
254k
    {AliasPatternCond_K_Imm, 0},
20174
254k
    {AliasPatternCond_K_Imm, 0},
20175
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20176
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20177
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20178
    // (DUP_ZR_B ZPR8:$Zd, GPR32sp:$Rn) - 538
20179
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20180
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
20181
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20182
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20183
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20184
    // (DUP_ZR_D ZPR64:$Zd, GPR64sp:$Rn) - 543
20185
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20186
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20187
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20188
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20189
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20190
    // (DUP_ZR_H ZPR16:$Zd, GPR32sp:$Rn) - 548
20191
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20192
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
20193
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20194
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20195
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20196
    // (DUP_ZR_S ZPR32:$Zd, GPR32sp:$Rn) - 553
20197
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20198
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
20199
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20200
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20201
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20202
    // (DUP_ZZI_B ZPR8:$Zd, FPR8asZPR:$Bn, 0) - 558
20203
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20204
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20205
254k
    {AliasPatternCond_K_Imm, 0},
20206
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20207
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20208
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20209
    // (DUP_ZZI_B ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx) - 564
20210
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20211
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20212
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20213
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20214
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20215
    // (DUP_ZZI_D ZPR64:$Zd, FPR64asZPR:$Dn, 0) - 569
20216
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20217
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20218
254k
    {AliasPatternCond_K_Imm, 0},
20219
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20220
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20221
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20222
    // (DUP_ZZI_D ZPR64:$Zd, ZPR64:$Zn, sve_elm_idx_extdup_d:$idx) - 575
20223
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20224
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20225
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20226
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20227
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20228
    // (DUP_ZZI_H ZPR16:$Zd, FPR16asZPR:$Hn, 0) - 580
20229
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20230
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20231
254k
    {AliasPatternCond_K_Imm, 0},
20232
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20233
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20234
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20235
    // (DUP_ZZI_H ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx) - 586
20236
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20237
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20238
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20239
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20240
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20241
    // (DUP_ZZI_Q ZPR128:$Zd, FPR128asZPR:$Qn, 0) - 591
20242
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20243
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20244
254k
    {AliasPatternCond_K_Imm, 0},
20245
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20246
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20247
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20248
    // (DUP_ZZI_Q ZPR128:$Zd, ZPR128:$Zn, sve_elm_idx_extdup_q:$idx) - 597
20249
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20250
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20251
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20252
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20253
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20254
    // (DUP_ZZI_S ZPR32:$Zd, FPR32asZPR:$Sn, 0) - 602
20255
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20256
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20257
254k
    {AliasPatternCond_K_Imm, 0},
20258
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20259
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20260
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20261
    // (DUP_ZZI_S ZPR32:$Zd, ZPR32:$Zn, sve_elm_idx_extdup_s:$idx) - 608
20262
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20263
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20264
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20265
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20266
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20267
    // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 613
20268
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20269
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20270
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20271
254k
    {AliasPatternCond_K_Imm, 0},
20272
    // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 617
20273
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20274
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20275
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20276
254k
    {AliasPatternCond_K_Imm, 0},
20277
    // (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 621
20278
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20279
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20280
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20281
254k
    {AliasPatternCond_K_TiedReg, 1},
20282
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20283
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20284
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20285
    // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 628
20286
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20287
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20288
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20289
254k
    {AliasPatternCond_K_Imm, 0},
20290
    // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 632
20291
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20292
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20293
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20294
254k
    {AliasPatternCond_K_Imm, 0},
20295
    // (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 636
20296
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20297
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20298
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20299
254k
    {AliasPatternCond_K_TiedReg, 1},
20300
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20301
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20302
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20303
    // (EOR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 643
20304
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20305
254k
    {AliasPatternCond_K_Ignore, 0},
20306
254k
    {AliasPatternCond_K_Custom, 1},
20307
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20308
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20309
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20310
    // (EOR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 649
20311
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20312
254k
    {AliasPatternCond_K_Ignore, 0},
20313
254k
    {AliasPatternCond_K_Custom, 2},
20314
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20315
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20316
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20317
    // (EOR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 655
20318
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20319
254k
    {AliasPatternCond_K_Ignore, 0},
20320
254k
    {AliasPatternCond_K_Custom, 3},
20321
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20322
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20323
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20324
    // (EXTRACT_ZPMXI_H_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpH8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 661
20325
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20326
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20327
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
20328
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20329
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20330
    // (EXTRACT_ZPMXI_H_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpH64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 666
20331
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20332
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20333
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
20334
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20335
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20336
    // (EXTRACT_ZPMXI_H_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpH16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 671
20337
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20338
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20339
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
20340
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20341
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20342
    // (EXTRACT_ZPMXI_H_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpH128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 676
20343
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20344
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20345
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
20346
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20347
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20348
    // (EXTRACT_ZPMXI_H_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpH32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 681
20349
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20350
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20351
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
20352
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20353
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20354
    // (EXTRACT_ZPMXI_V_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpV8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 686
20355
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20356
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20357
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
20358
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20359
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20360
    // (EXTRACT_ZPMXI_V_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpV64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 691
20361
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20362
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20363
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
20364
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20365
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20366
    // (EXTRACT_ZPMXI_V_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpV16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 696
20367
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20368
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20369
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
20370
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20371
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20372
    // (EXTRACT_ZPMXI_V_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpV128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 701
20373
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20374
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20375
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
20376
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20377
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20378
    // (EXTRACT_ZPMXI_V_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpV32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 706
20379
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20380
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20381
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
20382
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20383
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20384
    // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) - 711
20385
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20386
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20387
254k
    {AliasPatternCond_K_TiedReg, 1},
20388
    // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) - 714
20389
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20390
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20391
254k
    {AliasPatternCond_K_TiedReg, 1},
20392
    // (FCPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, fpimm64:$imm8) - 717
20393
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20394
254k
    {AliasPatternCond_K_Ignore, 0},
20395
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20396
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20397
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20398
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20399
    // (FCPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, fpimm16:$imm8) - 723
20400
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20401
254k
    {AliasPatternCond_K_Ignore, 0},
20402
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20403
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20404
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20405
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20406
    // (FCPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, fpimm32:$imm8) - 729
20407
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20408
254k
    {AliasPatternCond_K_Ignore, 0},
20409
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
20410
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20411
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20412
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20413
    // (FDUP_ZI_D ZPR64:$Zd, fpimm64:$imm8) - 735
20414
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20415
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20416
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20417
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20418
    // (FDUP_ZI_H ZPR16:$Zd, fpimm16:$imm8) - 739
20419
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20420
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20421
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20422
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20423
    // (FDUP_ZI_S ZPR32:$Zd, fpimm32:$imm8) - 743
20424
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20425
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20426
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20427
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20428
    // (GLD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 747
20429
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20430
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20431
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20432
254k
    {AliasPatternCond_K_Imm, 0},
20433
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20434
    // (GLD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 752
20435
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20436
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20437
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20438
254k
    {AliasPatternCond_K_Imm, 0},
20439
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20440
    // (GLD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 757
20441
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20442
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20443
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20444
254k
    {AliasPatternCond_K_Imm, 0},
20445
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20446
    // (GLD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 762
20447
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20448
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20449
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20450
254k
    {AliasPatternCond_K_Imm, 0},
20451
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20452
    // (GLD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 767
20453
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20454
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20455
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20456
254k
    {AliasPatternCond_K_Imm, 0},
20457
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20458
    // (GLD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 772
20459
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20460
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20461
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20462
254k
    {AliasPatternCond_K_Imm, 0},
20463
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20464
    // (GLD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 777
20465
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20466
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20467
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20468
254k
    {AliasPatternCond_K_Imm, 0},
20469
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20470
    // (GLD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 782
20471
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20472
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20473
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20474
254k
    {AliasPatternCond_K_Imm, 0},
20475
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20476
    // (GLD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 787
20477
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20478
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20479
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20480
254k
    {AliasPatternCond_K_Imm, 0},
20481
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20482
    // (GLD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 792
20483
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20484
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20485
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20486
254k
    {AliasPatternCond_K_Imm, 0},
20487
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20488
    // (GLD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 797
20489
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20490
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20491
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20492
254k
    {AliasPatternCond_K_Imm, 0},
20493
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20494
    // (GLD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 802
20495
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20496
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20497
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20498
254k
    {AliasPatternCond_K_Imm, 0},
20499
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20500
    // (GLDFF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 807
20501
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20502
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20503
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20504
254k
    {AliasPatternCond_K_Imm, 0},
20505
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20506
    // (GLDFF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 812
20507
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20508
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20509
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20510
254k
    {AliasPatternCond_K_Imm, 0},
20511
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20512
    // (GLDFF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 817
20513
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20514
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20515
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20516
254k
    {AliasPatternCond_K_Imm, 0},
20517
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20518
    // (GLDFF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 822
20519
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20520
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20521
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20522
254k
    {AliasPatternCond_K_Imm, 0},
20523
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20524
    // (GLDFF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 827
20525
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20526
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20527
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20528
254k
    {AliasPatternCond_K_Imm, 0},
20529
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20530
    // (GLDFF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 832
20531
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20532
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20533
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20534
254k
    {AliasPatternCond_K_Imm, 0},
20535
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20536
    // (GLDFF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 837
20537
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20538
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20539
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20540
254k
    {AliasPatternCond_K_Imm, 0},
20541
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20542
    // (GLDFF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 842
20543
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20544
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20545
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20546
254k
    {AliasPatternCond_K_Imm, 0},
20547
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20548
    // (GLDFF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 847
20549
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20550
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20551
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20552
254k
    {AliasPatternCond_K_Imm, 0},
20553
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20554
    // (GLDFF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 852
20555
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20556
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20557
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20558
254k
    {AliasPatternCond_K_Imm, 0},
20559
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20560
    // (GLDFF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 857
20561
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20562
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20563
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20564
254k
    {AliasPatternCond_K_Imm, 0},
20565
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20566
    // (GLDFF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 862
20567
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20568
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20569
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20570
254k
    {AliasPatternCond_K_Imm, 0},
20571
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
20572
    // (HINT { 0, 0, 0 }) - 867
20573
254k
    {AliasPatternCond_K_Imm, 0},
20574
    // (HINT { 0, 0, 1 }) - 868
20575
254k
    {AliasPatternCond_K_Imm, 1},
20576
    // (HINT { 0, 1, 0 }) - 869
20577
254k
    {AliasPatternCond_K_Imm, 2},
20578
    // (HINT { 0, 1, 1 }) - 870
20579
254k
    {AliasPatternCond_K_Imm, 3},
20580
    // (HINT { 1, 0, 0 }) - 871
20581
254k
    {AliasPatternCond_K_Imm, 4},
20582
    // (HINT { 1, 0, 1 }) - 872
20583
254k
    {AliasPatternCond_K_Imm, 5},
20584
    // (HINT { 1, 1, 0 }) - 873
20585
254k
    {AliasPatternCond_K_Imm, 6},
20586
    // (HINT { 1, 0, 0, 0, 0 }) - 874
20587
254k
    {AliasPatternCond_K_Imm, 16},
20588
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRAS},
20589
    // (HINT 20) - 876
20590
254k
    {AliasPatternCond_K_Imm, 20},
20591
    // (HINT 32) - 877
20592
254k
    {AliasPatternCond_K_Imm, 32},
20593
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureBranchTargetId},
20594
    // (HINT btihint_op:$op) - 879
20595
254k
    {AliasPatternCond_K_Custom, 8},
20596
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureBranchTargetId},
20597
    // (HINT psbhint_op:$op) - 881
20598
254k
    {AliasPatternCond_K_Custom, 9},
20599
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSPE},
20600
    // (INCB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 883
20601
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20602
254k
    {AliasPatternCond_K_Ignore, 0},
20603
254k
    {AliasPatternCond_K_Imm, 31},
20604
254k
    {AliasPatternCond_K_Imm, 1},
20605
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20606
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20607
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20608
    // (INCB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 890
20609
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20610
254k
    {AliasPatternCond_K_Ignore, 0},
20611
254k
    {AliasPatternCond_K_Ignore, 0},
20612
254k
    {AliasPatternCond_K_Imm, 1},
20613
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20614
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20615
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20616
    // (INCD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 897
20617
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20618
254k
    {AliasPatternCond_K_Ignore, 0},
20619
254k
    {AliasPatternCond_K_Imm, 31},
20620
254k
    {AliasPatternCond_K_Imm, 1},
20621
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20622
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20623
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20624
    // (INCD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 904
20625
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20626
254k
    {AliasPatternCond_K_Ignore, 0},
20627
254k
    {AliasPatternCond_K_Ignore, 0},
20628
254k
    {AliasPatternCond_K_Imm, 1},
20629
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20630
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20631
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20632
    // (INCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 911
20633
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20634
254k
    {AliasPatternCond_K_Ignore, 0},
20635
254k
    {AliasPatternCond_K_Imm, 31},
20636
254k
    {AliasPatternCond_K_Imm, 1},
20637
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20638
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20639
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20640
    // (INCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 918
20641
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20642
254k
    {AliasPatternCond_K_Ignore, 0},
20643
254k
    {AliasPatternCond_K_Ignore, 0},
20644
254k
    {AliasPatternCond_K_Imm, 1},
20645
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20646
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20647
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20648
    // (INCH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 925
20649
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20650
254k
    {AliasPatternCond_K_Ignore, 0},
20651
254k
    {AliasPatternCond_K_Imm, 31},
20652
254k
    {AliasPatternCond_K_Imm, 1},
20653
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20654
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20655
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20656
    // (INCH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 932
20657
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20658
254k
    {AliasPatternCond_K_Ignore, 0},
20659
254k
    {AliasPatternCond_K_Ignore, 0},
20660
254k
    {AliasPatternCond_K_Imm, 1},
20661
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20662
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20663
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20664
    // (INCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 939
20665
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20666
254k
    {AliasPatternCond_K_Ignore, 0},
20667
254k
    {AliasPatternCond_K_Imm, 31},
20668
254k
    {AliasPatternCond_K_Imm, 1},
20669
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20670
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20671
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20672
    // (INCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 946
20673
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20674
254k
    {AliasPatternCond_K_Ignore, 0},
20675
254k
    {AliasPatternCond_K_Ignore, 0},
20676
254k
    {AliasPatternCond_K_Imm, 1},
20677
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20678
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20679
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20680
    // (INCW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 953
20681
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20682
254k
    {AliasPatternCond_K_Ignore, 0},
20683
254k
    {AliasPatternCond_K_Imm, 31},
20684
254k
    {AliasPatternCond_K_Imm, 1},
20685
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20686
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20687
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20688
    // (INCW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 960
20689
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20690
254k
    {AliasPatternCond_K_Ignore, 0},
20691
254k
    {AliasPatternCond_K_Ignore, 0},
20692
254k
    {AliasPatternCond_K_Imm, 1},
20693
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20694
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20695
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20696
    // (INCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 967
20697
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20698
254k
    {AliasPatternCond_K_Ignore, 0},
20699
254k
    {AliasPatternCond_K_Imm, 31},
20700
254k
    {AliasPatternCond_K_Imm, 1},
20701
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20702
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20703
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20704
    // (INCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 974
20705
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20706
254k
    {AliasPatternCond_K_Ignore, 0},
20707
254k
    {AliasPatternCond_K_Ignore, 0},
20708
254k
    {AliasPatternCond_K_Imm, 1},
20709
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20710
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20711
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20712
    // (INSERT_MXIPZ_H_B TileVectorOpH8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 981
20713
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
20714
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20715
254k
    {AliasPatternCond_K_Ignore, 0},
20716
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20717
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20718
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20719
    // (INSERT_MXIPZ_H_D TileVectorOpH64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 987
20720
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
20721
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20722
254k
    {AliasPatternCond_K_Ignore, 0},
20723
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20724
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20725
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20726
    // (INSERT_MXIPZ_H_H TileVectorOpH16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 993
20727
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
20728
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20729
254k
    {AliasPatternCond_K_Ignore, 0},
20730
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20731
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20732
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20733
    // (INSERT_MXIPZ_H_Q TileVectorOpH128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 999
20734
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
20735
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20736
254k
    {AliasPatternCond_K_Ignore, 0},
20737
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20738
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20739
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20740
    // (INSERT_MXIPZ_H_S TileVectorOpH32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1005
20741
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
20742
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20743
254k
    {AliasPatternCond_K_Ignore, 0},
20744
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20745
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20746
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20747
    // (INSERT_MXIPZ_V_B TileVectorOpV8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 1011
20748
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
20749
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20750
254k
    {AliasPatternCond_K_Ignore, 0},
20751
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20752
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20753
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20754
    // (INSERT_MXIPZ_V_D TileVectorOpV64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 1017
20755
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
20756
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20757
254k
    {AliasPatternCond_K_Ignore, 0},
20758
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20759
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20760
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20761
    // (INSERT_MXIPZ_V_H TileVectorOpV16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 1023
20762
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
20763
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20764
254k
    {AliasPatternCond_K_Ignore, 0},
20765
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20766
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20767
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20768
    // (INSERT_MXIPZ_V_Q TileVectorOpV128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 1029
20769
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
20770
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20771
254k
    {AliasPatternCond_K_Ignore, 0},
20772
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20773
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20774
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20775
    // (INSERT_MXIPZ_V_S TileVectorOpV32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1035
20776
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
20777
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
20778
254k
    {AliasPatternCond_K_Ignore, 0},
20779
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20780
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20781
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
20782
    // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) - 1041
20783
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20784
254k
    {AliasPatternCond_K_Ignore, 0},
20785
254k
    {AliasPatternCond_K_Ignore, 0},
20786
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20787
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20788
    // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) - 1046
20789
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20790
254k
    {AliasPatternCond_K_Ignore, 0},
20791
254k
    {AliasPatternCond_K_Ignore, 0},
20792
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20793
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20794
    // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) - 1051
20795
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20796
254k
    {AliasPatternCond_K_Ignore, 0},
20797
254k
    {AliasPatternCond_K_Ignore, 0},
20798
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20799
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20800
    // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) - 1056
20801
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20802
254k
    {AliasPatternCond_K_Ignore, 0},
20803
254k
    {AliasPatternCond_K_Ignore, 0},
20804
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20805
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20806
    // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) - 1061
20807
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20808
254k
    {AliasPatternCond_K_Ignore, 0},
20809
254k
    {AliasPatternCond_K_Ignore, 0},
20810
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
20811
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20812
    // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) - 1066
20813
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20814
254k
    {AliasPatternCond_K_Ignore, 0},
20815
254k
    {AliasPatternCond_K_Ignore, 0},
20816
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20817
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20818
    // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) - 1071
20819
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20820
254k
    {AliasPatternCond_K_Ignore, 0},
20821
254k
    {AliasPatternCond_K_Ignore, 0},
20822
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
20823
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20824
    // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) - 1076
20825
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20826
254k
    {AliasPatternCond_K_Ignore, 0},
20827
254k
    {AliasPatternCond_K_Ignore, 0},
20828
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20829
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20830
    // (IRG GPR64sp:$dst, GPR64sp:$src, XZR) - 1081
20831
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20832
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20833
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20834
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
20835
    // (ISB 15) - 1085
20836
254k
    {AliasPatternCond_K_Imm, 15},
20837
    // (LD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1086
20838
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20839
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20840
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20841
254k
    {AliasPatternCond_K_Imm, 0},
20842
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20843
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20844
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20845
    // (LD1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1093
20846
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20847
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20848
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20849
254k
    {AliasPatternCond_K_Imm, 0},
20850
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20851
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20852
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20853
    // (LD1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1100
20854
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20855
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20856
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20857
254k
    {AliasPatternCond_K_Imm, 0},
20858
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20859
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20860
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20861
    // (LD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1107
20862
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20863
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20864
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20865
254k
    {AliasPatternCond_K_Imm, 0},
20866
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20867
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20868
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20869
    // (LD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1114
20870
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20871
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20872
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20873
254k
    {AliasPatternCond_K_Imm, 0},
20874
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20875
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20876
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20877
    // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1121
20878
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20879
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
20880
254k
    {AliasPatternCond_K_Ignore, 0},
20881
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20882
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20883
    // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1126
20884
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20885
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
20886
254k
    {AliasPatternCond_K_Ignore, 0},
20887
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20888
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20889
    // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1131
20890
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20891
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
20892
254k
    {AliasPatternCond_K_Ignore, 0},
20893
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20894
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20895
    // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1136
20896
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20897
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
20898
254k
    {AliasPatternCond_K_Ignore, 0},
20899
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20900
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20901
    // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1141
20902
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20903
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
20904
254k
    {AliasPatternCond_K_Ignore, 0},
20905
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20906
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20907
    // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1146
20908
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20909
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
20910
254k
    {AliasPatternCond_K_Ignore, 0},
20911
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20912
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20913
    // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1151
20914
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20915
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
20916
254k
    {AliasPatternCond_K_Ignore, 0},
20917
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20918
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20919
    // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1156
20920
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20921
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
20922
254k
    {AliasPatternCond_K_Ignore, 0},
20923
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20924
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20925
    // (LD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1161
20926
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20927
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20928
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20929
254k
    {AliasPatternCond_K_Imm, 0},
20930
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20931
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20932
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20933
    // (LD1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1168
20934
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20935
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20936
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20937
254k
    {AliasPatternCond_K_Imm, 0},
20938
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20939
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20940
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20941
    // (LD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1175
20942
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20943
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
20944
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20945
254k
    {AliasPatternCond_K_Imm, 0},
20946
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
20947
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
20948
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
20949
    // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1182
20950
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20951
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20952
254k
    {AliasPatternCond_K_Ignore, 0},
20953
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20954
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20955
    // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1187
20956
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20957
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
20958
254k
    {AliasPatternCond_K_Ignore, 0},
20959
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20960
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20961
    // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1192
20962
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20963
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20964
254k
    {AliasPatternCond_K_Ignore, 0},
20965
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20966
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20967
    // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1197
20968
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20969
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
20970
254k
    {AliasPatternCond_K_Ignore, 0},
20971
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20972
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20973
    // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1202
20974
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20975
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
20976
254k
    {AliasPatternCond_K_Ignore, 0},
20977
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20978
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20979
    // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1207
20980
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20981
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20982
254k
    {AliasPatternCond_K_Ignore, 0},
20983
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20984
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20985
    // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1212
20986
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20987
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
20988
254k
    {AliasPatternCond_K_Ignore, 0},
20989
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20990
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20991
    // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1217
20992
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
20993
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
20994
254k
    {AliasPatternCond_K_Ignore, 0},
20995
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
20996
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
20997
    // (LD1RB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1222
20998
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
20999
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21000
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21001
254k
    {AliasPatternCond_K_Imm, 0},
21002
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21003
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21004
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21005
    // (LD1RB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1229
21006
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21007
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21008
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21009
254k
    {AliasPatternCond_K_Imm, 0},
21010
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21011
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21012
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21013
    // (LD1RB_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1236
21014
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21015
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21016
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21017
254k
    {AliasPatternCond_K_Imm, 0},
21018
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21019
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21020
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21021
    // (LD1RB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1243
21022
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21023
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21024
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21025
254k
    {AliasPatternCond_K_Imm, 0},
21026
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21027
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21028
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21029
    // (LD1RD_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1250
21030
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21031
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21032
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21033
254k
    {AliasPatternCond_K_Imm, 0},
21034
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21035
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21036
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21037
    // (LD1RH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1257
21038
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21039
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21040
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21041
254k
    {AliasPatternCond_K_Imm, 0},
21042
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21043
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21044
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21045
    // (LD1RH_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1264
21046
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21047
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21048
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21049
254k
    {AliasPatternCond_K_Imm, 0},
21050
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21051
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21052
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21053
    // (LD1RH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1271
21054
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21055
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21056
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21057
254k
    {AliasPatternCond_K_Imm, 0},
21058
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21059
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21060
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21061
    // (LD1RO_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1278
21062
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21063
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21064
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21065
254k
    {AliasPatternCond_K_Imm, 0},
21066
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
21067
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64},
21068
    // (LD1RO_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1284
21069
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21070
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21071
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21072
254k
    {AliasPatternCond_K_Imm, 0},
21073
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
21074
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64},
21075
    // (LD1RO_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1290
21076
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21077
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21078
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21079
254k
    {AliasPatternCond_K_Imm, 0},
21080
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
21081
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64},
21082
    // (LD1RO_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1296
21083
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21084
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21085
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21086
254k
    {AliasPatternCond_K_Imm, 0},
21087
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
21088
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMatMulFP64},
21089
    // (LD1RQ_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1302
21090
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21091
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21092
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21093
254k
    {AliasPatternCond_K_Imm, 0},
21094
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21095
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21096
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21097
    // (LD1RQ_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1309
21098
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21099
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21100
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21101
254k
    {AliasPatternCond_K_Imm, 0},
21102
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21103
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21104
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21105
    // (LD1RQ_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1316
21106
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21107
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21108
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21109
254k
    {AliasPatternCond_K_Imm, 0},
21110
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21111
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21112
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21113
    // (LD1RQ_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1323
21114
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21115
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21116
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21117
254k
    {AliasPatternCond_K_Imm, 0},
21118
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21119
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21120
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21121
    // (LD1RSB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1330
21122
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21123
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21124
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21125
254k
    {AliasPatternCond_K_Imm, 0},
21126
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21127
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21128
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21129
    // (LD1RSB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1337
21130
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21131
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21132
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21133
254k
    {AliasPatternCond_K_Imm, 0},
21134
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21135
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21136
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21137
    // (LD1RSB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1344
21138
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21139
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21140
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21141
254k
    {AliasPatternCond_K_Imm, 0},
21142
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21143
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21144
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21145
    // (LD1RSH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1351
21146
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21147
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21148
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21149
254k
    {AliasPatternCond_K_Imm, 0},
21150
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21151
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21152
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21153
    // (LD1RSH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1358
21154
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21155
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21156
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21157
254k
    {AliasPatternCond_K_Imm, 0},
21158
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21159
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21160
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21161
    // (LD1RSW_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1365
21162
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21163
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21164
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21165
254k
    {AliasPatternCond_K_Imm, 0},
21166
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21167
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21168
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21169
    // (LD1RW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1372
21170
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21171
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21172
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21173
254k
    {AliasPatternCond_K_Imm, 0},
21174
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21175
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21176
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21177
    // (LD1RW_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1379
21178
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21179
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21180
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21181
254k
    {AliasPatternCond_K_Imm, 0},
21182
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21183
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21184
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21185
    // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1386
21186
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21187
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21188
254k
    {AliasPatternCond_K_Ignore, 0},
21189
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21190
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21191
    // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1391
21192
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21193
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
21194
254k
    {AliasPatternCond_K_Ignore, 0},
21195
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21196
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21197
    // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1396
21198
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21199
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21200
254k
    {AliasPatternCond_K_Ignore, 0},
21201
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21202
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21203
    // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1401
21204
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21205
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
21206
254k
    {AliasPatternCond_K_Ignore, 0},
21207
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21208
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21209
    // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1406
21210
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21211
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
21212
254k
    {AliasPatternCond_K_Ignore, 0},
21213
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21214
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21215
    // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1411
21216
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21217
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21218
254k
    {AliasPatternCond_K_Ignore, 0},
21219
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21220
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21221
    // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1416
21222
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21223
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
21224
254k
    {AliasPatternCond_K_Ignore, 0},
21225
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21226
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21227
    // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1421
21228
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21229
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21230
254k
    {AliasPatternCond_K_Ignore, 0},
21231
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21232
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21233
    // (LD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1426
21234
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21235
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21236
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21237
254k
    {AliasPatternCond_K_Imm, 0},
21238
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21239
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21240
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21241
    // (LD1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1433
21242
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21243
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21244
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21245
254k
    {AliasPatternCond_K_Imm, 0},
21246
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21247
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21248
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21249
    // (LD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1440
21250
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21251
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21252
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21253
254k
    {AliasPatternCond_K_Imm, 0},
21254
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21255
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21256
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21257
    // (LD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1447
21258
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21259
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21260
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21261
254k
    {AliasPatternCond_K_Imm, 0},
21262
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21263
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21264
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21265
    // (LD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1454
21266
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21267
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21268
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21269
254k
    {AliasPatternCond_K_Imm, 0},
21270
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21271
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21272
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21273
    // (LD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1461
21274
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21275
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21276
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21277
254k
    {AliasPatternCond_K_Imm, 0},
21278
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21279
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21280
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21281
    // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1468
21282
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21283
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21284
254k
    {AliasPatternCond_K_Ignore, 0},
21285
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21286
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21287
    // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1473
21288
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21289
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21290
254k
    {AliasPatternCond_K_Ignore, 0},
21291
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21292
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21293
    // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1478
21294
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21295
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21296
254k
    {AliasPatternCond_K_Ignore, 0},
21297
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21298
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21299
    // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1483
21300
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21301
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21302
254k
    {AliasPatternCond_K_Ignore, 0},
21303
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21304
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21305
    // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1488
21306
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21307
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21308
254k
    {AliasPatternCond_K_Ignore, 0},
21309
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21310
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21311
    // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1493
21312
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21313
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21314
254k
    {AliasPatternCond_K_Ignore, 0},
21315
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21316
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21317
    // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1498
21318
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21319
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21320
254k
    {AliasPatternCond_K_Ignore, 0},
21321
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21322
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21323
    // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1503
21324
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21325
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21326
254k
    {AliasPatternCond_K_Ignore, 0},
21327
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21328
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21329
    // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1508
21330
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21331
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21332
254k
    {AliasPatternCond_K_Ignore, 0},
21333
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21334
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21335
    // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1513
21336
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21337
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21338
254k
    {AliasPatternCond_K_Ignore, 0},
21339
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21340
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21341
    // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1518
21342
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21343
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21344
254k
    {AliasPatternCond_K_Ignore, 0},
21345
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21346
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21347
    // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1523
21348
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21349
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21350
254k
    {AliasPatternCond_K_Ignore, 0},
21351
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21352
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21353
    // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1528
21354
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21355
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21356
254k
    {AliasPatternCond_K_Ignore, 0},
21357
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21358
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21359
    // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1533
21360
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21361
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21362
254k
    {AliasPatternCond_K_Ignore, 0},
21363
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21364
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21365
    // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1538
21366
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21367
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21368
254k
    {AliasPatternCond_K_Ignore, 0},
21369
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21370
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21371
    // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1543
21372
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21373
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21374
254k
    {AliasPatternCond_K_Ignore, 0},
21375
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21376
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21377
    // (LD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1548
21378
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21379
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21380
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21381
254k
    {AliasPatternCond_K_Imm, 0},
21382
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21383
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21384
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21385
    // (LD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1555
21386
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
21387
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21388
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21389
254k
    {AliasPatternCond_K_Imm, 0},
21390
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21391
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21392
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21393
    // (LD1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1562
21394
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
21395
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21396
254k
    {AliasPatternCond_K_Ignore, 0},
21397
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21398
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21399
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21400
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21401
    // (LD1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1569
21402
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
21403
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21404
254k
    {AliasPatternCond_K_Ignore, 0},
21405
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21406
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21407
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21408
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21409
    // (LD1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1576
21410
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
21411
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21412
254k
    {AliasPatternCond_K_Ignore, 0},
21413
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21414
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21415
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21416
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21417
    // (LD1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1583
21418
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
21419
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21420
254k
    {AliasPatternCond_K_Ignore, 0},
21421
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21422
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21423
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21424
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21425
    // (LD1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1590
21426
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
21427
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21428
254k
    {AliasPatternCond_K_Ignore, 0},
21429
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21430
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21431
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21432
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21433
    // (LD1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1597
21434
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
21435
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21436
254k
    {AliasPatternCond_K_Ignore, 0},
21437
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21438
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21439
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21440
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21441
    // (LD1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1604
21442
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
21443
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21444
254k
    {AliasPatternCond_K_Ignore, 0},
21445
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21446
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21447
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21448
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21449
    // (LD1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1611
21450
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
21451
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21452
254k
    {AliasPatternCond_K_Ignore, 0},
21453
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21454
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21455
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21456
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21457
    // (LD1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1618
21458
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
21459
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21460
254k
    {AliasPatternCond_K_Ignore, 0},
21461
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21462
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21463
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21464
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21465
    // (LD1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 1625
21466
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
21467
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
21468
254k
    {AliasPatternCond_K_Ignore, 0},
21469
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21470
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21471
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21472
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
21473
    // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 1632
21474
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21475
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21476
254k
    {AliasPatternCond_K_Ignore, 0},
21477
254k
    {AliasPatternCond_K_Ignore, 0},
21478
254k
    {AliasPatternCond_K_Ignore, 0},
21479
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21480
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21481
    // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 1639
21482
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21483
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21484
254k
    {AliasPatternCond_K_Ignore, 0},
21485
254k
    {AliasPatternCond_K_Ignore, 0},
21486
254k
    {AliasPatternCond_K_Ignore, 0},
21487
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21488
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21489
    // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 1646
21490
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21491
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21492
254k
    {AliasPatternCond_K_Ignore, 0},
21493
254k
    {AliasPatternCond_K_Ignore, 0},
21494
254k
    {AliasPatternCond_K_Ignore, 0},
21495
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21496
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21497
    // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 1653
21498
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21499
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
21500
254k
    {AliasPatternCond_K_Ignore, 0},
21501
254k
    {AliasPatternCond_K_Ignore, 0},
21502
254k
    {AliasPatternCond_K_Ignore, 0},
21503
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21504
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21505
    // (LD2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1660
21506
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
21507
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21508
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21509
254k
    {AliasPatternCond_K_Imm, 0},
21510
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21511
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21512
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21513
    // (LD2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1667
21514
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
21515
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21516
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21517
254k
    {AliasPatternCond_K_Imm, 0},
21518
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21519
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21520
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21521
    // (LD2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1674
21522
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
21523
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21524
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21525
254k
    {AliasPatternCond_K_Imm, 0},
21526
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21527
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21528
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21529
    // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1681
21530
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21531
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21532
254k
    {AliasPatternCond_K_Ignore, 0},
21533
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21534
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21535
    // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1686
21536
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21537
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21538
254k
    {AliasPatternCond_K_Ignore, 0},
21539
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21540
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21541
    // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1691
21542
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21543
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21544
254k
    {AliasPatternCond_K_Ignore, 0},
21545
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21546
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21547
    // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1696
21548
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21549
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21550
254k
    {AliasPatternCond_K_Ignore, 0},
21551
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21552
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21553
    // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1701
21554
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21555
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21556
254k
    {AliasPatternCond_K_Ignore, 0},
21557
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21558
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21559
    // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1706
21560
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21561
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21562
254k
    {AliasPatternCond_K_Ignore, 0},
21563
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21564
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21565
    // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1711
21566
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21567
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21568
254k
    {AliasPatternCond_K_Ignore, 0},
21569
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21570
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21571
    // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1716
21572
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21573
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21574
254k
    {AliasPatternCond_K_Ignore, 0},
21575
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21576
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21577
    // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1721
21578
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21579
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21580
254k
    {AliasPatternCond_K_Ignore, 0},
21581
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21582
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21583
    // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1726
21584
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21585
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21586
254k
    {AliasPatternCond_K_Ignore, 0},
21587
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21588
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21589
    // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1731
21590
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21591
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21592
254k
    {AliasPatternCond_K_Ignore, 0},
21593
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21594
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21595
    // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 1736
21596
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21597
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21598
254k
    {AliasPatternCond_K_Ignore, 0},
21599
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21600
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21601
    // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 1741
21602
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21603
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21604
254k
    {AliasPatternCond_K_Ignore, 0},
21605
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21606
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21607
    // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 1746
21608
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21609
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
21610
254k
    {AliasPatternCond_K_Ignore, 0},
21611
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21612
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21613
    // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 1751
21614
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21615
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21616
254k
    {AliasPatternCond_K_Ignore, 0},
21617
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21618
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21619
    // (LD2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1756
21620
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
21621
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21622
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21623
254k
    {AliasPatternCond_K_Imm, 0},
21624
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21625
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21626
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21627
    // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 1763
21628
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21629
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21630
254k
    {AliasPatternCond_K_Ignore, 0},
21631
254k
    {AliasPatternCond_K_Ignore, 0},
21632
254k
    {AliasPatternCond_K_Ignore, 0},
21633
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21634
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21635
    // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 1770
21636
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21637
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21638
254k
    {AliasPatternCond_K_Ignore, 0},
21639
254k
    {AliasPatternCond_K_Ignore, 0},
21640
254k
    {AliasPatternCond_K_Ignore, 0},
21641
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21642
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21643
    // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 1777
21644
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21645
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21646
254k
    {AliasPatternCond_K_Ignore, 0},
21647
254k
    {AliasPatternCond_K_Ignore, 0},
21648
254k
    {AliasPatternCond_K_Ignore, 0},
21649
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21650
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21651
    // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 1784
21652
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21653
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
21654
254k
    {AliasPatternCond_K_Ignore, 0},
21655
254k
    {AliasPatternCond_K_Ignore, 0},
21656
254k
    {AliasPatternCond_K_Ignore, 0},
21657
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21658
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21659
    // (LD3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1791
21660
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
21661
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21662
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21663
254k
    {AliasPatternCond_K_Imm, 0},
21664
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21665
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21666
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21667
    // (LD3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1798
21668
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
21669
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21670
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21671
254k
    {AliasPatternCond_K_Imm, 0},
21672
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21673
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21674
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21675
    // (LD3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1805
21676
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
21677
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21678
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21679
254k
    {AliasPatternCond_K_Imm, 0},
21680
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21681
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21682
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21683
    // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1812
21684
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21685
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21686
254k
    {AliasPatternCond_K_Ignore, 0},
21687
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21688
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21689
    // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1817
21690
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21691
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21692
254k
    {AliasPatternCond_K_Ignore, 0},
21693
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21694
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21695
    // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1822
21696
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21697
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21698
254k
    {AliasPatternCond_K_Ignore, 0},
21699
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21700
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21701
    // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1827
21702
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21703
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21704
254k
    {AliasPatternCond_K_Ignore, 0},
21705
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21706
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21707
    // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1832
21708
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21709
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21710
254k
    {AliasPatternCond_K_Ignore, 0},
21711
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21712
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21713
    // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1837
21714
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21715
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21716
254k
    {AliasPatternCond_K_Ignore, 0},
21717
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21718
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21719
    // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1842
21720
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21721
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21722
254k
    {AliasPatternCond_K_Ignore, 0},
21723
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21724
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21725
    // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1847
21726
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21727
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21728
254k
    {AliasPatternCond_K_Ignore, 0},
21729
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21730
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21731
    // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1852
21732
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21733
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21734
254k
    {AliasPatternCond_K_Ignore, 0},
21735
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21736
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21737
    // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1857
21738
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21739
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21740
254k
    {AliasPatternCond_K_Ignore, 0},
21741
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21742
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21743
    // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1862
21744
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21745
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21746
254k
    {AliasPatternCond_K_Ignore, 0},
21747
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21748
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21749
    // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1867
21750
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21751
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21752
254k
    {AliasPatternCond_K_Ignore, 0},
21753
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21754
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21755
    // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1872
21756
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21757
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21758
254k
    {AliasPatternCond_K_Ignore, 0},
21759
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21760
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21761
    // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1877
21762
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21763
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
21764
254k
    {AliasPatternCond_K_Ignore, 0},
21765
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21766
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21767
    // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1882
21768
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21769
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21770
254k
    {AliasPatternCond_K_Ignore, 0},
21771
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21772
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21773
    // (LD3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1887
21774
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
21775
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21776
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21777
254k
    {AliasPatternCond_K_Imm, 0},
21778
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21779
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21780
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21781
    // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 1894
21782
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21783
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21784
254k
    {AliasPatternCond_K_Ignore, 0},
21785
254k
    {AliasPatternCond_K_Ignore, 0},
21786
254k
    {AliasPatternCond_K_Ignore, 0},
21787
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21788
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21789
    // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 1901
21790
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21791
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21792
254k
    {AliasPatternCond_K_Ignore, 0},
21793
254k
    {AliasPatternCond_K_Ignore, 0},
21794
254k
    {AliasPatternCond_K_Ignore, 0},
21795
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21796
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21797
    // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 1908
21798
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21799
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21800
254k
    {AliasPatternCond_K_Ignore, 0},
21801
254k
    {AliasPatternCond_K_Ignore, 0},
21802
254k
    {AliasPatternCond_K_Ignore, 0},
21803
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21804
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21805
    // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 1915
21806
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21807
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
21808
254k
    {AliasPatternCond_K_Ignore, 0},
21809
254k
    {AliasPatternCond_K_Ignore, 0},
21810
254k
    {AliasPatternCond_K_Ignore, 0},
21811
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21812
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21813
    // (LD4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1922
21814
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
21815
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21816
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21817
254k
    {AliasPatternCond_K_Imm, 0},
21818
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21819
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21820
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21821
    // (LD4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1929
21822
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
21823
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21824
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21825
254k
    {AliasPatternCond_K_Imm, 0},
21826
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21827
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21828
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21829
    // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1936
21830
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21831
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21832
254k
    {AliasPatternCond_K_Ignore, 0},
21833
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21834
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21835
    // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1941
21836
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21837
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21838
254k
    {AliasPatternCond_K_Ignore, 0},
21839
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21840
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21841
    // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1946
21842
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21843
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21844
254k
    {AliasPatternCond_K_Ignore, 0},
21845
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21846
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21847
    // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1951
21848
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21849
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21850
254k
    {AliasPatternCond_K_Ignore, 0},
21851
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21852
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21853
    // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1956
21854
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21855
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21856
254k
    {AliasPatternCond_K_Ignore, 0},
21857
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21858
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21859
    // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1961
21860
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21861
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21862
254k
    {AliasPatternCond_K_Ignore, 0},
21863
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21864
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21865
    // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1966
21866
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21867
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21868
254k
    {AliasPatternCond_K_Ignore, 0},
21869
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21870
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21871
    // (LD4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1971
21872
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
21873
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21874
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21875
254k
    {AliasPatternCond_K_Imm, 0},
21876
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21877
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21878
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21879
    // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1978
21880
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21881
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21882
254k
    {AliasPatternCond_K_Ignore, 0},
21883
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21884
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21885
    // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1983
21886
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21887
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21888
254k
    {AliasPatternCond_K_Ignore, 0},
21889
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21890
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21891
    // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1988
21892
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21893
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21894
254k
    {AliasPatternCond_K_Ignore, 0},
21895
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21896
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21897
    // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1993
21898
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21899
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21900
254k
    {AliasPatternCond_K_Ignore, 0},
21901
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21902
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21903
    // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1998
21904
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21905
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21906
254k
    {AliasPatternCond_K_Ignore, 0},
21907
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21908
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21909
    // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 2003
21910
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21911
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21912
254k
    {AliasPatternCond_K_Ignore, 0},
21913
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21914
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21915
    // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 2008
21916
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21917
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
21918
254k
    {AliasPatternCond_K_Ignore, 0},
21919
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21920
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21921
    // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 2013
21922
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21923
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21924
254k
    {AliasPatternCond_K_Ignore, 0},
21925
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21926
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21927
    // (LD4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2018
21928
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
21929
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
21930
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21931
254k
    {AliasPatternCond_K_Imm, 0},
21932
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
21933
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
21934
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
21935
    // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 2025
21936
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21937
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21938
254k
    {AliasPatternCond_K_Ignore, 0},
21939
254k
    {AliasPatternCond_K_Ignore, 0},
21940
254k
    {AliasPatternCond_K_Ignore, 0},
21941
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21942
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21943
    // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 2032
21944
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21945
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21946
254k
    {AliasPatternCond_K_Ignore, 0},
21947
254k
    {AliasPatternCond_K_Ignore, 0},
21948
254k
    {AliasPatternCond_K_Ignore, 0},
21949
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21950
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21951
    // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 2039
21952
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21953
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21954
254k
    {AliasPatternCond_K_Ignore, 0},
21955
254k
    {AliasPatternCond_K_Ignore, 0},
21956
254k
    {AliasPatternCond_K_Ignore, 0},
21957
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21958
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21959
    // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 2046
21960
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21961
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
21962
254k
    {AliasPatternCond_K_Ignore, 0},
21963
254k
    {AliasPatternCond_K_Ignore, 0},
21964
254k
    {AliasPatternCond_K_Ignore, 0},
21965
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21966
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
21967
    // (LDADDB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2053
21968
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21969
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
21970
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21971
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21972
    // (LDADDH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2057
21973
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21974
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
21975
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21976
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21977
    // (LDADDLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2061
21978
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21979
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
21980
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21981
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21982
    // (LDADDLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2065
21983
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21984
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
21985
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21986
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21987
    // (LDADDLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2069
21988
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21989
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
21990
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21991
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21992
    // (LDADDLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2073
21993
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
21994
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
21995
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
21996
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
21997
    // (LDADDW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2077
21998
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
21999
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22000
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22001
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22002
    // (LDADDX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2081
22003
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22004
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22005
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22006
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22007
    // (LDAPURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2085
22008
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22009
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22010
254k
    {AliasPatternCond_K_Imm, 0},
22011
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22012
    // (LDAPURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2089
22013
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22014
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22015
254k
    {AliasPatternCond_K_Imm, 0},
22016
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22017
    // (LDAPURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2093
22018
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22019
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22020
254k
    {AliasPatternCond_K_Imm, 0},
22021
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22022
    // (LDAPURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2097
22023
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22024
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22025
254k
    {AliasPatternCond_K_Imm, 0},
22026
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22027
    // (LDAPURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2101
22028
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22029
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22030
254k
    {AliasPatternCond_K_Imm, 0},
22031
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22032
    // (LDAPURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2105
22033
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22034
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22035
254k
    {AliasPatternCond_K_Imm, 0},
22036
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22037
    // (LDAPURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2109
22038
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22039
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22040
254k
    {AliasPatternCond_K_Imm, 0},
22041
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22042
    // (LDAPURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2113
22043
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22044
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22045
254k
    {AliasPatternCond_K_Imm, 0},
22046
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22047
    // (LDAPURi GPR32:$Rt, GPR64sp:$Rn, 0) - 2117
22048
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22049
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22050
254k
    {AliasPatternCond_K_Imm, 0},
22051
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
22052
    // (LDCLRB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2121
22053
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22054
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22055
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22056
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22057
    // (LDCLRH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2125
22058
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22059
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22060
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22061
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22062
    // (LDCLRLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2129
22063
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22064
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22065
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22066
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22067
    // (LDCLRLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2133
22068
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22069
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22070
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22071
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22072
    // (LDCLRLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2137
22073
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22074
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22075
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22076
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22077
    // (LDCLRLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2141
22078
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22079
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22080
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22081
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22082
    // (LDCLRW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2145
22083
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22084
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22085
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22086
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22087
    // (LDCLRX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2149
22088
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22089
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22090
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22091
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22092
    // (LDEORB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2153
22093
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22094
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22095
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22096
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22097
    // (LDEORH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2157
22098
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22099
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22100
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22101
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22102
    // (LDEORLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2161
22103
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22104
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22105
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22106
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22107
    // (LDEORLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2165
22108
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22109
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22110
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22111
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22112
    // (LDEORLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2169
22113
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22114
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22115
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22116
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22117
    // (LDEORLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2173
22118
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22119
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22120
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22121
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22122
    // (LDEORW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2177
22123
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22124
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22125
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22126
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22127
    // (LDEORX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2181
22128
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22129
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22130
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22131
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22132
    // (LDFF1B_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2185
22133
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22134
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22135
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22136
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22137
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22138
    // (LDFF1B_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2190
22139
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22140
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22141
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22142
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22143
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22144
    // (LDFF1B_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2195
22145
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22146
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22147
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22148
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22149
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22150
    // (LDFF1B_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2200
22151
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22152
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22153
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22154
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22155
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22156
    // (LDFF1D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2205
22157
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22158
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22159
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22160
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22161
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22162
    // (LDFF1H_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2210
22163
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22164
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22165
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22166
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22167
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22168
    // (LDFF1H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2215
22169
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22170
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22171
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22172
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22173
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22174
    // (LDFF1H_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2220
22175
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22176
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22177
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22178
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22179
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22180
    // (LDFF1SB_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2225
22181
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22182
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22183
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22184
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22185
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22186
    // (LDFF1SB_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2230
22187
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22188
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22189
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22190
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22191
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22192
    // (LDFF1SB_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2235
22193
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22194
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22195
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22196
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22197
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22198
    // (LDFF1SH_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2240
22199
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22200
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22201
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22202
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22203
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22204
    // (LDFF1SH_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2245
22205
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22206
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22207
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22208
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22209
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22210
    // (LDFF1SW_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2250
22211
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22212
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22213
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22214
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22215
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22216
    // (LDFF1W_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2255
22217
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22218
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22219
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22220
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22221
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22222
    // (LDFF1W_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2260
22223
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22224
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22225
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22226
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22227
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22228
    // (LDG GPR64:$Rt, GPR64sp:$Rn, 0) - 2265
22229
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22230
254k
    {AliasPatternCond_K_Ignore, 0},
22231
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22232
254k
    {AliasPatternCond_K_Imm, 0},
22233
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
22234
    // (LDNF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2270
22235
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22236
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22237
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22238
254k
    {AliasPatternCond_K_Imm, 0},
22239
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22240
    // (LDNF1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2275
22241
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22242
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22243
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22244
254k
    {AliasPatternCond_K_Imm, 0},
22245
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22246
    // (LDNF1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2280
22247
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22248
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22249
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22250
254k
    {AliasPatternCond_K_Imm, 0},
22251
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22252
    // (LDNF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2285
22253
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22254
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22255
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22256
254k
    {AliasPatternCond_K_Imm, 0},
22257
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22258
    // (LDNF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2290
22259
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22260
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22261
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22262
254k
    {AliasPatternCond_K_Imm, 0},
22263
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22264
    // (LDNF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2295
22265
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22266
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22267
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22268
254k
    {AliasPatternCond_K_Imm, 0},
22269
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22270
    // (LDNF1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2300
22271
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22272
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22273
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22274
254k
    {AliasPatternCond_K_Imm, 0},
22275
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22276
    // (LDNF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2305
22277
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22278
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22279
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22280
254k
    {AliasPatternCond_K_Imm, 0},
22281
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22282
    // (LDNF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2310
22283
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22284
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22285
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22286
254k
    {AliasPatternCond_K_Imm, 0},
22287
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22288
    // (LDNF1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2315
22289
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22290
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22291
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22292
254k
    {AliasPatternCond_K_Imm, 0},
22293
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22294
    // (LDNF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2320
22295
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22296
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22297
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22298
254k
    {AliasPatternCond_K_Imm, 0},
22299
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22300
    // (LDNF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2325
22301
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22302
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22303
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22304
254k
    {AliasPatternCond_K_Imm, 0},
22305
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22306
    // (LDNF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2330
22307
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22308
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22309
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22310
254k
    {AliasPatternCond_K_Imm, 0},
22311
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22312
    // (LDNF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2335
22313
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22314
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22315
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22316
254k
    {AliasPatternCond_K_Imm, 0},
22317
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22318
    // (LDNF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2340
22319
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22320
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22321
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22322
254k
    {AliasPatternCond_K_Imm, 0},
22323
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22324
    // (LDNF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2345
22325
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22326
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22327
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22328
254k
    {AliasPatternCond_K_Imm, 0},
22329
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
22330
    // (LDNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 2350
22331
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22332
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22333
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22334
254k
    {AliasPatternCond_K_Imm, 0},
22335
    // (LDNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 2354
22336
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22337
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22338
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22339
254k
    {AliasPatternCond_K_Imm, 0},
22340
    // (LDNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 2358
22341
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22342
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22343
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22344
254k
    {AliasPatternCond_K_Imm, 0},
22345
    // (LDNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 2362
22346
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22347
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22348
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22349
254k
    {AliasPatternCond_K_Imm, 0},
22350
    // (LDNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2366
22351
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22352
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22353
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22354
254k
    {AliasPatternCond_K_Imm, 0},
22355
    // (LDNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2370
22356
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22357
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22358
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22359
254k
    {AliasPatternCond_K_Imm, 0},
22360
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22361
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22362
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22363
    // (LDNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2377
22364
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22365
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22366
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22367
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22368
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22369
    // (LDNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2382
22370
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22371
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22372
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22373
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22374
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22375
    // (LDNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2387
22376
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22377
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22378
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22379
254k
    {AliasPatternCond_K_Imm, 0},
22380
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22381
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22382
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22383
    // (LDNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2394
22384
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22385
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22386
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22387
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22388
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22389
    // (LDNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2399
22390
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22391
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22392
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22393
254k
    {AliasPatternCond_K_Imm, 0},
22394
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22395
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22396
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22397
    // (LDNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2406
22398
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22399
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22400
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22401
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22402
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22403
    // (LDNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2411
22404
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22405
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22406
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22407
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22408
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22409
    // (LDNT1SB_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2416
22410
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22411
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22412
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22413
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22414
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22415
    // (LDNT1SB_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2421
22416
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22417
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22418
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22419
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22420
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22421
    // (LDNT1SH_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2426
22422
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22423
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22424
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22425
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22426
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22427
    // (LDNT1SH_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2431
22428
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22429
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22430
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22431
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22432
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22433
    // (LDNT1SW_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2436
22434
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22435
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22436
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22437
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22438
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22439
    // (LDNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2441
22440
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22441
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22442
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22443
254k
    {AliasPatternCond_K_Imm, 0},
22444
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22445
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22446
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22447
    // (LDNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 2448
22448
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22449
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22450
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22451
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22452
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22453
    // (LDNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 2453
22454
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22455
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
22456
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22457
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22458
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
22459
    // (LDPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 2458
22460
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22461
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22462
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22463
254k
    {AliasPatternCond_K_Imm, 0},
22464
    // (LDPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 2462
22465
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22466
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22467
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22468
254k
    {AliasPatternCond_K_Imm, 0},
22469
    // (LDPSWi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2466
22470
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22471
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22472
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22473
254k
    {AliasPatternCond_K_Imm, 0},
22474
    // (LDPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 2470
22475
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22476
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22477
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22478
254k
    {AliasPatternCond_K_Imm, 0},
22479
    // (LDPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 2474
22480
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22481
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22482
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22483
254k
    {AliasPatternCond_K_Imm, 0},
22484
    // (LDPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 2478
22485
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22486
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22487
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22488
254k
    {AliasPatternCond_K_Imm, 0},
22489
    // (LDRAAindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 2482
22490
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22491
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22492
254k
    {AliasPatternCond_K_Imm, 0},
22493
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
22494
    // (LDRABindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 2486
22495
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22496
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22497
254k
    {AliasPatternCond_K_Imm, 0},
22498
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
22499
    // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2490
22500
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22501
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22502
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22503
254k
    {AliasPatternCond_K_Imm, 0},
22504
254k
    {AliasPatternCond_K_Imm, 0},
22505
    // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) - 2495
22506
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22507
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22508
254k
    {AliasPatternCond_K_Imm, 0},
22509
    // (LDRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2498
22510
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
22511
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22512
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22513
254k
    {AliasPatternCond_K_Imm, 0},
22514
254k
    {AliasPatternCond_K_Imm, 0},
22515
    // (LDRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2503
22516
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
22517
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22518
254k
    {AliasPatternCond_K_Imm, 0},
22519
    // (LDRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2506
22520
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22521
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22522
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22523
254k
    {AliasPatternCond_K_Imm, 0},
22524
254k
    {AliasPatternCond_K_Imm, 0},
22525
    // (LDRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2511
22526
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22527
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22528
254k
    {AliasPatternCond_K_Imm, 0},
22529
    // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2514
22530
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22531
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22532
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22533
254k
    {AliasPatternCond_K_Imm, 0},
22534
254k
    {AliasPatternCond_K_Imm, 0},
22535
    // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) - 2519
22536
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22537
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22538
254k
    {AliasPatternCond_K_Imm, 0},
22539
    // (LDRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2522
22540
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
22541
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22542
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22543
254k
    {AliasPatternCond_K_Imm, 0},
22544
254k
    {AliasPatternCond_K_Imm, 0},
22545
    // (LDRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2527
22546
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
22547
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22548
254k
    {AliasPatternCond_K_Imm, 0},
22549
    // (LDRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2530
22550
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22551
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22552
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22553
254k
    {AliasPatternCond_K_Imm, 0},
22554
254k
    {AliasPatternCond_K_Imm, 0},
22555
    // (LDRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2535
22556
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22557
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22558
254k
    {AliasPatternCond_K_Imm, 0},
22559
    // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2538
22560
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22561
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22562
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22563
254k
    {AliasPatternCond_K_Imm, 0},
22564
254k
    {AliasPatternCond_K_Imm, 0},
22565
    // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2543
22566
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22567
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22568
254k
    {AliasPatternCond_K_Imm, 0},
22569
    // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2546
22570
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22571
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22572
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22573
254k
    {AliasPatternCond_K_Imm, 0},
22574
254k
    {AliasPatternCond_K_Imm, 0},
22575
    // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2551
22576
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22577
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22578
254k
    {AliasPatternCond_K_Imm, 0},
22579
    // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2554
22580
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22581
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22582
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22583
254k
    {AliasPatternCond_K_Imm, 0},
22584
254k
    {AliasPatternCond_K_Imm, 0},
22585
    // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) - 2559
22586
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22587
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22588
254k
    {AliasPatternCond_K_Imm, 0},
22589
    // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2562
22590
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22591
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22592
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22593
254k
    {AliasPatternCond_K_Imm, 0},
22594
254k
    {AliasPatternCond_K_Imm, 0},
22595
    // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) - 2567
22596
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22597
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22598
254k
    {AliasPatternCond_K_Imm, 0},
22599
    // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2570
22600
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22601
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22602
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22603
254k
    {AliasPatternCond_K_Imm, 0},
22604
254k
    {AliasPatternCond_K_Imm, 0},
22605
    // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) - 2575
22606
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22607
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22608
254k
    {AliasPatternCond_K_Imm, 0},
22609
    // (LDRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2578
22610
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22611
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22612
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22613
254k
    {AliasPatternCond_K_Imm, 0},
22614
254k
    {AliasPatternCond_K_Imm, 0},
22615
    // (LDRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2583
22616
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22617
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22618
254k
    {AliasPatternCond_K_Imm, 0},
22619
    // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2586
22620
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22621
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22622
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22623
254k
    {AliasPatternCond_K_Imm, 0},
22624
254k
    {AliasPatternCond_K_Imm, 0},
22625
    // (LDRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 2591
22626
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22627
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22628
254k
    {AliasPatternCond_K_Imm, 0},
22629
    // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2594
22630
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22631
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22632
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22633
254k
    {AliasPatternCond_K_Imm, 0},
22634
254k
    {AliasPatternCond_K_Imm, 0},
22635
    // (LDRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 2599
22636
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22637
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22638
254k
    {AliasPatternCond_K_Imm, 0},
22639
    // (LDR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 2602
22640
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
22641
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22642
254k
    {AliasPatternCond_K_Imm, 0},
22643
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22644
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22645
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22646
    // (LDR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 2608
22647
254k
    {AliasPatternCond_K_RegClass, AArch64_MPRRegClassID},
22648
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
22649
254k
    {AliasPatternCond_K_Ignore, 0},
22650
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22651
254k
    {AliasPatternCond_K_Imm, 0},
22652
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22653
    // (LDR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 2614
22654
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
22655
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22656
254k
    {AliasPatternCond_K_Imm, 0},
22657
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
22658
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
22659
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
22660
    // (LDSETB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2620
22661
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22662
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22663
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22664
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22665
    // (LDSETH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2624
22666
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22667
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22668
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22669
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22670
    // (LDSETLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2628
22671
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22672
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22673
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22674
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22675
    // (LDSETLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2632
22676
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22677
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22678
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22679
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22680
    // (LDSETLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2636
22681
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22682
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22683
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22684
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22685
    // (LDSETLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2640
22686
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22687
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22688
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22689
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22690
    // (LDSETW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2644
22691
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22692
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22693
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22694
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22695
    // (LDSETX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2648
22696
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22697
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22698
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22699
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22700
    // (LDSMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2652
22701
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22702
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22703
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22704
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22705
    // (LDSMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2656
22706
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22707
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22708
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22709
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22710
    // (LDSMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2660
22711
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22712
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22713
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22714
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22715
    // (LDSMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2664
22716
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22717
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22718
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22719
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22720
    // (LDSMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2668
22721
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22722
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22723
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22724
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22725
    // (LDSMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2672
22726
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22727
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22728
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22729
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22730
    // (LDSMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2676
22731
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22732
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22733
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22734
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22735
    // (LDSMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2680
22736
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22737
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22738
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22739
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22740
    // (LDSMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2684
22741
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22742
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22743
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22744
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22745
    // (LDSMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2688
22746
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22747
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22748
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22749
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22750
    // (LDSMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2692
22751
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22752
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22753
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22754
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22755
    // (LDSMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2696
22756
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22757
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22758
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22759
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22760
    // (LDSMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2700
22761
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22762
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22763
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22764
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22765
    // (LDSMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2704
22766
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22767
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22768
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22769
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22770
    // (LDSMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2708
22771
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22772
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22773
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22774
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22775
    // (LDSMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2712
22776
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22777
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22778
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22779
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22780
    // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2716
22781
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22782
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22783
254k
    {AliasPatternCond_K_Imm, 0},
22784
    // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2719
22785
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22786
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22787
254k
    {AliasPatternCond_K_Imm, 0},
22788
    // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2722
22789
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22790
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22791
254k
    {AliasPatternCond_K_Imm, 0},
22792
    // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2725
22793
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22794
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22795
254k
    {AliasPatternCond_K_Imm, 0},
22796
    // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2728
22797
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22798
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22799
254k
    {AliasPatternCond_K_Imm, 0},
22800
    // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2731
22801
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22802
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22803
254k
    {AliasPatternCond_K_Imm, 0},
22804
    // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2734
22805
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22806
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22807
254k
    {AliasPatternCond_K_Imm, 0},
22808
    // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2737
22809
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22810
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22811
254k
    {AliasPatternCond_K_Imm, 0},
22812
    // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2740
22813
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22814
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22815
254k
    {AliasPatternCond_K_Imm, 0},
22816
    // (LDUMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2743
22817
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22818
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22819
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22820
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22821
    // (LDUMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2747
22822
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22823
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22824
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22825
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22826
    // (LDUMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2751
22827
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22828
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22829
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22830
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22831
    // (LDUMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2755
22832
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22833
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22834
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22835
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22836
    // (LDUMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2759
22837
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22838
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22839
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22840
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22841
    // (LDUMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2763
22842
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22843
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22844
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22845
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22846
    // (LDUMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2767
22847
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22848
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22849
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22850
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22851
    // (LDUMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2771
22852
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22853
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22854
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22855
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22856
    // (LDUMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2775
22857
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22858
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22859
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22860
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22861
    // (LDUMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2779
22862
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22863
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22864
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22865
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22866
    // (LDUMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2783
22867
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22868
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22869
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22870
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22871
    // (LDUMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2787
22872
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22873
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22874
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22875
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22876
    // (LDUMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2791
22877
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22878
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22879
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22880
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22881
    // (LDUMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2795
22882
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22883
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22884
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22885
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22886
    // (LDUMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2799
22887
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22888
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22889
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22890
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22891
    // (LDUMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2803
22892
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22893
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22894
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22895
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureLSE},
22896
    // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2807
22897
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22898
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22899
254k
    {AliasPatternCond_K_Imm, 0},
22900
    // (LDURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 2810
22901
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
22902
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22903
254k
    {AliasPatternCond_K_Imm, 0},
22904
    // (LDURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 2813
22905
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
22906
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22907
254k
    {AliasPatternCond_K_Imm, 0},
22908
    // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2816
22909
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22910
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22911
254k
    {AliasPatternCond_K_Imm, 0},
22912
    // (LDURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 2819
22913
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
22914
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22915
254k
    {AliasPatternCond_K_Imm, 0},
22916
    // (LDURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 2822
22917
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22918
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22919
254k
    {AliasPatternCond_K_Imm, 0},
22920
    // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2825
22921
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22922
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22923
254k
    {AliasPatternCond_K_Imm, 0},
22924
    // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2828
22925
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22926
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22927
254k
    {AliasPatternCond_K_Imm, 0},
22928
    // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2831
22929
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22930
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22931
254k
    {AliasPatternCond_K_Imm, 0},
22932
    // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2834
22933
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22934
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22935
254k
    {AliasPatternCond_K_Imm, 0},
22936
    // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2837
22937
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22938
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22939
254k
    {AliasPatternCond_K_Imm, 0},
22940
    // (LDURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 2840
22941
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
22942
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22943
254k
    {AliasPatternCond_K_Imm, 0},
22944
    // (LDURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 2843
22945
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22946
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22947
254k
    {AliasPatternCond_K_Imm, 0},
22948
    // (LDURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 2846
22949
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22950
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
22951
254k
    {AliasPatternCond_K_Imm, 0},
22952
    // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2849
22953
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22954
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22955
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22956
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22957
    // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2853
22958
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22959
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22960
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22961
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22962
    // (MSRpstatesvcrImm1 { 0, 1, 1 }, { 1 }) - 2857
22963
254k
    {AliasPatternCond_K_Imm, 3},
22964
254k
    {AliasPatternCond_K_Imm, 1},
22965
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22966
    // (MSRpstatesvcrImm1 { 0, 0, 1 }, { 1 }) - 2860
22967
254k
    {AliasPatternCond_K_Imm, 1},
22968
254k
    {AliasPatternCond_K_Imm, 1},
22969
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22970
    // (MSRpstatesvcrImm1 { 0, 1, 0 }, { 1 }) - 2863
22971
254k
    {AliasPatternCond_K_Imm, 2},
22972
254k
    {AliasPatternCond_K_Imm, 1},
22973
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22974
    // (MSRpstatesvcrImm1 { 0, 1, 1 }, { 0 }) - 2866
22975
254k
    {AliasPatternCond_K_Imm, 3},
22976
254k
    {AliasPatternCond_K_Imm, 0},
22977
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22978
    // (MSRpstatesvcrImm1 { 0, 0, 1 }, { 0 }) - 2869
22979
254k
    {AliasPatternCond_K_Imm, 1},
22980
254k
    {AliasPatternCond_K_Imm, 0},
22981
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22982
    // (MSRpstatesvcrImm1 { 0, 1, 0 }, { 0 }) - 2872
22983
254k
    {AliasPatternCond_K_Imm, 2},
22984
254k
    {AliasPatternCond_K_Imm, 0},
22985
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
22986
    // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 2875
22987
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22988
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22989
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
22990
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
22991
    // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 2879
22992
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22993
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22994
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
22995
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
22996
    // (NOTv16i8 V128:$Vd, V128:$Vn) - 2883
22997
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22998
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
22999
    // (NOTv8i8 V64:$Vd, V64:$Vn) - 2885
23000
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23001
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23002
    // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) - 2887
23003
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23004
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
23005
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23006
254k
    {AliasPatternCond_K_Imm, 0},
23007
    // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) - 2891
23008
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23009
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
23010
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23011
    // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2894
23012
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23013
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23014
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23015
254k
    {AliasPatternCond_K_Imm, 0},
23016
    // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) - 2898
23017
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23018
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23019
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23020
254k
    {AliasPatternCond_K_Imm, 0},
23021
    // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) - 2902
23022
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23023
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23024
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23025
    // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2905
23026
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23027
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23028
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23029
254k
    {AliasPatternCond_K_Imm, 0},
23030
    // (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2909
23031
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23032
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23033
254k
    {AliasPatternCond_K_TiedReg, 1},
23034
254k
    {AliasPatternCond_K_TiedReg, 1},
23035
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23036
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23037
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23038
    // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) - 2916
23039
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23040
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
23041
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23042
254k
    {AliasPatternCond_K_Imm, 0},
23043
    // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 2920
23044
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23045
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23046
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23047
254k
    {AliasPatternCond_K_Imm, 0},
23048
    // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) - 2924
23049
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23050
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23051
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23052
254k
    {AliasPatternCond_K_Imm, 0},
23053
    // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 2928
23054
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23055
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23056
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23057
254k
    {AliasPatternCond_K_Imm, 0},
23058
    // (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 2932
23059
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23060
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23061
254k
    {AliasPatternCond_K_TiedReg, 1},
23062
254k
    {AliasPatternCond_K_TiedReg, 1},
23063
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23064
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23065
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23066
    // (ORR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 2939
23067
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23068
254k
    {AliasPatternCond_K_Ignore, 0},
23069
254k
    {AliasPatternCond_K_Custom, 1},
23070
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23071
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23072
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23073
    // (ORR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 2945
23074
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23075
254k
    {AliasPatternCond_K_Ignore, 0},
23076
254k
    {AliasPatternCond_K_Custom, 2},
23077
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23078
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23079
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23080
    // (ORR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 2951
23081
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23082
254k
    {AliasPatternCond_K_Ignore, 0},
23083
254k
    {AliasPatternCond_K_Custom, 3},
23084
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23085
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23086
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23087
    // (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn) - 2957
23088
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23089
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23090
254k
    {AliasPatternCond_K_TiedReg, 1},
23091
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23092
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23093
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23094
    // (ORRv16i8 V128:$dst, V128:$src, V128:$src) - 2963
23095
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23096
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23097
254k
    {AliasPatternCond_K_TiedReg, 1},
23098
    // (ORRv8i8 V64:$dst, V64:$src, V64:$src) - 2966
23099
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23100
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23101
254k
    {AliasPatternCond_K_TiedReg, 1},
23102
    // (PACIA1716) - 2969
23103
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23104
    // (PACIASP) - 2970
23105
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23106
    // (PACIAZ) - 2971
23107
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23108
    // (PACIB1716) - 2972
23109
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23110
    // (PACIBSP) - 2973
23111
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23112
    // (PACIBZ) - 2974
23113
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
23114
    // (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2975
23115
254k
    {AliasPatternCond_K_Ignore, 0},
23116
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23117
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23118
254k
    {AliasPatternCond_K_Imm, 0},
23119
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23120
    // (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2980
23121
254k
    {AliasPatternCond_K_Ignore, 0},
23122
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23123
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23124
254k
    {AliasPatternCond_K_Imm, 0},
23125
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23126
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23127
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23128
    // (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2987
23129
254k
    {AliasPatternCond_K_Ignore, 0},
23130
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23131
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23132
254k
    {AliasPatternCond_K_Imm, 0},
23133
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23134
    // (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2992
23135
254k
    {AliasPatternCond_K_Ignore, 0},
23136
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23137
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23138
254k
    {AliasPatternCond_K_Imm, 0},
23139
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23140
    // (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2997
23141
254k
    {AliasPatternCond_K_Ignore, 0},
23142
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23143
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23144
254k
    {AliasPatternCond_K_Imm, 0},
23145
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23146
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23147
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23148
    // (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3004
23149
254k
    {AliasPatternCond_K_Ignore, 0},
23150
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23151
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23152
254k
    {AliasPatternCond_K_Imm, 0},
23153
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23154
    // (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3009
23155
254k
    {AliasPatternCond_K_Ignore, 0},
23156
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23157
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23158
254k
    {AliasPatternCond_K_Imm, 0},
23159
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23160
    // (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3014
23161
254k
    {AliasPatternCond_K_Ignore, 0},
23162
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23163
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23164
254k
    {AliasPatternCond_K_Imm, 0},
23165
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23166
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23167
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23168
    // (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3021
23169
254k
    {AliasPatternCond_K_Ignore, 0},
23170
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23171
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23172
254k
    {AliasPatternCond_K_Imm, 0},
23173
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23174
    // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3026
23175
254k
    {AliasPatternCond_K_Ignore, 0},
23176
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23177
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23178
254k
    {AliasPatternCond_K_Imm, 0},
23179
254k
    {AliasPatternCond_K_Imm, 0},
23180
    // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) - 3031
23181
254k
    {AliasPatternCond_K_Ignore, 0},
23182
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23183
254k
    {AliasPatternCond_K_Imm, 0},
23184
    // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) - 3034
23185
254k
    {AliasPatternCond_K_Ignore, 0},
23186
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23187
254k
    {AliasPatternCond_K_Imm, 0},
23188
    // (PRFW_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3037
23189
254k
    {AliasPatternCond_K_Ignore, 0},
23190
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23191
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23192
254k
    {AliasPatternCond_K_Imm, 0},
23193
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23194
    // (PRFW_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3042
23195
254k
    {AliasPatternCond_K_Ignore, 0},
23196
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23197
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23198
254k
    {AliasPatternCond_K_Imm, 0},
23199
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23200
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23201
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23202
    // (PRFW_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3049
23203
254k
    {AliasPatternCond_K_Ignore, 0},
23204
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23205
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23206
254k
    {AliasPatternCond_K_Imm, 0},
23207
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23208
    // (PTRUES_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 3054
23209
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23210
254k
    {AliasPatternCond_K_Imm, 31},
23211
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23212
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23213
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23214
    // (PTRUES_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 3059
23215
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23216
254k
    {AliasPatternCond_K_Imm, 31},
23217
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23218
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23219
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23220
    // (PTRUES_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 3064
23221
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23222
254k
    {AliasPatternCond_K_Imm, 31},
23223
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23224
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23225
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23226
    // (PTRUES_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 3069
23227
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23228
254k
    {AliasPatternCond_K_Imm, 31},
23229
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23230
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23231
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23232
    // (PTRUE_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 3074
23233
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23234
254k
    {AliasPatternCond_K_Imm, 31},
23235
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23236
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23237
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23238
    // (PTRUE_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 3079
23239
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23240
254k
    {AliasPatternCond_K_Imm, 31},
23241
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23242
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23243
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23244
    // (PTRUE_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 3084
23245
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23246
254k
    {AliasPatternCond_K_Imm, 31},
23247
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23248
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23249
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23250
    // (PTRUE_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 3089
23251
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23252
254k
    {AliasPatternCond_K_Imm, 31},
23253
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23254
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23255
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23256
    // (RET LR) - 3094
23257
254k
    {AliasPatternCond_K_Reg, AArch64_LR},
23258
    // (SBCSWr GPR32:$dst, WZR, GPR32:$src) - 3095
23259
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23260
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
23261
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23262
    // (SBCSXr GPR64:$dst, XZR, GPR64:$src) - 3098
23263
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23264
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23265
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23266
    // (SBCWr GPR32:$dst, WZR, GPR32:$src) - 3101
23267
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23268
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
23269
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23270
    // (SBCXr GPR64:$dst, XZR, GPR64:$src) - 3104
23271
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23272
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23273
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23274
    // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 3107
23275
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23276
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23277
254k
    {AliasPatternCond_K_Ignore, 0},
23278
254k
    {AliasPatternCond_K_Imm, 31},
23279
    // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 3111
23280
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23281
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23282
254k
    {AliasPatternCond_K_Imm, 0},
23283
254k
    {AliasPatternCond_K_Imm, 7},
23284
    // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 3115
23285
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23286
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23287
254k
    {AliasPatternCond_K_Imm, 0},
23288
254k
    {AliasPatternCond_K_Imm, 15},
23289
    // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 3119
23290
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23291
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23292
254k
    {AliasPatternCond_K_Ignore, 0},
23293
254k
    {AliasPatternCond_K_Imm, 63},
23294
    // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 3123
23295
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23296
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23297
254k
    {AliasPatternCond_K_Imm, 0},
23298
254k
    {AliasPatternCond_K_Imm, 7},
23299
    // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 3127
23300
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23301
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23302
254k
    {AliasPatternCond_K_Imm, 0},
23303
254k
    {AliasPatternCond_K_Imm, 15},
23304
    // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 3131
23305
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23306
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23307
254k
    {AliasPatternCond_K_Imm, 0},
23308
254k
    {AliasPatternCond_K_Imm, 31},
23309
    // (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd) - 3135
23310
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23311
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23312
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23313
254k
    {AliasPatternCond_K_TiedReg, 0},
23314
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23315
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23316
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23317
    // (SEL_ZPZZ_B ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd) - 3142
23318
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23319
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23320
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23321
254k
    {AliasPatternCond_K_TiedReg, 0},
23322
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23323
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23324
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23325
    // (SEL_ZPZZ_D ZPR64:$Zd, PPRAny:$Pg, ZPR64:$Zn, ZPR64:$Zd) - 3149
23326
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23327
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23328
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23329
254k
    {AliasPatternCond_K_TiedReg, 0},
23330
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23331
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23332
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23333
    // (SEL_ZPZZ_H ZPR16:$Zd, PPRAny:$Pg, ZPR16:$Zn, ZPR16:$Zd) - 3156
23334
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23335
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23336
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23337
254k
    {AliasPatternCond_K_TiedReg, 0},
23338
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23339
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23340
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23341
    // (SEL_ZPZZ_S ZPR32:$Zd, PPRAny:$Pg, ZPR32:$Zn, ZPR32:$Zd) - 3163
23342
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23343
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
23344
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23345
254k
    {AliasPatternCond_K_TiedReg, 0},
23346
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23347
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23348
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23349
    // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3170
23350
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23351
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23352
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23353
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23354
    // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 3174
23355
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23356
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23357
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
23358
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23359
    // (SQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3178
23360
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23361
254k
    {AliasPatternCond_K_Ignore, 0},
23362
254k
    {AliasPatternCond_K_Imm, 31},
23363
254k
    {AliasPatternCond_K_Imm, 1},
23364
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23365
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23366
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23367
    // (SQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3185
23368
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23369
254k
    {AliasPatternCond_K_Ignore, 0},
23370
254k
    {AliasPatternCond_K_Ignore, 0},
23371
254k
    {AliasPatternCond_K_Imm, 1},
23372
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23373
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23374
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23375
    // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3192
23376
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23377
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23378
254k
    {AliasPatternCond_K_Imm, 31},
23379
254k
    {AliasPatternCond_K_Imm, 1},
23380
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23381
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23382
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23383
    // (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3199
23384
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23385
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23386
254k
    {AliasPatternCond_K_Ignore, 0},
23387
254k
    {AliasPatternCond_K_Imm, 1},
23388
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23389
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23390
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23391
    // (SQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3206
23392
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23393
254k
    {AliasPatternCond_K_Ignore, 0},
23394
254k
    {AliasPatternCond_K_Imm, 31},
23395
254k
    {AliasPatternCond_K_Imm, 1},
23396
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23397
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23398
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23399
    // (SQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3213
23400
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23401
254k
    {AliasPatternCond_K_Ignore, 0},
23402
254k
    {AliasPatternCond_K_Ignore, 0},
23403
254k
    {AliasPatternCond_K_Imm, 1},
23404
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23405
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23406
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23407
    // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3220
23408
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23409
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23410
254k
    {AliasPatternCond_K_Imm, 31},
23411
254k
    {AliasPatternCond_K_Imm, 1},
23412
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23413
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23414
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23415
    // (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3227
23416
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23417
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23418
254k
    {AliasPatternCond_K_Ignore, 0},
23419
254k
    {AliasPatternCond_K_Imm, 1},
23420
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23421
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23422
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23423
    // (SQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3234
23424
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23425
254k
    {AliasPatternCond_K_Ignore, 0},
23426
254k
    {AliasPatternCond_K_Imm, 31},
23427
254k
    {AliasPatternCond_K_Imm, 1},
23428
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23429
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23430
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23431
    // (SQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3241
23432
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23433
254k
    {AliasPatternCond_K_Ignore, 0},
23434
254k
    {AliasPatternCond_K_Ignore, 0},
23435
254k
    {AliasPatternCond_K_Imm, 1},
23436
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23437
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23438
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23439
    // (SQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3248
23440
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23441
254k
    {AliasPatternCond_K_Ignore, 0},
23442
254k
    {AliasPatternCond_K_Imm, 31},
23443
254k
    {AliasPatternCond_K_Imm, 1},
23444
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23445
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23446
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23447
    // (SQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3255
23448
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23449
254k
    {AliasPatternCond_K_Ignore, 0},
23450
254k
    {AliasPatternCond_K_Ignore, 0},
23451
254k
    {AliasPatternCond_K_Imm, 1},
23452
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23453
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23454
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23455
    // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3262
23456
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23457
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23458
254k
    {AliasPatternCond_K_Imm, 31},
23459
254k
    {AliasPatternCond_K_Imm, 1},
23460
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23461
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23462
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23463
    // (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3269
23464
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23465
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23466
254k
    {AliasPatternCond_K_Ignore, 0},
23467
254k
    {AliasPatternCond_K_Imm, 1},
23468
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23469
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23470
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23471
    // (SQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3276
23472
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23473
254k
    {AliasPatternCond_K_Ignore, 0},
23474
254k
    {AliasPatternCond_K_Imm, 31},
23475
254k
    {AliasPatternCond_K_Imm, 1},
23476
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23477
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23478
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23479
    // (SQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3283
23480
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23481
254k
    {AliasPatternCond_K_Ignore, 0},
23482
254k
    {AliasPatternCond_K_Ignore, 0},
23483
254k
    {AliasPatternCond_K_Imm, 1},
23484
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23485
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23486
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23487
    // (SQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3290
23488
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23489
254k
    {AliasPatternCond_K_Ignore, 0},
23490
254k
    {AliasPatternCond_K_Imm, 31},
23491
254k
    {AliasPatternCond_K_Imm, 1},
23492
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23493
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23494
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23495
    // (SQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3297
23496
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23497
254k
    {AliasPatternCond_K_Ignore, 0},
23498
254k
    {AliasPatternCond_K_Ignore, 0},
23499
254k
    {AliasPatternCond_K_Imm, 1},
23500
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23501
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23502
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23503
    // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3304
23504
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23505
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23506
254k
    {AliasPatternCond_K_Imm, 31},
23507
254k
    {AliasPatternCond_K_Imm, 1},
23508
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23509
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23510
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23511
    // (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3311
23512
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23513
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23514
254k
    {AliasPatternCond_K_Ignore, 0},
23515
254k
    {AliasPatternCond_K_Imm, 1},
23516
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23517
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23518
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23519
    // (SQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3318
23520
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23521
254k
    {AliasPatternCond_K_Ignore, 0},
23522
254k
    {AliasPatternCond_K_Imm, 31},
23523
254k
    {AliasPatternCond_K_Imm, 1},
23524
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23525
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23526
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23527
    // (SQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3325
23528
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23529
254k
    {AliasPatternCond_K_Ignore, 0},
23530
254k
    {AliasPatternCond_K_Ignore, 0},
23531
254k
    {AliasPatternCond_K_Imm, 1},
23532
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23533
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23534
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23535
    // (SQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3332
23536
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23537
254k
    {AliasPatternCond_K_Ignore, 0},
23538
254k
    {AliasPatternCond_K_Imm, 31},
23539
254k
    {AliasPatternCond_K_Imm, 1},
23540
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23541
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23542
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23543
    // (SQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3339
23544
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23545
254k
    {AliasPatternCond_K_Ignore, 0},
23546
254k
    {AliasPatternCond_K_Ignore, 0},
23547
254k
    {AliasPatternCond_K_Imm, 1},
23548
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23549
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23550
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23551
    // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3346
23552
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23553
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23554
254k
    {AliasPatternCond_K_Imm, 31},
23555
254k
    {AliasPatternCond_K_Imm, 1},
23556
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23557
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23558
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23559
    // (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3353
23560
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23561
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23562
254k
    {AliasPatternCond_K_Ignore, 0},
23563
254k
    {AliasPatternCond_K_Imm, 1},
23564
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23565
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23566
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23567
    // (SQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3360
23568
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23569
254k
    {AliasPatternCond_K_Ignore, 0},
23570
254k
    {AliasPatternCond_K_Imm, 31},
23571
254k
    {AliasPatternCond_K_Imm, 1},
23572
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23573
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23574
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23575
    // (SQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3367
23576
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23577
254k
    {AliasPatternCond_K_Ignore, 0},
23578
254k
    {AliasPatternCond_K_Ignore, 0},
23579
254k
    {AliasPatternCond_K_Imm, 1},
23580
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23581
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23582
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23583
    // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3374
23584
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23585
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23586
254k
    {AliasPatternCond_K_Imm, 31},
23587
254k
    {AliasPatternCond_K_Imm, 1},
23588
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23589
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23590
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23591
    // (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3381
23592
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23593
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23594
254k
    {AliasPatternCond_K_Ignore, 0},
23595
254k
    {AliasPatternCond_K_Imm, 1},
23596
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23597
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23598
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23599
    // (SQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3388
23600
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23601
254k
    {AliasPatternCond_K_Ignore, 0},
23602
254k
    {AliasPatternCond_K_Imm, 31},
23603
254k
    {AliasPatternCond_K_Imm, 1},
23604
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23605
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23606
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23607
    // (SQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 3395
23608
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23609
254k
    {AliasPatternCond_K_Ignore, 0},
23610
254k
    {AliasPatternCond_K_Ignore, 0},
23611
254k
    {AliasPatternCond_K_Imm, 1},
23612
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23613
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23614
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23615
    // (SQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3402
23616
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23617
254k
    {AliasPatternCond_K_Ignore, 0},
23618
254k
    {AliasPatternCond_K_Imm, 31},
23619
254k
    {AliasPatternCond_K_Imm, 1},
23620
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23621
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23622
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23623
    // (SQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3409
23624
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23625
254k
    {AliasPatternCond_K_Ignore, 0},
23626
254k
    {AliasPatternCond_K_Ignore, 0},
23627
254k
    {AliasPatternCond_K_Imm, 1},
23628
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23629
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23630
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23631
    // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3416
23632
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23633
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23634
254k
    {AliasPatternCond_K_Imm, 31},
23635
254k
    {AliasPatternCond_K_Imm, 1},
23636
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23637
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23638
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23639
    // (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3423
23640
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23641
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23642
254k
    {AliasPatternCond_K_Ignore, 0},
23643
254k
    {AliasPatternCond_K_Imm, 1},
23644
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23645
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23646
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23647
    // (SQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3430
23648
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23649
254k
    {AliasPatternCond_K_Ignore, 0},
23650
254k
    {AliasPatternCond_K_Imm, 31},
23651
254k
    {AliasPatternCond_K_Imm, 1},
23652
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23653
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23654
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23655
    // (SQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 3437
23656
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23657
254k
    {AliasPatternCond_K_Ignore, 0},
23658
254k
    {AliasPatternCond_K_Ignore, 0},
23659
254k
    {AliasPatternCond_K_Imm, 1},
23660
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23661
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23662
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23663
    // (SQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 3444
23664
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23665
254k
    {AliasPatternCond_K_Ignore, 0},
23666
254k
    {AliasPatternCond_K_Imm, 31},
23667
254k
    {AliasPatternCond_K_Imm, 1},
23668
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23669
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23670
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23671
    // (SQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 3451
23672
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23673
254k
    {AliasPatternCond_K_Ignore, 0},
23674
254k
    {AliasPatternCond_K_Ignore, 0},
23675
254k
    {AliasPatternCond_K_Imm, 1},
23676
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23677
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23678
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23679
    // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 3458
23680
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23681
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23682
254k
    {AliasPatternCond_K_Imm, 31},
23683
254k
    {AliasPatternCond_K_Imm, 1},
23684
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23685
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23686
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23687
    // (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 3465
23688
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23689
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
23690
254k
    {AliasPatternCond_K_Ignore, 0},
23691
254k
    {AliasPatternCond_K_Imm, 1},
23692
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23693
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23694
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23695
    // (SQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 3472
23696
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23697
254k
    {AliasPatternCond_K_Ignore, 0},
23698
254k
    {AliasPatternCond_K_Imm, 31},
23699
254k
    {AliasPatternCond_K_Imm, 1},
23700
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23701
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23702
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23703
    // (SQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 3479
23704
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23705
254k
    {AliasPatternCond_K_Ignore, 0},
23706
254k
    {AliasPatternCond_K_Ignore, 0},
23707
254k
    {AliasPatternCond_K_Imm, 1},
23708
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23709
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23710
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23711
    // (SST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3486
23712
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23713
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23714
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23715
254k
    {AliasPatternCond_K_Imm, 0},
23716
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23717
    // (SST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3491
23718
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23719
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23720
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23721
254k
    {AliasPatternCond_K_Imm, 0},
23722
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23723
    // (SST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3496
23724
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23725
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23726
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23727
254k
    {AliasPatternCond_K_Imm, 0},
23728
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23729
    // (SST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3501
23730
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23731
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23732
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23733
254k
    {AliasPatternCond_K_Imm, 0},
23734
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23735
    // (SST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3506
23736
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23737
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23738
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23739
254k
    {AliasPatternCond_K_Imm, 0},
23740
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23741
    // (SST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 3511
23742
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23743
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23744
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23745
254k
    {AliasPatternCond_K_Imm, 0},
23746
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23747
    // (SST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 3516
23748
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23749
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23750
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23751
254k
    {AliasPatternCond_K_Imm, 0},
23752
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE},
23753
    // (ST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3521
23754
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23755
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23756
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23757
254k
    {AliasPatternCond_K_Imm, 0},
23758
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23759
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23760
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23761
    // (ST1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3528
23762
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23763
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23764
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23765
254k
    {AliasPatternCond_K_Imm, 0},
23766
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23767
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23768
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23769
    // (ST1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3535
23770
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23771
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23772
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23773
254k
    {AliasPatternCond_K_Imm, 0},
23774
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23775
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23776
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23777
    // (ST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3542
23778
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23779
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23780
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23781
254k
    {AliasPatternCond_K_Imm, 0},
23782
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23783
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23784
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23785
    // (ST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3549
23786
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23787
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23788
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23789
254k
    {AliasPatternCond_K_Imm, 0},
23790
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23791
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23792
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23793
    // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 3556
23794
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23795
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
23796
254k
    {AliasPatternCond_K_Ignore, 0},
23797
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23798
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23799
    // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 3561
23800
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23801
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
23802
254k
    {AliasPatternCond_K_Ignore, 0},
23803
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23804
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23805
    // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 3566
23806
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23807
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
23808
254k
    {AliasPatternCond_K_Ignore, 0},
23809
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23810
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23811
    // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 3571
23812
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23813
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
23814
254k
    {AliasPatternCond_K_Ignore, 0},
23815
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23816
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23817
    // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 3576
23818
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23819
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
23820
254k
    {AliasPatternCond_K_Ignore, 0},
23821
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23822
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23823
    // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 3581
23824
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23825
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
23826
254k
    {AliasPatternCond_K_Ignore, 0},
23827
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23828
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23829
    // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 3586
23830
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23831
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
23832
254k
    {AliasPatternCond_K_Ignore, 0},
23833
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23834
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23835
    // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 3591
23836
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23837
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
23838
254k
    {AliasPatternCond_K_Ignore, 0},
23839
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23840
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23841
    // (ST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3596
23842
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23843
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23844
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23845
254k
    {AliasPatternCond_K_Imm, 0},
23846
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23847
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23848
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23849
    // (ST1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3603
23850
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23851
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23852
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23853
254k
    {AliasPatternCond_K_Imm, 0},
23854
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23855
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23856
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23857
    // (ST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3610
23858
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
23859
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
23860
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23861
254k
    {AliasPatternCond_K_Imm, 0},
23862
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
23863
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
23864
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
23865
    // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 3617
23866
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23867
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23868
254k
    {AliasPatternCond_K_Ignore, 0},
23869
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23870
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23871
    // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 3622
23872
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23873
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23874
254k
    {AliasPatternCond_K_Ignore, 0},
23875
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23876
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23877
    // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 3627
23878
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23879
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23880
254k
    {AliasPatternCond_K_Ignore, 0},
23881
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23882
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23883
    // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 3632
23884
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23885
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23886
254k
    {AliasPatternCond_K_Ignore, 0},
23887
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23888
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23889
    // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 3637
23890
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23891
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23892
254k
    {AliasPatternCond_K_Ignore, 0},
23893
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23894
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23895
    // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 3642
23896
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23897
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23898
254k
    {AliasPatternCond_K_Ignore, 0},
23899
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23900
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23901
    // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 3647
23902
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23903
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
23904
254k
    {AliasPatternCond_K_Ignore, 0},
23905
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23906
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23907
    // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 3652
23908
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23909
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
23910
254k
    {AliasPatternCond_K_Ignore, 0},
23911
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23912
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23913
    // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 3657
23914
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23915
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
23916
254k
    {AliasPatternCond_K_Ignore, 0},
23917
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23918
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23919
    // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 3662
23920
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23921
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
23922
254k
    {AliasPatternCond_K_Ignore, 0},
23923
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23924
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23925
    // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 3667
23926
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23927
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
23928
254k
    {AliasPatternCond_K_Ignore, 0},
23929
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23930
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23931
    // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 3672
23932
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23933
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
23934
254k
    {AliasPatternCond_K_Ignore, 0},
23935
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23936
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23937
    // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 3677
23938
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23939
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
23940
254k
    {AliasPatternCond_K_Ignore, 0},
23941
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23942
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23943
    // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3682
23944
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23945
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
23946
254k
    {AliasPatternCond_K_Ignore, 0},
23947
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23948
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23949
    // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3687
23950
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23951
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
23952
254k
    {AliasPatternCond_K_Ignore, 0},
23953
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23954
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23955
    // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3692
23956
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23957
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
23958
254k
    {AliasPatternCond_K_Ignore, 0},
23959
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23960
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23961
    // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3697
23962
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23963
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
23964
254k
    {AliasPatternCond_K_Ignore, 0},
23965
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23966
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23967
    // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 3702
23968
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23969
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
23970
254k
    {AliasPatternCond_K_Ignore, 0},
23971
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23972
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23973
    // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3707
23974
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23975
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
23976
254k
    {AliasPatternCond_K_Ignore, 0},
23977
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23978
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23979
    // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3712
23980
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23981
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
23982
254k
    {AliasPatternCond_K_Ignore, 0},
23983
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23984
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23985
    // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3717
23986
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23987
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
23988
254k
    {AliasPatternCond_K_Ignore, 0},
23989
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23990
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23991
    // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3722
23992
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23993
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
23994
254k
    {AliasPatternCond_K_Ignore, 0},
23995
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
23996
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
23997
    // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3727
23998
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
23999
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
24000
254k
    {AliasPatternCond_K_Ignore, 0},
24001
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24002
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24003
    // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3732
24004
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24005
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24006
254k
    {AliasPatternCond_K_Ignore, 0},
24007
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24008
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24009
    // (ST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3737
24010
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24011
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24012
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24013
254k
    {AliasPatternCond_K_Imm, 0},
24014
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24015
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24016
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24017
    // (ST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3744
24018
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24019
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24020
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24021
254k
    {AliasPatternCond_K_Imm, 0},
24022
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24023
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24024
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24025
    // (ST1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3751
24026
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
24027
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24028
254k
    {AliasPatternCond_K_Ignore, 0},
24029
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24030
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24031
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24032
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24033
    // (ST1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3758
24034
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
24035
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24036
254k
    {AliasPatternCond_K_Ignore, 0},
24037
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24038
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24039
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24040
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24041
    // (ST1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3765
24042
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
24043
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24044
254k
    {AliasPatternCond_K_Ignore, 0},
24045
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24046
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24047
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24048
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24049
    // (ST1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3772
24050
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
24051
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24052
254k
    {AliasPatternCond_K_Ignore, 0},
24053
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24054
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24055
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24056
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24057
    // (ST1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3779
24058
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
24059
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24060
254k
    {AliasPatternCond_K_Ignore, 0},
24061
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24062
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24063
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24064
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24065
    // (ST1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3786
24066
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR8RegClassID},
24067
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24068
254k
    {AliasPatternCond_K_Ignore, 0},
24069
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24070
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24071
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24072
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24073
    // (ST1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3793
24074
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR64RegClassID},
24075
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24076
254k
    {AliasPatternCond_K_Ignore, 0},
24077
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24078
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24079
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24080
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24081
    // (ST1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3800
24082
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR16RegClassID},
24083
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24084
254k
    {AliasPatternCond_K_Ignore, 0},
24085
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24086
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24087
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24088
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24089
    // (ST1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3807
24090
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR128RegClassID},
24091
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24092
254k
    {AliasPatternCond_K_Ignore, 0},
24093
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24094
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24095
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24096
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24097
    // (ST1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3814
24098
254k
    {AliasPatternCond_K_RegClass, AArch64_MPR32RegClassID},
24099
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24100
254k
    {AliasPatternCond_K_Ignore, 0},
24101
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24102
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24103
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24104
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24105
    // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 3821
24106
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24107
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24108
254k
    {AliasPatternCond_K_Ignore, 0},
24109
254k
    {AliasPatternCond_K_Ignore, 0},
24110
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24111
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24112
    // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 3827
24113
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24114
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24115
254k
    {AliasPatternCond_K_Ignore, 0},
24116
254k
    {AliasPatternCond_K_Ignore, 0},
24117
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24118
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24119
    // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 3833
24120
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24121
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24122
254k
    {AliasPatternCond_K_Ignore, 0},
24123
254k
    {AliasPatternCond_K_Ignore, 0},
24124
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24125
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24126
    // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 3839
24127
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24128
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24129
254k
    {AliasPatternCond_K_Ignore, 0},
24130
254k
    {AliasPatternCond_K_Ignore, 0},
24131
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24132
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24133
    // (ST2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3845
24134
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
24135
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24136
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24137
254k
    {AliasPatternCond_K_Imm, 0},
24138
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24139
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24140
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24141
    // (ST2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3852
24142
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
24143
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24144
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24145
254k
    {AliasPatternCond_K_Imm, 0},
24146
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24147
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24148
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24149
    // (ST2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 3859
24150
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24151
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24152
254k
    {AliasPatternCond_K_Imm, 0},
24153
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
24154
    // (ST2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3863
24155
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
24156
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24157
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24158
254k
    {AliasPatternCond_K_Imm, 0},
24159
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24160
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24161
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24162
    // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 3870
24163
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24164
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24165
254k
    {AliasPatternCond_K_Ignore, 0},
24166
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24167
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24168
    // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 3875
24169
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24170
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24171
254k
    {AliasPatternCond_K_Ignore, 0},
24172
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24173
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24174
    // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 3880
24175
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24176
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
24177
254k
    {AliasPatternCond_K_Ignore, 0},
24178
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24179
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24180
    // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 3885
24181
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24182
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
24183
254k
    {AliasPatternCond_K_Ignore, 0},
24184
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24185
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24186
    // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 3890
24187
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24188
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24189
254k
    {AliasPatternCond_K_Ignore, 0},
24190
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24191
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24192
    // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 3895
24193
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24194
254k
    {AliasPatternCond_K_RegClass, AArch64_DDRegClassID},
24195
254k
    {AliasPatternCond_K_Ignore, 0},
24196
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24197
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24198
    // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 3900
24199
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24200
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24201
254k
    {AliasPatternCond_K_Ignore, 0},
24202
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24203
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24204
    // (ST2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3905
24205
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR2RegClassID},
24206
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24207
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24208
254k
    {AliasPatternCond_K_Imm, 0},
24209
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24210
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24211
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24212
    // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 3912
24213
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24214
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24215
254k
    {AliasPatternCond_K_Ignore, 0},
24216
254k
    {AliasPatternCond_K_Ignore, 0},
24217
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24218
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24219
    // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 3918
24220
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24221
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24222
254k
    {AliasPatternCond_K_Ignore, 0},
24223
254k
    {AliasPatternCond_K_Ignore, 0},
24224
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24225
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24226
    // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 3924
24227
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24228
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24229
254k
    {AliasPatternCond_K_Ignore, 0},
24230
254k
    {AliasPatternCond_K_Ignore, 0},
24231
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24232
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24233
    // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 3930
24234
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24235
254k
    {AliasPatternCond_K_RegClass, AArch64_QQRegClassID},
24236
254k
    {AliasPatternCond_K_Ignore, 0},
24237
254k
    {AliasPatternCond_K_Ignore, 0},
24238
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24239
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24240
    // (ST3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3936
24241
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
24242
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24243
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24244
254k
    {AliasPatternCond_K_Imm, 0},
24245
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24246
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24247
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24248
    // (ST3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3943
24249
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
24250
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24251
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24252
254k
    {AliasPatternCond_K_Imm, 0},
24253
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24254
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24255
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24256
    // (ST3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3950
24257
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
24258
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24259
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24260
254k
    {AliasPatternCond_K_Imm, 0},
24261
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24262
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24263
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24264
    // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 3957
24265
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24266
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24267
254k
    {AliasPatternCond_K_Ignore, 0},
24268
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24269
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24270
    // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 3962
24271
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24272
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24273
254k
    {AliasPatternCond_K_Ignore, 0},
24274
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24275
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24276
    // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 3967
24277
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24278
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
24279
254k
    {AliasPatternCond_K_Ignore, 0},
24280
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24281
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24282
    // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 3972
24283
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24284
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
24285
254k
    {AliasPatternCond_K_Ignore, 0},
24286
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24287
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24288
    // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 3977
24289
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24290
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24291
254k
    {AliasPatternCond_K_Ignore, 0},
24292
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24293
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24294
    // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 3982
24295
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24296
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDRegClassID},
24297
254k
    {AliasPatternCond_K_Ignore, 0},
24298
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24299
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24300
    // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 3987
24301
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24302
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24303
254k
    {AliasPatternCond_K_Ignore, 0},
24304
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24305
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24306
    // (ST3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3992
24307
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR3RegClassID},
24308
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24309
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24310
254k
    {AliasPatternCond_K_Imm, 0},
24311
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24312
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24313
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24314
    // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 3999
24315
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24316
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24317
254k
    {AliasPatternCond_K_Ignore, 0},
24318
254k
    {AliasPatternCond_K_Ignore, 0},
24319
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24320
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24321
    // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 4005
24322
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24323
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24324
254k
    {AliasPatternCond_K_Ignore, 0},
24325
254k
    {AliasPatternCond_K_Ignore, 0},
24326
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24327
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24328
    // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 4011
24329
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24330
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24331
254k
    {AliasPatternCond_K_Ignore, 0},
24332
254k
    {AliasPatternCond_K_Ignore, 0},
24333
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24334
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24335
    // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 4017
24336
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24337
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQRegClassID},
24338
254k
    {AliasPatternCond_K_Ignore, 0},
24339
254k
    {AliasPatternCond_K_Ignore, 0},
24340
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24341
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24342
    // (ST4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4023
24343
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
24344
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24345
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24346
254k
    {AliasPatternCond_K_Imm, 0},
24347
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24348
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24349
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24350
    // (ST4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4030
24351
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
24352
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24353
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24354
254k
    {AliasPatternCond_K_Imm, 0},
24355
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24356
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24357
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24358
    // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 4037
24359
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24360
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24361
254k
    {AliasPatternCond_K_Ignore, 0},
24362
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24363
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24364
    // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 4042
24365
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24366
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24367
254k
    {AliasPatternCond_K_Ignore, 0},
24368
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24369
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24370
    // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 4047
24371
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24372
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
24373
254k
    {AliasPatternCond_K_Ignore, 0},
24374
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24375
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24376
    // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 4052
24377
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24378
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
24379
254k
    {AliasPatternCond_K_Ignore, 0},
24380
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24381
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24382
    // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 4057
24383
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24384
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24385
254k
    {AliasPatternCond_K_Ignore, 0},
24386
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24387
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24388
    // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 4062
24389
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24390
254k
    {AliasPatternCond_K_RegClass, AArch64_DDDDRegClassID},
24391
254k
    {AliasPatternCond_K_Ignore, 0},
24392
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24393
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24394
    // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 4067
24395
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24396
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24397
254k
    {AliasPatternCond_K_Ignore, 0},
24398
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24399
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24400
    // (ST4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4072
24401
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
24402
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24403
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24404
254k
    {AliasPatternCond_K_Imm, 0},
24405
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24406
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24407
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24408
    // (ST4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4079
24409
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPR4RegClassID},
24410
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24411
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24412
254k
    {AliasPatternCond_K_Imm, 0},
24413
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24414
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24415
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24416
    // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 4086
24417
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24418
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24419
254k
    {AliasPatternCond_K_Ignore, 0},
24420
254k
    {AliasPatternCond_K_Ignore, 0},
24421
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24422
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24423
    // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 4092
24424
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24425
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24426
254k
    {AliasPatternCond_K_Ignore, 0},
24427
254k
    {AliasPatternCond_K_Ignore, 0},
24428
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24429
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24430
    // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 4098
24431
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24432
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24433
254k
    {AliasPatternCond_K_Ignore, 0},
24434
254k
    {AliasPatternCond_K_Ignore, 0},
24435
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24436
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24437
    // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 4104
24438
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24439
254k
    {AliasPatternCond_K_RegClass, AArch64_QQQQRegClassID},
24440
254k
    {AliasPatternCond_K_Ignore, 0},
24441
254k
    {AliasPatternCond_K_Ignore, 0},
24442
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24443
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24444
    // (STGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4110
24445
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24446
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24447
254k
    {AliasPatternCond_K_Imm, 0},
24448
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
24449
    // (STGPi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4114
24450
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24451
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24452
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24453
254k
    {AliasPatternCond_K_Imm, 0},
24454
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
24455
    // (STLURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 4119
24456
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24457
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24458
254k
    {AliasPatternCond_K_Imm, 0},
24459
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
24460
    // (STLURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 4123
24461
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24462
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24463
254k
    {AliasPatternCond_K_Imm, 0},
24464
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
24465
    // (STLURWi GPR32:$Rt, GPR64sp:$Rn, 0) - 4127
24466
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24467
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24468
254k
    {AliasPatternCond_K_Imm, 0},
24469
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
24470
    // (STLURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 4131
24471
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24472
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24473
254k
    {AliasPatternCond_K_Imm, 0},
24474
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureRCPC_IMMO},
24475
    // (STNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 4135
24476
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24477
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24478
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24479
254k
    {AliasPatternCond_K_Imm, 0},
24480
    // (STNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 4139
24481
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24482
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24483
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24484
254k
    {AliasPatternCond_K_Imm, 0},
24485
    // (STNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 4143
24486
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24487
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24488
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24489
254k
    {AliasPatternCond_K_Imm, 0},
24490
    // (STNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 4147
24491
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24492
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24493
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24494
254k
    {AliasPatternCond_K_Imm, 0},
24495
    // (STNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4151
24496
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24497
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24498
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24499
254k
    {AliasPatternCond_K_Imm, 0},
24500
    // (STNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4155
24501
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24502
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24503
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24504
254k
    {AliasPatternCond_K_Imm, 0},
24505
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24506
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24507
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24508
    // (STNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4162
24509
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24510
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24511
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24512
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24513
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24514
    // (STNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4167
24515
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24516
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24517
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24518
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24519
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24520
    // (STNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4172
24521
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24522
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24523
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24524
254k
    {AliasPatternCond_K_Imm, 0},
24525
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24526
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24527
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24528
    // (STNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4179
24529
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24530
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24531
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24532
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24533
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24534
    // (STNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4184
24535
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24536
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24537
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24538
254k
    {AliasPatternCond_K_Imm, 0},
24539
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24540
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24541
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24542
    // (STNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4191
24543
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24544
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24545
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24546
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24547
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24548
    // (STNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4196
24549
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24550
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24551
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24552
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24553
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24554
    // (STNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4201
24555
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24556
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24557
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24558
254k
    {AliasPatternCond_K_Imm, 0},
24559
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24560
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24561
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24562
    // (STNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 4208
24563
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24564
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24565
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24566
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24567
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24568
    // (STNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 4213
24569
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24570
254k
    {AliasPatternCond_K_RegClass, AArch64_PPR_3bRegClassID},
24571
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24572
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24573
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSVE2},
24574
    // (STPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 4218
24575
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24576
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24577
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24578
254k
    {AliasPatternCond_K_Imm, 0},
24579
    // (STPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 4222
24580
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24581
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24582
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24583
254k
    {AliasPatternCond_K_Imm, 0},
24584
    // (STPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 4226
24585
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24586
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24587
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24588
254k
    {AliasPatternCond_K_Imm, 0},
24589
    // (STPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 4230
24590
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24591
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24592
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24593
254k
    {AliasPatternCond_K_Imm, 0},
24594
    // (STPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 4234
24595
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24596
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24597
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24598
254k
    {AliasPatternCond_K_Imm, 0},
24599
    // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4238
24600
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24601
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24602
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24603
254k
    {AliasPatternCond_K_Imm, 0},
24604
254k
    {AliasPatternCond_K_Imm, 0},
24605
    // (STRBBui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4243
24606
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24607
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24608
254k
    {AliasPatternCond_K_Imm, 0},
24609
    // (STRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4246
24610
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
24611
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24612
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24613
254k
    {AliasPatternCond_K_Imm, 0},
24614
254k
    {AliasPatternCond_K_Imm, 0},
24615
    // (STRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 4251
24616
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
24617
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24618
254k
    {AliasPatternCond_K_Imm, 0},
24619
    // (STRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4254
24620
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24621
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24622
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24623
254k
    {AliasPatternCond_K_Imm, 0},
24624
254k
    {AliasPatternCond_K_Imm, 0},
24625
    // (STRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 4259
24626
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24627
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24628
254k
    {AliasPatternCond_K_Imm, 0},
24629
    // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4262
24630
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24631
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24632
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24633
254k
    {AliasPatternCond_K_Imm, 0},
24634
254k
    {AliasPatternCond_K_Imm, 0},
24635
    // (STRHHui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4267
24636
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24637
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24638
254k
    {AliasPatternCond_K_Imm, 0},
24639
    // (STRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4270
24640
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
24641
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24642
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24643
254k
    {AliasPatternCond_K_Imm, 0},
24644
254k
    {AliasPatternCond_K_Imm, 0},
24645
    // (STRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 4275
24646
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
24647
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24648
254k
    {AliasPatternCond_K_Imm, 0},
24649
    // (STRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4278
24650
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24651
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24652
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24653
254k
    {AliasPatternCond_K_Imm, 0},
24654
254k
    {AliasPatternCond_K_Imm, 0},
24655
    // (STRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 4283
24656
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24657
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24658
254k
    {AliasPatternCond_K_Imm, 0},
24659
    // (STRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4286
24660
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24661
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24662
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24663
254k
    {AliasPatternCond_K_Imm, 0},
24664
254k
    {AliasPatternCond_K_Imm, 0},
24665
    // (STRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 4291
24666
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24667
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24668
254k
    {AliasPatternCond_K_Imm, 0},
24669
    // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4294
24670
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24671
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24672
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24673
254k
    {AliasPatternCond_K_Imm, 0},
24674
254k
    {AliasPatternCond_K_Imm, 0},
24675
    // (STRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 4299
24676
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24677
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24678
254k
    {AliasPatternCond_K_Imm, 0},
24679
    // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4302
24680
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24681
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24682
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24683
254k
    {AliasPatternCond_K_Imm, 0},
24684
254k
    {AliasPatternCond_K_Imm, 0},
24685
    // (STRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 4307
24686
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24687
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24688
254k
    {AliasPatternCond_K_Imm, 0},
24689
    // (STR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 4310
24690
254k
    {AliasPatternCond_K_RegClass, AArch64_PPRRegClassID},
24691
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24692
254k
    {AliasPatternCond_K_Imm, 0},
24693
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24694
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24695
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24696
    // (STR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 4316
24697
254k
    {AliasPatternCond_K_RegClass, AArch64_MPRRegClassID},
24698
254k
    {AliasPatternCond_K_RegClass, AArch64_MatrixIndexGPR32_12_15RegClassID},
24699
254k
    {AliasPatternCond_K_Ignore, 0},
24700
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24701
254k
    {AliasPatternCond_K_Imm, 0},
24702
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
24703
    // (STR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 4322
24704
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
24705
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24706
254k
    {AliasPatternCond_K_Imm, 0},
24707
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24708
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24709
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24710
    // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 4328
24711
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24712
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24713
254k
    {AliasPatternCond_K_Imm, 0},
24714
    // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 4331
24715
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24716
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24717
254k
    {AliasPatternCond_K_Imm, 0},
24718
    // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 4334
24719
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24720
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24721
254k
    {AliasPatternCond_K_Imm, 0},
24722
    // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 4337
24723
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24724
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24725
254k
    {AliasPatternCond_K_Imm, 0},
24726
    // (STURBBi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4340
24727
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24728
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24729
254k
    {AliasPatternCond_K_Imm, 0},
24730
    // (STURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 4343
24731
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR8RegClassID},
24732
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24733
254k
    {AliasPatternCond_K_Imm, 0},
24734
    // (STURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 4346
24735
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR64RegClassID},
24736
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24737
254k
    {AliasPatternCond_K_Imm, 0},
24738
    // (STURHHi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4349
24739
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24740
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24741
254k
    {AliasPatternCond_K_Imm, 0},
24742
    // (STURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 4352
24743
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR16RegClassID},
24744
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24745
254k
    {AliasPatternCond_K_Imm, 0},
24746
    // (STURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 4355
24747
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24748
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24749
254k
    {AliasPatternCond_K_Imm, 0},
24750
    // (STURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 4358
24751
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR32RegClassID},
24752
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24753
254k
    {AliasPatternCond_K_Imm, 0},
24754
    // (STURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 4361
24755
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24756
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24757
254k
    {AliasPatternCond_K_Imm, 0},
24758
    // (STURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 4364
24759
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24760
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24761
254k
    {AliasPatternCond_K_Imm, 0},
24762
    // (STZ2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4367
24763
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24764
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24765
254k
    {AliasPatternCond_K_Imm, 0},
24766
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
24767
    // (STZGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 4371
24768
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24769
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24770
254k
    {AliasPatternCond_K_Imm, 0},
24771
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureMTE},
24772
    // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 4375
24773
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24774
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
24775
    // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 4377
24776
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24777
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24778
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24779
254k
    {AliasPatternCond_K_Imm, 0},
24780
    // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 4381
24781
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24782
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24783
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24784
    // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) - 4384
24785
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24786
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24787
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24788
254k
    {AliasPatternCond_K_Imm, 0},
24789
    // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 4388
24790
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24791
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24792
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24793
    // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4391
24794
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24795
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24796
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24797
254k
    {AliasPatternCond_K_Imm, 0},
24798
    // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 4395
24799
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24800
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
24801
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24802
254k
    {AliasPatternCond_K_Imm, 16},
24803
    // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 4399
24804
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24805
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
24806
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24807
    // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 4402
24808
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24809
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
24810
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24811
254k
    {AliasPatternCond_K_Imm, 16},
24812
    // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 4406
24813
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24814
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24815
    // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 4408
24816
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24817
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24818
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24819
254k
    {AliasPatternCond_K_Imm, 0},
24820
    // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 4412
24821
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24822
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24823
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24824
    // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) - 4415
24825
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24826
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24827
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24828
254k
    {AliasPatternCond_K_Imm, 0},
24829
    // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 4419
24830
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24831
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24832
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24833
    // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4422
24834
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24835
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24836
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24837
254k
    {AliasPatternCond_K_Imm, 0},
24838
    // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 4426
24839
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24840
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24841
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24842
    // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 4429
24843
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24844
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
24845
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24846
254k
    {AliasPatternCond_K_Imm, 24},
24847
    // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 4433
24848
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24849
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24850
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24851
    // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 4436
24852
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24853
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
24854
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24855
254k
    {AliasPatternCond_K_Imm, 24},
24856
    // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) - 4440
24857
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24858
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24859
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24860
254k
    {AliasPatternCond_K_Imm, 0},
24861
    // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 4444
24862
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24863
254k
    {AliasPatternCond_K_Reg, AArch64_WZR},
24864
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24865
    // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4447
24866
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24867
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24868
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24869
254k
    {AliasPatternCond_K_Imm, 0},
24870
    // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 4451
24871
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
24872
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
24873
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24874
254k
    {AliasPatternCond_K_Imm, 16},
24875
    // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 4455
24876
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32spRegClassID},
24877
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32sponlyRegClassID},
24878
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24879
254k
    {AliasPatternCond_K_Imm, 16},
24880
    // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) - 4459
24881
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24882
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24883
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24884
254k
    {AliasPatternCond_K_Imm, 0},
24885
    // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 4463
24886
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24887
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24888
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24889
    // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4466
24890
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24891
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24892
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24893
254k
    {AliasPatternCond_K_Imm, 0},
24894
    // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 4470
24895
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
24896
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24897
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24898
254k
    {AliasPatternCond_K_Imm, 24},
24899
    // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 4474
24900
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64spRegClassID},
24901
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64sponlyRegClassID},
24902
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24903
254k
    {AliasPatternCond_K_Imm, 24},
24904
    // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) - 4478
24905
254k
    {AliasPatternCond_K_Ignore, 0},
24906
254k
    {AliasPatternCond_K_Ignore, 0},
24907
254k
    {AliasPatternCond_K_Ignore, 0},
24908
254k
    {AliasPatternCond_K_Ignore, 0},
24909
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24910
    // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 4483
24911
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24912
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24913
254k
    {AliasPatternCond_K_Ignore, 0},
24914
254k
    {AliasPatternCond_K_Imm, 31},
24915
    // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 4487
24916
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24917
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24918
254k
    {AliasPatternCond_K_Imm, 0},
24919
254k
    {AliasPatternCond_K_Imm, 7},
24920
    // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 4491
24921
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24922
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24923
254k
    {AliasPatternCond_K_Imm, 0},
24924
254k
    {AliasPatternCond_K_Imm, 15},
24925
    // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 4495
24926
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24927
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24928
254k
    {AliasPatternCond_K_Ignore, 0},
24929
254k
    {AliasPatternCond_K_Imm, 63},
24930
    // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 4499
24931
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24932
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24933
254k
    {AliasPatternCond_K_Imm, 0},
24934
254k
    {AliasPatternCond_K_Imm, 7},
24935
    // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 4503
24936
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24937
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24938
254k
    {AliasPatternCond_K_Imm, 0},
24939
254k
    {AliasPatternCond_K_Imm, 15},
24940
    // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 4507
24941
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24942
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24943
254k
    {AliasPatternCond_K_Imm, 0},
24944
254k
    {AliasPatternCond_K_Imm, 31},
24945
    // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4511
24946
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24947
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24948
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24949
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24950
    // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) - 4515
24951
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24952
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24953
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24954
    // (UMOVvi32_idx0 GPR32:$dst, V128:$src, VectorIndex0:$idx) - 4518
24955
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24956
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24957
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureNEON},
24958
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24959
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24960
    // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) - 4523
24961
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24962
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24963
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureNEON},
24964
    // (UMOVvi64_idx0 GPR64:$dst, V128:$src, VectorIndex0:$idx) - 4526
24965
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24966
254k
    {AliasPatternCond_K_RegClass, AArch64_FPR128RegClassID},
24967
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureNEON},
24968
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24969
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24970
    // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4531
24971
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24972
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24973
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24974
254k
    {AliasPatternCond_K_Reg, AArch64_XZR},
24975
    // (UQDECB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4535
24976
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24977
254k
    {AliasPatternCond_K_Ignore, 0},
24978
254k
    {AliasPatternCond_K_Imm, 31},
24979
254k
    {AliasPatternCond_K_Imm, 1},
24980
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24981
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24982
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24983
    // (UQDECB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4542
24984
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
24985
254k
    {AliasPatternCond_K_Ignore, 0},
24986
254k
    {AliasPatternCond_K_Ignore, 0},
24987
254k
    {AliasPatternCond_K_Imm, 1},
24988
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24989
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24990
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24991
    // (UQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4549
24992
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
24993
254k
    {AliasPatternCond_K_Ignore, 0},
24994
254k
    {AliasPatternCond_K_Imm, 31},
24995
254k
    {AliasPatternCond_K_Imm, 1},
24996
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
24997
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
24998
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
24999
    // (UQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4556
25000
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25001
254k
    {AliasPatternCond_K_Ignore, 0},
25002
254k
    {AliasPatternCond_K_Ignore, 0},
25003
254k
    {AliasPatternCond_K_Imm, 1},
25004
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25005
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25006
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25007
    // (UQDECD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4563
25008
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25009
254k
    {AliasPatternCond_K_Ignore, 0},
25010
254k
    {AliasPatternCond_K_Imm, 31},
25011
254k
    {AliasPatternCond_K_Imm, 1},
25012
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25013
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25014
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25015
    // (UQDECD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4570
25016
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25017
254k
    {AliasPatternCond_K_Ignore, 0},
25018
254k
    {AliasPatternCond_K_Ignore, 0},
25019
254k
    {AliasPatternCond_K_Imm, 1},
25020
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25021
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25022
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25023
    // (UQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4577
25024
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25025
254k
    {AliasPatternCond_K_Ignore, 0},
25026
254k
    {AliasPatternCond_K_Imm, 31},
25027
254k
    {AliasPatternCond_K_Imm, 1},
25028
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25029
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25030
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25031
    // (UQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4584
25032
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25033
254k
    {AliasPatternCond_K_Ignore, 0},
25034
254k
    {AliasPatternCond_K_Ignore, 0},
25035
254k
    {AliasPatternCond_K_Imm, 1},
25036
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25037
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25038
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25039
    // (UQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4591
25040
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25041
254k
    {AliasPatternCond_K_Ignore, 0},
25042
254k
    {AliasPatternCond_K_Imm, 31},
25043
254k
    {AliasPatternCond_K_Imm, 1},
25044
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25045
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25046
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25047
    // (UQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4598
25048
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25049
254k
    {AliasPatternCond_K_Ignore, 0},
25050
254k
    {AliasPatternCond_K_Ignore, 0},
25051
254k
    {AliasPatternCond_K_Imm, 1},
25052
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25053
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25054
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25055
    // (UQDECH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4605
25056
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25057
254k
    {AliasPatternCond_K_Ignore, 0},
25058
254k
    {AliasPatternCond_K_Imm, 31},
25059
254k
    {AliasPatternCond_K_Imm, 1},
25060
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25061
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25062
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25063
    // (UQDECH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4612
25064
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25065
254k
    {AliasPatternCond_K_Ignore, 0},
25066
254k
    {AliasPatternCond_K_Ignore, 0},
25067
254k
    {AliasPatternCond_K_Imm, 1},
25068
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25069
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25070
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25071
    // (UQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4619
25072
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25073
254k
    {AliasPatternCond_K_Ignore, 0},
25074
254k
    {AliasPatternCond_K_Imm, 31},
25075
254k
    {AliasPatternCond_K_Imm, 1},
25076
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25077
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25078
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25079
    // (UQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4626
25080
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25081
254k
    {AliasPatternCond_K_Ignore, 0},
25082
254k
    {AliasPatternCond_K_Ignore, 0},
25083
254k
    {AliasPatternCond_K_Imm, 1},
25084
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25085
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25086
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25087
    // (UQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4633
25088
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25089
254k
    {AliasPatternCond_K_Ignore, 0},
25090
254k
    {AliasPatternCond_K_Imm, 31},
25091
254k
    {AliasPatternCond_K_Imm, 1},
25092
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25093
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25094
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25095
    // (UQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4640
25096
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25097
254k
    {AliasPatternCond_K_Ignore, 0},
25098
254k
    {AliasPatternCond_K_Ignore, 0},
25099
254k
    {AliasPatternCond_K_Imm, 1},
25100
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25101
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25102
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25103
    // (UQDECW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4647
25104
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25105
254k
    {AliasPatternCond_K_Ignore, 0},
25106
254k
    {AliasPatternCond_K_Imm, 31},
25107
254k
    {AliasPatternCond_K_Imm, 1},
25108
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25109
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25110
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25111
    // (UQDECW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4654
25112
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25113
254k
    {AliasPatternCond_K_Ignore, 0},
25114
254k
    {AliasPatternCond_K_Ignore, 0},
25115
254k
    {AliasPatternCond_K_Imm, 1},
25116
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25117
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25118
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25119
    // (UQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4661
25120
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25121
254k
    {AliasPatternCond_K_Ignore, 0},
25122
254k
    {AliasPatternCond_K_Imm, 31},
25123
254k
    {AliasPatternCond_K_Imm, 1},
25124
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25125
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25126
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25127
    // (UQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4668
25128
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25129
254k
    {AliasPatternCond_K_Ignore, 0},
25130
254k
    {AliasPatternCond_K_Ignore, 0},
25131
254k
    {AliasPatternCond_K_Imm, 1},
25132
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25133
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25134
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25135
    // (UQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4675
25136
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25137
254k
    {AliasPatternCond_K_Ignore, 0},
25138
254k
    {AliasPatternCond_K_Imm, 31},
25139
254k
    {AliasPatternCond_K_Imm, 1},
25140
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25141
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25142
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25143
    // (UQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4682
25144
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25145
254k
    {AliasPatternCond_K_Ignore, 0},
25146
254k
    {AliasPatternCond_K_Ignore, 0},
25147
254k
    {AliasPatternCond_K_Imm, 1},
25148
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25149
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25150
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25151
    // (UQINCB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4689
25152
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25153
254k
    {AliasPatternCond_K_Ignore, 0},
25154
254k
    {AliasPatternCond_K_Imm, 31},
25155
254k
    {AliasPatternCond_K_Imm, 1},
25156
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25157
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25158
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25159
    // (UQINCB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4696
25160
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25161
254k
    {AliasPatternCond_K_Ignore, 0},
25162
254k
    {AliasPatternCond_K_Ignore, 0},
25163
254k
    {AliasPatternCond_K_Imm, 1},
25164
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25165
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25166
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25167
    // (UQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4703
25168
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25169
254k
    {AliasPatternCond_K_Ignore, 0},
25170
254k
    {AliasPatternCond_K_Imm, 31},
25171
254k
    {AliasPatternCond_K_Imm, 1},
25172
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25173
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25174
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25175
    // (UQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4710
25176
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25177
254k
    {AliasPatternCond_K_Ignore, 0},
25178
254k
    {AliasPatternCond_K_Ignore, 0},
25179
254k
    {AliasPatternCond_K_Imm, 1},
25180
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25181
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25182
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25183
    // (UQINCD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4717
25184
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25185
254k
    {AliasPatternCond_K_Ignore, 0},
25186
254k
    {AliasPatternCond_K_Imm, 31},
25187
254k
    {AliasPatternCond_K_Imm, 1},
25188
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25189
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25190
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25191
    // (UQINCD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4724
25192
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25193
254k
    {AliasPatternCond_K_Ignore, 0},
25194
254k
    {AliasPatternCond_K_Ignore, 0},
25195
254k
    {AliasPatternCond_K_Imm, 1},
25196
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25197
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25198
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25199
    // (UQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4731
25200
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25201
254k
    {AliasPatternCond_K_Ignore, 0},
25202
254k
    {AliasPatternCond_K_Imm, 31},
25203
254k
    {AliasPatternCond_K_Imm, 1},
25204
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25205
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25206
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25207
    // (UQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4738
25208
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25209
254k
    {AliasPatternCond_K_Ignore, 0},
25210
254k
    {AliasPatternCond_K_Ignore, 0},
25211
254k
    {AliasPatternCond_K_Imm, 1},
25212
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25213
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25214
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25215
    // (UQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4745
25216
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25217
254k
    {AliasPatternCond_K_Ignore, 0},
25218
254k
    {AliasPatternCond_K_Imm, 31},
25219
254k
    {AliasPatternCond_K_Imm, 1},
25220
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25221
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25222
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25223
    // (UQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4752
25224
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25225
254k
    {AliasPatternCond_K_Ignore, 0},
25226
254k
    {AliasPatternCond_K_Ignore, 0},
25227
254k
    {AliasPatternCond_K_Imm, 1},
25228
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25229
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25230
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25231
    // (UQINCH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4759
25232
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25233
254k
    {AliasPatternCond_K_Ignore, 0},
25234
254k
    {AliasPatternCond_K_Imm, 31},
25235
254k
    {AliasPatternCond_K_Imm, 1},
25236
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25237
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25238
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25239
    // (UQINCH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4766
25240
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25241
254k
    {AliasPatternCond_K_Ignore, 0},
25242
254k
    {AliasPatternCond_K_Ignore, 0},
25243
254k
    {AliasPatternCond_K_Imm, 1},
25244
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25245
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25246
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25247
    // (UQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4773
25248
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25249
254k
    {AliasPatternCond_K_Ignore, 0},
25250
254k
    {AliasPatternCond_K_Imm, 31},
25251
254k
    {AliasPatternCond_K_Imm, 1},
25252
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25253
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25254
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25255
    // (UQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4780
25256
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25257
254k
    {AliasPatternCond_K_Ignore, 0},
25258
254k
    {AliasPatternCond_K_Ignore, 0},
25259
254k
    {AliasPatternCond_K_Imm, 1},
25260
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25261
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25262
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25263
    // (UQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4787
25264
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25265
254k
    {AliasPatternCond_K_Ignore, 0},
25266
254k
    {AliasPatternCond_K_Imm, 31},
25267
254k
    {AliasPatternCond_K_Imm, 1},
25268
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25269
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25270
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25271
    // (UQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4794
25272
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25273
254k
    {AliasPatternCond_K_Ignore, 0},
25274
254k
    {AliasPatternCond_K_Ignore, 0},
25275
254k
    {AliasPatternCond_K_Imm, 1},
25276
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25277
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25278
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25279
    // (UQINCW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4801
25280
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25281
254k
    {AliasPatternCond_K_Ignore, 0},
25282
254k
    {AliasPatternCond_K_Imm, 31},
25283
254k
    {AliasPatternCond_K_Imm, 1},
25284
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25285
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25286
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25287
    // (UQINCW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 4808
25288
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR32RegClassID},
25289
254k
    {AliasPatternCond_K_Ignore, 0},
25290
254k
    {AliasPatternCond_K_Ignore, 0},
25291
254k
    {AliasPatternCond_K_Imm, 1},
25292
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25293
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25294
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25295
    // (UQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4815
25296
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25297
254k
    {AliasPatternCond_K_Ignore, 0},
25298
254k
    {AliasPatternCond_K_Imm, 31},
25299
254k
    {AliasPatternCond_K_Imm, 1},
25300
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25301
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25302
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25303
    // (UQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4822
25304
254k
    {AliasPatternCond_K_RegClass, AArch64_GPR64RegClassID},
25305
254k
    {AliasPatternCond_K_Ignore, 0},
25306
254k
    {AliasPatternCond_K_Ignore, 0},
25307
254k
    {AliasPatternCond_K_Imm, 1},
25308
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25309
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25310
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25311
    // (UQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4829
25312
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25313
254k
    {AliasPatternCond_K_Ignore, 0},
25314
254k
    {AliasPatternCond_K_Imm, 31},
25315
254k
    {AliasPatternCond_K_Imm, 1},
25316
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25317
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25318
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25319
    // (UQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4836
25320
254k
    {AliasPatternCond_K_RegClass, AArch64_ZPRRegClassID},
25321
254k
    {AliasPatternCond_K_Ignore, 0},
25322
254k
    {AliasPatternCond_K_Ignore, 0},
25323
254k
    {AliasPatternCond_K_Imm, 1},
25324
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureSVE},
25325
254k
    {AliasPatternCond_K_OrFeature, AArch64_FeatureStreamingSVE},
25326
254k
    {AliasPatternCond_K_EndOrFeatures, 0},
25327
    // (XPACLRI) - 4843
25328
254k
    {AliasPatternCond_K_Feature, AArch64_FeaturePAuth},
25329
    // (ZERO_M { 1, 1, 1, 1, 1, 1, 1, 1 }) - 4844
25330
254k
    {AliasPatternCond_K_Imm, 255},
25331
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25332
    // (ZERO_M { 0, 1, 0, 1, 0, 1, 0, 1 }) - 4846
25333
254k
    {AliasPatternCond_K_Imm, 85},
25334
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25335
    // (ZERO_M { 1, 0, 1, 0, 1, 0, 1, 0 }) - 4848
25336
254k
    {AliasPatternCond_K_Imm, 170},
25337
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25338
    // (ZERO_M { 0, 0, 0, 1, 0, 0, 0, 1 }) - 4850
25339
254k
    {AliasPatternCond_K_Imm, 17},
25340
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25341
    // (ZERO_M { 0, 0, 1, 0, 0, 0, 1, 0 }) - 4852
25342
254k
    {AliasPatternCond_K_Imm, 34},
25343
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25344
    // (ZERO_M { 0, 1, 0, 0, 0, 1, 0, 0 }) - 4854
25345
254k
    {AliasPatternCond_K_Imm, 68},
25346
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25347
    // (ZERO_M { 1, 0, 0, 0, 1, 0, 0, 0 }) - 4856
25348
254k
    {AliasPatternCond_K_Imm, 136},
25349
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25350
    // (ZERO_M { 0, 0, 1, 1, 0, 0, 1, 1 }) - 4858
25351
254k
    {AliasPatternCond_K_Imm, 51},
25352
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25353
    // (ZERO_M { 1, 0, 0, 1, 1, 0, 0, 1 }) - 4860
25354
254k
    {AliasPatternCond_K_Imm, 153},
25355
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25356
    // (ZERO_M { 0, 1, 1, 0, 0, 1, 1, 0 }) - 4862
25357
254k
    {AliasPatternCond_K_Imm, 102},
25358
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25359
    // (ZERO_M { 1, 1, 0, 0, 1, 1, 0, 0 }) - 4864
25360
254k
    {AliasPatternCond_K_Imm, 204},
25361
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25362
    // (ZERO_M { 0, 1, 1, 1, 0, 1, 1, 1 }) - 4866
25363
254k
    {AliasPatternCond_K_Imm, 119},
25364
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25365
    // (ZERO_M { 1, 0, 1, 1, 1, 0, 1, 1 }) - 4868
25366
254k
    {AliasPatternCond_K_Imm, 187},
25367
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25368
    // (ZERO_M { 1, 1, 0, 1, 1, 1, 0, 1 }) - 4870
25369
254k
    {AliasPatternCond_K_Imm, 221},
25370
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25371
    // (ZERO_M { 1, 1, 1, 0, 1, 1, 1, 0 }) - 4872
25372
254k
    {AliasPatternCond_K_Imm, 238},
25373
254k
    {AliasPatternCond_K_Feature, AArch64_FeatureSME},
25374
254k
  };
25375
25376
254k
  static const char AsmStrings[] =
25377
254k
    /* 0 */ "cmn  $\x02, $\xFF\x03\x01\0"
25378
254k
    /* 13 */ "cmn $\x02, $\x03\0"
25379
254k
    /* 24 */ "cmn $\x02, $\x03$\xFF\x04\x02\0"
25380
254k
    /* 39 */ "adds  $\x01, $\x02, $\x03\0"
25381
254k
    /* 55 */ "cmn $\x02, $\x03$\xFF\x04\x03\0"
25382
254k
    /* 70 */ "mov $\x01, $\x02\0"
25383
254k
    /* 81 */ "add $\x01, $\x02, $\x03\0"
25384
254k
    /* 96 */ "tst $\x02, $\xFF\x03\x04\0"
25385
254k
    /* 109 */ "tst $\x02, $\x03\0"
25386
254k
    /* 120 */ "tst $\x02, $\x03$\xFF\x04\x02\0"
25387
254k
    /* 135 */ "ands $\x01, $\x02, $\x03\0"
25388
254k
    /* 151 */ "tst $\x02, $\xFF\x03\x05\0"
25389
254k
    /* 164 */ "movs $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
25390
254k
    /* 188 */ "and  $\x01, $\x02, $\x03\0"
25391
254k
    /* 203 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
25392
254k
    /* 226 */ "and  $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
25393
254k
    /* 247 */ "and  $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
25394
254k
    /* 268 */ "and  $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
25395
254k
    /* 289 */ "autia1716\0"
25396
254k
    /* 299 */ "autiasp\0"
25397
254k
    /* 307 */ "autiaz\0"
25398
254k
    /* 314 */ "autib1716\0"
25399
254k
    /* 324 */ "autibsp\0"
25400
254k
    /* 332 */ "autibz\0"
25401
254k
    /* 339 */ "bics $\x01, $\x02, $\x03\0"
25402
254k
    /* 355 */ "bic  $\x01, $\x02, $\x03\0"
25403
254k
    /* 370 */ "clrex\0"
25404
254k
    /* 376 */ "cntb $\x01\0"
25405
254k
    /* 384 */ "cntb $\x01, $\xFF\x02\x0E\0"
25406
254k
    /* 398 */ "cntd $\x01\0"
25407
254k
    /* 406 */ "cntd $\x01, $\xFF\x02\x0E\0"
25408
254k
    /* 420 */ "cnth $\x01\0"
25409
254k
    /* 428 */ "cnth $\x01, $\xFF\x02\x0E\0"
25410
254k
    /* 442 */ "cntw $\x01\0"
25411
254k
    /* 450 */ "cntw $\x01, $\xFF\x02\x0E\0"
25412
254k
    /* 464 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x0F\0"
25413
254k
    /* 487 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x11\0"
25414
254k
    /* 510 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x12\0"
25415
254k
    /* 533 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x13\0"
25416
254k
    /* 556 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\x04\0"
25417
254k
    /* 577 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\x04\0"
25418
254k
    /* 598 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\x04\0"
25419
254k
    /* 619 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\x04\0"
25420
254k
    /* 640 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x0F\0"
25421
254k
    /* 663 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/z, $\xFF\x03\x11\0"
25422
254k
    /* 686 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/z, $\xFF\x03\x12\0"
25423
254k
    /* 709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/z, $\xFF\x03\x13\0"
25424
254k
    /* 732 */ "cset $\x01, $\xFF\x04\x14\0"
25425
254k
    /* 746 */ "cinc $\x01, $\x02, $\xFF\x04\x14\0"
25426
254k
    /* 764 */ "csetm $\x01, $\xFF\x04\x14\0"
25427
254k
    /* 779 */ "cinv $\x01, $\x02, $\xFF\x04\x14\0"
25428
254k
    /* 797 */ "cneg $\x01, $\x02, $\xFF\x04\x14\0"
25429
254k
    /* 815 */ "dcps1\0"
25430
254k
    /* 821 */ "dcps2\0"
25431
254k
    /* 827 */ "dcps3\0"
25432
254k
    /* 833 */ "decb $\x01\0"
25433
254k
    /* 841 */ "decb $\x01, $\xFF\x03\x0E\0"
25434
254k
    /* 855 */ "decd $\x01\0"
25435
254k
    /* 863 */ "decd $\x01, $\xFF\x03\x0E\0"
25436
254k
    /* 877 */ "decd $\xFF\x01\x10\0"
25437
254k
    /* 887 */ "decd $\xFF\x01\x10, $\xFF\x03\x0E\0"
25438
254k
    /* 903 */ "dech $\x01\0"
25439
254k
    /* 911 */ "dech $\x01, $\xFF\x03\x0E\0"
25440
254k
    /* 925 */ "dech $\xFF\x01\x09\0"
25441
254k
    /* 935 */ "dech $\xFF\x01\x09, $\xFF\x03\x0E\0"
25442
254k
    /* 951 */ "decw $\x01\0"
25443
254k
    /* 959 */ "decw $\x01, $\xFF\x03\x0E\0"
25444
254k
    /* 973 */ "decw $\xFF\x01\x0B\0"
25445
254k
    /* 983 */ "decw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
25446
254k
    /* 999 */ "ssbb\0"
25447
254k
    /* 1004 */ "pssbb\0"
25448
254k
    /* 1010 */ "dfb\0"
25449
254k
    /* 1014 */ "mov $\xFF\x01\x09, $\xFF\x02\x15\0"
25450
254k
    /* 1029 */ "mov $\xFF\x01\x0B, $\xFF\x02\x16\0"
25451
254k
    /* 1044 */ "mov $\xFF\x01\x10, $\xFF\x02\x17\0"
25452
254k
    /* 1059 */ "dupm $\xFF\x01\x06, $\xFF\x02\x08\0"
25453
254k
    /* 1075 */ "dupm $\xFF\x01\x09, $\xFF\x02\x0A\0"
25454
254k
    /* 1091 */ "dupm $\xFF\x01\x0B, $\xFF\x02\x04\0"
25455
254k
    /* 1107 */ "mov $\xFF\x01\x06, $\xFF\x02\x0F\0"
25456
254k
    /* 1122 */ "mov $\xFF\x01\x10, $\xFF\x02\x11\0"
25457
254k
    /* 1137 */ "fmov $\xFF\x01\x10, #0.0\0"
25458
254k
    /* 1153 */ "mov $\xFF\x01\x09, $\xFF\x02\x12\0"
25459
254k
    /* 1168 */ "fmov $\xFF\x01\x09, #0.0\0"
25460
254k
    /* 1184 */ "mov $\xFF\x01\x0B, $\xFF\x02\x13\0"
25461
254k
    /* 1199 */ "fmov $\xFF\x01\x0B, #0.0\0"
25462
254k
    /* 1215 */ "mov $\xFF\x01\x06, $\x02\0"
25463
254k
    /* 1228 */ "mov $\xFF\x01\x10, $\x02\0"
25464
254k
    /* 1241 */ "mov $\xFF\x01\x09, $\x02\0"
25465
254k
    /* 1254 */ "mov $\xFF\x01\x0B, $\x02\0"
25466
254k
    /* 1267 */ "mov $\xFF\x01\x06, $\xFF\x02\x18\0"
25467
254k
    /* 1282 */ "mov $\xFF\x01\x06, $\xFF\x02\x06$\xFF\x03\x19\0"
25468
254k
    /* 1301 */ "mov $\xFF\x01\x10, $\xFF\x02\x1A\0"
25469
254k
    /* 1316 */ "mov $\xFF\x01\x10, $\xFF\x02\x10$\xFF\x03\x19\0"
25470
254k
    /* 1335 */ "mov $\xFF\x01\x09, $\xFF\x02\x1B\0"
25471
254k
    /* 1350 */ "mov $\xFF\x01\x09, $\xFF\x02\x09$\xFF\x03\x19\0"
25472
254k
    /* 1369 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1D\0"
25473
254k
    /* 1384 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1C$\xFF\x03\x19\0"
25474
254k
    /* 1403 */ "mov $\xFF\x01\x0B, $\xFF\x02\x1E\0"
25475
254k
    /* 1418 */ "mov $\xFF\x01\x0B, $\xFF\x02\x0B$\xFF\x03\x19\0"
25476
254k
    /* 1437 */ "eon $\x01, $\x02, $\x03\0"
25477
254k
    /* 1452 */ "nots $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
25478
254k
    /* 1476 */ "eor $\x01, $\x02, $\x03\0"
25479
254k
    /* 1491 */ "not $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
25480
254k
    /* 1514 */ "eor $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
25481
254k
    /* 1535 */ "eor $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
25482
254k
    /* 1556 */ "eor $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
25483
254k
    /* 1577 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0"
25484
254k
    /* 1610 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0"
25485
254k
    /* 1643 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0"
25486
254k
    /* 1676 */ "mov $\xFF\x01\x1C, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0"
25487
254k
    /* 1709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x1F[$\x04, $\xFF\x05\x20]\0"
25488
254k
    /* 1742 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0"
25489
254k
    /* 1775 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0"
25490
254k
    /* 1808 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0"
25491
254k
    /* 1841 */ "mov $\xFF\x01\x1C, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0"
25492
254k
    /* 1874 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x21[$\x04, $\xFF\x05\x20]\0"
25493
254k
    /* 1907 */ "ror $\x01, $\x02, $\x04\0"
25494
254k
    /* 1922 */ "fmov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
25495
254k
    /* 1946 */ "fmov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
25496
254k
    /* 1970 */ "fmov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
25497
254k
    /* 1994 */ "fmov $\xFF\x01\x10, $\xFF\x02\x22\0"
25498
254k
    /* 2010 */ "fmov $\xFF\x01\x09, $\xFF\x02\x22\0"
25499
254k
    /* 2026 */ "fmov $\xFF\x01\x0B, $\xFF\x02\x22\0"
25500
254k
    /* 2042 */ "ld1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25501
254k
    /* 2068 */ "ld1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25502
254k
    /* 2094 */ "ld1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25503
254k
    /* 2120 */ "ld1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25504
254k
    /* 2146 */ "ld1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25505
254k
    /* 2172 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25506
254k
    /* 2199 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25507
254k
    /* 2226 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25508
254k
    /* 2253 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25509
254k
    /* 2280 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25510
254k
    /* 2307 */ "ld1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25511
254k
    /* 2333 */ "ld1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25512
254k
    /* 2359 */ "ldff1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25513
254k
    /* 2387 */ "ldff1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25514
254k
    /* 2415 */ "ldff1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25515
254k
    /* 2443 */ "ldff1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25516
254k
    /* 2471 */ "ldff1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25517
254k
    /* 2499 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25518
254k
    /* 2528 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25519
254k
    /* 2557 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25520
254k
    /* 2586 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25521
254k
    /* 2615 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25522
254k
    /* 2644 */ "ldff1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25523
254k
    /* 2672 */ "ldff1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25524
254k
    /* 2700 */ "nop\0"
25525
254k
    /* 2704 */ "yield\0"
25526
254k
    /* 2710 */ "wfe\0"
25527
254k
    /* 2714 */ "wfi\0"
25528
254k
    /* 2718 */ "sev\0"
25529
254k
    /* 2722 */ "sevl\0"
25530
254k
    /* 2727 */ "dgh\0"
25531
254k
    /* 2731 */ "esb\0"
25532
254k
    /* 2735 */ "csdb\0"
25533
254k
    /* 2740 */ "bti\0"
25534
254k
    /* 2744 */ "bti $\xFF\x01\x25\0"
25535
254k
    /* 2753 */ "psb $\xFF\x01\x26\0"
25536
254k
    /* 2762 */ "incb  $\x01\0"
25537
254k
    /* 2770 */ "incb  $\x01, $\xFF\x03\x0E\0"
25538
254k
    /* 2784 */ "incd  $\x01\0"
25539
254k
    /* 2792 */ "incd  $\x01, $\xFF\x03\x0E\0"
25540
254k
    /* 2806 */ "incd  $\xFF\x01\x10\0"
25541
254k
    /* 2816 */ "incd  $\xFF\x01\x10, $\xFF\x03\x0E\0"
25542
254k
    /* 2832 */ "inch  $\x01\0"
25543
254k
    /* 2840 */ "inch  $\x01, $\xFF\x03\x0E\0"
25544
254k
    /* 2854 */ "inch  $\xFF\x01\x09\0"
25545
254k
    /* 2864 */ "inch  $\xFF\x01\x09, $\xFF\x03\x0E\0"
25546
254k
    /* 2880 */ "incw  $\x01\0"
25547
254k
    /* 2888 */ "incw  $\x01, $\xFF\x03\x0E\0"
25548
254k
    /* 2902 */ "incw  $\xFF\x01\x0B\0"
25549
254k
    /* 2912 */ "incw  $\xFF\x01\x0B, $\xFF\x03\x0E\0"
25550
254k
    /* 2928 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x06\0"
25551
254k
    /* 2961 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x10\0"
25552
254k
    /* 2994 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x09\0"
25553
254k
    /* 3027 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x1C\0"
25554
254k
    /* 3060 */ "mov $\xFF\x01\x1F[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x0B\0"
25555
254k
    /* 3093 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x06\0"
25556
254k
    /* 3126 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x10\0"
25557
254k
    /* 3159 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x09\0"
25558
254k
    /* 3192 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x1C\0"
25559
254k
    /* 3225 */ "mov $\xFF\x01\x21[$\x02, $\xFF\x03\x20], $\xFF\x04\x07/m, $\xFF\x05\x0B\0"
25560
254k
    /* 3258 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\x04\0"
25561
254k
    /* 3277 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\xFF\x04\x0C.h$\xFF\x05\x19\0"
25562
254k
    /* 3304 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\x04\0"
25563
254k
    /* 3323 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\xFF\x04\x0C.s$\xFF\x05\x19\0"
25564
254k
    /* 3350 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\x04\0"
25565
254k
    /* 3369 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\xFF\x04\x0C.d$\xFF\x05\x19\0"
25566
254k
    /* 3396 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\x04\0"
25567
254k
    /* 3415 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\xFF\x04\x0C.b$\xFF\x05\x19\0"
25568
254k
    /* 3442 */ "irg $\x01, $\x02\0"
25569
254k
    /* 3453 */ "isb\0"
25570
254k
    /* 3457 */ "ld1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25571
254k
    /* 3481 */ "ld1b  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25572
254k
    /* 3505 */ "ld1b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25573
254k
    /* 3529 */ "ld1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25574
254k
    /* 3553 */ "ld1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25575
254k
    /* 3577 */ "ld1 $\xFF\x02\x29, [$\x01], #64\0"
25576
254k
    /* 3597 */ "ld1 $\xFF\x02\x2A, [$\x01], #32\0"
25577
254k
    /* 3617 */ "ld1 $\xFF\x02\x2B, [$\x01], #64\0"
25578
254k
    /* 3637 */ "ld1 $\xFF\x02\x2C, [$\x01], #32\0"
25579
254k
    /* 3657 */ "ld1 $\xFF\x02\x2D, [$\x01], #32\0"
25580
254k
    /* 3677 */ "ld1 $\xFF\x02\x2E, [$\x01], #64\0"
25581
254k
    /* 3697 */ "ld1 $\xFF\x02\x2F, [$\x01], #32\0"
25582
254k
    /* 3717 */ "ld1 $\xFF\x02\x30, [$\x01], #64\0"
25583
254k
    /* 3737 */ "ld1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25584
254k
    /* 3761 */ "ld1h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25585
254k
    /* 3785 */ "ld1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25586
254k
    /* 3809 */ "ld1 $\xFF\x02\x29, [$\x01], #16\0"
25587
254k
    /* 3829 */ "ld1 $\xFF\x02\x2A, [$\x01], #8\0"
25588
254k
    /* 3848 */ "ld1 $\xFF\x02\x2B, [$\x01], #16\0"
25589
254k
    /* 3868 */ "ld1 $\xFF\x02\x2C, [$\x01], #8\0"
25590
254k
    /* 3887 */ "ld1 $\xFF\x02\x2D, [$\x01], #8\0"
25591
254k
    /* 3906 */ "ld1 $\xFF\x02\x2E, [$\x01], #16\0"
25592
254k
    /* 3926 */ "ld1 $\xFF\x02\x2F, [$\x01], #8\0"
25593
254k
    /* 3945 */ "ld1 $\xFF\x02\x30, [$\x01], #16\0"
25594
254k
    /* 3965 */ "ld1rb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25595
254k
    /* 3990 */ "ld1rb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25596
254k
    /* 4015 */ "ld1rb $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25597
254k
    /* 4040 */ "ld1rb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25598
254k
    /* 4065 */ "ld1rd $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25599
254k
    /* 4090 */ "ld1rh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25600
254k
    /* 4115 */ "ld1rh $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25601
254k
    /* 4140 */ "ld1rh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25602
254k
    /* 4165 */ "ld1rob  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25603
254k
    /* 4191 */ "ld1rod  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25604
254k
    /* 4217 */ "ld1roh  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25605
254k
    /* 4243 */ "ld1row  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25606
254k
    /* 4269 */ "ld1rqb  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25607
254k
    /* 4295 */ "ld1rqd  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25608
254k
    /* 4321 */ "ld1rqh  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25609
254k
    /* 4347 */ "ld1rqw  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25610
254k
    /* 4373 */ "ld1rsb  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25611
254k
    /* 4399 */ "ld1rsb  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25612
254k
    /* 4425 */ "ld1rsb  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25613
254k
    /* 4451 */ "ld1rsh  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25614
254k
    /* 4477 */ "ld1rsh  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25615
254k
    /* 4503 */ "ld1rsw  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25616
254k
    /* 4529 */ "ld1rw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25617
254k
    /* 4554 */ "ld1rw $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25618
254k
    /* 4579 */ "ld1r  $\xFF\x02\x29, [$\x01], #1\0"
25619
254k
    /* 4599 */ "ld1r  $\xFF\x02\x2A, [$\x01], #8\0"
25620
254k
    /* 4619 */ "ld1r  $\xFF\x02\x2B, [$\x01], #8\0"
25621
254k
    /* 4639 */ "ld1r  $\xFF\x02\x2C, [$\x01], #4\0"
25622
254k
    /* 4659 */ "ld1r  $\xFF\x02\x2D, [$\x01], #2\0"
25623
254k
    /* 4679 */ "ld1r  $\xFF\x02\x2E, [$\x01], #4\0"
25624
254k
    /* 4699 */ "ld1r  $\xFF\x02\x2F, [$\x01], #1\0"
25625
254k
    /* 4719 */ "ld1r  $\xFF\x02\x30, [$\x01], #2\0"
25626
254k
    /* 4739 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25627
254k
    /* 4764 */ "ld1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25628
254k
    /* 4789 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25629
254k
    /* 4814 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25630
254k
    /* 4839 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25631
254k
    /* 4864 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25632
254k
    /* 4889 */ "ld1 $\xFF\x02\x29, [$\x01], #48\0"
25633
254k
    /* 4909 */ "ld1 $\xFF\x02\x2A, [$\x01], #24\0"
25634
254k
    /* 4929 */ "ld1 $\xFF\x02\x2B, [$\x01], #48\0"
25635
254k
    /* 4949 */ "ld1 $\xFF\x02\x2C, [$\x01], #24\0"
25636
254k
    /* 4969 */ "ld1 $\xFF\x02\x2D, [$\x01], #24\0"
25637
254k
    /* 4989 */ "ld1 $\xFF\x02\x2E, [$\x01], #48\0"
25638
254k
    /* 5009 */ "ld1 $\xFF\x02\x2F, [$\x01], #24\0"
25639
254k
    /* 5029 */ "ld1 $\xFF\x02\x30, [$\x01], #48\0"
25640
254k
    /* 5049 */ "ld1 $\xFF\x02\x29, [$\x01], #32\0"
25641
254k
    /* 5069 */ "ld1 $\xFF\x02\x2A, [$\x01], #16\0"
25642
254k
    /* 5089 */ "ld1 $\xFF\x02\x2B, [$\x01], #32\0"
25643
254k
    /* 5109 */ "ld1 $\xFF\x02\x2C, [$\x01], #16\0"
25644
254k
    /* 5129 */ "ld1 $\xFF\x02\x2D, [$\x01], #16\0"
25645
254k
    /* 5149 */ "ld1 $\xFF\x02\x2E, [$\x01], #32\0"
25646
254k
    /* 5169 */ "ld1 $\xFF\x02\x2F, [$\x01], #16\0"
25647
254k
    /* 5189 */ "ld1 $\xFF\x02\x30, [$\x01], #32\0"
25648
254k
    /* 5209 */ "ld1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25649
254k
    /* 5233 */ "ld1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25650
254k
    /* 5257 */ "ld1b  {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25651
254k
    /* 5293 */ "ld1d  {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25652
254k
    /* 5329 */ "ld1h  {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25653
254k
    /* 5365 */ "ld1q  {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25654
254k
    /* 5401 */ "ld1w  {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25655
254k
    /* 5437 */ "ld1b  {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25656
254k
    /* 5473 */ "ld1d  {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25657
254k
    /* 5509 */ "ld1h  {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25658
254k
    /* 5545 */ "ld1q  {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25659
254k
    /* 5581 */ "ld1w  {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
25660
254k
    /* 5617 */ "ld1 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #2\0"
25661
254k
    /* 5640 */ "ld1 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #4\0"
25662
254k
    /* 5663 */ "ld1 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #8\0"
25663
254k
    /* 5686 */ "ld1 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #1\0"
25664
254k
    /* 5709 */ "ld2b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25665
254k
    /* 5733 */ "ld2d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25666
254k
    /* 5757 */ "ld2h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25667
254k
    /* 5781 */ "ld2r  $\xFF\x02\x29, [$\x01], #2\0"
25668
254k
    /* 5801 */ "ld2r  $\xFF\x02\x2A, [$\x01], #16\0"
25669
254k
    /* 5822 */ "ld2r  $\xFF\x02\x2B, [$\x01], #16\0"
25670
254k
    /* 5843 */ "ld2r  $\xFF\x02\x2C, [$\x01], #8\0"
25671
254k
    /* 5863 */ "ld2r  $\xFF\x02\x2D, [$\x01], #4\0"
25672
254k
    /* 5883 */ "ld2r  $\xFF\x02\x2E, [$\x01], #8\0"
25673
254k
    /* 5903 */ "ld2r  $\xFF\x02\x2F, [$\x01], #2\0"
25674
254k
    /* 5923 */ "ld2r  $\xFF\x02\x30, [$\x01], #4\0"
25675
254k
    /* 5943 */ "ld2 $\xFF\x02\x29, [$\x01], #32\0"
25676
254k
    /* 5963 */ "ld2 $\xFF\x02\x2B, [$\x01], #32\0"
25677
254k
    /* 5983 */ "ld2 $\xFF\x02\x2C, [$\x01], #16\0"
25678
254k
    /* 6003 */ "ld2 $\xFF\x02\x2D, [$\x01], #16\0"
25679
254k
    /* 6023 */ "ld2 $\xFF\x02\x2E, [$\x01], #32\0"
25680
254k
    /* 6043 */ "ld2 $\xFF\x02\x2F, [$\x01], #16\0"
25681
254k
    /* 6063 */ "ld2 $\xFF\x02\x30, [$\x01], #32\0"
25682
254k
    /* 6083 */ "ld2w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25683
254k
    /* 6107 */ "ld2 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #4\0"
25684
254k
    /* 6130 */ "ld2 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #8\0"
25685
254k
    /* 6153 */ "ld2 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #16\0"
25686
254k
    /* 6177 */ "ld2 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #2\0"
25687
254k
    /* 6200 */ "ld3b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25688
254k
    /* 6224 */ "ld3d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25689
254k
    /* 6248 */ "ld3h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25690
254k
    /* 6272 */ "ld3r  $\xFF\x02\x29, [$\x01], #3\0"
25691
254k
    /* 6292 */ "ld3r  $\xFF\x02\x2A, [$\x01], #24\0"
25692
254k
    /* 6313 */ "ld3r  $\xFF\x02\x2B, [$\x01], #24\0"
25693
254k
    /* 6334 */ "ld3r  $\xFF\x02\x2C, [$\x01], #12\0"
25694
254k
    /* 6355 */ "ld3r  $\xFF\x02\x2D, [$\x01], #6\0"
25695
254k
    /* 6375 */ "ld3r  $\xFF\x02\x2E, [$\x01], #12\0"
25696
254k
    /* 6396 */ "ld3r  $\xFF\x02\x2F, [$\x01], #3\0"
25697
254k
    /* 6416 */ "ld3r  $\xFF\x02\x30, [$\x01], #6\0"
25698
254k
    /* 6436 */ "ld3 $\xFF\x02\x29, [$\x01], #48\0"
25699
254k
    /* 6456 */ "ld3 $\xFF\x02\x2B, [$\x01], #48\0"
25700
254k
    /* 6476 */ "ld3 $\xFF\x02\x2C, [$\x01], #24\0"
25701
254k
    /* 6496 */ "ld3 $\xFF\x02\x2D, [$\x01], #24\0"
25702
254k
    /* 6516 */ "ld3 $\xFF\x02\x2E, [$\x01], #48\0"
25703
254k
    /* 6536 */ "ld3 $\xFF\x02\x2F, [$\x01], #24\0"
25704
254k
    /* 6556 */ "ld3 $\xFF\x02\x30, [$\x01], #48\0"
25705
254k
    /* 6576 */ "ld3w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25706
254k
    /* 6600 */ "ld3 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #6\0"
25707
254k
    /* 6623 */ "ld3 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #12\0"
25708
254k
    /* 6647 */ "ld3 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #24\0"
25709
254k
    /* 6671 */ "ld3 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #3\0"
25710
254k
    /* 6694 */ "ld4b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25711
254k
    /* 6718 */ "ld4d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25712
254k
    /* 6742 */ "ld4 $\xFF\x02\x29, [$\x01], #64\0"
25713
254k
    /* 6762 */ "ld4 $\xFF\x02\x2B, [$\x01], #64\0"
25714
254k
    /* 6782 */ "ld4 $\xFF\x02\x2C, [$\x01], #32\0"
25715
254k
    /* 6802 */ "ld4 $\xFF\x02\x2D, [$\x01], #32\0"
25716
254k
    /* 6822 */ "ld4 $\xFF\x02\x2E, [$\x01], #64\0"
25717
254k
    /* 6842 */ "ld4 $\xFF\x02\x2F, [$\x01], #32\0"
25718
254k
    /* 6862 */ "ld4 $\xFF\x02\x30, [$\x01], #64\0"
25719
254k
    /* 6882 */ "ld4h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25720
254k
    /* 6906 */ "ld4r  $\xFF\x02\x29, [$\x01], #4\0"
25721
254k
    /* 6926 */ "ld4r  $\xFF\x02\x2A, [$\x01], #32\0"
25722
254k
    /* 6947 */ "ld4r  $\xFF\x02\x2B, [$\x01], #32\0"
25723
254k
    /* 6968 */ "ld4r  $\xFF\x02\x2C, [$\x01], #16\0"
25724
254k
    /* 6989 */ "ld4r  $\xFF\x02\x2D, [$\x01], #8\0"
25725
254k
    /* 7009 */ "ld4r  $\xFF\x02\x2E, [$\x01], #16\0"
25726
254k
    /* 7030 */ "ld4r  $\xFF\x02\x2F, [$\x01], #4\0"
25727
254k
    /* 7050 */ "ld4r  $\xFF\x02\x30, [$\x01], #8\0"
25728
254k
    /* 7070 */ "ld4w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25729
254k
    /* 7094 */ "ld4 $\xFF\x02\x31$\xFF\x04\x19, [$\x01], #8\0"
25730
254k
    /* 7117 */ "ld4 $\xFF\x02\x32$\xFF\x04\x19, [$\x01], #16\0"
25731
254k
    /* 7141 */ "ld4 $\xFF\x02\x33$\xFF\x04\x19, [$\x01], #32\0"
25732
254k
    /* 7165 */ "ld4 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #4\0"
25733
254k
    /* 7188 */ "staddb  $\x02, [$\x03]\0"
25734
254k
    /* 7204 */ "staddh  $\x02, [$\x03]\0"
25735
254k
    /* 7220 */ "staddlb $\x02, [$\x03]\0"
25736
254k
    /* 7237 */ "staddlh $\x02, [$\x03]\0"
25737
254k
    /* 7254 */ "staddl  $\x02, [$\x03]\0"
25738
254k
    /* 7270 */ "stadd $\x02, [$\x03]\0"
25739
254k
    /* 7285 */ "ldapurb $\x01, [$\x02]\0"
25740
254k
    /* 7302 */ "ldapurh $\x01, [$\x02]\0"
25741
254k
    /* 7319 */ "ldapursb  $\x01, [$\x02]\0"
25742
254k
    /* 7337 */ "ldapursh  $\x01, [$\x02]\0"
25743
254k
    /* 7355 */ "ldapursw  $\x01, [$\x02]\0"
25744
254k
    /* 7373 */ "ldapur  $\x01, [$\x02]\0"
25745
254k
    /* 7389 */ "stclrb  $\x02, [$\x03]\0"
25746
254k
    /* 7405 */ "stclrh  $\x02, [$\x03]\0"
25747
254k
    /* 7421 */ "stclrlb $\x02, [$\x03]\0"
25748
254k
    /* 7438 */ "stclrlh $\x02, [$\x03]\0"
25749
254k
    /* 7455 */ "stclrl  $\x02, [$\x03]\0"
25750
254k
    /* 7471 */ "stclr $\x02, [$\x03]\0"
25751
254k
    /* 7486 */ "steorb  $\x02, [$\x03]\0"
25752
254k
    /* 7502 */ "steorh  $\x02, [$\x03]\0"
25753
254k
    /* 7518 */ "steorlb $\x02, [$\x03]\0"
25754
254k
    /* 7535 */ "steorlh $\x02, [$\x03]\0"
25755
254k
    /* 7552 */ "steorl  $\x02, [$\x03]\0"
25756
254k
    /* 7568 */ "steor $\x02, [$\x03]\0"
25757
254k
    /* 7583 */ "ldff1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25758
254k
    /* 7609 */ "ldff1b  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25759
254k
    /* 7635 */ "ldff1b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25760
254k
    /* 7661 */ "ldff1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25761
254k
    /* 7687 */ "ldff1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25762
254k
    /* 7713 */ "ldff1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25763
254k
    /* 7739 */ "ldff1h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25764
254k
    /* 7765 */ "ldff1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25765
254k
    /* 7791 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25766
254k
    /* 7818 */ "ldff1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25767
254k
    /* 7845 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25768
254k
    /* 7872 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25769
254k
    /* 7899 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25770
254k
    /* 7926 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25771
254k
    /* 7953 */ "ldff1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25772
254k
    /* 7979 */ "ldff1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25773
254k
    /* 8005 */ "ldg $\x01, [$\x03]\0"
25774
254k
    /* 8018 */ "ldnf1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25775
254k
    /* 8044 */ "ldnf1b  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25776
254k
    /* 8070 */ "ldnf1b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25777
254k
    /* 8096 */ "ldnf1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25778
254k
    /* 8122 */ "ldnf1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25779
254k
    /* 8148 */ "ldnf1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25780
254k
    /* 8174 */ "ldnf1h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25781
254k
    /* 8200 */ "ldnf1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25782
254k
    /* 8226 */ "ldnf1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25783
254k
    /* 8253 */ "ldnf1sb $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25784
254k
    /* 8280 */ "ldnf1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25785
254k
    /* 8307 */ "ldnf1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25786
254k
    /* 8334 */ "ldnf1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25787
254k
    /* 8361 */ "ldnf1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25788
254k
    /* 8388 */ "ldnf1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25789
254k
    /* 8414 */ "ldnf1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25790
254k
    /* 8440 */ "ldnp  $\x01, $\x02, [$\x03]\0"
25791
254k
    /* 8458 */ "ldnt1b  $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
25792
254k
    /* 8484 */ "ldnt1b  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25793
254k
    /* 8512 */ "ldnt1b  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25794
254k
    /* 8540 */ "ldnt1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
25795
254k
    /* 8566 */ "ldnt1d  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25796
254k
    /* 8594 */ "ldnt1h  $\xFF\x01\x27, $\xFF\x02\x07/z, [$\x03]\0"
25797
254k
    /* 8620 */ "ldnt1h  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25798
254k
    /* 8648 */ "ldnt1h  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25799
254k
    /* 8676 */ "ldnt1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25800
254k
    /* 8705 */ "ldnt1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25801
254k
    /* 8734 */ "ldnt1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25802
254k
    /* 8763 */ "ldnt1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25803
254k
    /* 8792 */ "ldnt1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25804
254k
    /* 8821 */ "ldnt1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
25805
254k
    /* 8847 */ "ldnt1w  $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
25806
254k
    /* 8875 */ "ldnt1w  $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
25807
254k
    /* 8903 */ "ldp $\x01, $\x02, [$\x03]\0"
25808
254k
    /* 8920 */ "ldpsw $\x01, $\x02, [$\x03]\0"
25809
254k
    /* 8939 */ "ldraa $\x01, [$\x02]\0"
25810
254k
    /* 8954 */ "ldrab $\x01, [$\x02]\0"
25811
254k
    /* 8969 */ "ldrb  $\x01, [$\x02, $\x03]\0"
25812
254k
    /* 8987 */ "ldrb  $\x01, [$\x02]\0"
25813
254k
    /* 9001 */ "ldr $\x01, [$\x02, $\x03]\0"
25814
254k
    /* 9018 */ "ldr $\x01, [$\x02]\0"
25815
254k
    /* 9031 */ "ldrh  $\x01, [$\x02, $\x03]\0"
25816
254k
    /* 9049 */ "ldrh  $\x01, [$\x02]\0"
25817
254k
    /* 9063 */ "ldrsb $\x01, [$\x02, $\x03]\0"
25818
254k
    /* 9082 */ "ldrsb $\x01, [$\x02]\0"
25819
254k
    /* 9097 */ "ldrsh $\x01, [$\x02, $\x03]\0"
25820
254k
    /* 9116 */ "ldrsh $\x01, [$\x02]\0"
25821
254k
    /* 9131 */ "ldrsw $\x01, [$\x02, $\x03]\0"
25822
254k
    /* 9150 */ "ldrsw $\x01, [$\x02]\0"
25823
254k
    /* 9165 */ "ldr $\xFF\x01\x07, [$\x02]\0"
25824
254k
    /* 9180 */ "ldr $\xFF\x01\x35[$\x02, $\xFF\x03\x20], [$\x04]\0"
25825
254k
    /* 9205 */ "stsetb  $\x02, [$\x03]\0"
25826
254k
    /* 9221 */ "stseth  $\x02, [$\x03]\0"
25827
254k
    /* 9237 */ "stsetlb $\x02, [$\x03]\0"
25828
254k
    /* 9254 */ "stsetlh $\x02, [$\x03]\0"
25829
254k
    /* 9271 */ "stsetl  $\x02, [$\x03]\0"
25830
254k
    /* 9287 */ "stset $\x02, [$\x03]\0"
25831
254k
    /* 9302 */ "stsmaxb $\x02, [$\x03]\0"
25832
254k
    /* 9319 */ "stsmaxh $\x02, [$\x03]\0"
25833
254k
    /* 9336 */ "stsmaxlb  $\x02, [$\x03]\0"
25834
254k
    /* 9354 */ "stsmaxlh  $\x02, [$\x03]\0"
25835
254k
    /* 9372 */ "stsmaxl $\x02, [$\x03]\0"
25836
254k
    /* 9389 */ "stsmax  $\x02, [$\x03]\0"
25837
254k
    /* 9405 */ "stsminb $\x02, [$\x03]\0"
25838
254k
    /* 9422 */ "stsminh $\x02, [$\x03]\0"
25839
254k
    /* 9439 */ "stsminlb  $\x02, [$\x03]\0"
25840
254k
    /* 9457 */ "stsminlh  $\x02, [$\x03]\0"
25841
254k
    /* 9475 */ "stsminl $\x02, [$\x03]\0"
25842
254k
    /* 9492 */ "stsmin  $\x02, [$\x03]\0"
25843
254k
    /* 9508 */ "ldtrb $\x01, [$\x02]\0"
25844
254k
    /* 9523 */ "ldtrh $\x01, [$\x02]\0"
25845
254k
    /* 9538 */ "ldtrsb  $\x01, [$\x02]\0"
25846
254k
    /* 9554 */ "ldtrsh  $\x01, [$\x02]\0"
25847
254k
    /* 9570 */ "ldtrsw  $\x01, [$\x02]\0"
25848
254k
    /* 9586 */ "ldtr  $\x01, [$\x02]\0"
25849
254k
    /* 9600 */ "stumaxb $\x02, [$\x03]\0"
25850
254k
    /* 9617 */ "stumaxh $\x02, [$\x03]\0"
25851
254k
    /* 9634 */ "stumaxlb  $\x02, [$\x03]\0"
25852
254k
    /* 9652 */ "stumaxlh  $\x02, [$\x03]\0"
25853
254k
    /* 9670 */ "stumaxl $\x02, [$\x03]\0"
25854
254k
    /* 9687 */ "stumax  $\x02, [$\x03]\0"
25855
254k
    /* 9703 */ "stuminb $\x02, [$\x03]\0"
25856
254k
    /* 9720 */ "stuminh $\x02, [$\x03]\0"
25857
254k
    /* 9737 */ "stuminlb  $\x02, [$\x03]\0"
25858
254k
    /* 9755 */ "stuminlh  $\x02, [$\x03]\0"
25859
254k
    /* 9773 */ "stuminl $\x02, [$\x03]\0"
25860
254k
    /* 9790 */ "stumin  $\x02, [$\x03]\0"
25861
254k
    /* 9806 */ "ldurb $\x01, [$\x02]\0"
25862
254k
    /* 9821 */ "ldur  $\x01, [$\x02]\0"
25863
254k
    /* 9835 */ "ldurh $\x01, [$\x02]\0"
25864
254k
    /* 9850 */ "ldursb  $\x01, [$\x02]\0"
25865
254k
    /* 9866 */ "ldursh  $\x01, [$\x02]\0"
25866
254k
    /* 9882 */ "ldursw  $\x01, [$\x02]\0"
25867
254k
    /* 9898 */ "mul $\x01, $\x02, $\x03\0"
25868
254k
    /* 9913 */ "smstart\0"
25869
254k
    /* 9921 */ "smstart sm\0"
25870
254k
    /* 9932 */ "smstart za\0"
25871
254k
    /* 9943 */ "smstop\0"
25872
254k
    /* 9950 */ "smstop sm\0"
25873
254k
    /* 9960 */ "smstop za\0"
25874
254k
    /* 9970 */ "mneg  $\x01, $\x02, $\x03\0"
25875
254k
    /* 9986 */ "mvn $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0"
25876
254k
    /* 10009 */ "mvn $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0"
25877
254k
    /* 10030 */ "mvn $\x01, $\x03\0"
25878
254k
    /* 10041 */ "mvn $\x01, $\x03$\xFF\x04\x02\0"
25879
254k
    /* 10056 */ "orn  $\x01, $\x02, $\x03\0"
25880
254k
    /* 10071 */ "movs $\xFF\x01\x06, $\xFF\x02\x06\0"
25881
254k
    /* 10087 */ "mov $\x01, $\x03\0"
25882
254k
    /* 10098 */ "orr  $\x01, $\x02, $\x03\0"
25883
254k
    /* 10113 */ "mov $\xFF\x01\x06, $\xFF\x02\x06\0"
25884
254k
    /* 10128 */ "orr  $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
25885
254k
    /* 10149 */ "orr  $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
25886
254k
    /* 10170 */ "orr  $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
25887
254k
    /* 10191 */ "mov $\xFF\x01\x10, $\xFF\x02\x10\0"
25888
254k
    /* 10206 */ "mov  $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0"
25889
254k
    /* 10229 */ "mov  $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0"
25890
254k
    /* 10250 */ "pacia1716\0"
25891
254k
    /* 10260 */ "paciasp\0"
25892
254k
    /* 10268 */ "paciaz\0"
25893
254k
    /* 10275 */ "pacib1716\0"
25894
254k
    /* 10285 */ "pacibsp\0"
25895
254k
    /* 10293 */ "pacibz\0"
25896
254k
    /* 10300 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25897
254k
    /* 10324 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0"
25898
254k
    /* 10346 */ "prfb $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25899
254k
    /* 10370 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25900
254k
    /* 10394 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0"
25901
254k
    /* 10416 */ "prfd $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25902
254k
    /* 10440 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25903
254k
    /* 10464 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0"
25904
254k
    /* 10486 */ "prfh $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25905
254k
    /* 10510 */ "prfm $\xFF\x01\x38, [$\x02, $\x03]\0"
25906
254k
    /* 10530 */ "prfm $\xFF\x01\x38, [$\x02]\0"
25907
254k
    /* 10546 */ "prfum  $\xFF\x01\x38, [$\x02]\0"
25908
254k
    /* 10563 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25909
254k
    /* 10587 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\x03]\0"
25910
254k
    /* 10609 */ "prfw $\xFF\x01\x37, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25911
254k
    /* 10633 */ "ptrues $\xFF\x01\x06\0"
25912
254k
    /* 10645 */ "ptrues $\xFF\x01\x10\0"
25913
254k
    /* 10657 */ "ptrues $\xFF\x01\x09\0"
25914
254k
    /* 10669 */ "ptrues $\xFF\x01\x0B\0"
25915
254k
    /* 10681 */ "ptrue  $\xFF\x01\x06\0"
25916
254k
    /* 10692 */ "ptrue  $\xFF\x01\x10\0"
25917
254k
    /* 10703 */ "ptrue  $\xFF\x01\x09\0"
25918
254k
    /* 10714 */ "ptrue  $\xFF\x01\x0B\0"
25919
254k
    /* 10725 */ "ret\0"
25920
254k
    /* 10729 */ "ngcs $\x01, $\x03\0"
25921
254k
    /* 10741 */ "ngc $\x01, $\x03\0"
25922
254k
    /* 10752 */ "asr $\x01, $\x02, $\x03\0"
25923
254k
    /* 10767 */ "sxtb $\x01, $\x02\0"
25924
254k
    /* 10779 */ "sxth $\x01, $\x02\0"
25925
254k
    /* 10791 */ "sxtw $\x01, $\x02\0"
25926
254k
    /* 10803 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x06\0"
25927
254k
    /* 10826 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x10\0"
25928
254k
    /* 10849 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x09\0"
25929
254k
    /* 10872 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x0B\0"
25930
254k
    /* 10895 */ "smull  $\x01, $\x02, $\x03\0"
25931
254k
    /* 10912 */ "smnegl $\x01, $\x02, $\x03\0"
25932
254k
    /* 10930 */ "sqdecb $\x01\0"
25933
254k
    /* 10940 */ "sqdecb $\x01, $\xFF\x03\x0E\0"
25934
254k
    /* 10956 */ "sqdecb $\x01, $\xFF\x02\x39\0"
25935
254k
    /* 10972 */ "sqdecb $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25936
254k
    /* 10994 */ "sqdecd $\x01\0"
25937
254k
    /* 11004 */ "sqdecd $\x01, $\xFF\x03\x0E\0"
25938
254k
    /* 11020 */ "sqdecd $\x01, $\xFF\x02\x39\0"
25939
254k
    /* 11036 */ "sqdecd $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25940
254k
    /* 11058 */ "sqdecd $\xFF\x01\x10\0"
25941
254k
    /* 11070 */ "sqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0"
25942
254k
    /* 11088 */ "sqdech $\x01\0"
25943
254k
    /* 11098 */ "sqdech $\x01, $\xFF\x03\x0E\0"
25944
254k
    /* 11114 */ "sqdech $\x01, $\xFF\x02\x39\0"
25945
254k
    /* 11130 */ "sqdech $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25946
254k
    /* 11152 */ "sqdech $\xFF\x01\x09\0"
25947
254k
    /* 11164 */ "sqdech $\xFF\x01\x09, $\xFF\x03\x0E\0"
25948
254k
    /* 11182 */ "sqdecw $\x01\0"
25949
254k
    /* 11192 */ "sqdecw $\x01, $\xFF\x03\x0E\0"
25950
254k
    /* 11208 */ "sqdecw $\x01, $\xFF\x02\x39\0"
25951
254k
    /* 11224 */ "sqdecw $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25952
254k
    /* 11246 */ "sqdecw $\xFF\x01\x0B\0"
25953
254k
    /* 11258 */ "sqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
25954
254k
    /* 11276 */ "sqincb $\x01\0"
25955
254k
    /* 11286 */ "sqincb $\x01, $\xFF\x03\x0E\0"
25956
254k
    /* 11302 */ "sqincb $\x01, $\xFF\x02\x39\0"
25957
254k
    /* 11318 */ "sqincb $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25958
254k
    /* 11340 */ "sqincd $\x01\0"
25959
254k
    /* 11350 */ "sqincd $\x01, $\xFF\x03\x0E\0"
25960
254k
    /* 11366 */ "sqincd $\x01, $\xFF\x02\x39\0"
25961
254k
    /* 11382 */ "sqincd $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25962
254k
    /* 11404 */ "sqincd $\xFF\x01\x10\0"
25963
254k
    /* 11416 */ "sqincd $\xFF\x01\x10, $\xFF\x03\x0E\0"
25964
254k
    /* 11434 */ "sqinch $\x01\0"
25965
254k
    /* 11444 */ "sqinch $\x01, $\xFF\x03\x0E\0"
25966
254k
    /* 11460 */ "sqinch $\x01, $\xFF\x02\x39\0"
25967
254k
    /* 11476 */ "sqinch $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25968
254k
    /* 11498 */ "sqinch $\xFF\x01\x09\0"
25969
254k
    /* 11510 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
25970
254k
    /* 11528 */ "sqincw $\x01\0"
25971
254k
    /* 11538 */ "sqincw $\x01, $\xFF\x03\x0E\0"
25972
254k
    /* 11554 */ "sqincw $\x01, $\xFF\x02\x39\0"
25973
254k
    /* 11570 */ "sqincw $\x01, $\xFF\x02\x39, $\xFF\x03\x0E\0"
25974
254k
    /* 11592 */ "sqincw $\xFF\x01\x0B\0"
25975
254k
    /* 11604 */ "sqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
25976
254k
    /* 11622 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25977
254k
    /* 11646 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25978
254k
    /* 11670 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25979
254k
    /* 11694 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25980
254k
    /* 11718 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25981
254k
    /* 11742 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
25982
254k
    /* 11766 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
25983
254k
    /* 11790 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
25984
254k
    /* 11812 */ "st1b $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
25985
254k
    /* 11834 */ "st1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
25986
254k
    /* 11856 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
25987
254k
    /* 11878 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
25988
254k
    /* 11900 */ "st1  $\xFF\x02\x29, [$\x01], #64\0"
25989
254k
    /* 11920 */ "st1  $\xFF\x02\x2A, [$\x01], #32\0"
25990
254k
    /* 11940 */ "st1  $\xFF\x02\x2B, [$\x01], #64\0"
25991
254k
    /* 11960 */ "st1  $\xFF\x02\x2C, [$\x01], #32\0"
25992
254k
    /* 11980 */ "st1  $\xFF\x02\x2D, [$\x01], #32\0"
25993
254k
    /* 12000 */ "st1  $\xFF\x02\x2E, [$\x01], #64\0"
25994
254k
    /* 12020 */ "st1  $\xFF\x02\x2F, [$\x01], #32\0"
25995
254k
    /* 12040 */ "st1  $\xFF\x02\x30, [$\x01], #64\0"
25996
254k
    /* 12060 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
25997
254k
    /* 12082 */ "st1h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
25998
254k
    /* 12104 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
25999
254k
    /* 12126 */ "st1  $\xFF\x02\x29, [$\x01], #16\0"
26000
254k
    /* 12146 */ "st1  $\xFF\x02\x2A, [$\x01], #8\0"
26001
254k
    /* 12165 */ "st1  $\xFF\x02\x2B, [$\x01], #16\0"
26002
254k
    /* 12185 */ "st1  $\xFF\x02\x2C, [$\x01], #8\0"
26003
254k
    /* 12204 */ "st1  $\xFF\x02\x2D, [$\x01], #8\0"
26004
254k
    /* 12223 */ "st1  $\xFF\x02\x2E, [$\x01], #16\0"
26005
254k
    /* 12243 */ "st1  $\xFF\x02\x2F, [$\x01], #8\0"
26006
254k
    /* 12262 */ "st1  $\xFF\x02\x30, [$\x01], #16\0"
26007
254k
    /* 12282 */ "st1  $\xFF\x02\x29, [$\x01], #48\0"
26008
254k
    /* 12302 */ "st1  $\xFF\x02\x2A, [$\x01], #24\0"
26009
254k
    /* 12322 */ "st1  $\xFF\x02\x2B, [$\x01], #48\0"
26010
254k
    /* 12342 */ "st1  $\xFF\x02\x2C, [$\x01], #24\0"
26011
254k
    /* 12362 */ "st1  $\xFF\x02\x2D, [$\x01], #24\0"
26012
254k
    /* 12382 */ "st1  $\xFF\x02\x2E, [$\x01], #48\0"
26013
254k
    /* 12402 */ "st1  $\xFF\x02\x2F, [$\x01], #24\0"
26014
254k
    /* 12422 */ "st1  $\xFF\x02\x30, [$\x01], #48\0"
26015
254k
    /* 12442 */ "st1  $\xFF\x02\x29, [$\x01], #32\0"
26016
254k
    /* 12462 */ "st1  $\xFF\x02\x2A, [$\x01], #16\0"
26017
254k
    /* 12482 */ "st1  $\xFF\x02\x2B, [$\x01], #32\0"
26018
254k
    /* 12502 */ "st1  $\xFF\x02\x2C, [$\x01], #16\0"
26019
254k
    /* 12522 */ "st1  $\xFF\x02\x2D, [$\x01], #16\0"
26020
254k
    /* 12542 */ "st1  $\xFF\x02\x2E, [$\x01], #32\0"
26021
254k
    /* 12562 */ "st1  $\xFF\x02\x2F, [$\x01], #16\0"
26022
254k
    /* 12582 */ "st1  $\xFF\x02\x30, [$\x01], #32\0"
26023
254k
    /* 12602 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
26024
254k
    /* 12624 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
26025
254k
    /* 12646 */ "st1b {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26026
254k
    /* 12680 */ "st1d {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26027
254k
    /* 12714 */ "st1h {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26028
254k
    /* 12748 */ "st1q {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26029
254k
    /* 12782 */ "st1w {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26030
254k
    /* 12816 */ "st1b {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26031
254k
    /* 12850 */ "st1d {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26032
254k
    /* 12884 */ "st1h {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26033
254k
    /* 12918 */ "st1q {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26034
254k
    /* 12952 */ "st1w {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
26035
254k
    /* 12986 */ "st1  $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #2\0"
26036
254k
    /* 13009 */ "st1  $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #4\0"
26037
254k
    /* 13032 */ "st1  $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #8\0"
26038
254k
    /* 13055 */ "st1  $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #1\0"
26039
254k
    /* 13078 */ "st2b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
26040
254k
    /* 13100 */ "st2d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
26041
254k
    /* 13122 */ "st2g $\x01, [$\x02]\0"
26042
254k
    /* 13136 */ "st2h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
26043
254k
    /* 13158 */ "st2  $\xFF\x02\x29, [$\x01], #32\0"
26044
254k
    /* 13178 */ "st2  $\xFF\x02\x2B, [$\x01], #32\0"
26045
254k
    /* 13198 */ "st2  $\xFF\x02\x2C, [$\x01], #16\0"
26046
254k
    /* 13218 */ "st2  $\xFF\x02\x2D, [$\x01], #16\0"
26047
254k
    /* 13238 */ "st2  $\xFF\x02\x2E, [$\x01], #32\0"
26048
254k
    /* 13258 */ "st2  $\xFF\x02\x2F, [$\x01], #16\0"
26049
254k
    /* 13278 */ "st2  $\xFF\x02\x30, [$\x01], #32\0"
26050
254k
    /* 13298 */ "st2w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
26051
254k
    /* 13320 */ "st2  $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #4\0"
26052
254k
    /* 13343 */ "st2  $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #8\0"
26053
254k
    /* 13366 */ "st2  $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #16\0"
26054
254k
    /* 13390 */ "st2  $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #2\0"
26055
254k
    /* 13413 */ "st3b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
26056
254k
    /* 13435 */ "st3d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
26057
254k
    /* 13457 */ "st3h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
26058
254k
    /* 13479 */ "st3  $\xFF\x02\x29, [$\x01], #48\0"
26059
254k
    /* 13499 */ "st3  $\xFF\x02\x2B, [$\x01], #48\0"
26060
254k
    /* 13519 */ "st3  $\xFF\x02\x2C, [$\x01], #24\0"
26061
254k
    /* 13539 */ "st3  $\xFF\x02\x2D, [$\x01], #24\0"
26062
254k
    /* 13559 */ "st3  $\xFF\x02\x2E, [$\x01], #48\0"
26063
254k
    /* 13579 */ "st3  $\xFF\x02\x2F, [$\x01], #24\0"
26064
254k
    /* 13599 */ "st3  $\xFF\x02\x30, [$\x01], #48\0"
26065
254k
    /* 13619 */ "st3w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
26066
254k
    /* 13641 */ "st3  $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #6\0"
26067
254k
    /* 13664 */ "st3  $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #12\0"
26068
254k
    /* 13688 */ "st3  $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #24\0"
26069
254k
    /* 13712 */ "st3  $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #3\0"
26070
254k
    /* 13735 */ "st4b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
26071
254k
    /* 13757 */ "st4d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
26072
254k
    /* 13779 */ "st4  $\xFF\x02\x29, [$\x01], #64\0"
26073
254k
    /* 13799 */ "st4  $\xFF\x02\x2B, [$\x01], #64\0"
26074
254k
    /* 13819 */ "st4  $\xFF\x02\x2C, [$\x01], #32\0"
26075
254k
    /* 13839 */ "st4  $\xFF\x02\x2D, [$\x01], #32\0"
26076
254k
    /* 13859 */ "st4  $\xFF\x02\x2E, [$\x01], #64\0"
26077
254k
    /* 13879 */ "st4  $\xFF\x02\x2F, [$\x01], #32\0"
26078
254k
    /* 13899 */ "st4  $\xFF\x02\x30, [$\x01], #64\0"
26079
254k
    /* 13919 */ "st4h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
26080
254k
    /* 13941 */ "st4w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
26081
254k
    /* 13963 */ "st4  $\xFF\x02\x31$\xFF\x03\x19, [$\x01], #8\0"
26082
254k
    /* 13986 */ "st4  $\xFF\x02\x32$\xFF\x03\x19, [$\x01], #16\0"
26083
254k
    /* 14010 */ "st4  $\xFF\x02\x33$\xFF\x03\x19, [$\x01], #32\0"
26084
254k
    /* 14034 */ "st4  $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #4\0"
26085
254k
    /* 14057 */ "stg  $\x01, [$\x02]\0"
26086
254k
    /* 14070 */ "stgp $\x01, $\x02, [$\x03]\0"
26087
254k
    /* 14088 */ "stlurb $\x01, [$\x02]\0"
26088
254k
    /* 14104 */ "stlurh $\x01, [$\x02]\0"
26089
254k
    /* 14120 */ "stlur  $\x01, [$\x02]\0"
26090
254k
    /* 14135 */ "stnp $\x01, $\x02, [$\x03]\0"
26091
254k
    /* 14153 */ "stnt1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
26092
254k
    /* 14177 */ "stnt1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
26093
254k
    /* 14203 */ "stnt1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
26094
254k
    /* 14229 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
26095
254k
    /* 14253 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
26096
254k
    /* 14279 */ "stnt1h $\xFF\x01\x27, $\xFF\x02\x07, [$\x03]\0"
26097
254k
    /* 14303 */ "stnt1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
26098
254k
    /* 14329 */ "stnt1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
26099
254k
    /* 14355 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
26100
254k
    /* 14379 */ "stnt1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
26101
254k
    /* 14405 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
26102
254k
    /* 14431 */ "stp  $\x01, $\x02, [$\x03]\0"
26103
254k
    /* 14448 */ "strb $\x01, [$\x02, $\x03]\0"
26104
254k
    /* 14466 */ "strb $\x01, [$\x02]\0"
26105
254k
    /* 14480 */ "str  $\x01, [$\x02, $\x03]\0"
26106
254k
    /* 14497 */ "str  $\x01, [$\x02]\0"
26107
254k
    /* 14510 */ "strh $\x01, [$\x02, $\x03]\0"
26108
254k
    /* 14528 */ "strh $\x01, [$\x02]\0"
26109
254k
    /* 14542 */ "str  $\xFF\x01\x07, [$\x02]\0"
26110
254k
    /* 14557 */ "str  $\xFF\x01\x35[$\x02, $\xFF\x03\x20], [$\x04]\0"
26111
254k
    /* 14582 */ "sttrb  $\x01, [$\x02]\0"
26112
254k
    /* 14597 */ "sttrh  $\x01, [$\x02]\0"
26113
254k
    /* 14612 */ "sttr $\x01, [$\x02]\0"
26114
254k
    /* 14626 */ "sturb  $\x01, [$\x02]\0"
26115
254k
    /* 14641 */ "stur $\x01, [$\x02]\0"
26116
254k
    /* 14655 */ "sturh  $\x01, [$\x02]\0"
26117
254k
    /* 14670 */ "stz2g  $\x01, [$\x02]\0"
26118
254k
    /* 14685 */ "stzg $\x01, [$\x02]\0"
26119
254k
    /* 14699 */ "cmp  $\x02, $\xFF\x03\x01\0"
26120
254k
    /* 14712 */ "cmp  $\x02, $\x03\0"
26121
254k
    /* 14723 */ "cmp  $\x02, $\x03$\xFF\x04\x02\0"
26122
254k
    /* 14738 */ "negs $\x01, $\x03\0"
26123
254k
    /* 14750 */ "negs $\x01, $\x03$\xFF\x04\x02\0"
26124
254k
    /* 14766 */ "subs $\x01, $\x02, $\x03\0"
26125
254k
    /* 14782 */ "cmp  $\x02, $\x03$\xFF\x04\x03\0"
26126
254k
    /* 14797 */ "neg $\x01, $\x03\0"
26127
254k
    /* 14808 */ "neg $\x01, $\x03$\xFF\x04\x02\0"
26128
254k
    /* 14823 */ "sub  $\x01, $\x02, $\x03\0"
26129
254k
    /* 14838 */ "sys $\x01, $\xFF\x02\x3A, $\xFF\x03\x3A, $\x04\0"
26130
254k
    /* 14861 */ "lsr $\x01, $\x02, $\x03\0"
26131
254k
    /* 14876 */ "uxtb $\x01, $\x02\0"
26132
254k
    /* 14888 */ "uxth $\x01, $\x02\0"
26133
254k
    /* 14900 */ "uxtw $\x01, $\x02\0"
26134
254k
    /* 14912 */ "umull  $\x01, $\x02, $\x03\0"
26135
254k
    /* 14929 */ "mov  $\x01, $\xFF\x02\x0C.s$\xFF\x03\x19\0"
26136
254k
    /* 14948 */ "mov  $\x01, $\xFF\x02\x0C.d$\xFF\x03\x19\0"
26137
254k
    /* 14967 */ "umnegl $\x01, $\x02, $\x03\0"
26138
254k
    /* 14985 */ "uqdecb $\x01\0"
26139
254k
    /* 14995 */ "uqdecb $\x01, $\xFF\x03\x0E\0"
26140
254k
    /* 15011 */ "uqdecd $\x01\0"
26141
254k
    /* 15021 */ "uqdecd $\x01, $\xFF\x03\x0E\0"
26142
254k
    /* 15037 */ "uqdecd $\xFF\x01\x10\0"
26143
254k
    /* 15049 */ "uqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0"
26144
254k
    /* 15067 */ "uqdech $\x01\0"
26145
254k
    /* 15077 */ "uqdech $\x01, $\xFF\x03\x0E\0"
26146
254k
    /* 15093 */ "uqdech $\xFF\x01\x09\0"
26147
254k
    /* 15105 */ "uqdech $\xFF\x01\x09, $\xFF\x03\x0E\0"
26148
254k
    /* 15123 */ "uqdecw $\x01\0"
26149
254k
    /* 15133 */ "uqdecw $\x01, $\xFF\x03\x0E\0"
26150
254k
    /* 15149 */ "uqdecw $\xFF\x01\x0B\0"
26151
254k
    /* 15161 */ "uqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
26152
254k
    /* 15179 */ "uqincb $\x01\0"
26153
254k
    /* 15189 */ "uqincb $\x01, $\xFF\x03\x0E\0"
26154
254k
    /* 15205 */ "uqincd $\x01\0"
26155
254k
    /* 15215 */ "uqincd $\x01, $\xFF\x03\x0E\0"
26156
254k
    /* 15231 */ "uqincd $\xFF\x01\x10\0"
26157
254k
    /* 15243 */ "uqincd $\xFF\x01\x10, $\xFF\x03\x0E\0"
26158
254k
    /* 15261 */ "uqinch $\x01\0"
26159
254k
    /* 15271 */ "uqinch $\x01, $\xFF\x03\x0E\0"
26160
254k
    /* 15287 */ "uqinch $\xFF\x01\x09\0"
26161
254k
    /* 15299 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
26162
254k
    /* 15317 */ "uqincw $\x01\0"
26163
254k
    /* 15327 */ "uqincw $\x01, $\xFF\x03\x0E\0"
26164
254k
    /* 15343 */ "uqincw $\xFF\x01\x0B\0"
26165
254k
    /* 15355 */ "uqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
26166
254k
    /* 15373 */ "xpaclri\0"
26167
254k
    /* 15381 */ "zero {za}\0"
26168
254k
    /* 15391 */ "zero {za0.h}\0"
26169
254k
    /* 15404 */ "zero {za1.h}\0"
26170
254k
    /* 15417 */ "zero {za0.s}\0"
26171
254k
    /* 15430 */ "zero {za1.s}\0"
26172
254k
    /* 15443 */ "zero {za2.s}\0"
26173
254k
    /* 15456 */ "zero {za3.s}\0"
26174
254k
    /* 15469 */ "zero {za0.s,za1.s}\0"
26175
254k
    /* 15488 */ "zero {za0.s,za3.s}\0"
26176
254k
    /* 15507 */ "zero {za1.s,za2.s}\0"
26177
254k
    /* 15526 */ "zero {za2.s,za3.s}\0"
26178
254k
    /* 15545 */ "zero {za0.s,za1.s,za2.s}\0"
26179
254k
    /* 15570 */ "zero {za0.s,za1.s,za3.s}\0"
26180
254k
    /* 15595 */ "zero {za0.s,za2.s,za3.s}\0"
26181
254k
    /* 15620 */ "zero {za1.s,za2.s,za3.s}\0"
26182
254k
  ;
26183
26184
26185
254k
  char *AsmString;
26186
254k
  const size_t OpToSize = sizeof(OpToPatterns) / sizeof(PatternsForOpcode);
26187
26188
254k
  const unsigned opcode = MCInst_getOpcode(MI);
26189
26190
  // Check for alias
26191
254k
  int OpToIndex = 0;
26192
160M
  for(int i = 0; i < OpToSize; i++){
26193
160M
    if(OpToPatterns[i].Opcode == opcode){
26194
108k
      OpToIndex = i;
26195
108k
      break;
26196
108k
    }
26197
160M
  }
26198
  // Chech for match
26199
254k
  if(opcode != OpToPatterns[OpToIndex].Opcode)
26200
145k
    return NULL;
26201
26202
108k
  const PatternsForOpcode opToPat = OpToPatterns[OpToIndex];
26203
26204
  // Try all patterns for this opcode
26205
108k
  uint32_t AsmStrOffset = ~0U;
26206
108k
  int patIdx = opToPat.PatternStart;
26207
242k
  while(patIdx < (opToPat.PatternStart + opToPat.NumPatterns)){
26208
    // Check operand count first
26209
163k
    if(MCInst_getNumOperands(MI) != Patterns[patIdx].NumOperands)
26210
0
      return NULL;
26211
    
26212
    // Test all conditions for this pattern
26213
163k
    int condIdx = Patterns[patIdx].AliasCondStart;
26214
163k
    int opIdx = 0;
26215
163k
    bool allPass = true;
26216
840k
    while(condIdx < (Patterns[patIdx].AliasCondStart + Patterns[patIdx].NumConds)){
26217
677k
      MCOperand *opnd = MCInst_getOperand(MI, opIdx);
26218
677k
      opIdx++;
26219
      // Not concerned with any Feature related conditions as STI is disregarded
26220
677k
      switch (Conds[condIdx].Kind)
26221
677k
      {
26222
78.4k
      case AliasPatternCond_K_Ignore :
26223
        // Operand can be anything.
26224
78.4k
        break;
26225
55.9k
      case AliasPatternCond_K_Reg :
26226
        // Operand must be a specific register.
26227
55.9k
        allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) == Conds[condIdx].Value);
26228
55.9k
        break;
26229
5.09k
      case AliasPatternCond_K_TiedReg :
26230
        // Operand must match the register of another operand.
26231
5.09k
        allPass = allPass && (MCOperand_isReg(opnd) && MCOperand_getReg(opnd) == 
26232
4.77k
                  MCOperand_getReg(MCInst_getOperand(MI, Conds[condIdx].Value)));
26233
5.09k
        break;
26234
86.9k
      case AliasPatternCond_K_Imm :
26235
        // Operand must be a specific immediate.
26236
86.9k
        allPass = allPass && (MCOperand_isImm(opnd) && MCOperand_getImm(opnd) == Conds[condIdx].Value);
26237
86.9k
        break;
26238
265k
      case AliasPatternCond_K_RegClass :
26239
        // Operand must be a register in this class. Value is a register class id.
26240
265k
        allPass = allPass && (MCOperand_isReg(opnd) && GETREGCLASS_CONTAIN(Conds[condIdx].Value, (opIdx-1)));
26241
265k
        break;
26242
19.8k
      case AliasPatternCond_K_Custom :
26243
        // Operand must match some custom criteria.
26244
19.8k
        allPass = allPass && AArch64InstPrinterValidateMCOperand(opnd, Conds[condIdx].Value);
26245
19.8k
        break;
26246
65.8k
      case AliasPatternCond_K_Feature :
26247
65.8k
      case AliasPatternCond_K_NegFeature :
26248
132k
      case AliasPatternCond_K_OrFeature :
26249
132k
      case AliasPatternCond_K_OrNegFeature :
26250
165k
      case AliasPatternCond_K_EndOrFeatures :
26251
165k
      default :
26252
165k
        break;
26253
677k
      }
26254
677k
      condIdx++;
26255
677k
    }
26256
163k
    if(allPass){
26257
30.2k
      AsmStrOffset = Patterns[patIdx].AsmStrOffset;
26258
30.2k
      break;
26259
30.2k
    }
26260
133k
    patIdx++;
26261
133k
  }
26262
26263
  // If no alias matched, don't print an alias.
26264
108k
  if (AsmStrOffset == ~0U)
26265
78.5k
    return NULL;
26266
26267
30.2k
  AsmString = cs_strdup(&AsmStrings[AsmStrOffset]);
26268
26269
30.2k
  tmpString = cs_strdup(AsmString);
26270
26271
127k
  while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
26272
97.8k
        AsmString[I] != '$' && AsmString[I] != '\0')
26273
97.6k
    ++I;
26274
26275
30.2k
  tmpString[I] = 0;
26276
30.2k
  SStream_concat0(OS, tmpString);
26277
26278
30.2k
  if (AsmString[I] != '\0') {
26279
30.0k
    if (AsmString[I] == ' ' || AsmString[I] == '\t') {
26280
30.0k
      SStream_concat0(OS, " ");
26281
30.0k
      ++I;
26282
30.0k
    }
26283
26284
30.0k
    bool isSME = false;
26285
245k
    do {
26286
245k
      if (AsmString[I] == '$') {
26287
76.0k
        ++I;
26288
76.0k
        if (AsmString[I] == (char)0xff) {
26289
52.6k
          ++I;
26290
52.6k
          OpIdx = AsmString[I++] - 1;
26291
52.6k
          PrintMethodIdx = AsmString[I++] - 1;
26292
52.6k
          printCustomAliasOperand(MI, 0, OpIdx, PrintMethodIdx, OS);
26293
52.6k
        } else
26294
23.3k
          printOperand(MI, (unsigned)(AsmString[I++]) - 1, OS);
26295
169k
      } else {
26296
169k
        if (AsmString[I] == '[') {
26297
13.2k
          if (AsmString[I-1] != ' '){
26298
1.57k
            set_sme_index(MI, true);
26299
1.57k
            isSME = true;
26300
11.6k
          } else {
26301
11.6k
            set_mem_access(MI, true);
26302
11.6k
          }
26303
155k
        } else if (AsmString[I] == ']') {
26304
13.2k
          if (isSME) {
26305
1.57k
            set_sme_index(MI, false);
26306
1.57k
            isSME = false;
26307
11.6k
          } else {
26308
11.6k
            set_mem_access(MI, false);
26309
11.6k
          }
26310
13.2k
        }
26311
169k
        SStream_concat1(OS, AsmString[I++]);
26312
169k
      }
26313
245k
    } while (AsmString[I] != '\0');
26314
30.0k
  }
26315
30.2k
  cs_mem_free(AsmString);
26316
30.2k
  return tmpString;
26317
108k
}
26318
        
26319
static void printCustomAliasOperand(
26320
         MCInst *MI, uint64_t Address, unsigned OpIdx,
26321
         unsigned PrintMethodIdx,
26322
         SStream *OS)
26323
52.6k
{
26324
52.6k
  switch (PrintMethodIdx) {
26325
0
  default:
26326
0
    break;
26327
211
  case 0:
26328
211
    printAddSubImm(MI, OpIdx, OS);
26329
211
    break;
26330
397
  case 1:
26331
397
    printShifter(MI, OpIdx, OS);
26332
397
    break;
26333
802
  case 2:
26334
802
    printArithExtend(MI, OpIdx, OS);
26335
802
    break;
26336
509
  case 3:
26337
509
    printLogicalImm32(MI, OpIdx, OS);
26338
509
    break;
26339
236
  case 4:
26340
236
    printLogicalImm64(MI, OpIdx, OS);
26341
236
    break;
26342
4.34k
  case 5:
26343
4.34k
    printSVERegOp(MI, OpIdx, OS, 'b');
26344
4.34k
    break;
26345
6.63k
  case 6:
26346
6.63k
    printSVERegOp(MI, OpIdx, OS, 0);
26347
6.63k
    break;
26348
155
  case 7:
26349
155
    printLogicalImm32(MI, OpIdx, OS);
26350
155
    break;
26351
2.62k
  case 8:
26352
2.62k
    printSVERegOp(MI, OpIdx, OS, 'h');
26353
2.62k
    break;
26354
921
  case 9:
26355
921
    printLogicalImm32(MI, OpIdx, OS);
26356
921
    break;
26357
3.34k
  case 10:
26358
3.34k
    printSVERegOp(MI, OpIdx, OS, 's');
26359
3.34k
    break;
26360
3.03k
  case 11:
26361
3.03k
    printVRegOperand(MI, OpIdx, OS);
26362
3.03k
    break;
26363
0
  case 12:
26364
0
    printImm(MI, OpIdx, OS);
26365
0
    break;
26366
412
  case 13:
26367
412
    printSVEPattern(MI, OpIdx, OS);
26368
412
    break;
26369
478
  case 14:
26370
478
    printImm8OptLsl32(MI, OpIdx, OS);
26371
478
    break;
26372
3.70k
  case 15:
26373
3.70k
    printSVERegOp(MI, OpIdx, OS, 'd');
26374
3.70k
    break;
26375
224
  case 16:
26376
224
    printImm8OptLsl64(MI, OpIdx, OS);
26377
224
    break;
26378
226
  case 17:
26379
226
    printImm8OptLsl32(MI, OpIdx, OS);
26380
226
    break;
26381
711
  case 18:
26382
711
    printImm8OptLsl32(MI, OpIdx, OS);
26383
711
    break;
26384
551
  case 19:
26385
551
    printInverseCondCode(MI, OpIdx, OS);
26386
551
    break;
26387
198
  case 20:
26388
198
    printSVELogicalImm16(MI, OpIdx, OS);
26389
198
    break;
26390
489
  case 21:
26391
489
    printSVELogicalImm32(MI, OpIdx, OS);
26392
489
    break;
26393
674
  case 22:
26394
674
    printSVELogicalImm64(MI, OpIdx, OS);
26395
674
    break;
26396
20
  case 23:
26397
20
    printZPRasFPR(MI, OpIdx, OS, 8);
26398
20
    break;
26399
4.68k
  case 24:
26400
4.68k
    printVectorIndex(MI, OpIdx, OS);
26401
4.68k
    break;
26402
221
  case 25:
26403
221
    printZPRasFPR(MI, OpIdx, OS, 64);
26404
221
    break;
26405
60
  case 26:
26406
60
    printZPRasFPR(MI, OpIdx, OS, 16);
26407
60
    break;
26408
528
  case 27:
26409
528
    printSVERegOp(MI, OpIdx, OS, 'q');
26410
528
    break;
26411
58
  case 28:
26412
58
    printZPRasFPR(MI, OpIdx, OS, 128);
26413
58
    break;
26414
80
  case 29:
26415
80
    printZPRasFPR(MI, OpIdx, OS, 32);
26416
80
    break;
26417
597
  case 30:
26418
597
    printMatrixTileVector(MI, OpIdx, OS, 0);
26419
597
    break;
26420
1.57k
  case 31:
26421
1.57k
    printMatrixIndex(MI, OpIdx, OS);
26422
1.57k
    break;
26423
892
  case 32:
26424
892
    printMatrixTileVector(MI, OpIdx, OS, 1);
26425
892
    break;
26426
1.05k
  case 33:
26427
1.05k
    printFPImmOperand(MI, OpIdx, OS);
26428
1.05k
    break;
26429
92
  case 34:
26430
92
    printTypedVectorList(MI, OpIdx, OS, 0,'d');
26431
92
    break;
26432
223
  case 35:
26433
223
    printTypedVectorList(MI, OpIdx, OS, 0,'s');
26434
223
    break;
26435
516
  case 36:
26436
516
    printBTIHintOp(MI, OpIdx, OS);
26437
516
    break;
26438
887
  case 37:
26439
887
    printPSBHintOp(MI, OpIdx, OS);
26440
887
    break;
26441
18
  case 38:
26442
18
    printTypedVectorList(MI, OpIdx, OS, 0,'h');
26443
18
    break;
26444
165
  case 39:
26445
165
    printTypedVectorList(MI, OpIdx, OS, 0,'b');
26446
165
    break;
26447
1.11k
  case 40:
26448
1.11k
    printTypedVectorList(MI, OpIdx, OS, 16, 'b');
26449
1.11k
    break;
26450
765
  case 41:
26451
765
    printTypedVectorList(MI, OpIdx, OS, 1, 'd');
26452
765
    break;
26453
988
  case 42:
26454
988
    printTypedVectorList(MI, OpIdx, OS, 2, 'd');
26455
988
    break;
26456
997
  case 43:
26457
997
    printTypedVectorList(MI, OpIdx, OS, 2, 's');
26458
997
    break;
26459
745
  case 44:
26460
745
    printTypedVectorList(MI, OpIdx, OS, 4, 'h');
26461
745
    break;
26462
631
  case 45:
26463
631
    printTypedVectorList(MI, OpIdx, OS, 4, 's');
26464
631
    break;
26465
946
  case 46:
26466
946
    printTypedVectorList(MI, OpIdx, OS, 8, 'b');
26467
946
    break;
26468
650
  case 47:
26469
650
    printTypedVectorList(MI, OpIdx, OS, 8, 'h');
26470
650
    break;
26471
614
  case 48:
26472
614
    printTypedVectorList(MI, OpIdx, OS, 0, 'h');
26473
614
    break;
26474
246
  case 49:
26475
246
    printTypedVectorList(MI, OpIdx, OS, 0, 's');
26476
246
    break;
26477
1.16k
  case 50:
26478
1.16k
    printTypedVectorList(MI, OpIdx, OS, 0, 'd');
26479
1.16k
    break;
26480
602
  case 51:
26481
602
    printTypedVectorList(MI, OpIdx, OS, 0, 'b');
26482
602
    break;
26483
86
  case 52:
26484
86
    printMatrix(MI, OpIdx, OS, 0);
26485
86
    break;
26486
0
  case 53:
26487
0
    printImmHex(MI, OpIdx, OS);
26488
0
    break;
26489
229
  case 54:
26490
229
    printPrefetchOp(MI, OpIdx, OS, true);
26491
229
    break;
26492
16
  case 55:
26493
16
    printPrefetchOp(MI, OpIdx, OS, false);
26494
16
    break;
26495
119
  case 56:
26496
119
    printGPR64as32(MI, OpIdx, OS);
26497
119
    break;
26498
180
  case 57:
26499
180
    printSysCROperand(MI, OpIdx, OS);
26500
180
    break;
26501
52.6k
  }
26502
52.6k
}
26503
26504
static bool AArch64InstPrinterValidateMCOperand(MCOperand *MCOp,
26505
19.4k
                  unsigned PredicateIndex) {
26506
19.4k
  int64_t Val;
26507
19.4k
  switch (PredicateIndex) {
26508
0
  default:
26509
0
    return false; // never reach
26510
0
    break;
26511
2.45k
  case 1: {
26512
26513
2.45k
    if (!MCOperand_isImm(MCOp))
26514
0
      return false;
26515
2.45k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26516
2.45k
    return AArch64_AM_isSVEMaskOfIdenticalElements8(Val);
26517
26518
2.45k
    }
26519
2.30k
  case 2: {
26520
26521
2.30k
    if (!MCOperand_isImm(MCOp))
26522
0
      return false;
26523
2.30k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26524
2.30k
    return AArch64_AM_isSVEMaskOfIdenticalElements16(Val);
26525
26526
2.30k
    }
26527
1.38k
  case 3: {
26528
26529
1.38k
    if (!MCOperand_isImm(MCOp))
26530
0
      return false;
26531
1.38k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26532
1.38k
    return AArch64_AM_isSVEMaskOfIdenticalElements32(Val);
26533
26534
1.38k
    }
26535
805
  case 4: {
26536
26537
805
    return MCOperand_isImm(MCOp) &&
26538
805
           MCOperand_getImm(MCOp) != AArch64CC_AL &&
26539
598
           MCOperand_getImm(MCOp) != AArch64CC_NV;
26540
26541
1.38k
    }
26542
3.19k
  case 5: {
26543
26544
3.19k
    if (!MCOperand_isImm(MCOp))
26545
0
      return false;
26546
3.19k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26547
3.19k
    return AArch64_AM_isSVEMaskOfIdenticalElements16(Val) &&
26548
1.07k
           AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val);
26549
26550
3.19k
    }
26551
2.99k
  case 6: {
26552
26553
2.99k
    if (!MCOperand_isImm(MCOp))
26554
0
      return false;
26555
2.99k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26556
2.99k
    return AArch64_AM_isSVEMaskOfIdenticalElements32(Val) &&
26557
1.65k
           AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val);
26558
26559
2.99k
    }
26560
2.51k
  case 7: {
26561
26562
2.51k
    if (!MCOperand_isImm(MCOp))
26563
0
      return false;
26564
2.51k
    Val = AArch64_AM_decodeLogicalImmediate(MCOperand_getImm(MCOp), 64);
26565
2.51k
    return AArch64_AM_isSVEMaskOfIdenticalElements64(Val) &&
26566
2.51k
           AArch64_AM_isSVEMoveMaskPreferredLogicalImmediate(Val);
26567
26568
2.51k
    }
26569
2.14k
  case 8: {
26570
26571
    // "bti" is an alias to "hint" only for certain values of CRm:Op2 fields.
26572
2.14k
    if (!MCOperand_isImm(MCOp))
26573
0
      return false;
26574
2.14k
    return lookupBTIByEncoding(MCOperand_getImm(MCOp) ^ 32) != NULL;
26575
26576
2.14k
    }
26577
1.63k
  case 9: {
26578
26579
    // Check, if operand is valid, to fix exhaustive aliasing in disassembly.
26580
    // "psb" is an alias to "hint" only for certain values of CRm:Op2 fields.
26581
1.63k
    if (!MCOperand_isImm(MCOp))
26582
0
      return false;
26583
1.63k
    return lookupPSBByEncoding(MCOperand_getImm(MCOp)) != NULL;
26584
26585
1.63k
    }
26586
19.4k
  }
26587
19.4k
}
26588
26589
#endif // PRINT_ALIAS_INSTR