Coverage Report

Created: 2026-03-11 06:06

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
20.7k
{
50
20.7k
  uint8_t Imm =
51
20.7k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
20.7k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
8.03k
  case 0:
56
8.03k
    SStream_concat0(O, "eq");
57
8.03k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
8.03k
    break;
59
2.17k
  case 1:
60
2.17k
    SStream_concat0(O, "lt");
61
2.17k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
2.17k
    break;
63
1.50k
  case 2:
64
1.50k
    SStream_concat0(O, "le");
65
1.50k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.50k
    break;
67
750
  case 3:
68
750
    SStream_concat0(O, "unord");
69
750
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
750
    break;
71
160
  case 4:
72
160
    SStream_concat0(O, "neq");
73
160
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
160
    break;
75
472
  case 5:
76
472
    SStream_concat0(O, "nlt");
77
472
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
472
    break;
79
254
  case 6:
80
254
    SStream_concat0(O, "nle");
81
254
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
254
    break;
83
442
  case 7:
84
442
    SStream_concat0(O, "ord");
85
442
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
442
    break;
87
464
  case 8:
88
464
    SStream_concat0(O, "eq_uq");
89
464
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
464
    break;
91
180
  case 9:
92
180
    SStream_concat0(O, "nge");
93
180
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
180
    break;
95
90
  case 0xa:
96
90
    SStream_concat0(O, "ngt");
97
90
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
90
    break;
99
657
  case 0xb:
100
657
    SStream_concat0(O, "false");
101
657
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
657
    break;
103
325
  case 0xc:
104
325
    SStream_concat0(O, "neq_oq");
105
325
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
325
    break;
107
205
  case 0xd:
108
205
    SStream_concat0(O, "ge");
109
205
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
205
    break;
111
145
  case 0xe:
112
145
    SStream_concat0(O, "gt");
113
145
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
145
    break;
115
457
  case 0xf:
116
457
    SStream_concat0(O, "true");
117
457
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
457
    break;
119
636
  case 0x10:
120
636
    SStream_concat0(O, "eq_os");
121
636
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
636
    break;
123
166
  case 0x11:
124
166
    SStream_concat0(O, "lt_oq");
125
166
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
166
    break;
127
119
  case 0x12:
128
119
    SStream_concat0(O, "le_oq");
129
119
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
119
    break;
131
141
  case 0x13:
132
141
    SStream_concat0(O, "unord_s");
133
141
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
141
    break;
135
167
  case 0x14:
136
167
    SStream_concat0(O, "neq_us");
137
167
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
167
    break;
139
350
  case 0x15:
140
350
    SStream_concat0(O, "nlt_uq");
141
350
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
350
    break;
143
376
  case 0x16:
144
376
    SStream_concat0(O, "nle_uq");
145
376
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
376
    break;
147
230
  case 0x17:
148
230
    SStream_concat0(O, "ord_s");
149
230
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
230
    break;
151
943
  case 0x18:
152
943
    SStream_concat0(O, "eq_us");
153
943
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
943
    break;
155
432
  case 0x19:
156
432
    SStream_concat0(O, "nge_uq");
157
432
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
432
    break;
159
158
  case 0x1a:
160
158
    SStream_concat0(O, "ngt_uq");
161
158
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
158
    break;
163
219
  case 0x1b:
164
219
    SStream_concat0(O, "false_os");
165
219
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
219
    break;
167
101
  case 0x1c:
168
101
    SStream_concat0(O, "neq_os");
169
101
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
101
    break;
171
194
  case 0x1d:
172
194
    SStream_concat0(O, "ge_oq");
173
194
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
194
    break;
175
121
  case 0x1e:
176
121
    SStream_concat0(O, "gt_oq");
177
121
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
121
    break;
179
81
  case 0x1f:
180
81
    SStream_concat0(O, "true_us");
181
81
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
81
    break;
183
20.7k
  }
184
185
20.7k
  MI->popcode_adjust = Imm + 1;
186
20.7k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
4.04k
{
190
4.04k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
4.04k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
631
  case 0:
195
631
    SStream_concat0(O, "lt");
196
631
    op_addXopCC(MI, X86_XOP_CC_LT);
197
631
    break;
198
229
  case 1:
199
229
    SStream_concat0(O, "le");
200
229
    op_addXopCC(MI, X86_XOP_CC_LE);
201
229
    break;
202
345
  case 2:
203
345
    SStream_concat0(O, "gt");
204
345
    op_addXopCC(MI, X86_XOP_CC_GT);
205
345
    break;
206
614
  case 3:
207
614
    SStream_concat0(O, "ge");
208
614
    op_addXopCC(MI, X86_XOP_CC_GE);
209
614
    break;
210
499
  case 4:
211
499
    SStream_concat0(O, "eq");
212
499
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
499
    break;
214
341
  case 5:
215
341
    SStream_concat0(O, "neq");
216
341
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
341
    break;
218
748
  case 6:
219
748
    SStream_concat0(O, "false");
220
748
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
748
    break;
222
636
  case 7:
223
636
    SStream_concat0(O, "true");
224
636
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
636
    break;
226
4.04k
  }
227
4.04k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
4.41k
{
231
4.41k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
4.41k
  switch (Imm) {
233
1.40k
  case 0:
234
1.40k
    SStream_concat0(O, "{rn-sae}");
235
1.40k
    op_addAvxSae(MI);
236
1.40k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.40k
    break;
238
571
  case 1:
239
571
    SStream_concat0(O, "{rd-sae}");
240
571
    op_addAvxSae(MI);
241
571
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
571
    break;
243
1.26k
  case 2:
244
1.26k
    SStream_concat0(O, "{ru-sae}");
245
1.26k
    op_addAvxSae(MI);
246
1.26k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
1.26k
    break;
248
1.17k
  case 3:
249
1.17k
    SStream_concat0(O, "{rz-sae}");
250
1.17k
    op_addAvxSae(MI);
251
1.17k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
1.17k
    break;
253
0
  default:
254
0
    break; // never reach
255
4.41k
  }
256
4.41k
}
257
#endif