/src/capstonenext/arch/Xtensa/XtensaGenAsmWriter.inc
Line | Count | Source |
1 | | /* Capstone Disassembly Engine, https://www.capstone-engine.org */ |
2 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */ |
3 | | /* Rot127 <unisono@quyllur.org> 2022-2024 */ |
4 | | /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ |
5 | | |
6 | | /* LLVM-commit: <commit> */ |
7 | | /* LLVM-tag: <tag> */ |
8 | | |
9 | | /* Do not edit. */ |
10 | | |
11 | | /* Capstone's LLVM TableGen Backends: */ |
12 | | /* https://github.com/capstone-engine/llvm-capstone */ |
13 | | |
14 | | #include <capstone/platform.h> |
15 | | #include "../../cs_priv.h" |
16 | | |
17 | | /// getMnemonic - This method is automatically generated by tablegen |
18 | | /// from the instruction set description. |
19 | 59.3k | static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { |
20 | 59.3k | #ifndef CAPSTONE_DIET |
21 | 59.3k | static const char AsmStrs[] = { |
22 | 59.3k | /* 0 */ "wur.fcr \t\0" |
23 | 59.3k | /* 10 */ "call0\t\0" |
24 | 59.3k | /* 17 */ "callx0\t\0" |
25 | 59.3k | /* 25 */ "call12\t\0" |
26 | 59.3k | /* 33 */ "callx12\t\0" |
27 | 59.3k | /* 42 */ "subx2\t\0" |
28 | 59.3k | /* 49 */ "addx2\t\0" |
29 | 59.3k | /* 56 */ "call4\t\0" |
30 | 59.3k | /* 63 */ "subx4\t\0" |
31 | 59.3k | /* 70 */ "addx4\t\0" |
32 | 59.3k | /* 77 */ "callx4\t\0" |
33 | 59.3k | /* 85 */ "any4\t\0" |
34 | 59.3k | /* 91 */ "call8\t\0" |
35 | 59.3k | /* 98 */ "subx8\t\0" |
36 | 59.3k | /* 105 */ "addx8\t\0" |
37 | 59.3k | /* 112 */ "callx8\t\0" |
38 | 59.3k | /* 120 */ "any8\t\0" |
39 | 59.3k | /* 126 */ "sra\t\0" |
40 | 59.3k | /* 131 */ "nsa\t\0" |
41 | 59.3k | /* 136 */ "andb\t\0" |
42 | 59.3k | /* 142 */ "wdtlb\t\0" |
43 | 59.3k | /* 149 */ "witlb\t\0" |
44 | 59.3k | /* 156 */ "xorb\t\0" |
45 | 59.3k | /* 162 */ "sub\t\0" |
46 | 59.3k | /* 167 */ "bbc\t\0" |
47 | 59.3k | /* 172 */ "andbc\t\0" |
48 | 59.3k | /* 179 */ "orbc\t\0" |
49 | 59.3k | /* 185 */ "ee.zero.qacc\t\0" |
50 | 59.3k | /* 199 */ "src\t\0" |
51 | 59.3k | /* 204 */ "add\t\0" |
52 | 59.3k | /* 209 */ "and\t\0" |
53 | 59.3k | /* 214 */ "l32e\t\0" |
54 | 59.3k | /* 220 */ "s32e\t\0" |
55 | 59.3k | /* 226 */ "bge\t\0" |
56 | 59.3k | /* 231 */ "bne\t\0" |
57 | 59.3k | /* 236 */ "bnone\t\0" |
58 | 59.3k | /* 243 */ "bf\t\0" |
59 | 59.3k | /* 247 */ "movf\t\0" |
60 | 59.3k | /* 253 */ "neg\t\0" |
61 | 59.3k | /* 258 */ "mula.aa.hh\t\0" |
62 | 59.3k | /* 270 */ "umul.aa.hh\t\0" |
63 | 59.3k | /* 282 */ "muls.aa.hh\t\0" |
64 | 59.3k | /* 294 */ "mula.da.hh\t\0" |
65 | 59.3k | /* 306 */ "mul.da.hh\t\0" |
66 | 59.3k | /* 317 */ "muls.da.hh\t\0" |
67 | 59.3k | /* 329 */ "mula.ad.hh\t\0" |
68 | 59.3k | /* 341 */ "mul.ad.hh\t\0" |
69 | 59.3k | /* 352 */ "muls.ad.hh\t\0" |
70 | 59.3k | /* 364 */ "mula.dd.hh\t\0" |
71 | 59.3k | /* 376 */ "mul.dd.hh\t\0" |
72 | 59.3k | /* 387 */ "muls.dd.hh\t\0" |
73 | 59.3k | /* 399 */ "mula.aa.lh\t\0" |
74 | 59.3k | /* 411 */ "umul.aa.lh\t\0" |
75 | 59.3k | /* 423 */ "muls.aa.lh\t\0" |
76 | 59.3k | /* 435 */ "mula.da.lh\t\0" |
77 | 59.3k | /* 447 */ "mul.da.lh\t\0" |
78 | 59.3k | /* 458 */ "muls.da.lh\t\0" |
79 | 59.3k | /* 470 */ "mula.ad.lh\t\0" |
80 | 59.3k | /* 482 */ "mul.ad.lh\t\0" |
81 | 59.3k | /* 493 */ "muls.ad.lh\t\0" |
82 | 59.3k | /* 505 */ "mula.dd.lh\t\0" |
83 | 59.3k | /* 517 */ "mul.dd.lh\t\0" |
84 | 59.3k | /* 528 */ "muls.dd.lh\t\0" |
85 | 59.3k | /* 540 */ "mulsh\t\0" |
86 | 59.3k | /* 547 */ "muluh\t\0" |
87 | 59.3k | /* 554 */ "s32c1i\t\0" |
88 | 59.3k | /* 562 */ "_l32i\t\0" |
89 | 59.3k | /* 569 */ "_s32i\t\0" |
90 | 59.3k | /* 576 */ "s16i\t\0" |
91 | 59.3k | /* 582 */ "s8i\t\0" |
92 | 59.3k | /* 587 */ "srai\t\0" |
93 | 59.3k | /* 593 */ "ssai\t\0" |
94 | 59.3k | /* 599 */ "bbci\t\0" |
95 | 59.3k | /* 605 */ "addi\t\0" |
96 | 59.3k | /* 611 */ "bgei\t\0" |
97 | 59.3k | /* 617 */ "bnei\t\0" |
98 | 59.3k | /* 623 */ "rfi\t\0" |
99 | 59.3k | /* 628 */ "_slli\t\0" |
100 | 59.3k | /* 635 */ "_srli\t\0" |
101 | 59.3k | /* 642 */ "addmi\t\0" |
102 | 59.3k | /* 649 */ "beqi\t\0" |
103 | 59.3k | /* 655 */ "l16si\t\0" |
104 | 59.3k | /* 662 */ "bbsi\t\0" |
105 | 59.3k | /* 668 */ "lsi\t\0" |
106 | 59.3k | /* 673 */ "ssi\t\0" |
107 | 59.3k | /* 678 */ "waiti\t\0" |
108 | 59.3k | /* 685 */ "blti\t\0" |
109 | 59.3k | /* 691 */ "l16ui\t\0" |
110 | 59.3k | /* 698 */ "l8ui\t\0" |
111 | 59.3k | /* 704 */ "bgeui\t\0" |
112 | 59.3k | /* 711 */ "bltui\t\0" |
113 | 59.3k | /* 718 */ "extui\t\0" |
114 | 59.3k | /* 725 */ "_movi\t\0" |
115 | 59.3k | /* 732 */ "j\t\0" |
116 | 59.3k | /* 735 */ "break\t\0" |
117 | 59.3k | /* 742 */ "ssa8l\t\0" |
118 | 59.3k | /* 749 */ "mula.aa.hl\t\0" |
119 | 59.3k | /* 761 */ "umul.aa.hl\t\0" |
120 | 59.3k | /* 773 */ "muls.aa.hl\t\0" |
121 | 59.3k | /* 785 */ "mula.da.hl\t\0" |
122 | 59.3k | /* 797 */ "mul.da.hl\t\0" |
123 | 59.3k | /* 808 */ "muls.da.hl\t\0" |
124 | 59.3k | /* 820 */ "mula.ad.hl\t\0" |
125 | 59.3k | /* 832 */ "mul.ad.hl\t\0" |
126 | 59.3k | /* 843 */ "muls.ad.hl\t\0" |
127 | 59.3k | /* 855 */ "mula.dd.hl\t\0" |
128 | 59.3k | /* 867 */ "mul.dd.hl\t\0" |
129 | 59.3k | /* 878 */ "muls.dd.hl\t\0" |
130 | 59.3k | /* 890 */ "rsil\t\0" |
131 | 59.3k | /* 896 */ "mula.aa.ll\t\0" |
132 | 59.3k | /* 908 */ "umul.aa.ll\t\0" |
133 | 59.3k | /* 920 */ "muls.aa.ll\t\0" |
134 | 59.3k | /* 932 */ "mula.da.ll\t\0" |
135 | 59.3k | /* 944 */ "mul.da.ll\t\0" |
136 | 59.3k | /* 955 */ "muls.da.ll\t\0" |
137 | 59.3k | /* 967 */ "mula.ad.ll\t\0" |
138 | 59.3k | /* 979 */ "mul.ad.ll\t\0" |
139 | 59.3k | /* 990 */ "muls.ad.ll\t\0" |
140 | 59.3k | /* 1002 */ "mula.dd.ll\t\0" |
141 | 59.3k | /* 1014 */ "mul.dd.ll\t\0" |
142 | 59.3k | /* 1025 */ "muls.dd.ll\t\0" |
143 | 59.3k | /* 1037 */ "ball\t\0" |
144 | 59.3k | /* 1043 */ "bnall\t\0" |
145 | 59.3k | /* 1050 */ "sll\t\0" |
146 | 59.3k | /* 1055 */ "mull\t\0" |
147 | 59.3k | /* 1061 */ "srl\t\0" |
148 | 59.3k | /* 1066 */ "ssl\t\0" |
149 | 59.3k | /* 1071 */ "add.n\t\0" |
150 | 59.3k | /* 1078 */ "_l32i.n\t\0" |
151 | 59.3k | /* 1087 */ "_s32i.n\t\0" |
152 | 59.3k | /* 1096 */ "addi.n\t\0" |
153 | 59.3k | /* 1104 */ "movi.n\t\0" |
154 | 59.3k | /* 1112 */ "break.n\t\0" |
155 | 59.3k | /* 1121 */ "mov.n\t\0" |
156 | 59.3k | /* 1128 */ "ee.get_gpio_in\t\0" |
157 | 59.3k | /* 1144 */ "min\t\0" |
158 | 59.3k | /* 1149 */ "lsip\t\0" |
159 | 59.3k | /* 1155 */ "ssip\t\0" |
160 | 59.3k | /* 1161 */ "loop\t\0" |
161 | 59.3k | /* 1167 */ "movsp\t\0" |
162 | 59.3k | /* 1174 */ "lsxp\t\0" |
163 | 59.3k | /* 1180 */ "ssxp\t\0" |
164 | 59.3k | /* 1186 */ "beq\t\0" |
165 | 59.3k | /* 1191 */ "l32r\t\0" |
166 | 59.3k | /* 1197 */ "rer\t\0" |
167 | 59.3k | /* 1202 */ "wer\t\0" |
168 | 59.3k | /* 1207 */ "rfr\t\0" |
169 | 59.3k | /* 1212 */ "wfr\t\0" |
170 | 59.3k | /* 1217 */ "xor\t\0" |
171 | 59.3k | /* 1222 */ "rsr\t\0" |
172 | 59.3k | /* 1227 */ "ssr\t\0" |
173 | 59.3k | /* 1232 */ "wsr\t\0" |
174 | 59.3k | /* 1237 */ "xsr\t\0" |
175 | 59.3k | /* 1242 */ "rur\t\0" |
176 | 59.3k | /* 1247 */ "wur\t\0" |
177 | 59.3k | /* 1252 */ "recip0.s\t\0" |
178 | 59.3k | /* 1262 */ "rsqrt0.s\t\0" |
179 | 59.3k | /* 1272 */ "div0.s\t\0" |
180 | 59.3k | /* 1280 */ "nexp01.s\t\0" |
181 | 59.3k | /* 1290 */ "msub.s\t\0" |
182 | 59.3k | /* 1298 */ "utrunc.s\t\0" |
183 | 59.3k | /* 1308 */ "madd.s\t\0" |
184 | 59.3k | /* 1316 */ "round.s\t\0" |
185 | 59.3k | /* 1325 */ "ole.s\t\0" |
186 | 59.3k | /* 1332 */ "ule.s\t\0" |
187 | 59.3k | /* 1339 */ "movf.s\t\0" |
188 | 59.3k | /* 1347 */ "neg.s\t\0" |
189 | 59.3k | /* 1354 */ "mkdadj.s\t\0" |
190 | 59.3k | /* 1364 */ "mksadj.s\t\0" |
191 | 59.3k | /* 1374 */ "ceil.s\t\0" |
192 | 59.3k | /* 1382 */ "mul.s\t\0" |
193 | 59.3k | /* 1389 */ "addexpm.s\t\0" |
194 | 59.3k | /* 1400 */ "maddn.s\t\0" |
195 | 59.3k | /* 1409 */ "un.s\t\0" |
196 | 59.3k | /* 1415 */ "divn.s\t\0" |
197 | 59.3k | /* 1423 */ "addexp.s\t\0" |
198 | 59.3k | /* 1433 */ "oeq.s\t\0" |
199 | 59.3k | /* 1440 */ "ueq.s\t\0" |
200 | 59.3k | /* 1447 */ "floor.s\t\0" |
201 | 59.3k | /* 1456 */ "abs.s\t\0" |
202 | 59.3k | /* 1463 */ "ufloat.s\t\0" |
203 | 59.3k | /* 1473 */ "olt.s\t\0" |
204 | 59.3k | /* 1480 */ "ult.s\t\0" |
205 | 59.3k | /* 1487 */ "const.s\t\0" |
206 | 59.3k | /* 1496 */ "movt.s\t\0" |
207 | 59.3k | /* 1504 */ "mov.s\t\0" |
208 | 59.3k | /* 1511 */ "movgez.s\t\0" |
209 | 59.3k | /* 1521 */ "movnez.s\t\0" |
210 | 59.3k | /* 1531 */ "moveqz.s\t\0" |
211 | 59.3k | /* 1541 */ "movltz.s\t\0" |
212 | 59.3k | /* 1551 */ "mul16s\t\0" |
213 | 59.3k | /* 1559 */ "abs\t\0" |
214 | 59.3k | /* 1564 */ "bbs\t\0" |
215 | 59.3k | /* 1569 */ "rems\t\0" |
216 | 59.3k | /* 1575 */ "quos\t\0" |
217 | 59.3k | /* 1581 */ "clamps\t\0" |
218 | 59.3k | /* 1589 */ "bt\t\0" |
219 | 59.3k | /* 1593 */ "blt\t\0" |
220 | 59.3k | /* 1598 */ "ee.wr_mask_gpio_out\t\0" |
221 | 59.3k | /* 1619 */ "ee.clr_bit_gpio_out\t\0" |
222 | 59.3k | /* 1640 */ "ee.set_bit_gpio_out\t\0" |
223 | 59.3k | /* 1661 */ "movt\t\0" |
224 | 59.3k | /* 1667 */ "sext\t\0" |
225 | 59.3k | /* 1673 */ "mul16u\t\0" |
226 | 59.3k | /* 1681 */ "nsau\t\0" |
227 | 59.3k | /* 1687 */ "bgeu\t\0" |
228 | 59.3k | /* 1693 */ "remu\t\0" |
229 | 59.3k | /* 1699 */ "minu\t\0" |
230 | 59.3k | /* 1705 */ "quou\t\0" |
231 | 59.3k | /* 1711 */ "bltu\t\0" |
232 | 59.3k | /* 1717 */ "maxu\t\0" |
233 | 59.3k | /* 1723 */ "rotw\t\0" |
234 | 59.3k | /* 1729 */ "max\t\0" |
235 | 59.3k | /* 1734 */ "ee.zero.accx\t\0" |
236 | 59.3k | /* 1748 */ "jx\t\0" |
237 | 59.3k | /* 1752 */ "lsx\t\0" |
238 | 59.3k | /* 1757 */ "ssx\t\0" |
239 | 59.3k | /* 1762 */ "bany\t\0" |
240 | 59.3k | /* 1768 */ "entry\t\0" |
241 | 59.3k | /* 1775 */ "bgez\t\0" |
242 | 59.3k | /* 1781 */ "movgez\t\0" |
243 | 59.3k | /* 1789 */ "bnez\t\0" |
244 | 59.3k | /* 1795 */ "loopnez\t\0" |
245 | 59.3k | /* 1804 */ "movnez\t\0" |
246 | 59.3k | /* 1812 */ "beqz\t\0" |
247 | 59.3k | /* 1818 */ "moveqz\t\0" |
248 | 59.3k | /* 1826 */ "loopgtz\t\0" |
249 | 59.3k | /* 1835 */ "bltz\t\0" |
250 | 59.3k | /* 1841 */ "movltz\t\0" |
251 | 59.3k | /* 1849 */ "rur.ua_state_0\t \0" |
252 | 59.3k | /* 1866 */ "wur.ua_state_0\t \0" |
253 | 59.3k | /* 1883 */ "rur.qacc_h_0\t \0" |
254 | 59.3k | /* 1898 */ "wur.qacc_h_0\t \0" |
255 | 59.3k | /* 1913 */ "rur.qacc_l_0\t \0" |
256 | 59.3k | /* 1928 */ "wur.qacc_l_0\t \0" |
257 | 59.3k | /* 1943 */ "rur.accx_0\t \0" |
258 | 59.3k | /* 1956 */ "wur.accx_0\t \0" |
259 | 59.3k | /* 1969 */ "rur.ua_state_1\t \0" |
260 | 59.3k | /* 1986 */ "wur.ua_state_1\t \0" |
261 | 59.3k | /* 2003 */ "rur.qacc_h_1\t \0" |
262 | 59.3k | /* 2018 */ "wur.qacc_h_1\t \0" |
263 | 59.3k | /* 2033 */ "rur.qacc_l_1\t \0" |
264 | 59.3k | /* 2048 */ "wur.qacc_l_1\t \0" |
265 | 59.3k | /* 2063 */ "rur.accx_1\t \0" |
266 | 59.3k | /* 2076 */ "wur.accx_1\t \0" |
267 | 59.3k | /* 2089 */ "ee.vldbc.32\t \0" |
268 | 59.3k | /* 2103 */ "ee.vsl.32\t \0" |
269 | 59.3k | /* 2115 */ "ee.vunzip.32\t \0" |
270 | 59.3k | /* 2130 */ "ee.vzip.32\t \0" |
271 | 59.3k | /* 2143 */ "ee.ldxq.32\t \0" |
272 | 59.3k | /* 2156 */ "ee.stxq.32\t \0" |
273 | 59.3k | /* 2169 */ "ee.vsr.32\t \0" |
274 | 59.3k | /* 2181 */ "ee.vmin.s32\t \0" |
275 | 59.3k | /* 2195 */ "ee.vcmp.eq.s32\t \0" |
276 | 59.3k | /* 2212 */ "ee.vsubs.s32\t \0" |
277 | 59.3k | /* 2227 */ "ee.vadds.s32\t \0" |
278 | 59.3k | /* 2242 */ "ee.vcmp.gt.s32\t \0" |
279 | 59.3k | /* 2259 */ "ee.vcmp.lt.s32\t \0" |
280 | 59.3k | /* 2276 */ "ee.vmax.s32\t \0" |
281 | 59.3k | /* 2290 */ "rur.ua_state_2\t \0" |
282 | 59.3k | /* 2307 */ "wur.ua_state_2\t \0" |
283 | 59.3k | /* 2324 */ "rur.qacc_h_2\t \0" |
284 | 59.3k | /* 2339 */ "wur.qacc_h_2\t \0" |
285 | 59.3k | /* 2354 */ "rur.qacc_l_2\t \0" |
286 | 59.3k | /* 2369 */ "wur.qacc_l_2\t \0" |
287 | 59.3k | /* 2384 */ "rur.ua_state_3\t \0" |
288 | 59.3k | /* 2401 */ "wur.ua_state_3\t \0" |
289 | 59.3k | /* 2418 */ "rur.qacc_h_3\t \0" |
290 | 59.3k | /* 2433 */ "wur.qacc_h_3\t \0" |
291 | 59.3k | /* 2448 */ "rur.qacc_l_3\t \0" |
292 | 59.3k | /* 2463 */ "wur.qacc_l_3\t \0" |
293 | 59.3k | /* 2478 */ "rur.qacc_h_4\t \0" |
294 | 59.3k | /* 2493 */ "wur.qacc_h_4\t \0" |
295 | 59.3k | /* 2508 */ "rur.qacc_l_4\t \0" |
296 | 59.3k | /* 2523 */ "wur.qacc_l_4\t \0" |
297 | 59.3k | /* 2538 */ "ee.vldbc.16\t \0" |
298 | 59.3k | /* 2552 */ "ee.vunzip.16\t \0" |
299 | 59.3k | /* 2567 */ "ee.vzip.16\t \0" |
300 | 59.3k | /* 2580 */ "ee.fft.r2bf.s16\t \0" |
301 | 59.3k | /* 2598 */ "ee.cmul.s16\t \0" |
302 | 59.3k | /* 2612 */ "ee.vmul.s16\t \0" |
303 | 59.3k | /* 2626 */ "ee.vmin.s16\t \0" |
304 | 59.3k | /* 2640 */ "ee.vcmp.eq.s16\t \0" |
305 | 59.3k | /* 2657 */ "ee.vsubs.s16\t \0" |
306 | 59.3k | /* 2672 */ "ee.vadds.s16\t \0" |
307 | 59.3k | /* 2687 */ "ee.vcmp.gt.s16\t \0" |
308 | 59.3k | /* 2704 */ "ee.vcmp.lt.s16\t \0" |
309 | 59.3k | /* 2721 */ "ee.vprelu.s16\t \0" |
310 | 59.3k | /* 2737 */ "ee.vrelu.s16\t \0" |
311 | 59.3k | /* 2752 */ "ee.vmax.s16\t \0" |
312 | 59.3k | /* 2766 */ "ee.vmul.u16\t \0" |
313 | 59.3k | /* 2780 */ "ee.vldbc.8\t \0" |
314 | 59.3k | /* 2793 */ "ee.vunzip.8\t \0" |
315 | 59.3k | /* 2807 */ "ee.vzip.8\t \0" |
316 | 59.3k | /* 2819 */ "ee.vmul.s8\t \0" |
317 | 59.3k | /* 2832 */ "ee.vmin.s8\t \0" |
318 | 59.3k | /* 2845 */ "ee.vcmp.eq.s8\t \0" |
319 | 59.3k | /* 2861 */ "ee.vsubs.s8\t \0" |
320 | 59.3k | /* 2875 */ "ee.vadds.s8\t \0" |
321 | 59.3k | /* 2889 */ "ee.vcmp.gt.s8\t \0" |
322 | 59.3k | /* 2905 */ "ee.vcmp.lt.s8\t \0" |
323 | 59.3k | /* 2921 */ "ee.vprelu.s8\t \0" |
324 | 59.3k | /* 2936 */ "ee.vrelu.s8\t \0" |
325 | 59.3k | /* 2950 */ "ee.vmax.s8\t \0" |
326 | 59.3k | /* 2963 */ "ee.vmul.u8\t \0" |
327 | 59.3k | /* 2976 */ "ee.movi.32.a\t \0" |
328 | 59.3k | /* 2991 */ "ee.srcmb.s16.qacc\t \0" |
329 | 59.3k | /* 3011 */ "ee.vsmulas.s16.qacc\t \0" |
330 | 59.3k | /* 3033 */ "ee.vmulas.s16.qacc\t \0" |
331 | 59.3k | /* 3054 */ "ee.mov.s16.qacc\t \0" |
332 | 59.3k | /* 3072 */ "ee.vmulas.u16.qacc\t \0" |
333 | 59.3k | /* 3093 */ "ee.mov.u16.qacc\t \0" |
334 | 59.3k | /* 3111 */ "ee.srcmb.s8.qacc\t \0" |
335 | 59.3k | /* 3130 */ "ee.vsmulas.s8.qacc\t \0" |
336 | 59.3k | /* 3151 */ "ee.vmulas.s8.qacc\t \0" |
337 | 59.3k | /* 3171 */ "ee.mov.s8.qacc\t \0" |
338 | 59.3k | /* 3188 */ "ee.vmulas.u8.qacc\t \0" |
339 | 59.3k | /* 3208 */ "ee.mov.u8.qacc\t \0" |
340 | 59.3k | /* 3225 */ "mula.da.hh.lddec\t \0" |
341 | 59.3k | /* 3244 */ "mula.dd.hh.lddec\t \0" |
342 | 59.3k | /* 3263 */ "mula.da.lh.lddec\t \0" |
343 | 59.3k | /* 3282 */ "mula.dd.lh.lddec\t \0" |
344 | 59.3k | /* 3301 */ "mula.da.hl.lddec\t \0" |
345 | 59.3k | /* 3320 */ "mula.dd.hl.lddec\t \0" |
346 | 59.3k | /* 3339 */ "mula.da.ll.lddec\t \0" |
347 | 59.3k | /* 3358 */ "mula.dd.ll.lddec\t \0" |
348 | 59.3k | /* 3377 */ "mula.da.hh.ldinc\t \0" |
349 | 59.3k | /* 3396 */ "mula.dd.hh.ldinc\t \0" |
350 | 59.3k | /* 3415 */ "mula.da.lh.ldinc\t \0" |
351 | 59.3k | /* 3434 */ "mula.dd.lh.ldinc\t \0" |
352 | 59.3k | /* 3453 */ "mula.da.hl.ldinc\t \0" |
353 | 59.3k | /* 3472 */ "mula.dd.hl.ldinc\t \0" |
354 | 59.3k | /* 3491 */ "mula.da.ll.ldinc\t \0" |
355 | 59.3k | /* 3510 */ "mula.dd.ll.ldinc\t \0" |
356 | 59.3k | /* 3529 */ "rur.sar_byte\t \0" |
357 | 59.3k | /* 3544 */ "wur.sar_byte\t \0" |
358 | 59.3k | /* 3559 */ "rur.fft_bit_width\t \0" |
359 | 59.3k | /* 3579 */ "wur.fft_bit_width\t \0" |
360 | 59.3k | /* 3599 */ "ee.fft.ams.s16.ld.r32.decp\t \0" |
361 | 59.3k | /* 3628 */ "ee.fft.vst.r32.decp\t \0" |
362 | 59.3k | /* 3650 */ "ee.vldhbc.16.incp\t \0" |
363 | 59.3k | /* 3670 */ "ee.vmulas.s16.qacc.ldbc.incp\t \0" |
364 | 59.3k | /* 3701 */ "ee.vmulas.u16.qacc.ldbc.incp\t \0" |
365 | 59.3k | /* 3732 */ "ee.vmulas.s8.qacc.ldbc.incp\t \0" |
366 | 59.3k | /* 3762 */ "ee.vmulas.u8.qacc.ldbc.incp\t \0" |
367 | 59.3k | /* 3792 */ "ee.vmin.s32.ld.incp\t \0" |
368 | 59.3k | /* 3814 */ "ee.vsubs.s32.ld.incp\t \0" |
369 | 59.3k | /* 3837 */ "ee.vadds.s32.ld.incp\t \0" |
370 | 59.3k | /* 3860 */ "ee.vmax.s32.ld.incp\t \0" |
371 | 59.3k | /* 3882 */ "ee.cmul.s16.ld.incp\t \0" |
372 | 59.3k | /* 3904 */ "ee.vmul.s16.ld.incp\t \0" |
373 | 59.3k | /* 3926 */ "ee.vmin.s16.ld.incp\t \0" |
374 | 59.3k | /* 3948 */ "ee.vsubs.s16.ld.incp\t \0" |
375 | 59.3k | /* 3971 */ "ee.vadds.s16.ld.incp\t \0" |
376 | 59.3k | /* 3994 */ "ee.fft.ams.s16.ld.incp\t \0" |
377 | 59.3k | /* 4019 */ "ee.vmax.s16.ld.incp\t \0" |
378 | 59.3k | /* 4041 */ "ee.vmul.u16.ld.incp\t \0" |
379 | 59.3k | /* 4063 */ "ee.vmul.s8.ld.incp\t \0" |
380 | 59.3k | /* 4084 */ "ee.vmin.s8.ld.incp\t \0" |
381 | 59.3k | /* 4105 */ "ee.vsubs.s8.ld.incp\t \0" |
382 | 59.3k | /* 4127 */ "ee.vadds.s8.ld.incp\t \0" |
383 | 59.3k | /* 4149 */ "ee.vmax.s8.ld.incp\t \0" |
384 | 59.3k | /* 4170 */ "ee.vmul.u8.ld.incp\t \0" |
385 | 59.3k | /* 4191 */ "ee.vsmulas.s16.qacc.ld.incp\t \0" |
386 | 59.3k | /* 4221 */ "ee.vsmulas.s8.qacc.ld.incp\t \0" |
387 | 59.3k | /* 4250 */ "ee.vmin.s32.st.incp\t \0" |
388 | 59.3k | /* 4272 */ "ee.vsubs.s32.st.incp\t \0" |
389 | 59.3k | /* 4295 */ "ee.vadds.s32.st.incp\t \0" |
390 | 59.3k | /* 4318 */ "ee.vmax.s32.st.incp\t \0" |
391 | 59.3k | /* 4340 */ "ee.fft.r2bf.s16.st.incp\t \0" |
392 | 59.3k | /* 4366 */ "ee.cmul.s16.st.incp\t \0" |
393 | 59.3k | /* 4388 */ "ee.vmul.s16.st.incp\t \0" |
394 | 59.3k | /* 4410 */ "ee.vmin.s16.st.incp\t \0" |
395 | 59.3k | /* 4432 */ "ee.vsubs.s16.st.incp\t \0" |
396 | 59.3k | /* 4455 */ "ee.vadds.s16.st.incp\t \0" |
397 | 59.3k | /* 4478 */ "ee.fft.ams.s16.st.incp\t \0" |
398 | 59.3k | /* 4503 */ "ee.vmax.s16.st.incp\t \0" |
399 | 59.3k | /* 4525 */ "ee.vmul.u16.st.incp\t \0" |
400 | 59.3k | /* 4547 */ "ee.srcq.128.st.incp\t \0" |
401 | 59.3k | /* 4569 */ "ee.vmul.s8.st.incp\t \0" |
402 | 59.3k | /* 4590 */ "ee.vmin.s8.st.incp\t \0" |
403 | 59.3k | /* 4611 */ "ee.vsubs.s8.st.incp\t \0" |
404 | 59.3k | /* 4633 */ "ee.vadds.s8.st.incp\t \0" |
405 | 59.3k | /* 4655 */ "ee.vmax.s8.st.incp\t \0" |
406 | 59.3k | /* 4676 */ "ee.vmul.u8.st.incp\t \0" |
407 | 59.3k | /* 4697 */ "ee.vldbc.32.ip\t \0" |
408 | 59.3k | /* 4714 */ "ee.ld.qacc_h.h.32.ip\t \0" |
409 | 59.3k | /* 4737 */ "ee.st.qacc_h.h.32.ip\t \0" |
410 | 59.3k | /* 4760 */ "ee.ld.qacc_l.h.32.ip\t \0" |
411 | 59.3k | /* 4783 */ "ee.st.qacc_l.h.32.ip\t \0" |
412 | 59.3k | /* 4806 */ "ee.ldf.64.ip\t \0" |
413 | 59.3k | /* 4821 */ "ee.stf.64.ip\t \0" |
414 | 59.3k | /* 4836 */ "ee.vld.h.64.ip\t \0" |
415 | 59.3k | /* 4853 */ "ee.vst.h.64.ip\t \0" |
416 | 59.3k | /* 4870 */ "ee.vld.l.64.ip\t \0" |
417 | 59.3k | /* 4887 */ "ee.vst.l.64.ip\t \0" |
418 | 59.3k | /* 4904 */ "ee.vldbc.16.ip\t \0" |
419 | 59.3k | /* 4921 */ "ee.vldbc.8.ip\t \0" |
420 | 59.3k | /* 4937 */ "ee.ldqa.s16.128.ip\t \0" |
421 | 59.3k | /* 4958 */ "ee.ldqa.u16.128.ip\t \0" |
422 | 59.3k | /* 4979 */ "ee.ldqa.s8.128.ip\t \0" |
423 | 59.3k | /* 4999 */ "ee.ldqa.u8.128.ip\t \0" |
424 | 59.3k | /* 5019 */ "ee.vld.128.ip\t \0" |
425 | 59.3k | /* 5035 */ "ee.ldf.128.ip\t \0" |
426 | 59.3k | /* 5051 */ "ee.stf.128.ip\t \0" |
427 | 59.3k | /* 5067 */ "ee.ld.qacc_h.l.128.ip\t \0" |
428 | 59.3k | /* 5091 */ "ee.st.qacc_h.l.128.ip\t \0" |
429 | 59.3k | /* 5115 */ "ee.ld.qacc_l.l.128.ip\t \0" |
430 | 59.3k | /* 5139 */ "ee.st.qacc_l.l.128.ip\t \0" |
431 | 59.3k | /* 5163 */ "ee.vst.128.ip\t \0" |
432 | 59.3k | /* 5179 */ "ee.vmulas.s16.qacc.ld.ip\t \0" |
433 | 59.3k | /* 5206 */ "ee.vmulas.u16.qacc.ld.ip\t \0" |
434 | 59.3k | /* 5233 */ "ee.vmulas.s8.qacc.ld.ip\t \0" |
435 | 59.3k | /* 5259 */ "ee.vmulas.u8.qacc.ld.ip\t \0" |
436 | 59.3k | /* 5285 */ "ee.src.q.ld.ip\t \0" |
437 | 59.3k | /* 5302 */ "ee.vmulas.s16.accx.ld.ip\t \0" |
438 | 59.3k | /* 5329 */ "ee.vmulas.u16.accx.ld.ip\t \0" |
439 | 59.3k | /* 5356 */ "ee.vmulas.s8.accx.ld.ip\t \0" |
440 | 59.3k | /* 5382 */ "ee.vmulas.u8.accx.ld.ip\t \0" |
441 | 59.3k | /* 5408 */ "ee.ld.ua_state.ip\t \0" |
442 | 59.3k | /* 5428 */ "ee.st.ua_state.ip\t \0" |
443 | 59.3k | /* 5448 */ "ee.ld.128.usar.ip\t \0" |
444 | 59.3k | /* 5468 */ "ee.ld.accx.ip\t \0" |
445 | 59.3k | /* 5484 */ "ee.st.accx.ip\t \0" |
446 | 59.3k | /* 5500 */ "ee.fft.ams.s16.ld.incp.uaup\t \0" |
447 | 59.3k | /* 5530 */ "ee.vmulas.s16.qacc.ldbc.incp.qup\t \0" |
448 | 59.3k | /* 5565 */ "ee.vmulas.u16.qacc.ldbc.incp.qup\t \0" |
449 | 59.3k | /* 5600 */ "ee.vmulas.s8.qacc.ldbc.incp.qup\t \0" |
450 | 59.3k | /* 5634 */ "ee.vmulas.u8.qacc.ldbc.incp.qup\t \0" |
451 | 59.3k | /* 5668 */ "ee.vmulas.s16.qacc.ld.ip.qup\t \0" |
452 | 59.3k | /* 5699 */ "ee.vmulas.u16.qacc.ld.ip.qup\t \0" |
453 | 59.3k | /* 5730 */ "ee.vmulas.s8.qacc.ld.ip.qup\t \0" |
454 | 59.3k | /* 5760 */ "ee.vmulas.u8.qacc.ld.ip.qup\t \0" |
455 | 59.3k | /* 5790 */ "ee.vmulas.s16.accx.ld.ip.qup\t \0" |
456 | 59.3k | /* 5821 */ "ee.vmulas.u16.accx.ld.ip.qup\t \0" |
457 | 59.3k | /* 5852 */ "ee.vmulas.s8.accx.ld.ip.qup\t \0" |
458 | 59.3k | /* 5882 */ "ee.vmulas.u8.accx.ld.ip.qup\t \0" |
459 | 59.3k | /* 5912 */ "ee.vmulas.s16.qacc.ld.xp.qup\t \0" |
460 | 59.3k | /* 5943 */ "ee.vmulas.u16.qacc.ld.xp.qup\t \0" |
461 | 59.3k | /* 5974 */ "ee.vmulas.s8.qacc.ld.xp.qup\t \0" |
462 | 59.3k | /* 6004 */ "ee.vmulas.u8.qacc.ld.xp.qup\t \0" |
463 | 59.3k | /* 6034 */ "ee.vmulas.s16.accx.ld.xp.qup\t \0" |
464 | 59.3k | /* 6065 */ "ee.vmulas.u16.accx.ld.xp.qup\t \0" |
465 | 59.3k | /* 6096 */ "ee.vmulas.s8.accx.ld.xp.qup\t \0" |
466 | 59.3k | /* 6126 */ "ee.vmulas.u8.accx.ld.xp.qup\t \0" |
467 | 59.3k | /* 6156 */ "ee.src.q.qup\t \0" |
468 | 59.3k | /* 6171 */ "ee.vldbc.32.xp\t \0" |
469 | 59.3k | /* 6188 */ "ee.ldf.64.xp\t \0" |
470 | 59.3k | /* 6203 */ "ee.stf.64.xp\t \0" |
471 | 59.3k | /* 6218 */ "ee.vld.h.64.xp\t \0" |
472 | 59.3k | /* 6235 */ "ee.vst.h.64.xp\t \0" |
473 | 59.3k | /* 6252 */ "ee.vld.l.64.xp\t \0" |
474 | 59.3k | /* 6269 */ "ee.vst.l.64.xp\t \0" |
475 | 59.3k | /* 6286 */ "ee.vldbc.16.xp\t \0" |
476 | 59.3k | /* 6303 */ "ee.vldbc.8.xp\t \0" |
477 | 59.3k | /* 6319 */ "ee.ldqa.s16.128.xp\t \0" |
478 | 59.3k | /* 6340 */ "ee.ldqa.u16.128.xp\t \0" |
479 | 59.3k | /* 6361 */ "ee.ldqa.s8.128.xp\t \0" |
480 | 59.3k | /* 6381 */ "ee.ldqa.u8.128.xp\t \0" |
481 | 59.3k | /* 6401 */ "ee.vld.128.xp\t \0" |
482 | 59.3k | /* 6417 */ "ee.ldf.128.xp\t \0" |
483 | 59.3k | /* 6433 */ "ee.stf.128.xp\t \0" |
484 | 59.3k | /* 6449 */ "ee.vst.128.xp\t \0" |
485 | 59.3k | /* 6465 */ "ee.fft.cmul.s16.ld.xp\t \0" |
486 | 59.3k | /* 6489 */ "ee.vmulas.s16.qacc.ld.xp\t \0" |
487 | 59.3k | /* 6516 */ "ee.vmulas.u16.qacc.ld.xp\t \0" |
488 | 59.3k | /* 6543 */ "ee.vmulas.s8.qacc.ld.xp\t \0" |
489 | 59.3k | /* 6569 */ "ee.vmulas.u8.qacc.ld.xp\t \0" |
490 | 59.3k | /* 6595 */ "ee.src.q.ld.xp\t \0" |
491 | 59.3k | /* 6612 */ "ee.vmulas.s16.accx.ld.xp\t \0" |
492 | 59.3k | /* 6639 */ "ee.vmulas.u16.accx.ld.xp\t \0" |
493 | 59.3k | /* 6666 */ "ee.vmulas.s8.accx.ld.xp\t \0" |
494 | 59.3k | /* 6692 */ "ee.vmulas.u8.accx.ld.xp\t \0" |
495 | 59.3k | /* 6718 */ "ee.ld.128.usar.xp\t \0" |
496 | 59.3k | /* 6738 */ "ee.fft.cmul.s16.st.xp\t \0" |
497 | 59.3k | /* 6762 */ "ee.movi.32.q\t \0" |
498 | 59.3k | /* 6777 */ "ee.src.q\t \0" |
499 | 59.3k | /* 6788 */ "ee.zero.q\t \0" |
500 | 59.3k | /* 6800 */ "ee.slci.2q\t \0" |
501 | 59.3k | /* 6813 */ "ee.srci.2q\t \0" |
502 | 59.3k | /* 6826 */ "ee.slcxxp.2q\t \0" |
503 | 59.3k | /* 6841 */ "ee.srcxxp.2q\t \0" |
504 | 59.3k | /* 6856 */ "ee.andq\t \0" |
505 | 59.3k | /* 6866 */ "ee.orq\t \0" |
506 | 59.3k | /* 6875 */ "ee.xorq\t \0" |
507 | 59.3k | /* 6885 */ "ee.notq\t \0" |
508 | 59.3k | /* 6895 */ "mv.qr\t \0" |
509 | 59.3k | /* 6903 */ "wur.fsr\t \0" |
510 | 59.3k | /* 6913 */ "rur.gpio_out\t \0" |
511 | 59.3k | /* 6928 */ "wur.gpio_out\t \0" |
512 | 59.3k | /* 6943 */ "ee.bitrev\t \0" |
513 | 59.3k | /* 6955 */ "ee.vmulas.s16.accx\t \0" |
514 | 59.3k | /* 6976 */ "ee.vmulas.u16.accx\t \0" |
515 | 59.3k | /* 6997 */ "ee.vmulas.s8.accx\t \0" |
516 | 59.3k | /* 7017 */ "ee.vmulas.u8.accx\t \0" |
517 | 59.3k | /* 7037 */ "ee.srs.accx\t \0" |
518 | 59.3k | /* 7051 */ "!xtensa_wsr_m0_p, \0" |
519 | 59.3k | /* 7070 */ "!xtensa_xsr_m0_p, \0" |
520 | 59.3k | /* 7089 */ "!xtensa_wsr_m1_p, \0" |
521 | 59.3k | /* 7108 */ "!xtensa_xsr_m1_p, \0" |
522 | 59.3k | /* 7127 */ "!atomic_load_sub_32_p, \0" |
523 | 59.3k | /* 7151 */ "!xtensa_ee_vldbc_32_p, \0" |
524 | 59.3k | /* 7175 */ "!atomic_load_add_32_p, \0" |
525 | 59.3k | /* 7199 */ "!atomic_load_and_32_p, \0" |
526 | 59.3k | /* 7223 */ "!atomic_load_nand_32_p, \0" |
527 | 59.3k | /* 7248 */ "!xtensa_ee_vsl_32_p, \0" |
528 | 59.3k | /* 7270 */ "!atomic_load_min_32_p, \0" |
529 | 59.3k | /* 7294 */ "!atomic_load_umin_32_p, \0" |
530 | 59.3k | /* 7319 */ "!atomic_swap_32_p, \0" |
531 | 59.3k | /* 7339 */ "!atomic_cmp_swap_32_p, \0" |
532 | 59.3k | /* 7363 */ "!xtensa_ee_vunzip_32_p, \0" |
533 | 59.3k | /* 7388 */ "!xtensa_ee_vzip_32_p, \0" |
534 | 59.3k | /* 7411 */ "!xtensa_ee_ldxq_32_p, \0" |
535 | 59.3k | /* 7434 */ "!xtensa_ee_stxq_32_p, \0" |
536 | 59.3k | /* 7457 */ "!atomic_load_or_32_p, \0" |
537 | 59.3k | /* 7480 */ "!atomic_load_xor_32_p, \0" |
538 | 59.3k | /* 7504 */ "!xtensa_ee_vsr_32_p, \0" |
539 | 59.3k | /* 7526 */ "!atomic_load_max_32_p, \0" |
540 | 59.3k | /* 7550 */ "!atomic_load_umax_32_p, \0" |
541 | 59.3k | /* 7575 */ "!xtensa_ee_vmin_s32_p, \0" |
542 | 59.3k | /* 7599 */ "!xtensa_ee_vcmp_eq_s32_p, \0" |
543 | 59.3k | /* 7626 */ "!xtensa_ee_vsubs_s32_p, \0" |
544 | 59.3k | /* 7651 */ "!xtensa_ee_vadds_s32_p, \0" |
545 | 59.3k | /* 7676 */ "!xtensa_ee_vcmp_gt_s32_p, \0" |
546 | 59.3k | /* 7703 */ "!xtensa_ee_vcmp_lt_s32_p, \0" |
547 | 59.3k | /* 7730 */ "!xtensa_ee_vmax_s32_p, \0" |
548 | 59.3k | /* 7754 */ "!xtensa_wsr_m2_p, \0" |
549 | 59.3k | /* 7773 */ "!xtensa_xsr_m2_p, \0" |
550 | 59.3k | /* 7792 */ "!xtensa_wsr_m3_p, \0" |
551 | 59.3k | /* 7811 */ "!xtensa_xsr_m3_p, \0" |
552 | 59.3k | /* 7830 */ "!atomic_load_sub_16_p, \0" |
553 | 59.3k | /* 7854 */ "!xtensa_ee_vldbc_16_p, \0" |
554 | 59.3k | /* 7878 */ "!atomic_load_add_16_p, \0" |
555 | 59.3k | /* 7902 */ "!atomic_load_and_16_p, \0" |
556 | 59.3k | /* 7926 */ "!atomic_load_nand_16_p, \0" |
557 | 59.3k | /* 7951 */ "!atomic_load_min_16_p, \0" |
558 | 59.3k | /* 7975 */ "!atomic_load_umin_16_p, \0" |
559 | 59.3k | /* 8000 */ "!atomic_swap_16_p, \0" |
560 | 59.3k | /* 8020 */ "!atomic_cmp_swap_16_p, \0" |
561 | 59.3k | /* 8044 */ "!xtensa_ee_vunzip_16_p, \0" |
562 | 59.3k | /* 8069 */ "!xtensa_ee_vzip_16_p, \0" |
563 | 59.3k | /* 8092 */ "!atomic_load_or_16_p, \0" |
564 | 59.3k | /* 8115 */ "!atomic_load_xor_16_p, \0" |
565 | 59.3k | /* 8139 */ "!atomic_load_max_16_p, \0" |
566 | 59.3k | /* 8163 */ "!atomic_load_umax_16_p, \0" |
567 | 59.3k | /* 8188 */ "!xtensa_ee_fft_r2bf_s16_p, \0" |
568 | 59.3k | /* 8216 */ "!xtensa_ee_cmul_s16_p, \0" |
569 | 59.3k | /* 8240 */ "!xtensa_ee_vmul_s16_p, \0" |
570 | 59.3k | /* 8264 */ "!xtensa_ee_vmin_s16_p, \0" |
571 | 59.3k | /* 8288 */ "!xtensa_ee_vcmp_eq_s16_p, \0" |
572 | 59.3k | /* 8315 */ "!xtensa_ee_vsubs_s16_p, \0" |
573 | 59.3k | /* 8340 */ "!xtensa_ee_vadds_s16_p, \0" |
574 | 59.3k | /* 8365 */ "!xtensa_ee_vcmp_gt_s16_p, \0" |
575 | 59.3k | /* 8392 */ "!xtensa_ee_vcmp_lt_s16_p, \0" |
576 | 59.3k | /* 8419 */ "!xtensa_ee_vprelu_s16_p, \0" |
577 | 59.3k | /* 8445 */ "!xtensa_ee_vrelu_s16_p, \0" |
578 | 59.3k | /* 8470 */ "!xtensa_ee_vmax_s16_p, \0" |
579 | 59.3k | /* 8494 */ "!xtensa_ee_vmul_u16_p, \0" |
580 | 59.3k | /* 8518 */ "!atomic_load_sub_8_p, \0" |
581 | 59.3k | /* 8541 */ "!xtensa_ee_vldbc_8_p, \0" |
582 | 59.3k | /* 8564 */ "!atomic_load_add_8_p, \0" |
583 | 59.3k | /* 8587 */ "!atomic_load_and_8_p, \0" |
584 | 59.3k | /* 8610 */ "!atomic_load_nand_8_p, \0" |
585 | 59.3k | /* 8634 */ "!atomic_load_min_8_p, \0" |
586 | 59.3k | /* 8657 */ "!atomic_load_umin_8_p, \0" |
587 | 59.3k | /* 8681 */ "!atomic_swap_8_p, \0" |
588 | 59.3k | /* 8700 */ "!atomic_cmp_swap_8_p, \0" |
589 | 59.3k | /* 8723 */ "!xtensa_ee_vunzip_8_p, \0" |
590 | 59.3k | /* 8747 */ "!xtensa_ee_vzip_8_p, \0" |
591 | 59.3k | /* 8769 */ "!atomic_load_or_8_p, \0" |
592 | 59.3k | /* 8791 */ "!atomic_load_xor_8_p, \0" |
593 | 59.3k | /* 8814 */ "!atomic_load_max_8_p, \0" |
594 | 59.3k | /* 8837 */ "!atomic_load_umax_8_p, \0" |
595 | 59.3k | /* 8861 */ "!xtensa_ee_vmul_s8_p, \0" |
596 | 59.3k | /* 8884 */ "!xtensa_ee_vmin_s8_p, \0" |
597 | 59.3k | /* 8907 */ "!xtensa_ee_vcmp_eq_s8_p, \0" |
598 | 59.3k | /* 8933 */ "!xtensa_ee_vsubs_s8_p, \0" |
599 | 59.3k | /* 8957 */ "!xtensa_ee_vadds_s8_p, \0" |
600 | 59.3k | /* 8981 */ "!xtensa_ee_vcmp_gt_s8_p, \0" |
601 | 59.3k | /* 9007 */ "!xtensa_ee_vcmp_lt_s8_p, \0" |
602 | 59.3k | /* 9033 */ "!xtensa_ee_vprelu_s8_p, \0" |
603 | 59.3k | /* 9058 */ "!xtensa_ee_vrelu_s8_p, \0" |
604 | 59.3k | /* 9082 */ "!xtensa_ee_vmax_s8_p, \0" |
605 | 59.3k | /* 9105 */ "!xtensa_ee_vmul_u8_p, \0" |
606 | 59.3k | /* 9128 */ "!xtensa_ee_movi_32_a_p, \0" |
607 | 59.3k | /* 9153 */ "!xtensa_ee_srcmb_s16_qacc_p, \0" |
608 | 59.3k | /* 9183 */ "!xtensa_ee_vsmulas_s16_qacc_p, \0" |
609 | 59.3k | /* 9215 */ "!xtensa_ee_vmulas_s16_qacc_p, \0" |
610 | 59.3k | /* 9246 */ "!xtensa_ee_mov_s16_qacc_p, \0" |
611 | 59.3k | /* 9274 */ "!xtensa_ee_vmulas_u16_qacc_p, \0" |
612 | 59.3k | /* 9305 */ "!xtensa_ee_mov_u16_qacc_p, \0" |
613 | 59.3k | /* 9333 */ "!xtensa_ee_srcmb_s8_qacc_p, \0" |
614 | 59.3k | /* 9362 */ "!xtensa_ee_vsmulas_s8_qacc_p, \0" |
615 | 59.3k | /* 9393 */ "!xtensa_ee_vmulas_s8_qacc_p, \0" |
616 | 59.3k | /* 9423 */ "!xtensa_ee_mov_s8_qacc_p, \0" |
617 | 59.3k | /* 9450 */ "!xtensa_ee_vmulas_u8_qacc_p, \0" |
618 | 59.3k | /* 9480 */ "!xtensa_ee_mov_u8_qacc_p, \0" |
619 | 59.3k | /* 9507 */ "!xtensa_lddec_p, \0" |
620 | 59.3k | /* 9525 */ "!xtensa_mula_da_hh_lddec_p, \0" |
621 | 59.3k | /* 9554 */ "!xtensa_mula_dd_hh_lddec_p, \0" |
622 | 59.3k | /* 9583 */ "!xtensa_mula_da_lh_lddec_p, \0" |
623 | 59.3k | /* 9612 */ "!xtensa_mula_dd_lh_lddec_p, \0" |
624 | 59.3k | /* 9641 */ "!xtensa_mula_da_hl_lddec_p, \0" |
625 | 59.3k | /* 9670 */ "!xtensa_mula_dd_hl_lddec_p, \0" |
626 | 59.3k | /* 9699 */ "!xtensa_mula_da_ll_lddec_p, \0" |
627 | 59.3k | /* 9728 */ "!xtensa_mula_dd_ll_lddec_p, \0" |
628 | 59.3k | /* 9757 */ "!xtensa_ldinc_p, \0" |
629 | 59.3k | /* 9775 */ "!xtensa_mula_da_hh_ldinc_p, \0" |
630 | 59.3k | /* 9804 */ "!xtensa_mula_dd_hh_ldinc_p, \0" |
631 | 59.3k | /* 9833 */ "!xtensa_mula_da_lh_ldinc_p, \0" |
632 | 59.3k | /* 9862 */ "!xtensa_mula_dd_lh_ldinc_p, \0" |
633 | 59.3k | /* 9891 */ "!xtensa_mula_da_hl_ldinc_p, \0" |
634 | 59.3k | /* 9920 */ "!xtensa_mula_dd_hl_ldinc_p, \0" |
635 | 59.3k | /* 9949 */ "!xtensa_mula_da_ll_ldinc_p, \0" |
636 | 59.3k | /* 9978 */ "!xtensa_mula_dd_ll_ldinc_p, \0" |
637 | 59.3k | /* 10007 */ "!xtensa_wsr_acchi_p, \0" |
638 | 59.3k | /* 10029 */ "!xtensa_xsr_acchi_p, \0" |
639 | 59.3k | /* 10051 */ "!xtensa_wsr_acclo_p, \0" |
640 | 59.3k | /* 10073 */ "!xtensa_xsr_acclo_p, \0" |
641 | 59.3k | /* 10095 */ "!xtensa_ee_fft_ams_s16_ld_r32_decp_p, \0" |
642 | 59.3k | /* 10134 */ "!xtensa_ee_fft_vst_r32_decp_p, \0" |
643 | 59.3k | /* 10166 */ "!xtensa_ee_vldhbc_16_incp_p, \0" |
644 | 59.3k | /* 10196 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_p, \0" |
645 | 59.3k | /* 10237 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_p, \0" |
646 | 59.3k | /* 10278 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_p, \0" |
647 | 59.3k | /* 10318 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_p, \0" |
648 | 59.3k | /* 10358 */ "!xtensa_ee_vmin_s32_ld_incp_p, \0" |
649 | 59.3k | /* 10390 */ "!xtensa_ee_vsubs_s32_ld_incp_p, \0" |
650 | 59.3k | /* 10423 */ "!xtensa_ee_vadds_s32_ld_incp_p, \0" |
651 | 59.3k | /* 10456 */ "!xtensa_ee_vmax_s32_ld_incp_p, \0" |
652 | 59.3k | /* 10488 */ "!xtensa_ee_cmul_s16_ld_incp_p, \0" |
653 | 59.3k | /* 10520 */ "!xtensa_ee_vmul_s16_ld_incp_p, \0" |
654 | 59.3k | /* 10552 */ "!xtensa_ee_vmin_s16_ld_incp_p, \0" |
655 | 59.3k | /* 10584 */ "!xtensa_ee_vsubs_s16_ld_incp_p, \0" |
656 | 59.3k | /* 10617 */ "!xtensa_ee_vadds_s16_ld_incp_p, \0" |
657 | 59.3k | /* 10650 */ "!xtensa_ee_fft_ams_s16_ld_incp_p, \0" |
658 | 59.3k | /* 10685 */ "!xtensa_ee_vmax_s16_ld_incp_p, \0" |
659 | 59.3k | /* 10717 */ "!xtensa_ee_vmul_u16_ld_incp_p, \0" |
660 | 59.3k | /* 10749 */ "!xtensa_ee_vmul_s8_ld_incp_p, \0" |
661 | 59.3k | /* 10780 */ "!xtensa_ee_vmin_s8_ld_incp_p, \0" |
662 | 59.3k | /* 10811 */ "!xtensa_ee_vsubs_s8_ld_incp_p, \0" |
663 | 59.3k | /* 10843 */ "!xtensa_ee_vadds_s8_ld_incp_p, \0" |
664 | 59.3k | /* 10875 */ "!xtensa_ee_vmax_s8_ld_incp_p, \0" |
665 | 59.3k | /* 10906 */ "!xtensa_ee_vmul_u8_ld_incp_p, \0" |
666 | 59.3k | /* 10937 */ "!xtensa_ee_vsmulas_s16_qacc_ld_incp_p, \0" |
667 | 59.3k | /* 10977 */ "!xtensa_ee_vsmulas_s8_qacc_ld_incp_p, \0" |
668 | 59.3k | /* 11016 */ "!xtensa_ee_vmin_s32_st_incp_p, \0" |
669 | 59.3k | /* 11048 */ "!xtensa_ee_vsubs_s32_st_incp_p, \0" |
670 | 59.3k | /* 11081 */ "!xtensa_ee_vadds_s32_st_incp_p, \0" |
671 | 59.3k | /* 11114 */ "!xtensa_ee_vmax_s32_st_incp_p, \0" |
672 | 59.3k | /* 11146 */ "!xtensa_ee_fft_r2bf_s16_st_incp_p, \0" |
673 | 59.3k | /* 11182 */ "!xtensa_ee_cmul_s16_st_incp_p, \0" |
674 | 59.3k | /* 11214 */ "!xtensa_ee_vmul_s16_st_incp_p, \0" |
675 | 59.3k | /* 11246 */ "!xtensa_ee_vmin_s16_st_incp_p, \0" |
676 | 59.3k | /* 11278 */ "!xtensa_ee_vsubs_s16_st_incp_p, \0" |
677 | 59.3k | /* 11311 */ "!xtensa_ee_vadds_s16_st_incp_p, \0" |
678 | 59.3k | /* 11344 */ "!xtensa_ee_fft_ams_s16_st_incp_p, \0" |
679 | 59.3k | /* 11379 */ "!xtensa_ee_vmax_s16_st_incp_p, \0" |
680 | 59.3k | /* 11411 */ "!xtensa_ee_vmul_u16_st_incp_p, \0" |
681 | 59.3k | /* 11443 */ "!xtensa_ee_srcq_128_st_incp_p, \0" |
682 | 59.3k | /* 11475 */ "!xtensa_ee_vmul_s8_st_incp_p, \0" |
683 | 59.3k | /* 11506 */ "!xtensa_ee_vmin_s8_st_incp_p, \0" |
684 | 59.3k | /* 11537 */ "!xtensa_ee_vsubs_s8_st_incp_p, \0" |
685 | 59.3k | /* 11569 */ "!xtensa_ee_vadds_s8_st_incp_p, \0" |
686 | 59.3k | /* 11601 */ "!xtensa_ee_vmax_s8_st_incp_p, \0" |
687 | 59.3k | /* 11632 */ "!xtensa_ee_vmul_u8_st_incp_p, \0" |
688 | 59.3k | /* 11663 */ "!xtensa_ee_vldbc_32_ip_p, \0" |
689 | 59.3k | /* 11690 */ "!xtensa_ee_ld_qacc_h_h_32_ip_p, \0" |
690 | 59.3k | /* 11723 */ "!xtensa_ee_st_qacc_h_h_32_ip_p, \0" |
691 | 59.3k | /* 11756 */ "!xtensa_ee_ld_qacc_l_h_32_ip_p, \0" |
692 | 59.3k | /* 11789 */ "!xtensa_ee_st_qacc_l_h_32_ip_p, \0" |
693 | 59.3k | /* 11822 */ "!xtensa_ee_ldf_64_ip_p, \0" |
694 | 59.3k | /* 11847 */ "!xtensa_ee_stf_64_ip_p, \0" |
695 | 59.3k | /* 11872 */ "!xtensa_ee_vld_h_64_ip_p, \0" |
696 | 59.3k | /* 11899 */ "!xtensa_ee_vst_h_64_ip_p, \0" |
697 | 59.3k | /* 11926 */ "!xtensa_ee_vld_l_64_ip_p, \0" |
698 | 59.3k | /* 11953 */ "!xtensa_ee_vst_l_64_ip_p, \0" |
699 | 59.3k | /* 11980 */ "!xtensa_ee_vldbc_16_ip_p, \0" |
700 | 59.3k | /* 12007 */ "!xtensa_ee_ldqa_s16_128_ip_p, \0" |
701 | 59.3k | /* 12038 */ "!xtensa_ee_ldqa_u16_128_ip_p, \0" |
702 | 59.3k | /* 12069 */ "!xtensa_ee_ldqa_s8_128_ip_p, \0" |
703 | 59.3k | /* 12099 */ "!xtensa_ee_ldqa_u8_128_ip_p, \0" |
704 | 59.3k | /* 12129 */ "!xtensa_ee_vld_128_ip_p, \0" |
705 | 59.3k | /* 12155 */ "!xtensa_ee_ldf_128_ip_p, \0" |
706 | 59.3k | /* 12181 */ "!xtensa_ee_stf_128_ip_p, \0" |
707 | 59.3k | /* 12207 */ "!xtensa_ee_ld_qacc_h_l_128_ip_p, \0" |
708 | 59.3k | /* 12241 */ "!xtensa_ee_st_qacc_h_l_128_ip_p, \0" |
709 | 59.3k | /* 12275 */ "!xtensa_ee_ld_qacc_l_l_128_ip_p, \0" |
710 | 59.3k | /* 12309 */ "!xtensa_ee_st_qacc_l_l_128_ip_p, \0" |
711 | 59.3k | /* 12343 */ "!xtensa_ee_vst_128_ip_p, \0" |
712 | 59.3k | /* 12369 */ "!xtensa_ee_vldbc_8_ip_p, \0" |
713 | 59.3k | /* 12395 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_p, \0" |
714 | 59.3k | /* 12432 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_p, \0" |
715 | 59.3k | /* 12469 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_p, \0" |
716 | 59.3k | /* 12505 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_p, \0" |
717 | 59.3k | /* 12541 */ "!xtensa_ee_src_q_ld_ip_p, \0" |
718 | 59.3k | /* 12568 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_p, \0" |
719 | 59.3k | /* 12605 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_p, \0" |
720 | 59.3k | /* 12642 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_p, \0" |
721 | 59.3k | /* 12678 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_p, \0" |
722 | 59.3k | /* 12714 */ "!xtensa_ee_ld_ua_state_ip_p, \0" |
723 | 59.3k | /* 12744 */ "!xtensa_ee_st_ua_state_ip_p, \0" |
724 | 59.3k | /* 12774 */ "!xtensa_ee_ld_128_usar_ip_p, \0" |
725 | 59.3k | /* 12804 */ "!xtensa_ee_ld_accx_ip_p, \0" |
726 | 59.3k | /* 12830 */ "!xtensa_ee_st_accx_ip_p, \0" |
727 | 59.3k | /* 12856 */ "!xtensa_ee_fft_ams_s16_ld_incp_uaup_p, \0" |
728 | 59.3k | /* 12896 */ "!xtensa_ee_vmulas_s16_qacc_ldbc_incp_qup_p, \0" |
729 | 59.3k | /* 12941 */ "!xtensa_ee_vmulas_u16_qacc_ldbc_incp_qup_p, \0" |
730 | 59.3k | /* 12986 */ "!xtensa_ee_vmulas_s8_qacc_ldbc_incp_qup_p, \0" |
731 | 59.3k | /* 13030 */ "!xtensa_ee_vmulas_u8_qacc_ldbc_incp_qup_p, \0" |
732 | 59.3k | /* 13074 */ "!xtensa_ee_vmulas_s16_qacc_ld_ip_qup_p, \0" |
733 | 59.3k | /* 13115 */ "!xtensa_ee_vmulas_u16_qacc_ld_ip_qup_p, \0" |
734 | 59.3k | /* 13156 */ "!xtensa_ee_vmulas_s8_qacc_ld_ip_qup_p, \0" |
735 | 59.3k | /* 13196 */ "!xtensa_ee_vmulas_u8_qacc_ld_ip_qup_p, \0" |
736 | 59.3k | /* 13236 */ "!xtensa_ee_vmulas_s16_accx_ld_ip_qup_p, \0" |
737 | 59.3k | /* 13277 */ "!xtensa_ee_vmulas_u16_accx_ld_ip_qup_p, \0" |
738 | 59.3k | /* 13318 */ "!xtensa_ee_vmulas_s8_accx_ld_ip_qup_p, \0" |
739 | 59.3k | /* 13358 */ "!xtensa_ee_vmulas_u8_accx_ld_ip_qup_p, \0" |
740 | 59.3k | /* 13398 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_qup_p, \0" |
741 | 59.3k | /* 13439 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_qup_p, \0" |
742 | 59.3k | /* 13480 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_qup_p, \0" |
743 | 59.3k | /* 13520 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_qup_p, \0" |
744 | 59.3k | /* 13560 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_qup_p, \0" |
745 | 59.3k | /* 13601 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_qup_p, \0" |
746 | 59.3k | /* 13642 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_qup_p, \0" |
747 | 59.3k | /* 13682 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_qup_p, \0" |
748 | 59.3k | /* 13722 */ "!xtensa_ee_src_q_qup_p, \0" |
749 | 59.3k | /* 13747 */ "!xtensa_ee_vldbc_32_xp_p, \0" |
750 | 59.3k | /* 13774 */ "!xtensa_ee_ldf_64_xp_p, \0" |
751 | 59.3k | /* 13799 */ "!xtensa_ee_stf_64_xp_p, \0" |
752 | 59.3k | /* 13824 */ "!xtensa_ee_vld_h_64_xp_p, \0" |
753 | 59.3k | /* 13851 */ "!xtensa_ee_vst_h_64_xp_p, \0" |
754 | 59.3k | /* 13878 */ "!xtensa_ee_vld_l_64_xp_p, \0" |
755 | 59.3k | /* 13905 */ "!xtensa_ee_vst_l_64_xp_p, \0" |
756 | 59.3k | /* 13932 */ "!xtensa_ee_vldbc_16_xp_p, \0" |
757 | 59.3k | /* 13959 */ "!xtensa_ee_ldqa_s16_128_xp_p, \0" |
758 | 59.3k | /* 13990 */ "!xtensa_ee_ldqa_u16_128_xp_p, \0" |
759 | 59.3k | /* 14021 */ "!xtensa_ee_ldqa_s8_128_xp_p, \0" |
760 | 59.3k | /* 14051 */ "!xtensa_ee_ldqa_u8_128_xp_p, \0" |
761 | 59.3k | /* 14081 */ "!xtensa_ee_vld_128_xp_p, \0" |
762 | 59.3k | /* 14107 */ "!xtensa_ee_ldf_128_xp_p, \0" |
763 | 59.3k | /* 14133 */ "!xtensa_ee_stf_128_xp_p, \0" |
764 | 59.3k | /* 14159 */ "!xtensa_ee_vst_128_xp_p, \0" |
765 | 59.3k | /* 14185 */ "!xtensa_ee_vldbc_8_xp_p, \0" |
766 | 59.3k | /* 14211 */ "!xtensa_ee_fft_cmul_s16_ld_xp_p, \0" |
767 | 59.3k | /* 14245 */ "!xtensa_ee_vmulas_s16_qacc_ld_xp_p, \0" |
768 | 59.3k | /* 14282 */ "!xtensa_ee_vmulas_u16_qacc_ld_xp_p, \0" |
769 | 59.3k | /* 14319 */ "!xtensa_ee_vmulas_s8_qacc_ld_xp_p, \0" |
770 | 59.3k | /* 14355 */ "!xtensa_ee_vmulas_u8_qacc_ld_xp_p, \0" |
771 | 59.3k | /* 14391 */ "!xtensa_ee_src_q_ld_xp_p, \0" |
772 | 59.3k | /* 14418 */ "!xtensa_ee_vmulas_s16_accx_ld_xp_p, \0" |
773 | 59.3k | /* 14455 */ "!xtensa_ee_vmulas_u16_accx_ld_xp_p, \0" |
774 | 59.3k | /* 14492 */ "!xtensa_ee_vmulas_s8_accx_ld_xp_p, \0" |
775 | 59.3k | /* 14528 */ "!xtensa_ee_vmulas_u8_accx_ld_xp_p, \0" |
776 | 59.3k | /* 14564 */ "!xtensa_ee_ld_128_usar_xp_p, \0" |
777 | 59.3k | /* 14594 */ "!xtensa_ee_fft_cmul_s16_st_xp_p, \0" |
778 | 59.3k | /* 14628 */ "!xtensa_ee_slci_2q_p, \0" |
779 | 59.3k | /* 14651 */ "!xtensa_ee_srci_2q_p, \0" |
780 | 59.3k | /* 14674 */ "!xtensa_ee_slcxxp_2q_p, \0" |
781 | 59.3k | /* 14699 */ "!xtensa_ee_srcxxp_2q_p, \0" |
782 | 59.3k | /* 14724 */ "!xtensa_ee_movi_32_q_p, \0" |
783 | 59.3k | /* 14749 */ "!xtensa_ee_src_q_p, \0" |
784 | 59.3k | /* 14770 */ "!xtensa_ee_zero_q_p, \0" |
785 | 59.3k | /* 14792 */ "!xtensa_ee_andq_p, \0" |
786 | 59.3k | /* 14812 */ "!xtensa_ee_orq_p, \0" |
787 | 59.3k | /* 14831 */ "!xtensa_ee_xorq_p, \0" |
788 | 59.3k | /* 14851 */ "!xtensa_ee_notq_p, \0" |
789 | 59.3k | /* 14871 */ "!xtensa_mv_qr_p, \0" |
790 | 59.3k | /* 14889 */ "!br_jt_p, \0" |
791 | 59.3k | /* 14900 */ "!xtensa_ee_bitrev_p, \0" |
792 | 59.3k | /* 14922 */ "!xtensa_ee_vmulas_s16_accx_p, \0" |
793 | 59.3k | /* 14953 */ "!xtensa_ee_vmulas_u16_accx_p, \0" |
794 | 59.3k | /* 14984 */ "!xtensa_ee_vmulas_s8_accx_p, \0" |
795 | 59.3k | /* 15014 */ "!xtensa_ee_vmulas_u8_accx_p, \0" |
796 | 59.3k | /* 15044 */ "!xtensa_ee_srs_accx_p, \0" |
797 | 59.3k | /* 15068 */ "ae_movad16.0 \0" |
798 | 59.3k | /* 15082 */ "ae_nsaz16.0 \0" |
799 | 59.3k | /* 15095 */ "ae_mulaf16ss.00 \0" |
800 | 59.3k | /* 15112 */ "ae_mulf16ss.00 \0" |
801 | 59.3k | /* 15128 */ "ae_mulsf16ss.00 \0" |
802 | 59.3k | /* 15145 */ "ae_mulaafd16ss.11_00 \0" |
803 | 59.3k | /* 15167 */ "ae_mulzaafd16ss.11_00 \0" |
804 | 59.3k | /* 15190 */ "ae_mulssfd16ss.11_00 \0" |
805 | 59.3k | /* 15212 */ "ae_mulzssfd16ss.11_00 \0" |
806 | 59.3k | /* 15235 */ "ae_sext32x2d16.10 \0" |
807 | 59.3k | /* 15254 */ "ae_cvt32x2f16.10 \0" |
808 | 59.3k | /* 15272 */ "ae_mulaf16ss.10 \0" |
809 | 59.3k | /* 15289 */ "ae_mulf16ss.10 \0" |
810 | 59.3k | /* 15305 */ "ae_mulsf16ss.10 \0" |
811 | 59.3k | /* 15322 */ "ae_mulaf16ss.20 \0" |
812 | 59.3k | /* 15339 */ "ae_mulf16ss.20 \0" |
813 | 59.3k | /* 15355 */ "ae_mulsf16ss.20 \0" |
814 | 59.3k | /* 15372 */ "ae_mulaf16ss.30 \0" |
815 | 59.3k | /* 15389 */ "ae_mulf16ss.30 \0" |
816 | 59.3k | /* 15405 */ "ae_mulsf16ss.30 \0" |
817 | 59.3k | /* 15422 */ "rur.ae_cend0 \0" |
818 | 59.3k | /* 15436 */ "wur.ae_cend0 \0" |
819 | 59.3k | /* 15450 */ "ae_mula32x16.h0 \0" |
820 | 59.3k | /* 15467 */ "ae_mulaf32x16.h0 \0" |
821 | 59.3k | /* 15485 */ "ae_mulf32x16.h0 \0" |
822 | 59.3k | /* 15502 */ "ae_mulsf32x16.h0 \0" |
823 | 59.3k | /* 15520 */ "ae_mul32x16.h0 \0" |
824 | 59.3k | /* 15536 */ "ae_muls32x16.h0 \0" |
825 | 59.3k | /* 15553 */ "ae_mulaad32x16.h1.l0 \0" |
826 | 59.3k | /* 15575 */ "ae_mulzaad32x16.h1.l0 \0" |
827 | 59.3k | /* 15598 */ "ae_mulsad32x16.h1.l0 \0" |
828 | 59.3k | /* 15620 */ "ae_mulzsad32x16.h1.l0 \0" |
829 | 59.3k | /* 15643 */ "ae_mulaafd32x16.h1.l0 \0" |
830 | 59.3k | /* 15666 */ "ae_mulzaafd32x16.h1.l0 \0" |
831 | 59.3k | /* 15690 */ "ae_mulsafd32x16.h1.l0 \0" |
832 | 59.3k | /* 15713 */ "ae_mulzsafd32x16.h1.l0 \0" |
833 | 59.3k | /* 15737 */ "ae_mulasfd32x16.h1.l0 \0" |
834 | 59.3k | /* 15760 */ "ae_mulzasfd32x16.h1.l0 \0" |
835 | 59.3k | /* 15784 */ "ae_mulssfd32x16.h1.l0 \0" |
836 | 59.3k | /* 15807 */ "ae_mulzssfd32x16.h1.l0 \0" |
837 | 59.3k | /* 15831 */ "ae_mulasd32x16.h1.l0 \0" |
838 | 59.3k | /* 15853 */ "ae_mulzasd32x16.h1.l0 \0" |
839 | 59.3k | /* 15876 */ "ae_mulssd32x16.h1.l0 \0" |
840 | 59.3k | /* 15898 */ "ae_mulzssd32x16.h1.l0 \0" |
841 | 59.3k | /* 15921 */ "ae_mula32x16.l0 \0" |
842 | 59.3k | /* 15938 */ "ae_mulaf32x16.l0 \0" |
843 | 59.3k | /* 15956 */ "ae_mulf32x16.l0 \0" |
844 | 59.3k | /* 15973 */ "ae_mulsf32x16.l0 \0" |
845 | 59.3k | /* 15991 */ "ae_mul32x16.l0 \0" |
846 | 59.3k | /* 16007 */ "ae_muls32x16.l0 \0" |
847 | 59.3k | /* 16024 */ "rur.ae_cbegin0 \0" |
848 | 59.3k | /* 16040 */ "wur.ae_cbegin0 \0" |
849 | 59.3k | /* 16056 */ "ae_movad16.1 \0" |
850 | 59.3k | /* 16070 */ "ae_mulaf16ss.11 \0" |
851 | 59.3k | /* 16087 */ "ae_mulf16ss.11 \0" |
852 | 59.3k | /* 16103 */ "ae_mulsf16ss.11 \0" |
853 | 59.3k | /* 16120 */ "ae_mulaf16ss.21 \0" |
854 | 59.3k | /* 16137 */ "ae_mulf16ss.21 \0" |
855 | 59.3k | /* 16153 */ "ae_mulsf16ss.21 \0" |
856 | 59.3k | /* 16170 */ "ae_mulaf16ss.31 \0" |
857 | 59.3k | /* 16187 */ "ae_mulf16ss.31 \0" |
858 | 59.3k | /* 16203 */ "ae_mulsf16ss.31 \0" |
859 | 59.3k | /* 16220 */ "ae_mula32x16.h1 \0" |
860 | 59.3k | /* 16237 */ "ae_mulaf32x16.h1 \0" |
861 | 59.3k | /* 16255 */ "ae_mulf32x16.h1 \0" |
862 | 59.3k | /* 16272 */ "ae_mulsf32x16.h1 \0" |
863 | 59.3k | /* 16290 */ "ae_mul32x16.h1 \0" |
864 | 59.3k | /* 16306 */ "ae_muls32x16.h1 \0" |
865 | 59.3k | /* 16323 */ "ae_mulaad32x16.h0.l1 \0" |
866 | 59.3k | /* 16345 */ "ae_mulzaad32x16.h0.l1 \0" |
867 | 59.3k | /* 16368 */ "ae_mulaafd32x16.h0.l1 \0" |
868 | 59.3k | /* 16391 */ "ae_mulzaafd32x16.h0.l1 \0" |
869 | 59.3k | /* 16415 */ "ae_mula32x16.l1 \0" |
870 | 59.3k | /* 16432 */ "ae_mulaf32x16.l1 \0" |
871 | 59.3k | /* 16450 */ "ae_mulf32x16.l1 \0" |
872 | 59.3k | /* 16467 */ "ae_mulsf32x16.l1 \0" |
873 | 59.3k | /* 16485 */ "ae_mul32x16.l1 \0" |
874 | 59.3k | /* 16501 */ "ae_muls32x16.l1 \0" |
875 | 59.3k | /* 16518 */ "ae_movad16.2 \0" |
876 | 59.3k | /* 16532 */ "ae_mulaafd16ss.13_02 \0" |
877 | 59.3k | /* 16554 */ "ae_mulzaafd16ss.13_02 \0" |
878 | 59.3k | /* 16577 */ "ae_mulssfd16ss.13_02 \0" |
879 | 59.3k | /* 16599 */ "ae_mulzssfd16ss.13_02 \0" |
880 | 59.3k | /* 16622 */ "ae_mulaf16ss.22 \0" |
881 | 59.3k | /* 16639 */ "ae_mulf16ss.22 \0" |
882 | 59.3k | /* 16655 */ "ae_mulsf16ss.22 \0" |
883 | 59.3k | /* 16672 */ "ae_mulaafd16ss.33_22 \0" |
884 | 59.3k | /* 16694 */ "ae_mulzaafd16ss.33_22 \0" |
885 | 59.3k | /* 16717 */ "ae_mulssfd16ss.33_22 \0" |
886 | 59.3k | /* 16739 */ "ae_mulzssfd16ss.33_22 \0" |
887 | 59.3k | /* 16762 */ "ae_sext32x2d16.32 \0" |
888 | 59.3k | /* 16781 */ "ae_cvt32x2f16.32 \0" |
889 | 59.3k | /* 16799 */ "ae_mulaf16ss.32 \0" |
890 | 59.3k | /* 16816 */ "ae_mulf16ss.32 \0" |
891 | 59.3k | /* 16832 */ "ae_mulsf16ss.32 \0" |
892 | 59.3k | /* 16849 */ "ae_sra64_32 \0" |
893 | 59.3k | /* 16862 */ "ae_cvt64a32 \0" |
894 | 59.3k | /* 16875 */ "ae_cvt48a32 \0" |
895 | 59.3k | /* 16888 */ "ae_slaa32 \0" |
896 | 59.3k | /* 16899 */ "ae_sraa32 \0" |
897 | 59.3k | /* 16910 */ "ae_addbrba32 \0" |
898 | 59.3k | /* 16924 */ "ae_movda32 \0" |
899 | 59.3k | /* 16936 */ "ae_sha32 \0" |
900 | 59.3k | /* 16946 */ "ae_srla32 \0" |
901 | 59.3k | /* 16957 */ "ae_sub32 \0" |
902 | 59.3k | /* 16967 */ "ae_addsub32 \0" |
903 | 59.3k | /* 16980 */ "ae_add32 \0" |
904 | 59.3k | /* 16990 */ "ae_subadd32 \0" |
905 | 59.3k | /* 17003 */ "ae_le32 \0" |
906 | 59.3k | /* 17012 */ "ae_neg32 \0" |
907 | 59.3k | /* 17022 */ "ae_slai32 \0" |
908 | 59.3k | /* 17033 */ "ae_srai32 \0" |
909 | 59.3k | /* 17044 */ "ae_srli32 \0" |
910 | 59.3k | /* 17055 */ "ae_min32 \0" |
911 | 59.3k | /* 17065 */ "ae_eq32 \0" |
912 | 59.3k | /* 17074 */ "ae_pksr32 \0" |
913 | 59.3k | /* 17085 */ "ae_slas32 \0" |
914 | 59.3k | /* 17096 */ "ae_sras32 \0" |
915 | 59.3k | /* 17107 */ "ae_abs32 \0" |
916 | 59.3k | /* 17117 */ "ae_srls32 \0" |
917 | 59.3k | /* 17128 */ "ae_lt32 \0" |
918 | 59.3k | /* 17137 */ "ae_sext32 \0" |
919 | 59.3k | /* 17148 */ "ae_max32 \0" |
920 | 59.3k | /* 17158 */ "!movba2 \0" |
921 | 59.3k | /* 17167 */ "ae_mula32x16.h2 \0" |
922 | 59.3k | /* 17184 */ "ae_mulaf32x16.h2 \0" |
923 | 59.3k | /* 17202 */ "ae_mulf32x16.h2 \0" |
924 | 59.3k | /* 17219 */ "ae_mulsf32x16.h2 \0" |
925 | 59.3k | /* 17237 */ "ae_mul32x16.h2 \0" |
926 | 59.3k | /* 17253 */ "ae_muls32x16.h2 \0" |
927 | 59.3k | /* 17270 */ "ae_mulaad32x16.h3.l2 \0" |
928 | 59.3k | /* 17292 */ "ae_mulzaad32x16.h3.l2 \0" |
929 | 59.3k | /* 17315 */ "ae_mulsad32x16.h3.l2 \0" |
930 | 59.3k | /* 17337 */ "ae_mulzsad32x16.h3.l2 \0" |
931 | 59.3k | /* 17360 */ "ae_mulaafd32x16.h3.l2 \0" |
932 | 59.3k | /* 17383 */ "ae_mulzaafd32x16.h3.l2 \0" |
933 | 59.3k | /* 17407 */ "ae_mulsafd32x16.h3.l2 \0" |
934 | 59.3k | /* 17430 */ "ae_mulzsafd32x16.h3.l2 \0" |
935 | 59.3k | /* 17454 */ "ae_mulasfd32x16.h3.l2 \0" |
936 | 59.3k | /* 17477 */ "ae_mulzasfd32x16.h3.l2 \0" |
937 | 59.3k | /* 17501 */ "ae_mulssfd32x16.h3.l2 \0" |
938 | 59.3k | /* 17524 */ "ae_mulzssfd32x16.h3.l2 \0" |
939 | 59.3k | /* 17548 */ "ae_mulasd32x16.h3.l2 \0" |
940 | 59.3k | /* 17570 */ "ae_mulzasd32x16.h3.l2 \0" |
941 | 59.3k | /* 17593 */ "ae_mulssd32x16.h3.l2 \0" |
942 | 59.3k | /* 17615 */ "ae_mulzssd32x16.h3.l2 \0" |
943 | 59.3k | /* 17638 */ "ae_mula32x16.l2 \0" |
944 | 59.3k | /* 17655 */ "ae_mulaf32x16.l2 \0" |
945 | 59.3k | /* 17673 */ "ae_mulf32x16.l2 \0" |
946 | 59.3k | /* 17690 */ "ae_mulsf32x16.l2 \0" |
947 | 59.3k | /* 17708 */ "ae_mul32x16.l2 \0" |
948 | 59.3k | /* 17724 */ "ae_muls32x16.l2 \0" |
949 | 59.3k | /* 17741 */ "!extui_br2 \0" |
950 | 59.3k | /* 17753 */ "ae_mulaf16ss.00_s2 \0" |
951 | 59.3k | /* 17773 */ "ae_mulf16ss.00_s2 \0" |
952 | 59.3k | /* 17792 */ "ae_mulsf16ss.00_s2 \0" |
953 | 59.3k | /* 17812 */ "ae_mulaafd16ss.11_00_s2 \0" |
954 | 59.3k | /* 17837 */ "ae_mulzaafd16ss.11_00_s2 \0" |
955 | 59.3k | /* 17863 */ "ae_mulssfd16ss.11_00_s2 \0" |
956 | 59.3k | /* 17888 */ "ae_mulzssfd16ss.11_00_s2 \0" |
957 | 59.3k | /* 17914 */ "ae_mula32x16.h0_s2 \0" |
958 | 59.3k | /* 17934 */ "ae_mulaf32x16.h0_s2 \0" |
959 | 59.3k | /* 17955 */ "ae_mulf32x16.h0_s2 \0" |
960 | 59.3k | /* 17975 */ "ae_mulsf32x16.h0_s2 \0" |
961 | 59.3k | /* 17996 */ "ae_mul32x16.h0_s2 \0" |
962 | 59.3k | /* 18015 */ "ae_muls32x16.h0_s2 \0" |
963 | 59.3k | /* 18035 */ "ae_mulaad32x16.h1.l0_s2 \0" |
964 | 59.3k | /* 18060 */ "ae_mulzaad32x16.h1.l0_s2 \0" |
965 | 59.3k | /* 18086 */ "ae_mulsad32x16.h1.l0_s2 \0" |
966 | 59.3k | /* 18111 */ "ae_mulzsad32x16.h1.l0_s2 \0" |
967 | 59.3k | /* 18137 */ "ae_mulaafd32x16.h1.l0_s2 \0" |
968 | 59.3k | /* 18163 */ "ae_mulzaafd32x16.h1.l0_s2 \0" |
969 | 59.3k | /* 18190 */ "ae_mulsafd32x16.h1.l0_s2 \0" |
970 | 59.3k | /* 18216 */ "ae_mulzsafd32x16.h1.l0_s2 \0" |
971 | 59.3k | /* 18243 */ "ae_mulasfd32x16.h1.l0_s2 \0" |
972 | 59.3k | /* 18269 */ "ae_mulzasfd32x16.h1.l0_s2 \0" |
973 | 59.3k | /* 18296 */ "ae_mulssfd32x16.h1.l0_s2 \0" |
974 | 59.3k | /* 18322 */ "ae_mulzssfd32x16.h1.l0_s2 \0" |
975 | 59.3k | /* 18349 */ "ae_mulasd32x16.h1.l0_s2 \0" |
976 | 59.3k | /* 18374 */ "ae_mulzasd32x16.h1.l0_s2 \0" |
977 | 59.3k | /* 18400 */ "ae_mulssd32x16.h1.l0_s2 \0" |
978 | 59.3k | /* 18425 */ "ae_mulzssd32x16.h1.l0_s2 \0" |
979 | 59.3k | /* 18451 */ "ae_mula32x16.l0_s2 \0" |
980 | 59.3k | /* 18471 */ "ae_mulaf32x16.l0_s2 \0" |
981 | 59.3k | /* 18492 */ "ae_mulf32x16.l0_s2 \0" |
982 | 59.3k | /* 18512 */ "ae_mulsf32x16.l0_s2 \0" |
983 | 59.3k | /* 18533 */ "ae_mul32x16.l0_s2 \0" |
984 | 59.3k | /* 18552 */ "ae_muls32x16.l0_s2 \0" |
985 | 59.3k | /* 18572 */ "ae_mula32x16.h1_s2 \0" |
986 | 59.3k | /* 18592 */ "ae_mulaf32x16.h1_s2 \0" |
987 | 59.3k | /* 18613 */ "ae_mulf32x16.h1_s2 \0" |
988 | 59.3k | /* 18633 */ "ae_mulsf32x16.h1_s2 \0" |
989 | 59.3k | /* 18654 */ "ae_mul32x16.h1_s2 \0" |
990 | 59.3k | /* 18673 */ "ae_muls32x16.h1_s2 \0" |
991 | 59.3k | /* 18693 */ "ae_mulaad32x16.h0.l1_s2 \0" |
992 | 59.3k | /* 18718 */ "ae_mulzaad32x16.h0.l1_s2 \0" |
993 | 59.3k | /* 18744 */ "ae_mulaafd32x16.h0.l1_s2 \0" |
994 | 59.3k | /* 18770 */ "ae_mulzaafd32x16.h0.l1_s2 \0" |
995 | 59.3k | /* 18797 */ "ae_mula32x16.l1_s2 \0" |
996 | 59.3k | /* 18817 */ "ae_mulaf32x16.l1_s2 \0" |
997 | 59.3k | /* 18838 */ "ae_mulf32x16.l1_s2 \0" |
998 | 59.3k | /* 18858 */ "ae_mulsf32x16.l1_s2 \0" |
999 | 59.3k | /* 18879 */ "ae_mul32x16.l1_s2 \0" |
1000 | 59.3k | /* 18898 */ "ae_muls32x16.l1_s2 \0" |
1001 | 59.3k | /* 18918 */ "ae_mulaafd16ss.13_02_s2 \0" |
1002 | 59.3k | /* 18943 */ "ae_mulzaafd16ss.13_02_s2 \0" |
1003 | 59.3k | /* 18969 */ "ae_mulssfd16ss.13_02_s2 \0" |
1004 | 59.3k | /* 18994 */ "ae_mulzssfd16ss.13_02_s2 \0" |
1005 | 59.3k | /* 19020 */ "ae_mulaafd16ss.33_22_s2 \0" |
1006 | 59.3k | /* 19045 */ "ae_mulzaafd16ss.33_22_s2 \0" |
1007 | 59.3k | /* 19071 */ "ae_mulssfd16ss.33_22_s2 \0" |
1008 | 59.3k | /* 19096 */ "ae_mulzssfd16ss.33_22_s2 \0" |
1009 | 59.3k | /* 19122 */ "ae_mula32x16.h2_s2 \0" |
1010 | 59.3k | /* 19142 */ "ae_mulaf32x16.h2_s2 \0" |
1011 | 59.3k | /* 19163 */ "ae_mulf32x16.h2_s2 \0" |
1012 | 59.3k | /* 19183 */ "ae_mulsf32x16.h2_s2 \0" |
1013 | 59.3k | /* 19204 */ "ae_mul32x16.h2_s2 \0" |
1014 | 59.3k | /* 19223 */ "ae_muls32x16.h2_s2 \0" |
1015 | 59.3k | /* 19243 */ "ae_mulaad32x16.h3.l2_s2 \0" |
1016 | 59.3k | /* 19268 */ "ae_mulzaad32x16.h3.l2_s2 \0" |
1017 | 59.3k | /* 19294 */ "ae_mulsad32x16.h3.l2_s2 \0" |
1018 | 59.3k | /* 19319 */ "ae_mulzsad32x16.h3.l2_s2 \0" |
1019 | 59.3k | /* 19345 */ "ae_mulaafd32x16.h3.l2_s2 \0" |
1020 | 59.3k | /* 19371 */ "ae_mulzaafd32x16.h3.l2_s2 \0" |
1021 | 59.3k | /* 19398 */ "ae_mulsafd32x16.h3.l2_s2 \0" |
1022 | 59.3k | /* 19424 */ "ae_mulzsafd32x16.h3.l2_s2 \0" |
1023 | 59.3k | /* 19451 */ "ae_mulasfd32x16.h3.l2_s2 \0" |
1024 | 59.3k | /* 19477 */ "ae_mulzasfd32x16.h3.l2_s2 \0" |
1025 | 59.3k | /* 19504 */ "ae_mulssfd32x16.h3.l2_s2 \0" |
1026 | 59.3k | /* 19530 */ "ae_mulzssfd32x16.h3.l2_s2 \0" |
1027 | 59.3k | /* 19557 */ "ae_mulasd32x16.h3.l2_s2 \0" |
1028 | 59.3k | /* 19582 */ "ae_mulzasd32x16.h3.l2_s2 \0" |
1029 | 59.3k | /* 19608 */ "ae_mulssd32x16.h3.l2_s2 \0" |
1030 | 59.3k | /* 19633 */ "ae_mulzssd32x16.h3.l2_s2 \0" |
1031 | 59.3k | /* 19659 */ "ae_mula32x16.l2_s2 \0" |
1032 | 59.3k | /* 19679 */ "ae_mulaf32x16.l2_s2 \0" |
1033 | 59.3k | /* 19700 */ "ae_mulf32x16.l2_s2 \0" |
1034 | 59.3k | /* 19720 */ "ae_mulsf32x16.l2_s2 \0" |
1035 | 59.3k | /* 19741 */ "ae_mul32x16.l2_s2 \0" |
1036 | 59.3k | /* 19760 */ "ae_muls32x16.l2_s2 \0" |
1037 | 59.3k | /* 19780 */ "ae_mulap24x2_s2 \0" |
1038 | 59.3k | /* 19797 */ "ae_mulp24x2_s2 \0" |
1039 | 59.3k | /* 19813 */ "ae_mulsp24x2_s2 \0" |
1040 | 59.3k | /* 19830 */ "ae_mula32x16.h3_s2 \0" |
1041 | 59.3k | /* 19850 */ "ae_mulaf32x16.h3_s2 \0" |
1042 | 59.3k | /* 19871 */ "ae_mulf32x16.h3_s2 \0" |
1043 | 59.3k | /* 19891 */ "ae_mulsf32x16.h3_s2 \0" |
1044 | 59.3k | /* 19912 */ "ae_mul32x16.h3_s2 \0" |
1045 | 59.3k | /* 19931 */ "ae_muls32x16.h3_s2 \0" |
1046 | 59.3k | /* 19951 */ "ae_mulaad32x16.h2.l3_s2 \0" |
1047 | 59.3k | /* 19976 */ "ae_mulzaad32x16.h2.l3_s2 \0" |
1048 | 59.3k | /* 20002 */ "ae_mulaafd32x16.h2.l3_s2 \0" |
1049 | 59.3k | /* 20028 */ "ae_mulzaafd32x16.h2.l3_s2 \0" |
1050 | 59.3k | /* 20055 */ "ae_mula32x16.l3_s2 \0" |
1051 | 59.3k | /* 20075 */ "ae_mulaf32x16.l3_s2 \0" |
1052 | 59.3k | /* 20096 */ "ae_mulf32x16.l3_s2 \0" |
1053 | 59.3k | /* 20116 */ "ae_mulsf32x16.l3_s2 \0" |
1054 | 59.3k | /* 20137 */ "ae_mul32x16.l3_s2 \0" |
1055 | 59.3k | /* 20156 */ "ae_muls32x16.l3_s2 \0" |
1056 | 59.3k | /* 20176 */ "ae_mulafp24x2ra_s2 \0" |
1057 | 59.3k | /* 20196 */ "ae_mulfp24x2ra_s2 \0" |
1058 | 59.3k | /* 20215 */ "ae_mulsfp24x2ra_s2 \0" |
1059 | 59.3k | /* 20235 */ "ae_mulafq32sp24s.h_s2 \0" |
1060 | 59.3k | /* 20258 */ "ae_mulfq32sp24s.h_s2 \0" |
1061 | 59.3k | /* 20280 */ "ae_mularfq32sp24s.h_s2 \0" |
1062 | 59.3k | /* 20304 */ "ae_mulrfq32sp24s.h_s2 \0" |
1063 | 59.3k | /* 20327 */ "ae_mulsrfq32sp24s.h_s2 \0" |
1064 | 59.3k | /* 20351 */ "ae_mulsfq32sp24s.h_s2 \0" |
1065 | 59.3k | /* 20374 */ "ae_mulafp32x16x2ras.h_s2 \0" |
1066 | 59.3k | /* 20400 */ "ae_mulfp32x16x2ras.h_s2 \0" |
1067 | 59.3k | /* 20425 */ "ae_mulsfp32x16x2ras.h_s2 \0" |
1068 | 59.3k | /* 20451 */ "ae_mulafp32x16x2rs.h_s2 \0" |
1069 | 59.3k | /* 20476 */ "ae_mulfp32x16x2rs.h_s2 \0" |
1070 | 59.3k | /* 20500 */ "ae_mulsfp32x16x2rs.h_s2 \0" |
1071 | 59.3k | /* 20525 */ "ae_mulas32f48p16s.hh_s2 \0" |
1072 | 59.3k | /* 20550 */ "ae_muls32f48p16s.hh_s2 \0" |
1073 | 59.3k | /* 20574 */ "ae_mulss32f48p16s.hh_s2 \0" |
1074 | 59.3k | /* 20599 */ "ae_mulaad24.hl.lh_s2 \0" |
1075 | 59.3k | /* 20621 */ "ae_mulzaad24.hl.lh_s2 \0" |
1076 | 59.3k | /* 20644 */ "ae_mulaafd24.hl.lh_s2 \0" |
1077 | 59.3k | /* 20667 */ "ae_mulzaafd24.hl.lh_s2 \0" |
1078 | 59.3k | /* 20691 */ "ae_mulasfd24.hl.lh_s2 \0" |
1079 | 59.3k | /* 20714 */ "ae_mulzasfd24.hl.lh_s2 \0" |
1080 | 59.3k | /* 20738 */ "ae_mulssfd24.hl.lh_s2 \0" |
1081 | 59.3k | /* 20761 */ "ae_mulzssfd24.hl.lh_s2 \0" |
1082 | 59.3k | /* 20785 */ "ae_mulasd24.hl.lh_s2 \0" |
1083 | 59.3k | /* 20807 */ "ae_mulzasd24.hl.lh_s2 \0" |
1084 | 59.3k | /* 20830 */ "ae_mulssd24.hl.lh_s2 \0" |
1085 | 59.3k | /* 20852 */ "ae_mulzssd24.hl.lh_s2 \0" |
1086 | 59.3k | /* 20875 */ "ae_mulas32f48p16s.lh_s2 \0" |
1087 | 59.3k | /* 20900 */ "ae_muls32f48p16s.lh_s2 \0" |
1088 | 59.3k | /* 20924 */ "ae_mulss32f48p16s.lh_s2 \0" |
1089 | 59.3k | /* 20949 */ "ae_mulafq32sp24s.l_s2 \0" |
1090 | 59.3k | /* 20972 */ "ae_mulfq32sp24s.l_s2 \0" |
1091 | 59.3k | /* 20994 */ "ae_mularfq32sp24s.l_s2 \0" |
1092 | 59.3k | /* 21018 */ "ae_mulrfq32sp24s.l_s2 \0" |
1093 | 59.3k | /* 21041 */ "ae_mulsrfq32sp24s.l_s2 \0" |
1094 | 59.3k | /* 21065 */ "ae_mulsfq32sp24s.l_s2 \0" |
1095 | 59.3k | /* 21088 */ "ae_mulaf48q32sp16s.l_s2 \0" |
1096 | 59.3k | /* 21113 */ "ae_mulf48q32sp16s.l_s2 \0" |
1097 | 59.3k | /* 21137 */ "ae_mulsf48q32sp16s.l_s2 \0" |
1098 | 59.3k | /* 21162 */ "ae_mulaq32sp16s.l_s2 \0" |
1099 | 59.3k | /* 21184 */ "ae_mulq32sp16s.l_s2 \0" |
1100 | 59.3k | /* 21205 */ "ae_mulsq32sp16s.l_s2 \0" |
1101 | 59.3k | /* 21227 */ "ae_mulafp32x16x2ras.l_s2 \0" |
1102 | 59.3k | /* 21253 */ "ae_mulfp32x16x2ras.l_s2 \0" |
1103 | 59.3k | /* 21278 */ "ae_mulsfp32x16x2ras.l_s2 \0" |
1104 | 59.3k | /* 21304 */ "ae_mulafp32x16x2rs.l_s2 \0" |
1105 | 59.3k | /* 21329 */ "ae_mulfp32x16x2rs.l_s2 \0" |
1106 | 59.3k | /* 21353 */ "ae_mulsfp32x16x2rs.l_s2 \0" |
1107 | 59.3k | /* 21378 */ "ae_mulaf48q32sp16u.l_s2 \0" |
1108 | 59.3k | /* 21403 */ "ae_mulf48q32sp16u.l_s2 \0" |
1109 | 59.3k | /* 21427 */ "ae_mulsf48q32sp16u.l_s2 \0" |
1110 | 59.3k | /* 21452 */ "ae_mulaq32sp16u.l_s2 \0" |
1111 | 59.3k | /* 21474 */ "ae_mulq32sp16u.l_s2 \0" |
1112 | 59.3k | /* 21495 */ "ae_mulsq32sp16u.l_s2 \0" |
1113 | 59.3k | /* 21517 */ "ae_mula32.ll_s2 \0" |
1114 | 59.3k | /* 21534 */ "ae_mul32.ll_s2 \0" |
1115 | 59.3k | /* 21550 */ "ae_mulaad24.hh.ll_s2 \0" |
1116 | 59.3k | /* 21572 */ "ae_mulzaad24.hh.ll_s2 \0" |
1117 | 59.3k | /* 21595 */ "ae_mulsad24.hh.ll_s2 \0" |
1118 | 59.3k | /* 21617 */ "ae_mulzsad24.hh.ll_s2 \0" |
1119 | 59.3k | /* 21640 */ "ae_mulaafd24.hh.ll_s2 \0" |
1120 | 59.3k | /* 21663 */ "ae_mulzaafd24.hh.ll_s2 \0" |
1121 | 59.3k | /* 21687 */ "ae_mulsafd24.hh.ll_s2 \0" |
1122 | 59.3k | /* 21710 */ "ae_mulzsafd24.hh.ll_s2 \0" |
1123 | 59.3k | /* 21734 */ "ae_mulasfd24.hh.ll_s2 \0" |
1124 | 59.3k | /* 21757 */ "ae_mulzasfd24.hh.ll_s2 \0" |
1125 | 59.3k | /* 21781 */ "ae_mulssfd24.hh.ll_s2 \0" |
1126 | 59.3k | /* 21804 */ "ae_mulzssfd24.hh.ll_s2 \0" |
1127 | 59.3k | /* 21828 */ "ae_mulasd24.hh.ll_s2 \0" |
1128 | 59.3k | /* 21850 */ "ae_mulzasd24.hh.ll_s2 \0" |
1129 | 59.3k | /* 21873 */ "ae_mulssd24.hh.ll_s2 \0" |
1130 | 59.3k | /* 21895 */ "ae_mulzssd24.hh.ll_s2 \0" |
1131 | 59.3k | /* 21918 */ "ae_mulaf32r.ll_s2 \0" |
1132 | 59.3k | /* 21937 */ "ae_mulf32r.ll_s2 \0" |
1133 | 59.3k | /* 21955 */ "ae_mulsf32r.ll_s2 \0" |
1134 | 59.3k | /* 21974 */ "ae_mulaf32s.ll_s2 \0" |
1135 | 59.3k | /* 21993 */ "ae_mulf32s.ll_s2 \0" |
1136 | 59.3k | /* 22011 */ "ae_mulas32f48p16s.ll_s2 \0" |
1137 | 59.3k | /* 22036 */ "ae_muls32f48p16s.ll_s2 \0" |
1138 | 59.3k | /* 22060 */ "ae_mulss32f48p16s.ll_s2 \0" |
1139 | 59.3k | /* 22085 */ "ae_mulafp24x2r_s2 \0" |
1140 | 59.3k | /* 22104 */ "ae_mulfp24x2r_s2 \0" |
1141 | 59.3k | /* 22122 */ "ae_mulsfp24x2r_s2 \0" |
1142 | 59.3k | /* 22141 */ "ae_movda32x2 \0" |
1143 | 59.3k | /* 22155 */ "ae_movf32x2 \0" |
1144 | 59.3k | /* 22168 */ "ae_mulap32x2 \0" |
1145 | 59.3k | /* 22182 */ "ae_mulp32x2 \0" |
1146 | 59.3k | /* 22195 */ "ae_mulsp32x2 \0" |
1147 | 59.3k | /* 22209 */ "ae_movt32x2 \0" |
1148 | 59.3k | /* 22222 */ "ae_mulap24x2 \0" |
1149 | 59.3k | /* 22236 */ "ae_mulp24x2 \0" |
1150 | 59.3k | /* 22249 */ "ae_mulsp24x2 \0" |
1151 | 59.3k | /* 22263 */ "ae_movda16x2 \0" |
1152 | 59.3k | /* 22277 */ "ae_movad16.3 \0" |
1153 | 59.3k | /* 22291 */ "ae_mulaf16ss.33 \0" |
1154 | 59.3k | /* 22308 */ "ae_mulf16ss.33 \0" |
1155 | 59.3k | /* 22324 */ "ae_mulsf16ss.33 \0" |
1156 | 59.3k | /* 22341 */ "ae_mula32x16.h3 \0" |
1157 | 59.3k | /* 22358 */ "ae_mulaf32x16.h3 \0" |
1158 | 59.3k | /* 22376 */ "ae_mulf32x16.h3 \0" |
1159 | 59.3k | /* 22393 */ "ae_mulsf32x16.h3 \0" |
1160 | 59.3k | /* 22411 */ "ae_mul32x16.h3 \0" |
1161 | 59.3k | /* 22427 */ "ae_muls32x16.h3 \0" |
1162 | 59.3k | /* 22444 */ "ae_mulaad32x16.h2.l3 \0" |
1163 | 59.3k | /* 22466 */ "ae_mulzaad32x16.h2.l3 \0" |
1164 | 59.3k | /* 22489 */ "ae_mulaafd32x16.h2.l3 \0" |
1165 | 59.3k | /* 22512 */ "ae_mulzaafd32x16.h2.l3 \0" |
1166 | 59.3k | /* 22536 */ "ae_mula32x16.l3 \0" |
1167 | 59.3k | /* 22553 */ "ae_mulaf32x16.l3 \0" |
1168 | 59.3k | /* 22571 */ "ae_mulf32x16.l3 \0" |
1169 | 59.3k | /* 22588 */ "ae_mulsf32x16.l3 \0" |
1170 | 59.3k | /* 22606 */ "ae_mul32x16.l3 \0" |
1171 | 59.3k | /* 22622 */ "ae_muls32x16.l3 \0" |
1172 | 59.3k | /* 22639 */ "ae_mulac24 \0" |
1173 | 59.3k | /* 22651 */ "ae_mulc24 \0" |
1174 | 59.3k | /* 22662 */ "ae_slai24 \0" |
1175 | 59.3k | /* 22673 */ "ae_srai24 \0" |
1176 | 59.3k | /* 22684 */ "ae_srli24 \0" |
1177 | 59.3k | /* 22695 */ "ae_pksr24 \0" |
1178 | 59.3k | /* 22706 */ "ae_slas24 \0" |
1179 | 59.3k | /* 22717 */ "ae_sras24 \0" |
1180 | 59.3k | /* 22728 */ "ae_srls24 \0" |
1181 | 59.3k | /* 22739 */ "ae_slaa64 \0" |
1182 | 59.3k | /* 22750 */ "ae_sraa64 \0" |
1183 | 59.3k | /* 22761 */ "ae_srla64 \0" |
1184 | 59.3k | /* 22772 */ "ae_nsa64 \0" |
1185 | 59.3k | /* 22782 */ "ae_sub64 \0" |
1186 | 59.3k | /* 22792 */ "ae_add64 \0" |
1187 | 59.3k | /* 22802 */ "ae_le64 \0" |
1188 | 59.3k | /* 22811 */ "ae_movf64 \0" |
1189 | 59.3k | /* 22822 */ "ae_neg64 \0" |
1190 | 59.3k | /* 22832 */ "ae_slai64 \0" |
1191 | 59.3k | /* 22843 */ "ae_srai64 \0" |
1192 | 59.3k | /* 22854 */ "ae_srli64 \0" |
1193 | 59.3k | /* 22865 */ "ae_zalign64 \0" |
1194 | 59.3k | /* 22878 */ "ae_min64 \0" |
1195 | 59.3k | /* 22888 */ "ae_eq64 \0" |
1196 | 59.3k | /* 22897 */ "ae_slas64 \0" |
1197 | 59.3k | /* 22908 */ "ae_sras64 \0" |
1198 | 59.3k | /* 22919 */ "ae_abs64 \0" |
1199 | 59.3k | /* 22929 */ "ae_srls64 \0" |
1200 | 59.3k | /* 22940 */ "ae_lt64 \0" |
1201 | 59.3k | /* 22949 */ "ae_movt64 \0" |
1202 | 59.3k | /* 22960 */ "ae_max64 \0" |
1203 | 59.3k | /* 22970 */ "!movba4 \0" |
1204 | 59.3k | /* 22979 */ "!extui_br4 \0" |
1205 | 59.3k | /* 22991 */ "ae_mula16x4 \0" |
1206 | 59.3k | /* 23004 */ "ae_movf16x4 \0" |
1207 | 59.3k | /* 23017 */ "ae_mul16x4 \0" |
1208 | 59.3k | /* 23029 */ "ae_muls16x4 \0" |
1209 | 59.3k | /* 23042 */ "ae_sat16x4 \0" |
1210 | 59.3k | /* 23054 */ "ae_movt16x4 \0" |
1211 | 59.3k | /* 23067 */ "ae_movda16 \0" |
1212 | 59.3k | /* 23079 */ "ae_sub16 \0" |
1213 | 59.3k | /* 23089 */ "ae_add16 \0" |
1214 | 59.3k | /* 23099 */ "ae_le16 \0" |
1215 | 59.3k | /* 23108 */ "ae_srai16 \0" |
1216 | 59.3k | /* 23119 */ "ae_eq16 \0" |
1217 | 59.3k | /* 23128 */ "ae_lt16 \0" |
1218 | 59.3k | /* 23137 */ "ae_slaaq56 \0" |
1219 | 59.3k | /* 23149 */ "ae_slasq56 \0" |
1220 | 59.3k | /* 23161 */ "# SRA_P \0" |
1221 | 59.3k | /* 23170 */ "!L8I_P \0" |
1222 | 59.3k | /* 23178 */ "# SLL_P \0" |
1223 | 59.3k | /* 23187 */ "# SRL_P \0" |
1224 | 59.3k | /* 23196 */ "!movba \0" |
1225 | 59.3k | /* 23204 */ "ae_mulafp24x2ra \0" |
1226 | 59.3k | /* 23221 */ "ae_mulfp24x2ra \0" |
1227 | 59.3k | /* 23237 */ "ae_mulsfp24x2ra \0" |
1228 | 59.3k | /* 23254 */ "ae_mulafc24ra \0" |
1229 | 59.3k | /* 23269 */ "ae_mulfc24ra \0" |
1230 | 59.3k | /* 23283 */ "ae_db \0" |
1231 | 59.3k | /* 23290 */ "ae_lb \0" |
1232 | 59.3k | /* 23297 */ "ae_sb \0" |
1233 | 59.3k | /* 23304 */ "ae_vldl16c \0" |
1234 | 59.3k | /* 23316 */ "ae_vles16c \0" |
1235 | 59.3k | /* 23328 */ "!loopdec \0" |
1236 | 59.3k | /* 23338 */ "ae_la32x2.ic \0" |
1237 | 59.3k | /* 23352 */ "ae_sa32x2.ic \0" |
1238 | 59.3k | /* 23366 */ "ae_la24x2.ic \0" |
1239 | 59.3k | /* 23380 */ "ae_sa24x2.ic \0" |
1240 | 59.3k | /* 23394 */ "ae_la24.ic \0" |
1241 | 59.3k | /* 23406 */ "ae_la32x2f24.ic \0" |
1242 | 59.3k | /* 23423 */ "ae_sa32x2f24.ic \0" |
1243 | 59.3k | /* 23440 */ "ae_la16x4.ic \0" |
1244 | 59.3k | /* 23454 */ "ae_sa16x4.ic \0" |
1245 | 59.3k | /* 23468 */ "ae_db.ic \0" |
1246 | 59.3k | /* 23478 */ "ae_sb.ic \0" |
1247 | 59.3k | /* 23488 */ "ae_vldl16c.ic \0" |
1248 | 59.3k | /* 23503 */ "ae_vles16c.ic \0" |
1249 | 59.3k | /* 23518 */ "ae_sbf.ic \0" |
1250 | 59.3k | /* 23529 */ "ae_dbi.ic \0" |
1251 | 59.3k | /* 23540 */ "ae_sbi.ic \0" |
1252 | 59.3k | /* 23551 */ "ae_sa24.l.ic \0" |
1253 | 59.3k | /* 23565 */ "ae_la32x2.ric \0" |
1254 | 59.3k | /* 23580 */ "ae_sa32x2.ric \0" |
1255 | 59.3k | /* 23595 */ "ae_l32x2.ric \0" |
1256 | 59.3k | /* 23609 */ "ae_s32x2.ric \0" |
1257 | 59.3k | /* 23623 */ "ae_la24x2.ric \0" |
1258 | 59.3k | /* 23638 */ "ae_sa24x2.ric \0" |
1259 | 59.3k | /* 23653 */ "ae_la24.ric \0" |
1260 | 59.3k | /* 23666 */ "ae_la32x2f24.ric \0" |
1261 | 59.3k | /* 23684 */ "ae_sa32x2f24.ric \0" |
1262 | 59.3k | /* 23702 */ "ae_l32x2f24.ric \0" |
1263 | 59.3k | /* 23719 */ "ae_s32x2f24.ric \0" |
1264 | 59.3k | /* 23736 */ "ae_la16x4.ric \0" |
1265 | 59.3k | /* 23751 */ "ae_sa16x4.ric \0" |
1266 | 59.3k | /* 23766 */ "ae_l16x4.ric \0" |
1267 | 59.3k | /* 23780 */ "ae_s16x4.ric \0" |
1268 | 59.3k | /* 23794 */ "ae_sa24.l.ric \0" |
1269 | 59.3k | /* 23809 */ "ae_la32x2neg.pc \0" |
1270 | 59.3k | /* 23826 */ "ae_la24x2neg.pc \0" |
1271 | 59.3k | /* 23843 */ "ae_la24neg.pc \0" |
1272 | 59.3k | /* 23858 */ "ae_la16x4neg.pc \0" |
1273 | 59.3k | /* 23875 */ "ae_la32x2pos.pc \0" |
1274 | 59.3k | /* 23892 */ "ae_la24x2pos.pc \0" |
1275 | 59.3k | /* 23909 */ "ae_la24pos.pc \0" |
1276 | 59.3k | /* 23924 */ "ae_la16x4pos.pc \0" |
1277 | 59.3k | /* 23941 */ "ae_s16.0.xc \0" |
1278 | 59.3k | /* 23954 */ "ae_l32.xc \0" |
1279 | 59.3k | /* 23965 */ "ae_l32x2.xc \0" |
1280 | 59.3k | /* 23978 */ "ae_s32x2.xc \0" |
1281 | 59.3k | /* 23991 */ "ae_l32f24.xc \0" |
1282 | 59.3k | /* 24005 */ "ae_l32x2f24.xc \0" |
1283 | 59.3k | /* 24021 */ "ae_s32x2f24.xc \0" |
1284 | 59.3k | /* 24037 */ "ae_l64.xc \0" |
1285 | 59.3k | /* 24048 */ "ae_s64.xc \0" |
1286 | 59.3k | /* 24059 */ "ae_l16x4.xc \0" |
1287 | 59.3k | /* 24072 */ "ae_s16x4.xc \0" |
1288 | 59.3k | /* 24085 */ "ae_l16.xc \0" |
1289 | 59.3k | /* 24096 */ "ae_s32.l.xc \0" |
1290 | 59.3k | /* 24109 */ "ae_s32f24.l.xc \0" |
1291 | 59.3k | /* 24125 */ "ae_s16m.l.xc \0" |
1292 | 59.3k | /* 24139 */ "ae_l32m.xc \0" |
1293 | 59.3k | /* 24151 */ "ae_s32m.xc \0" |
1294 | 59.3k | /* 24163 */ "ae_l16x2m.xc \0" |
1295 | 59.3k | /* 24177 */ "ae_s16x2m.xc \0" |
1296 | 59.3k | /* 24191 */ "ae_l16m.xc \0" |
1297 | 59.3k | /* 24203 */ "ae_s32ra64s.xc \0" |
1298 | 59.3k | /* 24219 */ "ae_s24ra64s.xc \0" |
1299 | 59.3k | /* 24235 */ "rur.ae_bithead \0" |
1300 | 59.3k | /* 24251 */ "wur.ae_bithead \0" |
1301 | 59.3k | /* 24267 */ "rur.ae_bitsused \0" |
1302 | 59.3k | /* 24284 */ "wur.ae_bitsused \0" |
1303 | 59.3k | /* 24301 */ "ae_and \0" |
1304 | 59.3k | /* 24309 */ "ae_nand \0" |
1305 | 59.3k | /* 24318 */ "!loopend \0" |
1306 | 59.3k | /* 24328 */ "rur.ae_searchdone \0" |
1307 | 59.3k | /* 24347 */ "wur.ae_searchdone \0" |
1308 | 59.3k | /* 24366 */ "rur.ae_tablesize \0" |
1309 | 59.3k | /* 24384 */ "wur.ae_tablesize \0" |
1310 | 59.3k | /* 24402 */ "ae_sbf \0" |
1311 | 59.3k | /* 24410 */ "ae_div64d32.h \0" |
1312 | 59.3k | /* 24425 */ "ae_movad32.h \0" |
1313 | 59.3k | /* 24439 */ "ae_cvt64f32.h \0" |
1314 | 59.3k | /* 24454 */ "ae_mulap32x16x2.h \0" |
1315 | 59.3k | /* 24473 */ "ae_mulp32x16x2.h \0" |
1316 | 59.3k | /* 24491 */ "ae_mulsp32x16x2.h \0" |
1317 | 59.3k | /* 24510 */ "ae_mulac32x16.h \0" |
1318 | 59.3k | /* 24527 */ "ae_mulc32x16.h \0" |
1319 | 59.3k | /* 24543 */ "ae_mulafd24x2.fir.h \0" |
1320 | 59.3k | /* 24564 */ "ae_mulfd24x2.fir.h \0" |
1321 | 59.3k | /* 24584 */ "ae_cvtq56p32s.h \0" |
1322 | 59.3k | /* 24601 */ "ae_cvta32f24s.h \0" |
1323 | 59.3k | /* 24618 */ "ae_mulafp32x16x2ras.h \0" |
1324 | 59.3k | /* 24641 */ "ae_mulfp32x16x2ras.h \0" |
1325 | 59.3k | /* 24663 */ "ae_mulsfp32x16x2ras.h \0" |
1326 | 59.3k | /* 24686 */ "ae_mulafc32x16ras.h \0" |
1327 | 59.3k | /* 24707 */ "ae_mulfc32x16ras.h \0" |
1328 | 59.3k | /* 24727 */ "ae_mulafp32x16x2rs.h \0" |
1329 | 59.3k | /* 24749 */ "ae_mulfp32x16x2rs.h \0" |
1330 | 59.3k | /* 24770 */ "ae_mulsfp32x16x2rs.h \0" |
1331 | 59.3k | /* 24792 */ "ae_mula32.hh \0" |
1332 | 59.3k | /* 24806 */ "ae_mul32.hh \0" |
1333 | 59.3k | /* 24819 */ "ae_muls32.hh \0" |
1334 | 59.3k | /* 24833 */ "ae_mulaf32r.hh \0" |
1335 | 59.3k | /* 24849 */ "ae_mulf32r.hh \0" |
1336 | 59.3k | /* 24864 */ "ae_mulsf32r.hh \0" |
1337 | 59.3k | /* 24880 */ "ae_mulafd32x16x2.fir.hh \0" |
1338 | 59.3k | /* 24905 */ "ae_mulfd32x16x2.fir.hh \0" |
1339 | 59.3k | /* 24929 */ "ae_mulaf32s.hh \0" |
1340 | 59.3k | /* 24945 */ "ae_mulf32s.hh \0" |
1341 | 59.3k | /* 24960 */ "ae_mulsf32s.hh \0" |
1342 | 59.3k | /* 24976 */ "ae_mulas32f48p16s.hh \0" |
1343 | 59.3k | /* 24998 */ "ae_muls32f48p16s.hh \0" |
1344 | 59.3k | /* 25019 */ "ae_mulss32f48p16s.hh \0" |
1345 | 59.3k | /* 25041 */ "ae_mula32.lh \0" |
1346 | 59.3k | /* 25055 */ "ae_mul32.lh \0" |
1347 | 59.3k | /* 25068 */ "ae_muls32.lh \0" |
1348 | 59.3k | /* 25082 */ "ae_mulaad24.hl.lh \0" |
1349 | 59.3k | /* 25101 */ "ae_mulzaad24.hl.lh \0" |
1350 | 59.3k | /* 25121 */ "ae_mulaafd24.hl.lh \0" |
1351 | 59.3k | /* 25141 */ "ae_mulzaafd24.hl.lh \0" |
1352 | 59.3k | /* 25162 */ "ae_mulasfd24.hl.lh \0" |
1353 | 59.3k | /* 25182 */ "ae_mulzasfd24.hl.lh \0" |
1354 | 59.3k | /* 25203 */ "ae_mulssfd24.hl.lh \0" |
1355 | 59.3k | /* 25223 */ "ae_mulzssfd24.hl.lh \0" |
1356 | 59.3k | /* 25244 */ "ae_mulasd24.hl.lh \0" |
1357 | 59.3k | /* 25263 */ "ae_mulzasd24.hl.lh \0" |
1358 | 59.3k | /* 25283 */ "ae_mulssd24.hl.lh \0" |
1359 | 59.3k | /* 25302 */ "ae_mulzssd24.hl.lh \0" |
1360 | 59.3k | /* 25322 */ "ae_mulaf32r.lh \0" |
1361 | 59.3k | /* 25338 */ "ae_mulf32r.lh \0" |
1362 | 59.3k | /* 25353 */ "ae_mulsf32r.lh \0" |
1363 | 59.3k | /* 25369 */ "ae_mulafd32x16x2.fir.lh \0" |
1364 | 59.3k | /* 25394 */ "ae_mulfd32x16x2.fir.lh \0" |
1365 | 59.3k | /* 25418 */ "ae_mulaf32s.lh \0" |
1366 | 59.3k | /* 25434 */ "ae_mulf32s.lh \0" |
1367 | 59.3k | /* 25449 */ "ae_mulsf32s.lh \0" |
1368 | 59.3k | /* 25465 */ "ae_mulas32f48p16s.lh \0" |
1369 | 59.3k | /* 25487 */ "ae_muls32f48p16s.lh \0" |
1370 | 59.3k | /* 25508 */ "ae_mulss32f48p16s.lh \0" |
1371 | 59.3k | /* 25530 */ "ae_add32_hl_lh \0" |
1372 | 59.3k | /* 25546 */ "ae_s16.0.i \0" |
1373 | 59.3k | /* 25558 */ "ae_l32.i \0" |
1374 | 59.3k | /* 25568 */ "ae_l32x2.i \0" |
1375 | 59.3k | /* 25580 */ "ae_s32x2.i \0" |
1376 | 59.3k | /* 25592 */ "ae_l32f24.i \0" |
1377 | 59.3k | /* 25605 */ "ae_l32x2f24.i \0" |
1378 | 59.3k | /* 25620 */ "ae_s32x2f24.i \0" |
1379 | 59.3k | /* 25635 */ "ae_l64.i \0" |
1380 | 59.3k | /* 25645 */ "ae_lalign64.i \0" |
1381 | 59.3k | /* 25660 */ "ae_salign64.i \0" |
1382 | 59.3k | /* 25675 */ "ae_s64.i \0" |
1383 | 59.3k | /* 25685 */ "ae_l16x4.i \0" |
1384 | 59.3k | /* 25697 */ "ae_s16x4.i \0" |
1385 | 59.3k | /* 25709 */ "ae_l16.i \0" |
1386 | 59.3k | /* 25719 */ "ae_s32.l.i \0" |
1387 | 59.3k | /* 25731 */ "ae_s32f24.l.i \0" |
1388 | 59.3k | /* 25746 */ "ae_s16m.l.i \0" |
1389 | 59.3k | /* 25759 */ "ae_l32m.i \0" |
1390 | 59.3k | /* 25770 */ "ae_s32m.i \0" |
1391 | 59.3k | /* 25781 */ "ae_l16x2m.i \0" |
1392 | 59.3k | /* 25794 */ "ae_s16x2m.i \0" |
1393 | 59.3k | /* 25807 */ "ae_l16m.i \0" |
1394 | 59.3k | /* 25818 */ "ae_s32ra64s.i \0" |
1395 | 59.3k | /* 25833 */ "ae_s24ra64s.i \0" |
1396 | 59.3k | /* 25848 */ "ae_sel16i \0" |
1397 | 59.3k | /* 25859 */ "ae_dbi \0" |
1398 | 59.3k | /* 25867 */ "ae_lbi \0" |
1399 | 59.3k | /* 25875 */ "ae_sbi \0" |
1400 | 59.3k | /* 25883 */ "ae_lbki \0" |
1401 | 59.3k | /* 25892 */ "ae_lbsi \0" |
1402 | 59.3k | /* 25901 */ "ae_movi \0" |
1403 | 59.3k | /* 25910 */ "ae_lbk \0" |
1404 | 59.3k | /* 25918 */ "ae_div64d32.l \0" |
1405 | 59.3k | /* 25933 */ "ae_movad32.l \0" |
1406 | 59.3k | /* 25947 */ "ae_nsaz32.l \0" |
1407 | 59.3k | /* 25960 */ "ae_mulap32x16x2.l \0" |
1408 | 59.3k | /* 25979 */ "ae_mulp32x16x2.l \0" |
1409 | 59.3k | /* 25997 */ "ae_mulsp32x16x2.l \0" |
1410 | 59.3k | /* 26016 */ "ae_mulac32x16.l \0" |
1411 | 59.3k | /* 26033 */ "ae_mulc32x16.l \0" |
1412 | 59.3k | /* 26049 */ "ae_mulafd24x2.fir.l \0" |
1413 | 59.3k | /* 26070 */ "ae_mulfd24x2.fir.l \0" |
1414 | 59.3k | /* 26090 */ "ae_cvtq56p32s.l \0" |
1415 | 59.3k | /* 26107 */ "ae_cvta32f24s.l \0" |
1416 | 59.3k | /* 26124 */ "ae_trunca32f64s.l \0" |
1417 | 59.3k | /* 26143 */ "ae_trunci32f64s.l \0" |
1418 | 59.3k | /* 26162 */ "ae_mulaf48q32sp16s.l \0" |
1419 | 59.3k | /* 26184 */ "ae_mulf48q32sp16s.l \0" |
1420 | 59.3k | /* 26205 */ "ae_mulsf48q32sp16s.l \0" |
1421 | 59.3k | /* 26227 */ "ae_mulafp32x16x2ras.l \0" |
1422 | 59.3k | /* 26250 */ "ae_mulfp32x16x2ras.l \0" |
1423 | 59.3k | /* 26272 */ "ae_mulsfp32x16x2ras.l \0" |
1424 | 59.3k | /* 26295 */ "ae_mulafc32x16ras.l \0" |
1425 | 59.3k | /* 26316 */ "ae_mulfc32x16ras.l \0" |
1426 | 59.3k | /* 26336 */ "ae_mulafp32x16x2rs.l \0" |
1427 | 59.3k | /* 26358 */ "ae_mulfp32x16x2rs.l \0" |
1428 | 59.3k | /* 26379 */ "ae_mulsfp32x16x2rs.l \0" |
1429 | 59.3k | /* 26401 */ "ae_mulaf48q32sp16u.l \0" |
1430 | 59.3k | /* 26423 */ "ae_mulf48q32sp16u.l \0" |
1431 | 59.3k | /* 26444 */ "ae_mulsf48q32sp16u.l \0" |
1432 | 59.3k | /* 26466 */ "ae_mulafd32x16x2.fir.hl \0" |
1433 | 59.3k | /* 26491 */ "ae_mulfd32x16x2.fir.hl \0" |
1434 | 59.3k | /* 26515 */ "ae_mula32.ll \0" |
1435 | 59.3k | /* 26529 */ "ae_mul32.ll \0" |
1436 | 59.3k | /* 26542 */ "ae_muls32.ll \0" |
1437 | 59.3k | /* 26556 */ "ae_mulaad24.hh.ll \0" |
1438 | 59.3k | /* 26575 */ "ae_mulzaad24.hh.ll \0" |
1439 | 59.3k | /* 26595 */ "ae_mulsad24.hh.ll \0" |
1440 | 59.3k | /* 26614 */ "ae_mulzsad24.hh.ll \0" |
1441 | 59.3k | /* 26634 */ "ae_mulaafd24.hh.ll \0" |
1442 | 59.3k | /* 26654 */ "ae_mulzaafd24.hh.ll \0" |
1443 | 59.3k | /* 26675 */ "ae_mulsafd24.hh.ll \0" |
1444 | 59.3k | /* 26695 */ "ae_mulzsafd24.hh.ll \0" |
1445 | 59.3k | /* 26716 */ "ae_mulasfd24.hh.ll \0" |
1446 | 59.3k | /* 26736 */ "ae_mulzasfd24.hh.ll \0" |
1447 | 59.3k | /* 26757 */ "ae_mulssfd24.hh.ll \0" |
1448 | 59.3k | /* 26777 */ "ae_mulzssfd24.hh.ll \0" |
1449 | 59.3k | /* 26798 */ "ae_mulasd24.hh.ll \0" |
1450 | 59.3k | /* 26817 */ "ae_mulzasd24.hh.ll \0" |
1451 | 59.3k | /* 26837 */ "ae_mulssd24.hh.ll \0" |
1452 | 59.3k | /* 26856 */ "ae_mulzssd24.hh.ll \0" |
1453 | 59.3k | /* 26876 */ "ae_mulaf32r.ll \0" |
1454 | 59.3k | /* 26892 */ "ae_mulf32r.ll \0" |
1455 | 59.3k | /* 26907 */ "ae_mulsf32r.ll \0" |
1456 | 59.3k | /* 26923 */ "ae_mulafd32x16x2.fir.ll \0" |
1457 | 59.3k | /* 26948 */ "ae_mulfd32x16x2.fir.ll \0" |
1458 | 59.3k | /* 26972 */ "ae_mulaf32s.ll \0" |
1459 | 59.3k | /* 26988 */ "ae_mulf32s.ll \0" |
1460 | 59.3k | /* 27003 */ "ae_mulsf32s.ll \0" |
1461 | 59.3k | /* 27019 */ "ae_mulas32f48p16s.ll \0" |
1462 | 59.3k | /* 27041 */ "ae_muls32f48p16s.ll \0" |
1463 | 59.3k | /* 27062 */ "ae_mulss32f48p16s.ll \0" |
1464 | 59.3k | /* 27084 */ "ae_mula32u.ll \0" |
1465 | 59.3k | /* 27099 */ "ae_mul32u.ll \0" |
1466 | 59.3k | /* 27113 */ "ae_muls32u.ll \0" |
1467 | 59.3k | /* 27128 */ "!restore_bool \0" |
1468 | 59.3k | /* 27143 */ "!spill_bool \0" |
1469 | 59.3k | /* 27156 */ "ae_roundsp16q48x2sym \0" |
1470 | 59.3k | /* 27178 */ "ae_roundsp16f24sym \0" |
1471 | 59.3k | /* 27198 */ "ae_roundsq32f48sym \0" |
1472 | 59.3k | /* 27218 */ "ae_roundsp16q48x2asym \0" |
1473 | 59.3k | /* 27241 */ "ae_roundsp16f24asym \0" |
1474 | 59.3k | /* 27262 */ "ae_roundsq32f48asym \0" |
1475 | 59.3k | /* 27283 */ "ae_round16x4f32sasym \0" |
1476 | 59.3k | /* 27305 */ "ae_round32x2f64sasym \0" |
1477 | 59.3k | /* 27327 */ "ae_round32x2f48sasym \0" |
1478 | 59.3k | /* 27349 */ "ae_round24x2f48sasym \0" |
1479 | 59.3k | /* 27371 */ "ae_round16x4f32ssym \0" |
1480 | 59.3k | /* 27392 */ "ae_round32x2f64ssym \0" |
1481 | 59.3k | /* 27413 */ "ae_round32x2f48ssym \0" |
1482 | 59.3k | /* 27434 */ "ae_round24x2f48ssym \0" |
1483 | 59.3k | /* 27455 */ "ae_sel16i.n \0" |
1484 | 59.3k | /* 27468 */ "ae_movalign \0" |
1485 | 59.3k | /* 27481 */ "rur.ae_cw_sd_no \0" |
1486 | 59.3k | /* 27498 */ "wur.ae_cw_sd_no \0" |
1487 | 59.3k | /* 27515 */ "rur.ae_cwrap \0" |
1488 | 59.3k | /* 27529 */ "wur.ae_cwrap \0" |
1489 | 59.3k | /* 27543 */ "ae_shortswap \0" |
1490 | 59.3k | /* 27557 */ "rur.ae_ts_fts_bu_bp \0" |
1491 | 59.3k | /* 27578 */ "wur.ae_ts_fts_bu_bp \0" |
1492 | 59.3k | /* 27599 */ "ae_sa64neg.fp \0" |
1493 | 59.3k | /* 27614 */ "ae_sa64pos.fp \0" |
1494 | 59.3k | /* 27629 */ "!brcc_fp \0" |
1495 | 59.3k | /* 27639 */ "!select_cc_fp_fp \0" |
1496 | 59.3k | /* 27657 */ "!select_cc_int_fp \0" |
1497 | 59.3k | /* 27676 */ "ae_s16.0.ip \0" |
1498 | 59.3k | /* 27689 */ "ae_l32.ip \0" |
1499 | 59.3k | /* 27700 */ "ae_la32x2.ip \0" |
1500 | 59.3k | /* 27714 */ "ae_sa32x2.ip \0" |
1501 | 59.3k | /* 27728 */ "ae_l32x2.ip \0" |
1502 | 59.3k | /* 27741 */ "ae_s32x2.ip \0" |
1503 | 59.3k | /* 27754 */ "ae_la24x2.ip \0" |
1504 | 59.3k | /* 27768 */ "ae_sa24x2.ip \0" |
1505 | 59.3k | /* 27782 */ "ae_la24.ip \0" |
1506 | 59.3k | /* 27794 */ "ae_l32f24.ip \0" |
1507 | 59.3k | /* 27808 */ "ae_la32x2f24.ip \0" |
1508 | 59.3k | /* 27825 */ "ae_sa32x2f24.ip \0" |
1509 | 59.3k | /* 27842 */ "ae_l32x2f24.ip \0" |
1510 | 59.3k | /* 27858 */ "ae_s32x2f24.ip \0" |
1511 | 59.3k | /* 27874 */ "ae_l64.ip \0" |
1512 | 59.3k | /* 27885 */ "ae_s64.ip \0" |
1513 | 59.3k | /* 27896 */ "ae_la16x4.ip \0" |
1514 | 59.3k | /* 27910 */ "ae_sa16x4.ip \0" |
1515 | 59.3k | /* 27924 */ "ae_l16x4.ip \0" |
1516 | 59.3k | /* 27937 */ "ae_s16x4.ip \0" |
1517 | 59.3k | /* 27950 */ "ae_l16.ip \0" |
1518 | 59.3k | /* 27961 */ "ae_db.ip \0" |
1519 | 59.3k | /* 27971 */ "ae_sb.ip \0" |
1520 | 59.3k | /* 27981 */ "ae_vldl16c.ip \0" |
1521 | 59.3k | /* 27996 */ "ae_vles16c.ip \0" |
1522 | 59.3k | /* 28011 */ "ae_sbf.ip \0" |
1523 | 59.3k | /* 28022 */ "ae_dbi.ip \0" |
1524 | 59.3k | /* 28033 */ "ae_sbi.ip \0" |
1525 | 59.3k | /* 28044 */ "ae_s32.l.ip \0" |
1526 | 59.3k | /* 28057 */ "ae_sa24.l.ip \0" |
1527 | 59.3k | /* 28071 */ "ae_s32f24.l.ip \0" |
1528 | 59.3k | /* 28087 */ "ae_s32ra64s.ip \0" |
1529 | 59.3k | /* 28103 */ "ae_s32x2ra64s.ip \0" |
1530 | 59.3k | /* 28121 */ "ae_s24x2ra64s.ip \0" |
1531 | 59.3k | /* 28139 */ "ae_s24ra64s.ip \0" |
1532 | 59.3k | /* 28155 */ "ae_la32x2.rip \0" |
1533 | 59.3k | /* 28170 */ "ae_sa32x2.rip \0" |
1534 | 59.3k | /* 28185 */ "ae_l32x2.rip \0" |
1535 | 59.3k | /* 28199 */ "ae_s32x2.rip \0" |
1536 | 59.3k | /* 28213 */ "ae_la24x2.rip \0" |
1537 | 59.3k | /* 28228 */ "ae_sa24x2.rip \0" |
1538 | 59.3k | /* 28243 */ "ae_la24.rip \0" |
1539 | 59.3k | /* 28256 */ "ae_la32x2f24.rip \0" |
1540 | 59.3k | /* 28274 */ "ae_sa32x2f24.rip \0" |
1541 | 59.3k | /* 28292 */ "ae_l32x2f24.rip \0" |
1542 | 59.3k | /* 28309 */ "ae_s32x2f24.rip \0" |
1543 | 59.3k | /* 28326 */ "ae_la16x4.rip \0" |
1544 | 59.3k | /* 28341 */ "ae_sa16x4.rip \0" |
1545 | 59.3k | /* 28356 */ "ae_l16x4.rip \0" |
1546 | 59.3k | /* 28370 */ "ae_s16x4.rip \0" |
1547 | 59.3k | /* 28384 */ "ae_sa24.l.rip \0" |
1548 | 59.3k | /* 28399 */ "ae_la64.pp \0" |
1549 | 59.3k | /* 28411 */ "ae_s16.0.xp \0" |
1550 | 59.3k | /* 28424 */ "ae_l32.xp \0" |
1551 | 59.3k | /* 28435 */ "ae_l32x2.xp \0" |
1552 | 59.3k | /* 28448 */ "ae_s32x2.xp \0" |
1553 | 59.3k | /* 28461 */ "ae_l32f24.xp \0" |
1554 | 59.3k | /* 28475 */ "ae_l32x2f24.xp \0" |
1555 | 59.3k | /* 28491 */ "ae_s32x2f24.xp \0" |
1556 | 59.3k | /* 28507 */ "ae_l64.xp \0" |
1557 | 59.3k | /* 28518 */ "ae_s64.xp \0" |
1558 | 59.3k | /* 28529 */ "ae_l16x4.xp \0" |
1559 | 59.3k | /* 28542 */ "ae_s16x4.xp \0" |
1560 | 59.3k | /* 28555 */ "ae_l16.xp \0" |
1561 | 59.3k | /* 28566 */ "ae_s32.l.xp \0" |
1562 | 59.3k | /* 28579 */ "ae_s32f24.l.xp \0" |
1563 | 59.3k | /* 28595 */ "ae_s32ra64s.xp \0" |
1564 | 59.3k | /* 28611 */ "ae_s24ra64s.xp \0" |
1565 | 59.3k | /* 28627 */ "ae_srai32r \0" |
1566 | 59.3k | /* 28639 */ "ae_mulafp24x2r \0" |
1567 | 59.3k | /* 28655 */ "ae_mulfp24x2r \0" |
1568 | 59.3k | /* 28670 */ "ae_mulsfp24x2r \0" |
1569 | 59.3k | /* 28686 */ "ae_srai16r \0" |
1570 | 59.3k | /* 28698 */ "rur.ae_sar \0" |
1571 | 59.3k | /* 28710 */ "wur.ae_sar \0" |
1572 | 59.3k | /* 28722 */ "rur.ae_ovf_sar \0" |
1573 | 59.3k | /* 28738 */ "wur.ae_ovf_sar \0" |
1574 | 59.3k | /* 28754 */ "!slli_br \0" |
1575 | 59.3k | /* 28764 */ "!extui_br \0" |
1576 | 59.3k | /* 28775 */ "!loopbr \0" |
1577 | 59.3k | /* 28784 */ "ae_or \0" |
1578 | 59.3k | /* 28791 */ "ae_xor \0" |
1579 | 59.3k | /* 28799 */ "rur.ae_bitptr \0" |
1580 | 59.3k | /* 28814 */ "wur.ae_bitptr \0" |
1581 | 59.3k | /* 28829 */ "ae_cvtq56a32s \0" |
1582 | 59.3k | /* 28844 */ "ae_slaa32s \0" |
1583 | 59.3k | /* 28856 */ "ae_sraa32s \0" |
1584 | 59.3k | /* 28868 */ "ae_sub32s \0" |
1585 | 59.3k | /* 28879 */ "ae_addsub32s \0" |
1586 | 59.3k | /* 28893 */ "ae_add32s \0" |
1587 | 59.3k | /* 28904 */ "ae_subadd32s \0" |
1588 | 59.3k | /* 28918 */ "ae_neg32s \0" |
1589 | 59.3k | /* 28929 */ "ae_slai32s \0" |
1590 | 59.3k | /* 28941 */ "ae_slas32s \0" |
1591 | 59.3k | /* 28953 */ "ae_abs32s \0" |
1592 | 59.3k | /* 28964 */ "ae_minabs32s \0" |
1593 | 59.3k | /* 28978 */ "ae_maxabs32s \0" |
1594 | 59.3k | /* 28992 */ "ae_sub24s \0" |
1595 | 59.3k | /* 29003 */ "ae_add24s \0" |
1596 | 59.3k | /* 29014 */ "ae_neg24s \0" |
1597 | 59.3k | /* 29025 */ "ae_slai24s \0" |
1598 | 59.3k | /* 29037 */ "ae_slas24s \0" |
1599 | 59.3k | /* 29049 */ "ae_abs24s \0" |
1600 | 59.3k | /* 29060 */ "ae_sat24s \0" |
1601 | 59.3k | /* 29071 */ "ae_slaa64s \0" |
1602 | 59.3k | /* 29083 */ "ae_sub64s \0" |
1603 | 59.3k | /* 29094 */ "ae_add64s \0" |
1604 | 59.3k | /* 29105 */ "ae_trunca32x2f64s \0" |
1605 | 59.3k | /* 29124 */ "ae_trunci32x2f64s \0" |
1606 | 59.3k | /* 29143 */ "ae_neg64s \0" |
1607 | 59.3k | /* 29154 */ "ae_slai64s \0" |
1608 | 59.3k | /* 29166 */ "ae_slas64s \0" |
1609 | 59.3k | /* 29178 */ "ae_abs64s \0" |
1610 | 59.3k | /* 29189 */ "ae_minabs64s \0" |
1611 | 59.3k | /* 29203 */ "ae_maxabs64s \0" |
1612 | 59.3k | /* 29217 */ "ae_mulfp16x4s \0" |
1613 | 59.3k | /* 29232 */ "ae_slaa16s \0" |
1614 | 59.3k | /* 29244 */ "ae_sraa16s \0" |
1615 | 59.3k | /* 29256 */ "ae_sub16s \0" |
1616 | 59.3k | /* 29267 */ "ae_add16s \0" |
1617 | 59.3k | /* 29278 */ "ae_neg16s \0" |
1618 | 59.3k | /* 29289 */ "ae_slai16s \0" |
1619 | 59.3k | /* 29301 */ "ae_abs16s \0" |
1620 | 59.3k | /* 29312 */ "ae_slaisq56s \0" |
1621 | 59.3k | /* 29326 */ "ae_slassq56s \0" |
1622 | 59.3k | /* 29340 */ "ae_satq56s \0" |
1623 | 59.3k | /* 29352 */ "ae_sat48s \0" |
1624 | 59.3k | /* 29363 */ "ae_mulafp32x2ras \0" |
1625 | 59.3k | /* 29381 */ "ae_mulfp32x2ras \0" |
1626 | 59.3k | /* 29398 */ "ae_mulsfp32x2ras \0" |
1627 | 59.3k | /* 29416 */ "ae_mulfp16x4ras \0" |
1628 | 59.3k | /* 29433 */ "ae_lbs \0" |
1629 | 59.3k | /* 29441 */ "ae_sraa32rs \0" |
1630 | 59.3k | /* 29454 */ "ae_mulafp32x2rs \0" |
1631 | 59.3k | /* 29471 */ "ae_mulfp32x2rs \0" |
1632 | 59.3k | /* 29487 */ "ae_mulsfp32x2rs \0" |
1633 | 59.3k | /* 29504 */ "ae_sraa16rs \0" |
1634 | 59.3k | /* 29517 */ "ae_mulaf16x4ss \0" |
1635 | 59.3k | /* 29533 */ "ae_mulf16x4ss \0" |
1636 | 59.3k | /* 29548 */ "ae_mulsf16x4ss \0" |
1637 | 59.3k | /* 29564 */ "rur.ae_first_ts \0" |
1638 | 59.3k | /* 29581 */ "wur.ae_first_ts \0" |
1639 | 59.3k | /* 29598 */ "ae_vldl32t \0" |
1640 | 59.3k | /* 29610 */ "ae_vlel32t \0" |
1641 | 59.3k | /* 29622 */ "ae_vldl16t \0" |
1642 | 59.3k | /* 29634 */ "ae_vlel16t \0" |
1643 | 59.3k | /* 29646 */ "!select \0" |
1644 | 59.3k | /* 29655 */ "rur.ae_nextoffset \0" |
1645 | 59.3k | /* 29674 */ "wur.ae_nextoffset \0" |
1646 | 59.3k | /* 29693 */ "ae_vldsht \0" |
1647 | 59.3k | /* 29704 */ "!loopinit \0" |
1648 | 59.3k | /* 29715 */ "!select_cc_fp_int \0" |
1649 | 59.3k | /* 29734 */ "!loopstart \0" |
1650 | 59.3k | /* 29746 */ "ae_s16m.l.iu \0" |
1651 | 59.3k | /* 29760 */ "ae_l32m.iu \0" |
1652 | 59.3k | /* 29772 */ "ae_s32m.iu \0" |
1653 | 59.3k | /* 29784 */ "ae_l16x2m.iu \0" |
1654 | 59.3k | /* 29798 */ "ae_s16x2m.iu \0" |
1655 | 59.3k | /* 29812 */ "ae_l16m.iu \0" |
1656 | 59.3k | /* 29824 */ "ae_s16m.l.xu \0" |
1657 | 59.3k | /* 29838 */ "ae_l32m.xu \0" |
1658 | 59.3k | /* 29850 */ "ae_s32m.xu \0" |
1659 | 59.3k | /* 29862 */ "ae_l16x2m.xu \0" |
1660 | 59.3k | /* 29876 */ "ae_s16x2m.xu \0" |
1661 | 59.3k | /* 29890 */ "ae_l16m.xu \0" |
1662 | 59.3k | /* 29902 */ "ae_mov \0" |
1663 | 59.3k | /* 29910 */ "rur.ae_overflow \0" |
1664 | 59.3k | /* 29927 */ "wur.ae_overflow \0" |
1665 | 59.3k | /* 29944 */ "ae_s16.0.x \0" |
1666 | 59.3k | /* 29956 */ "ae_l32.x \0" |
1667 | 59.3k | /* 29966 */ "ae_l32x2.x \0" |
1668 | 59.3k | /* 29978 */ "ae_s32x2.x \0" |
1669 | 59.3k | /* 29990 */ "ae_l32f24.x \0" |
1670 | 59.3k | /* 30003 */ "ae_l32x2f24.x \0" |
1671 | 59.3k | /* 30018 */ "ae_s32x2f24.x \0" |
1672 | 59.3k | /* 30033 */ "ae_l64.x \0" |
1673 | 59.3k | /* 30043 */ "ae_s64.x \0" |
1674 | 59.3k | /* 30053 */ "ae_l16x4.x \0" |
1675 | 59.3k | /* 30065 */ "ae_s16x4.x \0" |
1676 | 59.3k | /* 30077 */ "ae_l16.x \0" |
1677 | 59.3k | /* 30087 */ "ae_s32.l.x \0" |
1678 | 59.3k | /* 30099 */ "ae_s32f24.l.x \0" |
1679 | 59.3k | /* 30114 */ "ae_s16m.l.x \0" |
1680 | 59.3k | /* 30127 */ "ae_l32m.x \0" |
1681 | 59.3k | /* 30138 */ "ae_s32m.x \0" |
1682 | 59.3k | /* 30149 */ "ae_l16x2m.x \0" |
1683 | 59.3k | /* 30162 */ "ae_s16x2m.x \0" |
1684 | 59.3k | /* 30175 */ "ae_l16m.x \0" |
1685 | 59.3k | /* 30186 */ "ae_s32ra64s.x \0" |
1686 | 59.3k | /* 30201 */ "ae_s24ra64s.x \0" |
1687 | 59.3k | /* 30216 */ "# XRay Function Patchable RET.\0" |
1688 | 59.3k | /* 30247 */ "# XRay Typed Event Log.\0" |
1689 | 59.3k | /* 30271 */ "# XRay Custom Event Log.\0" |
1690 | 59.3k | /* 30296 */ "# XRay Function Enter.\0" |
1691 | 59.3k | /* 30319 */ "# XRay Tail Call Exit.\0" |
1692 | 59.3k | /* 30342 */ "# XRay Function Exit.\0" |
1693 | 59.3k | /* 30364 */ "LIFETIME_END\0" |
1694 | 59.3k | /* 30377 */ "PSEUDO_PROBE\0" |
1695 | 59.3k | /* 30390 */ "BUNDLE\0" |
1696 | 59.3k | /* 30397 */ "DBG_VALUE\0" |
1697 | 59.3k | /* 30407 */ "DBG_INSTR_REF\0" |
1698 | 59.3k | /* 30421 */ "DBG_PHI\0" |
1699 | 59.3k | /* 30429 */ "DBG_LABEL\0" |
1700 | 59.3k | /* 30439 */ "#ADJCALLSTACKDOWN\0" |
1701 | 59.3k | /* 30457 */ "#ADJCALLSTACKUP\0" |
1702 | 59.3k | /* 30473 */ "LIFETIME_START\0" |
1703 | 59.3k | /* 30488 */ "DBG_VALUE_LIST\0" |
1704 | 59.3k | /* 30503 */ "dsync\0" |
1705 | 59.3k | /* 30509 */ "esync\0" |
1706 | 59.3k | /* 30515 */ "isync\0" |
1707 | 59.3k | /* 30521 */ "rsync\0" |
1708 | 59.3k | /* 30527 */ "rfde\0" |
1709 | 59.3k | /* 30532 */ "rfe\0" |
1710 | 59.3k | /* 30536 */ "# FEntry call\0" |
1711 | 59.3k | /* 30550 */ "simcall\0" |
1712 | 59.3k | /* 30558 */ "syscall\0" |
1713 | 59.3k | /* 30566 */ "ill\0" |
1714 | 59.3k | /* 30570 */ "ill.n\0" |
1715 | 59.3k | /* 30576 */ "ret.n\0" |
1716 | 59.3k | /* 30582 */ "retw.n\0" |
1717 | 59.3k | /* 30589 */ "foo\0" |
1718 | 59.3k | /* 30593 */ "rfwo\0" |
1719 | 59.3k | /* 30598 */ "!xtensa_ee_zero_qacc_p\0" |
1720 | 59.3k | /* 30621 */ "!xtensa_ee_zero_accx_p\0" |
1721 | 59.3k | /* 30644 */ "nop\0" |
1722 | 59.3k | /* 30648 */ "ret\0" |
1723 | 59.3k | /* 30652 */ "rfwu\0" |
1724 | 59.3k | /* 30657 */ "excw\0" |
1725 | 59.3k | /* 30662 */ "memw\0" |
1726 | 59.3k | /* 30667 */ "retw\0" |
1727 | 59.3k | /* 30672 */ "extw\0" |
1728 | 59.3k | }; |
1729 | 59.3k | #endif // CAPSTONE_DIET |
1730 | | |
1731 | 59.3k | static const uint32_t OpInfo0[] = { |
1732 | 59.3k | 0U, // PHI |
1733 | 59.3k | 0U, // INLINEASM |
1734 | 59.3k | 0U, // INLINEASM_BR |
1735 | 59.3k | 0U, // CFI_INSTRUCTION |
1736 | 59.3k | 0U, // EH_LABEL |
1737 | 59.3k | 0U, // GC_LABEL |
1738 | 59.3k | 0U, // ANNOTATION_LABEL |
1739 | 59.3k | 0U, // KILL |
1740 | 59.3k | 0U, // EXTRACT_SUBREG |
1741 | 59.3k | 0U, // INSERT_SUBREG |
1742 | 59.3k | 0U, // IMPLICIT_DEF |
1743 | 59.3k | 0U, // SUBREG_TO_REG |
1744 | 59.3k | 0U, // COPY_TO_REGCLASS |
1745 | 59.3k | 30398U, // DBG_VALUE |
1746 | 59.3k | 30489U, // DBG_VALUE_LIST |
1747 | 59.3k | 30408U, // DBG_INSTR_REF |
1748 | 59.3k | 30422U, // DBG_PHI |
1749 | 59.3k | 30430U, // DBG_LABEL |
1750 | 59.3k | 0U, // REG_SEQUENCE |
1751 | 59.3k | 0U, // COPY |
1752 | 59.3k | 30391U, // BUNDLE |
1753 | 59.3k | 30474U, // LIFETIME_START |
1754 | 59.3k | 30365U, // LIFETIME_END |
1755 | 59.3k | 30378U, // PSEUDO_PROBE |
1756 | 59.3k | 0U, // ARITH_FENCE |
1757 | 59.3k | 0U, // STACKMAP |
1758 | 59.3k | 30537U, // FENTRY_CALL |
1759 | 59.3k | 0U, // PATCHPOINT |
1760 | 59.3k | 0U, // LOAD_STACK_GUARD |
1761 | 59.3k | 0U, // PREALLOCATED_SETUP |
1762 | 59.3k | 0U, // PREALLOCATED_ARG |
1763 | 59.3k | 0U, // STATEPOINT |
1764 | 59.3k | 0U, // LOCAL_ESCAPE |
1765 | 59.3k | 0U, // FAULTING_OP |
1766 | 59.3k | 0U, // PATCHABLE_OP |
1767 | 59.3k | 30297U, // PATCHABLE_FUNCTION_ENTER |
1768 | 59.3k | 30217U, // PATCHABLE_RET |
1769 | 59.3k | 30343U, // PATCHABLE_FUNCTION_EXIT |
1770 | 59.3k | 30320U, // PATCHABLE_TAIL_CALL |
1771 | 59.3k | 30272U, // PATCHABLE_EVENT_CALL |
1772 | 59.3k | 30248U, // PATCHABLE_TYPED_EVENT_CALL |
1773 | 59.3k | 0U, // ICALL_BRANCH_FUNNEL |
1774 | 59.3k | 0U, // MEMBARRIER |
1775 | 59.3k | 0U, // JUMP_TABLE_DEBUG_INFO |
1776 | 59.3k | 0U, // G_ASSERT_SEXT |
1777 | 59.3k | 0U, // G_ASSERT_ZEXT |
1778 | 59.3k | 0U, // G_ASSERT_ALIGN |
1779 | 59.3k | 0U, // G_ADD |
1780 | 59.3k | 0U, // G_SUB |
1781 | 59.3k | 0U, // G_MUL |
1782 | 59.3k | 0U, // G_SDIV |
1783 | 59.3k | 0U, // G_UDIV |
1784 | 59.3k | 0U, // G_SREM |
1785 | 59.3k | 0U, // G_UREM |
1786 | 59.3k | 0U, // G_SDIVREM |
1787 | 59.3k | 0U, // G_UDIVREM |
1788 | 59.3k | 0U, // G_AND |
1789 | 59.3k | 0U, // G_OR |
1790 | 59.3k | 0U, // G_XOR |
1791 | 59.3k | 0U, // G_IMPLICIT_DEF |
1792 | 59.3k | 0U, // G_PHI |
1793 | 59.3k | 0U, // G_FRAME_INDEX |
1794 | 59.3k | 0U, // G_GLOBAL_VALUE |
1795 | 59.3k | 0U, // G_CONSTANT_POOL |
1796 | 59.3k | 0U, // G_EXTRACT |
1797 | 59.3k | 0U, // G_UNMERGE_VALUES |
1798 | 59.3k | 0U, // G_INSERT |
1799 | 59.3k | 0U, // G_MERGE_VALUES |
1800 | 59.3k | 0U, // G_BUILD_VECTOR |
1801 | 59.3k | 0U, // G_BUILD_VECTOR_TRUNC |
1802 | 59.3k | 0U, // G_CONCAT_VECTORS |
1803 | 59.3k | 0U, // G_PTRTOINT |
1804 | 59.3k | 0U, // G_INTTOPTR |
1805 | 59.3k | 0U, // G_BITCAST |
1806 | 59.3k | 0U, // G_FREEZE |
1807 | 59.3k | 0U, // G_CONSTANT_FOLD_BARRIER |
1808 | 59.3k | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
1809 | 59.3k | 0U, // G_INTRINSIC_TRUNC |
1810 | 59.3k | 0U, // G_INTRINSIC_ROUND |
1811 | 59.3k | 0U, // G_INTRINSIC_LRINT |
1812 | 59.3k | 0U, // G_INTRINSIC_ROUNDEVEN |
1813 | 59.3k | 0U, // G_READCYCLECOUNTER |
1814 | 59.3k | 0U, // G_LOAD |
1815 | 59.3k | 0U, // G_SEXTLOAD |
1816 | 59.3k | 0U, // G_ZEXTLOAD |
1817 | 59.3k | 0U, // G_INDEXED_LOAD |
1818 | 59.3k | 0U, // G_INDEXED_SEXTLOAD |
1819 | 59.3k | 0U, // G_INDEXED_ZEXTLOAD |
1820 | 59.3k | 0U, // G_STORE |
1821 | 59.3k | 0U, // G_INDEXED_STORE |
1822 | 59.3k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
1823 | 59.3k | 0U, // G_ATOMIC_CMPXCHG |
1824 | 59.3k | 0U, // G_ATOMICRMW_XCHG |
1825 | 59.3k | 0U, // G_ATOMICRMW_ADD |
1826 | 59.3k | 0U, // G_ATOMICRMW_SUB |
1827 | 59.3k | 0U, // G_ATOMICRMW_AND |
1828 | 59.3k | 0U, // G_ATOMICRMW_NAND |
1829 | 59.3k | 0U, // G_ATOMICRMW_OR |
1830 | 59.3k | 0U, // G_ATOMICRMW_XOR |
1831 | 59.3k | 0U, // G_ATOMICRMW_MAX |
1832 | 59.3k | 0U, // G_ATOMICRMW_MIN |
1833 | 59.3k | 0U, // G_ATOMICRMW_UMAX |
1834 | 59.3k | 0U, // G_ATOMICRMW_UMIN |
1835 | 59.3k | 0U, // G_ATOMICRMW_FADD |
1836 | 59.3k | 0U, // G_ATOMICRMW_FSUB |
1837 | 59.3k | 0U, // G_ATOMICRMW_FMAX |
1838 | 59.3k | 0U, // G_ATOMICRMW_FMIN |
1839 | 59.3k | 0U, // G_ATOMICRMW_UINC_WRAP |
1840 | 59.3k | 0U, // G_ATOMICRMW_UDEC_WRAP |
1841 | 59.3k | 0U, // G_FENCE |
1842 | 59.3k | 0U, // G_PREFETCH |
1843 | 59.3k | 0U, // G_BRCOND |
1844 | 59.3k | 0U, // G_BRINDIRECT |
1845 | 59.3k | 0U, // G_INVOKE_REGION_START |
1846 | 59.3k | 0U, // G_INTRINSIC |
1847 | 59.3k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
1848 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT |
1849 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
1850 | 59.3k | 0U, // G_ANYEXT |
1851 | 59.3k | 0U, // G_TRUNC |
1852 | 59.3k | 0U, // G_CONSTANT |
1853 | 59.3k | 0U, // G_FCONSTANT |
1854 | 59.3k | 0U, // G_VASTART |
1855 | 59.3k | 0U, // G_VAARG |
1856 | 59.3k | 0U, // G_SEXT |
1857 | 59.3k | 0U, // G_SEXT_INREG |
1858 | 59.3k | 0U, // G_ZEXT |
1859 | 59.3k | 0U, // G_SHL |
1860 | 59.3k | 0U, // G_LSHR |
1861 | 59.3k | 0U, // G_ASHR |
1862 | 59.3k | 0U, // G_FSHL |
1863 | 59.3k | 0U, // G_FSHR |
1864 | 59.3k | 0U, // G_ROTR |
1865 | 59.3k | 0U, // G_ROTL |
1866 | 59.3k | 0U, // G_ICMP |
1867 | 59.3k | 0U, // G_FCMP |
1868 | 59.3k | 0U, // G_SELECT |
1869 | 59.3k | 0U, // G_UADDO |
1870 | 59.3k | 0U, // G_UADDE |
1871 | 59.3k | 0U, // G_USUBO |
1872 | 59.3k | 0U, // G_USUBE |
1873 | 59.3k | 0U, // G_SADDO |
1874 | 59.3k | 0U, // G_SADDE |
1875 | 59.3k | 0U, // G_SSUBO |
1876 | 59.3k | 0U, // G_SSUBE |
1877 | 59.3k | 0U, // G_UMULO |
1878 | 59.3k | 0U, // G_SMULO |
1879 | 59.3k | 0U, // G_UMULH |
1880 | 59.3k | 0U, // G_SMULH |
1881 | 59.3k | 0U, // G_UADDSAT |
1882 | 59.3k | 0U, // G_SADDSAT |
1883 | 59.3k | 0U, // G_USUBSAT |
1884 | 59.3k | 0U, // G_SSUBSAT |
1885 | 59.3k | 0U, // G_USHLSAT |
1886 | 59.3k | 0U, // G_SSHLSAT |
1887 | 59.3k | 0U, // G_SMULFIX |
1888 | 59.3k | 0U, // G_UMULFIX |
1889 | 59.3k | 0U, // G_SMULFIXSAT |
1890 | 59.3k | 0U, // G_UMULFIXSAT |
1891 | 59.3k | 0U, // G_SDIVFIX |
1892 | 59.3k | 0U, // G_UDIVFIX |
1893 | 59.3k | 0U, // G_SDIVFIXSAT |
1894 | 59.3k | 0U, // G_UDIVFIXSAT |
1895 | 59.3k | 0U, // G_FADD |
1896 | 59.3k | 0U, // G_FSUB |
1897 | 59.3k | 0U, // G_FMUL |
1898 | 59.3k | 0U, // G_FMA |
1899 | 59.3k | 0U, // G_FMAD |
1900 | 59.3k | 0U, // G_FDIV |
1901 | 59.3k | 0U, // G_FREM |
1902 | 59.3k | 0U, // G_FPOW |
1903 | 59.3k | 0U, // G_FPOWI |
1904 | 59.3k | 0U, // G_FEXP |
1905 | 59.3k | 0U, // G_FEXP2 |
1906 | 59.3k | 0U, // G_FEXP10 |
1907 | 59.3k | 0U, // G_FLOG |
1908 | 59.3k | 0U, // G_FLOG2 |
1909 | 59.3k | 0U, // G_FLOG10 |
1910 | 59.3k | 0U, // G_FLDEXP |
1911 | 59.3k | 0U, // G_FFREXP |
1912 | 59.3k | 0U, // G_FNEG |
1913 | 59.3k | 0U, // G_FPEXT |
1914 | 59.3k | 0U, // G_FPTRUNC |
1915 | 59.3k | 0U, // G_FPTOSI |
1916 | 59.3k | 0U, // G_FPTOUI |
1917 | 59.3k | 0U, // G_SITOFP |
1918 | 59.3k | 0U, // G_UITOFP |
1919 | 59.3k | 0U, // G_FABS |
1920 | 59.3k | 0U, // G_FCOPYSIGN |
1921 | 59.3k | 0U, // G_IS_FPCLASS |
1922 | 59.3k | 0U, // G_FCANONICALIZE |
1923 | 59.3k | 0U, // G_FMINNUM |
1924 | 59.3k | 0U, // G_FMAXNUM |
1925 | 59.3k | 0U, // G_FMINNUM_IEEE |
1926 | 59.3k | 0U, // G_FMAXNUM_IEEE |
1927 | 59.3k | 0U, // G_FMINIMUM |
1928 | 59.3k | 0U, // G_FMAXIMUM |
1929 | 59.3k | 0U, // G_GET_FPENV |
1930 | 59.3k | 0U, // G_SET_FPENV |
1931 | 59.3k | 0U, // G_RESET_FPENV |
1932 | 59.3k | 0U, // G_GET_FPMODE |
1933 | 59.3k | 0U, // G_SET_FPMODE |
1934 | 59.3k | 0U, // G_RESET_FPMODE |
1935 | 59.3k | 0U, // G_PTR_ADD |
1936 | 59.3k | 0U, // G_PTRMASK |
1937 | 59.3k | 0U, // G_SMIN |
1938 | 59.3k | 0U, // G_SMAX |
1939 | 59.3k | 0U, // G_UMIN |
1940 | 59.3k | 0U, // G_UMAX |
1941 | 59.3k | 0U, // G_ABS |
1942 | 59.3k | 0U, // G_LROUND |
1943 | 59.3k | 0U, // G_LLROUND |
1944 | 59.3k | 0U, // G_BR |
1945 | 59.3k | 0U, // G_BRJT |
1946 | 59.3k | 0U, // G_INSERT_VECTOR_ELT |
1947 | 59.3k | 0U, // G_EXTRACT_VECTOR_ELT |
1948 | 59.3k | 0U, // G_SHUFFLE_VECTOR |
1949 | 59.3k | 0U, // G_CTTZ |
1950 | 59.3k | 0U, // G_CTTZ_ZERO_UNDEF |
1951 | 59.3k | 0U, // G_CTLZ |
1952 | 59.3k | 0U, // G_CTLZ_ZERO_UNDEF |
1953 | 59.3k | 0U, // G_CTPOP |
1954 | 59.3k | 0U, // G_BSWAP |
1955 | 59.3k | 0U, // G_BITREVERSE |
1956 | 59.3k | 0U, // G_FCEIL |
1957 | 59.3k | 0U, // G_FCOS |
1958 | 59.3k | 0U, // G_FSIN |
1959 | 59.3k | 0U, // G_FSQRT |
1960 | 59.3k | 0U, // G_FFLOOR |
1961 | 59.3k | 0U, // G_FRINT |
1962 | 59.3k | 0U, // G_FNEARBYINT |
1963 | 59.3k | 0U, // G_ADDRSPACE_CAST |
1964 | 59.3k | 0U, // G_BLOCK_ADDR |
1965 | 59.3k | 0U, // G_JUMP_TABLE |
1966 | 59.3k | 0U, // G_DYN_STACKALLOC |
1967 | 59.3k | 0U, // G_STACKSAVE |
1968 | 59.3k | 0U, // G_STACKRESTORE |
1969 | 59.3k | 0U, // G_STRICT_FADD |
1970 | 59.3k | 0U, // G_STRICT_FSUB |
1971 | 59.3k | 0U, // G_STRICT_FMUL |
1972 | 59.3k | 0U, // G_STRICT_FDIV |
1973 | 59.3k | 0U, // G_STRICT_FREM |
1974 | 59.3k | 0U, // G_STRICT_FMA |
1975 | 59.3k | 0U, // G_STRICT_FSQRT |
1976 | 59.3k | 0U, // G_STRICT_FLDEXP |
1977 | 59.3k | 0U, // G_READ_REGISTER |
1978 | 59.3k | 0U, // G_WRITE_REGISTER |
1979 | 59.3k | 0U, // G_MEMCPY |
1980 | 59.3k | 0U, // G_MEMCPY_INLINE |
1981 | 59.3k | 0U, // G_MEMMOVE |
1982 | 59.3k | 0U, // G_MEMSET |
1983 | 59.3k | 0U, // G_BZERO |
1984 | 59.3k | 0U, // G_VECREDUCE_SEQ_FADD |
1985 | 59.3k | 0U, // G_VECREDUCE_SEQ_FMUL |
1986 | 59.3k | 0U, // G_VECREDUCE_FADD |
1987 | 59.3k | 0U, // G_VECREDUCE_FMUL |
1988 | 59.3k | 0U, // G_VECREDUCE_FMAX |
1989 | 59.3k | 0U, // G_VECREDUCE_FMIN |
1990 | 59.3k | 0U, // G_VECREDUCE_FMAXIMUM |
1991 | 59.3k | 0U, // G_VECREDUCE_FMINIMUM |
1992 | 59.3k | 0U, // G_VECREDUCE_ADD |
1993 | 59.3k | 0U, // G_VECREDUCE_MUL |
1994 | 59.3k | 0U, // G_VECREDUCE_AND |
1995 | 59.3k | 0U, // G_VECREDUCE_OR |
1996 | 59.3k | 0U, // G_VECREDUCE_XOR |
1997 | 59.3k | 0U, // G_VECREDUCE_SMAX |
1998 | 59.3k | 0U, // G_VECREDUCE_SMIN |
1999 | 59.3k | 0U, // G_VECREDUCE_UMAX |
2000 | 59.3k | 0U, // G_VECREDUCE_UMIN |
2001 | 59.3k | 0U, // G_SBFX |
2002 | 59.3k | 0U, // G_UBFX |
2003 | 59.3k | 30440U, // ADJCALLSTACKDOWN |
2004 | 59.3k | 30458U, // ADJCALLSTACKUP |
2005 | 59.3k | 40789U, // ATOMIC_CMP_SWAP_16_P |
2006 | 59.3k | 40108U, // ATOMIC_CMP_SWAP_32_P |
2007 | 59.3k | 41469U, // ATOMIC_CMP_SWAP_8_P |
2008 | 59.3k | 40647U, // ATOMIC_LOAD_ADD_16_P |
2009 | 59.3k | 39944U, // ATOMIC_LOAD_ADD_32_P |
2010 | 59.3k | 41333U, // ATOMIC_LOAD_ADD_8_P |
2011 | 59.3k | 40671U, // ATOMIC_LOAD_AND_16_P |
2012 | 59.3k | 39968U, // ATOMIC_LOAD_AND_32_P |
2013 | 59.3k | 41356U, // ATOMIC_LOAD_AND_8_P |
2014 | 59.3k | 40908U, // ATOMIC_LOAD_MAX_16_P |
2015 | 59.3k | 40295U, // ATOMIC_LOAD_MAX_32_P |
2016 | 59.3k | 41583U, // ATOMIC_LOAD_MAX_8_P |
2017 | 59.3k | 40720U, // ATOMIC_LOAD_MIN_16_P |
2018 | 59.3k | 40039U, // ATOMIC_LOAD_MIN_32_P |
2019 | 59.3k | 41403U, // ATOMIC_LOAD_MIN_8_P |
2020 | 59.3k | 40695U, // ATOMIC_LOAD_NAND_16_P |
2021 | 59.3k | 39992U, // ATOMIC_LOAD_NAND_32_P |
2022 | 59.3k | 41379U, // ATOMIC_LOAD_NAND_8_P |
2023 | 59.3k | 40861U, // ATOMIC_LOAD_OR_16_P |
2024 | 59.3k | 40226U, // ATOMIC_LOAD_OR_32_P |
2025 | 59.3k | 41538U, // ATOMIC_LOAD_OR_8_P |
2026 | 59.3k | 40599U, // ATOMIC_LOAD_SUB_16_P |
2027 | 59.3k | 39896U, // ATOMIC_LOAD_SUB_32_P |
2028 | 59.3k | 41287U, // ATOMIC_LOAD_SUB_8_P |
2029 | 59.3k | 40932U, // ATOMIC_LOAD_UMAX_16_P |
2030 | 59.3k | 40319U, // ATOMIC_LOAD_UMAX_32_P |
2031 | 59.3k | 41606U, // ATOMIC_LOAD_UMAX_8_P |
2032 | 59.3k | 40744U, // ATOMIC_LOAD_UMIN_16_P |
2033 | 59.3k | 40063U, // ATOMIC_LOAD_UMIN_32_P |
2034 | 59.3k | 41426U, // ATOMIC_LOAD_UMIN_8_P |
2035 | 59.3k | 40884U, // ATOMIC_LOAD_XOR_16_P |
2036 | 59.3k | 40249U, // ATOMIC_LOAD_XOR_32_P |
2037 | 59.3k | 41560U, // ATOMIC_LOAD_XOR_8_P |
2038 | 59.3k | 40769U, // ATOMIC_SWAP_16_P |
2039 | 59.3k | 40088U, // ATOMIC_SWAP_32_P |
2040 | 59.3k | 41450U, // ATOMIC_SWAP_8_P |
2041 | 59.3k | 60398U, // BRCC_FP |
2042 | 59.3k | 67156522U, // BR_JT |
2043 | 59.3k | 30590U, // CONSTPOOL_ENTRY |
2044 | 59.3k | 539048393U, // EE_ANDQ_P |
2045 | 59.3k | 67189301U, // EE_BITREV_P |
2046 | 59.3k | 536946937U, // EE_CMUL_S16_LD_INCP_P |
2047 | 59.3k | 539041817U, // EE_CMUL_S16_P |
2048 | 59.3k | 536947631U, // EE_CMUL_S16_ST_INCP_P |
2049 | 59.3k | 536947099U, // EE_FFT_AMS_S16_LD_INCP_P |
2050 | 59.3k | 536949305U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P |
2051 | 59.3k | 536946544U, // EE_FFT_AMS_S16_LD_R32_DECP_P |
2052 | 59.3k | 2174033U, // EE_FFT_AMS_S16_ST_INCP_P |
2053 | 59.3k | 79748U, // EE_FFT_CMUL_S16_LD_XP_P |
2054 | 59.3k | 539048195U, // EE_FFT_CMUL_S16_ST_XP_P |
2055 | 59.3k | 539041789U, // EE_FFT_R2BF_S16_P |
2056 | 59.3k | 539044747U, // EE_FFT_R2BF_S16_ST_INCP_P |
2057 | 59.3k | 1073817495U, // EE_FFT_VST_R32_DECP_P |
2058 | 59.3k | 44924U, // EE_LDF_128_IP_P |
2059 | 59.3k | 46876U, // EE_LDF_128_XP_P |
2060 | 59.3k | 44591U, // EE_LDF_64_IP_P |
2061 | 59.3k | 46543U, // EE_LDF_64_XP_P |
2062 | 59.3k | 4239080U, // EE_LDQA_S16_128_IP_P |
2063 | 59.3k | 67155592U, // EE_LDQA_S16_128_XP_P |
2064 | 59.3k | 4239142U, // EE_LDQA_S8_128_IP_P |
2065 | 59.3k | 67155654U, // EE_LDQA_S8_128_XP_P |
2066 | 59.3k | 4239111U, // EE_LDQA_U16_128_IP_P |
2067 | 59.3k | 67155623U, // EE_LDQA_U16_128_XP_P |
2068 | 59.3k | 4239172U, // EE_LDQA_U8_128_IP_P |
2069 | 59.3k | 67155684U, // EE_LDQA_U8_128_XP_P |
2070 | 59.3k | 2170100U, // EE_LDXQ_32_P |
2071 | 59.3k | 1610691047U, // EE_LD_128_USAR_IP_P |
2072 | 59.3k | 80101U, // EE_LD_128_USAR_XP_P |
2073 | 59.3k | 6337029U, // EE_LD_ACCX_IP_P |
2074 | 59.3k | 8433067U, // EE_LD_QACC_H_H_32_IP_P |
2075 | 59.3k | 4239280U, // EE_LD_QACC_H_L_128_IP_P |
2076 | 59.3k | 8433133U, // EE_LD_QACC_L_H_32_IP_P |
2077 | 59.3k | 4239348U, // EE_LD_QACC_L_L_128_IP_P |
2078 | 59.3k | 4239787U, // EE_LD_UA_STATE_IP_P |
2079 | 59.3k | 2147558313U, // EE_MOVI_32_A_P |
2080 | 59.3k | 2147563909U, // EE_MOVI_32_Q_P |
2081 | 59.3k | 599071U, // EE_MOV_S16_QACC_P |
2082 | 59.3k | 599248U, // EE_MOV_S8_QACC_P |
2083 | 59.3k | 599130U, // EE_MOV_U16_QACC_P |
2084 | 59.3k | 599305U, // EE_MOV_U8_QACC_P |
2085 | 59.3k | 69286404U, // EE_NOTQ_P |
2086 | 59.3k | 539048413U, // EE_ORQ_P |
2087 | 59.3k | 2686531877U, // EE_SLCI_2Q_P |
2088 | 59.3k | 2177363U, // EE_SLCXXP_2Q_P |
2089 | 59.3k | 2686531900U, // EE_SRCI_2Q_P |
2090 | 59.3k | 1073816514U, // EE_SRCMB_S16_QACC_P |
2091 | 59.3k | 1073816694U, // EE_SRCMB_S8_QACC_P |
2092 | 59.3k | 2174132U, // EE_SRCQ_128_ST_INCP_P |
2093 | 59.3k | 2177388U, // EE_SRCXXP_2Q_P |
2094 | 59.3k | 1610690814U, // EE_SRC_Q_LD_IP_P |
2095 | 59.3k | 79928U, // EE_SRC_Q_LD_XP_P |
2096 | 59.3k | 539048350U, // EE_SRC_Q_P |
2097 | 59.3k | 539047323U, // EE_SRC_Q_QUP_P |
2098 | 59.3k | 1073789637U, // EE_SRS_ACCX_P |
2099 | 59.3k | 44950U, // EE_STF_128_IP_P |
2100 | 59.3k | 46902U, // EE_STF_128_XP_P |
2101 | 59.3k | 44616U, // EE_STF_64_IP_P |
2102 | 59.3k | 46568U, // EE_STF_64_XP_P |
2103 | 59.3k | 2170123U, // EE_STXQ_32_P |
2104 | 59.3k | 6337055U, // EE_ST_ACCX_IP_P |
2105 | 59.3k | 8433100U, // EE_ST_QACC_H_H_32_IP_P |
2106 | 59.3k | 4239314U, // EE_ST_QACC_H_L_128_IP_P |
2107 | 59.3k | 8433166U, // EE_ST_QACC_L_H_32_IP_P |
2108 | 59.3k | 4239382U, // EE_ST_QACC_L_L_128_IP_P |
2109 | 59.3k | 4239817U, // EE_ST_UA_STATE_IP_P |
2110 | 59.3k | 536947066U, // EE_VADDS_S16_LD_INCP_P |
2111 | 59.3k | 539041941U, // EE_VADDS_S16_P |
2112 | 59.3k | 536947760U, // EE_VADDS_S16_ST_INCP_P |
2113 | 59.3k | 536946872U, // EE_VADDS_S32_LD_INCP_P |
2114 | 59.3k | 539041252U, // EE_VADDS_S32_P |
2115 | 59.3k | 536947530U, // EE_VADDS_S32_ST_INCP_P |
2116 | 59.3k | 536947292U, // EE_VADDS_S8_LD_INCP_P |
2117 | 59.3k | 539042558U, // EE_VADDS_S8_P |
2118 | 59.3k | 536948018U, // EE_VADDS_S8_ST_INCP_P |
2119 | 59.3k | 539041889U, // EE_VCMP_EQ_S16_P |
2120 | 59.3k | 539041200U, // EE_VCMP_EQ_S32_P |
2121 | 59.3k | 539042508U, // EE_VCMP_EQ_S8_P |
2122 | 59.3k | 539041966U, // EE_VCMP_GT_S16_P |
2123 | 59.3k | 539041277U, // EE_VCMP_GT_S32_P |
2124 | 59.3k | 539042582U, // EE_VCMP_GT_S8_P |
2125 | 59.3k | 539041993U, // EE_VCMP_LT_S16_P |
2126 | 59.3k | 539041304U, // EE_VCMP_LT_S32_P |
2127 | 59.3k | 539042608U, // EE_VCMP_LT_S8_P |
2128 | 59.3k | 3221302989U, // EE_VLDBC_16_IP_P |
2129 | 59.3k | 67182255U, // EE_VLDBC_16_P |
2130 | 59.3k | 79469U, // EE_VLDBC_16_XP_P |
2131 | 59.3k | 3758173584U, // EE_VLDBC_32_IP_P |
2132 | 59.3k | 67181552U, // EE_VLDBC_32_P |
2133 | 59.3k | 79284U, // EE_VLDBC_32_XP_P |
2134 | 59.3k | 77906U, // EE_VLDBC_8_IP_P |
2135 | 59.3k | 67182942U, // EE_VLDBC_8_P |
2136 | 59.3k | 79722U, // EE_VLDBC_8_XP_P |
2137 | 59.3k | 2172855U, // EE_VLDHBC_16_INCP_P |
2138 | 59.3k | 1610690402U, // EE_VLD_128_IP_P |
2139 | 59.3k | 79618U, // EE_VLD_128_XP_P |
2140 | 59.3k | 536948321U, // EE_VLD_H_64_IP_P |
2141 | 59.3k | 79361U, // EE_VLD_H_64_XP_P |
2142 | 59.3k | 536948375U, // EE_VLD_L_64_IP_P |
2143 | 59.3k | 79415U, // EE_VLD_L_64_XP_P |
2144 | 59.3k | 536947134U, // EE_VMAX_S16_LD_INCP_P |
2145 | 59.3k | 539042071U, // EE_VMAX_S16_P |
2146 | 59.3k | 536947828U, // EE_VMAX_S16_ST_INCP_P |
2147 | 59.3k | 536946905U, // EE_VMAX_S32_LD_INCP_P |
2148 | 59.3k | 539041331U, // EE_VMAX_S32_P |
2149 | 59.3k | 536947563U, // EE_VMAX_S32_ST_INCP_P |
2150 | 59.3k | 536947324U, // EE_VMAX_S8_LD_INCP_P |
2151 | 59.3k | 539042683U, // EE_VMAX_S8_P |
2152 | 59.3k | 536948050U, // EE_VMAX_S8_ST_INCP_P |
2153 | 59.3k | 536947001U, // EE_VMIN_S16_LD_INCP_P |
2154 | 59.3k | 539041865U, // EE_VMIN_S16_P |
2155 | 59.3k | 536947695U, // EE_VMIN_S16_ST_INCP_P |
2156 | 59.3k | 536946807U, // EE_VMIN_S32_LD_INCP_P |
2157 | 59.3k | 539041176U, // EE_VMIN_S32_P |
2158 | 59.3k | 536947465U, // EE_VMIN_S32_ST_INCP_P |
2159 | 59.3k | 536947229U, // EE_VMIN_S8_LD_INCP_P |
2160 | 59.3k | 539042485U, // EE_VMIN_S8_P |
2161 | 59.3k | 536947955U, // EE_VMIN_S8_ST_INCP_P |
2162 | 59.3k | 1073819929U, // EE_VMULAS_S16_ACCX_LD_IP_P |
2163 | 59.3k | 1073820597U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P |
2164 | 59.3k | 79955U, // EE_VMULAS_S16_ACCX_LD_XP_P |
2165 | 59.3k | 79097U, // EE_VMULAS_S16_ACCX_LD_XP_QUP_P |
2166 | 59.3k | 69286475U, // EE_VMULAS_S16_ACCX_P |
2167 | 59.3k | 536946645U, // EE_VMULAS_S16_QACC_LDBC_INCP_P |
2168 | 59.3k | 536949345U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P |
2169 | 59.3k | 1073819756U, // EE_VMULAS_S16_QACC_LD_IP_P |
2170 | 59.3k | 1073820435U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P |
2171 | 59.3k | 79782U, // EE_VMULAS_S16_QACC_LD_XP_P |
2172 | 59.3k | 78935U, // EE_VMULAS_S16_QACC_LD_XP_QUP_P |
2173 | 59.3k | 69280768U, // EE_VMULAS_S16_QACC_P |
2174 | 59.3k | 1073820003U, // EE_VMULAS_S8_ACCX_LD_IP_P |
2175 | 59.3k | 1073820679U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P |
2176 | 59.3k | 80029U, // EE_VMULAS_S8_ACCX_LD_XP_P |
2177 | 59.3k | 79179U, // EE_VMULAS_S8_ACCX_LD_XP_QUP_P |
2178 | 59.3k | 69286537U, // EE_VMULAS_S8_ACCX_P |
2179 | 59.3k | 536946727U, // EE_VMULAS_S8_QACC_LDBC_INCP_P |
2180 | 59.3k | 536949435U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P |
2181 | 59.3k | 1073819830U, // EE_VMULAS_S8_QACC_LD_IP_P |
2182 | 59.3k | 1073820517U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P |
2183 | 59.3k | 79856U, // EE_VMULAS_S8_QACC_LD_XP_P |
2184 | 59.3k | 79017U, // EE_VMULAS_S8_QACC_LD_XP_QUP_P |
2185 | 59.3k | 69280946U, // EE_VMULAS_S8_QACC_P |
2186 | 59.3k | 1073819966U, // EE_VMULAS_U16_ACCX_LD_IP_P |
2187 | 59.3k | 1073820638U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P |
2188 | 59.3k | 79992U, // EE_VMULAS_U16_ACCX_LD_XP_P |
2189 | 59.3k | 79138U, // EE_VMULAS_U16_ACCX_LD_XP_QUP_P |
2190 | 59.3k | 69286506U, // EE_VMULAS_U16_ACCX_P |
2191 | 59.3k | 536946686U, // EE_VMULAS_U16_QACC_LDBC_INCP_P |
2192 | 59.3k | 536949390U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P |
2193 | 59.3k | 1073819793U, // EE_VMULAS_U16_QACC_LD_IP_P |
2194 | 59.3k | 1073820476U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P |
2195 | 59.3k | 79819U, // EE_VMULAS_U16_QACC_LD_XP_P |
2196 | 59.3k | 78976U, // EE_VMULAS_U16_QACC_LD_XP_QUP_P |
2197 | 59.3k | 69280827U, // EE_VMULAS_U16_QACC_P |
2198 | 59.3k | 1073820039U, // EE_VMULAS_U8_ACCX_LD_IP_P |
2199 | 59.3k | 1073820719U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P |
2200 | 59.3k | 80065U, // EE_VMULAS_U8_ACCX_LD_XP_P |
2201 | 59.3k | 79219U, // EE_VMULAS_U8_ACCX_LD_XP_QUP_P |
2202 | 59.3k | 69286567U, // EE_VMULAS_U8_ACCX_P |
2203 | 59.3k | 536946767U, // EE_VMULAS_U8_QACC_LDBC_INCP_P |
2204 | 59.3k | 536949479U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P |
2205 | 59.3k | 1073819866U, // EE_VMULAS_U8_QACC_LD_IP_P |
2206 | 59.3k | 1073820557U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P |
2207 | 59.3k | 79892U, // EE_VMULAS_U8_QACC_LD_XP_P |
2208 | 59.3k | 79057U, // EE_VMULAS_U8_QACC_LD_XP_QUP_P |
2209 | 59.3k | 69281003U, // EE_VMULAS_U8_QACC_P |
2210 | 59.3k | 536946969U, // EE_VMUL_S16_LD_INCP_P |
2211 | 59.3k | 539041841U, // EE_VMUL_S16_P |
2212 | 59.3k | 536947663U, // EE_VMUL_S16_ST_INCP_P |
2213 | 59.3k | 536947198U, // EE_VMUL_S8_LD_INCP_P |
2214 | 59.3k | 539042462U, // EE_VMUL_S8_P |
2215 | 59.3k | 536947924U, // EE_VMUL_S8_ST_INCP_P |
2216 | 59.3k | 536947166U, // EE_VMUL_U16_LD_INCP_P |
2217 | 59.3k | 539042095U, // EE_VMUL_U16_P |
2218 | 59.3k | 536947860U, // EE_VMUL_U16_ST_INCP_P |
2219 | 59.3k | 536947355U, // EE_VMUL_U8_LD_INCP_P |
2220 | 59.3k | 539042706U, // EE_VMUL_U8_P |
2221 | 59.3k | 536948081U, // EE_VMUL_U8_ST_INCP_P |
2222 | 59.3k | 539042020U, // EE_VPRELU_S16_P |
2223 | 59.3k | 539042634U, // EE_VPRELU_S8_P |
2224 | 59.3k | 73982U, // EE_VRELU_S16_P |
2225 | 59.3k | 74595U, // EE_VRELU_S8_P |
2226 | 59.3k | 69278801U, // EE_VSL_32_P |
2227 | 59.3k | 536947386U, // EE_VSMULAS_S16_QACC_LD_INCP_P |
2228 | 59.3k | 1612784608U, // EE_VSMULAS_S16_QACC_P |
2229 | 59.3k | 536947426U, // EE_VSMULAS_S8_QACC_LD_INCP_P |
2230 | 59.3k | 2686526611U, // EE_VSMULAS_S8_QACC_P |
2231 | 59.3k | 69279057U, // EE_VSR_32_P |
2232 | 59.3k | 1610690616U, // EE_VST_128_IP_P |
2233 | 59.3k | 79696U, // EE_VST_128_XP_P |
2234 | 59.3k | 536948348U, // EE_VST_H_64_IP_P |
2235 | 59.3k | 79388U, // EE_VST_H_64_XP_P |
2236 | 59.3k | 536948402U, // EE_VST_L_64_IP_P |
2237 | 59.3k | 79442U, // EE_VST_L_64_XP_P |
2238 | 59.3k | 536947033U, // EE_VSUBS_S16_LD_INCP_P |
2239 | 59.3k | 539041916U, // EE_VSUBS_S16_P |
2240 | 59.3k | 536947727U, // EE_VSUBS_S16_ST_INCP_P |
2241 | 59.3k | 536946839U, // EE_VSUBS_S32_LD_INCP_P |
2242 | 59.3k | 539041227U, // EE_VSUBS_S32_P |
2243 | 59.3k | 536947497U, // EE_VSUBS_S32_ST_INCP_P |
2244 | 59.3k | 536947260U, // EE_VSUBS_S8_LD_INCP_P |
2245 | 59.3k | 539042534U, // EE_VSUBS_S8_P |
2246 | 59.3k | 536947986U, // EE_VSUBS_S8_ST_INCP_P |
2247 | 59.3k | 69279597U, // EE_VUNZIP_16_P |
2248 | 59.3k | 69278916U, // EE_VUNZIP_32_P |
2249 | 59.3k | 69280276U, // EE_VUNZIP_8_P |
2250 | 59.3k | 69279622U, // EE_VZIP_16_P |
2251 | 59.3k | 69278941U, // EE_VZIP_32_P |
2252 | 59.3k | 69280300U, // EE_VZIP_8_P |
2253 | 59.3k | 539048432U, // EE_XORQ_P |
2254 | 59.3k | 30622U, // EE_ZERO_ACCX_P |
2255 | 59.3k | 30599U, // EE_ZERO_QACC_P |
2256 | 59.3k | 604595U, // EE_ZERO_Q_P |
2257 | 59.3k | 50510U, // EXTUI_BR2_P |
2258 | 59.3k | 55748U, // EXTUI_BR4_P |
2259 | 59.3k | 61533U, // EXTUI_BR_P |
2260 | 59.3k | 10541699U, // L8I_P |
2261 | 59.3k | 67183908U, // LDDEC_P |
2262 | 59.3k | 67184158U, // LDINC_P |
2263 | 59.3k | 12644456U, // LOOPBR |
2264 | 59.3k | 67164961U, // LOOPDEC |
2265 | 59.3k | 122623U, // LOOPEND |
2266 | 59.3k | 67171337U, // LOOPINIT |
2267 | 59.3k | 12645415U, // LOOPSTART |
2268 | 59.3k | 67158791U, // MOVBA2_P |
2269 | 59.3k | 55965U, // MOVBA2_P2 |
2270 | 59.3k | 67164603U, // MOVBA4_P |
2271 | 59.3k | 55739U, // MOVBA4_P2 |
2272 | 59.3k | 67164829U, // MOVBA_P |
2273 | 59.3k | 55965U, // MOVBA_P2 |
2274 | 59.3k | 536945974U, // MULA_DA_HH_LDDEC_P |
2275 | 59.3k | 536946224U, // MULA_DA_HH_LDINC_P |
2276 | 59.3k | 536946090U, // MULA_DA_HL_LDDEC_P |
2277 | 59.3k | 536946340U, // MULA_DA_HL_LDINC_P |
2278 | 59.3k | 536946032U, // MULA_DA_LH_LDDEC_P |
2279 | 59.3k | 536946282U, // MULA_DA_LH_LDINC_P |
2280 | 59.3k | 536946148U, // MULA_DA_LL_LDDEC_P |
2281 | 59.3k | 536946398U, // MULA_DA_LL_LDINC_P |
2282 | 59.3k | 536946003U, // MULA_DD_HH_LDDEC_P |
2283 | 59.3k | 536946253U, // MULA_DD_HH_LDINC_P |
2284 | 59.3k | 536946119U, // MULA_DD_HL_LDDEC_P |
2285 | 59.3k | 536946369U, // MULA_DD_HL_LDINC_P |
2286 | 59.3k | 536946061U, // MULA_DD_LH_LDDEC_P |
2287 | 59.3k | 536946311U, // MULA_DD_LH_LDINC_P |
2288 | 59.3k | 536946177U, // MULA_DD_LL_LDDEC_P |
2289 | 59.3k | 536946427U, // MULA_DD_LL_LDINC_P |
2290 | 59.3k | 10545657U, // RESTORE_BOOL |
2291 | 59.3k | 62415U, // SELECT |
2292 | 59.3k | 60408U, // SELECT_CC_FP_FP |
2293 | 59.3k | 62484U, // SELECT_CC_FP_INT |
2294 | 59.3k | 60426U, // SELECT_CC_INT_FP |
2295 | 59.3k | 61523U, // SLLI_BR_P |
2296 | 59.3k | 55947U, // SLL_P |
2297 | 59.3k | 10545672U, // SPILL_BOOL |
2298 | 59.3k | 55930U, // SRA_P |
2299 | 59.3k | 55956U, // SRL_P |
2300 | 59.3k | 567064U, // WSR_ACCHI_P |
2301 | 59.3k | 567108U, // WSR_ACCLO_P |
2302 | 59.3k | 564108U, // WSR_M0_P |
2303 | 59.3k | 564146U, // WSR_M1_P |
2304 | 59.3k | 564811U, // WSR_M2_P |
2305 | 59.3k | 564849U, // WSR_M3_P |
2306 | 59.3k | 567086U, // XSR_ACCHI_P |
2307 | 59.3k | 567130U, // XSR_ACCLO_P |
2308 | 59.3k | 564127U, // XSR_M0_P |
2309 | 59.3k | 564165U, // XSR_M1_P |
2310 | 59.3k | 564830U, // XSR_M2_P |
2311 | 59.3k | 564868U, // XSR_M3_P |
2312 | 59.3k | 69286424U, // mv_QR_P |
2313 | 59.3k | 67143192U, // ABS |
2314 | 59.3k | 67143089U, // ABS_S |
2315 | 59.3k | 32973U, // ADD |
2316 | 59.3k | 81921390U, // ADDEXPM_S |
2317 | 59.3k | 81921424U, // ADDEXP_S |
2318 | 59.3k | 536904286U, // ADDI |
2319 | 59.3k | 2147517513U, // ADDI_N |
2320 | 59.3k | 2684387971U, // ADDMI |
2321 | 59.3k | 32818U, // ADDX2 |
2322 | 59.3k | 32839U, // ADDX4 |
2323 | 59.3k | 32874U, // ADDX8 |
2324 | 59.3k | 33840U, // ADD_N |
2325 | 59.3k | 34078U, // ADD_S |
2326 | 59.3k | 67170934U, // AE_ABS16S |
2327 | 59.3k | 67170682U, // AE_ABS24S |
2328 | 59.3k | 67158740U, // AE_ABS32 |
2329 | 59.3k | 67170586U, // AE_ABS32S |
2330 | 59.3k | 67164552U, // AE_ABS64 |
2331 | 59.3k | 67170811U, // AE_ABS64S |
2332 | 59.3k | 55858U, // AE_ADD16 |
2333 | 59.3k | 62036U, // AE_ADD16S |
2334 | 59.3k | 61772U, // AE_ADD24S |
2335 | 59.3k | 49749U, // AE_ADD32 |
2336 | 59.3k | 61662U, // AE_ADD32S |
2337 | 59.3k | 58299U, // AE_ADD32_HL_LH |
2338 | 59.3k | 55561U, // AE_ADD64 |
2339 | 59.3k | 61863U, // AE_ADD64S |
2340 | 59.3k | 49679U, // AE_ADDBRBA32 |
2341 | 59.3k | 49736U, // AE_ADDSUB32 |
2342 | 59.3k | 61648U, // AE_ADDSUB32S |
2343 | 59.3k | 57070U, // AE_AND |
2344 | 59.3k | 67156887U, // AE_CVT32X2F16_10 |
2345 | 59.3k | 67158414U, // AE_CVT32X2F16_32 |
2346 | 59.3k | 67158508U, // AE_CVT48A32 |
2347 | 59.3k | 67158495U, // AE_CVT64A32 |
2348 | 59.3k | 67166072U, // AE_CVT64F32_H |
2349 | 59.3k | 67166234U, // AE_CVTA32F24S_H |
2350 | 59.3k | 67167740U, // AE_CVTA32F24S_L |
2351 | 59.3k | 67170462U, // AE_CVTQ56A32S |
2352 | 59.3k | 67166217U, // AE_CVTQ56P32S_H |
2353 | 59.3k | 67167723U, // AE_CVTQ56P32S_L |
2354 | 59.3k | 81943284U, // AE_DB |
2355 | 59.3k | 16934148U, // AE_DBI |
2356 | 59.3k | 16931818U, // AE_DBI_IC |
2357 | 59.3k | 16936311U, // AE_DBI_IP |
2358 | 59.3k | 81943469U, // AE_DB_IC |
2359 | 59.3k | 81947962U, // AE_DB_IP |
2360 | 59.3k | 81944411U, // AE_DIV64D32_H |
2361 | 59.3k | 81945919U, // AE_DIV64D32_L |
2362 | 59.3k | 55888U, // AE_EQ16 |
2363 | 59.3k | 49834U, // AE_EQ32 |
2364 | 59.3k | 55657U, // AE_EQ64 |
2365 | 59.3k | 3221284048U, // AE_L16M_I |
2366 | 59.3k | 3772839029U, // AE_L16M_IU |
2367 | 59.3k | 62944U, // AE_L16M_X |
2368 | 59.3k | 14737024U, // AE_L16M_XC |
2369 | 59.3k | 14742723U, // AE_L16M_XU |
2370 | 59.3k | 536929462U, // AE_L16X2M_I |
2371 | 59.3k | 1088484441U, // AE_L16X2M_IU |
2372 | 59.3k | 62918U, // AE_L16X2M_X |
2373 | 59.3k | 14736996U, // AE_L16X2M_XC |
2374 | 59.3k | 14742695U, // AE_L16X2M_XU |
2375 | 59.3k | 1610671190U, // AE_L16X4_I |
2376 | 59.3k | 2162224405U, // AE_L16X4_IP |
2377 | 59.3k | 81845463U, // AE_L16X4_RIC |
2378 | 59.3k | 81850053U, // AE_L16X4_RIP |
2379 | 59.3k | 62822U, // AE_L16X4_X |
2380 | 59.3k | 14736892U, // AE_L16X4_XC |
2381 | 59.3k | 14741362U, // AE_L16X4_XP |
2382 | 59.3k | 3221283950U, // AE_L16_I |
2383 | 59.3k | 3772837167U, // AE_L16_IP |
2384 | 59.3k | 62846U, // AE_L16_X |
2385 | 59.3k | 14736918U, // AE_L16_XC |
2386 | 59.3k | 14741388U, // AE_L16_XP |
2387 | 59.3k | 536929273U, // AE_L32F24_I |
2388 | 59.3k | 1088482451U, // AE_L32F24_IP |
2389 | 59.3k | 62759U, // AE_L32F24_X |
2390 | 59.3k | 14736824U, // AE_L32F24_XC |
2391 | 59.3k | 14741294U, // AE_L32F24_XP |
2392 | 59.3k | 536929440U, // AE_L32M_I |
2393 | 59.3k | 1088484417U, // AE_L32M_IU |
2394 | 59.3k | 62896U, // AE_L32M_X |
2395 | 59.3k | 14736972U, // AE_L32M_XC |
2396 | 59.3k | 14742671U, // AE_L32M_XU |
2397 | 59.3k | 1610671110U, // AE_L32X2F24_I |
2398 | 59.3k | 2162224323U, // AE_L32X2F24_IP |
2399 | 59.3k | 81845399U, // AE_L32X2F24_RIC |
2400 | 59.3k | 81849989U, // AE_L32X2F24_RIP |
2401 | 59.3k | 62772U, // AE_L32X2F24_X |
2402 | 59.3k | 14736838U, // AE_L32X2F24_XC |
2403 | 59.3k | 14741308U, // AE_L32X2F24_XP |
2404 | 59.3k | 1610671073U, // AE_L32X2_I |
2405 | 59.3k | 2162224209U, // AE_L32X2_IP |
2406 | 59.3k | 81845292U, // AE_L32X2_RIC |
2407 | 59.3k | 81849882U, // AE_L32X2_RIP |
2408 | 59.3k | 62735U, // AE_L32X2_X |
2409 | 59.3k | 14736798U, // AE_L32X2_XC |
2410 | 59.3k | 14741268U, // AE_L32X2_XP |
2411 | 59.3k | 536929239U, // AE_L32_I |
2412 | 59.3k | 1088482346U, // AE_L32_IP |
2413 | 59.3k | 62725U, // AE_L32_X |
2414 | 59.3k | 14736787U, // AE_L32_XC |
2415 | 59.3k | 14741257U, // AE_L32_XP |
2416 | 59.3k | 1610671140U, // AE_L64_I |
2417 | 59.3k | 2699095267U, // AE_L64_IP |
2418 | 59.3k | 62802U, // AE_L64_X |
2419 | 59.3k | 14736870U, // AE_L64_XC |
2420 | 59.3k | 14741340U, // AE_L64_XP |
2421 | 59.3k | 81845555U, // AE_LA16X4NEG_PC |
2422 | 59.3k | 81845621U, // AE_LA16X4POS_PC |
2423 | 59.3k | 3374373777U, // AE_LA16X4_IC |
2424 | 59.3k | 3374378233U, // AE_LA16X4_IP |
2425 | 59.3k | 3374374073U, // AE_LA16X4_RIC |
2426 | 59.3k | 3374378663U, // AE_LA16X4_RIP |
2427 | 59.3k | 81845540U, // AE_LA24NEG_PC |
2428 | 59.3k | 81845606U, // AE_LA24POS_PC |
2429 | 59.3k | 81845523U, // AE_LA24X2NEG_PC |
2430 | 59.3k | 81845589U, // AE_LA24X2POS_PC |
2431 | 59.3k | 3374373703U, // AE_LA24X2_IC |
2432 | 59.3k | 3374378091U, // AE_LA24X2_IP |
2433 | 59.3k | 3374373960U, // AE_LA24X2_RIC |
2434 | 59.3k | 3374378550U, // AE_LA24X2_RIP |
2435 | 59.3k | 3374373731U, // AE_LA24_IC |
2436 | 59.3k | 3374378119U, // AE_LA24_IP |
2437 | 59.3k | 3374373990U, // AE_LA24_RIC |
2438 | 59.3k | 3374378580U, // AE_LA24_RIP |
2439 | 59.3k | 3374373743U, // AE_LA32X2F24_IC |
2440 | 59.3k | 3374378145U, // AE_LA32X2F24_IP |
2441 | 59.3k | 3374374003U, // AE_LA32X2F24_RIC |
2442 | 59.3k | 3374378593U, // AE_LA32X2F24_RIP |
2443 | 59.3k | 81845506U, // AE_LA32X2NEG_PC |
2444 | 59.3k | 81845572U, // AE_LA32X2POS_PC |
2445 | 59.3k | 3374373675U, // AE_LA32X2_IC |
2446 | 59.3k | 3374378037U, // AE_LA32X2_IP |
2447 | 59.3k | 3374373902U, // AE_LA32X2_RIC |
2448 | 59.3k | 3374378492U, // AE_LA32X2_RIP |
2449 | 59.3k | 67170032U, // AE_LA64_PP |
2450 | 59.3k | 1610671150U, // AE_LALIGN64_I |
2451 | 59.3k | 67164923U, // AE_LB |
2452 | 59.3k | 21030156U, // AE_LBI |
2453 | 59.3k | 58679U, // AE_LBK |
2454 | 59.3k | 3758155036U, // AE_LBKI |
2455 | 59.3k | 67171066U, // AE_LBS |
2456 | 59.3k | 21030181U, // AE_LBSI |
2457 | 59.3k | 55868U, // AE_LE16 |
2458 | 59.3k | 49772U, // AE_LE32 |
2459 | 59.3k | 55571U, // AE_LE64 |
2460 | 59.3k | 55897U, // AE_LT16 |
2461 | 59.3k | 49897U, // AE_LT32 |
2462 | 59.3k | 55709U, // AE_LT64 |
2463 | 59.3k | 49917U, // AE_MAX32 |
2464 | 59.3k | 55729U, // AE_MAX64 |
2465 | 59.3k | 61747U, // AE_MAXABS32S |
2466 | 59.3k | 61972U, // AE_MAXABS64S |
2467 | 59.3k | 49824U, // AE_MIN32 |
2468 | 59.3k | 55647U, // AE_MIN64 |
2469 | 59.3k | 61733U, // AE_MINABS32S |
2470 | 59.3k | 61958U, // AE_MINABS64S |
2471 | 59.3k | 67171535U, // AE_MOV |
2472 | 59.3k | 67156701U, // AE_MOVAD16_0 |
2473 | 59.3k | 67157689U, // AE_MOVAD16_1 |
2474 | 59.3k | 67158151U, // AE_MOVAD16_2 |
2475 | 59.3k | 67163910U, // AE_MOVAD16_3 |
2476 | 59.3k | 67166058U, // AE_MOVAD32_H |
2477 | 59.3k | 67167566U, // AE_MOVAD32_L |
2478 | 59.3k | 67169101U, // AE_MOVALIGN |
2479 | 59.3k | 67164700U, // AE_MOVDA16 |
2480 | 59.3k | 55032U, // AE_MOVDA16X2 |
2481 | 59.3k | 67158557U, // AE_MOVDA32 |
2482 | 59.3k | 54910U, // AE_MOVDA32X2 |
2483 | 59.3k | 14834141U, // AE_MOVF16X4 |
2484 | 59.3k | 14833292U, // AE_MOVF32X2 |
2485 | 59.3k | 14833948U, // AE_MOVF64 |
2486 | 59.3k | 23127342U, // AE_MOVI |
2487 | 59.3k | 14834191U, // AE_MOVT16X4 |
2488 | 59.3k | 14833346U, // AE_MOVT32X2 |
2489 | 59.3k | 14834086U, // AE_MOVT64 |
2490 | 59.3k | 55786U, // AE_MUL16X4 |
2491 | 59.3k | 59868U, // AE_MUL32U_LL |
2492 | 59.3k | 48289U, // AE_MUL32X16_H0 |
2493 | 59.3k | 50765U, // AE_MUL32X16_H0_S2 |
2494 | 59.3k | 49059U, // AE_MUL32X16_H1 |
2495 | 59.3k | 51423U, // AE_MUL32X16_H1_S2 |
2496 | 59.3k | 50006U, // AE_MUL32X16_H2 |
2497 | 59.3k | 51973U, // AE_MUL32X16_H2_S2 |
2498 | 59.3k | 55180U, // AE_MUL32X16_H3 |
2499 | 59.3k | 52681U, // AE_MUL32X16_H3_S2 |
2500 | 59.3k | 48760U, // AE_MUL32X16_L0 |
2501 | 59.3k | 51302U, // AE_MUL32X16_L0_S2 |
2502 | 59.3k | 49254U, // AE_MUL32X16_L1 |
2503 | 59.3k | 51648U, // AE_MUL32X16_L1_S2 |
2504 | 59.3k | 50477U, // AE_MUL32X16_L2 |
2505 | 59.3k | 52510U, // AE_MUL32X16_L2_S2 |
2506 | 59.3k | 55375U, // AE_MUL32X16_L3 |
2507 | 59.3k | 52906U, // AE_MUL32X16_L3_S2 |
2508 | 59.3k | 57575U, // AE_MUL32_HH |
2509 | 59.3k | 57824U, // AE_MUL32_LH |
2510 | 59.3k | 59298U, // AE_MUL32_LL |
2511 | 59.3k | 54303U, // AE_MUL32_LL_S2 |
2512 | 59.3k | 25352656U, // AE_MULA16X4 |
2513 | 59.3k | 14838221U, // AE_MULA32U_LL |
2514 | 59.3k | 14826587U, // AE_MULA32X16_H0 |
2515 | 59.3k | 14829051U, // AE_MULA32X16_H0_S2 |
2516 | 59.3k | 14827357U, // AE_MULA32X16_H1 |
2517 | 59.3k | 14829709U, // AE_MULA32X16_H1_S2 |
2518 | 59.3k | 14828304U, // AE_MULA32X16_H2 |
2519 | 59.3k | 14830259U, // AE_MULA32X16_H2_S2 |
2520 | 59.3k | 14833478U, // AE_MULA32X16_H3 |
2521 | 59.3k | 14830967U, // AE_MULA32X16_H3_S2 |
2522 | 59.3k | 14827058U, // AE_MULA32X16_L0 |
2523 | 59.3k | 14829588U, // AE_MULA32X16_L0_S2 |
2524 | 59.3k | 14827552U, // AE_MULA32X16_L1 |
2525 | 59.3k | 14829934U, // AE_MULA32X16_L1_S2 |
2526 | 59.3k | 14828775U, // AE_MULA32X16_L2 |
2527 | 59.3k | 14830796U, // AE_MULA32X16_L2_S2 |
2528 | 59.3k | 14833673U, // AE_MULA32X16_L3 |
2529 | 59.3k | 14831192U, // AE_MULA32X16_L3_S2 |
2530 | 59.3k | 14835929U, // AE_MULA32_HH |
2531 | 59.3k | 14836178U, // AE_MULA32_LH |
2532 | 59.3k | 14837652U, // AE_MULA32_LL |
2533 | 59.3k | 14832654U, // AE_MULA32_LL_S2 |
2534 | 59.3k | 14837693U, // AE_MULAAD24_HH_LL |
2535 | 59.3k | 14832687U, // AE_MULAAD24_HH_LL_S2 |
2536 | 59.3k | 14836219U, // AE_MULAAD24_HL_LH |
2537 | 59.3k | 14831736U, // AE_MULAAD24_HL_LH_S2 |
2538 | 59.3k | 14827460U, // AE_MULAAD32X16_H0_L1 |
2539 | 59.3k | 14829830U, // AE_MULAAD32X16_H0_L1_S2 |
2540 | 59.3k | 14826690U, // AE_MULAAD32X16_H1_L0 |
2541 | 59.3k | 14829172U, // AE_MULAAD32X16_H1_L0_S2 |
2542 | 59.3k | 14833581U, // AE_MULAAD32X16_H2_L3 |
2543 | 59.3k | 14831088U, // AE_MULAAD32X16_H2_L3_S2 |
2544 | 59.3k | 14828407U, // AE_MULAAD32X16_H3_L2 |
2545 | 59.3k | 14830380U, // AE_MULAAD32X16_H3_L2_S2 |
2546 | 59.3k | 14826282U, // AE_MULAAFD16SS_11_00 |
2547 | 59.3k | 14828949U, // AE_MULAAFD16SS_11_00_S2 |
2548 | 59.3k | 14827669U, // AE_MULAAFD16SS_13_02 |
2549 | 59.3k | 14830055U, // AE_MULAAFD16SS_13_02_S2 |
2550 | 59.3k | 14827809U, // AE_MULAAFD16SS_33_22 |
2551 | 59.3k | 14830157U, // AE_MULAAFD16SS_33_22_S2 |
2552 | 59.3k | 14837771U, // AE_MULAAFD24_HH_LL |
2553 | 59.3k | 14832777U, // AE_MULAAFD24_HH_LL_S2 |
2554 | 59.3k | 14836258U, // AE_MULAAFD24_HL_LH |
2555 | 59.3k | 14831781U, // AE_MULAAFD24_HL_LH_S2 |
2556 | 59.3k | 14827505U, // AE_MULAAFD32X16_H0_L1 |
2557 | 59.3k | 14829881U, // AE_MULAAFD32X16_H0_L1_S2 |
2558 | 59.3k | 14826780U, // AE_MULAAFD32X16_H1_L0 |
2559 | 59.3k | 14829274U, // AE_MULAAFD32X16_H1_L0_S2 |
2560 | 59.3k | 14833626U, // AE_MULAAFD32X16_H2_L3 |
2561 | 59.3k | 14831139U, // AE_MULAAFD32X16_H2_L3_S2 |
2562 | 59.3k | 14828497U, // AE_MULAAFD32X16_H3_L2 |
2563 | 59.3k | 14830482U, // AE_MULAAFD32X16_H3_L2_S2 |
2564 | 59.3k | 14833776U, // AE_MULAC24 |
2565 | 59.3k | 14835647U, // AE_MULAC32X16_H |
2566 | 59.3k | 14837153U, // AE_MULAC32X16_L |
2567 | 59.3k | 14826232U, // AE_MULAF16SS_00 |
2568 | 59.3k | 14828890U, // AE_MULAF16SS_00_S2 |
2569 | 59.3k | 14826409U, // AE_MULAF16SS_10 |
2570 | 59.3k | 14827207U, // AE_MULAF16SS_11 |
2571 | 59.3k | 14826459U, // AE_MULAF16SS_20 |
2572 | 59.3k | 14827257U, // AE_MULAF16SS_21 |
2573 | 59.3k | 14827759U, // AE_MULAF16SS_22 |
2574 | 59.3k | 14826509U, // AE_MULAF16SS_30 |
2575 | 59.3k | 14827307U, // AE_MULAF16SS_31 |
2576 | 59.3k | 14827936U, // AE_MULAF16SS_32 |
2577 | 59.3k | 14833428U, // AE_MULAF16SS_33 |
2578 | 59.3k | 25359182U, // AE_MULAF16X4SS |
2579 | 59.3k | 14835970U, // AE_MULAF32R_HH |
2580 | 59.3k | 14836459U, // AE_MULAF32R_LH |
2581 | 59.3k | 14838013U, // AE_MULAF32R_LL |
2582 | 59.3k | 14833055U, // AE_MULAF32R_LL_S2 |
2583 | 59.3k | 14836066U, // AE_MULAF32S_HH |
2584 | 59.3k | 14836555U, // AE_MULAF32S_LH |
2585 | 59.3k | 14838109U, // AE_MULAF32S_LL |
2586 | 59.3k | 14833111U, // AE_MULAF32S_LL_S2 |
2587 | 59.3k | 14826604U, // AE_MULAF32X16_H0 |
2588 | 59.3k | 14829071U, // AE_MULAF32X16_H0_S2 |
2589 | 59.3k | 14827374U, // AE_MULAF32X16_H1 |
2590 | 59.3k | 14829729U, // AE_MULAF32X16_H1_S2 |
2591 | 59.3k | 14828321U, // AE_MULAF32X16_H2 |
2592 | 59.3k | 14830279U, // AE_MULAF32X16_H2_S2 |
2593 | 59.3k | 14833495U, // AE_MULAF32X16_H3 |
2594 | 59.3k | 14830987U, // AE_MULAF32X16_H3_S2 |
2595 | 59.3k | 14827075U, // AE_MULAF32X16_L0 |
2596 | 59.3k | 14829608U, // AE_MULAF32X16_L0_S2 |
2597 | 59.3k | 14827569U, // AE_MULAF32X16_L1 |
2598 | 59.3k | 14829954U, // AE_MULAF32X16_L1_S2 |
2599 | 59.3k | 14828792U, // AE_MULAF32X16_L2 |
2600 | 59.3k | 14830816U, // AE_MULAF32X16_L2_S2 |
2601 | 59.3k | 14833690U, // AE_MULAF32X16_L3 |
2602 | 59.3k | 14831212U, // AE_MULAF32X16_L3_S2 |
2603 | 59.3k | 14837299U, // AE_MULAF48Q32SP16S_L |
2604 | 59.3k | 14832225U, // AE_MULAF48Q32SP16S_L_S2 |
2605 | 59.3k | 14837538U, // AE_MULAF48Q32SP16U_L |
2606 | 59.3k | 14832515U, // AE_MULAF48Q32SP16U_L_S2 |
2607 | 59.3k | 14834391U, // AE_MULAFC24RA |
2608 | 59.3k | 14835823U, // AE_MULAFC32X16RAS_H |
2609 | 59.3k | 14837432U, // AE_MULAFC32X16RAS_L |
2610 | 59.3k | 25354208U, // AE_MULAFD24X2_FIR_H |
2611 | 59.3k | 25355714U, // AE_MULAFD24X2_FIR_L |
2612 | 59.3k | 25354545U, // AE_MULAFD32X16X2_FIR_HH |
2613 | 59.3k | 25356131U, // AE_MULAFD32X16X2_FIR_HL |
2614 | 59.3k | 25355034U, // AE_MULAFD32X16X2_FIR_LH |
2615 | 59.3k | 25356588U, // AE_MULAFD32X16X2_FIR_LL |
2616 | 59.3k | 14839776U, // AE_MULAFP24X2R |
2617 | 59.3k | 14834341U, // AE_MULAFP24X2RA |
2618 | 59.3k | 14831313U, // AE_MULAFP24X2RA_S2 |
2619 | 59.3k | 14833222U, // AE_MULAFP24X2R_S2 |
2620 | 59.3k | 14835755U, // AE_MULAFP32X16X2RAS_H |
2621 | 59.3k | 14831511U, // AE_MULAFP32X16X2RAS_H_S2 |
2622 | 59.3k | 14837364U, // AE_MULAFP32X16X2RAS_L |
2623 | 59.3k | 14832364U, // AE_MULAFP32X16X2RAS_L_S2 |
2624 | 59.3k | 14835864U, // AE_MULAFP32X16X2RS_H |
2625 | 59.3k | 14831588U, // AE_MULAFP32X16X2RS_H_S2 |
2626 | 59.3k | 14837473U, // AE_MULAFP32X16X2RS_L |
2627 | 59.3k | 14832441U, // AE_MULAFP32X16X2RS_L_S2 |
2628 | 59.3k | 14840500U, // AE_MULAFP32X2RAS |
2629 | 59.3k | 14840591U, // AE_MULAFP32X2RS |
2630 | 59.3k | 14831372U, // AE_MULAFQ32SP24S_H_S2 |
2631 | 59.3k | 14832086U, // AE_MULAFQ32SP24S_L_S2 |
2632 | 59.3k | 14833359U, // AE_MULAP24X2 |
2633 | 59.3k | 14830917U, // AE_MULAP24X2_S2 |
2634 | 59.3k | 14835591U, // AE_MULAP32X16X2_H |
2635 | 59.3k | 14837097U, // AE_MULAP32X16X2_L |
2636 | 59.3k | 14833305U, // AE_MULAP32X2 |
2637 | 59.3k | 14832299U, // AE_MULAQ32SP16S_L_S2 |
2638 | 59.3k | 14832589U, // AE_MULAQ32SP16U_L_S2 |
2639 | 59.3k | 14831417U, // AE_MULARFQ32SP24S_H_S2 |
2640 | 59.3k | 14832131U, // AE_MULARFQ32SP24S_L_S2 |
2641 | 59.3k | 14836113U, // AE_MULAS32F48P16S_HH |
2642 | 59.3k | 14831662U, // AE_MULAS32F48P16S_HH_S2 |
2643 | 59.3k | 14836602U, // AE_MULAS32F48P16S_LH |
2644 | 59.3k | 14832012U, // AE_MULAS32F48P16S_LH_S2 |
2645 | 59.3k | 14838156U, // AE_MULAS32F48P16S_LL |
2646 | 59.3k | 14833148U, // AE_MULAS32F48P16S_LL_S2 |
2647 | 59.3k | 14837935U, // AE_MULASD24_HH_LL |
2648 | 59.3k | 14832965U, // AE_MULASD24_HH_LL_S2 |
2649 | 59.3k | 14836381U, // AE_MULASD24_HL_LH |
2650 | 59.3k | 14831922U, // AE_MULASD24_HL_LH_S2 |
2651 | 59.3k | 14826968U, // AE_MULASD32X16_H1_L0 |
2652 | 59.3k | 14829486U, // AE_MULASD32X16_H1_L0_S2 |
2653 | 59.3k | 14828685U, // AE_MULASD32X16_H3_L2 |
2654 | 59.3k | 14830694U, // AE_MULASD32X16_H3_L2_S2 |
2655 | 59.3k | 14837853U, // AE_MULASFD24_HH_LL |
2656 | 59.3k | 14832871U, // AE_MULASFD24_HH_LL_S2 |
2657 | 59.3k | 14836299U, // AE_MULASFD24_HL_LH |
2658 | 59.3k | 14831828U, // AE_MULASFD24_HL_LH_S2 |
2659 | 59.3k | 14826874U, // AE_MULASFD32X16_H1_L0 |
2660 | 59.3k | 14829380U, // AE_MULASFD32X16_H1_L0_S2 |
2661 | 59.3k | 14828591U, // AE_MULASFD32X16_H3_L2 |
2662 | 59.3k | 14830588U, // AE_MULASFD32X16_H3_L2_S2 |
2663 | 59.3k | 55420U, // AE_MULC24 |
2664 | 59.3k | 57296U, // AE_MULC32X16_H |
2665 | 59.3k | 58802U, // AE_MULC32X16_L |
2666 | 59.3k | 47881U, // AE_MULF16SS_00 |
2667 | 59.3k | 50542U, // AE_MULF16SS_00_S2 |
2668 | 59.3k | 48058U, // AE_MULF16SS_10 |
2669 | 59.3k | 48856U, // AE_MULF16SS_11 |
2670 | 59.3k | 48108U, // AE_MULF16SS_20 |
2671 | 59.3k | 48906U, // AE_MULF16SS_21 |
2672 | 59.3k | 49408U, // AE_MULF16SS_22 |
2673 | 59.3k | 48158U, // AE_MULF16SS_30 |
2674 | 59.3k | 48956U, // AE_MULF16SS_31 |
2675 | 59.3k | 49585U, // AE_MULF16SS_32 |
2676 | 59.3k | 55077U, // AE_MULF16SS_33 |
2677 | 59.3k | 62302U, // AE_MULF16X4SS |
2678 | 59.3k | 57618U, // AE_MULF32R_HH |
2679 | 59.3k | 58107U, // AE_MULF32R_LH |
2680 | 59.3k | 59661U, // AE_MULF32R_LL |
2681 | 59.3k | 54706U, // AE_MULF32R_LL_S2 |
2682 | 59.3k | 57714U, // AE_MULF32S_HH |
2683 | 59.3k | 58203U, // AE_MULF32S_LH |
2684 | 59.3k | 59757U, // AE_MULF32S_LL |
2685 | 59.3k | 54762U, // AE_MULF32S_LL_S2 |
2686 | 59.3k | 48254U, // AE_MULF32X16_H0 |
2687 | 59.3k | 50724U, // AE_MULF32X16_H0_S2 |
2688 | 59.3k | 49024U, // AE_MULF32X16_H1 |
2689 | 59.3k | 51382U, // AE_MULF32X16_H1_S2 |
2690 | 59.3k | 49971U, // AE_MULF32X16_H2 |
2691 | 59.3k | 51932U, // AE_MULF32X16_H2_S2 |
2692 | 59.3k | 55145U, // AE_MULF32X16_H3 |
2693 | 59.3k | 52640U, // AE_MULF32X16_H3_S2 |
2694 | 59.3k | 48725U, // AE_MULF32X16_L0 |
2695 | 59.3k | 51261U, // AE_MULF32X16_L0_S2 |
2696 | 59.3k | 49219U, // AE_MULF32X16_L1 |
2697 | 59.3k | 51607U, // AE_MULF32X16_L1_S2 |
2698 | 59.3k | 50442U, // AE_MULF32X16_L2 |
2699 | 59.3k | 52469U, // AE_MULF32X16_L2_S2 |
2700 | 59.3k | 55340U, // AE_MULF32X16_L3 |
2701 | 59.3k | 52865U, // AE_MULF32X16_L3_S2 |
2702 | 59.3k | 58953U, // AE_MULF48Q32SP16S_L |
2703 | 59.3k | 53882U, // AE_MULF48Q32SP16S_L_S2 |
2704 | 59.3k | 59192U, // AE_MULF48Q32SP16U_L |
2705 | 59.3k | 54172U, // AE_MULF48Q32SP16U_L_S2 |
2706 | 59.3k | 56038U, // AE_MULFC24RA |
2707 | 59.3k | 57476U, // AE_MULFC32X16RAS_H |
2708 | 59.3k | 59085U, // AE_MULFC32X16RAS_L |
2709 | 59.3k | 57333U, // AE_MULFD24X2_FIR_H |
2710 | 59.3k | 58839U, // AE_MULFD24X2_FIR_L |
2711 | 59.3k | 57674U, // AE_MULFD32X16X2_FIR_HH |
2712 | 59.3k | 59260U, // AE_MULFD32X16X2_FIR_HL |
2713 | 59.3k | 58163U, // AE_MULFD32X16X2_FIR_LH |
2714 | 59.3k | 59717U, // AE_MULFD32X16X2_FIR_LL |
2715 | 59.3k | 62185U, // AE_MULFP16X4RAS |
2716 | 59.3k | 61986U, // AE_MULFP16X4S |
2717 | 59.3k | 61424U, // AE_MULFP24X2R |
2718 | 59.3k | 55990U, // AE_MULFP24X2RA |
2719 | 59.3k | 52965U, // AE_MULFP24X2RA_S2 |
2720 | 59.3k | 54873U, // AE_MULFP24X2R_S2 |
2721 | 59.3k | 57410U, // AE_MULFP32X16X2RAS_H |
2722 | 59.3k | 53169U, // AE_MULFP32X16X2RAS_H_S2 |
2723 | 59.3k | 59019U, // AE_MULFP32X16X2RAS_L |
2724 | 59.3k | 54022U, // AE_MULFP32X16X2RAS_L_S2 |
2725 | 59.3k | 57518U, // AE_MULFP32X16X2RS_H |
2726 | 59.3k | 53245U, // AE_MULFP32X16X2RS_H_S2 |
2727 | 59.3k | 59127U, // AE_MULFP32X16X2RS_L |
2728 | 59.3k | 54098U, // AE_MULFP32X16X2RS_L_S2 |
2729 | 59.3k | 62150U, // AE_MULFP32X2RAS |
2730 | 59.3k | 62240U, // AE_MULFP32X2RS |
2731 | 59.3k | 53027U, // AE_MULFQ32SP24S_H_S2 |
2732 | 59.3k | 53741U, // AE_MULFQ32SP24S_L_S2 |
2733 | 59.3k | 55005U, // AE_MULP24X2 |
2734 | 59.3k | 52566U, // AE_MULP24X2_S2 |
2735 | 59.3k | 57242U, // AE_MULP32X16X2_H |
2736 | 59.3k | 58748U, // AE_MULP32X16X2_L |
2737 | 59.3k | 54951U, // AE_MULP32X2 |
2738 | 59.3k | 53953U, // AE_MULQ32SP16S_L_S2 |
2739 | 59.3k | 54243U, // AE_MULQ32SP16U_L_S2 |
2740 | 59.3k | 53073U, // AE_MULRFQ32SP24S_H_S2 |
2741 | 59.3k | 53787U, // AE_MULRFQ32SP24S_L_S2 |
2742 | 59.3k | 25352694U, // AE_MULS16X4 |
2743 | 59.3k | 57767U, // AE_MULS32F48P16S_HH |
2744 | 59.3k | 53319U, // AE_MULS32F48P16S_HH_S2 |
2745 | 59.3k | 58256U, // AE_MULS32F48P16S_LH |
2746 | 59.3k | 53669U, // AE_MULS32F48P16S_LH_S2 |
2747 | 59.3k | 59810U, // AE_MULS32F48P16S_LL |
2748 | 59.3k | 54805U, // AE_MULS32F48P16S_LL_S2 |
2749 | 59.3k | 14838250U, // AE_MULS32U_LL |
2750 | 59.3k | 14826673U, // AE_MULS32X16_H0 |
2751 | 59.3k | 14829152U, // AE_MULS32X16_H0_S2 |
2752 | 59.3k | 14827443U, // AE_MULS32X16_H1 |
2753 | 59.3k | 14829810U, // AE_MULS32X16_H1_S2 |
2754 | 59.3k | 14828390U, // AE_MULS32X16_H2 |
2755 | 59.3k | 14830360U, // AE_MULS32X16_H2_S2 |
2756 | 59.3k | 14833564U, // AE_MULS32X16_H3 |
2757 | 59.3k | 14831068U, // AE_MULS32X16_H3_S2 |
2758 | 59.3k | 14827144U, // AE_MULS32X16_L0 |
2759 | 59.3k | 14829689U, // AE_MULS32X16_L0_S2 |
2760 | 59.3k | 14827638U, // AE_MULS32X16_L1 |
2761 | 59.3k | 14830035U, // AE_MULS32X16_L1_S2 |
2762 | 59.3k | 14828861U, // AE_MULS32X16_L2 |
2763 | 59.3k | 14830897U, // AE_MULS32X16_L2_S2 |
2764 | 59.3k | 14833759U, // AE_MULS32X16_L3 |
2765 | 59.3k | 14831293U, // AE_MULS32X16_L3_S2 |
2766 | 59.3k | 14835956U, // AE_MULS32_HH |
2767 | 59.3k | 14836205U, // AE_MULS32_LH |
2768 | 59.3k | 14837679U, // AE_MULS32_LL |
2769 | 59.3k | 14837732U, // AE_MULSAD24_HH_LL |
2770 | 59.3k | 14832732U, // AE_MULSAD24_HH_LL_S2 |
2771 | 59.3k | 14826735U, // AE_MULSAD32X16_H1_L0 |
2772 | 59.3k | 14829223U, // AE_MULSAD32X16_H1_L0_S2 |
2773 | 59.3k | 14828452U, // AE_MULSAD32X16_H3_L2 |
2774 | 59.3k | 14830431U, // AE_MULSAD32X16_H3_L2_S2 |
2775 | 59.3k | 14837812U, // AE_MULSAFD24_HH_LL |
2776 | 59.3k | 14832824U, // AE_MULSAFD24_HH_LL_S2 |
2777 | 59.3k | 14826827U, // AE_MULSAFD32X16_H1_L0 |
2778 | 59.3k | 14829327U, // AE_MULSAFD32X16_H1_L0_S2 |
2779 | 59.3k | 14828544U, // AE_MULSAFD32X16_H3_L2 |
2780 | 59.3k | 14830535U, // AE_MULSAFD32X16_H3_L2_S2 |
2781 | 59.3k | 14826265U, // AE_MULSF16SS_00 |
2782 | 59.3k | 14828929U, // AE_MULSF16SS_00_S2 |
2783 | 59.3k | 14826442U, // AE_MULSF16SS_10 |
2784 | 59.3k | 14827240U, // AE_MULSF16SS_11 |
2785 | 59.3k | 14826492U, // AE_MULSF16SS_20 |
2786 | 59.3k | 14827290U, // AE_MULSF16SS_21 |
2787 | 59.3k | 14827792U, // AE_MULSF16SS_22 |
2788 | 59.3k | 14826542U, // AE_MULSF16SS_30 |
2789 | 59.3k | 14827340U, // AE_MULSF16SS_31 |
2790 | 59.3k | 14827969U, // AE_MULSF16SS_32 |
2791 | 59.3k | 14833461U, // AE_MULSF16SS_33 |
2792 | 59.3k | 25359213U, // AE_MULSF16X4SS |
2793 | 59.3k | 14836001U, // AE_MULSF32R_HH |
2794 | 59.3k | 14836490U, // AE_MULSF32R_LH |
2795 | 59.3k | 14838044U, // AE_MULSF32R_LL |
2796 | 59.3k | 14833092U, // AE_MULSF32R_LL_S2 |
2797 | 59.3k | 14836097U, // AE_MULSF32S_HH |
2798 | 59.3k | 14836586U, // AE_MULSF32S_LH |
2799 | 59.3k | 14838140U, // AE_MULSF32S_LL |
2800 | 59.3k | 14826639U, // AE_MULSF32X16_H0 |
2801 | 59.3k | 14829112U, // AE_MULSF32X16_H0_S2 |
2802 | 59.3k | 14827409U, // AE_MULSF32X16_H1 |
2803 | 59.3k | 14829770U, // AE_MULSF32X16_H1_S2 |
2804 | 59.3k | 14828356U, // AE_MULSF32X16_H2 |
2805 | 59.3k | 14830320U, // AE_MULSF32X16_H2_S2 |
2806 | 59.3k | 14833530U, // AE_MULSF32X16_H3 |
2807 | 59.3k | 14831028U, // AE_MULSF32X16_H3_S2 |
2808 | 59.3k | 14827110U, // AE_MULSF32X16_L0 |
2809 | 59.3k | 14829649U, // AE_MULSF32X16_L0_S2 |
2810 | 59.3k | 14827604U, // AE_MULSF32X16_L1 |
2811 | 59.3k | 14829995U, // AE_MULSF32X16_L1_S2 |
2812 | 59.3k | 14828827U, // AE_MULSF32X16_L2 |
2813 | 59.3k | 14830857U, // AE_MULSF32X16_L2_S2 |
2814 | 59.3k | 14833725U, // AE_MULSF32X16_L3 |
2815 | 59.3k | 14831253U, // AE_MULSF32X16_L3_S2 |
2816 | 59.3k | 14837342U, // AE_MULSF48Q32SP16S_L |
2817 | 59.3k | 14832274U, // AE_MULSF48Q32SP16S_L_S2 |
2818 | 59.3k | 14837581U, // AE_MULSF48Q32SP16U_L |
2819 | 59.3k | 14832564U, // AE_MULSF48Q32SP16U_L_S2 |
2820 | 59.3k | 14839807U, // AE_MULSFP24X2R |
2821 | 59.3k | 14834374U, // AE_MULSFP24X2RA |
2822 | 59.3k | 14831352U, // AE_MULSFP24X2RA_S2 |
2823 | 59.3k | 14833259U, // AE_MULSFP24X2R_S2 |
2824 | 59.3k | 14835800U, // AE_MULSFP32X16X2RAS_H |
2825 | 59.3k | 14831562U, // AE_MULSFP32X16X2RAS_H_S2 |
2826 | 59.3k | 14837409U, // AE_MULSFP32X16X2RAS_L |
2827 | 59.3k | 14832415U, // AE_MULSFP32X16X2RAS_L_S2 |
2828 | 59.3k | 14835907U, // AE_MULSFP32X16X2RS_H |
2829 | 59.3k | 14831637U, // AE_MULSFP32X16X2RS_H_S2 |
2830 | 59.3k | 14837516U, // AE_MULSFP32X16X2RS_L |
2831 | 59.3k | 14832490U, // AE_MULSFP32X16X2RS_L_S2 |
2832 | 59.3k | 14840535U, // AE_MULSFP32X2RAS |
2833 | 59.3k | 14840624U, // AE_MULSFP32X2RS |
2834 | 59.3k | 14831488U, // AE_MULSFQ32SP24S_H_S2 |
2835 | 59.3k | 14832202U, // AE_MULSFQ32SP24S_L_S2 |
2836 | 59.3k | 14833386U, // AE_MULSP24X2 |
2837 | 59.3k | 14830950U, // AE_MULSP24X2_S2 |
2838 | 59.3k | 14835628U, // AE_MULSP32X16X2_H |
2839 | 59.3k | 14837134U, // AE_MULSP32X16X2_L |
2840 | 59.3k | 14833332U, // AE_MULSP32X2 |
2841 | 59.3k | 14832342U, // AE_MULSQ32SP16S_L_S2 |
2842 | 59.3k | 14832632U, // AE_MULSQ32SP16U_L_S2 |
2843 | 59.3k | 14831464U, // AE_MULSRFQ32SP24S_H_S2 |
2844 | 59.3k | 14832178U, // AE_MULSRFQ32SP24S_L_S2 |
2845 | 59.3k | 14836156U, // AE_MULSS32F48P16S_HH |
2846 | 59.3k | 14831711U, // AE_MULSS32F48P16S_HH_S2 |
2847 | 59.3k | 14836645U, // AE_MULSS32F48P16S_LH |
2848 | 59.3k | 14832061U, // AE_MULSS32F48P16S_LH_S2 |
2849 | 59.3k | 14838199U, // AE_MULSS32F48P16S_LL |
2850 | 59.3k | 14833197U, // AE_MULSS32F48P16S_LL_S2 |
2851 | 59.3k | 14837974U, // AE_MULSSD24_HH_LL |
2852 | 59.3k | 14833010U, // AE_MULSSD24_HH_LL_S2 |
2853 | 59.3k | 14836420U, // AE_MULSSD24_HL_LH |
2854 | 59.3k | 14831967U, // AE_MULSSD24_HL_LH_S2 |
2855 | 59.3k | 14827013U, // AE_MULSSD32X16_H1_L0 |
2856 | 59.3k | 14829537U, // AE_MULSSD32X16_H1_L0_S2 |
2857 | 59.3k | 14828730U, // AE_MULSSD32X16_H3_L2 |
2858 | 59.3k | 14830745U, // AE_MULSSD32X16_H3_L2_S2 |
2859 | 59.3k | 14826327U, // AE_MULSSFD16SS_11_00 |
2860 | 59.3k | 14829000U, // AE_MULSSFD16SS_11_00_S2 |
2861 | 59.3k | 14827714U, // AE_MULSSFD16SS_13_02 |
2862 | 59.3k | 14830106U, // AE_MULSSFD16SS_13_02_S2 |
2863 | 59.3k | 14827854U, // AE_MULSSFD16SS_33_22 |
2864 | 59.3k | 14830208U, // AE_MULSSFD16SS_33_22_S2 |
2865 | 59.3k | 14837894U, // AE_MULSSFD24_HH_LL |
2866 | 59.3k | 14832918U, // AE_MULSSFD24_HH_LL_S2 |
2867 | 59.3k | 14836340U, // AE_MULSSFD24_HL_LH |
2868 | 59.3k | 14831875U, // AE_MULSSFD24_HL_LH_S2 |
2869 | 59.3k | 14826921U, // AE_MULSSFD32X16_H1_L0 |
2870 | 59.3k | 14829433U, // AE_MULSSFD32X16_H1_L0_S2 |
2871 | 59.3k | 14828638U, // AE_MULSSFD32X16_H3_L2 |
2872 | 59.3k | 14830641U, // AE_MULSSFD32X16_H3_L2_S2 |
2873 | 59.3k | 59344U, // AE_MULZAAD24_HH_LL |
2874 | 59.3k | 54341U, // AE_MULZAAD24_HH_LL_S2 |
2875 | 59.3k | 57870U, // AE_MULZAAD24_HL_LH |
2876 | 59.3k | 53390U, // AE_MULZAAD24_HL_LH_S2 |
2877 | 59.3k | 49114U, // AE_MULZAAD32X16_H0_L1 |
2878 | 59.3k | 51487U, // AE_MULZAAD32X16_H0_L1_S2 |
2879 | 59.3k | 48344U, // AE_MULZAAD32X16_H1_L0 |
2880 | 59.3k | 50829U, // AE_MULZAAD32X16_H1_L0_S2 |
2881 | 59.3k | 55235U, // AE_MULZAAD32X16_H2_L3 |
2882 | 59.3k | 52745U, // AE_MULZAAD32X16_H2_L3_S2 |
2883 | 59.3k | 50061U, // AE_MULZAAD32X16_H3_L2 |
2884 | 59.3k | 52037U, // AE_MULZAAD32X16_H3_L2_S2 |
2885 | 59.3k | 47936U, // AE_MULZAAFD16SS_11_00 |
2886 | 59.3k | 50606U, // AE_MULZAAFD16SS_11_00_S2 |
2887 | 59.3k | 49323U, // AE_MULZAAFD16SS_13_02 |
2888 | 59.3k | 51712U, // AE_MULZAAFD16SS_13_02_S2 |
2889 | 59.3k | 49463U, // AE_MULZAAFD16SS_33_22 |
2890 | 59.3k | 51814U, // AE_MULZAAFD16SS_33_22_S2 |
2891 | 59.3k | 59423U, // AE_MULZAAFD24_HH_LL |
2892 | 59.3k | 54432U, // AE_MULZAAFD24_HH_LL_S2 |
2893 | 59.3k | 57910U, // AE_MULZAAFD24_HL_LH |
2894 | 59.3k | 53436U, // AE_MULZAAFD24_HL_LH_S2 |
2895 | 59.3k | 49160U, // AE_MULZAAFD32X16_H0_L1 |
2896 | 59.3k | 51539U, // AE_MULZAAFD32X16_H0_L1_S2 |
2897 | 59.3k | 48435U, // AE_MULZAAFD32X16_H1_L0 |
2898 | 59.3k | 50932U, // AE_MULZAAFD32X16_H1_L0_S2 |
2899 | 59.3k | 55281U, // AE_MULZAAFD32X16_H2_L3 |
2900 | 59.3k | 52797U, // AE_MULZAAFD32X16_H2_L3_S2 |
2901 | 59.3k | 50152U, // AE_MULZAAFD32X16_H3_L2 |
2902 | 59.3k | 52140U, // AE_MULZAAFD32X16_H3_L2_S2 |
2903 | 59.3k | 59586U, // AE_MULZASD24_HH_LL |
2904 | 59.3k | 54619U, // AE_MULZASD24_HH_LL_S2 |
2905 | 59.3k | 58032U, // AE_MULZASD24_HL_LH |
2906 | 59.3k | 53576U, // AE_MULZASD24_HL_LH_S2 |
2907 | 59.3k | 48622U, // AE_MULZASD32X16_H1_L0 |
2908 | 59.3k | 51143U, // AE_MULZASD32X16_H1_L0_S2 |
2909 | 59.3k | 50339U, // AE_MULZASD32X16_H3_L2 |
2910 | 59.3k | 52351U, // AE_MULZASD32X16_H3_L2_S2 |
2911 | 59.3k | 59505U, // AE_MULZASFD24_HH_LL |
2912 | 59.3k | 54526U, // AE_MULZASFD24_HH_LL_S2 |
2913 | 59.3k | 57951U, // AE_MULZASFD24_HL_LH |
2914 | 59.3k | 53483U, // AE_MULZASFD24_HL_LH_S2 |
2915 | 59.3k | 48529U, // AE_MULZASFD32X16_H1_L0 |
2916 | 59.3k | 51038U, // AE_MULZASFD32X16_H1_L0_S2 |
2917 | 59.3k | 50246U, // AE_MULZASFD32X16_H3_L2 |
2918 | 59.3k | 52246U, // AE_MULZASFD32X16_H3_L2_S2 |
2919 | 59.3k | 59383U, // AE_MULZSAD24_HH_LL |
2920 | 59.3k | 54386U, // AE_MULZSAD24_HH_LL_S2 |
2921 | 59.3k | 48389U, // AE_MULZSAD32X16_H1_L0 |
2922 | 59.3k | 50880U, // AE_MULZSAD32X16_H1_L0_S2 |
2923 | 59.3k | 50106U, // AE_MULZSAD32X16_H3_L2 |
2924 | 59.3k | 52088U, // AE_MULZSAD32X16_H3_L2_S2 |
2925 | 59.3k | 59464U, // AE_MULZSAFD24_HH_LL |
2926 | 59.3k | 54479U, // AE_MULZSAFD24_HH_LL_S2 |
2927 | 59.3k | 48482U, // AE_MULZSAFD32X16_H1_L0 |
2928 | 59.3k | 50985U, // AE_MULZSAFD32X16_H1_L0_S2 |
2929 | 59.3k | 50199U, // AE_MULZSAFD32X16_H3_L2 |
2930 | 59.3k | 52193U, // AE_MULZSAFD32X16_H3_L2_S2 |
2931 | 59.3k | 59625U, // AE_MULZSSD24_HH_LL |
2932 | 59.3k | 54664U, // AE_MULZSSD24_HH_LL_S2 |
2933 | 59.3k | 58071U, // AE_MULZSSD24_HL_LH |
2934 | 59.3k | 53621U, // AE_MULZSSD24_HL_LH_S2 |
2935 | 59.3k | 48667U, // AE_MULZSSD32X16_H1_L0 |
2936 | 59.3k | 51194U, // AE_MULZSSD32X16_H1_L0_S2 |
2937 | 59.3k | 50384U, // AE_MULZSSD32X16_H3_L2 |
2938 | 59.3k | 52402U, // AE_MULZSSD32X16_H3_L2_S2 |
2939 | 59.3k | 47981U, // AE_MULZSSFD16SS_11_00 |
2940 | 59.3k | 50657U, // AE_MULZSSFD16SS_11_00_S2 |
2941 | 59.3k | 49368U, // AE_MULZSSFD16SS_13_02 |
2942 | 59.3k | 51763U, // AE_MULZSSFD16SS_13_02_S2 |
2943 | 59.3k | 49508U, // AE_MULZSSFD16SS_33_22 |
2944 | 59.3k | 51865U, // AE_MULZSSFD16SS_33_22_S2 |
2945 | 59.3k | 59546U, // AE_MULZSSFD24_HH_LL |
2946 | 59.3k | 54573U, // AE_MULZSSFD24_HH_LL_S2 |
2947 | 59.3k | 57992U, // AE_MULZSSFD24_HL_LH |
2948 | 59.3k | 53530U, // AE_MULZSSFD24_HL_LH_S2 |
2949 | 59.3k | 48576U, // AE_MULZSSFD32X16_H1_L0 |
2950 | 59.3k | 51091U, // AE_MULZSSFD32X16_H1_L0_S2 |
2951 | 59.3k | 50293U, // AE_MULZSSFD32X16_H3_L2 |
2952 | 59.3k | 52299U, // AE_MULZSSFD32X16_H3_L2_S2 |
2953 | 59.3k | 57078U, // AE_NAND |
2954 | 59.3k | 67170911U, // AE_NEG16S |
2955 | 59.3k | 67170647U, // AE_NEG24S |
2956 | 59.3k | 67158645U, // AE_NEG32 |
2957 | 59.3k | 67170551U, // AE_NEG32S |
2958 | 59.3k | 67164455U, // AE_NEG64 |
2959 | 59.3k | 67170776U, // AE_NEG64S |
2960 | 59.3k | 67164405U, // AE_NSA64 |
2961 | 59.3k | 67156715U, // AE_NSAZ16_0 |
2962 | 59.3k | 67167580U, // AE_NSAZ32_L |
2963 | 59.3k | 61553U, // AE_OR |
2964 | 59.3k | 551704744U, // AE_PKSR24 |
2965 | 59.3k | 551699123U, // AE_PKSR32 |
2966 | 59.3k | 60052U, // AE_ROUND16X4F32SASYM |
2967 | 59.3k | 60140U, // AE_ROUND16X4F32SSYM |
2968 | 59.3k | 60118U, // AE_ROUND24X2F48SASYM |
2969 | 59.3k | 60203U, // AE_ROUND24X2F48SSYM |
2970 | 59.3k | 60096U, // AE_ROUND32X2F48SASYM |
2971 | 59.3k | 60182U, // AE_ROUND32X2F48SSYM |
2972 | 59.3k | 60074U, // AE_ROUND32X2F64SASYM |
2973 | 59.3k | 60161U, // AE_ROUND32X2F64SSYM |
2974 | 59.3k | 67168874U, // AE_ROUNDSP16F24ASYM |
2975 | 59.3k | 67168811U, // AE_ROUNDSP16F24SYM |
2976 | 59.3k | 59987U, // AE_ROUNDSP16Q48X2ASYM |
2977 | 59.3k | 59925U, // AE_ROUNDSP16Q48X2SYM |
2978 | 59.3k | 67168895U, // AE_ROUNDSQ32F48ASYM |
2979 | 59.3k | 67168831U, // AE_ROUNDSQ32F48SYM |
2980 | 59.3k | 3221283987U, // AE_S16M_L_I |
2981 | 59.3k | 3772937267U, // AE_S16M_L_IU |
2982 | 59.3k | 62883U, // AE_S16M_L_X |
2983 | 59.3k | 14835262U, // AE_S16M_L_XC |
2984 | 59.3k | 14840961U, // AE_S16M_L_XU |
2985 | 59.3k | 536929475U, // AE_S16X2M_I |
2986 | 59.3k | 1088582759U, // AE_S16X2M_IU |
2987 | 59.3k | 62931U, // AE_S16X2M_X |
2988 | 59.3k | 14835314U, // AE_S16X2M_XC |
2989 | 59.3k | 14841013U, // AE_S16X2M_XU |
2990 | 59.3k | 1610671202U, // AE_S16X4_I |
2991 | 59.3k | 2162322722U, // AE_S16X4_IP |
2992 | 59.3k | 81943781U, // AE_S16X4_RIC |
2993 | 59.3k | 81948371U, // AE_S16X4_RIP |
2994 | 59.3k | 62834U, // AE_S16X4_X |
2995 | 59.3k | 14835209U, // AE_S16X4_XC |
2996 | 59.3k | 14839679U, // AE_S16X4_XP |
2997 | 59.3k | 3221283787U, // AE_S16_0_I |
2998 | 59.3k | 3772935197U, // AE_S16_0_IP |
2999 | 59.3k | 62713U, // AE_S16_0_X |
3000 | 59.3k | 14835078U, // AE_S16_0_XC |
3001 | 59.3k | 14839548U, // AE_S16_0_XP |
3002 | 59.3k | 536929514U, // AE_S24RA64S_I |
3003 | 59.3k | 1088581100U, // AE_S24RA64S_IP |
3004 | 59.3k | 62970U, // AE_S24RA64S_X |
3005 | 59.3k | 14835356U, // AE_S24RA64S_XC |
3006 | 59.3k | 14839748U, // AE_S24RA64S_XP |
3007 | 59.3k | 14839258U, // AE_S24X2RA64S_IP |
3008 | 59.3k | 536929412U, // AE_S32F24_L_I |
3009 | 59.3k | 1088581032U, // AE_S32F24_L_IP |
3010 | 59.3k | 62868U, // AE_S32F24_L_X |
3011 | 59.3k | 14835246U, // AE_S32F24_L_XC |
3012 | 59.3k | 14839716U, // AE_S32F24_L_XP |
3013 | 59.3k | 536929451U, // AE_S32M_I |
3014 | 59.3k | 1088582733U, // AE_S32M_IU |
3015 | 59.3k | 62907U, // AE_S32M_X |
3016 | 59.3k | 14835288U, // AE_S32M_XC |
3017 | 59.3k | 14840987U, // AE_S32M_XU |
3018 | 59.3k | 536929499U, // AE_S32RA64S_I |
3019 | 59.3k | 1088581048U, // AE_S32RA64S_IP |
3020 | 59.3k | 62955U, // AE_S32RA64S_X |
3021 | 59.3k | 14835340U, // AE_S32RA64S_XC |
3022 | 59.3k | 14839732U, // AE_S32RA64S_XP |
3023 | 59.3k | 1610671125U, // AE_S32X2F24_I |
3024 | 59.3k | 2162322643U, // AE_S32X2F24_IP |
3025 | 59.3k | 81943720U, // AE_S32X2F24_RIC |
3026 | 59.3k | 81948310U, // AE_S32X2F24_RIP |
3027 | 59.3k | 62787U, // AE_S32X2F24_X |
3028 | 59.3k | 14835158U, // AE_S32X2F24_XC |
3029 | 59.3k | 14839628U, // AE_S32X2F24_XP |
3030 | 59.3k | 14839240U, // AE_S32X2RA64S_IP |
3031 | 59.3k | 1610671085U, // AE_S32X2_I |
3032 | 59.3k | 2162322526U, // AE_S32X2_IP |
3033 | 59.3k | 81943610U, // AE_S32X2_RIC |
3034 | 59.3k | 81948200U, // AE_S32X2_RIP |
3035 | 59.3k | 62747U, // AE_S32X2_X |
3036 | 59.3k | 14835115U, // AE_S32X2_XC |
3037 | 59.3k | 14839585U, // AE_S32X2_XP |
3038 | 59.3k | 536929400U, // AE_S32_L_I |
3039 | 59.3k | 1088581005U, // AE_S32_L_IP |
3040 | 59.3k | 62856U, // AE_S32_L_X |
3041 | 59.3k | 14835233U, // AE_S32_L_XC |
3042 | 59.3k | 14839703U, // AE_S32_L_XP |
3043 | 59.3k | 1610671180U, // AE_S64_I |
3044 | 59.3k | 2699193582U, // AE_S64_IP |
3045 | 59.3k | 62812U, // AE_S64_X |
3046 | 59.3k | 14835185U, // AE_S64_XC |
3047 | 59.3k | 14839655U, // AE_S64_XP |
3048 | 59.3k | 92461983U, // AE_SA16X4_IC |
3049 | 59.3k | 92466439U, // AE_SA16X4_IP |
3050 | 59.3k | 92462280U, // AE_SA16X4_RIC |
3051 | 59.3k | 92466870U, // AE_SA16X4_RIP |
3052 | 59.3k | 92461909U, // AE_SA24X2_IC |
3053 | 59.3k | 92466297U, // AE_SA24X2_IP |
3054 | 59.3k | 92462167U, // AE_SA24X2_RIC |
3055 | 59.3k | 92466757U, // AE_SA24X2_RIP |
3056 | 59.3k | 92462080U, // AE_SA24_L_IC |
3057 | 59.3k | 92466586U, // AE_SA24_L_IP |
3058 | 59.3k | 92462323U, // AE_SA24_L_RIC |
3059 | 59.3k | 92466913U, // AE_SA24_L_RIP |
3060 | 59.3k | 92461952U, // AE_SA32X2F24_IC |
3061 | 59.3k | 92466354U, // AE_SA32X2F24_IP |
3062 | 59.3k | 92462213U, // AE_SA32X2F24_RIC |
3063 | 59.3k | 92466803U, // AE_SA32X2F24_RIP |
3064 | 59.3k | 92461881U, // AE_SA32X2_IC |
3065 | 59.3k | 92466243U, // AE_SA32X2_IP |
3066 | 59.3k | 92462109U, // AE_SA32X2_RIC |
3067 | 59.3k | 92466699U, // AE_SA32X2_RIP |
3068 | 59.3k | 81947600U, // AE_SA64NEG_FP |
3069 | 59.3k | 81947615U, // AE_SA64POS_FP |
3070 | 59.3k | 1610671165U, // AE_SALIGN64_I |
3071 | 59.3k | 55811U, // AE_SAT16X4 |
3072 | 59.3k | 67170693U, // AE_SAT24S |
3073 | 59.3k | 67170985U, // AE_SAT48S |
3074 | 59.3k | 67170973U, // AE_SATQ56S |
3075 | 59.3k | 81943298U, // AE_SB |
3076 | 59.3k | 679763U, // AE_SBF |
3077 | 59.3k | 678879U, // AE_SBF_IC |
3078 | 59.3k | 683372U, // AE_SBF_IP |
3079 | 59.3k | 1088578836U, // AE_SBI |
3080 | 59.3k | 1088576501U, // AE_SBI_IC |
3081 | 59.3k | 1088580994U, // AE_SBI_IP |
3082 | 59.3k | 81943479U, // AE_SB_IC |
3083 | 59.3k | 81947972U, // AE_SB_IP |
3084 | 59.3k | 58617U, // AE_SEL16I |
3085 | 59.3k | 60224U, // AE_SEL16I_N |
3086 | 59.3k | 1610662642U, // AE_SEXT32 |
3087 | 59.3k | 67156868U, // AE_SEXT32X2D16_10 |
3088 | 59.3k | 67158395U, // AE_SEXT32X2D16_32 |
3089 | 59.3k | 67158569U, // AE_SHA32 |
3090 | 59.3k | 67169176U, // AE_SHORTSWAP |
3091 | 59.3k | 62001U, // AE_SLAA16S |
3092 | 59.3k | 49657U, // AE_SLAA32 |
3093 | 59.3k | 61613U, // AE_SLAA32S |
3094 | 59.3k | 55508U, // AE_SLAA64 |
3095 | 59.3k | 61840U, // AE_SLAA64S |
3096 | 59.3k | 55906U, // AE_SLAAQ56 |
3097 | 59.3k | 2147545706U, // AE_SLAI16S |
3098 | 59.3k | 2684409991U, // AE_SLAI24 |
3099 | 59.3k | 2684416354U, // AE_SLAI24S |
3100 | 59.3k | 2684404351U, // AE_SLAI32 |
3101 | 59.3k | 2684416258U, // AE_SLAI32S |
3102 | 59.3k | 3221281073U, // AE_SLAI64 |
3103 | 59.3k | 3221287395U, // AE_SLAI64S |
3104 | 59.3k | 3221287553U, // AE_SLAISQ56S |
3105 | 59.3k | 67164339U, // AE_SLAS24 |
3106 | 59.3k | 67170670U, // AE_SLAS24S |
3107 | 59.3k | 67158718U, // AE_SLAS32 |
3108 | 59.3k | 67170574U, // AE_SLAS32S |
3109 | 59.3k | 67164530U, // AE_SLAS64 |
3110 | 59.3k | 67170799U, // AE_SLAS64S |
3111 | 59.3k | 67164782U, // AE_SLASQ56 |
3112 | 59.3k | 67170959U, // AE_SLASSQ56S |
3113 | 59.3k | 49618U, // AE_SRA64_32 |
3114 | 59.3k | 62273U, // AE_SRAA16RS |
3115 | 59.3k | 62013U, // AE_SRAA16S |
3116 | 59.3k | 49668U, // AE_SRAA32 |
3117 | 59.3k | 62210U, // AE_SRAA32RS |
3118 | 59.3k | 61625U, // AE_SRAA32S |
3119 | 59.3k | 55519U, // AE_SRAA64 |
3120 | 59.3k | 2147539525U, // AE_SRAI16 |
3121 | 59.3k | 2147545103U, // AE_SRAI16R |
3122 | 59.3k | 2684410002U, // AE_SRAI24 |
3123 | 59.3k | 2684404362U, // AE_SRAI32 |
3124 | 59.3k | 2684415956U, // AE_SRAI32R |
3125 | 59.3k | 3221281084U, // AE_SRAI64 |
3126 | 59.3k | 67164350U, // AE_SRAS24 |
3127 | 59.3k | 67158729U, // AE_SRAS32 |
3128 | 59.3k | 67164541U, // AE_SRAS64 |
3129 | 59.3k | 49715U, // AE_SRLA32 |
3130 | 59.3k | 55530U, // AE_SRLA64 |
3131 | 59.3k | 2684410013U, // AE_SRLI24 |
3132 | 59.3k | 2684404373U, // AE_SRLI32 |
3133 | 59.3k | 3221281095U, // AE_SRLI64 |
3134 | 59.3k | 67164361U, // AE_SRLS24 |
3135 | 59.3k | 67158750U, // AE_SRLS32 |
3136 | 59.3k | 67164562U, // AE_SRLS64 |
3137 | 59.3k | 55848U, // AE_SUB16 |
3138 | 59.3k | 62025U, // AE_SUB16S |
3139 | 59.3k | 61761U, // AE_SUB24S |
3140 | 59.3k | 49726U, // AE_SUB32 |
3141 | 59.3k | 61637U, // AE_SUB32S |
3142 | 59.3k | 55551U, // AE_SUB64 |
3143 | 59.3k | 61852U, // AE_SUB64S |
3144 | 59.3k | 49759U, // AE_SUBADD32 |
3145 | 59.3k | 61673U, // AE_SUBADD32S |
3146 | 59.3k | 58893U, // AE_TRUNCA32F64S_L |
3147 | 59.3k | 61874U, // AE_TRUNCA32X2F64S |
3148 | 59.3k | 58912U, // AE_TRUNCI32F64S_L |
3149 | 59.3k | 61893U, // AE_TRUNCI32X2F64S |
3150 | 59.3k | 678665U, // AE_VLDL16C |
3151 | 59.3k | 678849U, // AE_VLDL16C_IC |
3152 | 59.3k | 683342U, // AE_VLDL16C_IP |
3153 | 59.3k | 62391U, // AE_VLDL16T |
3154 | 59.3k | 62367U, // AE_VLDL32T |
3155 | 59.3k | 586750U, // AE_VLDSHT |
3156 | 59.3k | 14742467U, // AE_VLEL16T |
3157 | 59.3k | 14742443U, // AE_VLEL32T |
3158 | 59.3k | 678677U, // AE_VLES16C |
3159 | 59.3k | 678864U, // AE_VLES16C_IC |
3160 | 59.3k | 683357U, // AE_VLES16C_IP |
3161 | 59.3k | 61560U, // AE_XOR |
3162 | 59.3k | 579922U, // AE_ZALIGN64 |
3163 | 59.3k | 67141690U, // ALL4 |
3164 | 59.3k | 67141725U, // ALL8 |
3165 | 59.3k | 32978U, // AND |
3166 | 59.3k | 32905U, // ANDB |
3167 | 59.3k | 32941U, // ANDBC |
3168 | 59.3k | 67141718U, // ANY4 |
3169 | 59.3k | 67141753U, // ANY8 |
3170 | 59.3k | 3758130190U, // BALL |
3171 | 59.3k | 3758130915U, // BANY |
3172 | 59.3k | 3758129320U, // BBC |
3173 | 59.3k | 27296344U, // BBCI |
3174 | 59.3k | 3758130717U, // BBS |
3175 | 59.3k | 27296407U, // BBSI |
3176 | 59.3k | 3758130339U, // BEQ |
3177 | 59.3k | 29393546U, // BEQI |
3178 | 59.3k | 12617493U, // BEQZ |
3179 | 59.3k | 12615924U, // BF |
3180 | 59.3k | 3758129379U, // BGE |
3181 | 59.3k | 29393508U, // BGEI |
3182 | 59.3k | 3758130840U, // BGEU |
3183 | 59.3k | 31490753U, // BGEUI |
3184 | 59.3k | 12617456U, // BGEZ |
3185 | 59.3k | 3758130746U, // BLT |
3186 | 59.3k | 29393582U, // BLTI |
3187 | 59.3k | 3758130864U, // BLTU |
3188 | 59.3k | 31490760U, // BLTUI |
3189 | 59.3k | 12617516U, // BLTZ |
3190 | 59.3k | 3758130196U, // BNALL |
3191 | 59.3k | 3758129384U, // BNE |
3192 | 59.3k | 29393514U, // BNEI |
3193 | 59.3k | 12617470U, // BNEZ |
3194 | 59.3k | 3758129389U, // BNONE |
3195 | 59.3k | 33751776U, // BREAK |
3196 | 59.3k | 722009U, // BREAK_N |
3197 | 59.3k | 12617270U, // BT |
3198 | 59.3k | 229387U, // CALL0 |
3199 | 59.3k | 229402U, // CALL12 |
3200 | 59.3k | 229433U, // CALL4 |
3201 | 59.3k | 229468U, // CALL8 |
3202 | 59.3k | 557074U, // CALLX0 |
3203 | 59.3k | 557090U, // CALLX12 |
3204 | 59.3k | 557134U, // CALLX4 |
3205 | 59.3k | 557169U, // CALLX8 |
3206 | 59.3k | 2147517791U, // CEIL_S |
3207 | 59.3k | 1610647086U, // CLAMPS |
3208 | 59.3k | 263767U, // CLR_BIT_GPIO_OUT |
3209 | 59.3k | 33588688U, // CONST_S |
3210 | 59.3k | 67142905U, // DIV0_S |
3211 | 59.3k | 14812552U, // DIVN_S |
3212 | 59.3k | 30504U, // DSYNC |
3213 | 59.3k | 39625U, // EE_ANDQ |
3214 | 59.3k | 81828640U, // EE_BITREV |
3215 | 59.3k | 263764U, // EE_CLR_BIT_GPIO_OUT |
3216 | 59.3k | 35367U, // EE_CMUL_S16 |
3217 | 59.3k | 220237611U, // EE_CMUL_S16_LD_INCP |
3218 | 59.3k | 537039119U, // EE_CMUL_S16_ST_INCP |
3219 | 59.3k | 25202587U, // EE_FFT_AMS_S16_LD_INCP |
3220 | 59.3k | 25204093U, // EE_FFT_AMS_S16_LD_INCP_UAUP |
3221 | 59.3k | 25202192U, // EE_FFT_AMS_S16_LD_R32_DECP |
3222 | 59.3k | 1347967U, // EE_FFT_AMS_S16_ST_INCP |
3223 | 59.3k | 153131330U, // EE_FFT_CMUL_S16_LD_XP |
3224 | 59.3k | 14817875U, // EE_FFT_CMUL_S16_ST_XP |
3225 | 59.3k | 35349U, // EE_FFT_R2BF_S16 |
3226 | 59.3k | 14717173U, // EE_FFT_R2BF_S16_ST_INCP |
3227 | 59.3k | 1088556589U, // EE_FFT_VST_R32_DECP |
3228 | 59.3k | 558185U, // EE_GET_GPIO_IN |
3229 | 59.3k | 37804U, // EE_LDF_128_IP |
3230 | 59.3k | 39186U, // EE_LDF_128_XP |
3231 | 59.3k | 37575U, // EE_LDF_64_IP |
3232 | 59.3k | 38957U, // EE_LDF_64_XP |
3233 | 59.3k | 35787594U, // EE_LDQA_S16_128_IP |
3234 | 59.3k | 81926320U, // EE_LDQA_S16_128_XP |
3235 | 59.3k | 35787636U, // EE_LDQA_S8_128_IP |
3236 | 59.3k | 81926362U, // EE_LDQA_S8_128_XP |
3237 | 59.3k | 35787615U, // EE_LDQA_U16_128_IP |
3238 | 59.3k | 81926341U, // EE_LDQA_U16_128_XP |
3239 | 59.3k | 35787656U, // EE_LDQA_U8_128_IP |
3240 | 59.3k | 81926382U, // EE_LDQA_U8_128_XP |
3241 | 59.3k | 34912U, // EE_LDXQ_32 |
3242 | 59.3k | 1625331017U, // EE_LD_128_USAR_IP |
3243 | 59.3k | 14719551U, // EE_LD_128_USAR_XP |
3244 | 59.3k | 37885277U, // EE_LD_ACCX_IP |
3245 | 59.3k | 39981675U, // EE_LD_QACC_H_H_32_IP |
3246 | 59.3k | 35787724U, // EE_LD_QACC_H_L_128_IP |
3247 | 59.3k | 39981721U, // EE_LD_QACC_L_H_32_IP |
3248 | 59.3k | 35787772U, // EE_LD_QACC_L_L_128_IP |
3249 | 59.3k | 35788065U, // EE_LD_UA_STATE_IP |
3250 | 59.3k | 2189560737U, // EE_MOVI_32_A |
3251 | 59.3k | 2147523179U, // EE_MOVI_32_Q |
3252 | 59.3k | 560111U, // EE_MOV_S16_QACC |
3253 | 59.3k | 560228U, // EE_MOV_S8_QACC |
3254 | 59.3k | 560150U, // EE_MOV_U16_QACC |
3255 | 59.3k | 560265U, // EE_MOV_U8_QACC |
3256 | 59.3k | 67148518U, // EE_NOTQ |
3257 | 59.3k | 39635U, // EE_ORQ |
3258 | 59.3k | 263785U, // EE_SET_BIT_GPIO_OUT |
3259 | 59.3k | 44210833U, // EE_SLCI_2Q |
3260 | 59.3k | 1874603U, // EE_SLCXXP_2Q |
3261 | 59.3k | 44210846U, // EE_SRCI_2Q |
3262 | 59.3k | 1073777584U, // EE_SRCMB_S16_QACC |
3263 | 59.3k | 1073777704U, // EE_SRCMB_S8_QACC |
3264 | 59.3k | 14815684U, // EE_SRCQ_128_ST_INCP |
3265 | 59.3k | 1874618U, // EE_SRCXXP_2Q |
3266 | 59.3k | 39546U, // EE_SRC_Q |
3267 | 59.3k | 287347878U, // EE_SRC_Q_LD_IP |
3268 | 59.3k | 153131460U, // EE_SRC_Q_LD_XP |
3269 | 59.3k | 14718989U, // EE_SRC_Q_QUP |
3270 | 59.3k | 1073781630U, // EE_SRS_ACCX |
3271 | 59.3k | 14816188U, // EE_STF_128_IP |
3272 | 59.3k | 14817570U, // EE_STF_128_XP |
3273 | 59.3k | 14815958U, // EE_STF_64_IP |
3274 | 59.3k | 14817340U, // EE_STF_64_XP |
3275 | 59.3k | 34925U, // EE_STXQ_32 |
3276 | 59.3k | 37885293U, // EE_ST_ACCX_IP |
3277 | 59.3k | 39981698U, // EE_ST_QACC_H_H_32_IP |
3278 | 59.3k | 35787748U, // EE_ST_QACC_H_L_128_IP |
3279 | 59.3k | 39981744U, // EE_ST_QACC_L_H_32_IP |
3280 | 59.3k | 35787796U, // EE_ST_QACC_L_L_128_IP |
3281 | 59.3k | 35788085U, // EE_ST_UA_STATE_IP |
3282 | 59.3k | 35441U, // EE_VADDS_S16 |
3283 | 59.3k | 3441463172U, // EE_VADDS_S16_LD_INCP |
3284 | 59.3k | 537039208U, // EE_VADDS_S16_ST_INCP |
3285 | 59.3k | 34996U, // EE_VADDS_S32 |
3286 | 59.3k | 3441463038U, // EE_VADDS_S32_LD_INCP |
3287 | 59.3k | 537039048U, // EE_VADDS_S32_ST_INCP |
3288 | 59.3k | 35644U, // EE_VADDS_S8 |
3289 | 59.3k | 3441463328U, // EE_VADDS_S8_LD_INCP |
3290 | 59.3k | 537039386U, // EE_VADDS_S8_ST_INCP |
3291 | 59.3k | 35409U, // EE_VCMP_EQ_S16 |
3292 | 59.3k | 34964U, // EE_VCMP_EQ_S32 |
3293 | 59.3k | 35614U, // EE_VCMP_EQ_S8 |
3294 | 59.3k | 35456U, // EE_VCMP_GT_S16 |
3295 | 59.3k | 35011U, // EE_VCMP_GT_S32 |
3296 | 59.3k | 35658U, // EE_VCMP_GT_S8 |
3297 | 59.3k | 35473U, // EE_VCMP_LT_S16 |
3298 | 59.3k | 35028U, // EE_VCMP_LT_S32 |
3299 | 59.3k | 35674U, // EE_VCMP_LT_S8 |
3300 | 59.3k | 67144171U, // EE_VLDBC_16 |
3301 | 59.3k | 2162201385U, // EE_VLDBC_16_IP |
3302 | 59.3k | 14719119U, // EE_VLDBC_16_XP |
3303 | 59.3k | 67143722U, // EE_VLDBC_32 |
3304 | 59.3k | 2699072090U, // EE_VLDBC_32_IP |
3305 | 59.3k | 14719004U, // EE_VLDBC_32_XP |
3306 | 59.3k | 67144413U, // EE_VLDBC_8 |
3307 | 59.3k | 3235943226U, // EE_VLDBC_8_IP |
3308 | 59.3k | 14719136U, // EE_VLDBC_8_XP |
3309 | 59.3k | 36419U, // EE_VLDHBC_16_INCP |
3310 | 59.3k | 1625330588U, // EE_VLD_128_IP |
3311 | 59.3k | 14719234U, // EE_VLD_128_XP |
3312 | 59.3k | 3772814053U, // EE_VLD_H_64_IP |
3313 | 59.3k | 14719051U, // EE_VLD_H_64_XP |
3314 | 59.3k | 3772814087U, // EE_VLD_L_64_IP |
3315 | 59.3k | 14719085U, // EE_VLD_L_64_XP |
3316 | 59.3k | 35521U, // EE_VMAX_S16 |
3317 | 59.3k | 3441463220U, // EE_VMAX_S16_LD_INCP |
3318 | 59.3k | 537039256U, // EE_VMAX_S16_ST_INCP |
3319 | 59.3k | 35045U, // EE_VMAX_S32 |
3320 | 59.3k | 3441463061U, // EE_VMAX_S32_LD_INCP |
3321 | 59.3k | 537039071U, // EE_VMAX_S32_ST_INCP |
3322 | 59.3k | 35719U, // EE_VMAX_S8 |
3323 | 59.3k | 3441463350U, // EE_VMAX_S8_LD_INCP |
3324 | 59.3k | 537039408U, // EE_VMAX_S8_ST_INCP |
3325 | 59.3k | 35395U, // EE_VMIN_S16 |
3326 | 59.3k | 3441463127U, // EE_VMIN_S16_LD_INCP |
3327 | 59.3k | 537039163U, // EE_VMIN_S16_ST_INCP |
3328 | 59.3k | 34950U, // EE_VMIN_S32 |
3329 | 59.3k | 3441462993U, // EE_VMIN_S32_LD_INCP |
3330 | 59.3k | 537039003U, // EE_VMIN_S32_ST_INCP |
3331 | 59.3k | 35601U, // EE_VMIN_S8 |
3332 | 59.3k | 3441463285U, // EE_VMIN_S8_LD_INCP |
3333 | 59.3k | 537039343U, // EE_VMIN_S8_ST_INCP |
3334 | 59.3k | 67148588U, // EE_VMULAS_S16_ACCX |
3335 | 59.3k | 14718135U, // EE_VMULAS_S16_ACCX_LD_IP |
3336 | 59.3k | 354457247U, // EE_VMULAS_S16_ACCX_LD_IP_QUP |
3337 | 59.3k | 14719445U, // EE_VMULAS_S16_ACCX_LD_XP |
3338 | 59.3k | 153130899U, // EE_VMULAS_S16_ACCX_LD_XP_QUP |
3339 | 59.3k | 67144666U, // EE_VMULAS_S16_QACC |
3340 | 59.3k | 14716503U, // EE_VMULAS_S16_QACC_LDBC_INCP |
3341 | 59.3k | 153130395U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP |
3342 | 59.3k | 14718012U, // EE_VMULAS_S16_QACC_LD_IP |
3343 | 59.3k | 354457125U, // EE_VMULAS_S16_QACC_LD_IP_QUP |
3344 | 59.3k | 14719322U, // EE_VMULAS_S16_QACC_LD_XP |
3345 | 59.3k | 153130777U, // EE_VMULAS_S16_QACC_LD_XP_QUP |
3346 | 59.3k | 67148630U, // EE_VMULAS_S8_ACCX |
3347 | 59.3k | 14718189U, // EE_VMULAS_S8_ACCX_LD_IP |
3348 | 59.3k | 354457309U, // EE_VMULAS_S8_ACCX_LD_IP_QUP |
3349 | 59.3k | 14719499U, // EE_VMULAS_S8_ACCX_LD_XP |
3350 | 59.3k | 153130961U, // EE_VMULAS_S8_ACCX_LD_XP_QUP |
3351 | 59.3k | 67144784U, // EE_VMULAS_S8_QACC |
3352 | 59.3k | 14716565U, // EE_VMULAS_S8_QACC_LDBC_INCP |
3353 | 59.3k | 153130465U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP |
3354 | 59.3k | 14718066U, // EE_VMULAS_S8_QACC_LD_IP |
3355 | 59.3k | 354457187U, // EE_VMULAS_S8_QACC_LD_IP_QUP |
3356 | 59.3k | 14719376U, // EE_VMULAS_S8_QACC_LD_XP |
3357 | 59.3k | 153130839U, // EE_VMULAS_S8_QACC_LD_XP_QUP |
3358 | 59.3k | 67148609U, // EE_VMULAS_U16_ACCX |
3359 | 59.3k | 14718162U, // EE_VMULAS_U16_ACCX_LD_IP |
3360 | 59.3k | 354457278U, // EE_VMULAS_U16_ACCX_LD_IP_QUP |
3361 | 59.3k | 14719472U, // EE_VMULAS_U16_ACCX_LD_XP |
3362 | 59.3k | 153130930U, // EE_VMULAS_U16_ACCX_LD_XP_QUP |
3363 | 59.3k | 67144705U, // EE_VMULAS_U16_QACC |
3364 | 59.3k | 14716534U, // EE_VMULAS_U16_QACC_LDBC_INCP |
3365 | 59.3k | 153130430U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP |
3366 | 59.3k | 14718039U, // EE_VMULAS_U16_QACC_LD_IP |
3367 | 59.3k | 354457156U, // EE_VMULAS_U16_QACC_LD_IP_QUP |
3368 | 59.3k | 14719349U, // EE_VMULAS_U16_QACC_LD_XP |
3369 | 59.3k | 153130808U, // EE_VMULAS_U16_QACC_LD_XP_QUP |
3370 | 59.3k | 67148650U, // EE_VMULAS_U8_ACCX |
3371 | 59.3k | 14718215U, // EE_VMULAS_U8_ACCX_LD_IP |
3372 | 59.3k | 354457339U, // EE_VMULAS_U8_ACCX_LD_IP_QUP |
3373 | 59.3k | 14719525U, // EE_VMULAS_U8_ACCX_LD_XP |
3374 | 59.3k | 153130991U, // EE_VMULAS_U8_ACCX_LD_XP_QUP |
3375 | 59.3k | 67144821U, // EE_VMULAS_U8_QACC |
3376 | 59.3k | 14716595U, // EE_VMULAS_U8_QACC_LDBC_INCP |
3377 | 59.3k | 153130499U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP |
3378 | 59.3k | 14718092U, // EE_VMULAS_U8_QACC_LD_IP |
3379 | 59.3k | 354457217U, // EE_VMULAS_U8_QACC_LD_IP_QUP |
3380 | 59.3k | 14719402U, // EE_VMULAS_U8_QACC_LD_XP |
3381 | 59.3k | 153130869U, // EE_VMULAS_U8_QACC_LD_XP_QUP |
3382 | 59.3k | 35381U, // EE_VMUL_S16 |
3383 | 59.3k | 3441463105U, // EE_VMUL_S16_LD_INCP |
3384 | 59.3k | 537039141U, // EE_VMUL_S16_ST_INCP |
3385 | 59.3k | 35588U, // EE_VMUL_S8 |
3386 | 59.3k | 3441463264U, // EE_VMUL_S8_LD_INCP |
3387 | 59.3k | 537039322U, // EE_VMUL_S8_ST_INCP |
3388 | 59.3k | 35535U, // EE_VMUL_U16 |
3389 | 59.3k | 3441463242U, // EE_VMUL_U16_LD_INCP |
3390 | 59.3k | 537039278U, // EE_VMUL_U16_ST_INCP |
3391 | 59.3k | 35732U, // EE_VMUL_U8 |
3392 | 59.3k | 3441463371U, // EE_VMUL_U8_LD_INCP |
3393 | 59.3k | 537039429U, // EE_VMUL_U8_ST_INCP |
3394 | 59.3k | 35490U, // EE_VPRELU_S16 |
3395 | 59.3k | 35690U, // EE_VPRELU_S8 |
3396 | 59.3k | 14813874U, // EE_VRELU_S16 |
3397 | 59.3k | 14814073U, // EE_VRELU_S8 |
3398 | 59.3k | 67143736U, // EE_VSL_32 |
3399 | 59.3k | 1610648516U, // EE_VSMULAS_S16_QACC |
3400 | 59.3k | 14717024U, // EE_VSMULAS_S16_QACC_LD_INCP |
3401 | 59.3k | 2684390459U, // EE_VSMULAS_S8_QACC |
3402 | 59.3k | 14717054U, // EE_VSMULAS_S8_QACC_LD_INCP |
3403 | 59.3k | 67143802U, // EE_VSR_32 |
3404 | 59.3k | 1625429036U, // EE_VST_128_IP |
3405 | 59.3k | 14817586U, // EE_VST_128_XP |
3406 | 59.3k | 3772912374U, // EE_VST_H_64_IP |
3407 | 59.3k | 14817372U, // EE_VST_H_64_XP |
3408 | 59.3k | 3772912408U, // EE_VST_L_64_IP |
3409 | 59.3k | 14817406U, // EE_VST_L_64_XP |
3410 | 59.3k | 35426U, // EE_VSUBS_S16 |
3411 | 59.3k | 3441463149U, // EE_VSUBS_S16_LD_INCP |
3412 | 59.3k | 537039185U, // EE_VSUBS_S16_ST_INCP |
3413 | 59.3k | 34981U, // EE_VSUBS_S32 |
3414 | 59.3k | 3441463015U, // EE_VSUBS_S32_LD_INCP |
3415 | 59.3k | 537039025U, // EE_VSUBS_S32_ST_INCP |
3416 | 59.3k | 35630U, // EE_VSUBS_S8 |
3417 | 59.3k | 3441463306U, // EE_VSUBS_S8_LD_INCP |
3418 | 59.3k | 537039364U, // EE_VSUBS_S8_ST_INCP |
3419 | 59.3k | 690681U, // EE_VUNZIP_16 |
3420 | 59.3k | 690244U, // EE_VUNZIP_32 |
3421 | 59.3k | 690922U, // EE_VUNZIP_8 |
3422 | 59.3k | 690696U, // EE_VZIP_16 |
3423 | 59.3k | 690259U, // EE_VZIP_32 |
3424 | 59.3k | 690936U, // EE_VZIP_8 |
3425 | 59.3k | 67143231U, // EE_WR_MASK_GPIO_OUT |
3426 | 59.3k | 39644U, // EE_XORQ |
3427 | 59.3k | 1735U, // EE_ZERO_ACCX |
3428 | 59.3k | 563845U, // EE_ZERO_Q |
3429 | 59.3k | 186U, // EE_ZERO_QACC |
3430 | 59.3k | 46171881U, // ENTRY |
3431 | 59.3k | 30510U, // ESYNC |
3432 | 59.3k | 30658U, // EXCW |
3433 | 59.3k | 2684388047U, // EXTUI |
3434 | 59.3k | 30673U, // EXTW |
3435 | 59.3k | 2147517881U, // FLOAT_S |
3436 | 59.3k | 2147517864U, // FLOOR_S |
3437 | 59.3k | 558188U, // GET_GPIO_IN |
3438 | 59.3k | 30567U, // ILL |
3439 | 59.3k | 30571U, // ILL_N |
3440 | 59.3k | 30516U, // ISYNC |
3441 | 59.3k | 328413U, // J |
3442 | 59.3k | 558805U, // JX |
3443 | 59.3k | 10519184U, // L16SI |
3444 | 59.3k | 10519220U, // L16UI |
3445 | 59.3k | 536903895U, // L32E |
3446 | 59.3k | 10519092U, // L32I |
3447 | 59.3k | 10519608U, // L32I_N |
3448 | 59.3k | 48268456U, // L32R |
3449 | 59.3k | 10519227U, // L8UI |
3450 | 59.3k | 81824933U, // LDDEC |
3451 | 59.3k | 81825085U, // LDINC |
3452 | 59.3k | 10519134U, // LEA_ADD |
3453 | 59.3k | 50365578U, // LOOP |
3454 | 59.3k | 50366243U, // LOOPGTZ |
3455 | 59.3k | 50366212U, // LOOPNEZ |
3456 | 59.3k | 10519197U, // LSI |
3457 | 59.3k | 1088455806U, // LSIP |
3458 | 59.3k | 34521U, // LSX |
3459 | 59.3k | 14714007U, // LSXP |
3460 | 59.3k | 14714233U, // MADDN_S |
3461 | 59.3k | 14714141U, // MADD_S |
3462 | 59.3k | 34498U, // MAX |
3463 | 59.3k | 34486U, // MAXU |
3464 | 59.3k | 30663U, // MEMW |
3465 | 59.3k | 33913U, // MIN |
3466 | 59.3k | 34468U, // MINU |
3467 | 59.3k | 81921355U, // MKDADJ_S |
3468 | 59.3k | 67142997U, // MKSADJ_S |
3469 | 59.3k | 34587U, // MOVEQZ |
3470 | 59.3k | 14812668U, // MOVEQZ_S |
3471 | 59.3k | 14811384U, // MOVF |
3472 | 59.3k | 14812476U, // MOVF_S |
3473 | 59.3k | 34550U, // MOVGEZ |
3474 | 59.3k | 14812648U, // MOVGEZ_S |
3475 | 59.3k | 52462295U, // MOVI |
3476 | 59.3k | 54559825U, // MOVI_N |
3477 | 59.3k | 34610U, // MOVLTZ |
3478 | 59.3k | 14812678U, // MOVLTZ_S |
3479 | 59.3k | 34573U, // MOVNEZ |
3480 | 59.3k | 14812658U, // MOVNEZ_S |
3481 | 59.3k | 67142800U, // MOVSP |
3482 | 59.3k | 14812798U, // MOVT |
3483 | 59.3k | 14812633U, // MOVT_S |
3484 | 59.3k | 67142754U, // MOV_N |
3485 | 59.3k | 67143137U, // MOV_S |
3486 | 59.3k | 14714123U, // MSUB_S |
3487 | 59.3k | 34320U, // MUL16S |
3488 | 59.3k | 34442U, // MUL16U |
3489 | 59.3k | 67141891U, // MULA_AA_HH |
3490 | 59.3k | 67142382U, // MULA_AA_HL |
3491 | 59.3k | 67142032U, // MULA_AA_LH |
3492 | 59.3k | 67142529U, // MULA_AA_LL |
3493 | 59.3k | 67141962U, // MULA_AD_HH |
3494 | 59.3k | 67142453U, // MULA_AD_HL |
3495 | 59.3k | 67142103U, // MULA_AD_LH |
3496 | 59.3k | 67142600U, // MULA_AD_LL |
3497 | 59.3k | 67141927U, // MULA_DA_HH |
3498 | 59.3k | 14716058U, // MULA_DA_HH_LDDEC |
3499 | 59.3k | 14716210U, // MULA_DA_HH_LDINC |
3500 | 59.3k | 67142418U, // MULA_DA_HL |
3501 | 59.3k | 14716134U, // MULA_DA_HL_LDDEC |
3502 | 59.3k | 14716286U, // MULA_DA_HL_LDINC |
3503 | 59.3k | 67142068U, // MULA_DA_LH |
3504 | 59.3k | 14716096U, // MULA_DA_LH_LDDEC |
3505 | 59.3k | 14716248U, // MULA_DA_LH_LDINC |
3506 | 59.3k | 67142565U, // MULA_DA_LL |
3507 | 59.3k | 14716172U, // MULA_DA_LL_LDDEC |
3508 | 59.3k | 14716324U, // MULA_DA_LL_LDINC |
3509 | 59.3k | 67141997U, // MULA_DD_HH |
3510 | 59.3k | 14716077U, // MULA_DD_HH_LDDEC |
3511 | 59.3k | 14716229U, // MULA_DD_HH_LDINC |
3512 | 59.3k | 67142488U, // MULA_DD_HL |
3513 | 59.3k | 14716153U, // MULA_DD_HL_LDDEC |
3514 | 59.3k | 14716305U, // MULA_DD_HL_LDINC |
3515 | 59.3k | 67142138U, // MULA_DD_LH |
3516 | 59.3k | 14716115U, // MULA_DD_LH_LDDEC |
3517 | 59.3k | 14716267U, // MULA_DD_LH_LDINC |
3518 | 59.3k | 67142635U, // MULA_DD_LL |
3519 | 59.3k | 14716191U, // MULA_DD_LL_LDDEC |
3520 | 59.3k | 14716343U, // MULA_DD_LL_LDINC |
3521 | 59.3k | 33824U, // MULL |
3522 | 59.3k | 33309U, // MULSH |
3523 | 59.3k | 67141915U, // MULS_AA_HH |
3524 | 59.3k | 67142406U, // MULS_AA_HL |
3525 | 59.3k | 67142056U, // MULS_AA_LH |
3526 | 59.3k | 67142553U, // MULS_AA_LL |
3527 | 59.3k | 67141985U, // MULS_AD_HH |
3528 | 59.3k | 67142476U, // MULS_AD_HL |
3529 | 59.3k | 67142126U, // MULS_AD_LH |
3530 | 59.3k | 67142623U, // MULS_AD_LL |
3531 | 59.3k | 67141950U, // MULS_DA_HH |
3532 | 59.3k | 67142441U, // MULS_DA_HL |
3533 | 59.3k | 67142091U, // MULS_DA_LH |
3534 | 59.3k | 67142588U, // MULS_DA_LL |
3535 | 59.3k | 67142020U, // MULS_DD_HH |
3536 | 59.3k | 67142511U, // MULS_DD_HL |
3537 | 59.3k | 67142161U, // MULS_DD_LH |
3538 | 59.3k | 67142658U, // MULS_DD_LL |
3539 | 59.3k | 33316U, // MULUH |
3540 | 59.3k | 67141904U, // MUL_AA_HH |
3541 | 59.3k | 67142395U, // MUL_AA_HL |
3542 | 59.3k | 67142045U, // MUL_AA_LH |
3543 | 59.3k | 67142542U, // MUL_AA_LL |
3544 | 59.3k | 67141974U, // MUL_AD_HH |
3545 | 59.3k | 67142465U, // MUL_AD_HL |
3546 | 59.3k | 67142115U, // MUL_AD_LH |
3547 | 59.3k | 67142612U, // MUL_AD_LL |
3548 | 59.3k | 67141939U, // MUL_DA_HH |
3549 | 59.3k | 67142430U, // MUL_DA_HL |
3550 | 59.3k | 67142080U, // MUL_DA_LH |
3551 | 59.3k | 67142577U, // MUL_DA_LL |
3552 | 59.3k | 67142009U, // MUL_DD_HH |
3553 | 59.3k | 67142500U, // MUL_DD_HL |
3554 | 59.3k | 67142150U, // MUL_DD_LH |
3555 | 59.3k | 67142647U, // MUL_DD_LL |
3556 | 59.3k | 34151U, // MUL_S |
3557 | 59.3k | 67141886U, // NEG |
3558 | 59.3k | 67142980U, // NEG_S |
3559 | 59.3k | 67142913U, // NEXP01_S |
3560 | 59.3k | 30645U, // NOP |
3561 | 59.3k | 67141764U, // NSA |
3562 | 59.3k | 67143314U, // NSAU |
3563 | 59.3k | 34202U, // OEQ_S |
3564 | 59.3k | 34094U, // OLE_S |
3565 | 59.3k | 34242U, // OLT_S |
3566 | 59.3k | 33987U, // OR |
3567 | 59.3k | 32926U, // ORB |
3568 | 59.3k | 32948U, // ORBC |
3569 | 59.3k | 34344U, // QUOS |
3570 | 59.3k | 34474U, // QUOU |
3571 | 59.3k | 67142885U, // RECIP0_S |
3572 | 59.3k | 34338U, // REMS |
3573 | 59.3k | 34462U, // REMU |
3574 | 59.3k | 67142830U, // RER |
3575 | 59.3k | 30649U, // RET |
3576 | 59.3k | 30668U, // RETW |
3577 | 59.3k | 30583U, // RETW_N |
3578 | 59.3k | 30577U, // RET_N |
3579 | 59.3k | 30528U, // RFDE |
3580 | 59.3k | 30533U, // RFE |
3581 | 59.3k | 721520U, // RFI |
3582 | 59.3k | 67142840U, // RFR |
3583 | 59.3k | 30594U, // RFWO |
3584 | 59.3k | 30653U, // RFWU |
3585 | 59.3k | 362172U, // ROTW |
3586 | 59.3k | 2147517733U, // ROUND_S |
3587 | 59.3k | 33588091U, // RSIL |
3588 | 59.3k | 67142895U, // RSQRT0_S |
3589 | 59.3k | 67142855U, // RSR |
3590 | 59.3k | 30522U, // RSYNC |
3591 | 59.3k | 67142875U, // RUR |
3592 | 59.3k | 559000U, // RUR_ACCX_0 |
3593 | 59.3k | 559120U, // RUR_ACCX_1 |
3594 | 59.3k | 581292U, // RUR_AE_BITHEAD |
3595 | 59.3k | 585856U, // RUR_AE_BITPTR |
3596 | 59.3k | 581324U, // RUR_AE_BITSUSED |
3597 | 59.3k | 573081U, // RUR_AE_CBEGIN0 |
3598 | 59.3k | 572479U, // RUR_AE_CEND0 |
3599 | 59.3k | 584572U, // RUR_AE_CWRAP |
3600 | 59.3k | 584538U, // RUR_AE_CW_SD_NO |
3601 | 59.3k | 586621U, // RUR_AE_FIRST_TS |
3602 | 59.3k | 586712U, // RUR_AE_NEXTOFFSET |
3603 | 59.3k | 586967U, // RUR_AE_OVERFLOW |
3604 | 59.3k | 585779U, // RUR_AE_OVF_SAR |
3605 | 59.3k | 585755U, // RUR_AE_SAR |
3606 | 59.3k | 581385U, // RUR_AE_SEARCHDONE |
3607 | 59.3k | 581423U, // RUR_AE_TABLESIZE |
3608 | 59.3k | 584614U, // RUR_AE_TS_FTS_BU_BP |
3609 | 59.3k | 560616U, // RUR_FFT_BIT_WIDTH |
3610 | 59.3k | 563970U, // RUR_GPIO_OUT |
3611 | 59.3k | 558940U, // RUR_QACC_H_0 |
3612 | 59.3k | 559060U, // RUR_QACC_H_1 |
3613 | 59.3k | 559381U, // RUR_QACC_H_2 |
3614 | 59.3k | 559475U, // RUR_QACC_H_3 |
3615 | 59.3k | 559535U, // RUR_QACC_H_4 |
3616 | 59.3k | 558970U, // RUR_QACC_L_0 |
3617 | 59.3k | 559090U, // RUR_QACC_L_1 |
3618 | 59.3k | 559411U, // RUR_QACC_L_2 |
3619 | 59.3k | 559505U, // RUR_QACC_L_3 |
3620 | 59.3k | 559565U, // RUR_QACC_L_4 |
3621 | 59.3k | 560586U, // RUR_SAR_BYTE |
3622 | 59.3k | 558906U, // RUR_UA_STATE_0 |
3623 | 59.3k | 559026U, // RUR_UA_STATE_1 |
3624 | 59.3k | 559347U, // RUR_UA_STATE_2 |
3625 | 59.3k | 559441U, // RUR_UA_STATE_3 |
3626 | 59.3k | 10519105U, // S16I |
3627 | 59.3k | 56754731U, // S32C1I |
3628 | 59.3k | 536903901U, // S32E |
3629 | 59.3k | 10519099U, // S32I |
3630 | 59.3k | 10519617U, // S32I_N |
3631 | 59.3k | 10519111U, // S8I |
3632 | 59.3k | 263788U, // SET_BIT_GPIO_OUT |
3633 | 59.3k | 1610647172U, // SEXT |
3634 | 59.3k | 30551U, // SIMCALL |
3635 | 59.3k | 67142683U, // SLL |
3636 | 59.3k | 1610646134U, // SLLI |
3637 | 59.3k | 67142896U, // SQRT0_S |
3638 | 59.3k | 67141759U, // SRA |
3639 | 59.3k | 2684387916U, // SRAI |
3640 | 59.3k | 32968U, // SRC |
3641 | 59.3k | 67142694U, // SRL |
3642 | 59.3k | 2684387965U, // SRLI |
3643 | 59.3k | 557799U, // SSA8L |
3644 | 59.3k | 393810U, // SSAI |
3645 | 59.3k | 10519202U, // SSI |
3646 | 59.3k | 1088554116U, // SSIP |
3647 | 59.3k | 558123U, // SSL |
3648 | 59.3k | 558284U, // SSR |
3649 | 59.3k | 34526U, // SSX |
3650 | 59.3k | 14812317U, // SSXP |
3651 | 59.3k | 32931U, // SUB |
3652 | 59.3k | 32811U, // SUBX2 |
3653 | 59.3k | 32832U, // SUBX4 |
3654 | 59.3k | 32867U, // SUBX8 |
3655 | 59.3k | 34060U, // SUB_S |
3656 | 59.3k | 30559U, // SYSCALL |
3657 | 59.3k | 2147517716U, // TRUNC_S |
3658 | 59.3k | 34209U, // UEQ_S |
3659 | 59.3k | 2147517880U, // UFLOAT_S |
3660 | 59.3k | 34101U, // ULE_S |
3661 | 59.3k | 34249U, // ULT_S |
3662 | 59.3k | 67141903U, // UMUL_AA_HH |
3663 | 59.3k | 67142394U, // UMUL_AA_HL |
3664 | 59.3k | 67142044U, // UMUL_AA_LH |
3665 | 59.3k | 67142541U, // UMUL_AA_LL |
3666 | 59.3k | 34178U, // UN_S |
3667 | 59.3k | 2147517715U, // UTRUNC_S |
3668 | 59.3k | 721575U, // WAITI |
3669 | 59.3k | 67141775U, // WDTLB |
3670 | 59.3k | 67142835U, // WER |
3671 | 59.3k | 67142845U, // WFR |
3672 | 59.3k | 67141782U, // WITLB |
3673 | 59.3k | 67143234U, // WR_MASK_GPIO_OUT |
3674 | 59.3k | 109184209U, // WSR |
3675 | 59.3k | 109184224U, // WUR |
3676 | 59.3k | 559013U, // WUR_ACCX_0 |
3677 | 59.3k | 559133U, // WUR_ACCX_1 |
3678 | 59.3k | 581308U, // WUR_AE_BITHEAD |
3679 | 59.3k | 585871U, // WUR_AE_BITPTR |
3680 | 59.3k | 581341U, // WUR_AE_BITSUSED |
3681 | 59.3k | 573097U, // WUR_AE_CBEGIN0 |
3682 | 59.3k | 572493U, // WUR_AE_CEND0 |
3683 | 59.3k | 584586U, // WUR_AE_CWRAP |
3684 | 59.3k | 584555U, // WUR_AE_CW_SD_NO |
3685 | 59.3k | 586638U, // WUR_AE_FIRST_TS |
3686 | 59.3k | 586731U, // WUR_AE_NEXTOFFSET |
3687 | 59.3k | 586984U, // WUR_AE_OVERFLOW |
3688 | 59.3k | 585795U, // WUR_AE_OVF_SAR |
3689 | 59.3k | 585767U, // WUR_AE_SAR |
3690 | 59.3k | 581404U, // WUR_AE_SEARCHDONE |
3691 | 59.3k | 581441U, // WUR_AE_TABLESIZE |
3692 | 59.3k | 584635U, // WUR_AE_TS_FTS_BU_BP |
3693 | 59.3k | 557057U, // WUR_FCR |
3694 | 59.3k | 560636U, // WUR_FFT_BIT_WIDTH |
3695 | 59.3k | 563960U, // WUR_FSR |
3696 | 59.3k | 563985U, // WUR_GPIO_OUT |
3697 | 59.3k | 558955U, // WUR_QACC_H_0 |
3698 | 59.3k | 559075U, // WUR_QACC_H_1 |
3699 | 59.3k | 559396U, // WUR_QACC_H_2 |
3700 | 59.3k | 559490U, // WUR_QACC_H_3 |
3701 | 59.3k | 559550U, // WUR_QACC_H_4 |
3702 | 59.3k | 558985U, // WUR_QACC_L_0 |
3703 | 59.3k | 559105U, // WUR_QACC_L_1 |
3704 | 59.3k | 559426U, // WUR_QACC_L_2 |
3705 | 59.3k | 559520U, // WUR_QACC_L_3 |
3706 | 59.3k | 559580U, // WUR_QACC_L_4 |
3707 | 59.3k | 560601U, // WUR_SAR_BYTE |
3708 | 59.3k | 558923U, // WUR_UA_STATE_0 |
3709 | 59.3k | 559043U, // WUR_UA_STATE_1 |
3710 | 59.3k | 559364U, // WUR_UA_STATE_2 |
3711 | 59.3k | 559458U, // WUR_UA_STATE_3 |
3712 | 59.3k | 33986U, // XOR |
3713 | 59.3k | 32925U, // XORB |
3714 | 59.3k | 689366U, // XSR |
3715 | 59.3k | 10519091U, // _L32I |
3716 | 59.3k | 10519607U, // _L32I_N |
3717 | 59.3k | 58753750U, // _MOVI |
3718 | 59.3k | 10519098U, // _S32I |
3719 | 59.3k | 10519616U, // _S32I_N |
3720 | 59.3k | 2147517045U, // _SLLI |
3721 | 59.3k | 2147517052U, // _SRLI |
3722 | 59.3k | 67148528U, // mv_QR |
3723 | 59.3k | }; |
3724 | | |
3725 | 59.3k | static const uint16_t OpInfo1[] = { |
3726 | 59.3k | 0U, // PHI |
3727 | 59.3k | 0U, // INLINEASM |
3728 | 59.3k | 0U, // INLINEASM_BR |
3729 | 59.3k | 0U, // CFI_INSTRUCTION |
3730 | 59.3k | 0U, // EH_LABEL |
3731 | 59.3k | 0U, // GC_LABEL |
3732 | 59.3k | 0U, // ANNOTATION_LABEL |
3733 | 59.3k | 0U, // KILL |
3734 | 59.3k | 0U, // EXTRACT_SUBREG |
3735 | 59.3k | 0U, // INSERT_SUBREG |
3736 | 59.3k | 0U, // IMPLICIT_DEF |
3737 | 59.3k | 0U, // SUBREG_TO_REG |
3738 | 59.3k | 0U, // COPY_TO_REGCLASS |
3739 | 59.3k | 0U, // DBG_VALUE |
3740 | 59.3k | 0U, // DBG_VALUE_LIST |
3741 | 59.3k | 0U, // DBG_INSTR_REF |
3742 | 59.3k | 0U, // DBG_PHI |
3743 | 59.3k | 0U, // DBG_LABEL |
3744 | 59.3k | 0U, // REG_SEQUENCE |
3745 | 59.3k | 0U, // COPY |
3746 | 59.3k | 0U, // BUNDLE |
3747 | 59.3k | 0U, // LIFETIME_START |
3748 | 59.3k | 0U, // LIFETIME_END |
3749 | 59.3k | 0U, // PSEUDO_PROBE |
3750 | 59.3k | 0U, // ARITH_FENCE |
3751 | 59.3k | 0U, // STACKMAP |
3752 | 59.3k | 0U, // FENTRY_CALL |
3753 | 59.3k | 0U, // PATCHPOINT |
3754 | 59.3k | 0U, // LOAD_STACK_GUARD |
3755 | 59.3k | 0U, // PREALLOCATED_SETUP |
3756 | 59.3k | 0U, // PREALLOCATED_ARG |
3757 | 59.3k | 0U, // STATEPOINT |
3758 | 59.3k | 0U, // LOCAL_ESCAPE |
3759 | 59.3k | 0U, // FAULTING_OP |
3760 | 59.3k | 0U, // PATCHABLE_OP |
3761 | 59.3k | 0U, // PATCHABLE_FUNCTION_ENTER |
3762 | 59.3k | 0U, // PATCHABLE_RET |
3763 | 59.3k | 0U, // PATCHABLE_FUNCTION_EXIT |
3764 | 59.3k | 0U, // PATCHABLE_TAIL_CALL |
3765 | 59.3k | 0U, // PATCHABLE_EVENT_CALL |
3766 | 59.3k | 0U, // PATCHABLE_TYPED_EVENT_CALL |
3767 | 59.3k | 0U, // ICALL_BRANCH_FUNNEL |
3768 | 59.3k | 0U, // MEMBARRIER |
3769 | 59.3k | 0U, // JUMP_TABLE_DEBUG_INFO |
3770 | 59.3k | 0U, // G_ASSERT_SEXT |
3771 | 59.3k | 0U, // G_ASSERT_ZEXT |
3772 | 59.3k | 0U, // G_ASSERT_ALIGN |
3773 | 59.3k | 0U, // G_ADD |
3774 | 59.3k | 0U, // G_SUB |
3775 | 59.3k | 0U, // G_MUL |
3776 | 59.3k | 0U, // G_SDIV |
3777 | 59.3k | 0U, // G_UDIV |
3778 | 59.3k | 0U, // G_SREM |
3779 | 59.3k | 0U, // G_UREM |
3780 | 59.3k | 0U, // G_SDIVREM |
3781 | 59.3k | 0U, // G_UDIVREM |
3782 | 59.3k | 0U, // G_AND |
3783 | 59.3k | 0U, // G_OR |
3784 | 59.3k | 0U, // G_XOR |
3785 | 59.3k | 0U, // G_IMPLICIT_DEF |
3786 | 59.3k | 0U, // G_PHI |
3787 | 59.3k | 0U, // G_FRAME_INDEX |
3788 | 59.3k | 0U, // G_GLOBAL_VALUE |
3789 | 59.3k | 0U, // G_CONSTANT_POOL |
3790 | 59.3k | 0U, // G_EXTRACT |
3791 | 59.3k | 0U, // G_UNMERGE_VALUES |
3792 | 59.3k | 0U, // G_INSERT |
3793 | 59.3k | 0U, // G_MERGE_VALUES |
3794 | 59.3k | 0U, // G_BUILD_VECTOR |
3795 | 59.3k | 0U, // G_BUILD_VECTOR_TRUNC |
3796 | 59.3k | 0U, // G_CONCAT_VECTORS |
3797 | 59.3k | 0U, // G_PTRTOINT |
3798 | 59.3k | 0U, // G_INTTOPTR |
3799 | 59.3k | 0U, // G_BITCAST |
3800 | 59.3k | 0U, // G_FREEZE |
3801 | 59.3k | 0U, // G_CONSTANT_FOLD_BARRIER |
3802 | 59.3k | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
3803 | 59.3k | 0U, // G_INTRINSIC_TRUNC |
3804 | 59.3k | 0U, // G_INTRINSIC_ROUND |
3805 | 59.3k | 0U, // G_INTRINSIC_LRINT |
3806 | 59.3k | 0U, // G_INTRINSIC_ROUNDEVEN |
3807 | 59.3k | 0U, // G_READCYCLECOUNTER |
3808 | 59.3k | 0U, // G_LOAD |
3809 | 59.3k | 0U, // G_SEXTLOAD |
3810 | 59.3k | 0U, // G_ZEXTLOAD |
3811 | 59.3k | 0U, // G_INDEXED_LOAD |
3812 | 59.3k | 0U, // G_INDEXED_SEXTLOAD |
3813 | 59.3k | 0U, // G_INDEXED_ZEXTLOAD |
3814 | 59.3k | 0U, // G_STORE |
3815 | 59.3k | 0U, // G_INDEXED_STORE |
3816 | 59.3k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
3817 | 59.3k | 0U, // G_ATOMIC_CMPXCHG |
3818 | 59.3k | 0U, // G_ATOMICRMW_XCHG |
3819 | 59.3k | 0U, // G_ATOMICRMW_ADD |
3820 | 59.3k | 0U, // G_ATOMICRMW_SUB |
3821 | 59.3k | 0U, // G_ATOMICRMW_AND |
3822 | 59.3k | 0U, // G_ATOMICRMW_NAND |
3823 | 59.3k | 0U, // G_ATOMICRMW_OR |
3824 | 59.3k | 0U, // G_ATOMICRMW_XOR |
3825 | 59.3k | 0U, // G_ATOMICRMW_MAX |
3826 | 59.3k | 0U, // G_ATOMICRMW_MIN |
3827 | 59.3k | 0U, // G_ATOMICRMW_UMAX |
3828 | 59.3k | 0U, // G_ATOMICRMW_UMIN |
3829 | 59.3k | 0U, // G_ATOMICRMW_FADD |
3830 | 59.3k | 0U, // G_ATOMICRMW_FSUB |
3831 | 59.3k | 0U, // G_ATOMICRMW_FMAX |
3832 | 59.3k | 0U, // G_ATOMICRMW_FMIN |
3833 | 59.3k | 0U, // G_ATOMICRMW_UINC_WRAP |
3834 | 59.3k | 0U, // G_ATOMICRMW_UDEC_WRAP |
3835 | 59.3k | 0U, // G_FENCE |
3836 | 59.3k | 0U, // G_PREFETCH |
3837 | 59.3k | 0U, // G_BRCOND |
3838 | 59.3k | 0U, // G_BRINDIRECT |
3839 | 59.3k | 0U, // G_INVOKE_REGION_START |
3840 | 59.3k | 0U, // G_INTRINSIC |
3841 | 59.3k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
3842 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT |
3843 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
3844 | 59.3k | 0U, // G_ANYEXT |
3845 | 59.3k | 0U, // G_TRUNC |
3846 | 59.3k | 0U, // G_CONSTANT |
3847 | 59.3k | 0U, // G_FCONSTANT |
3848 | 59.3k | 0U, // G_VASTART |
3849 | 59.3k | 0U, // G_VAARG |
3850 | 59.3k | 0U, // G_SEXT |
3851 | 59.3k | 0U, // G_SEXT_INREG |
3852 | 59.3k | 0U, // G_ZEXT |
3853 | 59.3k | 0U, // G_SHL |
3854 | 59.3k | 0U, // G_LSHR |
3855 | 59.3k | 0U, // G_ASHR |
3856 | 59.3k | 0U, // G_FSHL |
3857 | 59.3k | 0U, // G_FSHR |
3858 | 59.3k | 0U, // G_ROTR |
3859 | 59.3k | 0U, // G_ROTL |
3860 | 59.3k | 0U, // G_ICMP |
3861 | 59.3k | 0U, // G_FCMP |
3862 | 59.3k | 0U, // G_SELECT |
3863 | 59.3k | 0U, // G_UADDO |
3864 | 59.3k | 0U, // G_UADDE |
3865 | 59.3k | 0U, // G_USUBO |
3866 | 59.3k | 0U, // G_USUBE |
3867 | 59.3k | 0U, // G_SADDO |
3868 | 59.3k | 0U, // G_SADDE |
3869 | 59.3k | 0U, // G_SSUBO |
3870 | 59.3k | 0U, // G_SSUBE |
3871 | 59.3k | 0U, // G_UMULO |
3872 | 59.3k | 0U, // G_SMULO |
3873 | 59.3k | 0U, // G_UMULH |
3874 | 59.3k | 0U, // G_SMULH |
3875 | 59.3k | 0U, // G_UADDSAT |
3876 | 59.3k | 0U, // G_SADDSAT |
3877 | 59.3k | 0U, // G_USUBSAT |
3878 | 59.3k | 0U, // G_SSUBSAT |
3879 | 59.3k | 0U, // G_USHLSAT |
3880 | 59.3k | 0U, // G_SSHLSAT |
3881 | 59.3k | 0U, // G_SMULFIX |
3882 | 59.3k | 0U, // G_UMULFIX |
3883 | 59.3k | 0U, // G_SMULFIXSAT |
3884 | 59.3k | 0U, // G_UMULFIXSAT |
3885 | 59.3k | 0U, // G_SDIVFIX |
3886 | 59.3k | 0U, // G_UDIVFIX |
3887 | 59.3k | 0U, // G_SDIVFIXSAT |
3888 | 59.3k | 0U, // G_UDIVFIXSAT |
3889 | 59.3k | 0U, // G_FADD |
3890 | 59.3k | 0U, // G_FSUB |
3891 | 59.3k | 0U, // G_FMUL |
3892 | 59.3k | 0U, // G_FMA |
3893 | 59.3k | 0U, // G_FMAD |
3894 | 59.3k | 0U, // G_FDIV |
3895 | 59.3k | 0U, // G_FREM |
3896 | 59.3k | 0U, // G_FPOW |
3897 | 59.3k | 0U, // G_FPOWI |
3898 | 59.3k | 0U, // G_FEXP |
3899 | 59.3k | 0U, // G_FEXP2 |
3900 | 59.3k | 0U, // G_FEXP10 |
3901 | 59.3k | 0U, // G_FLOG |
3902 | 59.3k | 0U, // G_FLOG2 |
3903 | 59.3k | 0U, // G_FLOG10 |
3904 | 59.3k | 0U, // G_FLDEXP |
3905 | 59.3k | 0U, // G_FFREXP |
3906 | 59.3k | 0U, // G_FNEG |
3907 | 59.3k | 0U, // G_FPEXT |
3908 | 59.3k | 0U, // G_FPTRUNC |
3909 | 59.3k | 0U, // G_FPTOSI |
3910 | 59.3k | 0U, // G_FPTOUI |
3911 | 59.3k | 0U, // G_SITOFP |
3912 | 59.3k | 0U, // G_UITOFP |
3913 | 59.3k | 0U, // G_FABS |
3914 | 59.3k | 0U, // G_FCOPYSIGN |
3915 | 59.3k | 0U, // G_IS_FPCLASS |
3916 | 59.3k | 0U, // G_FCANONICALIZE |
3917 | 59.3k | 0U, // G_FMINNUM |
3918 | 59.3k | 0U, // G_FMAXNUM |
3919 | 59.3k | 0U, // G_FMINNUM_IEEE |
3920 | 59.3k | 0U, // G_FMAXNUM_IEEE |
3921 | 59.3k | 0U, // G_FMINIMUM |
3922 | 59.3k | 0U, // G_FMAXIMUM |
3923 | 59.3k | 0U, // G_GET_FPENV |
3924 | 59.3k | 0U, // G_SET_FPENV |
3925 | 59.3k | 0U, // G_RESET_FPENV |
3926 | 59.3k | 0U, // G_GET_FPMODE |
3927 | 59.3k | 0U, // G_SET_FPMODE |
3928 | 59.3k | 0U, // G_RESET_FPMODE |
3929 | 59.3k | 0U, // G_PTR_ADD |
3930 | 59.3k | 0U, // G_PTRMASK |
3931 | 59.3k | 0U, // G_SMIN |
3932 | 59.3k | 0U, // G_SMAX |
3933 | 59.3k | 0U, // G_UMIN |
3934 | 59.3k | 0U, // G_UMAX |
3935 | 59.3k | 0U, // G_ABS |
3936 | 59.3k | 0U, // G_LROUND |
3937 | 59.3k | 0U, // G_LLROUND |
3938 | 59.3k | 0U, // G_BR |
3939 | 59.3k | 0U, // G_BRJT |
3940 | 59.3k | 0U, // G_INSERT_VECTOR_ELT |
3941 | 59.3k | 0U, // G_EXTRACT_VECTOR_ELT |
3942 | 59.3k | 0U, // G_SHUFFLE_VECTOR |
3943 | 59.3k | 0U, // G_CTTZ |
3944 | 59.3k | 0U, // G_CTTZ_ZERO_UNDEF |
3945 | 59.3k | 0U, // G_CTLZ |
3946 | 59.3k | 0U, // G_CTLZ_ZERO_UNDEF |
3947 | 59.3k | 0U, // G_CTPOP |
3948 | 59.3k | 0U, // G_BSWAP |
3949 | 59.3k | 0U, // G_BITREVERSE |
3950 | 59.3k | 0U, // G_FCEIL |
3951 | 59.3k | 0U, // G_FCOS |
3952 | 59.3k | 0U, // G_FSIN |
3953 | 59.3k | 0U, // G_FSQRT |
3954 | 59.3k | 0U, // G_FFLOOR |
3955 | 59.3k | 0U, // G_FRINT |
3956 | 59.3k | 0U, // G_FNEARBYINT |
3957 | 59.3k | 0U, // G_ADDRSPACE_CAST |
3958 | 59.3k | 0U, // G_BLOCK_ADDR |
3959 | 59.3k | 0U, // G_JUMP_TABLE |
3960 | 59.3k | 0U, // G_DYN_STACKALLOC |
3961 | 59.3k | 0U, // G_STACKSAVE |
3962 | 59.3k | 0U, // G_STACKRESTORE |
3963 | 59.3k | 0U, // G_STRICT_FADD |
3964 | 59.3k | 0U, // G_STRICT_FSUB |
3965 | 59.3k | 0U, // G_STRICT_FMUL |
3966 | 59.3k | 0U, // G_STRICT_FDIV |
3967 | 59.3k | 0U, // G_STRICT_FREM |
3968 | 59.3k | 0U, // G_STRICT_FMA |
3969 | 59.3k | 0U, // G_STRICT_FSQRT |
3970 | 59.3k | 0U, // G_STRICT_FLDEXP |
3971 | 59.3k | 0U, // G_READ_REGISTER |
3972 | 59.3k | 0U, // G_WRITE_REGISTER |
3973 | 59.3k | 0U, // G_MEMCPY |
3974 | 59.3k | 0U, // G_MEMCPY_INLINE |
3975 | 59.3k | 0U, // G_MEMMOVE |
3976 | 59.3k | 0U, // G_MEMSET |
3977 | 59.3k | 0U, // G_BZERO |
3978 | 59.3k | 0U, // G_VECREDUCE_SEQ_FADD |
3979 | 59.3k | 0U, // G_VECREDUCE_SEQ_FMUL |
3980 | 59.3k | 0U, // G_VECREDUCE_FADD |
3981 | 59.3k | 0U, // G_VECREDUCE_FMUL |
3982 | 59.3k | 0U, // G_VECREDUCE_FMAX |
3983 | 59.3k | 0U, // G_VECREDUCE_FMIN |
3984 | 59.3k | 0U, // G_VECREDUCE_FMAXIMUM |
3985 | 59.3k | 0U, // G_VECREDUCE_FMINIMUM |
3986 | 59.3k | 0U, // G_VECREDUCE_ADD |
3987 | 59.3k | 0U, // G_VECREDUCE_MUL |
3988 | 59.3k | 0U, // G_VECREDUCE_AND |
3989 | 59.3k | 0U, // G_VECREDUCE_OR |
3990 | 59.3k | 0U, // G_VECREDUCE_XOR |
3991 | 59.3k | 0U, // G_VECREDUCE_SMAX |
3992 | 59.3k | 0U, // G_VECREDUCE_SMIN |
3993 | 59.3k | 0U, // G_VECREDUCE_UMAX |
3994 | 59.3k | 0U, // G_VECREDUCE_UMIN |
3995 | 59.3k | 0U, // G_SBFX |
3996 | 59.3k | 0U, // G_UBFX |
3997 | 59.3k | 0U, // ADJCALLSTACKDOWN |
3998 | 59.3k | 0U, // ADJCALLSTACKUP |
3999 | 59.3k | 0U, // ATOMIC_CMP_SWAP_16_P |
4000 | 59.3k | 0U, // ATOMIC_CMP_SWAP_32_P |
4001 | 59.3k | 0U, // ATOMIC_CMP_SWAP_8_P |
4002 | 59.3k | 8U, // ATOMIC_LOAD_ADD_16_P |
4003 | 59.3k | 8U, // ATOMIC_LOAD_ADD_32_P |
4004 | 59.3k | 8U, // ATOMIC_LOAD_ADD_8_P |
4005 | 59.3k | 8U, // ATOMIC_LOAD_AND_16_P |
4006 | 59.3k | 8U, // ATOMIC_LOAD_AND_32_P |
4007 | 59.3k | 8U, // ATOMIC_LOAD_AND_8_P |
4008 | 59.3k | 8U, // ATOMIC_LOAD_MAX_16_P |
4009 | 59.3k | 8U, // ATOMIC_LOAD_MAX_32_P |
4010 | 59.3k | 8U, // ATOMIC_LOAD_MAX_8_P |
4011 | 59.3k | 8U, // ATOMIC_LOAD_MIN_16_P |
4012 | 59.3k | 8U, // ATOMIC_LOAD_MIN_32_P |
4013 | 59.3k | 8U, // ATOMIC_LOAD_MIN_8_P |
4014 | 59.3k | 8U, // ATOMIC_LOAD_NAND_16_P |
4015 | 59.3k | 8U, // ATOMIC_LOAD_NAND_32_P |
4016 | 59.3k | 8U, // ATOMIC_LOAD_NAND_8_P |
4017 | 59.3k | 8U, // ATOMIC_LOAD_OR_16_P |
4018 | 59.3k | 8U, // ATOMIC_LOAD_OR_32_P |
4019 | 59.3k | 8U, // ATOMIC_LOAD_OR_8_P |
4020 | 59.3k | 8U, // ATOMIC_LOAD_SUB_16_P |
4021 | 59.3k | 8U, // ATOMIC_LOAD_SUB_32_P |
4022 | 59.3k | 8U, // ATOMIC_LOAD_SUB_8_P |
4023 | 59.3k | 8U, // ATOMIC_LOAD_UMAX_16_P |
4024 | 59.3k | 8U, // ATOMIC_LOAD_UMAX_32_P |
4025 | 59.3k | 8U, // ATOMIC_LOAD_UMAX_8_P |
4026 | 59.3k | 8U, // ATOMIC_LOAD_UMIN_16_P |
4027 | 59.3k | 8U, // ATOMIC_LOAD_UMIN_32_P |
4028 | 59.3k | 8U, // ATOMIC_LOAD_UMIN_8_P |
4029 | 59.3k | 8U, // ATOMIC_LOAD_XOR_16_P |
4030 | 59.3k | 8U, // ATOMIC_LOAD_XOR_32_P |
4031 | 59.3k | 8U, // ATOMIC_LOAD_XOR_8_P |
4032 | 59.3k | 8U, // ATOMIC_SWAP_16_P |
4033 | 59.3k | 8U, // ATOMIC_SWAP_32_P |
4034 | 59.3k | 8U, // ATOMIC_SWAP_8_P |
4035 | 59.3k | 64U, // BRCC_FP |
4036 | 59.3k | 0U, // BR_JT |
4037 | 59.3k | 0U, // CONSTPOOL_ENTRY |
4038 | 59.3k | 8U, // EE_ANDQ_P |
4039 | 59.3k | 0U, // EE_BITREV_P |
4040 | 59.3k | 1152U, // EE_CMUL_S16_LD_INCP_P |
4041 | 59.3k | 192U, // EE_CMUL_S16_P |
4042 | 59.3k | 1152U, // EE_CMUL_S16_ST_INCP_P |
4043 | 59.3k | 1152U, // EE_FFT_AMS_S16_LD_INCP_P |
4044 | 59.3k | 1152U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P |
4045 | 59.3k | 1152U, // EE_FFT_AMS_S16_LD_R32_DECP_P |
4046 | 59.3k | 1024U, // EE_FFT_AMS_S16_ST_INCP_P |
4047 | 59.3k | 1152U, // EE_FFT_CMUL_S16_LD_XP_P |
4048 | 59.3k | 3072U, // EE_FFT_CMUL_S16_ST_XP_P |
4049 | 59.3k | 5248U, // EE_FFT_R2BF_S16_P |
4050 | 59.3k | 7168U, // EE_FFT_R2BF_S16_ST_INCP_P |
4051 | 59.3k | 0U, // EE_FFT_VST_R32_DECP_P |
4052 | 59.3k | 3072U, // EE_LDF_128_IP_P |
4053 | 59.3k | 3072U, // EE_LDF_128_XP_P |
4054 | 59.3k | 256U, // EE_LDF_64_IP_P |
4055 | 59.3k | 0U, // EE_LDF_64_XP_P |
4056 | 59.3k | 0U, // EE_LDQA_S16_128_IP_P |
4057 | 59.3k | 0U, // EE_LDQA_S16_128_XP_P |
4058 | 59.3k | 0U, // EE_LDQA_S8_128_IP_P |
4059 | 59.3k | 0U, // EE_LDQA_S8_128_XP_P |
4060 | 59.3k | 0U, // EE_LDQA_U16_128_IP_P |
4061 | 59.3k | 0U, // EE_LDQA_U16_128_XP_P |
4062 | 59.3k | 0U, // EE_LDQA_U8_128_IP_P |
4063 | 59.3k | 0U, // EE_LDQA_U8_128_XP_P |
4064 | 59.3k | 9408U, // EE_LDXQ_32_P |
4065 | 59.3k | 8U, // EE_LD_128_USAR_IP_P |
4066 | 59.3k | 8U, // EE_LD_128_USAR_XP_P |
4067 | 59.3k | 0U, // EE_LD_ACCX_IP_P |
4068 | 59.3k | 0U, // EE_LD_QACC_H_H_32_IP_P |
4069 | 59.3k | 0U, // EE_LD_QACC_H_L_128_IP_P |
4070 | 59.3k | 0U, // EE_LD_QACC_L_H_32_IP_P |
4071 | 59.3k | 0U, // EE_LD_QACC_L_L_128_IP_P |
4072 | 59.3k | 0U, // EE_LD_UA_STATE_IP_P |
4073 | 59.3k | 0U, // EE_MOVI_32_A_P |
4074 | 59.3k | 0U, // EE_MOVI_32_Q_P |
4075 | 59.3k | 0U, // EE_MOV_S16_QACC_P |
4076 | 59.3k | 0U, // EE_MOV_S8_QACC_P |
4077 | 59.3k | 0U, // EE_MOV_U16_QACC_P |
4078 | 59.3k | 0U, // EE_MOV_U8_QACC_P |
4079 | 59.3k | 0U, // EE_NOTQ_P |
4080 | 59.3k | 8U, // EE_ORQ_P |
4081 | 59.3k | 0U, // EE_SLCI_2Q_P |
4082 | 59.3k | 0U, // EE_SLCXXP_2Q_P |
4083 | 59.3k | 0U, // EE_SRCI_2Q_P |
4084 | 59.3k | 0U, // EE_SRCMB_S16_QACC_P |
4085 | 59.3k | 0U, // EE_SRCMB_S8_QACC_P |
4086 | 59.3k | 8U, // EE_SRCQ_128_ST_INCP_P |
4087 | 59.3k | 0U, // EE_SRCXXP_2Q_P |
4088 | 59.3k | 33920U, // EE_SRC_Q_LD_IP_P |
4089 | 59.3k | 33920U, // EE_SRC_Q_LD_XP_P |
4090 | 59.3k | 8U, // EE_SRC_Q_P |
4091 | 59.3k | 8U, // EE_SRC_Q_QUP_P |
4092 | 59.3k | 0U, // EE_SRS_ACCX_P |
4093 | 59.3k | 3072U, // EE_STF_128_IP_P |
4094 | 59.3k | 3072U, // EE_STF_128_XP_P |
4095 | 59.3k | 256U, // EE_STF_64_IP_P |
4096 | 59.3k | 0U, // EE_STF_64_XP_P |
4097 | 59.3k | 9408U, // EE_STXQ_32_P |
4098 | 59.3k | 0U, // EE_ST_ACCX_IP_P |
4099 | 59.3k | 0U, // EE_ST_QACC_H_H_32_IP_P |
4100 | 59.3k | 0U, // EE_ST_QACC_H_L_128_IP_P |
4101 | 59.3k | 0U, // EE_ST_QACC_L_H_32_IP_P |
4102 | 59.3k | 0U, // EE_ST_QACC_L_L_128_IP_P |
4103 | 59.3k | 0U, // EE_ST_UA_STATE_IP_P |
4104 | 59.3k | 33920U, // EE_VADDS_S16_LD_INCP_P |
4105 | 59.3k | 8U, // EE_VADDS_S16_P |
4106 | 59.3k | 33920U, // EE_VADDS_S16_ST_INCP_P |
4107 | 59.3k | 33920U, // EE_VADDS_S32_LD_INCP_P |
4108 | 59.3k | 8U, // EE_VADDS_S32_P |
4109 | 59.3k | 33920U, // EE_VADDS_S32_ST_INCP_P |
4110 | 59.3k | 33920U, // EE_VADDS_S8_LD_INCP_P |
4111 | 59.3k | 8U, // EE_VADDS_S8_P |
4112 | 59.3k | 33920U, // EE_VADDS_S8_ST_INCP_P |
4113 | 59.3k | 8U, // EE_VCMP_EQ_S16_P |
4114 | 59.3k | 8U, // EE_VCMP_EQ_S32_P |
4115 | 59.3k | 8U, // EE_VCMP_EQ_S8_P |
4116 | 59.3k | 8U, // EE_VCMP_GT_S16_P |
4117 | 59.3k | 8U, // EE_VCMP_GT_S32_P |
4118 | 59.3k | 8U, // EE_VCMP_GT_S8_P |
4119 | 59.3k | 8U, // EE_VCMP_LT_S16_P |
4120 | 59.3k | 8U, // EE_VCMP_LT_S32_P |
4121 | 59.3k | 8U, // EE_VCMP_LT_S8_P |
4122 | 59.3k | 0U, // EE_VLDBC_16_IP_P |
4123 | 59.3k | 0U, // EE_VLDBC_16_P |
4124 | 59.3k | 8U, // EE_VLDBC_16_XP_P |
4125 | 59.3k | 0U, // EE_VLDBC_32_IP_P |
4126 | 59.3k | 0U, // EE_VLDBC_32_P |
4127 | 59.3k | 8U, // EE_VLDBC_32_XP_P |
4128 | 59.3k | 1U, // EE_VLDBC_8_IP_P |
4129 | 59.3k | 0U, // EE_VLDBC_8_P |
4130 | 59.3k | 8U, // EE_VLDBC_8_XP_P |
4131 | 59.3k | 8U, // EE_VLDHBC_16_INCP_P |
4132 | 59.3k | 8U, // EE_VLD_128_IP_P |
4133 | 59.3k | 8U, // EE_VLD_128_XP_P |
4134 | 59.3k | 1U, // EE_VLD_H_64_IP_P |
4135 | 59.3k | 8U, // EE_VLD_H_64_XP_P |
4136 | 59.3k | 1U, // EE_VLD_L_64_IP_P |
4137 | 59.3k | 8U, // EE_VLD_L_64_XP_P |
4138 | 59.3k | 33920U, // EE_VMAX_S16_LD_INCP_P |
4139 | 59.3k | 8U, // EE_VMAX_S16_P |
4140 | 59.3k | 33920U, // EE_VMAX_S16_ST_INCP_P |
4141 | 59.3k | 33920U, // EE_VMAX_S32_LD_INCP_P |
4142 | 59.3k | 8U, // EE_VMAX_S32_P |
4143 | 59.3k | 33920U, // EE_VMAX_S32_ST_INCP_P |
4144 | 59.3k | 33920U, // EE_VMAX_S8_LD_INCP_P |
4145 | 59.3k | 8U, // EE_VMAX_S8_P |
4146 | 59.3k | 33920U, // EE_VMAX_S8_ST_INCP_P |
4147 | 59.3k | 33920U, // EE_VMIN_S16_LD_INCP_P |
4148 | 59.3k | 8U, // EE_VMIN_S16_P |
4149 | 59.3k | 33920U, // EE_VMIN_S16_ST_INCP_P |
4150 | 59.3k | 33920U, // EE_VMIN_S32_LD_INCP_P |
4151 | 59.3k | 8U, // EE_VMIN_S32_P |
4152 | 59.3k | 33920U, // EE_VMIN_S32_ST_INCP_P |
4153 | 59.3k | 33920U, // EE_VMIN_S8_LD_INCP_P |
4154 | 59.3k | 8U, // EE_VMIN_S8_P |
4155 | 59.3k | 33920U, // EE_VMIN_S8_ST_INCP_P |
4156 | 59.3k | 9U, // EE_VMULAS_S16_ACCX_LD_IP_P |
4157 | 59.3k | 321U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P |
4158 | 59.3k | 33920U, // EE_VMULAS_S16_ACCX_LD_XP_P |
4159 | 59.3k | 1152U, // EE_VMULAS_S16_ACCX_LD_XP_QUP_P |
4160 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_P |
4161 | 59.3k | 128U, // EE_VMULAS_S16_QACC_LDBC_INCP_P |
4162 | 59.3k | 1152U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P |
4163 | 59.3k | 9U, // EE_VMULAS_S16_QACC_LD_IP_P |
4164 | 59.3k | 321U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P |
4165 | 59.3k | 33920U, // EE_VMULAS_S16_QACC_LD_XP_P |
4166 | 59.3k | 1152U, // EE_VMULAS_S16_QACC_LD_XP_QUP_P |
4167 | 59.3k | 0U, // EE_VMULAS_S16_QACC_P |
4168 | 59.3k | 9U, // EE_VMULAS_S8_ACCX_LD_IP_P |
4169 | 59.3k | 321U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P |
4170 | 59.3k | 33920U, // EE_VMULAS_S8_ACCX_LD_XP_P |
4171 | 59.3k | 1152U, // EE_VMULAS_S8_ACCX_LD_XP_QUP_P |
4172 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_P |
4173 | 59.3k | 128U, // EE_VMULAS_S8_QACC_LDBC_INCP_P |
4174 | 59.3k | 1152U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P |
4175 | 59.3k | 9U, // EE_VMULAS_S8_QACC_LD_IP_P |
4176 | 59.3k | 321U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P |
4177 | 59.3k | 33920U, // EE_VMULAS_S8_QACC_LD_XP_P |
4178 | 59.3k | 1152U, // EE_VMULAS_S8_QACC_LD_XP_QUP_P |
4179 | 59.3k | 0U, // EE_VMULAS_S8_QACC_P |
4180 | 59.3k | 9U, // EE_VMULAS_U16_ACCX_LD_IP_P |
4181 | 59.3k | 321U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P |
4182 | 59.3k | 33920U, // EE_VMULAS_U16_ACCX_LD_XP_P |
4183 | 59.3k | 1152U, // EE_VMULAS_U16_ACCX_LD_XP_QUP_P |
4184 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_P |
4185 | 59.3k | 128U, // EE_VMULAS_U16_QACC_LDBC_INCP_P |
4186 | 59.3k | 1152U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P |
4187 | 59.3k | 9U, // EE_VMULAS_U16_QACC_LD_IP_P |
4188 | 59.3k | 321U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P |
4189 | 59.3k | 33920U, // EE_VMULAS_U16_QACC_LD_XP_P |
4190 | 59.3k | 1152U, // EE_VMULAS_U16_QACC_LD_XP_QUP_P |
4191 | 59.3k | 0U, // EE_VMULAS_U16_QACC_P |
4192 | 59.3k | 9U, // EE_VMULAS_U8_ACCX_LD_IP_P |
4193 | 59.3k | 321U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P |
4194 | 59.3k | 33920U, // EE_VMULAS_U8_ACCX_LD_XP_P |
4195 | 59.3k | 1152U, // EE_VMULAS_U8_ACCX_LD_XP_QUP_P |
4196 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_P |
4197 | 59.3k | 128U, // EE_VMULAS_U8_QACC_LDBC_INCP_P |
4198 | 59.3k | 1152U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P |
4199 | 59.3k | 9U, // EE_VMULAS_U8_QACC_LD_IP_P |
4200 | 59.3k | 321U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P |
4201 | 59.3k | 33920U, // EE_VMULAS_U8_QACC_LD_XP_P |
4202 | 59.3k | 1152U, // EE_VMULAS_U8_QACC_LD_XP_QUP_P |
4203 | 59.3k | 0U, // EE_VMULAS_U8_QACC_P |
4204 | 59.3k | 33920U, // EE_VMUL_S16_LD_INCP_P |
4205 | 59.3k | 8U, // EE_VMUL_S16_P |
4206 | 59.3k | 33920U, // EE_VMUL_S16_ST_INCP_P |
4207 | 59.3k | 33920U, // EE_VMUL_S8_LD_INCP_P |
4208 | 59.3k | 8U, // EE_VMUL_S8_P |
4209 | 59.3k | 33920U, // EE_VMUL_S8_ST_INCP_P |
4210 | 59.3k | 33920U, // EE_VMUL_U16_LD_INCP_P |
4211 | 59.3k | 8U, // EE_VMUL_U16_P |
4212 | 59.3k | 33920U, // EE_VMUL_U16_ST_INCP_P |
4213 | 59.3k | 33920U, // EE_VMUL_U8_LD_INCP_P |
4214 | 59.3k | 8U, // EE_VMUL_U8_P |
4215 | 59.3k | 33920U, // EE_VMUL_U8_ST_INCP_P |
4216 | 59.3k | 0U, // EE_VPRELU_S16_P |
4217 | 59.3k | 0U, // EE_VPRELU_S8_P |
4218 | 59.3k | 8U, // EE_VRELU_S16_P |
4219 | 59.3k | 8U, // EE_VRELU_S8_P |
4220 | 59.3k | 0U, // EE_VSL_32_P |
4221 | 59.3k | 9344U, // EE_VSMULAS_S16_QACC_LD_INCP_P |
4222 | 59.3k | 1U, // EE_VSMULAS_S16_QACC_P |
4223 | 59.3k | 11392U, // EE_VSMULAS_S8_QACC_LD_INCP_P |
4224 | 59.3k | 0U, // EE_VSMULAS_S8_QACC_P |
4225 | 59.3k | 0U, // EE_VSR_32_P |
4226 | 59.3k | 8U, // EE_VST_128_IP_P |
4227 | 59.3k | 8U, // EE_VST_128_XP_P |
4228 | 59.3k | 1U, // EE_VST_H_64_IP_P |
4229 | 59.3k | 8U, // EE_VST_H_64_XP_P |
4230 | 59.3k | 1U, // EE_VST_L_64_IP_P |
4231 | 59.3k | 8U, // EE_VST_L_64_XP_P |
4232 | 59.3k | 33920U, // EE_VSUBS_S16_LD_INCP_P |
4233 | 59.3k | 8U, // EE_VSUBS_S16_P |
4234 | 59.3k | 33920U, // EE_VSUBS_S16_ST_INCP_P |
4235 | 59.3k | 33920U, // EE_VSUBS_S32_LD_INCP_P |
4236 | 59.3k | 8U, // EE_VSUBS_S32_P |
4237 | 59.3k | 33920U, // EE_VSUBS_S32_ST_INCP_P |
4238 | 59.3k | 33920U, // EE_VSUBS_S8_LD_INCP_P |
4239 | 59.3k | 8U, // EE_VSUBS_S8_P |
4240 | 59.3k | 33920U, // EE_VSUBS_S8_ST_INCP_P |
4241 | 59.3k | 0U, // EE_VUNZIP_16_P |
4242 | 59.3k | 0U, // EE_VUNZIP_32_P |
4243 | 59.3k | 0U, // EE_VUNZIP_8_P |
4244 | 59.3k | 0U, // EE_VZIP_16_P |
4245 | 59.3k | 0U, // EE_VZIP_32_P |
4246 | 59.3k | 0U, // EE_VZIP_8_P |
4247 | 59.3k | 8U, // EE_XORQ_P |
4248 | 59.3k | 0U, // EE_ZERO_ACCX_P |
4249 | 59.3k | 0U, // EE_ZERO_QACC_P |
4250 | 59.3k | 0U, // EE_ZERO_Q_P |
4251 | 59.3k | 8U, // EXTUI_BR2_P |
4252 | 59.3k | 8U, // EXTUI_BR4_P |
4253 | 59.3k | 8U, // EXTUI_BR_P |
4254 | 59.3k | 0U, // L8I_P |
4255 | 59.3k | 0U, // LDDEC_P |
4256 | 59.3k | 0U, // LDINC_P |
4257 | 59.3k | 0U, // LOOPBR |
4258 | 59.3k | 0U, // LOOPDEC |
4259 | 59.3k | 0U, // LOOPEND |
4260 | 59.3k | 0U, // LOOPINIT |
4261 | 59.3k | 0U, // LOOPSTART |
4262 | 59.3k | 0U, // MOVBA2_P |
4263 | 59.3k | 0U, // MOVBA2_P2 |
4264 | 59.3k | 0U, // MOVBA4_P |
4265 | 59.3k | 0U, // MOVBA4_P2 |
4266 | 59.3k | 0U, // MOVBA_P |
4267 | 59.3k | 0U, // MOVBA_P2 |
4268 | 59.3k | 0U, // MULA_DA_HH_LDDEC_P |
4269 | 59.3k | 0U, // MULA_DA_HH_LDINC_P |
4270 | 59.3k | 0U, // MULA_DA_HL_LDDEC_P |
4271 | 59.3k | 0U, // MULA_DA_HL_LDINC_P |
4272 | 59.3k | 0U, // MULA_DA_LH_LDDEC_P |
4273 | 59.3k | 0U, // MULA_DA_LH_LDINC_P |
4274 | 59.3k | 0U, // MULA_DA_LL_LDDEC_P |
4275 | 59.3k | 0U, // MULA_DA_LL_LDINC_P |
4276 | 59.3k | 128U, // MULA_DD_HH_LDDEC_P |
4277 | 59.3k | 128U, // MULA_DD_HH_LDINC_P |
4278 | 59.3k | 128U, // MULA_DD_HL_LDDEC_P |
4279 | 59.3k | 128U, // MULA_DD_HL_LDINC_P |
4280 | 59.3k | 128U, // MULA_DD_LH_LDDEC_P |
4281 | 59.3k | 128U, // MULA_DD_LH_LDINC_P |
4282 | 59.3k | 128U, // MULA_DD_LL_LDDEC_P |
4283 | 59.3k | 128U, // MULA_DD_LL_LDINC_P |
4284 | 59.3k | 0U, // RESTORE_BOOL |
4285 | 59.3k | 3072U, // SELECT |
4286 | 59.3k | 3072U, // SELECT_CC_FP_FP |
4287 | 59.3k | 3072U, // SELECT_CC_FP_INT |
4288 | 59.3k | 3072U, // SELECT_CC_INT_FP |
4289 | 59.3k | 8U, // SLLI_BR_P |
4290 | 59.3k | 8U, // SLL_P |
4291 | 59.3k | 0U, // SPILL_BOOL |
4292 | 59.3k | 8U, // SRA_P |
4293 | 59.3k | 8U, // SRL_P |
4294 | 59.3k | 0U, // WSR_ACCHI_P |
4295 | 59.3k | 0U, // WSR_ACCLO_P |
4296 | 59.3k | 0U, // WSR_M0_P |
4297 | 59.3k | 0U, // WSR_M1_P |
4298 | 59.3k | 0U, // WSR_M2_P |
4299 | 59.3k | 0U, // WSR_M3_P |
4300 | 59.3k | 0U, // XSR_ACCHI_P |
4301 | 59.3k | 0U, // XSR_ACCLO_P |
4302 | 59.3k | 0U, // XSR_M0_P |
4303 | 59.3k | 0U, // XSR_M1_P |
4304 | 59.3k | 0U, // XSR_M2_P |
4305 | 59.3k | 0U, // XSR_M3_P |
4306 | 59.3k | 0U, // mv_QR_P |
4307 | 59.3k | 0U, // ABS |
4308 | 59.3k | 0U, // ABS_S |
4309 | 59.3k | 8U, // ADD |
4310 | 59.3k | 0U, // ADDEXPM_S |
4311 | 59.3k | 0U, // ADDEXP_S |
4312 | 59.3k | 8U, // ADDI |
4313 | 59.3k | 1U, // ADDI_N |
4314 | 59.3k | 1U, // ADDMI |
4315 | 59.3k | 8U, // ADDX2 |
4316 | 59.3k | 8U, // ADDX4 |
4317 | 59.3k | 8U, // ADDX8 |
4318 | 59.3k | 8U, // ADD_N |
4319 | 59.3k | 8U, // ADD_S |
4320 | 59.3k | 0U, // AE_ABS16S |
4321 | 59.3k | 0U, // AE_ABS24S |
4322 | 59.3k | 0U, // AE_ABS32 |
4323 | 59.3k | 0U, // AE_ABS32S |
4324 | 59.3k | 0U, // AE_ABS64 |
4325 | 59.3k | 0U, // AE_ABS64S |
4326 | 59.3k | 8U, // AE_ADD16 |
4327 | 59.3k | 8U, // AE_ADD16S |
4328 | 59.3k | 8U, // AE_ADD24S |
4329 | 59.3k | 8U, // AE_ADD32 |
4330 | 59.3k | 8U, // AE_ADD32S |
4331 | 59.3k | 8U, // AE_ADD32_HL_LH |
4332 | 59.3k | 8U, // AE_ADD64 |
4333 | 59.3k | 8U, // AE_ADD64S |
4334 | 59.3k | 8U, // AE_ADDBRBA32 |
4335 | 59.3k | 8U, // AE_ADDSUB32 |
4336 | 59.3k | 8U, // AE_ADDSUB32S |
4337 | 59.3k | 8U, // AE_AND |
4338 | 59.3k | 0U, // AE_CVT32X2F16_10 |
4339 | 59.3k | 0U, // AE_CVT32X2F16_32 |
4340 | 59.3k | 0U, // AE_CVT48A32 |
4341 | 59.3k | 0U, // AE_CVT64A32 |
4342 | 59.3k | 0U, // AE_CVT64F32_H |
4343 | 59.3k | 0U, // AE_CVTA32F24S_H |
4344 | 59.3k | 0U, // AE_CVTA32F24S_L |
4345 | 59.3k | 0U, // AE_CVTQ56A32S |
4346 | 59.3k | 0U, // AE_CVTQ56P32S_H |
4347 | 59.3k | 0U, // AE_CVTQ56P32S_L |
4348 | 59.3k | 0U, // AE_DB |
4349 | 59.3k | 0U, // AE_DBI |
4350 | 59.3k | 0U, // AE_DBI_IC |
4351 | 59.3k | 0U, // AE_DBI_IP |
4352 | 59.3k | 0U, // AE_DB_IC |
4353 | 59.3k | 0U, // AE_DB_IP |
4354 | 59.3k | 0U, // AE_DIV64D32_H |
4355 | 59.3k | 0U, // AE_DIV64D32_L |
4356 | 59.3k | 8U, // AE_EQ16 |
4357 | 59.3k | 8U, // AE_EQ32 |
4358 | 59.3k | 8U, // AE_EQ64 |
4359 | 59.3k | 1U, // AE_L16M_I |
4360 | 59.3k | 1U, // AE_L16M_IU |
4361 | 59.3k | 8U, // AE_L16M_X |
4362 | 59.3k | 10U, // AE_L16M_XC |
4363 | 59.3k | 10U, // AE_L16M_XU |
4364 | 59.3k | 2U, // AE_L16X2M_I |
4365 | 59.3k | 2U, // AE_L16X2M_IU |
4366 | 59.3k | 8U, // AE_L16X2M_X |
4367 | 59.3k | 10U, // AE_L16X2M_XC |
4368 | 59.3k | 10U, // AE_L16X2M_XU |
4369 | 59.3k | 2U, // AE_L16X4_I |
4370 | 59.3k | 2U, // AE_L16X4_IP |
4371 | 59.3k | 0U, // AE_L16X4_RIC |
4372 | 59.3k | 0U, // AE_L16X4_RIP |
4373 | 59.3k | 8U, // AE_L16X4_X |
4374 | 59.3k | 10U, // AE_L16X4_XC |
4375 | 59.3k | 10U, // AE_L16X4_XP |
4376 | 59.3k | 1U, // AE_L16_I |
4377 | 59.3k | 1U, // AE_L16_IP |
4378 | 59.3k | 8U, // AE_L16_X |
4379 | 59.3k | 10U, // AE_L16_XC |
4380 | 59.3k | 10U, // AE_L16_XP |
4381 | 59.3k | 2U, // AE_L32F24_I |
4382 | 59.3k | 2U, // AE_L32F24_IP |
4383 | 59.3k | 8U, // AE_L32F24_X |
4384 | 59.3k | 10U, // AE_L32F24_XC |
4385 | 59.3k | 10U, // AE_L32F24_XP |
4386 | 59.3k | 2U, // AE_L32M_I |
4387 | 59.3k | 2U, // AE_L32M_IU |
4388 | 59.3k | 8U, // AE_L32M_X |
4389 | 59.3k | 10U, // AE_L32M_XC |
4390 | 59.3k | 10U, // AE_L32M_XU |
4391 | 59.3k | 2U, // AE_L32X2F24_I |
4392 | 59.3k | 2U, // AE_L32X2F24_IP |
4393 | 59.3k | 0U, // AE_L32X2F24_RIC |
4394 | 59.3k | 0U, // AE_L32X2F24_RIP |
4395 | 59.3k | 8U, // AE_L32X2F24_X |
4396 | 59.3k | 10U, // AE_L32X2F24_XC |
4397 | 59.3k | 10U, // AE_L32X2F24_XP |
4398 | 59.3k | 2U, // AE_L32X2_I |
4399 | 59.3k | 2U, // AE_L32X2_IP |
4400 | 59.3k | 0U, // AE_L32X2_RIC |
4401 | 59.3k | 0U, // AE_L32X2_RIP |
4402 | 59.3k | 8U, // AE_L32X2_X |
4403 | 59.3k | 10U, // AE_L32X2_XC |
4404 | 59.3k | 10U, // AE_L32X2_XP |
4405 | 59.3k | 2U, // AE_L32_I |
4406 | 59.3k | 2U, // AE_L32_IP |
4407 | 59.3k | 8U, // AE_L32_X |
4408 | 59.3k | 10U, // AE_L32_XC |
4409 | 59.3k | 10U, // AE_L32_XP |
4410 | 59.3k | 2U, // AE_L64_I |
4411 | 59.3k | 2U, // AE_L64_IP |
4412 | 59.3k | 8U, // AE_L64_X |
4413 | 59.3k | 10U, // AE_L64_XC |
4414 | 59.3k | 10U, // AE_L64_XP |
4415 | 59.3k | 0U, // AE_LA16X4NEG_PC |
4416 | 59.3k | 0U, // AE_LA16X4POS_PC |
4417 | 59.3k | 2U, // AE_LA16X4_IC |
4418 | 59.3k | 2U, // AE_LA16X4_IP |
4419 | 59.3k | 2U, // AE_LA16X4_RIC |
4420 | 59.3k | 2U, // AE_LA16X4_RIP |
4421 | 59.3k | 0U, // AE_LA24NEG_PC |
4422 | 59.3k | 0U, // AE_LA24POS_PC |
4423 | 59.3k | 0U, // AE_LA24X2NEG_PC |
4424 | 59.3k | 0U, // AE_LA24X2POS_PC |
4425 | 59.3k | 2U, // AE_LA24X2_IC |
4426 | 59.3k | 2U, // AE_LA24X2_IP |
4427 | 59.3k | 2U, // AE_LA24X2_RIC |
4428 | 59.3k | 2U, // AE_LA24X2_RIP |
4429 | 59.3k | 2U, // AE_LA24_IC |
4430 | 59.3k | 2U, // AE_LA24_IP |
4431 | 59.3k | 2U, // AE_LA24_RIC |
4432 | 59.3k | 2U, // AE_LA24_RIP |
4433 | 59.3k | 2U, // AE_LA32X2F24_IC |
4434 | 59.3k | 2U, // AE_LA32X2F24_IP |
4435 | 59.3k | 2U, // AE_LA32X2F24_RIC |
4436 | 59.3k | 2U, // AE_LA32X2F24_RIP |
4437 | 59.3k | 0U, // AE_LA32X2NEG_PC |
4438 | 59.3k | 0U, // AE_LA32X2POS_PC |
4439 | 59.3k | 2U, // AE_LA32X2_IC |
4440 | 59.3k | 2U, // AE_LA32X2_IP |
4441 | 59.3k | 2U, // AE_LA32X2_RIC |
4442 | 59.3k | 2U, // AE_LA32X2_RIP |
4443 | 59.3k | 0U, // AE_LA64_PP |
4444 | 59.3k | 2U, // AE_LALIGN64_I |
4445 | 59.3k | 0U, // AE_LB |
4446 | 59.3k | 0U, // AE_LBI |
4447 | 59.3k | 8U, // AE_LBK |
4448 | 59.3k | 2U, // AE_LBKI |
4449 | 59.3k | 0U, // AE_LBS |
4450 | 59.3k | 0U, // AE_LBSI |
4451 | 59.3k | 8U, // AE_LE16 |
4452 | 59.3k | 8U, // AE_LE32 |
4453 | 59.3k | 8U, // AE_LE64 |
4454 | 59.3k | 8U, // AE_LT16 |
4455 | 59.3k | 8U, // AE_LT32 |
4456 | 59.3k | 8U, // AE_LT64 |
4457 | 59.3k | 8U, // AE_MAX32 |
4458 | 59.3k | 8U, // AE_MAX64 |
4459 | 59.3k | 8U, // AE_MAXABS32S |
4460 | 59.3k | 8U, // AE_MAXABS64S |
4461 | 59.3k | 8U, // AE_MIN32 |
4462 | 59.3k | 8U, // AE_MIN64 |
4463 | 59.3k | 8U, // AE_MINABS32S |
4464 | 59.3k | 8U, // AE_MINABS64S |
4465 | 59.3k | 0U, // AE_MOV |
4466 | 59.3k | 0U, // AE_MOVAD16_0 |
4467 | 59.3k | 0U, // AE_MOVAD16_1 |
4468 | 59.3k | 0U, // AE_MOVAD16_2 |
4469 | 59.3k | 0U, // AE_MOVAD16_3 |
4470 | 59.3k | 0U, // AE_MOVAD32_H |
4471 | 59.3k | 0U, // AE_MOVAD32_L |
4472 | 59.3k | 0U, // AE_MOVALIGN |
4473 | 59.3k | 0U, // AE_MOVDA16 |
4474 | 59.3k | 8U, // AE_MOVDA16X2 |
4475 | 59.3k | 0U, // AE_MOVDA32 |
4476 | 59.3k | 8U, // AE_MOVDA32X2 |
4477 | 59.3k | 10U, // AE_MOVF16X4 |
4478 | 59.3k | 10U, // AE_MOVF32X2 |
4479 | 59.3k | 10U, // AE_MOVF64 |
4480 | 59.3k | 0U, // AE_MOVI |
4481 | 59.3k | 10U, // AE_MOVT16X4 |
4482 | 59.3k | 10U, // AE_MOVT32X2 |
4483 | 59.3k | 10U, // AE_MOVT64 |
4484 | 59.3k | 0U, // AE_MUL16X4 |
4485 | 59.3k | 8U, // AE_MUL32U_LL |
4486 | 59.3k | 8U, // AE_MUL32X16_H0 |
4487 | 59.3k | 8U, // AE_MUL32X16_H0_S2 |
4488 | 59.3k | 8U, // AE_MUL32X16_H1 |
4489 | 59.3k | 8U, // AE_MUL32X16_H1_S2 |
4490 | 59.3k | 8U, // AE_MUL32X16_H2 |
4491 | 59.3k | 8U, // AE_MUL32X16_H2_S2 |
4492 | 59.3k | 8U, // AE_MUL32X16_H3 |
4493 | 59.3k | 8U, // AE_MUL32X16_H3_S2 |
4494 | 59.3k | 8U, // AE_MUL32X16_L0 |
4495 | 59.3k | 8U, // AE_MUL32X16_L0_S2 |
4496 | 59.3k | 8U, // AE_MUL32X16_L1 |
4497 | 59.3k | 8U, // AE_MUL32X16_L1_S2 |
4498 | 59.3k | 8U, // AE_MUL32X16_L2 |
4499 | 59.3k | 8U, // AE_MUL32X16_L2_S2 |
4500 | 59.3k | 8U, // AE_MUL32X16_L3 |
4501 | 59.3k | 8U, // AE_MUL32X16_L3_S2 |
4502 | 59.3k | 8U, // AE_MUL32_HH |
4503 | 59.3k | 8U, // AE_MUL32_LH |
4504 | 59.3k | 8U, // AE_MUL32_LL |
4505 | 59.3k | 8U, // AE_MUL32_LL_S2 |
4506 | 59.3k | 11U, // AE_MULA16X4 |
4507 | 59.3k | 10U, // AE_MULA32U_LL |
4508 | 59.3k | 10U, // AE_MULA32X16_H0 |
4509 | 59.3k | 10U, // AE_MULA32X16_H0_S2 |
4510 | 59.3k | 10U, // AE_MULA32X16_H1 |
4511 | 59.3k | 10U, // AE_MULA32X16_H1_S2 |
4512 | 59.3k | 10U, // AE_MULA32X16_H2 |
4513 | 59.3k | 10U, // AE_MULA32X16_H2_S2 |
4514 | 59.3k | 10U, // AE_MULA32X16_H3 |
4515 | 59.3k | 10U, // AE_MULA32X16_H3_S2 |
4516 | 59.3k | 10U, // AE_MULA32X16_L0 |
4517 | 59.3k | 10U, // AE_MULA32X16_L0_S2 |
4518 | 59.3k | 10U, // AE_MULA32X16_L1 |
4519 | 59.3k | 10U, // AE_MULA32X16_L1_S2 |
4520 | 59.3k | 10U, // AE_MULA32X16_L2 |
4521 | 59.3k | 10U, // AE_MULA32X16_L2_S2 |
4522 | 59.3k | 10U, // AE_MULA32X16_L3 |
4523 | 59.3k | 10U, // AE_MULA32X16_L3_S2 |
4524 | 59.3k | 10U, // AE_MULA32_HH |
4525 | 59.3k | 10U, // AE_MULA32_LH |
4526 | 59.3k | 10U, // AE_MULA32_LL |
4527 | 59.3k | 10U, // AE_MULA32_LL_S2 |
4528 | 59.3k | 10U, // AE_MULAAD24_HH_LL |
4529 | 59.3k | 10U, // AE_MULAAD24_HH_LL_S2 |
4530 | 59.3k | 10U, // AE_MULAAD24_HL_LH |
4531 | 59.3k | 10U, // AE_MULAAD24_HL_LH_S2 |
4532 | 59.3k | 10U, // AE_MULAAD32X16_H0_L1 |
4533 | 59.3k | 10U, // AE_MULAAD32X16_H0_L1_S2 |
4534 | 59.3k | 10U, // AE_MULAAD32X16_H1_L0 |
4535 | 59.3k | 10U, // AE_MULAAD32X16_H1_L0_S2 |
4536 | 59.3k | 10U, // AE_MULAAD32X16_H2_L3 |
4537 | 59.3k | 10U, // AE_MULAAD32X16_H2_L3_S2 |
4538 | 59.3k | 10U, // AE_MULAAD32X16_H3_L2 |
4539 | 59.3k | 10U, // AE_MULAAD32X16_H3_L2_S2 |
4540 | 59.3k | 10U, // AE_MULAAFD16SS_11_00 |
4541 | 59.3k | 10U, // AE_MULAAFD16SS_11_00_S2 |
4542 | 59.3k | 10U, // AE_MULAAFD16SS_13_02 |
4543 | 59.3k | 10U, // AE_MULAAFD16SS_13_02_S2 |
4544 | 59.3k | 10U, // AE_MULAAFD16SS_33_22 |
4545 | 59.3k | 10U, // AE_MULAAFD16SS_33_22_S2 |
4546 | 59.3k | 10U, // AE_MULAAFD24_HH_LL |
4547 | 59.3k | 10U, // AE_MULAAFD24_HH_LL_S2 |
4548 | 59.3k | 10U, // AE_MULAAFD24_HL_LH |
4549 | 59.3k | 10U, // AE_MULAAFD24_HL_LH_S2 |
4550 | 59.3k | 10U, // AE_MULAAFD32X16_H0_L1 |
4551 | 59.3k | 10U, // AE_MULAAFD32X16_H0_L1_S2 |
4552 | 59.3k | 10U, // AE_MULAAFD32X16_H1_L0 |
4553 | 59.3k | 10U, // AE_MULAAFD32X16_H1_L0_S2 |
4554 | 59.3k | 10U, // AE_MULAAFD32X16_H2_L3 |
4555 | 59.3k | 10U, // AE_MULAAFD32X16_H2_L3_S2 |
4556 | 59.3k | 10U, // AE_MULAAFD32X16_H3_L2 |
4557 | 59.3k | 10U, // AE_MULAAFD32X16_H3_L2_S2 |
4558 | 59.3k | 10U, // AE_MULAC24 |
4559 | 59.3k | 10U, // AE_MULAC32X16_H |
4560 | 59.3k | 10U, // AE_MULAC32X16_L |
4561 | 59.3k | 10U, // AE_MULAF16SS_00 |
4562 | 59.3k | 10U, // AE_MULAF16SS_00_S2 |
4563 | 59.3k | 10U, // AE_MULAF16SS_10 |
4564 | 59.3k | 10U, // AE_MULAF16SS_11 |
4565 | 59.3k | 10U, // AE_MULAF16SS_20 |
4566 | 59.3k | 10U, // AE_MULAF16SS_21 |
4567 | 59.3k | 10U, // AE_MULAF16SS_22 |
4568 | 59.3k | 10U, // AE_MULAF16SS_30 |
4569 | 59.3k | 10U, // AE_MULAF16SS_31 |
4570 | 59.3k | 10U, // AE_MULAF16SS_32 |
4571 | 59.3k | 10U, // AE_MULAF16SS_33 |
4572 | 59.3k | 11U, // AE_MULAF16X4SS |
4573 | 59.3k | 10U, // AE_MULAF32R_HH |
4574 | 59.3k | 10U, // AE_MULAF32R_LH |
4575 | 59.3k | 10U, // AE_MULAF32R_LL |
4576 | 59.3k | 10U, // AE_MULAF32R_LL_S2 |
4577 | 59.3k | 10U, // AE_MULAF32S_HH |
4578 | 59.3k | 10U, // AE_MULAF32S_LH |
4579 | 59.3k | 10U, // AE_MULAF32S_LL |
4580 | 59.3k | 10U, // AE_MULAF32S_LL_S2 |
4581 | 59.3k | 10U, // AE_MULAF32X16_H0 |
4582 | 59.3k | 10U, // AE_MULAF32X16_H0_S2 |
4583 | 59.3k | 10U, // AE_MULAF32X16_H1 |
4584 | 59.3k | 10U, // AE_MULAF32X16_H1_S2 |
4585 | 59.3k | 10U, // AE_MULAF32X16_H2 |
4586 | 59.3k | 10U, // AE_MULAF32X16_H2_S2 |
4587 | 59.3k | 10U, // AE_MULAF32X16_H3 |
4588 | 59.3k | 10U, // AE_MULAF32X16_H3_S2 |
4589 | 59.3k | 10U, // AE_MULAF32X16_L0 |
4590 | 59.3k | 10U, // AE_MULAF32X16_L0_S2 |
4591 | 59.3k | 10U, // AE_MULAF32X16_L1 |
4592 | 59.3k | 10U, // AE_MULAF32X16_L1_S2 |
4593 | 59.3k | 10U, // AE_MULAF32X16_L2 |
4594 | 59.3k | 10U, // AE_MULAF32X16_L2_S2 |
4595 | 59.3k | 10U, // AE_MULAF32X16_L3 |
4596 | 59.3k | 10U, // AE_MULAF32X16_L3_S2 |
4597 | 59.3k | 10U, // AE_MULAF48Q32SP16S_L |
4598 | 59.3k | 10U, // AE_MULAF48Q32SP16S_L_S2 |
4599 | 59.3k | 10U, // AE_MULAF48Q32SP16U_L |
4600 | 59.3k | 10U, // AE_MULAF48Q32SP16U_L_S2 |
4601 | 59.3k | 10U, // AE_MULAFC24RA |
4602 | 59.3k | 10U, // AE_MULAFC32X16RAS_H |
4603 | 59.3k | 10U, // AE_MULAFC32X16RAS_L |
4604 | 59.3k | 387U, // AE_MULAFD24X2_FIR_H |
4605 | 59.3k | 387U, // AE_MULAFD24X2_FIR_L |
4606 | 59.3k | 387U, // AE_MULAFD32X16X2_FIR_HH |
4607 | 59.3k | 387U, // AE_MULAFD32X16X2_FIR_HL |
4608 | 59.3k | 387U, // AE_MULAFD32X16X2_FIR_LH |
4609 | 59.3k | 387U, // AE_MULAFD32X16X2_FIR_LL |
4610 | 59.3k | 10U, // AE_MULAFP24X2R |
4611 | 59.3k | 10U, // AE_MULAFP24X2RA |
4612 | 59.3k | 10U, // AE_MULAFP24X2RA_S2 |
4613 | 59.3k | 10U, // AE_MULAFP24X2R_S2 |
4614 | 59.3k | 10U, // AE_MULAFP32X16X2RAS_H |
4615 | 59.3k | 10U, // AE_MULAFP32X16X2RAS_H_S2 |
4616 | 59.3k | 10U, // AE_MULAFP32X16X2RAS_L |
4617 | 59.3k | 10U, // AE_MULAFP32X16X2RAS_L_S2 |
4618 | 59.3k | 10U, // AE_MULAFP32X16X2RS_H |
4619 | 59.3k | 10U, // AE_MULAFP32X16X2RS_H_S2 |
4620 | 59.3k | 10U, // AE_MULAFP32X16X2RS_L |
4621 | 59.3k | 10U, // AE_MULAFP32X16X2RS_L_S2 |
4622 | 59.3k | 10U, // AE_MULAFP32X2RAS |
4623 | 59.3k | 10U, // AE_MULAFP32X2RS |
4624 | 59.3k | 10U, // AE_MULAFQ32SP24S_H_S2 |
4625 | 59.3k | 10U, // AE_MULAFQ32SP24S_L_S2 |
4626 | 59.3k | 10U, // AE_MULAP24X2 |
4627 | 59.3k | 10U, // AE_MULAP24X2_S2 |
4628 | 59.3k | 10U, // AE_MULAP32X16X2_H |
4629 | 59.3k | 10U, // AE_MULAP32X16X2_L |
4630 | 59.3k | 10U, // AE_MULAP32X2 |
4631 | 59.3k | 10U, // AE_MULAQ32SP16S_L_S2 |
4632 | 59.3k | 10U, // AE_MULAQ32SP16U_L_S2 |
4633 | 59.3k | 10U, // AE_MULARFQ32SP24S_H_S2 |
4634 | 59.3k | 10U, // AE_MULARFQ32SP24S_L_S2 |
4635 | 59.3k | 10U, // AE_MULAS32F48P16S_HH |
4636 | 59.3k | 10U, // AE_MULAS32F48P16S_HH_S2 |
4637 | 59.3k | 10U, // AE_MULAS32F48P16S_LH |
4638 | 59.3k | 10U, // AE_MULAS32F48P16S_LH_S2 |
4639 | 59.3k | 10U, // AE_MULAS32F48P16S_LL |
4640 | 59.3k | 10U, // AE_MULAS32F48P16S_LL_S2 |
4641 | 59.3k | 10U, // AE_MULASD24_HH_LL |
4642 | 59.3k | 10U, // AE_MULASD24_HH_LL_S2 |
4643 | 59.3k | 10U, // AE_MULASD24_HL_LH |
4644 | 59.3k | 10U, // AE_MULASD24_HL_LH_S2 |
4645 | 59.3k | 10U, // AE_MULASD32X16_H1_L0 |
4646 | 59.3k | 10U, // AE_MULASD32X16_H1_L0_S2 |
4647 | 59.3k | 10U, // AE_MULASD32X16_H3_L2 |
4648 | 59.3k | 10U, // AE_MULASD32X16_H3_L2_S2 |
4649 | 59.3k | 10U, // AE_MULASFD24_HH_LL |
4650 | 59.3k | 10U, // AE_MULASFD24_HH_LL_S2 |
4651 | 59.3k | 10U, // AE_MULASFD24_HL_LH |
4652 | 59.3k | 10U, // AE_MULASFD24_HL_LH_S2 |
4653 | 59.3k | 10U, // AE_MULASFD32X16_H1_L0 |
4654 | 59.3k | 10U, // AE_MULASFD32X16_H1_L0_S2 |
4655 | 59.3k | 10U, // AE_MULASFD32X16_H3_L2 |
4656 | 59.3k | 10U, // AE_MULASFD32X16_H3_L2_S2 |
4657 | 59.3k | 8U, // AE_MULC24 |
4658 | 59.3k | 8U, // AE_MULC32X16_H |
4659 | 59.3k | 8U, // AE_MULC32X16_L |
4660 | 59.3k | 8U, // AE_MULF16SS_00 |
4661 | 59.3k | 8U, // AE_MULF16SS_00_S2 |
4662 | 59.3k | 8U, // AE_MULF16SS_10 |
4663 | 59.3k | 8U, // AE_MULF16SS_11 |
4664 | 59.3k | 8U, // AE_MULF16SS_20 |
4665 | 59.3k | 8U, // AE_MULF16SS_21 |
4666 | 59.3k | 8U, // AE_MULF16SS_22 |
4667 | 59.3k | 8U, // AE_MULF16SS_30 |
4668 | 59.3k | 8U, // AE_MULF16SS_31 |
4669 | 59.3k | 8U, // AE_MULF16SS_32 |
4670 | 59.3k | 8U, // AE_MULF16SS_33 |
4671 | 59.3k | 0U, // AE_MULF16X4SS |
4672 | 59.3k | 8U, // AE_MULF32R_HH |
4673 | 59.3k | 8U, // AE_MULF32R_LH |
4674 | 59.3k | 8U, // AE_MULF32R_LL |
4675 | 59.3k | 8U, // AE_MULF32R_LL_S2 |
4676 | 59.3k | 8U, // AE_MULF32S_HH |
4677 | 59.3k | 8U, // AE_MULF32S_LH |
4678 | 59.3k | 8U, // AE_MULF32S_LL |
4679 | 59.3k | 8U, // AE_MULF32S_LL_S2 |
4680 | 59.3k | 8U, // AE_MULF32X16_H0 |
4681 | 59.3k | 8U, // AE_MULF32X16_H0_S2 |
4682 | 59.3k | 8U, // AE_MULF32X16_H1 |
4683 | 59.3k | 8U, // AE_MULF32X16_H1_S2 |
4684 | 59.3k | 8U, // AE_MULF32X16_H2 |
4685 | 59.3k | 8U, // AE_MULF32X16_H2_S2 |
4686 | 59.3k | 8U, // AE_MULF32X16_H3 |
4687 | 59.3k | 8U, // AE_MULF32X16_H3_S2 |
4688 | 59.3k | 8U, // AE_MULF32X16_L0 |
4689 | 59.3k | 8U, // AE_MULF32X16_L0_S2 |
4690 | 59.3k | 8U, // AE_MULF32X16_L1 |
4691 | 59.3k | 8U, // AE_MULF32X16_L1_S2 |
4692 | 59.3k | 8U, // AE_MULF32X16_L2 |
4693 | 59.3k | 8U, // AE_MULF32X16_L2_S2 |
4694 | 59.3k | 8U, // AE_MULF32X16_L3 |
4695 | 59.3k | 8U, // AE_MULF32X16_L3_S2 |
4696 | 59.3k | 8U, // AE_MULF48Q32SP16S_L |
4697 | 59.3k | 8U, // AE_MULF48Q32SP16S_L_S2 |
4698 | 59.3k | 8U, // AE_MULF48Q32SP16U_L |
4699 | 59.3k | 8U, // AE_MULF48Q32SP16U_L_S2 |
4700 | 59.3k | 8U, // AE_MULFC24RA |
4701 | 59.3k | 8U, // AE_MULFC32X16RAS_H |
4702 | 59.3k | 8U, // AE_MULFC32X16RAS_L |
4703 | 59.3k | 35840U, // AE_MULFD24X2_FIR_H |
4704 | 59.3k | 35840U, // AE_MULFD24X2_FIR_L |
4705 | 59.3k | 35840U, // AE_MULFD32X16X2_FIR_HH |
4706 | 59.3k | 35840U, // AE_MULFD32X16X2_FIR_HL |
4707 | 59.3k | 35840U, // AE_MULFD32X16X2_FIR_LH |
4708 | 59.3k | 35840U, // AE_MULFD32X16X2_FIR_LL |
4709 | 59.3k | 8U, // AE_MULFP16X4RAS |
4710 | 59.3k | 8U, // AE_MULFP16X4S |
4711 | 59.3k | 8U, // AE_MULFP24X2R |
4712 | 59.3k | 8U, // AE_MULFP24X2RA |
4713 | 59.3k | 8U, // AE_MULFP24X2RA_S2 |
4714 | 59.3k | 8U, // AE_MULFP24X2R_S2 |
4715 | 59.3k | 8U, // AE_MULFP32X16X2RAS_H |
4716 | 59.3k | 8U, // AE_MULFP32X16X2RAS_H_S2 |
4717 | 59.3k | 8U, // AE_MULFP32X16X2RAS_L |
4718 | 59.3k | 8U, // AE_MULFP32X16X2RAS_L_S2 |
4719 | 59.3k | 8U, // AE_MULFP32X16X2RS_H |
4720 | 59.3k | 8U, // AE_MULFP32X16X2RS_H_S2 |
4721 | 59.3k | 8U, // AE_MULFP32X16X2RS_L |
4722 | 59.3k | 8U, // AE_MULFP32X16X2RS_L_S2 |
4723 | 59.3k | 8U, // AE_MULFP32X2RAS |
4724 | 59.3k | 8U, // AE_MULFP32X2RS |
4725 | 59.3k | 8U, // AE_MULFQ32SP24S_H_S2 |
4726 | 59.3k | 8U, // AE_MULFQ32SP24S_L_S2 |
4727 | 59.3k | 8U, // AE_MULP24X2 |
4728 | 59.3k | 8U, // AE_MULP24X2_S2 |
4729 | 59.3k | 8U, // AE_MULP32X16X2_H |
4730 | 59.3k | 8U, // AE_MULP32X16X2_L |
4731 | 59.3k | 8U, // AE_MULP32X2 |
4732 | 59.3k | 8U, // AE_MULQ32SP16S_L_S2 |
4733 | 59.3k | 8U, // AE_MULQ32SP16U_L_S2 |
4734 | 59.3k | 8U, // AE_MULRFQ32SP24S_H_S2 |
4735 | 59.3k | 8U, // AE_MULRFQ32SP24S_L_S2 |
4736 | 59.3k | 11U, // AE_MULS16X4 |
4737 | 59.3k | 8U, // AE_MULS32F48P16S_HH |
4738 | 59.3k | 8U, // AE_MULS32F48P16S_HH_S2 |
4739 | 59.3k | 8U, // AE_MULS32F48P16S_LH |
4740 | 59.3k | 8U, // AE_MULS32F48P16S_LH_S2 |
4741 | 59.3k | 8U, // AE_MULS32F48P16S_LL |
4742 | 59.3k | 8U, // AE_MULS32F48P16S_LL_S2 |
4743 | 59.3k | 10U, // AE_MULS32U_LL |
4744 | 59.3k | 10U, // AE_MULS32X16_H0 |
4745 | 59.3k | 10U, // AE_MULS32X16_H0_S2 |
4746 | 59.3k | 10U, // AE_MULS32X16_H1 |
4747 | 59.3k | 10U, // AE_MULS32X16_H1_S2 |
4748 | 59.3k | 10U, // AE_MULS32X16_H2 |
4749 | 59.3k | 10U, // AE_MULS32X16_H2_S2 |
4750 | 59.3k | 10U, // AE_MULS32X16_H3 |
4751 | 59.3k | 10U, // AE_MULS32X16_H3_S2 |
4752 | 59.3k | 10U, // AE_MULS32X16_L0 |
4753 | 59.3k | 10U, // AE_MULS32X16_L0_S2 |
4754 | 59.3k | 10U, // AE_MULS32X16_L1 |
4755 | 59.3k | 10U, // AE_MULS32X16_L1_S2 |
4756 | 59.3k | 10U, // AE_MULS32X16_L2 |
4757 | 59.3k | 10U, // AE_MULS32X16_L2_S2 |
4758 | 59.3k | 10U, // AE_MULS32X16_L3 |
4759 | 59.3k | 10U, // AE_MULS32X16_L3_S2 |
4760 | 59.3k | 10U, // AE_MULS32_HH |
4761 | 59.3k | 10U, // AE_MULS32_LH |
4762 | 59.3k | 10U, // AE_MULS32_LL |
4763 | 59.3k | 10U, // AE_MULSAD24_HH_LL |
4764 | 59.3k | 10U, // AE_MULSAD24_HH_LL_S2 |
4765 | 59.3k | 10U, // AE_MULSAD32X16_H1_L0 |
4766 | 59.3k | 10U, // AE_MULSAD32X16_H1_L0_S2 |
4767 | 59.3k | 10U, // AE_MULSAD32X16_H3_L2 |
4768 | 59.3k | 10U, // AE_MULSAD32X16_H3_L2_S2 |
4769 | 59.3k | 10U, // AE_MULSAFD24_HH_LL |
4770 | 59.3k | 10U, // AE_MULSAFD24_HH_LL_S2 |
4771 | 59.3k | 10U, // AE_MULSAFD32X16_H1_L0 |
4772 | 59.3k | 10U, // AE_MULSAFD32X16_H1_L0_S2 |
4773 | 59.3k | 10U, // AE_MULSAFD32X16_H3_L2 |
4774 | 59.3k | 10U, // AE_MULSAFD32X16_H3_L2_S2 |
4775 | 59.3k | 10U, // AE_MULSF16SS_00 |
4776 | 59.3k | 10U, // AE_MULSF16SS_00_S2 |
4777 | 59.3k | 10U, // AE_MULSF16SS_10 |
4778 | 59.3k | 10U, // AE_MULSF16SS_11 |
4779 | 59.3k | 10U, // AE_MULSF16SS_20 |
4780 | 59.3k | 10U, // AE_MULSF16SS_21 |
4781 | 59.3k | 10U, // AE_MULSF16SS_22 |
4782 | 59.3k | 10U, // AE_MULSF16SS_30 |
4783 | 59.3k | 10U, // AE_MULSF16SS_31 |
4784 | 59.3k | 10U, // AE_MULSF16SS_32 |
4785 | 59.3k | 10U, // AE_MULSF16SS_33 |
4786 | 59.3k | 11U, // AE_MULSF16X4SS |
4787 | 59.3k | 10U, // AE_MULSF32R_HH |
4788 | 59.3k | 10U, // AE_MULSF32R_LH |
4789 | 59.3k | 10U, // AE_MULSF32R_LL |
4790 | 59.3k | 10U, // AE_MULSF32R_LL_S2 |
4791 | 59.3k | 10U, // AE_MULSF32S_HH |
4792 | 59.3k | 10U, // AE_MULSF32S_LH |
4793 | 59.3k | 10U, // AE_MULSF32S_LL |
4794 | 59.3k | 10U, // AE_MULSF32X16_H0 |
4795 | 59.3k | 10U, // AE_MULSF32X16_H0_S2 |
4796 | 59.3k | 10U, // AE_MULSF32X16_H1 |
4797 | 59.3k | 10U, // AE_MULSF32X16_H1_S2 |
4798 | 59.3k | 10U, // AE_MULSF32X16_H2 |
4799 | 59.3k | 10U, // AE_MULSF32X16_H2_S2 |
4800 | 59.3k | 10U, // AE_MULSF32X16_H3 |
4801 | 59.3k | 10U, // AE_MULSF32X16_H3_S2 |
4802 | 59.3k | 10U, // AE_MULSF32X16_L0 |
4803 | 59.3k | 10U, // AE_MULSF32X16_L0_S2 |
4804 | 59.3k | 10U, // AE_MULSF32X16_L1 |
4805 | 59.3k | 10U, // AE_MULSF32X16_L1_S2 |
4806 | 59.3k | 10U, // AE_MULSF32X16_L2 |
4807 | 59.3k | 10U, // AE_MULSF32X16_L2_S2 |
4808 | 59.3k | 10U, // AE_MULSF32X16_L3 |
4809 | 59.3k | 10U, // AE_MULSF32X16_L3_S2 |
4810 | 59.3k | 10U, // AE_MULSF48Q32SP16S_L |
4811 | 59.3k | 10U, // AE_MULSF48Q32SP16S_L_S2 |
4812 | 59.3k | 10U, // AE_MULSF48Q32SP16U_L |
4813 | 59.3k | 10U, // AE_MULSF48Q32SP16U_L_S2 |
4814 | 59.3k | 10U, // AE_MULSFP24X2R |
4815 | 59.3k | 10U, // AE_MULSFP24X2RA |
4816 | 59.3k | 10U, // AE_MULSFP24X2RA_S2 |
4817 | 59.3k | 10U, // AE_MULSFP24X2R_S2 |
4818 | 59.3k | 10U, // AE_MULSFP32X16X2RAS_H |
4819 | 59.3k | 10U, // AE_MULSFP32X16X2RAS_H_S2 |
4820 | 59.3k | 10U, // AE_MULSFP32X16X2RAS_L |
4821 | 59.3k | 10U, // AE_MULSFP32X16X2RAS_L_S2 |
4822 | 59.3k | 10U, // AE_MULSFP32X16X2RS_H |
4823 | 59.3k | 10U, // AE_MULSFP32X16X2RS_H_S2 |
4824 | 59.3k | 10U, // AE_MULSFP32X16X2RS_L |
4825 | 59.3k | 10U, // AE_MULSFP32X16X2RS_L_S2 |
4826 | 59.3k | 10U, // AE_MULSFP32X2RAS |
4827 | 59.3k | 10U, // AE_MULSFP32X2RS |
4828 | 59.3k | 10U, // AE_MULSFQ32SP24S_H_S2 |
4829 | 59.3k | 10U, // AE_MULSFQ32SP24S_L_S2 |
4830 | 59.3k | 10U, // AE_MULSP24X2 |
4831 | 59.3k | 10U, // AE_MULSP24X2_S2 |
4832 | 59.3k | 10U, // AE_MULSP32X16X2_H |
4833 | 59.3k | 10U, // AE_MULSP32X16X2_L |
4834 | 59.3k | 10U, // AE_MULSP32X2 |
4835 | 59.3k | 10U, // AE_MULSQ32SP16S_L_S2 |
4836 | 59.3k | 10U, // AE_MULSQ32SP16U_L_S2 |
4837 | 59.3k | 10U, // AE_MULSRFQ32SP24S_H_S2 |
4838 | 59.3k | 10U, // AE_MULSRFQ32SP24S_L_S2 |
4839 | 59.3k | 10U, // AE_MULSS32F48P16S_HH |
4840 | 59.3k | 10U, // AE_MULSS32F48P16S_HH_S2 |
4841 | 59.3k | 10U, // AE_MULSS32F48P16S_LH |
4842 | 59.3k | 10U, // AE_MULSS32F48P16S_LH_S2 |
4843 | 59.3k | 10U, // AE_MULSS32F48P16S_LL |
4844 | 59.3k | 10U, // AE_MULSS32F48P16S_LL_S2 |
4845 | 59.3k | 10U, // AE_MULSSD24_HH_LL |
4846 | 59.3k | 10U, // AE_MULSSD24_HH_LL_S2 |
4847 | 59.3k | 10U, // AE_MULSSD24_HL_LH |
4848 | 59.3k | 10U, // AE_MULSSD24_HL_LH_S2 |
4849 | 59.3k | 10U, // AE_MULSSD32X16_H1_L0 |
4850 | 59.3k | 10U, // AE_MULSSD32X16_H1_L0_S2 |
4851 | 59.3k | 10U, // AE_MULSSD32X16_H3_L2 |
4852 | 59.3k | 10U, // AE_MULSSD32X16_H3_L2_S2 |
4853 | 59.3k | 10U, // AE_MULSSFD16SS_11_00 |
4854 | 59.3k | 10U, // AE_MULSSFD16SS_11_00_S2 |
4855 | 59.3k | 10U, // AE_MULSSFD16SS_13_02 |
4856 | 59.3k | 10U, // AE_MULSSFD16SS_13_02_S2 |
4857 | 59.3k | 10U, // AE_MULSSFD16SS_33_22 |
4858 | 59.3k | 10U, // AE_MULSSFD16SS_33_22_S2 |
4859 | 59.3k | 10U, // AE_MULSSFD24_HH_LL |
4860 | 59.3k | 10U, // AE_MULSSFD24_HH_LL_S2 |
4861 | 59.3k | 10U, // AE_MULSSFD24_HL_LH |
4862 | 59.3k | 10U, // AE_MULSSFD24_HL_LH_S2 |
4863 | 59.3k | 10U, // AE_MULSSFD32X16_H1_L0 |
4864 | 59.3k | 10U, // AE_MULSSFD32X16_H1_L0_S2 |
4865 | 59.3k | 10U, // AE_MULSSFD32X16_H3_L2 |
4866 | 59.3k | 10U, // AE_MULSSFD32X16_H3_L2_S2 |
4867 | 59.3k | 8U, // AE_MULZAAD24_HH_LL |
4868 | 59.3k | 8U, // AE_MULZAAD24_HH_LL_S2 |
4869 | 59.3k | 8U, // AE_MULZAAD24_HL_LH |
4870 | 59.3k | 8U, // AE_MULZAAD24_HL_LH_S2 |
4871 | 59.3k | 8U, // AE_MULZAAD32X16_H0_L1 |
4872 | 59.3k | 8U, // AE_MULZAAD32X16_H0_L1_S2 |
4873 | 59.3k | 8U, // AE_MULZAAD32X16_H1_L0 |
4874 | 59.3k | 8U, // AE_MULZAAD32X16_H1_L0_S2 |
4875 | 59.3k | 8U, // AE_MULZAAD32X16_H2_L3 |
4876 | 59.3k | 8U, // AE_MULZAAD32X16_H2_L3_S2 |
4877 | 59.3k | 8U, // AE_MULZAAD32X16_H3_L2 |
4878 | 59.3k | 8U, // AE_MULZAAD32X16_H3_L2_S2 |
4879 | 59.3k | 8U, // AE_MULZAAFD16SS_11_00 |
4880 | 59.3k | 8U, // AE_MULZAAFD16SS_11_00_S2 |
4881 | 59.3k | 8U, // AE_MULZAAFD16SS_13_02 |
4882 | 59.3k | 8U, // AE_MULZAAFD16SS_13_02_S2 |
4883 | 59.3k | 8U, // AE_MULZAAFD16SS_33_22 |
4884 | 59.3k | 8U, // AE_MULZAAFD16SS_33_22_S2 |
4885 | 59.3k | 8U, // AE_MULZAAFD24_HH_LL |
4886 | 59.3k | 8U, // AE_MULZAAFD24_HH_LL_S2 |
4887 | 59.3k | 8U, // AE_MULZAAFD24_HL_LH |
4888 | 59.3k | 8U, // AE_MULZAAFD24_HL_LH_S2 |
4889 | 59.3k | 8U, // AE_MULZAAFD32X16_H0_L1 |
4890 | 59.3k | 8U, // AE_MULZAAFD32X16_H0_L1_S2 |
4891 | 59.3k | 8U, // AE_MULZAAFD32X16_H1_L0 |
4892 | 59.3k | 8U, // AE_MULZAAFD32X16_H1_L0_S2 |
4893 | 59.3k | 8U, // AE_MULZAAFD32X16_H2_L3 |
4894 | 59.3k | 8U, // AE_MULZAAFD32X16_H2_L3_S2 |
4895 | 59.3k | 8U, // AE_MULZAAFD32X16_H3_L2 |
4896 | 59.3k | 8U, // AE_MULZAAFD32X16_H3_L2_S2 |
4897 | 59.3k | 8U, // AE_MULZASD24_HH_LL |
4898 | 59.3k | 8U, // AE_MULZASD24_HH_LL_S2 |
4899 | 59.3k | 8U, // AE_MULZASD24_HL_LH |
4900 | 59.3k | 8U, // AE_MULZASD24_HL_LH_S2 |
4901 | 59.3k | 8U, // AE_MULZASD32X16_H1_L0 |
4902 | 59.3k | 8U, // AE_MULZASD32X16_H1_L0_S2 |
4903 | 59.3k | 8U, // AE_MULZASD32X16_H3_L2 |
4904 | 59.3k | 8U, // AE_MULZASD32X16_H3_L2_S2 |
4905 | 59.3k | 8U, // AE_MULZASFD24_HH_LL |
4906 | 59.3k | 8U, // AE_MULZASFD24_HH_LL_S2 |
4907 | 59.3k | 8U, // AE_MULZASFD24_HL_LH |
4908 | 59.3k | 8U, // AE_MULZASFD24_HL_LH_S2 |
4909 | 59.3k | 8U, // AE_MULZASFD32X16_H1_L0 |
4910 | 59.3k | 8U, // AE_MULZASFD32X16_H1_L0_S2 |
4911 | 59.3k | 8U, // AE_MULZASFD32X16_H3_L2 |
4912 | 59.3k | 8U, // AE_MULZASFD32X16_H3_L2_S2 |
4913 | 59.3k | 8U, // AE_MULZSAD24_HH_LL |
4914 | 59.3k | 8U, // AE_MULZSAD24_HH_LL_S2 |
4915 | 59.3k | 8U, // AE_MULZSAD32X16_H1_L0 |
4916 | 59.3k | 8U, // AE_MULZSAD32X16_H1_L0_S2 |
4917 | 59.3k | 8U, // AE_MULZSAD32X16_H3_L2 |
4918 | 59.3k | 8U, // AE_MULZSAD32X16_H3_L2_S2 |
4919 | 59.3k | 8U, // AE_MULZSAFD24_HH_LL |
4920 | 59.3k | 8U, // AE_MULZSAFD24_HH_LL_S2 |
4921 | 59.3k | 8U, // AE_MULZSAFD32X16_H1_L0 |
4922 | 59.3k | 8U, // AE_MULZSAFD32X16_H1_L0_S2 |
4923 | 59.3k | 8U, // AE_MULZSAFD32X16_H3_L2 |
4924 | 59.3k | 8U, // AE_MULZSAFD32X16_H3_L2_S2 |
4925 | 59.3k | 8U, // AE_MULZSSD24_HH_LL |
4926 | 59.3k | 8U, // AE_MULZSSD24_HH_LL_S2 |
4927 | 59.3k | 8U, // AE_MULZSSD24_HL_LH |
4928 | 59.3k | 8U, // AE_MULZSSD24_HL_LH_S2 |
4929 | 59.3k | 8U, // AE_MULZSSD32X16_H1_L0 |
4930 | 59.3k | 8U, // AE_MULZSSD32X16_H1_L0_S2 |
4931 | 59.3k | 8U, // AE_MULZSSD32X16_H3_L2 |
4932 | 59.3k | 8U, // AE_MULZSSD32X16_H3_L2_S2 |
4933 | 59.3k | 8U, // AE_MULZSSFD16SS_11_00 |
4934 | 59.3k | 8U, // AE_MULZSSFD16SS_11_00_S2 |
4935 | 59.3k | 8U, // AE_MULZSSFD16SS_13_02 |
4936 | 59.3k | 8U, // AE_MULZSSFD16SS_13_02_S2 |
4937 | 59.3k | 8U, // AE_MULZSSFD16SS_33_22 |
4938 | 59.3k | 8U, // AE_MULZSSFD16SS_33_22_S2 |
4939 | 59.3k | 8U, // AE_MULZSSFD24_HH_LL |
4940 | 59.3k | 8U, // AE_MULZSSFD24_HH_LL_S2 |
4941 | 59.3k | 8U, // AE_MULZSSFD24_HL_LH |
4942 | 59.3k | 8U, // AE_MULZSSFD24_HL_LH_S2 |
4943 | 59.3k | 8U, // AE_MULZSSFD32X16_H1_L0 |
4944 | 59.3k | 8U, // AE_MULZSSFD32X16_H1_L0_S2 |
4945 | 59.3k | 8U, // AE_MULZSSFD32X16_H3_L2 |
4946 | 59.3k | 8U, // AE_MULZSSFD32X16_H3_L2_S2 |
4947 | 59.3k | 8U, // AE_NAND |
4948 | 59.3k | 0U, // AE_NEG16S |
4949 | 59.3k | 0U, // AE_NEG24S |
4950 | 59.3k | 0U, // AE_NEG32 |
4951 | 59.3k | 0U, // AE_NEG32S |
4952 | 59.3k | 0U, // AE_NEG64 |
4953 | 59.3k | 0U, // AE_NEG64S |
4954 | 59.3k | 0U, // AE_NSA64 |
4955 | 59.3k | 0U, // AE_NSAZ16_0 |
4956 | 59.3k | 0U, // AE_NSAZ32_L |
4957 | 59.3k | 8U, // AE_OR |
4958 | 59.3k | 3U, // AE_PKSR24 |
4959 | 59.3k | 3U, // AE_PKSR32 |
4960 | 59.3k | 8U, // AE_ROUND16X4F32SASYM |
4961 | 59.3k | 8U, // AE_ROUND16X4F32SSYM |
4962 | 59.3k | 8U, // AE_ROUND24X2F48SASYM |
4963 | 59.3k | 8U, // AE_ROUND24X2F48SSYM |
4964 | 59.3k | 8U, // AE_ROUND32X2F48SASYM |
4965 | 59.3k | 8U, // AE_ROUND32X2F48SSYM |
4966 | 59.3k | 8U, // AE_ROUND32X2F64SASYM |
4967 | 59.3k | 8U, // AE_ROUND32X2F64SSYM |
4968 | 59.3k | 0U, // AE_ROUNDSP16F24ASYM |
4969 | 59.3k | 0U, // AE_ROUNDSP16F24SYM |
4970 | 59.3k | 8U, // AE_ROUNDSP16Q48X2ASYM |
4971 | 59.3k | 8U, // AE_ROUNDSP16Q48X2SYM |
4972 | 59.3k | 0U, // AE_ROUNDSQ32F48ASYM |
4973 | 59.3k | 0U, // AE_ROUNDSQ32F48SYM |
4974 | 59.3k | 1U, // AE_S16M_L_I |
4975 | 59.3k | 1U, // AE_S16M_L_IU |
4976 | 59.3k | 8U, // AE_S16M_L_X |
4977 | 59.3k | 10U, // AE_S16M_L_XC |
4978 | 59.3k | 10U, // AE_S16M_L_XU |
4979 | 59.3k | 2U, // AE_S16X2M_I |
4980 | 59.3k | 2U, // AE_S16X2M_IU |
4981 | 59.3k | 8U, // AE_S16X2M_X |
4982 | 59.3k | 10U, // AE_S16X2M_XC |
4983 | 59.3k | 10U, // AE_S16X2M_XU |
4984 | 59.3k | 2U, // AE_S16X4_I |
4985 | 59.3k | 2U, // AE_S16X4_IP |
4986 | 59.3k | 0U, // AE_S16X4_RIC |
4987 | 59.3k | 0U, // AE_S16X4_RIP |
4988 | 59.3k | 8U, // AE_S16X4_X |
4989 | 59.3k | 10U, // AE_S16X4_XC |
4990 | 59.3k | 10U, // AE_S16X4_XP |
4991 | 59.3k | 1U, // AE_S16_0_I |
4992 | 59.3k | 1U, // AE_S16_0_IP |
4993 | 59.3k | 8U, // AE_S16_0_X |
4994 | 59.3k | 10U, // AE_S16_0_XC |
4995 | 59.3k | 10U, // AE_S16_0_XP |
4996 | 59.3k | 2U, // AE_S24RA64S_I |
4997 | 59.3k | 2U, // AE_S24RA64S_IP |
4998 | 59.3k | 8U, // AE_S24RA64S_X |
4999 | 59.3k | 10U, // AE_S24RA64S_XC |
5000 | 59.3k | 10U, // AE_S24RA64S_XP |
5001 | 59.3k | 10U, // AE_S24X2RA64S_IP |
5002 | 59.3k | 2U, // AE_S32F24_L_I |
5003 | 59.3k | 2U, // AE_S32F24_L_IP |
5004 | 59.3k | 8U, // AE_S32F24_L_X |
5005 | 59.3k | 10U, // AE_S32F24_L_XC |
5006 | 59.3k | 10U, // AE_S32F24_L_XP |
5007 | 59.3k | 2U, // AE_S32M_I |
5008 | 59.3k | 2U, // AE_S32M_IU |
5009 | 59.3k | 8U, // AE_S32M_X |
5010 | 59.3k | 10U, // AE_S32M_XC |
5011 | 59.3k | 10U, // AE_S32M_XU |
5012 | 59.3k | 2U, // AE_S32RA64S_I |
5013 | 59.3k | 2U, // AE_S32RA64S_IP |
5014 | 59.3k | 8U, // AE_S32RA64S_X |
5015 | 59.3k | 10U, // AE_S32RA64S_XC |
5016 | 59.3k | 10U, // AE_S32RA64S_XP |
5017 | 59.3k | 2U, // AE_S32X2F24_I |
5018 | 59.3k | 2U, // AE_S32X2F24_IP |
5019 | 59.3k | 0U, // AE_S32X2F24_RIC |
5020 | 59.3k | 0U, // AE_S32X2F24_RIP |
5021 | 59.3k | 8U, // AE_S32X2F24_X |
5022 | 59.3k | 10U, // AE_S32X2F24_XC |
5023 | 59.3k | 10U, // AE_S32X2F24_XP |
5024 | 59.3k | 10U, // AE_S32X2RA64S_IP |
5025 | 59.3k | 2U, // AE_S32X2_I |
5026 | 59.3k | 2U, // AE_S32X2_IP |
5027 | 59.3k | 0U, // AE_S32X2_RIC |
5028 | 59.3k | 0U, // AE_S32X2_RIP |
5029 | 59.3k | 8U, // AE_S32X2_X |
5030 | 59.3k | 10U, // AE_S32X2_XC |
5031 | 59.3k | 10U, // AE_S32X2_XP |
5032 | 59.3k | 2U, // AE_S32_L_I |
5033 | 59.3k | 2U, // AE_S32_L_IP |
5034 | 59.3k | 8U, // AE_S32_L_X |
5035 | 59.3k | 10U, // AE_S32_L_XC |
5036 | 59.3k | 10U, // AE_S32_L_XP |
5037 | 59.3k | 2U, // AE_S64_I |
5038 | 59.3k | 2U, // AE_S64_IP |
5039 | 59.3k | 8U, // AE_S64_X |
5040 | 59.3k | 10U, // AE_S64_XC |
5041 | 59.3k | 10U, // AE_S64_XP |
5042 | 59.3k | 0U, // AE_SA16X4_IC |
5043 | 59.3k | 0U, // AE_SA16X4_IP |
5044 | 59.3k | 0U, // AE_SA16X4_RIC |
5045 | 59.3k | 0U, // AE_SA16X4_RIP |
5046 | 59.3k | 0U, // AE_SA24X2_IC |
5047 | 59.3k | 0U, // AE_SA24X2_IP |
5048 | 59.3k | 0U, // AE_SA24X2_RIC |
5049 | 59.3k | 0U, // AE_SA24X2_RIP |
5050 | 59.3k | 0U, // AE_SA24_L_IC |
5051 | 59.3k | 0U, // AE_SA24_L_IP |
5052 | 59.3k | 0U, // AE_SA24_L_RIC |
5053 | 59.3k | 0U, // AE_SA24_L_RIP |
5054 | 59.3k | 0U, // AE_SA32X2F24_IC |
5055 | 59.3k | 0U, // AE_SA32X2F24_IP |
5056 | 59.3k | 0U, // AE_SA32X2F24_RIC |
5057 | 59.3k | 0U, // AE_SA32X2F24_RIP |
5058 | 59.3k | 0U, // AE_SA32X2_IC |
5059 | 59.3k | 0U, // AE_SA32X2_IP |
5060 | 59.3k | 0U, // AE_SA32X2_RIC |
5061 | 59.3k | 0U, // AE_SA32X2_RIP |
5062 | 59.3k | 0U, // AE_SA64NEG_FP |
5063 | 59.3k | 0U, // AE_SA64POS_FP |
5064 | 59.3k | 2U, // AE_SALIGN64_I |
5065 | 59.3k | 8U, // AE_SAT16X4 |
5066 | 59.3k | 0U, // AE_SAT24S |
5067 | 59.3k | 0U, // AE_SAT48S |
5068 | 59.3k | 0U, // AE_SATQ56S |
5069 | 59.3k | 0U, // AE_SB |
5070 | 59.3k | 0U, // AE_SBF |
5071 | 59.3k | 0U, // AE_SBF_IC |
5072 | 59.3k | 0U, // AE_SBF_IP |
5073 | 59.3k | 3U, // AE_SBI |
5074 | 59.3k | 3U, // AE_SBI_IC |
5075 | 59.3k | 3U, // AE_SBI_IP |
5076 | 59.3k | 0U, // AE_SB_IC |
5077 | 59.3k | 0U, // AE_SB_IP |
5078 | 59.3k | 448U, // AE_SEL16I |
5079 | 59.3k | 512U, // AE_SEL16I_N |
5080 | 59.3k | 3U, // AE_SEXT32 |
5081 | 59.3k | 0U, // AE_SEXT32X2D16_10 |
5082 | 59.3k | 0U, // AE_SEXT32X2D16_32 |
5083 | 59.3k | 0U, // AE_SHA32 |
5084 | 59.3k | 0U, // AE_SHORTSWAP |
5085 | 59.3k | 8U, // AE_SLAA16S |
5086 | 59.3k | 8U, // AE_SLAA32 |
5087 | 59.3k | 8U, // AE_SLAA32S |
5088 | 59.3k | 8U, // AE_SLAA64 |
5089 | 59.3k | 8U, // AE_SLAA64S |
5090 | 59.3k | 8U, // AE_SLAAQ56 |
5091 | 59.3k | 3U, // AE_SLAI16S |
5092 | 59.3k | 11U, // AE_SLAI24 |
5093 | 59.3k | 11U, // AE_SLAI24S |
5094 | 59.3k | 11U, // AE_SLAI32 |
5095 | 59.3k | 11U, // AE_SLAI32S |
5096 | 59.3k | 3U, // AE_SLAI64 |
5097 | 59.3k | 3U, // AE_SLAI64S |
5098 | 59.3k | 3U, // AE_SLAISQ56S |
5099 | 59.3k | 0U, // AE_SLAS24 |
5100 | 59.3k | 0U, // AE_SLAS24S |
5101 | 59.3k | 0U, // AE_SLAS32 |
5102 | 59.3k | 0U, // AE_SLAS32S |
5103 | 59.3k | 0U, // AE_SLAS64 |
5104 | 59.3k | 0U, // AE_SLAS64S |
5105 | 59.3k | 0U, // AE_SLASQ56 |
5106 | 59.3k | 0U, // AE_SLASSQ56S |
5107 | 59.3k | 8U, // AE_SRA64_32 |
5108 | 59.3k | 8U, // AE_SRAA16RS |
5109 | 59.3k | 8U, // AE_SRAA16S |
5110 | 59.3k | 8U, // AE_SRAA32 |
5111 | 59.3k | 8U, // AE_SRAA32RS |
5112 | 59.3k | 8U, // AE_SRAA32S |
5113 | 59.3k | 8U, // AE_SRAA64 |
5114 | 59.3k | 3U, // AE_SRAI16 |
5115 | 59.3k | 3U, // AE_SRAI16R |
5116 | 59.3k | 11U, // AE_SRAI24 |
5117 | 59.3k | 11U, // AE_SRAI32 |
5118 | 59.3k | 11U, // AE_SRAI32R |
5119 | 59.3k | 3U, // AE_SRAI64 |
5120 | 59.3k | 0U, // AE_SRAS24 |
5121 | 59.3k | 0U, // AE_SRAS32 |
5122 | 59.3k | 0U, // AE_SRAS64 |
5123 | 59.3k | 8U, // AE_SRLA32 |
5124 | 59.3k | 8U, // AE_SRLA64 |
5125 | 59.3k | 11U, // AE_SRLI24 |
5126 | 59.3k | 11U, // AE_SRLI32 |
5127 | 59.3k | 3U, // AE_SRLI64 |
5128 | 59.3k | 0U, // AE_SRLS24 |
5129 | 59.3k | 0U, // AE_SRLS32 |
5130 | 59.3k | 0U, // AE_SRLS64 |
5131 | 59.3k | 8U, // AE_SUB16 |
5132 | 59.3k | 8U, // AE_SUB16S |
5133 | 59.3k | 8U, // AE_SUB24S |
5134 | 59.3k | 8U, // AE_SUB32 |
5135 | 59.3k | 8U, // AE_SUB32S |
5136 | 59.3k | 8U, // AE_SUB64 |
5137 | 59.3k | 8U, // AE_SUB64S |
5138 | 59.3k | 8U, // AE_SUBADD32 |
5139 | 59.3k | 8U, // AE_SUBADD32S |
5140 | 59.3k | 0U, // AE_TRUNCA32F64S_L |
5141 | 59.3k | 0U, // AE_TRUNCA32X2F64S |
5142 | 59.3k | 448U, // AE_TRUNCI32F64S_L |
5143 | 59.3k | 448U, // AE_TRUNCI32X2F64S |
5144 | 59.3k | 0U, // AE_VLDL16C |
5145 | 59.3k | 0U, // AE_VLDL16C_IC |
5146 | 59.3k | 0U, // AE_VLDL16C_IP |
5147 | 59.3k | 8U, // AE_VLDL16T |
5148 | 59.3k | 8U, // AE_VLDL32T |
5149 | 59.3k | 0U, // AE_VLDSHT |
5150 | 59.3k | 10U, // AE_VLEL16T |
5151 | 59.3k | 10U, // AE_VLEL32T |
5152 | 59.3k | 0U, // AE_VLES16C |
5153 | 59.3k | 0U, // AE_VLES16C_IC |
5154 | 59.3k | 0U, // AE_VLES16C_IP |
5155 | 59.3k | 8U, // AE_XOR |
5156 | 59.3k | 0U, // AE_ZALIGN64 |
5157 | 59.3k | 0U, // ALL4 |
5158 | 59.3k | 0U, // ALL8 |
5159 | 59.3k | 8U, // AND |
5160 | 59.3k | 8U, // ANDB |
5161 | 59.3k | 8U, // ANDBC |
5162 | 59.3k | 0U, // ANY4 |
5163 | 59.3k | 0U, // ANY8 |
5164 | 59.3k | 3U, // BALL |
5165 | 59.3k | 3U, // BANY |
5166 | 59.3k | 3U, // BBC |
5167 | 59.3k | 0U, // BBCI |
5168 | 59.3k | 3U, // BBS |
5169 | 59.3k | 0U, // BBSI |
5170 | 59.3k | 3U, // BEQ |
5171 | 59.3k | 0U, // BEQI |
5172 | 59.3k | 0U, // BEQZ |
5173 | 59.3k | 0U, // BF |
5174 | 59.3k | 3U, // BGE |
5175 | 59.3k | 0U, // BGEI |
5176 | 59.3k | 3U, // BGEU |
5177 | 59.3k | 0U, // BGEUI |
5178 | 59.3k | 0U, // BGEZ |
5179 | 59.3k | 3U, // BLT |
5180 | 59.3k | 0U, // BLTI |
5181 | 59.3k | 3U, // BLTU |
5182 | 59.3k | 0U, // BLTUI |
5183 | 59.3k | 0U, // BLTZ |
5184 | 59.3k | 3U, // BNALL |
5185 | 59.3k | 3U, // BNE |
5186 | 59.3k | 0U, // BNEI |
5187 | 59.3k | 0U, // BNEZ |
5188 | 59.3k | 3U, // BNONE |
5189 | 59.3k | 0U, // BREAK |
5190 | 59.3k | 0U, // BREAK_N |
5191 | 59.3k | 0U, // BT |
5192 | 59.3k | 0U, // CALL0 |
5193 | 59.3k | 0U, // CALL12 |
5194 | 59.3k | 0U, // CALL4 |
5195 | 59.3k | 0U, // CALL8 |
5196 | 59.3k | 0U, // CALLX0 |
5197 | 59.3k | 0U, // CALLX12 |
5198 | 59.3k | 0U, // CALLX4 |
5199 | 59.3k | 0U, // CALLX8 |
5200 | 59.3k | 3U, // CEIL_S |
5201 | 59.3k | 3U, // CLAMPS |
5202 | 59.3k | 0U, // CLR_BIT_GPIO_OUT |
5203 | 59.3k | 0U, // CONST_S |
5204 | 59.3k | 0U, // DIV0_S |
5205 | 59.3k | 10U, // DIVN_S |
5206 | 59.3k | 0U, // DSYNC |
5207 | 59.3k | 8U, // EE_ANDQ |
5208 | 59.3k | 0U, // EE_BITREV |
5209 | 59.3k | 0U, // EE_CLR_BIT_GPIO_OUT |
5210 | 59.3k | 192U, // EE_CMUL_S16 |
5211 | 59.3k | 20U, // EE_CMUL_S16_LD_INCP |
5212 | 59.3k | 580U, // EE_CMUL_S16_ST_INCP |
5213 | 59.3k | 13312U, // EE_FFT_AMS_S16_LD_INCP |
5214 | 59.3k | 13312U, // EE_FFT_AMS_S16_LD_INCP_UAUP |
5215 | 59.3k | 13312U, // EE_FFT_AMS_S16_LD_R32_DECP |
5216 | 59.3k | 0U, // EE_FFT_AMS_S16_ST_INCP |
5217 | 59.3k | 28U, // EE_FFT_CMUL_S16_LD_XP |
5218 | 59.3k | 13954U, // EE_FFT_CMUL_S16_ST_XP |
5219 | 59.3k | 5120U, // EE_FFT_R2BF_S16 |
5220 | 59.3k | 16002U, // EE_FFT_R2BF_S16_ST_INCP |
5221 | 59.3k | 4U, // EE_FFT_VST_R32_DECP |
5222 | 59.3k | 0U, // EE_GET_GPIO_IN |
5223 | 59.3k | 13312U, // EE_LDF_128_IP |
5224 | 59.3k | 13312U, // EE_LDF_128_XP |
5225 | 59.3k | 706U, // EE_LDF_64_IP |
5226 | 59.3k | 642U, // EE_LDF_64_XP |
5227 | 59.3k | 0U, // EE_LDQA_S16_128_IP |
5228 | 59.3k | 0U, // EE_LDQA_S16_128_XP |
5229 | 59.3k | 0U, // EE_LDQA_S8_128_IP |
5230 | 59.3k | 0U, // EE_LDQA_S8_128_XP |
5231 | 59.3k | 0U, // EE_LDQA_U16_128_IP |
5232 | 59.3k | 0U, // EE_LDQA_U16_128_XP |
5233 | 59.3k | 0U, // EE_LDQA_U8_128_IP |
5234 | 59.3k | 0U, // EE_LDQA_U8_128_XP |
5235 | 59.3k | 9408U, // EE_LDXQ_32 |
5236 | 59.3k | 4U, // EE_LD_128_USAR_IP |
5237 | 59.3k | 10U, // EE_LD_128_USAR_XP |
5238 | 59.3k | 0U, // EE_LD_ACCX_IP |
5239 | 59.3k | 0U, // EE_LD_QACC_H_H_32_IP |
5240 | 59.3k | 0U, // EE_LD_QACC_H_L_128_IP |
5241 | 59.3k | 0U, // EE_LD_QACC_L_H_32_IP |
5242 | 59.3k | 0U, // EE_LD_QACC_L_L_128_IP |
5243 | 59.3k | 0U, // EE_LD_UA_STATE_IP |
5244 | 59.3k | 0U, // EE_MOVI_32_A |
5245 | 59.3k | 0U, // EE_MOVI_32_Q |
5246 | 59.3k | 0U, // EE_MOV_S16_QACC |
5247 | 59.3k | 0U, // EE_MOV_S8_QACC |
5248 | 59.3k | 0U, // EE_MOV_U16_QACC |
5249 | 59.3k | 0U, // EE_MOV_U8_QACC |
5250 | 59.3k | 0U, // EE_NOTQ |
5251 | 59.3k | 8U, // EE_ORQ |
5252 | 59.3k | 0U, // EE_SET_BIT_GPIO_OUT |
5253 | 59.3k | 0U, // EE_SLCI_2Q |
5254 | 59.3k | 0U, // EE_SLCXXP_2Q |
5255 | 59.3k | 0U, // EE_SRCI_2Q |
5256 | 59.3k | 0U, // EE_SRCMB_S16_QACC |
5257 | 59.3k | 0U, // EE_SRCMB_S8_QACC |
5258 | 59.3k | 10U, // EE_SRCQ_128_ST_INCP |
5259 | 59.3k | 0U, // EE_SRCXXP_2Q |
5260 | 59.3k | 8U, // EE_SRC_Q |
5261 | 59.3k | 0U, // EE_SRC_Q_LD_IP |
5262 | 59.3k | 804U, // EE_SRC_Q_LD_XP |
5263 | 59.3k | 10U, // EE_SRC_Q_QUP |
5264 | 59.3k | 0U, // EE_SRS_ACCX |
5265 | 59.3k | 13954U, // EE_STF_128_IP |
5266 | 59.3k | 13954U, // EE_STF_128_XP |
5267 | 59.3k | 706U, // EE_STF_64_IP |
5268 | 59.3k | 642U, // EE_STF_64_XP |
5269 | 59.3k | 9408U, // EE_STXQ_32 |
5270 | 59.3k | 0U, // EE_ST_ACCX_IP |
5271 | 59.3k | 0U, // EE_ST_QACC_H_H_32_IP |
5272 | 59.3k | 0U, // EE_ST_QACC_H_L_128_IP |
5273 | 59.3k | 0U, // EE_ST_QACC_L_H_32_IP |
5274 | 59.3k | 0U, // EE_ST_QACC_L_L_128_IP |
5275 | 59.3k | 0U, // EE_ST_UA_STATE_IP |
5276 | 59.3k | 8U, // EE_VADDS_S16 |
5277 | 59.3k | 2U, // EE_VADDS_S16_LD_INCP |
5278 | 59.3k | 12U, // EE_VADDS_S16_ST_INCP |
5279 | 59.3k | 8U, // EE_VADDS_S32 |
5280 | 59.3k | 2U, // EE_VADDS_S32_LD_INCP |
5281 | 59.3k | 12U, // EE_VADDS_S32_ST_INCP |
5282 | 59.3k | 8U, // EE_VADDS_S8 |
5283 | 59.3k | 2U, // EE_VADDS_S8_LD_INCP |
5284 | 59.3k | 12U, // EE_VADDS_S8_ST_INCP |
5285 | 59.3k | 8U, // EE_VCMP_EQ_S16 |
5286 | 59.3k | 8U, // EE_VCMP_EQ_S32 |
5287 | 59.3k | 8U, // EE_VCMP_EQ_S8 |
5288 | 59.3k | 8U, // EE_VCMP_GT_S16 |
5289 | 59.3k | 8U, // EE_VCMP_GT_S32 |
5290 | 59.3k | 8U, // EE_VCMP_GT_S8 |
5291 | 59.3k | 8U, // EE_VCMP_LT_S16 |
5292 | 59.3k | 8U, // EE_VCMP_LT_S32 |
5293 | 59.3k | 8U, // EE_VCMP_LT_S8 |
5294 | 59.3k | 0U, // EE_VLDBC_16 |
5295 | 59.3k | 4U, // EE_VLDBC_16_IP |
5296 | 59.3k | 10U, // EE_VLDBC_16_XP |
5297 | 59.3k | 0U, // EE_VLDBC_32 |
5298 | 59.3k | 4U, // EE_VLDBC_32_IP |
5299 | 59.3k | 10U, // EE_VLDBC_32_XP |
5300 | 59.3k | 0U, // EE_VLDBC_8 |
5301 | 59.3k | 4U, // EE_VLDBC_8_IP |
5302 | 59.3k | 10U, // EE_VLDBC_8_XP |
5303 | 59.3k | 10U, // EE_VLDHBC_16_INCP |
5304 | 59.3k | 4U, // EE_VLD_128_IP |
5305 | 59.3k | 10U, // EE_VLD_128_XP |
5306 | 59.3k | 4U, // EE_VLD_H_64_IP |
5307 | 59.3k | 10U, // EE_VLD_H_64_XP |
5308 | 59.3k | 4U, // EE_VLD_L_64_IP |
5309 | 59.3k | 10U, // EE_VLD_L_64_XP |
5310 | 59.3k | 8U, // EE_VMAX_S16 |
5311 | 59.3k | 2U, // EE_VMAX_S16_LD_INCP |
5312 | 59.3k | 12U, // EE_VMAX_S16_ST_INCP |
5313 | 59.3k | 8U, // EE_VMAX_S32 |
5314 | 59.3k | 2U, // EE_VMAX_S32_LD_INCP |
5315 | 59.3k | 12U, // EE_VMAX_S32_ST_INCP |
5316 | 59.3k | 8U, // EE_VMAX_S8 |
5317 | 59.3k | 2U, // EE_VMAX_S8_LD_INCP |
5318 | 59.3k | 12U, // EE_VMAX_S8_ST_INCP |
5319 | 59.3k | 8U, // EE_VMIN_S16 |
5320 | 59.3k | 2U, // EE_VMIN_S16_LD_INCP |
5321 | 59.3k | 12U, // EE_VMIN_S16_ST_INCP |
5322 | 59.3k | 8U, // EE_VMIN_S32 |
5323 | 59.3k | 2U, // EE_VMIN_S32_LD_INCP |
5324 | 59.3k | 12U, // EE_VMIN_S32_ST_INCP |
5325 | 59.3k | 8U, // EE_VMIN_S8 |
5326 | 59.3k | 2U, // EE_VMIN_S8_LD_INCP |
5327 | 59.3k | 12U, // EE_VMIN_S8_ST_INCP |
5328 | 59.3k | 0U, // EE_VMULAS_S16_ACCX |
5329 | 59.3k | 5U, // EE_VMULAS_S16_ACCX_LD_IP |
5330 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP |
5331 | 59.3k | 46722U, // EE_VMULAS_S16_ACCX_LD_XP |
5332 | 59.3k | 18276U, // EE_VMULAS_S16_ACCX_LD_XP_QUP |
5333 | 59.3k | 0U, // EE_VMULAS_S16_QACC |
5334 | 59.3k | 642U, // EE_VMULAS_S16_QACC_LDBC_INCP |
5335 | 59.3k | 868U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP |
5336 | 59.3k | 5U, // EE_VMULAS_S16_QACC_LD_IP |
5337 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_IP_QUP |
5338 | 59.3k | 46722U, // EE_VMULAS_S16_QACC_LD_XP |
5339 | 59.3k | 18276U, // EE_VMULAS_S16_QACC_LD_XP_QUP |
5340 | 59.3k | 0U, // EE_VMULAS_S8_ACCX |
5341 | 59.3k | 5U, // EE_VMULAS_S8_ACCX_LD_IP |
5342 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP |
5343 | 59.3k | 46722U, // EE_VMULAS_S8_ACCX_LD_XP |
5344 | 59.3k | 18276U, // EE_VMULAS_S8_ACCX_LD_XP_QUP |
5345 | 59.3k | 0U, // EE_VMULAS_S8_QACC |
5346 | 59.3k | 642U, // EE_VMULAS_S8_QACC_LDBC_INCP |
5347 | 59.3k | 868U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP |
5348 | 59.3k | 5U, // EE_VMULAS_S8_QACC_LD_IP |
5349 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_IP_QUP |
5350 | 59.3k | 46722U, // EE_VMULAS_S8_QACC_LD_XP |
5351 | 59.3k | 18276U, // EE_VMULAS_S8_QACC_LD_XP_QUP |
5352 | 59.3k | 0U, // EE_VMULAS_U16_ACCX |
5353 | 59.3k | 5U, // EE_VMULAS_U16_ACCX_LD_IP |
5354 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP |
5355 | 59.3k | 46722U, // EE_VMULAS_U16_ACCX_LD_XP |
5356 | 59.3k | 18276U, // EE_VMULAS_U16_ACCX_LD_XP_QUP |
5357 | 59.3k | 0U, // EE_VMULAS_U16_QACC |
5358 | 59.3k | 642U, // EE_VMULAS_U16_QACC_LDBC_INCP |
5359 | 59.3k | 868U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP |
5360 | 59.3k | 5U, // EE_VMULAS_U16_QACC_LD_IP |
5361 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_IP_QUP |
5362 | 59.3k | 46722U, // EE_VMULAS_U16_QACC_LD_XP |
5363 | 59.3k | 18276U, // EE_VMULAS_U16_QACC_LD_XP_QUP |
5364 | 59.3k | 0U, // EE_VMULAS_U8_ACCX |
5365 | 59.3k | 5U, // EE_VMULAS_U8_ACCX_LD_IP |
5366 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP |
5367 | 59.3k | 46722U, // EE_VMULAS_U8_ACCX_LD_XP |
5368 | 59.3k | 18276U, // EE_VMULAS_U8_ACCX_LD_XP_QUP |
5369 | 59.3k | 0U, // EE_VMULAS_U8_QACC |
5370 | 59.3k | 642U, // EE_VMULAS_U8_QACC_LDBC_INCP |
5371 | 59.3k | 868U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP |
5372 | 59.3k | 5U, // EE_VMULAS_U8_QACC_LD_IP |
5373 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_IP_QUP |
5374 | 59.3k | 46722U, // EE_VMULAS_U8_QACC_LD_XP |
5375 | 59.3k | 18276U, // EE_VMULAS_U8_QACC_LD_XP_QUP |
5376 | 59.3k | 8U, // EE_VMUL_S16 |
5377 | 59.3k | 2U, // EE_VMUL_S16_LD_INCP |
5378 | 59.3k | 12U, // EE_VMUL_S16_ST_INCP |
5379 | 59.3k | 8U, // EE_VMUL_S8 |
5380 | 59.3k | 2U, // EE_VMUL_S8_LD_INCP |
5381 | 59.3k | 12U, // EE_VMUL_S8_ST_INCP |
5382 | 59.3k | 8U, // EE_VMUL_U16 |
5383 | 59.3k | 2U, // EE_VMUL_U16_LD_INCP |
5384 | 59.3k | 12U, // EE_VMUL_U16_ST_INCP |
5385 | 59.3k | 8U, // EE_VMUL_U8 |
5386 | 59.3k | 2U, // EE_VMUL_U8_LD_INCP |
5387 | 59.3k | 12U, // EE_VMUL_U8_ST_INCP |
5388 | 59.3k | 0U, // EE_VPRELU_S16 |
5389 | 59.3k | 0U, // EE_VPRELU_S8 |
5390 | 59.3k | 10U, // EE_VRELU_S16 |
5391 | 59.3k | 10U, // EE_VRELU_S8 |
5392 | 59.3k | 0U, // EE_VSL_32 |
5393 | 59.3k | 1U, // EE_VSMULAS_S16_QACC |
5394 | 59.3k | 20098U, // EE_VSMULAS_S16_QACC_LD_INCP |
5395 | 59.3k | 0U, // EE_VSMULAS_S8_QACC |
5396 | 59.3k | 22146U, // EE_VSMULAS_S8_QACC_LD_INCP |
5397 | 59.3k | 0U, // EE_VSR_32 |
5398 | 59.3k | 4U, // EE_VST_128_IP |
5399 | 59.3k | 10U, // EE_VST_128_XP |
5400 | 59.3k | 4U, // EE_VST_H_64_IP |
5401 | 59.3k | 10U, // EE_VST_H_64_XP |
5402 | 59.3k | 4U, // EE_VST_L_64_IP |
5403 | 59.3k | 10U, // EE_VST_L_64_XP |
5404 | 59.3k | 8U, // EE_VSUBS_S16 |
5405 | 59.3k | 2U, // EE_VSUBS_S16_LD_INCP |
5406 | 59.3k | 12U, // EE_VSUBS_S16_ST_INCP |
5407 | 59.3k | 8U, // EE_VSUBS_S32 |
5408 | 59.3k | 2U, // EE_VSUBS_S32_LD_INCP |
5409 | 59.3k | 12U, // EE_VSUBS_S32_ST_INCP |
5410 | 59.3k | 8U, // EE_VSUBS_S8 |
5411 | 59.3k | 2U, // EE_VSUBS_S8_LD_INCP |
5412 | 59.3k | 12U, // EE_VSUBS_S8_ST_INCP |
5413 | 59.3k | 0U, // EE_VUNZIP_16 |
5414 | 59.3k | 0U, // EE_VUNZIP_32 |
5415 | 59.3k | 0U, // EE_VUNZIP_8 |
5416 | 59.3k | 0U, // EE_VZIP_16 |
5417 | 59.3k | 0U, // EE_VZIP_32 |
5418 | 59.3k | 0U, // EE_VZIP_8 |
5419 | 59.3k | 0U, // EE_WR_MASK_GPIO_OUT |
5420 | 59.3k | 8U, // EE_XORQ |
5421 | 59.3k | 0U, // EE_ZERO_ACCX |
5422 | 59.3k | 0U, // EE_ZERO_Q |
5423 | 59.3k | 0U, // EE_ZERO_QACC |
5424 | 59.3k | 0U, // ENTRY |
5425 | 59.3k | 0U, // ESYNC |
5426 | 59.3k | 0U, // EXCW |
5427 | 59.3k | 899U, // EXTUI |
5428 | 59.3k | 0U, // EXTW |
5429 | 59.3k | 3U, // FLOAT_S |
5430 | 59.3k | 3U, // FLOOR_S |
5431 | 59.3k | 0U, // GET_GPIO_IN |
5432 | 59.3k | 0U, // ILL |
5433 | 59.3k | 0U, // ILL_N |
5434 | 59.3k | 0U, // ISYNC |
5435 | 59.3k | 0U, // J |
5436 | 59.3k | 0U, // JX |
5437 | 59.3k | 0U, // L16SI |
5438 | 59.3k | 0U, // L16UI |
5439 | 59.3k | 5U, // L32E |
5440 | 59.3k | 0U, // L32I |
5441 | 59.3k | 0U, // L32I_N |
5442 | 59.3k | 0U, // L32R |
5443 | 59.3k | 0U, // L8UI |
5444 | 59.3k | 0U, // LDDEC |
5445 | 59.3k | 0U, // LDINC |
5446 | 59.3k | 0U, // LEA_ADD |
5447 | 59.3k | 0U, // LOOP |
5448 | 59.3k | 0U, // LOOPGTZ |
5449 | 59.3k | 0U, // LOOPNEZ |
5450 | 59.3k | 0U, // LSI |
5451 | 59.3k | 5U, // LSIP |
5452 | 59.3k | 8U, // LSX |
5453 | 59.3k | 10U, // LSXP |
5454 | 59.3k | 10U, // MADDN_S |
5455 | 59.3k | 10U, // MADD_S |
5456 | 59.3k | 8U, // MAX |
5457 | 59.3k | 8U, // MAXU |
5458 | 59.3k | 0U, // MEMW |
5459 | 59.3k | 8U, // MIN |
5460 | 59.3k | 8U, // MINU |
5461 | 59.3k | 0U, // MKDADJ_S |
5462 | 59.3k | 0U, // MKSADJ_S |
5463 | 59.3k | 8U, // MOVEQZ |
5464 | 59.3k | 10U, // MOVEQZ_S |
5465 | 59.3k | 10U, // MOVF |
5466 | 59.3k | 10U, // MOVF_S |
5467 | 59.3k | 8U, // MOVGEZ |
5468 | 59.3k | 10U, // MOVGEZ_S |
5469 | 59.3k | 0U, // MOVI |
5470 | 59.3k | 0U, // MOVI_N |
5471 | 59.3k | 8U, // MOVLTZ |
5472 | 59.3k | 10U, // MOVLTZ_S |
5473 | 59.3k | 8U, // MOVNEZ |
5474 | 59.3k | 10U, // MOVNEZ_S |
5475 | 59.3k | 0U, // MOVSP |
5476 | 59.3k | 10U, // MOVT |
5477 | 59.3k | 10U, // MOVT_S |
5478 | 59.3k | 0U, // MOV_N |
5479 | 59.3k | 0U, // MOV_S |
5480 | 59.3k | 10U, // MSUB_S |
5481 | 59.3k | 8U, // MUL16S |
5482 | 59.3k | 8U, // MUL16U |
5483 | 59.3k | 0U, // MULA_AA_HH |
5484 | 59.3k | 0U, // MULA_AA_HL |
5485 | 59.3k | 0U, // MULA_AA_LH |
5486 | 59.3k | 0U, // MULA_AA_LL |
5487 | 59.3k | 0U, // MULA_AD_HH |
5488 | 59.3k | 0U, // MULA_AD_HL |
5489 | 59.3k | 0U, // MULA_AD_LH |
5490 | 59.3k | 0U, // MULA_AD_LL |
5491 | 59.3k | 0U, // MULA_DA_HH |
5492 | 59.3k | 642U, // MULA_DA_HH_LDDEC |
5493 | 59.3k | 642U, // MULA_DA_HH_LDINC |
5494 | 59.3k | 0U, // MULA_DA_HL |
5495 | 59.3k | 642U, // MULA_DA_HL_LDDEC |
5496 | 59.3k | 642U, // MULA_DA_HL_LDINC |
5497 | 59.3k | 0U, // MULA_DA_LH |
5498 | 59.3k | 642U, // MULA_DA_LH_LDDEC |
5499 | 59.3k | 642U, // MULA_DA_LH_LDINC |
5500 | 59.3k | 0U, // MULA_DA_LL |
5501 | 59.3k | 642U, // MULA_DA_LL_LDDEC |
5502 | 59.3k | 642U, // MULA_DA_LL_LDINC |
5503 | 59.3k | 0U, // MULA_DD_HH |
5504 | 59.3k | 642U, // MULA_DD_HH_LDDEC |
5505 | 59.3k | 642U, // MULA_DD_HH_LDINC |
5506 | 59.3k | 0U, // MULA_DD_HL |
5507 | 59.3k | 642U, // MULA_DD_HL_LDDEC |
5508 | 59.3k | 642U, // MULA_DD_HL_LDINC |
5509 | 59.3k | 0U, // MULA_DD_LH |
5510 | 59.3k | 642U, // MULA_DD_LH_LDDEC |
5511 | 59.3k | 642U, // MULA_DD_LH_LDINC |
5512 | 59.3k | 0U, // MULA_DD_LL |
5513 | 59.3k | 642U, // MULA_DD_LL_LDDEC |
5514 | 59.3k | 642U, // MULA_DD_LL_LDINC |
5515 | 59.3k | 8U, // MULL |
5516 | 59.3k | 8U, // MULSH |
5517 | 59.3k | 0U, // MULS_AA_HH |
5518 | 59.3k | 0U, // MULS_AA_HL |
5519 | 59.3k | 0U, // MULS_AA_LH |
5520 | 59.3k | 0U, // MULS_AA_LL |
5521 | 59.3k | 0U, // MULS_AD_HH |
5522 | 59.3k | 0U, // MULS_AD_HL |
5523 | 59.3k | 0U, // MULS_AD_LH |
5524 | 59.3k | 0U, // MULS_AD_LL |
5525 | 59.3k | 0U, // MULS_DA_HH |
5526 | 59.3k | 0U, // MULS_DA_HL |
5527 | 59.3k | 0U, // MULS_DA_LH |
5528 | 59.3k | 0U, // MULS_DA_LL |
5529 | 59.3k | 0U, // MULS_DD_HH |
5530 | 59.3k | 0U, // MULS_DD_HL |
5531 | 59.3k | 0U, // MULS_DD_LH |
5532 | 59.3k | 0U, // MULS_DD_LL |
5533 | 59.3k | 8U, // MULUH |
5534 | 59.3k | 0U, // MUL_AA_HH |
5535 | 59.3k | 0U, // MUL_AA_HL |
5536 | 59.3k | 0U, // MUL_AA_LH |
5537 | 59.3k | 0U, // MUL_AA_LL |
5538 | 59.3k | 0U, // MUL_AD_HH |
5539 | 59.3k | 0U, // MUL_AD_HL |
5540 | 59.3k | 0U, // MUL_AD_LH |
5541 | 59.3k | 0U, // MUL_AD_LL |
5542 | 59.3k | 0U, // MUL_DA_HH |
5543 | 59.3k | 0U, // MUL_DA_HL |
5544 | 59.3k | 0U, // MUL_DA_LH |
5545 | 59.3k | 0U, // MUL_DA_LL |
5546 | 59.3k | 0U, // MUL_DD_HH |
5547 | 59.3k | 0U, // MUL_DD_HL |
5548 | 59.3k | 0U, // MUL_DD_LH |
5549 | 59.3k | 0U, // MUL_DD_LL |
5550 | 59.3k | 8U, // MUL_S |
5551 | 59.3k | 0U, // NEG |
5552 | 59.3k | 0U, // NEG_S |
5553 | 59.3k | 0U, // NEXP01_S |
5554 | 59.3k | 0U, // NOP |
5555 | 59.3k | 0U, // NSA |
5556 | 59.3k | 0U, // NSAU |
5557 | 59.3k | 8U, // OEQ_S |
5558 | 59.3k | 8U, // OLE_S |
5559 | 59.3k | 8U, // OLT_S |
5560 | 59.3k | 8U, // OR |
5561 | 59.3k | 8U, // ORB |
5562 | 59.3k | 8U, // ORBC |
5563 | 59.3k | 8U, // QUOS |
5564 | 59.3k | 8U, // QUOU |
5565 | 59.3k | 0U, // RECIP0_S |
5566 | 59.3k | 8U, // REMS |
5567 | 59.3k | 8U, // REMU |
5568 | 59.3k | 0U, // RER |
5569 | 59.3k | 0U, // RET |
5570 | 59.3k | 0U, // RETW |
5571 | 59.3k | 0U, // RETW_N |
5572 | 59.3k | 0U, // RET_N |
5573 | 59.3k | 0U, // RFDE |
5574 | 59.3k | 0U, // RFE |
5575 | 59.3k | 0U, // RFI |
5576 | 59.3k | 0U, // RFR |
5577 | 59.3k | 0U, // RFWO |
5578 | 59.3k | 0U, // RFWU |
5579 | 59.3k | 0U, // ROTW |
5580 | 59.3k | 3U, // ROUND_S |
5581 | 59.3k | 0U, // RSIL |
5582 | 59.3k | 0U, // RSQRT0_S |
5583 | 59.3k | 0U, // RSR |
5584 | 59.3k | 0U, // RSYNC |
5585 | 59.3k | 0U, // RUR |
5586 | 59.3k | 0U, // RUR_ACCX_0 |
5587 | 59.3k | 0U, // RUR_ACCX_1 |
5588 | 59.3k | 0U, // RUR_AE_BITHEAD |
5589 | 59.3k | 0U, // RUR_AE_BITPTR |
5590 | 59.3k | 0U, // RUR_AE_BITSUSED |
5591 | 59.3k | 0U, // RUR_AE_CBEGIN0 |
5592 | 59.3k | 0U, // RUR_AE_CEND0 |
5593 | 59.3k | 0U, // RUR_AE_CWRAP |
5594 | 59.3k | 0U, // RUR_AE_CW_SD_NO |
5595 | 59.3k | 0U, // RUR_AE_FIRST_TS |
5596 | 59.3k | 0U, // RUR_AE_NEXTOFFSET |
5597 | 59.3k | 0U, // RUR_AE_OVERFLOW |
5598 | 59.3k | 0U, // RUR_AE_OVF_SAR |
5599 | 59.3k | 0U, // RUR_AE_SAR |
5600 | 59.3k | 0U, // RUR_AE_SEARCHDONE |
5601 | 59.3k | 0U, // RUR_AE_TABLESIZE |
5602 | 59.3k | 0U, // RUR_AE_TS_FTS_BU_BP |
5603 | 59.3k | 0U, // RUR_FFT_BIT_WIDTH |
5604 | 59.3k | 0U, // RUR_GPIO_OUT |
5605 | 59.3k | 0U, // RUR_QACC_H_0 |
5606 | 59.3k | 0U, // RUR_QACC_H_1 |
5607 | 59.3k | 0U, // RUR_QACC_H_2 |
5608 | 59.3k | 0U, // RUR_QACC_H_3 |
5609 | 59.3k | 0U, // RUR_QACC_H_4 |
5610 | 59.3k | 0U, // RUR_QACC_L_0 |
5611 | 59.3k | 0U, // RUR_QACC_L_1 |
5612 | 59.3k | 0U, // RUR_QACC_L_2 |
5613 | 59.3k | 0U, // RUR_QACC_L_3 |
5614 | 59.3k | 0U, // RUR_QACC_L_4 |
5615 | 59.3k | 0U, // RUR_SAR_BYTE |
5616 | 59.3k | 0U, // RUR_UA_STATE_0 |
5617 | 59.3k | 0U, // RUR_UA_STATE_1 |
5618 | 59.3k | 0U, // RUR_UA_STATE_2 |
5619 | 59.3k | 0U, // RUR_UA_STATE_3 |
5620 | 59.3k | 0U, // S16I |
5621 | 59.3k | 0U, // S32C1I |
5622 | 59.3k | 5U, // S32E |
5623 | 59.3k | 0U, // S32I |
5624 | 59.3k | 0U, // S32I_N |
5625 | 59.3k | 0U, // S8I |
5626 | 59.3k | 0U, // SET_BIT_GPIO_OUT |
5627 | 59.3k | 3U, // SEXT |
5628 | 59.3k | 0U, // SIMCALL |
5629 | 59.3k | 0U, // SLL |
5630 | 59.3k | 5U, // SLLI |
5631 | 59.3k | 0U, // SQRT0_S |
5632 | 59.3k | 0U, // SRA |
5633 | 59.3k | 11U, // SRAI |
5634 | 59.3k | 8U, // SRC |
5635 | 59.3k | 0U, // SRL |
5636 | 59.3k | 11U, // SRLI |
5637 | 59.3k | 0U, // SSA8L |
5638 | 59.3k | 0U, // SSAI |
5639 | 59.3k | 0U, // SSI |
5640 | 59.3k | 5U, // SSIP |
5641 | 59.3k | 0U, // SSL |
5642 | 59.3k | 0U, // SSR |
5643 | 59.3k | 8U, // SSX |
5644 | 59.3k | 10U, // SSXP |
5645 | 59.3k | 8U, // SUB |
5646 | 59.3k | 8U, // SUBX2 |
5647 | 59.3k | 8U, // SUBX4 |
5648 | 59.3k | 8U, // SUBX8 |
5649 | 59.3k | 8U, // SUB_S |
5650 | 59.3k | 0U, // SYSCALL |
5651 | 59.3k | 3U, // TRUNC_S |
5652 | 59.3k | 8U, // UEQ_S |
5653 | 59.3k | 3U, // UFLOAT_S |
5654 | 59.3k | 8U, // ULE_S |
5655 | 59.3k | 8U, // ULT_S |
5656 | 59.3k | 0U, // UMUL_AA_HH |
5657 | 59.3k | 0U, // UMUL_AA_HL |
5658 | 59.3k | 0U, // UMUL_AA_LH |
5659 | 59.3k | 0U, // UMUL_AA_LL |
5660 | 59.3k | 8U, // UN_S |
5661 | 59.3k | 3U, // UTRUNC_S |
5662 | 59.3k | 0U, // WAITI |
5663 | 59.3k | 0U, // WDTLB |
5664 | 59.3k | 0U, // WER |
5665 | 59.3k | 0U, // WFR |
5666 | 59.3k | 0U, // WITLB |
5667 | 59.3k | 0U, // WR_MASK_GPIO_OUT |
5668 | 59.3k | 0U, // WSR |
5669 | 59.3k | 0U, // WUR |
5670 | 59.3k | 0U, // WUR_ACCX_0 |
5671 | 59.3k | 0U, // WUR_ACCX_1 |
5672 | 59.3k | 0U, // WUR_AE_BITHEAD |
5673 | 59.3k | 0U, // WUR_AE_BITPTR |
5674 | 59.3k | 0U, // WUR_AE_BITSUSED |
5675 | 59.3k | 0U, // WUR_AE_CBEGIN0 |
5676 | 59.3k | 0U, // WUR_AE_CEND0 |
5677 | 59.3k | 0U, // WUR_AE_CWRAP |
5678 | 59.3k | 0U, // WUR_AE_CW_SD_NO |
5679 | 59.3k | 0U, // WUR_AE_FIRST_TS |
5680 | 59.3k | 0U, // WUR_AE_NEXTOFFSET |
5681 | 59.3k | 0U, // WUR_AE_OVERFLOW |
5682 | 59.3k | 0U, // WUR_AE_OVF_SAR |
5683 | 59.3k | 0U, // WUR_AE_SAR |
5684 | 59.3k | 0U, // WUR_AE_SEARCHDONE |
5685 | 59.3k | 0U, // WUR_AE_TABLESIZE |
5686 | 59.3k | 0U, // WUR_AE_TS_FTS_BU_BP |
5687 | 59.3k | 0U, // WUR_FCR |
5688 | 59.3k | 0U, // WUR_FFT_BIT_WIDTH |
5689 | 59.3k | 0U, // WUR_FSR |
5690 | 59.3k | 0U, // WUR_GPIO_OUT |
5691 | 59.3k | 0U, // WUR_QACC_H_0 |
5692 | 59.3k | 0U, // WUR_QACC_H_1 |
5693 | 59.3k | 0U, // WUR_QACC_H_2 |
5694 | 59.3k | 0U, // WUR_QACC_H_3 |
5695 | 59.3k | 0U, // WUR_QACC_H_4 |
5696 | 59.3k | 0U, // WUR_QACC_L_0 |
5697 | 59.3k | 0U, // WUR_QACC_L_1 |
5698 | 59.3k | 0U, // WUR_QACC_L_2 |
5699 | 59.3k | 0U, // WUR_QACC_L_3 |
5700 | 59.3k | 0U, // WUR_QACC_L_4 |
5701 | 59.3k | 0U, // WUR_SAR_BYTE |
5702 | 59.3k | 0U, // WUR_UA_STATE_0 |
5703 | 59.3k | 0U, // WUR_UA_STATE_1 |
5704 | 59.3k | 0U, // WUR_UA_STATE_2 |
5705 | 59.3k | 0U, // WUR_UA_STATE_3 |
5706 | 59.3k | 8U, // XOR |
5707 | 59.3k | 8U, // XORB |
5708 | 59.3k | 0U, // XSR |
5709 | 59.3k | 0U, // _L32I |
5710 | 59.3k | 0U, // _L32I_N |
5711 | 59.3k | 0U, // _MOVI |
5712 | 59.3k | 0U, // _S32I |
5713 | 59.3k | 0U, // _S32I_N |
5714 | 59.3k | 5U, // _SLLI |
5715 | 59.3k | 3U, // _SRLI |
5716 | 59.3k | 0U, // mv_QR |
5717 | 59.3k | }; |
5718 | | |
5719 | 59.3k | static const uint8_t OpInfo2[] = { |
5720 | 59.3k | 0U, // PHI |
5721 | 59.3k | 0U, // INLINEASM |
5722 | 59.3k | 0U, // INLINEASM_BR |
5723 | 59.3k | 0U, // CFI_INSTRUCTION |
5724 | 59.3k | 0U, // EH_LABEL |
5725 | 59.3k | 0U, // GC_LABEL |
5726 | 59.3k | 0U, // ANNOTATION_LABEL |
5727 | 59.3k | 0U, // KILL |
5728 | 59.3k | 0U, // EXTRACT_SUBREG |
5729 | 59.3k | 0U, // INSERT_SUBREG |
5730 | 59.3k | 0U, // IMPLICIT_DEF |
5731 | 59.3k | 0U, // SUBREG_TO_REG |
5732 | 59.3k | 0U, // COPY_TO_REGCLASS |
5733 | 59.3k | 0U, // DBG_VALUE |
5734 | 59.3k | 0U, // DBG_VALUE_LIST |
5735 | 59.3k | 0U, // DBG_INSTR_REF |
5736 | 59.3k | 0U, // DBG_PHI |
5737 | 59.3k | 0U, // DBG_LABEL |
5738 | 59.3k | 0U, // REG_SEQUENCE |
5739 | 59.3k | 0U, // COPY |
5740 | 59.3k | 0U, // BUNDLE |
5741 | 59.3k | 0U, // LIFETIME_START |
5742 | 59.3k | 0U, // LIFETIME_END |
5743 | 59.3k | 0U, // PSEUDO_PROBE |
5744 | 59.3k | 0U, // ARITH_FENCE |
5745 | 59.3k | 0U, // STACKMAP |
5746 | 59.3k | 0U, // FENTRY_CALL |
5747 | 59.3k | 0U, // PATCHPOINT |
5748 | 59.3k | 0U, // LOAD_STACK_GUARD |
5749 | 59.3k | 0U, // PREALLOCATED_SETUP |
5750 | 59.3k | 0U, // PREALLOCATED_ARG |
5751 | 59.3k | 0U, // STATEPOINT |
5752 | 59.3k | 0U, // LOCAL_ESCAPE |
5753 | 59.3k | 0U, // FAULTING_OP |
5754 | 59.3k | 0U, // PATCHABLE_OP |
5755 | 59.3k | 0U, // PATCHABLE_FUNCTION_ENTER |
5756 | 59.3k | 0U, // PATCHABLE_RET |
5757 | 59.3k | 0U, // PATCHABLE_FUNCTION_EXIT |
5758 | 59.3k | 0U, // PATCHABLE_TAIL_CALL |
5759 | 59.3k | 0U, // PATCHABLE_EVENT_CALL |
5760 | 59.3k | 0U, // PATCHABLE_TYPED_EVENT_CALL |
5761 | 59.3k | 0U, // ICALL_BRANCH_FUNNEL |
5762 | 59.3k | 0U, // MEMBARRIER |
5763 | 59.3k | 0U, // JUMP_TABLE_DEBUG_INFO |
5764 | 59.3k | 0U, // G_ASSERT_SEXT |
5765 | 59.3k | 0U, // G_ASSERT_ZEXT |
5766 | 59.3k | 0U, // G_ASSERT_ALIGN |
5767 | 59.3k | 0U, // G_ADD |
5768 | 59.3k | 0U, // G_SUB |
5769 | 59.3k | 0U, // G_MUL |
5770 | 59.3k | 0U, // G_SDIV |
5771 | 59.3k | 0U, // G_UDIV |
5772 | 59.3k | 0U, // G_SREM |
5773 | 59.3k | 0U, // G_UREM |
5774 | 59.3k | 0U, // G_SDIVREM |
5775 | 59.3k | 0U, // G_UDIVREM |
5776 | 59.3k | 0U, // G_AND |
5777 | 59.3k | 0U, // G_OR |
5778 | 59.3k | 0U, // G_XOR |
5779 | 59.3k | 0U, // G_IMPLICIT_DEF |
5780 | 59.3k | 0U, // G_PHI |
5781 | 59.3k | 0U, // G_FRAME_INDEX |
5782 | 59.3k | 0U, // G_GLOBAL_VALUE |
5783 | 59.3k | 0U, // G_CONSTANT_POOL |
5784 | 59.3k | 0U, // G_EXTRACT |
5785 | 59.3k | 0U, // G_UNMERGE_VALUES |
5786 | 59.3k | 0U, // G_INSERT |
5787 | 59.3k | 0U, // G_MERGE_VALUES |
5788 | 59.3k | 0U, // G_BUILD_VECTOR |
5789 | 59.3k | 0U, // G_BUILD_VECTOR_TRUNC |
5790 | 59.3k | 0U, // G_CONCAT_VECTORS |
5791 | 59.3k | 0U, // G_PTRTOINT |
5792 | 59.3k | 0U, // G_INTTOPTR |
5793 | 59.3k | 0U, // G_BITCAST |
5794 | 59.3k | 0U, // G_FREEZE |
5795 | 59.3k | 0U, // G_CONSTANT_FOLD_BARRIER |
5796 | 59.3k | 0U, // G_INTRINSIC_FPTRUNC_ROUND |
5797 | 59.3k | 0U, // G_INTRINSIC_TRUNC |
5798 | 59.3k | 0U, // G_INTRINSIC_ROUND |
5799 | 59.3k | 0U, // G_INTRINSIC_LRINT |
5800 | 59.3k | 0U, // G_INTRINSIC_ROUNDEVEN |
5801 | 59.3k | 0U, // G_READCYCLECOUNTER |
5802 | 59.3k | 0U, // G_LOAD |
5803 | 59.3k | 0U, // G_SEXTLOAD |
5804 | 59.3k | 0U, // G_ZEXTLOAD |
5805 | 59.3k | 0U, // G_INDEXED_LOAD |
5806 | 59.3k | 0U, // G_INDEXED_SEXTLOAD |
5807 | 59.3k | 0U, // G_INDEXED_ZEXTLOAD |
5808 | 59.3k | 0U, // G_STORE |
5809 | 59.3k | 0U, // G_INDEXED_STORE |
5810 | 59.3k | 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS |
5811 | 59.3k | 0U, // G_ATOMIC_CMPXCHG |
5812 | 59.3k | 0U, // G_ATOMICRMW_XCHG |
5813 | 59.3k | 0U, // G_ATOMICRMW_ADD |
5814 | 59.3k | 0U, // G_ATOMICRMW_SUB |
5815 | 59.3k | 0U, // G_ATOMICRMW_AND |
5816 | 59.3k | 0U, // G_ATOMICRMW_NAND |
5817 | 59.3k | 0U, // G_ATOMICRMW_OR |
5818 | 59.3k | 0U, // G_ATOMICRMW_XOR |
5819 | 59.3k | 0U, // G_ATOMICRMW_MAX |
5820 | 59.3k | 0U, // G_ATOMICRMW_MIN |
5821 | 59.3k | 0U, // G_ATOMICRMW_UMAX |
5822 | 59.3k | 0U, // G_ATOMICRMW_UMIN |
5823 | 59.3k | 0U, // G_ATOMICRMW_FADD |
5824 | 59.3k | 0U, // G_ATOMICRMW_FSUB |
5825 | 59.3k | 0U, // G_ATOMICRMW_FMAX |
5826 | 59.3k | 0U, // G_ATOMICRMW_FMIN |
5827 | 59.3k | 0U, // G_ATOMICRMW_UINC_WRAP |
5828 | 59.3k | 0U, // G_ATOMICRMW_UDEC_WRAP |
5829 | 59.3k | 0U, // G_FENCE |
5830 | 59.3k | 0U, // G_PREFETCH |
5831 | 59.3k | 0U, // G_BRCOND |
5832 | 59.3k | 0U, // G_BRINDIRECT |
5833 | 59.3k | 0U, // G_INVOKE_REGION_START |
5834 | 59.3k | 0U, // G_INTRINSIC |
5835 | 59.3k | 0U, // G_INTRINSIC_W_SIDE_EFFECTS |
5836 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT |
5837 | 59.3k | 0U, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
5838 | 59.3k | 0U, // G_ANYEXT |
5839 | 59.3k | 0U, // G_TRUNC |
5840 | 59.3k | 0U, // G_CONSTANT |
5841 | 59.3k | 0U, // G_FCONSTANT |
5842 | 59.3k | 0U, // G_VASTART |
5843 | 59.3k | 0U, // G_VAARG |
5844 | 59.3k | 0U, // G_SEXT |
5845 | 59.3k | 0U, // G_SEXT_INREG |
5846 | 59.3k | 0U, // G_ZEXT |
5847 | 59.3k | 0U, // G_SHL |
5848 | 59.3k | 0U, // G_LSHR |
5849 | 59.3k | 0U, // G_ASHR |
5850 | 59.3k | 0U, // G_FSHL |
5851 | 59.3k | 0U, // G_FSHR |
5852 | 59.3k | 0U, // G_ROTR |
5853 | 59.3k | 0U, // G_ROTL |
5854 | 59.3k | 0U, // G_ICMP |
5855 | 59.3k | 0U, // G_FCMP |
5856 | 59.3k | 0U, // G_SELECT |
5857 | 59.3k | 0U, // G_UADDO |
5858 | 59.3k | 0U, // G_UADDE |
5859 | 59.3k | 0U, // G_USUBO |
5860 | 59.3k | 0U, // G_USUBE |
5861 | 59.3k | 0U, // G_SADDO |
5862 | 59.3k | 0U, // G_SADDE |
5863 | 59.3k | 0U, // G_SSUBO |
5864 | 59.3k | 0U, // G_SSUBE |
5865 | 59.3k | 0U, // G_UMULO |
5866 | 59.3k | 0U, // G_SMULO |
5867 | 59.3k | 0U, // G_UMULH |
5868 | 59.3k | 0U, // G_SMULH |
5869 | 59.3k | 0U, // G_UADDSAT |
5870 | 59.3k | 0U, // G_SADDSAT |
5871 | 59.3k | 0U, // G_USUBSAT |
5872 | 59.3k | 0U, // G_SSUBSAT |
5873 | 59.3k | 0U, // G_USHLSAT |
5874 | 59.3k | 0U, // G_SSHLSAT |
5875 | 59.3k | 0U, // G_SMULFIX |
5876 | 59.3k | 0U, // G_UMULFIX |
5877 | 59.3k | 0U, // G_SMULFIXSAT |
5878 | 59.3k | 0U, // G_UMULFIXSAT |
5879 | 59.3k | 0U, // G_SDIVFIX |
5880 | 59.3k | 0U, // G_UDIVFIX |
5881 | 59.3k | 0U, // G_SDIVFIXSAT |
5882 | 59.3k | 0U, // G_UDIVFIXSAT |
5883 | 59.3k | 0U, // G_FADD |
5884 | 59.3k | 0U, // G_FSUB |
5885 | 59.3k | 0U, // G_FMUL |
5886 | 59.3k | 0U, // G_FMA |
5887 | 59.3k | 0U, // G_FMAD |
5888 | 59.3k | 0U, // G_FDIV |
5889 | 59.3k | 0U, // G_FREM |
5890 | 59.3k | 0U, // G_FPOW |
5891 | 59.3k | 0U, // G_FPOWI |
5892 | 59.3k | 0U, // G_FEXP |
5893 | 59.3k | 0U, // G_FEXP2 |
5894 | 59.3k | 0U, // G_FEXP10 |
5895 | 59.3k | 0U, // G_FLOG |
5896 | 59.3k | 0U, // G_FLOG2 |
5897 | 59.3k | 0U, // G_FLOG10 |
5898 | 59.3k | 0U, // G_FLDEXP |
5899 | 59.3k | 0U, // G_FFREXP |
5900 | 59.3k | 0U, // G_FNEG |
5901 | 59.3k | 0U, // G_FPEXT |
5902 | 59.3k | 0U, // G_FPTRUNC |
5903 | 59.3k | 0U, // G_FPTOSI |
5904 | 59.3k | 0U, // G_FPTOUI |
5905 | 59.3k | 0U, // G_SITOFP |
5906 | 59.3k | 0U, // G_UITOFP |
5907 | 59.3k | 0U, // G_FABS |
5908 | 59.3k | 0U, // G_FCOPYSIGN |
5909 | 59.3k | 0U, // G_IS_FPCLASS |
5910 | 59.3k | 0U, // G_FCANONICALIZE |
5911 | 59.3k | 0U, // G_FMINNUM |
5912 | 59.3k | 0U, // G_FMAXNUM |
5913 | 59.3k | 0U, // G_FMINNUM_IEEE |
5914 | 59.3k | 0U, // G_FMAXNUM_IEEE |
5915 | 59.3k | 0U, // G_FMINIMUM |
5916 | 59.3k | 0U, // G_FMAXIMUM |
5917 | 59.3k | 0U, // G_GET_FPENV |
5918 | 59.3k | 0U, // G_SET_FPENV |
5919 | 59.3k | 0U, // G_RESET_FPENV |
5920 | 59.3k | 0U, // G_GET_FPMODE |
5921 | 59.3k | 0U, // G_SET_FPMODE |
5922 | 59.3k | 0U, // G_RESET_FPMODE |
5923 | 59.3k | 0U, // G_PTR_ADD |
5924 | 59.3k | 0U, // G_PTRMASK |
5925 | 59.3k | 0U, // G_SMIN |
5926 | 59.3k | 0U, // G_SMAX |
5927 | 59.3k | 0U, // G_UMIN |
5928 | 59.3k | 0U, // G_UMAX |
5929 | 59.3k | 0U, // G_ABS |
5930 | 59.3k | 0U, // G_LROUND |
5931 | 59.3k | 0U, // G_LLROUND |
5932 | 59.3k | 0U, // G_BR |
5933 | 59.3k | 0U, // G_BRJT |
5934 | 59.3k | 0U, // G_INSERT_VECTOR_ELT |
5935 | 59.3k | 0U, // G_EXTRACT_VECTOR_ELT |
5936 | 59.3k | 0U, // G_SHUFFLE_VECTOR |
5937 | 59.3k | 0U, // G_CTTZ |
5938 | 59.3k | 0U, // G_CTTZ_ZERO_UNDEF |
5939 | 59.3k | 0U, // G_CTLZ |
5940 | 59.3k | 0U, // G_CTLZ_ZERO_UNDEF |
5941 | 59.3k | 0U, // G_CTPOP |
5942 | 59.3k | 0U, // G_BSWAP |
5943 | 59.3k | 0U, // G_BITREVERSE |
5944 | 59.3k | 0U, // G_FCEIL |
5945 | 59.3k | 0U, // G_FCOS |
5946 | 59.3k | 0U, // G_FSIN |
5947 | 59.3k | 0U, // G_FSQRT |
5948 | 59.3k | 0U, // G_FFLOOR |
5949 | 59.3k | 0U, // G_FRINT |
5950 | 59.3k | 0U, // G_FNEARBYINT |
5951 | 59.3k | 0U, // G_ADDRSPACE_CAST |
5952 | 59.3k | 0U, // G_BLOCK_ADDR |
5953 | 59.3k | 0U, // G_JUMP_TABLE |
5954 | 59.3k | 0U, // G_DYN_STACKALLOC |
5955 | 59.3k | 0U, // G_STACKSAVE |
5956 | 59.3k | 0U, // G_STACKRESTORE |
5957 | 59.3k | 0U, // G_STRICT_FADD |
5958 | 59.3k | 0U, // G_STRICT_FSUB |
5959 | 59.3k | 0U, // G_STRICT_FMUL |
5960 | 59.3k | 0U, // G_STRICT_FDIV |
5961 | 59.3k | 0U, // G_STRICT_FREM |
5962 | 59.3k | 0U, // G_STRICT_FMA |
5963 | 59.3k | 0U, // G_STRICT_FSQRT |
5964 | 59.3k | 0U, // G_STRICT_FLDEXP |
5965 | 59.3k | 0U, // G_READ_REGISTER |
5966 | 59.3k | 0U, // G_WRITE_REGISTER |
5967 | 59.3k | 0U, // G_MEMCPY |
5968 | 59.3k | 0U, // G_MEMCPY_INLINE |
5969 | 59.3k | 0U, // G_MEMMOVE |
5970 | 59.3k | 0U, // G_MEMSET |
5971 | 59.3k | 0U, // G_BZERO |
5972 | 59.3k | 0U, // G_VECREDUCE_SEQ_FADD |
5973 | 59.3k | 0U, // G_VECREDUCE_SEQ_FMUL |
5974 | 59.3k | 0U, // G_VECREDUCE_FADD |
5975 | 59.3k | 0U, // G_VECREDUCE_FMUL |
5976 | 59.3k | 0U, // G_VECREDUCE_FMAX |
5977 | 59.3k | 0U, // G_VECREDUCE_FMIN |
5978 | 59.3k | 0U, // G_VECREDUCE_FMAXIMUM |
5979 | 59.3k | 0U, // G_VECREDUCE_FMINIMUM |
5980 | 59.3k | 0U, // G_VECREDUCE_ADD |
5981 | 59.3k | 0U, // G_VECREDUCE_MUL |
5982 | 59.3k | 0U, // G_VECREDUCE_AND |
5983 | 59.3k | 0U, // G_VECREDUCE_OR |
5984 | 59.3k | 0U, // G_VECREDUCE_XOR |
5985 | 59.3k | 0U, // G_VECREDUCE_SMAX |
5986 | 59.3k | 0U, // G_VECREDUCE_SMIN |
5987 | 59.3k | 0U, // G_VECREDUCE_UMAX |
5988 | 59.3k | 0U, // G_VECREDUCE_UMIN |
5989 | 59.3k | 0U, // G_SBFX |
5990 | 59.3k | 0U, // G_UBFX |
5991 | 59.3k | 0U, // ADJCALLSTACKDOWN |
5992 | 59.3k | 0U, // ADJCALLSTACKUP |
5993 | 59.3k | 0U, // ATOMIC_CMP_SWAP_16_P |
5994 | 59.3k | 0U, // ATOMIC_CMP_SWAP_32_P |
5995 | 59.3k | 0U, // ATOMIC_CMP_SWAP_8_P |
5996 | 59.3k | 0U, // ATOMIC_LOAD_ADD_16_P |
5997 | 59.3k | 0U, // ATOMIC_LOAD_ADD_32_P |
5998 | 59.3k | 0U, // ATOMIC_LOAD_ADD_8_P |
5999 | 59.3k | 0U, // ATOMIC_LOAD_AND_16_P |
6000 | 59.3k | 0U, // ATOMIC_LOAD_AND_32_P |
6001 | 59.3k | 0U, // ATOMIC_LOAD_AND_8_P |
6002 | 59.3k | 0U, // ATOMIC_LOAD_MAX_16_P |
6003 | 59.3k | 0U, // ATOMIC_LOAD_MAX_32_P |
6004 | 59.3k | 0U, // ATOMIC_LOAD_MAX_8_P |
6005 | 59.3k | 0U, // ATOMIC_LOAD_MIN_16_P |
6006 | 59.3k | 0U, // ATOMIC_LOAD_MIN_32_P |
6007 | 59.3k | 0U, // ATOMIC_LOAD_MIN_8_P |
6008 | 59.3k | 0U, // ATOMIC_LOAD_NAND_16_P |
6009 | 59.3k | 0U, // ATOMIC_LOAD_NAND_32_P |
6010 | 59.3k | 0U, // ATOMIC_LOAD_NAND_8_P |
6011 | 59.3k | 0U, // ATOMIC_LOAD_OR_16_P |
6012 | 59.3k | 0U, // ATOMIC_LOAD_OR_32_P |
6013 | 59.3k | 0U, // ATOMIC_LOAD_OR_8_P |
6014 | 59.3k | 0U, // ATOMIC_LOAD_SUB_16_P |
6015 | 59.3k | 0U, // ATOMIC_LOAD_SUB_32_P |
6016 | 59.3k | 0U, // ATOMIC_LOAD_SUB_8_P |
6017 | 59.3k | 0U, // ATOMIC_LOAD_UMAX_16_P |
6018 | 59.3k | 0U, // ATOMIC_LOAD_UMAX_32_P |
6019 | 59.3k | 0U, // ATOMIC_LOAD_UMAX_8_P |
6020 | 59.3k | 0U, // ATOMIC_LOAD_UMIN_16_P |
6021 | 59.3k | 0U, // ATOMIC_LOAD_UMIN_32_P |
6022 | 59.3k | 0U, // ATOMIC_LOAD_UMIN_8_P |
6023 | 59.3k | 0U, // ATOMIC_LOAD_XOR_16_P |
6024 | 59.3k | 0U, // ATOMIC_LOAD_XOR_32_P |
6025 | 59.3k | 0U, // ATOMIC_LOAD_XOR_8_P |
6026 | 59.3k | 0U, // ATOMIC_SWAP_16_P |
6027 | 59.3k | 0U, // ATOMIC_SWAP_32_P |
6028 | 59.3k | 0U, // ATOMIC_SWAP_8_P |
6029 | 59.3k | 0U, // BRCC_FP |
6030 | 59.3k | 0U, // BR_JT |
6031 | 59.3k | 0U, // CONSTPOOL_ENTRY |
6032 | 59.3k | 0U, // EE_ANDQ_P |
6033 | 59.3k | 0U, // EE_BITREV_P |
6034 | 59.3k | 0U, // EE_CMUL_S16_LD_INCP_P |
6035 | 59.3k | 0U, // EE_CMUL_S16_P |
6036 | 59.3k | 0U, // EE_CMUL_S16_ST_INCP_P |
6037 | 59.3k | 1U, // EE_FFT_AMS_S16_LD_INCP_P |
6038 | 59.3k | 1U, // EE_FFT_AMS_S16_LD_INCP_UAUP_P |
6039 | 59.3k | 1U, // EE_FFT_AMS_S16_LD_R32_DECP_P |
6040 | 59.3k | 1U, // EE_FFT_AMS_S16_ST_INCP_P |
6041 | 59.3k | 17U, // EE_FFT_CMUL_S16_LD_XP_P |
6042 | 59.3k | 2U, // EE_FFT_CMUL_S16_ST_XP_P |
6043 | 59.3k | 0U, // EE_FFT_R2BF_S16_P |
6044 | 59.3k | 0U, // EE_FFT_R2BF_S16_ST_INCP_P |
6045 | 59.3k | 0U, // EE_FFT_VST_R32_DECP_P |
6046 | 59.3k | 3U, // EE_LDF_128_IP_P |
6047 | 59.3k | 4U, // EE_LDF_128_XP_P |
6048 | 59.3k | 0U, // EE_LDF_64_IP_P |
6049 | 59.3k | 0U, // EE_LDF_64_XP_P |
6050 | 59.3k | 0U, // EE_LDQA_S16_128_IP_P |
6051 | 59.3k | 0U, // EE_LDQA_S16_128_XP_P |
6052 | 59.3k | 0U, // EE_LDQA_S8_128_IP_P |
6053 | 59.3k | 0U, // EE_LDQA_S8_128_XP_P |
6054 | 59.3k | 0U, // EE_LDQA_U16_128_IP_P |
6055 | 59.3k | 0U, // EE_LDQA_U16_128_XP_P |
6056 | 59.3k | 0U, // EE_LDQA_U8_128_IP_P |
6057 | 59.3k | 0U, // EE_LDQA_U8_128_XP_P |
6058 | 59.3k | 0U, // EE_LDXQ_32_P |
6059 | 59.3k | 0U, // EE_LD_128_USAR_IP_P |
6060 | 59.3k | 0U, // EE_LD_128_USAR_XP_P |
6061 | 59.3k | 0U, // EE_LD_ACCX_IP_P |
6062 | 59.3k | 0U, // EE_LD_QACC_H_H_32_IP_P |
6063 | 59.3k | 0U, // EE_LD_QACC_H_L_128_IP_P |
6064 | 59.3k | 0U, // EE_LD_QACC_L_H_32_IP_P |
6065 | 59.3k | 0U, // EE_LD_QACC_L_L_128_IP_P |
6066 | 59.3k | 0U, // EE_LD_UA_STATE_IP_P |
6067 | 59.3k | 0U, // EE_MOVI_32_A_P |
6068 | 59.3k | 0U, // EE_MOVI_32_Q_P |
6069 | 59.3k | 0U, // EE_MOV_S16_QACC_P |
6070 | 59.3k | 0U, // EE_MOV_S8_QACC_P |
6071 | 59.3k | 0U, // EE_MOV_U16_QACC_P |
6072 | 59.3k | 0U, // EE_MOV_U8_QACC_P |
6073 | 59.3k | 0U, // EE_NOTQ_P |
6074 | 59.3k | 0U, // EE_ORQ_P |
6075 | 59.3k | 0U, // EE_SLCI_2Q_P |
6076 | 59.3k | 0U, // EE_SLCXXP_2Q_P |
6077 | 59.3k | 0U, // EE_SRCI_2Q_P |
6078 | 59.3k | 0U, // EE_SRCMB_S16_QACC_P |
6079 | 59.3k | 0U, // EE_SRCMB_S8_QACC_P |
6080 | 59.3k | 0U, // EE_SRCQ_128_ST_INCP_P |
6081 | 59.3k | 0U, // EE_SRCXXP_2Q_P |
6082 | 59.3k | 0U, // EE_SRC_Q_LD_IP_P |
6083 | 59.3k | 0U, // EE_SRC_Q_LD_XP_P |
6084 | 59.3k | 0U, // EE_SRC_Q_P |
6085 | 59.3k | 0U, // EE_SRC_Q_QUP_P |
6086 | 59.3k | 0U, // EE_SRS_ACCX_P |
6087 | 59.3k | 3U, // EE_STF_128_IP_P |
6088 | 59.3k | 4U, // EE_STF_128_XP_P |
6089 | 59.3k | 0U, // EE_STF_64_IP_P |
6090 | 59.3k | 0U, // EE_STF_64_XP_P |
6091 | 59.3k | 0U, // EE_STXQ_32_P |
6092 | 59.3k | 0U, // EE_ST_ACCX_IP_P |
6093 | 59.3k | 0U, // EE_ST_QACC_H_H_32_IP_P |
6094 | 59.3k | 0U, // EE_ST_QACC_H_L_128_IP_P |
6095 | 59.3k | 0U, // EE_ST_QACC_L_H_32_IP_P |
6096 | 59.3k | 0U, // EE_ST_QACC_L_L_128_IP_P |
6097 | 59.3k | 0U, // EE_ST_UA_STATE_IP_P |
6098 | 59.3k | 0U, // EE_VADDS_S16_LD_INCP_P |
6099 | 59.3k | 0U, // EE_VADDS_S16_P |
6100 | 59.3k | 0U, // EE_VADDS_S16_ST_INCP_P |
6101 | 59.3k | 0U, // EE_VADDS_S32_LD_INCP_P |
6102 | 59.3k | 0U, // EE_VADDS_S32_P |
6103 | 59.3k | 0U, // EE_VADDS_S32_ST_INCP_P |
6104 | 59.3k | 0U, // EE_VADDS_S8_LD_INCP_P |
6105 | 59.3k | 0U, // EE_VADDS_S8_P |
6106 | 59.3k | 0U, // EE_VADDS_S8_ST_INCP_P |
6107 | 59.3k | 0U, // EE_VCMP_EQ_S16_P |
6108 | 59.3k | 0U, // EE_VCMP_EQ_S32_P |
6109 | 59.3k | 0U, // EE_VCMP_EQ_S8_P |
6110 | 59.3k | 0U, // EE_VCMP_GT_S16_P |
6111 | 59.3k | 0U, // EE_VCMP_GT_S32_P |
6112 | 59.3k | 0U, // EE_VCMP_GT_S8_P |
6113 | 59.3k | 0U, // EE_VCMP_LT_S16_P |
6114 | 59.3k | 0U, // EE_VCMP_LT_S32_P |
6115 | 59.3k | 0U, // EE_VCMP_LT_S8_P |
6116 | 59.3k | 0U, // EE_VLDBC_16_IP_P |
6117 | 59.3k | 0U, // EE_VLDBC_16_P |
6118 | 59.3k | 0U, // EE_VLDBC_16_XP_P |
6119 | 59.3k | 0U, // EE_VLDBC_32_IP_P |
6120 | 59.3k | 0U, // EE_VLDBC_32_P |
6121 | 59.3k | 0U, // EE_VLDBC_32_XP_P |
6122 | 59.3k | 0U, // EE_VLDBC_8_IP_P |
6123 | 59.3k | 0U, // EE_VLDBC_8_P |
6124 | 59.3k | 0U, // EE_VLDBC_8_XP_P |
6125 | 59.3k | 0U, // EE_VLDHBC_16_INCP_P |
6126 | 59.3k | 0U, // EE_VLD_128_IP_P |
6127 | 59.3k | 0U, // EE_VLD_128_XP_P |
6128 | 59.3k | 0U, // EE_VLD_H_64_IP_P |
6129 | 59.3k | 0U, // EE_VLD_H_64_XP_P |
6130 | 59.3k | 0U, // EE_VLD_L_64_IP_P |
6131 | 59.3k | 0U, // EE_VLD_L_64_XP_P |
6132 | 59.3k | 0U, // EE_VMAX_S16_LD_INCP_P |
6133 | 59.3k | 0U, // EE_VMAX_S16_P |
6134 | 59.3k | 0U, // EE_VMAX_S16_ST_INCP_P |
6135 | 59.3k | 0U, // EE_VMAX_S32_LD_INCP_P |
6136 | 59.3k | 0U, // EE_VMAX_S32_P |
6137 | 59.3k | 0U, // EE_VMAX_S32_ST_INCP_P |
6138 | 59.3k | 0U, // EE_VMAX_S8_LD_INCP_P |
6139 | 59.3k | 0U, // EE_VMAX_S8_P |
6140 | 59.3k | 0U, // EE_VMAX_S8_ST_INCP_P |
6141 | 59.3k | 0U, // EE_VMIN_S16_LD_INCP_P |
6142 | 59.3k | 0U, // EE_VMIN_S16_P |
6143 | 59.3k | 0U, // EE_VMIN_S16_ST_INCP_P |
6144 | 59.3k | 0U, // EE_VMIN_S32_LD_INCP_P |
6145 | 59.3k | 0U, // EE_VMIN_S32_P |
6146 | 59.3k | 0U, // EE_VMIN_S32_ST_INCP_P |
6147 | 59.3k | 0U, // EE_VMIN_S8_LD_INCP_P |
6148 | 59.3k | 0U, // EE_VMIN_S8_P |
6149 | 59.3k | 0U, // EE_VMIN_S8_ST_INCP_P |
6150 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_IP_P |
6151 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP_P |
6152 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_XP_P |
6153 | 59.3k | 65U, // EE_VMULAS_S16_ACCX_LD_XP_QUP_P |
6154 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_P |
6155 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LDBC_INCP_P |
6156 | 59.3k | 9U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P |
6157 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_IP_P |
6158 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_IP_QUP_P |
6159 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_XP_P |
6160 | 59.3k | 65U, // EE_VMULAS_S16_QACC_LD_XP_QUP_P |
6161 | 59.3k | 0U, // EE_VMULAS_S16_QACC_P |
6162 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_IP_P |
6163 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP_P |
6164 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_XP_P |
6165 | 59.3k | 65U, // EE_VMULAS_S8_ACCX_LD_XP_QUP_P |
6166 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_P |
6167 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LDBC_INCP_P |
6168 | 59.3k | 9U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P |
6169 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_IP_P |
6170 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_IP_QUP_P |
6171 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_XP_P |
6172 | 59.3k | 65U, // EE_VMULAS_S8_QACC_LD_XP_QUP_P |
6173 | 59.3k | 0U, // EE_VMULAS_S8_QACC_P |
6174 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_IP_P |
6175 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP_P |
6176 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_XP_P |
6177 | 59.3k | 65U, // EE_VMULAS_U16_ACCX_LD_XP_QUP_P |
6178 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_P |
6179 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LDBC_INCP_P |
6180 | 59.3k | 9U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP_P |
6181 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_IP_P |
6182 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_IP_QUP_P |
6183 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_XP_P |
6184 | 59.3k | 65U, // EE_VMULAS_U16_QACC_LD_XP_QUP_P |
6185 | 59.3k | 0U, // EE_VMULAS_U16_QACC_P |
6186 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_IP_P |
6187 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP_P |
6188 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_XP_P |
6189 | 59.3k | 65U, // EE_VMULAS_U8_ACCX_LD_XP_QUP_P |
6190 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_P |
6191 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LDBC_INCP_P |
6192 | 59.3k | 9U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP_P |
6193 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_IP_P |
6194 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_IP_QUP_P |
6195 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_XP_P |
6196 | 59.3k | 65U, // EE_VMULAS_U8_QACC_LD_XP_QUP_P |
6197 | 59.3k | 0U, // EE_VMULAS_U8_QACC_P |
6198 | 59.3k | 0U, // EE_VMUL_S16_LD_INCP_P |
6199 | 59.3k | 0U, // EE_VMUL_S16_P |
6200 | 59.3k | 0U, // EE_VMUL_S16_ST_INCP_P |
6201 | 59.3k | 0U, // EE_VMUL_S8_LD_INCP_P |
6202 | 59.3k | 0U, // EE_VMUL_S8_P |
6203 | 59.3k | 0U, // EE_VMUL_S8_ST_INCP_P |
6204 | 59.3k | 0U, // EE_VMUL_U16_LD_INCP_P |
6205 | 59.3k | 0U, // EE_VMUL_U16_P |
6206 | 59.3k | 0U, // EE_VMUL_U16_ST_INCP_P |
6207 | 59.3k | 0U, // EE_VMUL_U8_LD_INCP_P |
6208 | 59.3k | 0U, // EE_VMUL_U8_P |
6209 | 59.3k | 0U, // EE_VMUL_U8_ST_INCP_P |
6210 | 59.3k | 0U, // EE_VPRELU_S16_P |
6211 | 59.3k | 0U, // EE_VPRELU_S8_P |
6212 | 59.3k | 0U, // EE_VRELU_S16_P |
6213 | 59.3k | 0U, // EE_VRELU_S8_P |
6214 | 59.3k | 0U, // EE_VSL_32_P |
6215 | 59.3k | 0U, // EE_VSMULAS_S16_QACC_LD_INCP_P |
6216 | 59.3k | 0U, // EE_VSMULAS_S16_QACC_P |
6217 | 59.3k | 0U, // EE_VSMULAS_S8_QACC_LD_INCP_P |
6218 | 59.3k | 0U, // EE_VSMULAS_S8_QACC_P |
6219 | 59.3k | 0U, // EE_VSR_32_P |
6220 | 59.3k | 0U, // EE_VST_128_IP_P |
6221 | 59.3k | 0U, // EE_VST_128_XP_P |
6222 | 59.3k | 0U, // EE_VST_H_64_IP_P |
6223 | 59.3k | 0U, // EE_VST_H_64_XP_P |
6224 | 59.3k | 0U, // EE_VST_L_64_IP_P |
6225 | 59.3k | 0U, // EE_VST_L_64_XP_P |
6226 | 59.3k | 0U, // EE_VSUBS_S16_LD_INCP_P |
6227 | 59.3k | 0U, // EE_VSUBS_S16_P |
6228 | 59.3k | 0U, // EE_VSUBS_S16_ST_INCP_P |
6229 | 59.3k | 0U, // EE_VSUBS_S32_LD_INCP_P |
6230 | 59.3k | 0U, // EE_VSUBS_S32_P |
6231 | 59.3k | 0U, // EE_VSUBS_S32_ST_INCP_P |
6232 | 59.3k | 0U, // EE_VSUBS_S8_LD_INCP_P |
6233 | 59.3k | 0U, // EE_VSUBS_S8_P |
6234 | 59.3k | 0U, // EE_VSUBS_S8_ST_INCP_P |
6235 | 59.3k | 0U, // EE_VUNZIP_16_P |
6236 | 59.3k | 0U, // EE_VUNZIP_32_P |
6237 | 59.3k | 0U, // EE_VUNZIP_8_P |
6238 | 59.3k | 0U, // EE_VZIP_16_P |
6239 | 59.3k | 0U, // EE_VZIP_32_P |
6240 | 59.3k | 0U, // EE_VZIP_8_P |
6241 | 59.3k | 0U, // EE_XORQ_P |
6242 | 59.3k | 0U, // EE_ZERO_ACCX_P |
6243 | 59.3k | 0U, // EE_ZERO_QACC_P |
6244 | 59.3k | 0U, // EE_ZERO_Q_P |
6245 | 59.3k | 0U, // EXTUI_BR2_P |
6246 | 59.3k | 0U, // EXTUI_BR4_P |
6247 | 59.3k | 0U, // EXTUI_BR_P |
6248 | 59.3k | 0U, // L8I_P |
6249 | 59.3k | 0U, // LDDEC_P |
6250 | 59.3k | 0U, // LDINC_P |
6251 | 59.3k | 0U, // LOOPBR |
6252 | 59.3k | 0U, // LOOPDEC |
6253 | 59.3k | 0U, // LOOPEND |
6254 | 59.3k | 0U, // LOOPINIT |
6255 | 59.3k | 0U, // LOOPSTART |
6256 | 59.3k | 0U, // MOVBA2_P |
6257 | 59.3k | 0U, // MOVBA2_P2 |
6258 | 59.3k | 0U, // MOVBA4_P |
6259 | 59.3k | 0U, // MOVBA4_P2 |
6260 | 59.3k | 0U, // MOVBA_P |
6261 | 59.3k | 0U, // MOVBA_P2 |
6262 | 59.3k | 0U, // MULA_DA_HH_LDDEC_P |
6263 | 59.3k | 0U, // MULA_DA_HH_LDINC_P |
6264 | 59.3k | 0U, // MULA_DA_HL_LDDEC_P |
6265 | 59.3k | 0U, // MULA_DA_HL_LDINC_P |
6266 | 59.3k | 0U, // MULA_DA_LH_LDDEC_P |
6267 | 59.3k | 0U, // MULA_DA_LH_LDINC_P |
6268 | 59.3k | 0U, // MULA_DA_LL_LDDEC_P |
6269 | 59.3k | 0U, // MULA_DA_LL_LDINC_P |
6270 | 59.3k | 0U, // MULA_DD_HH_LDDEC_P |
6271 | 59.3k | 0U, // MULA_DD_HH_LDINC_P |
6272 | 59.3k | 0U, // MULA_DD_HL_LDDEC_P |
6273 | 59.3k | 0U, // MULA_DD_HL_LDINC_P |
6274 | 59.3k | 0U, // MULA_DD_LH_LDDEC_P |
6275 | 59.3k | 0U, // MULA_DD_LH_LDINC_P |
6276 | 59.3k | 0U, // MULA_DD_LL_LDDEC_P |
6277 | 59.3k | 0U, // MULA_DD_LL_LDINC_P |
6278 | 59.3k | 0U, // RESTORE_BOOL |
6279 | 59.3k | 4U, // SELECT |
6280 | 59.3k | 4U, // SELECT_CC_FP_FP |
6281 | 59.3k | 4U, // SELECT_CC_FP_INT |
6282 | 59.3k | 4U, // SELECT_CC_INT_FP |
6283 | 59.3k | 0U, // SLLI_BR_P |
6284 | 59.3k | 0U, // SLL_P |
6285 | 59.3k | 0U, // SPILL_BOOL |
6286 | 59.3k | 0U, // SRA_P |
6287 | 59.3k | 0U, // SRL_P |
6288 | 59.3k | 0U, // WSR_ACCHI_P |
6289 | 59.3k | 0U, // WSR_ACCLO_P |
6290 | 59.3k | 0U, // WSR_M0_P |
6291 | 59.3k | 0U, // WSR_M1_P |
6292 | 59.3k | 0U, // WSR_M2_P |
6293 | 59.3k | 0U, // WSR_M3_P |
6294 | 59.3k | 0U, // XSR_ACCHI_P |
6295 | 59.3k | 0U, // XSR_ACCLO_P |
6296 | 59.3k | 0U, // XSR_M0_P |
6297 | 59.3k | 0U, // XSR_M1_P |
6298 | 59.3k | 0U, // XSR_M2_P |
6299 | 59.3k | 0U, // XSR_M3_P |
6300 | 59.3k | 0U, // mv_QR_P |
6301 | 59.3k | 0U, // ABS |
6302 | 59.3k | 0U, // ABS_S |
6303 | 59.3k | 0U, // ADD |
6304 | 59.3k | 0U, // ADDEXPM_S |
6305 | 59.3k | 0U, // ADDEXP_S |
6306 | 59.3k | 0U, // ADDI |
6307 | 59.3k | 0U, // ADDI_N |
6308 | 59.3k | 0U, // ADDMI |
6309 | 59.3k | 0U, // ADDX2 |
6310 | 59.3k | 0U, // ADDX4 |
6311 | 59.3k | 0U, // ADDX8 |
6312 | 59.3k | 0U, // ADD_N |
6313 | 59.3k | 0U, // ADD_S |
6314 | 59.3k | 0U, // AE_ABS16S |
6315 | 59.3k | 0U, // AE_ABS24S |
6316 | 59.3k | 0U, // AE_ABS32 |
6317 | 59.3k | 0U, // AE_ABS32S |
6318 | 59.3k | 0U, // AE_ABS64 |
6319 | 59.3k | 0U, // AE_ABS64S |
6320 | 59.3k | 0U, // AE_ADD16 |
6321 | 59.3k | 0U, // AE_ADD16S |
6322 | 59.3k | 0U, // AE_ADD24S |
6323 | 59.3k | 0U, // AE_ADD32 |
6324 | 59.3k | 0U, // AE_ADD32S |
6325 | 59.3k | 0U, // AE_ADD32_HL_LH |
6326 | 59.3k | 0U, // AE_ADD64 |
6327 | 59.3k | 0U, // AE_ADD64S |
6328 | 59.3k | 0U, // AE_ADDBRBA32 |
6329 | 59.3k | 0U, // AE_ADDSUB32 |
6330 | 59.3k | 0U, // AE_ADDSUB32S |
6331 | 59.3k | 0U, // AE_AND |
6332 | 59.3k | 0U, // AE_CVT32X2F16_10 |
6333 | 59.3k | 0U, // AE_CVT32X2F16_32 |
6334 | 59.3k | 0U, // AE_CVT48A32 |
6335 | 59.3k | 0U, // AE_CVT64A32 |
6336 | 59.3k | 0U, // AE_CVT64F32_H |
6337 | 59.3k | 0U, // AE_CVTA32F24S_H |
6338 | 59.3k | 0U, // AE_CVTA32F24S_L |
6339 | 59.3k | 0U, // AE_CVTQ56A32S |
6340 | 59.3k | 0U, // AE_CVTQ56P32S_H |
6341 | 59.3k | 0U, // AE_CVTQ56P32S_L |
6342 | 59.3k | 0U, // AE_DB |
6343 | 59.3k | 0U, // AE_DBI |
6344 | 59.3k | 0U, // AE_DBI_IC |
6345 | 59.3k | 0U, // AE_DBI_IP |
6346 | 59.3k | 0U, // AE_DB_IC |
6347 | 59.3k | 0U, // AE_DB_IP |
6348 | 59.3k | 0U, // AE_DIV64D32_H |
6349 | 59.3k | 0U, // AE_DIV64D32_L |
6350 | 59.3k | 0U, // AE_EQ16 |
6351 | 59.3k | 0U, // AE_EQ32 |
6352 | 59.3k | 0U, // AE_EQ64 |
6353 | 59.3k | 0U, // AE_L16M_I |
6354 | 59.3k | 0U, // AE_L16M_IU |
6355 | 59.3k | 0U, // AE_L16M_X |
6356 | 59.3k | 0U, // AE_L16M_XC |
6357 | 59.3k | 0U, // AE_L16M_XU |
6358 | 59.3k | 0U, // AE_L16X2M_I |
6359 | 59.3k | 0U, // AE_L16X2M_IU |
6360 | 59.3k | 0U, // AE_L16X2M_X |
6361 | 59.3k | 0U, // AE_L16X2M_XC |
6362 | 59.3k | 0U, // AE_L16X2M_XU |
6363 | 59.3k | 0U, // AE_L16X4_I |
6364 | 59.3k | 0U, // AE_L16X4_IP |
6365 | 59.3k | 0U, // AE_L16X4_RIC |
6366 | 59.3k | 0U, // AE_L16X4_RIP |
6367 | 59.3k | 0U, // AE_L16X4_X |
6368 | 59.3k | 0U, // AE_L16X4_XC |
6369 | 59.3k | 0U, // AE_L16X4_XP |
6370 | 59.3k | 0U, // AE_L16_I |
6371 | 59.3k | 0U, // AE_L16_IP |
6372 | 59.3k | 0U, // AE_L16_X |
6373 | 59.3k | 0U, // AE_L16_XC |
6374 | 59.3k | 0U, // AE_L16_XP |
6375 | 59.3k | 0U, // AE_L32F24_I |
6376 | 59.3k | 0U, // AE_L32F24_IP |
6377 | 59.3k | 0U, // AE_L32F24_X |
6378 | 59.3k | 0U, // AE_L32F24_XC |
6379 | 59.3k | 0U, // AE_L32F24_XP |
6380 | 59.3k | 0U, // AE_L32M_I |
6381 | 59.3k | 0U, // AE_L32M_IU |
6382 | 59.3k | 0U, // AE_L32M_X |
6383 | 59.3k | 0U, // AE_L32M_XC |
6384 | 59.3k | 0U, // AE_L32M_XU |
6385 | 59.3k | 0U, // AE_L32X2F24_I |
6386 | 59.3k | 0U, // AE_L32X2F24_IP |
6387 | 59.3k | 0U, // AE_L32X2F24_RIC |
6388 | 59.3k | 0U, // AE_L32X2F24_RIP |
6389 | 59.3k | 0U, // AE_L32X2F24_X |
6390 | 59.3k | 0U, // AE_L32X2F24_XC |
6391 | 59.3k | 0U, // AE_L32X2F24_XP |
6392 | 59.3k | 0U, // AE_L32X2_I |
6393 | 59.3k | 0U, // AE_L32X2_IP |
6394 | 59.3k | 0U, // AE_L32X2_RIC |
6395 | 59.3k | 0U, // AE_L32X2_RIP |
6396 | 59.3k | 0U, // AE_L32X2_X |
6397 | 59.3k | 0U, // AE_L32X2_XC |
6398 | 59.3k | 0U, // AE_L32X2_XP |
6399 | 59.3k | 0U, // AE_L32_I |
6400 | 59.3k | 0U, // AE_L32_IP |
6401 | 59.3k | 0U, // AE_L32_X |
6402 | 59.3k | 0U, // AE_L32_XC |
6403 | 59.3k | 0U, // AE_L32_XP |
6404 | 59.3k | 0U, // AE_L64_I |
6405 | 59.3k | 0U, // AE_L64_IP |
6406 | 59.3k | 0U, // AE_L64_X |
6407 | 59.3k | 0U, // AE_L64_XC |
6408 | 59.3k | 0U, // AE_L64_XP |
6409 | 59.3k | 0U, // AE_LA16X4NEG_PC |
6410 | 59.3k | 0U, // AE_LA16X4POS_PC |
6411 | 59.3k | 0U, // AE_LA16X4_IC |
6412 | 59.3k | 0U, // AE_LA16X4_IP |
6413 | 59.3k | 0U, // AE_LA16X4_RIC |
6414 | 59.3k | 0U, // AE_LA16X4_RIP |
6415 | 59.3k | 0U, // AE_LA24NEG_PC |
6416 | 59.3k | 0U, // AE_LA24POS_PC |
6417 | 59.3k | 0U, // AE_LA24X2NEG_PC |
6418 | 59.3k | 0U, // AE_LA24X2POS_PC |
6419 | 59.3k | 0U, // AE_LA24X2_IC |
6420 | 59.3k | 0U, // AE_LA24X2_IP |
6421 | 59.3k | 0U, // AE_LA24X2_RIC |
6422 | 59.3k | 0U, // AE_LA24X2_RIP |
6423 | 59.3k | 0U, // AE_LA24_IC |
6424 | 59.3k | 0U, // AE_LA24_IP |
6425 | 59.3k | 0U, // AE_LA24_RIC |
6426 | 59.3k | 0U, // AE_LA24_RIP |
6427 | 59.3k | 0U, // AE_LA32X2F24_IC |
6428 | 59.3k | 0U, // AE_LA32X2F24_IP |
6429 | 59.3k | 0U, // AE_LA32X2F24_RIC |
6430 | 59.3k | 0U, // AE_LA32X2F24_RIP |
6431 | 59.3k | 0U, // AE_LA32X2NEG_PC |
6432 | 59.3k | 0U, // AE_LA32X2POS_PC |
6433 | 59.3k | 0U, // AE_LA32X2_IC |
6434 | 59.3k | 0U, // AE_LA32X2_IP |
6435 | 59.3k | 0U, // AE_LA32X2_RIC |
6436 | 59.3k | 0U, // AE_LA32X2_RIP |
6437 | 59.3k | 0U, // AE_LA64_PP |
6438 | 59.3k | 0U, // AE_LALIGN64_I |
6439 | 59.3k | 0U, // AE_LB |
6440 | 59.3k | 0U, // AE_LBI |
6441 | 59.3k | 0U, // AE_LBK |
6442 | 59.3k | 0U, // AE_LBKI |
6443 | 59.3k | 0U, // AE_LBS |
6444 | 59.3k | 0U, // AE_LBSI |
6445 | 59.3k | 0U, // AE_LE16 |
6446 | 59.3k | 0U, // AE_LE32 |
6447 | 59.3k | 0U, // AE_LE64 |
6448 | 59.3k | 0U, // AE_LT16 |
6449 | 59.3k | 0U, // AE_LT32 |
6450 | 59.3k | 0U, // AE_LT64 |
6451 | 59.3k | 0U, // AE_MAX32 |
6452 | 59.3k | 0U, // AE_MAX64 |
6453 | 59.3k | 0U, // AE_MAXABS32S |
6454 | 59.3k | 0U, // AE_MAXABS64S |
6455 | 59.3k | 0U, // AE_MIN32 |
6456 | 59.3k | 0U, // AE_MIN64 |
6457 | 59.3k | 0U, // AE_MINABS32S |
6458 | 59.3k | 0U, // AE_MINABS64S |
6459 | 59.3k | 0U, // AE_MOV |
6460 | 59.3k | 0U, // AE_MOVAD16_0 |
6461 | 59.3k | 0U, // AE_MOVAD16_1 |
6462 | 59.3k | 0U, // AE_MOVAD16_2 |
6463 | 59.3k | 0U, // AE_MOVAD16_3 |
6464 | 59.3k | 0U, // AE_MOVAD32_H |
6465 | 59.3k | 0U, // AE_MOVAD32_L |
6466 | 59.3k | 0U, // AE_MOVALIGN |
6467 | 59.3k | 0U, // AE_MOVDA16 |
6468 | 59.3k | 0U, // AE_MOVDA16X2 |
6469 | 59.3k | 0U, // AE_MOVDA32 |
6470 | 59.3k | 0U, // AE_MOVDA32X2 |
6471 | 59.3k | 0U, // AE_MOVF16X4 |
6472 | 59.3k | 0U, // AE_MOVF32X2 |
6473 | 59.3k | 0U, // AE_MOVF64 |
6474 | 59.3k | 0U, // AE_MOVI |
6475 | 59.3k | 0U, // AE_MOVT16X4 |
6476 | 59.3k | 0U, // AE_MOVT32X2 |
6477 | 59.3k | 0U, // AE_MOVT64 |
6478 | 59.3k | 0U, // AE_MUL16X4 |
6479 | 59.3k | 0U, // AE_MUL32U_LL |
6480 | 59.3k | 0U, // AE_MUL32X16_H0 |
6481 | 59.3k | 0U, // AE_MUL32X16_H0_S2 |
6482 | 59.3k | 0U, // AE_MUL32X16_H1 |
6483 | 59.3k | 0U, // AE_MUL32X16_H1_S2 |
6484 | 59.3k | 0U, // AE_MUL32X16_H2 |
6485 | 59.3k | 0U, // AE_MUL32X16_H2_S2 |
6486 | 59.3k | 0U, // AE_MUL32X16_H3 |
6487 | 59.3k | 0U, // AE_MUL32X16_H3_S2 |
6488 | 59.3k | 0U, // AE_MUL32X16_L0 |
6489 | 59.3k | 0U, // AE_MUL32X16_L0_S2 |
6490 | 59.3k | 0U, // AE_MUL32X16_L1 |
6491 | 59.3k | 0U, // AE_MUL32X16_L1_S2 |
6492 | 59.3k | 0U, // AE_MUL32X16_L2 |
6493 | 59.3k | 0U, // AE_MUL32X16_L2_S2 |
6494 | 59.3k | 0U, // AE_MUL32X16_L3 |
6495 | 59.3k | 0U, // AE_MUL32X16_L3_S2 |
6496 | 59.3k | 0U, // AE_MUL32_HH |
6497 | 59.3k | 0U, // AE_MUL32_LH |
6498 | 59.3k | 0U, // AE_MUL32_LL |
6499 | 59.3k | 0U, // AE_MUL32_LL_S2 |
6500 | 59.3k | 0U, // AE_MULA16X4 |
6501 | 59.3k | 0U, // AE_MULA32U_LL |
6502 | 59.3k | 0U, // AE_MULA32X16_H0 |
6503 | 59.3k | 0U, // AE_MULA32X16_H0_S2 |
6504 | 59.3k | 0U, // AE_MULA32X16_H1 |
6505 | 59.3k | 0U, // AE_MULA32X16_H1_S2 |
6506 | 59.3k | 0U, // AE_MULA32X16_H2 |
6507 | 59.3k | 0U, // AE_MULA32X16_H2_S2 |
6508 | 59.3k | 0U, // AE_MULA32X16_H3 |
6509 | 59.3k | 0U, // AE_MULA32X16_H3_S2 |
6510 | 59.3k | 0U, // AE_MULA32X16_L0 |
6511 | 59.3k | 0U, // AE_MULA32X16_L0_S2 |
6512 | 59.3k | 0U, // AE_MULA32X16_L1 |
6513 | 59.3k | 0U, // AE_MULA32X16_L1_S2 |
6514 | 59.3k | 0U, // AE_MULA32X16_L2 |
6515 | 59.3k | 0U, // AE_MULA32X16_L2_S2 |
6516 | 59.3k | 0U, // AE_MULA32X16_L3 |
6517 | 59.3k | 0U, // AE_MULA32X16_L3_S2 |
6518 | 59.3k | 0U, // AE_MULA32_HH |
6519 | 59.3k | 0U, // AE_MULA32_LH |
6520 | 59.3k | 0U, // AE_MULA32_LL |
6521 | 59.3k | 0U, // AE_MULA32_LL_S2 |
6522 | 59.3k | 0U, // AE_MULAAD24_HH_LL |
6523 | 59.3k | 0U, // AE_MULAAD24_HH_LL_S2 |
6524 | 59.3k | 0U, // AE_MULAAD24_HL_LH |
6525 | 59.3k | 0U, // AE_MULAAD24_HL_LH_S2 |
6526 | 59.3k | 0U, // AE_MULAAD32X16_H0_L1 |
6527 | 59.3k | 0U, // AE_MULAAD32X16_H0_L1_S2 |
6528 | 59.3k | 0U, // AE_MULAAD32X16_H1_L0 |
6529 | 59.3k | 0U, // AE_MULAAD32X16_H1_L0_S2 |
6530 | 59.3k | 0U, // AE_MULAAD32X16_H2_L3 |
6531 | 59.3k | 0U, // AE_MULAAD32X16_H2_L3_S2 |
6532 | 59.3k | 0U, // AE_MULAAD32X16_H3_L2 |
6533 | 59.3k | 0U, // AE_MULAAD32X16_H3_L2_S2 |
6534 | 59.3k | 0U, // AE_MULAAFD16SS_11_00 |
6535 | 59.3k | 0U, // AE_MULAAFD16SS_11_00_S2 |
6536 | 59.3k | 0U, // AE_MULAAFD16SS_13_02 |
6537 | 59.3k | 0U, // AE_MULAAFD16SS_13_02_S2 |
6538 | 59.3k | 0U, // AE_MULAAFD16SS_33_22 |
6539 | 59.3k | 0U, // AE_MULAAFD16SS_33_22_S2 |
6540 | 59.3k | 0U, // AE_MULAAFD24_HH_LL |
6541 | 59.3k | 0U, // AE_MULAAFD24_HH_LL_S2 |
6542 | 59.3k | 0U, // AE_MULAAFD24_HL_LH |
6543 | 59.3k | 0U, // AE_MULAAFD24_HL_LH_S2 |
6544 | 59.3k | 0U, // AE_MULAAFD32X16_H0_L1 |
6545 | 59.3k | 0U, // AE_MULAAFD32X16_H0_L1_S2 |
6546 | 59.3k | 0U, // AE_MULAAFD32X16_H1_L0 |
6547 | 59.3k | 0U, // AE_MULAAFD32X16_H1_L0_S2 |
6548 | 59.3k | 0U, // AE_MULAAFD32X16_H2_L3 |
6549 | 59.3k | 0U, // AE_MULAAFD32X16_H2_L3_S2 |
6550 | 59.3k | 0U, // AE_MULAAFD32X16_H3_L2 |
6551 | 59.3k | 0U, // AE_MULAAFD32X16_H3_L2_S2 |
6552 | 59.3k | 0U, // AE_MULAC24 |
6553 | 59.3k | 0U, // AE_MULAC32X16_H |
6554 | 59.3k | 0U, // AE_MULAC32X16_L |
6555 | 59.3k | 0U, // AE_MULAF16SS_00 |
6556 | 59.3k | 0U, // AE_MULAF16SS_00_S2 |
6557 | 59.3k | 0U, // AE_MULAF16SS_10 |
6558 | 59.3k | 0U, // AE_MULAF16SS_11 |
6559 | 59.3k | 0U, // AE_MULAF16SS_20 |
6560 | 59.3k | 0U, // AE_MULAF16SS_21 |
6561 | 59.3k | 0U, // AE_MULAF16SS_22 |
6562 | 59.3k | 0U, // AE_MULAF16SS_30 |
6563 | 59.3k | 0U, // AE_MULAF16SS_31 |
6564 | 59.3k | 0U, // AE_MULAF16SS_32 |
6565 | 59.3k | 0U, // AE_MULAF16SS_33 |
6566 | 59.3k | 0U, // AE_MULAF16X4SS |
6567 | 59.3k | 0U, // AE_MULAF32R_HH |
6568 | 59.3k | 0U, // AE_MULAF32R_LH |
6569 | 59.3k | 0U, // AE_MULAF32R_LL |
6570 | 59.3k | 0U, // AE_MULAF32R_LL_S2 |
6571 | 59.3k | 0U, // AE_MULAF32S_HH |
6572 | 59.3k | 0U, // AE_MULAF32S_LH |
6573 | 59.3k | 0U, // AE_MULAF32S_LL |
6574 | 59.3k | 0U, // AE_MULAF32S_LL_S2 |
6575 | 59.3k | 0U, // AE_MULAF32X16_H0 |
6576 | 59.3k | 0U, // AE_MULAF32X16_H0_S2 |
6577 | 59.3k | 0U, // AE_MULAF32X16_H1 |
6578 | 59.3k | 0U, // AE_MULAF32X16_H1_S2 |
6579 | 59.3k | 0U, // AE_MULAF32X16_H2 |
6580 | 59.3k | 0U, // AE_MULAF32X16_H2_S2 |
6581 | 59.3k | 0U, // AE_MULAF32X16_H3 |
6582 | 59.3k | 0U, // AE_MULAF32X16_H3_S2 |
6583 | 59.3k | 0U, // AE_MULAF32X16_L0 |
6584 | 59.3k | 0U, // AE_MULAF32X16_L0_S2 |
6585 | 59.3k | 0U, // AE_MULAF32X16_L1 |
6586 | 59.3k | 0U, // AE_MULAF32X16_L1_S2 |
6587 | 59.3k | 0U, // AE_MULAF32X16_L2 |
6588 | 59.3k | 0U, // AE_MULAF32X16_L2_S2 |
6589 | 59.3k | 0U, // AE_MULAF32X16_L3 |
6590 | 59.3k | 0U, // AE_MULAF32X16_L3_S2 |
6591 | 59.3k | 0U, // AE_MULAF48Q32SP16S_L |
6592 | 59.3k | 0U, // AE_MULAF48Q32SP16S_L_S2 |
6593 | 59.3k | 0U, // AE_MULAF48Q32SP16U_L |
6594 | 59.3k | 0U, // AE_MULAF48Q32SP16U_L_S2 |
6595 | 59.3k | 0U, // AE_MULAFC24RA |
6596 | 59.3k | 0U, // AE_MULAFC32X16RAS_H |
6597 | 59.3k | 0U, // AE_MULAFC32X16RAS_L |
6598 | 59.3k | 0U, // AE_MULAFD24X2_FIR_H |
6599 | 59.3k | 0U, // AE_MULAFD24X2_FIR_L |
6600 | 59.3k | 0U, // AE_MULAFD32X16X2_FIR_HH |
6601 | 59.3k | 0U, // AE_MULAFD32X16X2_FIR_HL |
6602 | 59.3k | 0U, // AE_MULAFD32X16X2_FIR_LH |
6603 | 59.3k | 0U, // AE_MULAFD32X16X2_FIR_LL |
6604 | 59.3k | 0U, // AE_MULAFP24X2R |
6605 | 59.3k | 0U, // AE_MULAFP24X2RA |
6606 | 59.3k | 0U, // AE_MULAFP24X2RA_S2 |
6607 | 59.3k | 0U, // AE_MULAFP24X2R_S2 |
6608 | 59.3k | 0U, // AE_MULAFP32X16X2RAS_H |
6609 | 59.3k | 0U, // AE_MULAFP32X16X2RAS_H_S2 |
6610 | 59.3k | 0U, // AE_MULAFP32X16X2RAS_L |
6611 | 59.3k | 0U, // AE_MULAFP32X16X2RAS_L_S2 |
6612 | 59.3k | 0U, // AE_MULAFP32X16X2RS_H |
6613 | 59.3k | 0U, // AE_MULAFP32X16X2RS_H_S2 |
6614 | 59.3k | 0U, // AE_MULAFP32X16X2RS_L |
6615 | 59.3k | 0U, // AE_MULAFP32X16X2RS_L_S2 |
6616 | 59.3k | 0U, // AE_MULAFP32X2RAS |
6617 | 59.3k | 0U, // AE_MULAFP32X2RS |
6618 | 59.3k | 0U, // AE_MULAFQ32SP24S_H_S2 |
6619 | 59.3k | 0U, // AE_MULAFQ32SP24S_L_S2 |
6620 | 59.3k | 0U, // AE_MULAP24X2 |
6621 | 59.3k | 0U, // AE_MULAP24X2_S2 |
6622 | 59.3k | 0U, // AE_MULAP32X16X2_H |
6623 | 59.3k | 0U, // AE_MULAP32X16X2_L |
6624 | 59.3k | 0U, // AE_MULAP32X2 |
6625 | 59.3k | 0U, // AE_MULAQ32SP16S_L_S2 |
6626 | 59.3k | 0U, // AE_MULAQ32SP16U_L_S2 |
6627 | 59.3k | 0U, // AE_MULARFQ32SP24S_H_S2 |
6628 | 59.3k | 0U, // AE_MULARFQ32SP24S_L_S2 |
6629 | 59.3k | 0U, // AE_MULAS32F48P16S_HH |
6630 | 59.3k | 0U, // AE_MULAS32F48P16S_HH_S2 |
6631 | 59.3k | 0U, // AE_MULAS32F48P16S_LH |
6632 | 59.3k | 0U, // AE_MULAS32F48P16S_LH_S2 |
6633 | 59.3k | 0U, // AE_MULAS32F48P16S_LL |
6634 | 59.3k | 0U, // AE_MULAS32F48P16S_LL_S2 |
6635 | 59.3k | 0U, // AE_MULASD24_HH_LL |
6636 | 59.3k | 0U, // AE_MULASD24_HH_LL_S2 |
6637 | 59.3k | 0U, // AE_MULASD24_HL_LH |
6638 | 59.3k | 0U, // AE_MULASD24_HL_LH_S2 |
6639 | 59.3k | 0U, // AE_MULASD32X16_H1_L0 |
6640 | 59.3k | 0U, // AE_MULASD32X16_H1_L0_S2 |
6641 | 59.3k | 0U, // AE_MULASD32X16_H3_L2 |
6642 | 59.3k | 0U, // AE_MULASD32X16_H3_L2_S2 |
6643 | 59.3k | 0U, // AE_MULASFD24_HH_LL |
6644 | 59.3k | 0U, // AE_MULASFD24_HH_LL_S2 |
6645 | 59.3k | 0U, // AE_MULASFD24_HL_LH |
6646 | 59.3k | 0U, // AE_MULASFD24_HL_LH_S2 |
6647 | 59.3k | 0U, // AE_MULASFD32X16_H1_L0 |
6648 | 59.3k | 0U, // AE_MULASFD32X16_H1_L0_S2 |
6649 | 59.3k | 0U, // AE_MULASFD32X16_H3_L2 |
6650 | 59.3k | 0U, // AE_MULASFD32X16_H3_L2_S2 |
6651 | 59.3k | 0U, // AE_MULC24 |
6652 | 59.3k | 0U, // AE_MULC32X16_H |
6653 | 59.3k | 0U, // AE_MULC32X16_L |
6654 | 59.3k | 0U, // AE_MULF16SS_00 |
6655 | 59.3k | 0U, // AE_MULF16SS_00_S2 |
6656 | 59.3k | 0U, // AE_MULF16SS_10 |
6657 | 59.3k | 0U, // AE_MULF16SS_11 |
6658 | 59.3k | 0U, // AE_MULF16SS_20 |
6659 | 59.3k | 0U, // AE_MULF16SS_21 |
6660 | 59.3k | 0U, // AE_MULF16SS_22 |
6661 | 59.3k | 0U, // AE_MULF16SS_30 |
6662 | 59.3k | 0U, // AE_MULF16SS_31 |
6663 | 59.3k | 0U, // AE_MULF16SS_32 |
6664 | 59.3k | 0U, // AE_MULF16SS_33 |
6665 | 59.3k | 0U, // AE_MULF16X4SS |
6666 | 59.3k | 0U, // AE_MULF32R_HH |
6667 | 59.3k | 0U, // AE_MULF32R_LH |
6668 | 59.3k | 0U, // AE_MULF32R_LL |
6669 | 59.3k | 0U, // AE_MULF32R_LL_S2 |
6670 | 59.3k | 0U, // AE_MULF32S_HH |
6671 | 59.3k | 0U, // AE_MULF32S_LH |
6672 | 59.3k | 0U, // AE_MULF32S_LL |
6673 | 59.3k | 0U, // AE_MULF32S_LL_S2 |
6674 | 59.3k | 0U, // AE_MULF32X16_H0 |
6675 | 59.3k | 0U, // AE_MULF32X16_H0_S2 |
6676 | 59.3k | 0U, // AE_MULF32X16_H1 |
6677 | 59.3k | 0U, // AE_MULF32X16_H1_S2 |
6678 | 59.3k | 0U, // AE_MULF32X16_H2 |
6679 | 59.3k | 0U, // AE_MULF32X16_H2_S2 |
6680 | 59.3k | 0U, // AE_MULF32X16_H3 |
6681 | 59.3k | 0U, // AE_MULF32X16_H3_S2 |
6682 | 59.3k | 0U, // AE_MULF32X16_L0 |
6683 | 59.3k | 0U, // AE_MULF32X16_L0_S2 |
6684 | 59.3k | 0U, // AE_MULF32X16_L1 |
6685 | 59.3k | 0U, // AE_MULF32X16_L1_S2 |
6686 | 59.3k | 0U, // AE_MULF32X16_L2 |
6687 | 59.3k | 0U, // AE_MULF32X16_L2_S2 |
6688 | 59.3k | 0U, // AE_MULF32X16_L3 |
6689 | 59.3k | 0U, // AE_MULF32X16_L3_S2 |
6690 | 59.3k | 0U, // AE_MULF48Q32SP16S_L |
6691 | 59.3k | 0U, // AE_MULF48Q32SP16S_L_S2 |
6692 | 59.3k | 0U, // AE_MULF48Q32SP16U_L |
6693 | 59.3k | 0U, // AE_MULF48Q32SP16U_L_S2 |
6694 | 59.3k | 0U, // AE_MULFC24RA |
6695 | 59.3k | 0U, // AE_MULFC32X16RAS_H |
6696 | 59.3k | 0U, // AE_MULFC32X16RAS_L |
6697 | 59.3k | 0U, // AE_MULFD24X2_FIR_H |
6698 | 59.3k | 0U, // AE_MULFD24X2_FIR_L |
6699 | 59.3k | 0U, // AE_MULFD32X16X2_FIR_HH |
6700 | 59.3k | 0U, // AE_MULFD32X16X2_FIR_HL |
6701 | 59.3k | 0U, // AE_MULFD32X16X2_FIR_LH |
6702 | 59.3k | 0U, // AE_MULFD32X16X2_FIR_LL |
6703 | 59.3k | 0U, // AE_MULFP16X4RAS |
6704 | 59.3k | 0U, // AE_MULFP16X4S |
6705 | 59.3k | 0U, // AE_MULFP24X2R |
6706 | 59.3k | 0U, // AE_MULFP24X2RA |
6707 | 59.3k | 0U, // AE_MULFP24X2RA_S2 |
6708 | 59.3k | 0U, // AE_MULFP24X2R_S2 |
6709 | 59.3k | 0U, // AE_MULFP32X16X2RAS_H |
6710 | 59.3k | 0U, // AE_MULFP32X16X2RAS_H_S2 |
6711 | 59.3k | 0U, // AE_MULFP32X16X2RAS_L |
6712 | 59.3k | 0U, // AE_MULFP32X16X2RAS_L_S2 |
6713 | 59.3k | 0U, // AE_MULFP32X16X2RS_H |
6714 | 59.3k | 0U, // AE_MULFP32X16X2RS_H_S2 |
6715 | 59.3k | 0U, // AE_MULFP32X16X2RS_L |
6716 | 59.3k | 0U, // AE_MULFP32X16X2RS_L_S2 |
6717 | 59.3k | 0U, // AE_MULFP32X2RAS |
6718 | 59.3k | 0U, // AE_MULFP32X2RS |
6719 | 59.3k | 0U, // AE_MULFQ32SP24S_H_S2 |
6720 | 59.3k | 0U, // AE_MULFQ32SP24S_L_S2 |
6721 | 59.3k | 0U, // AE_MULP24X2 |
6722 | 59.3k | 0U, // AE_MULP24X2_S2 |
6723 | 59.3k | 0U, // AE_MULP32X16X2_H |
6724 | 59.3k | 0U, // AE_MULP32X16X2_L |
6725 | 59.3k | 0U, // AE_MULP32X2 |
6726 | 59.3k | 0U, // AE_MULQ32SP16S_L_S2 |
6727 | 59.3k | 0U, // AE_MULQ32SP16U_L_S2 |
6728 | 59.3k | 0U, // AE_MULRFQ32SP24S_H_S2 |
6729 | 59.3k | 0U, // AE_MULRFQ32SP24S_L_S2 |
6730 | 59.3k | 0U, // AE_MULS16X4 |
6731 | 59.3k | 0U, // AE_MULS32F48P16S_HH |
6732 | 59.3k | 0U, // AE_MULS32F48P16S_HH_S2 |
6733 | 59.3k | 0U, // AE_MULS32F48P16S_LH |
6734 | 59.3k | 0U, // AE_MULS32F48P16S_LH_S2 |
6735 | 59.3k | 0U, // AE_MULS32F48P16S_LL |
6736 | 59.3k | 0U, // AE_MULS32F48P16S_LL_S2 |
6737 | 59.3k | 0U, // AE_MULS32U_LL |
6738 | 59.3k | 0U, // AE_MULS32X16_H0 |
6739 | 59.3k | 0U, // AE_MULS32X16_H0_S2 |
6740 | 59.3k | 0U, // AE_MULS32X16_H1 |
6741 | 59.3k | 0U, // AE_MULS32X16_H1_S2 |
6742 | 59.3k | 0U, // AE_MULS32X16_H2 |
6743 | 59.3k | 0U, // AE_MULS32X16_H2_S2 |
6744 | 59.3k | 0U, // AE_MULS32X16_H3 |
6745 | 59.3k | 0U, // AE_MULS32X16_H3_S2 |
6746 | 59.3k | 0U, // AE_MULS32X16_L0 |
6747 | 59.3k | 0U, // AE_MULS32X16_L0_S2 |
6748 | 59.3k | 0U, // AE_MULS32X16_L1 |
6749 | 59.3k | 0U, // AE_MULS32X16_L1_S2 |
6750 | 59.3k | 0U, // AE_MULS32X16_L2 |
6751 | 59.3k | 0U, // AE_MULS32X16_L2_S2 |
6752 | 59.3k | 0U, // AE_MULS32X16_L3 |
6753 | 59.3k | 0U, // AE_MULS32X16_L3_S2 |
6754 | 59.3k | 0U, // AE_MULS32_HH |
6755 | 59.3k | 0U, // AE_MULS32_LH |
6756 | 59.3k | 0U, // AE_MULS32_LL |
6757 | 59.3k | 0U, // AE_MULSAD24_HH_LL |
6758 | 59.3k | 0U, // AE_MULSAD24_HH_LL_S2 |
6759 | 59.3k | 0U, // AE_MULSAD32X16_H1_L0 |
6760 | 59.3k | 0U, // AE_MULSAD32X16_H1_L0_S2 |
6761 | 59.3k | 0U, // AE_MULSAD32X16_H3_L2 |
6762 | 59.3k | 0U, // AE_MULSAD32X16_H3_L2_S2 |
6763 | 59.3k | 0U, // AE_MULSAFD24_HH_LL |
6764 | 59.3k | 0U, // AE_MULSAFD24_HH_LL_S2 |
6765 | 59.3k | 0U, // AE_MULSAFD32X16_H1_L0 |
6766 | 59.3k | 0U, // AE_MULSAFD32X16_H1_L0_S2 |
6767 | 59.3k | 0U, // AE_MULSAFD32X16_H3_L2 |
6768 | 59.3k | 0U, // AE_MULSAFD32X16_H3_L2_S2 |
6769 | 59.3k | 0U, // AE_MULSF16SS_00 |
6770 | 59.3k | 0U, // AE_MULSF16SS_00_S2 |
6771 | 59.3k | 0U, // AE_MULSF16SS_10 |
6772 | 59.3k | 0U, // AE_MULSF16SS_11 |
6773 | 59.3k | 0U, // AE_MULSF16SS_20 |
6774 | 59.3k | 0U, // AE_MULSF16SS_21 |
6775 | 59.3k | 0U, // AE_MULSF16SS_22 |
6776 | 59.3k | 0U, // AE_MULSF16SS_30 |
6777 | 59.3k | 0U, // AE_MULSF16SS_31 |
6778 | 59.3k | 0U, // AE_MULSF16SS_32 |
6779 | 59.3k | 0U, // AE_MULSF16SS_33 |
6780 | 59.3k | 0U, // AE_MULSF16X4SS |
6781 | 59.3k | 0U, // AE_MULSF32R_HH |
6782 | 59.3k | 0U, // AE_MULSF32R_LH |
6783 | 59.3k | 0U, // AE_MULSF32R_LL |
6784 | 59.3k | 0U, // AE_MULSF32R_LL_S2 |
6785 | 59.3k | 0U, // AE_MULSF32S_HH |
6786 | 59.3k | 0U, // AE_MULSF32S_LH |
6787 | 59.3k | 0U, // AE_MULSF32S_LL |
6788 | 59.3k | 0U, // AE_MULSF32X16_H0 |
6789 | 59.3k | 0U, // AE_MULSF32X16_H0_S2 |
6790 | 59.3k | 0U, // AE_MULSF32X16_H1 |
6791 | 59.3k | 0U, // AE_MULSF32X16_H1_S2 |
6792 | 59.3k | 0U, // AE_MULSF32X16_H2 |
6793 | 59.3k | 0U, // AE_MULSF32X16_H2_S2 |
6794 | 59.3k | 0U, // AE_MULSF32X16_H3 |
6795 | 59.3k | 0U, // AE_MULSF32X16_H3_S2 |
6796 | 59.3k | 0U, // AE_MULSF32X16_L0 |
6797 | 59.3k | 0U, // AE_MULSF32X16_L0_S2 |
6798 | 59.3k | 0U, // AE_MULSF32X16_L1 |
6799 | 59.3k | 0U, // AE_MULSF32X16_L1_S2 |
6800 | 59.3k | 0U, // AE_MULSF32X16_L2 |
6801 | 59.3k | 0U, // AE_MULSF32X16_L2_S2 |
6802 | 59.3k | 0U, // AE_MULSF32X16_L3 |
6803 | 59.3k | 0U, // AE_MULSF32X16_L3_S2 |
6804 | 59.3k | 0U, // AE_MULSF48Q32SP16S_L |
6805 | 59.3k | 0U, // AE_MULSF48Q32SP16S_L_S2 |
6806 | 59.3k | 0U, // AE_MULSF48Q32SP16U_L |
6807 | 59.3k | 0U, // AE_MULSF48Q32SP16U_L_S2 |
6808 | 59.3k | 0U, // AE_MULSFP24X2R |
6809 | 59.3k | 0U, // AE_MULSFP24X2RA |
6810 | 59.3k | 0U, // AE_MULSFP24X2RA_S2 |
6811 | 59.3k | 0U, // AE_MULSFP24X2R_S2 |
6812 | 59.3k | 0U, // AE_MULSFP32X16X2RAS_H |
6813 | 59.3k | 0U, // AE_MULSFP32X16X2RAS_H_S2 |
6814 | 59.3k | 0U, // AE_MULSFP32X16X2RAS_L |
6815 | 59.3k | 0U, // AE_MULSFP32X16X2RAS_L_S2 |
6816 | 59.3k | 0U, // AE_MULSFP32X16X2RS_H |
6817 | 59.3k | 0U, // AE_MULSFP32X16X2RS_H_S2 |
6818 | 59.3k | 0U, // AE_MULSFP32X16X2RS_L |
6819 | 59.3k | 0U, // AE_MULSFP32X16X2RS_L_S2 |
6820 | 59.3k | 0U, // AE_MULSFP32X2RAS |
6821 | 59.3k | 0U, // AE_MULSFP32X2RS |
6822 | 59.3k | 0U, // AE_MULSFQ32SP24S_H_S2 |
6823 | 59.3k | 0U, // AE_MULSFQ32SP24S_L_S2 |
6824 | 59.3k | 0U, // AE_MULSP24X2 |
6825 | 59.3k | 0U, // AE_MULSP24X2_S2 |
6826 | 59.3k | 0U, // AE_MULSP32X16X2_H |
6827 | 59.3k | 0U, // AE_MULSP32X16X2_L |
6828 | 59.3k | 0U, // AE_MULSP32X2 |
6829 | 59.3k | 0U, // AE_MULSQ32SP16S_L_S2 |
6830 | 59.3k | 0U, // AE_MULSQ32SP16U_L_S2 |
6831 | 59.3k | 0U, // AE_MULSRFQ32SP24S_H_S2 |
6832 | 59.3k | 0U, // AE_MULSRFQ32SP24S_L_S2 |
6833 | 59.3k | 0U, // AE_MULSS32F48P16S_HH |
6834 | 59.3k | 0U, // AE_MULSS32F48P16S_HH_S2 |
6835 | 59.3k | 0U, // AE_MULSS32F48P16S_LH |
6836 | 59.3k | 0U, // AE_MULSS32F48P16S_LH_S2 |
6837 | 59.3k | 0U, // AE_MULSS32F48P16S_LL |
6838 | 59.3k | 0U, // AE_MULSS32F48P16S_LL_S2 |
6839 | 59.3k | 0U, // AE_MULSSD24_HH_LL |
6840 | 59.3k | 0U, // AE_MULSSD24_HH_LL_S2 |
6841 | 59.3k | 0U, // AE_MULSSD24_HL_LH |
6842 | 59.3k | 0U, // AE_MULSSD24_HL_LH_S2 |
6843 | 59.3k | 0U, // AE_MULSSD32X16_H1_L0 |
6844 | 59.3k | 0U, // AE_MULSSD32X16_H1_L0_S2 |
6845 | 59.3k | 0U, // AE_MULSSD32X16_H3_L2 |
6846 | 59.3k | 0U, // AE_MULSSD32X16_H3_L2_S2 |
6847 | 59.3k | 0U, // AE_MULSSFD16SS_11_00 |
6848 | 59.3k | 0U, // AE_MULSSFD16SS_11_00_S2 |
6849 | 59.3k | 0U, // AE_MULSSFD16SS_13_02 |
6850 | 59.3k | 0U, // AE_MULSSFD16SS_13_02_S2 |
6851 | 59.3k | 0U, // AE_MULSSFD16SS_33_22 |
6852 | 59.3k | 0U, // AE_MULSSFD16SS_33_22_S2 |
6853 | 59.3k | 0U, // AE_MULSSFD24_HH_LL |
6854 | 59.3k | 0U, // AE_MULSSFD24_HH_LL_S2 |
6855 | 59.3k | 0U, // AE_MULSSFD24_HL_LH |
6856 | 59.3k | 0U, // AE_MULSSFD24_HL_LH_S2 |
6857 | 59.3k | 0U, // AE_MULSSFD32X16_H1_L0 |
6858 | 59.3k | 0U, // AE_MULSSFD32X16_H1_L0_S2 |
6859 | 59.3k | 0U, // AE_MULSSFD32X16_H3_L2 |
6860 | 59.3k | 0U, // AE_MULSSFD32X16_H3_L2_S2 |
6861 | 59.3k | 0U, // AE_MULZAAD24_HH_LL |
6862 | 59.3k | 0U, // AE_MULZAAD24_HH_LL_S2 |
6863 | 59.3k | 0U, // AE_MULZAAD24_HL_LH |
6864 | 59.3k | 0U, // AE_MULZAAD24_HL_LH_S2 |
6865 | 59.3k | 0U, // AE_MULZAAD32X16_H0_L1 |
6866 | 59.3k | 0U, // AE_MULZAAD32X16_H0_L1_S2 |
6867 | 59.3k | 0U, // AE_MULZAAD32X16_H1_L0 |
6868 | 59.3k | 0U, // AE_MULZAAD32X16_H1_L0_S2 |
6869 | 59.3k | 0U, // AE_MULZAAD32X16_H2_L3 |
6870 | 59.3k | 0U, // AE_MULZAAD32X16_H2_L3_S2 |
6871 | 59.3k | 0U, // AE_MULZAAD32X16_H3_L2 |
6872 | 59.3k | 0U, // AE_MULZAAD32X16_H3_L2_S2 |
6873 | 59.3k | 0U, // AE_MULZAAFD16SS_11_00 |
6874 | 59.3k | 0U, // AE_MULZAAFD16SS_11_00_S2 |
6875 | 59.3k | 0U, // AE_MULZAAFD16SS_13_02 |
6876 | 59.3k | 0U, // AE_MULZAAFD16SS_13_02_S2 |
6877 | 59.3k | 0U, // AE_MULZAAFD16SS_33_22 |
6878 | 59.3k | 0U, // AE_MULZAAFD16SS_33_22_S2 |
6879 | 59.3k | 0U, // AE_MULZAAFD24_HH_LL |
6880 | 59.3k | 0U, // AE_MULZAAFD24_HH_LL_S2 |
6881 | 59.3k | 0U, // AE_MULZAAFD24_HL_LH |
6882 | 59.3k | 0U, // AE_MULZAAFD24_HL_LH_S2 |
6883 | 59.3k | 0U, // AE_MULZAAFD32X16_H0_L1 |
6884 | 59.3k | 0U, // AE_MULZAAFD32X16_H0_L1_S2 |
6885 | 59.3k | 0U, // AE_MULZAAFD32X16_H1_L0 |
6886 | 59.3k | 0U, // AE_MULZAAFD32X16_H1_L0_S2 |
6887 | 59.3k | 0U, // AE_MULZAAFD32X16_H2_L3 |
6888 | 59.3k | 0U, // AE_MULZAAFD32X16_H2_L3_S2 |
6889 | 59.3k | 0U, // AE_MULZAAFD32X16_H3_L2 |
6890 | 59.3k | 0U, // AE_MULZAAFD32X16_H3_L2_S2 |
6891 | 59.3k | 0U, // AE_MULZASD24_HH_LL |
6892 | 59.3k | 0U, // AE_MULZASD24_HH_LL_S2 |
6893 | 59.3k | 0U, // AE_MULZASD24_HL_LH |
6894 | 59.3k | 0U, // AE_MULZASD24_HL_LH_S2 |
6895 | 59.3k | 0U, // AE_MULZASD32X16_H1_L0 |
6896 | 59.3k | 0U, // AE_MULZASD32X16_H1_L0_S2 |
6897 | 59.3k | 0U, // AE_MULZASD32X16_H3_L2 |
6898 | 59.3k | 0U, // AE_MULZASD32X16_H3_L2_S2 |
6899 | 59.3k | 0U, // AE_MULZASFD24_HH_LL |
6900 | 59.3k | 0U, // AE_MULZASFD24_HH_LL_S2 |
6901 | 59.3k | 0U, // AE_MULZASFD24_HL_LH |
6902 | 59.3k | 0U, // AE_MULZASFD24_HL_LH_S2 |
6903 | 59.3k | 0U, // AE_MULZASFD32X16_H1_L0 |
6904 | 59.3k | 0U, // AE_MULZASFD32X16_H1_L0_S2 |
6905 | 59.3k | 0U, // AE_MULZASFD32X16_H3_L2 |
6906 | 59.3k | 0U, // AE_MULZASFD32X16_H3_L2_S2 |
6907 | 59.3k | 0U, // AE_MULZSAD24_HH_LL |
6908 | 59.3k | 0U, // AE_MULZSAD24_HH_LL_S2 |
6909 | 59.3k | 0U, // AE_MULZSAD32X16_H1_L0 |
6910 | 59.3k | 0U, // AE_MULZSAD32X16_H1_L0_S2 |
6911 | 59.3k | 0U, // AE_MULZSAD32X16_H3_L2 |
6912 | 59.3k | 0U, // AE_MULZSAD32X16_H3_L2_S2 |
6913 | 59.3k | 0U, // AE_MULZSAFD24_HH_LL |
6914 | 59.3k | 0U, // AE_MULZSAFD24_HH_LL_S2 |
6915 | 59.3k | 0U, // AE_MULZSAFD32X16_H1_L0 |
6916 | 59.3k | 0U, // AE_MULZSAFD32X16_H1_L0_S2 |
6917 | 59.3k | 0U, // AE_MULZSAFD32X16_H3_L2 |
6918 | 59.3k | 0U, // AE_MULZSAFD32X16_H3_L2_S2 |
6919 | 59.3k | 0U, // AE_MULZSSD24_HH_LL |
6920 | 59.3k | 0U, // AE_MULZSSD24_HH_LL_S2 |
6921 | 59.3k | 0U, // AE_MULZSSD24_HL_LH |
6922 | 59.3k | 0U, // AE_MULZSSD24_HL_LH_S2 |
6923 | 59.3k | 0U, // AE_MULZSSD32X16_H1_L0 |
6924 | 59.3k | 0U, // AE_MULZSSD32X16_H1_L0_S2 |
6925 | 59.3k | 0U, // AE_MULZSSD32X16_H3_L2 |
6926 | 59.3k | 0U, // AE_MULZSSD32X16_H3_L2_S2 |
6927 | 59.3k | 0U, // AE_MULZSSFD16SS_11_00 |
6928 | 59.3k | 0U, // AE_MULZSSFD16SS_11_00_S2 |
6929 | 59.3k | 0U, // AE_MULZSSFD16SS_13_02 |
6930 | 59.3k | 0U, // AE_MULZSSFD16SS_13_02_S2 |
6931 | 59.3k | 0U, // AE_MULZSSFD16SS_33_22 |
6932 | 59.3k | 0U, // AE_MULZSSFD16SS_33_22_S2 |
6933 | 59.3k | 0U, // AE_MULZSSFD24_HH_LL |
6934 | 59.3k | 0U, // AE_MULZSSFD24_HH_LL_S2 |
6935 | 59.3k | 0U, // AE_MULZSSFD24_HL_LH |
6936 | 59.3k | 0U, // AE_MULZSSFD24_HL_LH_S2 |
6937 | 59.3k | 0U, // AE_MULZSSFD32X16_H1_L0 |
6938 | 59.3k | 0U, // AE_MULZSSFD32X16_H1_L0_S2 |
6939 | 59.3k | 0U, // AE_MULZSSFD32X16_H3_L2 |
6940 | 59.3k | 0U, // AE_MULZSSFD32X16_H3_L2_S2 |
6941 | 59.3k | 0U, // AE_NAND |
6942 | 59.3k | 0U, // AE_NEG16S |
6943 | 59.3k | 0U, // AE_NEG24S |
6944 | 59.3k | 0U, // AE_NEG32 |
6945 | 59.3k | 0U, // AE_NEG32S |
6946 | 59.3k | 0U, // AE_NEG64 |
6947 | 59.3k | 0U, // AE_NEG64S |
6948 | 59.3k | 0U, // AE_NSA64 |
6949 | 59.3k | 0U, // AE_NSAZ16_0 |
6950 | 59.3k | 0U, // AE_NSAZ32_L |
6951 | 59.3k | 0U, // AE_OR |
6952 | 59.3k | 0U, // AE_PKSR24 |
6953 | 59.3k | 0U, // AE_PKSR32 |
6954 | 59.3k | 0U, // AE_ROUND16X4F32SASYM |
6955 | 59.3k | 0U, // AE_ROUND16X4F32SSYM |
6956 | 59.3k | 0U, // AE_ROUND24X2F48SASYM |
6957 | 59.3k | 0U, // AE_ROUND24X2F48SSYM |
6958 | 59.3k | 0U, // AE_ROUND32X2F48SASYM |
6959 | 59.3k | 0U, // AE_ROUND32X2F48SSYM |
6960 | 59.3k | 0U, // AE_ROUND32X2F64SASYM |
6961 | 59.3k | 0U, // AE_ROUND32X2F64SSYM |
6962 | 59.3k | 0U, // AE_ROUNDSP16F24ASYM |
6963 | 59.3k | 0U, // AE_ROUNDSP16F24SYM |
6964 | 59.3k | 0U, // AE_ROUNDSP16Q48X2ASYM |
6965 | 59.3k | 0U, // AE_ROUNDSP16Q48X2SYM |
6966 | 59.3k | 0U, // AE_ROUNDSQ32F48ASYM |
6967 | 59.3k | 0U, // AE_ROUNDSQ32F48SYM |
6968 | 59.3k | 0U, // AE_S16M_L_I |
6969 | 59.3k | 0U, // AE_S16M_L_IU |
6970 | 59.3k | 0U, // AE_S16M_L_X |
6971 | 59.3k | 0U, // AE_S16M_L_XC |
6972 | 59.3k | 0U, // AE_S16M_L_XU |
6973 | 59.3k | 0U, // AE_S16X2M_I |
6974 | 59.3k | 0U, // AE_S16X2M_IU |
6975 | 59.3k | 0U, // AE_S16X2M_X |
6976 | 59.3k | 0U, // AE_S16X2M_XC |
6977 | 59.3k | 0U, // AE_S16X2M_XU |
6978 | 59.3k | 0U, // AE_S16X4_I |
6979 | 59.3k | 0U, // AE_S16X4_IP |
6980 | 59.3k | 0U, // AE_S16X4_RIC |
6981 | 59.3k | 0U, // AE_S16X4_RIP |
6982 | 59.3k | 0U, // AE_S16X4_X |
6983 | 59.3k | 0U, // AE_S16X4_XC |
6984 | 59.3k | 0U, // AE_S16X4_XP |
6985 | 59.3k | 0U, // AE_S16_0_I |
6986 | 59.3k | 0U, // AE_S16_0_IP |
6987 | 59.3k | 0U, // AE_S16_0_X |
6988 | 59.3k | 0U, // AE_S16_0_XC |
6989 | 59.3k | 0U, // AE_S16_0_XP |
6990 | 59.3k | 0U, // AE_S24RA64S_I |
6991 | 59.3k | 0U, // AE_S24RA64S_IP |
6992 | 59.3k | 0U, // AE_S24RA64S_X |
6993 | 59.3k | 0U, // AE_S24RA64S_XC |
6994 | 59.3k | 0U, // AE_S24RA64S_XP |
6995 | 59.3k | 0U, // AE_S24X2RA64S_IP |
6996 | 59.3k | 0U, // AE_S32F24_L_I |
6997 | 59.3k | 0U, // AE_S32F24_L_IP |
6998 | 59.3k | 0U, // AE_S32F24_L_X |
6999 | 59.3k | 0U, // AE_S32F24_L_XC |
7000 | 59.3k | 0U, // AE_S32F24_L_XP |
7001 | 59.3k | 0U, // AE_S32M_I |
7002 | 59.3k | 0U, // AE_S32M_IU |
7003 | 59.3k | 0U, // AE_S32M_X |
7004 | 59.3k | 0U, // AE_S32M_XC |
7005 | 59.3k | 0U, // AE_S32M_XU |
7006 | 59.3k | 0U, // AE_S32RA64S_I |
7007 | 59.3k | 0U, // AE_S32RA64S_IP |
7008 | 59.3k | 0U, // AE_S32RA64S_X |
7009 | 59.3k | 0U, // AE_S32RA64S_XC |
7010 | 59.3k | 0U, // AE_S32RA64S_XP |
7011 | 59.3k | 0U, // AE_S32X2F24_I |
7012 | 59.3k | 0U, // AE_S32X2F24_IP |
7013 | 59.3k | 0U, // AE_S32X2F24_RIC |
7014 | 59.3k | 0U, // AE_S32X2F24_RIP |
7015 | 59.3k | 0U, // AE_S32X2F24_X |
7016 | 59.3k | 0U, // AE_S32X2F24_XC |
7017 | 59.3k | 0U, // AE_S32X2F24_XP |
7018 | 59.3k | 0U, // AE_S32X2RA64S_IP |
7019 | 59.3k | 0U, // AE_S32X2_I |
7020 | 59.3k | 0U, // AE_S32X2_IP |
7021 | 59.3k | 0U, // AE_S32X2_RIC |
7022 | 59.3k | 0U, // AE_S32X2_RIP |
7023 | 59.3k | 0U, // AE_S32X2_X |
7024 | 59.3k | 0U, // AE_S32X2_XC |
7025 | 59.3k | 0U, // AE_S32X2_XP |
7026 | 59.3k | 0U, // AE_S32_L_I |
7027 | 59.3k | 0U, // AE_S32_L_IP |
7028 | 59.3k | 0U, // AE_S32_L_X |
7029 | 59.3k | 0U, // AE_S32_L_XC |
7030 | 59.3k | 0U, // AE_S32_L_XP |
7031 | 59.3k | 0U, // AE_S64_I |
7032 | 59.3k | 0U, // AE_S64_IP |
7033 | 59.3k | 0U, // AE_S64_X |
7034 | 59.3k | 0U, // AE_S64_XC |
7035 | 59.3k | 0U, // AE_S64_XP |
7036 | 59.3k | 0U, // AE_SA16X4_IC |
7037 | 59.3k | 0U, // AE_SA16X4_IP |
7038 | 59.3k | 0U, // AE_SA16X4_RIC |
7039 | 59.3k | 0U, // AE_SA16X4_RIP |
7040 | 59.3k | 0U, // AE_SA24X2_IC |
7041 | 59.3k | 0U, // AE_SA24X2_IP |
7042 | 59.3k | 0U, // AE_SA24X2_RIC |
7043 | 59.3k | 0U, // AE_SA24X2_RIP |
7044 | 59.3k | 0U, // AE_SA24_L_IC |
7045 | 59.3k | 0U, // AE_SA24_L_IP |
7046 | 59.3k | 0U, // AE_SA24_L_RIC |
7047 | 59.3k | 0U, // AE_SA24_L_RIP |
7048 | 59.3k | 0U, // AE_SA32X2F24_IC |
7049 | 59.3k | 0U, // AE_SA32X2F24_IP |
7050 | 59.3k | 0U, // AE_SA32X2F24_RIC |
7051 | 59.3k | 0U, // AE_SA32X2F24_RIP |
7052 | 59.3k | 0U, // AE_SA32X2_IC |
7053 | 59.3k | 0U, // AE_SA32X2_IP |
7054 | 59.3k | 0U, // AE_SA32X2_RIC |
7055 | 59.3k | 0U, // AE_SA32X2_RIP |
7056 | 59.3k | 0U, // AE_SA64NEG_FP |
7057 | 59.3k | 0U, // AE_SA64POS_FP |
7058 | 59.3k | 0U, // AE_SALIGN64_I |
7059 | 59.3k | 0U, // AE_SAT16X4 |
7060 | 59.3k | 0U, // AE_SAT24S |
7061 | 59.3k | 0U, // AE_SAT48S |
7062 | 59.3k | 0U, // AE_SATQ56S |
7063 | 59.3k | 0U, // AE_SB |
7064 | 59.3k | 0U, // AE_SBF |
7065 | 59.3k | 0U, // AE_SBF_IC |
7066 | 59.3k | 0U, // AE_SBF_IP |
7067 | 59.3k | 0U, // AE_SBI |
7068 | 59.3k | 0U, // AE_SBI_IC |
7069 | 59.3k | 0U, // AE_SBI_IP |
7070 | 59.3k | 0U, // AE_SB_IC |
7071 | 59.3k | 0U, // AE_SB_IP |
7072 | 59.3k | 0U, // AE_SEL16I |
7073 | 59.3k | 0U, // AE_SEL16I_N |
7074 | 59.3k | 0U, // AE_SEXT32 |
7075 | 59.3k | 0U, // AE_SEXT32X2D16_10 |
7076 | 59.3k | 0U, // AE_SEXT32X2D16_32 |
7077 | 59.3k | 0U, // AE_SHA32 |
7078 | 59.3k | 0U, // AE_SHORTSWAP |
7079 | 59.3k | 0U, // AE_SLAA16S |
7080 | 59.3k | 0U, // AE_SLAA32 |
7081 | 59.3k | 0U, // AE_SLAA32S |
7082 | 59.3k | 0U, // AE_SLAA64 |
7083 | 59.3k | 0U, // AE_SLAA64S |
7084 | 59.3k | 0U, // AE_SLAAQ56 |
7085 | 59.3k | 0U, // AE_SLAI16S |
7086 | 59.3k | 0U, // AE_SLAI24 |
7087 | 59.3k | 0U, // AE_SLAI24S |
7088 | 59.3k | 0U, // AE_SLAI32 |
7089 | 59.3k | 0U, // AE_SLAI32S |
7090 | 59.3k | 0U, // AE_SLAI64 |
7091 | 59.3k | 0U, // AE_SLAI64S |
7092 | 59.3k | 0U, // AE_SLAISQ56S |
7093 | 59.3k | 0U, // AE_SLAS24 |
7094 | 59.3k | 0U, // AE_SLAS24S |
7095 | 59.3k | 0U, // AE_SLAS32 |
7096 | 59.3k | 0U, // AE_SLAS32S |
7097 | 59.3k | 0U, // AE_SLAS64 |
7098 | 59.3k | 0U, // AE_SLAS64S |
7099 | 59.3k | 0U, // AE_SLASQ56 |
7100 | 59.3k | 0U, // AE_SLASSQ56S |
7101 | 59.3k | 0U, // AE_SRA64_32 |
7102 | 59.3k | 0U, // AE_SRAA16RS |
7103 | 59.3k | 0U, // AE_SRAA16S |
7104 | 59.3k | 0U, // AE_SRAA32 |
7105 | 59.3k | 0U, // AE_SRAA32RS |
7106 | 59.3k | 0U, // AE_SRAA32S |
7107 | 59.3k | 0U, // AE_SRAA64 |
7108 | 59.3k | 0U, // AE_SRAI16 |
7109 | 59.3k | 0U, // AE_SRAI16R |
7110 | 59.3k | 0U, // AE_SRAI24 |
7111 | 59.3k | 0U, // AE_SRAI32 |
7112 | 59.3k | 0U, // AE_SRAI32R |
7113 | 59.3k | 0U, // AE_SRAI64 |
7114 | 59.3k | 0U, // AE_SRAS24 |
7115 | 59.3k | 0U, // AE_SRAS32 |
7116 | 59.3k | 0U, // AE_SRAS64 |
7117 | 59.3k | 0U, // AE_SRLA32 |
7118 | 59.3k | 0U, // AE_SRLA64 |
7119 | 59.3k | 0U, // AE_SRLI24 |
7120 | 59.3k | 0U, // AE_SRLI32 |
7121 | 59.3k | 0U, // AE_SRLI64 |
7122 | 59.3k | 0U, // AE_SRLS24 |
7123 | 59.3k | 0U, // AE_SRLS32 |
7124 | 59.3k | 0U, // AE_SRLS64 |
7125 | 59.3k | 0U, // AE_SUB16 |
7126 | 59.3k | 0U, // AE_SUB16S |
7127 | 59.3k | 0U, // AE_SUB24S |
7128 | 59.3k | 0U, // AE_SUB32 |
7129 | 59.3k | 0U, // AE_SUB32S |
7130 | 59.3k | 0U, // AE_SUB64 |
7131 | 59.3k | 0U, // AE_SUB64S |
7132 | 59.3k | 0U, // AE_SUBADD32 |
7133 | 59.3k | 0U, // AE_SUBADD32S |
7134 | 59.3k | 0U, // AE_TRUNCA32F64S_L |
7135 | 59.3k | 0U, // AE_TRUNCA32X2F64S |
7136 | 59.3k | 0U, // AE_TRUNCI32F64S_L |
7137 | 59.3k | 0U, // AE_TRUNCI32X2F64S |
7138 | 59.3k | 0U, // AE_VLDL16C |
7139 | 59.3k | 0U, // AE_VLDL16C_IC |
7140 | 59.3k | 0U, // AE_VLDL16C_IP |
7141 | 59.3k | 0U, // AE_VLDL16T |
7142 | 59.3k | 0U, // AE_VLDL32T |
7143 | 59.3k | 0U, // AE_VLDSHT |
7144 | 59.3k | 0U, // AE_VLEL16T |
7145 | 59.3k | 0U, // AE_VLEL32T |
7146 | 59.3k | 0U, // AE_VLES16C |
7147 | 59.3k | 0U, // AE_VLES16C_IC |
7148 | 59.3k | 0U, // AE_VLES16C_IP |
7149 | 59.3k | 0U, // AE_XOR |
7150 | 59.3k | 0U, // AE_ZALIGN64 |
7151 | 59.3k | 0U, // ALL4 |
7152 | 59.3k | 0U, // ALL8 |
7153 | 59.3k | 0U, // AND |
7154 | 59.3k | 0U, // ANDB |
7155 | 59.3k | 0U, // ANDBC |
7156 | 59.3k | 0U, // ANY4 |
7157 | 59.3k | 0U, // ANY8 |
7158 | 59.3k | 0U, // BALL |
7159 | 59.3k | 0U, // BANY |
7160 | 59.3k | 0U, // BBC |
7161 | 59.3k | 0U, // BBCI |
7162 | 59.3k | 0U, // BBS |
7163 | 59.3k | 0U, // BBSI |
7164 | 59.3k | 0U, // BEQ |
7165 | 59.3k | 0U, // BEQI |
7166 | 59.3k | 0U, // BEQZ |
7167 | 59.3k | 0U, // BF |
7168 | 59.3k | 0U, // BGE |
7169 | 59.3k | 0U, // BGEI |
7170 | 59.3k | 0U, // BGEU |
7171 | 59.3k | 0U, // BGEUI |
7172 | 59.3k | 0U, // BGEZ |
7173 | 59.3k | 0U, // BLT |
7174 | 59.3k | 0U, // BLTI |
7175 | 59.3k | 0U, // BLTU |
7176 | 59.3k | 0U, // BLTUI |
7177 | 59.3k | 0U, // BLTZ |
7178 | 59.3k | 0U, // BNALL |
7179 | 59.3k | 0U, // BNE |
7180 | 59.3k | 0U, // BNEI |
7181 | 59.3k | 0U, // BNEZ |
7182 | 59.3k | 0U, // BNONE |
7183 | 59.3k | 0U, // BREAK |
7184 | 59.3k | 0U, // BREAK_N |
7185 | 59.3k | 0U, // BT |
7186 | 59.3k | 0U, // CALL0 |
7187 | 59.3k | 0U, // CALL12 |
7188 | 59.3k | 0U, // CALL4 |
7189 | 59.3k | 0U, // CALL8 |
7190 | 59.3k | 0U, // CALLX0 |
7191 | 59.3k | 0U, // CALLX12 |
7192 | 59.3k | 0U, // CALLX4 |
7193 | 59.3k | 0U, // CALLX8 |
7194 | 59.3k | 0U, // CEIL_S |
7195 | 59.3k | 0U, // CLAMPS |
7196 | 59.3k | 0U, // CLR_BIT_GPIO_OUT |
7197 | 59.3k | 0U, // CONST_S |
7198 | 59.3k | 0U, // DIV0_S |
7199 | 59.3k | 0U, // DIVN_S |
7200 | 59.3k | 0U, // DSYNC |
7201 | 59.3k | 0U, // EE_ANDQ |
7202 | 59.3k | 0U, // EE_BITREV |
7203 | 59.3k | 0U, // EE_CLR_BIT_GPIO_OUT |
7204 | 59.3k | 0U, // EE_CMUL_S16 |
7205 | 59.3k | 0U, // EE_CMUL_S16_LD_INCP |
7206 | 59.3k | 0U, // EE_CMUL_S16_ST_INCP |
7207 | 59.3k | 37U, // EE_FFT_AMS_S16_LD_INCP |
7208 | 59.3k | 37U, // EE_FFT_AMS_S16_LD_INCP_UAUP |
7209 | 59.3k | 37U, // EE_FFT_AMS_S16_LD_R32_DECP |
7210 | 59.3k | 0U, // EE_FFT_AMS_S16_ST_INCP |
7211 | 59.3k | 0U, // EE_FFT_CMUL_S16_LD_XP |
7212 | 59.3k | 6U, // EE_FFT_CMUL_S16_ST_XP |
7213 | 59.3k | 0U, // EE_FFT_R2BF_S16 |
7214 | 59.3k | 0U, // EE_FFT_R2BF_S16_ST_INCP |
7215 | 59.3k | 0U, // EE_FFT_VST_R32_DECP |
7216 | 59.3k | 0U, // EE_GET_GPIO_IN |
7217 | 59.3k | 7U, // EE_LDF_128_IP |
7218 | 59.3k | 13U, // EE_LDF_128_XP |
7219 | 59.3k | 0U, // EE_LDF_64_IP |
7220 | 59.3k | 0U, // EE_LDF_64_XP |
7221 | 59.3k | 0U, // EE_LDQA_S16_128_IP |
7222 | 59.3k | 0U, // EE_LDQA_S16_128_XP |
7223 | 59.3k | 0U, // EE_LDQA_S8_128_IP |
7224 | 59.3k | 0U, // EE_LDQA_S8_128_XP |
7225 | 59.3k | 0U, // EE_LDQA_U16_128_IP |
7226 | 59.3k | 0U, // EE_LDQA_U16_128_XP |
7227 | 59.3k | 0U, // EE_LDQA_U8_128_IP |
7228 | 59.3k | 0U, // EE_LDQA_U8_128_XP |
7229 | 59.3k | 0U, // EE_LDXQ_32 |
7230 | 59.3k | 0U, // EE_LD_128_USAR_IP |
7231 | 59.3k | 0U, // EE_LD_128_USAR_XP |
7232 | 59.3k | 0U, // EE_LD_ACCX_IP |
7233 | 59.3k | 0U, // EE_LD_QACC_H_H_32_IP |
7234 | 59.3k | 0U, // EE_LD_QACC_H_L_128_IP |
7235 | 59.3k | 0U, // EE_LD_QACC_L_H_32_IP |
7236 | 59.3k | 0U, // EE_LD_QACC_L_L_128_IP |
7237 | 59.3k | 0U, // EE_LD_UA_STATE_IP |
7238 | 59.3k | 0U, // EE_MOVI_32_A |
7239 | 59.3k | 0U, // EE_MOVI_32_Q |
7240 | 59.3k | 0U, // EE_MOV_S16_QACC |
7241 | 59.3k | 0U, // EE_MOV_S8_QACC |
7242 | 59.3k | 0U, // EE_MOV_U16_QACC |
7243 | 59.3k | 0U, // EE_MOV_U8_QACC |
7244 | 59.3k | 0U, // EE_NOTQ |
7245 | 59.3k | 0U, // EE_ORQ |
7246 | 59.3k | 0U, // EE_SET_BIT_GPIO_OUT |
7247 | 59.3k | 0U, // EE_SLCI_2Q |
7248 | 59.3k | 0U, // EE_SLCXXP_2Q |
7249 | 59.3k | 0U, // EE_SRCI_2Q |
7250 | 59.3k | 0U, // EE_SRCMB_S16_QACC |
7251 | 59.3k | 0U, // EE_SRCMB_S8_QACC |
7252 | 59.3k | 0U, // EE_SRCQ_128_ST_INCP |
7253 | 59.3k | 0U, // EE_SRCXXP_2Q |
7254 | 59.3k | 0U, // EE_SRC_Q |
7255 | 59.3k | 0U, // EE_SRC_Q_LD_IP |
7256 | 59.3k | 0U, // EE_SRC_Q_LD_XP |
7257 | 59.3k | 0U, // EE_SRC_Q_QUP |
7258 | 59.3k | 0U, // EE_SRS_ACCX |
7259 | 59.3k | 7U, // EE_STF_128_IP |
7260 | 59.3k | 13U, // EE_STF_128_XP |
7261 | 59.3k | 0U, // EE_STF_64_IP |
7262 | 59.3k | 0U, // EE_STF_64_XP |
7263 | 59.3k | 0U, // EE_STXQ_32 |
7264 | 59.3k | 0U, // EE_ST_ACCX_IP |
7265 | 59.3k | 0U, // EE_ST_QACC_H_H_32_IP |
7266 | 59.3k | 0U, // EE_ST_QACC_H_L_128_IP |
7267 | 59.3k | 0U, // EE_ST_QACC_L_H_32_IP |
7268 | 59.3k | 0U, // EE_ST_QACC_L_L_128_IP |
7269 | 59.3k | 0U, // EE_ST_UA_STATE_IP |
7270 | 59.3k | 0U, // EE_VADDS_S16 |
7271 | 59.3k | 0U, // EE_VADDS_S16_LD_INCP |
7272 | 59.3k | 0U, // EE_VADDS_S16_ST_INCP |
7273 | 59.3k | 0U, // EE_VADDS_S32 |
7274 | 59.3k | 0U, // EE_VADDS_S32_LD_INCP |
7275 | 59.3k | 0U, // EE_VADDS_S32_ST_INCP |
7276 | 59.3k | 0U, // EE_VADDS_S8 |
7277 | 59.3k | 0U, // EE_VADDS_S8_LD_INCP |
7278 | 59.3k | 0U, // EE_VADDS_S8_ST_INCP |
7279 | 59.3k | 0U, // EE_VCMP_EQ_S16 |
7280 | 59.3k | 0U, // EE_VCMP_EQ_S32 |
7281 | 59.3k | 0U, // EE_VCMP_EQ_S8 |
7282 | 59.3k | 0U, // EE_VCMP_GT_S16 |
7283 | 59.3k | 0U, // EE_VCMP_GT_S32 |
7284 | 59.3k | 0U, // EE_VCMP_GT_S8 |
7285 | 59.3k | 0U, // EE_VCMP_LT_S16 |
7286 | 59.3k | 0U, // EE_VCMP_LT_S32 |
7287 | 59.3k | 0U, // EE_VCMP_LT_S8 |
7288 | 59.3k | 0U, // EE_VLDBC_16 |
7289 | 59.3k | 0U, // EE_VLDBC_16_IP |
7290 | 59.3k | 0U, // EE_VLDBC_16_XP |
7291 | 59.3k | 0U, // EE_VLDBC_32 |
7292 | 59.3k | 0U, // EE_VLDBC_32_IP |
7293 | 59.3k | 0U, // EE_VLDBC_32_XP |
7294 | 59.3k | 0U, // EE_VLDBC_8 |
7295 | 59.3k | 0U, // EE_VLDBC_8_IP |
7296 | 59.3k | 0U, // EE_VLDBC_8_XP |
7297 | 59.3k | 0U, // EE_VLDHBC_16_INCP |
7298 | 59.3k | 0U, // EE_VLD_128_IP |
7299 | 59.3k | 0U, // EE_VLD_128_XP |
7300 | 59.3k | 0U, // EE_VLD_H_64_IP |
7301 | 59.3k | 0U, // EE_VLD_H_64_XP |
7302 | 59.3k | 0U, // EE_VLD_L_64_IP |
7303 | 59.3k | 0U, // EE_VLD_L_64_XP |
7304 | 59.3k | 0U, // EE_VMAX_S16 |
7305 | 59.3k | 0U, // EE_VMAX_S16_LD_INCP |
7306 | 59.3k | 0U, // EE_VMAX_S16_ST_INCP |
7307 | 59.3k | 0U, // EE_VMAX_S32 |
7308 | 59.3k | 0U, // EE_VMAX_S32_LD_INCP |
7309 | 59.3k | 0U, // EE_VMAX_S32_ST_INCP |
7310 | 59.3k | 0U, // EE_VMAX_S8 |
7311 | 59.3k | 0U, // EE_VMAX_S8_LD_INCP |
7312 | 59.3k | 0U, // EE_VMAX_S8_ST_INCP |
7313 | 59.3k | 0U, // EE_VMIN_S16 |
7314 | 59.3k | 0U, // EE_VMIN_S16_LD_INCP |
7315 | 59.3k | 0U, // EE_VMIN_S16_ST_INCP |
7316 | 59.3k | 0U, // EE_VMIN_S32 |
7317 | 59.3k | 0U, // EE_VMIN_S32_LD_INCP |
7318 | 59.3k | 0U, // EE_VMIN_S32_ST_INCP |
7319 | 59.3k | 0U, // EE_VMIN_S8 |
7320 | 59.3k | 0U, // EE_VMIN_S8_LD_INCP |
7321 | 59.3k | 0U, // EE_VMIN_S8_ST_INCP |
7322 | 59.3k | 0U, // EE_VMULAS_S16_ACCX |
7323 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_IP |
7324 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_IP_QUP |
7325 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_XP |
7326 | 59.3k | 0U, // EE_VMULAS_S16_ACCX_LD_XP_QUP |
7327 | 59.3k | 0U, // EE_VMULAS_S16_QACC |
7328 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LDBC_INCP |
7329 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LDBC_INCP_QUP |
7330 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_IP |
7331 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_IP_QUP |
7332 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_XP |
7333 | 59.3k | 0U, // EE_VMULAS_S16_QACC_LD_XP_QUP |
7334 | 59.3k | 0U, // EE_VMULAS_S8_ACCX |
7335 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_IP |
7336 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_IP_QUP |
7337 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_XP |
7338 | 59.3k | 0U, // EE_VMULAS_S8_ACCX_LD_XP_QUP |
7339 | 59.3k | 0U, // EE_VMULAS_S8_QACC |
7340 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LDBC_INCP |
7341 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LDBC_INCP_QUP |
7342 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_IP |
7343 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_IP_QUP |
7344 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_XP |
7345 | 59.3k | 0U, // EE_VMULAS_S8_QACC_LD_XP_QUP |
7346 | 59.3k | 0U, // EE_VMULAS_U16_ACCX |
7347 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_IP |
7348 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_IP_QUP |
7349 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_XP |
7350 | 59.3k | 0U, // EE_VMULAS_U16_ACCX_LD_XP_QUP |
7351 | 59.3k | 0U, // EE_VMULAS_U16_QACC |
7352 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LDBC_INCP |
7353 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LDBC_INCP_QUP |
7354 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_IP |
7355 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_IP_QUP |
7356 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_XP |
7357 | 59.3k | 0U, // EE_VMULAS_U16_QACC_LD_XP_QUP |
7358 | 59.3k | 0U, // EE_VMULAS_U8_ACCX |
7359 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_IP |
7360 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_IP_QUP |
7361 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_XP |
7362 | 59.3k | 0U, // EE_VMULAS_U8_ACCX_LD_XP_QUP |
7363 | 59.3k | 0U, // EE_VMULAS_U8_QACC |
7364 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LDBC_INCP |
7365 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LDBC_INCP_QUP |
7366 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_IP |
7367 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_IP_QUP |
7368 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_XP |
7369 | 59.3k | 0U, // EE_VMULAS_U8_QACC_LD_XP_QUP |
7370 | 59.3k | 0U, // EE_VMUL_S16 |
7371 | 59.3k | 0U, // EE_VMUL_S16_LD_INCP |
7372 | 59.3k | 0U, // EE_VMUL_S16_ST_INCP |
7373 | 59.3k | 0U, // EE_VMUL_S8 |
7374 | 59.3k | 0U, // EE_VMUL_S8_LD_INCP |
7375 | 59.3k | 0U, // EE_VMUL_S8_ST_INCP |
7376 | 59.3k | 0U, // EE_VMUL_U16 |
7377 | 59.3k | 0U, // EE_VMUL_U16_LD_INCP |
7378 | 59.3k | 0U, // EE_VMUL_U16_ST_INCP |
7379 | 59.3k | 0U, // EE_VMUL_U8 |
7380 | 59.3k | 0U, // EE_VMUL_U8_LD_INCP |
7381 | 59.3k | 0U, // EE_VMUL_U8_ST_INCP |
7382 | 59.3k | 0U, // EE_VPRELU_S16 |
7383 | 59.3k | 0U, // EE_VPRELU_S8 |
7384 | 59.3k | 0U, // EE_VRELU_S16 |
7385 | 59.3k | 0U, // EE_VRELU_S8 |
7386 | 59.3k | 0U, // EE_VSL_32 |
7387 | 59.3k | 0U, // EE_VSMULAS_S16_QACC |
7388 | 59.3k | 0U, // EE_VSMULAS_S16_QACC_LD_INCP |
7389 | 59.3k | 0U, // EE_VSMULAS_S8_QACC |
7390 | 59.3k | 0U, // EE_VSMULAS_S8_QACC_LD_INCP |
7391 | 59.3k | 0U, // EE_VSR_32 |
7392 | 59.3k | 0U, // EE_VST_128_IP |
7393 | 59.3k | 0U, // EE_VST_128_XP |
7394 | 59.3k | 0U, // EE_VST_H_64_IP |
7395 | 59.3k | 0U, // EE_VST_H_64_XP |
7396 | 59.3k | 0U, // EE_VST_L_64_IP |
7397 | 59.3k | 0U, // EE_VST_L_64_XP |
7398 | 59.3k | 0U, // EE_VSUBS_S16 |
7399 | 59.3k | 0U, // EE_VSUBS_S16_LD_INCP |
7400 | 59.3k | 0U, // EE_VSUBS_S16_ST_INCP |
7401 | 59.3k | 0U, // EE_VSUBS_S32 |
7402 | 59.3k | 0U, // EE_VSUBS_S32_LD_INCP |
7403 | 59.3k | 0U, // EE_VSUBS_S32_ST_INCP |
7404 | 59.3k | 0U, // EE_VSUBS_S8 |
7405 | 59.3k | 0U, // EE_VSUBS_S8_LD_INCP |
7406 | 59.3k | 0U, // EE_VSUBS_S8_ST_INCP |
7407 | 59.3k | 0U, // EE_VUNZIP_16 |
7408 | 59.3k | 0U, // EE_VUNZIP_32 |
7409 | 59.3k | 0U, // EE_VUNZIP_8 |
7410 | 59.3k | 0U, // EE_VZIP_16 |
7411 | 59.3k | 0U, // EE_VZIP_32 |
7412 | 59.3k | 0U, // EE_VZIP_8 |
7413 | 59.3k | 0U, // EE_WR_MASK_GPIO_OUT |
7414 | 59.3k | 0U, // EE_XORQ |
7415 | 59.3k | 0U, // EE_ZERO_ACCX |
7416 | 59.3k | 0U, // EE_ZERO_Q |
7417 | 59.3k | 0U, // EE_ZERO_QACC |
7418 | 59.3k | 0U, // ENTRY |
7419 | 59.3k | 0U, // ESYNC |
7420 | 59.3k | 0U, // EXCW |
7421 | 59.3k | 0U, // EXTUI |
7422 | 59.3k | 0U, // EXTW |
7423 | 59.3k | 0U, // FLOAT_S |
7424 | 59.3k | 0U, // FLOOR_S |
7425 | 59.3k | 0U, // GET_GPIO_IN |
7426 | 59.3k | 0U, // ILL |
7427 | 59.3k | 0U, // ILL_N |
7428 | 59.3k | 0U, // ISYNC |
7429 | 59.3k | 0U, // J |
7430 | 59.3k | 0U, // JX |
7431 | 59.3k | 0U, // L16SI |
7432 | 59.3k | 0U, // L16UI |
7433 | 59.3k | 0U, // L32E |
7434 | 59.3k | 0U, // L32I |
7435 | 59.3k | 0U, // L32I_N |
7436 | 59.3k | 0U, // L32R |
7437 | 59.3k | 0U, // L8UI |
7438 | 59.3k | 0U, // LDDEC |
7439 | 59.3k | 0U, // LDINC |
7440 | 59.3k | 0U, // LEA_ADD |
7441 | 59.3k | 0U, // LOOP |
7442 | 59.3k | 0U, // LOOPGTZ |
7443 | 59.3k | 0U, // LOOPNEZ |
7444 | 59.3k | 0U, // LSI |
7445 | 59.3k | 0U, // LSIP |
7446 | 59.3k | 0U, // LSX |
7447 | 59.3k | 0U, // LSXP |
7448 | 59.3k | 0U, // MADDN_S |
7449 | 59.3k | 0U, // MADD_S |
7450 | 59.3k | 0U, // MAX |
7451 | 59.3k | 0U, // MAXU |
7452 | 59.3k | 0U, // MEMW |
7453 | 59.3k | 0U, // MIN |
7454 | 59.3k | 0U, // MINU |
7455 | 59.3k | 0U, // MKDADJ_S |
7456 | 59.3k | 0U, // MKSADJ_S |
7457 | 59.3k | 0U, // MOVEQZ |
7458 | 59.3k | 0U, // MOVEQZ_S |
7459 | 59.3k | 0U, // MOVF |
7460 | 59.3k | 0U, // MOVF_S |
7461 | 59.3k | 0U, // MOVGEZ |
7462 | 59.3k | 0U, // MOVGEZ_S |
7463 | 59.3k | 0U, // MOVI |
7464 | 59.3k | 0U, // MOVI_N |
7465 | 59.3k | 0U, // MOVLTZ |
7466 | 59.3k | 0U, // MOVLTZ_S |
7467 | 59.3k | 0U, // MOVNEZ |
7468 | 59.3k | 0U, // MOVNEZ_S |
7469 | 59.3k | 0U, // MOVSP |
7470 | 59.3k | 0U, // MOVT |
7471 | 59.3k | 0U, // MOVT_S |
7472 | 59.3k | 0U, // MOV_N |
7473 | 59.3k | 0U, // MOV_S |
7474 | 59.3k | 0U, // MSUB_S |
7475 | 59.3k | 0U, // MUL16S |
7476 | 59.3k | 0U, // MUL16U |
7477 | 59.3k | 0U, // MULA_AA_HH |
7478 | 59.3k | 0U, // MULA_AA_HL |
7479 | 59.3k | 0U, // MULA_AA_LH |
7480 | 59.3k | 0U, // MULA_AA_LL |
7481 | 59.3k | 0U, // MULA_AD_HH |
7482 | 59.3k | 0U, // MULA_AD_HL |
7483 | 59.3k | 0U, // MULA_AD_LH |
7484 | 59.3k | 0U, // MULA_AD_LL |
7485 | 59.3k | 0U, // MULA_DA_HH |
7486 | 59.3k | 0U, // MULA_DA_HH_LDDEC |
7487 | 59.3k | 0U, // MULA_DA_HH_LDINC |
7488 | 59.3k | 0U, // MULA_DA_HL |
7489 | 59.3k | 0U, // MULA_DA_HL_LDDEC |
7490 | 59.3k | 0U, // MULA_DA_HL_LDINC |
7491 | 59.3k | 0U, // MULA_DA_LH |
7492 | 59.3k | 0U, // MULA_DA_LH_LDDEC |
7493 | 59.3k | 0U, // MULA_DA_LH_LDINC |
7494 | 59.3k | 0U, // MULA_DA_LL |
7495 | 59.3k | 0U, // MULA_DA_LL_LDDEC |
7496 | 59.3k | 0U, // MULA_DA_LL_LDINC |
7497 | 59.3k | 0U, // MULA_DD_HH |
7498 | 59.3k | 0U, // MULA_DD_HH_LDDEC |
7499 | 59.3k | 0U, // MULA_DD_HH_LDINC |
7500 | 59.3k | 0U, // MULA_DD_HL |
7501 | 59.3k | 0U, // MULA_DD_HL_LDDEC |
7502 | 59.3k | 0U, // MULA_DD_HL_LDINC |
7503 | 59.3k | 0U, // MULA_DD_LH |
7504 | 59.3k | 0U, // MULA_DD_LH_LDDEC |
7505 | 59.3k | 0U, // MULA_DD_LH_LDINC |
7506 | 59.3k | 0U, // MULA_DD_LL |
7507 | 59.3k | 0U, // MULA_DD_LL_LDDEC |
7508 | 59.3k | 0U, // MULA_DD_LL_LDINC |
7509 | 59.3k | 0U, // MULL |
7510 | 59.3k | 0U, // MULSH |
7511 | 59.3k | 0U, // MULS_AA_HH |
7512 | 59.3k | 0U, // MULS_AA_HL |
7513 | 59.3k | 0U, // MULS_AA_LH |
7514 | 59.3k | 0U, // MULS_AA_LL |
7515 | 59.3k | 0U, // MULS_AD_HH |
7516 | 59.3k | 0U, // MULS_AD_HL |
7517 | 59.3k | 0U, // MULS_AD_LH |
7518 | 59.3k | 0U, // MULS_AD_LL |
7519 | 59.3k | 0U, // MULS_DA_HH |
7520 | 59.3k | 0U, // MULS_DA_HL |
7521 | 59.3k | 0U, // MULS_DA_LH |
7522 | 59.3k | 0U, // MULS_DA_LL |
7523 | 59.3k | 0U, // MULS_DD_HH |
7524 | 59.3k | 0U, // MULS_DD_HL |
7525 | 59.3k | 0U, // MULS_DD_LH |
7526 | 59.3k | 0U, // MULS_DD_LL |
7527 | 59.3k | 0U, // MULUH |
7528 | 59.3k | 0U, // MUL_AA_HH |
7529 | 59.3k | 0U, // MUL_AA_HL |
7530 | 59.3k | 0U, // MUL_AA_LH |
7531 | 59.3k | 0U, // MUL_AA_LL |
7532 | 59.3k | 0U, // MUL_AD_HH |
7533 | 59.3k | 0U, // MUL_AD_HL |
7534 | 59.3k | 0U, // MUL_AD_LH |
7535 | 59.3k | 0U, // MUL_AD_LL |
7536 | 59.3k | 0U, // MUL_DA_HH |
7537 | 59.3k | 0U, // MUL_DA_HL |
7538 | 59.3k | 0U, // MUL_DA_LH |
7539 | 59.3k | 0U, // MUL_DA_LL |
7540 | 59.3k | 0U, // MUL_DD_HH |
7541 | 59.3k | 0U, // MUL_DD_HL |
7542 | 59.3k | 0U, // MUL_DD_LH |
7543 | 59.3k | 0U, // MUL_DD_LL |
7544 | 59.3k | 0U, // MUL_S |
7545 | 59.3k | 0U, // NEG |
7546 | 59.3k | 0U, // NEG_S |
7547 | 59.3k | 0U, // NEXP01_S |
7548 | 59.3k | 0U, // NOP |
7549 | 59.3k | 0U, // NSA |
7550 | 59.3k | 0U, // NSAU |
7551 | 59.3k | 0U, // OEQ_S |
7552 | 59.3k | 0U, // OLE_S |
7553 | 59.3k | 0U, // OLT_S |
7554 | 59.3k | 0U, // OR |
7555 | 59.3k | 0U, // ORB |
7556 | 59.3k | 0U, // ORBC |
7557 | 59.3k | 0U, // QUOS |
7558 | 59.3k | 0U, // QUOU |
7559 | 59.3k | 0U, // RECIP0_S |
7560 | 59.3k | 0U, // REMS |
7561 | 59.3k | 0U, // REMU |
7562 | 59.3k | 0U, // RER |
7563 | 59.3k | 0U, // RET |
7564 | 59.3k | 0U, // RETW |
7565 | 59.3k | 0U, // RETW_N |
7566 | 59.3k | 0U, // RET_N |
7567 | 59.3k | 0U, // RFDE |
7568 | 59.3k | 0U, // RFE |
7569 | 59.3k | 0U, // RFI |
7570 | 59.3k | 0U, // RFR |
7571 | 59.3k | 0U, // RFWO |
7572 | 59.3k | 0U, // RFWU |
7573 | 59.3k | 0U, // ROTW |
7574 | 59.3k | 0U, // ROUND_S |
7575 | 59.3k | 0U, // RSIL |
7576 | 59.3k | 0U, // RSQRT0_S |
7577 | 59.3k | 0U, // RSR |
7578 | 59.3k | 0U, // RSYNC |
7579 | 59.3k | 0U, // RUR |
7580 | 59.3k | 0U, // RUR_ACCX_0 |
7581 | 59.3k | 0U, // RUR_ACCX_1 |
7582 | 59.3k | 0U, // RUR_AE_BITHEAD |
7583 | 59.3k | 0U, // RUR_AE_BITPTR |
7584 | 59.3k | 0U, // RUR_AE_BITSUSED |
7585 | 59.3k | 0U, // RUR_AE_CBEGIN0 |
7586 | 59.3k | 0U, // RUR_AE_CEND0 |
7587 | 59.3k | 0U, // RUR_AE_CWRAP |
7588 | 59.3k | 0U, // RUR_AE_CW_SD_NO |
7589 | 59.3k | 0U, // RUR_AE_FIRST_TS |
7590 | 59.3k | 0U, // RUR_AE_NEXTOFFSET |
7591 | 59.3k | 0U, // RUR_AE_OVERFLOW |
7592 | 59.3k | 0U, // RUR_AE_OVF_SAR |
7593 | 59.3k | 0U, // RUR_AE_SAR |
7594 | 59.3k | 0U, // RUR_AE_SEARCHDONE |
7595 | 59.3k | 0U, // RUR_AE_TABLESIZE |
7596 | 59.3k | 0U, // RUR_AE_TS_FTS_BU_BP |
7597 | 59.3k | 0U, // RUR_FFT_BIT_WIDTH |
7598 | 59.3k | 0U, // RUR_GPIO_OUT |
7599 | 59.3k | 0U, // RUR_QACC_H_0 |
7600 | 59.3k | 0U, // RUR_QACC_H_1 |
7601 | 59.3k | 0U, // RUR_QACC_H_2 |
7602 | 59.3k | 0U, // RUR_QACC_H_3 |
7603 | 59.3k | 0U, // RUR_QACC_H_4 |
7604 | 59.3k | 0U, // RUR_QACC_L_0 |
7605 | 59.3k | 0U, // RUR_QACC_L_1 |
7606 | 59.3k | 0U, // RUR_QACC_L_2 |
7607 | 59.3k | 0U, // RUR_QACC_L_3 |
7608 | 59.3k | 0U, // RUR_QACC_L_4 |
7609 | 59.3k | 0U, // RUR_SAR_BYTE |
7610 | 59.3k | 0U, // RUR_UA_STATE_0 |
7611 | 59.3k | 0U, // RUR_UA_STATE_1 |
7612 | 59.3k | 0U, // RUR_UA_STATE_2 |
7613 | 59.3k | 0U, // RUR_UA_STATE_3 |
7614 | 59.3k | 0U, // S16I |
7615 | 59.3k | 0U, // S32C1I |
7616 | 59.3k | 0U, // S32E |
7617 | 59.3k | 0U, // S32I |
7618 | 59.3k | 0U, // S32I_N |
7619 | 59.3k | 0U, // S8I |
7620 | 59.3k | 0U, // SET_BIT_GPIO_OUT |
7621 | 59.3k | 0U, // SEXT |
7622 | 59.3k | 0U, // SIMCALL |
7623 | 59.3k | 0U, // SLL |
7624 | 59.3k | 0U, // SLLI |
7625 | 59.3k | 0U, // SQRT0_S |
7626 | 59.3k | 0U, // SRA |
7627 | 59.3k | 0U, // SRAI |
7628 | 59.3k | 0U, // SRC |
7629 | 59.3k | 0U, // SRL |
7630 | 59.3k | 0U, // SRLI |
7631 | 59.3k | 0U, // SSA8L |
7632 | 59.3k | 0U, // SSAI |
7633 | 59.3k | 0U, // SSI |
7634 | 59.3k | 0U, // SSIP |
7635 | 59.3k | 0U, // SSL |
7636 | 59.3k | 0U, // SSR |
7637 | 59.3k | 0U, // SSX |
7638 | 59.3k | 0U, // SSXP |
7639 | 59.3k | 0U, // SUB |
7640 | 59.3k | 0U, // SUBX2 |
7641 | 59.3k | 0U, // SUBX4 |
7642 | 59.3k | 0U, // SUBX8 |
7643 | 59.3k | 0U, // SUB_S |
7644 | 59.3k | 0U, // SYSCALL |
7645 | 59.3k | 0U, // TRUNC_S |
7646 | 59.3k | 0U, // UEQ_S |
7647 | 59.3k | 0U, // UFLOAT_S |
7648 | 59.3k | 0U, // ULE_S |
7649 | 59.3k | 0U, // ULT_S |
7650 | 59.3k | 0U, // UMUL_AA_HH |
7651 | 59.3k | 0U, // UMUL_AA_HL |
7652 | 59.3k | 0U, // UMUL_AA_LH |
7653 | 59.3k | 0U, // UMUL_AA_LL |
7654 | 59.3k | 0U, // UN_S |
7655 | 59.3k | 0U, // UTRUNC_S |
7656 | 59.3k | 0U, // WAITI |
7657 | 59.3k | 0U, // WDTLB |
7658 | 59.3k | 0U, // WER |
7659 | 59.3k | 0U, // WFR |
7660 | 59.3k | 0U, // WITLB |
7661 | 59.3k | 0U, // WR_MASK_GPIO_OUT |
7662 | 59.3k | 0U, // WSR |
7663 | 59.3k | 0U, // WUR |
7664 | 59.3k | 0U, // WUR_ACCX_0 |
7665 | 59.3k | 0U, // WUR_ACCX_1 |
7666 | 59.3k | 0U, // WUR_AE_BITHEAD |
7667 | 59.3k | 0U, // WUR_AE_BITPTR |
7668 | 59.3k | 0U, // WUR_AE_BITSUSED |
7669 | 59.3k | 0U, // WUR_AE_CBEGIN0 |
7670 | 59.3k | 0U, // WUR_AE_CEND0 |
7671 | 59.3k | 0U, // WUR_AE_CWRAP |
7672 | 59.3k | 0U, // WUR_AE_CW_SD_NO |
7673 | 59.3k | 0U, // WUR_AE_FIRST_TS |
7674 | 59.3k | 0U, // WUR_AE_NEXTOFFSET |
7675 | 59.3k | 0U, // WUR_AE_OVERFLOW |
7676 | 59.3k | 0U, // WUR_AE_OVF_SAR |
7677 | 59.3k | 0U, // WUR_AE_SAR |
7678 | 59.3k | 0U, // WUR_AE_SEARCHDONE |
7679 | 59.3k | 0U, // WUR_AE_TABLESIZE |
7680 | 59.3k | 0U, // WUR_AE_TS_FTS_BU_BP |
7681 | 59.3k | 0U, // WUR_FCR |
7682 | 59.3k | 0U, // WUR_FFT_BIT_WIDTH |
7683 | 59.3k | 0U, // WUR_FSR |
7684 | 59.3k | 0U, // WUR_GPIO_OUT |
7685 | 59.3k | 0U, // WUR_QACC_H_0 |
7686 | 59.3k | 0U, // WUR_QACC_H_1 |
7687 | 59.3k | 0U, // WUR_QACC_H_2 |
7688 | 59.3k | 0U, // WUR_QACC_H_3 |
7689 | 59.3k | 0U, // WUR_QACC_H_4 |
7690 | 59.3k | 0U, // WUR_QACC_L_0 |
7691 | 59.3k | 0U, // WUR_QACC_L_1 |
7692 | 59.3k | 0U, // WUR_QACC_L_2 |
7693 | 59.3k | 0U, // WUR_QACC_L_3 |
7694 | 59.3k | 0U, // WUR_QACC_L_4 |
7695 | 59.3k | 0U, // WUR_SAR_BYTE |
7696 | 59.3k | 0U, // WUR_UA_STATE_0 |
7697 | 59.3k | 0U, // WUR_UA_STATE_1 |
7698 | 59.3k | 0U, // WUR_UA_STATE_2 |
7699 | 59.3k | 0U, // WUR_UA_STATE_3 |
7700 | 59.3k | 0U, // XOR |
7701 | 59.3k | 0U, // XORB |
7702 | 59.3k | 0U, // XSR |
7703 | 59.3k | 0U, // _L32I |
7704 | 59.3k | 0U, // _L32I_N |
7705 | 59.3k | 0U, // _MOVI |
7706 | 59.3k | 0U, // _S32I |
7707 | 59.3k | 0U, // _S32I_N |
7708 | 59.3k | 0U, // _SLLI |
7709 | 59.3k | 0U, // _SRLI |
7710 | 59.3k | 0U, // mv_QR |
7711 | 59.3k | }; |
7712 | | |
7713 | | // Emit the opcode for the instruction. |
7714 | 59.3k | uint64_t Bits = 0; |
7715 | 59.3k | Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0; |
7716 | 59.3k | Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32; |
7717 | 59.3k | Bits |= (uint64_t)OpInfo2[MCInst_getOpcode(MI)] << 48; |
7718 | 59.3k | MnemonicBitsInfo MBI = { |
7719 | 59.3k | #ifndef CAPSTONE_DIET |
7720 | 59.3k | AsmStrs+(Bits & 32767)-1, |
7721 | | #else |
7722 | | NULL, |
7723 | | #endif // CAPSTONE_DIET |
7724 | 59.3k | Bits |
7725 | 59.3k | }; |
7726 | 59.3k | return MBI; |
7727 | 59.3k | } |
7728 | | |
7729 | | /// printInstruction - This method is automatically generated by tablegen |
7730 | | /// from the instruction set description. |
7731 | 59.3k | static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { |
7732 | 59.3k | SStream_concat0(O, ""); |
7733 | 59.3k | MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O); |
7734 | | |
7735 | 59.3k | SStream_concat0(O, MnemonicInfo.first); |
7736 | | |
7737 | 59.3k | uint64_t Bits = MnemonicInfo.second; |
7738 | 59.3k | CS_ASSERT_RET(Bits != 0 && "Cannot print this instruction."); |
7739 | | |
7740 | | // Fragment 0 encoded into 4 bits for 13 unique commands. |
7741 | 59.3k | switch ((Bits >> 15) & 15) { |
7742 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7743 | 2.09k | case 0: |
7744 | | // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... |
7745 | 2.09k | return; |
7746 | 0 | break; |
7747 | 45.5k | case 1: |
7748 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI... |
7749 | 45.5k | printOperand(MI, 0, O); |
7750 | 45.5k | break; |
7751 | 0 | case 2: |
7752 | | // EE_ANDQ_P, EE_BITREV_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_... |
7753 | 0 | printImm8_AsmOperand(MI, 0, O); |
7754 | 0 | break; |
7755 | 0 | case 3: |
7756 | | // LOOPEND |
7757 | 0 | printBranchTarget(MI, 0, O); |
7758 | 0 | return; |
7759 | 0 | break; |
7760 | 4.60k | case 4: |
7761 | | // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DBI, AE_DBI_IC, AE_DBI_IP, AE_DB_IC, AE... |
7762 | 4.60k | printOperand(MI, 1, O); |
7763 | 4.60k | break; |
7764 | 1.92k | case 5: |
7765 | | // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,... |
7766 | 1.92k | printOperand(MI, 2, O); |
7767 | 1.92k | SStream_concat0(O, ", "); |
7768 | 1.92k | printOperand(MI, 3, O); |
7769 | 1.92k | break; |
7770 | 269 | case 6: |
7771 | | // BREAK, BREAK_N, RFI, WAITI |
7772 | 269 | printUimm4_AsmOperand(MI, 0, O); |
7773 | 269 | break; |
7774 | 3.11k | case 7: |
7775 | | // CALL0, CALL12, CALL4, CALL8 |
7776 | 3.11k | printCallOperand(MI, 0, O); |
7777 | 3.11k | return; |
7778 | 0 | break; |
7779 | 46 | case 8: |
7780 | | // CLR_BIT_GPIO_OUT, EE_CLR_BIT_GPIO_OUT, EE_SET_BIT_GPIO_OUT, SET_BIT_GP... |
7781 | 46 | printSelect_256_AsmOperand(MI, 0, O); |
7782 | 46 | return; |
7783 | 0 | break; |
7784 | 360 | case 9: |
7785 | | // EE_FFT_AMS_S16_ST_INCP, EE_SLCXXP_2Q, EE_SRCXXP_2Q |
7786 | 360 | printOperand(MI, 3, O); |
7787 | 360 | SStream_concat0(O, ", "); |
7788 | 360 | break; |
7789 | 816 | case 10: |
7790 | | // J |
7791 | 816 | printJumpTarget(MI, 0, O); |
7792 | 816 | return; |
7793 | 0 | break; |
7794 | 540 | case 11: |
7795 | | // ROTW |
7796 | 540 | printImm8n_7_AsmOperand(MI, 0, O); |
7797 | 540 | return; |
7798 | 0 | break; |
7799 | 77 | case 12: |
7800 | | // SSAI |
7801 | 77 | printUimm5_AsmOperand(MI, 0, O); |
7802 | 77 | return; |
7803 | 0 | break; |
7804 | 59.3k | } |
7805 | | |
7806 | | |
7807 | | // Fragment 1 encoded into 2 bits for 4 unique commands. |
7808 | 52.7k | switch ((Bits >> 19) & 3) { |
7809 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7810 | 50.7k | case 0: |
7811 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI... |
7812 | 50.7k | SStream_concat0(O, ", "); |
7813 | 50.7k | break; |
7814 | 1.57k | case 1: |
7815 | | // EE_MOV_S16_QACC_P, EE_MOV_S8_QACC_P, EE_MOV_U16_QACC_P, EE_MOV_U8_QACC... |
7816 | 1.57k | return; |
7817 | 0 | break; |
7818 | 237 | case 2: |
7819 | | // EE_FFT_AMS_S16_ST_INCP |
7820 | 237 | printOperand(MI, 0, O); |
7821 | 237 | SStream_concat0(O, ", "); |
7822 | 237 | printOperand(MI, 4, O); |
7823 | 237 | SStream_concat0(O, ", "); |
7824 | 237 | printOperand(MI, 5, O); |
7825 | 237 | SStream_concat0(O, ", "); |
7826 | 237 | printOperand(MI, 6, O); |
7827 | 237 | SStream_concat0(O, ", "); |
7828 | 237 | printOperand(MI, 7, O); |
7829 | 237 | SStream_concat0(O, ", "); |
7830 | 237 | printOperand(MI, 8, O); |
7831 | 237 | SStream_concat0(O, ", "); |
7832 | 237 | printSelect_2_AsmOperand(MI, 9, O); |
7833 | 237 | return; |
7834 | 0 | break; |
7835 | 123 | case 3: |
7836 | | // EE_SLCXXP_2Q, EE_SRCXXP_2Q |
7837 | 123 | printOperand(MI, 4, O); |
7838 | 123 | SStream_concat0(O, ", "); |
7839 | 123 | printOperand(MI, 5, O); |
7840 | 123 | SStream_concat0(O, ", "); |
7841 | 123 | printOperand(MI, 6, O); |
7842 | 123 | return; |
7843 | 0 | break; |
7844 | 52.7k | } |
7845 | | |
7846 | | |
7847 | | // Fragment 2 encoded into 5 bits for 29 unique commands. |
7848 | 50.7k | switch ((Bits >> 21) & 31) { |
7849 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
7850 | 17.9k | case 0: |
7851 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI... |
7852 | 17.9k | printOperand(MI, 1, O); |
7853 | 17.9k | break; |
7854 | 0 | case 1: |
7855 | | // EE_ANDQ_P, EE_CMUL_S16_P, EE_FFT_AMS_S16_ST_INCP_P, EE_FFT_CMUL_S16_ST... |
7856 | 0 | printImm8_AsmOperand(MI, 1, O); |
7857 | 0 | break; |
7858 | 0 | case 2: |
7859 | | // EE_LDQA_S16_128_IP_P, EE_LDQA_S8_128_IP_P, EE_LDQA_U16_128_IP_P, EE_LD... |
7860 | 0 | printOffset_256_16_AsmOperand(MI, 1, O); |
7861 | 0 | return; |
7862 | 0 | break; |
7863 | 0 | case 3: |
7864 | | // EE_LD_ACCX_IP_P, EE_ST_ACCX_IP_P |
7865 | 0 | printOffset_256_8_AsmOperand(MI, 1, O); |
7866 | 0 | return; |
7867 | 0 | break; |
7868 | 0 | case 4: |
7869 | | // EE_LD_QACC_H_H_32_IP_P, EE_LD_QACC_L_H_32_IP_P, EE_ST_QACC_H_H_32_IP_P... |
7870 | 0 | printOffset_256_4_AsmOperand(MI, 1, O); |
7871 | 0 | return; |
7872 | 0 | break; |
7873 | 5.63k | case 5: |
7874 | | // L8I_P, RESTORE_BOOL, SPILL_BOOL, L16SI, L16UI, L32I, L32I_N, L8UI, LEA... |
7875 | 5.63k | printMemOperand(MI, 1, O); |
7876 | 5.63k | return; |
7877 | 0 | break; |
7878 | 1.03k | case 6: |
7879 | | // LOOPBR, LOOPSTART, BEQZ, BF, BGEZ, BLTZ, BNEZ, BT |
7880 | 1.03k | printBranchTarget(MI, 1, O); |
7881 | 1.03k | return; |
7882 | 0 | break; |
7883 | 7.43k | case 7: |
7884 | | // ADDEXPM_S, ADDEXP_S, AE_DB, AE_DB_IC, AE_DB_IP, AE_DIV64D32_H, AE_DIV6... |
7885 | 7.43k | printOperand(MI, 2, O); |
7886 | 7.43k | break; |
7887 | 0 | case 8: |
7888 | | // AE_DBI, AE_DBI_IC, AE_DBI_IP |
7889 | 0 | printImm1_16_AsmOperand(MI, 2, O); |
7890 | 0 | return; |
7891 | 0 | break; |
7892 | 2.92k | case 9: |
7893 | | // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC... |
7894 | 2.92k | printOperand(MI, 3, O); |
7895 | 2.92k | SStream_concat0(O, ", "); |
7896 | 2.92k | break; |
7897 | 0 | case 10: |
7898 | | // AE_LBI, AE_LBSI |
7899 | 0 | printImm1_16_AsmOperand(MI, 1, O); |
7900 | 0 | return; |
7901 | 0 | break; |
7902 | 0 | case 11: |
7903 | | // AE_MOVI |
7904 | 0 | printImmOperand_minus16_47_1(MI, 1, O); |
7905 | 0 | return; |
7906 | 0 | break; |
7907 | 178 | case 12: |
7908 | | // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,... |
7909 | 178 | printOperand(MI, 4, O); |
7910 | 178 | break; |
7911 | 747 | case 13: |
7912 | | // BBCI, BBSI |
7913 | 747 | printUimm5_AsmOperand(MI, 1, O); |
7914 | 747 | SStream_concat0(O, ", "); |
7915 | 747 | printBranchTarget(MI, 2, O); |
7916 | 747 | return; |
7917 | 0 | break; |
7918 | 2.94k | case 14: |
7919 | | // BEQI, BGEI, BLTI, BNEI |
7920 | 2.94k | printB4const_AsmOperand(MI, 1, O); |
7921 | 2.94k | SStream_concat0(O, ", "); |
7922 | 2.94k | printBranchTarget(MI, 2, O); |
7923 | 2.94k | return; |
7924 | 0 | break; |
7925 | 3.71k | case 15: |
7926 | | // BGEUI, BLTUI |
7927 | 3.71k | printB4constu_AsmOperand(MI, 1, O); |
7928 | 3.71k | SStream_concat0(O, ", "); |
7929 | 3.71k | printBranchTarget(MI, 2, O); |
7930 | 3.71k | return; |
7931 | 0 | break; |
7932 | 164 | case 16: |
7933 | | // BREAK, CONST_S, RSIL |
7934 | 164 | printUimm4_AsmOperand(MI, 1, O); |
7935 | 164 | return; |
7936 | 0 | break; |
7937 | 573 | case 17: |
7938 | | // EE_LDQA_S16_128_IP, EE_LDQA_S8_128_IP, EE_LDQA_U16_128_IP, EE_LDQA_U8_... |
7939 | 573 | printOffset_256_16_AsmOperand(MI, 2, O); |
7940 | 573 | return; |
7941 | 0 | break; |
7942 | 34 | case 18: |
7943 | | // EE_LD_ACCX_IP, EE_ST_ACCX_IP |
7944 | 34 | printOffset_256_8_AsmOperand(MI, 2, O); |
7945 | 34 | return; |
7946 | 0 | break; |
7947 | 113 | case 19: |
7948 | | // EE_LD_QACC_H_H_32_IP, EE_LD_QACC_L_H_32_IP, EE_ST_QACC_H_H_32_IP, EE_S... |
7949 | 113 | printOffset_256_4_AsmOperand(MI, 2, O); |
7950 | 113 | return; |
7951 | 0 | break; |
7952 | 275 | case 20: |
7953 | | // EE_MOVI_32_A, WSR, WUR |
7954 | 275 | printOperand(MI, 0, O); |
7955 | 275 | break; |
7956 | 276 | case 21: |
7957 | | // EE_SLCI_2Q, EE_SRCI_2Q |
7958 | 276 | printSelect_16_AsmOperand(MI, 4, O); |
7959 | 276 | return; |
7960 | 0 | break; |
7961 | 868 | case 22: |
7962 | | // ENTRY |
7963 | 868 | printEntry_Imm12_AsmOperand(MI, 1, O); |
7964 | 868 | return; |
7965 | 0 | break; |
7966 | 3.94k | case 23: |
7967 | | // L32R |
7968 | 3.94k | printL32RTarget(MI, 1, O); |
7969 | 3.94k | return; |
7970 | 0 | break; |
7971 | 8 | case 24: |
7972 | | // LOOP, LOOPGTZ, LOOPNEZ |
7973 | 8 | printLoopTarget(MI, 1, O); |
7974 | 8 | return; |
7975 | 0 | break; |
7976 | 491 | case 25: |
7977 | | // MOVI |
7978 | 491 | printImm12m_AsmOperand(MI, 1, O); |
7979 | 491 | return; |
7980 | 0 | break; |
7981 | 1.30k | case 26: |
7982 | | // MOVI_N |
7983 | 1.30k | printImm32n_95_AsmOperand(MI, 1, O); |
7984 | 1.30k | return; |
7985 | 0 | break; |
7986 | 145 | case 27: |
7987 | | // S32C1I |
7988 | 145 | printMemOperand(MI, 2, O); |
7989 | 145 | return; |
7990 | 0 | break; |
7991 | 0 | case 28: |
7992 | | // _MOVI |
7993 | 0 | printImm12_AsmOperand(MI, 1, O); |
7994 | 0 | return; |
7995 | 0 | break; |
7996 | 50.7k | } |
7997 | | |
7998 | | |
7999 | | // Fragment 3 encoded into 3 bits for 6 unique commands. |
8000 | 28.7k | switch ((Bits >> 26) & 7) { |
8001 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8002 | 22.5k | case 0: |
8003 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI... |
8004 | 22.5k | SStream_concat0(O, ", "); |
8005 | 22.5k | break; |
8006 | 3.33k | case 1: |
8007 | | // BR_JT, EE_BITREV_P, EE_LDQA_S16_128_XP_P, EE_LDQA_S8_128_XP_P, EE_LDQA... |
8008 | 3.33k | return; |
8009 | 0 | break; |
8010 | 899 | case 2: |
8011 | | // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC... |
8012 | 899 | printOperand(MI, 4, O); |
8013 | 899 | break; |
8014 | 179 | case 3: |
8015 | | // EE_CMUL_S16_LD_INCP, EE_VADDS_S16_LD_INCP, EE_VADDS_S32_LD_INCP, EE_VA... |
8016 | 179 | printOperand(MI, 2, O); |
8017 | 179 | SStream_concat0(O, ", "); |
8018 | 179 | printOperand(MI, 4, O); |
8019 | 179 | SStream_concat0(O, ", "); |
8020 | 179 | printOperand(MI, 5, O); |
8021 | 179 | break; |
8022 | 151 | case 4: |
8023 | | // EE_SRC_Q_LD_IP |
8024 | 151 | printOffset_256_16_AsmOperand(MI, 4, O); |
8025 | 151 | SStream_concat0(O, ", "); |
8026 | 151 | printOperand(MI, 5, O); |
8027 | 151 | SStream_concat0(O, ", "); |
8028 | 151 | printOperand(MI, 6, O); |
8029 | 151 | return; |
8030 | 0 | break; |
8031 | 1.69k | case 5: |
8032 | | // EE_VMULAS_S16_ACCX_LD_IP_QUP, EE_VMULAS_S16_QACC_LD_IP_QUP, EE_VMULAS_... |
8033 | 1.69k | printOffset_64_16_AsmOperand(MI, 4, O); |
8034 | 1.69k | SStream_concat0(O, ", "); |
8035 | 1.69k | printOperand(MI, 5, O); |
8036 | 1.69k | SStream_concat0(O, ", "); |
8037 | 1.69k | printOperand(MI, 6, O); |
8038 | 1.69k | SStream_concat0(O, ", "); |
8039 | 1.69k | printOperand(MI, 7, O); |
8040 | 1.69k | SStream_concat0(O, ", "); |
8041 | 1.69k | printOperand(MI, 8, O); |
8042 | 1.69k | return; |
8043 | 0 | break; |
8044 | 28.7k | } |
8045 | | |
8046 | | |
8047 | | // Fragment 4 encoded into 6 bits for 45 unique commands. |
8048 | 23.6k | switch ((Bits >> 29) & 63) { |
8049 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8050 | 7.23k | case 0: |
8051 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, ATOMI... |
8052 | 7.23k | printOperand(MI, 2, O); |
8053 | 7.23k | break; |
8054 | 148 | case 1: |
8055 | | // EE_ANDQ_P, EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_P, EE_CMUL_S16_ST_INCP_P... |
8056 | 148 | printImm8_AsmOperand(MI, 2, O); |
8057 | 148 | break; |
8058 | 117 | case 2: |
8059 | | // EE_FFT_VST_R32_DECP_P, EE_SRCMB_S16_QACC_P, EE_SRCMB_S8_QACC_P, EE_SRS... |
8060 | 117 | printSelect_2_AsmOperand(MI, 2, O); |
8061 | 117 | return; |
8062 | 0 | break; |
8063 | 0 | case 3: |
8064 | | // EE_LD_128_USAR_IP_P, EE_SRC_Q_LD_IP_P, EE_VLD_128_IP_P, EE_VST_128_IP_... |
8065 | 0 | printOffset_256_16_AsmOperand(MI, 2, O); |
8066 | 0 | break; |
8067 | 170 | case 4: |
8068 | | // EE_MOVI_32_A_P, EE_MOVI_32_Q_P, EE_MOVI_32_A, EE_MOVI_32_Q |
8069 | 170 | printSelect_4_AsmOperand(MI, 2, O); |
8070 | 170 | return; |
8071 | 0 | break; |
8072 | 17 | case 5: |
8073 | | // EE_SLCI_2Q_P, EE_SRCI_2Q_P, EE_VSMULAS_S8_QACC_P, EE_VSMULAS_S8_QACC |
8074 | 17 | printSelect_16_AsmOperand(MI, 2, O); |
8075 | 17 | return; |
8076 | 0 | break; |
8077 | 0 | case 6: |
8078 | | // EE_VLDBC_16_IP_P |
8079 | 0 | printOffset_128_2_AsmOperand(MI, 2, O); |
8080 | 0 | return; |
8081 | 0 | break; |
8082 | 0 | case 7: |
8083 | | // EE_VLDBC_32_IP_P |
8084 | 0 | printOffset_256_4_AsmOperand(MI, 2, O); |
8085 | 0 | return; |
8086 | 0 | break; |
8087 | 0 | case 8: |
8088 | | // EE_VLDBC_8_IP_P |
8089 | 0 | printOffset_128_1_AsmOperand(MI, 2, O); |
8090 | 0 | return; |
8091 | 0 | break; |
8092 | 0 | case 9: |
8093 | | // EE_VLD_H_64_IP_P, EE_VLD_L_64_IP_P, EE_VST_H_64_IP_P, EE_VST_L_64_IP_P |
8094 | 0 | printOffset_256_8_AsmOperand(MI, 2, O); |
8095 | 0 | return; |
8096 | 0 | break; |
8097 | 0 | case 10: |
8098 | | // EE_VMULAS_S16_ACCX_LD_IP_P, EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_... |
8099 | 0 | printOffset_64_16_AsmOperand(MI, 2, O); |
8100 | 0 | SStream_concat0(O, ", "); |
8101 | 0 | printImm8_AsmOperand(MI, 3, O); |
8102 | 0 | SStream_concat0(O, ", "); |
8103 | 0 | printImm8_AsmOperand(MI, 4, O); |
8104 | 0 | break; |
8105 | 80 | case 11: |
8106 | | // EE_VSMULAS_S16_QACC_P, EE_VSMULAS_S16_QACC |
8107 | 80 | printSelect_8_AsmOperand(MI, 2, O); |
8108 | 80 | return; |
8109 | 0 | break; |
8110 | 3.99k | case 12: |
8111 | | // ADDI_N |
8112 | 3.99k | printImm1n_15_AsmOperand(MI, 2, O); |
8113 | 3.99k | return; |
8114 | 0 | break; |
8115 | 93 | case 13: |
8116 | | // ADDMI |
8117 | 93 | printImm8_sh8_AsmOperand(MI, 2, O); |
8118 | 93 | return; |
8119 | 0 | break; |
8120 | 0 | case 14: |
8121 | | // AE_L16M_I, AE_L16_I, AE_S16M_L_I, AE_S16_0_I |
8122 | 0 | printImmOperand_minus16_14_2(MI, 2, O); |
8123 | 0 | return; |
8124 | 0 | break; |
8125 | 0 | case 15: |
8126 | | // AE_L16M_IU, AE_L16_IP, AE_S16M_L_IU, AE_S16_0_IP |
8127 | 0 | printImmOperand_minus16_14_2(MI, 3, O); |
8128 | 0 | return; |
8129 | 0 | break; |
8130 | 3.61k | case 16: |
8131 | | // AE_L16M_XC, AE_L16M_XU, AE_L16X2M_XC, AE_L16X2M_XU, AE_L16X4_XC, AE_L1... |
8132 | 3.61k | printOperand(MI, 3, O); |
8133 | 3.61k | break; |
8134 | 9 | case 17: |
8135 | | // AE_L16X2M_I, AE_L32F24_I, AE_L32M_I, AE_L32_I, AE_S16X2M_I, AE_S24RA64... |
8136 | 9 | printImmOperand_minus32_28_4(MI, 2, O); |
8137 | 9 | return; |
8138 | 0 | break; |
8139 | 18 | case 18: |
8140 | | // AE_L16X2M_IU, AE_L32F24_IP, AE_L32M_IU, AE_L32_IP, AE_S16X2M_IU, AE_S2... |
8141 | 18 | printImmOperand_minus32_28_4(MI, 3, O); |
8142 | 18 | return; |
8143 | 0 | break; |
8144 | 27 | case 19: |
8145 | | // AE_L16X4_I, AE_L32X2F24_I, AE_L32X2_I, AE_L64_I, AE_LALIGN64_I, AE_S16... |
8146 | 27 | printImmOperand_minus64_56_8(MI, 2, O); |
8147 | 27 | return; |
8148 | 0 | break; |
8149 | 0 | case 20: |
8150 | | // AE_L16X4_IP, AE_L32X2F24_IP, AE_L32X2_IP, AE_S16X4_IP, AE_S32X2F24_IP,... |
8151 | 0 | printImmOperand_0_56_8(MI, 3, O); |
8152 | 0 | return; |
8153 | 0 | break; |
8154 | 0 | case 21: |
8155 | | // AE_L64_IP, AE_S64_IP |
8156 | 0 | printImmOperand_minus64_56_8(MI, 3, O); |
8157 | 0 | return; |
8158 | 0 | break; |
8159 | 117 | case 22: |
8160 | | // AE_LA16X4_IC, AE_LA16X4_IP, AE_LA16X4_RIC, AE_LA16X4_RIP, AE_LA24X2_IC... |
8161 | 117 | return; |
8162 | 0 | break; |
8163 | 0 | case 23: |
8164 | | // AE_LBKI |
8165 | 0 | printImm1_16_AsmOperand(MI, 2, O); |
8166 | 0 | return; |
8167 | 0 | break; |
8168 | 0 | case 24: |
8169 | | // AE_MULA16X4, AE_MULAF16X4SS, AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L,... |
8170 | 0 | printOperand(MI, 5, O); |
8171 | 0 | break; |
8172 | 0 | case 25: |
8173 | | // AE_PKSR24, AE_PKSR32 |
8174 | 0 | printImmOperand_0_3_1(MI, 3, O); |
8175 | 0 | return; |
8176 | 0 | break; |
8177 | 0 | case 26: |
8178 | | // AE_SBI, AE_SBI_IC, AE_SBI_IP |
8179 | 0 | printImm1_16_AsmOperand(MI, 3, O); |
8180 | 0 | return; |
8181 | 0 | break; |
8182 | 74 | case 27: |
8183 | | // AE_SEXT32, CLAMPS, SEXT |
8184 | 74 | printImm7_22_AsmOperand(MI, 2, O); |
8185 | 74 | return; |
8186 | 0 | break; |
8187 | 319 | case 28: |
8188 | | // AE_SLAI16S, AE_SRAI16, AE_SRAI16R, CEIL_S, FLOAT_S, FLOOR_S, ROUND_S, ... |
8189 | 319 | printUimm4_AsmOperand(MI, 2, O); |
8190 | 319 | return; |
8191 | 0 | break; |
8192 | 794 | case 29: |
8193 | | // AE_SLAI24, AE_SLAI24S, AE_SLAI32, AE_SLAI32S, AE_SRAI24, AE_SRAI32, AE... |
8194 | 794 | printUimm5_AsmOperand(MI, 2, O); |
8195 | 794 | break; |
8196 | 0 | case 30: |
8197 | | // AE_SLAI64, AE_SLAI64S, AE_SLAISQ56S, AE_SRAI64, AE_SRLI64 |
8198 | 0 | printImmOperand_0_63_1(MI, 2, O); |
8199 | 0 | return; |
8200 | 0 | break; |
8201 | 858 | case 31: |
8202 | | // BALL, BANY, BBC, BBS, BEQ, BGE, BGEU, BLT, BLTU, BNALL, BNE, BNONE |
8203 | 858 | printBranchTarget(MI, 2, O); |
8204 | 858 | return; |
8205 | 0 | break; |
8206 | 961 | case 32: |
8207 | | // EE_CMUL_S16_LD_INCP, EE_FFT_CMUL_S16_LD_XP, EE_SRC_Q_LD_XP, EE_VMULAS_... |
8208 | 961 | SStream_concat0(O, ", "); |
8209 | 961 | break; |
8210 | 568 | case 33: |
8211 | | // EE_CMUL_S16_ST_INCP, EE_VADDS_S16_ST_INCP, EE_VADDS_S32_ST_INCP, EE_VA... |
8212 | 568 | printOperand(MI, 4, O); |
8213 | 568 | SStream_concat0(O, ", "); |
8214 | 568 | printOperand(MI, 5, O); |
8215 | 568 | break; |
8216 | 21 | case 34: |
8217 | | // EE_FFT_VST_R32_DECP |
8218 | 21 | printSelect_2_AsmOperand(MI, 3, O); |
8219 | 21 | return; |
8220 | 0 | break; |
8221 | 315 | case 35: |
8222 | | // EE_LD_128_USAR_IP, EE_VLD_128_IP, EE_VST_128_IP |
8223 | 315 | printOffset_256_16_AsmOperand(MI, 3, O); |
8224 | 315 | return; |
8225 | 0 | break; |
8226 | 806 | case 36: |
8227 | | // EE_VLDBC_16_IP |
8228 | 806 | printOffset_128_2_AsmOperand(MI, 3, O); |
8229 | 806 | return; |
8230 | 0 | break; |
8231 | 411 | case 37: |
8232 | | // EE_VLDBC_32_IP |
8233 | 411 | printOffset_256_4_AsmOperand(MI, 3, O); |
8234 | 411 | return; |
8235 | 0 | break; |
8236 | 530 | case 38: |
8237 | | // EE_VLDBC_8_IP |
8238 | 530 | printOffset_128_1_AsmOperand(MI, 3, O); |
8239 | 530 | return; |
8240 | 0 | break; |
8241 | 1.07k | case 39: |
8242 | | // EE_VLD_H_64_IP, EE_VLD_L_64_IP, EE_VST_H_64_IP, EE_VST_L_64_IP |
8243 | 1.07k | printOffset_256_8_AsmOperand(MI, 3, O); |
8244 | 1.07k | return; |
8245 | 0 | break; |
8246 | 225 | case 40: |
8247 | | // EE_VMULAS_S16_ACCX_LD_IP, EE_VMULAS_S16_QACC_LD_IP, EE_VMULAS_S8_ACCX_... |
8248 | 225 | printOffset_64_16_AsmOperand(MI, 3, O); |
8249 | 225 | SStream_concat0(O, ", "); |
8250 | 225 | printOperand(MI, 4, O); |
8251 | 225 | SStream_concat0(O, ", "); |
8252 | 225 | printOperand(MI, 5, O); |
8253 | 225 | return; |
8254 | 0 | break; |
8255 | 62 | case 41: |
8256 | | // L32E, S32E |
8257 | 62 | printImm64n_4n_AsmOperand(MI, 2, O); |
8258 | 62 | return; |
8259 | 0 | break; |
8260 | 592 | case 42: |
8261 | | // LSIP, SSIP |
8262 | 592 | printOffset8m32_AsmOperand(MI, 3, O); |
8263 | 592 | return; |
8264 | 0 | break; |
8265 | 351 | case 43: |
8266 | | // SLLI |
8267 | 351 | printShimm0_31_AsmOperand(MI, 2, O); |
8268 | 351 | return; |
8269 | 0 | break; |
8270 | 0 | case 44: |
8271 | | // _SLLI |
8272 | 0 | printShimm1_31_AsmOperand(MI, 2, O); |
8273 | 0 | return; |
8274 | 0 | break; |
8275 | 23.6k | } |
8276 | | |
8277 | | |
8278 | | // Fragment 5 encoded into 3 bits for 5 unique commands. |
8279 | 13.3k | switch ((Bits >> 35) & 7) { |
8280 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8281 | 4.54k | case 0: |
8282 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, BRCC_... |
8283 | 4.54k | SStream_concat0(O, ", "); |
8284 | 4.54k | break; |
8285 | 7.81k | case 1: |
8286 | | // ATOMIC_LOAD_ADD_16_P, ATOMIC_LOAD_ADD_32_P, ATOMIC_LOAD_ADD_8_P, ATOMI... |
8287 | 7.81k | return; |
8288 | 0 | break; |
8289 | 75 | case 2: |
8290 | | // EE_CMUL_S16_LD_INCP |
8291 | 75 | printSelect_4_AsmOperand(MI, 6, O); |
8292 | 75 | return; |
8293 | 0 | break; |
8294 | 209 | case 3: |
8295 | | // EE_FFT_CMUL_S16_LD_XP |
8296 | 209 | printOperand(MI, 2, O); |
8297 | 209 | SStream_concat0(O, ", "); |
8298 | 209 | printOperand(MI, 5, O); |
8299 | 209 | SStream_concat0(O, ", "); |
8300 | 209 | printOperand(MI, 6, O); |
8301 | 209 | SStream_concat0(O, ", "); |
8302 | 209 | printSelect_8_AsmOperand(MI, 7, O); |
8303 | 209 | return; |
8304 | 0 | break; |
8305 | 677 | case 4: |
8306 | | // EE_SRC_Q_LD_XP, EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_... |
8307 | 677 | printOperand(MI, 5, O); |
8308 | 677 | SStream_concat0(O, ", "); |
8309 | 677 | printOperand(MI, 6, O); |
8310 | 677 | break; |
8311 | 13.3k | } |
8312 | | |
8313 | | |
8314 | | // Fragment 6 encoded into 4 bits for 15 unique commands. |
8315 | 5.22k | switch ((Bits >> 38) & 15) { |
8316 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8317 | 981 | case 0: |
8318 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_FF... |
8319 | 981 | printOperand(MI, 3, O); |
8320 | 981 | break; |
8321 | 0 | case 1: |
8322 | | // BRCC_FP |
8323 | 0 | printBranchTarget(MI, 3, O); |
8324 | 0 | return; |
8325 | 0 | break; |
8326 | 0 | case 2: |
8327 | | // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P... |
8328 | 0 | printImm8_AsmOperand(MI, 3, O); |
8329 | 0 | break; |
8330 | 350 | case 3: |
8331 | | // EE_CMUL_S16_P, EE_LDXQ_32_P, EE_STXQ_32_P, EE_CMUL_S16, EE_LDXQ_32, EE... |
8332 | 350 | printSelect_4_AsmOperand(MI, 3, O); |
8333 | 350 | break; |
8334 | 0 | case 4: |
8335 | | // EE_LDF_64_IP_P, EE_STF_64_IP_P |
8336 | 0 | printOffset_256_8_AsmOperand(MI, 3, O); |
8337 | 0 | return; |
8338 | 0 | break; |
8339 | 0 | case 5: |
8340 | | // EE_VMULAS_S16_ACCX_LD_IP_QUP_P, EE_VMULAS_S16_QACC_LD_IP_QUP_P, EE_VMU... |
8341 | 0 | printImm8_AsmOperand(MI, 5, O); |
8342 | 0 | SStream_concat0(O, ", "); |
8343 | 0 | printImm8_AsmOperand(MI, 6, O); |
8344 | 0 | return; |
8345 | 0 | break; |
8346 | 0 | case 6: |
8347 | | // AE_MULAFD24X2_FIR_H, AE_MULAFD24X2_FIR_L, AE_MULAFD32X16X2_FIR_HH, AE_... |
8348 | 0 | printOperand(MI, 6, O); |
8349 | 0 | return; |
8350 | 0 | break; |
8351 | 0 | case 7: |
8352 | | // AE_SEL16I, AE_TRUNCI32F64S_L, AE_TRUNCI32X2F64S |
8353 | 0 | printUimm4_AsmOperand(MI, 3, O); |
8354 | 0 | return; |
8355 | 0 | break; |
8356 | 0 | case 8: |
8357 | | // AE_SEL16I_N |
8358 | 0 | printImmOperand_0_3_1(MI, 3, O); |
8359 | 0 | return; |
8360 | 0 | break; |
8361 | 142 | case 9: |
8362 | | // EE_CMUL_S16_ST_INCP |
8363 | 142 | printSelect_4_AsmOperand(MI, 6, O); |
8364 | 142 | return; |
8365 | 0 | break; |
8366 | 2.19k | case 10: |
8367 | | // EE_FFT_CMUL_S16_ST_XP, EE_FFT_R2BF_S16_ST_INCP, EE_LDF_64_XP, EE_STF_1... |
8368 | 2.19k | printOperand(MI, 4, O); |
8369 | 2.19k | break; |
8370 | 169 | case 11: |
8371 | | // EE_LDF_64_IP, EE_STF_64_IP |
8372 | 169 | printOffset_256_8_AsmOperand(MI, 4, O); |
8373 | 169 | return; |
8374 | 0 | break; |
8375 | 21 | case 12: |
8376 | | // EE_SRC_Q_LD_XP |
8377 | 21 | return; |
8378 | 0 | break; |
8379 | 656 | case 13: |
8380 | | // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LDBC_INCP_QUP, EE_VMU... |
8381 | 656 | SStream_concat0(O, ", "); |
8382 | 656 | printOperand(MI, 7, O); |
8383 | 656 | break; |
8384 | 709 | case 14: |
8385 | | // EXTUI |
8386 | 709 | printImm1_16_AsmOperand(MI, 3, O); |
8387 | 709 | return; |
8388 | 0 | break; |
8389 | 5.22k | } |
8390 | | |
8391 | | |
8392 | | // Fragment 7 encoded into 1 bits for 2 unique commands. |
8393 | 4.17k | if ((Bits >> 42) & 1) { |
8394 | | // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P... |
8395 | 2.70k | SStream_concat0(O, ", "); |
8396 | 2.70k | } else { |
8397 | | // ATOMIC_CMP_SWAP_16_P, ATOMIC_CMP_SWAP_32_P, ATOMIC_CMP_SWAP_8_P, EE_CM... |
8398 | 1.47k | return; |
8399 | 1.47k | } |
8400 | | |
8401 | | |
8402 | | // Fragment 8 encoded into 4 bits for 11 unique commands. |
8403 | 2.70k | switch ((Bits >> 43) & 15) { |
8404 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8405 | 0 | case 0: |
8406 | | // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P... |
8407 | 0 | printImm8_AsmOperand(MI, 4, O); |
8408 | 0 | break; |
8409 | 0 | case 1: |
8410 | | // EE_FFT_CMUL_S16_ST_XP_P, EE_LDF_128_IP_P, EE_LDF_128_XP_P, EE_STF_128_... |
8411 | 0 | printOperand(MI, 4, O); |
8412 | 0 | break; |
8413 | 52 | case 2: |
8414 | | // EE_FFT_R2BF_S16_P, EE_FFT_R2BF_S16 |
8415 | 52 | printSelect_2_AsmOperand(MI, 4, O); |
8416 | 52 | return; |
8417 | 0 | break; |
8418 | 0 | case 3: |
8419 | | // EE_FFT_R2BF_S16_ST_INCP_P |
8420 | 0 | printSelect_4_AsmOperand(MI, 4, O); |
8421 | 0 | return; |
8422 | 0 | break; |
8423 | 322 | case 4: |
8424 | | // EE_LDXQ_32_P, EE_STXQ_32_P, EE_VSMULAS_S16_QACC_LD_INCP_P, EE_LDXQ_32,... |
8425 | 322 | printSelect_8_AsmOperand(MI, 4, O); |
8426 | 322 | return; |
8427 | 0 | break; |
8428 | 0 | case 5: |
8429 | | // EE_VSMULAS_S8_QACC_LD_INCP_P |
8430 | 0 | printSelect_16_AsmOperand(MI, 4, O); |
8431 | 0 | return; |
8432 | 0 | break; |
8433 | 1.57k | case 6: |
8434 | | // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD... |
8435 | 1.57k | printOperand(MI, 5, O); |
8436 | 1.57k | break; |
8437 | 64 | case 7: |
8438 | | // EE_FFT_R2BF_S16_ST_INCP |
8439 | 64 | printSelect_4_AsmOperand(MI, 5, O); |
8440 | 64 | return; |
8441 | 0 | break; |
8442 | 594 | case 8: |
8443 | | // EE_VMULAS_S16_ACCX_LD_XP_QUP, EE_VMULAS_S16_QACC_LD_XP_QUP, EE_VMULAS_... |
8444 | 594 | printOperand(MI, 8, O); |
8445 | 594 | return; |
8446 | 0 | break; |
8447 | 61 | case 9: |
8448 | | // EE_VSMULAS_S16_QACC_LD_INCP |
8449 | 61 | printSelect_8_AsmOperand(MI, 5, O); |
8450 | 61 | return; |
8451 | 0 | break; |
8452 | 35 | case 10: |
8453 | | // EE_VSMULAS_S8_QACC_LD_INCP |
8454 | 35 | printSelect_16_AsmOperand(MI, 5, O); |
8455 | 35 | return; |
8456 | 0 | break; |
8457 | 2.70k | } |
8458 | | |
8459 | | |
8460 | | // Fragment 9 encoded into 1 bits for 2 unique commands. |
8461 | 1.57k | if ((Bits >> 47) & 1) { |
8462 | | // EE_SRC_Q_LD_IP_P, EE_SRC_Q_LD_XP_P, EE_VADDS_S16_LD_INCP_P, EE_VADDS_S... |
8463 | 9 | return; |
8464 | 1.56k | } else { |
8465 | | // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P, EE_FFT_AMS_S16_LD_INCP_P... |
8466 | 1.56k | SStream_concat0(O, ", "); |
8467 | 1.56k | } |
8468 | | |
8469 | | |
8470 | | // Fragment 10 encoded into 3 bits for 8 unique commands. |
8471 | 1.56k | switch ((Bits >> 48) & 7) { |
8472 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8473 | 0 | case 0: |
8474 | | // EE_CMUL_S16_LD_INCP_P, EE_CMUL_S16_ST_INCP_P |
8475 | 0 | printSelect_4_AsmOperand(MI, 5, O); |
8476 | 0 | return; |
8477 | 0 | break; |
8478 | 0 | case 1: |
8479 | | // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1... |
8480 | 0 | printImm8_AsmOperand(MI, 5, O); |
8481 | 0 | break; |
8482 | 0 | case 2: |
8483 | | // EE_FFT_CMUL_S16_ST_XP_P |
8484 | 0 | printSelect_8_AsmOperand(MI, 5, O); |
8485 | 0 | SStream_concat0(O, ", "); |
8486 | 0 | printSelect_4_AsmOperand(MI, 6, O); |
8487 | 0 | SStream_concat0(O, ", "); |
8488 | 0 | printSelect_4_AsmOperand(MI, 7, O); |
8489 | 0 | return; |
8490 | 0 | break; |
8491 | 0 | case 3: |
8492 | | // EE_LDF_128_IP_P, EE_STF_128_IP_P |
8493 | 0 | printOffset_16_16_AsmOperand(MI, 5, O); |
8494 | 0 | return; |
8495 | 0 | break; |
8496 | 0 | case 4: |
8497 | | // EE_LDF_128_XP_P, EE_STF_128_XP_P, SELECT, SELECT_CC_FP_FP, SELECT_CC_F... |
8498 | 0 | printOperand(MI, 5, O); |
8499 | 0 | return; |
8500 | 0 | break; |
8501 | 1.03k | case 5: |
8502 | | // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD... |
8503 | 1.03k | printOperand(MI, 6, O); |
8504 | 1.03k | break; |
8505 | 335 | case 6: |
8506 | | // EE_FFT_CMUL_S16_ST_XP |
8507 | 335 | printSelect_8_AsmOperand(MI, 6, O); |
8508 | 335 | SStream_concat0(O, ", "); |
8509 | 335 | printSelect_4_AsmOperand(MI, 7, O); |
8510 | 335 | SStream_concat0(O, ", "); |
8511 | 335 | printSelect_4_AsmOperand(MI, 8, O); |
8512 | 335 | return; |
8513 | 0 | break; |
8514 | 191 | case 7: |
8515 | | // EE_LDF_128_IP, EE_STF_128_IP |
8516 | 191 | printOffset_16_16_AsmOperand(MI, 6, O); |
8517 | 191 | return; |
8518 | 0 | break; |
8519 | 1.56k | } |
8520 | | |
8521 | | |
8522 | | // Fragment 11 encoded into 1 bits for 2 unique commands. |
8523 | 1.03k | if ((Bits >> 51) & 1) { |
8524 | | // EE_VMULAS_S16_QACC_LDBC_INCP_QUP_P, EE_VMULAS_S8_QACC_LDBC_INCP_QUP_P,... |
8525 | 862 | return; |
8526 | 862 | } else { |
8527 | | // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1... |
8528 | 177 | SStream_concat0(O, ", "); |
8529 | 177 | } |
8530 | | |
8531 | | |
8532 | | // Fragment 12 encoded into 2 bits for 3 unique commands. |
8533 | 177 | switch ((Bits >> 52) & 3) { |
8534 | 0 | default: CS_ASSERT_RET(0 && "Invalid command number."); |
8535 | 0 | case 0: |
8536 | | // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1... |
8537 | 0 | printImm8_AsmOperand(MI, 6, O); |
8538 | 0 | break; |
8539 | 0 | case 1: |
8540 | | // EE_FFT_CMUL_S16_LD_XP_P |
8541 | 0 | printSelect_8_AsmOperand(MI, 6, O); |
8542 | 0 | return; |
8543 | 0 | break; |
8544 | 177 | case 2: |
8545 | | // EE_FFT_AMS_S16_LD_INCP, EE_FFT_AMS_S16_LD_INCP_UAUP, EE_FFT_AMS_S16_LD... |
8546 | 177 | printOperand(MI, 7, O); |
8547 | 177 | SStream_concat0(O, ", "); |
8548 | 177 | printSelect_2_AsmOperand(MI, 8, O); |
8549 | 177 | return; |
8550 | 0 | break; |
8551 | 177 | } |
8552 | | |
8553 | | |
8554 | | // Fragment 13 encoded into 1 bits for 2 unique commands. |
8555 | 0 | if ((Bits >> 54) & 1) { |
8556 | | // EE_VMULAS_S16_ACCX_LD_XP_QUP_P, EE_VMULAS_S16_QACC_LD_XP_QUP_P, EE_VMU... |
8557 | 0 | return; |
8558 | 0 | } else { |
8559 | | // EE_FFT_AMS_S16_LD_INCP_P, EE_FFT_AMS_S16_LD_INCP_UAUP_P, EE_FFT_AMS_S1... |
8560 | 0 | SStream_concat0(O, ", "); |
8561 | 0 | printSelect_2_AsmOperand(MI, 7, O); |
8562 | 0 | return; |
8563 | 0 | } |
8564 | |
|
8565 | 0 | } |
8566 | | |
8567 | | |
8568 | | /// getRegisterName - This method is automatically generated by tblgen |
8569 | | /// from the register set description. This returns the assembler name |
8570 | | /// for the specified register. |
8571 | 129k | static const char *getRegisterName(unsigned RegNo) { |
8572 | 129k | #ifndef CAPSTONE_DIET |
8573 | 129k | CS_ASSERT_RET_VAL(RegNo && RegNo < 170 && "Invalid register number!", NULL); |
8574 | | |
8575 | 129k | static const char AsmStrs[] = { |
8576 | 129k | /* 0 */ "a10\0" |
8577 | 129k | /* 4 */ "b10\0" |
8578 | 129k | /* 8 */ "aed10\0" |
8579 | 129k | /* 14 */ "f10\0" |
8580 | 129k | /* 18 */ "dbreaka0\0" |
8581 | 129k | /* 27 */ "ibreaka0\0" |
8582 | 129k | /* 36 */ "b0\0" |
8583 | 129k | /* 39 */ "dbreakc0\0" |
8584 | 129k | /* 48 */ "misc0\0" |
8585 | 129k | /* 54 */ "aed0\0" |
8586 | 129k | /* 59 */ "configid0\0" |
8587 | 129k | /* 69 */ "ccompare0\0" |
8588 | 129k | /* 79 */ "f0\0" |
8589 | 129k | /* 82 */ "m0\0" |
8590 | 129k | /* 85 */ "q0\0" |
8591 | 129k | /* 88 */ "u0\0" |
8592 | 129k | /* 91 */ "B8_B9_B10_B11\0" |
8593 | 129k | /* 105 */ "a11\0" |
8594 | 129k | /* 109 */ "b11\0" |
8595 | 129k | /* 113 */ "aed11\0" |
8596 | 129k | /* 119 */ "f11\0" |
8597 | 129k | /* 123 */ "B0_B1\0" |
8598 | 129k | /* 129 */ "dbreaka1\0" |
8599 | 129k | /* 138 */ "ibreaka1\0" |
8600 | 129k | /* 147 */ "b1\0" |
8601 | 129k | /* 150 */ "dbreakc1\0" |
8602 | 129k | /* 159 */ "epc1\0" |
8603 | 129k | /* 164 */ "misc1\0" |
8604 | 129k | /* 170 */ "aed1\0" |
8605 | 129k | /* 175 */ "configid1\0" |
8606 | 129k | /* 185 */ "ccompare1\0" |
8607 | 129k | /* 195 */ "scompare1\0" |
8608 | 129k | /* 205 */ "excsave1\0" |
8609 | 129k | /* 214 */ "f1\0" |
8610 | 129k | /* 217 */ "m1\0" |
8611 | 129k | /* 220 */ "q1\0" |
8612 | 129k | /* 223 */ "u1\0" |
8613 | 129k | /* 226 */ "a12\0" |
8614 | 129k | /* 230 */ "b12\0" |
8615 | 129k | /* 234 */ "aed12\0" |
8616 | 129k | /* 240 */ "f12\0" |
8617 | 129k | /* 244 */ "a2\0" |
8618 | 129k | /* 247 */ "b2\0" |
8619 | 129k | /* 250 */ "epc2\0" |
8620 | 129k | /* 255 */ "misc2\0" |
8621 | 129k | /* 261 */ "aed2\0" |
8622 | 129k | /* 266 */ "ccompare2\0" |
8623 | 129k | /* 276 */ "excsave2\0" |
8624 | 129k | /* 285 */ "f2\0" |
8625 | 129k | /* 288 */ "m2\0" |
8626 | 129k | /* 291 */ "q2\0" |
8627 | 129k | /* 294 */ "eps2\0" |
8628 | 129k | /* 299 */ "u2\0" |
8629 | 129k | /* 302 */ "B12_B13\0" |
8630 | 129k | /* 310 */ "a13\0" |
8631 | 129k | /* 314 */ "b13\0" |
8632 | 129k | /* 318 */ "aed13\0" |
8633 | 129k | /* 324 */ "f13\0" |
8634 | 129k | /* 328 */ "B0_B1_B2_B3\0" |
8635 | 129k | /* 340 */ "a3\0" |
8636 | 129k | /* 343 */ "b3\0" |
8637 | 129k | /* 346 */ "epc3\0" |
8638 | 129k | /* 351 */ "misc3\0" |
8639 | 129k | /* 357 */ "aed3\0" |
8640 | 129k | /* 362 */ "excsave3\0" |
8641 | 129k | /* 371 */ "f3\0" |
8642 | 129k | /* 374 */ "m3\0" |
8643 | 129k | /* 377 */ "q3\0" |
8644 | 129k | /* 380 */ "eps3\0" |
8645 | 129k | /* 385 */ "u3\0" |
8646 | 129k | /* 388 */ "a14\0" |
8647 | 129k | /* 392 */ "b14\0" |
8648 | 129k | /* 396 */ "aed14\0" |
8649 | 129k | /* 402 */ "f14\0" |
8650 | 129k | /* 406 */ "a4\0" |
8651 | 129k | /* 409 */ "b4\0" |
8652 | 129k | /* 412 */ "epc4\0" |
8653 | 129k | /* 417 */ "aed4\0" |
8654 | 129k | /* 422 */ "excsave4\0" |
8655 | 129k | /* 431 */ "f4\0" |
8656 | 129k | /* 434 */ "q4\0" |
8657 | 129k | /* 437 */ "eps4\0" |
8658 | 129k | /* 442 */ "B12_B13_B14_B15\0" |
8659 | 129k | /* 458 */ "a15\0" |
8660 | 129k | /* 462 */ "b15\0" |
8661 | 129k | /* 466 */ "aed15\0" |
8662 | 129k | /* 472 */ "f15\0" |
8663 | 129k | /* 476 */ "B4_B5\0" |
8664 | 129k | /* 482 */ "a5\0" |
8665 | 129k | /* 485 */ "b5\0" |
8666 | 129k | /* 488 */ "epc5\0" |
8667 | 129k | /* 493 */ "aed5\0" |
8668 | 129k | /* 498 */ "excsave5\0" |
8669 | 129k | /* 507 */ "f5\0" |
8670 | 129k | /* 510 */ "q5\0" |
8671 | 129k | /* 513 */ "eps5\0" |
8672 | 129k | /* 518 */ "a6\0" |
8673 | 129k | /* 521 */ "b6\0" |
8674 | 129k | /* 524 */ "epc6\0" |
8675 | 129k | /* 529 */ "aed6\0" |
8676 | 129k | /* 534 */ "excsave6\0" |
8677 | 129k | /* 543 */ "f6\0" |
8678 | 129k | /* 546 */ "q6\0" |
8679 | 129k | /* 549 */ "eps6\0" |
8680 | 129k | /* 554 */ "B4_B5_B6_B7\0" |
8681 | 129k | /* 566 */ "a7\0" |
8682 | 129k | /* 569 */ "b7\0" |
8683 | 129k | /* 572 */ "epc7\0" |
8684 | 129k | /* 577 */ "aed7\0" |
8685 | 129k | /* 582 */ "excsave7\0" |
8686 | 129k | /* 591 */ "f7\0" |
8687 | 129k | /* 594 */ "q7\0" |
8688 | 129k | /* 597 */ "eps7\0" |
8689 | 129k | /* 602 */ "a8\0" |
8690 | 129k | /* 605 */ "b8\0" |
8691 | 129k | /* 608 */ "aed8\0" |
8692 | 129k | /* 613 */ "f8\0" |
8693 | 129k | /* 616 */ "B8_B9\0" |
8694 | 129k | /* 622 */ "a9\0" |
8695 | 129k | /* 625 */ "b9\0" |
8696 | 129k | /* 628 */ "aed9\0" |
8697 | 129k | /* 633 */ "f9\0" |
8698 | 129k | /* 636 */ "qacc\0" |
8699 | 129k | /* 641 */ "depc\0" |
8700 | 129k | /* 646 */ "prid\0" |
8701 | 129k | /* 651 */ "lend\0" |
8702 | 129k | /* 656 */ "ibreakenable\0" |
8703 | 129k | /* 669 */ "cpenable\0" |
8704 | 129k | /* 678 */ "intenable\0" |
8705 | 129k | /* 688 */ "vecbase\0" |
8706 | 129k | /* 696 */ "litbase\0" |
8707 | 129k | /* 704 */ "windowbase\0" |
8708 | 129k | /* 715 */ "exccause\0" |
8709 | 129k | /* 724 */ "debugcause\0" |
8710 | 129k | /* 735 */ "ua_state\0" |
8711 | 129k | /* 744 */ "expstate\0" |
8712 | 129k | /* 753 */ "sar_byte\0" |
8713 | 129k | /* 762 */ "lbeg\0" |
8714 | 129k | /* 767 */ "fft_bit_width\0" |
8715 | 129k | /* 781 */ "f64r_hi\0" |
8716 | 129k | /* 789 */ "acchi\0" |
8717 | 129k | /* 795 */ "icountlevel\0" |
8718 | 129k | /* 807 */ "memctl\0" |
8719 | 129k | /* 814 */ "atomctl\0" |
8720 | 129k | /* 822 */ "f64r_lo\0" |
8721 | 129k | /* 830 */ "acclo\0" |
8722 | 129k | /* 836 */ "intclear\0" |
8723 | 129k | /* 845 */ "sar\0" |
8724 | 129k | /* 849 */ "br\0" |
8725 | 129k | /* 852 */ "fcr\0" |
8726 | 129k | /* 856 */ "excvaddr\0" |
8727 | 129k | /* 865 */ "fsr\0" |
8728 | 129k | /* 869 */ "threadptr\0" |
8729 | 129k | /* 879 */ "f64s\0" |
8730 | 129k | /* 884 */ "ps\0" |
8731 | 129k | /* 887 */ "ccount\0" |
8732 | 129k | /* 894 */ "icount\0" |
8733 | 129k | /* 901 */ "lcount\0" |
8734 | 129k | /* 908 */ "interrupt\0" |
8735 | 129k | /* 918 */ "windowstart\0" |
8736 | 129k | /* 930 */ "gpio_out\0" |
8737 | 129k | /* 939 */ "accx\0" |
8738 | 129k | }; |
8739 | 129k | static const uint16_t RegAsmOffset[] = { |
8740 | 129k | 789, 830, 939, 814, 849, 887, 669, 861, 724, 641, 715, 856, 744, 852, |
8741 | 129k | 767, 865, 930, 656, 894, 795, 836, 678, 908, 762, 901, 651, 696, 807, |
8742 | 129k | 646, 884, 636, 845, 753, 135, 869, 735, 688, 704, 918, 24, 244, 340, |
8743 | 129k | 406, 482, 518, 566, 602, 622, 0, 105, 226, 310, 388, 458, 54, 170, |
8744 | 129k | 261, 357, 417, 493, 529, 577, 608, 628, 8, 113, 234, 318, 396, 466, |
8745 | 129k | 36, 147, 247, 343, 409, 485, 521, 569, 605, 625, 4, 109, 230, 314, |
8746 | 129k | 392, 462, 69, 185, 266, 59, 175, 18, 129, 39, 150, 159, 250, 346, |
8747 | 129k | 412, 488, 524, 572, 294, 380, 437, 513, 549, 597, 205, 276, 362, 422, |
8748 | 129k | 498, 534, 582, 79, 214, 285, 371, 431, 507, 543, 591, 613, 633, 14, |
8749 | 129k | 119, 240, 324, 402, 472, 27, 138, 82, 217, 288, 374, 48, 164, 255, |
8750 | 129k | 351, 85, 220, 291, 377, 434, 510, 546, 594, 195, 88, 223, 299, 385, |
8751 | 129k | 781, 822, 879, 123, 334, 476, 560, 616, 97, 302, 450, 328, 554, 91, |
8752 | 129k | 442, |
8753 | 129k | }; |
8754 | | |
8755 | 129k | CS_ASSERT_RET_VAL(*(AsmStrs+RegAsmOffset[RegNo-1]) && |
8756 | 129k | "Invalid alt name index for register!", NULL); |
8757 | 129k | return AsmStrs+RegAsmOffset[RegNo-1]; |
8758 | | #else |
8759 | | return NULL; |
8760 | | #endif // CAPSTONE_DIET |
8761 | 129k | } |
8762 | | #ifdef PRINT_ALIAS_INSTR |
8763 | | #undef PRINT_ALIAS_INSTR |
8764 | | |
8765 | | static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { |
8766 | | #ifndef CAPSTONE_DIET |
8767 | | static const PatternsForOpcode OpToPatterns[] = { |
8768 | | {Xtensa_ADD, 0, 1 }, |
8769 | | {Xtensa_ADDI, 1, 1 }, |
8770 | | {Xtensa_ADDI_N, 2, 1 }, |
8771 | | {Xtensa_ADD_N, 3, 1 }, |
8772 | | {Xtensa_BALL, 4, 1 }, |
8773 | | {Xtensa_BANY, 5, 1 }, |
8774 | | {Xtensa_BBC, 6, 1 }, |
8775 | | {Xtensa_BBS, 7, 1 }, |
8776 | | {Xtensa_BEQ, 8, 1 }, |
8777 | | {Xtensa_BEQI, 9, 1 }, |
8778 | | {Xtensa_BEQZ, 10, 1 }, |
8779 | | {Xtensa_BF, 11, 1 }, |
8780 | | {Xtensa_BGE, 12, 1 }, |
8781 | | {Xtensa_BGEI, 13, 1 }, |
8782 | | {Xtensa_BGEU, 14, 1 }, |
8783 | | {Xtensa_BGEUI, 15, 1 }, |
8784 | | {Xtensa_BGEZ, 16, 1 }, |
8785 | | {Xtensa_BLT, 17, 1 }, |
8786 | | {Xtensa_BLTI, 18, 1 }, |
8787 | | {Xtensa_BLTU, 19, 1 }, |
8788 | | {Xtensa_BLTUI, 20, 1 }, |
8789 | | {Xtensa_BLTZ, 21, 1 }, |
8790 | | {Xtensa_BNALL, 22, 1 }, |
8791 | | {Xtensa_BNE, 23, 1 }, |
8792 | | {Xtensa_BNEI, 24, 1 }, |
8793 | | {Xtensa_BNEZ, 25, 1 }, |
8794 | | {Xtensa_BNONE, 26, 1 }, |
8795 | | {Xtensa_BREAK_N, 27, 1 }, |
8796 | | {Xtensa_BT, 28, 1 }, |
8797 | | {Xtensa_LOOP, 29, 1 }, |
8798 | | {Xtensa_LOOPGTZ, 30, 1 }, |
8799 | | {Xtensa_LOOPNEZ, 31, 1 }, |
8800 | | {Xtensa_MOVI_N, 32, 1 }, |
8801 | | {Xtensa_NOP, 33, 1 }, |
8802 | | {Xtensa_OR, 34, 1 }, |
8803 | | {Xtensa_RET, 35, 1 }, |
8804 | | {Xtensa_RETW, 36, 1 }, |
8805 | | {Xtensa_RETW_N, 37, 1 }, |
8806 | | {Xtensa_RET_N, 38, 1 }, |
8807 | | {0}, }; |
8808 | | |
8809 | | static const AliasPattern Patterns[] = { |
8810 | | // Xtensa_ADD - 0 |
8811 | | {0, 0, 3, 3 }, |
8812 | | // Xtensa_ADDI - 1 |
8813 | | {16, 3, 3, 2 }, |
8814 | | // Xtensa_ADDI_N - 2 |
8815 | | {35, 5, 3, 2 }, |
8816 | | // Xtensa_ADD_N - 3 |
8817 | | {56, 7, 3, 3 }, |
8818 | | // Xtensa_BALL - 4 |
8819 | | {74, 10, 3, 2 }, |
8820 | | // Xtensa_BANY - 5 |
8821 | | {93, 12, 3, 2 }, |
8822 | | // Xtensa_BBC - 6 |
8823 | | {112, 14, 3, 2 }, |
8824 | | // Xtensa_BBS - 7 |
8825 | | {130, 16, 3, 2 }, |
8826 | | // Xtensa_BEQ - 8 |
8827 | | {148, 18, 3, 2 }, |
8828 | | // Xtensa_BEQI - 9 |
8829 | | {166, 20, 3, 2 }, |
8830 | | // Xtensa_BEQZ - 10 |
8831 | | {187, 22, 2, 1 }, |
8832 | | // Xtensa_BF - 11 |
8833 | | {202, 23, 2, 1 }, |
8834 | | // Xtensa_BGE - 12 |
8835 | | {215, 24, 3, 2 }, |
8836 | | // Xtensa_BGEI - 13 |
8837 | | {233, 26, 3, 2 }, |
8838 | | // Xtensa_BGEU - 14 |
8839 | | {254, 28, 3, 2 }, |
8840 | | // Xtensa_BGEUI - 15 |
8841 | | {273, 30, 3, 2 }, |
8842 | | // Xtensa_BGEZ - 16 |
8843 | | {295, 32, 2, 1 }, |
8844 | | // Xtensa_BLT - 17 |
8845 | | {310, 33, 3, 2 }, |
8846 | | // Xtensa_BLTI - 18 |
8847 | | {328, 35, 3, 2 }, |
8848 | | // Xtensa_BLTU - 19 |
8849 | | {349, 37, 3, 2 }, |
8850 | | // Xtensa_BLTUI - 20 |
8851 | | {368, 39, 3, 2 }, |
8852 | | // Xtensa_BLTZ - 21 |
8853 | | {390, 41, 2, 1 }, |
8854 | | // Xtensa_BNALL - 22 |
8855 | | {405, 42, 3, 2 }, |
8856 | | // Xtensa_BNE - 23 |
8857 | | {425, 44, 3, 2 }, |
8858 | | // Xtensa_BNEI - 24 |
8859 | | {443, 46, 3, 2 }, |
8860 | | // Xtensa_BNEZ - 25 |
8861 | | {464, 48, 2, 1 }, |
8862 | | // Xtensa_BNONE - 26 |
8863 | | {479, 49, 3, 2 }, |
8864 | | // Xtensa_BREAK_N - 27 |
8865 | | {499, 51, 1, 0 }, |
8866 | | // Xtensa_BT - 28 |
8867 | | {513, 51, 2, 1 }, |
8868 | | // Xtensa_LOOP - 29 |
8869 | | {526, 52, 2, 1 }, |
8870 | | // Xtensa_LOOPGTZ - 30 |
8871 | | {541, 53, 2, 1 }, |
8872 | | // Xtensa_LOOPNEZ - 31 |
8873 | | {559, 54, 2, 1 }, |
8874 | | // Xtensa_MOVI_N - 32 |
8875 | | {577, 55, 2, 1 }, |
8876 | | // Xtensa_NOP - 33 |
8877 | | {594, 56, 0, 0 }, |
8878 | | // Xtensa_OR - 34 |
8879 | | {599, 56, 3, 3 }, |
8880 | | // Xtensa_RET - 35 |
8881 | | {611, 59, 0, 0 }, |
8882 | | // Xtensa_RETW - 36 |
8883 | | {616, 59, 0, 0 }, |
8884 | | // Xtensa_RETW_N - 37 |
8885 | | {622, 59, 0, 0 }, |
8886 | | // Xtensa_RET_N - 38 |
8887 | | {630, 59, 0, 0 }, |
8888 | | {0}, }; |
8889 | | |
8890 | | static const AliasPatternCond Conds[] = { |
8891 | | // (ADD AR:$r, AR:$s, AR:$t) - 0 |
8892 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8893 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8894 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8895 | | // (ADDI AR:$r, AR:$s, imm8:$imm8) - 3 |
8896 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8897 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8898 | | // (ADDI_N AR:$r, AR:$s, imm1n_15:$imm) - 5 |
8899 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8900 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8901 | | // (ADD_N AR:$r, AR:$s, AR:$t) - 7 |
8902 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8903 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8904 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8905 | | // (BALL AR:$s, AR:$t, brtarget:$target) - 10 |
8906 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8907 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8908 | | // (BANY AR:$s, AR:$t, brtarget:$target) - 12 |
8909 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8910 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8911 | | // (BBC AR:$s, AR:$t, brtarget:$target) - 14 |
8912 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8913 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8914 | | // (BBS AR:$s, AR:$t, brtarget:$target) - 16 |
8915 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8916 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8917 | | // (BEQ AR:$s, AR:$t, brtarget:$target) - 18 |
8918 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8919 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8920 | | // (BEQI AR:$s, b4const:$imm, brtarget:$target) - 20 |
8921 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8922 | | {AliasPatternCond_K_Ignore, 0}, |
8923 | | // (BEQZ AR:$s, brtarget:$target) - 22 |
8924 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8925 | | // (BF BR:$b, brtarget:$target) - 23 |
8926 | | {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID}, |
8927 | | // (BGE AR:$s, AR:$t, brtarget:$target) - 24 |
8928 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8929 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8930 | | // (BGEI AR:$s, b4const:$imm, brtarget:$target) - 26 |
8931 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8932 | | {AliasPatternCond_K_Ignore, 0}, |
8933 | | // (BGEU AR:$s, AR:$t, brtarget:$target) - 28 |
8934 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8935 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8936 | | // (BGEUI AR:$s, b4constu:$imm, brtarget:$target) - 30 |
8937 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8938 | | {AliasPatternCond_K_Ignore, 0}, |
8939 | | // (BGEZ AR:$s, brtarget:$target) - 32 |
8940 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8941 | | // (BLT AR:$s, AR:$t, brtarget:$target) - 33 |
8942 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8943 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8944 | | // (BLTI AR:$s, b4const:$imm, brtarget:$target) - 35 |
8945 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8946 | | {AliasPatternCond_K_Ignore, 0}, |
8947 | | // (BLTU AR:$s, AR:$t, brtarget:$target) - 37 |
8948 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8949 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8950 | | // (BLTUI AR:$s, b4constu:$imm, brtarget:$target) - 39 |
8951 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8952 | | {AliasPatternCond_K_Ignore, 0}, |
8953 | | // (BLTZ AR:$s, brtarget:$target) - 41 |
8954 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8955 | | // (BNALL AR:$s, AR:$t, brtarget:$target) - 42 |
8956 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8957 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8958 | | // (BNE AR:$s, AR:$t, brtarget:$target) - 44 |
8959 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8960 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8961 | | // (BNEI AR:$s, b4const:$imm, brtarget:$target) - 46 |
8962 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8963 | | {AliasPatternCond_K_Ignore, 0}, |
8964 | | // (BNEZ AR:$s, brtarget:$target) - 48 |
8965 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8966 | | // (BNONE AR:$s, AR:$t, brtarget:$target) - 49 |
8967 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8968 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8969 | | // (BREAK_N uimm4:$imm) - 51 |
8970 | | // (BT BR:$b, brtarget:$target) - 51 |
8971 | | {AliasPatternCond_K_RegClass, Xtensa_BRRegClassID}, |
8972 | | // (LOOP AR:$s, ltarget:$target) - 52 |
8973 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8974 | | // (LOOPGTZ AR:$s, ltarget:$target) - 53 |
8975 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8976 | | // (LOOPNEZ AR:$s, ltarget:$target) - 54 |
8977 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8978 | | // (MOVI_N AR:$s, imm32n_95:$imm7) - 55 |
8979 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8980 | | // (NOP) - 56 |
8981 | | // (OR AR:$t, AR:$s, AR:$s) - 56 |
8982 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8983 | | {AliasPatternCond_K_RegClass, Xtensa_ARRegClassID}, |
8984 | | {AliasPatternCond_K_TiedReg, 1}, |
8985 | | // (RET) - 59 |
8986 | | // (RETW) - 59 |
8987 | | // (RETW_N) - 59 |
8988 | | // (RET_N) - 59 |
8989 | | {0}, }; |
8990 | | |
8991 | | static const char AsmStrings[] = |
8992 | | /* 0 */ "_add $\x01, $\x02, $\x03\0" |
8993 | | /* 16 */ "_addi $\x01, $\x02, $\xFF\x03\x01\0" |
8994 | | /* 35 */ "_addi.n $\x01, $\x02, $\xFF\x03\x02\0" |
8995 | | /* 56 */ "_add.n $\x01, $\x02, $\x03\0" |
8996 | | /* 74 */ "_ball $\x01, $\x02, $\xFF\x03\x03\0" |
8997 | | /* 93 */ "_bany $\x01, $\x02, $\xFF\x03\x03\0" |
8998 | | /* 112 */ "_bbc $\x01, $\x02, $\xFF\x03\x03\0" |
8999 | | /* 130 */ "_bbs $\x01, $\x02, $\xFF\x03\x03\0" |
9000 | | /* 148 */ "_beq $\x01, $\x02, $\xFF\x03\x03\0" |
9001 | | /* 166 */ "_beqi $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0" |
9002 | | /* 187 */ "_beqz $\x01, $\xFF\x02\x03\0" |
9003 | | /* 202 */ "_BF $\x01, $\xFF\x02\x03\0" |
9004 | | /* 215 */ "_bge $\x01, $\x02, $\xFF\x03\x03\0" |
9005 | | /* 233 */ "_bgei $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0" |
9006 | | /* 254 */ "_bgeu $\x01, $\x02, $\xFF\x03\x03\0" |
9007 | | /* 273 */ "_bgeui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0" |
9008 | | /* 295 */ "_bgez $\x01, $\xFF\x02\x03\0" |
9009 | | /* 310 */ "_blt $\x01, $\x02, $\xFF\x03\x03\0" |
9010 | | /* 328 */ "_blti $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0" |
9011 | | /* 349 */ "_bltu $\x01, $\x02, $\xFF\x03\x03\0" |
9012 | | /* 368 */ "_bltui $\x01, $\xFF\x02\x06, $\xFF\x03\x03\0" |
9013 | | /* 390 */ "_bltz $\x01, $\xFF\x02\x03\0" |
9014 | | /* 405 */ "_bnall $\x01, $\x02, $\xFF\x03\x03\0" |
9015 | | /* 425 */ "_bne $\x01, $\x02, $\xFF\x03\x03\0" |
9016 | | /* 443 */ "_bnei $\x01, $\xFF\x02\x05, $\xFF\x03\x03\0" |
9017 | | /* 464 */ "_bnez $\x01, $\xFF\x02\x03\0" |
9018 | | /* 479 */ "_bnone $\x01, $\x02, $\xFF\x03\x03\0" |
9019 | | /* 499 */ "_break.n $\xFF\x01\x07\0" |
9020 | | /* 513 */ "_BT $\x01, $\xFF\x02\x03\0" |
9021 | | /* 526 */ "_loop $\x01, $\xFF\x02\x08\0" |
9022 | | /* 541 */ "_loopgtz $\x01, $\xFF\x02\x08\0" |
9023 | | /* 559 */ "_loopnez $\x01, $\xFF\x02\x08\0" |
9024 | | /* 577 */ "_movi.n $\x01, $\xFF\x02\x09\0" |
9025 | | /* 594 */ "_nop\0" |
9026 | | /* 599 */ "mov $\x01, $\x02\0" |
9027 | | /* 611 */ "_ret\0" |
9028 | | /* 616 */ "_retw\0" |
9029 | | /* 622 */ "_retw.n\0" |
9030 | | /* 630 */ "_ret.n\0" |
9031 | | ; |
9032 | | |
9033 | | #ifndef NDEBUG |
9034 | | //static struct SortCheck { |
9035 | | // SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) { |
9036 | | // assert(std::is_sorted( |
9037 | | // OpToPatterns.begin(), OpToPatterns.end(), |
9038 | | // [](const PatternsForOpcode &L, const //PatternsForOpcode &R) { |
9039 | | // return L.Opcode < R.Opcode; |
9040 | | // }) && |
9041 | | // "tablegen failed to sort opcode patterns"); |
9042 | | // } |
9043 | | //} sortCheckVar(OpToPatterns); |
9044 | | #endif |
9045 | | |
9046 | | AliasMatchingData M = { |
9047 | | OpToPatterns, |
9048 | | Patterns, |
9049 | | Conds, |
9050 | | AsmStrings, |
9051 | | NULL, |
9052 | | }; |
9053 | | const char *AsmString = matchAliasPatterns(MI, &M); |
9054 | | if (!AsmString) return false; |
9055 | | |
9056 | | unsigned I = 0; |
9057 | | while (AsmString[I] != ' ' && AsmString[I] != '\t' && |
9058 | | AsmString[I] != '$' && AsmString[I] != '\0') |
9059 | | ++I; |
9060 | | SStream_concat1(OS, '\t'); |
9061 | | char *substr = malloc(I+1); |
9062 | | memcpy(substr, AsmString, I); |
9063 | | substr[I] = '\0'; |
9064 | | SStream_concat0(OS, substr); |
9065 | | free(substr); |
9066 | | if (AsmString[I] != '\0') { |
9067 | | if (AsmString[I] == ' ' || AsmString[I] == '\t') { |
9068 | | SStream_concat1(OS, '\t'); |
9069 | | ++I; |
9070 | | } |
9071 | | do { |
9072 | | if (AsmString[I] == '$') { |
9073 | | ++I; |
9074 | | if (AsmString[I] == (char)0xff) { |
9075 | | ++I; |
9076 | | int OpIdx = AsmString[I++] - 1; |
9077 | | int PrintMethodIdx = AsmString[I++] - 1; |
9078 | | printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, OS); |
9079 | | } else |
9080 | | printOperand(MI, ((unsigned)AsmString[I++]) - 1, OS); |
9081 | | } else { |
9082 | | SStream_concat1(OS, AsmString[I++]); |
9083 | | } |
9084 | | } while (AsmString[I] != '\0'); |
9085 | | } |
9086 | | |
9087 | | return true; |
9088 | | #else |
9089 | | return false; |
9090 | | #endif // CAPSTONE_DIET |
9091 | | } |
9092 | | |
9093 | | static void printCustomAliasOperand( |
9094 | | MCInst *MI, uint64_t Address, unsigned OpIdx, |
9095 | | unsigned PrintMethodIdx, |
9096 | | SStream *OS) { |
9097 | | #ifndef CAPSTONE_DIET |
9098 | | switch (PrintMethodIdx) { |
9099 | | default: |
9100 | | CS_ASSERT_RET(0 && "Unknown PrintMethod kind"); |
9101 | | break; |
9102 | | case 0: |
9103 | | printImm8_AsmOperand(MI, OpIdx, OS); |
9104 | | break; |
9105 | | case 1: |
9106 | | printImm1n_15_AsmOperand(MI, OpIdx, OS); |
9107 | | break; |
9108 | | case 2: |
9109 | | printBranchTarget(MI, OpIdx, OS); |
9110 | | break; |
9111 | | case 3: |
9112 | | printUimm5_AsmOperand(MI, OpIdx, OS); |
9113 | | break; |
9114 | | case 4: |
9115 | | printB4const_AsmOperand(MI, OpIdx, OS); |
9116 | | break; |
9117 | | case 5: |
9118 | | printB4constu_AsmOperand(MI, OpIdx, OS); |
9119 | | break; |
9120 | | case 6: |
9121 | | printUimm4_AsmOperand(MI, OpIdx, OS); |
9122 | | break; |
9123 | | case 7: |
9124 | | printLoopTarget(MI, OpIdx, OS); |
9125 | | break; |
9126 | | case 8: |
9127 | | printImm32n_95_AsmOperand(MI, OpIdx, OS); |
9128 | | break; |
9129 | | } |
9130 | | #endif // CAPSTONE_DIET |
9131 | | } |
9132 | | |
9133 | | #endif // PRINT_ALIAS_INSTR |