Coverage Report

Created: 2026-06-15 06:41

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
18.6k
{
50
18.6k
  uint8_t Imm =
51
18.6k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
18.6k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
6.56k
  case 0:
56
6.56k
    SStream_concat0(O, "eq");
57
6.56k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
6.56k
    break;
59
1.32k
  case 1:
60
1.32k
    SStream_concat0(O, "lt");
61
1.32k
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
1.32k
    break;
63
1.59k
  case 2:
64
1.59k
    SStream_concat0(O, "le");
65
1.59k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.59k
    break;
67
680
  case 3:
68
680
    SStream_concat0(O, "unord");
69
680
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
680
    break;
71
504
  case 4:
72
504
    SStream_concat0(O, "neq");
73
504
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
504
    break;
75
840
  case 5:
76
840
    SStream_concat0(O, "nlt");
77
840
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
840
    break;
79
367
  case 6:
80
367
    SStream_concat0(O, "nle");
81
367
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
367
    break;
83
340
  case 7:
84
340
    SStream_concat0(O, "ord");
85
340
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
340
    break;
87
719
  case 8:
88
719
    SStream_concat0(O, "eq_uq");
89
719
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
719
    break;
91
503
  case 9:
92
503
    SStream_concat0(O, "nge");
93
503
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
503
    break;
95
95
  case 0xa:
96
95
    SStream_concat0(O, "ngt");
97
95
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
95
    break;
99
197
  case 0xb:
100
197
    SStream_concat0(O, "false");
101
197
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
197
    break;
103
280
  case 0xc:
104
280
    SStream_concat0(O, "neq_oq");
105
280
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
280
    break;
107
311
  case 0xd:
108
311
    SStream_concat0(O, "ge");
109
311
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
311
    break;
111
152
  case 0xe:
112
152
    SStream_concat0(O, "gt");
113
152
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
152
    break;
115
349
  case 0xf:
116
349
    SStream_concat0(O, "true");
117
349
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
349
    break;
119
262
  case 0x10:
120
262
    SStream_concat0(O, "eq_os");
121
262
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
262
    break;
123
414
  case 0x11:
124
414
    SStream_concat0(O, "lt_oq");
125
414
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
414
    break;
127
77
  case 0x12:
128
77
    SStream_concat0(O, "le_oq");
129
77
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
77
    break;
131
148
  case 0x13:
132
148
    SStream_concat0(O, "unord_s");
133
148
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
148
    break;
135
555
  case 0x14:
136
555
    SStream_concat0(O, "neq_us");
137
555
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
555
    break;
139
402
  case 0x15:
140
402
    SStream_concat0(O, "nlt_uq");
141
402
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
402
    break;
143
299
  case 0x16:
144
299
    SStream_concat0(O, "nle_uq");
145
299
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
299
    break;
147
188
  case 0x17:
148
188
    SStream_concat0(O, "ord_s");
149
188
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
188
    break;
151
328
  case 0x18:
152
328
    SStream_concat0(O, "eq_us");
153
328
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
328
    break;
155
131
  case 0x19:
156
131
    SStream_concat0(O, "nge_uq");
157
131
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
131
    break;
159
205
  case 0x1a:
160
205
    SStream_concat0(O, "ngt_uq");
161
205
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
205
    break;
163
130
  case 0x1b:
164
130
    SStream_concat0(O, "false_os");
165
130
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
130
    break;
167
205
  case 0x1c:
168
205
    SStream_concat0(O, "neq_os");
169
205
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
205
    break;
171
151
  case 0x1d:
172
151
    SStream_concat0(O, "ge_oq");
173
151
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
151
    break;
175
169
  case 0x1e:
176
169
    SStream_concat0(O, "gt_oq");
177
169
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
169
    break;
179
127
  case 0x1f:
180
127
    SStream_concat0(O, "true_us");
181
127
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
127
    break;
183
18.6k
  }
184
185
18.6k
  MI->popcode_adjust = Imm + 1;
186
18.6k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
4.97k
{
190
4.97k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
4.97k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
1.09k
  case 0:
195
1.09k
    SStream_concat0(O, "lt");
196
1.09k
    op_addXopCC(MI, X86_XOP_CC_LT);
197
1.09k
    break;
198
441
  case 1:
199
441
    SStream_concat0(O, "le");
200
441
    op_addXopCC(MI, X86_XOP_CC_LE);
201
441
    break;
202
1.06k
  case 2:
203
1.06k
    SStream_concat0(O, "gt");
204
1.06k
    op_addXopCC(MI, X86_XOP_CC_GT);
205
1.06k
    break;
206
973
  case 3:
207
973
    SStream_concat0(O, "ge");
208
973
    op_addXopCC(MI, X86_XOP_CC_GE);
209
973
    break;
210
389
  case 4:
211
389
    SStream_concat0(O, "eq");
212
389
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
389
    break;
214
131
  case 5:
215
131
    SStream_concat0(O, "neq");
216
131
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
131
    break;
218
314
  case 6:
219
314
    SStream_concat0(O, "false");
220
314
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
314
    break;
222
566
  case 7:
223
566
    SStream_concat0(O, "true");
224
566
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
566
    break;
226
4.97k
  }
227
4.97k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
5.54k
{
231
5.54k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
5.54k
  switch (Imm) {
233
1.69k
  case 0:
234
1.69k
    SStream_concat0(O, "{rn-sae}");
235
1.69k
    op_addAvxSae(MI);
236
1.69k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.69k
    break;
238
913
  case 1:
239
913
    SStream_concat0(O, "{rd-sae}");
240
913
    op_addAvxSae(MI);
241
913
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
913
    break;
243
1.18k
  case 2:
244
1.18k
    SStream_concat0(O, "{ru-sae}");
245
1.18k
    op_addAvxSae(MI);
246
1.18k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
1.18k
    break;
248
1.74k
  case 3:
249
1.74k
    SStream_concat0(O, "{rz-sae}");
250
1.74k
    op_addAvxSae(MI);
251
1.74k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
1.74k
    break;
253
0
  default:
254
0
    break; // never reach
255
5.54k
  }
256
5.54k
}
257
#endif