Coverage Report

Created: 2026-07-16 06:55

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
18.7k
{
50
18.7k
  uint8_t Imm =
51
18.7k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
18.7k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
7.06k
  case 0:
56
7.06k
    SStream_concat0(O, "eq");
57
7.06k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
7.06k
    break;
59
832
  case 1:
60
832
    SStream_concat0(O, "lt");
61
832
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
832
    break;
63
1.58k
  case 2:
64
1.58k
    SStream_concat0(O, "le");
65
1.58k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.58k
    break;
67
327
  case 3:
68
327
    SStream_concat0(O, "unord");
69
327
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
327
    break;
71
132
  case 4:
72
132
    SStream_concat0(O, "neq");
73
132
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
132
    break;
75
566
  case 5:
76
566
    SStream_concat0(O, "nlt");
77
566
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
566
    break;
79
103
  case 6:
80
103
    SStream_concat0(O, "nle");
81
103
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
103
    break;
83
554
  case 7:
84
554
    SStream_concat0(O, "ord");
85
554
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
554
    break;
87
489
  case 8:
88
489
    SStream_concat0(O, "eq_uq");
89
489
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
489
    break;
91
596
  case 9:
92
596
    SStream_concat0(O, "nge");
93
596
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
596
    break;
95
253
  case 0xa:
96
253
    SStream_concat0(O, "ngt");
97
253
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
253
    break;
99
730
  case 0xb:
100
730
    SStream_concat0(O, "false");
101
730
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
730
    break;
103
183
  case 0xc:
104
183
    SStream_concat0(O, "neq_oq");
105
183
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
183
    break;
107
211
  case 0xd:
108
211
    SStream_concat0(O, "ge");
109
211
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
211
    break;
111
158
  case 0xe:
112
158
    SStream_concat0(O, "gt");
113
158
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
158
    break;
115
314
  case 0xf:
116
314
    SStream_concat0(O, "true");
117
314
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
314
    break;
119
534
  case 0x10:
120
534
    SStream_concat0(O, "eq_os");
121
534
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
534
    break;
123
397
  case 0x11:
124
397
    SStream_concat0(O, "lt_oq");
125
397
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
397
    break;
127
240
  case 0x12:
128
240
    SStream_concat0(O, "le_oq");
129
240
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
240
    break;
131
105
  case 0x13:
132
105
    SStream_concat0(O, "unord_s");
133
105
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
105
    break;
135
149
  case 0x14:
136
149
    SStream_concat0(O, "neq_us");
137
149
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
149
    break;
139
723
  case 0x15:
140
723
    SStream_concat0(O, "nlt_uq");
141
723
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
723
    break;
143
313
  case 0x16:
144
313
    SStream_concat0(O, "nle_uq");
145
313
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
313
    break;
147
153
  case 0x17:
148
153
    SStream_concat0(O, "ord_s");
149
153
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
153
    break;
151
514
  case 0x18:
152
514
    SStream_concat0(O, "eq_us");
153
514
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
514
    break;
155
121
  case 0x19:
156
121
    SStream_concat0(O, "nge_uq");
157
121
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
121
    break;
159
130
  case 0x1a:
160
130
    SStream_concat0(O, "ngt_uq");
161
130
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
130
    break;
163
180
  case 0x1b:
164
180
    SStream_concat0(O, "false_os");
165
180
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
180
    break;
167
189
  case 0x1c:
168
189
    SStream_concat0(O, "neq_os");
169
189
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
189
    break;
171
357
  case 0x1d:
172
357
    SStream_concat0(O, "ge_oq");
173
357
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
357
    break;
175
431
  case 0x1e:
176
431
    SStream_concat0(O, "gt_oq");
177
431
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
431
    break;
179
147
  case 0x1f:
180
147
    SStream_concat0(O, "true_us");
181
147
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
147
    break;
183
18.7k
  }
184
185
18.7k
  MI->popcode_adjust = Imm + 1;
186
18.7k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
3.43k
{
190
3.43k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
3.43k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
752
  case 0:
195
752
    SStream_concat0(O, "lt");
196
752
    op_addXopCC(MI, X86_XOP_CC_LT);
197
752
    break;
198
151
  case 1:
199
151
    SStream_concat0(O, "le");
200
151
    op_addXopCC(MI, X86_XOP_CC_LE);
201
151
    break;
202
880
  case 2:
203
880
    SStream_concat0(O, "gt");
204
880
    op_addXopCC(MI, X86_XOP_CC_GT);
205
880
    break;
206
701
  case 3:
207
701
    SStream_concat0(O, "ge");
208
701
    op_addXopCC(MI, X86_XOP_CC_GE);
209
701
    break;
210
399
  case 4:
211
399
    SStream_concat0(O, "eq");
212
399
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
399
    break;
214
160
  case 5:
215
160
    SStream_concat0(O, "neq");
216
160
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
160
    break;
218
172
  case 6:
219
172
    SStream_concat0(O, "false");
220
172
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
172
    break;
222
220
  case 7:
223
220
    SStream_concat0(O, "true");
224
220
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
220
    break;
226
3.43k
  }
227
3.43k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
4.82k
{
231
4.82k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
4.82k
  switch (Imm) {
233
2.46k
  case 0:
234
2.46k
    SStream_concat0(O, "{rn-sae}");
235
2.46k
    op_addAvxSae(MI);
236
2.46k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.46k
    break;
238
420
  case 1:
239
420
    SStream_concat0(O, "{rd-sae}");
240
420
    op_addAvxSae(MI);
241
420
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
420
    break;
243
1.25k
  case 2:
244
1.25k
    SStream_concat0(O, "{ru-sae}");
245
1.25k
    op_addAvxSae(MI);
246
1.25k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
1.25k
    break;
248
689
  case 3:
249
689
    SStream_concat0(O, "{rz-sae}");
250
689
    op_addAvxSae(MI);
251
689
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
689
    break;
253
0
  default:
254
0
    break; // never reach
255
4.82k
  }
256
4.82k
}
257
#endif