Coverage Report

Created: 2026-08-31 06:58

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
23.0k
{
50
23.0k
  uint8_t Imm =
51
23.0k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
23.0k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
8.28k
  case 0:
56
8.28k
    SStream_concat0(O, "eq");
57
8.28k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
8.28k
    break;
59
891
  case 1:
60
891
    SStream_concat0(O, "lt");
61
891
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
891
    break;
63
2.26k
  case 2:
64
2.26k
    SStream_concat0(O, "le");
65
2.26k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
2.26k
    break;
67
562
  case 3:
68
562
    SStream_concat0(O, "unord");
69
562
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
562
    break;
71
566
  case 4:
72
566
    SStream_concat0(O, "neq");
73
566
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
566
    break;
75
762
  case 5:
76
762
    SStream_concat0(O, "nlt");
77
762
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
762
    break;
79
301
  case 6:
80
301
    SStream_concat0(O, "nle");
81
301
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
301
    break;
83
215
  case 7:
84
215
    SStream_concat0(O, "ord");
85
215
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
215
    break;
87
451
  case 8:
88
451
    SStream_concat0(O, "eq_uq");
89
451
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
451
    break;
91
207
  case 9:
92
207
    SStream_concat0(O, "nge");
93
207
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
207
    break;
95
226
  case 0xa:
96
226
    SStream_concat0(O, "ngt");
97
226
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
226
    break;
99
1.24k
  case 0xb:
100
1.24k
    SStream_concat0(O, "false");
101
1.24k
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
1.24k
    break;
103
196
  case 0xc:
104
196
    SStream_concat0(O, "neq_oq");
105
196
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
196
    break;
107
186
  case 0xd:
108
186
    SStream_concat0(O, "ge");
109
186
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
186
    break;
111
316
  case 0xe:
112
316
    SStream_concat0(O, "gt");
113
316
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
316
    break;
115
390
  case 0xf:
116
390
    SStream_concat0(O, "true");
117
390
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
390
    break;
119
265
  case 0x10:
120
265
    SStream_concat0(O, "eq_os");
121
265
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
265
    break;
123
493
  case 0x11:
124
493
    SStream_concat0(O, "lt_oq");
125
493
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
493
    break;
127
319
  case 0x12:
128
319
    SStream_concat0(O, "le_oq");
129
319
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
319
    break;
131
374
  case 0x13:
132
374
    SStream_concat0(O, "unord_s");
133
374
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
374
    break;
135
352
  case 0x14:
136
352
    SStream_concat0(O, "neq_us");
137
352
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
352
    break;
139
670
  case 0x15:
140
670
    SStream_concat0(O, "nlt_uq");
141
670
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
670
    break;
143
251
  case 0x16:
144
251
    SStream_concat0(O, "nle_uq");
145
251
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
251
    break;
147
82
  case 0x17:
148
82
    SStream_concat0(O, "ord_s");
149
82
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
82
    break;
151
1.33k
  case 0x18:
152
1.33k
    SStream_concat0(O, "eq_us");
153
1.33k
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
1.33k
    break;
155
400
  case 0x19:
156
400
    SStream_concat0(O, "nge_uq");
157
400
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
400
    break;
159
118
  case 0x1a:
160
118
    SStream_concat0(O, "ngt_uq");
161
118
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
118
    break;
163
232
  case 0x1b:
164
232
    SStream_concat0(O, "false_os");
165
232
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
232
    break;
167
221
  case 0x1c:
168
221
    SStream_concat0(O, "neq_os");
169
221
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
221
    break;
171
371
  case 0x1d:
172
371
    SStream_concat0(O, "ge_oq");
173
371
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
371
    break;
175
243
  case 0x1e:
176
243
    SStream_concat0(O, "gt_oq");
177
243
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
243
    break;
179
269
  case 0x1f:
180
269
    SStream_concat0(O, "true_us");
181
269
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
269
    break;
183
23.0k
  }
184
185
23.0k
  MI->popcode_adjust = Imm + 1;
186
23.0k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
5.01k
{
190
5.01k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
5.01k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
1.37k
  case 0:
195
1.37k
    SStream_concat0(O, "lt");
196
1.37k
    op_addXopCC(MI, X86_XOP_CC_LT);
197
1.37k
    break;
198
145
  case 1:
199
145
    SStream_concat0(O, "le");
200
145
    op_addXopCC(MI, X86_XOP_CC_LE);
201
145
    break;
202
836
  case 2:
203
836
    SStream_concat0(O, "gt");
204
836
    op_addXopCC(MI, X86_XOP_CC_GT);
205
836
    break;
206
690
  case 3:
207
690
    SStream_concat0(O, "ge");
208
690
    op_addXopCC(MI, X86_XOP_CC_GE);
209
690
    break;
210
518
  case 4:
211
518
    SStream_concat0(O, "eq");
212
518
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
518
    break;
214
265
  case 5:
215
265
    SStream_concat0(O, "neq");
216
265
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
265
    break;
218
1.00k
  case 6:
219
1.00k
    SStream_concat0(O, "false");
220
1.00k
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
1.00k
    break;
222
181
  case 7:
223
181
    SStream_concat0(O, "true");
224
181
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
181
    break;
226
5.01k
  }
227
5.01k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
6.58k
{
231
6.58k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
6.58k
  switch (Imm) {
233
3.32k
  case 0:
234
3.32k
    SStream_concat0(O, "{rn-sae}");
235
3.32k
    op_addAvxSae(MI);
236
3.32k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
3.32k
    break;
238
958
  case 1:
239
958
    SStream_concat0(O, "{rd-sae}");
240
958
    op_addAvxSae(MI);
241
958
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
958
    break;
243
1.26k
  case 2:
244
1.26k
    SStream_concat0(O, "{ru-sae}");
245
1.26k
    op_addAvxSae(MI);
246
1.26k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
1.26k
    break;
248
1.04k
  case 3:
249
1.04k
    SStream_concat0(O, "{rz-sae}");
250
1.04k
    op_addAvxSae(MI);
251
1.04k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
1.04k
    break;
253
0
  default:
254
0
    break; // never reach
255
6.58k
  }
256
6.58k
}
257
#endif