Coverage Report

Created: 2026-09-01 07:20

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
16.5k
{
50
16.5k
  uint8_t Imm =
51
16.5k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
16.5k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
5.65k
  case 0:
56
5.65k
    SStream_concat0(O, "eq");
57
5.65k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
5.65k
    break;
59
517
  case 1:
60
517
    SStream_concat0(O, "lt");
61
517
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
517
    break;
63
1.50k
  case 2:
64
1.50k
    SStream_concat0(O, "le");
65
1.50k
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
1.50k
    break;
67
290
  case 3:
68
290
    SStream_concat0(O, "unord");
69
290
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
290
    break;
71
488
  case 4:
72
488
    SStream_concat0(O, "neq");
73
488
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
488
    break;
75
591
  case 5:
76
591
    SStream_concat0(O, "nlt");
77
591
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
591
    break;
79
279
  case 6:
80
279
    SStream_concat0(O, "nle");
81
279
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
279
    break;
83
132
  case 7:
84
132
    SStream_concat0(O, "ord");
85
132
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
132
    break;
87
619
  case 8:
88
619
    SStream_concat0(O, "eq_uq");
89
619
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
619
    break;
91
243
  case 9:
92
243
    SStream_concat0(O, "nge");
93
243
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
243
    break;
95
305
  case 0xa:
96
305
    SStream_concat0(O, "ngt");
97
305
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
305
    break;
99
1.17k
  case 0xb:
100
1.17k
    SStream_concat0(O, "false");
101
1.17k
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
1.17k
    break;
103
140
  case 0xc:
104
140
    SStream_concat0(O, "neq_oq");
105
140
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
140
    break;
107
190
  case 0xd:
108
190
    SStream_concat0(O, "ge");
109
190
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
190
    break;
111
245
  case 0xe:
112
245
    SStream_concat0(O, "gt");
113
245
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
245
    break;
115
322
  case 0xf:
116
322
    SStream_concat0(O, "true");
117
322
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
322
    break;
119
158
  case 0x10:
120
158
    SStream_concat0(O, "eq_os");
121
158
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
158
    break;
123
245
  case 0x11:
124
245
    SStream_concat0(O, "lt_oq");
125
245
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
245
    break;
127
181
  case 0x12:
128
181
    SStream_concat0(O, "le_oq");
129
181
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
181
    break;
131
165
  case 0x13:
132
165
    SStream_concat0(O, "unord_s");
133
165
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
165
    break;
135
208
  case 0x14:
136
208
    SStream_concat0(O, "neq_us");
137
208
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
208
    break;
139
949
  case 0x15:
140
949
    SStream_concat0(O, "nlt_uq");
141
949
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
949
    break;
143
167
  case 0x16:
144
167
    SStream_concat0(O, "nle_uq");
145
167
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
167
    break;
147
37
  case 0x17:
148
37
    SStream_concat0(O, "ord_s");
149
37
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
37
    break;
151
791
  case 0x18:
152
791
    SStream_concat0(O, "eq_us");
153
791
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
791
    break;
155
81
  case 0x19:
156
81
    SStream_concat0(O, "nge_uq");
157
81
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
81
    break;
159
117
  case 0x1a:
160
117
    SStream_concat0(O, "ngt_uq");
161
117
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
117
    break;
163
111
  case 0x1b:
164
111
    SStream_concat0(O, "false_os");
165
111
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
111
    break;
167
174
  case 0x1c:
168
174
    SStream_concat0(O, "neq_os");
169
174
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
174
    break;
171
170
  case 0x1d:
172
170
    SStream_concat0(O, "ge_oq");
173
170
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
170
    break;
175
164
  case 0x1e:
176
164
    SStream_concat0(O, "gt_oq");
177
164
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
164
    break;
179
106
  case 0x1f:
180
106
    SStream_concat0(O, "true_us");
181
106
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
106
    break;
183
16.5k
  }
184
185
16.5k
  MI->popcode_adjust = Imm + 1;
186
16.5k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
3.61k
{
190
3.61k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
3.61k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
900
  case 0:
195
900
    SStream_concat0(O, "lt");
196
900
    op_addXopCC(MI, X86_XOP_CC_LT);
197
900
    break;
198
113
  case 1:
199
113
    SStream_concat0(O, "le");
200
113
    op_addXopCC(MI, X86_XOP_CC_LE);
201
113
    break;
202
486
  case 2:
203
486
    SStream_concat0(O, "gt");
204
486
    op_addXopCC(MI, X86_XOP_CC_GT);
205
486
    break;
206
613
  case 3:
207
613
    SStream_concat0(O, "ge");
208
613
    op_addXopCC(MI, X86_XOP_CC_GE);
209
613
    break;
210
446
  case 4:
211
446
    SStream_concat0(O, "eq");
212
446
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
446
    break;
214
154
  case 5:
215
154
    SStream_concat0(O, "neq");
216
154
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
154
    break;
218
735
  case 6:
219
735
    SStream_concat0(O, "false");
220
735
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
735
    break;
222
164
  case 7:
223
164
    SStream_concat0(O, "true");
224
164
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
164
    break;
226
3.61k
  }
227
3.61k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
4.12k
{
231
4.12k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
4.12k
  switch (Imm) {
233
2.25k
  case 0:
234
2.25k
    SStream_concat0(O, "{rn-sae}");
235
2.25k
    op_addAvxSae(MI);
236
2.25k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
2.25k
    break;
238
469
  case 1:
239
469
    SStream_concat0(O, "{rd-sae}");
240
469
    op_addAvxSae(MI);
241
469
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
469
    break;
243
612
  case 2:
244
612
    SStream_concat0(O, "{ru-sae}");
245
612
    op_addAvxSae(MI);
246
612
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
612
    break;
248
790
  case 3:
249
790
    SStream_concat0(O, "{rz-sae}");
250
790
    op_addAvxSae(MI);
251
790
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
790
    break;
253
0
  default:
254
0
    break; // never reach
255
4.12k
  }
256
4.12k
}
257
#endif