/src/capstonenext/arch/SystemZ/SystemZMapping.c

Source
/* Capstone Disassembly Engine */
/* By Rot127 <unisono@quyllur.org> 2022-2023 */

#ifdef CAPSTONE_HAS_SYSTEMZ

#include <stdio.h> // debug
#include <string.h>

#include "../../Mapping.h"
#include "../../utils.h"
#include "../../cs_simple_types.h"
#include <capstone/cs_operand.h>

#include "SystemZMCTargetDesc.h"
#include "SystemZMapping.h"
#include "SystemZLinkage.h"

#ifndef CAPSTONE_DIET

static const char *const insn_name_maps[] = {
#include "SystemZGenCSMappingInsnName.inc"
};

static const name_map insn_alias_mnem_map[] = {
#include "SystemZGenCSAliasMnemMap.inc"
  { SYSTEMZ_INS_ALIAS_END, NULL },
};

static const map_insn_ops insn_operands[] = {
#include "SystemZGenCSMappingInsnOp.inc"
};

#endif

#define GET_REGINFO_MC_DESC
#include "SystemZGenRegisterInfo.inc"

const insn_map systemz_insns[] = {
#include "SystemZGenCSMappingInsn.inc"
};

void SystemZ_set_instr_map_data(MCInst *MI, const uint8_t *Bytes,
        size_t BytesLen)
{
  map_cs_id(MI, systemz_insns, ARR_SIZE(systemz_insns));
  map_implicit_reads(MI, systemz_insns);
  map_implicit_writes(MI, systemz_insns);
  map_groups(MI, systemz_insns);
  const systemz_suppl_info *suppl_info =
    map_get_suppl_info(MI, systemz_insns);
  if (suppl_info) {
    SystemZ_get_detail(MI)->format = suppl_info->form;
  }
}

void SystemZ_init_mri(MCRegisterInfo *MRI)
{
  MCRegisterInfo_InitMCRegisterInfo(
    MRI, SystemZRegDesc, AARCH64_REG_ENDING, 0, 0,
    SystemZMCRegisterClasses, ARR_SIZE(SystemZMCRegisterClasses), 0,
    0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists,
    ARR_SIZE(SystemZSubRegIdxLists), 0);
}

const char *SystemZ_reg_name(csh handle, unsigned int reg)
{
  return SystemZ_LLVM_getRegisterName(reg);
}

void SystemZ_printer(MCInst *MI, SStream *O, void * /* MCRegisterInfo* */ info)
{
  MI->MRI = (MCRegisterInfo *)info;
  MI->fillDetailOps = detail_is_set(MI);
  SystemZ_LLVM_printInstruction(MI, "", O);
#ifndef CAPSTONE_DIET
  map_set_alias_id(MI, O, insn_alias_mnem_map,
       ARR_SIZE(insn_alias_mnem_map));
#endif
}

void SystemZ_init_cs_detail(MCInst *MI)
{
  if (!detail_is_set(MI)) {
    return;
  }
  memset(get_detail(MI), 0, sizeof(cs_detail));
  if (detail_is_set(MI)) {
    SystemZ_get_detail(MI)->cc = SYSTEMZ_CC_INVALID;
  }
}

bool SystemZ_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
          MCInst *MI, uint16_t *size, uint64_t address,
          void *info)
{
  SystemZ_init_cs_detail(MI);
  MI->MRI = (MCRegisterInfo *)info;
  DecodeStatus Result = SystemZ_LLVM_getInstruction(
    handle, bytes, bytes_len, MI, size, address, info);
  SystemZ_set_instr_map_data(MI, bytes, bytes_len);
  if (Result == MCDisassembler_SoftFail) {
    MCInst_setSoftFail(MI);
  }
  return Result != MCDisassembler_Fail;
}

// given internal insn id, return public instruction info
void SystemZ_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
{
  // We do this after Instruction disassembly.
}

const char *SystemZ_insn_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
  if (id < SYSTEMZ_INS_ALIAS_END && id > SYSTEMZ_INS_ALIAS_BEGIN) {
    if (id - SYSTEMZ_INS_ALIAS_BEGIN >=
        ARR_SIZE(insn_alias_mnem_map))
      return NULL;

    return insn_alias_mnem_map[id - SYSTEMZ_INS_ALIAS_BEGIN - 1]
      .name;
  }
  if (id >= SYSTEMZ_INS_ENDING)
    return NULL;

  if (id < ARR_SIZE(insn_name_maps))
    return insn_name_maps[id];

  // not found
  return NULL;
#else
  return NULL;
#endif
}

#ifndef CAPSTONE_DIET
static const name_map group_name_maps[] = {
  // generic groups
  { SYSTEMZ_GRP_INVALID, NULL },
  { SYSTEMZ_GRP_JUMP, "jump" },
  { SYSTEMZ_GRP_CALL, "call" },
  { SYSTEMZ_GRP_RET, "return" },
  { SYSTEMZ_GRP_INT, "int" },
  { SYSTEMZ_GRP_IRET, "iret" },
  { SYSTEMZ_GRP_PRIVILEGE, "privilege" },
  { SYSTEMZ_GRP_BRANCH_RELATIVE, "branch_relative" },

#include "SystemZGenCSFeatureName.inc"
};
#endif

const char *SystemZ_group_name(csh handle, unsigned int id)
{
#ifndef CAPSTONE_DIET
  return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
#else
  return NULL;
#endif
}

void SystemZ_add_cs_detail_0(MCInst *MI, int /* systemz_op_group */ op_group,
           size_t op_num)
{
#ifndef CAPSTONE_DIET
  if (!detail_is_set(MI) || !map_fill_detail_ops(MI))
    return;

  switch (op_group) {
  default:
    printf("Operand group %d not handled\n", op_group);
    break;
  case SystemZ_OP_GROUP_Operand: {
    cs_op_type secondary_op_type = map_get_op_type(MI, op_num) &
                 ~(CS_OP_MEM | CS_OP_BOUND);
    if (secondary_op_type == CS_OP_IMM) {
      SystemZ_set_detail_op_imm(
        MI, op_num, MCInst_getOpVal(MI, op_num), 0);
    } else if (secondary_op_type == CS_OP_REG) {
      SystemZ_set_detail_op_reg(MI, op_num,
              MCInst_getOpVal(MI, op_num));
    } else {
      CS_ASSERT_RET(0 && "Op type not handled.");
    }
    break;
  }
  case SystemZ_OP_GROUP_Cond4Operand: {
    systemz_cc cc = MCInst_getOpVal(MI, op_num);
    SystemZ_get_detail(MI)->cc = cc;
    break;
  }
  case SystemZ_OP_GROUP_BDAddrOperand:
    CS_ASSERT_RET(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
    CS_ASSERT_RET(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
    CS_ASSERT_RET(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
    CS_ASSERT_RET(
      MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
    SystemZ_set_detail_op_mem(MI, op_num,
            MCInst_getOpVal(MI, (op_num)),
            MCInst_getOpVal(MI, (op_num + 1)), 0,
            0, SYSTEMZ_AM_BD);
    break;
  case SystemZ_OP_GROUP_BDVAddrOperand:
  case SystemZ_OP_GROUP_BDXAddrOperand: {
    CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
    CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
    CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
    CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
    SystemZ_set_detail_op_mem(
      MI, op_num, MCInst_getOpVal(MI, (op_num)),
      MCInst_getOpVal(MI, (op_num + 1)), 0,
      MCInst_getOpVal(MI, (op_num + 2)),
      (op_group == SystemZ_OP_GROUP_BDXAddrOperand ?
         SYSTEMZ_AM_BDX :
         SYSTEMZ_AM_BDV));
    break;
  }
  case SystemZ_OP_GROUP_BDLAddrOperand:
    CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
    CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
    CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
    CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 2))));
    SystemZ_set_detail_op_mem(MI, op_num,
            MCInst_getOpVal(MI, (op_num)),
            MCInst_getOpVal(MI, (op_num + 1)),
            MCInst_getOpVal(MI, (op_num + 2)), 0,
            SYSTEMZ_AM_BDL);
    break;
  case SystemZ_OP_GROUP_BDRAddrOperand:
    CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
    CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
    CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
    CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
    CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
    SystemZ_set_detail_op_mem(MI, op_num,
            MCInst_getOpVal(MI, (op_num)),
            MCInst_getOpVal(MI, (op_num + 1)),
            MCInst_getOpVal(MI, (op_num + 2)), 0,
            SYSTEMZ_AM_BDL);
    break;
  case SystemZ_OP_GROUP_PCRelOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 0);
    break;
  case SystemZ_OP_GROUP_U1ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 1);
    break;
  case SystemZ_OP_GROUP_U2ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 2);
    break;
  case SystemZ_OP_GROUP_U3ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 3);
    break;
  case SystemZ_OP_GROUP_U4ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 4);
    break;
  case SystemZ_OP_GROUP_U8ImmOperand:
  case SystemZ_OP_GROUP_S8ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 8);
    break;
  case SystemZ_OP_GROUP_U12ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 12);
    break;
  case SystemZ_OP_GROUP_U16ImmOperand:
  case SystemZ_OP_GROUP_S16ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 16);
    break;
  case SystemZ_OP_GROUP_U32ImmOperand:
  case SystemZ_OP_GROUP_S32ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 32);
    break;
  case SystemZ_OP_GROUP_U48ImmOperand:
    SystemZ_set_detail_op_imm(MI, op_num,
            MCInst_getOpVal(MI, op_num), 48);
    break;
  }
#endif
}

#ifndef CAPSTONE_DIET

void SystemZ_set_detail_op_imm(MCInst *MI, unsigned op_num, int64_t Imm,
             size_t width)
{
  if (!detail_is_set(MI))
    return;
  CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_IMM);

  SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
  SystemZ_get_detail_op(MI, 0)->imm = Imm;
  SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
  SystemZ_get_detail_op(MI, 0)->imm_width = width;
  SystemZ_inc_op_count(MI);
}

void SystemZ_set_detail_op_reg(MCInst *MI, unsigned op_num, systemz_reg Reg)
{
  if (!detail_is_set(MI))
    return;
  CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_REG);
  if (Reg == SYSTEMZ_REG_INVALID) {
    // This case is legal. The ISA says:
    // "
    // When the R1 field is not zero, bits 8-15 of the instruction designated
    // by the second-operand address are ORed with bits 56-63 of
    // general register R1. [...] When the R1 field is zero, no ORing takes place
    // "
    // This means we just save the neutral element for ORing, so 0.
    SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
    SystemZ_get_detail_op(MI, 0)->imm = 0;
    SystemZ_get_detail_op(MI, 0)->access =
      map_get_op_access(MI, op_num);
    SystemZ_get_detail_op(MI, 0)->imm_width = 0;
    SystemZ_inc_op_count(MI);
    return;
  }

  SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_REG;
  SystemZ_get_detail_op(MI, 0)->reg = Reg;
  SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
  SystemZ_inc_op_count(MI);
}

void SystemZ_set_detail_op_mem(MCInst *MI, unsigned op_num, systemz_reg base,
             int64_t disp, uint64_t length, systemz_reg index,
             systemz_addr_mode am)
{
  if (!detail_is_set(MI))
    return;
  SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_MEM;
  SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
  SystemZ_get_detail_op(MI, 0)->mem.am = am;
  switch (am) {
  default:
    CS_ASSERT(0 && "Address mode not handled\n");
    break;
  case SYSTEMZ_AM_BD:
    SystemZ_get_detail_op(MI, 0)->mem.base = base;
    SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
    break;
  case SYSTEMZ_AM_BDX:
  case SYSTEMZ_AM_BDV:
    SystemZ_get_detail_op(MI, 0)->mem.base = base;
    SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
    SystemZ_get_detail_op(MI, 0)->mem.index = index;
    break;
  case SYSTEMZ_AM_BDL:
    SystemZ_get_detail_op(MI, 0)->mem.base = base;
    SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
    SystemZ_get_detail_op(MI, 0)->mem.length = length;
    break;
  case SYSTEMZ_AM_BDR:
    SystemZ_get_detail_op(MI, 0)->mem.base = base;
    SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
    SystemZ_get_detail_op(MI, 0)->mem.length = length;
    break;
  }
  SystemZ_inc_op_count(MI);
}

#endif

#endif

Coverage Report

Created: 2026-10-17 07:17

Line	Count	Source
1		/* Capstone Disassembly Engine */
2		/* By Rot127 <unisono@quyllur.org> 2022-2023 */
3
4		#ifdef CAPSTONE_HAS_SYSTEMZ
5
6		#include <stdio.h> // debug
7		#include <string.h>
8
9		#include "../../Mapping.h"
10		#include "../../utils.h"
11		#include "../../cs_simple_types.h"
12		#include <capstone/cs_operand.h>
13
14		#include "SystemZMCTargetDesc.h"
15		#include "SystemZMapping.h"
16		#include "SystemZLinkage.h"
17
18		#ifndef CAPSTONE_DIET
19
20		static const char *const insn_name_maps[] = {
21		#include "SystemZGenCSMappingInsnName.inc"
22		};
23
24		static const name_map insn_alias_mnem_map[] = {
25		#include "SystemZGenCSAliasMnemMap.inc"
26		{ SYSTEMZ_INS_ALIAS_END, NULL },
27		};
28
29		static const map_insn_ops insn_operands[] = {
30		#include "SystemZGenCSMappingInsnOp.inc"
31		};
32
33		#endif
34
35		#define GET_REGINFO_MC_DESC
36		#include "SystemZGenRegisterInfo.inc"
37
38		const insn_map systemz_insns[] = {
39		#include "SystemZGenCSMappingInsn.inc"
40		};
41
42		void SystemZ_set_instr_map_data(MCInst MI, const uint8_t Bytes,
43		size_t BytesLen)
44	169k	{
45	169k	map_cs_id(MI, systemz_insns, ARR_SIZE(systemz_insns));
46	169k	map_implicit_reads(MI, systemz_insns);
47	169k	map_implicit_writes(MI, systemz_insns);
48	169k	map_groups(MI, systemz_insns);
49	169k	const systemz_suppl_info *suppl_info =
50	169k	map_get_suppl_info(MI, systemz_insns);
51	169k	if (suppl_info) {
52	169k	SystemZ_get_detail(MI)->format = suppl_info->form;
53	169k	}
54	169k	}
55
56		void SystemZ_init_mri(MCRegisterInfo *MRI)
57	4.44k	{
58	4.44k	MCRegisterInfo_InitMCRegisterInfo(
59	4.44k	MRI, SystemZRegDesc, AARCH64_REG_ENDING, 0, 0,
60	4.44k	SystemZMCRegisterClasses, ARR_SIZE(SystemZMCRegisterClasses), 0,
61	4.44k	0, SystemZRegDiffLists, 0, SystemZSubRegIdxLists,
62	4.44k	ARR_SIZE(SystemZSubRegIdxLists), 0);
63	4.44k	}
64
65		const char *SystemZ_reg_name(csh handle, unsigned int reg)
66	105k	{
67	105k	return SystemZ_LLVM_getRegisterName(reg);
68	105k	}
69
70		void SystemZ_printer(MCInst MI, SStream O, void * /* MCRegisterInfo* */ info)
71	167k	{
72	167k	MI->MRI = (MCRegisterInfo *)info;
73	167k	MI->fillDetailOps = detail_is_set(MI);
74	167k	SystemZ_LLVM_printInstruction(MI, "", O);
75	167k	#ifndef CAPSTONE_DIET
76	167k	map_set_alias_id(MI, O, insn_alias_mnem_map,
77	167k	ARR_SIZE(insn_alias_mnem_map));
78	167k	#endif
79	167k	}
80
81		void SystemZ_init_cs_detail(MCInst *MI)
82	169k	{
83	169k	if (!detail_is_set(MI)) {
84	0	return;
85	0	}
86	169k	memset(get_detail(MI), 0, sizeof(cs_detail));
87	169k	if (detail_is_set(MI)) {
88	169k	SystemZ_get_detail(MI)->cc = SYSTEMZ_CC_INVALID;
89	169k	}
90	169k	}
91
92		bool SystemZ_getInstruction(csh handle, const uint8_t *bytes, size_t bytes_len,
93		MCInst MI, uint16_t size, uint64_t address,
94		void *info)
95	169k	{
96	169k	SystemZ_init_cs_detail(MI);
97	169k	MI->MRI = (MCRegisterInfo *)info;
98	169k	DecodeStatus Result = SystemZ_LLVM_getInstruction(
99	169k	handle, bytes, bytes_len, MI, size, address, info);
100	169k	SystemZ_set_instr_map_data(MI, bytes, bytes_len);
101	169k	if (Result == MCDisassembler_SoftFail) {
102	0	MCInst_setSoftFail(MI);
103	0	}
104	169k	return Result != MCDisassembler_Fail;
105	169k	}
106
107		// given internal insn id, return public instruction info
108		void SystemZ_get_insn_id(cs_struct h, cs_insn insn, unsigned int id)
109	167k	{
110		// We do this after Instruction disassembly.
111	167k	}
112
113		const char *SystemZ_insn_name(csh handle, unsigned int id)
114	167k	{
115	167k	#ifndef CAPSTONE_DIET
116	167k	if (id < SYSTEMZ_INS_ALIAS_END && id > SYSTEMZ_INS_ALIAS_BEGIN) {
117	0	if (id - SYSTEMZ_INS_ALIAS_BEGIN >=
118	0	ARR_SIZE(insn_alias_mnem_map))
119	0	return NULL;
120
121	0	return insn_alias_mnem_map[id - SYSTEMZ_INS_ALIAS_BEGIN - 1]
122	0	.name;
123	0	}
124	167k	if (id >= SYSTEMZ_INS_ENDING)
125	0	return NULL;
126
127	167k	if (id < ARR_SIZE(insn_name_maps))
128	167k	return insn_name_maps[id];
129
130		// not found
131	0	return NULL;
132		#else
133		return NULL;
134		#endif
135	167k	}
136
137		#ifndef CAPSTONE_DIET
138		static const name_map group_name_maps[] = {
139		// generic groups
140		{ SYSTEMZ_GRP_INVALID, NULL },
141		{ SYSTEMZ_GRP_JUMP, "jump" },
142		{ SYSTEMZ_GRP_CALL, "call" },
143		{ SYSTEMZ_GRP_RET, "return" },
144		{ SYSTEMZ_GRP_INT, "int" },
145		{ SYSTEMZ_GRP_IRET, "iret" },
146		{ SYSTEMZ_GRP_PRIVILEGE, "privilege" },
147		{ SYSTEMZ_GRP_BRANCH_RELATIVE, "branch_relative" },
148
149		#include "SystemZGenCSFeatureName.inc"
150		};
151		#endif
152
153		const char *SystemZ_group_name(csh handle, unsigned int id)
154	112k	{
155	112k	#ifndef CAPSTONE_DIET
156	112k	return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
157		#else
158		return NULL;
159		#endif
160	112k	}
161
162		void SystemZ_add_cs_detail_0(MCInst MI, int / systemz_op_group */ op_group,
163		size_t op_num)
164	400k	{
165	400k	#ifndef CAPSTONE_DIET
166	400k	if (!detail_is_set(MI) \|\| !map_fill_detail_ops(MI))
167	0	return;
168
169	400k	switch (op_group) {
170	0	default:
171	0	printf("Operand group %d not handled\n", op_group);
172	0	break;
173	228k	case SystemZ_OP_GROUP_Operand: {
174	228k	cs_op_type secondary_op_type = map_get_op_type(MI, op_num) &
175	228k	~(CS_OP_MEM \| CS_OP_BOUND);
176	228k	if (secondary_op_type == CS_OP_IMM) {
177	0	SystemZ_set_detail_op_imm(
178	0	MI, op_num, MCInst_getOpVal(MI, op_num), 0);
179	228k	} else if (secondary_op_type == CS_OP_REG) {
180	228k	SystemZ_set_detail_op_reg(MI, op_num,
181	228k	MCInst_getOpVal(MI, op_num));
182	228k	} else {
183	0	CS_ASSERT_RET(0 && "Op type not handled.");
184	0	}
185	228k	break;
186	228k	}
187	228k	case SystemZ_OP_GROUP_Cond4Operand: {
188	0	systemz_cc cc = MCInst_getOpVal(MI, op_num);
189	0	SystemZ_get_detail(MI)->cc = cc;
190	0	break;
191	228k	}
192	48.7k	case SystemZ_OP_GROUP_BDAddrOperand:
193	48.7k	CS_ASSERT_RET(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
194	48.7k	CS_ASSERT_RET(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
195	48.7k	CS_ASSERT_RET(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
196	48.7k	CS_ASSERT_RET(
197	48.7k	MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
198	48.7k	SystemZ_set_detail_op_mem(MI, op_num,
199	48.7k	MCInst_getOpVal(MI, (op_num)),
200	48.7k	MCInst_getOpVal(MI, (op_num + 1)), 0,
201	48.7k	0, SYSTEMZ_AM_BD);
202	48.7k	break;
203	1.00k	case SystemZ_OP_GROUP_BDVAddrOperand:
204	41.5k	case SystemZ_OP_GROUP_BDXAddrOperand: {
205	41.5k	CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
206	41.5k	CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
207	41.5k	CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
208	41.5k	CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
209	41.5k	CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
210	41.5k	CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
211	41.5k	SystemZ_set_detail_op_mem(
212	41.5k	MI, op_num, MCInst_getOpVal(MI, (op_num)),
213	41.5k	MCInst_getOpVal(MI, (op_num + 1)), 0,
214	41.5k	MCInst_getOpVal(MI, (op_num + 2)),
215	41.5k	(op_group == SystemZ_OP_GROUP_BDXAddrOperand ?
216	40.5k	SYSTEMZ_AM_BDX :
217	41.5k	SYSTEMZ_AM_BDV));
218	41.5k	break;
219	1.00k	}
220	11.4k	case SystemZ_OP_GROUP_BDLAddrOperand:
221	11.4k	CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
222	11.4k	CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
223	11.4k	CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
224	11.4k	CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
225	11.4k	CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
226	11.4k	CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 2))));
227	11.4k	SystemZ_set_detail_op_mem(MI, op_num,
228	11.4k	MCInst_getOpVal(MI, (op_num)),
229	11.4k	MCInst_getOpVal(MI, (op_num + 1)),
230	11.4k	MCInst_getOpVal(MI, (op_num + 2)), 0,
231	11.4k	SYSTEMZ_AM_BDL);
232	11.4k	break;
233	630	case SystemZ_OP_GROUP_BDRAddrOperand:
234	630	CS_ASSERT(map_get_op_type(MI, (op_num)) & CS_OP_MEM);
235	630	CS_ASSERT(map_get_op_type(MI, (op_num + 1)) & CS_OP_MEM);
236	630	CS_ASSERT(map_get_op_type(MI, (op_num + 2)) & CS_OP_MEM);
237	630	CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num))));
238	630	CS_ASSERT(MCOperand_isImm(MCInst_getOperand(MI, (op_num + 1))));
239	630	CS_ASSERT(MCOperand_isReg(MCInst_getOperand(MI, (op_num + 2))));
240	630	SystemZ_set_detail_op_mem(MI, op_num,
241	630	MCInst_getOpVal(MI, (op_num)),
242	630	MCInst_getOpVal(MI, (op_num + 1)),
243	630	MCInst_getOpVal(MI, (op_num + 2)), 0,
244	630	SYSTEMZ_AM_BDL);
245	630	break;
246	7.70k	case SystemZ_OP_GROUP_PCRelOperand:
247	7.70k	SystemZ_set_detail_op_imm(MI, op_num,
248	7.70k	MCInst_getOpVal(MI, op_num), 0);
249	7.70k	break;
250	1.22k	case SystemZ_OP_GROUP_U1ImmOperand:
251	1.22k	SystemZ_set_detail_op_imm(MI, op_num,
252	1.22k	MCInst_getOpVal(MI, op_num), 1);
253	1.22k	break;
254	1.49k	case SystemZ_OP_GROUP_U2ImmOperand:
255	1.49k	SystemZ_set_detail_op_imm(MI, op_num,
256	1.49k	MCInst_getOpVal(MI, op_num), 2);
257	1.49k	break;
258	1.18k	case SystemZ_OP_GROUP_U3ImmOperand:
259	1.18k	SystemZ_set_detail_op_imm(MI, op_num,
260	1.18k	MCInst_getOpVal(MI, op_num), 3);
261	1.18k	break;
262	34.5k	case SystemZ_OP_GROUP_U4ImmOperand:
263	34.5k	SystemZ_set_detail_op_imm(MI, op_num,
264	34.5k	MCInst_getOpVal(MI, op_num), 4);
265	34.5k	break;
266	8.85k	case SystemZ_OP_GROUP_U8ImmOperand:
267	11.8k	case SystemZ_OP_GROUP_S8ImmOperand:
268	11.8k	SystemZ_set_detail_op_imm(MI, op_num,
269	11.8k	MCInst_getOpVal(MI, op_num), 8);
270	11.8k	break;
271	894	case SystemZ_OP_GROUP_U12ImmOperand:
272	894	SystemZ_set_detail_op_imm(MI, op_num,
273	894	MCInst_getOpVal(MI, op_num), 12);
274	894	break;
275	2.32k	case SystemZ_OP_GROUP_U16ImmOperand:
276	7.84k	case SystemZ_OP_GROUP_S16ImmOperand:
277	7.84k	SystemZ_set_detail_op_imm(MI, op_num,
278	7.84k	MCInst_getOpVal(MI, op_num), 16);
279	7.84k	break;
280	1.49k	case SystemZ_OP_GROUP_U32ImmOperand:
281	2.65k	case SystemZ_OP_GROUP_S32ImmOperand:
282	2.65k	SystemZ_set_detail_op_imm(MI, op_num,
283	2.65k	MCInst_getOpVal(MI, op_num), 32);
284	2.65k	break;
285	0	case SystemZ_OP_GROUP_U48ImmOperand:
286	0	SystemZ_set_detail_op_imm(MI, op_num,
287	0	MCInst_getOpVal(MI, op_num), 48);
288	0	break;
289	400k	}
290	400k	#endif
291	400k	}
292
293		#ifndef CAPSTONE_DIET
294
295		void SystemZ_set_detail_op_imm(MCInst *MI, unsigned op_num, int64_t Imm,
296		size_t width)
297	69.4k	{
298	69.4k	if (!detail_is_set(MI))
299	0	return;
300	69.4k	CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_IMM);
301
302	69.4k	SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
303	69.4k	SystemZ_get_detail_op(MI, 0)->imm = Imm;
304	69.4k	SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
305	69.4k	SystemZ_get_detail_op(MI, 0)->imm_width = width;
306	69.4k	SystemZ_inc_op_count(MI);
307	69.4k	}
308
309		void SystemZ_set_detail_op_reg(MCInst *MI, unsigned op_num, systemz_reg Reg)
310	228k	{
311	228k	if (!detail_is_set(MI))
312	0	return;
313	228k	CS_ASSERT((map_get_op_type(MI, op_num) & ~CS_OP_MEM) == CS_OP_REG);
314	228k	if (Reg == SYSTEMZ_REG_INVALID) {
315		// This case is legal. The ISA says:
316		// "
317		// When the R1 field is not zero, bits 8-15 of the instruction designated
318		// by the second-operand address are ORed with bits 56-63 of
319		// general register R1. [...] When the R1 field is zero, no ORing takes place
320		// "
321		// This means we just save the neutral element for ORing, so 0.
322	903	SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_IMM;
323	903	SystemZ_get_detail_op(MI, 0)->imm = 0;
324	903	SystemZ_get_detail_op(MI, 0)->access =
325	903	map_get_op_access(MI, op_num);
326	903	SystemZ_get_detail_op(MI, 0)->imm_width = 0;
327	903	SystemZ_inc_op_count(MI);
328	903	return;
329	903	}
330
331	227k	SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_REG;
332	227k	SystemZ_get_detail_op(MI, 0)->reg = Reg;
333	227k	SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
334	227k	SystemZ_inc_op_count(MI);
335	227k	}
336
337		void SystemZ_set_detail_op_mem(MCInst *MI, unsigned op_num, systemz_reg base,
338		int64_t disp, uint64_t length, systemz_reg index,
339		systemz_addr_mode am)
340	102k	{
341	102k	if (!detail_is_set(MI))
342	0	return;
343	102k	SystemZ_get_detail_op(MI, 0)->type = SYSTEMZ_OP_MEM;
344	102k	SystemZ_get_detail_op(MI, 0)->access = map_get_op_access(MI, op_num);
345	102k	SystemZ_get_detail_op(MI, 0)->mem.am = am;
346	102k	switch (am) {
347	0	default:
348	0	CS_ASSERT(0 && "Address mode not handled\n");
349	0	break;
350	48.7k	case SYSTEMZ_AM_BD:
351	48.7k	SystemZ_get_detail_op(MI, 0)->mem.base = base;
352	48.7k	SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
353	48.7k	break;
354	40.5k	case SYSTEMZ_AM_BDX:
355	41.5k	case SYSTEMZ_AM_BDV:
356	41.5k	SystemZ_get_detail_op(MI, 0)->mem.base = base;
357	41.5k	SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
358	41.5k	SystemZ_get_detail_op(MI, 0)->mem.index = index;
359	41.5k	break;
360	12.0k	case SYSTEMZ_AM_BDL:
361	12.0k	SystemZ_get_detail_op(MI, 0)->mem.base = base;
362	12.0k	SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
363	12.0k	SystemZ_get_detail_op(MI, 0)->mem.length = length;
364	12.0k	break;
365	0	case SYSTEMZ_AM_BDR:
366	0	SystemZ_get_detail_op(MI, 0)->mem.base = base;
367	0	SystemZ_get_detail_op(MI, 0)->mem.disp = disp;
368	0	SystemZ_get_detail_op(MI, 0)->mem.length = length;
369	0	break;
370	102k	}
371	102k	SystemZ_inc_op_count(MI);
372	102k	}
373
374		#endif
375
376		#endif