/rust/registry/src/index.crates.io-1949cf8c6b5b557f/zeroize-1.5.7/src/x86.rs
Line | Count | Source |
1 | | //! [`Zeroize`] impls for x86 SIMD registers |
2 | | |
3 | | use crate::{atomic_fence, volatile_write, Zeroize}; |
4 | | |
5 | | #[cfg(target_arch = "x86")] |
6 | | use core::arch::x86::*; |
7 | | |
8 | | #[cfg(target_arch = "x86_64")] |
9 | | use core::arch::x86_64::*; |
10 | | |
11 | | macro_rules! impl_zeroize_for_simd_register { |
12 | | ($type:ty, $feature:expr, $zero_value:ident) => { |
13 | | #[cfg_attr(docsrs, doc(cfg(target_arch = "x86")))] // also `x86_64` |
14 | | #[cfg_attr(docsrs, doc(cfg(target_feature = $feature)))] |
15 | | impl Zeroize for $type { |
16 | 0 | fn zeroize(&mut self) { |
17 | 0 | volatile_write(self, unsafe { $zero_value() }); |
18 | 0 | atomic_fence(); |
19 | 0 | } Unexecuted instantiation: <core::core_arch::x86::__m128 as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m128i as zeroize::Zeroize>::zeroize Unexecuted instantiation: <core::core_arch::x86::__m128d as zeroize::Zeroize>::zeroize |
20 | | } |
21 | | }; |
22 | | } |
23 | | |
24 | | #[cfg(target_feature = "sse")] |
25 | | impl_zeroize_for_simd_register!(__m128, "sse", _mm_setzero_ps); |
26 | | |
27 | | #[cfg(target_feature = "sse2")] |
28 | | impl_zeroize_for_simd_register!(__m128d, "sse2", _mm_setzero_pd); |
29 | | |
30 | | #[cfg(target_feature = "sse2")] |
31 | | impl_zeroize_for_simd_register!(__m128i, "sse2", _mm_setzero_si128); |
32 | | |
33 | | #[cfg(target_feature = "avx")] |
34 | | impl_zeroize_for_simd_register!(__m256, "avx", _mm256_setzero_ps); |
35 | | |
36 | | #[cfg(target_feature = "avx")] |
37 | | impl_zeroize_for_simd_register!(__m256d, "avx", _mm256_setzero_pd); |
38 | | |
39 | | #[cfg(target_feature = "avx")] |
40 | | impl_zeroize_for_simd_register!(__m256i, "avx", _mm256_setzero_si256); |