Coverage Report

Created: 2025-07-23 08:18

/src/aom/av1/common/av1_inv_txfm2d.c
Line
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Source (jump to first uncovered line)
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/*
2
 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
3
 *
4
 * This source code is subject to the terms of the BSD 2 Clause License and
5
 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6
 * was not distributed with this source code in the LICENSE file, you can
7
 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8
 * Media Patent License 1.0 was not distributed with this source code in the
9
 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10
 */
11
12
#include "config/aom_dsp_rtcd.h"
13
#include "config/av1_rtcd.h"
14
15
#include "av1/common/enums.h"
16
#include "av1/common/av1_txfm.h"
17
#include "av1/common/av1_inv_txfm1d.h"
18
#include "av1/common/av1_inv_txfm1d_cfg.h"
19
20
void av1_highbd_iwht4x4_16_add_c(const tran_low_t *input, uint8_t *dest8,
21
350k
                                 int stride, int bd) {
22
  /* 4-point reversible, orthonormal inverse Walsh-Hadamard in 3.5 adds,
23
     0.5 shifts per pixel. */
24
350k
  int i;
25
350k
  tran_low_t output[16];
26
350k
  tran_low_t a1, b1, c1, d1, e1;
27
350k
  const tran_low_t *ip = input;
28
350k
  tran_low_t *op = output;
29
350k
  uint16_t *dest = CONVERT_TO_SHORTPTR(dest8);
30
31
1.75M
  for (i = 0; i < 4; i++) {
32
1.40M
    a1 = ip[0] >> UNIT_QUANT_SHIFT;
33
1.40M
    c1 = ip[1] >> UNIT_QUANT_SHIFT;
34
1.40M
    d1 = ip[2] >> UNIT_QUANT_SHIFT;
35
1.40M
    b1 = ip[3] >> UNIT_QUANT_SHIFT;
36
1.40M
    a1 += c1;
37
1.40M
    d1 -= b1;
38
1.40M
    e1 = (a1 - d1) >> 1;
39
1.40M
    b1 = e1 - b1;
40
1.40M
    c1 = e1 - c1;
41
1.40M
    a1 -= b1;
42
1.40M
    d1 += c1;
43
44
1.40M
    op[0] = a1;
45
1.40M
    op[1] = b1;
46
1.40M
    op[2] = c1;
47
1.40M
    op[3] = d1;
48
1.40M
    ip += 4;
49
1.40M
    op += 4;
50
1.40M
  }
51
52
350k
  ip = output;
53
1.75M
  for (i = 0; i < 4; i++) {
54
1.40M
    a1 = ip[4 * 0];
55
1.40M
    c1 = ip[4 * 1];
56
1.40M
    d1 = ip[4 * 2];
57
1.40M
    b1 = ip[4 * 3];
58
1.40M
    a1 += c1;
59
1.40M
    d1 -= b1;
60
1.40M
    e1 = (a1 - d1) >> 1;
61
1.40M
    b1 = e1 - b1;
62
1.40M
    c1 = e1 - c1;
63
1.40M
    a1 -= b1;
64
1.40M
    d1 += c1;
65
66
1.40M
    range_check_value(a1, bd + 1);
67
1.40M
    range_check_value(b1, bd + 1);
68
1.40M
    range_check_value(c1, bd + 1);
69
1.40M
    range_check_value(d1, bd + 1);
70
71
1.40M
    dest[stride * 0] = highbd_clip_pixel_add(dest[stride * 0], a1, bd);
72
1.40M
    dest[stride * 1] = highbd_clip_pixel_add(dest[stride * 1], b1, bd);
73
1.40M
    dest[stride * 2] = highbd_clip_pixel_add(dest[stride * 2], c1, bd);
74
1.40M
    dest[stride * 3] = highbd_clip_pixel_add(dest[stride * 3], d1, bd);
75
76
1.40M
    ip++;
77
1.40M
    dest++;
78
1.40M
  }
79
350k
}
80
81
void av1_highbd_iwht4x4_1_add_c(const tran_low_t *in, uint8_t *dest8,
82
1.16M
                                int dest_stride, int bd) {
83
1.16M
  int i;
84
1.16M
  tran_low_t a1, e1;
85
1.16M
  tran_low_t tmp[4];
86
1.16M
  const tran_low_t *ip = in;
87
1.16M
  tran_low_t *op = tmp;
88
1.16M
  uint16_t *dest = CONVERT_TO_SHORTPTR(dest8);
89
1.16M
  (void)bd;
90
91
1.16M
  a1 = ip[0] >> UNIT_QUANT_SHIFT;
92
1.16M
  e1 = a1 >> 1;
93
1.16M
  a1 -= e1;
94
1.16M
  op[0] = a1;
95
1.16M
  op[1] = op[2] = op[3] = e1;
96
97
1.16M
  ip = tmp;
98
5.81M
  for (i = 0; i < 4; i++) {
99
4.65M
    e1 = ip[0] >> 1;
100
4.65M
    a1 = ip[0] - e1;
101
4.65M
    dest[dest_stride * 0] =
102
4.65M
        highbd_clip_pixel_add(dest[dest_stride * 0], a1, bd);
103
4.65M
    dest[dest_stride * 1] =
104
4.65M
        highbd_clip_pixel_add(dest[dest_stride * 1], e1, bd);
105
4.65M
    dest[dest_stride * 2] =
106
4.65M
        highbd_clip_pixel_add(dest[dest_stride * 2], e1, bd);
107
4.65M
    dest[dest_stride * 3] =
108
4.65M
        highbd_clip_pixel_add(dest[dest_stride * 3], e1, bd);
109
4.65M
    ip++;
110
4.65M
    dest++;
111
4.65M
  }
112
1.16M
}
113
114
10.1M
static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
115
10.1M
  switch (txfm_type) {
116
1.09M
    case TXFM_TYPE_DCT4: return av1_idct4;
117
1.89M
    case TXFM_TYPE_DCT8: return av1_idct8;
118
1.43M
    case TXFM_TYPE_DCT16: return av1_idct16;
119
1.54M
    case TXFM_TYPE_DCT32: return av1_idct32;
120
304k
    case TXFM_TYPE_DCT64: return av1_idct64;
121
988k
    case TXFM_TYPE_ADST4: return av1_iadst4;
122
1.25M
    case TXFM_TYPE_ADST8: return av1_iadst8;
123
1.03M
    case TXFM_TYPE_ADST16: return av1_iadst16;
124
226k
    case TXFM_TYPE_IDENTITY4: return av1_iidentity4_c;
125
279k
    case TXFM_TYPE_IDENTITY8: return av1_iidentity8_c;
126
111k
    case TXFM_TYPE_IDENTITY16: return av1_iidentity16_c;
127
343
    case TXFM_TYPE_IDENTITY32: return av1_iidentity32_c;
128
0
    default: assert(0); return NULL;
129
10.1M
  }
130
10.1M
}
131
132
static const int8_t inv_shift_4x4[2] = { 0, -4 };
133
static const int8_t inv_shift_8x8[2] = { -1, -4 };
134
static const int8_t inv_shift_16x16[2] = { -2, -4 };
135
static const int8_t inv_shift_32x32[2] = { -2, -4 };
136
static const int8_t inv_shift_64x64[2] = { -2, -4 };
137
static const int8_t inv_shift_4x8[2] = { 0, -4 };
138
static const int8_t inv_shift_8x4[2] = { 0, -4 };
139
static const int8_t inv_shift_8x16[2] = { -1, -4 };
140
static const int8_t inv_shift_16x8[2] = { -1, -4 };
141
static const int8_t inv_shift_16x32[2] = { -1, -4 };
142
static const int8_t inv_shift_32x16[2] = { -1, -4 };
143
static const int8_t inv_shift_32x64[2] = { -1, -4 };
144
static const int8_t inv_shift_64x32[2] = { -1, -4 };
145
static const int8_t inv_shift_4x16[2] = { -1, -4 };
146
static const int8_t inv_shift_16x4[2] = { -1, -4 };
147
static const int8_t inv_shift_8x32[2] = { -2, -4 };
148
static const int8_t inv_shift_32x8[2] = { -2, -4 };
149
static const int8_t inv_shift_16x64[2] = { -2, -4 };
150
static const int8_t inv_shift_64x16[2] = { -2, -4 };
151
152
const int8_t *av1_inv_txfm_shift_ls[TX_SIZES_ALL] = {
153
  inv_shift_4x4,   inv_shift_8x8,   inv_shift_16x16, inv_shift_32x32,
154
  inv_shift_64x64, inv_shift_4x8,   inv_shift_8x4,   inv_shift_8x16,
155
  inv_shift_16x8,  inv_shift_16x32, inv_shift_32x16, inv_shift_32x64,
156
  inv_shift_64x32, inv_shift_4x16,  inv_shift_16x4,  inv_shift_8x32,
157
  inv_shift_32x8,  inv_shift_16x64, inv_shift_64x16,
158
};
159
160
/* clang-format off */
161
const int8_t av1_inv_cos_bit_col[MAX_TXWH_IDX]      // txw_idx
162
                            [MAX_TXWH_IDX] = {  // txh_idx
163
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT,           0,           0 },
164
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT,           0 },
165
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT },
166
    {           0, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT },
167
    {           0,           0, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT }
168
  };
169
170
const int8_t av1_inv_cos_bit_row[MAX_TXWH_IDX]      // txw_idx
171
                            [MAX_TXWH_IDX] = {  // txh_idx
172
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT,           0,           0 },
173
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT,           0 },
174
    { INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT },
175
    {           0, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT },
176
    {           0,           0, INV_COS_BIT, INV_COS_BIT, INV_COS_BIT }
177
  };
178
/* clang-format on */
179
180
static const int8_t iadst4_range[7] = { 0, 1, 0, 0, 0, 0, 0 };
181
182
void av1_get_inv_txfm_cfg(TX_TYPE tx_type, TX_SIZE tx_size,
183
5.08M
                          TXFM_2D_FLIP_CFG *cfg) {
184
5.08M
  assert(cfg != NULL);
185
5.08M
  cfg->tx_size = tx_size;
186
5.08M
  av1_zero(cfg->stage_range_col);
187
5.08M
  av1_zero(cfg->stage_range_row);
188
5.08M
  set_flip_cfg(tx_type, cfg);
189
5.08M
  const TX_TYPE_1D tx_type_1d_col = vtx_tab[tx_type];
190
5.08M
  const TX_TYPE_1D tx_type_1d_row = htx_tab[tx_type];
191
5.08M
  cfg->shift = av1_inv_txfm_shift_ls[tx_size];
192
5.08M
  const int txw_idx = get_txw_idx(tx_size);
193
5.08M
  const int txh_idx = get_txh_idx(tx_size);
194
5.08M
  cfg->cos_bit_col = av1_inv_cos_bit_col[txw_idx][txh_idx];
195
5.08M
  cfg->cos_bit_row = av1_inv_cos_bit_row[txw_idx][txh_idx];
196
5.08M
  cfg->txfm_type_col = av1_txfm_type_ls[txh_idx][tx_type_1d_col];
197
5.08M
  if (cfg->txfm_type_col == TXFM_TYPE_ADST4) {
198
513k
    memcpy(cfg->stage_range_col, iadst4_range, sizeof(iadst4_range));
199
513k
  }
200
5.08M
  cfg->txfm_type_row = av1_txfm_type_ls[txw_idx][tx_type_1d_row];
201
5.08M
  if (cfg->txfm_type_row == TXFM_TYPE_ADST4) {
202
474k
    memcpy(cfg->stage_range_row, iadst4_range, sizeof(iadst4_range));
203
474k
  }
204
5.08M
  cfg->stage_num_col = av1_txfm_stage_num_list[cfg->txfm_type_col];
205
5.08M
  cfg->stage_num_row = av1_txfm_stage_num_list[cfg->txfm_type_row];
206
5.08M
}
207
208
void av1_gen_inv_stage_range(int8_t *stage_range_col, int8_t *stage_range_row,
209
                             const TXFM_2D_FLIP_CFG *cfg, TX_SIZE tx_size,
210
5.08M
                             int bd) {
211
5.08M
  const int fwd_shift = inv_start_range[tx_size];
212
5.08M
  const int8_t *shift = cfg->shift;
213
5.08M
  int8_t opt_range_row, opt_range_col;
214
5.08M
  if (bd == 8) {
215
2.89M
    opt_range_row = 16;
216
2.89M
    opt_range_col = 16;
217
2.89M
  } else if (bd == 10) {
218
2.16M
    opt_range_row = 18;
219
2.16M
    opt_range_col = 16;
220
2.16M
  } else {
221
12.9k
    assert(bd == 12);
222
12.9k
    opt_range_row = 20;
223
12.9k
    opt_range_col = 18;
224
12.9k
  }
225
  // i < MAX_TXFM_STAGE_NUM will mute above array bounds warning
226
43.0M
  for (int i = 0; i < cfg->stage_num_row && i < MAX_TXFM_STAGE_NUM; ++i) {
227
37.9M
    int real_range_row = cfg->stage_range_row[i] + fwd_shift + bd + 1;
228
37.9M
    (void)real_range_row;
229
37.9M
    if (cfg->txfm_type_row == TXFM_TYPE_ADST4 && i == 1) {
230
      // the adst4 may use 1 extra bit on top of opt_range_row at stage 1
231
      // so opt_range_row >= real_range_row will not hold
232
474k
      stage_range_row[i] = opt_range_row;
233
37.5M
    } else {
234
37.5M
      assert(opt_range_row >= real_range_row);
235
37.5M
      stage_range_row[i] = opt_range_row;
236
37.5M
    }
237
37.9M
  }
238
  // i < MAX_TXFM_STAGE_NUM will mute above array bounds warning
239
41.2M
  for (int i = 0; i < cfg->stage_num_col && i < MAX_TXFM_STAGE_NUM; ++i) {
240
36.1M
    int real_range_col =
241
36.1M
        cfg->stage_range_col[i] + fwd_shift + shift[0] + bd + 1;
242
36.1M
    (void)real_range_col;
243
36.1M
    if (cfg->txfm_type_col == TXFM_TYPE_ADST4 && i == 1) {
244
      // the adst4 may use 1 extra bit on top of opt_range_col at stage 1
245
      // so opt_range_col >= real_range_col will not hold
246
513k
      stage_range_col[i] = opt_range_col;
247
35.6M
    } else {
248
35.6M
      assert(opt_range_col >= real_range_col);
249
35.6M
      stage_range_col[i] = opt_range_col;
250
35.6M
    }
251
36.1M
  }
252
5.08M
}
253
254
static INLINE void inv_txfm2d_add_c(const int32_t *input, uint16_t *output,
255
                                    int stride, TXFM_2D_FLIP_CFG *cfg,
256
                                    int32_t *txfm_buf, TX_SIZE tx_size,
257
5.08M
                                    int bd) {
258
  // Note when assigning txfm_size_col, we use the txfm_size from the
259
  // row configuration and vice versa. This is intentionally done to
260
  // accurately perform rectangular transforms. When the transform is
261
  // rectangular, the number of columns will be the same as the
262
  // txfm_size stored in the row cfg struct. It will make no difference
263
  // for square transforms.
264
5.08M
  const int txfm_size_col = tx_size_wide[cfg->tx_size];
265
5.08M
  const int txfm_size_row = tx_size_high[cfg->tx_size];
266
  // Take the shift from the larger dimension in the rectangular case.
267
5.08M
  const int8_t *shift = cfg->shift;
268
5.08M
  const int rect_type = get_rect_tx_log_ratio(txfm_size_col, txfm_size_row);
269
5.08M
  int8_t stage_range_row[MAX_TXFM_STAGE_NUM];
270
5.08M
  int8_t stage_range_col[MAX_TXFM_STAGE_NUM];
271
5.08M
  assert(cfg->stage_num_row <= MAX_TXFM_STAGE_NUM);
272
5.08M
  assert(cfg->stage_num_col <= MAX_TXFM_STAGE_NUM);
273
5.08M
  av1_gen_inv_stage_range(stage_range_col, stage_range_row, cfg, tx_size, bd);
274
275
5.08M
  const int8_t cos_bit_col = cfg->cos_bit_col;
276
5.08M
  const int8_t cos_bit_row = cfg->cos_bit_row;
277
5.08M
  const TxfmFunc txfm_func_col = inv_txfm_type_to_func(cfg->txfm_type_col);
278
5.08M
  const TxfmFunc txfm_func_row = inv_txfm_type_to_func(cfg->txfm_type_row);
279
280
  // txfm_buf's length is  txfm_size_row * txfm_size_col + 2 *
281
  // AOMMAX(txfm_size_row, txfm_size_col)
282
  // it is used for intermediate data buffering
283
5.08M
  const int buf_offset = AOMMAX(txfm_size_row, txfm_size_col);
284
5.08M
  int32_t *temp_in = txfm_buf;
285
5.08M
  int32_t *temp_out = temp_in + buf_offset;
286
5.08M
  int32_t *buf = temp_out + buf_offset;
287
5.08M
  int32_t *buf_ptr = buf;
288
5.08M
  int c, r;
289
290
  // Rows
291
76.8M
  for (r = 0; r < txfm_size_row; ++r) {
292
71.7M
    if (abs(rect_type) == 1) {
293
282M
      for (c = 0; c < txfm_size_col; ++c) {
294
266M
        temp_in[c] = round_shift((int64_t)input[c] * NewInvSqrt2, NewSqrt2Bits);
295
266M
      }
296
16.2M
      clamp_buf(temp_in, txfm_size_col, bd + 8);
297
16.2M
      txfm_func_row(temp_in, buf_ptr, cos_bit_row, stage_range_row);
298
55.5M
    } else {
299
1.45G
      for (c = 0; c < txfm_size_col; ++c) {
300
1.40G
        temp_in[c] = input[c];
301
1.40G
      }
302
55.5M
      clamp_buf(temp_in, txfm_size_col, bd + 8);
303
55.5M
      txfm_func_row(temp_in, buf_ptr, cos_bit_row, stage_range_row);
304
55.5M
    }
305
71.7M
    av1_round_shift_array(buf_ptr, txfm_size_col, -shift[0]);
306
71.7M
    input += txfm_size_col;
307
71.7M
    buf_ptr += txfm_size_col;
308
71.7M
  }
309
310
  // Columns
311
80.1M
  for (c = 0; c < txfm_size_col; ++c) {
312
75.0M
    if (cfg->lr_flip == 0) {
313
1.74G
      for (r = 0; r < txfm_size_row; ++r)
314
1.66G
        temp_in[r] = buf[r * txfm_size_col + c];
315
74.9M
    } else {
316
      // flip left right
317
695k
      for (r = 0; r < txfm_size_row; ++r)
318
628k
        temp_in[r] = buf[r * txfm_size_col + (txfm_size_col - c - 1)];
319
67.5k
    }
320
75.0M
    clamp_buf(temp_in, txfm_size_row, AOMMAX(bd + 6, 16));
321
75.0M
    txfm_func_col(temp_in, temp_out, cos_bit_col, stage_range_col);
322
75.0M
    av1_round_shift_array(temp_out, txfm_size_row, -shift[1]);
323
75.0M
    if (cfg->ud_flip == 0) {
324
1.74G
      for (r = 0; r < txfm_size_row; ++r) {
325
1.66G
        output[r * stride + c] =
326
1.66G
            highbd_clip_pixel_add(output[r * stride + c], temp_out[r], bd);
327
1.66G
      }
328
74.9M
    } else {
329
      // flip upside down
330
694k
      for (r = 0; r < txfm_size_row; ++r) {
331
625k
        output[r * stride + c] = highbd_clip_pixel_add(
332
625k
            output[r * stride + c], temp_out[txfm_size_row - r - 1], bd);
333
625k
      }
334
68.8k
    }
335
75.0M
  }
336
5.08M
}
337
338
static INLINE void inv_txfm2d_add_facade(const int32_t *input, uint16_t *output,
339
                                         int stride, int32_t *txfm_buf,
340
                                         TX_TYPE tx_type, TX_SIZE tx_size,
341
5.08M
                                         int bd) {
342
5.08M
  TXFM_2D_FLIP_CFG cfg;
343
5.08M
  av1_get_inv_txfm_cfg(tx_type, tx_size, &cfg);
344
  // Forward shift sum uses larger square size, to be consistent with what
345
  // av1_gen_inv_stage_range() does for inverse shifts.
346
5.08M
  inv_txfm2d_add_c(input, output, stride, &cfg, txfm_buf, tx_size, bd);
347
5.08M
}
348
349
void av1_inv_txfm2d_add_4x8_c(const int32_t *input, uint16_t *output,
350
243k
                              int stride, TX_TYPE tx_type, int bd) {
351
243k
  DECLARE_ALIGNED(32, int, txfm_buf[4 * 8 + 8 + 8]);
352
243k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X8, bd);
353
243k
}
354
355
void av1_inv_txfm2d_add_8x4_c(const int32_t *input, uint16_t *output,
356
339k
                              int stride, TX_TYPE tx_type, int bd) {
357
339k
  DECLARE_ALIGNED(32, int, txfm_buf[8 * 4 + 8 + 8]);
358
339k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X4, bd);
359
339k
}
360
361
void av1_inv_txfm2d_add_8x16_c(const int32_t *input, uint16_t *output,
362
226k
                               int stride, TX_TYPE tx_type, int bd) {
363
226k
  DECLARE_ALIGNED(32, int, txfm_buf[8 * 16 + 16 + 16]);
364
226k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X16, bd);
365
226k
}
366
367
void av1_inv_txfm2d_add_16x8_c(const int32_t *input, uint16_t *output,
368
314k
                               int stride, TX_TYPE tx_type, int bd) {
369
314k
  DECLARE_ALIGNED(32, int, txfm_buf[16 * 8 + 16 + 16]);
370
314k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X8, bd);
371
314k
}
372
373
void av1_inv_txfm2d_add_16x32_c(const int32_t *input, uint16_t *output,
374
102k
                                int stride, TX_TYPE tx_type, int bd) {
375
102k
  DECLARE_ALIGNED(32, int, txfm_buf[16 * 32 + 32 + 32]);
376
102k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X32, bd);
377
102k
}
378
379
void av1_inv_txfm2d_add_32x16_c(const int32_t *input, uint16_t *output,
380
102k
                                int stride, TX_TYPE tx_type, int bd) {
381
102k
  DECLARE_ALIGNED(32, int, txfm_buf[32 * 16 + 32 + 32]);
382
102k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X16, bd);
383
102k
}
384
385
void av1_inv_txfm2d_add_4x4_c(const int32_t *input, uint16_t *output,
386
659k
                              int stride, TX_TYPE tx_type, int bd) {
387
659k
  DECLARE_ALIGNED(32, int, txfm_buf[4 * 4 + 4 + 4]);
388
659k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X4, bd);
389
659k
}
390
391
void av1_inv_txfm2d_add_8x8_c(const int32_t *input, uint16_t *output,
392
1.03M
                              int stride, TX_TYPE tx_type, int bd) {
393
1.03M
  DECLARE_ALIGNED(32, int, txfm_buf[8 * 8 + 8 + 8]);
394
1.03M
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X8, bd);
395
1.03M
}
396
397
void av1_inv_txfm2d_add_16x16_c(const int32_t *input, uint16_t *output,
398
697k
                                int stride, TX_TYPE tx_type, int bd) {
399
697k
  DECLARE_ALIGNED(32, int, txfm_buf[16 * 16 + 16 + 16]);
400
697k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X16, bd);
401
697k
}
402
403
void av1_inv_txfm2d_add_32x32_c(const int32_t *input, uint16_t *output,
404
535k
                                int stride, TX_TYPE tx_type, int bd) {
405
535k
  DECLARE_ALIGNED(32, int, txfm_buf[32 * 32 + 32 + 32]);
406
535k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X32, bd);
407
535k
}
408
409
void av1_inv_txfm2d_add_64x64_c(const int32_t *input, uint16_t *output,
410
117k
                                int stride, TX_TYPE tx_type, int bd) {
411
  // TODO(urvang): Can the same array be reused, instead of using a new array?
412
  // Remap 32x32 input into a modified 64x64 by:
413
  // - Copying over these values in top-left 32x32 locations.
414
  // - Setting the rest of the locations to 0.
415
117k
  int32_t mod_input[64 * 64];
416
3.87M
  for (int row = 0; row < 32; ++row) {
417
3.75M
    memcpy(mod_input + row * 64, input + row * 32, 32 * sizeof(*mod_input));
418
3.75M
    memset(mod_input + row * 64 + 32, 0, 32 * sizeof(*mod_input));
419
3.75M
  }
420
117k
  memset(mod_input + 32 * 64, 0, 32 * 64 * sizeof(*mod_input));
421
117k
  DECLARE_ALIGNED(32, int, txfm_buf[64 * 64 + 64 + 64]);
422
117k
  inv_txfm2d_add_facade(mod_input, output, stride, txfm_buf, tx_type, TX_64X64,
423
117k
                        bd);
424
117k
}
425
426
void av1_inv_txfm2d_add_64x32_c(const int32_t *input, uint16_t *output,
427
14.3k
                                int stride, TX_TYPE tx_type, int bd) {
428
  // Remap 32x32 input into a modified 64x32 by:
429
  // - Copying over these values in top-left 32x32 locations.
430
  // - Setting the rest of the locations to 0.
431
14.3k
  int32_t mod_input[64 * 32];
432
473k
  for (int row = 0; row < 32; ++row) {
433
459k
    memcpy(mod_input + row * 64, input + row * 32, 32 * sizeof(*mod_input));
434
459k
    memset(mod_input + row * 64 + 32, 0, 32 * sizeof(*mod_input));
435
459k
  }
436
14.3k
  DECLARE_ALIGNED(32, int, txfm_buf[64 * 32 + 64 + 64]);
437
14.3k
  inv_txfm2d_add_facade(mod_input, output, stride, txfm_buf, tx_type, TX_64X32,
438
14.3k
                        bd);
439
14.3k
}
440
441
void av1_inv_txfm2d_add_32x64_c(const int32_t *input, uint16_t *output,
442
21.6k
                                int stride, TX_TYPE tx_type, int bd) {
443
  // Remap 32x32 input into a modified 32x64 input by:
444
  // - Copying over these values in top-left 32x32 locations.
445
  // - Setting the rest of the locations to 0.
446
21.6k
  int32_t mod_input[32 * 64];
447
21.6k
  memcpy(mod_input, input, 32 * 32 * sizeof(*mod_input));
448
21.6k
  memset(mod_input + 32 * 32, 0, 32 * 32 * sizeof(*mod_input));
449
21.6k
  DECLARE_ALIGNED(32, int, txfm_buf[64 * 32 + 64 + 64]);
450
21.6k
  inv_txfm2d_add_facade(mod_input, output, stride, txfm_buf, tx_type, TX_32X64,
451
21.6k
                        bd);
452
21.6k
}
453
454
void av1_inv_txfm2d_add_16x64_c(const int32_t *input, uint16_t *output,
455
18.1k
                                int stride, TX_TYPE tx_type, int bd) {
456
  // Remap 16x32 input into a modified 16x64 input by:
457
  // - Copying over these values in top-left 16x32 locations.
458
  // - Setting the rest of the locations to 0.
459
18.1k
  int32_t mod_input[16 * 64];
460
18.1k
  memcpy(mod_input, input, 16 * 32 * sizeof(*mod_input));
461
18.1k
  memset(mod_input + 16 * 32, 0, 16 * 32 * sizeof(*mod_input));
462
18.1k
  DECLARE_ALIGNED(32, int, txfm_buf[16 * 64 + 64 + 64]);
463
18.1k
  inv_txfm2d_add_facade(mod_input, output, stride, txfm_buf, tx_type, TX_16X64,
464
18.1k
                        bd);
465
18.1k
}
466
467
void av1_inv_txfm2d_add_64x16_c(const int32_t *input, uint16_t *output,
468
15.5k
                                int stride, TX_TYPE tx_type, int bd) {
469
  // Remap 32x16 input into a modified 64x16 by:
470
  // - Copying over these values in top-left 32x16 locations.
471
  // - Setting the rest of the locations to 0.
472
15.5k
  int32_t mod_input[64 * 16];
473
264k
  for (int row = 0; row < 16; ++row) {
474
248k
    memcpy(mod_input + row * 64, input + row * 32, 32 * sizeof(*mod_input));
475
248k
    memset(mod_input + row * 64 + 32, 0, 32 * sizeof(*mod_input));
476
248k
  }
477
15.5k
  DECLARE_ALIGNED(32, int, txfm_buf[16 * 64 + 64 + 64]);
478
15.5k
  inv_txfm2d_add_facade(mod_input, output, stride, txfm_buf, tx_type, TX_64X16,
479
15.5k
                        bd);
480
15.5k
}
481
482
void av1_inv_txfm2d_add_4x16_c(const int32_t *input, uint16_t *output,
483
139k
                               int stride, TX_TYPE tx_type, int bd) {
484
139k
  DECLARE_ALIGNED(32, int, txfm_buf[4 * 16 + 16 + 16]);
485
139k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X16, bd);
486
139k
}
487
488
void av1_inv_txfm2d_add_16x4_c(const int32_t *input, uint16_t *output,
489
268k
                               int stride, TX_TYPE tx_type, int bd) {
490
268k
  DECLARE_ALIGNED(32, int, txfm_buf[4 * 16 + 16 + 16]);
491
268k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X4, bd);
492
268k
}
493
494
void av1_inv_txfm2d_add_8x32_c(const int32_t *input, uint16_t *output,
495
94.3k
                               int stride, TX_TYPE tx_type, int bd) {
496
94.3k
  DECLARE_ALIGNED(32, int, txfm_buf[8 * 32 + 32 + 32]);
497
94.3k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X32, bd);
498
94.3k
}
499
500
void av1_inv_txfm2d_add_32x8_c(const int32_t *input, uint16_t *output,
501
136k
                               int stride, TX_TYPE tx_type, int bd) {
502
136k
  DECLARE_ALIGNED(32, int, txfm_buf[8 * 32 + 32 + 32]);
503
136k
  inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X8, bd);
504
136k
}