/src/vvdec/source/Lib/CommonLib/x86/InitX86.cpp
Line | Count | Source |
1 | | /* ----------------------------------------------------------------------------- |
2 | | The copyright in this software is being made available under the Clear BSD |
3 | | License, included below. No patent rights, trademark rights and/or |
4 | | other Intellectual Property Rights other than the copyrights concerning |
5 | | the Software are granted under this license. |
6 | | |
7 | | The Clear BSD License |
8 | | |
9 | | Copyright (c) 2018-2026, Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. & The VVdeC Authors. |
10 | | All rights reserved. |
11 | | |
12 | | Redistribution and use in source and binary forms, with or without modification, |
13 | | are permitted (subject to the limitations in the disclaimer below) provided that |
14 | | the following conditions are met: |
15 | | |
16 | | * Redistributions of source code must retain the above copyright notice, |
17 | | this list of conditions and the following disclaimer. |
18 | | |
19 | | * Redistributions in binary form must reproduce the above copyright |
20 | | notice, this list of conditions and the following disclaimer in the |
21 | | documentation and/or other materials provided with the distribution. |
22 | | |
23 | | * Neither the name of the copyright holder nor the names of its |
24 | | contributors may be used to endorse or promote products derived from this |
25 | | software without specific prior written permission. |
26 | | |
27 | | NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY |
28 | | THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
29 | | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
30 | | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A |
31 | | PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
32 | | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
33 | | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
34 | | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
35 | | BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER |
36 | | IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
37 | | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
38 | | POSSIBILITY OF SUCH DAMAGE. |
39 | | |
40 | | |
41 | | ------------------------------------------------------------------------------------------- */ |
42 | | |
43 | | /* |
44 | | * \ingroup CommonLib |
45 | | * \file InitX86.cpp |
46 | | * \brief Initialize encoder SIMD functions. |
47 | | */ |
48 | | |
49 | | |
50 | | #include "CommonDefX86.h" |
51 | | #include "CommonLib/CommonDef.h" |
52 | | #include "CommonLib/InterPrediction.h" |
53 | | #include "CommonLib/InterpolationFilter.h" |
54 | | #include "CommonLib/TrQuant.h" |
55 | | #include "CommonLib/RdCost.h" |
56 | | #include "CommonLib/Buffer.h" |
57 | | #include "CommonLib/TrQuant_EMT.h" |
58 | | #include "CommonLib/IntraPrediction.h" |
59 | | #include "CommonLib/LoopFilter.h" |
60 | | #include "CommonLib/Picture.h" |
61 | | |
62 | | #include "CommonLib/AdaptiveLoopFilter.h" |
63 | | #include "CommonLib/SampleAdaptiveOffset.h" |
64 | | |
65 | | namespace vvdec |
66 | | { |
67 | | |
68 | | #ifdef TARGET_SIMD_X86 |
69 | | |
70 | | # if defined( REAL_TARGET_X86 ) \ |
71 | | || ( defined( SIMD_EVERYWHERE_EXTENSION_LEVEL_ID ) && SIMD_EVERYWHERE_EXTENSION_LEVEL_ID >= X86_SIMD_AVX2 ) |
72 | | # define ENABLE_AVX2_IMPLEMENTATIONS 1 |
73 | | # else |
74 | | # define ENABLE_AVX2_IMPLEMENTATIONS 0 |
75 | | # endif |
76 | | |
77 | | |
78 | | #if ENABLE_SIMD_OPT_MCIF |
79 | | void InterpolationFilter::initInterpolationFilterX86( /*int iBitDepthY, int iBitDepthC*/ ) |
80 | 0 | { |
81 | 0 | auto vext = read_x86_extension_flags(); |
82 | 0 | switch (vext){ |
83 | 0 | case AVX512: |
84 | 0 | case AVX2: |
85 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
86 | 0 | _initInterpolationFilterX86<AVX2>(/*iBitDepthY, iBitDepthC*/); |
87 | 0 | break; |
88 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
89 | 0 | case AVX: |
90 | 0 | case SSE42: |
91 | 0 | case SSE41: |
92 | 0 | _initInterpolationFilterX86<SSE41>(/*iBitDepthY, iBitDepthC*/); |
93 | 0 | break; |
94 | 0 | default: |
95 | 0 | break; |
96 | 0 | } |
97 | 0 | } |
98 | | #endif |
99 | | |
100 | | #if ENABLE_SIMD_OPT_BUFFER |
101 | | void PelBufferOps::initPelBufOpsX86() |
102 | 0 | { |
103 | 0 | auto vext = read_x86_extension_flags(); |
104 | 0 | switch (vext){ |
105 | 0 | case AVX512: |
106 | 0 | case AVX2: |
107 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
108 | 0 | _initPelBufOpsX86<AVX2>(); |
109 | 0 | break; |
110 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
111 | 0 | case AVX: |
112 | 0 | case SSE42: |
113 | 0 | case SSE41: |
114 | 0 | _initPelBufOpsX86<SSE41>(); |
115 | 0 | break; |
116 | 0 | default: |
117 | 0 | break; |
118 | 0 | } |
119 | 0 | } |
120 | | #endif |
121 | | |
122 | | #if ENABLE_SIMD_OPT_DIST |
123 | | void RdCost::initRdCostX86() |
124 | 0 | { |
125 | 0 | auto vext = read_x86_extension_flags(); |
126 | 0 | switch (vext){ |
127 | 0 | case AVX512: |
128 | 0 | case AVX2: |
129 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
130 | 0 | #if !(defined(_MSC_VER) && _MSC_VER >= 1938 && _MSC_VER < 1939) // workaround for buggy msvc versions |
131 | 0 | _initRdCostX86<AVX2>(); |
132 | 0 | break; |
133 | 0 | #endif |
134 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
135 | 0 | case AVX: |
136 | 0 | case SSE42: |
137 | 0 | case SSE41: |
138 | 0 | _initRdCostX86<SSE41>(); |
139 | 0 | break; |
140 | 0 | default: |
141 | 0 | break; |
142 | 0 | } |
143 | 0 | } |
144 | | #endif |
145 | | |
146 | | #if ENABLE_SIMD_OPT_ALF |
147 | | void AdaptiveLoopFilter::initAdaptiveLoopFilterX86() |
148 | 0 | { |
149 | 0 | auto vext = read_x86_extension_flags(); |
150 | 0 | switch ( vext ) |
151 | 0 | { |
152 | 0 | case AVX512: |
153 | 0 | case AVX2: |
154 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
155 | 0 | _initAdaptiveLoopFilterX86<AVX2>(); |
156 | 0 | break; |
157 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
158 | 0 | case AVX: |
159 | 0 | case SSE42: |
160 | 0 | case SSE41: |
161 | 0 | _initAdaptiveLoopFilterX86<SSE41>(); |
162 | 0 | break; |
163 | 0 | default: |
164 | 0 | break; |
165 | 0 | } |
166 | 0 | } |
167 | | #endif |
168 | | |
169 | | #if ENABLE_SIMD_DBLF |
170 | | void LoopFilter::initLoopFilterX86() |
171 | 0 | { |
172 | 0 | auto vext = read_x86_extension_flags(); |
173 | 0 | switch ( vext ) |
174 | 0 | { |
175 | 0 | case AVX512: |
176 | 0 | case AVX2: |
177 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
178 | 0 | _initLoopFilterX86<AVX2>(); |
179 | 0 | break; |
180 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
181 | 0 | case AVX: |
182 | 0 | case SSE42: |
183 | 0 | case SSE41: |
184 | 0 | _initLoopFilterX86<SSE41>(); |
185 | 0 | break; |
186 | 0 | default: |
187 | 0 | break; |
188 | 0 | } |
189 | 0 | } |
190 | | #endif |
191 | | |
192 | | #if ENABLE_SIMD_TCOEFF_OPS |
193 | | void TCoeffOps::initTCoeffOpsX86() |
194 | 0 | { |
195 | 0 | auto vext = read_x86_extension_flags(); |
196 | |
|
197 | 0 | switch( vext ) |
198 | 0 | { |
199 | 0 | case AVX512: |
200 | 0 | case AVX2: |
201 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
202 | 0 | _initTCoeffOpsX86<AVX2>(); |
203 | 0 | break; |
204 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
205 | 0 | case AVX: |
206 | 0 | case SSE42: |
207 | 0 | case SSE41: |
208 | 0 | _initTCoeffOpsX86<SSE41>(); |
209 | 0 | break; |
210 | 0 | default: |
211 | 0 | break; |
212 | 0 | } |
213 | 0 | } |
214 | | |
215 | | void TrQuant::initTrQuantX86() |
216 | 0 | { |
217 | 0 | auto vext = read_x86_extension_flags(); |
218 | |
|
219 | 0 | switch( vext ) |
220 | 0 | { |
221 | 0 | case AVX512: |
222 | 0 | case AVX2: |
223 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
224 | 0 | _initTrQuantX86<AVX2>(); |
225 | 0 | break; |
226 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
227 | 0 | case AVX: |
228 | 0 | case SSE42: |
229 | 0 | case SSE41: |
230 | 0 | _initTrQuantX86<SSE41>(); |
231 | 0 | break; |
232 | 0 | default: |
233 | 0 | break; |
234 | 0 | } |
235 | 0 | } |
236 | | #endif |
237 | | |
238 | | #if ENABLE_SIMD_OPT_INTRAPRED |
239 | | void IntraPrediction::initIntraPredictionX86() |
240 | 0 | { |
241 | 0 | auto vext = read_x86_extension_flags(); |
242 | 0 | switch (vext){ |
243 | 0 | case AVX512: |
244 | 0 | case AVX2: |
245 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
246 | 0 | _initIntraPredictionX86<AVX2>(); |
247 | 0 | break; |
248 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
249 | 0 | case AVX: |
250 | 0 | case SSE42: |
251 | 0 | case SSE41: |
252 | 0 | _initIntraPredictionX86<SSE41>(); |
253 | 0 | break; |
254 | 0 | default: |
255 | 0 | break; |
256 | 0 | } |
257 | |
|
258 | 0 | } |
259 | | |
260 | | #endif |
261 | | #if ENABLE_SIMD_OPT_SAO |
262 | | void SampleAdaptiveOffset::initSampleAdaptiveOffsetX86() |
263 | 0 | { |
264 | 0 | auto vext = read_x86_extension_flags(); |
265 | 0 | switch (vext){ |
266 | 0 | case AVX512: |
267 | 0 | case AVX2: |
268 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
269 | 0 | _initSampleAdaptiveOffsetX86<AVX2>(); |
270 | 0 | break; |
271 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
272 | 0 | case AVX: |
273 | 0 | case SSE42: |
274 | 0 | case SSE41: |
275 | 0 | _initSampleAdaptiveOffsetX86<SSE41>(); |
276 | 0 | break; |
277 | 0 | default: |
278 | 0 | break; |
279 | 0 | } |
280 | |
|
281 | 0 | } |
282 | | |
283 | | #endif |
284 | | |
285 | | #if ENABLE_SIMD_OPT_INTER |
286 | | void InterPrediction::initInterPredictionX86() |
287 | 0 | { |
288 | 0 | auto vext = read_x86_extension_flags(); |
289 | 0 | switch (vext){ |
290 | 0 | case AVX512: |
291 | 0 | case AVX2: |
292 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
293 | 0 | _initInterPredictionX86<AVX2>(); |
294 | 0 | break; |
295 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
296 | 0 | case AVX: |
297 | 0 | case SSE42: |
298 | 0 | case SSE41: |
299 | 0 | _initInterPredictionX86<SSE41>(); |
300 | 0 | break; |
301 | 0 | default: |
302 | 0 | break; |
303 | 0 | } |
304 | |
|
305 | 0 | } |
306 | | #endif |
307 | | |
308 | | #if ENABLE_SIMD_OPT_PICTURE |
309 | | void Picture::initPictureX86() |
310 | 0 | { |
311 | 0 | auto vext = read_x86_extension_flags(); |
312 | 0 | switch (vext){ |
313 | 0 | case AVX512: |
314 | 0 | case AVX2: |
315 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
316 | 0 | _initPictureX86<AVX2>(); |
317 | 0 | break; |
318 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
319 | 0 | case AVX: |
320 | 0 | case SSE42: |
321 | 0 | case SSE41: |
322 | 0 | _initPictureX86<SSE41>(); |
323 | 0 | break; |
324 | 0 | default: |
325 | 0 | break; |
326 | 0 | } |
327 | |
|
328 | 0 | } |
329 | | #endif |
330 | | |
331 | | #if ENABLE_SIMD_OPT_QUANT |
332 | | void Quant::initQuantX86() |
333 | 0 | { |
334 | 0 | auto vext = read_x86_extension_flags(); |
335 | 0 | switch (vext){ |
336 | 0 | case AVX512: |
337 | 0 | case AVX2: |
338 | 0 | #if ENABLE_AVX2_IMPLEMENTATIONS |
339 | 0 | _initQuantX86<AVX2>(); |
340 | 0 | break; |
341 | 0 | #endif // ENABLE_AVX2_IMPLEMENTATIONS |
342 | 0 | case AVX: |
343 | 0 | case SSE42: |
344 | 0 | case SSE41: |
345 | 0 | _initQuantX86<SSE41>(); |
346 | 0 | break; |
347 | 0 | default: |
348 | 0 | break; |
349 | 0 | } |
350 | |
|
351 | 0 | } |
352 | | |
353 | | #endif |
354 | | |
355 | | #endif // TARGET_SIMD_X86 |
356 | | |
357 | | } // namespace vvdec |