Coverage Report

Created: 2025-10-14 06:57

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/rust/registry/src/index.crates.io-1949cf8c6b5b557f/pxfm-0.1.25/src/logs/log1pf.rs
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Source
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/*
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 * // Copyright (c) Radzivon Bartoshyk 6/2025. All rights reserved.
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 * //
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 * // Redistribution and use in source and binary forms, with or without modification,
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 * // are permitted provided that the following conditions are met:
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 * //
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 * // 1.  Redistributions of source code must retain the above copyright notice, this
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 * // list of conditions and the following disclaimer.
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 * //
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 * // 2.  Redistributions in binary form must reproduce the above copyright notice,
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 * // this list of conditions and the following disclaimer in the documentation
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 * // and/or other materials provided with the distribution.
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 * //
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 * // 3.  Neither the name of the copyright holder nor the names of its
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 * // contributors may be used to endorse or promote products derived from
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 * // this software without specific prior written permission.
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 * //
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 * // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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 * // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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 * // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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 * // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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 * // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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 * // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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 * // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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 * // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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use crate::common::f_fmla;
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use crate::logs::{LOG_R_DD, LOG_RANGE_REDUCTION};
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use crate::polyeval::{f_estrin_polyeval8, f_polyeval6};
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#[inline]
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0
pub(crate) fn core_logf(x: f64) -> f64 {
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0
    let x_u = x.to_bits();
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    const E_BIAS: u64 = (1u64 << (11 - 1u64)) - 1u64;
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    let mut x_e: i32 = -(E_BIAS as i32);
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    // log2(x) = log2(2^x_e * x_m)
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    //         = x_e + log2(x_m)
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    // Range reduction for log2(x_m):
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    // For each x_m, we would like to find r such that:
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    //   -2^-8 <= r * x_m - 1 < 2^-7
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    let shifted = (x_u >> 45) as i32;
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0
    let index = shifted & 0x7F;
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0
    let r = f64::from_bits(LOG_RANGE_REDUCTION[index as usize]);
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    // Add unbiased exponent. Add an extra 1 if the 8 leading fractional bits are
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    // all 1's.
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0
    x_e = x_e.wrapping_add(x_u.wrapping_add(1u64 << 45).wrapping_shr(52) as i32);
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    let e_x = x_e as f64;
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    const LOG_2_HI: f64 = f64::from_bits(0x3fe62e42fefa3800);
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    const LOG_2_LO: f64 = f64::from_bits(0x3d2ef35793c76730);
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0
    let log_r_dd = LOG_R_DD[index as usize];
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    // hi is exact
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0
    let hi = f_fmla(e_x, LOG_2_HI, f64::from_bits(log_r_dd.1));
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0
    let lo = f_fmla(e_x, LOG_2_LO, f64::from_bits(log_r_dd.0));
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    // Set m = 1.mantissa.
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0
    let x_m = (x_u & 0x000F_FFFF_FFFF_FFFFu64) | 0x3FF0_0000_0000_0000u64;
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    let m = f64::from_bits(x_m);
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    let u;
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    #[cfg(any(
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        all(
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            any(target_arch = "x86", target_arch = "x86_64"),
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            target_feature = "fma"
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        ),
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        target_arch = "aarch64"
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    ))]
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    {
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        u = f_fmla(r, m, -1.0); // exact
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    }
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    #[cfg(not(any(
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        all(
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            any(target_arch = "x86", target_arch = "x86_64"),
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            target_feature = "fma"
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        ),
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        target_arch = "aarch64"
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    )))]
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    {
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        use crate::logs::LOG_CD;
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0
        let c_m = x_m & 0x3FFF_E000_0000_0000u64;
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        let c = f64::from_bits(c_m);
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        u = f_fmla(r, m - c, f64::from_bits(LOG_CD[index as usize])); // exact
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    }
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    let r1 = hi;
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    // Polynomial for log(1+x)/x generated in Sollya:
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    // d = [-2^-8, 2^-7];
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    // f_log = log(1 + x)/x;
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    // Q = fpminimax(f_log, 5, [|D...|], d);
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    // See ./notes/log1pf_core.sollya
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    let p = f_polyeval6(
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        u,
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        f64::from_bits(0x3fefffffffffffff),
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        f64::from_bits(0xbfdffffffffff3e6),
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        f64::from_bits(0x3fd5555555626b74),
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        f64::from_bits(0xbfd0000026aeecc8),
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        f64::from_bits(0x3fc9999114d16c06),
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        f64::from_bits(0xbfc51e433a85278a),
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    );
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0
    f_fmla(p, u, r1) + lo
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0
}
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/// Computes log(x+1)
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///
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/// Max ULP 0.5
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#[inline]
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pub fn f_log1pf(x: f32) -> f32 {
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    let ux = x.to_bits().wrapping_shl(1);
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    if ux >= 0xffu32 << 24 || ux == 0 {
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        // |x| == 0, |x| == inf, x == NaN
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0
        if ux == 0 {
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            return x;
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        }
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        if x.is_infinite() {
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            return if x.is_sign_positive() {
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                f32::INFINITY
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            } else {
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0
                f32::NAN
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            };
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0
        }
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        return x + f32::NAN;
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0
    }
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0
    let xd = x as f64;
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    let ax = x.to_bits() & 0x7fff_ffffu32;
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    // Use log1p(x) = log(1 + x) for |x| > 2^-6;
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    if ax > 0x3c80_0000u32 {
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0
        if x == -1. {
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            return f32::NEG_INFINITY;
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0
        }
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        let x1p = xd + 1.;
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        if x1p <= 0. {
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0
            if x1p == 0. {
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                return f32::NEG_INFINITY;
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            }
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            return f32::NAN;
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        }
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        return core_logf(x1p) as f32;
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0
    }
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    // log(1+x) is expected to be used near zero
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    // Polynomial generated by Sollya:
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    // d = [-2^-6; 2^-6];
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    // f_log1pf = log(1+x)/x;
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    // Q = fpminimax(f_log1pf, 7, [|0, D...|], d);
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    // See ./notes/log1pf.sollya
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0
    let p = f_estrin_polyeval8(
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        xd,
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        f64::from_bits(0x3ff0000000000000),
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0
        f64::from_bits(0xbfe0000000000000),
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        f64::from_bits(0x3fd5555555556aad),
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        f64::from_bits(0xbfd000000000181a),
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        f64::from_bits(0x3fc999998998124e),
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        f64::from_bits(0xbfc55555452e2a2b),
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0
        f64::from_bits(0x3fc24adb8cde4aa7),
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        f64::from_bits(0xbfc0019db915ef6f),
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0
    ) * xd;
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    p as f32
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0
}
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#[inline]
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pub(crate) fn core_log1pf(x: f32) -> f64 {
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    let xd = x as f64;
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    let ax = x.to_bits() & 0x7fff_ffffu32;
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    // Use log1p(x) = log(1 + x) for |x| > 2^-6;
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    if ax > 0x3c80_0000u32 {
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        let x1p = xd + 1.;
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        return core_logf(x1p);
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    }
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    // log(1+x) is expected to be used near zero
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    // Polynomial generated by Sollya:
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    // d = [-2^-6; 2^-6];
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    // f_log1pf = log(1+x)/x;
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    // Q = fpminimax(f_log1pf, 7, [|0, D...|], d);
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    // See ./notes/log1pf.sollya
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    f_estrin_polyeval8(
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        xd,
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        f64::from_bits(0x3ff0000000000000),
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        f64::from_bits(0xbfe0000000000000),
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        f64::from_bits(0x3fd5555555556aad),
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        f64::from_bits(0xbfd000000000181a),
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0
        f64::from_bits(0x3fc999998998124e),
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        f64::from_bits(0xbfc55555452e2a2b),
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0
        f64::from_bits(0x3fc24adb8cde4aa7),
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0
        f64::from_bits(0xbfc0019db915ef6f),
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0
    ) * xd
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0
}
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#[cfg(test)]
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mod tests {
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    use super::*;
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    #[test]
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    fn log1pf_works() {
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        assert!(f_log1pf(f32::from_bits(0xffefb9a7)).is_nan());
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        assert!(f_log1pf(f32::NAN).is_nan());
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        assert_eq!(f_log1pf(f32::from_bits(0x41078feb)), 2.2484074);
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        assert_eq!(f_log1pf(-0.0000014305108), -0.0000014305118);
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        assert_eq!(f_log1pf(0.0), 0.0);
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        assert_eq!(f_log1pf(2.0), 1.0986123);
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        assert_eq!(f_log1pf(-0.7), -1.2039728);
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        assert_eq!(f_log1pf(-0.0000000000043243), -4.3243e-12);
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        assert_eq!(f_log1pf(f32::INFINITY), f32::INFINITY);
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        assert!(f_log1pf(-2.0).is_nan());
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        assert!(f_log1pf(f32::NAN).is_nan());
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    }
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}