/rust/registry/src/index.crates.io-1949cf8c6b5b557f/seize-0.3.3/src/utils.rs
Line | Count | Source |
1 | | /// Pads and aligns a value to the length of a cache line. |
2 | | #[cfg_attr( |
3 | | any( |
4 | | target_arch = "x86_64", |
5 | | target_arch = "aarch64", |
6 | | target_arch = "powerpc64", |
7 | | ), |
8 | | repr(align(128)) |
9 | | )] |
10 | | #[cfg_attr( |
11 | | any( |
12 | | target_arch = "arm", |
13 | | target_arch = "mips", |
14 | | target_arch = "mips64", |
15 | | target_arch = "riscv64", |
16 | | ), |
17 | | repr(align(32)) |
18 | | )] |
19 | | #[cfg_attr(target_arch = "s390x", repr(align(256)))] |
20 | | #[cfg_attr( |
21 | | not(any( |
22 | | target_arch = "x86_64", |
23 | | target_arch = "aarch64", |
24 | | target_arch = "powerpc64", |
25 | | target_arch = "arm", |
26 | | target_arch = "mips", |
27 | | target_arch = "mips64", |
28 | | target_arch = "riscv64", |
29 | | target_arch = "s390x", |
30 | | )), |
31 | | repr(align(64)) |
32 | | )] |
33 | | #[derive(Default)] |
34 | | pub struct CachePadded<T> { |
35 | | pub value: T, |
36 | | } |
37 | | |
38 | | impl<T> CachePadded<T> { |
39 | 0 | pub fn new(value: T) -> Self { |
40 | 0 | Self { value } |
41 | 0 | } |
42 | | } |
43 | | |
44 | | impl<T> std::ops::Deref for CachePadded<T> { |
45 | | type Target = T; |
46 | | |
47 | 0 | fn deref(&self) -> &T { |
48 | 0 | &self.value |
49 | 0 | } Unexecuted instantiation: <seize::utils::CachePadded<core::cell::UnsafeCell<seize::raw::LocalBatch>> as core::ops::deref::Deref>::deref Unexecuted instantiation: <seize::utils::CachePadded<seize::raw::Reservation> as core::ops::deref::Deref>::deref |
50 | | } |
51 | | |
52 | | impl<T> std::ops::DerefMut for CachePadded<T> { |
53 | 0 | fn deref_mut(&mut self) -> &mut T { |
54 | 0 | &mut self.value |
55 | 0 | } |
56 | | } |