Coverage Report

Created: 2026-03-12 07:14

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/ffmpeg/libavutil/cpu.c
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Count
Source
1
/*
2
 * This file is part of FFmpeg.
3
 *
4
 * FFmpeg is free software; you can redistribute it and/or
5
 * modify it under the terms of the GNU Lesser General Public
6
 * License as published by the Free Software Foundation; either
7
 * version 2.1 of the License, or (at your option) any later version.
8
 *
9
 * FFmpeg is distributed in the hope that it will be useful,
10
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12
 * Lesser General Public License for more details.
13
 *
14
 * You should have received a copy of the GNU Lesser General Public
15
 * License along with FFmpeg; if not, write to the Free Software
16
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17
 */
18
19
#include "config.h"
20
21
#if HAVE_SCHED_GETAFFINITY
22
#ifndef _GNU_SOURCE
23
# define _GNU_SOURCE
24
#endif
25
#include <sched.h>
26
#endif
27
28
#include <stddef.h>
29
#include <stdint.h>
30
#include <stdatomic.h>
31
32
#include "attributes.h"
33
#include "cpu.h"
34
#include "cpu_internal.h"
35
#include "opt.h"
36
#include "common.h"
37
38
#if HAVE_GETPROCESSAFFINITYMASK || HAVE_WINRT
39
#include <windows.h>
40
#endif
41
#if HAVE_SYSCTL
42
#if HAVE_SYS_PARAM_H
43
#include <sys/param.h>
44
#endif
45
#include <sys/types.h>
46
#include <sys/sysctl.h>
47
#endif
48
#if HAVE_UNISTD_H
49
#include <unistd.h>
50
#endif
51
52
#if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
53
#include <sys/auxv.h>
54
#endif
55
56
static atomic_int cpu_flags = -1;
57
static atomic_int cpu_count = -1;
58
59
static int get_cpu_flags(void)
60
0
{
61
#if ARCH_MIPS
62
    return ff_get_cpu_flags_mips();
63
#elif ARCH_AARCH64
64
    return ff_get_cpu_flags_aarch64();
65
#elif ARCH_ARM
66
    return ff_get_cpu_flags_arm();
67
#elif ARCH_PPC
68
    return ff_get_cpu_flags_ppc();
69
#elif ARCH_RISCV
70
    return ff_get_cpu_flags_riscv();
71
#elif ARCH_WASM
72
    return ff_get_cpu_flags_wasm();
73
#elif ARCH_X86
74
    return ff_get_cpu_flags_x86();
75
#elif ARCH_LOONGARCH
76
    return ff_get_cpu_flags_loongarch();
77
#endif
78
0
    return 0;
79
0
}
80
81
0
void av_force_cpu_flags(int arg){
82
0
    if (ARCH_X86 &&
83
0
           (arg & ( AV_CPU_FLAG_3DNOW    |
84
0
                    AV_CPU_FLAG_3DNOWEXT |
85
0
                    AV_CPU_FLAG_MMXEXT   |
86
0
                    AV_CPU_FLAG_SSE      |
87
0
                    AV_CPU_FLAG_SSE2     |
88
0
                    AV_CPU_FLAG_SSE2SLOW |
89
0
                    AV_CPU_FLAG_SSE3     |
90
0
                    AV_CPU_FLAG_SSE3SLOW |
91
0
                    AV_CPU_FLAG_SSSE3    |
92
0
                    AV_CPU_FLAG_SSE4     |
93
0
                    AV_CPU_FLAG_SSE42    |
94
0
                    AV_CPU_FLAG_AVX      |
95
0
                    AV_CPU_FLAG_AVXSLOW  |
96
0
                    AV_CPU_FLAG_XOP      |
97
0
                    AV_CPU_FLAG_FMA3     |
98
0
                    AV_CPU_FLAG_FMA4     |
99
0
                    AV_CPU_FLAG_AVX2     |
100
0
                    AV_CPU_FLAG_AVX512   ))
101
0
        && !(arg & AV_CPU_FLAG_MMX)) {
102
0
        av_log(NULL, AV_LOG_WARNING, "MMX implied by specified flags\n");
103
0
        arg |= AV_CPU_FLAG_MMX;
104
0
    }
105
106
0
    atomic_store_explicit(&cpu_flags, arg, memory_order_relaxed);
107
0
}
108
109
int av_get_cpu_flags(void)
110
0
{
111
0
    int flags = atomic_load_explicit(&cpu_flags, memory_order_relaxed);
112
0
    if (flags == -1) {
113
0
        flags = get_cpu_flags();
114
0
        atomic_store_explicit(&cpu_flags, flags, memory_order_relaxed);
115
0
    }
116
0
    return flags;
117
0
}
118
119
int av_parse_cpu_caps(unsigned *flags, const char *s)
120
0
{
121
0
        static const AVOption cpuflags_opts[] = {
122
0
        { "flags"   , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" },
123
#if   ARCH_PPC
124
        { "altivec" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ALTIVEC  },    .unit = "flags" },
125
        { "vsx"     , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VSX      },    .unit = "flags" },
126
        { "power8"  , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_POWER8   },    .unit = "flags" },
127
#elif ARCH_X86
128
        { "mmx"     , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX      },    .unit = "flags" },
129
        { "mmx2"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2     },    .unit = "flags" },
130
        { "mmxext"  , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX2     },    .unit = "flags" },
131
        { "sse"     , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE      },    .unit = "flags" },
132
        { "sse2"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2     },    .unit = "flags" },
133
        { "sse2slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE2SLOW },    .unit = "flags" },
134
        { "sse3"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3     },    .unit = "flags" },
135
        { "sse3slow", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE3SLOW },    .unit = "flags" },
136
        { "ssse3"   , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSSE3    },    .unit = "flags" },
137
        { "atom"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM     },    .unit = "flags" },
138
        { "sse4.1"  , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4     },    .unit = "flags" },
139
        { "sse4.2"  , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42    },    .unit = "flags" },
140
        { "avx"     , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX      },    .unit = "flags" },
141
        { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW  },    .unit = "flags" },
142
        { "xop"     , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP      },    .unit = "flags" },
143
        { "fma3"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3     },    .unit = "flags" },
144
        { "fma4"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4     },    .unit = "flags" },
145
        { "avx2"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX2     },    .unit = "flags" },
146
        { "bmi1"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI1     },    .unit = "flags" },
147
        { "bmi2"    , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_BMI2     },    .unit = "flags" },
148
        { "3dnow"   , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW    },    .unit = "flags" },
149
        { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT },    .unit = "flags" },
150
        { "cmov",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV     },    .unit = "flags" },
151
        { "aesni",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI    },    .unit = "flags" },
152
        { "clmul",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CLMUL    },    .unit = "flags" },
153
        { "avx512"  , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512   },    .unit = "flags" },
154
        { "avx512icl",  NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512ICL   }, .unit = "flags" },
155
        { "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
156
157
#define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
158
#define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
159
#define CPU_FLAG_P4 CPU_FLAG_P3| AV_CPU_FLAG_SSE2
160
        { "pentium2", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P2          },    .unit = "flags" },
161
        { "pentium3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P3          },    .unit = "flags" },
162
        { "pentium4", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_P4          },    .unit = "flags" },
163
164
#define CPU_FLAG_K62 AV_CPU_FLAG_MMX | AV_CPU_FLAG_3DNOW
165
#define CPU_FLAG_ATHLON   CPU_FLAG_K62 | AV_CPU_FLAG_CMOV | AV_CPU_FLAG_3DNOWEXT | AV_CPU_FLAG_MMX2
166
#define CPU_FLAG_ATHLONXP CPU_FLAG_ATHLON | AV_CPU_FLAG_SSE
167
#define CPU_FLAG_K8  CPU_FLAG_ATHLONXP | AV_CPU_FLAG_SSE2
168
        { "k6",       NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMX      },    .unit = "flags" },
169
        { "k62",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K62         },    .unit = "flags" },
170
        { "athlon",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLON      },    .unit = "flags" },
171
        { "athlonxp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_ATHLONXP    },    .unit = "flags" },
172
        { "k8",       NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPU_FLAG_K8          },    .unit = "flags" },
173
#elif ARCH_ARM
174
        { "armv5te",  NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE  },    .unit = "flags" },
175
        { "armv6",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6    },    .unit = "flags" },
176
        { "armv6t2",  NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6T2  },    .unit = "flags" },
177
        { "vfp",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP      },    .unit = "flags" },
178
        { "vfp_vm",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP_VM   },    .unit = "flags" },
179
        { "vfpv3",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3    },    .unit = "flags" },
180
        { "neon",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON     },    .unit = "flags" },
181
        { "setend",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND   },    .unit = "flags" },
182
#elif ARCH_AARCH64
183
        { "armv8",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8    },    .unit = "flags" },
184
        { "neon",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON     },    .unit = "flags" },
185
        { "vfp",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP      },    .unit = "flags" },
186
        { "dotprod",  NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_DOTPROD  },    .unit = "flags" },
187
        { "i8mm",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_I8MM     },    .unit = "flags" },
188
        { "sve",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SVE      },    .unit = "flags" },
189
        { "sve2",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SVE2     },    .unit = "flags" },
190
        { "sme",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME      },    .unit = "flags" },
191
        { "crc",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARM_CRC  },    .unit = "flags" },
192
        { "sme_i16i64", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME_I16I64 },    .unit = "flags" },
193
        { "sme2",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SME2     },    .unit = "flags" },
194
        { "pmull",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_PMULL    },    .unit = "flags" },
195
        { "eor3",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_EOR3     },    .unit = "flags" },
196
#elif ARCH_MIPS
197
        { "mmi",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MMI      },    .unit = "flags" },
198
        { "msa",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_MSA      },    .unit = "flags" },
199
#elif ARCH_LOONGARCH
200
        { "lsx",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LSX      },    .unit = "flags" },
201
        { "lasx",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_LASX     },    .unit = "flags" },
202
#elif ARCH_RISCV
203
        { "rvi",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVI      },    .unit = "flags" },
204
        { "rvb",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB      },    .unit = "flags" },
205
        { "zve32x",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I32  },    .unit = "flags" },
206
        { "zve32f",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F32  },    .unit = "flags" },
207
        { "zve64x",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I64  },    .unit = "flags" },
208
        { "zve64d",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F64  },    .unit = "flags" },
209
        { "zbb",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC },   .unit = "flags" },
210
        { "zvbb",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB },   .unit = "flags" },
211
        { "misaligned", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_MISALIGNED },   .unit = "flags" },
212
#elif ARCH_WASM
213
        { "simd128",  NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SIMD128  },    .unit = "flags" },
214
#endif
215
0
        { NULL },
216
0
    };
217
0
    static const AVClass class = {
218
0
        .class_name = "cpuflags",
219
0
        .item_name  = av_default_item_name,
220
0
        .option     = cpuflags_opts,
221
0
        .version    = LIBAVUTIL_VERSION_INT,
222
0
    };
223
0
    const AVClass *pclass = &class;
224
225
0
    return av_opt_eval_flags(&pclass, &cpuflags_opts[0], s, flags);
226
0
}
227
228
int av_cpu_count(void)
229
0
{
230
0
    static atomic_int printed = 0;
231
232
0
    int nb_cpus = 1;
233
0
    int count   = 0;
234
#if HAVE_WINRT
235
    SYSTEM_INFO sysinfo;
236
#endif
237
0
#if HAVE_SCHED_GETAFFINITY && defined(CPU_COUNT)
238
0
    cpu_set_t cpuset;
239
240
0
    CPU_ZERO(&cpuset);
241
242
0
    if (!sched_getaffinity(0, sizeof(cpuset), &cpuset))
243
0
        nb_cpus = CPU_COUNT(&cpuset);
244
#elif HAVE_GETPROCESSAFFINITYMASK
245
    DWORD_PTR proc_aff, sys_aff;
246
    if (GetProcessAffinityMask(GetCurrentProcess(), &proc_aff, &sys_aff))
247
        nb_cpus = av_popcount64(proc_aff);
248
#elif HAVE_SYSCTL && defined(HW_NCPUONLINE)
249
    int mib[2] = { CTL_HW, HW_NCPUONLINE };
250
    size_t len = sizeof(nb_cpus);
251
252
    if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
253
        nb_cpus = 0;
254
#elif HAVE_SYSCTL && defined(HW_NCPU)
255
    int mib[2] = { CTL_HW, HW_NCPU };
256
    size_t len = sizeof(nb_cpus);
257
258
    if (sysctl(mib, 2, &nb_cpus, &len, NULL, 0) == -1)
259
        nb_cpus = 0;
260
#elif HAVE_SYSCONF && defined(_SC_NPROC_ONLN)
261
    nb_cpus = sysconf(_SC_NPROC_ONLN);
262
#elif HAVE_SYSCONF && defined(_SC_NPROCESSORS_ONLN)
263
    nb_cpus = sysconf(_SC_NPROCESSORS_ONLN);
264
#elif HAVE_WINRT
265
    GetNativeSystemInfo(&sysinfo);
266
    nb_cpus = sysinfo.dwNumberOfProcessors;
267
#endif
268
269
0
    if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed))
270
0
        av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus);
271
272
0
    count = atomic_load_explicit(&cpu_count, memory_order_relaxed);
273
274
0
    if (count > 0) {
275
0
        nb_cpus = count;
276
0
        av_log(NULL, AV_LOG_DEBUG, "overriding to %d logical cores\n", nb_cpus);
277
0
    }
278
279
0
    return nb_cpus;
280
0
}
281
282
void av_cpu_force_count(int count)
283
0
{
284
0
    atomic_store_explicit(&cpu_count, count, memory_order_relaxed);
285
0
}
286
287
size_t av_cpu_max_align(void)
288
0
{
289
#if ARCH_MIPS
290
    return ff_get_cpu_max_align_mips();
291
#elif ARCH_AARCH64
292
    return ff_get_cpu_max_align_aarch64();
293
#elif ARCH_ARM
294
    return ff_get_cpu_max_align_arm();
295
#elif ARCH_PPC
296
    return ff_get_cpu_max_align_ppc();
297
#elif ARCH_WASM
298
    return ff_get_cpu_max_align_wasm();
299
#elif ARCH_X86
300
    return ff_get_cpu_max_align_x86();
301
#elif ARCH_LOONGARCH
302
    return ff_get_cpu_max_align_loongarch();
303
#endif
304
305
0
    return 8;
306
0
}
307
308
#if !ARCH_X86
309
unsigned long ff_getauxval(unsigned long type)
310
0
{
311
0
#if HAVE_GETAUXVAL
312
0
    return getauxval(type);
313
#elif HAVE_ELF_AUX_INFO
314
    unsigned long aux = 0;
315
    int ret = elf_aux_info(type, &aux, sizeof(aux));
316
    if (ret != 0) {
317
        errno = ret;
318
    }
319
    return aux;
320
#else
321
    errno = ENOSYS;
322
    return 0;
323
#endif
324
0
}
325
#endif